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;DFPTA
SEQ 0001
IDENTIFICATION
--------------
PRODUCT CODE: AH-T732AA-DD
DIAGNOSTIC CODE: DFPTA
PRODUCT NAME: DFPTAA0 Port Basic Device Diagnostic
VERSION: 0.1
DATE RELEASED: December 31, 1984
MAINTAINED BY: Peripherals/CPS Engineering
AUTHOR: Richard Stockdale
COPYRIGHT (C) 1984
DIGITAL EQUIPMENT CORPORATION, MAYNARD, MASS.
THIS SOFTWARE IS FURNISHED UNDER A LICENSE FOR USE ONLY ON A
SINGLE COMPUTER SYSTEM AND MAY BE COPIED ONLY WITH THE INCLUSION
OF THE ABOVE COPYRIGHT NOTICE. THIS SOFTWARE, OR ANY OTHER
COPIES THEREOF, MAY NOT BE PROVIDED OR OTHERWISE MADE AVAILABLE
TO ANY OTHER PERSON EXCEPT FOR USE ON SUCH SYSTEM AND TO ONE WHO
AGREES TO THESE LICENSE TERMS. TITLE TO AND OWNERSHIP OF THE
SOFTWARE SHALL AT ALL TIMES REMAIN IN DIGITAL EQUIPMENT
CORPORATION.
THE INFORMATION IN THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT
NOTICE AND SHOULD NOT BE CONSTRUED AS A COMMITMENT BY DIGITAL
EQUIPMENT CORPORATION.
DIGITAL EQUIPMENT CORPORATION ASSUMES NO RESPONSIBILITY FOR THE
USE OR RELIABILITY OF ITS SOFTWARE IN EQUIPMENT WHICH IS NOT
SUPPLIED BY DIGITAL EQUIPMENT CORPORATION.
MAINDEC-10-DFPTA-A-D Page ii
Table of Contents SEQ 0002
Table of Contents
Page
----
1.0 PROGRAM ABSTRACT . . . . . . . . . . . . . . . . . . 1
2.0 REQUIREMENTS . . . . . . . . . . . . . . . . . . . . 2
2.1 Hardware Requirements . . . . . . . . . . . . . . 2
2.1.1 KL10 Microcode Requirements . . . . . . . . . . 2
2.1.2 Memory Requirements . . . . . . . . . . . . . . 2
2.1.3 Load Device . . . . . . . . . . . . . . . . . . 2
2.2 Software Requirements . . . . . . . . . . . . . . 2
2.3 Diagnostic Prerequisites . . . . . . . . . . . . . 3
3.0 PROGRAM LOADING PROCEDURE . . . . . . . . . . . . . 4
4.0 PROGRAM STARTING PROCEDURE . . . . . . . . . . . . . 5
4.1 Starting the Diagnostic . . . . . . . . . . . . . 5
4.2 Initial Program Switches . . . . . . . . . . . . . 5
4.3 Startup Procedure . . . . . . . . . . . . . . . . 5
4.3.1 Port Configuration . . . . . . . . . . . . . . . 7
4.4 Optional Restart Address . . . . . . . . . . . . . 7
5.0 PROGRAM STOPPING PROCEDURE . . . . . . . . . . . . . 8
6.0 PROGRAM OPERATING PROCEDURE . . . . . . . . . . . . 9
6.1 Overview . . . . . . . . . . . . . . . . . . . . . 9
6.2 Configuration . . . . . . . . . . . . . . . . . . 9
6.2.1 Configuration Report . . . . . . . . . . . . . . 9
6.2.2 Configuration Modification . . . . . . . . . . . 9
6.2.3 Reconfiguration Capability . . . . . . . . . . 10
6.3 Choosing Run Time Options . . . . . . . . . . . 10
6.4 Modes of Diagnostic Operation . . . . . . . . . 10
6.5 Scope Looping . . . . . . . . . . . . . . . . . 10
6.6 General User Interface Philosophy . . . . . . . 10
6.6.1 User Interface . . . . . . . . . . . . . . . . 11
6.7 Terminal Input . . . . . . . . . . . . . . . . . 11
6.7.1 General . . . . . . . . . . . . . . . . . . . 11
6.7.2 Control-C Capability (Ctrl-C) . . . . . . . . 11
6.7.3 Control-O Capability (Ctrl-O) . . . . . . . . 11
6.7.4 Control-Q Capability (Ctrl-Q) . . . . . . . . 12
6.7.5 Control-S Capability (Ctrl-S) . . . . . . . . 12
6.7.6 Control-T Capability (Ctrl-T) . . . . . . . . 12
6.7.7 Control-U Capability (Ctrl-U) . . . . . . . . 12
6.7.8 Control-Z Capability (Ctrl-Z) . . . . . . . . 12
6.7.9 Question Mark (?) . . . . . . . . . . . . . . 12
6.7.10 Altmode (ESC) . . . . . . . . . . . . . . . . 13
6.8 Terminal Output . . . . . . . . . . . . . . . . 13
7.0 PROGRAM OPTIONS (SWITCHES) . . . . . . . . . . . . 14
7.1 Left Hand Switches . . . . . . . . . . . . . . . 14
7.1.1 Left Hand Switches (Brief Description) . . . . 15
7.1.2 Left Hand Switches (Detailed Description) . . 16
7.2 Right Hand Switches . . . . . . . . . . . . . . 19
7.2.1 Right Hand Switches (Brief Description) . . . 19
7.2.2 Right Hand Switches (Detailed Description) . . 20
MAINDEC-10-DFPTA-A-D Page iii
Table of Contents SEQ 0003
8.0 ERRORS . . . . . . . . . . . . . . . . . . . . . . 24
8.1 User Input Errors at the Terminal . . . . . . . 24
8.2 Error Reporting of Hardware Detected Errors . . 24
8.2.1 Reporting to SPEAR . . . . . . . . . . . . . . 24
8.2.2 Error Printouts . . . . . . . . . . . . . . . 25
8.3 Unexpected Errors . . . . . . . . . . . . . . . 26
9.0 PROGRAM DESCRIPTION . . . . . . . . . . . . . . . 27
9.1 Program Overview . . . . . . . . . . . . . . . . 27
9.1.1 Program Purpose . . . . . . . . . . . . . . . 27
9.1.2 Testing Strategy . . . . . . . . . . . . . . . 27
9.2 Run-Time Dynamics . . . . . . . . . . . . . . . 27
9.2.1 Memory Allocation Requirements . . . . . . . . 27
9.2.2 Operating System Interactions . . . . . . . . 28
9.2.2.1 TOPS-10 . . . . . . . . . . . . . . . . . . 28
9.2.2.2 TOPS-20 . . . . . . . . . . . . . . . . . . 28
9.2.3 User Mode Restrictions . . . . . . . . . . . . 28
9.2.3.1 User Mode Privileges . . . . . . . . . . . . 28
9.2.3.2 User Mode Priority Interrupts . . . . . . . 28
9.3 Exec Mode Capability . . . . . . . . . . . . . . 28
9.4 User Mode Capability . . . . . . . . . . . . . . 28
9.5 Fault Detection . . . . . . . . . . . . . . . . 29
9.5.1 Error Resolution . . . . . . . . . . . . . . . 29
9.5.2 Fault Detection And Isolation . . . . . . . . 29
9.5.3 Fault Detection . . . . . . . . . . . . . . . 29
9.6 Network Descriptions . . . . . . . . . . . . . . 29
9.6.1 EBUS Module networks . . . . . . . . . . . . . 29
9.6.1.1 E1 - EBUS Control Logic . . . . . . . . . . 30
9.6.1.2 E2 - CC EBUS RQST . . . . . . . . . . . . . 30
9.6.1.3 E3 - CC GRNT CSR . . . . . . . . . . . . . . 30
9.6.1.4 E4 - Interrupt Logic . . . . . . . . . . . . 30
9.6.1.5 E5 - Clock Logic . . . . . . . . . . . . . . 30
9.6.1.6 E6 - Clear Logic . . . . . . . . . . . . . . 30
9.6.1.7 E7 - Magic # Field Decode . . . . . . . . . 30
9.6.1.8 E8 - CC CSR CHNG . . . . . . . . . . . . . . 31
9.6.1.9 E9 - KMUX . . . . . . . . . . . . . . . . . 31
9.6.1.10 E10 - EMUX . . . . . . . . . . . . . . . . . 31
9.6.1.11 E11 - RMUX/CSR 25-31 . . . . . . . . . . . . 31
9.6.1.12 E12 - CSR 11-13/19-22/33-35 . . . . . . . . 31
9.6.1.13 E13 - CSR 04 Rqst Exam/Dep . . . . . . . . . 31
9.6.1.14 E14 - CSR 05 Rqst Interrupt/CC INTR ACTIVE . 31
9.6.1.15 E15 - CSR 06/07 CRAM PE/MBUS Error . . . . . 32
9.6.1.16 E16 - CSR 24 EBUS PE . . . . . . . . . . . . 32
9.6.1.17 E17 - CSR 32 MPROC Run . . . . . . . . . . . 32
9.6.1.18 E18 - KMUX Parity Generation . . . . . . . . 32
9.6.1.19 E19 - EBUS Parity Checking . . . . . . . . . 32
9.6.1.20 E20 - EBUF . . . . . . . . . . . . . . . . . 32
9.6.1.21 E21 - EBUS Data Xcvr's . . . . . . . . . . . 32
9.6.1.22 E22 - EBUS Control Xcvr's . . . . . . . . . 32
9.6.1.23 E23 - 2901's/Carry Logic . . . . . . . . . . 33
9.6.1.24 E24 - Constant MUX . . . . . . . . . . . . . 33
9.6.2 MPROC Module networks . . . . . . . . . . . . 33
9.6.2.1 M1 - MPROC Run Clocks . . . . . . . . . . . 33
9.6.2.2 M2 - Local Memory Control . . . . . . . . . 33
9.6.2.3 M3 - MBUS Error Detect Logic . . . . . . . . 33
9.6.2.4 M4 - CRAM Read/Write Control . . . . . . . . 33
MAINDEC-10-DFPTA-A-D Page iv
Table of Contents SEQ 0004
9.6.2.5 M5 - Jump ADDR MUX . . . . . . . . . . . . . 33
9.6.2.6 M6 - CC MUX . . . . . . . . . . . . . . . . 34
9.6.2.7 M7 - 2910 MicroSequencer . . . . . . . . . . 34
9.6.2.8 M8 - CRAM ADDR MUX . . . . . . . . . . . . . 34
9.6.2.9 M9 - LAR . . . . . . . . . . . . . . . . . . 34
9.6.2.10 M10 - CRAM 0000-7777 . . . . . . . . . . . . 34
9.6.2.11 M11 - Cond/Skip Decoder . . . . . . . . . . 34
9.6.2.12 M12 - CRAM Control Register . . . . . . . . 34
9.6.2.13 M13 - Local Storage RAM . . . . . . . . . . 34
9.6.2.14 M14 - Local Storage Addr Register . . . . . 35
9.6.2.15 M15 - RAM Mode MUX . . . . . . . . . . . . . 35
9.6.2.16 M16 - RAR . . . . . . . . . . . . . . . . . 35
9.6.2.17 M17 - Right CRAM Load Buffer . . . . . . . . 35
9.6.2.18 M18 - Left CRAM Load Buffer . . . . . . . . 35
9.6.2.19 M19 - MW Out MUX . . . . . . . . . . . . . . 35
9.6.3 CBUS Module networks . . . . . . . . . . . . . 35
9.6.3.1 C1 - CBUS Control Logic . . . . . . . . . . 35
9.6.3.2 C2 - Clock Logic . . . . . . . . . . . . . . 35
9.6.3.3 C3 - Reset Logic . . . . . . . . . . . . . . 36
9.6.3.4 C4 - Clear Logic . . . . . . . . . . . . . . 36
9.6.3.5 C5 - 'CC CBUS AVAIL' . . . . . . . . . . . . 36
9.6.3.6 C6 - 'CC CB LST WD'/ 'CC CHAN ERR' . . . . . 36
9.6.3.7 C7 - 'CLR CC CODE' . . . . . . . . . . . . . 36
9.6.3.8 C8 - Magic # Field Decode . . . . . . . . . 36
9.6.3.9 C9 - 'CC CBUS PAR ERR' . . . . . . . . . . . 36
9.6.3.10 C10 - 'CC PLI PAR ERR' . . . . . . . . . . . 36
9.6.3.11 C11 - Parity Predictor . . . . . . . . . . . 37
9.6.3.12 C12 - Formatter Control . . . . . . . . . . 37
9.6.3.13 C13 - PLI Control Logic . . . . . . . . . . 37
9.6.3.14 C14 - CBUS Input Buffer . . . . . . . . . . 37
9.6.3.15 C15 - CBUS Output Buffer . . . . . . . . . . 37
9.6.3.16 C16 - CBUS Out Par Gen . . . . . . . . . . . 37
9.6.3.17 C17 - CBUS In Par Checker . . . . . . . . . 37
9.6.3.18 C18 - DMUX . . . . . . . . . . . . . . . . . 37
9.6.3.19 C19 - SMUX . . . . . . . . . . . . . . . . . 37
9.6.3.20 C20 - Mvr/Fmtr . . . . . . . . . . . . . . . 38
9.6.3.21 C21 - PLI Logic . . . . . . . . . . . . . . 38
9.6.3.22 C22 - PMUX . . . . . . . . . . . . . . . . . 38
9.6.3.23 C23 - CMUX . . . . . . . . . . . . . . . . . 38
9.6.3.24 C24 - CBUF . . . . . . . . . . . . . . . . . 38
9.7 Performance During Hardware Failures . . . . . . 38
9.7.1 CPU/Memory Failures . . . . . . . . . . . . . 38
9.7.2 Power Fail/Restart . . . . . . . . . . . . . . 38
9.7.3 Port Failure . . . . . . . . . . . . . . . . . 38
9.7.4 Unexpected Traps . . . . . . . . . . . . . . . 39
9.8 Program Applications . . . . . . . . . . . . . . 39
9.8.1 Users and Uses . . . . . . . . . . . . . . . . 39
9.8.2 Engineering Usage . . . . . . . . . . . . . . 39
9.8.3 Manufacturing Usage . . . . . . . . . . . . . 39
9.8.4 Customer Services Usage . . . . . . . . . . . 39
9.8.5 Customer Usage . . . . . . . . . . . . . . . . 40
9.9 Test Design . . . . . . . . . . . . . . . . . . 40
9.9.1 Type of Tests . . . . . . . . . . . . . . . . 40
9.9.2 Test Flow . . . . . . . . . . . . . . . . . . 41
9.9.2.1 Starting the Test . . . . . . . . . . . . . 41
9.9.2.2 Stopping the Test . . . . . . . . . . . . . 42
MAINDEC-10-DFPTA-A-D Page v
Table of Contents SEQ 0005
9.9.2.3 Obtaining Run Time Status (Control-T) . . . 42
9.9.2.4 Obtaining Run Time Status (S or Control-S) . 42
10.0 TEST DESCRIPTIONS . . . . . . . . . . . . . . . . 43
10.1 Test Description Assumptions . . . . . . . . . . 43
10.2 Test Description Overview . . . . . . . . . . . 43
10.3 Program Option Selections . . . . . . . . . . . 44
10.3.1 Basic Description . . . . . . . . . . . . . . 44
10.3.2 Commands Available . . . . . . . . . . . . . . 44
10.3.3 Detailed Command Description . . . . . . . . . 45
10.3.3.1 Hardware Tests . . . . . . . . . . . . . . . 45
10.3.3.2 General Commands . . . . . . . . . . . . . . 47
10.3.3.3 Test Control Commands . . . . . . . . . . . 48
10.3.3.4 Switches . . . . . . . . . . . . . . . . . . 50
10.4 Hardware Tests . . . . . . . . . . . . . . . . . 52
10.4.1 Hardware Tests - EBUS Module . . . . . . . . . 52
10.4.1.1 EBUS Interface Tests . . . . . . . . . . . . 52
10.4.1.2 CSR Register Tests . . . . . . . . . . . . . 52
10.4.1.3 EBUF Tests (MBus Loopback) . . . . . . . . . 52
10.4.1.4 CSR Bit 18 'Clear Port' Tests . . . . . . . 52
10.4.1.5 'Diag Test Ebuf'/Initialized . . . . . . . . 52
10.4.1.6 Parity Generators/Checkers Tests . . . . . . 53
10.4.1.7 CSR Read Only Bits . . . . . . . . . . . . . 53
10.4.1.8 CSR 01 'DIAG RQST CSR' . . . . . . . . . . . 53
10.4.1.9 CSR 02 'DIAG CSR CHNG' . . . . . . . . . . . 53
10.4.1.10 Contant MUX . . . . . . . . . . . . . . . . 53
10.4.1.11 CSR 05 'Rqst Int' Bit . . . . . . . . . . . 53
10.4.1.12 CSR 06 'CRAM PE' Bit . . . . . . . . . . . . 53
10.4.1.13 CSR 07 'MBUS Err' Bit . . . . . . . . . . . 54
10.4.1.14 CSR Bits 11,12,13 . . . . . . . . . . . . . 54
10.4.1.15 MPROC Run Bit . . . . . . . . . . . . . . . 54
10.4.1.16 CSR 22 'Diag Single Cyc' . . . . . . . . . . 54
10.4.1.17 PIA Level Selection . . . . . . . . . . . . 54
10.4.1.18 IOP Function Words . . . . . . . . . . . . . 54
10.4.1.19 CSR Bits 25-31 . . . . . . . . . . . . . . . 54
10.4.1.20 2901 Isolation Tests . . . . . . . . . . . . 55
10.4.1.21 2901 Boolean Tests (Direct Input/0) . . . . 55
10.4.1.22 2901 Register File Tests . . . . . . . . . . 55
10.4.1.23 2901 ALU Function Tests . . . . . . . . . . 55
10.4.1.24 Register Interference Tests . . . . . . . . 55
10.4.1.25 Q-Register Shifter Tests . . . . . . . . . . 56
10.4.1.26 RAM Register Shifter Tests . . . . . . . . . 56
10.4.2 Hardware Tests - MPROC Module . . . . . . . . 56
10.4.2.1 CRAM Tests . . . . . . . . . . . . . . . . . 56
10.4.2.2 RAR/LAR Tests . . . . . . . . . . . . . . . 56
10.4.2.3 Cram Ctrl Register Tests . . . . . . . . . . 56
10.4.2.4 MBUS Error Tests . . . . . . . . . . . . . . 56
10.4.2.5 Condition Code Tests . . . . . . . . . . . . 57
10.4.2.6 Local Storage Tests . . . . . . . . . . . . 57
10.4.2.7 Miscellaneous MPROC Tests . . . . . . . . . 57
10.4.2.8 2910 Basic Instruction Tests . . . . . . . . 57
10.4.3 Hardware Tests - CBUS Module . . . . . . . . . 58
10.4.3.1 Basic CBUS Tests . . . . . . . . . . . . . . 58
10.4.3.2 CBUS Data Transfer Tests . . . . . . . . . . 58
10.4.3.3 Mover/Formatter Tests . . . . . . . . . . . 59
10.4.3.4 Miscellaneous CBUS Tests . . . . . . . . . . 59
MAINDEC-10-DFPTA-A-D Page vi
Table of Contents SEQ 0006
10.4.3.5 Parity Predictor Tests . . . . . . . . . . . 59
10.5 Debug Test . . . . . . . . . . . . . . . . . . . 61
10.5.1 Basic Description . . . . . . . . . . . . . . 61
10.5.2 Commands Available . . . . . . . . . . . . . . 61
10.5.3 Detailed Command Description . . . . . . . . . 64
10.5.3.1 General Commands . . . . . . . . . . . . . . 64
10.5.3.2 Device Selection Commands . . . . . . . . . 67
10.5.3.3 Starting, Stopping, Initializing the Port . 68
10.5.3.4 Handling Port Registers . . . . . . . . . . 70
10.5.3.5 Handling Port CRAM Locations . . . . . . . . 72
10.5.3.6 2901 Commands . . . . . . . . . . . . . . . 74
10.5.3.7 Local Storage Commands . . . . . . . . . . . 75
10.5.3.8 Special Scope Functions . . . . . . . . . . 76
10.5.3.9 Mark Bit Commands . . . . . . . . . . . . . 77
10.5.3.10 Breakpoint Commands . . . . . . . . . . . . 78
10.5.3.11 Microcode Commands . . . . . . . . . . . . . 79
10.5.3.12 Miscellaneous Commands . . . . . . . . . . . 81
10.5.3.13 Data Transfer Commands . . . . . . . . . . . 84
10.5.3.14 Switches . . . . . . . . . . . . . . . . . . 85
11.0 PROGRAM RUN TIME . . . . . . . . . . . . . . . . . 87
MAINDEC-10-DFPTA-A-D Page 1
PROGRAM ABSTRACT SEQ 0007
1.0 PROGRAM ABSTRACT
DFPTA is the basic device diagnostic for the CI20/NI20 controller
on the KL10. It is intended to detect and isolate hard or stuck at
faults in the device. It is used by Manufacturing to repair
CI20/NI20 modules. It is used by Field Service to verify the
operation of a port or to isolate a fault to a replaceable module.
DFPTA tests one or two CI20/NI20 controllers. Each controller
consists of three port modules residing in RH20 slot #5 or #7.
DFPTA isolates faults to a network of failing chips. Each
network is a set of chips, generally functionally related.
Typically, several networks are printed, with the first network
being the most probable.
DFPTA consists of two major program sections:
o Test section - Contains all of the hardware tests. This section
is used to debug a module or verify a port.
o Debug section - Allows detailed manipulation or inspection of
the port.
MAINDEC-10-DFPTA-A-D Page 2
REQUIREMENTS SEQ 0008
2.0 REQUIREMENTS
2.1 Hardware Requirements
Hardware requirements consist of:
o A KL10, Model B, with at least 96K of memory.
o An CI20/NI20 Port in RH slot 5 or RH slot 7 or both.
o A load device
2.1.1 KL10 Microcode Requirements
The CI20/NI20 requires special functionality of the KL10
microcode. Therefore, Version 312 or above must be loaded both in
user and exec mode.
2.1.2 Memory Requirements
The diagnostic requires 96K of memory of any type. Memory may be
configured in any manner, i.e., internal, external, interleaved in
any rational manner. The diagnostic's performance is not affected
by memory and cache options other than in overall diagnostic run
time.
2.1.3 Load Device
The diagnostic loads from any standard load device. Program
loading is a function of the standard diagnostic loaders and
monitors, i.e., DIAMON, D20MON, MAGMON, KLDCP, etc.
2.2 Software Requirements
Software requirements consist of:
o In exec mode the diagnostic may be loaded by KLDCP, DIAMON,
D20MON, or MAGMON. The Subroutine Package must be loaded prior
to running the diagnostic.
o In user mode, TOPS-20, Release 6.0 or above is required.
MAINDEC-10-DFPTA-A-D Page 3
REQUIREMENTS SEQ 0009
2.3 Diagnostic Prerequisites
The diagnostic should only be run after it has been verified that
the system has no solid hardware problems of a nature that would
render the diagnostic unable to run. This should be determined by
first running the following diagnostic programs:
o CPU and Memory Diagnostics
o E-Bus Diagnostics
o C-Bus Diagnostics
o MAINDEC-10-DFRHB - RH20 Fault Isolator Diagnostic.
MAINDEC-10-DFPTA-A-D Page 4
PROGRAM LOADING PROCEDURE SEQ 0010
3.0 PROGRAM LOADING PROCEDURE
The diagnostic must be loaded via a diagnostic loader program.
Refer to loader documentation for instructions on loading and
operating the loader program. The diagnostic may be run as a single
program or may be chained with other programs using the loader chain
feature.
Additionally, in exec mode under KLDCP, the diagnostic may be
loaded without using a diagnostic loader program by telling KLDCP to
load the diagnostic. This has the advantage of being simpler, but
has the disadvantage of inhibiting file handling operations which
then prevents use of the TAKE command, and loading of operational
microcode by the diagnostic.
MAINDEC-10-DFPTA-A-D Page 5
PROGRAM STARTING PROCEDURE SEQ 0011
4.0 PROGRAM STARTING PROCEDURE
4.1 Starting the Diagnostic
The diagnostic is started in the same manner as most other
diagnostics. The diagnostic loader program is run, then the name of
the diagnostic, DFPTA, is specified. The loader then loads and
starts the diagnostic.
If the diagnostic is already loaded, it may be restarted by a STD
or STM in exec mode, or a START or CONTINUE in user mode.
4.2 Initial Program Switches
In exec mode, right hand switches may be selected using the SW
command as documented in the KL10 Maintanance Guide under KLDCP.
Left hand switches may be selected on the PDP 11 switch panel. If
the switches are 0, the diagnostic runs 5 passes of all hardware
tests then exits. To allow the user to select which test(s) to run,
the left hand switch 'OPRSEL' should be set.
In user mode, switches will be queried when the diagnostic starts
up. At this point, OPRSEL switch can be set, and any other
switches.
In both exec and user mode, switch settings may be altered after
the diagnostic has been started.
4.3 Startup Procedure
When the diagnostic is started, the diagnostic name and version
number will be printed, followed by a memory map of the system. The
diagnostic then looks at RH slots 5 and 7, print what ports are
available, and asks the user what ports to test.
If OPRSEL switch is not set, the diagnostic will test every port
that exists and is selectable. If this switch is set, the
diagnostic will ask what ports to test.
For example (OPRSEL switch not set):
| D20MON CMD - DFPTA
|
| DFPTA Port Basic Diagnostic
| VERSION 0.1, SV=0.15, TOPS-20, KL10, CPU#=2263
|
| SWITCHES = 000000 000000
|
| MEMORY MAP =
| FROM TO SIZE/K
| 00000000 00263777 90
|
MAINDEC-10-DFPTA-A-D Page 6
PROGRAM STARTING PROCEDURE SEQ 0012
| Port Configuration:
| Port Exists Selectable Selected
| NI No Yes No
| CI Yes Yes Yes
|
| [CI port selected]
|
| End pass 1. at 3m 48s
|
| End pass 2. at 7m 32s
|
| End pass 3. at 11m 20s
|
| End pass 4. at 15m 8s
|
| End pass 5. at 18m 56s
|
| D20MON CMD -
For example (OPRSEL switch set):
| D20MON CMD - DFPTA
|
| DFPTA Port Basic Diagnostic
| VERSION 0.1, SV=0.15, TOPS-20, KL10, CPU#=2263
|
| SWITCHES = 000010 000000
|
| MEMORY MAP =
| FROM TO SIZE/K
| 00000000 00263777 90
|
| Port Configuration:
| Port Exists Selectable Selected
| NI No Yes No
| CI Yes Yes Yes
|
| Test NI port? (Y or N) - N
|
| Test CI port? (Y or N) - Y
|
| [CI port selected]
|
| Type ? for help
|
| What test -
The diagnostic asks what device to test, and then asks what test
to run. Any test may be selected, or ? or HELP typed to find out
what tests are available.
At the end of a test the diagnostic continues at the question
'What test -'. The next test is selected and run and so on.
MAINDEC-10-DFPTA-A-D Page 7
PROGRAM STARTING PROCEDURE SEQ 0013
4.3.1 Port Configuration
In the "Port Configuration" printout above, 'Port Exists' is
determined by a CONI. If the 'port present' bit is set, then 'Port
Exists' will be a 'Yes'. If the port is broken, this bit may not be
seen, thereby causing 'Port Exists' to be 'No'. If this happens,
the port should be selected for testing anyway.
If 'Port Selectable' is 'Yes', the port may be selected for
testing. Both NI and CI ports are always selectable in exec mode.
In user mode a port is selectable only if the diagnostic can take
control of the port via a DIAG JSYS.
'Port Selected' is initially 'Yes' if the port is selectable.
Printing out the configuration at a later time will show which ports
have actually been selected.
4.4 Optional Restart Address
Under TOPS-20 the diagnostic can be restarted via the 'REENTER'
command. The program switches are queried, then either testing is
begun immediately (if OPRSEL switch is not set) or 'What Test - ' is
asked (if OPRSEL switch is set).
Startup is identical to what occurs if the 'START' command is
given, except for the DIAMON asking 'DIAMON CMD - '.
MAINDEC-10-DFPTA-A-D Page 8
PROGRAM STOPPING PROCEDURE SEQ 0014
5.0 PROGRAM STOPPING PROCEDURE
Several methods may be used to stop the diagnostic:
o Altmode.
o Control-C.
o ABORT switch.
o RSTART switch.
A test can be aborted at any time by typing an altmode on the
terminal. When an altmode is typed, the diagnostic is restarted at
the test selection routine. At this point, if OPRSEL switch is set,
the diagnostic asks what test to run next. If OPRSEL switch is not
set the diagnostic runs all tests over again.
Control-C may be typed at any time to stop the diagnostic. To
restart, a 'START', 'CONTINUE', or 'REENTER' may be typed in user
mode. In exec mode a 'STD', 'ST', 'STM', or 'RN' may be used.
In exec mode, the ABORT switch may be set, so the diagnostic
halts at end of pass.
In exec mode, the RSTART switch may be set. This causes the
diagnostic to be restarted, and if OPRSEL switch is set, the
diagnostic will have effectively stopped and will be waiting for
selection of what test to run.
MAINDEC-10-DFPTA-A-D Page 9
PROGRAM OPERATING PROCEDURE SEQ 0015
6.0 PROGRAM OPERATING PROCEDURE
6.1 Overview
The diagnostic is designed to perform repair level testing of the
CI20/NI20 controller.
Essentially, the diagnostic consists of a series of tests which
test each of the modules. Some of these are in the form of KL10
based tests using CONO, CONI, DATAO, and DATAI's. The remainder are
microcode routines which are loaded into the port CRAM and executed.
6.2 Configuration
When the diagnostic starts up it assumes that a port may be
located in RH20 slot #5 or #7. It will select both the possible NI
port and the CI port for testing. If user mode, the diagnostic will
ask the system for each port. If it does not succeed, it will mark
that port as unselectable and will deselect it.
Then the diagnostic prints a port configuration report and asks
the user what ports to test. If the port to test has already been
selected via switches NIPORT and CIPORT, the diagnostic will not
ask.
6.2.1 Configuration Report
The port configuration looks like so:
| Port Configuration:
| Port Exists Selectable Selected
| NI No Yes No
| CI Yes Yes Yes
This report is printed at diagnostic startup. It can also be
obtained at any other time with the command 'CONPNT' (Print
Configuration), if the switch 'OPRSEL' is set.
6.2.2 Configuration Modification
If switch 'OPRSEL' is set the selected configuration can be
modified using the 'SELECT' command to reselect what port to test.
Only those ports which are selectable can be selected or deselected.
See Section 10.5.3.2 'Device Selection Commands' for more details
concerning this command.
MAINDEC-10-DFPTA-A-D Page 10
PROGRAM OPERATING PROCEDURE SEQ 0016
6.2.3 Reconfiguration Capability
If switch 'OPRSEL' is set, configuration can be redone using the
'CONFIG' command to determine the configuration anew, print out the
configuration and ask what port to test.
See Section 10.5.3.2 'Device Selection Commands' for more details
concerning this command.
6.3 Choosing Run Time Options
Before starting a test, the diagnostic may ask how many times to
execute test selected. If the OPRSEL switch is not set this
question is not asked. No other run time options are available,
aside from program switch options which are fully described in the
Section 7.0 'Program Options (Switches)'.
6.4 Modes of Diagnostic Operation
The diagnostic runs in either user mode or exec mode. The
operation of the diagnostic is almost identical in either case with
the exception of the handling of console switches, speed of
operation, and choice of tests to run. The diagnostic runs faster
in exec mode for obvious reasons. Also, the PI system is not used
in user mode - this means that certain interrupt logic tests do not
run in user mode.
In addition, the diagnostic runs with or without user
interaction. This is determined by the console switch 'OPRSEL'.
More details may be found in Section 7.0 'Program Options
(Switches)'.
6.5 Scope Looping
Scope looping is supported by the diagnostic. Several of the
program switches described in Section 7.0 'Program Options
(Switches)' may be used to cause looping on error and affect error
printout when looping.
6.6 General User Interface Philosophy
Decimal numbers are always followed by a point. All other
numbers are octal.
All input is preceded with a prompt. All input is checked for
legality and incorrect responses are followed by a reprompt and/or
an additional error message. All numerical input can be specified
as an octal number. Some numerical input may be alternatively given
MAINDEC-10-DFPTA-A-D Page 11
PROGRAM OPERATING PROCEDURE SEQ 0017
as a decimal number followed by a decimal point. Where the the
diagnostic allows multiple input options, a help message is
available to explain the options. The diagnostic requests three
types of input - numerical, yes or no, and sixbit.
Additionally, the user may obtain a short description of the
input expected at any point by typing a question mark followed by a
carriage return. The text is printed and the question re-asked.
6.6.1 User Interface
The user interface to the diagnostic is dialogue through the
terminal. In exec mode the console switches on the KL are used
directly in addition to software switches. In user mode the
software switches are used as standard procedure. All
user/diagnostic dialogue is done through the diagnostic subroutine
package.
6.7 Terminal Input
6.7.1 General
Terminal input is handled by the Subroutine Package. It does not
have COMND JSYS style input. However, some control characters are
supported. And the diagnostic supports ? and help commands where
appropriate to facilitate input.
6.7.2 Control-C Capability (Ctrl-C)
Control-C is used to halt diagnostic execution. In exec mode,
control is returned to KLDCP at the ">." prompt. In user mode, the
user is returned to monitor level.
When ready to continue, the user may restart or continue the
diagnostic in any manner listed previously in Section 5.0, 'Program
Stopping Procedure'. This would be by saying 'CONTINUE' in user
mode or 'RN' in exec mode.
6.7.3 Control-O Capability (Ctrl-O)
Control-O inhibits terminal output. Terminal output resumes when
the diagnostic prints some forced output or when the user types
another Control-O.
MAINDEC-10-DFPTA-A-D Page 12
PROGRAM OPERATING PROCEDURE SEQ 0018
6.7.4 Control-Q Capability (Ctrl-Q)
In exec mode Control-Q is treated as an illegal character by the
diagnostic and typing it in response to a question results in an
error message.
In user mode Control-Q allows terminal output which may have been
inhibited by a prior Control-S. This character may be typed at any
time with no other effect than resuming terminal output.
6.7.5 Control-S Capability (Ctrl-S)
In exec mode, Control-S is treated as an illegal character by the
diagnostic and typing it in response to a question results in an
error message. It may also be typed followed by a carriage return
in order to obtain run-time status of the diagnostic.
In user mode, it is used as a terminal output control character
along with Control-Q, and has no other function.
6.7.6 Control-T Capability (Ctrl-T)
Control-T is treated as an illegal character by the diagnostic
and typing it in response to a question results in an error message
in exec mode. Under TOPS-20, Control-T gives the current program
status and does not interfere with program input.
6.7.7 Control-U Capability (Ctrl-U)
Control-U is used to delete whatever has been typed so far in
response to a question. After typing Control-U, the desired input
can be entered.
6.7.8 Control-Z Capability (Ctrl-Z)
Control-Z is used to exit from DDT, to either KLDCP in exec mode
or to monitor level in user mode.
6.7.9 Question Mark (?)
Question mark may be typed in response to any question. The
diagnostic prints a short help message and reprompts the user. If
the diagnostic is asking for a test name or a debug command, it
prints a list of all valid commands that may be typed.
MAINDEC-10-DFPTA-A-D Page 13
PROGRAM OPERATING PROCEDURE SEQ 0019
If a question mark is typed after a legal command, the expected
format of the command is given, showing possible arguments.
6.7.10 Altmode (ESC)
Altmode is normally used to abort a test or a sequence of test.
If it is given in response to a question, the diagnostic aborts the
task which is under way. For example, in DEBUG test, if the user is
altering a CRAM location and types altmode in the middle of that,
the diagnostic aborts the operation and returns to 'DEBUG>' prompt
without writing the location.
6.8 Terminal Output
The terminal output generated by the diagnostic consists of:
o Program initialization information
o Program questions/messages
o Test error messages
Much of this output can be affected by program switches,
specifically, NOPNT, PNTLPT, TXTINH, and INHMSG.
MAINDEC-10-DFPTA-A-D Page 14
PROGRAM OPTIONS (SWITCHES) SEQ 0020
7.0 PROGRAM OPTIONS (SWITCHES)
Program options are controlled by switches. Left hand switches
are predefined but not all are used. Most of the right hand
switches are defined specific to the diagnostic.
7.1 Left Hand Switches
In exec mode, left hand switches are modified either via the
front end console switches or by using the KLDCP command ESW. See
KLDCP documentation for details on the use of the ESW command.
Typically, these switches are modified by using the console
switches.
In user mode, left hand switches are queried when the diagnostic
starts. After that, if the OPRSEL switch is set, switches may be
changed using the SWITCH command. The diagnostic will ask for the
switches in the same manner as occurred at start up. Also the name
of the switch can be typed as a command. This turns the switch on
or off depending on its state.
For example:
| What test - TXTINH
|
| [TXTINH On]
|
| What test - TXTINH
|
| [TXTINH On]
|
| What test - SWPRIN
|
| Switches: 000210 000000 TXTINH OPRSEL
|
| What test - TXTINH
|
| [TXTINH Off]
|
| What test - SWITCH
|
| Print the selectable pgm switches? (Y or N) - N
|
| Switches = 000010 000000
|
| 10 LH Switches <# or ?> - 210
|
| 0 RH Switches <# or ?> - 0
|
| SWITCHES = 020210 000000
|
| What test - SWPRIN
|
| Switches: 000210 000000 TXTINH OPRSEL
MAINDEC-10-DFPTA-A-D Page 15
PROGRAM OPTIONS (SWITCHES) SEQ 0021
7.1.1 Left Hand Switches (Brief Description)
Switch Symbol State Function Description
------ ------ ----- --------------------
0 (400000) ABORT 0 No function.
1 Abort at end of pass.
1 (200000) RSTART 0 No function.
1 Restart diagnostic.
2 (100000) TOTALS 0 No function.
1 No function.
3 (040000) NOPNT 0 Normal typeout.
1 Inhibit all printing except forced.
4 (020000) PNTLPT 0 Normal output to TTY.
1 Print on LPT (user, logical dev).
5 (010000) DING 0 No function.
1 Ring bell on error.
6 (004000) LOOPER 0 Normal operation.
1 Loop on error.
7 (002000) ERSTOP 0 Normal operation.
1 Halt on error.
8 (001000) PALERS 0 Print only first error in loop.
1 Print all errors.
9 (000400) RELIAB 0 No function.
1 Reliability mode switch.
10 (000200) TXTINH 0 Print full error messages.
1 Short error messages.
11 (000100) INHPAG 0 KL - allow 4096K addressing.
1 KL - inhibit paging.
12 (000040) MODDVC 0 No function.
1 Modify device codes.
13 (000020) INHCSH 0 Use cache.
1 Inhibit using cache on pgm start.
14 (000010) OPRSEL 0 Run default operations.
1 Operator test selections.
15 (000004) CHAIN 0/1 Used by "DIAMON", etc. to control
MAINDEC-10-DFPTA-A-D Page 16
PROGRAM OPTIONS (SWITCHES) SEQ 0022
chain operations.
16 (000002) Unused 0 KA10 60 Hertz power
1 KA10 50 Hertz power
17 (000001) Unused Reserved
7.1.2 Left Hand Switches (Detailed Description)
The following is a detailed description of each console data
switch function:
Switch 0 (ABORT)
When this switch is set, the diagnostic returns control to the
diagnostic loader at end of pass.
Switch 1 (RSTART)
When this switch is set while a test is being executed, the
diagnostic aborts testing after completion of the current test, and
restarts the diagnostic.
Switch 2 (TOTALS)
Setting this switch has no effect on diagnostic operation.
Switch 3 (NOPNT)
This switch inhibits all printout except forced. Forced printout
is used with questions requiring user response. This switch is
useful when it is desired to force a test to run without printing
error information. To suppress the remainder of a current error
report, type a Control-O on the terminal. This suppresses the
remaining error information for the current error and allows
printing to start again for the next error.
Switch 4 (PNTLPT)
When this switch is zero, all printouts from the diagnostic are
printed on the terminal. If set only forced printouts are printed
on the terminal. All data, including forced printouts, is printed
on the line printer.
Switch 5 (DING)
MAINDEC-10-DFPTA-A-D Page 17
PROGRAM OPTIONS (SWITCHES) SEQ 0023
This switch causes the terminal bell to be rung when an error
occurs.
Switch 6 (LOOPER)
This switch causes error looping within a test. Looping occurs
in the first failing test. The diagnostic continues to loop on the
test or a portion thereof even if it stops failing, until the LOOPER
switch is reset or an altmode is typed.
Switch 7 (ERSTOP)
This switch causes the diagnostic to terminate testing when an
error occurs. If the OPRSEL switch is set the diagnostic will
continue at the 'What Test -' prompt. If the OPRSEL switch is not
set the diagnostic will exit and return control to the diagnostic
loader.
Switch 8 (PALERS)
Normally an error message is printed only the first time an error
occurs if that error is being repeated continuously. To print all
occurrences of every error, set this switch.
Switch 9 (RELIAB)
If this switch is set, each test is run 4 times before control is
passed to the next test selected. If only one test has been
selected, the test would be run 4 times the repeat count given for
the test.
Switch 10 (TXTINH)
If this switch is not set, complete data is printed with each
error message. If this switch is set, less data is printed in a
shortened form.
Switch 11 (INHPAG)
This switch inhibits paging if set and allows it if not set.
Switch 12 (MODDVC)
If this switch is set, DIAMON asks for any device code
modifications. This is not used by the diagnostic itself.
Switch 13 (INHCSH)
MAINDEC-10-DFPTA-A-D Page 18
PROGRAM OPTIONS (SWITCHES) SEQ 0024
This switch, if set, inhibits the use of cache during the time
the diagnostic is run. This switch is inspected only in exec mode
and only at diagnostic start up. Changes of the switch setting do
not affect the cache after the diagnostic has started up.
Switch 14 (OPRSEL)
If set, this switch enables increased user interaction. The
diagnostic asks explicitly what test or function to do before doing
anything. Test selection is made in response to the question:
What Test? -
At least enough letters to recognize the test selection must be
typed although up to six letters are accepted. '?' may be typed to
get a list of the test names or commands. 'HELP' may be typed to
get a short description of each test or command.
If this switch is not set, the diagnostic runs all hardware
tests, prints fault isolation data (if the inhibit fault isolation
switch is not set), then exits.
Switch 15 (CHAIN)
This switch is used by DIAMON in chaining operations and is not
used by the diagnostic in normal operation.
Switch 16 (50CYC) - Unused
This switch is used on KA10's to select 50 hertz power. It is
not used by this diagnostic.
Switch 17 - Unused
This switch is reserved for use by the diagnostic monitor or
subroutine package and is not used by the diagnostic.
MAINDEC-10-DFPTA-A-D Page 19
PROGRAM OPTIONS (SWITCHES) SEQ 0025
7.2 Right Hand Switches
7.2.1 Right Hand Switches (Brief Description)
Switch Symbol State Function Description
------ ------ ----- --------------------
18 (400000) TRACE 0 Normal operation.
1 Trace operation of tests.
19 (200000) INHFLT 0 Normal operation.
1 Inhibit fault isolation.
20 (100000) INHMSG 0 Normal operation.
1 Inhibit error message printout.
21 (040000) LOOPGM 0 Normal operation.
1 Loop on program.
22 (020000) LOOPTS 0 Normal operation.
1 Loop on selected test.
23 (010000) RUNALL 0 Normal operation.
1 Run all segments of each test.
24 (004000) DSPEAR 0 Normal operation.
1 Disable SPEAR error reporting.
25 (002000) UDEBUG 0 Normal operation.
1 Diagnostic debug mode.
26 (001000) MDEBUG 0 Normal operation.
1 Error message debug mode.
27 (000400) SDEBUG 0 Normal operation.
1 Test execute debug mode.
28 (000200) LDEBUG 0 Normal operation.
1 Inhibit loading of test microcode.
29 (000100) IDEBUG 0 Normal operation.
1 Fault isolation debug mode.
30 (000040) NIPORT 0 Do not specifically select NI port
for testing.
1 Select NI port for testing.
31 (000020) CIPORT 0 Do not specifically select CI port
for testing.
1 Select CI port for testing.
32 (000010) Unused
33 (000004) Unused
MAINDEC-10-DFPTA-A-D Page 20
PROGRAM OPTIONS (SWITCHES) SEQ 0026
34 (000002) MMPROC 0 The MPROC module is inserted.
1 The MPROC module is not inserted.
35 (000001) MCBUS 0 The CBUS module is inserted.
1 The CBUS module is not inserted.
7.2.2 Right Hand Switches (Detailed Description)
Switch 18 (TRACE)
This switch is used if the user wants to follow test progress.
As each test is started, the diagnostic prints the name of the test
and the current PC. This is useful to gain assurance that the
diagnostic is running or to find out what test it died on, if the
diagnostic fades into oblivion.
The names of all tests selected are printed. If the test has
been disabled or if it is one the the tests that cannot be run in
user mode, the test name is printed followed by the phrase
'(Disabled)' or '(Inhibited)'.
Switch 19 (INHFLT)
If set, this switch inhibits fault isolation. All selected tests
are run even if the fault isolation algorithm indicates that the
test need not be run. Fault isolation data may still be obtained;
however, the result is probably not be as valid.
If not set, only those tests are run which the fault isolation
algorithm determines should be run.
Switch 20 (INHMSG)
This switch is used to run the diagnostic with all normal
printout except error messages. It can be used in place of 'NOPNT'
switch when looping on an error.
Switch 21 (LOOPGM)
If this switch is not set and OPRSEL switch is not set, the
diagnostic runs 5 passes of all tests. Then the diagnostic returns
to DIAMON or D20MON or KLDCP.
If this switch is set and OPRSEL switch is not set, the
diagnostic runs all tests continuously, pass after pass.
If OPRSEL switch is set, the diagnostic asks 'What Test - ' to
determine what test to run. When done with a test, the diagnostic
returns to this question. The LOOPGM switch is not used.
MAINDEC-10-DFPTA-A-D Page 21
PROGRAM OPTIONS (SWITCHES) SEQ 0027
Switch 22 (LOOPTS)
This switch allows a specified test to be looped on forever. It
is equivalent to specifying 'EB22 377777777777' to run test EBUS
test 22 a very large number of times. This switch may be overridden
by specifying an explicit repeat count.
This switch is effective only when selecting a single test. If a
class of tests is selected, the switch is ineffective.
If this switch is not set the default repeat count when selecting
a specific test is 1 repetition.
Switch 23 (RUNALL)
This switch forces every segment of a test to be run. Normally,
a test exits after the first error, unless looping on error. To
force the diagnostic to run every segment of the test regardless of
error, this switch may be set.
This switch has no effect if LOOPER switch is set and the
diagnostic is looping on an error.
Switch 24 (DSPEAR)
This switch enables or disables SPEAR error reporting. If the
switch is not set, the diagnostic will make two SPEAR entries - (1)
an entry when the diagnostic is started and (2) an entry either upon
first error or at end of pass if no errors have occurred.
If the switch is set, no SPEAR entries will be made. If the
diagnostic has already started, the second entry will not be made.
Switch 25 (UDEBUG)
This switch allows the diagnostic to be run in user mode without
a port for the purposes of diagnostic development or debug or for
the purpose of familiarization with the diagnostic without affecting
or requiring a port.
If this switch is set, the diagnostic runs every test as
demanded. All tests and most commands in the DEBUG test appear to
succeed.
Switch 26 (MDEBUG)
This switch forces every test to fail and prints out an error
message for each failure. This may be used to debug error messages,
or familiarize a person with typical error printouts of this
diagnostic. It can also be used when trying to diagnose a failing
MAINDEC-10-DFPTA-A-D Page 22
PROGRAM OPTIONS (SWITCHES) SEQ 0028
test which passes the first few test segments - this switch causes
error messages to be printed for passing portions of the test so
that it can be seen what the port is doing correctly, without
looking through the diagnostic listing.
Switch 27 (SDEBUG)
This switch is used for diagnostic debug purposes. If set, each
table entry of a table driven test is printed as the test is
executed.
Switch 28 (LDEBUG)
The first action of any test is normally to load the microcode
required by the test. Setting this switch inhibits the automatic
loading of microcode. This allows test microcode to be modified
using the DEBUG facility and the test to be rerun.
Switch 29 (IDEBUG)
This switch is used to debug the fault isolation algorithm. If
set, the possible faulty networks and probably good networks are
printed at various stages during testing.
If not set, testing occurs as usual, with the usual amount of
printout.
Switch 30 (NIPORT)
Switch 31 (CIPORT)
When the diagnostic determines the hardware configuration, it
finds out if what ports exist and whether or not each can be
selected for testing. In exec mode a port can be selected whether
or not it appears to exist. In user mode the diagnostic must be
able to successfully request the port from the system in order to
determine that the port is selectable.
If neither switch is set, the diagnostic will ask what ports to
test.
If at least one of the switches is set, the diagnostic will
select the port or ports specified whether or not it appears to
exist, unless the port cannot be selected (user mode only). The
diagnostic will not ask the use whether or not the port should be
tested.
Switch 32 - Unused
Switch 33 - Unused
MAINDEC-10-DFPTA-A-D Page 23
PROGRAM OPTIONS (SWITCHES) SEQ 0029
Switch 34 - MMPROC
This switch, when set, is used to indicate to the diagnostic that
the Microprocessor control module is not inserted. No tests which
require use of that module are run.
If this switch is not set, the diagnostic runs any test which
requires at least an EBUS and MPROC module, but not a CBUS module.
If neither this switch nor MCBUS switch is set, tests using any
module may be run.
Switch 35 - MCBUS
This switch, when set, is used to indicate to the diagnostic that
the CBUS module is not inserted. No tests which require use of that
module are run.
If this switch is not set, the diagnostic runs all tests,
depending only on the state of Switch 34.
MAINDEC-10-DFPTA-A-D Page 24
ERRORS SEQ 0030
8.0 ERRORS
This section describes the operation of the diagnostic upon
encountering various types of errors. There are basically three
types:
o User input errors
o Hardware errors
o Unexpected errors
8.1 User Input Errors at the Terminal
The diagnostic requests three types of input: numerical, yes or
no, and SIXBIT. The action taken upon input error is as follows:
When an error is detected on numerical input the diagnostic
prints an error message describing the type of error. Then it
either asks the question again, or returns to 'What test -' or
'DEBUG>'.
When an error is detected on a yes or no input, the user is
merely reprompted, until a Y or N is typed.
When an error is detected on SIXBIT input an error message is
printed and the user is asked the question again. The user can then
ask the diagnostic for further information by asking for help or
typing '?'.
8.2 Error Reporting of Hardware Detected Errors
Upon the occurrence of a hardware error a full error description
is printed, depending on the setting of switches 'NOPNT', 'PNTLPT',
'TXTINH', and 'INHMSG'.
If the diagnostic is looping on error only the first occurrence
of an error is printed. Subsequent errors at the same place are not
printed. If the 'DING' switch is set, the terminal bell is sounded
to indicate that an error was detected, even though nothing is
printed.
8.2.1 Reporting to SPEAR
The diagnostic makes 2 SPEAR entries. The first is an entry when
the diagnostic is started. This entry contains the date, time,
user, diagnostic name and version. A second entry is made when the
first error occurs. This entry contains the date, time, user,
diagnostic name and version, failing test name and test description.
MAINDEC-10-DFPTA-A-D Page 25
ERRORS SEQ 0031
If the diagnostic completes a successful pass with no errors, it
will make the second entry as above, but there will be no test name
or test description included.
If, thereafter, an error occurs and the diagnostic has already
made an entry indicating successful completion of a pass, the
diagnostic will make one more entry, giving the error information.
Whenever the diagnostic is restarted by an STM or reloaded and
restarted, it will make entries into the system error file. If the
2 entries have already been made, restarting via a STD or CONT will
not result in additional entries.
SPEAR entries can be disabled using the switch 'DSPEAR'.
8.2.2 Error Printouts
Errors are printed as they occur in a standard form. Where
appropriate, the CSR register or LAR register contents is printed.
A sample printout with TXTINH switch not set follows:
| +-+-+-+-+-+-+
| CI Error: TEST CB1-1 - Fmtr Data Loopback
| Test PC = 222' Scope PC = 237' Switches = 020010 000000
| Data loopback through Fmtr failed (result in EBUF)
| Start Addr: 0000 , # Steps: 6.
| End Addr - Correct: 5004
| Actual: 4002
| EBUF - Correct: 777777 777777
| Actual: 000000 230014
| -------------
This error printout gives the following data:
o Port indication - CI.
o Test name - CB1-1 (CBUS test #1 segment #1), name of test is
'Fmtr Data Loopback'.
o Test PC - 222' - address of the start of the test. Note that
this is a relative address as will be found in the test listing.
o Scope PC - 237' - address which can be found in the diagnostic
listing of the call to the scope loop routine. Note that this
is a relative address also.
o Switches - those in effect at the time of the error printout.
o 'Data loopback through Fmtr failed (result in EBUF)' -
description of error.
MAINDEC-10-DFPTA-A-D Page 26
ERRORS SEQ 0032
o Test related information such as
o Starting CRAM address - 0000
o Number of single steps done - 6.
o Error information such as
o Where the test should have stopped (CRAM address 5004) and
where it actually did (CRAM address 4002)
o EBUF data correct and actual
If TXTINH is set, the printout looks like:
| +-+-+-+-+-+-+
| CI Error: TEST CB1-1 Scope PC 237' SW 020210 003020
| Start 0000 , # Steps 6.
| End (C): 5004
| (A): 0000
| EBUF (C): 777777 777777
| (A): 000000 230014
| -------------
8.3 Unexpected Errors
The diagnostic is written to recover from any usual error
condition and continue testing. However, there are a few halts
coded into the diagnostic to catch a completely lost program because
of some unexpected malfunction:
ADDRESS REASON
1011 Fatal push list pointer error
1012 Initial push list pointer error
1013 MUUO with LUUO handler wiped out
1014 DTE20 interrupt without doorbell
1015 DTE20 clock interrupt without flag set
1016 CPU initialization error
1017 End of program error
1020 Interrupt with LUUO handler wiped out
The diagnostic is coded with several fatal instructions which cause
Fatal program error at address xxxxx
to be printed and the diagnostic to halt. These instructions are
placed where the diagnostic finds itself in a situation where it
does not know how to proceed. There are no anticipated program
deficiencies that allow a fatal error to be executed.
MAINDEC-10-DFPTA-A-D Page 27
PROGRAM DESCRIPTION SEQ 0033
9.0 PROGRAM DESCRIPTION
This section provides a functional overview of the diagnostic,
giving information concerning requirements and restrictions, fault
detection and isolation, error handling, terminal input and output
characteristics, and diagnostic applications.
9.1 Program Overview
9.1.1 Program Purpose
DFPTA is a basic device diagnostic intended to detect and isolate
hard or stuck at faults for the CI20/NI20 controller on the KL10.
It tests only CI20/NI20 controllers consisting of 3 port modules
located in RH20 slots #5 and #7.
9.1.2 Testing Strategy
The diagnostic attempts to run simpler tests first that exercise
a small amount of logic. Then more and more testing is done, until
the tests are exercising much of the logic of the port at once.
First, the EBUS interface is tested, then other portions of the EBUS
module. Then, the data path used in loading microcode is tested.
Then, microcode is loaded and the 2910 sequencer is tested. Then,
more of the EBUS module is tested including the 2901's. Then, more
of the MPROC module. Then, the CBUS internal data path, followed by
the channel interface, followed by the rest of the CBUS module.
If test tracing is being done, it will be noted that the tests
are not run in numerical sequence.
If fault isolation is disabled (the INHFLT switch is set), the
diagnostic runs each test in numerical sequence - EBUS tests, then
MPROC tests, then CBUS tests.
9.2 Run-Time Dynamics
9.2.1 Memory Allocation Requirements
The diagnostic loads and executes in less than 96K of memory.
This includes the memory used by the diagnostic monitor (DIAMON or
D20MON or MAGMON) and the subroutine package (SUBRTN or SUBUSR or
SUBKL).
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PROGRAM DESCRIPTION SEQ 0034
9.2.2 Operating System Interactions
9.2.2.1 TOPS-10
The diagnostic does not run under TOPS-10.
9.2.2.2 TOPS-20
The diagnostic interfaces with TOPS-20 via the DIAG JSYS. The
diagnostic requests the port using the DIAG JSYS. When done, the
diagnostic releases the device also using the DIAG JSYS.
The diagnostic can only be run if the port is not being used by
the operating system. The DIAG JSYS will succeed only if this is
so. Hence, the user must close the CI connection before running
this diagnostic. This is done by dismounting any structures
currently mounted on any HSC50's on the CI and terminating any other
open connections that may exist. This is accomplished via the OPR
program.
9.2.3 User Mode Restrictions
9.2.3.1 User Mode Privileges
Under TOPS-20 a user must have at least MAINTENANCE privileges in
order to run the diagnostic. WHEEL's and OPERATOR's also have
sufficient privileges to run the diagnostic in USER Mode.
9.2.3.2 User Mode Priority Interrupts
The diagnostic is not allowed to use the Priority Interrupt
System in user mode. In user mode, the diagnostic polls the CSR
Register for interrupt conditions.
9.3 Exec Mode Capability
The diagnostic runs in exec mode under KLDCP or, additionally,
under DIAMON or MAGMON. All tests are capable of being run in exec
mode.
9.4 User Mode Capability
The diagnostic runs in user mode under TOPS-20 (Release 6.0 or
newer). There are some restrictions imposed upon the diagnostic in
user mode that are listed in Section 9.2.3 'User Mode Restrictions'.
MAINDEC-10-DFPTA-A-D Page 29
PROGRAM DESCRIPTION SEQ 0035
9.5 Fault Detection
9.5.1 Error Resolution
The diagnostic isolates faults to a network of failing chips.
Each network is a set of chips, generally functionally related.
Typically, several networks are printed, with the first network
being the most probable.
9.5.2 Fault Detection And Isolation
The purpose of the diagnostic is to diagnose hard faults on the
CI20/NI20 Controller and to isolate those faults to a specific
failing field replaceable unit (FRU). The diagnostic testing is
performed by a bottom up testing technique. This is accomplished by
performing a basic operation and then using that verified logic to
verify the functionality of more logic.
The diagnostic should detect 99% of solid faults in the port
modules and isolate 95% of these to the FRU.
9.5.3 Fault Detection
Typically, the diagnostic detects a fault, then prints it out and
continues testing. When done the failing module is called out
followed by a list of failing networks.
Occasionally, particularly with EBUS interface failures, the
diagnostic may just hang, or the KL10 microcode may hang. This may
happen if the port cannot complete an EBUS operation such as an
examine or deposit properly. If this occurs, no error message or
module callout is printed. The solution is to restart the
diagnostic and run the tests over again with the test tracing
switch, 'TRACE', set. Then, the failing test can be observed. From
this point, the diagnostic listing for the test should be inspected
to see what is being done. If the port was executing microcode at
this time, the LAR can be read and microcode single stepped to
duplicate the failure.
9.6 Network Descriptions
9.6.1 EBUS Module networks
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PROGRAM DESCRIPTION SEQ 0036
9.6.1.1 E1 - EBUS Control Logic
This consists of most of the control logic on page EBI1 which
does DATAI, DATAO, CONI, CONO decoding, IOP decoding, and interrupt
handling.
9.6.1.2 E2 - CC EBUS RQST
This is located on page EBI1 and consists of the control logic
driving the condition code 'EBI1 CCEBUSRQST'.
9.6.1.3 E3 - CC GRNT CSR
This is located on page EBI1 and consists of the control logic
driving the condition code 'EBI1 CCGRNTCSR' and several related
signals 'EBI1 MPRQSTCSRLTCH' and 'EBI1 PORTGRNTCSR'.
9.6.1.4 E4 - Interrupt Logic
This is located on page EBI2, labelled 'Interrupt Generation
Logic'. Also included is two related pieces of logic on the same
page which drive the signals 'EBI2 LOADEBUS' and 'EBI2 XFER'.
9.6.1.5 E5 - Clock Logic
This consists of the inverters on page EBI2 from which come
clocks 1 and 3.
9.6.1.6 E6 - Clear Logic
This is located on page EBI2, and consists of the logic driving
the signals 'EBI2 CLREBUF', 'EBI2 CLEARA' and 'EBI2 CLEARB'. Also
included is a bit of logic on page EBI4 which determines 'EBI4
CSR18'.
9.6.1.7 E7 - Magic # Field Decode
This is located on page EBI2.
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PROGRAM DESCRIPTION SEQ 0037
9.6.1.8 E8 - CC CSR CHNG
This is located on page EBI2, and consists of the logic which
drives the condition code 'EBI2 CCCSRCHNG'.
9.6.1.9 E9 - KMUX
This is located on page EBI3, labelled 'KMUX'. Also included is
the enable logic on page EBI2, 'EBI2 ENAKMUX', 'EBI2 EBPAROUT', and
'EBI2 EBPARACT'.
9.6.1.10 E10 - EMUX
This is located on page EBI3, labelled 'EMUX'. Also included is
the enable on page EBI2, 'EBI2 ENAEMUX'.
9.6.1.11 E11 - RMUX/CSR 25-31
This is located on page EBI4, and consists of the control logic
driving CSR bits 25-31 and the RMUX (labelled appropriately). There
is also a gate on page EBI2 which is included, which is 'EBI2
RMUXLOADCSR'.
9.6.1.12 E12 - CSR 11-13/19-22/33-35
This is located on page EBI4, and consists of the control logic
driving CSR bits 11-13, 19-23 and 33-35.
9.6.1.13 E13 - CSR 04 Rqst Exam/Dep
This is located on page EBI4, and consists of the control logic
driving the signal 'EBI4 CSR04'.
9.6.1.14 E14 - CSR 05 Rqst Interrupt/CC INTR ACTIVE
This is located on page EBI4, and consists of the control logic
driving the signals 'EBI4 CSR05', 'EBI4 MPROCERR', 'EBI4 CLRRUN',
and 'EBI4 CCINTRACTIVE'.
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PROGRAM DESCRIPTION SEQ 0038
9.6.1.15 E15 - CSR 06/07 CRAM PE/MBUS Error
This is located on page EBI4, and consists of the control logic
driving the signals 'EBI4 CSR06' and 'EBI4 CSR07'.
9.6.1.16 E16 - CSR 24 EBUS PE
This is located on page EBI4, and consists of the control logic
driving the signals 'EBI4 CSR24' and 'EBI4 CCEBPARERR'.
9.6.1.17 E17 - CSR 32 MPROC Run
This is located on page EBI4, and consists of the control logic
driving the signal 'EBI4 CSR32'.
9.6.1.18 E18 - KMUX Parity Generation
This is located on page EBI5, and consists of 5 parity
generators, the output of which is 'EBI5 KMUXPAR H'.
9.6.1.19 E19 - EBUS Parity Checking
This is located on page EBI5, and consists of 5 parity
generators, the output of which is 'EBI5 EBPARERR H'.
9.6.1.20 E20 - EBUF
This is located on page EBI5, labelled 'EBUF'.
9.6.1.21 E21 - EBUS Data Xcvr's
This is located on the top half of page EBI6, and consists all of
the EBUS transceivers carrying data signals.
9.6.1.22 E22 - EBUS Control Xcvr's
This is located on the bottom half of page EBI6, and consists all
of the EBUS transceivers carrying control signals.
MAINDEC-10-DFPTA-A-D Page 33
PROGRAM DESCRIPTION SEQ 0039
9.6.1.23 E23 - 2901's/Carry Logic
This occupies all of pages EBI7 and EBI8.
9.6.1.24 E24 - Constant MUX
This is located on page EBI9, labelled 'CNST MUX'.
9.6.2 MPROC Module networks
9.6.2.1 M1 - MPROC Run Clocks
This is located on page MPR1, labelled 'uPROC Run Clocks'. Also
included are the 'MPR1 CLK1A, CLK2A, CLK3A, CLK4A' also on page
MPR1. Also, 'MPR1 CSR32' and 'MPR1 Error' are grouped in this
category.
9.6.2.2 M2 - Local Memory Control
This is located on page MPR1, labelled 'Local Memory Control'.
9.6.2.3 M3 - MBUS Error Detect Logic
This is located on page MPR2, labelled 'MBUS Error Detect Logic'.
Also included are two inverters on page MPR1 'MPR1 EnaEMUX' and
'MPR1 EnaCMUX'.
9.6.2.4 M4 - CRAM Read/Write Control
This is located on page MPR2, labelled 'CRAM Read/Write Control'.
Also included is some inverters on MPR1 which fan out some of the
cram control signals.
9.6.2.5 M5 - Jump ADDR MUX
This is located on page MPR3, labelled 'Jmp MUX'.
MAINDEC-10-DFPTA-A-D Page 34
PROGRAM DESCRIPTION SEQ 0040
9.6.2.6 M6 - CC MUX
This is located on page MPR3, labelled 'CC MUX'.
9.6.2.7 M7 - 2910 MicroSequencer
This is located on page MPR3, labelled 'MICROSEQR'.
9.6.2.8 M8 - CRAM ADDR MUX
This is located on page MPR3, labelled 'Addr MUX'.
9.6.2.9 M9 - LAR
This is located on page MPR3, labelled 'LAR'. Loading the LAR
requires the signal 'MPR1 LOADLAR' which is located on page MPR1.
The logic involved with this is included in this category.
9.6.2.10 M10 - CRAM 0000-7777
This consists of all of the 4k x 4 rams on pages MPR4 and MPR5.
9.6.2.11 M11 - Cond/Skip Decoder
This is located on page MPR6, labelled 'Cond/Skip Decoder'.
9.6.2.12 M12 - CRAM Control Register
This occupies all of page MPR7, labelled 'CRAM Ctrl Reg'. Also
included here are the parity checkers for this register, located on
page MPR6, labelled 'CRAM Par Chkr'.
9.6.2.13 M13 - Local Storage RAM
This is located on page MPR8, labelled 'Local Store'.
MAINDEC-10-DFPTA-A-D Page 35
PROGRAM DESCRIPTION SEQ 0041
9.6.2.14 M14 - Local Storage Addr Register
This is located on page MPR8, labelled 'Loc Stor Addr Reg'. In
addition, the signal 'MPR1 CLKSADREG' is included, on page MPR1.
9.6.2.15 M15 - RAM Mode MUX
This is located on page MPR8, labelled 'RAM Mode MUX'.
9.6.2.16 M16 - RAR
This is located on page MPR9, labelled 'RAR'.
9.6.2.17 M17 - Right CRAM Load Buffer
This is located on page MPR9, labelled 'Right CRAM Load Buff'.
9.6.2.18 M18 - Left CRAM Load Buffer
This is located on page MPR9, labelled 'Left CRAM Load Buff'.
9.6.2.19 M19 - MW Out MUX
This is located on page MPRA, labelled 'MW Out MUX'.
9.6.3 CBUS Module networks
9.6.3.1 C1 - CBUS Control Logic
This consists of the logic which controls the operation of the
channel, including the logic which cycles through the select,
request, wait, and data states and the logic which handles the
'MPSTORECBUS' and 'MPWRITEMEM' signals. This is found on pages
CBI1, CBI2, and CBI5.
9.6.3.2 C2 - Clock Logic
This is located on page CBI1, labelled 'Clock Generation Logic'.
MAINDEC-10-DFPTA-A-D Page 36
PROGRAM DESCRIPTION SEQ 0042
9.6.3.3 C3 - Reset Logic
This is found on page CBI1, a group of inverters with the output
signal 'CBI1 Reset L'.
9.6.3.4 C4 - Clear Logic
This is found on page CBI2, two inverters and two nand gates with
the input signal 'MPR1 ClearA L'.
9.6.3.5 C5 - 'CC CBUS AVAIL'
This consists of the logic which implements this condition code
and it is located on page CBI2.
9.6.3.6 C6 - 'CC CB LST WD'/ 'CC CHAN ERR'
This consists of the logic which implements these condition codes
and it is located on page CBI2.
9.6.3.7 C7 - 'CLR CC CODE'
This is found on page CBI2, having the output signal 'CBI2
ClrCCCode L'.
9.6.3.8 C8 - Magic # Field Decode
The magic number field is decoded on page CBI3. This logic
occupies most of this page. A few inverters are also shown on page
CBI4 - 'CBI4 EnaCMUXA' and 'CBI4 PlinToCMUXA'.
9.6.3.9 C9 - 'CC CBUS PAR ERR'
This consists of the logic which implements this condition code
and it is located on page CBI3.
9.6.3.10 C10 - 'CC PLI PAR ERR'
This consists of the logic which implements this condition code
and it is located on page CBI3.
MAINDEC-10-DFPTA-A-D Page 37
PROGRAM DESCRIPTION SEQ 0043
9.6.3.11 C11 - Parity Predictor
This is located on page CBI4, labelled 'Parity Predictor'.
9.6.3.12 C12 - Formatter Control
This is located on page CBI4, labelled 'Formatter Control'.
9.6.3.13 C13 - PLI Control Logic
This is located on page CBI4, labelled 'PLI Ctrl Logic'.
9.6.3.14 C14 - CBUS Input Buffer
This is located on page CBI5, labelled 'CBUS Input Buffer'.
9.6.3.15 C15 - CBUS Output Buffer
This is located on page CBI5, labelled 'CBUS Output Buffer'.
9.6.3.16 C16 - CBUS Out Par Gen
This is located on page CBI6, labelled 'CBUS Out Par Gen'.
9.6.3.17 C17 - CBUS In Par Checker
This is located on page CBI6, labelled 'CBUS In Par Checker'.
9.6.3.18 C18 - DMUX
This is located on page CBI7, labelled 'DMUX'.
9.6.3.19 C19 - SMUX
This is located on page CBI7, labelled 'SMUX'.
MAINDEC-10-DFPTA-A-D Page 38
PROGRAM DESCRIPTION SEQ 0044
9.6.3.20 C20 - Mvr/Fmtr
This is located on page CBI8, labelled 'Mvr/Fmtr'.
9.6.3.21 C21 - PLI Logic
This occupies most of page CBI9, labelled 'PLI Par Input
Checker', 'PLI Par Output Generator', and 'PLI Output Buffer'.
9.6.3.22 C22 - PMUX
This is located on page CBI9, labelled 'PMUX'.
9.6.3.23 C23 - CMUX
This is located on page CBIA, labelled 'CMUX'.
9.6.3.24 C24 - CBUF
This is located on page CBIA, labelled 'CBUF'.
9.7 Performance During Hardware Failures
9.7.1 CPU/Memory Failures
Most CPU and memory faults are fatal errors to the diagnostic and
it does not continue after one.
9.7.2 Power Fail/Restart
If a power fail occurs, the diagnostic must be reloaded and rerun
when the system is back in operation.
9.7.3 Port Failure
Hardware failure in the port is anticipated and results in an
error message.
MAINDEC-10-DFPTA-A-D Page 39
PROGRAM DESCRIPTION SEQ 0045
9.7.4 Unexpected Traps
The diagnostic can fail due to an unexpected malfunction.
Sometimes an error code is printed, if the subroutine package
intercepts the error. Other cases may result in a hung diagnostic
or CPU or occasionally a fatal error message. See the Section 8.3
'Unexpected Errors' for more details.
9.8 Program Applications
The diagnostic can be used for coarse determination of a fault -
does the port work and if not what module is broken.
It can also be used for detailed examination of a port.
9.8.1 Users and Uses
The diagnostic is generally used only by Manufacturing to assist
module construction and debug, and by Customer Services when
determining the FRU of a failing port.
9.8.2 Engineering Usage
Engineering used this diagnostic for breadboard debug, design
verification, and for prototype debug and maintenance. Engineering
may use the diagnostic if any ECO's are made in the future.
9.8.3 Manufacturing Usage
This diagnostic is used by Manufacturing as part of the
acceptance procedure for an CI20/NI20. It is also used to repair
faulty port modules (EBus Interface, Micro-Processor Control, and
CBus Interface modules).
9.8.4 Customer Services Usage
Customer Services uses the diagnostic as part of acceptance
procedure, when an CI20/NI20 is sent to a customer in a drop ship
environment. Customer Services also uses this during CM and PM.
MAINDEC-10-DFPTA-A-D Page 40
PROGRAM DESCRIPTION SEQ 0046
9.8.5 Customer Usage
With the exception of OEM customers, it is not likely that any
customers will use the diagnostic. If they have a problem with the
port they notify Customer Services who can then run the diagnostic.
OEM customers, running the diagnostic themselves, would interface to
their account sales representative if any difficulties arose or
problems discovered.
9.9 Test Design
The basic design of most tests is as follows:
o Do something to the port.
o Inspect the results.
o If error, print an error message.
o If error and error looping enabled, loop on error.
This fits into the diagnostic as described by the following steps
done by the diagnostic:
o Do program initialization
o Select test category
o Run these tests
o Select a test
o Run it
o Select next test, exit if no more
o Select next test category to test if OPRSEL switch is set,
otherwise exit the diagnostic.
9.9.1 Type of Tests
There are three types of tests:
o Hardware Test
MAINDEC-10-DFPTA-A-D Page 41
PROGRAM DESCRIPTION SEQ 0047
o Program Option Selection
o Debugger Test
Whenever the tests are run without manual control of which test
is selected, only hardware tests are run. This is the major
function of the diagnostic and these tests comprise 95% of the
diagnostic.
Program option selection tests can be selected when manual
control of what test to run has been selected. These are not tests
in that they do not do anything to the hardware. But since they are
selected from a list of hardware tests, they are called tests.
These consist of switch selections or changes, help, and exit
commands.
The debugger test is a special test that allows one to to CONI,
CONO, DATAI, and DATAO's to the port and in effect write one's own
test. The purpose of this test is for hardware debug of the port,
where one is interested in doing things and inspecting the results
in a less formal fashion than just running tests. This is only one
test but it allows many different things to be done to the port. It
is intended to be used primarily in breadboard debug, but may be
used later by Customer Services or Manufacturing.
9.9.2 Test Flow
If only one port is being tested, all of the tests specified are
run on the port. Then fault isolation data is printed if any errors
occurred.
If both NI and CI ports are being tested simultaneously, the
diagnostic runs all of the tests on the NI first, printing fault
isolation data afterwards. Then all of the tests are run on the CI
following by printing fault isolation data.
The following sections describe starting and stopping tests.
9.9.2.1 Starting the Test
After the program switches have either been given via console
switches or by typing them in on the terminal, the diagnostic starts
the tests as selected by the switches or by user input.
If test tracing is enabled, the diagnostic prints the test pc and
test name at the beginning of each test, and a phrase such as
'(disabled)' or '(inhibited)' if the test actually is not going to
be run.
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PROGRAM DESCRIPTION SEQ 0048
A test is disabled if such has been specified with the DISABLE
test command. A test is inhibited only in user mode where the test
cannot be run because it uses the PI system or causes page faults.
There are about 15 of these tests.
9.9.2.2 Stopping the Test
A test sequence may stop either by terminating normally, by
halting on error (if the ERSTOP switch is set), by the user setting
the ABORT or RSTART switches, or by typing an Altmode or C. In user
mode, ABORT and RSTART are ignored if set.
The diagnostic continues at one of several places depending on
switch settings and whether or not the diagnostic is being run in
exec or user mode and what loader has been used to load the
diagnostic:
o D20MON CMD -
o DIAMON CMD -
o MAGMON CMD -
o What Test -
o @ (TOPS-20 prompt)
o o >. (KLDCP prompt)
9.9.2.3 Obtaining Run Time Status (Control-T)
In user mode the current program status is given when T is typed.
This is not available in exec mode.
9.9.2.4 Obtaining Run Time Status (S or Control-S)
In exec mode, while running tests, the current test name and time
is printed when an S <CR>, s <CR> or Control-S is typed.
In user mode, typing an S or s produces the printout.
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TEST DESCRIPTIONS SEQ 0049
10.0 TEST DESCRIPTIONS
10.1 Test Description Assumptions
All test descriptions assume that no program switches are set.
The action of a test if a particular switch is set may be determined
by reviewing the function of the switch, given in prior sections.
10.2 Test Description Overview
The description for 'program option selection' test consists of
what each item does and a description of its use.
The description given for a 'hardware' test consists of a single
line test description. The diagnostic listing provides a detailed
description at the beginning of each test. Specific implementation
details can be obtained from the listing or from the microcode of
the test.
The description for the 'debug' test gives a list of commands and
what each does.
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TEST DESCRIPTIONS SEQ 0050
10.3 Program Option Selections
10.3.1 Basic Description
This is a set of commands that can be given to facilitate running
tests or debugging the port.
10.3.2 Commands Available
The commands available in regular mode are as follows, which are
typed in response to the prompt 'What test - ':
NAME DESCRIPTION
---- -----------
Hardware tests:
--------------
ALL n All tests (n times)
EBUS n EBus module tests
SEQ n SEQ related tests
ALU n 2901 related tests
MPROC n MPROC module tests
CBUS n CBus module tests
MBUS n MBUS related tests
XXm n Test m, category XX (where XX can be EB,SE,AL,MP,CB)
General Commands:
----------------
HELP Print this message
EXIT Return to normal test dispatching
DDT Enter DDT (Type RTN$X to return)
TAKE Take cmds from file
NTAKE Take cmds from file (not echoed)
DEBUG Enter port debugger
DIAMON Enter DIAMON
Test Control Commands:
---------------------
ENABLE n Enable execution of test n
DISABL n Disable execution of test n
DISLIS List disabled tests
LIST n List all tests (or just test n)
LISTEB n List EBus module tests (or test n)
LISTSE n List Sequencer related tests
LISTAL n List 2901's related tests
LISTMP n List MPROC module tests
LISTCB n List CBus module tests
Device Selection Commands:
-------------------------
MAINDEC-10-DFPTA-A-D Page 45
TEST DESCRIPTIONS SEQ 0051
CONFIG Determine/print configuration
CONPNT Print configuration
SELECT Select device to test
Switches:
--------
SWITCH Enter switch information
SWPRIN Print current switch settings
NOPNT Complement 'no print' switch
PNTLPT Complement 'print lpt' switch
DING Complement 'bell on error' switch
LOOPER Complement 'loop on error' switch
ERSTOP Complement 'halt on error' switch
PALERS Complement 'print all errors' switch
RELIAB Complement 'reliability mode' switch
TXTINH Complement 'text inhibit' switch
OPRSEL Complement 'operator select' switch
TRACE Complement 'trace test' switch
INHFLT Complement 'inhibit fault isolation' switch
INHMSG Complement 'inhibit error message' switch
LOOPGM Complement 'loop on pgm' switch
LOOPTS Complement 'loop on test' switch
RUNALL Complement 'run all test segments' switch
DSPEAR Complement 'disable SPEAR reporting' switch
UDEBUG Complement 'user mode debug' switch
MDEBUG Complement 'error message debug' switch
SDEBUG Complement 'test debug' switch
LDEBUG Complement 'load microcode debug' switch
IDEBUG Complement 'fault isolation debug' switch
NIPORT Complement 'Select NI port' switch
CIPORT Complement 'Select CI port' switch
MPROC Complement 'missing MPROC module' switch
MCBUS Complement 'missing CBUS module' switch
10.3.3 Detailed Command Description
In more detail these commands are as follows:
10.3.3.1 Hardware Tests
ALL n
This command will run all hardware tests the number of times
specified by the repeat count. If no repeat count is specified, the
diagnostic asks how many passes to run.
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TEST DESCRIPTIONS SEQ 0052
If fault isolation is not inhibited, fault isolation data will be
printed upon completion of the tests. If testing is aborted by
typing an altmode, the fault isolation data is printed at that
point.
EBUS n
This command will run all EBUS module tests in the same manner as
ALL above. This includes the 2901 ALU testing.
SEQ n
This command will run all 2910 micro-sequencer tests in the same
manner as ALL above.
ALU n
This command will run all 2901 ALU tests in the same manner as
ALL above.
MPROC n
This command will run all MPROC module tests in the same manner
as ALL above.
CBUS n
This command will run all CBUS module tests in the same manner as
ALL above.
MBUS n
This command will run all MBUS cable related tests in the same
manner as ALL above. The diagnostic also prints a short description
of how to debug an MBUS problem. This description follows:
| To isolate a possible MBUS problem:
|
| (1) Disconnect MBUS cable from EBUS module.
| Run MBUS tests with MMPROC and MCBUS switches set.
| Failed - EBUS module is at fault. Stop.
| Passed - MBUS cable or MPROC or CBUS modules at fault.
| Continue at next step to isolate further.
|
| (2) Connect MBUS cable to EBUS module only.
| Run MBUS tests with MMPROC and MCBUS switches set.
| Failed - MBUS cable is at fault. Stop.
| Passed - MBUS cable or MPROC or CBUS modules at fault.
| Continue at next step to isolate further.
|
| (3) Connect MBUS cable to EBUS and MPROC modules only.
| Run MBUS tests with MCBUS switch set.
| Failed - MPROC module is at fault. Stop.
| Passed - CBUS module at fault. Stop.
MAINDEC-10-DFPTA-A-D Page 47
TEST DESCRIPTIONS SEQ 0053
XXm n
This command is given to run a single test. The test name is
given as a 1 or 2 letter test category followed by the test number.
The test categories and sample test names are as follows:
o Ebus module test ..... EB10 or E10
o 2910 Sequencer test .. SE10 or S10
o 2901 ALU test ........ AL10 or A10
o MPROC module test .... MP10 or M10
o CBUS module test ..... CB10 or C10
A repeat count may be given. If not given, the test is executed
only once.
10.3.3.2 General Commands
HELP
This command prints a one line description for each command.
EXIT
This command returns control to the diagnostic loader or to KLDCP
if no loader program was used to load the diagnostic in exec mode.
DDT
This command invokes DDT. When RTN$X (POPJ 17,0) is executed,
the diagnostic resets the PI system in exec mode and returns to
'What Test - ' question. DDT can also be entered by typing
Control-D and when done typing RTN$X. When invoked in this fashion,
the diagnostic does not reset the PI system.
TAKE file ext
This command takes commands from a file. The file may be
specified as an argument to the command. If no file name is
specified, the default file name is used. The default file name is
either 'DFPTA.CMD' or the last file specified.
Any legal command may be specified except another TAKE or
commands which cause exit from the diagnostic such as DDT or DIAMON
or EXIT. DIAMON or EXIT may be included but processing of the take
file will terminate with the command. The diagnostic prints each
command and result on the terminal as it executes each command.
MAINDEC-10-DFPTA-A-D Page 48
TEST DESCRIPTIONS SEQ 0054
The file specified must be on the load device known to MAGMON or
D20MON or DIAMON. If not, an error message is printed and the take
command is aborted.
If any error occurs while processing the take file, the take
command is aborted. Errors include any unexpected errors such as
unrecognized command, failures to start the port, argument errors,
etc.
NTAKE file ext
This command is identical to the TAKE command with the single
exception that the commands executed are not echoed on the terminal.
All output resulting from execution of the commands is echoed.
DEBUG
Enter port debugger. This test allows specific operations to be
done with the port without the restrictions of executing a
particular test.
DIAMON
Enter DIAMON. This is the same as the EXIT command if a
diagnostic loader is present. If MAGMON is loaded instead of
DIAMON, control returns to MAGMON.
10.3.3.3 Test Control Commands
ENABLE n,n,n,... and DISABL n,n,n,...
The running of a particular test can be explicitly prevented with
the DISABL command. The ENABLE command allows the execution of the
specified tests to be enabled again. Disabling a test will
guarantee that the test will not be run. Enabling a test will allow
a test to be run, but whether or not it is run, depends on the
determination made by the fault isolation algorithm and the
availability of the required port modules.
Test names are given as 'Test Class' 'Test Number', where test
class is:
o SE or S - 2910 sequencer tests
o MP or M - Mproc module tests
o AL or A - 2901 ALU tests
o CB or C - CBus module tests
o EB or E - EBus module tests
MAINDEC-10-DFPTA-A-D Page 49
TEST DESCRIPTIONS SEQ 0055
Sample test names are SE1, SE27, EB1, E1, AL20, ...
Example:
| What test - ENABLE EB3,EB4
| What test - DISABL EB3,EB4,S2,SE70,AL10,A11
DISLIS
This command lists what tests have been disabled. Example:
| What test - DISLIS
|
| EB1 EB3 EB4 SE1 SE2 MP1 MP2
LIST n
List all tests (or just test n). This command prints the test
description which is also printed in each error message. If no
argument is given, all test descriptions are printed (this can be
aborted by typing an altmode). If a test name such as MP2 is typed,
only the description for that test will be printed. Example:
| What test - LIST EB2
|
| EB2 - RH20/Port Interaction
|
| What test - LIST
|
| EB1 - CONI Works?
| EB2 - RH20/Port Interaction
| EB3 - RH20/Port Interaction
| ...
LISTxx n,n
Test descriptions can be selected for printing within a class. A
command of the form 'LIST' followed by the 'test class' code
specifies tests within the test class. The commands are as follows:
o LISTEB n,n - List EBus module tests (or test n)
o LISTSE n,n - List Sequencer related tests
o LISTAL n,n - List 2901's related tests
o LISTMP n,n - List MPROC module tests
o LISTCB n,n - List CBus module tests
MAINDEC-10-DFPTA-A-D Page 50
TEST DESCRIPTIONS SEQ 0056
Up to 2 numeric arguments may be given which are decoded as
follows:
o No arguments - all tests are listed.
o One argument - such as 'LISTSE 4' - list only the specified test
(in this example it is test SE4).
o Two arguments - such as 'LISTSE 4,10' - list tests 4 through 10
in the selected test class.
Example:
| What test - LISTSE 4,5
|
| SE4 - JZ Instruction - Effect on Reg/Ctr
| SE5 - CONT Instruction
|
| What test - LISTMP
|
| MP1 - CRAM Data Test RAR12=0
| MP2 - CRAM Data Test RAR12=1
| ...
10.3.3.4 Switches
SWITCH
Enter switch information. Switches can be entered as in the
following example. Usually, though, it is easier just to type the
switch name to turn on or off a switch.
| What Test - SWITCH
|
| Print the selectable pgm switches? (Y or N) - Y
|
| ----Left Side Switches-------- ----Right Side Switches--------
|
| SW KL10 11 Function SW Value Function
| -- ---- ---- -------- -- ----- --------
| 0 400000 100000 Abort 18 400000 Program trace
| ...
|
| Switches = 020010 004000
|
| 20010 LH Switches <# or ?> - ?
|
| Type Y,N,^,CR,^Z
|
| N ABORT -
| N RSTART -
| ...
MAINDEC-10-DFPTA-A-D Page 51
TEST DESCRIPTIONS SEQ 0057
|
| 4000 RH Switches <# or ?> - ?
|
| Type Y,N,^,CR,^Z
|
| N TRACE -
| N INHFLT -
| ...
SWPRIN
Print current switch settings. Example:
| What Test - SWPRIN
|
| Switches: 020010 002000 PNTLPT OPRSEL UDEBUG
NOPNT RELIAB TRACE DSPEAR UDEBUG
PNTLPT TXTINH INHFLT NIPORT MDEBUG
DING OPRSEL INHMSG CIPORT SDEBUG
LOOPER LOOPGM MPROC LDEBUG
ERSTOP LOOPTS MCBUS
PALERS RUNALL
The name of each of these switches can be typed. The result is
to complement the switch setting. If left hand switches are typed
in exec mode an error message is printed.
MAINDEC-10-DFPTA-A-D Page 52
TEST DESCRIPTIONS SEQ 0058
10.4 Hardware Tests
More information on each of the following hardware tests listed
here can be found in the program listing.
10.4.1 Hardware Tests - EBUS Module
10.4.1.1 EBUS Interface Tests
EB1 - CONI Works?
EB2 - RH20/Port Interaction
EB3 - RH20/Port Interaction
EB4 - RH20/Port Interaction
EB5 - RH20/Port Interaction
10.4.1.2 CSR Register Tests
EB6 - CSR Cleared After Reset
EB7 - Read/Write CSR Bits
EB10 - CSR Bits Interaction
10.4.1.3 EBUF Tests (MBus Loopback)
EB11 - EBUF Access Test
EB12 - EBUF/CSR Conflict Test
EB13 - KMUX Parity Generators
EB14 - EBUF/CSR Conflict Test
EB15 - EBUF Reset Test
EB16 - EBUF Data Path Test
10.4.1.4 CSR Bit 18 'Clear Port' Tests
EB17 - CSR Bit 18 Self Clearing Test
EB20 - CSR Bit 18 Reset Test
EB21 - CSR Bit 18 Reset Test
10.4.1.5 'Diag Test Ebuf'/Initialized
EB22 - Read/Write EBUF When Ucode Running
MAINDEC-10-DFPTA-A-D Page 53
TEST DESCRIPTIONS SEQ 0059
10.4.1.6 Parity Generators/Checkers Tests
EB23 - Par Gen - Not Forcing an Error
EB24 - Par Gen - Forcing an Error
10.4.1.7 CSR Read Only Bits
EB25 - Read only CSR Bits
10.4.1.8 CSR 01 'DIAG RQST CSR'
EB26 - CSR 01 'DIAG RQST CSR'
EB27 - CSR 01 'DIAG RQST CSR'
EB30 - CSR 01 'DIAG RQST CSR'
EB31 - CSR 01 'DIAG RQST CSR'
EB32 - CSR 01 'DIAG RQST CSR'
EB33 - CSR 01 'DIAG RQST CSR'
10.4.1.9 CSR 02 'DIAG CSR CHNG'
EB34 - CSR 02 'DIAG CSR CHNG'
10.4.1.10 Contant MUX
EB35 - Constant MUX
EB36 - Constant MUX Interference
EB37 - CSR Bit 24 - EBUS PE Occurs at Wrong Time
EB40 - EBUS Transfer via DATAO's
EB41 - EBUS Transfer via DATAI's
10.4.1.11 CSR 05 'Rqst Int' Bit
EB42 - CSR 05 'Rqst Interrupt'
EB43 - CSR 05 'Rqst Interrupt'
EB44 - CSR 05 'Rqst Interrupt'
10.4.1.12 CSR 06 'CRAM PE' Bit
EB45 - CSR 06 'CRAM Par Err'
MAINDEC-10-DFPTA-A-D Page 54
TEST DESCRIPTIONS SEQ 0060
10.4.1.13 CSR 07 'MBUS Err' Bit
EB46 - CSR 07 'MBUS Err'
10.4.1.14 CSR Bits 11,12,13
EB47 - CSR 11 'Idle' Bit
EB50 - CSR 12 'Disable Complete' Bit
EB51 - CSR 13 'Enable Complete' Bit
10.4.1.15 MPROC Run Bit
EB53 - MPROC Run Bit
EB54 - Basic KMUX Parity Test
EB55 - Clearing MPROC Run Bit
EB56 - Clearing MPROC Run Bit
10.4.1.16 CSR 22 'Diag Single Cyc'
EB57 - Verify 'Diag Single Cyc'
10.4.1.17 PIA Level Selection
EB60 - PI Level n/0 Interrupts
EB61 - Check PIA Level 0
EB62 - Check Interrupt on Level 1-7
EB63 - CSR 05 'Rqst Interrupt' Clearing
10.4.1.18 IOP Function Words
EB64 - IOP Function 0 - 40+2N Interrupt
EB65 - IOP Function 1 - 40+2N Interrupt
EB70 - IOP Function 4 - Examine
EB71 - IOP Function 5 - Deposit
EB72 - IOP Function 7 - Examine/Increment
10.4.1.19 CSR Bits 25-31
EB73 - CSR 25-26 & 28 KL-side
EB74 - CSR 25-26 & 28 Port-side
EB75 - CSR 27 & 30-31 KL-side
EB76 - CSR 27 & 30-31 Port-side
MAINDEC-10-DFPTA-A-D Page 55
TEST DESCRIPTIONS SEQ 0061
10.4.1.20 2901 Isolation Tests
AL1 - 2901 0's Test
AL2 - 2901 1's Test
10.4.1.21 2901 Boolean Tests (Direct Input/0)
AL3 - 2901 OR Test - D OR 0
AL4 - 2901 AND Test - D AND 0
AL5 - 2901 NOT_R_AND_S Test - D NOT_RS 0
AL6 - 2901 XOR Test - D XOR 0
AL7 - 2901 XNOR Test - D XNOR 0
AL10 - 2901 R+S Test - D + 0
AL11 - 2901 R-S Test - D - 0
AL12 - 2901 S-R Test - 0 - D
10.4.1.22 2901 Register File Tests
AL13 - 2901 Writing/Reading Registers
AL14 - 2901 Q-Register Test
AL15 - 2901 Register Interference Test
10.4.1.23 2901 ALU Function Tests
AL16 - 2901 OR Test
AL17 - 2901 AND Test
AL20 - 2901 NOT_R_AND_S Test
AL21 - 2901 XOR Test
AL22 - 2901 XNOR Test
AL23 - 2901 R + S Test - No Carry
AL24 - 2901 R + S Test - With Carry
AL25 - 2901 R - S Test - No Carry
AL26 - 2901 R - S Test - With Carry
AL27 - 2901 S - R Test - No Carry
AL30 - 2901 S - R Test - With Carry
10.4.1.24 Register Interference Tests
AL31 - 2901 Q-Register Interference Test
AL32 - 2901 RAM Register Interference Test
MAINDEC-10-DFPTA-A-D Page 56
TEST DESCRIPTIONS SEQ 0062
10.4.1.25 Q-Register Shifter Tests
AL33 - Q-Register Shift
AL34 - Q-Register Right/Left Shift
10.4.1.26 RAM Register Shifter Tests
AL35 - RAM Register Shift
AL36 - RAM Data Movement Test
AL37 - RAM/Q-Register Data Movement Test
AL40 - RAM Data Movement/Shifting Test
AL41 - RAM/Q-Reg Data Movement/Shifting Test
AL42 - 2901 Register / Constant Mux Test
10.4.2 Hardware Tests - MPROC Module
10.4.2.1 CRAM Tests
MP1 - CRAM Data Test RAR12=0
MP2 - CRAM Data Test RAR12=1
MP3 - CRAM Addressing Test
10.4.2.2 RAR/LAR Tests
MP4 - RAR/LAR Data Path Test - LDCRAM
MP5 - RAR/LAR Data Path Test - RDCRAM
10.4.2.3 Cram Ctrl Register Tests
MP6 - Cram Ctrl Register Test
MP7 - Cram Ctrl Register Test
10.4.2.4 MBUS Error Tests
MP10 - MBUS Error Test (MPROC module only)
MP11 - MBUS Error Test
MP12 - MBUS Error Test (MPROC module only)
MP13 - MBUS Error Test
MAINDEC-10-DFPTA-A-D Page 57
TEST DESCRIPTIONS SEQ 0063
10.4.2.5 Condition Code Tests
MP14 - CCCbusAvail Test
MP15 - CCGrntCSR Test
MP16 - CCFEQ0 Test
MP17 - CCCSRChng Test
MP20 - CCEbParErr Test
MP21 - CCRcvrBufAFul Test
MP22 - CCRcvrBufBFul Test
MP23 - CCXmtrAttn Test
MP24 - CCEbusRqst Test
MP25 - CCIntrActive Test
MP26 - CCMBSign Test
MP27 - CCMVParChk Test
MP30 - CCCbusParErr Test
MP31 - CCPliParErr Test
MP32 - CCChanErr Test
MP33 - CCCbLstWd Test
10.4.2.6 Local Storage Tests
MP34 - Basic Local Store Test
MP35 - Local Store Data Test
MP36 - Local Store Address Test
MP37 - Local Store RAM Mode Test
10.4.2.7 Miscellaneous MPROC Tests
MP40 - Jump MUX Test
MP41 - CRAM Ctl Reg Parity Generators Test
10.4.2.8 2910 Basic Instruction Tests
SE1 - JMAP Instruction
SE2 - JZ Instruction
SE3 - JZ Instruction - Effect on Reg/Ctr
SE4 - JZ Instruction - Effect on Reg/Ctr
SE5 - CONT Instruction
SE6 - CJP Instruction
SE7 - CJV Instruction
SE10 - CJS Instruction
SE11 - CJS Instruction
SE12 - CJS Instruction
SE13 - CRTN Instruction
SE14 - CRTN Instruction
SE15 - Stack location #1
SE16 - Stack location #2
SE17 - Stack location #3
SE20 - Stack location #4
SE21 - Stack location #5
MAINDEC-10-DFPTA-A-D Page 58
TEST DESCRIPTIONS SEQ 0064
SE22 - Increment/Decrement Stack Pointer
SE23 - Increment/Decrement Stack Pointer
SE24 - Increment/Decrement Stack Pointer
SE25 - Increment/Decrement Stack Pointer
SE26 - Increment/Decrement Stack Pointer
SE30 - CJPP Instruction
SE31 - CJPP Instruction
SE32 - CJPP Instruction
SE33 - LDCT Instruction
SE34 - LDCT Instruction
SE35 - Register/Counter
SE36 - JRP Instruction
SE37 - JSRP Instruction
SE40 - JSRP Instruction
SE41 - JSRP Instruction
SE42 - PUSH Instruction
SE43 - PUSH Instruction
SE44 - PUSH Instruction
SE45 - LOOP Instruction
SE46 - LOOP Instruction
SE47 - LOOP Instruction
SE50 - RFCT Instruction
SE51 - RFCT Instruction
SE52 - RFCT Instruction
SE53 - RFCT Instruction
SE54 - RPCT Instruction
SE55 - RPCT Instruction
SE56 - TWB Instruction
SE57 - TWB Instruction
SE60 - TWB Instruction
SE61 - TWB Instruction
SE62 - TWB Instruction
SE63 - TWB Instruction
SE64 - Stack Interference Tests
SE65 - Stack Interference Tests
SE66 - Reg/Ctr Interference Tests
SE67 - Reg/Ctr Interference Tests
SE70 - Full Speed Sequencer Test
10.4.3 Hardware Tests - CBUS Module
10.4.3.1 Basic CBUS Tests
CB1 - Fmtr Data Loopback
CB2 - PLI Buffer Data Loopback
10.4.3.2 CBUS Data Transfer Tests
CB3 - CBUS to EBUF Data Transfer
CB4 - 2901 to CBUS Data Transfer
CB5 - CBUS to 2901 Multiple Word Transfer
CB6 - 2901 to CBUS Multiple Word Transfer
MAINDEC-10-DFPTA-A-D Page 59
TEST DESCRIPTIONS SEQ 0065
CB7 - CBUS to EBUS Data Transfer
CB10 - EBUS to CBUS Data Transfer
10.4.3.3 Mover/Formatter Tests
CB11 - Fmtr Cleared by 'Port Clear'
CB12 - Fmtr Basic Up Shifting Test
CB13 - Fmtr Up Shift 4 Test - BUS Ctl=Cbus
CB14 - Fmtr Up Shift 4 Test - BUS Ctl=Fmtr
CB15 - Fmtr Up Shift 4 (from PLIN) Test - SELRHTNIB=0
CB16 - Fmtr Up Shift 4 (from PLIN) Test - SELRHTNIB=0
CB17 - Fmtr Up Shift 4 (from PLIN) Test - SELRHTNIB=1
CB20 - Fmtr Up Shift 4 (from PLIN) Test - SELRHTNIB=1
CB21 - Fmtr Up Shift 8 (from PLIN) Test - SELRHTNIB=0
CB22 - Fmtr Up Shift 8 (from PLIN) Test - SELRHTNIB=0
CB23 - Fmtr Up Shift 8 (from PLIN) Test - SELRHTNIB=1
CB24 - Fmtr Up Shift 4 (from PLIN) Test - SELRHTNIB=1
CB25 - Fmtr Basic Down Shifting Test
CB26 - Fmtr Down Shift 4 Test
CB27 - Fmtr Down Shift 4 (from PLIN) Test - SELRHTNIB=0
CB30 - Fmtr Down Shift 4 (from PLIN) Test - SELRHTNIB=0
CB31 - Fmtr Down Shift 4 (from PLIN) Test - SELRHTNIB=1
CB32 - Fmtr Down Shift 4 (from PLIN) Test - SELRHTNIB=1
CB33 - Fmtr Down Shift 8 (from PLIN) Test - SELRHTNIB=0
CB34 - Fmtr Down Shift 8 (from PLIN) Test - SELRHTNIB=0
CB35 - Fmtr Down Shift 8 (from PLIN) Test - SELRHTNIB=1
CB36 - Fmtr Down Shift 4 (from PLIN) Test - SELRHTNIB=1
CB37 - Fmtr Ring Buffer Test
10.4.3.4 Miscellaneous CBUS Tests
CB40 - CMUX Selected by PLINTOCMUX
CB41 - CBUF Loaded Correctly
CB42 - PMUX Selected by MPCBUFTOPLOUT
CB43 - PMUX Selected by MPCBUFTOPLOUT/MPZEROLFTNIB
CB44 - DMUX Selected Correctly
CB45 - CBUS Parity Checking - CBUS to CBUS Module
CB46 - CBUS Parity Checking - CBUS Module to CBUS
CB47 - CBUS Parity Checking - CBUS to CBUS Module
CB50 - T Field Timing
CB51 - CBUS Store
CB52 - CBUS Input Buffer
10.4.3.5 Parity Predictor Tests
CB53 - Parity Predictor - CBIN to Fmtr/MPINDSTCOMP=0
CB54 - Parity Predictor - CBIN to Fmtr/MPINDSTCOMP=1
CB55 - Parity Predictor - Fmtr to PLOUT
CB56 - Parity Predictor - PLIN to Fmtr/MPCOREDUMP=0
CB57 - Parity Predictor - PLIN to Fmtr/MPCOREDUMP=1
MAINDEC-10-DFPTA-A-D Page 60
TEST DESCRIPTIONS SEQ 0066
CB60 - Parity Predictor - Fmtr to CBOUT
MAINDEC-10-DFPTA-A-D Page 61
TEST DESCRIPTIONS SEQ 0067
10.5 Debug Test
10.5.1 Basic Description
This test allows the selection of different operations that may
be done on port. In some cases, probably rarely, a field engineer
may wish to diagnose an port by doing particular operations. More
often this type of testing may be useful when repairing individual
modules if the technician doing the repair is very familiar with the
module and how it works. This test provides the ability to perform
a basic operation such as writing a register or doing something with
microcode and then inspecting the results to see what happened.
Normally, the port tests provide sufficient detection and
isolation of faults to fix the port. Occasionally, a person trying
to fix the port may encounter an unusual problem not detected by the
diagnostic or having strange symptoms. This test may allow some
understanding of the problem to be gained.
This test can also be used to debug microcode using the
breakpoint facilities. And it can be used to run small microcode
routines of the user's own devising.
10.5.2 Commands Available
The commands available in debug mode are as follows, which are
typed in response to the prompt 'DEBUG> ':
NAME DESCRIPTION
---- -----------
General Commands:
----------------
HELP Print this message
EXIT Exit DEBUG mode
DDT Enter DDT (Type RTN$X to return)
SET opt arg Set/clear/print options
TAKE file ext Take commands from a file
NTAKE file ext Take commands from file (unechoed)
Device Selection Commands:
-------------------------
CONFIG Determine/print configuration
CONPNT Print configuration
SELECT Select device to test
Starting, Stopping, Initializing the Port:
-----------------------------------------
RESET Issue EBUS Reset
CLEAR Issue a 'Port Clear'
MAINDEC-10-DFPTA-A-D Page 62
TEST DESCRIPTIONS SEQ 0068
START adr Start the port micro-sequencer
STOP Stop the port micro-sequencer
CONT Continue the port micro-sequencer
SSTEP cnt Single step the port micro-sequencer
STRACE cnt Single step and trace execution
SPRINT cnt Print single step history data
SCLEAR Clear single step history data
SSINIT Set up single step addr/data/history
Handling Port Registers:
-----------------------
ECSR Examine CSR Register
DCSR dat Deposit CSR Register
ZCSR Zero CSR Register
EEBUF Examine EBUF register
DEBUF dat Deposit EBUF register
ZEBUF Zero EBUF register
ELAR Examine LAR register
DRAR dat Deposit RAR register
ZRAR Zero RAR register
Handling Port CRAM Locations:
----------------------------
The next few commands must have at least one argument and
possibly two. Two arguments give the range of CRAM address to be
altered or inspected. If only one argument is given the range is
only one location. If the deposit command is given, the diagnostic
will ask what to deposit into each location.
DCRAM adr,adr Deposit into CRAM
BCRAM adr,adr Deposit into CRAM by fields
ACRAM adr,adr Alter CRAM
ECRAM adr,adr Examine CRAM
LCRAM adr,adr List CRAM
ZCRAM adr,adr Zero CRAM
2901 Commands:
-------------
E2901 reg,reg Examine 2901 registers
D2901 reg,dat Deposit 2901 register
Z2901 reg,reg Zero 2901 registers
Local Storage Commands:
----------------------
ELOCS adr,adr Examine local storage
DLOCS adr,dat Deposit local storage
ZLOCS adr,adr Zero local storage
Special Scope Functions:
MAINDEC-10-DFPTA-A-D Page 63
TEST DESCRIPTIONS SEQ 0069
-----------------------
LCONI Loop on CONI
LCONO dat Loop on CONO
LDATAI Loop on DATAI
LDATAO dat Loop on DATAO
LROUTN dat Loop on user supplied routine at DROUTN:
Mark Bit Commands:
-----------------
MARK adr,adr Set mark bit
RMARK adr,adr Remove mark bit
CMARK adr,adr Clear all mark bits
LMARK adr,adr List mark bits
Breakpoint Commands:
-------------------
BREAK adr,adr Set breakpoint
RBREAK adr,adr Remove breakpoint
CBREAK adr,adr Clear all breakpoints
LBREAK adr,adr List breakpoints
PBREAK adr Proceed from breakpoint
WBREAK Print breakpoint data
Microcode Commands:
------------------
LOAD tst Load microcode from Test 'tst' into CRAM
LIST tst List microcode from Test 'tst'
FLOAD Load microcode from file into CRAM
FVERFY Verify microcode loaded from file
FLIST List microcode in file
FEXAM Examine microcode in file
Miscellaneous Commands:
----------------------
TRANSL dat Translate data to CSR bits
CCODE Print condition codes
ESTACK Examine 2910 stack contents
FILLNX dat Fill CRAM with 'J=.+1,CTL=dat'
FILLPC dat Fill CRAM with 'J=.,CTL=dat'
ENEXT Examine next
DNEXT arg Deposit next
IPRINT Print accumulated interrupt activity
ICLEAR Clear accumulated interrupt activity
IINIT Init interrupt system
Data Transfer Commands:
----------------------
RDINIT Initialize everything for a read
WRINIT Initialize everything for a write
MAINDEC-10-DFPTA-A-D Page 64
TEST DESCRIPTIONS SEQ 0070
BPRINT n Print buffer contents (n locations)
CCWPNT Print CCW list
LOGPNT Print logout data
COMPAR Compare data buffer
Switches:
--------
SWITCH Enter switch information
SWPRIN Print current switch settings
NOPNT Complement 'no print' switch
PNTLPT Complement 'print lpt' switch
DING Complement 'bell on error' switch
LOOPER Complement 'loop on error' switch
ERSTOP Complement 'halt on error' switch
PALERS Complement 'print all errors' switch
RELIAB Complement 'reliability mode' switch
TXTINH Complement 'text inhibit' switch
OPRSEL Complement 'operator select' switch
TRACE Complement 'trace test' switch
INHFLT Complement 'inhibit fault isolation' switch
INHMSG Complement 'inhibit error message' switch
LOOPGM Complement 'loop on pgm' switch
LOOPTS Complement 'loop on test' switch
RUNALL Complement 'run all test segments' switch
DSPEAR Complement 'disable SPEAR reporting' switch
UDEBUG Complement 'user mode debug' switch
MDEBUG Complement 'error message debug' switch
SDEBUG Complement 'test debug' switch
LDEBUG Complement 'load microcode debug' switch
IDEBUG Complement 'fault isolation debug' switch
NIPORT Complement 'Select NI port' switch
CIPORT Complement 'Select CI port' switch
MPROC Complement 'missing MPROC module' switch
MCBUS Complement 'missing CBUS module' switch
10.5.3 Detailed Command Description
In more detail these commands are as follows:
10.5.3.1 General Commands
HELP
This command prints a one line description similar to the above
for each command.
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EXIT
This command returns control to normal test dispatching at the
'What Test -' question.
DDT
This command invokes DDT. When RTN$X (POPJ 17,0) is executed,
the diagnostic resets the PI system in exec mode and returns to
'DEBUG>' question. DDT can also be entered by typing Control-D and
when done typing RTN$X. When invoked in this fashion, the
diagnostic does not reset the PI system.
SET
This command is used to set, clear, or print program options.
The option is specified as the first argument and the option setting
as the second argument. The options that may be dealt with are as
follows:
o SET ADDR adr.
This command sets the start address of the microsequencer.
Whenever a START command or a SSINIT command is given, the
default address given here is used. A START command may also
explicitly specify the starting address. No commands other than
SET ADDR alter the default starting address.
The initial default address is location 0. To find out the
current default address, type SET ADDR <CR>.
o SET CSR data.
This command sets the initial CSR register starting contents.
When a subsequent START or SSINIT command is given, this data is
written to the CSR when starting the microsequencer. This
allows the state of CSR bits to be set up - such as interrupt
enable and PI level bits.
The initial value is 0. When a START or single step command is
given with the default CSR data equal to 0, the diagnostic
writes 14 to the CSR register (MPRUN, PI Level 4) or 20014 if
single stepping (SINCYC bit included).
To find out the current start data, type SET CSR <CR>.
o SET PARITY arg.
This command affects the automatic parity generation when
loading microcode into the CRAM. If the flag is 'YES' the
diagnostic computes correct parity before it loads any
microcode. If 'NO' the diagnostic assumes the parity has
already computed and does not alter the parity bit specified in
the microcode data.
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This flag only affects microcode explicitly loaded in the DEBUG
test. This flag does not affect loading microcode from a file.
When operational microcode is loaded in this fashion, parity is
not affected.
The initial value of the flag is 'YES'. To find out the current
setting, type SET PARITY <CR>.
o SET EBUF arg.
This command affects the automatic preservation of the EBUF when
single stepping or stopping the microsequencer. If 'preserve
EBUF' flag is 'YES' the diagnostic will read the EBUF before
reading the LAR and then write back the data afterwards. If the
flag is 'NO' the contents of the EBUF will be destroyed every
time the RAR is written or the LAR read.
The initial value of the flag is 'YES'. To find out the current
setting, type SET EBUF <CR>.
o SET LENGTH len.
This command sets the buffer length to be used when generating
CCW lists. Any length up to 102400 (decimal) words may be
specified. However, note that the buffer is only 512 words long
and each CCW in the CCW list points to the same starting
location. This is so that a 512 word buffer can be used and
much longer data transfers can be specified.
The initial length is 128 words. To find out the current
setting, type SET LEN <CR>.
o SET PAT n.
This command specifies the data pattern to be used by commands
which generate CCW lists and set up buffer contents and do
buffer compares. Any data pattern from 1 to 126 (octal) may be
entered.
The initial value is 1 (data pattern zeros). To find out the
current setting, type SET PAT <CR>.
o SET PATLIS arg,arg.
This command prints what data patterns are available. One or
two arguments may be given to specify a range of data patterns.
The diagnostic prints a description for each data pattern in the
range specified. If no arguments are specified, all data
patterns will be printed.
o SET FNAME name ext
The diagnostic allows a microcode file to be loaded into CRAM or
listed on the terminal. The commands used do not allow a
microcode file name to be specified. The name of the file used
can be changed by this command.
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The initial file name is 'CI20.ULD'. To find out the current
setting, type SET FNAME <CR>.
o SET WHAT
This command prints the current selection of each option.
o SET HELP
This command prints a help message describing each option
available to the set command.
TAKE file ext
This command takes commands from a file. The file may be
specified as an argument to the command. If no file name is
specified, the default file name is used. The default file name is
either 'DFPTA.CMD' or the last file specified.
Any legal command may be specified including another TAKE
command. The presence of a TAKE or DDT or EXIT (from DFPTA) command
in the take file will terminate use of the current file. The
diagnostic prints each command and result on the terminal as it
executes each command.
The file specified must be on the load device known to MAGMON or
D20MON or DIAMON. If not, an error message is printed and the TAKE
command is aborted.
If any error occurs while processing the take file, the TAKE
command is aborted. Errors include any unexpected errors such as
unrecognized command, failures to start the port, argument errors,
etc.
NTAKE file ext
This command is identical to the TAKE command with the single
exception that the commands executed are not echoed on the terminal.
All output resulting from execution of the commands is echoed.
10.5.3.2 Device Selection Commands
CONFIG
This command causes the diagnostic to reconfigure. It determines
whether or not an NI or CI port exists, and if each is selectable by
the diagnostic. Then the configuration is printed and the port(s)
to test are queried as follows:
| Port Configuration:
| Port Exists Selectable Selected
| NI Yes Yes Yes
| CI Yes Yes Yes
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|
| Test NI port? (Y or N) - N
|
| Test CI port? (Y or N) - Y
|
| [CI port selected]
CONPNT
This command prints the configuration determined at last
configuration as modified by any selection of ports to test. For
example:
| Port Configuration:
| Port Exists Selectable Selected
| NI Yes Yes No
| CI Yes Yes Yes
SELECT port,port
This command allows the current selection of ports to be
modified. There are two alternate formats for this command. First,
SELECT <CR> will cause the diagnostic to query which port to select
as follows:
| What test - SELECT
|
| Test NI port? (Y or N) - N
|
| Test CI port? (Y or N) - Y
|
| [CI port selected]
The selection may be stated in the SELECT command by typing
SELECT NI <CR> or SELECT CI <CR> or SELECT NI,CI <CR>. An example
follows:
| What test - SELECT NI,CI
|
| [NI port selected]
| [CI port selected]
10.5.3.3 Starting, Stopping, Initializing the Port
The START, SSTEP or STRACE commands can be given at any time
without concern if the port is running or not. The diagnostic will
stop the port if it has to and clear any error condition. If it
changes the state of the port, the diagnostic prints a message to
that effect.
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RESET
Issue EBUS Reset. This does a CONO APR,200000. In user mode a
'Port Clear' is done instead.
CLEAR
Issue a 'Port Clear'. A 400000 is written to the CSR register.
START adr
The port is started at address specified. The procedure is as
follows:
o Determine start address. If no address is specified, the start
address used is the default address given by the SET ADDR
command.
o Determine start CSR data. This is the data specified by a SET
CSR command. Insert the necessary bit 'MPRUN' and ensure
'SINCYC' bit is not set.
o Read the CSR register, if the port is already running or error
bits are set, stop the port or clear error bits as necessary.
o Write the start address to the RAR
o Write CSR data to the CSR
CONT
This command is identical in function to the START command with
the exception of the start address. In addition, if the port is not
already stopped, an error message is printed and the start sequence
aborted. The start address is the last 'next' address obtained from
a single step command.
The only purpose of this command is to start up the port after
single stepping it for a while.
STOP
Stop the port micro-sequencer and print out the contents of the
LAR. If the CSR is inaccessible, or if error bits CRAM PE or MBUS
Error are set, an error message is printed.
SSTEP n and STRACE n
Single step the port micro-sequencer 'n' times. Before this
command is done the first time, the start data and start CSR data
must be set up using the SSINIT command. Thereafter, the address
written to the RAR each time the port is single stepped is the 'last
address' read from the LAR after the prior single step.
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STRACE causes the single step history data to be printed at the
same time that single steps are being done. The data is printed in
the same format as the SPRINT command except for the order in which
the single steps are printed.
The port is stopped or error bits are cleared from the CSR
register as necessary before any single steps are done.
If CRAM PE or MBUS Error bits become set in the CSR register, a
message is printed and the single stepping is aborted.
To abort the single step procedure at any time, type altmode.
SPRINT n
Print single step history data. Data for the last 'n' (maximum
128) single steps are printed in the following format. If no
argument is given, no more than 20 single steps are printed.
| DEBUG> SPRINT 4
|
| RAR LAR CSR (final) SS#
| 0000 0100 000000 020010 12
| 0100 0230 000000 020010 11
| 0230 0231 000000 020010 10
| 0231 0232 000000 020010 7
SCLEAR
Clear single step history data.
SSINIT
Set up single step data. This sets the single step address to be
the default address specified by the SET ADDR command. The single
step CSR data is set to the default data specified by the SET CSR
command. Also, the single step history data is cleared.
This command MUST be given in order to execute the first single
step. If not given the port will start at the last address executed
by a single step.
10.5.3.4 Handling Port Registers
Each of the EBUF commands can be given at any time without
concern if the port is running or not. The diagnostic will stop the
port if it has to and clear any error condition. If it changes the
state of the port, the diagnostic prints a message to that effect.
ECSR
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Examine CSR Register. The contents are printed in octal and
translated into English as well.
DCSR dat
Deposit CSR Register. The data expected is up to 6 octal digits.
ZCSR
Zero CSR Register. This also stops the port if it is running.
EEBUF
Examine EBUF register. The data is printed in halfword format.
The port is stopped or error bits are cleared from the CSR
register as necessary before reading the EBUF. Then the 'Test EBUF'
bit is set in the CSR register if it is not already set and the EBUF
is read.
DEBUF dat
Deposit EBUF register. The data expected is up to 12 octal
digits.
The port is stopped or error bits are cleared from the CSR
register as necessary before reading the EBUF. Then the 'Test EBUF'
bit is set in the CSR register if it is not already set and the EBUF
is written.
ZEBUF
Zero EBUF register
The port is stopped or error bits are cleared from the CSR
register as necessary before reading the EBUF. Then the 'Test EBUF'
bit is set in the CSR register if it is not already set and the EBUF
is zeroed.
ELAR
Examine LAR register and print it as 'LAR/ 0000'. This is
actually a 13 bit register. The right most bit is the bit written
to the RAR register to specify which half of the CRAM to access.
This bit is not printed.
DRAR dat
Deposit RAR register. The data consists of a 12 bit CRAM address
followed by one bit specifying left or right half. Example:
| DEBUG> DRAR 0 ; Write location 0 (right half)
| DEBUG> DRAR 1 ; Write location 0 (left half)
| DEBUG> DRAR 10 ; Write location 4 (right half)
| DEBUG> DRAR 11 ; Write location 4 (left half)
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ZRAR
Zero RAR register.
10.5.3.5 Handling Port CRAM Locations
Each of the following commands can be given at any time without
concern if the port is running or not. The diagnostic will stop the
port if it has to and clear any error condition. If it changes the
state of the port, the diagnostic prints a message to that effect.
The diagnostic also ensures that 'Test EBUF' bit is not set and 'Sel
LAR' bit is not set.
Commands that read or write CRAM locations are given up to 2
arguments. The action in each case is as follows:
o No arguments - The CRAM addresses used are those last used. So
if a zero CRAM command is given to clear locations 1001 through
1004, a subsequent examine cram command with no arguments would
examine locations 1001 through 1004.
o One argument - The range of CRAM locations is taken as
addr1,addr1.
o Two arguments - The range of CRAM locations is taken as
addr1,addr2.
DCRAM adr,adr
Deposit into CRAM locations specified either by explicit
arguments or by default. The format of the data is the same format
produced as output of the MICRO2 assembler. Example:
| DEBUG> DCRAM 10
|
| Type xxxx,xxxx,xxxx,xxxx,xxxx
| 0010 :: 11,22,33,44,55
BCRAM adr,adr
Deposit into CRAM locations specified either by explicit
arguments or by default. The data is asked for each location, one
field at a time. The initial data to be written to each CRAM
location is zero. Example:
| DEBUG> BCRAM 10
|
| Type value,value... or ^,CR,^Z,field name
| 0010 ::
| J -
| PAR - Type: value<CR> value<CR> ...
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| OENA - or: value,value,...<CR>
| MGC - or: ^ to back up to the previous
| SORC - value
| FUNC - or: <CR> to leave a value unchanged
| DEST - or: field name such as MGC or FUN or
| CENA - A or M (for MGC) .. to skip to
| RAM - a particular field
| A - or: ^Z to terminate input and store
| B - the CRAM location
| SK - or: $ (altmode) to abort the command
| BUS - and not store anything
| CRY -
| CTL -
| TIME -
| SPARE -
| MARK -
Note: Everything can be typed on one line, such as this
example to change A, B, and MGC fields only:
| DEBUG> BCRAM 10
|
| Type value,value... or ^,CR,^Z,field name
| 0010 ::
| J - A,3,4,M,1234,^Z
|
| DEBUG>
ACRAM adr,adr
Alter CRAM locations specified either by explicit arguments or by
default. The data is asked for each location, one field at a time.
Example:
| DEBUG> ACRAM 10
|
| Type value,value... or ^,CR,^Z,field name
| 0010 ::
| 0 J -
| 0 PAR - Type: value<CR> value<CR> ...
| 0 OENA - or: value,value,...<CR>
| 33 MGC - or: ^ to back up to the previous
| 0 SORC - value
| 1 FUNC - or: <CR> to leave a value unchanged
| 0 DEST - or: field name such as MGC or FUN or
| 0 CENA - A or M (for MGC) .. to skip to
| 0 RAM - a particular field
| 0 A - or: ^Z to terminate input and store
| 0 B - the CRAM location
| 22 SK - or: $ (altmode) to abort the command
| 0 BUS - and not store anything
| 1 CRY -
| 0 CTL -
| 0 TIME -
| 0 SPARE -
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| 0 MARK -
Note: Everything can be typed on one line, as in the
example under 'BCRAM' command above.
ECRAM adr,adr
Examine CRAM locations specified either by explicit arguments or
by default. The data is printed in MICRO2 assembler format.
Example:
| DEBUG> ECRAM 10,12
|
| 0010 / 0000 0001 0400 0000 0400
| 0011 / 0000 0001 1400 0000 0440
| 0012 / 0000 0001 2400 0000 0500
LCRAM adr,adr
List CRAM locations specified either by explicit arguments or by
default. The data is printed in bit field format. Example:
| DEBUG> LCRAM 0,3
|
| ADDR/ JUMP PAR OUT MGC SOR FUN DES CC RAM PA PB SK BUS CRY CTL TM SP MK
| 0/ 0 0 0 0 0 1 0 0 0 0 0 0 0 0 JZ 0 0 0
| 1/ 0 0 0 0 0 3 0 0 0 0 0 0 0 0 JZ 0 1 0
| 2/ 0 0 0 0 0 5 0 0 0 0 0 0 0 0 JZ 0 2 0
| 3/ 0 0 0 0 0 7 0 0 0 0 0 0 0 0 JZ 0 3 0
ZCRAM adr,adr
Zero CRAM locations specified either by explicit arguments or by
default.
10.5.3.6 2901 Commands
Each of the following commands can be given at any time without
concern if the port is running or not. The diagnostic will stop the
port if it has to and clear any error condition. If it changes the
state of the port, the diagnostic prints a message to that effect.
These commands may be given up to 2 arguments. The action in
each case is as follows:
o No arguments - The 2901 registers used are those last used. So
if registers 0 through 4 are examined, a subsequent examine
command with no arguments would examine registers 0 through 4.
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o One argument - The range of 2901 registers is taken as
reg1,reg1.
o Two arguments - The range of 2901 registers is taken as
reg1,reg2
E2901 reg,reg
Examine the contents of the range of 2901 registers specified.
Microcode is loaded into the port to accomplish this, but no 2901
registers or local storage locations are affected. And the original
contents of the CRAM location used are restored.
D2901 reg,data
Deposit the data into the 2901 register specified. Microcode is
loaded into the port to accomplish this, and only the 2901 register
specified is affected. The original contents of the CRAM location
used are restored.
To deposit data into successive registers, additional data can be
typed. For example, to load registers 3,4,5,6 with 333,444,555,666
respectively, type the following:
| DEBUG> D2901 3,333,444,555,666
|
Z2901 reg,reg
Zero the range of 2901 registers specified. Microcode is loaded
into the port to accomplish this. The original contents of the CRAM
location used are restored.
10.5.3.7 Local Storage Commands
Each of the following commands can be given at any time without
concern if the port is running or not. The diagnostic will stop the
port if it has to and clear any error condition. If it changes the
state of the port, the diagnostic prints a message to that effect.
These commands may be given up to 2 arguments. The action in
each case is as follows:
o No arguments - The local storage addresses used are those last
used. So if a zero local storage command is given to clear
locations 101 through 104, a subsequent examine local storage
command with no arguments would examine locations 1001 through
1004.
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o One argument - The range of local storage locations is taken as
addr1,addr1.
o Two arguments - The range of local storage locations is taken as
addr1,addr2
ELOCS adr,adr
Examine local storage addresses specified by the range of
addresses. Microcode is loaded into the port to accomplish this and
several 2901 registers are destroyed in the process. No local
storage locations are affected. And the original contents of the
CRAM locations used are restored.
DLOCS adr,dat
Deposit local storage address 'adr' with 36 bit octal data 'dat'.
Microcode is loaded into the port to accomplish this and several
2901 registers are destroyed in the process. No local storage
locations are affected. And the original contents of the CRAM
locations used are restored.
To deposit data into successive locations, additional data can be
typed. For example, to load locations 103,104,105,106 with
333,444,555,666 respectively, type the following:
| DEBUG> DLOCS 103,333,444,555,666
|
ZLOCS adr,adr
Zero local storage addresses specified by the range of addresses.
Microcode is loaded into the port to accomplish this, but no 2901
registers or local storage locations are affected. And the original
contents of the CRAM locations used are restored.
10.5.3.8 Special Scope Functions
These commands allow scope loops to be set up for only doing a
CONI, CONO, DATAI, or DATAO. The diagnostic will repeatedly perform
the operation and not print out anything until altmode is typed.
LCONI
Loop on CONI instruction (CONI 564,1 or CONI 574,1)
LCONO dat
Loop on CONO instruction (CONO 564,dat or CONO 574,dat). This
writes the CSR register continuously. The data to write to CSR must
be specified up to 6 octal digits.
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LDATAI
Loop on DATAI instruction (DATAI 564,1 or DATAI 564,1). This may
read the LAR or a CRAM location or the EBUF depending on the state
of CSR bits 'Test EBUF' and 'Select LAR'. To set up the CSR as
desired just do an EEBUF or ELAR or ECRAM instruction just before
this command.
LDATAO dat
Loop on DATAO instruction (DATAO 564,1 or DATAO 574,1). The data
to write must be specified. This may write the LAR or a CRAM
location or the EBUF depending on the state of CSR bit 'Test EBUF'
and the leftmost bit of the data given to write. To set up the CSR
as desired just do an EEBUF or ELAR instruction just before this
command.
LROUTN dat
This command allows the user to enter a routine at label DROUTN:
and loop on it continuously until an altmode is typed. There are 15
locations free at DROUTN: to insert code. An octal argument is
optional and is available in location 'ARGUM' if typed.
10.5.3.9 Mark Bit Commands
Each CRAM word has a mark bit that can be set or cleared. It is
used only to sync a scope on. Parity is not calculated for this
location.
The diagnostic does not keep track of which locations have mark
bits set. If it is requested to list marked CRAM locations, the
diagnostic just looks for locations with the mark bit set.
Each of these commands can be given at any time without concern
if the port is running or not. The diagnostic will stop the port if
it has to and clear any error condition. If it changes the state of
the port, the diagnostic prints a message to that effect.
MARK adr1,adr2,adr3,...
Set mark bit at locations adr1,adr2,adr3,...
RMARK adr1,adr2,adr3,...
Remove mark bit from locations adr1,adr2,adr3,...
CMARK adr1,adr2
Clear all mark bits between adr1 and adr2. If only one argument
is given only that one location is rewritten without the mark bit
set. If no arguments are supplied, all mark bits are cleared
throughout the CRAM.
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LMARK adr1,adr2
List all locations with mark bit set between adr1 and adr2. If
only one argument is given only that one location is checked. If no
arguments are supplied, all location with the bit set are listed
throughout the CRAM.
10.5.3.10 Breakpoint Commands
A breakpoint consists of a location with bad parity. The
diagnostic does not keep track of these locations itself. If it is
requested to list breakpoints, it just looks for locations with bad
parity.
Each of these commands can be given at any time without concern
if the port is running or not. The diagnostic will stop the port if
it has to and clear any error condition. If it changes the state of
the port, the diagnostic prints a message to that effect.
BREAK adr1,adr2,adr3,...
Set breakpoints at locations adr1,adr2,adr3,...
RBREAK adr1,adr2,adr3,...
Remove breakpoints from locations adr1,adr2,adr3,...
CBREAK adr1,adr2
Clear all breakpoints between adr1 and adr2. If only one
argument is given only that one location is rewritten with good
parity. If no arguments are supplied, all breakpoints are removed
throughout the CRAM.
LBREAK adr1,adr2
List breakpoints between adr1 and adr2. If only one argument is
given only that one location is checked for bad parity. If no
arguments are supplied, all breakpoints are listed throughout the
CRAM.
PBREAK adr
Proceed from breakpoint. The address given will be used as the
restart address. If none is given, the address read by the WBREAK
command is used. This command causes several things to be done:
1. The CRAM location to restart at is read and rewritten with good
parity.
2. The RAR is written with the start address.
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3. The EBUF is written with the EBUF data read by the WBREAK
command.
4. The port is restarted.
WBREAK
Assuming the port has just halted because of a CRAM PE, this
command is used to print breakpoint related data - the address
stopped at and the contents of the EBUF.
This command also saves this data so that a subsequent PBREAK
command can be used to restart the port at the correct place,
restoring the EBUF also. Note that restarting is not possible
unless the instruction to restart at is an unconditional jump
instruction.
10.5.3.11 Microcode Commands
Each of these commands can be given at any time without concern
if the port is running or not. The diagnostic will stop the port if
it has to and clear any error condition. If it changes the state of
the port, the diagnostic prints a message to that effect.
Test names are given as 'Test Class' 'Test Number', where test
class is:
o SE or S - 2910 sequencer tests
o MP or M - Mproc module tests
o AL or A - 2901 ALU tests
o CB or C - CBus module tests
o EB or E - EBus module tests
Sample test names are SE1, SE27, EB1, E1, AL20, ...
LOAD tst
Load microcode from Test 'tst' into CRAM and verify the result.
Example:
| DEBUG> LOAD SE27
|
| [Done - Number of CRAM locations loaded/verified = 17.]
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LIST tst
List microcode from Test 'tst'. All locations are listed in the
order that they would be loaded, not necessarily in order by CRAM
address. Example:
| DEBUG> LIST SE30
|
| ADDR/ JUMP PAR OUT MGC SOR FUN DES CC RAM PA PB SK BUS CRY CTL TM SP MK
| 0/ 2 0 0 0 0 0 0 0 0 0 0 1 0 0 CJPP 0 0 0
| 1/ 10 1 0 0 0 0 0 0 0 0 0 0 0 0 JMAP 0 0 0
| 2/ 4 1 0 0 0 0 0 0 0 0 0 3 0 0 CJPP 0 0 0
| 3/ 11 0 0 0 0 0 0 0 0 0 0 0 0 0 JMAP 0 0 0
| ...
FLOAD
Load microcode from file into CRAM. The file used is the default
file name CI20.ULD or the file last specified by the SET FNAME
command. DIAMON or D20MON or MAGMON must be loaded in order to load
the microcode from the selected load device. The diagnostic prints
an error message if it cannot access the microcode file. This
command does not verify the microcode it has loaded. Example:
| DEBUG> FLOAD
|
| [Reading file: CI20.ULD]
|
| [Number of CRAM locations loaded = 3040.]
|
| [Ucode version 402]
FVERFY
This command causes the microcode previously loaded into CRAM
from a file to be verified. Up to 4 verify errors are printed.
Example:
| DEBUG> FVERFY
|
| [Reading ucode file: CI20.ULD]
|
| Verify error at CRAM location 0000
| Correct: 0001 0000 1631 6702 0060
| Actual: 0000 0000 0400 0000 0000
|
| Verify error at CRAM location 0001
| Correct: 0025 6000 4315 6542 0060
| Actual: 0000 0000 1400 0000 0040
|
| Verify error at CRAM location 0007
| Correct: 0004 4000 7510 7542 0060
| Actual: 0000 0000 7400 0000 0340
|
MAINDEC-10-DFPTA-A-D Page 81
TEST DESCRIPTIONS SEQ 0087
| Verify error at CRAM location 0025
| Correct: 0031 4145 4731 6723 0060
| Actual: 0000 0002 5400 0000 1240
|
| [Number of CRAM locations verified = 3040. Errors = 27.]
FLIST
List microcode in file in field format. The file used is the
default file name CI20.ULD or the file last specified by the SET
FNAME command. DIAMON or D20MON or MAGMON must be loaded in order
to obtain the microcode from the selected load device. The
diagnostic prints an error message if it cannot access the microcode
file. Example:
| DEBUG> FLIST
|
| [Reading ucode file: CI20.ULD]
|
| ADDR/ JUMP PAR OUT MGC SOR FUN DES CC RAM PA PB SK BUS CRY CTL TM SP MK
| 0/ 2 0 0 0 1 6 3 0 0 16 16 2 0 0 CJP 0 0 0
| 1/ 2 1 0 0 7 5 1 0 0 0 0 2 0 0 CJP 0 0 0
| 2/ 7 0 1 0 4 3 1 1 0 16 0 2 0 0 CJP 0 0 0
| ...
FEXAM
List microcode in file in MICRO2 format. The file used is the
default file name CI20.ULD or the file last specified by the SET
FNAME command. DIAMON or D20MON or MAGMON must be loaded in order
to obtain the microcode from the selected load device. The
diagnostic prints an error message if it cannot access the microcode
file. Example:
| DEBUG> FEXAM
|
| [Reading ucode file: CI20.ULD]
|
| 0000 / 0001 0000 1631 6702 0060
| 0001 / 0025 6000 4315 6542 0060
| 0007 / 0004 4000 7510 7542 0060
| ...
10.5.3.12 Miscellaneous Commands
TRANSL dat
This is used if a description of the CSR register is not at hand.
The data (36 bits) is translated into English. Example:
| DEBUG> TRANSL 3000
MAINDEC-10-DFPTA-A-D Page 82
TEST DESCRIPTIONS SEQ 0088
|
| CSR: 000000 003000 FQErr MVErr
FILLNX dat
This command fills all of CRAM with special data 'J=.+1,CTL=dat'.
The argument specified is the control field for the microsequencer.
This may be useful when testing out dispatching of the
microsequencer.
If the port is running or halted with an error condition, the
diagnostic stops the port and clears any error condition. If it
changes the state of the port, the diagnostic prints a message to
that effect.
Example: Fill CRAM with JMAP (unconditional jump) instructions:
| DEBUG> FILLNX 2
|
| [Number of CRAM locations loaded = 4096.]
|
| Cram now contains:
|
| 0000/ JMAP J=1
| 0001/ JMAP J=2
| ...
| 7776/ JMAP J=7777
| 7777/ JMAP J=0
FILLPC dat
This command fills all of CRAM with special data 'J=.,CTL=dat'.
The argument specified is the control field for the microsequencer.
This may be useful when testing out dispatching of the
microsequencer.
If the port is running or halted with an error condition, the
diagnostic stops the port and clears any error condition. If it
changes the state of the port, the diagnostic prints a message to
that effect.
Example: Fill CRAM with JMAP (unconditional jump) instructions:
| DEBUG> FILLPC 2
|
| [Number of CRAM locations loaded = 4096.]
|
| Cram now contains:
|
| 0000/ JMAP J=0
| 0001/ JMAP J=1
| ...
| 7776/ JMAP J=7776
| 7777/ JMAP J=7777
MAINDEC-10-DFPTA-A-D Page 83
TEST DESCRIPTIONS SEQ 0089
CCODE
This command determines the setting of each condition code and
prints it out. It loads special microcode to do this but restores
the original contents afterwards.
Some condition codes cannot be seen in their proper state since
this command may change them. These are 'CSR Changed', 'MB Sign',
and 'F Eql Zero', but they are printed anyway. For example:
| What test - CCODE
|
| CC On: CBAV FEQ0 CSRC MVRP PLPE CBLW
| CC Off: GCSR EBPE AFUL BFUL XATN ERQS IACT MSGN CBPE CHER
ESTACK
This command determines the contents of the internal 2910
microsequencer stack. It loads special microcode to do this but
restores the original contents afterwards. For example:
| What test - ESTACK
|
| 2910 Stack:
| Location Contents (addr)
| Top 3042
| -1 733
| -2 140
| -3 5732
| -4 10
ENEXT
ENEXT does an 'examine next' function. Whatever examine or
deposit operation was previously done, the next location or register
is examined. The commands which set up for an examine next are:
ECRAM, DCRAM, BCRAM, ACRAM, ZCRAM, LCRAM, E2901, D2901, Z2901,
ELOCS, DLOCS, and ZLOCS.
DNEXT arg
DNEXT does an 'deposit next' function. Whatever examine or
deposit operation was previously done, the data given is deposited
into the next location or register. No argument is expected on the
BCRAM or ACRAM type of deposit, the data for each field of the
microword will be queried. The commands which set up for an examine
next are: ECRAM, DCRAM, BCRAM, ACRAM, ZCRAM, LCRAM, E2901, D2901,
Z2901, ELOCS, DLOCS, and ZLOCS.
IPRINT
MAINDEC-10-DFPTA-A-D Page 84
TEST DESCRIPTIONS SEQ 0090
This command prints accumulated interrupt activity. The data for
up to 20 interrupts are held in an interrupt data table. This data
can be printed with this command.
Printing can be aborted by typing an altmode or suppressed by
typing a Control-O.
ICLEAR
This command clears the accumulated interrupt activity.
Subsequent interrupts are numbered 1,2,...
IINIT
In the event the PI system got shut off in exec mode, this
command may be given to initialize the interrupt system and set up
40+2n addresses. This may be useful in the event the diagnostic
shuts off the PI system because of too many interrupts - this occurs
after 8192 interrupts.
10.5.3.13 Data Transfer Commands
RDINIT
This command performs initialization in preparation for a read
(port writing into KL10 memory). The diagnostic builds a CCW list
that will transfer the number of words specified by the last SET LEN
command. It also initializes the buffer by filling it with the data
pattern '400000,,000001'.
WRINIT
This command performs initialization in preparation for a write
(port reading KL10 memory). The diagnostic builds a CCW list that
will transfer the number of words specified by the last SET LEN
command. It also initializes the buffer by filling it with the data
pattern selected by the last SET PAT command.
BPRINT n
This command prints buffer contents (n locations). If no length
is specified the diagnostic prints the entire buffer the length of
which is determined by a previous SET LEN command. For example:
| DEBUG> BPRINT 7
|
| Wrd 0. 777777 777777 777777 777777 777777 777777 777777 777777
| Wrd 4. 777777 777777 777777 777777 777777 777777
CCWPNT
MAINDEC-10-DFPTA-A-D Page 85
TEST DESCRIPTIONS SEQ 0091
This command prints the CCW list last generated by a RDINIT,
WRINIT, or START command. Example:
| DEBUG> CCWPNT
|
| CCW List:
| # Op Code Word Cnt Buffer Adr This data transfer is 100000
| - ------- -------- ---------- words long. The buffer is
| 1 Dt-fwd 512 00047000 only 512 words long so the
| .. buffer address remains the
| 304 Dt-fwd-hlt 160 00047000 same for the entire transfer.
LOGPNT
This command prints the logout data last stored by the channel
upon receipt of the 'store' command issued by the microprocessor.
Example:
| DEBUG> LOGPNT
|
| Channel-7 Logout Data
| Loc Contents
| 1 ICW: 000000 000000
| 2 SW1: CLP points to: 0
| 3 Last Updated CCW: 000000 000000 WC=0. ADR=0
COMPAR
Compare data buffer. The data compare is done based on the word
count set up earlier by a SET LEN command. Normally a data compare
could be done after running some microcode which did a data
transfer. No data comparisons are done unless the diagnostic is
specifically requested to do so. Example:
| DEBUG> COMPAR
|
| Data Compare Error:
| Word --Correct Data-- ---Actual Data--
| 2 525252 525252 400000 000001
| 4 525252 525252 400000 000001
| 6 525252 525252 400000 000001
| Words in error = 64.
10.5.3.14 Switches
SWITCH
Enter switch information. Switches can be entered as in the
following example. Usually, though, it is easier just to type the
switch name to turn on or off a switch.
MAINDEC-10-DFPTA-A-D Page 86
TEST DESCRIPTIONS SEQ 0092
| DEBUG> SWITCH
|
| Print the selectable pgm switches? (Y or N) - Y
|
| ----Left Side Switches-------- ----Right Side Switches--------
|
| SW KL10 11 Function SW Value Function
| -- ---- ---- -------- -- ----- --------
| 0 400000 100000 Abort 18 400000 Program trace
| ...
|
| Switches = 020010 004000
|
| 20010 LH Switches <# or ?> - ?
|
| Type Y,N,^,CR,^Z
|
| N ABORT -
| N RSTART -
| ...
|
| 4000 RH Switches <# or ?> - ?
|
| Type Y,N,^,CR,^Z
|
| N TRACE -
| N INHFLT -
| ...
SWPRIN
Print current switch settings. Example:
| DEBUG> SWPRIN
|
| Switches: 020010 002000 PNTLPT OPRSEL UDEBUG
NOPNT RELIAB TRACE DSPEAR UDEBUG
PNTLPT TXTINH INHFLT NIPORT MDEBUG
DING OPRSEL INHMSG CIPORT SDEBUG
LOOPER LOOPGM MPROC LDEBUG
ERSTOP LOOPTS MCBUS
PALERS RUNALL
The name of each of these switches can be typed. The result is
to complement the switch setting. If left hand switches are typed
in exec mode an error message is printed.
MAINDEC-10-DFPTA-A-D Page 87
PROGRAM RUN TIME SEQ 0093
11.0 PROGRAM RUN TIME
The run time varies according to the sequence of tests chosen,
the test options selected, and the program switch options selected.
In default mode the run time is approximately 4 minutes per port,
excluding any time taken to print error messages.
Running all of the tests with 'RELIAB' switch set extends the
time by a factor of 4 - to 16 minutes.
------------------------------------------------------------------------
SEQ 0094
VERSION: MAINDEC-10-DFPTA-A Version 0.1
AUTHOR: Richard Stockdale
DATE: December 31, 1983
REASON: Original release.
------------------------------------------------------------------------
DFPTA LST DECDOC VER 00.25 17-OCT-84 09:22:59 PAGE 1
SEQ 0095
DOCUMENT
**************
DFPTA LST
**************
COPYRIGHT 1984
DIGITAL EQUIPMENT CORPORATION
MAYNARD, MASS. 01754
DFPTA LST DECDOC VER 00.25 17-OCT-84 09:22:59 PAGE 2
SEQ 0096
TABLE OF CONTENTS
*******************
1
982 *PARAM* CONSOLE DATA SWITCH ASSIGNMENTS, SEPT 18,1979
1017 *PARAM* PROGRAM/SUBROUTINE PARAMETERS, SEPT 18,1979
1223 ERROR HANDLING UUO DEFINITIONS, SEPT 18,1979
1261 *FIXED* FIXED CONTROL AND DISPATCH STORAGE, SEPT 18,1979
1589 IPA REGISTER STORAGE
3 Externs / Entrys
125 Initialization
295 Test/Command Selection
1627 Test Dispatching
2677 Port Debugger
6881 Program Utility Routines
7744 SPEAR Reporting
7943 Test Execute Routines
10242 Miscellaneous Test Variables
1 EBUS Module Tests
7510 EBUS Module Error Printing Routines
1 MP Control Module: 2910 Basic Instruction Tests
1 EBUS/MPROC 2901 Tests (Part 1)
1 EBUS/MPROC 2901 Tests (Part 2)
30 Register Interference Tests
1 EBUS/MPROC 2901 Tests (Part 3)
DFPTA LST DECDOC VER 00.25 17-OCT-84 09:22:59 PAGE 3
SEQ 0097
TABLE OF CONTENTS
*******************
26 Register Interference Tests
1 EBUS/MPROC 2901 Tests (Part 4)
1 MPROC Module Tests
7115 Miscellaneous Routines
1 CBUS MODULE TESTS
1 CBUS MODULE TESTS
1 Port Controller Utility Package
60 Port Register Read/Write Routines
387 Port Specific Utility Routines
796 PI System Routines
1208 Page Fail Handling Routines
1294 Channel Handling Routines
2017 User Mode Support Routines
2477 Miscellaneous Routines
1 UTILITY Routines Module
64 Printout/Typin Routines
324 Clock Handling Routines
604 TOPS10/20 Related Routines
683 File Handling Routines
870 Data Pattern Generator/Compare Routines
1054 Data Patterns
1332 Switch Handling Routines
DFPTA LST DECDOC VER 00.25 17-OCT-84 09:22:59 PAGE 4
SEQ 0098
TABLE OF CONTENTS
*******************
1864 Miscellaneous Routines
2586 Scope Looping And Error Reporting Routine
DFPTA LST DECDOC VER 00.25 17-OCT-84 09:22:59 PAGE 5
SEQ 0099
*****************************************************************
1 DFPTA TITLE FILE
*****************************************************************
27 Copyright (C) 1982
DIGITAL EQUIPMENT CORPORATION, MAYNARD MASS.
This software is furnished under a license for use only
on a single computer system and may be copied only with
the inclusion of the of the above copyright notice. This
software, or any other copies thereof, may not be provided
or otherwise made available to any other person except for
use on such system and to one who agrees to these license
terms. Title to and ownership of the software shall at all
times remain in DEC.
The information in this document is subject to change
without notice and should not be construed as a commitment
by Digital Equipment Corporation.
DEC assumes no responsibility for the use or reliability
of its software on equipment which is not supplied by DEC.
Author: Dick Stockdale
Maintainer: 36-Bit Diagnostic Engineering
51 Program Parameters
67 Assembly Parameters
98 Channel Logout Status Bits
114 Right Hand Switches
135 Macro Definitions
139 Text macros
166 ASCII text macro
172 RPUT/RGET - Multiple put/get
204 Test descriptor entry generator macros
217 Network Definitions
293 SSTABLE - Single step table entry generator macro
316 ATABLE - Single step table entry generator macro (with EBUF checking)
DFPTA LST DECDOC VER 00.25 17-OCT-84 09:22:59 PAGE 6
SEQ 0100
333 TTABLE - Test execute table entry generator macro
351 CTABLE - Data test execute table entry generator macro
368 ITABLE - Interrupt test execute table entry generator macro
386 Test Dispatch Table Definitions
409 Port CONI/CONO CSR Bit Assignments
442 OPDEF Definitions
462 Bit Definitions For "SCOPE" UUO Handler - Error Message Printer
475 Bit Definitions For Microcode executer routine (MEXEC)
487 Bit Definitions For Test executer routine (TEXEC)
504 Bit Definitions For Data Test executer routine (CEXEC)
521 Bit Definitions For Interrupt Test executer routine (IEXEC)
538 Microword Field Definitions
938 Microword Macros (Note: If ADDR not specified, 'ADDR'+1 is used).
*****************************************************************
982 *PARAM* CONSOLE DATA SWITCH ASSIGNMENTS, SEPT 18,1979
*****************************************************************
987 DATA SWITCHES (READ FROM CONSOLE IN EXEC MODE OR TYPED IN IN USER MODE)
LEFT HALF SWITCHES ARE PRE-ASSIGNED FOR SUBROUTINE PACKAGE USE
AND CONTROL LOOPING, PRINTING (TTY OR OTHER DEVICE) AND MISC. FUNCTIONS
*****************************************************************
1017 *PARAM* PROGRAM/SUBROUTINE PARAMETERS, SEPT 18,1979
*****************************************************************
1020 SPECIAL SUBPROGRAM LINKAGES
1031 SPECIAL SUBROUTINE FATAL HALTS
USED TO REPORT ERRORS THAT CAUSE THE SUBROUTINES TO BE UNUSABLE
DFPTA LST DECDOC VER 00.25 17-OCT-84 09:22:59 PAGE 7
SEQ 0101
*****************************************************************
1223 ERROR HANDLING UUO DEFINITIONS, SEPT 18,1979
*****************************************************************
*****************************************************************
1261 *FIXED* FIXED CONTROL AND DISPATCH STORAGE, SEPT 18,1979
*****************************************************************
*****************************************************************
1589 IPA REGISTER STORAGE
*****************************************************************
*****************************************************************
3 Externs / Entrys
*****************************************************************
*****************************************************************
125 Initialization
*****************************************************************
*****************************************************************
295 Test/Command Selection
*****************************************************************
298 DISPAT - Routine to dispatch to proper test as typed by the operator
in response to the 'WHAT TEST' prompt.
536 INDLIS - List of classes that may be specified with individual test numbers
548 DISLIS -- List of all valid test names that can be typed
617 DISGO - Test dispatch addresses
691 MBUS - Execute MBUS related tests
734 ALL Execute all tests
EBUS Execute EBus module tests
SEQ Execute SEQ related tests
ALU Execute 2901 related tests
MPROC Execute MPROC module tests
MBUS Execute MBUS related tests
CBUS Execute CBus module tests
767 ISOPNT - Print fault isolation data
863 Network Data Areas
951 TSTLIS - List test description for all tests.
DFPTA LST DECDOC VER 00.25 17-OCT-84 09:22:59 PAGE 8
SEQ 0102
998 TSTLST - List test description for either single test or class of tests.
1074 TSTDIA - Return to DIAMON
1085 TSTDDT - Enter DDT
1100 TSTHLT - Program halts - CONTINUE will start it back up.
1114 CONFIG - Determine/print device configuration
1193 CONPNT - Print configuration
1226 TSTSEL - Select device(s) to test
1385 TSTHLP - Help for 'WHAT TEST' question.
1469 TSTDSA - Disable a test.
TSTENA - Enable a test.
1516 TSTDSL - List disabled tests
1546 TSTSWI/TSTSWP - Input switches / Print switch selections
1563 TSTSSW - Switch complement commands
1575 TSTTAK - Take commands from a file
TSTTAN - Take commands from a file without echoing results
*****************************************************************
1627 Test Dispatching
*****************************************************************
1630 TSTSPC - Run only one test
1657 RANGEN - Random number generator
1714 TSTDIS - Dispatch to the tests
1970 Test Dispatch List - in sequential order
2230 Test Dispatch List - in order for fault isolation
2531 FLTHAN - Fault handler
2566 FLTCHK - See if this test should fail based on possible modules list
2602 TSTDEC - Decode test specified as XXnnn where XX is the test class
and nnn is the test number.
DFPTA LST DECDOC VER 00.25 17-OCT-84 09:22:59 PAGE 9
SEQ 0103
*****************************************************************
2677 Port Debugger
*****************************************************************
2680 TSTDEB - Console command utility for the port.
2985 .DBCMD - List of acceptable commands
3140 .DBDIS - List of dispatch addresses
3297 DHELP - Print DEBUG> help message
3466 DSET - Set/clear/print options
3513 DSETAD - Set start address for START/SSTEP/CONT commands
3539 DSETCS - Set start CSR data for START/CONT commands
3558 DSETPR - Set/clear automatic parity generation for load cram command
3582 DSETEB - Set/clear preserve EBUF for single stepping
3605 DSETLN - Set length of data transfer
3630 DSETDA - Set data pattern to insert in buffer
3673 DSETFN - Set default microcode file name
3703 DSETWH - Print all selected options
3721 DSETFA - Set failing network
3765 DSETPL - List data patterns
3810 DSETHE - Set help message
3839 Program Flags
3854 DECSR - Examine CSR register
3868 DDCSR - Deposit CSR register
3883 DZCSR - Zero CSR register
3895 DCONI - Loop on CONI's
3908 DCONO - Loop on CONO's
3925 DDATI - Loop on DATAI's
DFPTA LST DECDOC VER 00.25 17-OCT-84 09:22:59 PAGE 10
SEQ 0104
3938 DDATO - Loop on DATAO's
3954 DROUTN - Routine to do special diagnostic loop
3983 DRESET - Issue an EBUS Reset
3994 DCLEAR - Issue a 'Port Clear'
4004 DSINIT - Set up start addr/data/history prior to single step command
4020 DSTART - Start the port
4065 DSTOP - Stop the port
4095 DSSTEP - Single step the port
DTRACE - Single step the port and trace progress
4195 DSSPNT - Print single step history
4219 DSSCLR - Clear single step history data
4240 PNTHST - Print a single step history entry
4263 SAVHST - Save single step history data
4288 DCONT - Continue the port
4316 DEEBUF - Examine EBUF register
4338 DDEBUF - Deposit EBUF register
DZEBUF - Zero EBUF register
4365 DELAR - Examine LAR register
4386 DDRAR - Deposit RAR register
4404 DZRAR - Zero RAR register
4417 DECRAM - Examine CRAM locations specified by "PARG1" and "PARG2".
4425 DDCRAM - Change CRAM locations.
4433 DBCRAM - Change CRAM locations by field
4441 DACRAM - Alter CRAM locations.
4449 DZCRAM -- Zero CRAM addresses specified.
4457 DLCRAM -- List CRAM addresses specified.
DFPTA LST DECDOC VER 00.25 17-OCT-84 09:22:59 PAGE 11
SEQ 0105
5048 DEALU - Examine 2901 registers
5150 DDALU - Deposit register
5227 DZALU - Zero 2901 registers
5345 DELOCS - Examine local storage
5448 DDLOCS - Deposit local storage
5520 DZLOCS - Zero local storage
5637 DMARK - Set mark bit in CRAM locations
5680 DRMARK - Remove mark bit in CRAM locations
5723 DCMARK - Clear all mark bits
5796 DLMARK - List locations with mark bit set
5882 DENEXT - Examine next
5947 DDNEXT - Deposit next
5998 DESTAK - examine 2910 stack
6052 DBREAK - Set breakpoint
6103 DRBRK - Remove breakpoint
6142 DCBRK - Clear all breakpoints
6210 DLBRK - List breakpoints
6299 DLOAD - Load microcode into CRAM from a test.
6334 DLIST - List microcode from test
6363 DFLOAD - Load microcode from file into CRAM
6399 DFVERF - Verify microcode from file versus CRAM
6463 DFLIST - List microcode in file
6492 DFEXAM - Examine microcode in file
6521 DTRANS - Translate CSR bits to English
6536 DCCODE - Print condition codes
DFPTA LST DECDOC VER 00.25 17-OCT-84 09:22:59 PAGE 12
SEQ 0106
6633 DFILLN - Fill CRAM with special data (J=PC+1,OPCode)
6660 DFILLP - Fill CRAM with special data (J=PC,OPCode)
6684 DRDINI - Initialize everything for a read
6711 DWRINI - Initialize everything for a write
6721 DBPNT - Print buffer contents
6754 DCWPNT - Print CCW list
6765 DLGPNT - Print logout data
6779 DCOMPA - Compare data buffer
6799 DSWIT - Switch complement commands
6813 IPRINT - Print interrupt history
6871 IINIT - Initialize interrupt system
*****************************************************************
6881 Program Utility Routines
*****************************************************************
6884 TRACE - Program Trace Routine
6958 TSTGET - Get test related data based on test dispatch address
6999 SELTST - Select a test to run.
7033 CHKTST - Check if this is a valid test to execute and set up test type.
7080 TSTPNT - Print test name/number
7104 ODELAY - Delay a specified amount of time (in milliseconds in AC0)
7137 DDELAY - Delay a specified amount of time (in milliseconds in AC0)
7166 MLOADN - Load microcode and verify it (do not print errors)
MLOADY - Load microcode and verify it (print errors)
7299 MVPNT - Print verify error data
7350 MLIST - List microcode of a test
7388 PNTCRM - Print CRAM word
DFPTA LST DECDOC VER 00.25 17-OCT-84 09:22:59 PAGE 13
SEQ 0107
7473 PNTWD - Print a CRAM word (xxxx xxxx xxxx xxxx xxxx)
7499 CALPAR - Calculate parity for a CRAM location
7550 TLOAD - Load microcode/verify it for a test
7598 CSRPNT - Print CSR register as 'CSR: xxxxxx,,xxxxxx' followed by
English translation.
7618 CSRENG - Print CSR data in English
7652 CSRENB - CSR bits
7699 SAVCRM - Save specified CRAM locations in a buffer
7719 RESCRM - Restore CRAM locations
*****************************************************************
7744 SPEAR Reporting
*****************************************************************
7747 SPREP1 - Print initial SPEAR report 'diagnostic started'
7800 SPREP2 - Print error or successful completion SPEAR report
7929 GETPPN - Find out PPN number
*****************************************************************
7943 Test Execute Routines
*****************************************************************
7946 SEXEC - Execute entries in a 'Single Step Table'
8167 SSPNT - Print out single step data that resulted in an error
8216 AEXEC - ALU type test execute routine
8349 AAPNT - Print results message
8407 BEXEC - Execute entries in a 'Single Step Table', verifying EBUF data
8647 BBPNT - Print out single step data that resulted in an error
8724 TEXEC - Test execute routine
8994 TTPNT - Print out error data
9056 CEXEC - Data test execute routine
DFPTA LST DECDOC VER 00.25 17-OCT-84 09:22:59 PAGE 14
SEQ 0108
9439 CCPNT - Print out error data
9532 IEXEC - Interrupt test execute routine
10065 IIPNT - Print out error data
*****************************************************************
10242 Miscellaneous Test Variables
*****************************************************************
10294 Data Buffer Areas For Reading And Writing
10303 Data transfer paramters
10323 Special code to test SPEAR entries
10366 Special code to produce an EXE version
*****************************************************************
1 EBUS Module Tests
*****************************************************************
47 TEST 1 - Is there an port out there?
96 Test 2 - RH20/Port Interaction
200 Test 3 - RH20/Port Interaction
301 Test 4 - RH20/Port Interaction
405 Test 5 - RH20/Port Interaction
505 Test 6 - CSR Cleared After Reset
567 Test 7 - Read/Write CSR Bits
732 TEST 10 - CSR Bits Interaction
832 TEST 11 - EBUF Access Test
886 TEST 12 - EBUF/CSR Conflict Test
947 TEST 13 - KMUX Parity Generators
1091 TEST 14 - EBUF/CSR Conflict Test
1175 TEST 15 - EBUF Reset Test
1240 TEST 16 - EBUF Data Path Test
DFPTA LST DECDOC VER 00.25 17-OCT-84 09:22:59 PAGE 15
SEQ 0109
1399 TEST 17 - CSR Bit 18 Self Clearing Test
1449 TEST 20 - CSR Bit 18 Reset Test
1500 TEST 21 - CSR Bit 18 Reset Test
1558 TEST 22 - Read/Write EBUF When Ucode Running
1653 TEST 23 - Par Gen - Not Forcing an Error
1838 TEST 24 - Par Gen - Forcing an Error
1928 TEST 25 - Read only CSR Bits
2030 TEST 26 - CSR 01 'DIAG RQST CSR'
2116 TEST 27 - CSR 01 'DIAG RQST CSR'
2206 TEST 30 - CSR 01 'DIAG RQST CSR'
2290 TEST 31 - CSR 01 'DIAG RQST CSR'
2377 TEST 32 - CSR 01 'DIAG RQST CSR'
2456 TEST 33 - CSR 01 'DIAG RQST CSR'
2540 TEST 34 - CSR 02 'DIAG CSR CHNG'
2642 Test 35 - Constant MUX
2876 Test 36 - Constant MUX Interference
2964 TEST 37 - CSR Bit 24 - EBUS PE Occurs at Wrong Time
3021 TEST 40 - EBUS Transfer via DATAO's
3144 TEST 41 - EBUS Transfer via DATAI's
3300 TEST 42 - CSR 05 'Rqst Interrupt'
3378 TEST 43 - CSR 05 'Rqst Interrupt'
3454 TEST 44 - CSR 05 'Rqst Interrupt'
3530 TEST 45 - CSR 06 'CRAM Par Err'
3604 TEST 46 - CSR 07 'MBUS Err'
3684 TEST 47 - CSR 11 'Idle' Bit
DFPTA LST DECDOC VER 00.25 17-OCT-84 09:22:59 PAGE 16
SEQ 0110
3906 TEST 50 - CSR 12 'Disable Complete' Bit
4127 TEST 51 - CSR 13 'Enable Complete' Bit
4346 TEST 52 - x
4358 TEST 53 - MPROC Run Bit
4435 TEST 54 - Basic KMUX Parity Test
4527 TEST 55 - Clearing MPROC Run Bit
4610 TEST 56 - Clearing MPROC Run Bit
4688 TEST 57 - Verify 'Diag Single Cyc'
4764 TEST 60 - PI Level n/0 Interrupts
4948 TEST 61 - Check PIA Level 0
5045 TEST 62 - Check Interrupt on Level 1-7
5172 TEST 63 - CSR 05 'Rqst Interrupt' Clearing
5292 TEST 64 - IOP Function 0 - 40+2N Interrupt
5564 TEST 65 - IOP Function 1 - 40+2N Interrupt
5835 TEST 66 - x
5848 TEST 67 - x
5860 TEST 70 - IOP Function 4 - Examine
6119 TEST 71 - IOP Function 5 - Deposit
6384 TEST 72 - IOP Function 7 - Examine/Increment
6641 TEST 73 - CSR 25-26 & 28 KL-side
6844 TEST 74 - CSR 25-26 & 28 Port-side
7066 TEST 75 - CSR 27 & 30-31 KL-side
7232 TEST 76 - CSR 27 & 30-31 Port-side
DFPTA LST DECDOC VER 00.25 17-OCT-84 09:22:59 PAGE 17
SEQ 0111
*****************************************************************
7510 EBUS Module Error Printing Routines
*****************************************************************
7606 PFPNT - Print page fail data
7624 INTPNT - Print interrupt activity
*****************************************************************
1 MP Control Module: 2910 Basic Instruction Tests
*****************************************************************
34 Test 1 - JMAP Instruction
204 Test 2 - JZ Instruction
319 Test 3 - JZ Instruction - Effect on Reg/Ctr
442 Test 4 - JZ Instruction - Effect on Reg/Ctr
565 Test 5 - CONT Instruction
715 Test 6 - CJP Instruction
807 Test 7 - CJV Instruction
898 Test 10 - CJS Instruction
989 Test 11 - CJS Instruction
1075 Test 12 - CJS Instruction
1168 Test 13 - CRTN Instruction
1250 Test 14 - CRTN Instruction
1367 Test 15 - Stack location #1
1532 Test 16 - Stack location #2
1697 Test 17 - Stack location #3
1864 Test 20 - Stack location #4
2027 Test 21 - Stack location #5
2194 Test 22 - Increment/Decrement Stack Pointer
2285 Test 23 - Increment/Decrement Stack Pointer
DFPTA LST DECDOC VER 00.25 17-OCT-84 09:22:59 PAGE 18
SEQ 0112
2379 Test 24 - Increment/Decrement Stack Pointer
2474 Test 25 - Increment/Decrement Stack Pointer
2571 Test 26 - Increment/Decrement Stack Pointer
2670 Test 27 - x
2680 Test 30 - CJPP Instruction
2779 Test 31 - CJPP Instruction
2903 Test 32 - CJPP Instruction
2993 Test 33 - LDCT Instruction
3070 Test 34 - LDCT Instruction
3174 Test 35 - Register/Counter
3404 Test 36 - JRP Instruction
3509 Test 37 - JSRP Instruction
3625 Test 40 - JSRP Instruction
3742 Test 41 - JSRP Instruction
3832 Test 42 - PUSH Instruction
3952 Test 43 - PUSH Instruction
4059 Test 44 - PUSH Instruction
4155 Test 45 - LOOP Instruction
4266 Test 46 - LOOP Instruction
4374 Test 47 - LOOP Instruction
4477 Test 50 - RFCT Instruction
4779 Test 51 - RFCT Instruction
4879 Test 52 - RFCT Instruction
5067 Test 53 - RFCT Instruction
5440 Test 54 - RPCT Instruction
DFPTA LST DECDOC VER 00.25 17-OCT-84 09:22:59 PAGE 19
SEQ 0113
5558 Test 55 - RPCT Instruction
5807 Test 56 - TWB Instruction
5907 Test 57 - TWB Instruction
5992 Test 60 - TWB Instruction
6083 Test 61 - TWB Instruction
6192 Test 62 - TWB Instruction
6299 Test 63 - TWB Instruction
6383 Test 64 - Stack Interference Tests
6531 Test 65 - Stack Interference Tests
6676 Test 66 - Reg/Ctr Interference Tests
6852 Test 67 - Reg/Ctr Interference Tests
7006 TEST 70 - Full Speed Sequencer Test
*****************************************************************
1 EBUS/MPROC 2901 Tests (Part 1)
*****************************************************************
47 Test 1 - 2901 0's Test
291 Test 2 - 2901 1's Test
649 Test 3 - 2901 OR Test - D OR 0
749 Test 4 - 2901 AND Test - D AND 0
839 Test 5 - 2901 NOT_R_AND_S Test - D NOT_RS 0
929 Test 6 - 2901 XOR Test - D XOR 0
1028 Test 7 - 2901 XNOR Test - D XNOR 0
1127 Test 10 - 2901 R+S Test - D + 0
1226 Test 11 - 2901 R-S Test - D - 0
1325 Test 12 - 2901 S-R Test - 0 - D
1428 Test 13 - 2901 Writing/Reading Registers
DFPTA LST DECDOC VER 00.25 17-OCT-84 09:22:59 PAGE 20
SEQ 0114
1832 Test 14 - 2901 Q-Register Test
1929 Test 15 - 2901 Register Interference Test
2134 Test 16 - 2901 OR Test
2385 Test 17 - 2901 AND Test
2619 Test 20 - 2901 NOT_R_AND_S Test
2865 Test 21 - 2901 XOR Test
3153 Test 22 - 2901 XNOR Test
3520 Test 23 - 2901 R + S Test, No Carry
3847 Test 24 - 2901 R + S Test, With Carry
4178 Test 25 - 2901 R - S Test - Without Carry
4496 Test 26 - 2901 R - S Test - With Carry
4804 Test 27 - 2901 S - R Test - Without Carry
5120 Test 30 - 2901 S - R Test - With Carry
5440 ADDLOG - Routine to logically add 2 numbers
*****************************************************************
1 EBUS/MPROC 2901 Tests (Part 2)
*****************************************************************
*****************************************************************
30 Register Interference Tests
*****************************************************************
33 Test 31 - 2901 Q-Register Interference Test
*****************************************************************
1 EBUS/MPROC 2901 Tests (Part 3)
*****************************************************************
DFPTA LST DECDOC VER 00.25 17-OCT-84 09:22:59 PAGE 21
SEQ 0115
*****************************************************************
26 Register Interference Tests
*****************************************************************
29 TEST 32 - 2901 RAM Register Interference Test
*****************************************************************
1 EBUS/MPROC 2901 Tests (Part 4)
*****************************************************************
31 TEST 33 - Q-Register Shift
199 TEST 34 - Q-Register Right/Left Shift
357 TEST 35 - RAM Register Shift
1024 TEST 36 - RAM Data Movement Test
1383 TEST 37 - RAM/Q-Register Data Movement Test
1582 TEST 40 - RAM Data Movement/Shifting Test
1781 TEST 41 - RAM/Q-Reg Data Movement/Shifting Test
1977 TEST 42 - 2901 Register / Constant Mux Test
*****************************************************************
1 MPROC Module Tests
*****************************************************************
45 TEST 1 - CRAM Data Test (RAR12=0)
207 TEST 2 - CRAM Test (RAR12=1)
302 TEST 3 - CRAM Addressing Test
390 TEST 4 - RAR/LAR Data Path Test - LDCRAM
505 TEST 5 - RAR/LAR Data Path Test - RDCRAM
625 TEST 6 - Cram Ctrl Register Test
874 TEST 7 - Cram Ctrl Register Test
1123 TEST 10 - MBUS Error Test (MPROC module only)
1242 TEST 11 - MBUS Error Test (CBUS module only)
1336 TEST 12 - MBUS Error Test (MPROC module only)
DFPTA LST DECDOC VER 00.25 17-OCT-84 09:22:59 PAGE 22
SEQ 0116
1481 TEST 13 - MBUS Error Test (CBUS module only)
1586 TEST 14 - CCCbusAvail Test
1879 TEST 15 - CCGrntCSR Test
2137 TEST 16 - CCFEQ0 Test
2721 TEST 17 - CCCSRChng Test
2945 TEST 20 - CCEbParErr Test
3123 TEST 21 - CCRcvrBufAFul Test
3315 TEST 22 - CCRcvrBufBFul Test
3507 TEST 23 - CCXmtrAttn Test
3699 TEST 24 - CCEbusRqst Test
3911 TEST 25 - CCIntrActive Test
4115 TEST 26 - CCMBSign Test
4312 TEST 27 - CCMVParChk Test
4610 TEST 30 - CCCbusParErr Test
4851 TEST 31 - CCPliParErr Test
5178 TEST 32 - CCChanErr Test
5461 TEST 33 - CCCbLstWd Test
5694 TEST 34 - Basic Local Store Test
5826 TEST 35 - Local Store Data Test
6555 TEST 36 - Local Store Address Test
6759 TEST 37 - Local Store RAM Mode Test
6871 Test 40 - Jump Mux Test
6973 TEST 41 - CRAM Control Register Parity Generators Test
DFPTA LST DECDOC VER 00.25 17-OCT-84 09:22:59 PAGE 23
SEQ 0117
*****************************************************************
7115 Miscellaneous Routines
*****************************************************************
*****************************************************************
1 CBUS MODULE TESTS
*****************************************************************
41 Test 1 - Fmtr Data Loopback
621 Test 2 - PLI Buffer Data Loopback
836 Test 3 - CBUS to EBUF Data Transfer
977 Test 4 - 2901 to CBUS Data Transfer
1133 Test 5 - CBUS to 2901 Multiple word Transfer
1462 Test 6 - 2901 to CBUS Multiple word Transfer
1829 Test 7 - CBUS to EBUS Data Transfer
2113 Test 10 - EBUS to CBUS Data Transfer
2413 Test 11 - Fmtr Cleared by 'Port Clear'
2491 Test 12 - Fmtr Basic Up Shifting Test
2606 Test 13 - Fmtr Up Shift 4 Test - BUS Ctl=Cbus
2917 Test 14 - Fmtr Up Shift 4 Test - BUS Ctl=Fmtr
3227 Test 15 - Fmtr Up Shift 4 (from PLIN) Test - SELRHTNIB=0
3552 Test 16 - Fmtr Up Shift 4 (from PLIN) Test - SELRHTNIB=0
3875 Test 17 - Fmtr Up Shift 4 (from PLIN) Test - SELRHTNIB=1
4198 Test 20 - Fmtr Up Shift 4 (from PLIN) Test - SELRHTNIB=1
4522 Test 21 - Fmtr Up Shift 8 (from PLIN) Test - SELRHTNIB=0
4810 Test 22 - Fmtr Up Shift 8 (from PLIN) Test - SELRHTNIB=0
5097 Test 23 - Fmtr Up Shift 8 (from PLIN) Test - SELRHTNIB=1
5383 Test 24 - Fmtr Up Shift 8 (from PLIN) Test - SELRHTNIB=1
5672 Test 25 - Fmtr Basic Down Shifting Test
DFPTA LST DECDOC VER 00.25 17-OCT-84 09:22:59 PAGE 24
SEQ 0118
5786 Test 26 - Fmtr Down Shift 4 Test
6105 Test 27 - Fmtr Down Shift 4 (from PLIN) Test - SELRHTNIB=0
6433 Test 30 - Fmtr Down Shift 4 (from PLIN) Test - SELRHTNIB=0
6759 Test 31 - Fmtr Down Shift 4 (from PLIN) Test - SELRHTNIB=1
7087 Test 32 - Fmtr Down Shift 4 (from PLIN) Test - SELRHTNIB=1
7415 Test 33 - Fmtr Down Shift 8 (from PLIN) Test - SELRHTNIB=0
7707 Test 34 - Fmtr Down Shift 8 (from PLIN) Test - SELRHTNIB=0
7998 Test 35 - Fmtr Down Shift 8 (from PLIN) Test - SELRHTNIB=1
8288 Test 36 - Fmtr Down Shift 8 (from PLIN) Test - SELRHTNIB=1
8577 Test 37 - Fmtr Ring Buffer Test
*****************************************************************
1 CBUS MODULE TESTS
*****************************************************************
33 Test 40 - CMUX Selected by PLINTOCMUX
225 Test 41 - CBUF Loaded Correctly
465 Test 42 - PMUX Selected by MPCBUFTOPLOUT
576 Test 43 - PMUX Selected by MPCBUFTOPLOUT/MPZEROLFTNIB
687 Test 44 - DMUX Selected Correctly
915 Test 45 - CBUS Parity Checking - CBUS to CBUS Module
1121 Test 46 - CBUS Parity Checking - CBUS Module to CBUS
1286 Test 47 - CBUS Parity Checking - CBUS to CBUS Module
1532 Test 50 - T Field Timing Test
1673 Test 51 - CBUS Store
1902 Test 52 - CBUS Input Buffer
1988 Test 53 - Parity Predictor - CBIN to Fmtr/MPINDSTCOMP=0
2331 Test 54 - Parity Predictor - CBIN to Fmtr/MPINDSTCOMP=1
DFPTA LST DECDOC VER 00.25 17-OCT-84 09:22:59 PAGE 25
SEQ 0119
2660 Test 55 - Parity Predictor - Fmtr to PLOUT
2956 Test 56 - Parity Predictor - PLIN to Fmtr/MPCOREDUMP=0
3256 Test 57 - Parity Predictor - PLIN to Fmtr/MPCOREDUMP=1
3568 Test 60 - Parity Predictor - Fmtr to CBOUT
*****************************************************************
1 Port Controller Utility Package
*****************************************************************
*****************************************************************
60 Port Register Read/Write Routines
*****************************************************************
63 Notes On I/O Routine Design
113 Port Register Load Routines
125 LDEBUF - Load EBUF
142 LDCSR - Load CSR (This is simply a CONO).
156 LDRAR - Load RAR
182 LDCRAM - Load CRAM
203 Port Register Read Routines
220 RDEBUF - Read EBUF
237 RDCSR - Read CSR
255 RDLAR - Read LAR
279 RDCRAM - Read CRAM
297 .CONI - Do a simple CONI (no error checking)
317 .CONO - Do a simple CONO
337 .DATAI - Do a simple DATAI (no error checking)
357 .DATAO - Do a simple DATAO
376 ERESET - Issue an EBUS reset
DFPTA LST DECDOC VER 00.25 17-OCT-84 09:22:59 PAGE 26
SEQ 0120
*****************************************************************
387 Port Specific Utility Routines
*****************************************************************
390 ISTOP - Stop IPA either by a port clear or by clearing the CSR register
437 IPACLR - Issue a port clear
448 SETEBU - Check that 'Diag Test EBUF' bit is set in CSR and set if not.
470 SETLAR - Check that 'Diag Sel LAR' bit is set in CSR and set if not.
491 CLREBU - Check that 'Diag Test EBUF' is not set in CSR and clear if is.
512 CHKCSR - Check if error bits are set in the CSR register
541 IPASRT - Start the port at the address given in 'SADDR' and with
initial parameters given in 'SDATA'.
623 IPASTP - Stop the port
689 IPASST - Single step the port at the address given in 'SNEXT' and
with initial parameters given in 'SDATA'.
*****************************************************************
796 PI System Routines
*****************************************************************
799 INITPI - Initialize and Turn On PI System
841 .PIOFF - Detach port from PI system
857 .PION - Attach port to PI system (Channel 4)
875 PISYOF - Turn PI system off
884 PISYON - Turn PI system on
892 SETVEC - Set up interrupt vectors for an port under test
918 SET2N - Set up 40 + 2N locations with interrupt dispatch instruction
940 VIINT - Vectored interrupt (Port)
1007 NVIINx - Non-Vectored interrupt (Port)
1159 .INPNT - Print special interrupt data
DFPTA LST DECDOC VER 00.25 17-OCT-84 09:22:59 PAGE 27
SEQ 0121
*****************************************************************
1208 Page Fail Handling Routines
*****************************************************************
1211 PFSET - Set up EPT locations 500-502 to handle page fails
1244 PFCLR - Restore EPT locations 500-502 to original values
1258 PFCHK - Check reason for page fail and dispatch appropriately
*****************************************************************
1294 Channel Handling Routines
*****************************************************************
1297 Routines To Interface With A Channel
1333 CHINIT - Channel Initialization Routine
1391 GENCCW - Channel Command Word Generator
1543 GRINDF - Subroutine to build a forward transfer CCW list.
1569 ******** Next 2 instructions are ommitted for DFPTA tests. ****************
******** This causes every CCW to start at same memory location. **********
1594 CCWST - RH20 CCW Store Routine
1620 GETLOG - Snapshot The Channel Logout Area
1658 LOGPNT - Channel Logout Printer
1732 CCWPNT - Channel Command List Printer
1822 CHP20 - Builds a TOPS20 User Mode Channel Program
1887 CHP10 - Builds a TOPS10 Channel Command List
1941 DIAGER - Report Monitor Call Error In User Mode
1965 Some Channel Routine Variables
1996 CHDATA - Obtain channel logout data and inspect results
DFPTA LST DECDOC VER 00.25 17-OCT-84 09:22:59 PAGE 28
SEQ 0122
*****************************************************************
2017 User Mode Support Routines
*****************************************************************
2020 DSETUP - Setup Routine For Diagnostic Function
2108 CPUTST - Determine Which Of 2 CPU's To Run On
2151 DEVREL - User Mode Release Routine
2241 DEVREQ - User Mode Request Routine
2333 ENDIAG - Enable the NI/CI port
2352 DGEPNT - Decode and print DIAG error
2414 USRION/USRIOF - Turn User I/O Privileges On/Off
2456 ENABLE - Enable Capabilities of This Process
*****************************************************************
2477 Miscellaneous Routines
*****************************************************************
2480 FFF - Routine To Handle Fatals
*****************************************************************
1 UTILITY Routines Module
*****************************************************************
*****************************************************************
64 Printout/Typin Routines
*****************************************************************
67 CONVSX - Convert sixbit to octal
110 ALTCHH - Handle altmode intercept
135 CLRBUF - Clear input buffer
152 TTYYES - Answer yes or no question
182 PSDN - Prints signed decimal numbers
207 .PNTOC - Print n digit octal number with leading zeros suppressed
247 PPDEC - Print decimal number in a field of size x.
286 PPDECF - Force print decimal number in a field of size x.
DFPTA LST DECDOC VER 00.25 17-OCT-84 09:22:59 PAGE 29
SEQ 0123
*****************************************************************
324 Clock Handling Routines
*****************************************************************
327 STCLOK - Initialize program runtime clock
369 MONTIM - Read program runtime from monitor
403 PTIME - Print time of day
421 RUNTME - Calculate and print program runtime
529 PSTAMP - Check for an 'S' typed.
570 LSTAMP - Check for an 'S' typed.
*****************************************************************
604 TOPS10/20 Related Routines
*****************************************************************
607 .RESET - Subroutine to issue a RESET JSYS/UUO
626 .CLOSE - Subroutine to close opened files
654 .EXIT - Subroutine to exit job in user mode
*****************************************************************
683 File Handling Routines
*****************************************************************
686 FINIT - Initialize reading of microcode file
712 CHRIN - Routine to read an ASCII character from the selected file.
722 CHRINS - Routine to read an ASCII character from the selected file.
749 FFAIL - Routine to report "DIAMON" open failure on a selected file.
767 FGETW - Get microword entry from file
815 FGETA - Obtain microcode load address 'ADDR:' from file
842 FGETD - Obtain microcode data entry from file (4 digits).
DFPTA LST DECDOC VER 00.25 17-OCT-84 09:22:59 PAGE 30
SEQ 0124
*****************************************************************
870 Data Pattern Generator/Compare Routines
*****************************************************************
873 BUFGEN - Generate the specified data pattern in the data buffer.
BUFCOM - Compare the data buffer with expected data
1012 DATMES - A data comparison error has been found. Report the error,
printing a maximum of three lines of errors.
*****************************************************************
1054 Data Patterns
*****************************************************************
1057 Data Patterns
1240 PATPNT - Translate pattern number to description
*****************************************************************
1332 Switch Handling Routines
*****************************************************************
1335 .SWCHP - Print switch settings in English
1403 SWITT - Get value of switches
1416 .ISWT - Complete switch handling
1513 .SLEFT - Input left hand switches
1578 .SRIGT - Enter right hand switches
1749 SWCHPT - Prints current state of switches
1761 SWCOM - Switch complement routine (AC1 has switch command number 0-n)
*****************************************************************
1864 Miscellaneous Routines
*****************************************************************
1867 PARSER - Additional CPU parity error service
1915 .COMM - Match a command entered against a command table.
1966 .COMM2 - Compare command typed to table to see if valid
2002 .SARG - Obtain SIXBIT argument
2090 .OARG - Obtain octal argument
DFPTA LST DECDOC VER 00.25 17-OCT-84 09:22:59 PAGE 31
SEQ 0125
2181 DECYN - Decode an argument which should be NO or YES
2209 .DARG - Obtain octal/decimal argument
2303 CHKARG - Check for argument when there shouldn't be any
2350 LASARG - Check for last argument when there shouldn't be any more
2393 FIOFF - Routine to turn off the 'file input' switch
2411 FINCMD - Input a sixbit command from a file
2461 FSARG - Input a sixbit argument from a file
2511 FOARG - Input a octal argument from a file
2575 FEOL - Skip characters until end of line is reached
*****************************************************************
2586 Scope Looping And Error Reporting Routine
*****************************************************************
2589 SCOPE1 - Error reporter and scope loop controller
DFPTA MACRO %53A(1152) 09:26 16-Oct-84 Page 1
DFPTAT MAC 18-Apr-83 11:33 DFPTA TITLE FILE SEQ 0126
1 SUBTTL DFPTA TITLE FILE
2
3 SALL
4
5 UNIVERSAL DFPTA
6 SEARCH MONSYM
7
8 EXTERN START,STARTA,PGMNAM,SCOPE1
9 EXTERN PPDEC,PPDECF,ALTCHH,.PNTOC
10
11 .REQUIRE DFPTA1
12 .REQUIRE DFPTA2
13 .REQUIRE DFPTA3
14 .REQUIRE DFPTA4
15 .REQUIRE DFPTA5
16 .REQUIRE DFPTA6
17 .REQUIRE DFPTA7
18 .REQUIRE DFPTA8
19 .REQUIRE DFPTA9
20 .REQUIRE DFPTAA
21 .REQUIRE DFPTAI
22 .REQUIRE DFPTAU
23
24 000000 MCNVER==0
25 000001 DECVER==1
26
27 ;* Copyright (C) 1982
28 ;* DIGITAL EQUIPMENT CORPORATION, MAYNARD MASS.
29 ;*
30 ;* This software is furnished under a license for use only
31 ;* on a single computer system and may be copied only with
32 ;* the inclusion of the of the above copyright notice. This
33 ;* software, or any other copies thereof, may not be provided
34 ;* or otherwise made available to any other person except for
35 ;* use on such system and to one who agrees to these license
36 ;* terms. Title to and ownership of the software shall at all
37 ;* times remain in DEC.
38 ;*
39 ;* The information in this document is subject to change
40 ;* without notice and should not be construed as a commitment
41 ;* by Digital Equipment Corporation.
42 ;*
43 ;* DEC assumes no responsibility for the use or reliability
44 ;* of its software on equipment which is not supplied by DEC.
45 ;*
46 ;* Author: Dick Stockdale
47 ;* Maintainer: 36-Bit Diagnostic Engineering
48
DFPTA MACRO %53A(1152) 09:26 16-Oct-84 Page 2
DFPTAT MAC 18-Apr-83 11:33 DFPTA TITLE FILE SEQ 0127
49
50 ;#********************************************************************
51 ;* Program Parameters
52 ;#********************************************************************
53
54 ; AC Assignments.
55
56 000014 PAT=14 ; data pattern in use
57 000015 ERFLG=15 ; error flag (gets cleared by SCOPER)
58 000016 MBCN=16 ; channel 54000,,0 to 57400,,0
59 000017 P=17 ; stack pointer
60
61 ; Size Of Channel Control Word Buffer
62
63 000315 CBUFSZ==^D205 ; 200 words (enough for 102400 words)
64
65
66 ;#********************************************************************
67 ;* Assembly Parameters
68 ;#********************************************************************
69
70 000005 ITERAT==5 ; default to 5 passes
71 000001 KL10==1 ; assemble for KL10
72 000001 EXCASB==1 ; assemble for exec mode
73 000001 USRASB==1 ; assemble for user mode
74 000001 MEMMAP==1 ; allow memory to be mapped
75
76 000001 $LPAPER==1 ; don't list literals
77
78 030000 SADR1=BEGIN
79 030000 SADR2=BEGIN
80 030000 SADR3=BEGIN
81 030007 SADR4=SRTDDT
82 000000* SADR5=START ; ^C restart
83 030007 SADR6=SRTDDT
84 254200 000000* SADR7=HALT START
85 254200 000000* SADR8=HALT START
86 254200 000000* SADR9=HALT START
87 254200 000000* SADR10=HALT START
88 254200 000000* SADR11=HALT START
89
90 711523 655207 PAREA1==711523,,655207 ; random number base
91 000000 PAREA2==0
92 444660 644100 PAREA3==SIXBIT/DFPTA/
93 605664 000000 PAREA4==SIXBIT/PNT/
94 000000 PAREA5==0
95 000000 PAREA6==0
DFPTA MACRO %53A(1152) 09:26 16-Oct-84 Page 3
DFPTAT MAC 18-Apr-83 11:33 DFPTA TITLE FILE SEQ 0128
96
97 ;#************************************************************
98 ;* Channel Logout Status Bits
99 ;#************************************************************
100
101 400000 000000 LOGO==1B0 ; channel log out bit
102 200000 000000 MPER==1B1 ; memory parity error
103 100000 000000 ADRPE==1B2 ; set when no address parity error
104 040000 000000 NOTWC0==1B3 ; not word count zero
105 020000 000000 NEXM==1B4 ; non-existant memory
106 000400 000000 LAXER==1B9 ; last xfer error
107 000200 000000 IPAER==1B10 ; IPA20 error
108 000100 000000 LGWC==1B11 ; long word count
109 000040 000000 SHWC==1B12 ; short word count
110 000020 000000 OVN==1B13 ; overrrun
111
112
113 ;#********************************************************************
114 ;* Right Hand Switches
115 ;#********************************************************************
116
117 400000 TRACET==1B18 ; program test # trace feature
118 200000 INHFLT==1B19 ; inhibit fault isolation
119 100000 INHMSG==1B20 ; inhibit error message printout
120 040000 LOOPGM==1B21 ; loop on program
121 020000 LOOPTS==1B22 ; loop on test
122 010000 RUNALL==1B23 ; run all segments of a test
123 004000 DSPEAR==1B24 ; disable SPEAR switch
124 002000 DEBUG1==1B25 ; debug mode (debug without a port)
125 001000 DEBUG2==1B26 ; debug mode (print error messages)
126 000400 DEBUG3==1B27 ; debug mode (print single step data)
127 000200 DEBUG4==1B28 ; debug mode (don't load test ucode)
128 000100 DEBUG5==1B29 ; debug mode (for fault isolation)
129 000040 NIPORT==1B30 ; NI port
130 000020 CIPORT==1B31 ; CI port
131 000002 MMPROC==1B34 ; missing Mproc module
132 000001 MCBUS==1B35 ; missing Cbus module
DFPTA MACRO %53A(1152) 09:26 16-Oct-84 Page 4
DFPTAT MAC 18-Apr-83 11:33 DFPTA TITLE FILE SEQ 0129
133
134 ;#*********************************************************************
135 ;* Macro Definitions
136 ;#*********************************************************************
137
138 ;#********************************************************************
139 ;* Text macros
140 ;#********************************************************************
141
142 DEFINE TMSG(TEXT),<PNTMSG [ASCIZ ^TEXT^]>
143
144 DEFINE TMSGC(TEXT),<PNTMSG [ASCIZ ^
145 TEXT^]>
146
147 DEFINE TMSGD(TEXT),<PNTMSG [ASCIZ ^TEXT
148 ^]>
149
150 DEFINE TMSGCD(TEXT),<PNTMSG [ASCIZ ^
151 TEXT
152 ^]>
153 DEFINE FMSG(TEXT),<PNTMSF [ASCIZ ^TEXT^]>
154
155 DEFINE FMSGC(TEXT),<PNTMSF [ASCIZ ^
156 TEXT^]>
157
158 DEFINE FMSGD(TEXT),<PNTMSF [ASCIZ ^TEXT
159 ^]>
160
161 DEFINE FMSGCD(TEXT),<PNTMSF [ASCIZ ^
162 TEXT
163 ^]>
164
165 ;#********************************************************************
166 ;* ASCII text macro
167 ;#********************************************************************
168
169 DEFINE TASCIZ (TEXT)<[ASCIZ /TEXT/]>
DFPTA MACRO %53A(1152) 09:26 16-Oct-84 Page 5
DFPTAT MAC 18-Apr-83 11:33 DFPTA TITLE FILE SEQ 0130
170
171 ;#********************************************************************
172 ;* RPUT/RGET - Multiple put/get
173 ;#********************************************************************
174
175 DEFINE RPUT (R0,R1<-1>,R2<-1>,R3<-1>,R4<-1>,R5<-1>,R6<-1>,R7<-1>,R8<-1>,R9<-1>)<
176 PUT R0
177 XLIST
178 IFGE R1,<PUT R1>
179 IFGE R2,<PUT R2>
180 IFGE R3,<PUT R3>
181 IFGE R4,<PUT R4>
182 IFGE R5,<PUT R5>
183 IFGE R6,<PUT R6>
184 IFGE R7,<PUT R7>
185 IFGE R8,<PUT R8>
186 IFGE R9,<PUT R9>
187 LIST>
188
189 DEFINE RGET (R0,R1<-1>,R2<-1>,R3<-1>,R4<-1>,R5<-1>,R6<-1>,R7<-1>,R8<-1>,R9<-1>)<
190 GET R0
191 XLIST
192 IFGE R1,<GET R1>
193 IFGE R2,<GET R2>
194 IFGE R3,<GET R3>
195 IFGE R4,<GET R4>
196 IFGE R5,<GET R5>
197 IFGE R6,<GET R6>
198 IFGE R7,<GET R7>
199 IFGE R8,<GET R8>
200 IFGE R9,<GET R9>
201 LIST>
DFPTA MACRO %53A(1152) 09:26 16-Oct-84 Page 6
DFPTAT MAC 18-Apr-83 11:33 DFPTA TITLE FILE SEQ 0131
202
203 ;#********************************************************************
204 ;* Test descriptor entry generator macros
205 ;#********************************************************************
206
207 000003 TENLEN==3 ; length of test descriptor entry
208
209 DEFINE TEST (TADD,TMASK,TMCODE,TDESC)<
210 XLIST
211 TMASK!TADD
212 TMCODE,,[ASCIZ ^TDESC^]
213 LIST>
214
215
216 ;#********************************************************************
217 ;* Network Definitions
218 ;#********************************************************************
219
220 000001 E1==1
221 000002 E2==2
222 000003 E3==3
223 000004 E4==4
224 000005 E5==5
225 000006 E6==6
226 000007 E7==7
227 000010 E8==^D8
228 000011 E9==^D9
229 000012 E10==^D10
230 000013 E11==^D11
231 000014 E12==^D12
232 000015 E13==^D13
233 000016 E14==^D14
234 000017 E15==^D15
235 000020 E16==^D16
236 000021 E17==^D17
237 000022 E18==^D18
238 000023 E19==^D19
239 000024 E20==^D20
240 000025 E21==^D21
241 000026 E22==^D22
242 000027 E23==^D23
243 000030 E24==^D24
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244
245 000031 M1==^D25
246 000032 M2==^D26
247 000033 M3==^D27
248 000034 M4==^D28
249 000035 M5==^D29
250 000036 M6==^D30
251 000037 M7==^D31
252 000040 M8==^D32
253 000041 M9==^D33
254 000042 M10==^D34
255 000043 M11==^D35
256 000044 M12==^D36
257 000045 M13==^D37
258 000046 M14==^D38
259 000047 M15==^D39
260 000050 M16==^D40
261 000051 M17==^D41
262 000052 M18==^D42
263 000053 M19==^D43
264
265 000054 C1==^D44
266 000055 C2==^D45
267 000056 C3==^D46
268 000057 C4==^D47
269 000060 C5==^D48
270 000061 C6==^D49
271 000062 C7==^D50
272 000063 C8==^D51
273 000064 C9==^D52
274 000065 C10==^D53
275 000066 C11==^D54
276 000067 C12==^D55
277 000070 C13==^D56
278 000071 C14==^D57
279 000072 C15==^D58
280 000073 C16==^D59
281 000074 C17==^D60
282 000075 C18==^D61
283 000076 C19==^D62
284 000077 C20==^D63
285 000100 C21==^D64
286 000101 C22==^D65
287 000102 C23==^D66
288 000103 C24==^D67
289
290 400000 000000 MLAST==1B0
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291
292 ;#********************************************************************
293 ;* SSTABLE - Single step table entry generator macro
294 ;
295 ; SSLAST - No arguments used
296 ; SSSTRT - Arguments: ARG1 - # ssteps
297 ; ARG2 - Start address
298 ; ARG3 - End address
299 ; SSCONT - Arguments: ARG1 - # ssteps
300 ; ARG2 - End address
301 ; SSCALL - Argument: ARG1 - Routine address
302 ; SSCHK -- Argument: ARG1 - Routine address
303 ; SSJRST - Argument: ARG1 - Table address
304 ;#********************************************************************
305
306 DEFINE STABLE (CMD,ARG1,ARG2,ARG3)<
307 IFE CMD,<0> ; SSLAST
308 IFE CMD-1,<1B2!ARG1_^D24!ARG2_^D12!ARG3>; SSTRT
309 IFE CMD-2,<2B2!ARG1_^D24!ARG2> ; SSCONT
310 IFE CMD-3,<3B2!ARG1> ; SSCALL
311 IFE CMD-4,<4B2!ARG1> ; SSCHK
312 IFE CMD-5,<5B2!ARG1>> ; SSJRST
313
314
315 ;#********************************************************************
316 ;* ATABLE - Single step table entry generator macro (with EBUF checking)
317 ;
318 ; This is same as STABLE except that an additional word is used to
319 ; save the correct EBUF contents.
320 ;#********************************************************************
321
322 DEFINE ATABLE (CMD,ARG1,ARG2,ARG3,ARG4<0>)<
323 IFE CMD,<0> ; SSLAST
324 IFE CMD-1,<1B2!ARG1_^D24!ARG2_^D12!ARG3>; SSTRT
325 IFE CMD-2,<2B2!ARG1_^D24!ARG2> ; SSCONT
326 IFE CMD-3,<3B2!ARG1> ; SSCALL
327 IFE CMD-4,<4B2!ARG1> ; SSCHK
328 IFE CMD-5,<5B2!ARG1> ; SSJRST
329 IFE CMD-1,<ARG4>
330 IFE CMD-2,<ARG4>>
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331
332 ;#********************************************************************
333 ;* TTABLE - Test execute table entry generator macro
334 ;
335 ; This is same as STABLE except for different command definitions.
336 ;#********************************************************************
337
338 DEFINE TTABLE (CMD,ARG1,ARG2<0>)<
339 IFE CMD,<0> ; TLAST
340 IFE CMD-1,<1B3!ARG1> ; TSTART
341 IFE CMD-2,<2B3!ARG1> ; TCONT
342 IFE CMD-3,<3B3!ARG1> ; TCALL
343 IFE CMD-4,<4B3!ARG1> ; TCALLC
344 IFE CMD-5,<5B3!ARG1_^D18!ARG2> ; TCHECK
345 IFE CMD-6,<6B3!ARG1> ; TJRST
346 IFE CMD-7,<7B3!ARG1> ; TEXIT
347 IFE CMD-10,<10B3!ARG1>> ; TSSTAR
348
349
350 ;#********************************************************************
351 ;* CTABLE - Data test execute table entry generator macro
352 ;#********************************************************************
353
354 DEFINE CTABLE (CMD,ARG1,ARG2)<
355 IFE CMD,<0> ; CLAST
356 IFE CMD-1,<1B3!ARG1_^D18!ARG2> ; CSETRD
357 IFE CMD-2,<2B3!ARG1_^D18!ARG2> ; CSETWR
358 IFE CMD-3,<3B3!ARG1_^D18!ARG2> ; CSETRW
359 IFE CMD-4,<4B3!ARG1> ; CSTART
360 IFE CMD-5,<5B3!ARG1> ; CCALL
361 IFE CMD-6,<6B3!ARG1> ; CCALLC
362 IFE CMD-7,<7B3!ARG1_^D18!ARG2> ; CWAIT
363 IFE CMD-10,<10B3> ; CCOMP
364 IFE CMD-11,<11B3!ARG1> ; CJRST
365 IFE CMD-12,<12B3>> ; CEXIT
366
367 ;#********************************************************************
368 ;* ITABLE - Interrupt test execute table entry generator macro
369 ;#********************************************************************
370
371 DEFINE ITABLE (CMD,ARG1,ARG2)<
372 IFE CMD,<0> ; ILAST
373 IFE CMD-1,<1B3!ARG1_^D18!ARG2> ; ISETEX
374 IFE CMD-2,<2B3!ARG1_^D18!ARG2> ; ISETDE
375 IFE CMD-3,<3B3!ARG1_^D18!ARG2> ; ISETID
376 IFE CMD-4,<4B3!ARG1_^D18!ARG2> ; ISETIN
377 IFE CMD-5,<5B3!ARG1_^D18!ARG2> ; ISETEI
378 IFE CMD-6,<6B3!ARG1> ; ICALL
379 IFE CMD-7,<7B3!ARG1> ; ICALLC
380 IFE CMD-10,<10B3!ARG1> ; IWAIT
381 IFE CMD-11,<11B3!ARG1> ; IJRST
382 IFE CMD-12,<12B3!ARG1> ; ISTART
383 IFE CMD-13,<13B3>> ; IEXIT
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384
385 ;#********************************************************************
386 ;* Test Dispatch Table Definitions
387 ;#********************************************************************
388
389 400000 000000 EBUS==1B0 ; EBus tests
390 200000 000000 MPROC==1B1 ; Mproc tests
391 100000 000000 CBUS==1B2 ; CBus tests
392 040000 000000 SEQ==1B3 ; 2910 tests
393 020000 000000 ALU==1B4 ; 2901 tests
394 010000 000000 MBUS==1B5 ; MBUS tests
395 770000 000000 ALL==77B5 ; All tests
396
397 000000 ZEBUS==0B17 ; EBUS class test
398 000001 000000 ZSEQ==1B17 ; SEQ class test
399 000002 000000 ZALU==2B17 ; ALU class test
400 000003 000000 ZMPROC==3B17 ; MPROC class test
401 000004 000000 ZCBUS==4B17 ; CBUS class test
402
403 001000 000000 TUSER==1B8 ; cannot run test in user mode
404 000400 000000 NDMP==1B9 ; need Mproc module to run
405 000200 000000 NDCB==1B10 ; need Mproc & CBus module to run
406 000100 000000 TDENA==1B11 ; test dispatch enable (0-yes,1-no)
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407
408 ;#*********************************************************************
409 ;* Port CONI/CONO CSR Bit Assignments
410 ;#*********************************************************************
411
412 400000 000000 PORTP==1B0 ; port present
413 200000 000000 CSRRQS==1B1 ; diag request CSR
414 100000 000000 CSRCHN==1B2 ; diag CSR changed
415 040000 000000 DINIT==1B3 ; diag initialized
416 010000 000000 RQINT==1B5 ; request interrupt
417 004000 000000 CRAMPE==1B6 ; CRAM parity error
418 002000 000000 MBERR==1B7 ; MBUS error
419 000100 000000 IDLE==1B11 ; IDLE loop
420 000040 000000 DCOMP==1B12 ; disable complete
421 000020 000000 ECOMP==1B13 ; enable complete
422 400000 PCLEAR==1B18 ; port clear
423 200000 TSTEBF==1B19 ; diag test EBUF
424 100000 GENEPE==1B20 ; diag generate EBUS parity error
425 040000 SELLAR==1B21 ; diag select LAR/SQR
426 020000 SINCYC==1B22 ; diag single cycle
427 010000 SPARE1==1B23 ; spare bit
428 004000 EBUSPE==1B24 ; EBUS parity error
429 002000 FQUERR==1B25 ; free queue error
430 001000 MVRERR==1B26 ; data mover error
431 000400 CMDQAV==1B27 ; command queue available
432 000200 RESQAV==1B28 ; response queue available
433 000100 SPARE2==1B29 ; spare bit
434 000040 PDSABL==1B30 ; disable
435 000020 PENABL==1B31 ; enable
436 000010 MPRUN==1B32 ; mproc run
437 000004 PIA00==1B33 ; PIA field bit 0
438 000002 PIA01==1B34 ; PIA field bit 1
439 000001 PIA02==1B35 ; PIA field bit 2
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440
441 ;#*********************************************************************
442 ;* OPDEF Definitions
443 ;#*********************************************************************
444
445 104000 000000 OPDEF JSYS [104000,,0] ; TOPS-20 command
446 104000 000100 OPDEF CFIBF [JSYS 100] ; clear TOPS-20 input buffer
447
448 001000 000000 OPDEF PNTOCC [1B8] ; print n digits leading 0's suppressed
449 002000 000000 OPDEF PDECF [2B8] ; force print decimal number
450 006000 000000 OPDEF PDEC [6B8] ; print decimal number
451 007000 000000 OPDEF ALTCHK [7B8] ; check for altmode character typed
452 027000 000000 OPDEF SCOPER [27B8] ; error handler UUO
453
454 000000* LUUO1==.PNTOC ; service routine for n digit octal
455 000000* LUUO2==PPDECF ; force print decimal number
456 000000* LUUO6==PPDEC ; print decimal number
457 000000* LUUO7==ALTCHH ; check if an altmode was typed
458 000000* LUUO27=SCOPE1 ; scope loop/error print routine
459
460
461 ;#*********************************************************************
462 ;* Bit Definitions For "SCOPE" UUO Handler - Error Message Printer
463 ;#*********************************************************************
464
465 100000 000000 MSG==1B2 ; ASCIZ message
466 200000 000000 CALL==2B2 ; call special print routine
467 300000 000000 GOTO==3B2 ; goto (new address of error table)
468 040000 000000 TXNOT==1B3 ; print/call entry if TXTINH not set
469 020000 000000 TXYES==1B4 ; print/call entry if TXTINH set
470 060000 000000 TXALL==3B4 ; print/call entry always
471 010000 000000 LAST==1B5 ; last table entry
472
473
474 ;#*********************************************************************
475 ;* Bit Definitions For Microcode executer routine (MEXEC)
476 ;#*********************************************************************
477
478 000000 SSLAST==0 ; last entry
479 000001 SSSTRT==1 ; single step with start addr given
480 000002 SSCONT==2 ; single step without start addr given
481 000003 SSCALL==3 ; call a routine
482 000004 SSCHK== 4 ; call a routine and exit + 1 if test
483 ; is complete, + 2 if not.
484 000005 SSJRST==5 ; go to new table location
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485
486 ;#*********************************************************************
487 ;* Bit Definitions For Test executer routine (TEXEC)
488 ;#*********************************************************************
489
490 000000 TLAST==0 ; last entry
491 000001 TSTART==1 ; start port at a particular address
492 000002 TCONT==2 ; continue from where stopped
493 000003 TCALL==3 ; call routine
494 000004 TCALLC==4 ; call routine and conditionally
495 ; exit test
496 000005 TCHECK==5 ; check CSR for completion code
497 000006 TJRST==6 ; go to new table location
498 000007 TEXIT==7 ; exit test (if any error yet)
499 000010 TSSTAR==10 ; start port at a particular address
500 ; without doing a port clear first
501
502
503 ;#*********************************************************************
504 ;* Bit Definitions For Data Test executer routine (CEXEC)
505 ;#*********************************************************************
506
507 000000 CLAST==0 ; last entry
508 000001 CSETRD==1 ; set up read data transfer
509 000002 CSETWR==2 ; set up write data transfer
510 000003 CSETRW==3 ; set up read/write data transfer
511 000004 CSTART==4 ; start port at particular address
512 000005 CCALL==5 ; call routine
513 000006 CCALLC==6 ; call routine/conditionally exit test
514 000007 CWAIT==7 ; wait for DT completion
515 000010 CCOMP==10 ; compare data buffer
516 000011 CJRST==11 ; go to new table location
517 000012 CEXIT==12 ; exit test (if any error yet)
518
519
520 ;#*********************************************************************
521 ;* Bit Definitions For Interrupt Test executer routine (IEXEC)
522 ;#*********************************************************************
523
524 000000 ILAST==0 ; last entry
525 000001 ISETEX==1 ; set up examine
526 000002 ISETDE==2 ; set up deposit
527 000003 ISETID==3 ; set up increment/decrement
528 000004 ISETIN==4 ; set up interrupt
529 000005 ISETEI==5 ; set up examine/increment
530 000006 ICALL==6 ; call routine
531 000007 ICALLC==7 ; call routine/conditionally exit test
532 000010 IWAIT==10 ; wait for interrupt completion
533 000011 IJRST==11 ; go to new table location
534 000012 ISTART==12 ; start port at particular address
535 000013 IEXIT==13 ; exit test (if any error yet)
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536
537 ;#********************************************************************
538 ;* Microword Field Definitions
539 ;
540 ; These definitions are arranged for the macro which generates pairs
541 ; of microwords as (addr & parity flags & left 20 bits,right 36 bits).
542 ; These are of the form:
543 ;
544 ; Word 1: Bits 00-11 - Microword load address (0000-7777)
545 ; 12-35 - Bits 0-23 of microword to load
546 ; Word 2: Bits 00-34 - Bits 24-57,59 of microword to load
547 ; 35 ---- Force Bad Parity flag
548 ;
549 ; In detail:
550 ;
551 ; Word 1: Bits 00-11 - Microword load address
552 ; 12-23 - MWJMPFLD
553 ; 24 - MWPAR
554 ; 25 - MWOUTPUTENA
555 ; 26-35 - MWMGCFLD
556 ;
557 ; Word 2: Bits 00-02 - MWSORCEFLD
558 ; 03-05 - MWFUNCTFLD
559 ; 06-08 - MWDESTFLD
560 ; 09 - MWCCENA
561 ; 10 - MWRAMODE
562 ; 11-14 - MWPORTAFLD
563 ; 15-18 - MWPORTBFLD
564 ; 19-23 - MWSKIPFLD
565 ; 24-26 - MWBUSCTLFLD
566 ; 27 - MWCARRY
567 ; 28-31 - MWCTRLFLD
568 ; 32 - MWTIMEFLD
569 ; 33 - MWSPARE00
570 ; 34 - MWMARKBIT
571 ;
572 ; 35 - Force bad parity flag
573 ;
574 ; The microwords are generated using a set of field definitions
575 ; describing how the two words are to be constructed. Each field
576 ; is defined as a bit position in the first word, a bit position
577 ; in the right word, and a magnitude describing the size of the
578 ; field. These are defined as follows:
579 ;
580 ; .Lxxxx - Specifies the rightmost bit position of the field
581 ; in the left word. If the field does not appear in
582 ; left word, this will be zero.
583 ;
584 ; .Rxxxx - Specifies the rightmost bit position of the field
585 ; in the right word. If the field does not appear
586 ; in right word, this will be zero.
587 ;
588 ; .Mxxxx - Specifies the maximum magnitude of the field in
589 ; the word.
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590
591 ; The microwords are generated as follows:
592 ;
593 ; Left word = ((value AND .Mxxxx) times .Lxxxx) ! next field ...
594 ; Right word = ((value AND .Mxxxx) times .Rxxxx) ! next field ...
595 ;
596 ; Parity is calculated prior to loading into the CRAM. The parity
597 ; bit may be specified explicitly by specifying EVEN or ODD. The
598 ; microcode loader will ensure that the word has the specified
599 ; parity. If not specified, the correct parity will be calculated.
600 ;
601 ; Sample microword definitions:
602 ;
603 ; (a) Specify: J 1000, OUTENA, SORCE fld = 2, DEST fld = 3
604 ; load address = 120
605 ;
606 ; Type: MWORD <ADDR=120,J=1000,OENA,SORC=2,DEST=3>
607 ;#********************************************************************
608
609 000100 000000 .LADDR==1B11 ; MW load address
610 000000 .RADDR==0
611 007777 .MADDR==7777
612
613 010000 .LJ==1B23 ; MW jump field (00:11)
614 000000 .RJ==0
615 007777 .MJ==7777
616
617 004000 .LPAR==1B24 ; MW parity (12:12)
618 000000 .RPAR==0
619 000001 .MPAR==1
620
621 002000 .LOENA==1B25 ; MW output enable (13:13)
622 000000 .ROENA==0
623 000001 .MOENA==1
624
625 000001 .LMGC==1B35 ; MW magic number field (14:23)
626 000000 .RMGC==0
627 001777 .MMGC==1777
628
629 000000 .LSORC==0 ; MW source field (24:26)
630 100000 000000 .RSORC==1B2
631 000007 .MSORC==7
632
633 000000 .LSAQ==0 ; Source = AQ
634 000000 .RSAQ==0B2
635 000007 .MSAQ==7
636
637 000000 .LSAB==0 ; Source = AB
638 100000 000000 .RSAB==1B2
639 000007 .MSAB==7
640
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641 000000 .LS0Q==0 ; Source = 0Q
642 200000 000000 .RS0Q==2B2
643 000007 .MS0Q==7
644
645 000000 .LS0B==0 ; Source = 0B
646 300000 000000 .RS0B==3B2
647 000007 .MS0B==7
648
649 000000 .LS0A==0 ; Source = 0A
650 400000 000000 .RS0A==4B2
651 000007 .MS0A==7
652
653 000000 .LSDA==0 ; Source = DA
654 500000 000000 .RSDA==5B2
655 000007 .MSDA==7
656
657 000000 .LSDQ==0 ; Source = DQ
658 600000 000000 .RSDQ==6B2
659 000007 .MSDQ==7
660
661 000000 .LSD0==0 ; Source = D0
662 700000 000000 .RSD0==7B2
663 000007 .MSD0==7
664
665 000000 .LFUNC==0 ; MW function field (27:29)
666 010000 000000 .RFUNC==1B5
667 000007 .MFUNC==7
668
669 000000 .LPLUS==0 ; R PLUS S function
670 000000 .RPLUS==0B5
671 000007 .MPLUS==7
672
673 000000 .LSMIN==0 ; R MINUS S function
674 010000 000000 .RSMIN==1B5
675 000007 .MSMIN==7
676
677 000000 .LRMIN==0 ; R MINUS S function
678 020000 000000 .RRMIN==2B5
679 000007 .MRMIN==7
680
681 000000 .LOR==0 ; R OR S function
682 030000 000000 .ROR==3B5
683 000007 .MOR==7
684
685 000000 .LAND==0 ; R AND S function
686 040000 000000 .RAND==4B5
687 000007 .MAND==7
688
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689 000000 .LNAND==0 ; NOT R AND S function
690 050000 000000 .RNAND==5B5
691 000007 .MNAND==7
692
693 000000 .LXOR==0 ; R XOR S function
694 060000 000000 .RXOR==6B5
695 000007 .MXOR==7
696
697 000000 .LXNOR==0 ; R XNOR S function
698 070000 000000 .RXNOR==7B5
699 000007 .MXNOR==7
700
701 000000 .LD==0 ; MW destination field (30:32)
702 001000 000000 .RD==1B8
703 000007 .MD==7
704
705 000000 .LCENA==0 ; MW CC enable (33:33)
706 000400 000000 .RCENA==1B9
707 000001 .MCENA==1
708
709 000000 .LDISA==0 ; MW CC disable
710 000000 .RDISA==0B9
711 000001 .MDISA==1
712
713 000000 .LENA==0 ; MW CC enable
714 000400 000000 .RENA==1B9
715 000001 .MENA==1
716
717 000000 .LRAM==0 ; MW RAM mode (34:34)
718 000200 000000 .RRAM==1B10
719 000001 .MRAM==1
720
721 000000 .LA==0 ; MW Port A field (35:38)
722 000010 000000 .RA==1B14
723 000017 .MA==17
724
725 000000 .LB==0 ; MW Port B field (39:42)
726 400000 .RB==1B18
727 000017 .MB==17
728
729 000000 .LSK==0 ; MW skip field (43:47)
730 010000 .RSK==1B23
731 000037 .MSK==37
732
733 000000 .LCCON==0 ; Select CC 'on' (CCCSRCHNG)
734 030000 .RCCON==03B23
735 000037 .MCCON==37
736
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737 000000 .LCCOF==0 ; Select CC 'off' (CCGRNTCSR)
738 010000 .RCCOF==01B23
739 000037 .MCCOF==37
740
741 000000 .LCCCA==0 ; Select CCCBUSAVAIL
742 000000 .RCCCA==0B23
743 000037 .MCCCA==37
744
745 000000 .LCCGC==0 ; Select CCGRNTCSR
746 010000 .RCCGC==01B23
747 000037 .MCCGC==37
748
749 000000 .LCCFZ==0 ; Select CCFEQ0
750 020000 .RCCFZ==02B23
751 000037 .MCCFZ==37
752
753 000000 .LCCCC==0 ; Select CCCSRCHNG
754 030000 .RCCCC==03B23
755 000037 .MCCCC==37
756
757 000000 .LCCEB==0 ; Select CCEBPARERR
758 040000 .RCCEB==4B23
759 000037 .MCCEB==37
760
761 000000 .LCCAF==0 ; Select CCRCVRBUFAFUL
762 050000 .RCCAF==5B23
763 000037 .MCCAF==37
764
765 000000 .LCCBF==0 ; Select CCRCVRBUFBFUL
766 060000 .RCCBF==6B23
767 000037 .MCCBF==37
768
769 000000 .LCCXA==0 ; Select CCXMTRATTN
770 070000 .RCCXA==7B23
771 000037 .MCCXA==37
772
773 000000 .LCCER==0 ; Select CCEBUSRQST
774 100000 .RCCER==10B23
775 000037 .MCCER==37
776
777 000000 .LCCIA==0 ; Select CCINTRACTIVE
778 110000 .RCCIA==11B23
779 000037 .MCCIA==37
780
781 000000 .LCCMB==0 ; Select CCMBSIGN
782 120000 .RCCMB==12B23
783 000037 .MCCMB==37
784
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785 000000 .LCCMP==0 ; Select CCMVRPARCHK
786 130000 .RCCMP==13B23
787 000037 .MCCMP==37
788
789 000000 .LCCCP==0 ; Select CCCBUSPARERR
790 140000 .RCCCP==14B23
791 000037 .MCCCP==37
792
793 000000 .LCCPP==0 ; Select CCPLIPARERR
794 150000 .RCCPP==15B23
795 000037 .MCCPP==37
796
797 000000 .LCCCE==0 ; Select CCCHANERR
798 160000 .RCCCE==16B23
799 000037 .MCCCE==37
800
801 000000 .LCCLW==0 ; Select CCCBLSTWD
802 170000 .RCCLW==17B23
803 000037 .MCCLW==37
804
805 000000 .LLSAD==0 ; Load SAD Reg
806 200000 .RLSAD==20B23
807 000037 .MLSAD==37
808
809 000000 .LSKMB==0 ; Select MBUS field
810 210000 .RSKMB==21B23
811 000037 .MSKMB==37
812
813 000000 .LLDLM==0 ; Load Local Mem
814 230000 .RLDLM==23B23
815 000037 .MLDLM==37
816
817 000000 .LRDLM==0 ; Read Local Mem
818 220000 .RRDLM==22B23
819 000037 .MRDLM==37
820
821 000000 .LSKCN==0 ; Select constant field
822 240000 .RSKCN==24B23
823 000037 .MSKCN==37
824
825 000000 .LBUS==0 ; MW bus control field (48:50)
826 001000 .RBUS==1B26
827 000007 .MBUS==7
828
829 000000 .LSELP==0 ; Select PLI field
830 001000 .RSELP==1B26
831 000007 .MSELP==7
832
833 000000 .LSELM==0 ; Select Mbus field
834 002000 .RSELM==2B26
835 000007 .MSELM==7
836
DFPTA MACRO %53A(1152) 09:26 16-Oct-84 Page 20
DFPTAT MAC 18-Apr-83 11:33 DFPTA TITLE FILE SEQ 0145
837 000000 .LSELF==0 ; Select Fmtr field
838 003000 .RSELF==3B26
839 000007 .MSELF==7
840
841 000000 .LSELC==0 ; Select Cbus field
842 004000 .RSELC==4B26
843 000007 .MSELC==7
844
845 000000 .LSELE==0 ; Select Ebus field
846 005000 .RSELE==5B26
847 000007 .MSELE==7
848
849 000000 .LCRY==0 ; MW carry (51:51)
850 000400 .RCRY==1B27
851 000001 .MCRY==1
852
853 000000 .LOP==0 ; MW control field (52:55)
854 000020 .ROP==1B31
855 000017 .MOP==17
856
857 000000 .LJZ==0 ; Jump zero instruction
858 000000 .RJZ==00B31
859 000017 .MJZ==17
860
861 000000 .LCJS==0 ; Conditional JSB pipeline instruction
862 000020 .RCJS==01B31
863 000017 .MCJS==17
864
865 000000 .LJMAP==0 ; Jump MAP instruction
866 000040 .RJMAP==02B31
867 000017 .MJMAP==17
868
869 000000 .LCJP==0 ; Conditional jump pipeline instruction
870 000060 .RCJP==03B31
871 000017 .MCJP==17
872
873 000000 .LPUSH==0 ; Push/cond load counter instruction
874 000100 .RPUSH==04B31
875 000017 .MPUSH==17
876
877 000000 .LJSRP==0 ; Cond JSB R/Pipeline instruction
878 000120 .RJSRP==05B31
879 000017 .MJSRP==17
880
881 000000 .LCJV==0 ; Conditional jump vector instruction
882 000140 .RCJV==06B31
883 000017 .MCJV==17
884
DFPTA MACRO %53A(1152) 09:26 16-Oct-84 Page 21
DFPTAT MAC 18-Apr-83 11:33 DFPTA TITLE FILE SEQ 0146
885 000000 .LJRP==0 ; Cond jump R/Pipeline instruction
886 000160 .RJRP==07B31
887 000017 .MJRP==17
888
889 000000 .LRFCT==0 ; Repeat loop, counter#0 instruction
890 000200 .RRFCT==10B31
891 000017 .MRFCT==17
892
893 000000 .LRPCT==0 ; Repeat pipeline, counter#0 instr
894 000220 .RRPCT==11B31
895 000017 .MRPCT==17
896
897 000000 .LCRTN==0 ; Conditional RTN instruction
898 000240 .RCRTN==12B31
899 000017 .MCRTN==17
900
901 000000 .LCJPP==0 ; Cond jump pipeline and pop instr
902 000260 .RCJPP==13B31
903 000017 .MCJPP==17
904
905 000000 .LLDCT==0 ; Load counter and continue instruction
906 000300 .RLDCT==14B31
907 000017 .MLDCT==17
908
909 000000 .LLOOP==0 ; Test end loop instruction
910 000320 .RLOOP==15B31
911 000017 .MLOOP==17
912
913 000000 .LCONT==0 ; Continue instruction
914 000340 .RCONT==16B31
915 000017 .MCONT==17
916
917 000000 .LTWB==0 ; Three way branch instruction
918 000360 .RTWB==17B31
919 000017 .MTWB==17
920
921 000000 .LTIM==0 ; time field
922 000010 .RTIM==1B32
923 000001 .MTIM==1
924
925 000000 .LSPAR==0 ; 1st spare bit
926 000004 .RSPAR==1B33
927 000001 .MSPAR==1
928
929 000000 .LMARK==0 ; mark bit
930 000002 .RMARK==1B34
931 000001 .MMARK==1
932
933 000000 .LBAD==0 ; force bad parity
934 000001 .RBAD==1B35
935 000001 .MBAD==1
DFPTA MACRO %53A(1152) 09:26 16-Oct-84 Page 22
DFPTAT MAC 18-Apr-83 11:33 DFPTA TITLE FILE SEQ 0147
936
937 ;#********************************************************************
938 ;* Microword Macros (Note: If ADDR not specified, 'ADDR'+1 is used).
939 ;
940 ; Left word = ((value AND .Mxxxx) times .Lxxxx) ! next field ...
941 ; Right word = ((value AND .Mxxxx) times .Rxxxx) ! next field ...
942 ;
943 ; Samples: MWORD <J=1000,OENA,SORC=2,DEST=3>
944 ; MWORD <J=0,OENA,SORC=2,DEST=3>
945 ;#********************************************************************
946
947 ; CALC - Insert field value into the microwords under construction
948
949 DEFINE CALC($ARG1)<
950 IFE .L'$ARG1-1B11,<%ADDR==$ARG2>
951 IFN .L'$ARG1-1B11,<%ML=%ML!<<$ARG2&.M'$ARG1>*.L'$ARG1>
952 %MR=%MR!<<$ARG2&.M'$ARG1>*.R'$ARG1>>>
953
954 ; CONCAT - Build string argument
955
956 DEFINE CONCAT($A)<
957 $B=<SIXBIT /$A/>_-36 ; get right justified character in
958 $CHR=$CHR_6+$B> ; octal and accumulate in string
959
960 ; FIELD - Decode argument in the form XXXX=NNNN into XXXX and NNNN
961
962 DEFINE FIELD($ARG)<
963 $CHR=0 ; init string argument
964 $GARG=0 ; init numeric argument
965 IRPC $ARG,<IFN $GARG,<$ARG2=$ARG2*8+$ARG>
966 IFIDN "=",$ARG,<$GARG=1
967 $ARG2=0>
968 IFE $GARG,<CONCAT $ARG>
969 IFE $GARG,<$ARG2=1>>
970 CALC \'$CHR> ; enter into microword
971
972 ; MWORD - Build microwords
973
974 DEFINE MWORD ($FLD)<
975 %ML==0 ; init left word
976 %MR==0 ; init right word
977 IRP $FLD,<DEFINE MFLD($A)<FIELD $A>
978 MFLD $FLD>
979 %ML==%ML!%ADDR_^D24
980 %ADDR==%ADDR+1
981 EXP %ML,%MR> ; done
DFPTA MACRO %53A(1152) 09:26 16-Oct-84 Page 1
PARAM KLM 18-Sep-79 17:16 *PARAM* CONSOLE DATA SWITCH ASSIGNMENTS, SEPT 18,1979 SEQ 0148
982 SUBTTL *PARAM* CONSOLE DATA SWITCH ASSIGNMENTS, SEPT 18,1979
983
984 DEFINE S,<; *********************************************************************>
985
986 ; **********************************************************************
987 ;*DATA SWITCHES (READ FROM CONSOLE IN EXEC MODE OR TYPED IN IN USER MODE)
988 ;*LEFT HALF SWITCHES ARE PRE-ASSIGNED FOR SUBROUTINE PACKAGE USE
989 ;*AND CONTROL LOOPING, PRINTING (TTY OR OTHER DEVICE) AND MISC. FUNCTIONS
990 ; **********************************************************************
991
992 400000 ABORT== 400000 ;ABORT PROGRAM ON PASS COMPLETION
993 200000 RSTART==200000 ;RESTART TEST, PRINT TOTALS
994 100000 TOTALS==100000 ;PRINT TOTALS, CONTINUE
995
996 040000 NOPNT== 040000 ;INHIBIT ALL PRINT/TYPE OUT (EXCEPT FORCED)
997 020000 PNTLPT==020000 ;PRINT ALL DATA ON LPT (LOGICAL DEVICE, USER MODE)
998 010000 DING== 010000 ;RING BELL ON ERROR
999
1000 004000 LOOPER==004000 ;ENTER EXERCISE/CHECK LOOP ON ERROR
1001 002000 ERSTOP==002000 ;HALT ON TEST ERROR
1002 001000 PALERS==001000 ;PRINT ALL ERRORS
1003
1004 000400 RELIAB==000400 ;RELIABILITY MODE
1005 000200 TXTINH==000200 ;INHIBIT ERROR TEXT
1006 000100 INHPAG==000100 ;INHIBIT PAGING
1007
1008 000040 MODDVC==000040 ;MODIFY DEVICE CODE
1009 000020 INHCSH==000020 ;INHIBIT CACHE
1010 000010 OPRSEL==000010 ;OPERATOR SELECTION
1011
1012 000004 CHAIN== 000004 ;CHAIN CONTROL SWITCH
1013
1014 000002 KAHZ50==000002 ;KA10 50 HERTZ POWER
1015
1016 ;SWITCH 17 RESERVED !!!
DFPTA MACRO %53A(1152) 09:26 16-Oct-84 Page 2
PARAM KLM 18-Sep-79 17:16 *PARAM* PROGRAM/SUBROUTINE PARAMETERS, SEPT 18,1979 SEQ 0149
1017 SUBTTL *PARAM* PROGRAM/SUBROUTINE PARAMETERS, SEPT 18,1979
1018
1019 ; **********************************************************************
1020 ;*SPECIAL SUBPROGRAM LINKAGES
1021 ; **********************************************************************
1022
1023 027772 FSELNK= 27772 ;FILE SELECT LINK
1024 027773 FRDLNK= 27773 ;FILE READ LINK
1025 027774 LDLNK= 27774 ;LOAD LINKAGE ADDRESS
1026 027775 DDTLNK= 27775 ;DDT LINKAGE ADDRESS
1027 027776 MODLNK= 27776 ;OPERATIONAL MODE CHECK LINKAGE ADDRESS
1028 027777 SUBLNK= 27777 ;SUBROUTINE LINKAGE ADDRESS
1029
1030 ; **********************************************************************
1031 ;*SPECIAL SUBROUTINE FATAL HALTS
1032 ;*USED TO REPORT ERRORS THAT CAUSE THE SUBROUTINES TO BE UNUSABLE
1033 ; **********************************************************************
1034
1035 ;ADDRESS TAG REASON
1036 ;---------------------
1037
1038 ; 1010 NOEXEC ;PROGRAM NOT CODED FOR EXEC MODE OPERATION
1039 ; 1011 PLERR ;FATAL PUSH LIST POINTER ERROR
1040 ; 1012 PLERR1 ;INITIAL PUSH LIST POINTER ERROR
1041 ; 1013 MUOERR ;MUUO WITH LUUO HANDLER WIPED OUT
1042 ; 1014 DTEBER ;DTE20 INTERRUPT WITHOUT DOORBELL
1043 ; 1015 DTECER ;DTE20 CLOCK INTERRUPT WITHOUT FLAG SET
1044 ; 1016 CPIERR ;CPU INITIALIZATION ERROR
1045 ; 1017 EOPERR ;END OF PROGRAM ERROR
1046 ; 1020 LUOERR ;INTERRUPT WITH LUUO HANDLER WIPED OUT
1047
1048 ; **********************************************************************
DFPTA MACRO %53A(1152) 09:26 16-Oct-84 Page 3
PARAM KLM 18-Sep-79 17:16 *PARAM* PROGRAM/SUBROUTINE PARAMETERS, SEPT 18,1979 SEQ 0150
1049 ; **********************************************************************
1050 ;OPERATOR DEFINITIONS (NON-UUO'S)
1051 ; **********************************************************************
1052
1053 260740 000000 OPDEF GO [PUSHJ P,] ;SUBROUTINE CALL
1054 263740 000000 OPDEF RTN [POPJ P,] ;SUBROUTINE RETURN
1055 261740 000000 OPDEF PUT [PUSH P,] ;PUT DATA ON PUSH LIST
1056 262740 000000 OPDEF GET [POP P,] ;GET DATA FROM PUSH LIST
1057 254000 000000 OPDEF PJRST [JRST ] ;JRST TO ROUTINE THAT RTN'S
1058 254200 000000 OPDEF HALT [JRST 4,] ;DEFINITION FOR DDT
1059 254100 000000 OPDEF JRSTF [JRST 2,] ;DEFINITION FOR DDT
1060 254500 000000 OPDEF JEN [JRST 12,] ;DEFINITION FOR DDT
1061
1062 ; **********************************************************************
1063 ;SUBROUTINE INITIALIZATION CALL
1064 ; **********************************************************************
1065
1066 265000 030011 OPDEF PGMINT [JSP 0,SBINIT] ;SUBROUTINE INITIALIZATION
1067
1068 ; **********************************************************************
1069 ;HALTING UUO'S (A MORE GRACEFUL HALT THAN SIMPLY USING THE HALT INSTRUCTION).
1070 ; **********************************************************************
1071
1072 037640 000004 OPDEF FATAL [37B8!15B12!4] ;FATAL PROGRAMMING HALT
1073 037600 000004 OPDEF ERRHLT [37B8!14B12!4] ;PROGRAM ERROR HALT
1074
1075 ; **********************************************************************
1076 ;TERMINAL INPUT UUO'S
1077 ;ALWAYS COME FROM THE CONSOLE TERMINAL IN EXEC MODE OR THE
1078 ;CONTROLLING TERMINAL (REAL TERMINAL OR PTY) IN USER MODE.
1079 ; **********************************************************************
1080
1081 037000 000003 OPDEF TTICHR [37B8!0B12!3] ;TTY, INPUT ANY CHARACTER
1082 037040 000003 OPDEF TTIYES [37B8!1B12!3] ;TTY, NORMAL RETURN Y
1083 037100 000003 OPDEF TTINO [37B8!2B12!3] ;TTY, NORMAL RETURN N
1084 037140 000003 OPDEF TTIOCT [37B8!3B12!3] ;TTY, INPUT OCTAL WORD
1085 037200 000003 OPDEF TTIDEC [37B8!4B12!3] ;TTY, INPUT DECIMAL WORD
1086 037240 000003 OPDEF TTICNV [37B8!5B12!3] ;TTY, INPUT CONVERTABLE WORD
1087 037300 000003 OPDEF TTLOOK [37B8!6B12!3] ;TTY, KEYBOARD CHECK
1088 037340 000003 OPDEF TTALTM [37B8!7B12!3] ;TTY, ALT-MODE CHECK
1089 037400 000003 OPDEF TTSIXB [37B8!10B12!3] ;TTY, INPUT SIXBIT WORD
1090 037440 000003 OPDEF TTYINP [37B8!11B12!3] ;TTY, IMAGE MODE INPUT
1091 037500 000003 OPDEF TTICLR [37B8!12B12!3] ;TTY, CLEAR INPUT
DFPTA MACRO %53A(1152) 09:26 16-Oct-84 Page 4
PARAM KLM 18-Sep-79 17:16 *PARAM* PROGRAM/SUBROUTINE PARAMETERS, SEPT 18,1979 SEQ 0151
1092 ;TERMINAL OUTPUT UUO'S.
1093
1094 037000 000000 OPDEF PNTA [37B8!0B12!0] ;PRINT ASCII WORD
1095 037000 000001 OPDEF PNTAF [37B8!0B12!1] ;PRINT ASCII WORD FORCED
1096 037740 000000 OPDEF PNTAL [37B8!17B12!0] ;PRINT ASCIZ LINE
1097 037740 000001 OPDEF PNTALF [37B8!17B12!1] ;PRINT ASCIZ LINE FORCED
1098 037600 000003 OPDEF PSIXL [37B8!14B12!3] ;PRINT SIXBIT'Z LINE
1099 037640 000003 OPDEF PSIXLF [37B8!15B12!3] ;PRINT SIXBIT'Z LINE FORCED
1100 037000 000000 OPDEF PNTMSG [37B8!0B12!0] ;PRINT MESSAGE IMMEDIATE
1101 037040 000000 OPDEF PNTMSF [37B8!1B12!0] ;PRINT MESSAGE IMMEDIATE FORCED
1102 037100 000000 OPDEF PSIXM [37B8!2B12!0] ;PRINT SIXBIT'Z MSG IMMEDIATE
1103 037200 000000 OPDEF PSIXMF [37B8!4B12!0] ;PRINT SIXBIT'Z MSG IMM FORCED
1104 037000 000000 OPDEF PNTCI [37B8!0B12!0] ;PRINT CHARACTER IMMEDIATE
1105 037040 000000 OPDEF PNTCIF [37B8!1B12!0] ;PRINT CHARACTER IMMEDIATE FORCED
1106 037500 000000 OPDEF PNTCHR [37B8!12B12!0] ;PRINT CHARACTER
1107 037500 000001 OPDEF PNTCHF [37B8!12B12!1] ;PRINT CHARACTER FORCED
1108 037040 000000 OPDEF PNT1 [37B8!1B12!0] ;PRINT ONE OCTAL DIGIT
1109 037040 000001 OPDEF PNT1F [37B8!1B12!1] ;PRINT 1 OCTAL DIGIT FORCED
1110 037100 000000 OPDEF PNT2 [37B8!2B12!0] ;PRINT TWO OCTAL DIGITS
1111 037100 000001 OPDEF PNT2F [37B8!2B12!1] ;PRINT 2 OCTAL DIGITS FORCED
1112 037140 000000 OPDEF PNT3 [37B8!3B12!0] ;PRINT THREE OCTAL DIGITS
1113 037140 000001 OPDEF PNT3F [37B8!3B12!1] ;PRINT THREE OCTAL DIGITS FORCED
1114 037200 000000 OPDEF PNT4 [37B8!4B12!0] ;PRINT FOUR OCTAL DIGITS
1115 037200 000001 OPDEF PNT4F [37B8!4B12!1] ;PRINT FOUR OCTAL DIGITS FORCED
1116 037240 000000 OPDEF PNT5 [37B8!5B12!0] ;PRINT FIVE OCTAL DIGITS
1117 037240 000001 OPDEF PNT5F [37B8!5B12!1] ;PRINT FIVE OCTAL DIGITS FORCED
1118 037300 000000 OPDEF PNT6 [37B8!6B12!0] ;PRINT SIX OCTAL DIGITS
1119 037300 000001 OPDEF PNT6F [37B8!6B12!1] ;PRINT SIX OCTAL DIGITS FORCED
1120 037340 000000 OPDEF PNT7 [37B8!7B12!0] ;PRINT 7 OCTAL DIGITS
1121 037340 000001 OPDEF PNT7F [37B8!7B12!1] ;PRINT 7 OCTAL DIGITS FORCED
1122 037440 000000 OPDEF PNT11 [37B8!11B12!0] ;PRINT 11 OCTAL DIGITS
1123 037440 000001 OPDEF PNT11F [37B8!11B12!1] ;PRINT 11 OCTAL DIGITS FORCED.
1124 037400 000000 OPDEF PNTADR [37B8!10B12!0] ;PRINT PHYSICAL ADDRESS
1125 037400 000001 OPDEF PNTADF [37B8!10B12!1] ;PRINT PHYSICAL ADDRESS FORCED
1126 037600 000000 OPDEF PNTOCT [37B8!14B12!0] ;PRINT FULL WORD OCTAL
1127 037600 000001 OPDEF PNTOTF [37B8!14B12!1] ;PRINT FULL WORD OCTAL FORCED
1128 037540 000000 OPDEF PNTHW [37B8!13B12!0] ;PRINT OCTAL HALF WORDS, 6 SP 6
1129 037540 000001 OPDEF PNTHWF [37B8!13B12!1] ;PRINT OCTAL HALF WORDS, 6 SP 6 FORCED
1130 037700 000003 OPDEF PNTOCS [37B8!16B12!3] ;PRINT OCTAL, SUPPRESS LEADING 0'S
1131 037740 000003 OPDEF PNTOCF [37B8!17B12!3] ;PRINT OCTAL, SUPPRESS LEADING 0'S FORCED
1132 037640 000000 OPDEF PNTDEC [37B8!15B12!0] ;PRINT DECIMAL, SUPRESS LEADING 0'S
1133 037640 000001 OPDEF PNTDCF [37B8!15B12!1] ;PRINT DECIMAL, SUPRESS LEADING 0'S FORCED
1134 037700 000000 OPDEF PNTDS [37B8!16B12!0] ;PRINT DECIMAL, SPACES FOR LD 0'S
1135 037700 000001 OPDEF PNTDSF [37B8!16B12!1] ;PRINT DECIMAL, SPACES FOR LD 0'S FORCED
DFPTA MACRO %53A(1152) 09:26 16-Oct-84 Page 5
PARAM KLM 18-Sep-79 17:16 *PARAM* PROGRAM/SUBROUTINE PARAMETERS, SEPT 18,1979 SEQ 0152
1136 037200 000002 OPDEF PNTNM [37B8!4B12!2] ;PRINT PROGRAM NAME
1137 037000 000002 OPDEF PNTSIX [37B8!0B12!2] ;PRINT SIXBIT WORD
1138 037040 000002 OPDEF PNTSXF [37B8!1B12!2] ;PRINT SIXBIT WORD FORCED
1139 037240 000002 OPDEF DROPDV [37B8!5B12!2] ;CLOSE LOGICAL FILE, USER MODE
1140 037100 000002 OPDEF PNTCW [37B8!2B12!2] ;PRINT DF10 CONTROL WORD
1141 037140 000002 OPDEF PNTCWF [37B8!3B12!2] ;PRINT DF10 CONTROL WORD FORCED
1142 037000 030242 OPDEF PCRL [37B8!0B12!CRLF] ;PRINT CARRIAGE RETURN/LINE FEED
1143 037040 030242 OPDEF PCRLF [37B8!1B12!CRLF] ;PRINT CARRIAGE RETURN/LINE FEED FORCED
1144 037000 000040 OPDEF PSP [37B8!0B12!40] ;PRINT SPACE
1145 037040 000040 OPDEF PSPF [37B8!1B12!40] ;PRINT SPACE FORCED
1146 037000 030243 OPDEF PCRL2 [37B8!0B12!CRLF2] ;PRINT CARRIAGE RETURN/LINE FEED (TWICE)
1147 037040 030243 OPDEF PCRL2F [37B8!1B12!CRLF2] ;PRINT CARRIAGE RETURN/LINE FEED (TWICE) FORCED
1148 037040 000007 OPDEF PBELL [37B8!1B12!7] ;PRINT TTY BELL
1149
1150 037040 000026 OPDEF PFORCE [37B8!1B12!26] ;PRINT FORCE, CONTROL O OVERRIDE
1151
1152 DEFINE PMSG (ARG),<
1153 PSIXM [SIXBIT\ARG'_\]>
1154
1155 DEFINE PMSGF (ARG),<
1156 PSIXMF [SIXBIT\ARG'_\]>
1157
1158 ;SIXBTZ -- MACRO TO GENERATE SIXBIT DATA FOR PRINTING
1159 ; CONSERVES CORE OVER ASCIZ
1160
1161 DEFINE SIXBTZ (ARG),< [SIXBIT\ARG'_\]>
1162
1163 ;CONSOLE SWITCH INPUT UUO.
1164 ;READS CONSOLE SWITCHES IF IN EXEC MODE OR ASKS FOR THEM IF
1165 ; USER MODE.
1166
1167 037400 000002 OPDEF SWITCH [37B8!10B12!2] ;INPUT CONSOLE SWITCHES
1168
1169 ;CLOCK INITIALIZATION UUO - TO SET DESIRED CLOCK OPERATION
1170 ;EITHER IGNORE CLOCK, ONLY LET IT TICK OR CAUSE INTERRUPT TO OCCUR.
1171
1172 037540 000004 OPDEF CLOKOP [37B8!13B12!4] ;CLOCK OPERATION UUO - PDP-11 CLOCK
1173 037200 000004 OPDEF MTROP [37B8!4B12!4] ;CLOCK OPERATION UUO - DK20 METER
1174
1175 ;KL10 ONLY CACHE OPERATION UUO'S
1176
1177 037040 000004 OPDEF CINVAL [37B8!1B12!4] ;CACHE INVALIDATE
1178 037100 000004 OPDEF CFLUSH [37B8!2B12!4] ;CACHE FLUSH
1179 037140 000004 OPDEF CWRTBI [37B8!3B12!4] ;CACHE WRITE-BACK & INVALIDATE
DFPTA MACRO %53A(1152) 09:26 16-Oct-84 Page 6
PARAM KLM 18-Sep-79 17:16 *PARAM* PROGRAM/SUBROUTINE PARAMETERS, SEPT 18,1979 SEQ 0153
1180 ;END OF PASS/PROGRAM UUOS
1181
1182 ;PERFORMS THE END OF PASS FUNCTIONS. INCREMENT PASS COUNT,
1183 ;DECREMENT ITERATION COUNT, CHECK IF FINISHED WITH THIS PROGRAM ETC.
1184
1185 037500 000004 OPDEF ENDUUO [37B8!12B12!4] ;UUO TO DISPLAY LIGHTS
1186 037700 000004 OPDEF EOPUUO [37B8!16B12!4] ;END OF PROGRAM UUO
1187
1188 ;MEMORY MANAGEMENT UUO'S
1189 ;UUO'S TO PERFORM VARIOUS MEMORY FUNCTIONS. MAPPING, ZEROING, PAGING,
1190 ;ADDRESS CONVERSION, ETC...
1191
1192 037000 000004 OPDEF MAPMEM [37B8!0B12!4] ;MAP MEMORY
1193 037500 000002 OPDEF MEMZRO [37B8!12B12!2] ;ZERO MEMORY
1194 037440 000002 OPDEF MEMSEG [37B8!11B12!2] ;SETUP MEMORY SEGMENT
1195 037540 000002 OPDEF MAPADR [37B8!13B12!2] ;VIRTUAL TO PHYSICAL ADR CONVERT
1196 037640 000002 OPDEF MAPCNK [37B8!15B12!2] ;MAP MEMORY CHUNK
1197 037600 000002 OPDEF MAPSET [37B8!14B12!2] ;SET KI10 EXEC PAGE MAP
1198 037740 000002 OPDEF MAPPNT [37B8!17B12!2] ;PRINT MEMORY MAP
1199
1200 ;DEVICE CODE MODIFICATION UUO
1201 ;ALLOWS THE MODIFICATION OF IOT'S TO ONE DEVICE TO BE CHANGED TO
1202 ;IOT'S TO A DIFFERENT DEVICE CODE.
1203
1204 037340 000002 OPDEF MODPCU [37B8!7B12!2] ;MODIFY PERHIPERAL CODE, USER
1205 037300 000002 OPDEF MODPCP [37B8!6B12!2] ;MODIFY PERHIPERAL CODE, PROGRAM
1206
1207 030000 IFNDEF MODDVL,<MODDVL==BEGIN>
1208 030000 IFNDEF MODDVU,<MODDVU==BEGIN>
1209
1210 ;"DIAMON" FILE SELECTION AND READ UUOS
1211
1212 037240 000004 OPDEF FSELECT [37B8!5B12!4] ;FILE SELECTION
1213 037300 000004 OPDEF FREAD [37B8!6B12!4] ;FILE READ - ASCII DATA
1214 037340 000004 OPDEF FRD36 [37B8!7B12!4] ;FILE READ - 36 BIT DATA
1215 037400 000004 OPDEF FRD8 [37B8!10B12!4] ;FILE READ - 8 BIT DATA
1216
1217 ;KI10 ONLY UUO FOR PRINTING MARGIN VALUES
1218
1219 037700 000002 OPDEF PNTMGN [37B8!16B12!2] ;PRINT MARGIN VALUE
1220
1221 XLIST
1222 IFNDEF KLOLD,<LIST
DFPTA MACRO %53A(1152) 09:26 16-Oct-84 Page 7
PARAM KLM 18-Sep-79 17:16 ERROR HANDLING UUO DEFINITIONS, SEPT 18,1979 SEQ 0154
1223 SUBTTL ERROR HANDLING UUO DEFINITIONS, SEPT 18,1979
1224
1225 ; **********************************************************************
1226 ;ERROR HANDLER PARAMETERS
1227 ; **********************************************************************
1228
1229 036000 000000 OPDEF ERUUO [36B8] ;ERROR CALL UUO
1230 035000 000000 OPDEF ERLOOP [35B8] ;ERROR LOOP, CHECKS PC,REPT,REPT1,ERROR
1231 035040 000000 OPDEF ERLP1 [35B8!1B12] ;ERROR LOOP IF PC'S MATCH
1232 035100 000000 OPDEF ERLP2 [35B8!2B12] ;ERROR LOOP IF ANY ERROR
1233 034000 000000 OPDEF REPTUO [34B8] ;REPEAT LOOP UUO
1234
1235 ;THE ERROR HANDLER MACROS
1236
1237 ;A MACRO TO REPORT AN ERROR AND LOOP
1238
1239 DEFINE ERROR (ADR,FORMAT,CORECT,ACTUAL,F,D,ERR)<
1240 SALL
1241 ERUUO FORMAT,[T,,[SIXBIT\F'_\]
1242 CORECT,,ACTUAL
1243 [SIXBIT\D'_\],,ERR]
1244 XALL
1245 ERLOOP ADR ;IF ERROR, LOOP TO ADR
1246 >
1247
1248 ;A MACRO TO REPORT AN ERROR AND NOT LOOP
1249
1250 DEFINE ERROR1 (FORMAT,CORECT,ACTUAL,F,D,ERR)<
1251 SALL
1252 ERUUO FORMAT,[T,,[SIXBIT\F'_\]
1253 CORECT,,ACTUAL
1254 [SIXBIT\D'_\],,ERR]
1255 XALL>
1256
1257 >;END OF KLOLD CONDITIONAL
1258
1259 XLIST
1260 LIST
DFPTA MACRO %53A(1152) 09:26 16-Oct-84 Page 1
FIXED KLM 18-Sep-79 17:18 *FIXED* FIXED CONTROL AND DISPATCH STORAGE, SEPT 18,1979 SEQ 0155
1261 SUBTTL *FIXED* FIXED CONTROL AND DISPATCH STORAGE, SEPT 18,1979
1262
1263 030000 LOC 30000
1264
1265 ; **********************************************************************
1266 ;PROGRAM STARTING ADDRESSES
1267 ;THESE ADDRESSES CALL VARIOUS SPECIAL START ROUTINES AND OR OPTIONS
1268 ;NORMAL START ADDRESS IS 30000 ALL OTHERS ARE SPECIAL. INVOKED BECAUSE
1269 ;OF END OF PASS, POWER FAILURE, DDT START, RE-ENTERING(TYPICALLY USER
1270 ;MODE), OR ANY NUMBER OF SPECIAL FEATURE TESTS.
1271 ; **********************************************************************
1272
1273 030000 254 00 1 00 027776 BEGIN: JRST @MODLNK ;STAND-ALONE START
1274 030001 254 00 0 00 000000* $START: JRST START ;MODE CHECK STARTING ADDRESS
1275
1276 030002 254 00 1 00 027774 DIAGMN: JRST @LDLNK ;DIAGNOSTIC MONITOR START
1277
1278 030003 254 00 1 00 027774 SYSEXR: JRST @LDLNK ;SYSTEM EXERCISER START
1279
1280 030004 254 00 0 00 030000 SFSTRT: JRST SADR1 ;SPECIAL FEATURE START
1281
1282 030005 254 00 0 00 030000 PFSTRT: JRST SADR2 ;POWER FAIL RESTART
1283
1284 030006 254 00 0 00 030000 REENTR: JRST SADR3 ;REENTER START(USUALLY USER MODE ONLY)
1285
1286 030007 SRTDDT: ;COMMONLY MISTAKEN NAME FOR "DDTSRT"
1287 030007 254 00 1 00 027775 DDTSRT: JRST @DDTLNK ;DDT START
1288
1289 030010 254 00 0 00 000000* BEGIN1: JRST STARTA ;LOOP START(END OF PASS COMES HERE)
1290 030011 254 00 1 00 027777 SBINIT: JRST @SUBLNK ;PMGINT LINKAGE
1291 030012 000000 000000 RETURN: 0 ;RETURN ADDRESS STORAGE
1292
1293 030013 254200 030001* START1: SADR7 ;OPTIONAL STARTING ADR/INSTRUCTIONS
1294 030014 254200 030013* START2: SADR8 ; "
1295 030015 254200 030014* START3: SADR9 ; "
1296 030016 254200 030015* START4: SADR10 ; "
1297 030017 254200 030016* START5: SADR11 ; "
DFPTA MACRO %53A(1152) 09:26 16-Oct-84 Page 2
FIXED KLM 18-Sep-79 17:18 *FIXED* FIXED CONTROL AND DISPATCH STORAGE, SEPT 18,1979 SEQ 0156
1298 ; **********************************************************************
1299 ;PROGRAM FIXED PARAMETER AREA
1300 ; **********************************************************************
1301
1302 030020 444660 644100 PNTNAM: PAREA3 ;SIXBIT PROGRAM NAME
1303 030021 605664 000000 PNTEXT: PAREA4 ;SIXBIT PROGRAM EXTENSION
1304 030022 711523 655207 RANDBS: PAREA1 ;RANDOM BASE NUMBER
1305 030023 000000 000000 SWTEXR: PAREA2 ;SYSTEM EXERCISER SWITCHES
1306 030024 000000 000005 ITRCNT: ITERAT ;PROGRAM ITERATIONS
1307 030025 000000000000# $PNAME: PGMNAM ;POINTER TO PROGRAMS NAME
1308 030026 000000 000001 $PVER: MCNVER,,DECVER ;MCN & DEC VERSION LEVEL
1309 030027 000000 030000 $MODVL: MODDVL ;DEVICE CODE CHANGE LOWER LIMIT
1310 030030 000000 030000 $MODVU: MODDVU ;DEVICE CODE CHANGE UPPER LIMIT
1311 030031 777777 777777 $EMODE: IFNDEF EXCASB,<0> IFDEF EXCASB,<-1> ;EXEC ALLOWED
1312 030032 777777 777777 $UMODE: IFNDEF USRASB,<0> IFDEF USRASB,<-1> ;USER ALLOWED
1313 030033 000000 000000 $DSKUP: IFNDEF DSKUPD,<0> IFDEF DSKUPD,<-1> ;DISK UPDATE MODE
1314 030034 777777 777777 $MMAP: IFNDEF MEMMAP,<0> IFDEF MEMMAP,<-1> ;ALLOW MEMORY RTNS
1315 030035 000000 000000 PAREA7: PAREA5 ;OPTIONAL PARAMETER
1316 030036 000000 000000 PAREA8: PAREA6 ;OPTIONAL PARAMETER
1317
1318 ; **********************************************************************
1319 ;PROGRAM VARIABLE PARAMETER AREA
1320 ; **********************************************************************
1321
1322 030037 000000 000000 USER: 0 ; 0 = EXEC, -1 = USER MODE FLAG
1323 030040 000000 000000 KAIFLG: 0 ;PROCESSOR TYPE, 0 = KA10, -1 = KI10
1324 030041 000000 000000 KLFLG: 0 ;PROCESSOR TYPE, 0 = KA/KI, -1 = KL10
1325 030042 777777 777777 MONFLG: -1 ;DIAG MONITOR SPECIAL USER FLAG
1326 030043 000000 000000 MONCTL: 0 ;DIAG MON/SYS EXR FLAG
1327 030044 000000 000000 MONTEN: 0 ;-1= LOADED BY 10
1328 030045 000000 000000 CLOCKF: 0 ;CLOCK TICKED FLAG
1329 030046 000000 000000 CONSW: 0 ;CONSOLE SWITCH SETTINGS
1330 030047 000000 000000 PASCNT: 0 ;PROGRAM PASS COUNT
1331 030050 000000 000000 RUNFLG: 0 ;PROGRAM RUN FLAG
1332 030051 000000 000000 TESTPC: 0 ;SUBTEST PC
1333 030052 000000 000000 ERRPC: 0 ;ERROR PC
1334 030053 000000 000000 ERRTLS: 0 ;ERROR TOTALS
1335 030054 000000 000000 TICKS: 0 ;PROGRAM RUNNING TIME
1336 030055 000000 000000 MARGIN: 0 ;KI10 MARGIN WORD VALUE
1337 030056 000000 000000 $ONETM: 0 ;SUBROUTINE INITIALIZATION FLAG
DFPTA MACRO %53A(1152) 09:26 16-Oct-84 Page 3
FIXED KLM 18-Sep-79 17:18 *FIXED* FIXED CONTROL AND DISPATCH STORAGE, SEPT 18,1979 SEQ 0157
1338 ; **********************************************************************
1339 ;SPECIAL PROGRAM DISPATCH ADDRESSES
1340 ; **********************************************************************
1341
1342 030057 037 12 0 00 000004 BEGEND: ENDUUO ;END OF PASS
1343 030060 254 00 0 00 030010 $BEND1: JRST BEGIN1 ;KEEP RUNNING PROGRAM
1344 030061 037 16 0 00 000004 $BEND2: EOPUUO ;END OF PROGRAM - NO RETURN
1345 030062 000000000000# CNTLC: SADR5 ;CONTROL C XFER ADDRESS
1346 030063 000000 030007 ALTMGO: SADR6 ;ALTMODE XFER ADDRESS
1347 030064 CPOPJ1: ;SKIP RETURN
1348 030064 350 00 0 17 000000 UUOSKP: AOS (P) ;SKIP RETURN FROM UUO
1349 030065 CPOPJ: ;NON-SKIP REGULAR RETURN
1350 030065 263 17 0 00 000000 UUOEXT: RTN ;UUO RETURN
1351 030066 255 00 0 00 000000 UUORTN: JFCL ;ADDITIONAL USERS UUO ROUTINE
1352 030067 255 00 0 00 000000 $UORTX: JFCL ;ADDITIONAL UUO LINKAGE
1353 030070 255 00 0 00 000000 $UUOER: JFCL ;INITED AS (JRST $UOERX)
1354 030071 255 00 0 00 000000 $ITRHL: JFCL ;ADDITIONAL INTERRUPT LINKAGE
1355 030072 255 00 0 00 000000 $ITRX1: JFCL ; "
1356 030073 255 00 0 00 000000 $USRHL: JFCL ; "
1357 030074 255 00 0 00 000000 $RSRTX: JFCL ;ADDITIONAL POWER FAIL LINKAGE
1358 030075 255 00 0 00 000000 $RSRTY: JFCL ; "
1359 030076 255 00 0 00 000000 RESRT1: JFCL ; INITED AS (JRST RESRTX)
1360 030077 255 00 0 00 000000 RESRT2: JFCL ; "
1361 030100 255 00 0 00 000000 $PARER: JFCL ;ADDITIONAL PARITY ERROR LINKAGE
1362 030101 255 00 0 00 000000 ERMORE: JFCL ;ADDITIONAL ERROR HANDLER LINKAGE
1363 030102 254 04 0 00 030102 HALT . ;IMPROPER TRANSFER HALT
1364
1365 030103 000000 000000 $PSHER: 0 ;INITED AS (JRST PSHERR)
1366 030104 000000 000000 ITRCH1: 0 ;PC & FLAGS OF CURRENT INTERRUPT
1367 030105 000000 000000 0 ;INITED AS (JRST $ITRC1)
1368
1369 ; **********************************************************************
1370 ;PROCESSOR CONTROL STORAGE
1371 ; **********************************************************************
1372
1373 030106 000000 000000 $ACC0: 0 ;INTERRUPT SAVED AC0
1374 030107 000000 000000 $SVPI: 0 ;INTERRUPT SAVED PI
1375 030110 000000 000000 $SVAPR: 0 ;INTERRUPT SAVED APR
1376 030111 000000 000000 $SVPAG: 0 ;INTERRUPT SAVED PAG (DATAI)
1377 030112 000000 000000 $SPAG1: 0 ;INTERRUPT SAVED PAG (CONI)
1378
1379 030113 000000 000000 $SVUUO: 0 ;CURRENT USERS UUO
1380 030114 000000 000000 $SVUPC: 0 ;PC OF CURRENT USERS UUO
1381
1382 030115 000000 000000 REPTU: 0 ;REPEAT UUO ITERATIONS
1383 030116 000000 000000 SCOPE: 0 ;ERROR HANDLER SCOPE LOOP FLAG
1384 030117 000000 000000 %CORFLG:0 ; " CORRECT FLAG
1385 030120 000000 000000 %COREC: 0 ; " CORRECT DATA
1386 030121 000000 000000 %ACTFL: 0 ; " ACTUAL FLAG
1387 030122 000000 000000 %ACTUL: 0 ; " ACTUAL DATA
1388 030123 000000 000000 %DISCR: 0 ; " DISCREPENCY DATA
DFPTA MACRO %53A(1152) 09:26 16-Oct-84 Page 4
FIXED KLM 18-Sep-79 17:18 *FIXED* FIXED CONTROL AND DISPATCH STORAGE, SEPT 18,1979 SEQ 0158
1389 ; **********************************************************************
1390 ;UUO DISPATCH TABLE
1391 ; **********************************************************************
1392 XLIST
1393 LIST
1394 030124 000000* 030070 UUODIS: LUUO1,,$UUOER
1395 030125 030070 000000* LUUO3,,LUUO2
1396 030126 030070 030070 LUUO5,,LUUO4
1397 030127 000000* 000000* LUUO7,,LUUO6
1398 030130 030070 030070 LUUO11,,LUUO10
1399 030131 030070 030070 LUUO13,,LUUO12
1400 030132 030070 030070 LUUO15,,LUUO14
1401 030133 030070 030070 LUUO17,,LUUO16
1402 030134 030070 030070 LUUO21,,LUUO20
1403 030135 030070 030070 LUUO23,,LUUO22
1404 030136 030070 030070 LUUO25,,LUUO24
1405 030137 000000* 030070 LUUO27,,LUUO26
1406 030140 030070 030070 LUUO31,,LUUO30
1407 030141 030070 030070 LUUO33,,LUUO32
1408
1409 ; **********************************************************************
1410 ;MEMORY MANAGMENT STORAGE
1411 ; **********************************************************************
1412
1413 030142 000000 000000 DF22F: 0 ;DF10 CONTROL FLAG, 0 = 18, -1 = 22 BIT
1414 030143 000000 000000 MAPNEW: 0 ;MEMORY MAPPING CONTROL FLAG, -1 = 4096K MAPPING
1415 030144 000000 000000 MEMTOT: 0 ;TOTAL MEMORY SIZE IN K (1024.)
1416 030145 000000 000000 MEMLOW: 0 ;LOWEST USABLE MEMORY
1417 030146 MEMSIZ: BLOCK ^D41 ;MEMORY SEGMENT POINTER TABLE
1418
1419 ; **********************************************************************
1420 ;PRINT CONTROL STORAGE
1421 ; **********************************************************************
1422
1423 030217 000000 000000 PNTFLG: 0 ;PRINT FLAG, -1 WHILE IN PRINT ROUTINE
1424 030220 000000 000000 PNTENB: 0 ;PRINT ENABLE
1425 030221 000000 000000 PDISF: 0 ;PRINT DISABLED FLAG
1426 030222 000000 000000 PNTINH: 0 ;INHIBIT PRINT INPUT CHECKS
1427 030223 000000 000000 PNTSPC: 0 ;PRINT SPACE CONTROL
1428 030224 000000 000000 OPTIME: 0 ;TYPE-IN WAIT TIME
1429 030225 000000 000000 $TWCNT: 0 ;TIME WAITED
1430 030226 000000 000000 $DVOFF: 0 ;LOGICAL DEVICE INITED FLAG
1431 030227 000000 000000 TTYFIL: 0 ;TTY EXEC FILLERS FLAG
1432 030230 000000 000000 TTYSPD: 0 ;TTY EXEC BAUD RATE
1433 030231 000000 000000 $TTCHR: 0 ;ACTUAL TYPED IN CHAR
1434 030232 000000 000000 $CHRIN: 0 ;UPPER CASED & PARITY STRIPPED CHAR
1435 030233 000000 000000 $TYPNB: 0 ;TYPED IN NUMBER
1436 030234 000000 000000 $CRLF: 0 ;FREE CR/LF FLAG
1437 030235 000000 000000 $TABF: 0 ;TAB CONVERSION FLAG
1438 030236 000000 000000 $FFF: 0 ;FORM FEED CONVERSION FLAG
1439 030237 000000 000000 $VTF: 0 ;VERTICAL TAB CONVERSION FLAG
1440 030240 000000 000000 USRLFF: 0 ;USER LF FILLERS
1441 030241 000000 000000 USRCRF: 0 ;USER CR FILLERS
DFPTA MACRO %53A(1152) 09:26 16-Oct-84 Page 5
FIXED KLM 18-Sep-79 17:18 *FIXED* FIXED CONTROL AND DISPATCH STORAGE, SEPT 18,1979 SEQ 0159
1442 ; **********************************************************************
1443 ;THE FOLLOWING MISCELLANEOUS PRINT CHARACTERS ARE INCLUDED
1444 ;TO FACILITATE PRINTING AND ARE CALLED AS FOLLOWS:
1445 ; MOVEI NAME
1446 ; PNTA ;OR PNTAF
1447 ; **********************************************************************
1448
1449 030242 CRLF: ASCII/
1450 030242 015 012 000 000 000 /
1451 030243 CRLF2: ASCII/
1452
1453 030243 015 012 015 012 000 /
1454 030244 054 000 000 000 000 COMMA: ASCII/,/
1455 030245 056 000 000 000 000 PERIOD: ASCII/./
1456 030246 040 000 000 000 000 SPACE: ASCII/ /
1457 030247 011 000 000 000 000 TAB: ASCII/ /
1458 030250 MINUS:
1459 030250 055 000 000 000 000 HYPEN: ASCII/-/
1460 030251 053 000 000 000 000 PLUS: ASCII/+/
1461 030252 052 000 000 000 000 AST: ASCII/*/
1462 030253 100 000 000 000 000 ATSIN: ASCII/@/
1463 030254 050 000 000 000 000 LFP: ASCII/(/
1464 030255 051 000 000 000 000 RTP: ASCII/)/
1465 030256 007 0000000000 BELL: BYTE (7) 007
1466 030257 077 000 000 000 000 QUEST: ASCII/?/
1467 030260 057 000 000 000 000 SLASH: ASCII!/!
1468 030261 044 000 000 000 000 DOLLAR: ASCII/$/
1469 030262 000000 000012 RADIX: ^D10 ;DECIMAL PRINT RADIX
1470 030263 000000 000040 RADLSP: 40 ;DECIMAL PRINT LEADING CHAR
1471 030264 000000 000012 RADLSC: ^D10 ;DECIMAL PRINT LEADING CHAR COUNT
1472
1473 ; **********************************************************************
1474 ;USER MODE OUTPUT FILE INFORMATION
1475 ; **********************************************************************
1476
1477 030265 $OBUF: BLOCK 3 ;LOGICAL FILE OUTPUT BUFFER HEADER
1478 030270 60 62 51 56 64 00 $OUTNM: SIXBIT /PRINT/ ;FILE NAME
1479 030271 60 56 64 00 00 00 $OUTEX: SIXBIT /PNT/ ;FILE NAME EXTENSION
1480 030272 BLOCK 2
1481
1482 ; **********************************************************************
1483 ;DISK UPDATE MODE FILE INFORMATION
1484 ; **********************************************************************
1485
1486 030274 $IBUF: BLOCK 3
1487 030277 60 62 51 56 64 00 $INNM: SIXBIT /PRINT/
1488 030300 60 56 64 00 00 00 $INEXT: SIXBIT /PNT/
1489 030301 BLOCK 2
DFPTA MACRO %53A(1152) 09:26 16-Oct-84 Page 6
FIXED KLM 18-Sep-79 17:18 *FIXED* FIXED CONTROL AND DISPATCH STORAGE, SEPT 18,1979 SEQ 0160
1490 ; **********************************************************************
1491 ;PUSHDOWN LIST CONTROL INFORMATION
1492 ; **********************************************************************
1493
1494 030303 777577 030303 PLIST: PLIST-PLISTE,,PLIST
1495 030304 PLISTS: BLOCK 200
1496 030504 000000 000000 PLISTE: 0 ;END OF PUSHDOWN LIST
1497
1498 ; **********************************************************************
1499 ;POWER LINE CLOCK FREQUENCY FLAG
1500 ; **********************************************************************
1501
1502 030505 000000 000000 CYCL60: 0 ;0 = 60, -1 = 50 CYCLE
1503
1504 ; **********************************************************************
1505 ;KL10 CACHE CONTROL FLAGS
1506 ; **********************************************************************
1507
1508 030506 000000 000000 CSHFLG: 0 ;ALLOW CACHE IF 0
1509 030507 000000 000000 CSHMEM: 0 ;CACHE MEMORY SEGMENTS IF 0
1510
1511 ; **********************************************************************
1512 ;NUMBER INPUT DIGIT FLAG
1513 ; **********************************************************************
1514
1515 030510 000000 000000 TTNBRF: 0 ;-1 IF ANY DIGIT TYPED
1516
1517 ; **********************************************************************
1518 ;KL10 & KI10 "INHPAG" SWITCH PAGING PREVENTION
1519 ; **********************************************************************
1520
1521 030511 000000 000000 PVPAGI: 0 ;IF NON-ZERO, OVERRIDE "INHPAG" SWITCH ACTION
1522
1523 ; **********************************************************************
1524 ;ERROR REPORTING ROUTINE ADDITIONAL USERS CONTROL INSTRUCTIONS
1525 ; **********************************************************************
1526
1527 030512 000000 000000 %ERHI1: 0 ;IF NON-ZERO, XCT'D AT START OF %ERUUO
1528 030513 000000 000000 %ERHI2: 0 ;IF NON-ZERO, XCT'D AT END OF %ERUUO
1529 030514 000000 000000 %ERHI3: 0 ;IF NON-ZERO, XCT'D AFTER "PC" OF %ERUUO
1530
1531 ; **********************************************************************
1532 ;SPECIAL USERS UUO INTERCEPT INSTRUCTION
1533 ; **********************************************************************
1534
1535 030515 000000 000000 $$UUO: 0 ;IF NON-ZERO, XCT'D AT START OF $UORTN
DFPTA MACRO %53A(1152) 09:26 16-Oct-84 Page 7
FIXED KLM 18-Sep-79 17:18 *FIXED* FIXED CONTROL AND DISPATCH STORAGE, SEPT 18,1979 SEQ 0161
1536 ; **********************************************************************
1537 ;USER MODE MONITOR TYPE FLAG
1538 ; **********************************************************************
1539
1540 030516 000000 000000 MONTYP: 0 ;0 = TOPS10, -1 = TOPS20
1541
1542 ; **********************************************************************
1543 ;SPECIAL USERS MUUO INTERCEPT INSTRUCTION
1544 ; **********************************************************************
1545
1546 030517 000000 000000 $$MUUO: 0 ;IF NON-ZERO, XCT'D AT START OF MUUOER
1547
1548 ; **********************************************************************
1549 ;SPECIAL USERS USER MODE OUTPUT ERROR INTERCEPT INSTUCTION
1550 ; **********************************************************************
1551
1552 030520 000000 000000 $$OUTER:0 ;IF NON-ZERO, XCT'D AT END OF USER MODE ERROR
1553
1554 ; **********************************************************************
1555 ;"SWITCH" CALL USAGE CONTROL
1556 ; **********************************************************************
1557
1558 030521 000000 000000 $$TOGGLE:0 ;IF NON-ZERO, USE C(CONSW) FOR SWITCHES
1559
1560 ; **********************************************************************
1561 ;SPECIAL USERS ALTMODE SWITCH CALL INTERCEPT INSTRUCTIONS
1562 ; **********************************************************************
1563
1564 030522 000000 000000 $$TAX1: 0 ;IF NON-ZERO, XCT'D AT START OF ALTMODE SWITCH CALL
1565 030523 000000 000000 $$TAX2: 0 ;IF NON-ZERO, XCT'D AT END OF ALTMODE SWITCH CALL
1566
1567 ; **********************************************************************
1568 ;SM10 (KS-10) PROCESSOR TYPE FLAG
1569 ; **********************************************************************
1570
1571 030524 000000 000000 SM10: 0 ;IF -1 THIS IS A KS-10
1572
1573 ; **********************************************************************
1574 ;RIGHT HALF SWITCHES PROMPT TABLE ADDRESS
1575 ; **********************************************************************
1576
1577 030525 000000 000000 SWPTAB: 0 ;0 = NO PROMPT, ADR = ADR OF SIXBIT PROMPT TABLE
1578
1579 ; **********************************************************************
1580 ;SPECIAL FUTURE EXPANSION ROOM
1581 ; **********************************************************************
1582
1583 ; **********************************************************************
1584 ;END OF FIXED STORAGE
1585 ; **********************************************************************
1586
1587 030577 LOC 30577
1588 030577 000000 000000 ENDFIX: 0 ;END OF FIXED STORAGE
DFPTA MACRO %53A(1152) 09:26 16-Oct-84 Page 1
DFPTAE MAC 20-Sep-82 09:16 IPA REGISTER STORAGE SEQ 0162
1589 SUBTTL IPA REGISTER STORAGE
1590
1591 ;#********************************************************************
1592 ; End of DFPTAT,PARAM,FIXED,DFPTAE files
1593 ;#********************************************************************
1594
1595 XLIST
1596
NO ERRORS DETECTED
PROGRAM BREAK IS 030601
ABSOLUTE BREAK IS 030600
CPU TIME USED 00:06.807
71P CORE USED
DFPTA MACRO %53A(1152) 09:26 16-Oct-84 Page S-1
DFPTAE MAC 20-Sep-82 09:16 SYMBOL TABLE SEQ 0163
ABORT 400000 spd CIPORT 000020 spd E15 000017 spd IDLE 000100 000000 spd
ADRPE 100000 000000 spd CJRST 000011 spd E16 000020 spd IEXIT 000013 spd
ALL 770000 000000 spd CLAST 000000 spd E17 000021 spd IJRST 000011 spd
ALTCHH 000000 ext CLK 001000 spd E18 000022 spd ILAST 000000 spd
ALTCHK 007000 000000 CLKCLR 001000 spd E19 000023 spd INHCSH 000020 spd
ALTMGO 030063 CLKDIS 004000 spd E2 000002 spd INHFLT 200000 spd
ALU 020000 000000 spd CLKENB 002000 spd E20 000024 spd INHMSG 100000 spd
ANXM 010000 spd CLKU 001000 spd E21 000025 spd INHPAG 000100 spd
AROV 400000 spd CLOCKF 030045 E22 000026 spd INXM 000100 spd
AROVU 000010 spd CLOKOP 037540 000004 E23 000027 spd IOCLR 200000 spd
AST 030252 CMDQAV 000400 spd E24 000030 spd IPAER 000200 000000 spd
ATSIN 030253 CNTLC 030062 E3 000003 spd ISETDE 000002 spd
BEGEND 030057 COMMA 030244 E4 000004 spd ISETEI 000005 spd
BEGIN 030000 CONSW 030046 E5 000005 spd ISETEX 000001 spd
BEGIN1 030010 CPOPJ 030065 E6 000006 spd ISETID 000003 spd
BELL 030256 CPOPJ1 030064 E7 000007 spd ISETIN 000004 spd
BIS 020000 spd CRAMPE 004000 000000 spd E8 000010 spd ISTART 000012 spd
C1 000054 spd CRLF 030242 E9 000011 spd ITERAT 000005 spd
C10 000065 spd CRLF2 030243 EBUS 400000 000000 spd ITRCH1 030104
C11 000066 spd CRY0 200000 spd EBUSPE 004000 spd ITRCNT 030024
C12 000067 spd CRY1 100000 spd ECOMP 000020 000000 spd IWAIT 000010 spd
C13 000070 spd CSETRD 000001 spd ENDFIX 030577 JEN 254500 000000
C14 000071 spd CSETRW 000003 spd ENDUUO 037500 000004 JOB41 000041 spd
C15 000072 spd CSETWR 000002 spd EOPUUO 037700 000004 JOBAPR 000125 spd
C16 000073 spd CSHFLG 030506 ERFLG 000015 JOBCNI 000126 spd
C17 000074 spd CSHMEM 030507 ERLOOP 035000 000000 JOBDDT 000074 spd
C18 000075 spd CSRCHN 100000 000000 spd ERLP1 035040 000000 JOBFF 000121 spd
C19 000076 spd CSRRQS 200000 000000 spd ERLP2 035100 000000 JOBOPC 000130 spd
C2 000055 spd CSTART 000004 spd ERMORE 030101 JOBREL 000044 spd
C20 000077 spd CWAIT 000007 spd ERRHLT 037600 000004 JOBREN 000124 spd
C21 000100 spd CWRTBI 037140 000004 ERRPC 030052 JOBSA 000120 spd
C22 000101 spd CYCL60 030505 ERRTLS 030053 JOBSYM 000116 spd
C23 000102 spd DCK 000040 spd ERSTOP 002000 spd JOBTPC 000127 spd
C24 000103 spd DCOMP 000040 000000 spd ERUUO 036000 000000 JOBUSY 000117 spd
C3 000056 spd DDTLNK 027775 EXCASB 000001 spd JOBUUO 000040 spd
C4 000057 spd DDTSRT 030007 EXIOT 004000 spd JOBVER 000137 spd
C5 000060 spd DEBUG1 002000 spd FATAL 037640 000004 JRSTF 254100 000000
C6 000061 spd DEBUG2 001000 spd FOV 040000 spd JSYS 104000 000000
C7 000062 spd DEBUG3 000400 spd FOVU 000100 spd KAHZ50 000002 spd
C8 000063 spd DEBUG4 000200 spd FQUERR 002000 spd KAIFLG 030040
C9 000064 spd DEBUG5 000100 spd FRD36 037340 000004 KL10 000001 spd
CALL 200000 000000 spd DECVER 000001 spd FRD8 037400 000004 KLFLG 030041
CBUFSZ 000315 spd DF22F 030142 FRDLNK 027773 LAPRAL 127520 spd
CBUS 100000 000000 spd DIAGMN 030002 FREAD 037300 000004 LAPRP1 000001 spd
CCA 000014 spd DING 010000 spd FSELEC 037240 000004 LAPRP2 000002 spd
CCALL 000005 spd DINIT 040000 000000 spd FSELNK 027772 LAPRP3 000003 spd
CCALLC 000006 spd DOLLAR 030261 FXU 000100 spd LAPRP4 000004 spd
CCOMP 000010 spd DROPDV 037240 000002 GENEPE 100000 spd LAPRP5 000005 spd
CEXIT 000012 spd DSPEAR 004000 spd GET 262740 000000 LAPRP6 000006 spd
CFIBF 104000 000100 E1 000001 spd GO 260740 000000 LAPRP7 000007 spd
CFLUSH 037100 000004 E10 000012 spd GOTO 300000 000000 spd LAROVT 000421 spd
CHAIN 000004 spd E11 000013 spd HALT 254200 000000 LAST 010000 000000 spd
CHNOFF 001000 spd E12 000014 spd HYPEN 030250 LAXER 000400 000000 spd
CHNON 002000 spd E13 000015 spd ICALL 000006 spd LCASDE 000020 spd
CINVAL 037040 000004 E14 000016 spd ICALLC 000007 spd LCASLD 200000 spd
DFPTA MACRO %53A(1152) 09:26 16-Oct-84 Page S-2
DFPTAE MAC 20-Sep-82 09:16 SYMBOL TABLE SEQ 0164
LCASLO 400000 spd LOOPER 004000 spd LUUO 000040 spd MARGIN 030055
LCASWB 200000 spd LOOPGM 040000 spd LUUO1 000000* spd MBCN 000016
LCASWD 000020 spd LOOPTS 020000 spd LUUO10 030070 MBERR 002000 000000 spd
LCCASD 020020 spd LPAREN 001000 spd LUUO11 030070 MBUS 010000 000000 spd
LCHNOF 001000 spd LPARER 001000 spd LUUO12 030070 MCBUS 000001 spd
LCHNON 002000 LPDOVT 000422 spd LUUO13 030070 MCNVER 000000 spd
LCIOPF 020400 spd LPFWPC 000426 spd LUUO14 030070 MEMLOW 030145
LCNTRP 000434 spd LPGFTR 000427 spd LUUO15 030070 MEMMAP 000001 spd
LCNXER 022000 spd LPICH1 000100 spd LUUO16 030070 MEMSEG 037440 000002
LCPAER 021000 spd LPICH2 000040 spd LUUO17 030070 MEMSIZ 030146
LCPWRF 020100 spd LPICH3 000020 spd LUUO2 000000* spd MEMTOT 030144
LCSBER 024000 spd LPICH4 000010 spd LUUO20 030070 MEMZRO 037500 000002
LCSLOA 200000 spd LPICH5 000004 spd LUUO21 030070 MINUS 030250
LCSLOO 400000 spd LPICH6 000002 spd LUUO22 030070 MLAST 400000 000000 spd
LCTRP 000435 spd LPICH7 000001 spd LUUO23 030070 MMPROC 000002 spd
LCWSX 000040 spd LPICHA 000177 spd LUUO24 030070 MODDVC 000040 spd
LDATAF 000200 spd LPICLR 010000 spd LUUO25 030070 MODDVL 030000 spd
LDCASD 040020 spd LPIIP1 040000 spd LUUO26 030070 MODDVU 030000 spd
LDIOPF 040400 spd LPIIP2 020000 spd LUUO27 000000* MODLNK 027776
LDLNK 027774 LPIIP3 010000 spd LUUO3 030070 MODPCP 037300 000002
LDNXER 042000 spd LPIIP4 004000 spd LUUO30 030070 MODPCU 037340 000002
LDPAER 041000 spd LPIIP5 002000 spd LUUO31 030070 MONCTL 030043
LDPWRF 040100 spd LPIIP6 001000 spd LUUO32 030070 MONFLG 030042
LDSBER 044000 spd LPIIP7 000400 spd LUUO33 030070 MONTEN 030044
LECASD 100020 spd LPIOFF 000400 spd LUUO4 030070 MONTYP 030516
LEIOPF 100400 spd LPION 000200 spd LUUO5 030070 MPER 200000 000000 spd
LENXER 102000 spd LPNTRP 000436 spd LUUO6 000000* spd MPROC 200000 000000 spd
LEPAER 101000 spd LPRCH1 000100 spd LUUO7 000000* spd MPRUN 000010 spd
LEPWRF 100100 spd LPRCH2 000040 spd LUUOI 000041 spd MPVU 020000 spd
LESBER 104000 spd LPRCH3 000020 spd LWRITE 000100 spd MSG 100000 000000 spd
LEUPFW 000420 spd LPRCH4 000010 spd M1 000031 spd MTROP 037200 000004
LEVNCD 100000 spd LPRCH5 000004 spd M10 000042 spd MVRERR 001000 spd
LEVNPA 400000 spd LPRCH6 000002 spd M11 000043 spd NDCB 000200 000000 spd
LEVNPD 200000 spd LPRCH7 000001 spd M12 000044 spd NDMP 000400 000000 spd
LEXCMP 000000 spd LPTRP 000437 spd M13 000045 spd NEXM 020000 000000 spd
LFLGCL 020000 spd LPWRFE 000100 spd M14 000046 spd NIPORT 000040 spd
LFLGDS 040000 spd LPWRFL 000100 spd M15 000047 spd NOPNT 040000 spd
LFLGEN 100000 spd LREQSE 004000 spd M16 000050 spd NOTWC0 040000 000000 spd
LFLGST 010000 spd LRQCLR 020000 spd M17 000051 spd NXMU 010000 spd
LFP 030254 LSBSEN 004000 spd M18 000052 spd OPRSEL 000010 spd
LGWC 000100 000000 spd LSBUSE 004000 spd M19 000053 spd OPTIME 030224
LINSTF 000400 spd LSCASD 010020 spd M2 000032 spd OVN 000020 000000 spd
LINT 000010 spd LSECMO 040000 spd M3 000033 spd P 000017
LIOCLR 200000 spd LSIOPF 010400 spd M4 000034 spd PAG 000010 spd
LIOPFE 000400 spd LSMODE 040000 spd M5 000035 spd PALERS 001000 spd
LKNTRP 000430 spd LSNTRP 000432 spd M6 000036 spd PARCLR 200000 spd
LKTRP 000431 spd LSNXER 012000 spd M7 000037 spd PARDIS 100000 spd
LLACBL 400000 spd LSPAER 011000 spd M8 000040 spd PAREA1 711523 655207 spd
LLDUSB 100000 spd LSPWRF 010100 spd M9 000041 spd PAREA2 000000 spd
LLPRCN 200000 spd LSSBER 014000 spd MAPADR 037540 000002 PAREA3 444660 644100 spd
LMUUO 000424 spd LSTRP 000433 spd MAPCNK 037640 000002 PAREA4 605664 000000 spd
LMUUOP 000425 spd LTRP3T 000423 spd MAPMEM 037000 000004 PAREA5 000000 spd
LNXMEN 002000 spd LTRPAE 020000 spd MAPNEW 030143 PAREA6 000000 spd
LNXMER 002000 spd LTRPEN 020000 spd MAPPNT 037740 000002 PAREA7 030035
LOGO 400000 000000 spd LUSCMP 000040 spd MAPSET 037600 000002 PAREA8 030036
DFPTA MACRO %53A(1152) 09:26 16-Oct-84 Page S-3
DFPTAE MAC 20-Sep-82 09:16 SYMBOL TABLE SEQ 0165
PARENB 040000 spd PNT7F 037340 000001 RELIAB 000400 spd SUBLNK 027777
PARU 004000 spd PNTA 037000 000000 REPT 000015 spd SWITCH 037400 000002
PASCNT 030047 PNTADF 037400 000001 REPT1 000016 spd SWPTAB 030525
PAT 000014 PNTADR 037400 000000 REPTU 030115 SWTEXR 030023
PBELL 037040 000007 PNTAF 037000 000001 REPTUO 034000 000000 SYSEXR 030003
PCLEAR 400000 spd PNTAL 037740 000000 REQSET 004000 spd TAB 030247
PCRL 037000 030242 PNTALF 037740 000001 RESQAV 000200 spd TCALL 000003 spd
PCRL2 037000 030243 PNTCHF 037500 000001 RESRT1 030076 TCALLC 000004 spd
PCRL2F 037040 030243 PNTCHR 037500 000000 RESRT2 030077 TCHECK 000005 spd
PCRLF 037040 030242 PNTCI 037000 000000 RETURN 030012 TCONT 000002 spd
PDEC 006000 000000 PNTCIF 037040 000000 RQINT 010000 000000 spd TDENA 000100 000000 spd
PDECF 002000 000000 PNTCW 037100 000002 RSTART 200000 spd TENLEN 000003 spd
PDISF 030221 PNTCWF 037140 000002 RTN 263740 000000 TESTPC 030051
PDLOVU 200000 spd PNTDCF 037640 000001 RTP 030255 TEXIT 000007 spd
PDSABL 000040 spd PNTDEC 037640 000000 RUNALL 010000 spd TICKS 030054
PENABL 000020 spd PNTDS 037700 000000 RUNFLG 030050 TJRST 000006 spd
PERIOD 030245 PNTDSF 037700 000001 SADR1 030000 TLAST 000000 spd
PFORCE 037040 000026 PNTENB 030220 SADR10 254200 000000* TOTALS 100000 spd
PFSTRT 030005 PNTEXT 030021 SADR11 254200 000000* TRACET 400000 spd
PGMINT 265000 030011 PNTFLG 030217 SADR2 030000 TSSTAR 000010 spd
PGMNAM 000000 ext PNTHW 037540 000000 SADR3 030000 TSTART 000001 spd
PIA00 000004 spd PNTHWF 037540 000001 SADR4 030007 TSTEBF 200000 spd
PIA01 000002 spd PNTINH 030222 SADR5 000000* TTALTM 037340 000003
PIA02 000001 spd PNTLPT 020000 spd SADR6 030007 TTICHR 037000 000003
PICHN1 000100 spd PNTMGN 037700 000002 SADR7 254200 000000* TTICLR 037500 000003
PICHN2 000040 spd PNTMSF 037040 000000 SADR8 254200 000000* TTICNV 037240 000003
PICHN3 000020 spd PNTMSG 037000 000000 SADR9 254200 000000* TTIDEC 037200 000003
PICHN4 000010 spd PNTNAM 030020 SBINIT 030011 TTINO 037100 000003
PICHN5 000004 spd PNTNM 037200 000002 SCOPE 030116 TTIOCT 037140 000003
PICHN6 000002 spd PNTOCC 001000 000000 SCOPE1 000000 ext TTIYES 037040 000003
PICHN7 000001 spd PNTOCF 037740 000003 SCOPER 027000 000000 TTLOOK 037300 000003
PICHNA 000177 spd PNTOCS 037700 000003 SELLAR 040000 spd TTNBRF 030510
PICLR 010000 spd PNTOCT 037600 000000 SEQ 040000 000000 spd TTSIXB 037400 000003
PIOFF 000400 spd PNTOTF 037600 000001 SFSTRT 030004 TTYFIL 030227
PION 000200 spd PNTSIX 037000 000002 SHWC 000040 000000 spd TTYINP 037440 000003
PJRST 254000 000000 PNTSPC 030223 SINCYC 020000 spd TTYSPD 030230
PLIST 030303 PNTSXF 037040 000002 SLASH 030260 TUSER 001000 000000 spd
PLISTE 030504 PORTP 400000 000000 spd SM10 030524 TXALL 060000 000000 spd
PLISTS 030304 PPDEC 030127 ext SPACE 030246 TXNOT 040000 000000 spd
PLUS 030251 PPDECF 030125 ext SPARE1 010000 spd TXTINH 000200 spd
PNT1 037040 000000 PSIXL 037600 000003 SPARE2 000100 spd TXYES 020000 000000 spd
PNT11 037440 000000 PSIXLF 037640 000003 SRTDDT 030007 USER 030037
PNT11F 037440 000001 PSIXM 037100 000000 SSCALL 000003 spd USERF 010000 spd
PNT1F 037040 000001 PSIXMF 037200 000000 SSCHK 000004 spd USRASB 000001 spd
PNT2 037100 000000 PSP 037000 000040 SSCONT 000002 spd USRCRF 030241
PNT2F 037100 000001 PSPF 037040 000040 SSJRST 000005 spd USRLFF 030240
PNT3 037140 000000 PUT 261740 000000 SSLAST 000000 spd UUODIS 030124
PNT3F 037140 000001 PVPAGI 030511 SSSTRT 000001 spd UUOEXT 030065
PNT4 037200 000000 PWFCLR 400000 spd START 030017 ext UUORTN 030066
PNT4F 037200 000001 QUEST 030257 START1 030013 UUOSKP 030064
PNT5 037240 000000 RADIX 030262 START2 030014 ZALU 000002 000000 spd
PNT5F 037240 000001 RADLSC 030264 START3 030015 ZCBUS 000004 000000 spd
PNT6 037300 000000 RADLSP 030263 START4 030016 ZEBUS 000000 spd
PNT6F 037300 000001 RANDBS 030022 START5 030017 ZMPROC 000003 000000 spd
PNT7 037340 000000 REENTR 030006 STARTA 030010 ext ZSEQ 000001 000000 spd
DFPTA MACRO %53A(1152) 09:26 16-Oct-84 Page S-4
DFPTAE MAC 20-Sep-82 09:16 SYMBOL TABLE SEQ 0166
$$MUUO 030517 %CORFL 030117 .LJ 010000 spd .MCCCC 000037 spd
$$OUTE 030520 %DISCR 030123 .LJMAP 000000 spd .MCCCE 000037 spd
$$TAX1 030522 %ERHI1 030512 .LJRP 000000 spd .MCCCP 000037 spd
$$TAX2 030523 %ERHI2 030513 .LJSRP 000000 spd .MCCEB 000037 spd
$$TOGG 030521 %ERHI3 030514 .LJZ 000000 spd .MCCER 000037 spd
$$UUO 030515 .JB41 000041 spd .LLDCT 000000 spd .MCCFZ 000037 spd
$ACC0 030106 .JBAPR 000125 spd .LLDLM 000000 spd .MCCGC 000037 spd
$BEND1 030060 .JBCNI 000126 spd .LLOOP 000000 spd .MCCIA 000037 spd
$BEND2 030061 .JBDDT 000074 spd .LLSAD 000000 spd .MCCLW 000037 spd
$CHRIN 030232 .JBFF 000121 spd .LMARK 000000 spd .MCCMB 000037 spd
$CRLF 030234 .JBOPC 000130 spd .LMGC 000001 spd .MCCMP 000037 spd
$DEVCH 000017 spd .JBREL 000044 spd .LNAND 000000 spd .MCCOF 000037 spd
$DSKUP 030033 .JBREN 000124 spd .LOENA 002000 spd .MCCON 000037 spd
$DVCH1 000016 spd .JBSA 000120 spd .LOP 000000 spd .MCCPP 000037 spd
$DVOFF 030226 .JBSYM 000116 spd .LOR 000000 spd .MCCXA 000037 spd
$EMODE 030031 .JBTPC 000127 spd .LPAR 004000 spd .MCENA 000001 spd
$FFF 030236 .JBUSY 000117 spd .LPLUS 000000 spd .MCJP 000017 spd
$IBUF 030274 .JBUUO 000040 spd .LPUSH 000000 spd .MCJPP 000017 spd
$INEXT 030300 .JBVER 000137 spd .LRAM 000000 spd .MCJS 000017 spd
$INNM 030277 .LA 000000 spd .LRDLM 000000 spd .MCJV 000017 spd
$ITRHL 030071 .LADDR 000100 000000 spd .LRFCT 000000 spd .MCONT 000017 spd
$ITRX1 030072 .LAND 000000 spd .LRMIN 000000 spd .MCRTN 000017 spd
$LPAPE 000001 spd .LB 000000 spd .LRPCT 000000 spd .MCRY 000001 spd
$MMAP 030034 .LBAD 000000 spd .LS0A 000000 spd .MD 000007 spd
$MODVL 030027 .LBUS 000000 spd .LS0B 000000 spd .MDISA 000001 spd
$MODVU 030030 .LCCAF 000000 spd .LS0Q 000000 spd .MENA 000001 spd
$OBUF 030265 .LCCBF 000000 spd .LSAB 000000 spd .MFUNC 000007 spd
$ONETM 030056 .LCCCA 000000 spd .LSAQ 000000 spd .MJ 007777 spd
$OUTEX 030271 .LCCCC 000000 spd .LSD0 000000 spd .MJMAP 000017 spd
$OUTNM 030270 .LCCCE 000000 spd .LSDA 000000 spd .MJRP 000017 spd
$PARER 030100 .LCCCP 000000 spd .LSDQ 000000 spd .MJSRP 000017 spd
$PNAME 030025 .LCCEB 000000 spd .LSELC 000000 spd .MJZ 000017 spd
$PSHER 030103 .LCCER 000000 spd .LSELE 000000 spd .MLDCT 000017 spd
$PVER 030026 .LCCFZ 000000 spd .LSELF 000000 spd .MLDLM 000037 spd
$RSRTX 030074 .LCCGC 000000 spd .LSELM 000000 spd .MLOOP 000017 spd
$RSRTY 030075 .LCCIA 000000 spd .LSELP 000000 spd .MLSAD 000037 spd
$SPAG1 030112 .LCCLW 000000 spd .LSK 000000 spd .MMARK 000001 spd
$START 030001 .LCCMB 000000 spd .LSKCN 000000 spd .MMGC 001777 spd
$SVAPR 030110 .LCCMP 000000 spd .LSKMB 000000 spd .MNAND 000007 spd
$SVPAG 030111 .LCCOF 000000 spd .LSMIN 000000 spd .MOENA 000001 spd
$SVPI 030107 .LCCON 000000 spd .LSORC 000000 spd .MOP 000017 spd
$SVUPC 030114 .LCCPP 000000 spd .LSPAR 000000 spd .MOR 000007 spd
$SVUUO 030113 .LCCXA 000000 spd .LTIM 000000 spd .MPAR 000001 spd
$TABF 030235 .LCENA 000000 spd .LTWB 000000 spd .MPLUS 000007 spd
$TTCHR 030231 .LCJP 000000 spd .LXNOR 000000 spd .MPUSH 000017 spd
$TWCNT 030225 .LCJPP 000000 spd .LXOR 000000 spd .MRAM 000001 spd
$TYPNB 030233 .LCJS 000000 spd .MA 000017 spd .MRDLM 000037 spd
$UMODE 030032 .LCJV 000000 spd .MADDR 007777 spd .MRFCT 000017 spd
$UORTX 030067 .LCONT 000000 spd .MAND 000007 spd .MRMIN 000007 spd
$USRHL 030073 .LCRTN 000000 spd .MB 000017 spd .MRPCT 000017 spd
$UUOER 030070 .LCRY 000000 spd .MBAD 000001 spd .MS0A 000007 spd
$VTF 030237 .LD 000000 spd .MBUS 000007 spd .MS0B 000007 spd
%ACTFL 030121 .LDISA 000000 spd .MCCAF 000037 spd .MS0Q 000007 spd
%ACTUL 030122 .LENA 000000 spd .MCCBF 000037 spd .MSAB 000007 spd
%COREC 030120 .LFUNC 000000 spd .MCCCA 000037 spd .MSAQ 000007 spd
DFPTA MACRO %53A(1152) 09:26 16-Oct-84 Page S-5
DFPTAE MAC 20-Sep-82 09:16 SYMBOL TABLE SEQ 0167
.MSD0 000007 spd .RJ 000000 spd
.MSDA 000007 spd .RJMAP 000040 spd
.MSDQ 000007 spd .RJRP 000160 spd
.MSELC 000007 spd .RJSRP 000120 spd
.MSELE 000007 spd .RJZ 000000 spd
.MSELF 000007 spd .RLDCT 000300 spd
.MSELM 000007 spd .RLDLM 230000 spd
.MSELP 000007 spd .RLOOP 000320 spd
.MSK 000037 spd .RLSAD 200000 spd
.MSKCN 000037 spd .RMARK 000002 spd
.MSKMB 000037 spd .RMGC 000000 spd
.MSMIN 000007 spd .RNAND 050000 000000 spd
.MSORC 000007 spd .ROENA 000000 spd
.MSPAR 000001 spd .ROP 000020 spd
.MTIM 000001 spd .ROR 030000 000000 spd
.MTWB 000017 spd .RPAR 000000 spd
.MXNOR 000007 spd .RPLUS 000000 spd
.MXOR 000007 spd .RPUSH 000100 spd
.PNTOC 000000 ext .RRAM 000200 000000 spd
.RA 000010 000000 spd .RRDLM 220000 spd
.RADDR 000000 spd .RRFCT 000200 spd
.RAND 040000 000000 spd .RRMIN 020000 000000 spd
.RB 400000 spd .RRPCT 000220 spd
.RBAD 000001 spd .RS0A 400000 000000 spd
.RBUS 001000 spd .RS0B 300000 000000 spd
.RCCAF 050000 spd .RS0Q 200000 000000 spd
.RCCBF 060000 spd .RSAB 100000 000000 spd
.RCCCA 000000 spd .RSAQ 000000 spd
.RCCCC 030000 spd .RSD0 700000 000000 spd
.RCCCE 160000 spd .RSDA 500000 000000 spd
.RCCCP 140000 spd .RSDQ 600000 000000 spd
.RCCEB 040000 spd .RSELC 004000 spd
.RCCER 100000 spd .RSELE 005000 spd
.RCCFZ 020000 spd .RSELF 003000 spd
.RCCGC 010000 spd .RSELM 002000 spd
.RCCIA 110000 spd .RSELP 001000 spd
.RCCLW 170000 spd .RSK 010000 spd
.RCCMB 120000 spd .RSKCN 240000 spd
.RCCMP 130000 spd .RSKMB 210000 spd
.RCCOF 010000 spd .RSMIN 010000 000000 spd
.RCCON 030000 spd .RSORC 100000 000000 spd
.RCCPP 150000 spd .RSPAR 000004 spd
.RCCXA 070000 spd .RTIM 000010 spd
.RCENA 000400 000000 spd .RTWB 000360 spd
.RCJP 000060 spd .RXNOR 070000 000000 spd
.RCJPP 000260 spd .RXOR 060000 000000 spd
.RCJS 000020 spd
.RCJV 000140 spd
.RCONT 000340 spd
.RCRTN 000240 spd
.RCRY 000400 spd
.RD 001000 000000 spd
.RDISA 000000 spd
.RENA 000400 000000 spd
.RFUNC 010000 000000 spd
ABORT 992#
ADRPE 103# SEQ 0168
ALL 395#
ALTCHH 9# 457
ALTMGO 1346#
ALU 393#
ANXM 1260#
AROV 1260#
AROVU 1260#
AST 1461#
ATSIN 1462#
BEGEND 1342#
BEGIN 78 79 80 1207 1208 1273#
BEGIN1 1289# 1343
BELL 1465#
BIS 1260#
C1 265#
C10 274#
C11 275#
C12 276#
C13 277#
C14 278#
C15 279#
C16 280#
C17 281#
C18 282#
C19 283#
C2 266#
C20 284#
C21 285#
C22 286#
C23 287#
C24 288#
C3 267#
C4 268#
C5 269#
C6 270#
C7 271#
C8 272#
C9 273#
CALL 466#
CBUFSZ 63#
CBUS 391#
CCA 1260#
CCALL 512#
CCALLC 513#
CCOMP 515#
CEXIT 517#
CHAIN 1012#
CHNOFF 1260#
CHNON 1260#
CIPORT 130#
CJRST 516#
CLAST 507#
CLK 1260# SEQ 0169
CLKCLR 1260#
CLKDIS 1260#
CLKENB 1260#
CLKU 1260#
CLOCKF 1328#
CMDQAV 431#
CNTLC 1345#
COMMA 1454#
CONSW 1329#
CPOPJ 1349#
CPOPJ1 1347#
CRAMPE 417#
CRLF 1142 1143 1449#
CRLF2 1146 1147 1451#
CRY0 1260#
CRY1 1260#
CSETRD 508#
CSETRW 510#
CSETWR 509#
CSHFLG 1508#
CSHMEM 1509#
CSRCHN 414#
CSRRQS 413#
CSTART 511#
CWAIT 514#
CYCL60 1502#
DCK 1260#
DCOMP 420#
DDTLNK 1026# 1287
DDTSRT 1287#
DEBUG1 124#
DEBUG2 125#
DEBUG3 126#
DEBUG4 127#
DEBUG5 128#
DECVER 25# 1308
DF22F 1413#
DIAGMN 1276#
DING 998#
DINIT 415#
DOLLAR 1468#
DSKUPD 1313
DSPEAR 123#
E1 220#
E10 229#
E11 230#
E12 231#
E13 232#
E14 233#
E15 234#
E16 235#
E17 236#
E18 237# SEQ 0170
E19 238#
E2 221#
E20 239#
E21 240#
E22 241#
E23 242#
E24 243#
E3 222#
E4 223#
E5 224#
E6 225#
E7 226#
E8 227#
E9 228#
EBUS 389#
EBUSPE 428#
ECOMP 421#
ENDFIX 1588#
ERFLG 57#
ERMORE 1362#
ERRPC 1333#
ERRTLS 1334#
ERSTOP 1001#
EXCASB 72# 1311
EXIOT 1260#
FOV 1260#
FOVU 1260#
FQUERR 429#
FRDLNK 1024#
FSELNK 1023#
FXU 1260#
GENEPE 424#
GOTO 467#
HYPEN 1459#
ICALL 530#
ICALLC 531#
IDLE 419#
IEXIT 535#
IJRST 533#
ILAST 524#
INHCSH 1009#
INHFLT 118#
INHMSG 119#
INHPAG 1006#
INXM 1260#
IOCLR 1260#
IPAER 107#
ISETDE 526#
ISETEI 529#
ISETEX 525#
ISETID 527#
ISETIN 528#
ISTART 534# SEQ 0171
ITERAT 70# 1306
ITRCH1 1366#
ITRCNT 1306#
IWAIT 532#
JOB41 1260#
JOBAPR 1260#
JOBCNI 1260#
JOBDDT 1260#
JOBFF 1260#
JOBOPC 1260#
JOBREL 1260#
JOBREN 1260#
JOBSA 1260#
JOBSYM 1260#
JOBTPC 1260#
JOBUSY 1260#
JOBUUO 1260#
JOBVER 1260#
KA10 1260
KAHZ50 1014#
KAIFLG 1323#
KI10 1260
KL10 71# 1260
KL10P0 1260
KLFLG 1324#
KLOLD 1222
LAPRAL 1260#
LAPRP1 1260#
LAPRP2 1260#
LAPRP3 1260#
LAPRP4 1260#
LAPRP5 1260#
LAPRP6 1260#
LAPRP7 1260#
LAROVT 1260#
LAST 471#
LAXER 106#
LCASDE 1260#
LCASLD 1260#
LCASLO 1260#
LCASWB 1260#
LCASWD 1260#
LCCASD 1260#
LCHNOF 1260#
LCHNON 1260#
LCIOPF 1260#
LCNTRP 1260#
LCNXER 1260#
LCPAER 1260#
LCPWRF 1260#
LCSBER 1260#
LCSLOA 1260#
LCSLOO 1260# SEQ 0172
LCTRP 1260#
LCWSX 1260#
LDATAF 1260#
LDCASD 1260#
LDIOPF 1260#
LDLNK 1025# 1276 1278
LDNXER 1260#
LDPAER 1260#
LDPWRF 1260#
LDSBER 1260#
LECASD 1260#
LEIOPF 1260#
LENXER 1260#
LEPAER 1260#
LEPWRF 1260#
LESBER 1260#
LEUPFW 1260#
LEVNCD 1260#
LEVNPA 1260#
LEVNPD 1260#
LEXCMP 1260#
LFLGCL 1260#
LFLGDS 1260#
LFLGEN 1260#
LFLGST 1260#
LFP 1463#
LGWC 108#
LINSTF 1260#
LINT 1260#
LIOCLR 1260#
LIOPFE 1260#
LKNTRP 1260#
LKTRP 1260#
LLACBL 1260#
LLDUSB 1260#
LLPRCN 1260#
LMUUO 1260#
LMUUOP 1260#
LNXMEN 1260#
LNXMER 1260#
LOGO 101#
LOOPER 1000#
LOOPGM 120#
LOOPTS 121#
LPAREN 1260#
LPARER 1260#
LPDOVT 1260#
LPFWPC 1260#
LPGFTR 1260#
LPICH1 1260#
LPICH2 1260#
LPICH3 1260#
LPICH4 1260# SEQ 0173
LPICH5 1260#
LPICH6 1260#
LPICH7 1260#
LPICHA 1260#
LPICLR 1260#
LPIIP1 1260#
LPIIP2 1260#
LPIIP3 1260#
LPIIP4 1260#
LPIIP5 1260#
LPIIP6 1260#
LPIIP7 1260#
LPIOFF 1260#
LPION 1260#
LPNTRP 1260#
LPRCH1 1260#
LPRCH2 1260#
LPRCH3 1260#
LPRCH4 1260#
LPRCH5 1260#
LPRCH6 1260#
LPRCH7 1260#
LPTRP 1260#
LPWRFE 1260#
LPWRFL 1260#
LREQSE 1260#
LRQCLR 1260#
LSBSEN 1260#
LSBUSE 1260#
LSCASD 1260#
LSECMO 1260#
LSIOPF 1260#
LSMODE 1260#
LSNTRP 1260#
LSNXER 1260#
LSPAER 1260#
LSPWRF 1260#
LSSBER 1260#
LSTRP 1260#
LTRP3T 1260#
LTRPAE 1260#
LTRPEN 1260#
LUSCMP 1260#
LUUO 1260#
LUUO1 454# 1393 1394
LUUO10 1393 1398
LUUO11 1393 1398
LUUO12 1393 1399
LUUO13 1393 1399
LUUO14 1393 1400
LUUO15 1393 1400
LUUO16 1393 1401
LUUO17 1393 1401 SEQ 0174
LUUO2 455# 1393 1395
LUUO20 1393 1402
LUUO21 1393 1402
LUUO22 1393 1403
LUUO23 1393 1403
LUUO24 1393 1404
LUUO25 1393 1404
LUUO26 1393 1405
LUUO27 458# 1393 1405
LUUO3 1393 1395
LUUO30 1393 1406
LUUO31 1393 1406
LUUO32 1393 1407
LUUO33 1393 1407
LUUO4 1393 1396
LUUO5 1393 1396
LUUO6 456# 1393 1397
LUUO7 457# 1393 1397
LUUOI 1260#
LWRITE 1260#
M1 245#
M10 254#
M11 255#
M12 256#
M13 257#
M14 258#
M15 259#
M16 260#
M17 261#
M18 262#
M19 263#
M2 246#
M3 247#
M4 248#
M5 249#
M6 250#
M7 251#
M8 252#
M9 253#
MAPNEW 1414#
MARGIN 1336#
MBCN 58#
MBERR 418#
MBUS 394#
MCBUS 132#
MCNVER 24# 1308
MEMLOW 1416#
MEMMAP 74# 1314
MEMSIZ 1417#
MEMTOT 1415#
MINUS 1458#
MLAST 290#
MMPROC 131# SEQ 0175
MODDVC 1008#
MODDVL 1207 1207# 1309
MODDVU 1208 1208# 1310
MODLNK 1027# 1273
MONCTL 1326#
MONFLG 1325#
MONTEN 1327#
MONTYP 1540#
MPER 102#
MPROC 390#
MPRUN 436#
MPVU 1260#
MSG 465#
MVRERR 430#
NDCB 405#
NDMP 404#
NEXM 105#
NIPORT 129#
NOPNT 996#
NOTWC0 104#
NXMU 1260#
OPRSEL 1010#
OPTIME 1428#
OVN 110#
P 59# 1053 1054 1055 1056 1260# 1348
PAG 1260#
PALERS 1002#
PARCLR 1260#
PARDIS 1260#
PAREA1 90# 1304
PAREA2 91# 1305
PAREA3 92# 1302
PAREA4 93# 1303
PAREA5 94# 1315
PAREA6 95# 1316
PAREA7 1315#
PAREA8 1316#
PARENB 1260#
PARU 1260#
PASCNT 1330#
PAT 56#
PCLEAR 422#
PDISF 1425#
PDLOVU 1260#
PDSABL 434#
PENABL 435#
PERIOD 1455#
PFSTRT 1282#
PGMNAM 8# 1307
PIA00 437#
PIA01 438#
PIA02 439#
PICHN1 1260# SEQ 0176
PICHN2 1260#
PICHN3 1260#
PICHN4 1260#
PICHN5 1260#
PICHN6 1260#
PICHN7 1260#
PICHNA 1260#
PICLR 1260#
PIOFF 1260#
PION 1260#
PLIST 1494# 1494
PLISTE 1494 1496#
PLISTS 1495#
PLUS 1460#
PNTENB 1424#
PNTEXT 1303#
PNTFLG 1423#
PNTINH 1426#
PNTLPT 997#
PNTNAM 1302#
PNTSPC 1427#
PORTP 412#
PPDEC 9# 456
PPDECF 9# 455
PVPAGI 1521#
PWFCLR 1260#
QUEST 1466#
RADIX 1469#
RADLSC 1471#
RADLSP 1470#
RANDBS 1304#
REENTR 1284#
RELIAB 1004#
REPT 1260#
REPT1 1260#
REPTU 1382#
REQSET 1260#
RESQAV 432#
RESRT1 1359#
RESRT2 1360#
RETURN 1291#
RQINT 416#
RSTART 993#
RTP 1464#
RUNALL 122#
RUNFLG 1331#
SADR1 78# 1280
SADR10 87# 1296
SADR11 88# 1297
SADR2 79# 1282
SADR3 80# 1284
SADR4 81#
SADR5 82# 1345 SEQ 0177
SADR6 83# 1346
SADR7 84# 1293
SADR8 85# 1294
SADR9 86# 1295
SBINIT 1066 1290#
SCOPE 1383#
SCOPE1 8# 458
SELLAR 425#
SEQ 392#
SFSTRT 1280#
SHWC 109#
SINCYC 426#
SLASH 1467#
SM10 1571#
SPACE 1456#
SPARE1 427#
SPARE2 433#
SRTDDT 81 83 1286#
SSCALL 481#
SSCHK 482#
SSCONT 480#
SSJRST 484#
SSLAST 478#
SSSTRT 479#
START 8# 82 84 85 86 87 88 1274
START1 1293#
START2 1294#
START3 1295#
START4 1296#
START5 1297#
STARTA 8# 1289
SUBLNK 1028# 1290
SWPTAB 1577#
SWTEXR 1305#
SYSEXR 1278#
TAB 1457#
TCALL 493#
TCALLC 494#
TCHECK 496#
TCONT 492#
TDENA 406#
TENLEN 207#
TESTPC 1332#
TEXIT 498#
TICKS 1335#
TJRST 497#
TLAST 490#
TOTALS 994#
TRACET 117#
TSSTAR 499#
TSTART 491#
TSTEBF 423#
TTNBRF 1515# SEQ 0178
TTYFIL 1431#
TTYSPD 1432#
TUSER 403#
TXALL 470#
TXNOT 468#
TXTINH 1005#
TXYES 469#
USER 1322#
USERF 1260#
USRASB 73# 1312
USRCRF 1441#
USRLFF 1440#
UUODIS 1394#
UUOEXT 1350#
UUORTN 1351#
UUOSKP 1348#
ZALU 399#
ZCBUS 401#
ZEBUS 397#
ZMPROC 400#
ZSEQ 398#
$$MUUO 1546#
$$OUTE 1552#
$$TAX1 1564#
$$TAX2 1565#
$$TOGG 1558#
$$UUO 1535#
$ACC0 1373#
$BEND1 1343#
$BEND2 1344#
$CHRIN 1434#
$CRLF 1436#
$DEVCH 1260#
$DSKUP 1313#
$DVCH1 1260#
$DVOFF 1430#
$EMODE 1311#
$FFF 1438#
$IBUF 1486#
$INEXT 1488#
$INNM 1487#
$ITRHL 1354#
$ITRX1 1355#
$LPAPE 76#
$MMAP 1314#
$MODVL 1309#
$MODVU 1310#
$OBUF 1477#
$ONETM 1337#
$OUTEX 1479#
$OUTNM 1478#
$PAPER 1260
$PARER 1361# SEQ 0179
$PNAME 1307#
$PSHER 1365#
$PVER 1308#
$RSRTX 1357#
$RSRTY 1358#
$SPAG1 1377#
$START 1274#
$SVAPR 1375#
$SVPAG 1376#
$SVPI 1374#
$SVUPC 1380#
$SVUUO 1379#
$TABF 1437#
$TTCHR 1433#
$TWCNT 1429#
$TYPNB 1435#
$UMODE 1312#
$UORTX 1352#
$USRHL 1356#
$UUOER 1353# 1394
$VTF 1439#
%ACTFL 1386#
%ACTUL 1387#
%COREC 1385#
%CORFL 1384#
%DISCR 1388#
%ERHI1 1527#
%ERHI2 1528#
%ERHI3 1529#
.JB41 1260#
.JBAPR 1260#
.JBCNI 1260#
.JBDDT 1260#
.JBFF 1260#
.JBOPC 1260#
.JBREL 1260#
.JBREN 1260#
.JBSA 1260#
.JBSYM 1260#
.JBTPC 1260#
.JBUSY 1260#
.JBUUO 1260#
.JBVER 1260#
.LA 721#
.LADDR 609#
.LAND 685#
.LB 725#
.LBAD 933#
.LBUS 825#
.LCCAF 761#
.LCCBF 765#
.LCCCA 741#
.LCCCC 753# SEQ 0180
.LCCCE 797#
.LCCCP 789#
.LCCEB 757#
.LCCER 773#
.LCCFZ 749#
.LCCGC 745#
.LCCIA 777#
.LCCLW 801#
.LCCMB 781#
.LCCMP 785#
.LCCOF 737#
.LCCON 733#
.LCCPP 793#
.LCCXA 769#
.LCENA 705#
.LCJP 869#
.LCJPP 901#
.LCJS 861#
.LCJV 881#
.LCONT 913#
.LCRTN 897#
.LCRY 849#
.LD 701#
.LDISA 709#
.LENA 713#
.LFUNC 665#
.LJ 613#
.LJMAP 865#
.LJRP 885#
.LJSRP 877#
.LJZ 857#
.LLDCT 905#
.LLDLM 813#
.LLOOP 909#
.LLSAD 805#
.LMARK 929#
.LMGC 625#
.LNAND 689#
.LOENA 621#
.LOP 853#
.LOR 681#
.LPAR 617#
.LPLUS 669#
.LPUSH 873#
.LRAM 717#
.LRDLM 817#
.LRFCT 889#
.LRMIN 677#
.LRPCT 893#
.LS0A 649#
.LS0B 645#
.LS0Q 641#
.LSAB 637# SEQ 0181
.LSAQ 633#
.LSD0 661#
.LSDA 653#
.LSDQ 657#
.LSELC 841#
.LSELE 845#
.LSELF 837#
.LSELM 833#
.LSELP 829#
.LSK 729#
.LSKCN 821#
.LSKMB 809#
.LSMIN 673#
.LSORC 629#
.LSPAR 925#
.LTIM 921#
.LTWB 917#
.LXNOR 697#
.LXOR 693#
.MA 723#
.MADDR 611#
.MAND 687#
.MB 727#
.MBAD 935#
.MBUS 827#
.MCCAF 763#
.MCCBF 767#
.MCCCA 743#
.MCCCC 755#
.MCCCE 799#
.MCCCP 791#
.MCCEB 759#
.MCCER 775#
.MCCFZ 751#
.MCCGC 747#
.MCCIA 779#
.MCCLW 803#
.MCCMB 783#
.MCCMP 787#
.MCCOF 739#
.MCCON 735#
.MCCPP 795#
.MCCXA 771#
.MCENA 707#
.MCJP 871#
.MCJPP 903#
.MCJS 863#
.MCJV 883#
.MCONT 915#
.MCRTN 899#
.MCRY 851#
.MD 703#
.MDISA 711# SEQ 0182
.MENA 715#
.MFUNC 667#
.MJ 615#
.MJMAP 867#
.MJRP 887#
.MJSRP 879#
.MJZ 859#
.MLDCT 907#
.MLDLM 815#
.MLOOP 911#
.MLSAD 807#
.MMARK 931#
.MMGC 627#
.MNAND 691#
.MOENA 623#
.MOP 855#
.MOR 683#
.MPAR 619#
.MPLUS 671#
.MPUSH 875#
.MRAM 719#
.MRDLM 819#
.MRFCT 891#
.MRMIN 679#
.MRPCT 895#
.MS0A 651#
.MS0B 647#
.MS0Q 643#
.MSAB 639#
.MSAQ 635#
.MSD0 663#
.MSDA 655#
.MSDQ 659#
.MSELC 843#
.MSELE 847#
.MSELF 839#
.MSELM 835#
.MSELP 831#
.MSK 731#
.MSKCN 823#
.MSKMB 811#
.MSMIN 675#
.MSORC 631#
.MSPAR 927#
.MTIM 923#
.MTWB 919#
.MXNOR 699#
.MXOR 695#
.PNTOC 9# 454
.RA 722#
.RADDR 610#
.RAND 686#
.RB 726# SEQ 0183
.RBAD 934#
.RBUS 826#
.RCCAF 762#
.RCCBF 766#
.RCCCA 742#
.RCCCC 754#
.RCCCE 798#
.RCCCP 790#
.RCCEB 758#
.RCCER 774#
.RCCFZ 750#
.RCCGC 746#
.RCCIA 778#
.RCCLW 802#
.RCCMB 782#
.RCCMP 786#
.RCCOF 738#
.RCCON 734#
.RCCPP 794#
.RCCXA 770#
.RCENA 706#
.RCJP 870#
.RCJPP 902#
.RCJS 862#
.RCJV 882#
.RCONT 914#
.RCRTN 898#
.RCRY 850#
.RD 702#
.RDISA 710#
.RENA 714#
.RFUNC 666#
.RJ 614#
.RJMAP 866#
.RJRP 886#
.RJSRP 878#
.RJZ 858#
.RLDCT 906#
.RLDLM 814#
.RLOOP 910#
.RLSAD 806#
.RMARK 930#
.RMGC 626#
.RNAND 690#
.ROENA 622#
.ROP 854#
.ROR 682#
.RPAR 618#
.RPLUS 670#
.RPUSH 874#
.RRAM 718#
.RRDLM 818#
.RRFCT 890# SEQ 0184
.RRMIN 678#
.RRPCT 894#
.RS0A 650#
.RS0B 646#
.RS0Q 642#
.RSAB 638#
.RSAQ 634#
.RSD0 662#
.RSDA 654#
.RSDQ 658#
.RSELC 842#
.RSELE 846#
.RSELF 838#
.RSELM 834#
.RSELP 830#
.RSK 730#
.RSKCN 822#
.RSKMB 810#
.RSMIN 674#
.RSORC 630#
.RSPAR 926#
.RTIM 922#
.RTWB 918#
.RXNOR 698#
.RXOR 694#
ALTCHK 451#
ATABLE 322# SEQ 0185
CALC 949#
CFIBF 446#
CFLUSH 1178#
CINVAL 1177#
CLOKOP 1172#
CONCAT 956#
CTABLE 354#
CWRTBI 1179#
DROPDV 1139#
ENDUUO 1185# 1342
EOPUUO 1186# 1344
ERLOOP 1230#
ERLP1 1231#
ERLP2 1232#
ERRHLT 1073#
ERROR 1239#
ERROR1 1250#
ERUUO 1229#
FATAL 1072#
FIELD 962#
FMSG 153#
FMSGC 155#
FMSGCD 161#
FMSGD 158#
FRD36 1214#
FRD8 1215#
FREAD 1213#
FSELEC 1212#
GET 1056#
GO 1053#
HALT 84 85 86 87 88 1058# 1363
ITABLE 371#
JEN 1060#
JRSTF 1059#
JSYS 445# 446
MAPADR 1195#
MAPCNK 1196#
MAPMEM 1192#
MAPPNT 1198#
MAPSET 1197#
MEMSEG 1194#
MEMZRO 1193#
MODPCP 1205#
MODPCU 1204#
MTROP 1173#
MWORD 974#
PBELL 1148#
PCRL 1142#
PCRL2 1146#
PCRL2F 1147#
PCRLF 1143#
PDEC 450#
PDECF 449# SEQ 0186
PFORCE 1150#
PGMINT 1066#
PJRST 1057#
PMSG 1152#
PMSGF 1155#
PNT1 1108#
PNT11 1122#
PNT11F 1123#
PNT1F 1109#
PNT2 1110#
PNT2F 1111#
PNT3 1112#
PNT3F 1113#
PNT4 1114#
PNT4F 1115#
PNT5 1116#
PNT5F 1117#
PNT6 1118#
PNT6F 1119#
PNT7 1120#
PNT7F 1121#
PNTA 1094#
PNTADF 1125#
PNTADR 1124#
PNTAF 1095#
PNTAL 1096#
PNTALF 1097#
PNTCHF 1107#
PNTCHR 1106#
PNTCI 1104#
PNTCIF 1105#
PNTCW 1140#
PNTCWF 1141#
PNTDCF 1133#
PNTDEC 1132#
PNTDS 1134#
PNTDSF 1135#
PNTHW 1128#
PNTHWF 1129#
PNTMGN 1219#
PNTMSF 1101#
PNTMSG 1100#
PNTNM 1136#
PNTOCC 448#
PNTOCF 1131#
PNTOCS 1130#
PNTOCT 1126#
PNTOTF 1127#
PNTSIX 1137#
PNTSXF 1138#
PSIXL 1098#
PSIXLF 1099#
PSIXM 1102# SEQ 0187
PSIXMF 1103#
PSP 1144#
PSPF 1145#
PUT 1055#
REPTUO 1233#
RGET 189#
RPUT 175#
RTN 1054# 1350
S 984#
SCOPER 452#
SIXBTZ 1161#
STABLE 306#
SWITCH 1167#
TASCIZ 169#
TEST 209#
TMSG 142#
TMSGC 144#
TMSGCD 150#
TMSGD 147#
TTABLE 338#
TTALTM 1088#
TTICHR 1081#
TTICLR 1091#
TTICNV 1086#
TTIDEC 1085#
TTINO 1083#
TTIOCT 1084#
TTIYES 1082#
TTLOOK 1087#
TTSIXB 1089#
TTYINP 1090#
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 1
DFPTA1 MAC 10-Oct-83 21:43 Externs / Entrys SEQ 0188
1 TITLE DFPTA (Port Basic Device Diagnostic)
2
3 SUBTTL Externs / Entrys
4
5 SALL
6
7 SEARCH DFPTA,MONSYM
8 000137 LOC 137
9 000137 000000 000001 MCNVER,,DECVER
10 030600 LOC ENDFIX+1
11
12 ; Miscellaneous stuff
13
14 INTERN UDEBUG ; no-port user mode debug switch
15 INTERN MDEBUG ; error message debug switch
16 INTERN SDEBUG ; single step debug switch
17 INTERN LDEBUG ; ucode load debug switch
18 INTERN IDEBUG ; fault isolation debug switch
19 INTERN PGMNAM ; program name
20 ENTRY START,STARTA ; start addresses
21 INTERN BUFF ; data buffer
22
23 ; Microcode routines
24
25 ENTRY CALPAR,DWCRAM,DRCRAM,TLOAD,MLOADN,MLOADY
26 INTERN CADDR,CWORDL,CWORDR,PARFLG
27
28 ; Miscellaneous routines
29
30 ENTRY CSRPNT,CSRENG,TRACE,ODELAY,TSTPNT
31 INTERN TWORD,TPAT,FINPUT,FINECH
32
33 ; Test variables
34
35 ENTRY INDLIS,TSTNAM,TSTCLS,TSTNUM,TSTSUB,TSTPC,TSTADD,TSTFLG
36 ENTRY TSTMIC,TSTMSK,TSTREP,TSTOFF,SPEAR2,SPREP2
37 INTERN ALTF,TSLOD1,TSLOD2,TAKFIL,TSTINH,PMODE
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 2
DFPTA1 MAC 10-Oct-83 21:43 Externs / Entrys SEQ 0189
38
39 ; Test execute routines
40
41 ENTRY SEXEC,SSPNT ; single step test
42 INTERN NSSTEP,SSADDR,SEADDR,SAADDR
43
44 ENTRY AEXEC,AAPNT ; ALU type test
45 INTERN ALSRT,ALCSR,ALERR,ALCOR,ALACT,ALEBF,ALTIM
46 INTERN ALFLS,ALFLE,ALFLC,ALFLT
47
48 ENTRY BEXEC,BBPNT ; basic ALU type test (same as SEXEC
49 INTERN CEBUF,AEBUF ; but check EBUF data not next addr)
50
51 ENTRY TEXEC,TTPNT ; test (full speed) type
52 INTERN TADDR,TADDRF,TCSRF,TEBUFC,TEBUFA
53
54 ENTRY CEXEC,CCPNT ; data transfer type test
55 INTERN CCSR,CLEN,CPAT,CSTATF,CEBUFA,CEBUFC,QADDRF,QADDR,CDERR
56
57 ENTRY IEXEC,IIPNT ; interrupt type test
58 INTERN ICSR,IADDR,IFLAG,IIOPF
59
60 ; Interrupt activity print routines
61
62 ENTRY IPRINT
63
64 ; Channel/device handling variables
65
66 ENTRY CBUF,CSTWRD,PORTCI,PORTNI,NISEL,CISEL,PORSEL,UUT
67
68 ; EXTERN's located in DFPTA2,3,4,5,6,7,8,9,A.MAC (Tests)
69
70 EXTERN TSTE1,TSTE2,TSTE3,TSTE4,TSTE5,TSTE6,TSTE7,TSTE10
71 EXTERN TSTE11,TSTE12,TSTE13,TSTE14,TSTE15,TSTE16,TSTE17,TSTE20
72 EXTERN TSTE21,TSTE22,TSTE23,TSTE24,TSTE25,TSTE26,TSTE27,TSTE30
73 EXTERN TSTE31,TSTE32,TSTE33,TSTE34,TSTE35,TSTE36,TSTE37,TSTE40
74 EXTERN TSTE41,TSTE42,TSTE43,TSTE44,TSTE45,TSTE46,TSTE47,TSTE50
75 EXTERN TSTE51,TSTE52,TSTE53,TSTE54,TSTE55,TSTE56,TSTE57,TSTE60
76 EXTERN TSTE61,TSTE62,TSTE63,TSTE64,TSTE65,TSTE66,TSTE67,TSTE70
77 EXTERN TSTE71,TSTE72,TSTE73,TSTE74,TSTE75,TSTE76
78
79 EXTERN TSTS1,TSTS2,TSTS3,TSTS4,TSTS5,TSTS6,TSTS7,TSTS10
80 EXTERN TSTS11,TSTS12,TSTS13,TSTS14,TSTS15,TSTS16,TSTS17,TSTS20
81 EXTERN TSTS21,TSTS22,TSTS23,TSTS24,TSTS25,TSTS26,TSTS27,TSTS30
82 EXTERN TSTS31,TSTS32,TSTS33,TSTS34,TSTS35,TSTS36,TSTS37,TSTS40
83 EXTERN TSTS41,TSTS42,TSTS43,TSTS44,TSTS45,TSTS46,TSTS47,TSTS50
84 EXTERN TSTS51,TSTS52,TSTS53,TSTS54,TSTS55,TSTS56,TSTS57,TSTS60
85 EXTERN TSTS61,TSTS62,TSTS63,TSTS64,TSTS65,TSTS66,TSTS67,TSTS70
86
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 3
DFPTA1 MAC 10-Oct-83 21:43 Externs / Entrys SEQ 0190
87 EXTERN TSTA1,TSTA2,TSTA3,TSTA4,TSTA5,TSTA6,TSTA7,TSTA10
88 EXTERN TSTA11,TSTA12,TSTA13,TSTA14,TSTA15,TSTA16,TSTA17,TSTA20
89 EXTERN TSTA21,TSTA22,TSTA23,TSTA24,TSTA25,TSTA26,TSTA27,TSTA30
90 EXTERN TSTA31,TSTA32,TSTA33,TSTA34,TSTA35,TSTA36,TSTA37,TSTA40
91 EXTERN TSTA41,TSTA42
92
93 EXTERN TSTU1,TSTU2,TSTU3,TSTU4,TSTU5,TSTU6,TSTU7,TSTU10
94 EXTERN TSTU11,TSTU12,TSTU13,TSTU14,TSTU15,TSTU16,TSTU17,TSTU20
95 EXTERN TSTU21,TSTU22,TSTU23,TSTU24,TSTU25,TSTU26,TSTU27,TSTU30
96 EXTERN TSTU31,TSTU32,TSTU33,TSTU34,TSTU35,TSTU36,TSTU37,TSTU40
97 EXTERN TSTU41
98
99 EXTERN TSTC1,TSTC2,TSTC3,TSTC4,TSTC5,TSTC6,TSTC7,TSTC10
100 EXTERN TSTC11,TSTC12,TSTC13,TSTC14,TSTC15,TSTC16,TSTC17,TSTC20
101 EXTERN TSTC21,TSTC22,TSTC23,TSTC24,TSTC25,TSTC26,TSTC27,TSTC30
102 EXTERN TSTC31,TSTC32,TSTC33,TSTC34,TSTC35,TSTC36,TSTC37,TSTC40
103 EXTERN TSTC41,TSTC42,TSTC43,TSTC44,TSTC45,TSTC46,TSTC47,TSTC50
104 EXTERN TSTC51,TSTC52,TSTC53,TSTC54,TSTC55,TSTC56,TSTC57,TSTC60
105
106 ; EXTERN's located in DFPTAI.MAC (Port Handling Routines module)
107
108 EXTERN LDEBUF,LDRAR,LDCRAM,LDCSR,RDEBUF,RDLAR,RDCRAM,RDCSR
109 EXTERN SETEBU,SETLAR,CLREBU,CHKCSR,ERESET,IPACLR,ISTOP
110 EXTERN IPASRT,IPASTP,IPASST,SLAST,SNEXT,EADDR,AADDR,SDATA
111 EXTERN INITPI,INITPD,.PIOFF,.PION,SETVEC,.CONI,.CONO,.DATAO,.DATAI
112 EXTERN INTNUM,INTPC,INTTYP,INTCON,INTAPR,INTTIM,INTUSE,INTCSR,INTEND
113 EXTERN CHINIT,GENCCW,GETLOG,CCWPNT,LOGPNT,CBASE,LOGBUF,CHDATA
114 EXTERN DSETUP,DEVREQ,DEVREL,SNARKF,USRION,PFSET,.INPNT,.INWD1
115 EXTERN HAVENI,HAVECI,REQ1,REQ2,REL
116
117 ; EXTERN's located in DFPTAU.MAC (Utility Routines module)
118
119 EXTERN CLRBUF,TTYYES,STCLOK,RUNTME,CURTIM,DEBTIM,PNTDEV,.CLOSE
120 EXTERN FORPNT,CONVSX,FINIT,UNAME,FGETW,FINCMD,FIOFF,FOARG,.RESET
121 EXTERN .SWCHP,SWITT,.ISWT,SWCHPT,.RSWIT,.LSWIT,SWRGT,SWCOM,.PNTOC
122 EXTERN .COMM,.CGOT,.SARG,.OARG,.DARG,ARGFLG,ARGUM,CHKARG,LASARG,DECYN
123 EXTERN SCOOFF,SCOSW,BUFGEN,BUFCOM,WRDERR,PATPNT
124
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 4
DFPTA1 MAC 10-Oct-83 21:43 Initialization SEQ 0191
125 SUBTTL Initialization
126
127 SALL
128
129 030600 PGMNAM: ASCIZ $
130 030600 015 012 104 106 120 DFPTA Port Basic Diagnostic
131 030601 124 101 040 120 157
132 030602 162 164 040 102 141
133 030603 163 151 143 040 104
134 030604 151 141 147 156 157
135 030605 163 164 151 143 015
136 030606 012 000 000 000 000 $
137
138 030607 402 00 0 00 030056 SB: SETZM $ONETM ; reinit everything
139 030610 START:
140
141 ; First clear debug switches and set up PGMINT variables - MAPNEW, PVPAGI
142
143 030610 402 00 0 00 064413' SETZM UDEBUG# ; no-port user mode debug switch
144 030611 402 00 0 00 064352' SETZM MDEBUG# ; error message debug switch
145 030612 402 00 0 00 064377' SETZM SDEBUG# ; single step debug switch
146 030613 402 00 0 00 064346' SETZM LDEBUG# ; ucode load debug switch
147 030614 402 00 0 00 064344' SETZM IDEBUG# ; fault isolation debug switch
148 030615 476 00 0 00 030143 SETOM MAPNEW ; map all memory
149 030616 476 00 0 00 030511 SETOM PVPAGI ; always use paging
150
151 ; MCPUS - Multiple cpu print switch - If this flag is cleared, the multiple
152 ; cpu message is printed in full, if set, only the question asking which
153 ; cpu to run on is asked.
154
155 030617 336 00 0 00 030056 SKIPN $ONETM ; first time through here?
156 030620 402 00 0 00 064351' SETZM MCPUS# ; yes - clear the flag
157
158 ; Set up cache usage
159
160 030621 402 00 0 00 030506 SETZM CSHFLG ; allow pgm and any buffer space
161 030622 402 00 0 00 030507 SETZM CSHMEM ; to be in cache
162
163 ; Init file input switch
164
165 030623 402 00 0 00 064341' SETZM FINPUT# ; initialize 'file input' switch
166 030624 476 00 0 00 064340' SETOM FINECH# ; set echo switch
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 5
DFPTA1 MAC 10-Oct-83 21:43 Initialization SEQ 0192
167
168 ; Init flags/switches
169
170 030625 402 00 0 00 064343' SETZM FMTTYP# ; allow all data formats
171 030626 402 00 0 00 064327' SETZM BONETM# ; clear $ONETM flag
172 030627 336 00 0 00 030056 SKIPN $ONETM ; 1st time pgm init?
173 030630 476 00 0 00 064327' SETOM BONETM ; yes - set $ONETM flag
174 030631 332 00 0 00 030056 SKIPE $ONETM ; 1st time pgm init?
175 030632 254 00 0 00 030644 JRST STRT1 ; no - skip next bit of code
176
177 ; First time only code
178
179 030633 402 00 0 00 000000* SETZM SWRGT ; yes - clear right hand switches
180 030634 201 00 0 00 000000* MOVEI .RSWIT ; get start addr of prompt table
181 030635 202 00 0 00 030525 MOVEM SWPTAB ; setup for switch prompting
182
183 ; Init print enable & forced print switch, and SPEAR flags
184
185 030636 211 00 0 00 023420 MOVNI ^D10000 ; set the printout limit
186 030637 202 00 0 00 030220 MOVEM PNTENB ; so won't die too soon
187 030640 402 00 0 00 000000* SETZM FORPNT ; clear forced print switch
188 030641 402 00 0 00 030521 SETZM $$TOGGLE ; enable switches
189 030642 402 00 0 00 064401' SETZM SPEAR1# ; clear 'SPEAR initial msg prnted' flag
190 030643 402 00 0 00 064402' SETZM SPEAR2# ; clear 'SPEAR err/fin msg prnted' flag
191
192 ; Standard startup and handle paging and clock
193
194 030644 260 17 0 00 000000* STRT1: GO .RESET ; reset everything
195 030645 265 00 0 00 030011 PGMINT ; init the program
196 030646 476 00 0 00 030516 SETOM MONTYP ; force to be TOPS-20
197 030647 205 00 0 00 500000 MOVSI 500000 ; access bits for the page table
198 030650 502 00 0 00 000400 HLLM 400 ; maps 340000 to physical 0
199 030651 201 00 0 00 340000 MOVEI 340000 ; causes paging when E is calculated
200 030652 202 00 0 00 000000* MOVEM CBASE ; channel routines now page correctly
201 030653 260 17 0 00 000000* GO STCLOK ; start the clock...
202 030654 402 00 0 00 030047 SETZM PASCNT ; clear pass count
203
204 ; Initialize page fault handler
205
206 030655 260 17 0 00 000000* GO PFSET ; set up for page faults on EBUS xfrs
207
208 ; Set/clear debug switches
209
210 030656 402 00 0 00 064413' SETZM UDEBUG ; clear no-port user mode debug switch
211 030657 402 00 0 00 064352' SETZM MDEBUG ; clear error message debug switch
212 030660 402 00 0 00 064346' SETZM LDEBUG ; clear ucode load debug switch
213 030661 402 00 0 00 064344' SETZM IDEBUG ; fault isolation debug switch
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 6
DFPTA1 MAC 10-Oct-83 21:43 Initialization SEQ 0193
214 030662 260 17 0 00 000000* GO SWITT ; get switches
215 030663 602 00 0 00 002000 TRNE DEBUG1 ; debug switch set?
216 030664 476 00 0 00 064413' SETOM UDEBUG ; set no-port user mode debug switch
217 030665 602 00 0 00 001000 TRNE DEBUG2 ; debug switch set?
218 030666 476 00 0 00 064352' SETOM MDEBUG ; set error message debug switch
219 030667 602 00 0 00 000200 TRNE DEBUG4 ; debug switch set?
220 030670 476 00 0 00 064346' SETOM LDEBUG ; set ucode load debug switch
221 030671 602 00 0 00 000100 TRNE DEBUG5 ; debug switch set?
222 030672 476 00 0 00 064344' SETOM IDEBUG ; set fault isolation debug switch
223 030673 201 00 0 00 000005 MOVEI ITERAT ; get default pass count
224 030674 202 00 0 00 030024 MOVEM ITRCNT ; save in FIXED area location
225 030675 402 00 0 00 046330 SETZM PMODE ; set program mode to 'no test'
226
227 ; Determine configuration
228
229 030676 260 17 0 00 032142 GO CONFIG ; determine configuration
230 030677 260 17 0 00 030662* GO SWITT ; get program switches
231 030700 607 00 0 00 000010 TLNN OPRSEL ; operator select switch set?
232 JRST [GO TSTSEX ; no - print selection and
233 MOVE NISEL ; continue. If no ports
234 IOR CISEL ; are selected, exit.
235 TRNN 4
236 JRST STARTB
237 030701 254 00 0 00 051516 JRST STARTA]
238 030702 602 00 0 00 000040 TRNE NIPORT ; NI port selected explicitly?
239 GO [MOVE 1,NISEL ; yes - get NI select word
240 TRNN 1,4 ; actually selected?
241 TRZ NIPORT ; no - clear switch
242 030703 260 17 0 00 051524 RTN]
243 030704 602 00 0 00 000020 TRNE CIPORT ; CI port selected explicitly?
244 GO [MOVE 1,CISEL ; yes - get CI select word
245 TRNN 1,4 ; actually selected?
246 TRZ CIPORT ; no - clear switch
247 030705 260 17 0 00 051530 RTN]
248 030706 606 00 0 00 000060 TRNN NIPORT!CIPORT ; any ports selected?
249 030707 260 17 0 00 032274 GO TSTSEG ; no - ask what devices to test
250
251 ; Handle SPEAR reporting
252
253 030710 260 17 0 00 043471 GO SPREP1 ; do initial SPEAR report
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 7
DFPTA1 MAC 10-Oct-83 21:43 Initialization SEQ 0194
254
255 ; Go do a test
256
257 030711 260 17 0 00 000000* STARTA: GO INITPI ; initialize PI system
258 030712 260 17 0 00 000000* GO SETVEC ; set up vector addresses
259 030713 260 17 0 00 030753 GO DISPAT ; do a test
260 030714 332 00 0 00 064326' SKIPE ALTF ; altmode typed?
261 030715 254 00 0 00 030733 JRST STARTB ; yes - exit
262 030716 260 17 0 00 030677* GO SWITT ; get switches
263 030717 607 00 0 00 000010 TLNN OPRSEL ; OPRSEL switch set?
264 030720 260 17 0 00 030734 GO PASPNT ; no - print end of pass
265 030721 260 17 0 00 030716* GO SWITT ; get switches
266 030722 336 00 0 00 030037 SKIPN USER ; user mode?
267 030723 607 00 0 00 400000 TLNN ABORT ; abort switch set?
268 030724 334 00 0 00 000000 SKIPA ; no (or user mode) - continue
269 030725 254 00 0 00 030733 JRST STARTB ; yes - exit
270 030726 037 12 0 00 000004 ENDUUO ; end of pass handling
271 030727 254 00 0 00 030711 JRST STARTA ; ITRCNT not exhausted - continue
272 030730 260 17 0 00 030721* GO SWITT ; get switches
273 030731 602 00 0 00 040000 TRNE LOOPGM ; loop on program switch set?
274 030732 254 00 0 00 030711 JRST STARTA ; yes - loop forever
275 030733 037 16 0 00 000004 STARTB: EOPUUO ; ITRCNT exhausted - exit pgm
276
277 ; Print pass count
278
279 030734 200 00 0 00 030047 PASPNT: MOVE PASCNT ; get pass count
280 030735 350 00 0 00 000000 AOS ; increment by 1
281 030736 231 00 0 00 000012 IDIVI ^D10 ; divide by 10
282 030737 332 00 0 00 000000 SKIPE ; print pass number only for passes
283 030740 326 01 0 00 051527 JUMPN 1,[RTN] ; 1,2..7,10,20,30,40 ...
284 030741 037 00 0 00 051534 TMSGC <End pass > ; print it
285 030742 200 00 0 00 030047 MOVE PASCNT
286 030743 350 00 0 00 000000 AOS
287 030744 037 15 0 00 000000 PNTDEC
288 030745 037 00 0 00 051537 TMSG <. at >
289 030746 402 00 0 00 030640* SETZM FORPNT ; clear force print
290 030747 200 03 0 00 051541 MOVE 3,[JFCL] ; set up timer routine
291 030750 260 17 0 00 000000* GO RUNTME ; print current time
292 030751 037 00 0 00 030242 PCRL
293 030752 263 17 0 00 000000 RTN ; return
294
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 8
DFPTA1 MAC 10-Oct-83 21:43 Test/Command Selection SEQ 0195
295 SUBTTL Test/Command Selection
296
297 ;#*********************************************************************
298 ;* DISPAT - Routine to dispatch to proper test as typed by the operator
299 ;* in response to the 'WHAT TEST' prompt.
300 ;
301 ; COMMAND DEFINITION
302 ; ------- ----------
303 ; ALL n All tests
304 ; EBUS n EBus module tests
305 ; SEQ n SEQ related tests
306 ; ALU n 2901 related tests
307 ; MPROC n MPROC module tests
308 ; CBUS n CBus module tests
309 ; MBUS n MBUS related tests
310 ; XXn n Test n, category XX (where XX can be EB,SE,AL,MP,CB)
311 ;
312 ; Other tests:
313 ;
314 ; DEBUG Enter port debugger
315 ;
316 ; CONFIG Determine/print configuration
317 ; CONPNT Print configuration
318 ; SELECT Select devices
319 ; DIAMON Enter DIAMON
320 ; DDT Enter DDT
321 ; HELP Print this text
322 ; EXIT Exit program
323 ;
324 ; TAKE Take commands from a file
325 ; NTAKE Take commands from a file (without echoing them)
326 ;
327 ; ENABLE Enable execution of a test
328 ; DISABL Disable execution of a test
329 ; DISLIS List disabled tests
330 ;
331 ; LIST n List all tests
332 ; LISTEB n List EBus module tests
333 ; LISTMP n List MPROC module tests
334 ; LISTCB n List CBus module tests
335 ; LISTSE n List Sequencer related tests
336 ; LISTAL n List 2901's related tests
337 ;
338 ; Switches: To complement switch, type switch name
339 ;
340 ; SWITCH Enter switches
341 ; SWPRIN Print current switches
342 ;
343 ; NOPNT LOOPER RELIAB TRACE LOOPGM DSPEAR SDEBUG NIPORT MMPROC
344 ; PNTLPT ERSTOP TXTINH INHFLT LOOPTS UDEBUG LDEBUG CIPORT MCBUS
345 ; DING PALERS OPRSEL INHMSG RUNALL MDEBUG IDEBUG
346 ;#********************************************************************
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 9
DFPTA1 MAC 10-Oct-83 21:43 Test/Command Selection SEQ 0196
347
348 030753 402 00 0 00 064326' DISPAT: SETZM ALTF# ; clear 'altmode typed' flag
349
350 030754 260 17 0 00 030730* GO SWITT ; get switches
351 030755 603 00 0 00 000010 TLNE OPRSEL ; OPRSEL switch set?
352 030756 037 01 0 00 051542 FMSGCD <Type ? for help> ; yes - print this
353
354 ; Do a little initialization - first set up altmode transfer address
355
356 030757 260 17 0 00 030754* DISP0: GO SWITT ; get switches
357 030760 603 00 0 00 000010 TLNE OPRSEL ; OPRSEL switch set?
358 MOVEI 1,[PCRLF ; yes - set $ addr to print blank line
359 030761 201 01 0 00 051546 JRST DISP0] ; line and continue at 'What test'
360 030762 607 00 0 00 000010 TLNN OPRSEL ; OPRSEL switch set?
361 MOVEI 1,[SETZM ALTF ; no - set up $ xfr addr to exit pass
362 GO FIOFF
363 030763 201 01 0 00 051550 RTN]
364 030764 202 01 0 00 030063 MOVEM 1,ALTMGO ; store it
365 030765 402 00 0 00 064326' SETZM ALTF ; clear 'altmode typed' flag
366
367 ; Set up print limit, clear error flag, clear input buffer, set up MBCN
368
369 030766 201 00 0 00 011610 MOVEI ^D5000 ; re-set up print limit just in case
370 030767 212 00 0 00 030220 MOVNM PNTENB ; the last test exceeded it
371 030770 400 15 0 00 000000 SETZ ERFLG, ; clear error flag
372 030771 260 17 0 00 000000* GO CLRBUF ; clear input buffer
373 030772 476 00 0 00 064404' SETOM TSLOD1# ; initialize ucode loaded flag (NI)
374 030773 476 00 0 00 064405' SETOM TSLOD2# ; initialize ucode loaded flag (CI)
375
376 ; Set/clear debug switches
377
378 030774 402 00 0 00 064413' SETZM UDEBUG ; clear no-port user mode debug switch
379 030775 402 00 0 00 064352' SETZM MDEBUG ; clear error message debug switch
380 030776 402 00 0 00 064377' SETZM SDEBUG ; clear single step debug switch
381 030777 402 00 0 00 064346' SETZM LDEBUG ; clear ucode load debug switch
382 031000 402 00 0 00 064344' SETZM IDEBUG ; fault isolation debug switch
383 031001 260 17 0 00 030757* GO SWITT ; get switches
384 031002 602 00 0 00 002000 TRNE DEBUG1 ; debug switch set?
385 031003 476 00 0 00 064413' SETOM UDEBUG ; set no-port user mode debug switch
386 031004 602 00 0 00 001000 TRNE DEBUG2 ; debug switch set?
387 031005 476 00 0 00 064352' SETOM MDEBUG ; set error message debug switch
388 031006 602 00 0 00 000400 TRNE DEBUG3 ; debug switch set?
389 031007 476 00 0 00 064377' SETOM SDEBUG ; set single step debug switch
390 031010 602 00 0 00 000200 TRNE DEBUG4 ; debug switch set?
391 031011 476 00 0 00 064346' SETOM LDEBUG ; set ucode load debug switch
392 031012 602 00 0 00 000100 TRNE DEBUG5 ; debug switch set?
393 031013 476 00 0 00 064344' SETOM IDEBUG ; set fault isolation debug switch
394 031014 402 00 0 00 046330 SETZM PMODE ; set program mode to 'no test'
395 031015 402 00 0 00 064354' SETZM MULFLG# ; clear 'multiple examine' flag
396 031016 476 00 0 00 064355' SETOM MULINI# ; set 'initial examine' flag
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 10
DFPTA1 MAC 10-Oct-83 21:43 Test/Command Selection SEQ 0197
397
398 ; Set up PI system in case any interrupts occur
399
400 031017 260 17 0 00 030711* GO INITPI ; init PI system
401 031020 260 17 0 00 030712* GO SETVEC ; set up vector addresses
402
403 ; Do ALL test automatically if OPRSEL switch is not set
404
405 031021 201 01 0 00 000001 MOVEI 1,1 ; set to ALL test
406 031022 607 00 0 00 000010 TLNN OPRSEL ; OPRSEL switch set?
407 031023 254 00 0 00 031111 JRST DISP2 ; no - go do test
408 031024 402 00 0 00 030047 SETZM PASCNT ; clear pass count
409
410 ; Now handle a normal command
411
412 031025 402 00 0 00 000000* SETZM .INWD1 ; clear special interrupt data
413 031026 476 00 0 00 064327' SETOM BONETM ; set 'not first time' flag
414 031027 336 00 0 00 064341' SKIPN FINPUT ; file input?
415 031030 476 00 0 00 064340' SETOM FINECH ; no - ensure echo flag set
416 031031 332 00 0 00 064340' SKIPE FINECH ; echo flag set?
417 GO [PFORCE ; no - print all this
418 PCRLF
419 FMSG <What test - >
420 031032 260 17 0 00 051556 RTN]
421 031033 332 00 0 00 064341' SKIPE FINPUT ; file input?
422 JRST [GO FINCMD ; yes - input sixbit cmd
423 JRST DISP0 ; error or EOF
424 031034 254 00 0 00 051562 JRST DISP0B] ; continue
425 031035 037 10 0 00 000003 DISP0A: TTSIXB ; get the name in sixbit
426 ALTCHK [GET XXW# ; adjust stack properly
427 SKIPN $TWCNT ; did a timeout occur?
428 JRST DISP0 ; yes - keep looking for input
429 MOVE 1,$TTCHR ; no - get character typed
430 CAIN 1,40 ; space (delimiter) typed?
431 JRST .+1 ; yes - continue (no error condition)
432 CAIN 1,77 ; was a question mark typed?
433 JRST DISQUE ; yes - handle
434 031036 007 00 0 00 051565 JRST DISPE] ; no - error - reask question
435 DISP0B: JUMPE [MOVE $TTCHR ; anything typed? if a space, keep
436 CAIN 40 ; looking for an argument, if not
437 JRST DISP0A ; exit
438 031037 322 00 0 00 051576 JRST DISP0]
439 031040 202 00 0 00 064412' MOVEM TSTSAV# ; save the typed name
440 031041 402 00 0 00 000000* SETZM ARGFLG ; clear 'argument given' flag
441 031042 200 01 0 00 030231 MOVE 1,$TTCHR ; get last character typed
442 031043 302 01 0 00 000015 CAIE 1,15 ; CR? (end of line)
443 031044 476 00 0 00 031041* SETOM ARGFLG ; set 'argument given' flag
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 11
DFPTA1 MAC 10-Oct-83 21:43 Test/Command Selection SEQ 0198
444
445 ; Process command
446
447 031045 200 01 0 00 064412' DISP1: MOVE 1,TSTSAV ; get command into AC1
448 031046 201 02 0 00 031132 MOVEI 2,DISLIS ; get address of cmd list
449 031047 260 17 0 00 000000* GO .COMM ; handle command decoding
450 031050 334 00 0 00 000000 SKIPA ; error return
451 031051 254 00 0 00 031111 JRST DISP2 ; dispatch to test
452
453 ; Now check to see if a test number was selected in the form
454 ; XXnnn where XX is the test class and nnn is the test number.
455
456 031052 260 17 0 00 034133 GO TSTDEC ; check for alternate format
457 031053 254 00 0 00 031073 JRST DISPD ; error return (unrecognizable)
458 031054 254 00 0 00 031060 JRST DISPR ; error return (range error)
459 031055 370 00 0 00 046311 SOS TSTADD ; good - adjust for SELTST
460 031056 260 17 0 00 032566 GO TSTSPC ; execute it
461 031057 254 00 0 00 031112 JRST DISPX ; end of test
462
463 ; Range error
464
465 031060 202 01 0 00 064375' DISPR: MOVEM 1,SAVMAX# ; save maximum test number
466 031061 037 01 0 00 051602 FMSGC <? > ; print error message
467 031062 200 01 0 00 046304 MOVE 1,TSTCLS
468 031063 200 00 0 01 031133 MOVE DISLIS+1(1)
469 031064 037 01 0 00 000002 PNTSXF
470 031065 037 01 0 00 051603 FMSG < Test selected is not in range 1->
471 031066 200 00 0 00 064375' MOVE SAVMAX ; get range
472 031067 037 17 0 00 000003 PNTOCF ; print it
473 031070 037 01 0 00 030242 PCRLF
474 031071 260 17 0 00 000000* GO FIOFF ; turn off file input
475 031072 254 00 0 00 030757 JRST DISP0 ; continue
476
477 ; Possibly a DEBUG command was typed - check for this and handle
478
479 031073 200 01 0 00 064412' DISPD: MOVE 1,TSTSAV ; get command into AC1
480 031074 201 02 0 00 034303 MOVEI 2,.DBCMD ; get address of cmd list
481 031075 260 17 0 00 031047* GO .COMM ; handle command decoding
482 031076 254 00 0 00 031106 JRST DISPE ; unrecognizable
483 031077 260 17 0 00 032335 GO PTEST ; determine port to use
484 031100 260 17 0 00 032354 GO PTESTP ; print results
485 031101 322 16 0 00 030757 JUMPE MBCN,DISP0 ; exit if no ports are selected
486 031102 260 17 0 00 000000* GO DEVREQ ; ensure the device is selected
487 031103 334 00 0 00 000000 SKIPA ; error - continue
488 031104 260 17 1 01 034453 GO @.DBDIS(1) ; dispatch to test
489 031105 254 00 0 00 030757 JRST DISP0 ; return to 'DEBUG>' prompt
490
491 ; Unrecognized command
492
493 031106 037 01 0 00 051612 DISPE: FMSGCD <? Unrecognizable - Type ? for help>
494 031107 260 17 0 00 031071* GO FIOFF ; turn off file input
495 031110 254 00 0 00 030757 JRST DISP0
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 12
DFPTA1 MAC 10-Oct-83 21:43 Test/Command Selection SEQ 0199
496
497 ; Dispatch to test
498
499 031111 260 17 1 01 031222 DISP2: GO @DISGO(1) ; dispatch to test
500
501 ; End of command - if OPRSEL switch set, ask for command
502 ; if OPRSEL switch not set, it is end of pass
503
504 031112 260 17 0 00 031001* DISPX: GO SWITT ; get program switches
505 031113 603 00 0 00 000010 TLNE OPRSEL ; OPRSEL set?
506 031114 254 00 0 00 030757 JRST DISP0 ; yes - not really end of pass
507 031115 263 17 0 00 000000 RTN ; no - end of pass
508
509 ; Handle ? typed
510
511 031116 037 01 0 00 000026 DISQUE: PFORCE ; handle Control-O
512 031117 037 00 1 00 031121 PNTMSG @DISQUU ; print text
513 031120 254 00 0 00 030757 JRST DISP0 ; continue
514
515 031121 DISQUU: [ASCII /
516 Tests Other Switches
517 ----- -------------- ----------------------
518 ALL ENABLE LIST NOPNT TRACE UDEBUG
519 EBUS DISABL LISTEB PNTLPT INHFLT MDEBUG
520 SEQ DISLIS LISTSE DING INHMSG SDEBUG
521 ALU LISTAL LOOPER LOOPGM LDEBUG
522 MPROC CONFIG LISTMP ERSTOP LOOPTS IDEBUG
523 031121 000000 051622 CBUS CONPNT LISTCB PALERS RUNALL NIPORT /]
524 [ASCIZ /
525 MBUS SELECT TAKE RELIAB TXTINH CIPORT
526 NTAKE OPRSEL DSPEAR
527 DEBUG DIAMON HELP SWITCH MMPROC
528 DDT EXIT SWPRIN MCBUS
529 (Or XXn where n is test #,
530 and XX is test category
531 EB,SE,AL,MP,CB)
532 031122 000000 051733 /]
533
534
535 ;#********************************************************************
536 ;* INDLIS - List of classes that may be specified with individual test numbers
537 ;#********************************************************************
538
539 031123 45 42 00 00 00 00 INDLIS: SIXBIT /EB/ ; an EBus module tests
540 031124 63 45 00 00 00 00 SIXBIT /SE/ ; an Sequencer related tests
541 031125 41 54 00 00 00 00 SIXBIT /AL/ ; an 2901's related tests
542 031126 55 60 00 00 00 00 SIXBIT /MP/ ; an MPROC module tests
543 031127 43 42 00 00 00 00 SIXBIT /CB/ ; an CBus module tests
544 031130 55 42 00 00 00 00 SIXBIT /MB/ ; an MBUS related tests
545 031131 000 00 0 00 000000 Z ; list terminator
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 13
DFPTA1 MAC 10-Oct-83 21:43 Test/Command Selection SEQ 0200
546
547 ;#*********************************************************************
548 ;* DISLIS -- List of all valid test names that can be typed
549 ;#*********************************************************************
550
551 031132 777777 777655 DISLIS: -123 ; ignore
552 031133 41 54 54 00 00 00 SIXBIT /ALL/ ; execute all tests
553 031134 45 42 65 63 00 00 SIXBIT /EBUS/ ; execute EBus module tests
554 031135 63 45 61 00 00 00 SIXBIT /SEQ/ ; execute Sequencer related tests
555 031136 41 54 65 00 00 00 SIXBIT /ALU/ ; execute 2901's related tests
556 031137 55 60 62 57 43 00 SIXBIT /MPROC/ ; execute MPROC module tests
557 031140 43 42 65 63 00 00 SIXBIT /CBUS/ ; execute CBus module tests
558 031141 55 42 65 63 00 00 SIXBIT /MBUS/ ; execute MBUS related tests
559 031142 62 41 56 44 57 55 SIXBIT /RANDOM/ ; execute tests randomly
560
561 ; Other tests/switches ...
562
563 031143 64 41 53 45 00 00 SIXBIT /TAKE/ ; take commands from a file
564 031144 56 64 41 53 45 00 SIXBIT /NTAKE/ ; take commands from a file
565 031145 44 45 42 65 47 00 SIXBIT /DEBUG/ ; execute debugger test
566 031146 43 57 56 46 51 47 SIXBIT /CONFIG/ ; determine configuration
567 031147 43 57 56 60 56 64 SIXBIT /CONPNT/ ; print configuration
568 031150 63 45 54 45 43 64 SIXBIT /SELECT/ ; select device(s) to test
569 031151 44 51 41 55 57 56 SIXBIT /DIAMON/ ; exit to DIAMON
570 031152 44 44 64 00 00 00 SIXBIT /DDT/ ; enter DDT
571 031153 45 70 51 64 00 00 SIXBIT /EXIT/ ; exit pgm
572 031154 50 45 54 60 00 00 SIXBIT /HELP/ ; help
573
574 031155 45 56 41 42 54 45 SIXBIT /ENABLE/ ; enable execution of a test
575 031156 44 51 63 41 42 54 SIXBIT /DISABL/ ; disable execution of a test
576 031157 44 51 63 54 51 63 SIXBIT /DISLIS/ ; list disabled tests
577
578 031160 54 51 63 64 00 00 SIXBIT /LIST/ ; list all tests
579 031161 54 51 63 64 45 42 SIXBIT /LISTEB/ ; list EBus module tests
580 031162 54 51 63 64 63 45 SIXBIT /LISTSE/ ; list Sequencer related tests
581 031163 54 51 63 64 41 54 SIXBIT /LISTAL/ ; list 2901's related tests
582 031164 54 51 63 64 55 60 SIXBIT /LISTMP/ ; list MPROC module tests
583 031165 54 51 63 64 43 42 SIXBIT /LISTCB/ ; list CBus module tests
584
585 031166 63 67 51 64 43 50 SIXBIT /SWITCH/ ; input switches
586 031167 63 67 60 62 51 56 SIXBIT /SWPRIN/ ; print switch selections
587
588 031170 56 57 60 56 64 00 SIXBIT /NOPNT/ ; don't print anything
589 031171 60 56 64 54 60 64 SIXBIT /PNTLPT/ ; print on printer
590 031172 44 51 56 47 00 00 SIXBIT /DING/ ; ding on error
591 031173 54 57 57 60 45 62 SIXBIT /LOOPER/ ; loop on error
592 031174 45 62 63 64 57 60 SIXBIT /ERSTOP/ ; halt on error
593 031175 60 41 54 45 62 63 SIXBIT /PALERS/ ; print all errors
594 031176 62 45 54 51 41 42 SIXBIT /RELIAB/ ; reliability testing
595 031177 64 70 64 51 56 50 SIXBIT /TXTINH/ ; shorten printing
596 031200 57 60 62 63 45 54 SIXBIT /OPRSEL/ ; operator select
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 14
DFPTA1 MAC 10-Oct-83 21:43 Test/Command Selection SEQ 0201
597 031201 64 62 41 43 45 00 SIXBIT /TRACE/ ; trace pgm flow
598 031202 51 56 50 46 54 64 SIXBIT /INHFLT/ ; inhibit fault isolation
599 031203 51 56 50 55 63 47 SIXBIT /INHMSG/ ; inhibit error messages
600 031204 54 57 57 60 47 55 SIXBIT /LOOPGM/ ; loop on program
601 031205 54 57 57 60 64 63 SIXBIT /LOOPTS/ ; loop on test
602 031206 62 65 56 41 54 54 SIXBIT /RUNALL/ ; run all test segments
603 031207 44 63 60 45 41 62 SIXBIT /DSPEAR/ ; disable SPEAR reporting
604 031210 65 44 45 42 65 47 SIXBIT /UDEBUG/ ; no-port user mode debug switch
605 031211 55 44 45 42 65 47 SIXBIT /MDEBUG/ ; error message debug switch
606 031212 63 44 45 42 65 47 SIXBIT /SDEBUG/ ; single step debug switch
607 031213 54 44 45 42 65 47 SIXBIT /LDEBUG/ ; ucode load debug switch
608 031214 51 44 45 42 65 47 SIXBIT /IDEBUG/ ; fault isolation debug switch
609 031215 56 51 60 57 62 64 SIXBIT /NIPORT/ ; NI port selected
610 031216 43 51 60 57 62 64 SIXBIT /CIPORT/ ; CI port selected
611 031217 55 55 60 62 57 43 SIXBIT /MMPROC/ ; missing Mproc module
612 031220 55 43 42 65 63 00 SIXBIT /MCBUS/ ; missing Cbus module
613 031221 000 00 0 00 000000 Z
614
615
616 ;#********************************************************************
617 ;* DISGO - Test dispatch addresses
618 ;#********************************************************************
619
620 031222 000000 051527 DISGO: [RTN] ; ignore
621 031223 000000 031334 TSTEXE ; ALL - execute all tests
622 031224 000000 031334 TSTEXE ; EBUS - execute EBus module tests
623 031225 000000 031334 TSTEXE ; SEQ - execute SEQ related tests
624 031226 000000 031334 TSTEXE ; ALU - execute 2901 related tests
625 031227 000000 031334 TSTEXE ; MPROC - execute MPROC module tests
626 031230 000000 031334 TSTEXE ; CBUS - execute CBus module tests
627 031231 000000 031311 TSTMBU ; MBUS - execute MBUS related tests
628 031232 000000 032632 TSTRAN ; RANDOM - execute tests randomly
629
630 031233 000000 032532 TSTTAK ; TAKE - take commands from a file
631 031234 000000 032530 TSTTAN ; NTAKE - take commands from a file
632 031235 000000 034203 TSTDEB ; DEBUG - execute debugger test
633 [GO CONFIG ; CONFIG - determine configuration
634 GO TSTSEL
635 031236 000000 052021 RTN]
636 [MOVE 1,[FMSGCD (CONPNT <CR>)]; CONPNT - print configuration
637 GO CHKARG
638 RTN
639 GO CONPNT
640 031237 000000 052031 RTN]
641 031240 000000 032233 TSTSEL ; SELECT - select port to test
642 031241 000000 032113 TSTDIA ; DIAMON - re-enter DIAMON
643 031242 000000 032120 TSTDDT ; DDT - enter DDT
644 031243 000000 032131 TSTHLT ; EXIT - exit
645 031244 000000 032371 TSTHLP ; HELP - help
646 031245 000000 032433 TSTENA ; ENABLE - enable test
647 031246 000000 032427 TSTDSA ; DISABL - disable test
648 031247 000000 032461 TSTDSL ; DISLIS - list disabled tests
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 15
DFPTA1 MAC 10-Oct-83 21:43 Test/Command Selection SEQ 0202
649
650 000026 SRTLIS==.-DISGO
651
652 031250 000000 032014 TSTLIS ; LIST - list all tests
653 031251 000000 032044 TSTLST ; LISTEB - list EBus module tests
654 031252 000000 032044 TSTLST ; LISTSE - list Sequencer related tests
655 031253 000000 032044 TSTLST ; LISTAL - list 2901's related tests
656 031254 000000 032044 TSTLST ; LISTMP - list MPROC module tests
657 031255 000000 032044 TSTLST ; LISTCB - list CBus module tests
658
659 031256 000000 032507 TSTSWI ; SWITCH - input switches
660 031257 000000 032514 TSTSWP ; SWPRIN - print switch selections
661
662 000036 SWSTT==.-DISGO
663
664 031260 000000 032521 TSTSSW ; NOPNT
665 031261 000000 032521 TSTSSW ; PNTLPT
666 031262 000000 032521 TSTSSW ; DING
667 031263 000000 032521 TSTSSW ; LOOPER
668 031264 000000 032521 TSTSSW ; ERSTOP
669 031265 000000 032521 TSTSSW ; PALERS
670 031266 000000 032521 TSTSSW ; RELIAB
671 031267 000000 032521 TSTSSW ; TXTINH
672 031270 000000 032521 TSTSSW ; OPRSEL
673 031271 000000 032521 TSTSSW ; TRACE
674 031272 000000 032521 TSTSSW ; INHFLT
675 031273 000000 032521 TSTSSW ; INHMSG
676 031274 000000 032521 TSTSSW ; LOOPGM
677 031275 000000 032521 TSTSSW ; LOOPTS
678 031276 000000 032521 TSTSSW ; RUNALL
679 031277 000000 032521 TSTSSW ; DSPEAR
680 031300 000000 032521 TSTSSW ; UDEBUG
681 031301 000000 032521 TSTSSW ; MDEBUG
682 031302 000000 032521 TSTSSW ; SDEBUG
683 031303 000000 032521 TSTSSW ; LDEBUG
684 031304 000000 032521 TSTSSW ; IDEBUG
685 031305 000000 032521 TSTSSW ; NIPORT
686 031306 000000 032521 TSTSSW ; CIPORT
687 031307 000000 032521 TSTSSW ; MMPROC
688 031310 000000 032521 TSTSSW ; MCBUS
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 16
DFPTA1 MAC 10-Oct-83 21:43 Test/Command Selection SEQ 0203
689
690 ;#********************************************************************
691 ;* MBUS - Execute MBUS related tests
692 ;#********************************************************************
693
694 031311 402 00 0 00 064350' TSTMBU: SETZM MBARGF# ; clear 'MBUS argument given' flag
695 031312 336 00 0 00 031044* SKIPN ARGFLG ; argument given?
696 031313 254 00 0 00 031324 JRST TSTMB0 ; no - continue
697 031314 210 01 0 00 052043 MOVN 1,[FMSGCD (Cmd RepeatCount <CR>)]
698 031315 260 17 0 00 000000* GO .DARG ; yes - get repeat count argument
699 031316 263 17 0 00 000000 RTN ; error/altmode/question - exit
700 031317 334 00 0 00 000000 SKIPA ; no argument given
701 031320 200 00 0 00 000000* MOVE ARGUM ; get argument
702 031321 202 00 0 00 064347' MOVEM MBARG# ; save it
703 031322 402 00 0 00 031312* SETZM ARGFLG ; fool TSTEXE argument handling
704 031323 476 00 0 00 064350' SETOM MBARGF ; set 'MBUS argument given' flag
705
706 ; Print directions
707
708 031324 037 01 0 00 000026 TSTMB0: PFORCE ; handle Control-O
709 TMSGC <
710 To isolate a possible MBUS problem:
711
712 (1) Disconnect MBUS cable from EBUS module.
713 Run MBUS tests with MMPROC and MCBUS switches set.
714 Failed - EBUS module is at fault. Stop.
715 Passed - MBUS cable or MPROC or CBUS modules at fault.
716 031325 037 00 0 00 052044 Continue at next step to isolate further.>
717 TMSGC <
718 (2) Connect MBUS cable to EBUS module only.
719 Run MBUS tests with MMPROC and MCBUS switches set.
720 Failed - MBUS cable is at fault. Stop.
721 Passed - MBUS cable or MPROC or CBUS modules at fault.
722 031326 037 00 0 00 052142 Continue at next step to isolate further.>
723 TMSGCD <
724 (3) Connect MBUS cable to EBUS and MPROC modules only.
725 Run MBUS tests with MCBUS switch set.
726 Failed - MPROC module is at fault. Stop.
727 031327 037 00 0 00 052230 Passed - CBUS module at fault. Stop.>
728 031330 037 01 0 00 000026 PFORCE
729 031331 200 00 0 00 052300 MOVE [MBUS] ; get test mask
730 031332 202 00 0 00 046313 MOVEM TSTMSK ; save test mask
731 031333 254 00 0 00 031336 PJRST TSTEXG ; do the tests
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 17
DFPTA1 MAC 10-Oct-83 21:43 Test/Command Selection SEQ 0204
732
733 ;#********************************************************************
734 ;* ALL Execute all tests
735 ;* EBUS Execute EBus module tests
736 ;* SEQ Execute SEQ related tests
737 ;* ALU Execute 2901 related tests
738 ;* MPROC Execute MPROC module tests
739 ;* MBUS Execute MBUS related tests
740 ;* CBUS Execute CBus module tests
741 ;
742 ; All of these commands dispatch to TSTEXE which sets up test mask
743 ; and does dispatch to tests.
744 ;#********************************************************************
745
746 TSTEXE: MOVE [ALL ; get test mask
747 EBUS
748 SEQ
749 ALU
750 MPROC
751 CBUS
752 031334 200 00 0 01 052300 MBUS]-1(1)
753 031335 202 00 0 00 046313 MOVEM TSTMSK ; save test mask
754 031336 260 17 0 00 032663 TSTEXG: GO TSTDIS ; go dispatch to tests
755
756 ; Handle SPEAR reporting
757
758 031337 400 15 0 00 000000 SETZ ERFLG, ; clear error flag
759 031340 260 17 0 00 043532 GO SPREP2 ; do final SPEAR report
760
761 ; Do fault isolation
762
763 031341 260 17 0 00 031343 GO ISOPNT
764 031342 263 17 0 00 000000 RTN
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 18
DFPTA1 MAC 10-Oct-83 21:43 Test/Command Selection SEQ 0205
765
766 ;#********************************************************************
767 ;* ISOPNT - Print fault isolation data
768 ;
769 ; The data printed is that collected by the test dispatch routine
770 ; consisting of 'NETBAD', the list of bad networks. Also printed
771 ; is the module and name associated with each network.
772 ;#********************************************************************
773
774 031343 332 00 0 00 046316 ISOPNT: SKIPE TSTMUL ; multiple tests being run?
775 031344 332 00 0 00 046317 SKIPE TSTINH ; yes - inhibit fault isolation?
776 031345 263 17 0 00 000000 RTN ; yes - don't print anything
777 031346 332 00 0 00 064342' SKIPE FLTPNT# ; already printed?
778 031347 263 17 0 00 000000 RTN ; yes - return
779 031350 476 00 0 00 064342' SETOM FLTPNT ; ensure it doesn't get printed again
780 031351 261 17 0 00 000000 RPUT (0,1,2,3,4,5) ; save AC's
781
782 031357 402 00 0 00 031471 SETZM NETPNT ; first initialize list of
783 031360 200 00 0 00 052310 MOVE [NETPNT,,NETPNT+1] ; networks to all zeros
784 031361 251 00 0 00 031600 BLT NETPNT+^D71 ; (no networks)
785 031362 403 01 0 00 000002 SETZB 1,2 ; clear AC1 and AC2
786 031363 350 00 0 00 000002 ISOPN0: AOS 2 ; point to next network
787 031364 303 02 0 00 000110 CAILE 2,^D72 ; all done?
788 031365 254 00 0 00 031374 JRST ISOPN1 ; yes - go print it
789 031366 200 00 0 02 031600 MOVE NETBAD-1(2) ; get probability of being bad
790 031367 322 00 0 00 031363 JUMPE ISOPN0 ; zero - check next network
791 031370 516 00 0 01 031471 HRLZM NETPNT(1) ; save probability in left half
792 031371 542 02 0 01 031471 HRRM 2,NETPNT(1) ; save network number in right half
793 031372 350 00 0 00 000001 AOS 1 ; increment number of networks to print
794 031373 254 00 0 00 031363 JRST ISOPN0 ; check next network
795 031374 322 01 0 00 031462 ISOPN1: JUMPE 1,ISOPNX ; any to print? no - exit
796
797 ; Sort the results
798
799 031375 400 02 0 00 000000 SETZ 2, ; clear pointer to NETPNT
800 031376 350 00 0 00 000002 ISOPN2: AOS 2 ; point to next item
801 031377 311 02 0 00 000001 CAML 2,1 ; done with list?
802 031400 254 00 0 00 031423 JRST ISOPN5 ; yes - go print it
803 031401 200 03 0 00 000002 MOVE 3,2 ; get pointer to rest of list
804 031402 350 00 0 00 000003 ISOPN3: AOS 3 ; point to next item
805 031403 313 03 0 00 000001 CAMLE 3,1 ; done with rest of list?
806 031404 254 00 0 00 031376 JRST ISOPN2 ; yes - try next item
807 031405 574 04 0 02 031470 HLRE 4,NETPNT-1(2) ; no - get the probability of
808 031406 574 05 0 03 031470 HLRE 5,NETPNT-1(3) ; each network
809 031407 311 04 0 00 000005 CAML 4,5 ; need to reverse items?
810 031410 254 00 0 00 031402 JRST ISOPN3 ; no - try next item
811 031411 312 04 0 00 000005 CAME 4,5 ; need to reverse items?
812 031412 254 00 0 00 031417 JRST ISOPN4 ; yes - do it
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 19
DFPTA1 MAC 10-Oct-83 21:43 Test/Command Selection SEQ 0206
813 031413 550 04 0 02 031470 HRRZ 4,NETPNT-1(2) ; maybe - get the network
814 031414 550 05 0 03 031470 HRRZ 5,NETPNT-1(3) ; numbers of each
815 031415 311 04 0 00 000005 CAML 4,5 ; need to reverse items?
816 031416 254 00 0 00 031402 JRST ISOPN3 ; no - try next item
817 031417 200 00 0 02 031470 ISOPN4: MOVE NETPNT-1(2) ; yes - do so
818 031420 250 00 0 03 031470 EXCH NETPNT-1(3)
819 031421 202 00 0 02 031470 MOVEM NETPNT-1(2)
820 031422 254 00 0 00 031402 JRST ISOPN3 ; keep looping
821
822 ; Print the results
823
824 031423 037 00 0 00 030242 ISOPN5: PCRL
825 031424 260 17 0 00 000000* GO PNTDEV ; print device
826 031425 550 02 0 00 031471 HRRZ 2,NETPNT ; get network offset
827 031426 200 02 0 02 031711 MOVE 2,NETDES(2) ; get netword description
828 031427 603 02 0 00 400000 TLNE 2,(1B0) ; EBUS module?
829 031430 037 00 0 00 052311 TMSGD < FRU: EBUS module> ; yes - print it
830 031431 603 02 0 00 200000 TLNE 2,(1B1) ; MBUS module?
831 031432 037 00 0 00 052316 TMSGD < FRU: MPROC module> ; yes - print it
832 031433 603 02 0 00 100000 TLNE 2,(1B2) ; CBUS module?
833 031434 037 00 0 00 052323 TMSGD < FRU: CBUS module> ; yes - print it
834 031435 603 02 0 00 040000 TLNE 2,(1B3) ; MBUS cable?
835 031436 037 00 0 00 052330 TMSGD < FRU: MBUS cable> ; yes - print it
836 031437 037 00 0 00 052334 TMSGCD <Faulty networks (in order of probability):>
837 031440 474 03 0 00 000000 SETO 3, ; pointer to list of networks
838 031441 350 00 0 00 000003 ISOPN6: AOS 3 ; point to next network
839 031442 200 02 0 03 031471 MOVE 2,NETPNT(3) ; get data
840 031443 322 02 0 00 031461 JUMPE 2,ISOPN8 ; done? yes - exit
841 031444 550 02 0 00 000002 HRRZ 2,2 ; get only network offset
842 031445 550 02 0 02 031710 HRRZ 2,NETDES-1(2) ; get address of ASCIZ message
843 031446 037 00 0 00 052346 TMSGC < >
844 031447 336 00 0 00 064344' SKIPN IDEBUG ; fault isolation switch set?
845 031450 254 00 0 00 031455 JRST ISOPN7 ; no - continue
846 031451 037 00 0 00 052347 TMSG <Weight > ; yes - print the weight
847 031452 574 00 0 03 031471 HLRE NETPNT(3) ; get data
848 031453 037 16 0 00 000003 PNTOCS
849 031454 037 00 0 00 000040 PSP
850 031455 037 00 1 00 000002 ISOPN7: PNTMSG @2 ; print it
851 031456 336 00 0 00 064344' SKIPN IDEBUG ; fault isolation switch set?
852 031457 307 03 0 00 000003 CAIG 3,3 ; no - already printed 4 networks?
853 031460 254 00 0 00 031441 JRST ISOPN6 ; no - loop till done
854
855 ; Exit
856
857 031461 037 00 0 00 030242 ISOPN8: PCRL ; final CRLF
858 031462 262 17 0 00 000005 ISOPNX: RGET (5,4,3,2,1,0) ; restore AC's
859
860 031470 263 17 0 00 000000 RTN ; return
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 20
DFPTA1 MAC 10-Oct-83 21:43 Test/Command Selection SEQ 0207
861
862 ;#********************************************************************
863 ;* Network Data Areas
864 ;#********************************************************************
865
866 031471 NETPNT: BLOCK ^D72 ; networks in order of probability
867 031601 NETBAD: BLOCK ^D72 ; probability that Network n is bad
868
869 400000 000000 NEBUS==1B0
870 200000 000000 NMPROC==1B1
871 100000 000000 NCBUS==1B2
872 040000 000000 NMBUS==1B3
873
874 ; EBUS Module networks
875
876 031711 400000 052351 NETDES: NEBUS![ASCIZ ^E1: EBUS Module - EBUS Control Logic^]
877 031712 400000 052361 NEBUS![ASCIZ ^E2: EBUS Module - CC EBUS RQST^]
878 031713 400000 052370 NEBUS![ASCIZ ^E3: EBUS Module - CC GRNT CSR^]
879 031714 400000 052377 NEBUS![ASCIZ ^E4: EBUS Module - Interrupt Logic^]
880 031715 400000 052406 NEBUS![ASCIZ ^E5: EBUS Module - Clock Logic^]
881 031716 400000 052415 NEBUS![ASCIZ ^E6: EBUS Module - Clear Logic^]
882 031717 400000 052424 NEBUS![ASCIZ ^E7: EBUS Module - Magic # Field Decode^]
883 031720 400000 052434 NEBUS![ASCIZ ^E8: EBUS Module - CC CSR CHNG^]
884 031721 400000 052443 NEBUS![ASCIZ ^E9: EBUS Module - KMUX^]
885 031722 400000 052450 NEBUS![ASCIZ ^E10: EBUS Module - EMUX^]
886 031723 400000 052455 NEBUS![ASCIZ ^E11: EBUS Module - RMUX/CSR 25-31^]
887 031724 400000 052464 NEBUS![ASCIZ ^E12: EBUS Module - CSR 11-13/19-22/33-35^]
888 031725 400000 052475 NEBUS![ASCIZ ^E13: EBUS Module - CSR 04 Rqst Exam/Dep^]
889 031726 400000 052505 NEBUS![ASCIZ ^E14: EBUS Module - CSR 05 Rqst Interrupt/CC INTR ACTIVE^]
890 031727 400000 052521 NEBUS![ASCIZ ^E15: EBUS Module - CSR 06/07 CRAM PE/MBUS Error^]
891 031730 400000 052533 NEBUS![ASCIZ ^E16: EBUS Module - CSR 24 EBUS PE^]
892 031731 400000 052542 NEBUS![ASCIZ ^E17: EBUS Module - CSR 32 Mproc Run^]
893 031732 400000 052552 NEBUS![ASCIZ ^E18: EBUS Module - KMUX Parity Generation^]
894 031733 400000 052563 NEBUS![ASCIZ ^E19: EBUS Module - EBUS Parity Checking^]
895 031734 400000 052573 NEBUS![ASCIZ ^E20: EBUS Module - EBUF (Check MBUS cable connection)^]
896 031735 400000 052606 NEBUS![ASCIZ ^E21: EBUS Module - EBUS Data Xcvr's^]
897 031736 400000 052616 NEBUS![ASCIZ ^E22: EBUS Module - EBUS Control Xcvr's^]
898 031737 400000 052626 NEBUS![ASCIZ ^E23: EBUS Module - 2901's/Carry Logic^]
899 031740 400000 052636 NEBUS![ASCIZ ^E24: EBUS Module - Constant MUX^]
900
901 ; MPROC Module networks
902
903 031741 200000 052645 NMPROC![ASCIZ ^M1: MPROC Module - MPROC Run Clocks^]
904 031742 200000 052655 NMPROC![ASCIZ ^M2: MPROC Module - Local Memory Control^]
905 031743 200000 052666 NMPROC![ASCIZ ^M3: MPROC Module - MBUS Error Detect Logic^]
906 031744 200000 052677 NMPROC![ASCIZ ^M4: MPROC Module - CRAM Read/Write Control^]
907 031745 200000 052710 NMPROC![ASCIZ ^M5: MPROC Module - Jump ADDR MUX^]
908 031746 200000 052717 NMPROC![ASCIZ ^M6: MPROC Module - CC MUX^]
909 031747 200000 052725 NMPROC![ASCIZ ^M7: MPROC Module - 2910 MicroSequencer^]
910 031750 200000 052735 NMPROC![ASCIZ ^M8: MPROC Module - CRAM ADDR MUX^]
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 21
DFPTA1 MAC 10-Oct-83 21:43 Test/Command Selection SEQ 0208
911 031751 200000 052744 NMPROC![ASCIZ ^M9: MPROC Module - LAR^]
912 031752 200000 052751 NMPROC![ASCIZ ^M10: MPROC Module - CRAM 0000-7777^]
913 031753 200000 052760 NMPROC![ASCIZ ^M11: MPROC Module - Cond/Skip Decoder^]
914 031754 200000 052770 NMPROC![ASCIZ ^M12: MPROC Module - CRAM Control Register^]
915 031755 200000 053001 NMPROC![ASCIZ ^M13: MPROC Module - Local Storage RAM^]
916 031756 200000 053011 NMPROC![ASCIZ ^M14: MPROC Module - Local Storage Addr Register^]
917 031757 200000 053023 NMPROC![ASCIZ ^M15: MPROC Module - RAM Mode MUX^]
918 031760 200000 053032 NMPROC![ASCIZ ^M16: MPROC Module - RAR^]
919 031761 200000 053037 NMPROC![ASCIZ ^M17: MPROC Module - Right CRAM Load Buffer^]
920 031762 200000 053050 NMPROC![ASCIZ ^M18: MPROC Module - Left CRAM Load Buffer^]
921 031763 200000 053061 NMPROC![ASCIZ ^M19: MPROC Module - MW Out MUX^]
922
923 ; CBUS Module networks
924
925 031764 100000 053070 NCBUS![ASCIZ ^C1: CBUS Module - CBUS Control Logic^]
926 031765 100000 053100 NCBUS![ASCIZ ^C2: CBUS Module - Clock Logic^]
927 031766 100000 053107 NCBUS![ASCIZ ^C3: CBUS Module - Reset Logic^]
928 031767 100000 053116 NCBUS![ASCIZ ^C4: CBUS Module - Clear Logic^]
929 031770 100000 053125 NCBUS![ASCIZ ^C5: CBUS Module - 'CC CBUS AVAIL'^]
930 031771 100000 053134 NCBUS![ASCIZ ^C6: CBUS Module - 'CC CB LST WD'/ 'CC CHAN ERR'^]
931 031772 100000 053146 NCBUS![ASCIZ ^C7: CBUS Module - 'CLR CC CODE'^]
932 031773 100000 053155 NCBUS![ASCIZ ^C8: CBUS Module - Magic # Field Decode^]
933 031774 100000 053165 NCBUS![ASCIZ ^C9: CBUS Module - 'CC CBUS PAR ERR'^]
934 031775 100000 053175 NCBUS![ASCIZ ^C10: CBUS Module - 'CC PLI PAR ERR'^]
935 031776 100000 053205 NCBUS![ASCIZ ^C11: CBUS Module - Parity Predictor^]
936 031777 100000 053215 NCBUS![ASCIZ ^C12: CBUS Module - Formatter Control^]
937 032000 100000 053225 NCBUS![ASCIZ ^C13: CBUS Module - PLI Control Logic^]
938 032001 100000 053235 NCBUS![ASCIZ ^C14: CBUS Module - CBUS Input Buffer^]
939 032002 100000 053245 NCBUS![ASCIZ ^C15: CBUS Module - CBUS Output Buffer^]
940 032003 100000 053255 NCBUS![ASCIZ ^C16: CBUS Module - CBUS Out Par Gen^]
941 032004 100000 053265 NCBUS![ASCIZ ^C17: CBUS Module - CBUS In Par Checker^]
942 032005 100000 053275 NCBUS![ASCIZ ^C18: CBUS Module - DMUX^]
943 032006 100000 053302 NCBUS![ASCIZ ^C19: CBUS Module - SMUX^]
944 032007 100000 053307 NCBUS![ASCIZ ^C20: CBUS Module - Mvr/Fmtr^]
945 032010 100000 053315 NCBUS![ASCIZ ^C21: CBUS Module - PLI Logic (Check PLI cable connection)^]
946 032011 100000 053331 NCBUS![ASCIZ ^C22: CBUS Module - PMUX^]
947 032012 100000 053336 NCBUS![ASCIZ ^C23: CBUS Module - CMUX^]
948 032013 100000 053343 NCBUS![ASCIZ ^C24: CBUS Module - CBUF^]
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 22
DFPTA1 MAC 10-Oct-83 21:43 Test/Command Selection SEQ 0209
949
950 ;#********************************************************************
951 ;* TSTLIS - List test description for all tests.
952 ;
953 ; Argument: XXn - list only one test
954 ; none - list all tests
955 ;#********************************************************************
956
957 ; Check for argument
958
959 032014 201 00 0 00 001000 TSTLIS: MOVEI 1000 ; set up default maximum
960 032015 202 00 0 00 064410' MOVEM TSTL2 ; test limit
961 032016 476 00 0 00 046317 SETOM TSTINH ; inhibit fault isolation
962 032017 336 00 0 00 031322* SKIPN ARGFLG ; argument given?
963 032020 254 00 0 00 032036 JRST TSTLI1 ; no - do all tests
964
965 ; Decode argument
966
967 032021 200 01 0 00 053361 TSTLI0: MOVE 1,[FMSGCD (LIST <CR> or LIST XXnnn XXnnn ... <CR>)]
968 032022 260 17 0 00 000000* GO .SARG ; get SIXBIT argument
969 032023 263 17 0 00 000000 RTN ; error/altmode/question - exit
970 032024 263 17 0 00 000000 RTN ; no more arguments
971 032025 200 01 0 00 031320* MOVE 1,ARGUM ; get argument
972 032026 260 17 0 00 034133 GO TSTDEC ; decode as a test name
973 JRST [FMSGCD <? Argument not recognizable as a test name 'XXn'>
974 GO FIOFF
975 032027 254 00 0 00 053375 RTN]
976 JRST [FMSGC <? Test selected is not in range 1->
977 MOVE 1 ; get range
978 PNTOCF ; print it
979 PCRLF
980 GO FIOFF
981 032030 254 00 0 00 053410 RTN]
982 032031 200 00 0 00 046311 MOVE TSTADD ; get dispatch table address
983 032032 202 00 0 00 064407' MOVEM TSTL1# ; save it as start address
984 032033 202 00 0 00 064410' MOVEM TSTL2# ; save it as end address
985 032034 260 17 0 00 032076 GO TSTLSS ; print it
986 032035 254 00 0 00 032021 JRST TSTLI0 ; next argument
987
988 ; List all tests
989
990 032036 201 00 0 00 033146 TSTLI1: MOVEI TDISP1 ; get dispatch table address
991 032037 202 00 0 00 064407' MOVEM TSTL1 ; save it as start address
992 032040 201 00 0 00 033516 MOVEI TEND-1 ; get end of table
993 032041 202 00 0 00 064410' MOVEM TSTL2 ; save it as end address
994 032042 260 17 0 00 032076 GO TSTLSS ; print them
995 032043 263 17 0 00 000000 RTN ; yes - return
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 23
DFPTA1 MAC 10-Oct-83 21:43 Test/Command Selection SEQ 0210
996
997 ;#********************************************************************
998 ;* TSTLST - List test description for either single test or class of tests.
999 ;
1000 ; Argument(s): n - list only one test
1001 ; n,n - list range of tests
1002 ; none - list all tests
1003 ;#********************************************************************
1004
1005 ; First set up class of tests
1006
1007 032044 275 01 0 00 000027 TSTLST: SUBI 1,SRTLIS+1 ; normalize to 0..n
1008 032045 202 01 0 00 046304 MOVEM 1,TSTCLS ; save test class
1009 XCT [MOVEI 2,TEBUS ; get starting address in address
1010 MOVEI 2,TSEQ ; table
1011 MOVEI 2,TALU
1012 MOVEI 2,TMPROC
1013 032046 256 00 0 01 053416 MOVEI 2,TCBUS](1)
1014 032047 202 02 0 00 064407' MOVEM 2,TSTL1 ; save as starting address
1015 032050 202 02 0 00 064411' MOVEM 2,TSTL3# ; save for later use
1016 XCT [MOVEI 2,TSEQ-1 ; get starting address in address
1017 MOVEI 2,TALU-1 ; table
1018 MOVEI 2,TMPROC-1
1019 MOVEI 2,TCBUS-1
1020 032051 256 00 0 01 053423 MOVEI 2,TEND-1](1)
1021 032052 202 02 0 00 064410' MOVEM 2,TSTL2 ; save as starting address
1022 032053 200 03 0 00 000002 MOVE 3,2 ; calculate maximum test number
1023 032054 274 03 0 00 064407' SUB 3,TSTL1 ; that can be specified
1024
1025 ; Check for argument(s)
1026
1027 032055 200 01 0 00 053442 MOVE 1,[FMSGCD <LISTxx test# (CR) or LISTxx test#,test# (CR)>]
1028 032056 260 17 0 00 031315* GO .DARG ; get test number
1029 032057 263 17 0 00 000000 RTN ; error/altmode/question - exit
1030 032060 254 00 0 00 032076 JRST TSTLSS ; no argument given
1031 032061 370 01 0 00 032025* SOS 1,ARGUM ; get argument (normalized to 0..n)
1032 032062 311 01 0 00 000003 CAML 1,3 ; out of range?
1033 JRST [FMSGC <? Test number out of range 1 - >
1034 MOVE 3
1035 PNTOCF
1036 PCRLF
1037 GO FIOFF
1038 032063 254 00 0 00 053452 RTN]
1039 032064 272 01 0 00 064407' ADDM 1,TSTL1 ; adjust first test number
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 24
DFPTA1 MAC 10-Oct-83 21:43 Test/Command Selection SEQ 0211
1040 032065 210 01 0 00 053442 MOVN 1,[FMSGCD <LISTxx test# (CR) or LISTxx test#,test# (CR)>]
1041 032066 260 17 0 00 032056* GO .DARG ; get test number
1042 032067 263 17 0 00 000000 RTN ; error/altmode/question - exit
1043 JRST [MOVE TSTL1 ; no 2nd argument given
1044 MOVEM TSTL2
1045 032070 254 00 0 00 053460 JRST TSTLSS]
1046 032071 370 01 0 00 032061* SOS 1,ARGUM ; get argument (normalized to 0..n)
1047 032072 311 01 0 00 000003 CAML 1,3 ; out of range?
1048 JRST [FMSGC <? Test number out of range 1 - >
1049 MOVE 3
1050 PNTOCF
1051 PCRLF
1052 GO FIOFF
1053 032073 254 00 0 00 053452 RTN]
1054 032074 270 01 0 00 064411' ADD 1,TSTL3 ; add to base
1055 032075 202 01 0 00 064410' MOVEM 1,TSTL2 ; save second test number
1056
1057 ; Print the test descriptions
1058
1059 032076 200 01 0 00 064407' TSTLSS: MOVE 1,TSTL1 ; get dispatch table address
1060 032077 037 00 0 00 030242 PCRL
1061 032100 313 01 0 00 064410' CAMLE 1,TSTL2 ; done yet?
1062 032101 263 17 0 00 000000 RTN ; yes - return
1063 032102 202 01 0 00 046311 MOVEM 1,TSTADD ; save dispatch table address
1064 032103 260 17 0 00 042304 GO TSTGET ; get test data
1065 032104 260 17 0 00 042405 GO TSTPNT ; no - print it
1066 032105 350 00 0 00 064407' AOS TSTL1 ; point to next test
1067 032106 037 07 0 00 000003 TTALTM ; no - altmode typed?
1068 032107 254 00 0 00 032076 JRST TSTLSS ; no - keep loopint
1069 032110 037 00 0 00 030242 PCRL ; yes - a final CRLF
1070 032111 476 00 0 00 064326' SETOM ALTF ; set altmode flag
1071 032112 263 17 0 00 000000 RTN ; return
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 25
DFPTA1 MAC 10-Oct-83 21:43 Test/Command Selection SEQ 0212
1072
1073 ;#********************************************************************
1074 ;* TSTDIA - Return to DIAMON
1075 ;#********************************************************************
1076
1077 032113 200 01 0 00 053467 TSTDIA: MOVE 1,[FMSGCD (DIAMON <CR>)]
1078 032114 260 17 0 00 000000* GO CHKARG ; check for argument
1079 032115 263 17 0 00 000000 RTN ; error - exit
1080 032116 260 17 0 00 000000* GO DEVREL ; release the device
1081 032117 254 00 0 00 020000 JRST 20000 ; enter DIAMON
1082
1083
1084 ;#********************************************************************
1085 ;* TSTDDT - Enter DDT
1086 ;#********************************************************************
1087
1088 032120 200 01 0 00 053473 TSTDDT: MOVE 1,[FMSGCD (DDT <CR>)]
1089 032121 260 17 0 00 032114* GO CHKARG ; check for argument
1090 032122 263 17 0 00 000000 RTN ; error - exit
1091 032123 037 01 0 00 053474 FMSGCD <Type RTN$X to continue>
1092 032124 260 17 0 00 030007 GO SRTDDT ; enter DDT
1093 032125 260 17 0 00 000000* GO INITPD ; init PI system
1094 032126 260 17 0 00 031020* GO SETVEC ; set up vector addresses
1095 032127 400 01 0 00 000000 SETZ 1, ; clear AC1
1096 032130 263 17 0 00 000000 RTN ; ask for a test
1097
1098
1099 ;#********************************************************************
1100 ;* TSTHLT - Program halts - CONTINUE will start it back up.
1101 ;#********************************************************************
1102
1103 032131 200 01 0 00 053505 TSTHLT: MOVE 1,[FMSGCD (EXIT <CR>)]
1104 032132 260 17 0 00 032121* GO CHKARG ; check for argument
1105 032133 263 17 0 00 000000 RTN ; error - exit
1106 032134 260 17 0 00 032116* GO DEVREL ; release the device
1107 032135 260 17 0 00 000000* GO .CLOSE ; close any open files
1108 032136 332 00 0 00 020000 SKIPE 20000 ; DIAMON loaded?
1109 032137 254 00 0 00 020000 JRST 20000 ; yes - return there
1110 032140 254 04 0 00 032141 HALT .+1 ; no - halt
1111 032141 254 00 0 00 030610 JRST START ; continue
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 26
DFPTA1 MAC 10-Oct-83 21:43 Test/Command Selection SEQ 0213
1112
1113 ;#********************************************************************
1114 ;* CONFIG - Determine/print device configuration
1115 ;
1116 ; Select word (NISEL or CISEL):
1117 ; Bit 0 - Port exists - 0 - no (This is determined by whether or not
1118 ; 1 - yes a CONI succeeds and bit 0 is set,
1119 ; indicating a port).
1120 ; 1 - Port selectable - 0 - no (This is determined by whether
1121 ; 1 - yes or not a DEVREQ succeeds).
1122 ; 2 - Port selected - 0 - no
1123 ; 1 - yes
1124 ;#********************************************************************
1125
1126 ; Determine which ports are available and obtain each from system
1127
1128 032142 261 17 0 00 000000 CONFIG: RPUT (0,1,2,3,4) ; save AC's
1129
1130 032147 260 17 0 00 000000* GO DSETUP ; set up DIAG JSYS
1131 032150 260 17 0 00 000000* GO USRION ; set USRIOT bit
1132 032151 201 03 0 00 000003 MOVEI 3,3 ; select NI port
1133 032152 201 04 0 00 000003 MOVEI 4,3 ; select CI port
1134 032153 336 00 0 00 064413' SKIPN UDEBUG ; debug mode?
1135 032154 403 03 0 00 000004 SETZB 3,4 ; no - clear NI and CI selection
1136
1137 ; Check for NI port
1138
1139 032155 200 16 0 00 046275 MOVE MBCN,PORTNI ; get NI port number
1140 032156 260 17 0 00 000000* GO RDCSR ; read CSR register
1141 032157 334 00 0 00 000000 SKIPA ; failed
1142 GO [TLNE 1,400000 ; is this a port?
1143 TRO 3,1 ; yes - indicate such
1144 032160 260 17 0 00 053506 RTN]
1145
1146 ; Check for CI port
1147
1148 032161 200 16 0 00 046276 MOVE MBCN,PORTCI ; get CI port number
1149 032162 260 17 0 00 032156* GO RDCSR ; read CSR register
1150 032163 334 00 0 00 000000 SKIPA ; failed
1151 GO [TLNE 1,400000 ; is this a port?
1152 TRO 4,1 ; yes - indicate such
1153 032164 260 17 0 00 053511 RTN]
1154
1155 ; Now check to see if NI port is available
1156
1157 032165 200 16 0 00 046275 MOVE MBCN,PORTNI ; set up MBCN number
1158 032166 260 17 0 00 031102* GO DEVREQ ; request the device
1159 032167 334 00 0 00 000000 SKIPA ; failed - continue
1160 032170 660 03 0 00 000002 TRO 3,2 ; set available bit
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 27
DFPTA1 MAC 10-Oct-83 21:43 Test/Command Selection SEQ 0214
1161
1162 ; Now check to see if CI port is available
1163
1164 032171 200 16 0 00 046276 MOVE MBCN,PORTCI ; set up MBCN number
1165 032172 260 17 0 00 032166* GO DEVREQ ; request the device
1166 032173 334 00 0 00 000000 SKIPA ; failed - continue
1167 032174 660 04 0 00 000002 TRO 4,2 ; set available bit
1168
1169 ; Now look at select switches and determine selection
1170
1171 032175 260 17 0 00 031112* GO SWITT ; get switches
1172 032176 606 00 0 00 000060 TRNN NIPORT!CIPORT ; any port selected?
1173 032177 474 00 0 00 000000 SETO ; no - ensure both are selected
1174 032200 602 00 0 00 000040 TRNE NIPORT ; NI port selected?
1175 GO [CAIN 3,3 ; yes - set selected bit if
1176 TRO 3,4 ; the port exists and is
1177 032201 260 17 0 00 053514 RTN] ; selectable
1178 032202 602 00 0 00 000020 TRNE CIPORT ; CI port selected?
1179 GO [CAIN 4,3 ; yes - set selected bit if
1180 TRO 4,4 ; the port exists and is
1181 032203 260 17 0 00 053517 RTN] ; selectable
1182 032204 202 03 0 00 046277 MOVEM 3,NISEL ; save NI select bits
1183 032205 202 04 0 00 046300 MOVEM 4,CISEL ; save CI select bits
1184
1185 ; Print configuration
1186
1187 032206 260 17 0 00 032215 GO CONPNT ; print configuration noted
1188 032207 262 17 0 00 000004 RGET (4,3,2,1,0) ; restore AC's
1189
1190 032214 263 17 0 00 000000 RTN ; return
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 28
DFPTA1 MAC 10-Oct-83 21:43 Test/Command Selection SEQ 0215
1191
1192 ;#********************************************************************
1193 ;* CONPNT - Print configuration
1194 ;#********************************************************************
1195
1196 032215 261 17 0 00 000000 CONPNT: RPUT (0,1) ; save AC's
1197
1198 032217 037 00 0 00 053522 TMSGC <Port Configuration:>
1199 032220 037 00 0 00 053527 TMSGC < Port Exists Selectable Selected>
1200 032221 037 00 0 00 053537 TMSGC < NI >
1201 032222 200 01 0 00 046277 MOVE 1,NISEL
1202 XCT [TMSG <No No No>
1203 TMSG <Yes No No>
1204 TMSG <No Yes No>
1205 TMSG <Yes Yes No>
1206 TMSG <No No No>
1207 TMSG <Yes No No>
1208 TMSG <No Yes Yes>
1209 032223 256 00 0 01 053602 TMSG <Yes Yes Yes>](1)
1210 032224 037 00 0 00 053612 TMSGC < CI >
1211 032225 200 01 0 00 046300 MOVE 1,CISEL
1212 XCT [TMSG <No No No>
1213 TMSG <Yes No No>
1214 TMSG <No Yes No>
1215 TMSG <Yes Yes No>
1216 TMSG <No No No>
1217 TMSG <Yes No No>
1218 TMSG <No Yes Yes>
1219 032226 256 00 0 01 053602 TMSG <Yes Yes Yes>](1)
1220 032227 037 00 0 00 030242 PCRL
1221 032230 262 17 0 00 000001 RGET (1,0) ; restore AC's
1222
1223 032232 263 17 0 00 000000 RTN ; return
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 29
DFPTA1 MAC 10-Oct-83 21:43 Test/Command Selection SEQ 0216
1224
1225 ;#********************************************************************
1226 ;* TSTSEL - Select device(s) to test
1227 ;#********************************************************************
1228
1229 032233 200 01 0 00 053626 TSTSEL: MOVE 1,[FMSGCD <SELECT NI or NI,CI or CI or SELECT (CR)>]
1230 032234 260 17 0 00 032022* GO .SARG ; get SIXBIT argument
1231 032235 263 17 0 00 000000 RTN ; error/altmode/question - exit
1232 032236 254 00 0 00 032274 JRST TSTSEG ; no argument - query user
1233 032237 200 01 0 00 032071* TSTSE0: MOVE 1,ARGUM ; get sixbit command
1234 MOVEI 2,[SIXBIT /NI/ ; get address of cmd list
1235 SIXBIT /CI/
1236 032240 201 02 0 00 053627 0]
1237 032241 260 17 0 00 031075* GO .COMM ; handle command decoding
1238 JRST [FMSGCD <? Unrecognizable - Type ? for help>
1239 GO FIOFF
1240 032242 254 00 0 00 053632 RTN] ; error return
1241
1242 ; Have a command
1243
1244 032243 400 16 0 00 000000 SETZ MBCN, ; clear current selection
1245 032244 200 00 0 00 046277 MOVE NISEL ; get NI select word
1246 032245 620 00 0 00 000004 TRZ 4 ; clear select bit
1247 032246 202 00 0 00 046277 MOVEM NISEL ; save it
1248 032247 200 00 0 00 046300 MOVE CISEL ; get CI select word
1249 032250 620 00 0 00 000004 TRZ 4 ; clear select bit
1250 032251 202 00 0 00 046300 MOVEM CISEL ; save it
1251 032252 306 01 0 00 000000 CAIN 1,0 ; NI specified?
1252 GO [MOVE NISEL ; yes - set the select bit
1253 TRO 4
1254 TRNN 2
1255 JRST [FMSGCD <? NI port is not selectable>
1256 RTN]
1257 MOVEM NISEL
1258 032253 260 17 0 00 053646 RTN]
1259 032254 306 01 0 00 000001 CAIN 1,1 ; CI specified?
1260 GO [MOVE CISEL ; yes - set the select bit
1261 TRO 4
1262 TRNN 2
1263 JRST [FMSGCD <? CI port is not selectable>
1264 RTN]
1265 MOVEM CISEL
1266 032255 260 17 0 00 053665 RTN]
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 30
DFPTA1 MAC 10-Oct-83 21:43 Test/Command Selection SEQ 0217
1267
1268 ; Check for another argument
1269
1270 032256 210 01 0 00 053626 MOVN 1,[FMSGCD <SELECT NI or NI,CI or CI or SELECT (CR)>]
1271 032257 260 17 0 00 032234* GO .SARG ; get SIXBIT argument
1272 032260 263 17 0 00 000000 RTN ; error/altmode/question - exit
1273 032261 254 00 0 00 032321 JRST TSTSEX ; no argument - exit
1274 032262 200 01 0 00 032237* MOVE 1,ARGUM ; get sixbit command
1275 MOVEI 2,[SIXBIT /NI/ ; get address of cmd list
1276 SIXBIT /CI/
1277 032263 201 02 0 00 053627 0]
1278 032264 260 17 0 00 032241* GO .COMM ; handle command decoding
1279 JRST [FMSGCD <? Unrecognizable - Type ? for help>
1280 GO FIOFF
1281 032265 254 00 0 00 053632 RTN] ; error return
1282
1283 ; Have a command
1284
1285 032266 400 16 0 00 000000 SETZ MBCN, ; clear current selection
1286 032267 306 01 0 00 000000 CAIN 1,0 ; NI specified?
1287 GO [MOVE NISEL ; yes - set the select bit
1288 TRO 4
1289 TRNN 2
1290 JRST [FMSGCD <? NI port is not selectable>
1291 RTN]
1292 MOVEM NISEL
1293 032270 260 17 0 00 053646 RTN]
1294 032271 306 01 0 00 000001 CAIN 1,1 ; CI specified?
1295 GO [MOVE CISEL ; yes - set the select bit
1296 TRO 4
1297 TRNN 2
1298 JRST [FMSGCD <? CI port is not selectable>
1299 RTN]
1300 MOVEM CISEL
1301 032272 260 17 0 00 053665 RTN]
1302 032273 254 00 0 00 032321 JRST TSTSEX ; exit
1303
1304 ; Check NI port
1305
1306 032274 400 16 0 00 000000 TSTSEG: SETZ MBCN, ; clear current selection
1307 032275 200 01 0 00 046277 MOVE 1,NISEL ; get NI select word
1308 032276 606 01 0 00 000002 TRNN 1,2 ; port selectable?
1309 032277 254 00 0 00 032305 JRST TSTSG0 ; no - continue
1310 032300 200 00 0 00 053677 MOVE [FMSGC <Test NI port?>]
1311 032301 260 17 0 00 000000* GO TTYYES ; check for Y or N
1312 032302 624 01 0 00 000004 TRZA 1,4 ; no - set no
1313 032303 660 01 0 00 000004 TRO 1,4 ; yes - set yes
1314 032304 202 01 0 00 046277 MOVEM 1,NISEL ; save selection
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 31
DFPTA1 MAC 10-Oct-83 21:43 Test/Command Selection SEQ 0218
1315
1316 ; Check CI port
1317
1318 032305 200 01 0 00 046300 TSTSG0: MOVE 1,CISEL ; get CI select word
1319 032306 606 01 0 00 000002 TRNN 1,2 ; port selectable?
1320 032307 254 00 0 00 032321 JRST TSTSEX ; no - exit
1321 032310 200 00 0 00 053704 MOVE [FMSGC <Test CI port?>]
1322 032311 260 17 0 00 032301* GO TTYYES ; check for Y or N
1323 032312 624 01 0 00 000004 TRZA 1,4 ; no - set no
1324 032313 660 01 0 00 000004 TRO 1,4 ; yes - set yes
1325 032314 202 01 0 00 046300 MOVEM 1,CISEL ; save selection
1326
1327 ; Set up MBCN properly
1328
1329 032315 200 16 0 00 046275 MOVE MBCN,PORTNI ; get NI device code
1330 032316 200 01 0 00 046277 MOVE 1,NISEL ; get NI select word
1331 032317 606 01 0 00 000004 TRNN 1,4 ; selected?
1332 032320 200 16 0 00 046276 MOVE MBCN,PORTCI ; no - get CI device code
1333
1334 ; Print selection
1335
1336 032321 200 00 0 00 046277 TSTSEX: MOVE NISEL ; get NI select word
1337 032322 602 00 0 00 000004 TRNE 4 ; selected?
1338 032323 037 00 0 00 053705 TMSGC <[NI port selected]> ; yes - print such
1339 032324 200 00 0 00 046300 MOVE CISEL ; get CI select word
1340 032325 602 00 0 00 000004 TRNE 4 ; selected?
1341 032326 037 00 0 00 053712 TMSGC <[CI port selected]> ; yes - print such
1342 032327 200 00 0 00 046277 MOVE NISEL ; get NI select word
1343 032330 434 00 0 00 046300 IOR CISEL ; include CI select word
1344 032331 606 00 0 00 000004 TRNN 4 ; any selected?
1345 032332 037 00 0 00 053717 TMSGC <[No ports selected]> ; no - print such
1346 032333 037 00 0 00 030242 PCRL
1347 032334 263 17 0 00 000000 RTN ; return
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 32
DFPTA1 MAC 10-Oct-83 21:43 Test/Command Selection SEQ 0219
1348
1349 ;#********************************************************************
1350 ; PTEST - Determine port under test and set up MBCN
1351 ; PTESTP - Print port under test (if not already known)
1352 ;#********************************************************************
1353
1354 032335 261 17 0 00 000000 PTEST: PUT 0 ; save AC0
1355 032336 316 16 0 00 046275 CAMN MBCN,PORTNI ; NI port already selected?
1356 032337 254 00 0 00 032352 JRST PTEST0 ; yes - continue
1357 032340 316 16 0 00 046276 CAMN MBCN,PORTCI ; no - CI port already selected?
1358 032341 254 00 0 00 032352 JRST PTEST0 ; yes - continue
1359 032342 200 16 0 00 046275 MOVE MBCN,PORTNI ; no - set to NI port
1360 032343 200 00 0 00 046277 MOVE NISEL ; get NI select bits
1361 032344 602 00 0 00 000004 TRNE 4 ; select possible?
1362 032345 254 00 0 00 032352 JRST PTEST0 ; yes - continue
1363 032346 200 16 0 00 046276 MOVE MBCN,PORTCI ; no - set to CI port
1364 032347 200 00 0 00 046300 MOVE CISEL ; get CI select bits
1365 032350 606 00 0 00 000004 TRNN 4 ; select possible?
1366 032351 400 16 0 00 000000 SETZ MBCN, ; no - indicate such
1367 032352 262 17 0 00 000000 PTEST0: GET 0 ; restore AC0
1368 032353 263 17 0 00 000000 RTN ; return
1369
1370 032354 261 17 0 00 000000 PTESTP: PUT 0 ; save AC0
1371 032355 200 00 0 00 046277 MOVE NISEL ; get NI select word
1372 032356 404 00 0 00 046300 AND CISEL ; and CI select word
1373 032357 606 00 0 00 000004 TRNN 4 ; both selected?
1374 032360 254 00 0 00 032365 JRST PTESTX ; no - continue
1375 032361 316 16 0 00 046275 CAMN MBCN,PORTNI ; NI port already selected?
1376 032362 037 00 0 00 053724 TMSGCD <[Port under test - NI]>; yes - print such
1377 032363 316 16 0 00 046276 CAMN MBCN,PORTCI ; CI port already selected?
1378 032364 037 00 0 00 053732 TMSGCD <[Port under test - CI]>; yes - print such
1379 032365 336 00 0 00 000016 PTESTX: SKIPN MBCN ; any port selected?
1380 032366 037 00 0 00 053740 TMSGCD <[Port under test - none]> ; no - print such
1381 032367 262 17 0 00 000000 GET 0 ; restore AC0
1382 032370 263 17 0 00 000000 RTN ; exit
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 33
DFPTA1 MAC 10-Oct-83 21:43 Test/Command Selection SEQ 0220
1383
1384 ;#*********************************************************************
1385 ;* TSTHLP - Help for 'WHAT TEST' question.
1386 ;#*********************************************************************
1387
1388 TSTHLP: MOVN 1,[FMSGD <
1389 HELP ALL CONFIG
1390 TESTS LIST
1391 032371 210 01 0 00 053763 MISC SWITCH>]
1392 032372 260 17 0 00 032257* GO .SARG ; get SIXBIT argument
1393 032373 263 17 0 00 000000 RTN ; error/altmode/question - exit
1394 GO [MOVE [SIXBIT /ALL/] ; no argument - assume all
1395 MOVEM ARGUM
1396 032374 260 17 0 00 053765 RTN]
1397 032375 200 01 0 00 032262* MOVE 1,ARGUM ; get sixbit command
1398 032376 201 02 0 00 032411 MOVEI 2,TSTHLC ; get address of cmd list
1399 032377 260 17 0 00 032264* GO .COMM ; handle command decoding
1400 JRST [FMSGCD <? Unrecognizable - Type ? for help>
1401 GO FIOFF
1402 032400 254 00 0 00 053632 RTN] ; error return
1403 032401 037 01 0 00 000026 PFORCE ; handle Control-O
1404 032402 200 02 0 00 000001 MOVE 2,1 ; get AC1
1405 032403 336 03 0 01 032420 TSTHL0: SKIPN 3,TSTHLL(1) ; get address of TMSG
1406 032404 263 17 0 00 000000 RTN ; all done - exit
1407 032405 256 00 0 00 000003 XCT 3 ; print it
1408 032406 350 00 0 00 000001 AOS 1 ; point to next address
1409 032407 322 02 0 00 032403 JUMPE 2,TSTHL0 ; loop till done
1410 032410 263 17 0 00 000000 RTN ; exit
1411
1412 032411 41 54 54 00 00 00 TSTHLC: SIXBIT /ALL/ ; print all help info
1413 032412 64 45 63 64 63 00 SIXBIT /TESTS/ ; print test commands
1414 032413 55 51 63 43 00 00 SIXBIT /MISC/ ; print miscellaneous commands
1415 032414 43 57 56 46 51 47 SIXBIT /CONFIG/ ; print configuration commands
1416 032415 54 51 63 64 00 00 SIXBIT /LIST/ ; print list commands
1417 032416 63 67 51 64 43 50 SIXBIT /SWITCH/ ; print switch commands
1418 032417 000000 000000 0 ; end of list
1419
1420 032420 037 00 0 00 053770 TSTHLL: TMSGCD <Tests Available:>
1421
1422 TMSGD <
1423 ALL n All tests (n times)
1424 EBUS n EBus module tests
1425 SEQ n SEQ related tests
1426 ALU n 2901 related tests
1427 MPROC n MPROC module tests
1428 CBUS n CBus module tests
1429 MBUS n MBUS related tests
1430 032421 037 00 0 00 053775 XXm n Test m, category XX (where XX can be EB,SE,AL,MP,CB)>
1431
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 34
DFPTA1 MAC 10-Oct-83 21:43 Test/Command Selection SEQ 0221
1432 TMSGD <
1433 TAKE Take cmds from file
1434 NTAKE Take cmds from file (not echoed)
1435 DEBUG Enter port debugger
1436 ENABLE n Enable execution of test n
1437 DISABL n Disable execution of test n
1438 DISLIS List disabled tests
1439 DIAMON Enter DIAMON
1440 DDT Enter DDT
1441 HELP Print this
1442 032422 037 00 0 00 054061 EXIT Exit program>
1443
1444 TMSGD <
1445 CONFIG Determine/print configuration
1446 CONPNT Print configuration
1447 032423 037 00 0 00 054154 SELECT Select device to test>
1448
1449 TMSGD <
1450 LIST n List all tests (or just test n)
1451 LISTEB n List EBus module tests (or test n)
1452 LISTSE n List Sequencer related tests
1453 LISTAL n List 2901's related tests
1454 LISTMP n List MPROC module tests
1455 032424 037 00 0 00 054201 LISTCB n List CBus module tests>
1456
1457 TMSGD <
1458 Switches: To complement switch, type switch name
1459
1460 SWITCH Enter switches
1461 SWPRIN Print current switches
1462
1463 NOPNT LOOPER RELIAB TRACE LOOPGM DSPEAR SDEBUG NIPORT MMPROC
1464 PNTLPT ERSTOP TXTINH INHFLT LOOPTS UDEBUG LDEBUG CIPORT MCBUS
1465 032425 037 00 0 00 054261 DING PALERS OPRSEL INHMSG RUNALL MDEBUG IDEBUG>
1466 032426 000000 000000 0
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 35
DFPTA1 MAC 10-Oct-83 21:43 Test/Command Selection SEQ 0222
1467
1468 ;#********************************************************************
1469 ;* TSTDSA - Disable a test.
1470 ;* TSTENA - Enable a test.
1471 ;#********************************************************************
1472
1473 032427 402 00 0 00 064336' TSTDSA: SETZM ENATST# ; clear 'enable' flag
1474 032430 200 00 0 00 054370 MOVE [FMSGCD (DISABL XXnnn XXnnn ... <CR>)]
1475 032431 202 00 0 00 064403' MOVEM TMP1#
1476 032432 254 00 0 00 032436 JRST TSTEN0 ; continue
1477 032433 476 00 0 00 064336' TSTENA: SETOM ENATST# ; set 'enable' flag
1478 032434 200 00 0 00 054400 MOVE [FMSGCD (ENABLE XXnnn XXnnn ... <CR>)]
1479 032435 202 00 0 00 064403' MOVEM TMP1#
1480 032436 336 00 0 00 032017* TSTEN0: SKIPN ARGFLG ; argument given?
1481 JRST [FMSGCD <? Missing argument>
1482 GO FIOFF
1483 032437 254 00 0 00 054406 RTN]
1484
1485 ; Get an argument
1486
1487 032440 200 01 0 00 064403' TSTDS0: MOVE 1,TMP1 ; get help string
1488 032441 260 17 0 00 032372* GO .SARG ; yes - get SIXBIT argument
1489 032442 263 17 0 00 000000 RTN ; error/altmode/question - exit
1490 032443 263 17 0 00 000000 RTN ; no more arguments
1491 032444 200 01 0 00 032375* MOVE 1,ARGUM ; get argument
1492 032445 260 17 0 00 034133 GO TSTDEC ; decode as a test name
1493 JRST [FMSGCD <? Argument not recognizable as a test name 'XXn'>
1494 GO FIOFF
1495 032446 254 00 0 00 053375 RTN]
1496 JRST [FMSGC <? Test selected is not in range 1->
1497 MOVE 1 ; get range
1498 PNTOCF ; print it
1499 PCRLF
1500 GO FIOFF
1501 032447 254 00 0 00 053410 RTN]
1502
1503 ; Now perform the specified function
1504
1505 032450 260 17 0 00 042304 GO TSTGET ; get test data
1506 032451 200 01 0 00 046307 MOVE 1,TSTPC ; get test PC
1507 032452 200 02 0 00 046310 MOVE 2,TSTFLG ; get test flags
1508 032453 332 00 0 00 064336' SKIPE ENATST ; 'enable' flag set?
1509 032454 621 02 0 00 000100 TLZ 2,(TDENA) ; yes - clear 'disable' bit
1510 032455 336 00 0 00 064336' SKIPN ENATST ; 'enable' flag set?
1511 032456 661 02 0 00 000100 TLO 2,(TDENA) ; no - set 'disable' bit
1512 032457 202 02 0 01 000001 MOVEM 2,1(1) ; save flags + test address
1513 032460 254 00 0 00 032440 JRST TSTDS0 ; get next argument
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 36
DFPTA1 MAC 10-Oct-83 21:43 Test/Command Selection SEQ 0223
1514
1515 ;#********************************************************************
1516 ;* TSTDSL - List disabled tests
1517 ;#********************************************************************
1518
1519 032461 200 01 0 00 054415 TSTDSL: MOVE 1,[FMSGCD (DISLIS <CR>)]
1520 032462 260 17 0 00 032132* GO CHKARG ; check for argument
1521 032463 263 17 0 00 000000 RTN ; error - exit
1522 032464 476 00 0 00 046317 SETOM TSTINH ; initialize fault isolation flag
1523 032465 201 00 0 00 033145 MOVEI TDISP1-1 ; get address of dispatch table
1524 032466 202 00 0 00 046311 MOVEM TSTADD ; save it
1525 032467 400 06 0 00 000000 SETZ 6, ; count of tests printed
1526 032470 260 17 0 00 042332 TSTDL0: GO SELTST ; select a test
1527 PJRST [PCRL ; no more - return
1528 032471 254 00 0 00 054416 RTN]
1529 032472 255 00 0 00 000000 JFCL ; not valid (ignore)
1530 032473 200 00 0 00 046310 MOVE TSTFLG ; get test flags
1531 032474 607 00 0 00 000100 TLNN (TDENA) ; disabled?
1532 032475 254 00 0 00 032470 JRST TSTDL0 ; no - try next test
1533 032476 377 00 0 00 000006 SOSG 6 ; done with line yet?
1534 GO [MOVEI 6,13 ; yes - reset counter and
1535 PCRL ; print a blank line
1536 032477 260 17 0 00 054420 RTN]
1537 032500 200 01 0 00 046304 MOVE 1,TSTCLS ; get test class
1538 032501 200 00 0 01 031123 MOVE INDLIS(1) ; get class description
1539 032502 037 00 0 00 000002 PNTSIX ; print it
1540 032503 200 00 0 00 046305 MOVE TSTNUM ; get test number
1541 032504 037 16 0 00 000003 PNTOCS ; print it
1542 032505 037 00 0 00 000040 PSP
1543 032506 254 00 0 00 032470 JRST TSTDL0 ; continue
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 37
DFPTA1 MAC 10-Oct-83 21:43 Test/Command Selection SEQ 0224
1544
1545 ;#********************************************************************
1546 ;* TSTSWI/TSTSWP - Input switches / Print switch selections
1547 ;#********************************************************************
1548
1549 032507 200 01 0 00 054427 TSTSWI: MOVE 1,[FMSGCD (SWITCH <CR>)]
1550 032510 260 17 0 00 032462* GO CHKARG ; check for argument
1551 032511 263 17 0 00 000000 RTN ; error - exit
1552 032512 260 17 0 00 000000* GO .ISWT ; input switches
1553 032513 263 17 0 00 000000 RTN ; ask for a test
1554
1555 032514 200 01 0 00 054434 TSTSWP: MOVE 1,[FMSGCD (SWPRIN <CR>)]
1556 032515 260 17 0 00 032510* GO CHKARG ; check for argument
1557 032516 263 17 0 00 000000 RTN ; error - exit
1558 032517 260 17 0 00 000000* GO .SWCHP ; print switches
1559 032520 263 17 0 00 000000 RTN ; ask for a test
1560
1561
1562 ;#********************************************************************
1563 ;* TSTSSW - Switch complement commands
1564 ;#********************************************************************
1565
1566 032521 200 01 0 00 054442 TSTSSW: MOVE 1,[FMSGCD (Switch Name <CR>)]
1567 032522 260 17 0 00 032515* GO CHKARG ; check for argument
1568 032523 263 17 0 00 000000 RTN ; error - exit
1569 032524 200 01 0 00 000000* MOVE 1,.CGOT ; get dispatch number
1570 032525 275 01 0 00 000036 SUBI 1,SWSTT ; normalize to 0..
1571 032526 260 17 0 00 000000* GO SWCOM ; complement switch
1572 032527 263 17 0 00 000000 RTN ; continue
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 38
DFPTA1 MAC 10-Oct-83 21:43 Test/Command Selection SEQ 0225
1573
1574 ;#********************************************************************
1575 ;* TSTTAK - Take commands from a file
1576 ;* TSTTAN - Take commands from a file without echoing results
1577 ;
1578 ; This works by reading commands from a file as if they were being
1579 ; typed to the diagnostic directly. Either end of file or the first
1580 ; occurrence of an error halts this procedure.
1581 ;#********************************************************************
1582
1583 032530 402 00 0 00 064340' TSTTAN: SETZM FINECH ; clear echo switch
1584 032531 334 00 0 00 000000 SKIPA ; continue
1585 032532 476 00 0 00 064340' TSTTAK: SETOM FINECH ; set echo switch
1586 032533 200 01 0 00 054453 MOVE 1,[FMSGCD (TAKE <CR> or TAKE Fname Ext <CR>)]
1587 032534 260 17 0 00 032441* GO .SARG ; get SIXBIT argument
1588 032535 263 17 0 00 000000 RTN ; error/altmode/question - exit
1589 032536 254 00 0 00 032547 JRST TSTTA0 ; no more arguments
1590 032537 200 01 0 00 032444* MOVE 1,ARGUM ; get argument
1591 032540 202 01 0 00 032564 MOVEM 1,TAKFIL ; save file name
1592 032541 210 01 0 00 054453 MOVN 1,[FMSGCD (TAKE <CR> or TAKE Fname Ext <CR>)]
1593 032542 260 17 0 00 032534* GO .SARG ; get SIXBIT argument
1594 032543 263 17 0 00 000000 RTN ; error/altmode/question - exit
1595 032544 254 00 0 00 032547 JRST TSTTA0 ; no more arguments
1596 032545 200 01 0 00 032537* MOVE 1,ARGUM ; get argument
1597 032546 202 01 0 00 032565 MOVEM 1,TAKFIL+1 ; save file name extension
1598
1599 ; Now start reading the file specified
1600
1601 032547 260 17 0 00 031107* TSTTA0: GO FIOFF ; shut off previous file input
1602 032550 201 00 0 00 032564 MOVEI TAKFIL ; point to file name buffer
1603 032551 037 05 0 00 000004 FSELECT ; init the file
1604 JRST [FMSGC <? Can't access ">
1605 MOVE TAKFIL ; get file name
1606 PNTSXF ; print it
1607 PNTCIF "."
1608 MOVE TAKFIL+1 ; get extension
1609 PNTSXF ; print it
1610 FMSGD <" on selected load device.>
1611 032552 254 00 0 00 054466 RTN]
1612 032553 037 01 0 00 054476 FMSGC <[File input from: >
1613 032554 200 00 0 00 032564 MOVE TAKFIL ; get the selected file name
1614 032555 037 01 0 00 000002 PNTSXF ; print it
1615 032556 037 01 0 00 000056 PNTCIF "."
1616 032557 200 00 0 00 032565 MOVE TAKFIL+1 ; get the extension of file
1617 032560 037 01 0 00 000002 PNTSXF ; print it
1618 032561 037 01 0 00 053745 FMSGD <]>
1619 032562 476 00 0 00 064341' SETOM FINPUT ; set 'file input' flag
1620 032563 263 17 0 00 000000 RTN ; exit
1621
1622 ; File name
1623
1624 032564 44 46 60 64 41 00 TAKFIL: SIXBIT /DFPTA/
1625 032565 43 55 44 00 00 00 SIXBIT /CMD/
1626
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 39
DFPTA1 MAC 10-Oct-83 21:43 Test Dispatching SEQ 0226
1627 SUBTTL Test Dispatching
1628
1629 ;#********************************************************************
1630 ;* TSTSPC - Run only one test
1631 ;#********************************************************************
1632
1633 032566 201 00 0 00 033106 TSTSPC: MOVEI TSTALT ; set up altmode transfer address
1634 032567 202 00 0 00 030063 MOVEM ALTMGO ; to exit port testing
1635 032570 402 00 0 00 046314 SETZM TSTREP ; clear pass count
1636 032571 260 17 0 00 032175* GO SWITT ; get program switches
1637 032572 602 00 0 00 020000 TRNE LOOPTS ; loop on test?
1638 JRST [HRLEI 377777 ; yes - get 'infinite' repeat count
1639 032573 254 00 0 00 054503 JRST .+2]
1640 032574 201 00 0 00 000001 MOVEI 1 ; no - set repeat count requested
1641 032575 202 00 0 00 046315 MOVEM TSTREQ ; to 1 pass
1642 032576 402 00 0 00 046316 SETZM TSTMUL ; clear multiple test flag
1643 032577 476 00 0 00 046317 SETOM TSTINH ; initialize fault isolation flag
1644 032600 336 00 0 00 032436* SKIPN ARGFLG ; argument given?
1645 032601 254 00 0 00 032610 JRST TSTSP0 ; no - do the test
1646 032602 210 01 0 00 054513 MOVN 1,[FMSGCD (XXnnn RepeatCount <CR>)]
1647 032603 260 17 0 00 032066* GO .DARG ; yes - get repeat count argument
1648 032604 263 17 0 00 000000 RTN ; error/altmode/question - exit
1649 032605 334 00 0 00 000000 SKIPA ; no argument given
1650 032606 200 00 0 00 032545* MOVE ARGUM ; get argument
1651 032607 202 00 0 00 046315 MOVEM TSTREQ ; save it
1652 032610 476 00 0 00 032600* TSTSP0: SETOM ARGFLG ; remember that we had an argument
1653 032611 254 00 0 00 032737 JRST TSTD3 ; do the test
1654
1655
1656 ;#********************************************************************
1657 ;* RANGEN - Random number generator
1658 ;#********************************************************************
1659
1660 032612 261 17 0 00 000001 RANGEN: RPUT (1,2) ; save AC's
1661
1662 032614 200 01 0 00 064367' MOVE 1,RANNUM# ; get base number
1663 032615 270 01 0 00 030022 ADD 1,RANDBS ; modify number in AC1
1664 032616 241 01 0 00 777774 ROT 1,-4 ; to create a new number
1665 032617 447 01 0 00 064367' EQVB 1,RANNUM ; put result in AC1 and RANNUM
1666 032620 405 01 0 00 007777 ANDI 1,7777 ; save only 4 digits
1667 032621 220 01 0 17 777777 IMUL 1,-1(P) ; obtain (0..n-1)*10000
1668 032622 242 01 0 00 777764 LSH 1,-^D12 ; obtain 0..n-1
1669 032623 350 00 0 00 000001 AOS 1 ; obtain 1..n
1670 032624 313 01 0 17 777777 CAMLE 1,-1(P) ; in range?
1671 032625 200 01 0 17 777777 MOVE 1,-1(P) ; no - force it to be
1672 032626 250 01 0 17 777777 EXCH 1,-1(P) ; set up returned argument
1673 032627 262 17 0 00 000002 RGET (2,1) ; restore AC's
1674
1675 032631 263 17 0 00 000000 RTN
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 40
DFPTA1 MAC 10-Oct-83 21:43 Test Dispatching SEQ 0227
1676
1677 ;#********************************************************************
1678 ; TSTRAN - Run tests randomly
1679 ;#********************************************************************
1680
1681 032632 201 00 0 00 032655 TSTRAN: MOVEI TSTRAA ; set up altmode transfer address
1682 032633 202 00 0 00 030063 MOVEM ALTMGO ; to exit port testing
1683 032634 402 00 0 00 046314 SETZM TSTREP ; clear pass count
1684 032635 201 00 0 00 000001 MOVEI 1 ; set repeat count requested
1685 032636 202 00 0 00 046315 MOVEM TSTREQ ; to 1 pass
1686 032637 402 00 0 00 046316 SETZM TSTMUL ; clear multiple test flag
1687 032640 476 00 0 00 046317 SETOM TSTINH ; initialize fault isolation flag
1688 032641 402 00 0 00 064366' SETZM RANCNT# ; initialize test count
1689 032642 400 03 0 00 000000 SETZ 3, ; set a a base number using the
1690 032643 260 17 0 00 030750* GO RUNTME ; program run time and save
1691 032644 200 00 0 00 000000* MOVE CURTIM ; it in RANNUM
1692 032645 202 00 0 00 064367' MOVEM RANNUM
1693
1694 ; Determine test to run
1695
1696 032646 201 01 0 00 000351 TSTRA0: MOVEI 1,TEND-TDISP1 ; get range 1..MAXTST
1697 032647 260 17 0 00 032612 GO RANGEN ; get a random number (in AC1)
1698 032650 201 01 0 01 033144 MOVEI 1,TDISP1-2(1) ; get test dispatch address
1699 032651 202 01 0 00 046311 MOVEM 1,TSTADD ; save it (test - 1)
1700 032652 260 17 0 00 032737 GO TSTD3 ; do the test
1701 032653 350 01 0 00 064366' AOS 1,RANCNT ; increment test count
1702 032654 254 00 0 00 032646 JRST TSTRA0 ; keep looping
1703
1704 ; Altmode exit
1705
1706 032655 037 01 0 00 054514 TSTRAA: FMSGC <[Testing aborted after >
1707 032656 200 00 0 00 064366' MOVE RANCNT ; get test count
1708 032657 037 15 0 00 000001 PNTDCF ; print it
1709 032660 037 01 0 00 054522 FMSGD < tests]>
1710 032661 262 17 0 00 064417' GET XXX# ; pop off extra item
1711 032662 263 17 0 00 000000 RTN ; exit
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 41
DFPTA1 MAC 10-Oct-83 21:43 Test Dispatching SEQ 0228
1712
1713 ;#*********************************************************************
1714 ;* TSTDIS - Dispatch to the tests
1715 ;#*********************************************************************
1716
1717 ; Set up flags, defaults, etc.
1718
1719 032663 201 00 0 00 033106 TSTDIS: MOVEI TSTALT ; set up altmode transfer address
1720 032664 202 00 0 00 030063 MOVEM ALTMGO ; to exit port testing
1721 032665 402 00 0 00 046314 SETZM TSTREP ; clear pass count
1722 032666 402 00 0 00 046315 SETZM TSTREQ ; set repeat count requested to 1
1723 032667 350 00 0 00 046315 AOS TSTREQ ; pass
1724 032670 476 00 0 00 046316 SETOM TSTMUL ; set multiple test flag
1725 032671 336 00 0 00 032610* SKIPN ARGFLG ; argument given?
1726 032672 254 00 0 00 032702 JRST TSTD0 ; no - do the tests
1727 032673 210 01 0 00 052043 MOVN 1,[FMSGCD (Cmd RepeatCount <CR>)]
1728 032674 260 17 0 00 032603* GO .DARG ; yes - get repeat count argument
1729 032675 263 17 0 00 000000 RTN ; error/altmode/question - exit
1730 032676 334 00 0 00 000000 SKIPA ; no argument given
1731 032677 200 00 0 00 032606* MOVE ARGUM ; get argument
1732 032700 202 00 0 00 046315 MOVEM TSTREQ ; save it
1733 032701 476 00 0 00 032671* SETOM ARGFLG ; remember that we had an argument
1734
1735 ; If OPRSEL switch is not set then all tests are run.
1736
1737 032702 260 17 0 00 032571* TSTD0: GO SWITT ; get the pgm switches
1738 032703 135 01 0 00 054524 LDB 1,[POINT 3,0,35] ; get only MMPROC and MCBUS switches
1739 XCT [JFCL ; print module status
1740 TMSGCD <[Assuming CBUS module is missing]>
1741 TMSGCD <[Assuming MPROC and CBUS modules are missing]>
1742 032704 256 00 0 01 054547 TMSGCD <[Assuming MPROC and CBUS modules are missing]>](1)
1743 032705 402 00 0 00 046317 SETZM TSTINH ; initialize fault isolation flag
1744 032706 602 00 0 00 200000 TRNE INHFLT ; inhibiting fault isolation?
1745 032707 476 00 0 00 046317 SETOM TSTINH ; yes - set the flag
1746 032710 201 00 0 00 033145 MOVEI TDISP1-1 ; get address without fault isolation
1747 032711 336 00 0 00 046317 SKIPN TSTINH ; inhibit fault isolation flag set?
1748 032712 201 00 0 00 033517 MOVEI TDISP2-1 ; no - get address with fault isolation
1749 032713 202 00 0 00 046311 MOVEM TSTADD ; set up test dispatch table address
1750 032714 607 00 0 00 000010 TLNN OPRSEL ; OPRSEL set?
1751 032715 254 00 0 00 032737 JRST TSTD3 ; no - go run all of them
1752
1753 ; Check for MBUS testing (if so, the pass count has already been obtained)
1754
1755 032716 200 00 0 00 046313 MOVE TSTMSK ; get test mask
1756 032717 316 00 0 00 052300 CAMN [MBUS] ; MBUS command given?
1757 032720 336 00 0 00 064350' SKIPN MBARGF ; 'MBUS argument given' flag set?
1758 032721 254 00 0 00 032724 JRST TSTD1 ; no - continue
1759 032722 200 00 0 00 064347' MOVE MBARG ; get repeat count
1760 032723 254 00 0 00 032736 JRST TSTD2 ; continue
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 42
DFPTA1 MAC 10-Oct-83 21:43 Test Dispatching SEQ 0229
1761
1762 ; Handle pass count
1763
1764 032724 200 00 0 00 046315 TSTD1: MOVE TSTREQ ; get argument typed
1765 032725 332 00 0 00 032701* SKIPE ARGFLG ; any argument given?
1766 032726 254 00 0 00 032736 JRST TSTD2 ; yes - skip over this question
1767 032727 332 00 0 00 064341' SKIPE FINPUT ; file input switch set?
1768 JRST [MOVEI 1 ; yes - default to 1 iteration
1769 032730 254 00 0 00 054553 JRST TSTD2]
1770 032731 037 01 0 00 054555 FMSGC <How many passes? (CR to loop forever) - >
1771 032732 037 04 0 00 000003 TTIDEC
1772 032733 007 00 0 00 032724 ALTCHK TSTD1
1773 032734 336 00 0 00 030510 SKIPN TTNBRF ; CR typed?
1774 032735 200 00 0 00 054566 MOVE [377777,,777777] ; yes - loop forever
1775 032736 202 00 0 00 046315 TSTD2: MOVEM TSTREQ ; save count
1776
1777 ; Save test class/number selection for multiple pass use
1778
1779 032737 200 00 0 00 046311 TSTD3: MOVE TSTADD ; get test dispatch address
1780 032740 202 00 0 00 064372' MOVEM SAVADD# ; save test dispatch address
1781 032741 476 00 0 00 046330 SETOM PMODE ; set program mode to 'test'
1782
1783 ; Check for whether or not to print end of pass messages
1784
1785 032742 402 00 0 00 064406' SETZM TSTEPP# ; clear flag
1786 032743 260 17 0 00 032702* GO SWITT ; get switches
1787 032744 603 00 0 00 000010 TLNE OPRSEL ; operator select?
1788 GO [MOVE TSTREQ ; yes - set up to print end of
1789 CAILE 1 ; pass only if more than one
1790 SETOM TSTEPP ; pass was requested
1791 032745 260 17 0 00 054567 RTN]
1792
1793 ; Initialize test class/number selection
1794
1795 032746 200 00 0 00 064372' TSTD4: MOVE SAVADD ; get test dispatch address
1796 032747 202 00 0 00 046311 MOVEM TSTADD ; save test dispatch address
1797
1798 ; Initialize device number
1799
1800 032750 476 00 0 00 046301 SETOM PORSEL ; initialize select word
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 43
DFPTA1 MAC 10-Oct-83 21:43 Test Dispatching SEQ 0230
1801
1802 ; Select next device
1803
1804 032751 400 00 0 00 000000 TSTD5: SETZ ; clear select word
1805 032752 200 01 0 00 046301 MOVE 1,PORSEL ; get current port
1806 032753 306 01 0 00 000000 CAIN 1,0 ; NI port?
1807 032754 200 00 0 00 046277 MOVE NISEL ; get NI select word
1808 032755 306 01 0 00 000001 CAIN 1,1 ; CI port?
1809 032756 200 00 0 00 046300 MOVE CISEL ; yes - get CI select word
1810 032757 602 00 0 00 000004 TRNE 4 ; selected?
1811 032760 260 17 0 00 033126 GO TSTEOP ; yes - print end of pass message
1812 032761 602 00 0 00 000004 TRNE 4 ; selected?
1813 032762 260 17 0 00 031343 GO ISOPNT ; yes - print fault isolation data
1814 032763 350 01 0 00 046301 AOS 1,PORSEL ; point to next device
1815 032764 303 01 0 00 000001 CAILE 1,1 ; done yet?
1816 032765 254 00 0 00 032774 JRST TSTD6 ; yes - do next pass
1817 032766 200 00 0 00 046277 MOVE NISEL ; get NI select word
1818 032767 306 01 0 00 000001 CAIN 1,1 ; CI device?
1819 032770 200 00 0 00 046300 MOVE CISEL ; yes - get CI select word
1820 032771 606 00 0 00 000004 TRNN 4 ; selected?
1821 032772 254 00 0 00 032751 JRST TSTD5 ; no - check next device
1822 032773 254 00 0 00 033006 JRST TSTD7 ; yes - go test
1823
1824 ; Decrement pass count
1825
1826 032774 260 17 0 00 031343 TSTD6: GO ISOPNT ; print fault isolation data
1827 032775 350 01 0 00 046314 AOS 1,TSTREP ; increment pass count
1828 032776 260 17 0 00 032743* GO SWITT ; get switches
1829 032777 336 00 0 00 030037 SKIPN USER ; user mode?
1830 033000 607 00 0 00 400000 TLNN ABORT ; abort switch set?
1831 033001 334 00 0 00 000000 SKIPA ; no - continue (or user mode)
1832 033002 263 17 0 00 000000 RTN ; exit
1833 033003 373 00 0 00 046315 SOSLE TSTREQ ; passes all done?
1834 033004 254 00 0 00 032746 JRST TSTD4 ; no - keep looping
1835 033005 263 17 0 00 000000 RTN ; exit
1836
1837 ; Initialize fault isolation data area
1838
1839 033006 200 16 0 00 046275 TSTD7: MOVE MBCN,PORTNI ; get NI device code
1840 033007 332 00 0 00 046301 SKIPE PORSEL ; CI port selected?
1841 033010 200 16 0 00 046276 MOVE MBCN,PORTCI ; yes - get CI device code
1842 033011 202 16 0 00 046302 MOVEM MBCN,UUT ; save unit under test
1843 033012 260 17 0 00 032172* GO DEVREQ ; request the device
1844 033013 254 00 0 00 032751 JRST TSTD5 ; failed - exit pass
1845 033014 402 00 0 00 031601 SETZM NETBAD ; clear first word
1846 033015 200 00 0 00 054573 MOVE [NETBAD,,NETBAD+1] ; build BLT pointer
1847 033016 251 00 0 00 031710 BLT NETBAD+^D71 ; clear the areas
1848 033017 402 00 0 00 064337' SETZM ERRCNT# ; clear error count
1849 033020 402 00 0 00 064342' SETZM FLTPNT ; clear 'isolation data printed' flag
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 44
DFPTA1 MAC 10-Oct-83 21:43 Test Dispatching SEQ 0231
1850
1851 ; Initialze test class/number at beginning of pass
1852
1853 033021 200 00 0 00 064372' MOVE SAVADD ; get test dispatch address
1854 033022 202 00 0 00 046311 MOVEM TSTADD ; save it
1855 033023 260 17 0 00 032776* GO SWITT ; get the pgm switches
1856 033024 201 01 0 00 000001 MOVEI 1,1 ; initialize repeat count
1857 033025 603 00 0 00 000400 TLNE RELIAB ; reliability switch set?
1858 033026 201 01 0 00 000004 MOVEI 1,4 ; yes - set up count of 4
1859 033027 202 01 0 00 046323 MOVEM 1,TSTREL ; save it
1860
1861 ; Now actually do the tests
1862
1863 033030 200 00 0 00 046323 TSTD8: MOVE TSTREL ; get reliability count
1864 033031 202 00 0 00 046324 MOVEM TSTCNT ; save it
1865 033032 260 17 0 00 042332 GO SELTST ; select next test
1866 033033 254 00 0 00 032751 JRST TSTD5 ; end of tests
1867 033034 254 00 0 00 033076 JRST TSTD12 ; not a valid test
1868 033035 200 16 0 00 046302 TSTD9: MOVE MBCN,UUT ; valid test - set up MBCN
1869 033036 260 17 1 00 046307 GO @TSTPC ; dispatch to test
1870 033037 254 00 0 00 033076 JRST TSTD12 ; disabled test - skip it
1871 033040 332 00 0 00 046317 SKIPE TSTINH ; inhibit fault isolation?
1872 033041 254 00 0 00 033067 JRST TSTD11 ; yes - continue
1873 033042 332 00 0 00 064344' SKIPE IDEBUG ; fault isolation debug mode?
1874 033043 260 17 0 00 034105 GO FLTCHK ; yes - check if this test should fail
1875 033044 322 15 0 00 033067 JUMPE ERFLG,TSTD11 ; test did not fail - continue
1876
1877 ; If this is the first failure, also set up new test dispatch table (as
1878 ; specified in the test itself).
1879
1880 033045 332 00 0 00 064337' SKIPE ERRCNT ; any errors yet?
1881 033046 254 00 0 00 033052 JRST TSTD10 ; no - continue
1882 033047 200 00 0 00 046307 MOVE TSTPC ; get test PC
1883 033050 271 00 0 00 000003 ADDI 3 ; point to new table address
1884 033051 202 00 0 00 046311 MOVEM TSTADD ; set up new dispatch address
1885
1886 ; Handle fault isolation
1887
1888 033052 350 00 0 00 064337' TSTD10: AOS ERRCNT ; increment error count
1889 033053 200 03 0 00 046320 MOVE 3,TSTHIG ; get addr of high prob module list
1890 033054 201 04 0 00 000014 MOVEI 4,^D12 ; weight of a high prob module
1891 033055 332 00 0 00 064344' SKIPE IDEBUG ; fault isolation debug mode?
1892 GO [TMSGC <*** > ; yes - print header ...
1893 MOVE 1,TSTCLS ; get test class
1894 MOVE INDLIS(1) ; get class description
1895 PNTSIX ; print it
1896 MOVE TSTNUM ; get test number
1897 PNTOCS ; print it
1898 TMSG < ***>
1899 TMSGC <High networks: >
1900 033056 260 17 0 00 054603 RTN]
1901 033057 260 17 0 00 034067 GO FLTHAN ; go to fault handler
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 45
DFPTA1 MAC 10-Oct-83 21:43 Test Dispatching SEQ 0232
1902 033060 200 03 0 00 046321 MOVE 3,TSTLOW ; get addr of low prob module list
1903 033061 201 04 0 00 000006 MOVEI 4,^D6 ; weight of a low prob module
1904 033062 332 00 0 00 064344' SKIPE IDEBUG ; fault isolation debug mode?
1905 033063 037 00 0 00 054614 TMSGC <Low networks: > ; yes - print header
1906 033064 260 17 0 00 034067 GO FLTHAN ; go to fault handler
1907 033065 332 00 0 00 064344' SKIPE IDEBUG ; fault isolation debug mode?
1908 033066 037 00 0 00 030242 PCRL ; yes - end with a CRLF
1909
1910 ; Dispatch is done - now check altmode
1911
1912 033067 332 00 0 00 064326' TSTD11: SKIPE ALTF ; 'altmode typed' flag set?
1913 033070 254 00 1 00 030063 JRST @ALTMGO ; yes - exit
1914 033071 037 07 0 00 000003 TTALTM ; altmode typed?
1915 033072 334 00 0 00 000000 SKIPA ; no - continue
1916 033073 254 00 1 00 030063 JRST @ALTMGO ; yes - exit thru $ transfer address
1917
1918 ; Loop till reliability count expired
1919
1920 033074 373 00 0 00 046324 SOSLE TSTCNT ; decrement reliability count
1921 033075 254 00 0 00 033035 JRST TSTD9 ; loop till done
1922 033076 332 00 0 00 030037 TSTD12: SKIPE USER ; user mode?
1923 033077 254 00 0 00 033103 JRST .+4 ; yes - continue
1924 033100 260 17 0 00 033023* GO SWITT ; get switches
1925 033101 603 00 0 00 200000 TLNE RSTART ; RSTART switch set?
1926 033102 254 00 0 00 030610 JRST START ; yes - restart the diagnostic
1927 033103 336 00 0 00 046316 SKIPN TSTMUL ; multiple tests being done?
1928 033104 254 00 0 00 032751 JRST TSTD5 ; no - check next device
1929 033105 254 00 0 00 033030 JRST TSTD8 ; yes - do next test
1930
1931 ; Altmode transfer code
1932
1933 033106 037 01 0 00 054620 TSTALT: FMSGC <[Testing aborted>
1934 033107 336 00 0 00 046314 SKIPN TSTREP ; zero passes?
1935 033110 254 00 0 00 033115 JRST TSTAL0 ; yes - don't print how many
1936 033111 037 01 0 00 054624 FMSG < after >
1937 033112 200 00 0 00 046314 MOVE TSTREP ; get pass count
1938 033113 037 15 0 00 000001 PNTDCF ; print it
1939 033114 037 01 0 00 054626 FMSG < passes>
1940 033115 037 01 0 00 053745 TSTAL0: FMSGD <]>
1941 033116 260 17 0 00 032547* GO FIOFF ; clear 'file input' switch
1942 033117 476 00 0 00 064326' SETOM ALTF ; set altmode typed flag
1943 033120 332 00 0 00 046316 SKIPE TSTMUL ; multiple test flag set?
1944 033121 260 17 0 00 031343 GO ISOPNT ; yes - print final flt isolation data
1945 033122 260 17 0 00 033100* GO SWITT ; get program switches
1946 033123 607 00 0 00 000010 TLNN OPRSEL ; OPRSEL switch set?
1947 033124 254 00 0 00 032113 JRST TSTDIA ; no - exit to DIAMON
1948 033125 263 17 0 00 000000 RTN ; exit
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 46
DFPTA1 MAC 10-Oct-83 21:43 Test Dispatching SEQ 0233
1949
1950 ; End of pass message
1951
1952 033126 332 00 0 00 046316 TSTEOP: SKIPE TSTMUL ; multiple tests being run?
1953 033127 336 00 0 00 064406' SKIPN TSTEPP ; print end of pass messages?
1954 033130 263 17 0 00 000000 RTN ; no - return
1955 033131 261 17 0 00 000000 PUT 0 ; save AC0
1956 033132 260 17 0 00 031424* GO PNTDEV
1957 033133 037 00 0 00 054630 TMSG < End Pass > ; yes - print pass count
1958 033134 200 00 0 00 046314 MOVE TSTREP ; ...
1959 033135 350 00 0 00 000000 AOS
1960 033136 037 15 0 00 000000 PNTDEC
1961 033137 037 00 0 00 051537 TMSG <. at >
1962 033140 402 00 0 00 030746* SETZM FORPNT ; clear force print
1963 033141 200 03 0 00 051541 MOVE 3,[JFCL] ; set up timer routine
1964 033142 260 17 0 00 032643* GO RUNTME ; print current time
1965 033143 037 00 0 00 030242 PCRL
1966 033144 262 17 0 00 000000 GET 0 ; restore AC0
1967 033145 263 17 0 00 000000 RTN
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 47
DFPTA1 MAC 10-Oct-83 21:43 Test Dispatching SEQ 0234
1968
1969 ;#********************************************************************
1970 ;* Test Dispatch List - in sequential order
1971 ;#********************************************************************
1972
1973 000000 ZEB==0B2 ; EBUS test
1974 100000 000000 ZSE==1B2 ; SEQ test
1975 200000 000000 ZAL==2B2 ; ALU test
1976 300000 000000 ZMP==3B2 ; MPROC test
1977 400000 000000 ZCB==4B2 ; CBUS test
1978
1979 ; EBUS Tests
1980
1981 033146 TEBUS:
1982 033146 000000000000# TDISP1: TSTE1 ; EB1 - CONI Works?
1983 033147 000000000000# TSTE2 ; EB2 - RH20/IPA Interaction
1984 033150 000000000000# TSTE3 ; EB3 - RH20/IPA Interaction
1985 033151 000000000000# TSTE4 ; EB4 - RH20/IPA Interaction
1986 033152 000000000000# TSTE5 ; EB5 - RH20/IPA Interaction
1987 033153 000000000000# TSTE6 ; EB6 - CSR Cleared After Reset
1988 033154 000000000000# TSTE7 ; EB7 - Read/Write CSR Bits
1989 033155 000000000000# TSTE10 ; EB10 - CSR Bits Interaction
1990 033156 000000000000# TSTE11 ; EB11 - EBUF Access Test
1991 033157 000000000000# TSTE12 ; EB12 - EBUF/CSR Conflict Test
1992 033160 000000000000# TSTE13 ; EB13 - KMUX Parity Generators
1993 033161 000000000000# TSTE14 ; EB14 - EBUF/CSR Conflict Test
1994 033162 000000000000# TSTE15 ; EB15 - EBUF Reset Test
1995 033163 000000000000# TSTE16 ; EB16 - EBUF Data Path Test
1996 033164 000000000000# TSTE17 ; EB17 - CSR Bit 18 Self Clearing Test
1997 033165 000000000000# TSTE20 ; EB20 - CSR Bit 18 Reset Test
1998 033166 000000000000# TSTE21 ; EB21 - CSR Bit 18 Reset Test
1999 033167 000000000000# TSTE22 ; EB22 - Read/Write EBUF When Ucode Running
2000 033170 000000000000# TSTE23 ; EB23 - Par Gen - Not Forcing an Error
2001 033171 000000000000# TSTE24 ; EB24 - Par Gen - Forcing an Error
2002 033172 000000000000# TSTE25 ; EB25 - Read only CSR Bits
2003 033173 000000000000# TSTE26 ; EB26 - CSR 01 'DIAG RQST CSR'
2004 033174 000000000000# TSTE27 ; EB27 - CSR 01 'DIAG RQST CSR'
2005 033175 000000000000# TSTE30 ; EB30 - CSR 01 'DIAG RQST CSR'
2006 033176 000000000000# TSTE31 ; EB31 - CSR 01 'DIAG RQST CSR'
2007 033177 000000000000# TSTE32 ; EB32 - CSR 01 'DIAG RQST CSR'
2008 033200 000000000000# TSTE33 ; EB33 - CSR 01 'DIAG RQST CSR'
2009 033201 000000000000# TSTE34 ; EB34 - CSR 02 'DIAG CSR CHNG'
2010 033202 000000000000# TSTE35 ; EB35 - Constant MUX
2011 033203 000000000000# TSTE36 ; EB36 - Constant MUX Interference
2012 033204 000000000000# TSTE37 ; EB37 - CSR Bit 24 - EBUS PE Occurs at Wrong Time
2013 033205 000000000000# TSTE40 ; EB40 - EBUS Transfer via DATAO's
2014 033206 000000000000# TSTE41 ; EB41 - EBUS Transfer via DATAI's
2015 033207 000000000000# TSTE42 ; EB42 - CSR 05 'Rqst Interrupt'
2016 033210 000000000000# TSTE43 ; EB43 - CSR 05 'Rqst Interrupt'
2017 033211 000000000000# TSTE44 ; EB44 - CSR 05 'Rqst Interrupt'
2018 033212 000000000000# TSTE45 ; EB45 - CSR 06 'CRAM Par Err'
2019 033213 000000000000# TSTE46 ; EB46 - CSR 07 'MBUS Err'
2020 033214 000000000000# TSTE47 ; EB47 - CSR 11 'Spare' Bit
2021 033215 000000000000# TSTE50 ; EB50 - CSR 12 'Disable Complete' Bit
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 48
DFPTA1 MAC 10-Oct-83 21:43 Test Dispatching SEQ 0235
2022 033216 000000000000# TSTE51 ; EB51 - CSR 13 'Enable Complete' Bit
2023 033217 000000000000# TSTE52 ; x
2024 033220 000000000000# TSTE53 ; EB53 - MPROC Run Bit
2025 033221 000000000000# TSTE54 ; EB54 - Basic KMUX Parity
2026 033222 000000000000# TSTE55 ; EB55 - Clearing MPROC Run Bit
2027 033223 000000000000# TSTE56 ; EB56 - Clearing MPROC Run Bit
2028 033224 000000000000# TSTE57 ; EB57 - Verify 'Diag Single Cyc'
2029 033225 000000000000# TSTE60 ; EB60 - PI Level n/0 Interrupts
2030 033226 000000000000# TSTE61 ; EB61 - Check PIA Level 0
2031 033227 000000000000# TSTE62 ; EB62 - Check Interrupt on Level 1-7
2032 033230 000000000000# TSTE63 ; EB63 - CSR 05 'Rqst Interrupt' Clearing
2033 033231 000000000000# TSTE64 ; EB64 - IOP Function 0 - 40+2N Interrupt
2034 033232 000000000000# TSTE65 ; EB65 - IOP Function 1 - 40+2N Interrupt
2035 033233 000000000000# TSTE66 ; x
2036 033234 000000000000# TSTE67 ; x
2037 033235 000000000000# TSTE70 ; EB70 - IOP Function 4 - Examine
2038 033236 000000000000# TSTE71 ; EB71 - IOP Function 5 - Deposit
2039 033237 000000000000# TSTE72 ; EB72 - IOP Function 7 - Examine/Increment
2040 033240 000000000000# TSTE73 ; EB73 - CSR 25-26,28 KL side
2041 033241 000000000000# TSTE74 ; EB74 - CSR 25-26,28 Port side
2042 033242 000000000000# TSTE75 ; EB75 - CSR 27,30-31 KL side
2043 033243 000000000000# TSTE76 ; EB76 - CSR 27,30-31 Port side
2044
2045 ; SEQ Tests
2046
2047 033244 000000000000# TSEQ: TSTS1 ; SE1 - JMAP Instruction
2048 033245 000000000000# TSTS2 ; SE2 - JZ Instruction
2049 033246 000000000000# TSTS3 ; SE3 - JZ Instruction - Effect on Reg/Ctr
2050 033247 000000000000# TSTS4 ; SE4 - JZ Instruction - Effect on Reg/Ctr
2051 033250 000000000000# TSTS5 ; SE5 - CONT Instruction
2052 033251 000000000000# TSTS6 ; SE6 - CJP Instruction
2053 033252 000000000000# TSTS7 ; SE7 - CJV Instruction
2054 033253 000000000000# TSTS10 ; SE10 - CJS Instruction
2055 033254 000000000000# TSTS11 ; SE11 - CJS Instruction
2056 033255 000000000000# TSTS12 ; SE12 - CJS Instruction
2057 033256 000000000000# TSTS13 ; SE13 - CRTN Instruction
2058 033257 000000000000# TSTS14 ; SE14 - CRTN Instruction
2059 033260 000000000000# TSTS15 ; SE15 - Stack location #1
2060 033261 000000000000# TSTS16 ; SE16 - Stack location #2
2061 033262 000000000000# TSTS17 ; SE17 - Stack location #3
2062 033263 000000000000# TSTS20 ; SE20 - Stack location #4
2063 033264 000000000000# TSTS21 ; SE21 - Stack location #5
2064 033265 000000000000# TSTS22 ; SE22 - Increment/Decrement Stack Pointer
2065 033266 000000000000# TSTS23 ; SE23 - Increment/Decrement Stack Pointer
2066 033267 000000000000# TSTS24 ; SE24 - Increment/Decrement Stack Pointer
2067 033270 000000000000# TSTS25 ; SE25 - Increment/Decrement Stack Pointer
2068 033271 000000000000# TSTS26 ; SE26 - Increment/Decrement Stack Pointer
2069 033272 000000000000# TSTS27 ; SE27 - Overflowing the Stack
2070 033273 000000000000# TSTS30 ; SE30 - CJPP Instruction
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 49
DFPTA1 MAC 10-Oct-83 21:43 Test Dispatching SEQ 0236
2071 033274 000000000000# TSTS31 ; SE31 - CJPP Instruction
2072 033275 000000000000# TSTS32 ; SE32 - CJPP Instruction
2073 033276 000000000000# TSTS33 ; SE33 - LDCT Instruction
2074 033277 000000000000# TSTS34 ; SE34 - LDCT Instruction
2075 033300 000000000000# TSTS35 ; SE35 - Register/Counter
2076 033301 000000000000# TSTS36 ; SE36 - JRP Instruction
2077 033302 000000000000# TSTS37 ; SE37 - JSRP Instruction
2078 033303 000000000000# TSTS40 ; SE40 - JSRP Instruction
2079 033304 000000000000# TSTS41 ; SE41 - JSRP Instruction
2080 033305 000000000000# TSTS42 ; SE42 - PUSH Instruction
2081 033306 000000000000# TSTS43 ; SE43 - PUSH Instruction
2082 033307 000000000000# TSTS44 ; SE44 - PUSH Instruction
2083 033310 000000000000# TSTS45 ; SE45 - LOOP Instruction
2084 033311 000000000000# TSTS46 ; SE46 - LOOP Instruction
2085 033312 000000000000# TSTS47 ; SE47 - LOOP Instruction
2086 033313 000000000000# TSTS50 ; SE50 - RFCT Instruction
2087 033314 000000000000# TSTS51 ; SE51 - RFCT Instruction
2088 033315 000000000000# TSTS52 ; SE52 - RFCT Instruction
2089 033316 000000000000# TSTS53 ; SE53 - RFCT Instruction
2090 033317 000000000000# TSTS54 ; SE54 - RPCT Instruction
2091 033320 000000000000# TSTS55 ; SE55 - RPCT Instruction
2092 033321 000000000000# TSTS56 ; SE56 - TWB Instruction
2093 033322 000000000000# TSTS57 ; SE57 - TWB Instruction
2094 033323 000000000000# TSTS60 ; SE60 - TWB Instruction
2095 033324 000000000000# TSTS61 ; SE61 - TWB Instruction
2096 033325 000000000000# TSTS62 ; SE62 - TWB Instruction
2097 033326 000000000000# TSTS63 ; SE63 - TWB Instruction
2098 033327 000000000000# TSTS64 ; SE64 - Stack Interference Tests
2099 033330 000000000000# TSTS65 ; SE65 - Stack Interference Tests
2100 033331 000000000000# TSTS66 ; SE66 - Reg/Ctr Interference Tests
2101 033332 000000000000# TSTS67 ; SE67 - Reg/Ctr Interference Tests
2102 033333 000000000000# TSTS70 ; SE70 - Full Speed Sequencer Test
2103
2104 ; ALU Tests
2105
2106 033334 000000000000# TALU: TSTA1 ; AL1 - 2901 0's Test
2107 033335 000000000000# TSTA2 ; AL2 - 2901 1's Test
2108 033336 000000000000# TSTA3 ; AL3 - 2901 OR Test - D OR 0
2109 033337 000000000000# TSTA4 ; AL4 - 2901 AND Test - D AND 0
2110 033340 000000000000# TSTA5 ; AL5 - 2901 NOT_R_AND_S Test - D NOT_RS 0
2111 033341 000000000000# TSTA6 ; AL6 - 2901 XOR Test - D XOR 0
2112 033342 000000000000# TSTA7 ; AL7 - 2901 XNOR Test - D XNOR 0
2113 033343 000000000000# TSTA10 ; AL10 - 2901 R+S Test - D + 0
2114 033344 000000000000# TSTA11 ; AL11 - 2901 R-S Test - D - 0
2115 033345 000000000000# TSTA12 ; AL12 - 2901 S-R Test - 0 - D
2116 033346 000000000000# TSTA13 ; AL13 - 2901 Writing/Reading Registers
2117 033347 000000000000# TSTA14 ; AL14 - 2901 Q-Register Test
2118 033350 000000000000# TSTA15 ; AL15 - 2901 Register Interference Test
2119 033351 000000000000# TSTA16 ; AL16 - 2901 OR Test
2120 033352 000000000000# TSTA17 ; AL17 - 2901 AND Test
2121 033353 000000000000# TSTA20 ; AL20 - 2901 NOT_R_AND_S Test
2122 033354 000000000000# TSTA21 ; AL21 - 2901 XOR Test
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 50
DFPTA1 MAC 10-Oct-83 21:43 Test Dispatching SEQ 0237
2123 033355 000000000000# TSTA22 ; AL22 - 2901 XNOR Test
2124 033356 000000000000# TSTA23 ; AL23 - 2901 R + S Test - No Carry
2125 033357 000000000000# TSTA24 ; AL24 - 2901 R + S Test - With Carry
2126 033360 000000000000# TSTA25 ; AL25 - 2901 R - S Test - No Carry
2127 033361 000000000000# TSTA26 ; AL26 - 2901 R - S Test - With Carry
2128 033362 000000000000# TSTA27 ; AL27 - 2901 S - R Test - No Carry
2129 033363 000000000000# TSTA30 ; AL30 - 2901 S - R Test - With Carry
2130 033364 000000000000# TSTA31 ; AL31 - 2901 Q-Register Interference Test
2131 033365 000000000000# TSTA32 ; AL32 - 2901 RAM Register Interference Test
2132 033366 000000000000# TSTA33 ; AL33 - Q-Register Shift
2133 033367 000000000000# TSTA34 ; AL34 - Q-Register Right/Left Shift
2134 033370 000000000000# TSTA35 ; AL35 - RAM Register Shift
2135 033371 000000000000# TSTA36 ; AL36 - RAM Data Movement Test
2136 033372 000000000000# TSTA37 ; AL37 - RAM/Q-Register Data Movement Test
2137 033373 000000000000# TSTA40 ; AL40 - RAM Data Movement/Shifting Test
2138 033374 000000000000# TSTA41 ; AL41 - RAM/Q-Reg Data Movement/Shifting Test
2139 033375 000000000000# TSTA42 ; AL42 - 2901 Register / Constant Mux Test
2140
2141 ; MPROC Tests
2142
2143 033376 000000000000# TMPROC: TSTU1 ; MP1 - CRAM Data Test RAR12=0
2144 033377 000000000000# TSTU2 ; MP2 - CRAM Data Test RAR12=1
2145 033400 000000000000# TSTU3 ; MP3 - CRAM Addressing Test
2146 033401 000000000000# TSTU4 ; MP4 - RAR/LAR Data Path Test - LDCRAM
2147 033402 000000000000# TSTU5 ; MP5 - RAR/LAR Data Path Test - RDCRAM
2148 033403 000000000000# TSTU6 ; MP6 - Cram Ctrl Register Test
2149 033404 000000000000# TSTU7 ; MP7 - Cram Ctrl Register Test
2150 033405 000000000000# TSTU10 ; MP10 - MBUS Error Test (MPROC module only)
2151 033406 000000000000# TSTU11 ; MP11 - MBUS Error Test
2152 033407 000000000000# TSTU12 ; MP12 - MBUS Error Test (MPROC module only)
2153 033410 000000000000# TSTU13 ; MP13 - MBUS Error Test
2154 033411 000000000000# TSTU14 ; MP14 - CCCbusAvail Test
2155 033412 000000000000# TSTU15 ; MP15 - CCGrntCSR Test
2156 033413 000000000000# TSTU16 ; MP16 - CCFEQ0 Test
2157 033414 000000000000# TSTU17 ; MP17 - CCCSRChng Test
2158 033415 000000000000# TSTU20 ; MP20 - CCEbParErr Test
2159 033416 000000000000# TSTU21 ; MP21 - CCRcvrBufAFul Test
2160 033417 000000000000# TSTU22 ; MP22 - CCRcvrBufBFul Test
2161 033420 000000000000# TSTU23 ; MP23 - CCXmtrAttn Test
2162 033421 000000000000# TSTU24 ; MP24 - CCEbusRqst Test
2163 033422 000000000000# TSTU25 ; MP25 - CCIntrActive Test
2164 033423 000000000000# TSTU26 ; MP26 - CCMBSign Test
2165 033424 000000000000# TSTU27 ; MP27 - CCMVParChk Test
2166 033425 000000000000# TSTU30 ; MP30 - CCCbusParErr Test
2167 033426 000000000000# TSTU31 ; MP31 - CCPliParErr Test
2168 033427 000000000000# TSTU32 ; MP32 - CCChanErr Test
2169 033430 000000000000# TSTU33 ; MP33 - CCCbLstWd Test
2170 033431 000000000000# TSTU34 ; MP34 - Basic Local Store Test
2171 033432 000000000000# TSTU35 ; MP35 - Local Store Data Test
2172 033433 000000000000# TSTU36 ; MP36 - Local Store Address Test
2173 033434 000000000000# TSTU37 ; MP37 - Local Store RAM Mode Test
2174 033435 000000000000# TSTU40 ; MP40 - Jump MUX Test
2175 033436 000000000000# TSTU41 ; M41 - CRAM Ctl Reg Parity Generators Test
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 51
DFPTA1 MAC 10-Oct-83 21:43 Test Dispatching SEQ 0238
2176
2177 ; CBUS Tests
2178
2179 033437 000000000000# TCBUS: TSTC1 ; CB1 - Fmtr Data Loopback
2180 033440 000000000000# TSTC2 ; CB2 - PLI Buffer Data Loopback
2181 033441 000000000000# TSTC3 ; CB3 - CBUS to EBUF Data Transfer
2182 033442 000000000000# TSTC4 ; CB4 - 2901 to CBUS Data Transfer
2183 033443 000000000000# TSTC5 ; CB5 - CBUS to 2901 Multiple Word Transfer
2184 033444 000000000000# TSTC6 ; CB6 - 2901 to CBUS Multiple Word Transfer
2185 033445 000000000000# TSTC7 ; CB7 - CBUS to EBUS Data Transfer
2186 033446 000000000000# TSTC10 ; CB10 - EBUS to CBUS Data Transfer
2187 033447 000000000000# TSTC11 ; CB11 - Fmtr Cleared by 'Port Clear'
2188 033450 000000000000# TSTC12 ; CB12 - Fmtr Basic Up Shifting Test
2189 033451 000000000000# TSTC13 ; CB13 - Fmtr Up Shift 4 Test - BUS Ctl=Cbus
2190 033452 000000000000# TSTC14 ; CB14 - Fmtr Up Shift 4 Test - BUS Ctl=Fmtr
2191 033453 000000000000# TSTC15 ; CB15 - Fmtr Up Shift 4 (from PLIN) Test - SELRHTNIB=0
2192 033454 000000000000# TSTC16 ; CB16 - Fmtr Up Shift 4 (from PLIN) Test - SELRHTNIB=0
2193 033455 000000000000# TSTC17 ; CB17 - Fmtr Up Shift 4 (from PLIN) Test - SELRHTNIB=1
2194 033456 000000000000# TSTC20 ; CB20 - Fmtr Up Shift 4 (from PLIN) Test - SELRHTNIB=1
2195 033457 000000000000# TSTC21 ; CB21 - Fmtr Up Shift 8 (from PLIN) Test - SELRHTNIB=0
2196 033460 000000000000# TSTC22 ; CB22 - Fmtr Up Shift 8 (from PLIN) Test - SELRHTNIB=0
2197 033461 000000000000# TSTC23 ; CB23 - Fmtr Up Shift 8 (from PLIN) Test - SELRHTNIB=1
2198 033462 000000000000# TSTC24 ; CB24 - Fmtr Up Shift 4 (from PLIN) Test - SELRHTNIB=1
2199 033463 000000000000# TSTC25 ; CB25 - Fmtr Basic Down Shifting Test
2200 033464 000000000000# TSTC26 ; CB26 - Fmtr Down Shift 4 Test
2201 033465 000000000000# TSTC27 ; CB27 - Fmtr Down Shift 4 (from PLIN) Test SELRHTNIB=0
2202 033466 000000000000# TSTC30 ; CB30 - Fmtr Down Shift 4 (from PLIN) Test SELRHTNIB=0
2203 033467 000000000000# TSTC31 ; CB31 - Fmtr Down Shift 4 (from PLIN) Test SELRHTNIB=1
2204 033470 000000000000# TSTC32 ; CB32 - Fmtr Down Shift 4 (from PLIN) Test SELRHTNIB=1
2205 033471 000000000000# TSTC33 ; CB33 - Fmtr Down Shift 8 (from PLIN) Test SELRHTNIB=0
2206 033472 000000000000# TSTC34 ; CB34 - Fmtr Down Shift 8 (from PLIN) Test SELRHTNIB=0
2207 033473 000000000000# TSTC35 ; CB35 - Fmtr Down Shift 8 (from PLIN) Test SELRHTNIB=1
2208 033474 000000000000# TSTC36 ; CB36 - Fmtr Down Shift 4 (from PLIN) Test SELRHTNIB=1
2209 033475 000000000000# TSTC37 ; CB37 - Fmtr Ring Buffer Test
2210 033476 000000000000# TSTC40 ; CB40 - CMUX Selected by PLINTOCMUX
2211 033477 000000000000# TSTC41 ; CB41 - CBUF Loaded Correctly
2212 033500 000000000000# TSTC42 ; CB42 - PMUX Selected by MPCBUFTOPLOUT
2213 033501 000000000000# TSTC43 ; CB43 - PMUX Selected by MPCBUFTOPLOUT/MPZEROLFTNIB
2214 033502 000000000000# TSTC44 ; CB44 - DMUX Selected Correctly
2215 033503 000000000000# TSTC45 ; CB45 - CBUS Parity Checking - CBUS to CBUS Module
2216 033504 000000000000# TSTC46 ; CB46 - CBUS Parity Checking - CBUS Module to CBUS
2217 033505 000000000000# TSTC47 ; CB47 - CBUS Parity Checking - CBUS to CBUS Module
2218 033506 000000000000# TSTC50 ; CB50 - T Field Timing Test
2219 033507 000000000000# TSTC51 ; CB51 - CBUS Store
2220 033510 000000000000# TSTC52 ; CB52 - CBUS Input Buffer
2221 033511 000000000000# TSTC53 ; CB53 - Parity Predictor - CBIN to Fmtr/MPINDSTCOMP=0
2222 033512 000000000000# TSTC54 ; CB54 - Parity Predictor - CBIN to Fmtr/MPINDSTCOMP=1
2223 033513 000000000000# TSTC55 ; CB55 - Parity Predictor - Fmtr to PLOUT
2224 033514 000000000000# TSTC56 ; CB56 - Parity Predictor - PLIN to Fmtr/MPCOREDUMP=0
2225 033515 000000000000# TSTC57 ; CB57 - Parity Predictor - PLIN to Fmtr/MPCOREDUMP=1
2226 033516 000000000000# TSTC60 ; CB60 - Parity Predictor - Fmtr to CBOUT
2227 033517 777777 777777 TEND: -1 ; end of tests
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 52
DFPTA1 MAC 10-Oct-83 21:43 Test Dispatching SEQ 0239
2228
2229 ;#********************************************************************
2230 ;* Test Dispatch List - in order for fault isolation
2231 ;#********************************************************************
2232
2233 ; Basic EBUS Interface Logic
2234
2235 033520 000000000000# TDISP2: TSTE54 ; EB54 - Basic KMUX Parity
2236 033521 000000000000# TSTE1 ; EB1 - CONI Works?
2237 033522 000000000000# TSTE2 ; EB2 - RH20/IPA Interaction
2238 033523 000000000000# TSTE3 ; EB3 - RH20/IPA Interaction
2239 033524 000000000000# TSTE4 ; EB4 - RH20/IPA Interaction
2240 033525 000000000000# TSTE5 ; EB5 - RH20/IPA Interaction
2241
2242 ; CSR Register Logic
2243
2244 033526 000000000000# TSTE6 ; EB6 - CSR Cleared After Reset
2245 033527 000000000000# TSTE7 ; EB7 - Read/Write CSR Bits
2246 033530 000000000000# TSTE10 ; EB10 - CSR Bits Interaction
2247
2248 ; EBUF Logic
2249
2250 033531 000000000000# TSTE11 ; EB11 - EBUF Access Test
2251 033532 000000000000# TSTE12 ; EB12 - EBUF/CSR Conflict Test
2252 033533 000000000000# TSTE14 ; EB14 - EBUF/CSR Conflict Test
2253 033534 000000000000# TSTE15 ; EB15 - EBUF Reset Test
2254 033535 000000000000# TSTE16 ; EB16 - EBUF Data Path Test
2255
2256 ; Reset Logic
2257
2258 033536 000000000000# TSTE17 ; EB17 - CSR Bit 18 Self Clearing Test
2259 033537 000000000000# TSTE20 ; EB20 - CSR Bit 18 Reset Test
2260 033540 000000000000# TSTE21 ; EB21 - CSR Bit 18 Reset Test
2261
2262 ; EBUS Parity Logic
2263
2264 033541 000000000000# TSTE23 ; EB23 - Par Gen - Not Forcing an Error
2265 033542 000000000000# TSTE24 ; EB24 - Par Gen - Forcing an Error
2266
2267 ; Basic CRAM logic
2268
2269 033543 000000000000# TSTU1 ; MP1 - CRAM Data Test RAR12=0
2270 033544 000000000000# TSTU2 ; MP2 - CRAM Data Test RAR12=1
2271 033545 000000000000# TSTU3 ; MP3 - CRAM Addressing Test
2272 033546 000000000000# TSTU4 ; MP4 - RAR/LAR Data Path Test - LDCRAM
2273 033547 000000000000# TSTU5 ; MP5 - RAR/LAR Data Path Test - RDCRAM
2274
2275 ; Run/Single Step Logic
2276
2277 033550 000000000000# TSTE53 ; EB53 - MPROC Run Bit
2278 033551 000000000000# TSTE57 ; EB57 - Verify 'Diag Single Cyc'
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 53
DFPTA1 MAC 10-Oct-83 21:43 Test Dispatching SEQ 0240
2279
2280 ; Addl CRAM tests
2281
2282 033552 000000000000# TSTU6 ; MP6 - Cram Ctrl Register Test
2283 033553 000000000000# TSTU7 ; MP7 - Cram Ctrl Register Test
2284 033554 000000000000# TSTU41 ; M41 - CRAM Ctl Reg Parity Generators Test
2285
2286 ; Sequencer Tests
2287
2288 033555 000000000000# TSTS1 ; SE1 - JMAP Instruction
2289 033556 000000000000# TSTS2 ; SE2 - JZ Instruction
2290 033557 000000000000# TSTS3 ; SE3 - JZ Instruction - Effect on Reg/Ctr
2291 033560 000000000000# TSTS4 ; SE4 - JZ Instruction - Effect on Reg/Ctr
2292 033561 000000000000# TSTS5 ; SE5 - CONT Instruction
2293 033562 000000000000# TSTS6 ; SE6 - CJP Instruction
2294 033563 000000000000# TSTS7 ; SE7 - CJV Instruction
2295 033564 000000000000# TSTS10 ; SE10 - CJS Instruction
2296 033565 000000000000# TSTS11 ; SE11 - CJS Instruction
2297 033566 000000000000# TSTS12 ; SE12 - CJS Instruction
2298 033567 000000000000# TSTS13 ; SE13 - CRTN Instruction
2299 033570 000000000000# TSTS14 ; SE14 - CRTN Instruction
2300 033571 000000000000# TSTS15 ; SE15 - Stack location #1
2301 033572 000000000000# TSTS16 ; SE16 - Stack location #2
2302 033573 000000000000# TSTS17 ; SE17 - Stack location #3
2303 033574 000000000000# TSTS20 ; SE20 - Stack location #4
2304 033575 000000000000# TSTS21 ; SE21 - Stack location #5
2305 033576 000000000000# TSTS22 ; SE22 - Increment/Decrement Stack Pointer
2306 033577 000000000000# TSTS23 ; SE23 - Increment/Decrement Stack Pointer
2307 033600 000000000000# TSTS24 ; SE24 - Increment/Decrement Stack Pointer
2308 033601 000000000000# TSTS25 ; SE25 - Increment/Decrement Stack Pointer
2309 033602 000000000000# TSTS26 ; SE26 - Increment/Decrement Stack Pointer
2310 033603 000000000000# TSTS27 ; SE27 - Overflowing the Stack
2311 033604 000000000000# TSTS30 ; SE30 - CJPP Instruction
2312 033605 000000000000# TSTS31 ; SE31 - CJPP Instruction
2313 033606 000000000000# TSTS32 ; SE32 - CJPP Instruction
2314 033607 000000000000# TSTS33 ; SE33 - LDCT Instruction
2315 033610 000000000000# TSTS34 ; SE34 - LDCT Instruction
2316 033611 000000000000# TSTS35 ; SE35 - Register/Counter
2317 033612 000000000000# TSTS36 ; SE36 - JRP Instruction
2318 033613 000000000000# TSTS37 ; SE37 - JSRP Instruction
2319 033614 000000000000# TSTS40 ; SE40 - JSRP Instruction
2320 033615 000000000000# TSTS41 ; SE41 - JSRP Instruction
2321 033616 000000000000# TSTS42 ; SE42 - PUSH Instruction
2322 033617 000000000000# TSTS43 ; SE43 - PUSH Instruction
2323 033620 000000000000# TSTS44 ; SE44 - PUSH Instruction
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 54
DFPTA1 MAC 10-Oct-83 21:43 Test Dispatching SEQ 0241
2324 033621 000000000000# TSTS45 ; SE45 - LOOP Instruction
2325 033622 000000000000# TSTS46 ; SE46 - LOOP Instruction
2326 033623 000000000000# TSTS47 ; SE47 - LOOP Instruction
2327 033624 000000000000# TSTS50 ; SE50 - RFCT Instruction
2328 033625 000000000000# TSTS51 ; SE51 - RFCT Instruction
2329 033626 000000000000# TSTS52 ; SE52 - RFCT Instruction
2330 033627 000000000000# TSTS53 ; SE53 - RFCT Instruction
2331 033630 000000000000# TSTS54 ; SE54 - RPCT Instruction
2332 033631 000000000000# TSTS55 ; SE55 - RPCT Instruction
2333 033632 000000000000# TSTS56 ; SE56 - TWB Instruction
2334 033633 000000000000# TSTS57 ; SE57 - TWB Instruction
2335 033634 000000000000# TSTS60 ; SE60 - TWB Instruction
2336 033635 000000000000# TSTS61 ; SE61 - TWB Instruction
2337 033636 000000000000# TSTS62 ; SE62 - TWB Instruction
2338 033637 000000000000# TSTS63 ; SE63 - TWB Instruction
2339 033640 000000000000# TSTS64 ; SE64 - Stack Interference Tests
2340 033641 000000000000# TSTS65 ; SE65 - Stack Interference Tests
2341 033642 000000000000# TSTS66 ; SE66 - Reg/Ctr Interference Tests
2342 033643 000000000000# TSTS67 ; SE67 - Reg/Ctr Interference Tests
2343 033644 000000000000# TSTS70 ; SE70 - Full Speed Sequencer Test
2344
2345 ; Miscellaneous
2346
2347 033645 000000000000# TSTE13 ; EB13 - KMUX Parity Generators
2348 033646 000000000000# TSTE35 ; EB35 - Constant MUX
2349 033647 000000000000# TSTE36 ; EB36 - Constant MUX Interference
2350 033650 000000000000# TSTE37 ; EB37 - CSR Bit 24 - EBUS PE Occurs at Wrong Time
2351
2352 ; 2901 Tests
2353
2354 033651 000000000000# TSTA1 ; AL1 - 2901 0's Test
2355 033652 000000000000# TSTA2 ; AL2 - 2901 1's Test
2356 033653 000000000000# TSTA3 ; AL3 - 2901 OR Test - D OR 0
2357 033654 000000000000# TSTA4 ; AL4 - 2901 AND Test - D AND 0
2358 033655 000000000000# TSTA5 ; AL5 - 2901 NOT_R_AND_S Test - D NOT_RS 0
2359 033656 000000000000# TSTA6 ; AL6 - 2901 XOR Test - D XOR 0
2360 033657 000000000000# TSTA7 ; AL7 - 2901 XNOR Test - D XNOR 0
2361 033660 000000000000# TSTA10 ; AL10 - 2901 R+S Test - D + 0
2362 033661 000000000000# TSTA11 ; AL11 - 2901 R-S Test - D - 0
2363 033662 000000000000# TSTA12 ; AL12 - 2901 S-R Test - 0 - D
2364 033663 000000000000# TSTA13 ; AL13 - 2901 Writing/Reading Registers
2365 033664 000000000000# TSTA14 ; AL14 - 2901 Q-Register Test
2366 033665 000000000000# TSTA15 ; AL15 - 2901 Register Interference Test
2367 033666 000000000000# TSTA16 ; AL16 - 2901 OR Test
2368 033667 000000000000# TSTA17 ; AL17 - 2901 AND Test
2369 033670 000000000000# TSTA20 ; AL20 - 2901 NOT_R_AND_S Test
2370 033671 000000000000# TSTA21 ; AL21 - 2901 XOR Test
2371 033672 000000000000# TSTA22 ; AL22 - 2901 XNOR Test
2372 033673 000000000000# TSTA23 ; AL23 - 2901 R + S Test - No Carry
2373 033674 000000000000# TSTA24 ; AL24 - 2901 R + S Test - With Carry
2374 033675 000000000000# TSTA25 ; AL25 - 2901 R - S Test - No Carry
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 55
DFPTA1 MAC 10-Oct-83 21:43 Test Dispatching SEQ 0242
2375 033676 000000000000# TSTA26 ; AL26 - 2901 R - S Test - With Carry
2376 033677 000000000000# TSTA27 ; AL27 - 2901 S - R Test - No Carry
2377 033700 000000000000# TSTA30 ; AL30 - 2901 S - R Test - With Carry
2378 033701 000000000000# TSTA31 ; AL31 - 2901 Q-Register Interference Test
2379 033702 000000000000# TSTA32 ; AL32 - 2901 RAM Register Interference Test
2380 033703 000000000000# TSTA33 ; AL33 - Q-Register Shift
2381 033704 000000000000# TSTA34 ; AL34 - Q-Register Right/Left Shift
2382 033705 000000000000# TSTA35 ; AL35 - RAM Register Shift
2383 033706 000000000000# TSTA36 ; AL36 - RAM Data Movement Test
2384 033707 000000000000# TSTA37 ; AL37 - RAM/Q-Register Data Movement Test
2385 033710 000000000000# TSTA40 ; AL40 - RAM Data Movement/Shifting Test
2386 033711 000000000000# TSTA41 ; AL41 - RAM/Q-Reg Data Movement/Shifting Test
2387 033712 000000000000# TSTA42 ; AL42 - 2901 Register / Constant Mux Test
2388
2389 ; Miscellaneous Tests
2390
2391 033713 000000000000# TSTE40 ; EB40 - EBUS Transfer via DATAO's
2392 033714 000000000000# TSTE41 ; EB41 - EBUS Transfer via DATAI's
2393
2394 ; CSR Register Logic
2395
2396 033715 000000000000# TSTE22 ; EB22 - Read/Write EBUF When Ucode Running
2397 033716 000000000000# TSTE25 ; EB25 - Read only CSR Bits
2398 033717 000000000000# TSTE26 ; EB26 - CSR 01 'DIAG RQST CSR'
2399 033720 000000000000# TSTE27 ; EB27 - CSR 01 'DIAG RQST CSR'
2400 033721 000000000000# TSTE30 ; EB30 - CSR 01 'DIAG RQST CSR'
2401 033722 000000000000# TSTE31 ; EB31 - CSR 01 'DIAG RQST CSR'
2402 033723 000000000000# TSTE32 ; EB32 - CSR 01 'DIAG RQST CSR'
2403 033724 000000000000# TSTE33 ; EB33 - CSR 01 'DIAG RQST CSR'
2404 033725 000000000000# TSTE34 ; EB34 - CSR 02 'DIAG CSR CHNG'
2405 033726 000000000000# TSTE42 ; EB42 - CSR 05 'Rqst Interrupt'
2406 033727 000000000000# TSTE43 ; EB43 - CSR 05 'Rqst Interrupt'
2407 033730 000000000000# TSTE44 ; EB44 - CSR 05 'Rqst Interrupt'
2408 033731 000000000000# TSTE45 ; EB45 - CSR 06 'CRAM Par Err'
2409 033732 000000000000# TSTE46 ; EB46 - CSR 07 'MBUS Err'
2410 033733 000000000000# TSTE47 ; EB47 - CSR 11 'Spare' Bit
2411 033734 000000000000# TSTE50 ; EB50 - CSR 12 'Disable Complete' Bit
2412 033735 000000000000# TSTE51 ; EB51 - CSR 13 'Enable Complete' Bit
2413 033736 000000000000# TSTE73 ; EB73 - CSR 25-26,28 KL side
2414 033737 000000000000# TSTE74 ; EB74 - CSR 25-26,28 Port side
2415 033740 000000000000# TSTE75 ; EB75 - CSR 27,30-31 KL side
2416 033741 000000000000# TSTE76 ; EB76 - CSR 27,30-31 Port side
2417 033742 000000000000# TSTE55 ; EB55 - Clearing MPROC Run Bit
2418 033743 000000000000# TSTE56 ; EB56 - Clearing MPROC Run Bit
2419
2420 ; MBUS Error Logic
2421
2422 033744 000000000000# TSTU10 ; MP10 - MBUS Error Test (MPROC module only)
2423 033745 000000000000# TSTU11 ; MP11 - MBUS Error Test
2424 033746 000000000000# TSTU12 ; MP12 - MBUS Error Test (MPROC module only)
2425 033747 000000000000# TSTU13 ; MP13 - MBUS Error Test
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 56
DFPTA1 MAC 10-Oct-83 21:43 Test Dispatching SEQ 0243
2426
2427 ; Local Storage Tests
2428
2429 033750 000000000000# TSTU34 ; MP34 - Basic Local Store Test
2430 033751 000000000000# TSTU35 ; MP35 - Local Store Data Test
2431 033752 000000000000# TSTU36 ; MP36 - Local Store Address Test
2432 033753 000000000000# TSTU37 ; MP37 - Local Store RAM Mode Test
2433
2434 ; Miscellaneous
2435
2436 033754 000000000000# TSTU40 ; MP40 - Jump MUX Test
2437
2438 ; Interrupt Logic
2439
2440 033755 000000000000# TSTE60 ; EB60 - PI Level n/0 Interrupts
2441 033756 000000000000# TSTE61 ; EB61 - Check PIA Level 0
2442 033757 000000000000# TSTE62 ; EB62 - Check Interrupt on Level 1-7
2443 033760 000000000000# TSTE63 ; EB63 - CSR 05 'Rqst Interrupt' Clearing
2444 033761 000000000000# TSTE64 ; EB64 - IOP Function 0 - 40+2N Interrupt
2445 033762 000000000000# TSTE65 ; EB65 - IOP Function 1 - 40+2N Interrupt
2446 033763 000000000000# TSTE70 ; EB70 - IOP Function 4 - Examine
2447 033764 000000000000# TSTE71 ; EB71 - IOP Function 5 - Deposit
2448 033765 000000000000# TSTE72 ; EB72 - IOP Function 7 - Examine/Increment
2449
2450 ; Basic CBUS Tests
2451
2452 033766 000000000000# TSTC1 ; CB1 - Fmtr Data Loopback
2453 033767 000000000000# TSTC2 ; CB2 - PLI Buffer Data Loopback
2454 033770 000000000000# TSTC11 ; CB11 - Fmtr Cleared by 'Port Clear'
2455
2456 ; Condition Code Tests
2457
2458 033771 000000000000# TSTU14 ; MP14 - CCCbusAvail Test
2459 033772 000000000000# TSTU15 ; MP15 - CCGrntCSR Test
2460 033773 000000000000# TSTU16 ; MP16 - CCFEQ0 Test
2461 033774 000000000000# TSTU17 ; MP17 - CCCSRChng Test
2462 033775 000000000000# TSTU20 ; MP20 - CCEbParErr Test
2463 033776 000000000000# TSTU21 ; MP21 - CCRcvrBufAFul Test
2464 033777 000000000000# TSTU22 ; MP22 - CCRcvrBufBFul Test
2465 034000 000000000000# TSTU23 ; MP23 - CCXmtrAttn Test
2466 034001 000000000000# TSTU24 ; MP24 - CCEbusRqst Test
2467 034002 000000000000# TSTU25 ; MP25 - CCIntrActive Test
2468 034003 000000000000# TSTU26 ; MP26 - CCMBSign Test
2469 034004 000000000000# TSTU27 ; MP27 - CCMVParChk Test
2470 034005 000000000000# TSTU30 ; MP30 - CCCbusParErr Test
2471 034006 000000000000# TSTU31 ; MP31 - CCPliParErr Test
2472 034007 000000000000# TSTU32 ; MP32 - CCChanErr Test
2473 034010 000000000000# TSTU33 ; MP33 - CCCbLstWd Test
2474
2475 ; CBUS Data Transfer
2476
2477 034011 000000000000# TSTC3 ; CB3 - CBUS to EBUF Data Transfer
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 57
DFPTA1 MAC 10-Oct-83 21:43 Test Dispatching SEQ 0244
2478 034012 000000000000# TSTC4 ; CB4 - 2901 to CBUS Data Transfer
2479 034013 000000000000# TSTC5 ; CB5 - CBUS to 2901 Multiple Word Transfer
2480 034014 000000000000# TSTC6 ; CB6 - 2901 to CBUS Multiple Word Transfer
2481 034015 000000000000# TSTC7 ; CB7 - CBUS to EBUS Data Transfer
2482 034016 000000000000# TSTC10 ; CB10 - EBUS to CBUS Data Transfer
2483
2484 ; Formatter Tests
2485
2486 034017 000000000000# TSTC12 ; CB12 - Fmtr Basic Up Shifting Test
2487 034020 000000000000# TSTC13 ; CB13 - Fmtr Up Shift 4 Test - BUS Ctl=Cbus
2488 034021 000000000000# TSTC14 ; CB14 - Fmtr Up Shift 4 Test - BUS Ctl=Fmtr
2489 034022 000000000000# TSTC15 ; CB15 - Fmtr Up Shift 4 (from PLIN) Test - SELRHTNIB=0
2490 034023 000000000000# TSTC16 ; CB16 - Fmtr Up Shift 4 (from PLIN) Test - SELRHTNIB=0
2491 034024 000000000000# TSTC17 ; CB17 - Fmtr Up Shift 4 (from PLIN) Test - SELRHTNIB=1
2492 034025 000000000000# TSTC20 ; CB20 - Fmtr Up Shift 4 (from PLIN) Test - SELRHTNIB=1
2493 034026 000000000000# TSTC21 ; CB21 - Fmtr Up Shift 8 (from PLIN) Test - SELRHTNIB=0
2494 034027 000000000000# TSTC22 ; CB22 - Fmtr Up Shift 8 (from PLIN) Test - SELRHTNIB=0
2495 034030 000000000000# TSTC23 ; CB23 - Fmtr Up Shift 8 (from PLIN) Test - SELRHTNIB=1
2496 034031 000000000000# TSTC24 ; CB24 - Fmtr Up Shift 4 (from PLIN) Test - SELRHTNIB=1
2497 034032 000000000000# TSTC25 ; CB25 - Fmtr Basic Down Shifting Test
2498 034033 000000000000# TSTC26 ; CB26 - Fmtr Down Shift 4 Test
2499 034034 000000000000# TSTC27 ; CB27 - Fmtr Down Shift 4 (from PLIN) Test SELRHTNIB=0
2500 034035 000000000000# TSTC30 ; CB30 - Fmtr Down Shift 4 (from PLIN) Test SELRHTNIB=0
2501 034036 000000000000# TSTC31 ; CB31 - Fmtr Down Shift 4 (from PLIN) Test SELRHTNIB=1
2502 034037 000000000000# TSTC32 ; CB32 - Fmtr Down Shift 4 (from PLIN) Test SELRHTNIB=1
2503 034040 000000000000# TSTC33 ; CB33 - Fmtr Down Shift 8 (from PLIN) Test SELRHTNIB=0
2504 034041 000000000000# TSTC34 ; CB34 - Fmtr Down Shift 8 (from PLIN) Test SELRHTNIB=0
2505 034042 000000000000# TSTC35 ; CB35 - Fmtr Down Shift 8 (from PLIN) Test SELRHTNIB=1
2506 034043 000000000000# TSTC36 ; CB36 - Fmtr Down Shift 4 (from PLIN) Test SELRHTNIB=1
2507 034044 000000000000# TSTC37 ; CB37 - Fmtr Ring Buffer Test
2508
2509 ; Miscellaneous CBUS module tests
2510
2511 034045 000000000000# TSTC40 ; CB40 - CMUX Selected by PLINTOCMUX
2512 034046 000000000000# TSTC41 ; CB41 - CBUF Loaded Correctly
2513 034047 000000000000# TSTC42 ; CB42 - PMUX Selected by MPCBUFTOPLOUT
2514 034050 000000000000# TSTC43 ; CB43 - PMUX Selected by MPCBUFTOPLOUT/MPZEROLFTNIB
2515 034051 000000000000# TSTC44 ; CB44 - DMUX Selected Correctly
2516 034052 000000000000# TSTC45 ; CB45 - CBUS Parity Checking - CBUS to CBUS Module
2517 034053 000000000000# TSTC46 ; CB46 - CBUS Parity Checking - CBUS Module to CBUS
2518 034054 000000000000# TSTC47 ; CB47 - CBUS Parity Checking - CBUS to CBUS Module
2519 034055 000000000000# TSTC50 ; CB50 - T Field Timing Test
2520 034056 000000000000# TSTC51 ; CB51 - CBUS Store
2521 034057 000000000000# TSTC52 ; CB52 - CBUS Input Buffer
2522 034060 000000000000# TSTC53 ; CB53 - Parity Predictor - CBIN to Fmtr/MPINDSTCOMP=0
2523 034061 000000000000# TSTC54 ; CB54 - Parity Predictor - CBIN to Fmtr/MPINDSTCOMP=1
2524 034062 000000000000# TSTC55 ; CB55 - Parity Predictor - Fmtr to PLOUT
2525 034063 000000000000# TSTC56 ; CB56 - Parity Predictor - PLIN to Fmtr/MPCOREDUMP=0
2526 034064 000000000000# TSTC57 ; CB57 - Parity Predictor - PLIN to Fmtr/MPCOREDUMP=1
2527 034065 000000000000# TSTC60 ; CB60 - Parity Predictor - Fmtr to CBOUT
2528 034066 777777 777777 -1 ; end of tests
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 58
DFPTA1 MAC 10-Oct-83 21:43 Test Dispatching SEQ 0245
2529
2530 ;#********************************************************************
2531 ;* FLTHAN - Fault handler
2532 ;
2533 ; AC3 - Address of module list (0 if none, last entry has bit 0 set)
2534 ; AC4 - Weight to be added to probability list
2535 ;#********************************************************************
2536
2537 034067 322 03 0 00 051527 FLTHAN: JUMPE 3,[RTN] ; nothing? yes - return
2538 034070 261 17 0 00 000001 PUT 1 ; save AC1
2539 034071 550 01 0 03 000000 FLTHA0: HRRZ 1,(3) ; get module entry
2540 034072 272 04 0 01 031600 ADDM 4,NETBAD-1(1) ; update module probability count
2541 034073 377 00 0 00 000004 SOSG 4 ; adjust weight - less than 1?
2542 034074 201 04 0 00 000001 MOVEI 4,1 ; yes - ensure at least 1
2543 034075 332 00 0 00 064344' SKIPE IDEBUG ; fault isolation debug mode?
2544 GO [RPUT (0,1) ; yes - print it out
2545 HRRZ 1,NETDES-1(1)
2546 MOVE 1,@1
2547 LDB [POINT 7,1,20]
2548 CAIN 72
2549 AND 1,[777760,,077777]
2550 LDB [POINT 7,1,27]
2551 CAIN 72
2552 AND 1,[777777,,700377]
2553 MOVEI 1
2554 PNTAL
2555 PSP
2556 RGET (1,0)
2557 034076 260 17 0 00 054637 RTN]
2558 034077 200 01 0 03 000000 MOVE 1,(3) ; get module entry
2559 034100 350 00 0 00 000003 AOS 3 ; point to next module entry
2560 034101 607 01 0 00 400000 TLNN 1,400000 ; last one?
2561 034102 254 00 0 00 034071 JRST FLTHA0 ; no - loop till done
2562 034103 262 17 0 00 000001 GET 1 ; restore AC1
2563 034104 263 17 0 00 000000 RTN ; return
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 59
DFPTA1 MAC 10-Oct-83 21:43 Test Dispatching SEQ 0246
2564
2565 ;#********************************************************************
2566 ;* FLTCHK - See if this test should fail based on possible modules list
2567 ;#********************************************************************
2568
2569 034105 261 17 0 00 000001 FLTCHK: PUT 1 ; save AC1
2570
2571 ; Check high probability modules
2572
2573 034106 200 03 0 00 046320 MOVE 3,TSTHIG ; get addr of high prob module list
2574 034107 322 03 0 00 034122 JUMPE 3,FLTCH1 ; nothing? yes - try low probability
2575 034110 550 01 0 03 000000 FLTCH0: HRRZ 1,(3) ; get module entry
2576 034111 316 01 0 00 046326 CAMN 1,FLTNUM ; module matches fault?
2577 034112 474 15 0 00 000000 SETO ERFLG, ; yes - set error flag
2578 034113 200 01 0 03 000000 MOVE 1,(3) ; get module entry
2579 034114 350 00 0 00 000003 AOS 3 ; point to next module entry
2580 034115 607 01 0 00 400000 TLNN 1,400000 ; last one?
2581 034116 254 00 0 00 034110 JRST FLTCH0 ; no - loop till done
2582 034117 326 15 0 00 034131 JUMPN ERFLG,FLTCHX ; error flag set? yes - exit
2583
2584 ; Check low probability modules
2585
2586 034120 200 03 0 00 046321 MOVE 3,TSTLOW ; get addr of low prob module list
2587 034121 322 03 0 00 034131 JUMPE 3,FLTCHX ; nothing? yes - exit
2588 034122 550 01 0 03 000000 FLTCH1: HRRZ 1,(3) ; get module entry
2589 034123 316 01 0 00 046326 CAMN 1,FLTNUM ; module matches fault?
2590 034124 474 15 0 00 000000 SETO ERFLG, ; yes - set error flag
2591 034125 200 01 0 03 000000 MOVE 1,(3) ; get module entry
2592 034126 350 00 0 00 000003 AOS 3 ; point to next module entry
2593 034127 607 01 0 00 400000 TLNN 1,400000 ; last one?
2594 034130 254 00 0 00 034122 JRST FLTCH1 ; no - loop till done
2595
2596 ; Exit
2597
2598 034131 262 17 0 00 000001 FLTCHX: GET 1 ; restore AC1
2599 034132 263 17 0 00 000000 RTN ; return
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 60
DFPTA1 MAC 10-Oct-83 21:43 Test Dispatching SEQ 0247
2600
2601 ;#********************************************************************
2602 ;* TSTDEC - Decode test specified as XXnnn where XX is the test class
2603 ;* and nnn is the test number.
2604 ;
2605 ; Argument: AC1 - Contains SIXBIT test specification
2606 ;
2607 ; Returns: +1 - Test not recognized (AC1 not preserved).
2608 ; +2 - Test number out of range (AC1 contains maximum
2609 ; test number.
2610 ; +3 - Ok, AC1 contains test number decoded. Also,
2611 ; TSTCLS, TSTNUM, TSTADD are set up.
2612 ;#********************************************************************
2613
2614 034133 261 17 0 00 000000 TSTDEC: RPUT (0,2,3) ; save AC's
2615
2616 034136 200 03 0 00 000001 MOVE 3,1 ; save AC1
2617
2618 ; Decode the 2 character test type
2619
2620 034137 135 01 0 00 054657 LDB 1,[POINT 12,3,11] ; get first 2 characters
2621 034140 242 01 0 00 000030 LSH 1,^D24 ; position correctly
2622 034141 201 02 0 00 031123 MOVEI 2,INDLIS ; get address of individual test list
2623 034142 260 17 0 00 032377* GO .COMM ; handle command decoding
2624 034143 254 00 0 00 034172 JRST TSTDED ; check if only 1 character
2625 034144 202 01 0 00 046304 MOVEM 1,TSTCLS ; save test class
2626
2627 ; Decode the test number
2628
2629 034145 135 01 0 00 054660 LDB 1,[POINT 24,3,35] ; get test number
2630 034146 242 01 0 00 000014 LSH 1,^D12 ; left justify
2631 034147 260 17 0 00 000000* TSTDE0: GO CONVSX ; convert to octal
2632 034150 254 00 0 00 034166 JRST TSTDEE ; error - continue
2633 034151 202 01 0 00 046305 MOVEM 1,TSTNUM ; save test number
2634 034152 200 02 0 00 046304 MOVE 2,TSTCLS ; get test class
2635 XCT [MOVEI 2,TSEQ-TEBUS ; get maximum tests in the
2636 MOVEI 2,TALU-TSEQ ; particular category
2637 MOVEI 2,TMPROC-TALU
2638 MOVEI 2,TCBUS-TMPROC
2639 034153 256 00 0 02 054661 MOVEI 2,TEND-TCBUS](2)
2640 034154 303 01 0 00 000000 CAILE 1,0 ; test number in the range
2641 034155 313 01 0 00 000002 CAMLE 1,2 ; 1..n?
2642 JRST [MOVE 1,2 ; no - get maximum test number
2643 034156 254 00 0 00 054666 JRST TSTDER] ; and exit
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 61
DFPTA1 MAC 10-Oct-83 21:43 Test Dispatching SEQ 0248
2644
2645 ; Succeeded, also set up TSTADD
2646
2647 034157 200 02 0 00 046304 MOVE 2,TSTCLS ; get test class
2648 XCT [MOVEI 2,TEBUS ; get starting address in address
2649 MOVEI 2,TSEQ ; table
2650 MOVEI 2,TALU
2651 MOVEI 2,TMPROC
2652 034160 256 00 0 02 053416 MOVEI 2,TCBUS](2)
2653 034161 270 02 0 00 000001 ADD 2,1 ; include the test number
2654 034162 370 00 0 00 000002 SOS 2 ; allow for tests 1..
2655 034163 202 02 0 00 046311 MOVEM 2,TSTADD ; save the dispatch table address
2656
2657 ; Exit
2658
2659 034164 350 00 0 17 777775 AOS -3(P) ; yes - set up RTN+3
2660 034165 350 00 0 17 777775 TSTDER: AOS -3(P) ; set up RTN+2
2661 034166 262 17 0 00 000003 TSTDEE: RGET (3,2,0) ; error return (nothing recognized)
2662
2663 034171 263 17 0 00 000000 RTN ; return
2664
2665 ; Command not recognized, maybe only one alphabetic character was given
2666
2667 034172 135 01 0 00 054670 TSTDED: LDB 1,[POINT 6,3,5] ; get first character
2668 034173 242 01 0 00 000036 LSH 1,^D30 ; position correctly
2669 034174 201 02 0 00 031123 MOVEI 2,INDLIS ; get address of individual test list
2670 034175 260 17 0 00 034142* GO .COMM ; handle command decoding
2671 034176 254 00 0 00 034166 JRST TSTDEE ; error return
2672 034177 202 01 0 00 046304 MOVEM 1,TSTCLS ; save test class
2673 034200 135 01 0 00 054671 LDB 1,[POINT 30,3,35] ; get test number
2674 034201 242 01 0 00 000006 LSH 1,6 ; left justify
2675 034202 254 00 0 00 034147 JRST TSTDE0 ; continue
2676
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 62
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0249
2677 SUBTTL Port Debugger
2678
2679 ;#*********************************************************************
2680 ;* TSTDEB - Console command utility for the port.
2681 ;
2682 ; Command Action
2683 ; ------- ------
2684 ;
2685 ; ? Print list of commands available.
2686 ;
2687 ; HELP Print list of commands and description.
2688 ; EXIT Exit debugger mode and go back to 'What Test' level.
2689 ; DDT Enter DDT.
2690 ;
2691 ; TAKE Take commands from specified file
2692 ;
2693 ; CONFIG Determine/print configuration
2694 ; CONPNT Print configuration
2695 ; SELECT Select device to test
2696 ;
2697 ; SET ADDR adr Set starting address for a START/CONT command.
2698 ; CSR arg Set starting data to be written to CSR for START/CONT.
2699 ; PARITY arg Set automatic parity generation flag when loading cram.
2700 ; EBUF arg Set preserve EBUF flag for single stepping.
2701 ; LENGTH arg Set length of data transfer operations.
2702 ; DATA arg Set data pattern to use for data transfer operations.
2703 ; FNAME name ext Set default microcode file name.
2704 ; WHAT Print current selections.
2705 ; PATLIS Print data patterns.
2706 ;
2707 ; ECSR Print contents of the CSR register (in octal).
2708 ; DCSR arg Change the contents of the CSR registers.
2709 ; ZCSR Clear CSR register.
2710 ;
2711 ; RESET Issue an EBUS reset.
2712 ; CLEAR Issue a 'Clear Port'.
2713 ;
2714 ; START adr Start port microcode by setting CSR Bit 21 'MPROC Run'.
2715 ; If address is supplied, start at that address; if no
2716 ; address is supplied, start at location 0.
2717 ;
2718 ; STOP Stop port microcode by clearing CSR Bit 21 'MPROC Run'.
2719 ; Report the last CRAM address also.
2720 ;
2721 ; CONT Clear the single step bit and set 'MPROC Run' in the port.
2722 ;
2723 ; SSTEP arg Single step the port microcode 'ARG' times. Report
2724 ; final CRAM address.
2725 ;
2726 ; STRACE arg Single step the port microcode 'ARG' times. Report
2727 ; the CRAM address and CSR register contents after each
2728 ; micro-instruction.
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 63
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0250
2729
2730 ; Response Action
2731 ; -------- ------
2732 ;
2733 ; SPRINT arg Print single step history data, 'ARG' entries.
2734 ; SCLEAR Clear single step history data.
2735 ; SSINIT Initialize single step data
2736 ;
2737 ; EEBUF Print contents of EBUF register.
2738 ; DEBUF arg Deposit data to EBUF register.
2739 ; ZEBUF Zero EBUF register.
2740 ;
2741 ; ELAR Print contents of LAR register.
2742 ; DRAR arg Deposit data to RAR register.
2743 ; ZRAR Zero RAR register.
2744 ;
2745 ; DCRAM adr,adr Deposit data into port CRAM addresses specified by 'adr1'
2746 ; and 'adr2'. The data will be queried for each address.
2747 ; The port microcode must be stopped.
2748 ;
2749 ; BCRAM adr,adr Deposit data as above, data is queried by bit field.
2750 ;
2751 ; ACRAM adr,adr Alter CRAM locations, addresses selected as above.
2752 ;
2753 ; ECRAM adr,adr Examine port CRAM addresses. 'Adr1' and 'adr2' specify
2754 ; examine limits. The port microcode must be stopped.
2755 ;
2756 ; LCRAM adr,adr List port CRAM addresses. 'Adr1' and 'adr2' specify
2757 ; examine limits. The port microcode must be stopped.
2758 ;
2759 ; ZCRAM adr,adr Zero port CRAM addresses. 'Adr1' and 'adr2' specify
2760 ; examine limits. The port microcode must be stopped.
2761 ;
2762 ; ELOCS adr,adr Examine local storage contents
2763 ; DLOCS adr,data Deposit local storage contents
2764 ; ZLOCS adr,adr Zero local storage contents
2765 ;
2766 ; E2901 adr,adr Examine 2901 registers
2767 ; D2901 adr,data Deposit 2901 registers
2768 ; Z2901 adr,adr Zero 2901 registers
2769 ;
2770 ; LCONI Loop on CONI
2771 ; LCONO Loop on CONO
2772 ; LDATAI Loop on DATAI
2773 ; LDATAO Loop on DATAO
2774 ; LROUTN Loop on user supplied routine at DROUTN:
2775 ;
2776 ; MARK adr.. Set mark bit in CRAM locations
2777 ; RMARK adr.. Remove mark bit at CRAM address 'adr'
2778 ; CMARK adr,adr Clear mark bit in CRAM locations
2779 ; LMARK List locations with mark bit set
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 64
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0251
2780
2781 ; Response Action
2782 ; -------- ------
2783 ;
2784 ; BREAK adr.. Set a breakpoint at CRAM address
2785 ; RBREAK adr.. Remove breakpoint at CRAM address 'adr'
2786 ; CBREAK adr,adr Clear all breakpoints
2787 ; LBREAK adr,adr List breakpoints
2788 ;
2789 ; LOAD arg Load microcode into CRAM from a test. 'Arg' specifies
2790 ; test number.
2791 ; LIST arg List microcode of a test. 'Arg' specifies test number.
2792 ; FLOAD Load microcode from disk file into CRAM.
2793 ; FVERFY Verify microcode loaded.
2794 ; FLIST List microcode on disk file.
2795 ; FEXAM Examine microcode on disk file.
2796 ;
2797 ; TRANSL arg Translate given CSR bits to English.
2798 ; CCODE Print current status of condition codes.
2799 ; ESTACK Examine 2910 stack contents
2800 ;
2801 ; FILLNX arg Fill CRAM with data as 'J=.+1,CTL=x', where 'x' is given.
2802 ; FILLPC arg Fill CRAM with data as 'J=.,CTL=x', where 'x' is given.
2803 ;
2804 ; IPRINT Print interrupt history
2805 ; ICLEAR Clear interrupt history
2806 ; IINIT Initialize interrupt system
2807 ;
2808 ; RDINIT Initialize e/g for a read
2809 ; WRINIT Initialize e/g for a write
2810 ; BPRINT Print buffer contents
2811 ; CCWPNT Print CCW list
2812 ; LOGPNT Print logout data
2813 ; COMPAR Compare data buffer contents
2814 ;
2815 ; Switches: To complement switch, type switch name
2816 ;
2817 ; SWITCH Enter switches
2818 ; SWPRIN Print current switches
2819 ;
2820 ; NOPNT LOOPER RELIAB TRACE LOOPGM DSPEAR SDEBUG NIPORT MMPROC
2821 ; PNTLPT ERSTOP TXTINH INHFLT LOOPTS UDEBUG LDEBUG CIPORT MCBUS
2822 ; DING PALERS OPRSEL INHMSG RUNALL MDEBUG IDEBUG
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 65
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0252
2823
2824 ; Common Error Messages For 'DEBUG' Mode:
2825 ;
2826 ; "? Missing argument" - Response to "DEBUG>" prompt expects a command
2827 ; plus an argument.
2828 ;
2829 ; "? Argument Error" - An attempt was made to decode an octal or decimal
2830 ; argument. It was undecipherable.
2831 ;
2832 ; "? Range nonsensical" - The beginning address is greater than ending
2833 ; address.
2834 ;
2835 ; "? Range of CRAM locations is 0000-7777" - Argument(s) typed were not
2836 ; it range.
2837 ;
2838 ; "? Port not stopped" - An operation requiring the port to be stopped
2839 ; was issued when 'MPROC Run' was set.
2840 ;
2841 ; "? Port not running" - A function was issued to the port when it was
2842 ; stopped. It should have been running.
2843 ;
2844 ; "? Test number out of range" - In response to the Test Number question.
2845 ;
2846 ; "? Error accessing CSR registers" - A read of CSR register failed.
2847 ;
2848 ; "? CSR has MBUS Error bit set - must do a reset first" - A operation
2849 ; requiring ability to write CSR was done, but MBUS ERROR bit
2850 ; is set.
2851 ;
2852 ; "? Test specified does not have microcode" - An attempt to load ucode
2853 ; from this test failed because the test doesn't have any.
2854 ;
2855 ; "? Unrecognized command" - Unrecognized command entered.
2856 ;#********************************************************************
2857
2858 034203 200 01 0 00 054675 TSTDEB: MOVE 1,[FMSGCD (DEBUG <CR>)]
2859 034204 260 17 0 00 032522* GO CHKARG ; check for argument
2860 034205 263 17 0 00 000000 RTN ; error - exit
2861 034206 202 17 0 00 064373' MOVEM P,SAVCMD# ; save stack pointer
2862
2863 ; Determine port under test
2864
2865 034207 260 17 0 00 032335 CMD0: GO PTEST ; determine port/set up MBCN
2866 034210 260 17 0 00 032354 GO PTESTP ; print results
2867 034211 322 16 0 00 051527 JUMPE MBCN,[RTN] ; exit if no ports are selected
2868 034212 260 17 0 00 033012* GO DEVREQ ; request the device
2869 JRST [FMSGCD <[? Configuration changed - reconfigure using the CONFIG command]>
2870 034213 254 00 0 00 054714 RTN] ; failed - return
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 66
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0253
2871
2872 ; Initialize things
2873
2874 034214 260 17 0 00 000000* CMD1: GO .INPNT ; print interrupt fielded (if any)
2875 034215 402 00 0 00 064363' SETZM PCMD# ; clear the command storage
2876 034216 400 15 0 00 000000 SETZ ERFLG, ; clear error flag
2877 034217 201 00 0 00 023420 MOVEI ^D10000 ; re-set up print limit just in case
2878 034220 212 00 0 00 030220 MOVNM PNTENB ; the last test exceeded it
2879
2880 ; Set/clear debug switches
2881
2882 034221 402 00 0 00 064413' CMD2: SETZM UDEBUG ; clear no-port user mode debug switch
2883 034222 402 00 0 00 064352' SETZM MDEBUG ; clear error message debug switch
2884 034223 402 00 0 00 064377' SETZM SDEBUG ; clear single step debug switch
2885 034224 402 00 0 00 064346' SETZM LDEBUG ; clear ucode load debug switch
2886 034225 402 00 0 00 064344' SETZM IDEBUG ; fault isolation debug switch
2887 034226 260 17 0 00 033122* GO SWITT ; get switches
2888 034227 602 00 0 00 002000 TRNE DEBUG1 ; debug switch set?
2889 034230 476 00 0 00 064413' SETOM UDEBUG ; set no-port user mode debug switch
2890 034231 602 00 0 00 001000 TRNE DEBUG2 ; debug switch set?
2891 034232 476 00 0 00 064352' SETOM MDEBUG ; set error message debug switch
2892 034233 602 00 0 00 000400 TRNE DEBUG3 ; debug switch set?
2893 034234 476 00 0 00 064377' SETOM SDEBUG ; set single step debug switch
2894 034235 602 00 0 00 000200 TRNE DEBUG4 ; debug switch set?
2895 034236 476 00 0 00 064346' SETOM LDEBUG ; set ucode load debug switch
2896 034237 602 00 0 00 000100 TRNE DEBUG5 ; debug switch set?
2897 034240 476 00 0 00 064344' SETOM IDEBUG ; set fault isolation debug switch
2898 034241 402 00 0 00 046330 SETZM PMODE ; set program mode to 'no test'
2899 034242 402 00 0 00 064354' SETZM MULFLG ; clear 'multiple examine' flag
2900 034243 476 00 0 00 064355' SETOM MULINI ; set 'initial examine' flag
2901
2902 ; Input command
2903
2904 034244 260 17 0 00 030771* GO CLRBUF ; clear input buffer
2905 CMD3: MOVEI [PCRL ; set up $ transfer address
2906 SETZM ALTF
2907 GO FIOFF
2908 034245 201 00 0 00 054716 JRST CMD1]
2909 034246 202 00 0 00 030063 MOVEM ALTMGO
2910 034247 402 00 0 00 064326' SETZM ALTF ; clear 'altmode typed' flag
2911 034250 336 00 0 00 064341' SKIPN FINPUT ; file input?
2912 034251 476 00 0 00 064340' SETOM FINECH ; no - ensure echo flag set
2913 034252 332 00 0 00 064340' SKIPE FINECH ; echo flag set?
2914 GO [PFORCE ; no - print all this
2915 PCRLF
2916 FMSG (DEBUG> )
2917 034253 260 17 0 00 054724 RTN]
2918 034254 332 00 0 00 064341' SKIPE FINPUT ; file input?
2919 JRST [GO FINCMD ; yes - input sixbit cmd
2920 JRST CMD3 ; error or EOF
2921 034255 254 00 0 00 054730 JRST CMD4] ; continue
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 67
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0254
2922
2923 034256 037 10 0 00 000003 CMD3A: TTSIXB ; get operator input
2924 ALTCHK [GET XXW# ; adjust stack properly
2925 SKIPN $TWCNT ; did a timeout occur?
2926 JRST CMD3 ; yes - keep looking for input
2927 MOVE 1,$TTCHR ; no - get character typed
2928 CAIN 1,77 ; was a question mark typed?
2929 JRST CMDQUE ; yes - handle
2930 CAIN 1,40 ; space (delimiter character) typed?
2931 JRST .+1 ; yes - continue (no error occurred)
2932 FMSGCD <? Unrecognizable - Type ? for help>
2933 GO FIOFF ; turn off file input
2934 034257 007 00 0 00 054733 JRST CMD1] ; error - reask question
2935 CMD4: JUMPE [MOVE $TTCHR ; anything typed? if a space, keep
2936 CAIN 40 ; looking for an argument, if not
2937 JRST CMD3A ; exit
2938 034260 322 00 0 00 054746 JRST CMD3]
2939 034261 202 00 0 00 064363' MOVEM PCMD ; save command typed
2940 034262 402 00 0 00 032725* SETZM ARGFLG ; clear 'argument given' flag
2941 034263 200 01 0 00 030231 MOVE 1,$TTCHR ; get last character typed
2942 034264 302 01 0 00 000015 CAIE 1,15 ; CR? (end of line)
2943 034265 476 00 0 00 034262* SETOM ARGFLG ; set 'argument given' flag
2944
2945 ; Decode the command
2946
2947 034266 200 01 0 00 064363' MOVE 1,PCMD ; get sixbit command
2948 034267 201 02 0 00 034303 MOVEI 2,.DBCMD ; get address of cmd list
2949 034270 260 17 0 00 034175* GO .COMM ; handle command decoding
2950 JRST [FMSGCD <? Unrecognizable - Type ? for help>
2951 GO FIOFF
2952 034271 254 00 0 00 054743 JRST CMD1] ; error return
2953 034272 260 17 1 01 034453 GO @.DBDIS(1) ; dispatch to test
2954 034273 254 00 0 00 034214 JRST CMD1 ; return to 'DEBUG>' prompt
2955 034274 254 00 0 00 034207 JRST CMD0 ; do port handling again
2956
2957 ; Question mark typed
2958
2959 034275 037 01 0 00 000026 CMDQUE: PFORCE ; handle Control-O
2960 034276 037 00 1 00 034300 PNTMSG @CMDQUU ; print text
2961 034277 254 00 0 00 034214 JRST CMD1 ; look for new command
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 68
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0255
2962
2963 034300 CMDQUU: [ASCII /
2964 --------- Miscellaneous -------------------- -- Switches -
2965 HELP IPRINT START EEBUF DCRAM LOAD NOPNT TRACE
2966 EXIT ICLEAR STOP DEBUF BCRAM LIST PNTLPT INHFLT
2967 DDT IINIT CONT ZEBUF ACRAM FLOAD DING INHMSG
2968 SET SSTEP ECRAM FVERFY LOOPER LOOPGM
2969 034300 000000 054752 TAKE RDINIT STRACE ELAR LCRAM FLIST ERSTOP LOOPTS/]
2970 [ASCII /
2971 NTAKE WRINIT SPRINT DRAR ZCRAM FEXAM PALERS RUNALL
2972 TRANSL BPRINT SCLEAR ZRAR RELIAB DSPEAR
2973 FILLNX CCWPNT SSINIT LCONI BREAK TXTINH UDEBUG
2974 FILLPC LOGPNT ELOCS LCONO RBREAK OPRSEL MDEBUG
2975 COMPAR RESET DLOCS LDATAI CBREAK SDEBUG
2976 034301 000000 055067 MARK CLEAR ZLOCS LDATAO LBREAK NIPORT LDEBUG /]
2977 [ASCIZ /
2978 RMARK CONFIG LROUTN CIPORT IDEBUG
2979 CMARK CONPNT E2901 ECSR CCODE MMPROC
2980 LMARK SELECT D2901 DCSR ENEXT SWITCH MCBUS
2981 Z2901 ZCSR DNEXT ESTACK SWPRIN
2982 034302 000000 055204 /]
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 69
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0256
2983
2984 ;#********************************************************************
2985 ;* .DBCMD - List of acceptable commands
2986 ;#********************************************************************
2987
2988 ; Miscellaneous commands
2989
2990 034303 777777 777655 .DBCMD: -123 ; ignore
2991 034304 50 45 54 60 00 00 SIXBIT /HELP/ ; print help message
2992 034305 45 70 51 64 00 00 SIXBIT /EXIT/ ; exit DEBUG mode
2993 034306 44 44 64 00 00 00 SIXBIT /DDT/ ; enter DDT
2994
2995 034307 63 45 64 00 00 00 SIXBIT /SET/ ; set/print options
2996 034310 64 41 53 45 00 00 SIXBIT /TAKE/ ; take commands from a file
2997 034311 56 64 41 53 45 00 SIXBIT /NTAKE/ ; take commands from a file
2998 034312 45 56 45 70 64 00 SIXBIT /ENEXT/ ; examine next location
2999 034313 44 56 45 70 64 00 SIXBIT /DNEXT/ ; examine next location
3000 034314 43 57 56 46 51 47 SIXBIT /CONFIG/ ; determine/print configuration
3001 034315 43 57 56 60 56 64 SIXBIT /CONPNT/ ; print configuration
3002 034316 63 45 54 45 43 64 SIXBIT /SELECT/ ; select device to test
3003
3004 ; CSR commands
3005
3006 034317 45 43 63 62 00 00 SIXBIT /ECSR/ ; examine CSR register
3007 034320 44 43 63 62 00 00 SIXBIT /DCSR/ ; deposit CSR register
3008 034321 72 43 63 62 00 00 SIXBIT /ZCSR/ ; zero CSR register
3009
3010 034322 62 45 63 45 64 00 SIXBIT /RESET/ ; issue an EBUS Reset
3011 034323 43 54 45 41 62 00 SIXBIT /CLEAR/ ; issue a 'Port Clear'
3012
3013 ; Start/stop/single step commands
3014
3015 034324 63 64 41 62 64 00 SIXBIT /START/ ; start the port
3016 034325 63 64 57 60 00 00 SIXBIT /STOP/ ; stop the port
3017 034326 43 57 56 64 00 00 SIXBIT /CONT/ ; continue the port
3018 034327 63 63 64 45 60 00 SIXBIT /SSTEP/ ; single step the port
3019 034330 63 64 62 41 43 45 SIXBIT /STRACE/ ; single step the port while tracing
3020 034331 63 60 62 51 56 64 SIXBIT /SPRINT/ ; print single step history
3021 034332 63 43 54 45 41 62 SIXBIT /SCLEAR/ ; clear single step history data
3022 034333 63 63 51 56 51 64 SIXBIT /SSINIT/ ; set up ss start addr/data/history
3023
3024 ; EBUF commands
3025
3026 034334 45 45 42 65 46 00 SIXBIT /EEBUF/ ; examine EBUF register
3027 034335 44 45 42 65 46 00 SIXBIT /DEBUF/ ; deposit EBUF register
3028 034336 72 45 42 65 46 00 SIXBIT /ZEBUF/ ; zero EBUF register
3029
3030 ; RAR/LAR commands
3031
3032 034337 45 54 41 62 00 00 SIXBIT /ELAR/ ; examine LAR register
3033 034340 44 62 41 62 00 00 SIXBIT /DRAR/ ; deposit RAR register
3034 034341 72 62 41 62 00 00 SIXBIT /ZRAR/ ; zero RAR register
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 70
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0257
3035
3036 ; CRAM commands
3037
3038 034342 44 43 62 41 55 00 SIXBIT /DCRAM/ ; deposit into port CRAM
3039 034343 42 43 62 41 55 00 SIXBIT /BCRAM/ ; deposit into port CRAM by bit field
3040 034344 41 43 62 41 55 00 SIXBIT /ACRAM/ ; alter port CRAM
3041 034345 45 43 62 41 55 00 SIXBIT /ECRAM/ ; examine port CRAM
3042 034346 54 43 62 41 55 00 SIXBIT /LCRAM/ ; list port CRAM
3043 034347 72 43 62 41 55 00 SIXBIT /ZCRAM/ ; zero port CRAM
3044
3045 ; 2901 command
3046
3047 034350 45 22 31 20 21 00 SIXBIT /E2901/ ; examine 2901 registers
3048 034351 44 22 31 20 21 00 SIXBIT /D2901/ ; deposit 2901 registers
3049 034352 72 22 31 20 21 00 SIXBIT /Z2901/ ; zero 2901 registers
3050
3051 ; Local storage commmands
3052
3053 034353 45 54 57 43 63 00 SIXBIT /ELOCS/ ; examine local storage
3054 034354 44 54 57 43 63 00 SIXBIT /DLOCS/ ; deposit local storage
3055 034355 72 54 57 43 63 00 SIXBIT /ZLOCS/ ; zero local storage
3056
3057 ; Scope looping commands
3058
3059 034356 54 43 57 56 51 00 SIXBIT /LCONI/ ; loop on CONI
3060 034357 54 43 57 56 57 00 SIXBIT /LCONO/ ; loop on CONO
3061 034360 54 44 41 64 41 51 SIXBIT /LDATAI/ ; loop on DATAI
3062 034361 54 44 41 64 41 57 SIXBIT /LDATAO/ ; loop on DATAO
3063 034362 54 62 57 65 64 56 SIXBIT /LROUTN/ ; loop on routine
3064
3065 ; Mark bit commands
3066
3067 034363 55 41 62 53 00 00 SIXBIT /MARK/ ; set mark bit in locations
3068 034364 62 55 41 62 53 00 SIXBIT /RMARK/ ; remove mark bit in locations
3069 034365 43 55 41 62 53 00 SIXBIT /CMARK/ ; clear mark bit in locations
3070 034366 54 55 41 62 53 00 SIXBIT /LMARK/ ; list locations with mark bit set
3071
3072 ; Breakpoint commands
3073
3074 034367 42 62 45 41 53 00 SIXBIT /BREAK/ ; set breakpoint
3075 034370 62 42 62 45 41 53 SIXBIT /RBREAK/ ; remove breakpoint
3076 034371 43 42 62 45 41 53 SIXBIT /CBREAK/ ; clear all breakpoints
3077 034372 54 42 62 45 41 53 SIXBIT /LBREAK/ ; list breakpoints
3078
3079 ; Microcode file commands
3080
3081 034373 54 57 41 44 00 00 SIXBIT /LOAD/ ; load microcode from test into CRAM
3082 034374 54 51 63 64 00 00 SIXBIT /LIST/ ; list microcode from test
3083 034375 46 54 57 41 44 00 SIXBIT /FLOAD/ ; load microcode from file into CRAM
3084 034376 46 66 45 62 46 71 SIXBIT /FVERFY/ ; verify microcode loaded
3085 034377 46 54 51 63 64 00 SIXBIT /FLIST/ ; list microcode in file
3086 034400 46 45 70 41 55 00 SIXBIT /FEXAM/ ; examine microcode in file
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 71
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0258
3087
3088 ; Miscellaneous commands
3089
3090 034401 64 62 41 56 63 54 SIXBIT /TRANSL/ ; translate CSR bits
3091 034402 43 43 57 44 45 00 SIXBIT /CCODE/ ; print condition codes
3092 034403 45 63 64 41 43 53 SIXBIT /ESTACK/ ; examine 2910 stack contents
3093 034404 46 51 54 54 56 70 SIXBIT /FILLNX/ ; fill CRAM with special data
3094 034405 46 51 54 54 60 43 SIXBIT /FILLPC/ ; fill CRAM with special data
3095 034406 51 60 62 51 56 64 SIXBIT /IPRINT/ ; print interrupt history
3096 034407 51 43 54 45 41 62 SIXBIT /ICLEAR/ ; clear interrupt history
3097 034410 51 51 56 51 64 00 SIXBIT /IINIT/ ; initialize interrupt system
3098
3099 ; Data transfer routines
3100
3101 034411 62 44 51 56 51 64 SIXBIT /RDINIT/ ; initialize e/g for a read
3102 034412 67 62 51 56 51 64 SIXBIT /WRINIT/ ; initialize e/g for a write
3103 034413 42 60 62 51 56 64 SIXBIT /BPRINT/ ; print buffer contents
3104 034414 43 43 67 60 56 64 SIXBIT /CCWPNT/ ; print CCW list
3105 034415 54 57 47 60 56 64 SIXBIT /LOGPNT/ ; print logout data
3106 034416 43 57 55 60 41 62 SIXBIT /COMPAR/ ; compare data buffer
3107
3108 ; Switches
3109
3110 034417 63 67 51 64 43 50 SIXBIT /SWITCH/ ; input switches
3111 034420 63 67 60 62 51 56 SIXBIT /SWPRIN/ ; print switch selections
3112 034421 56 57 60 56 64 00 SIXBIT /NOPNT/ ; don't print anything
3113 034422 60 56 64 54 60 64 SIXBIT /PNTLPT/ ; print on printer
3114 034423 44 51 56 47 00 00 SIXBIT /DING/ ; ding on error
3115 034424 54 57 57 60 45 62 SIXBIT /LOOPER/ ; loop on error
3116 034425 45 62 63 64 57 60 SIXBIT /ERSTOP/ ; halt on error
3117 034426 60 41 54 45 62 63 SIXBIT /PALERS/ ; print all errors
3118 034427 62 45 54 51 41 42 SIXBIT /RELIAB/ ; reliability testing
3119 034430 64 70 64 51 56 50 SIXBIT /TXTINH/ ; shorten printing
3120 034431 57 60 62 63 45 54 SIXBIT /OPRSEL/ ; operator select
3121 034432 64 62 41 43 45 00 SIXBIT /TRACE/ ; trace pgm flow
3122 034433 51 56 50 46 54 64 SIXBIT /INHFLT/ ; inhibit fault isolation
3123 034434 51 56 50 55 63 47 SIXBIT /INHMSG/ ; inhibit error messages
3124 034435 54 57 57 60 47 55 SIXBIT /LOOPGM/ ; loop on program
3125 034436 54 57 57 60 64 63 SIXBIT /LOOPTS/ ; loop on test
3126 034437 62 65 56 41 54 54 SIXBIT /RUNALL/ ; run all test segments
3127 034440 44 63 60 45 41 62 SIXBIT /DSPEAR/ ; disable SPEAR reporting
3128 034441 65 44 45 42 65 47 SIXBIT /UDEBUG/ ; no-port user mode debug switch
3129 034442 55 44 45 42 65 47 SIXBIT /MDEBUG/ ; error message debug switch
3130 034443 63 44 45 42 65 47 SIXBIT /SDEBUG/ ; single step debug switch
3131 034444 54 44 45 42 65 47 SIXBIT /LDEBUG/ ; ucode load debug switch
3132 034445 51 44 45 42 65 47 SIXBIT /IDEBUG/ ; fault isolation debug switch
3133 034446 56 51 60 57 62 64 SIXBIT /NIPORT/ ; NI port selected
3134 034447 43 51 60 57 62 64 SIXBIT /CIPORT/ ; CI port selected
3135 034450 55 55 60 62 57 43 SIXBIT /MMPROC/ ; missing Mproc module
3136 034451 55 43 42 65 63 00 SIXBIT /MCBUS/ ; missing Cbus module
3137 034452 000 00 0 00 000000 Z ; list terminator
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 72
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0259
3138
3139 ;#********************************************************************
3140 ;* .DBDIS - List of dispatch addresses
3141 ;#********************************************************************
3142
3143 034453 000000 051527 .DBDIS: [RTN] ; ignore
3144 034454 000000 034622 DHELP ; HELP - print help message
3145 [MOVE 1,[FMSGCD (EXIT <CR>)] ; EXIT - exit DEBUG mode
3146 GO CHKARG
3147 RTN
3148 GET XXX#
3149 034455 000000 055266 RTN]
3150 034456 000000 032120 TSTDDT ; DDT - enter DDT
3151
3152 034457 000000 034710 DSET ; SET - set/clear/print options
3153 034460 000000 032532 TSTTAK ; TAKE - take commands from file
3154 034461 000000 032530 TSTTAN ; NTAKE - take commands from a file
3155 034462 000000 040762 DENEXT ; ENEXT - examine next location
3156 034463 000000 041037 DDNEXT ; DNEXT - deposit next location
3157 [GO CONFIG ; CONFIG - determine configuration
3158 GO TSTSEL
3159 SETZM MBCN
3160 AOS (P)
3161 034464 000000 055273 RTN]
3162 [MOVE 1,[FMSGCD (CONPNT <CR>)]; CONPNT - print configuration
3163 GO CHKARG
3164 RTN
3165 GO CONPNT
3166 034465 000000 052031 RTN]
3167 [GO TSTSEL ; SELECT - select device to test
3168 SETZM MBCN
3169 AOS (P)
3170 034466 000000 055274 RTN]
3171 034467 000000 035276 DECSR ; ECSR - examine CSR register
3172 034470 000000 035306 DDCSR ; DCSR - deposit CSR register
3173 034471 000000 035315 DZCSR ; ZCSR - zero CSR register
3174
3175 034472 000000 035413 DRESET ; RESET - issue an EBUS Reset
3176 034473 000000 035420 DCLEAR ; CLEAR - issue a 'Port Clear'
3177
3178 034474 000000 035440 DSTART ; START - start the port
3179 034475 000000 035465 DSTOP ; STOP - stop the port
3180 034476 000000 037056 DCONT ; CONT - continue the port
3181 034477 000000 035510 DSSTEP ; SSTEP - single step the port
3182 034500 000000 035505 DTRACE ; STRACE - sstep the port while tracing
3183 034501 000000 035557 DSSPNT ; SPRINT - print single step history
3184 034502 000000 035601 DSSCLR ; SCLEAR - clear single step history
3185 034503 000000 035425 DSINIT ; SSINIT - set up ss addr/data/history
3186
3187 034504 000000 037073 DEEBUF ; EEBUF - examine EBUF register
3188 034505 000000 037114 DDEBUF ; DEBUF - deposit EBUF register
3189 034506 000000 037107 DZEBUF ; ZEBUF - zero EBUF register
3190
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 73
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0260
3191 034507 000000 037126 DELAR ; ELAR - examine LAR register
3192 034510 000000 037146 DDRAR ; DRAR - deposit RAR register
3193 034511 000000 037160 DZRAR ; ZRAR - zero RAR register
3194
3195 034512 000000 037173 DDCRAM ; DCRAM - deposit CRAM
3196 034513 000000 037176 DBCRAM ; BCRAM - deposit CRAM by bit field
3197 034514 000000 037201 DACRAM ; ACRAM - alter port CRAM
3198 034515 000000 037170 DECRAM ; ECRAM - examine port CRAM
3199 034516 000000 037207 DLCRAM ; LCRAM - list port CRAM
3200 034517 000000 037204 DZCRAM ; ZCRAM - zero port CRAM
3201
3202 034520 000000 037756 DEALU ; E2901 - examine 2901 registers
3203 034521 000000 040064 DDALU ; D2901 - deposit 2901 registers
3204 034522 000000 040145 DZALU ; Z2901 - zero 2901 registers
3205
3206 034523 000000 040262 DELOCS ; ELOCS - examine local storage
3207 034524 000000 040365 DDLOCS ; DLOCS - deposit local storage
3208 034525 000000 040441 DZLOCS ; ZLOCS - zero local storage
3209
3210 034526 000000 035323 DCONI ; LCONI - loop on CONI
3211 034527 000000 035333 DCONO ; LCONO - loop on CONO
3212 034530 000000 035344 DDATI ; LDATAI - loop on DATAI
3213 034531 000000 035353 DDATO ; LDATAO - loop on DATAO
3214 034532 000000 035364 DROUTN ; LROUTN - loop on routine
3215
3216 034533 000000 040555 DMARK ; MARK - set mark bits
3217 034534 000000 040604 DRMARK ; RMARK - remove mark bits
3218 034535 000000 040633 DCMARK ; CMARK - clear mark bits
3219 034536 000000 040704 DLMARK ; LMARK - list mark bits
3220
3221 034537 000000 041141 DBREAK ; BREAK - set breakpoint
3222 034540 000000 041174 DRBRK ; RBREAK - remove breakpoint
3223 034541 000000 041217 DCBRK ; CBREAK - clear all breakpoints
3224 034542 000000 041263 DLBRK ; LBREAK - list breakpoints
3225
3226 034543 000000 041344 DLOAD ; LOAD - load test microcode in CRAM
3227 034544 000000 041367 DLIST ; LIST - list test microcode
3228 034545 000000 041404 DFLOAD ; FLOAD - load ucode from file to CRAM
3229 034546 000000 041442 DFVERF ; FVERFY - verify microcode loaded
3230 034547 000000 041534 DFLIST ; FLIST - list microcode in file
3231 034550 000000 041563 DFEXAM ; FEXAM - examine microcode in file
3232
3233 034551 000000 041611 DTRANS ; TRANSL - translate CSR bits
3234 034552 000000 041621 DCCODE ; CCODE - print condition codes
3235 034553 000000 041101 DESTAK ; ESTACK - examine 2910 stack
3236 034554 000000 041750 DFILLN ; FILLNX - fill CRAM with special data
3237 034555 000000 041773 DFILLP ; FILLPC - fill CRAM with special data
3238 034556 000000 042142 DIPRIN ; IPRINT - print interrupt history
3239 [MOVE 1,[FMSGCD (ICLEAR <CR>)]; ICLEAR - clear interrupt history
3240 GO CHKARG
3241 RTN
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 74
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0261
3242 3243 SETZM INTNUM
3244 MOVE [INTNUM,,INTNUM+1]
3245 BLT INTEND
3246 SETOM INTNUM
3247 034557 000000 055306 RTN]
3248 034560 000000 042216 DIINIT ; IINIT - initialize interrupt system
3249
3250 034561 000000 042014 DRDINI ; RDINIT - initialize for a read
3251 034562 000000 042037 DWRINI ; WRINIT - initialize for a write
3252 034563 000000 042044 DBPNT ; BPRINT - print buffer data
3253 034564 000000 042077 DCWPNT ; CCWPNT - print CCW list
3254 034565 000000 042105 DLGPNT ; LOGPNT - print logout data
3255 034566 000000 042115 DCOMPA ; COMPAR - compare data buffer
3256
3257 [MOVE 1,[FMSGCD (SWITCH <CR>)]; SWITCH - input switches
3258 GO CHKARG
3259 RTN
3260 GO .ISWT
3261 034567 000000 055316 RTN]
3262 [MOVE 1,[FMSGCD (SWPRIN <CR>)]; SWPRIN - print switches
3263 GO CHKARG
3264 RTN
3265 GO .SWCHP
3266 034570 000000 055323 RTN]
3267
3268 000116 SWSTP==.-.DBDIS
3269
3270 034571 000000 042131 DSWIT ; NOPNT
3271 034572 000000 042131 DSWIT ; PNTLPT
3272 034573 000000 042131 DSWIT ; DING
3273 034574 000000 042131 DSWIT ; LOOPER
3274 034575 000000 042131 DSWIT ; ERSTOP
3275 034576 000000 042131 DSWIT ; PALERS
3276 034577 000000 042131 DSWIT ; RELIAB
3277 034600 000000 042131 DSWIT ; TXTINH
3278 034601 000000 042131 DSWIT ; OPRSEL
3279 034602 000000 042131 DSWIT ; TRACE
3280 034603 000000 042131 DSWIT ; INHFLT
3281 034604 000000 042131 DSWIT ; INHMSG
3282 034605 000000 042131 DSWIT ; LOOPGM
3283 034606 000000 042131 DSWIT ; LOOPTS
3284 034607 000000 042131 DSWIT ; RUNALL
3285 034610 000000 042131 DSWIT ; DSPEAR
3286 034611 000000 042131 DSWIT ; UDEBUG
3287 034612 000000 042131 DSWIT ; MDEBUG
3288 034613 000000 042131 DSWIT ; SDEBUG
3289 034614 000000 042131 DSWIT ; LDEBUG
3290 034615 000000 042131 DSWIT ; IDEBUG
3291 034616 000000 042131 DSWIT ; NIPORT
3292 034617 000000 042131 DSWIT ; CIPORT
3293 034620 000000 042131 DSWIT ; MMPROC
3294 034621 000000 042131 DSWIT ; MCBUS
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 75
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0262
3295
3296 ;#*********************************************************************
3297 ;* DHELP - Print DEBUG> help message
3298 ;#*********************************************************************
3299
3300 DHELP: MOVN 1,[FMSGD <
3301 HELP ALL RESET LAR SCOPE DTXFR
3302 MISC START CRAM MARK SWITCH
3303 INTRPT CSR 2901 BREAK
3304 034622 210 01 0 00 055366 CONFIG EBUF LOCS UCODE>]
3305 034623 260 17 0 00 032542* GO .SARG ; get SIXBIT argument
3306 034624 263 17 0 00 000000 RTN ; error/altmode/question - exit
3307 GO [MOVE [SIXBIT /ALL/] ; no argument - assume all
3308 MOVEM ARGUM
3309 034625 260 17 0 00 053765 RTN]
3310 034626 200 01 0 00 032677* MOVE 1,ARGUM ; get sixbit command
3311 034627 201 02 0 00 034642 MOVEI 2,.HLCMD ; get address of cmd list
3312 034630 260 17 0 00 034270* GO .COMM ; handle command decoding
3313 JRST [FMSGCD <? Unrecognizable - Type ? for help>
3314 GO FIOFF
3315 034631 254 00 0 00 053632 RTN] ; error return
3316 034632 037 01 0 00 000026 PFORCE ; handle Control-O
3317 034633 200 02 0 00 000001 MOVE 2,1 ; get AC1
3318 034634 336 03 0 01 034665 DHELP0: SKIPN 3,DHELP1(1) ; get address of TMSG
3319 034635 263 17 0 00 000000 RTN ; all done - exit
3320 034636 256 00 0 00 000003 XCT 3 ; print it
3321 034637 350 00 0 00 000001 AOS 1 ; point to next address
3322 034640 322 02 0 00 034634 JUMPE 2,DHELP0 ; loop till done
3323 034641 263 17 0 00 000000 RTN ; exit
3324
3325 034642 41 54 54 00 00 00 .HLCMD: SIXBIT /ALL/ ; print all help info
3326 034643 55 51 63 43 00 00 SIXBIT /MISC/ ; print miscellaneous commands
3327 034644 51 56 64 62 60 64 SIXBIT /INTRPT/ ; print interrupt commands
3328 034645 43 57 56 46 51 47 SIXBIT /CONFIG/ ; print configuration commands
3329 034646 62 45 63 45 64 00 SIXBIT /RESET/ ; print reset commands
3330 034647 63 64 41 62 64 00 SIXBIT /START/ ; print start... commands
3331 034650 43 63 62 00 00 00 SIXBIT /CSR/ ; print CSR commands
3332 034651 45 42 65 46 00 00 SIXBIT /EBUF/ ; print EBUF commands
3333 034652 54 41 62 00 00 00 SIXBIT /LAR/ ; print LAR commands
3334 034653 43 62 41 55 00 00 SIXBIT /CRAM/ ; print CRAM commands
3335 034654 22 31 20 21 00 00 SIXBIT /2901/ ; print 2901 commands
3336 034655 54 57 43 63 00 00 SIXBIT /LOCS/ ; print local storage commands
3337 034656 63 43 57 60 45 00 SIXBIT /SCOPE/ ; print scope looping commands
3338 034657 55 41 62 53 00 00 SIXBIT /MARK/ ; print mark commands
3339 034660 42 62 45 41 53 00 SIXBIT /BREAK/ ; print breakpoint commands
3340 034661 65 43 57 44 45 00 SIXBIT /UCODE/ ; print microcode commands
3341 034662 44 64 70 46 62 00 SIXBIT /DTXFR/ ; print data transfer commands
3342 034663 63 67 51 64 43 50 SIXBIT /SWITCH/ ; print switch commands
3343 034664 000000 000000 0 ; end of list
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 76
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0263
3344
3345 034665 037 00 0 00 055367 DHELP1: TMSGCD <DEBUG Commands:>
3346
3347 TMSGD <
3348 HELP arg Print help
3349 EXIT Exit DEBUG mode
3350 DDT Enter DDT
3351 SET opt arg Set/clear/print options
3352 TAKE file ext Take commands from file
3353 NTAKE file ext Take commands from file (unechoed)
3354 TRANSL dat Translate CSR data
3355 CCODE Print condition codes
3356 ESTACK Examine 2910 stack contents
3357 FILLNX dat Fill CRAM with 'J=.+1,CTL=dat'
3358 FILLPC dat Fill CRAM with 'J=.,CTL=dat'
3359 ENEXT Examine next
3360 034666 037 00 0 00 055373 DNEXT arg Deposit next>
3361
3362 TMSGD <
3363 IPRINT Print accumulated interrupt activity
3364 ICLEAR Clear accumulated interrupt activity
3365 034667 037 00 0 00 055527 IINIT Init interrupt system>
3366
3367 TMSGD <
3368 CONFIG Determine/print configuration
3369 CONPNT Print configuration
3370 034670 037 00 0 00 055563 SELECT Select device to test>
3371
3372 TMSGD <
3373 RESET Issue EBUS Reset
3374 034671 037 00 0 00 055612 CLEAR Issue a 'Port Clear'>
3375
3376 TMSGD <
3377 START adr Start the port microsequencer
3378 STOP Stop the port microsequencer
3379 CONT Continue the port microsequencer
3380 SSTEP cnt Single step the port microsequencer
3381 STRACE cnt Single step and trace execution
3382 SPRINT cnt Print single step history data
3383 SCLEAR Clear single step history data
3384 034672 037 00 0 00 055630 SSINIT Set up ss addr/data/history>
3385
3386 TMSGD <
3387 ECSR Examine CSR Register
3388 DCSR dat Deposit CSR Register
3389 034673 037 00 0 00 055740 ZCSR Zero CSR Register>
3390
3391 TMSGD <
3392 EEBUF Examine EBUF register
3393 DEBUF dat Deposit EBUF register
3394 034674 037 00 0 00 055765 ZEBUF Zero EBUF register>
3395
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 77
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0264
3396 TMSGD <
3397 ELAR Examine LAR register
3398 DRAR dat Deposit RAR register
3399 034675 037 00 0 00 056012 ZRAR Zero RAR register>
3400
3401 TMSGD <
3402 DCRAM adr,adr Deposit into CRAM
3403 BCRAM adr,adr Deposit into CRAM by fields
3404 ACRAM adr,adr Alter CRAM
3405 ECRAM adr,adr Examine CRAM
3406 LCRAM adr,adr List CRAM
3407 034676 037 00 0 00 056037 ZCRAM adr,adr Zero CRAM>
3408
3409 TMSGD <
3410 E2901 reg,reg Examine 2901 registers
3411 D2901 reg,dat Deposit 2901 register
3412 034677 037 00 0 00 056105 Z2901 reg,reg Zero 2901 registers>
3413
3414 TMSGD <
3415 ELOCS adr,adr Examine local storage
3416 DLOCS adr,dat Deposit local storage
3417 034700 037 00 0 00 056135 ZLOCS adr,adr Zero local storage>
3418
3419 TMSGD <
3420 LCONI Loop on CONI
3421 LCONO dat Loop on CONO
3422 LDATAI Loop on DATAI
3423 LDATAO dat Loop on DATAO
3424 034701 037 00 0 00 056164 LROUTN dat Loop on user supplied routine at DROUTN:>
3425
3426 TMSGD <
3427 MARK adr,adr Set mark bit
3428 RMARK adr,adr Remove mark bit
3429 CMARK adr,adr Clear all mark bits
3430 034702 037 00 0 00 056225 LMARK adr,adr List mark bits>
3431
3432 TMSGD <
3433 BREAK adr,adr Set breakpoint
3434 RBREAK adr,adr Remove breakpoint
3435 CBREAK adr,adr Clear all breakpoints
3436 034703 037 00 0 00 056260 LBREAK adr,adr List breakpoints>
3437
3438 TMSGD <
3439 LOAD tst Load microcode from Test 'tst' into CRAM
3440 LIST tst List microcode from Test 'tst'
3441 FLOAD Load microcode from file into CRAM
3442 FVERFY Verify microcode loaded from file
3443 FLIST List microcode in file
3444 034704 037 00 0 00 056314 FEXAM Examine microcode in file>
3445
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 78
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0265
3446 TMSGD <
3447 RDINIT Initialize e/g for a read
3448 WRINIT Initialize e/g for a write
3449 BPRINT n Print buffer contents (n locations)
3450 CCWPNT Print CCW list
3451 LOGPNT Print logout data
3452 034705 037 00 0 00 056403 COMPAR Compare data buffer>
3453
3454 TMSGD <
3455 SWITCH Enter switch information
3456 SWPRIN Print current switch settings
3457
3458 (To complement switch setting, type switch name).
3459
3460 NOPNT LOOPER RELIAB TRACE LOOPGM DSPEAR SDEBUG NIPORT MMPROC
3461 PNTLPT ERSTOP TXTINH INHFLT LOOPTS UDEBUG LDEBUG CIPORT MCBUS
3462 034706 037 00 0 00 056456 DING PALERS OPRSEL INHMSG RUNALL MDEBUG IDEBUG>
3463 034707 000000 000000 0
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 79
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0266
3464
3465 ;#********************************************************************
3466 ;* DSET - Set/clear/print options
3467 ;#********************************************************************
3468
3469 DSET: MOVE 1,[FMSGD <
3470 SET ADDR EBUF PATLIS WHAT
3471 CSR LENGTH FNAME HELP
3472 034710 200 01 0 00 056603 PARITY PAT>]
3473 034711 260 17 0 00 034623* GO .SARG ; get SIXBIT argument
3474 034712 263 17 0 00 000000 RTN ; error/altmode/question - exit
3475 JRST [FMSGCD <? Missing argument>
3476 GO FIOFF
3477 034713 254 00 0 00 054406 RTN]
3478 034714 200 01 0 00 034626* MOVE 1,ARGUM ; get sixbit command
3479 034715 201 02 0 00 034722 MOVEI 2,.STCMD ; get address of cmd list
3480 034716 260 17 0 00 034630* GO .COMM ; handle command decoding
3481 JRST [FMSGCD <? Unrecognizable - Type ? for help>
3482 GO FIOFF
3483 034717 254 00 0 00 053632 RTN] ; error return
3484 034720 260 17 1 01 034736 GO @.STDIS(1) ; dispatch to test
3485 034721 263 17 0 00 000000 RTN ; return to 'DEBUG>' prompt
3486
3487 034722 41 44 44 62 00 00 .STCMD: SIXBIT /ADDR/ ; set start address
3488 034723 43 63 62 00 00 00 SIXBIT /CSR/ ; set start data for CSR
3489 034724 60 41 62 51 64 71 SIXBIT /PARITY/ ; set/clr auto parity generation
3490 034725 45 42 65 46 00 00 SIXBIT /EBUF/ ; set/clr preserve EBUF
3491 034726 54 45 56 47 64 50 SIXBIT /LENGTH/ ; set length of data transfer
3492 034727 60 41 64 00 00 00 SIXBIT /PAT/ ; set data pattern
3493 034730 46 56 41 55 45 00 SIXBIT /FNAME/ ; set file name
3494 034731 60 41 64 54 51 63 SIXBIT /PATLIS/ ; list data patterns
3495 034732 67 50 41 64 00 00 SIXBIT /WHAT/ ; print options
3496 034733 50 45 54 60 00 00 SIXBIT /HELP/ ; set help message
3497 034734 46 41 65 54 64 00 SIXBIT /FAULT/ ; set failing test
3498 034735 000 00 0 00 000000 Z
3499
3500 034736 000000 034751 .STDIS: DSETAD ; ADDR - set start address
3501 034737 000000 034772 DSETCS ; CSR - set start CSR data
3502 034740 000000 035007 DSETPR ; PARITY - set/clr auto par generation
3503 034741 000000 035027 DSETEB ; EBUF - set/clr preserve EBUF flag
3504 034742 000000 035047 DSETLN ; LENGTH - set buffer length
3505 034743 000000 035067 DSETDA ; PAT - set data pattern
3506 034744 000000 035127 DSETFN ; FNAME - set default ucode file name
3507 034745 000000 035223 DSETPL ; PATLIS - list data patterns
3508 034746 000000 035157 DSETWH ; WHAT - print options
3509 034747 000000 035260 DSETHE ; HELP - set help message
3510 034750 000000 035173 DSETFA ; FAULT - set failing test
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 80
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0267
3511
3512 ;#********************************************************************
3513 ;* DSETAD - Set start address for START/SSTEP/CONT commands
3514 ;#********************************************************************
3515
3516 034751 210 01 0 00 056616 DSETAD: MOVN 1,[FMSGCD (SET ADDR addr (0-7777) <CR> or SET ADDR <CR>)]
3517 034752 260 17 0 00 000000* GO .OARG ; get argument
3518 034753 263 17 0 00 000000 RTN ; error/altmode/question - exit
3519 034754 254 00 0 00 034764 JRST DSETA1 ; no argument given
3520 034755 200 00 0 00 034714* MOVE ARGUM ; get argument
3521 034756 202 00 0 00 035267 MOVEM DSADDR ; save it
3522 034757 301 00 0 00 000000 CAIL 0 ; out of range?
3523 034760 303 00 0 00 007777 CAILE 7777
3524 JRST [FMSGCD <? Range of CRAM locations is 0000-7777>
3525 GO FIOFF
3526 034761 254 00 0 00 056630 RTN]
3527 034762 202 00 0 00 035267 MOVEM DSADDR ; no - save it
3528 034763 263 17 0 00 000000 RTN ; exit
3529
3530 034764 037 00 0 00 030242 DSETA1: PCRL
3531 034765 037 00 0 00 056633 DSETA2: TMSG <Start address ............. >
3532 034766 200 00 0 00 035267 MOVE DSADDR
3533 034767 037 16 0 00 000003 PNTOCS
3534 034770 037 00 0 00 030242 PCRL
3535 034771 263 17 0 00 000000 RTN ; exit
3536
3537
3538 ;#********************************************************************
3539 ;* DSETCS - Set start CSR data for START/CONT commands
3540 ;#********************************************************************
3541
3542 034772 210 01 0 00 056651 DSETCS: MOVN 1,[FMSGCD (SET CSR xxxxxx <CR> or SET CSR <CR>)]
3543 034773 260 17 0 00 034752* GO .OARG ; get argument
3544 034774 263 17 0 00 000000 RTN ; error/altmode/question - exit
3545 034775 254 00 0 00 035001 JRST DSETC1 ; no argument given
3546 034776 200 00 0 00 034755* MOVE ARGUM ; get argument
3547 034777 202 00 0 00 035270 MOVEM DSDATA ; save it
3548 035000 263 17 0 00 000000 RTN ; exit
3549
3550 035001 037 00 0 00 030242 DSETC1: PCRL
3551 035002 037 00 0 00 056652 DSETC2: TMSG <Start CSR data ............ >
3552 035003 200 00 0 00 035270 MOVE DSDATA
3553 035004 037 16 0 00 000003 PNTOCS
3554 035005 037 00 0 00 030242 PCRL
3555 035006 263 17 0 00 000000 RTN ; exit
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 81
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0268
3556
3557 ;#********************************************************************
3558 ;* DSETPR - Set/clear automatic parity generation for load cram command
3559 ;#********************************************************************
3560
3561 035007 210 01 0 00 056670 DSETPR: MOVN 1,[FMSGCD (SET PAR NO or YES or SET PAR <CR>)]
3562 035010 260 17 0 00 034711* GO .SARG ; get argument
3563 035011 263 17 0 00 000000 RTN ; error/altmode/question - exit
3564 035012 254 00 0 00 035020 JRST DSETP1 ; no argument given
3565 035013 260 17 0 00 000000* GO DECYN ; decode argument Y or N
3566 035014 263 17 0 00 000000 RTN ; error - unrecognized
3567 JRST [SETZM PARFLG ; no - clear the flag
3568 035015 254 00 0 00 056671 RTN]
3569 035016 476 00 0 00 035271 SETOM PARFLG ; yes - set it
3570 035017 263 17 0 00 000000 RTN ; exit
3571
3572 035020 037 00 0 00 030242 DSETP1: PCRL
3573 035021 037 00 0 00 056673 DSETP2: TMSG <Auto parity generation .... >
3574 035022 332 00 0 00 035271 SKIPE PARFLG ; set?
3575 035023 037 00 0 00 056701 TMSGD <YES>
3576 035024 336 00 0 00 035271 SKIPN PARFLG ; set?
3577 035025 037 00 0 00 056703 TMSGD <NO>
3578 035026 263 17 0 00 000000 RTN ; return
3579
3580
3581 ;#********************************************************************
3582 ;* DSETEB - Set/clear preserve EBUF for single stepping
3583 ;#********************************************************************
3584
3585 035027 210 01 0 00 056714 DSETEB: MOVN 1,[FMSGCD (SET EBUF NO or YES or SET EBUF <CR>)]
3586 035030 260 17 0 00 035010* GO .SARG ; get argument
3587 035031 263 17 0 00 000000 RTN ; error/altmode/question - exit
3588 035032 254 00 0 00 035040 JRST DSETE1 ; no argument given
3589 035033 260 17 0 00 035013* GO DECYN ; decode argument Y or N
3590 035034 263 17 0 00 000000 RTN ; error - unrecognized
3591 JRST [SETZM PRSFLG ; no - clear the flag
3592 035035 254 00 0 00 056715 RTN]
3593 035036 476 00 0 00 035272 SETOM PRSFLG ; yes - set it
3594 035037 263 17 0 00 000000 RTN ; exit
3595
3596 035040 037 00 0 00 030242 DSETE1: PCRL
3597 035041 037 00 0 00 056717 DSETE2: TMSG <EBUF preserved in sstep ... >
3598 035042 332 00 0 00 035272 SKIPE PRSFLG ; set?
3599 035043 037 00 0 00 056701 TMSGD <YES>
3600 035044 336 00 0 00 035272 SKIPN PRSFLG ; set?
3601 035045 037 00 0 00 056703 TMSGD <NO>
3602 035046 263 17 0 00 000000 RTN ; return
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 82
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0269
3603
3604 ;#********************************************************************
3605 ;* DSETLN - Set length of data transfer
3606 ;#********************************************************************
3607
3608 035047 210 01 0 00 056737 DSETLN: MOVN 1,[FMSGCD (SET LEN length (1-102400.) or SET LEN <CR>)]
3609 035050 260 17 0 00 032674* GO .DARG ; get argument
3610 035051 263 17 0 00 000000 RTN ; error/altmode/question - exit
3611 035052 254 00 0 00 035061 JRST DSETL1 ; no argument given
3612 035053 200 00 0 00 034776* MOVE ARGUM ; get argument
3613 035054 303 00 0 00 000000 CAILE 0 ; argument in range 1-102400?
3614 035055 303 00 0 00 310000 CAILE ^D102400
3615 JRST [FMSGCD <? Out of range 1-102400. words>
3616 GO FIOFF
3617 035056 254 00 0 00 056747 RTN]
3618 035057 202 00 0 00 035273 MOVEM DSWORD ; save it
3619 035060 263 17 0 00 000000 RTN ; exit
3620
3621 035061 037 00 0 00 030242 DSETL1: PCRL
3622 035062 037 00 0 00 056752 DSETL2: TMSG <Buffer length (words) ..... >
3623 035063 200 00 0 00 035273 MOVE DSWORD
3624 035064 037 15 0 00 000000 PNTDEC
3625 035065 037 00 0 00 054465 TMSGD <.>
3626 035066 263 17 0 00 000000 RTN ; exit
3627
3628
3629 ;#********************************************************************
3630 ;* DSETDA - Set data pattern to insert in buffer
3631 ;#********************************************************************
3632
3633 035067 200 01 0 00 056775 DSETDA: MOVE 1,[FMSGCD (SET PAT number (1-126 octal)(126=opr sel) or SET PAT <CR>)]
3634 035070 260 17 0 00 034773* GO .OARG ; get argument
3635 035071 263 17 0 00 000000 RTN ; error/altmode/question - exit
3636 035072 254 00 0 00 035114 JRST DSETD1 ; no argument given
3637 035073 200 00 0 00 035053* MOVE ARGUM ; get argument
3638 035074 301 00 0 00 000001 CAIL 1 ; in range?
3639 035075 303 00 0 00 000126 CAILE 126
3640 JRST [FMSGCD <? Out of range 1-126 octal>
3641 GO FIOFF
3642 035076 254 00 0 00 057005 RTN]
3643 035077 202 00 0 00 035274 MOVEM DSPAT ; save it
3644 035100 302 00 0 00 000126 CAIE 126 ; operator selected pattern?
3645 035101 254 00 0 00 035110 JRST DSETDX ; no - exit
3646 035102 200 01 0 00 057016 MOVE 1,[FMSGCD <SET PAT 126,data (CR)>]
3647 035103 260 17 0 00 035070* GO .OARG ; get argument
3648 035104 263 17 0 00 000000 RTN ; error/altmode/question - exit
3649 JRST [FMSGCD <? Missing argument>
3650 GO FIOFF
3651 035105 254 00 0 00 054406 RTN]
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 83
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0270
3652 035106 200 00 0 00 035073* MOVE ARGUM ; get argument
3653 035107 202 00 0 00 035275 MOVEM DSTPAT ; save it
3654 035110 260 17 0 00 000000* DSETDX: GO LASARG ; check for last argument
3655 035111 263 17 0 00 000000 RTN ; exit
3656 035112 037 01 0 00 057010 FMSGCD <SET PAT 126,data (CR)>
3657 035113 263 17 0 00 000000 RTN ; exit
3658
3659 035114 037 00 0 00 030242 DSETD1: PCRL
3660 035115 037 00 0 00 057017 DSETD2: TMSG <Data pattern (#) .......... >
3661 035116 200 01 0 00 035274 MOVE 1,DSPAT ; get pattern
3662 035117 256 00 0 01 000000* XCT PATPNT(1) ; ...
3663 035120 302 01 0 00 000126 CAIE 1,126 ; operator selected pattern?
3664 035121 254 00 0 00 035125 JRST DSETD3 ; no - continue
3665 035122 037 00 0 00 053451 TMSG < - > ; yes - print it out
3666 035123 200 00 0 00 035275 MOVE DSTPAT
3667 035124 037 13 0 00 000000 PNTHW
3668 035125 037 00 0 00 030242 DSETD3: PCRL
3669 035126 263 17 0 00 000000 RTN ; exit
3670
3671
3672 ;#********************************************************************
3673 ;* DSETFN - Set default microcode file name
3674 ;#********************************************************************
3675
3676 035127 200 01 0 00 057037 DSETFN: MOVE 1,[FMSGCD (SET FNAME file ext <CR> or SET FNAME <CR>)]
3677 035130 260 17 0 00 035030* GO .SARG ; get argument (file name)
3678 035131 263 17 0 00 000000 RTN ; error/altmode/question - exit
3679 035132 254 00 0 00 035146 JRST DSETF1 ; no argument - print it out
3680 035133 200 00 0 00 035106* MOVE ARGUM ; get argument
3681 035134 202 00 0 00 064403' MOVEM TMP1 ; save it
3682 035135 210 01 0 00 057037 MOVN 1,[FMSGCD (SET FNAME file ext <CR> or SET FNAME <CR>)]
3683 035136 260 17 0 00 035130* GO .SARG ; get argument (extension)
3684 035137 263 17 0 00 000000 RTN ; error/altmode/question - exit
3685 035140 254 00 0 00 035143 JRST DSETF0 ; no extension given - exit
3686 035141 200 00 0 00 035133* MOVE ARGUM ; get 2nd argument
3687 035142 202 00 0 00 000000# MOVEM UNAME+1 ; save it
3688 035143 200 00 0 00 064403' DSETF0: MOVE TMP1 ; get first argument
3689 035144 202 00 0 00 000000* MOVEM UNAME ; save it
3690 035145 263 17 0 00 000000 RTN ; return
3691
3692 035146 037 00 0 00 030242 DSETF1: PCRL
3693 035147 037 00 0 00 057040 DSETF2: TMSG <Microcode file name ....... >
3694 035150 200 00 0 00 035144* MOVE UNAME ; get name
3695 035151 037 00 0 00 000002 PNTSIX ; print it
3696 035152 037 00 0 00 057046 TMSG <.>
3697 035153 200 00 0 00 000000# MOVE UNAME+1 ; get extension
3698 035154 037 00 0 00 000002 PNTSIX ; print it
3699 035155 037 00 0 00 030242 PCRL
3700 035156 263 17 0 00 000000 RTN ; return
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 84
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0271
3701
3702 ;#********************************************************************
3703 ;* DSETWH - Print all selected options
3704 ;#********************************************************************
3705
3706 035157 260 17 0 00 035110* DSETWH: GO LASARG ; check for last argument
3707 035160 263 17 0 00 000000 RTN ; error - exit
3708 JRST [FMSGCD (SET WHAT <CR>) ; ? typed - print msg and
3709 035161 254 00 0 00 057053 RTN] ; return
3710 035162 037 00 0 00 057055 TMSGCD <Options:>
3711 035163 260 17 0 00 034764 GO DSETA1 ; print address
3712 035164 260 17 0 00 035002 GO DSETC2 ; print CSR data
3713 035165 260 17 0 00 035021 GO DSETP2 ; print parity flag
3714 035166 260 17 0 00 035041 GO DSETE2 ; print EBUF flag
3715 035167 260 17 0 00 035062 GO DSETL2 ; print length
3716 035170 260 17 0 00 035115 GO DSETD2 ; print data pattern
3717 035171 260 17 0 00 035147 GO DSETF2 ; print file name selected
3718 035172 263 17 0 00 000000 RTN ; return
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 85
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0272
3719
3720 ;#********************************************************************
3721 ;* DSETFA - Set failing network
3722 ;#********************************************************************
3723
3724 DSETFA: MOVE 1,[FMSGCD (SET FAULT network # <CR> or SET FAULT <CR>
3725 Where 1-30 = E1-E30
3726 31-53 = M1-M23
3727 035173 200 01 0 00 057107 54-103 = C1-C30)]
3728 035174 260 17 0 00 035103* GO .OARG ; get argument (network number)
3729 035175 263 17 0 00 000000 RTN ; error/altmode/question - exit
3730 035176 254 00 0 00 035205 JRST DSETB1 ; no argument - print it out
3731 035177 200 01 0 00 035141* MOVE 1,ARGUM ; get argument
3732 035200 301 01 0 00 000001 CAIL 1,1 ; in range 1-103 octal?
3733 035201 303 01 0 00 000103 CAILE 1,103
3734 JRST [TMSGCD <? Network number out of range 1-103>
3735 GO FIOFF
3736 035202 254 00 0 00 057120 RTN]
3737 035203 202 01 0 00 046326 MOVEM 1,FLTNUM ; save network number
3738 035204 263 17 0 00 000000 RTN ; return
3739
3740 035205 037 00 0 00 057123 DSETB1: TMSGC <Failing network ........... >
3741 035206 200 00 0 00 046326 MOVE FLTNUM ; get network number
3742 035207 037 16 0 00 000003 PNTOCS ; print it
3743 035210 200 01 0 00 046326 MOVE 1,FLTNUM ; get network number
3744 035211 307 01 0 00 000030 CAIG 1,30 ; EBUS network?
3745 PJRST [TMSG < - E> ; yes - print it
3746 MOVE 1
3747 PNTOCS
3748 PCRL
3749 035212 254 00 0 00 057133 RTN]
3750 035213 307 01 0 00 000053 CAIG 1,53 ; MPROC network?
3751 PJRST [TMSG < - M> ; yes - print it
3752 MOVE 1
3753 SUBI 30
3754 PNTOCS
3755 PCRL
3756 035214 254 00 0 00 057141 RTN]
3757 035215 037 00 0 00 057147 TMSG < - C> ; print CBUS network
3758 035216 200 00 0 00 000001 MOVE 1
3759 035217 275 00 0 00 000053 SUBI 53
3760 035220 037 16 0 00 000003 PNTOCS
3761 035221 037 00 0 00 030242 PCRL
3762 035222 263 17 0 00 000000 RTN ; return
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 86
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0273
3763
3764 ;#********************************************************************
3765 ;* DSETPL - List data patterns
3766 ;#********************************************************************
3767
3768 035223 200 01 0 00 057161 DSETPL: MOVE 1,[FMSGCD <SET PATLIS num1,num2 or SET PATLIS (CR)>]
3769 035224 260 17 0 00 035174* GO .OARG ; get argument
3770 035225 263 17 0 00 000000 RTN ; error/altmode/question - exit
3771 JRST [MOVE PAT,DSPAT ; no argument - just print
3772 MOVEM PAT,PAT1# ; current selection
3773 MOVEM PAT,PAT2#
3774 035226 254 00 0 00 057162 JRST DSETPP]
3775 035227 200 00 0 00 035177* MOVE ARGUM ; get argument
3776 035230 202 00 0 00 064361' MOVEM PAT1# ; save it
3777
3778 035231 200 01 0 00 057161 MOVE 1,[FMSGCD <SET PATLIS num1,num2 or SET PATLIS (CR)>]
3779 035232 260 17 0 00 035224* GO .OARG ; get argument
3780 035233 263 17 0 00 000000 RTN ; error/altmode/question - exit
3781 JRST [MOVE PAT,PAT1 ; no 2nd argument - just print
3782 MOVEM PAT,PAT2 ; one translation
3783 035234 254 00 0 00 057166 JRST DSETPP]
3784 035235 200 00 0 00 035227* MOVE ARGUM ; get argument
3785 035236 202 00 0 00 064362' MOVEM PAT2 ; save it
3786 035237 200 01 0 00 064362' MOVE 1,PAT2 ; get argument
3787 035240 274 01 0 00 064361' SUB 1,PAT1 ; see if range ok
3788 JUMPL 1,[FMSGCD <? Range nonsensical>
3789 GO FIOFF
3790 035241 321 01 0 00 057176 RTN]
3791
3792 035242 200 14 0 00 064361' DSETPP: MOVE PAT,PAT1 ; get pattern
3793 035243 301 14 0 00 000001 CAIL PAT,1 ; in range?
3794 035244 303 14 0 00 000126 CAILE PAT,126
3795 JRST [FMSGCD <? Out of range 1-126 octal>
3796 GO FIOFF
3797 035245 254 00 0 00 057005 RTN]
3798 035246 037 00 0 00 030242 PCRL
3799 035247 256 00 0 14 035117* XCT PATPNT(PAT) ; print it
3800 035250 350 00 0 00 000014 AOS PAT ; increment pattern number
3801 035251 037 07 0 00 000003 TTALTM ; altmode typed?
3802 035252 334 00 0 00 000000 SKIPA ; no - continue
3803 035253 254 00 0 00 035256 JRST DSETPX ; yes - return
3804 035254 317 14 0 00 064362' CAMG PAT,PAT2 ; done yet?
3805 035255 254 00 0 00 035243 JRST DSETPP+1 ; no - loop till done
3806 035256 037 00 0 00 030243 DSETPX: PCRL2 ; final CRLF
3807 035257 263 17 0 00 000000 RTN ; exit
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 87
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0274
3808
3809 ;#********************************************************************
3810 ;* DSETHE - Set help message
3811 ;#********************************************************************
3812
3813 035260 200 01 0 00 057205 DSETHE: MOVE 1,[FMSGCD (SET HELP <CR>)]
3814 035261 260 17 0 00 034204* GO CHKARG ; check for argument
3815 035262 263 17 0 00 000000 RTN ; error - exit
3816 035263 037 01 0 00 000026 PFORCE ; handle Control-O
3817 035264 037 00 1 00 035266 PNTMSG @DSETHL ; print text
3818 035265 263 17 0 00 000000 RTN ; exit
3819
3820 035266 DSETHL: [ASCIZ ^
3821 SET Command:
3822
3823 SET ADDR adr - set start address
3824 SET CSR data - set start CSR data
3825 SET PARITY arg* - set/clr auto par generation
3826 SET EBUF arg* - set/clr preserve EBUF flag
3827 SET LENGTH len - set buffer length
3828 SET PAT n - set data pattern
3829 SET FNAME name ext - set default ucode file name
3830 SET PATLIS arg - list data patterns
3831 SET WHAT - print options
3832 SET HELP - print this
3833
3834 * Arg - YES or NO
3835 035266 000000 057206 ^]
3836
3837
3838 ;#********************************************************************
3839 ;* Program Flags
3840 ;#********************************************************************
3841
3842 035267 000000 000000 DSADDR: 0 ; start address initially zero
3843 035270 000000 000000 DSDATA: 0 ; start data initially zero
3844
3845 035271 777777 777777 PARFLG: -1 ; 'automatic parity generation' flag
3846 035272 777777 777777 PRSFLG: -1 ; 'preserve EBUF' flag
3847
3848 035273 000000 000200 DSWORD: ^D128 ; buffer length
3849
3850 035274 000000 000001 DSPAT: 1 ; data pattern
3851 035275 000000 000000 DSTPAT: 0 ; operator select pattern
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 88
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0275
3852
3853 ;#*********************************************************************
3854 ;* DECSR - Examine CSR register
3855 ;#*********************************************************************
3856
3857 035276 200 01 0 00 057340 DECSR: MOVE 1,[FMSGCD (ECSR <CR>)]
3858 035277 260 17 0 00 035261* GO CHKARG ; check for argument
3859 035300 263 17 0 00 000000 RTN ; error - exit
3860 035301 260 17 0 00 032162* GO RDCSR ; read the CSR register
3861 035302 037 00 0 00 057341 TMSGC <[Rdcsr failed]> ; error return
3862 035303 260 17 0 00 043215 GO CSRPNT ; print CSR data
3863 035304 037 00 0 00 030242 PCRL ; end of line
3864 035305 263 17 0 00 000000 RTN ; return
3865
3866
3867 ;#*********************************************************************
3868 ;* DDCSR - Deposit CSR register
3869 ;#*********************************************************************
3870
3871 035306 210 01 0 00 057352 DDCSR: MOVN 1,[FMSGCD (DCSR xxxxxx <CR>)]
3872 035307 260 17 0 00 035232* GO .OARG ; get argument
3873 035310 263 17 0 00 000000 RTN ; error/altmode/question - exit
3874 JRST [FMSGCD <? Missing argument>
3875 GO FIOFF
3876 035311 254 00 0 00 054406 RTN]
3877 035312 200 01 0 00 035235* MOVE 1,ARGUM ; get argument
3878 035313 260 17 0 00 000000* GO LDCSR ; write it
3879 035314 263 17 0 00 000000 RTN ; return
3880
3881
3882 ;#*********************************************************************
3883 ;* DZCSR - Zero CSR register
3884 ;#*********************************************************************
3885
3886 035315 200 01 0 00 057356 DZCSR: MOVE 1,[FMSGCD (ZCSR <CR>)]
3887 035316 260 17 0 00 035277* GO CHKARG ; check for argument
3888 035317 263 17 0 00 000000 RTN ; error - exit
3889 035320 400 01 0 00 000000 SETZ 1, ; clear data
3890 035321 260 17 0 00 035313* GO LDCSR ; write it
3891 035322 263 17 0 00 000000 RTN ; return
3892
3893
3894 ;#*********************************************************************
3895 ;* DCONI - Loop on CONI's
3896 ;#*********************************************************************
3897
3898 035323 200 01 0 00 057362 DCONI: MOVE 1,[FMSGCD (LCONI <CR>)]
3899 035324 260 17 0 00 035316* GO CHKARG ; check for argument
3900 035325 263 17 0 00 000000 RTN ; error - exit
3901 035326 260 17 0 00 035301* DCONI1: GO RDCSR ; read the CSR register
3902 035327 255 00 0 00 000000 JFCL ; error return
3903 035330 037 07 0 00 000003 TTALTM ; altmode typed?
3904 035331 254 00 0 00 035326 JRST DCONI1 ; no - keep looping
3905 035332 263 17 0 00 000000 RTN ; return
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 89
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0276
3906
3907 ;#*********************************************************************
3908 ;* DCONO - Loop on CONO's
3909 ;#*********************************************************************
3910
3911 035333 210 01 0 00 057370 DCONO: MOVN 1,[FMSGCD (LCONO xxxxxx <CR>)]
3912 035334 260 17 0 00 035307* GO .OARG ; get argument
3913 035335 263 17 0 00 000000 RTN ; error/altmode/question - exit
3914 JRST [FMSGCD <? Missing argument>
3915 GO FIOFF
3916 035336 254 00 0 00 054406 RTN]
3917 035337 200 01 0 00 035312* DCONO1: MOVE 1,ARGUM ; get argument
3918 035340 260 17 0 00 035321* GO LDCSR ; write it
3919 035341 037 07 0 00 000003 TTALTM ; altmode typed?
3920 035342 254 00 0 00 035337 JRST DCONO1 ; no - keep looping
3921 035343 263 17 0 00 000000 RTN ; return
3922
3923
3924 ;#********************************************************************
3925 ;* DDATI - Loop on DATAI's
3926 ;#********************************************************************
3927
3928 035344 200 01 0 00 057375 DDATI: MOVE 1,[FMSGCD (LDATAI <CR>)]
3929 035345 260 17 0 00 035324* GO CHKARG ; check for argument
3930 035346 263 17 0 00 000000 RTN ; error - exit
3931 035347 260 17 0 00 000000* DDATI1: GO RDEBUF ; do a DATAI
3932 035350 037 07 0 00 000003 TTALTM ; altmode typed?
3933 035351 254 00 0 00 035347 JRST DDATI1 ; no - keep looping
3934 035352 263 17 0 00 000000 RTN ; return
3935
3936
3937 ;#********************************************************************
3938 ;* DDATO - Loop on DATAO's
3939 ;#********************************************************************
3940
3941 035353 210 01 0 00 057403 DDATO: MOVN 1,[FMSGCD (LDATAO xxxxxx <CR>)]
3942 035354 260 17 0 00 035334* GO .OARG ; get argument
3943 035355 263 17 0 00 000000 RTN ; error/altmode/question - exit
3944 JRST [FMSGCD <? Missing argument>
3945 GO FIOFF
3946 035356 254 00 0 00 054406 RTN]
3947 035357 200 01 0 00 035337* DDATO1: MOVE 1,ARGUM ; get argument
3948 035360 260 17 0 00 000000* GO LDEBUF ; do a DATAO
3949 035361 037 07 0 00 000003 TTALTM ; altmode typed?
3950 035362 254 00 0 00 035357 JRST DDATO1 ; no - keep looping
3951 035363 263 17 0 00 000000 RTN ; return
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 90
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0277
3952
3953 ;#********************************************************************
3954 ;* DROUTN - Routine to do special diagnostic loop
3955 ;#********************************************************************
3956
3957 035364 210 01 0 00 057412 DROUTN: MOVN 1,[FMSGCD (LROUTN xxxxxxxxxxxx <CR>)]
3958 035365 260 17 0 00 035354* GO .OARG ; get argument
3959 035366 263 17 0 00 000000 RTN ; error/altmode/question - exit
3960 035367 255 00 0 00 000000 JFCL
3961 035370 260 17 0 00 000000* DROUT1: GO IPACLR ; do a 'port clear'
3962 035371 255 00 0 00 000000 JFCL
3963 035372 255 00 0 00 000000 JFCL
3964 035373 255 00 0 00 000000 JFCL
3965 035374 255 00 0 00 000000 JFCL
3966 035375 255 00 0 00 000000 JFCL
3967 035376 255 00 0 00 000000 JFCL
3968 035377 255 00 0 00 000000 JFCL
3969 035400 255 00 0 00 000000 JFCL
3970 035401 255 00 0 00 000000 JFCL
3971 035402 255 00 0 00 000000 JFCL
3972 035403 255 00 0 00 000000 JFCL
3973 035404 255 00 0 00 000000 JFCL
3974 035405 255 00 0 00 000000 JFCL
3975 035406 255 00 0 00 000000 JFCL
3976 035407 255 00 0 00 000000 JFCL
3977 035410 037 07 0 00 000003 TTALTM ; check for altmode typed
3978 035411 254 00 0 00 035370 JRST DROUT1 ; no - keep looping
3979 035412 263 17 0 00 000000 RTN ; yes - return
3980
3981
3982 ;#********************************************************************
3983 ;* DRESET - Issue an EBUS Reset
3984 ;#********************************************************************
3985
3986 035413 200 01 0 00 057416 DRESET: MOVE 1,[FMSGCD (RESET <CR>)]
3987 035414 260 17 0 00 035345* GO CHKARG ; check for argument
3988 035415 263 17 0 00 000000 RTN ; error - exit
3989 035416 260 17 0 00 000000* GO ERESET
3990 035417 263 17 0 00 000000 RTN ; return
3991
3992
3993 ;#********************************************************************
3994 ;* DCLEAR - Issue a 'Port Clear'
3995 ;#********************************************************************
3996
3997 035420 200 01 0 00 057422 DCLEAR: MOVE 1,[FMSGCD (CLEAR <CR>)]
3998 035421 260 17 0 00 035414* GO CHKARG ; check for argument
3999 035422 263 17 0 00 000000 RTN ; error - exit
4000 035423 260 17 0 00 035370* GO IPACLR ; do a 'port clear'
4001 035424 263 17 0 00 000000 RTN ; return
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 91
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0278
4002
4003 ;#********************************************************************
4004 ;* DSINIT - Set up start addr/data/history prior to single step command
4005 ;#********************************************************************
4006
4007 035425 200 01 0 00 057427 DSINIT: MOVE 1,[FMSGCD (SSINIT <CR>)]
4008 035426 260 17 0 00 035421* GO CHKARG ; check for argument
4009 035427 263 17 0 00 000000 RTN ; error - exit
4010 035430 200 00 0 00 035267 MOVE DSADDR ; get start address
4011 035431 202 00 0 00 000000* MOVEM SNEXT ; save it for IPASST
4012 035432 200 00 0 00 035270 MOVE DSDATA ; get start CSR data
4013 035433 202 00 0 00 000000* MOVEM SDATA ; save it for IPASST
4014 035434 260 17 0 00 034764 GO DSETA1 ; print start address
4015 035435 260 17 0 00 035002 GO DSETC2 ; print start data
4016 035436 260 17 0 00 035601 GO DSSCLR ; clear sstep history
4017 035437 263 17 0 00 000000 RTN
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 92
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0279
4018
4019 ;#********************************************************************
4020 ;* DSTART - Start the port
4021 ;
4022 ; Arguments set up:
4023 ;
4024 ; DSADDR - Current start address which has been specified by either a
4025 ; 'SETADD' command, or as an argument to the 'START' command.
4026 ; DSDATA - Current start CSR data specified by a 'SETCSR' command.
4027 ;
4028 ; Arguments set up for IPASST:
4029 ;
4030 ; SNEXT - Contents of DSADDR is used.
4031 ; SLAST - Contents of DSADDR is used.
4032 ; SDATA - Contents of DSDATA is used.
4033 ;#********************************************************************
4034
4035 035440 210 01 0 00 057437 DSTART: MOVN 1,[FMSGCD (START addr <CR> or START <CR>)]
4036 035441 260 17 0 00 035365* GO .OARG ; get start address
4037 035442 263 17 0 00 000000 RTN ; error/altmode/question - exit
4038 035443 334 01 0 00 035267 SKIPA 1,DSADDR ; no argument given
4039
4040 ; Start it up
4041
4042 035444 260 17 0 00 000000* DSTAR0: GO ISTOP ; stop the port
4043 035445 200 01 0 00 035357* MOVE 1,ARGUM ; get argument
4044 035446 202 01 0 00 035431* MOVEM 1,SNEXT ; set it up
4045 035447 202 00 0 00 000000* MOVEM SLAST ; set it up
4046 035450 200 00 0 00 035270 MOVE DSDATA ; get start data
4047 035451 202 00 0 00 035433* MOVEM SDATA ; set it up
4048 035452 260 17 0 00 000000* GO IPASRT ; start it up
4049 JRST [FMSGCD <? Error accessing CSR register>
4050 GO FIOFF
4051 035453 254 00 0 00 057447 RTN]
4052 JRST [FMSGCD <? Port not stopped>
4053 GO FIOFF
4054 035454 254 00 0 00 057457 RTN]
4055 035455 334 00 0 00 000000 SKIPA ; error - Error bits set in CSR
4056 035456 263 17 0 00 000000 RTN ; exit
4057 035457 037 01 0 00 057462 FMSGCD <? START failed - Error bits set in CSR>
4058 035460 260 17 0 00 035326* GO RDCSR ; read CSR register
4059 035461 255 00 0 00 000000 JFCL ; ignore error
4060 035462 260 17 0 00 043215 GO CSRPNT ; print CSR register
4061 035463 037 00 0 00 030242 PCRL ; end of line
4062 035464 263 17 0 00 000000 RTN ; continue
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 93
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0280
4063
4064 ;#********************************************************************
4065 ;* DSTOP - Stop the port
4066 ;
4067 ; Arguments set by IPASTP:
4068 ;
4069 ; SNEXT - Set to stopping address.
4070 ; SDATA - Set to contents of CSR register.
4071 ;#********************************************************************
4072
4073 035465 200 01 0 00 057476 DSTOP: MOVE 1,[FMSGCD (STOP <CR>)]
4074 035466 260 17 0 00 035426* GO CHKARG ; check for argument
4075 035467 263 17 0 00 000000 RTN ; error - exit
4076 035470 260 17 0 00 000000* GO IPASTP ; stop it and get final address
4077 JRST [FMSGCD <? Error accessing CSR register>
4078 GO FIOFF
4079 035471 254 00 0 00 057447 RTN]
4080 JRST [FMSGCD <? Port not running>
4081 GO FIOFF
4082 035472 254 00 0 00 057504 RTN]
4083 035473 254 00 0 00 035500 JRST DSTOP1 ; error - Error bits set in CSR
4084 035474 037 00 0 00 057507 TMSGC <Port stopped. Last Adr = >
4085 035475 200 00 0 00 035446* MOVE SNEXT ; print it out
4086 035476 037 04 0 00 000000 PNT4
4087 035477 334 00 0 00 000000 SKIPA
4088 035500 037 01 0 00 057515 DSTOP1: FMSGCD <? Stop failed - Error bits set in CSR>
4089 035501 200 01 0 00 035451* MOVE 1,SDATA ; get CSR data
4090 035502 260 17 0 00 043215 GO CSRPNT ; print CSR register
4091 035503 037 00 0 00 030242 PCRL ; end of line
4092 035504 263 17 0 00 000000 RTN ; continue
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 94
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0281
4093
4094 ;#********************************************************************
4095 ;* DSSTEP - Single step the port
4096 ;* DTRACE - Single step the port and trace progress
4097 ;
4098 ; Arguments set up for IPASST:
4099 ;
4100 ; SNEXT - This is the address last set up by another single step
4101 ; command or by a SETSTR (set up start data) command.
4102 ; After each single step the LAR is read. The contents
4103 ; of the LAR are put in SNEXT.
4104 ;
4105 ; SLAST - This is the address last executed. SNEXT is put in this
4106 ; location before each single step
4107 ;
4108 ; SDATA - This is the data last set up by another single step
4109 ; command or by a SETSTR (set up start data) command.
4110 ;
4111 ; Both of these routines store single step data in a ring buffer which
4112 ; can be examined with a SPRINT command. This is useful in debugging
4113 ; a microcode routine and instead of single stepping and tracing, you
4114 ; single step 500 times or until an error occurs, then examine last x
4115 ; locations to see what happened.
4116 ;#********************************************************************
4117
4118 035505 210 01 0 00 057537 DTRACE: MOVN 1,[FMSGCD (STRACE RepeatCount <CR> or STRACE <CR>)]
4119 035506 476 00 0 00 064335' SETOM DTRFLG ; set trace flag
4120 035507 254 00 0 00 035512 JRST DTRAC0 ; continue
4121
4122 035510 402 00 0 00 064335' DSSTEP: SETZM DTRFLG# ; clear trace flag
4123 035511 210 01 0 00 057551 MOVN 1,[FMSGCD (SSTEP RepeatCount <CR> or SSTEP <CR>)]
4124
4125 035512 402 00 0 00 035445* DTRAC0: SETZM ARGUM ; set default argument
4126 035513 350 00 0 00 035512* AOS ARGUM ; to 1 single step
4127 035514 260 17 0 00 035050* GO .DARG ; get argument
4128 035515 263 17 0 00 000000 RTN ; error/altmode/question - exit
4129 035516 255 00 0 00 000000 JFCL ; no argument given
4130 035517 260 17 0 00 035444* GO ISTOP ; stop the port
4131 035520 200 02 0 00 035513* MOVE 2,ARGUM ; get argument
4132 035521 400 04 0 00 000000 SETZ 4, ; clear count of single steps
4133 035522 332 00 0 00 064335' SKIPE DTRFLG ; trace flag set?
4134 035523 037 00 0 00 057552 TMSGCD < RAR LAR CSR (final) SS#>
4135
4136 ; Single step
4137
4138 035524 350 00 0 00 000004 DSST0: AOS 4 ; increment count
4139 035525 200 01 0 00 035272 MOVE 1,PRSFLG ; get preserve EBUF flag
4140 035526 200 00 0 00 035501* MOVE SDATA ; get initial CSR data
4141 035527 202 00 0 00 064400' MOVEM SLDATA# ; save initial CSR data
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 95
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0282
4142 035530 260 17 0 00 000000* GO IPASST ; single step once
4143 JRST [FMSGCD <? Error accessing CSR register>
4144 GO FIOFF
4145 035531 254 00 0 00 057447 RTN]
4146 JRST [FMSGCD <? Port not stopped>
4147 GO FIOFF
4148 035532 254 00 0 00 057457 RTN]
4149 JRST [GO SAVHST
4150 TMSGC <[Error bits set in CSR]>
4151 SKIPE DTRFLG
4152 JRST DSSTX
4153 TMSGC <[>
4154 MOVE 4
4155 PNTOCS
4156 TMSGD < ssteps done]>
4157 035533 254 00 0 00 057574 JRST DSSTX]
4158 035534 260 17 0 00 037030 GO SAVHST ; save data for sstep history
4159
4160 ; If tracing is being done
4161
4162 035535 200 01 0 00 035610 MOVE 1,SSLOC ; get history location
4163 035536 332 00 0 00 064335' SKIPE DTRFLG ; tracing being done?
4164 035537 260 17 0 00 037011 GO PNTHST ; yes - print it
4165
4166 ; Altmode and exit checking
4167
4168 035540 037 07 0 00 000003 DSST1: TTALTM ; altmode key struck?
4169 035541 334 00 0 00 000000 SKIPA ; no - proceed
4170 JRST [PCRL ; yes - print some final
4171 SKIPE DTRFLG ; data and exit
4172 RTN
4173 TMSG <[>
4174 MOVE 4
4175 PNTOCS
4176 TMSGD < ssteps done]>
4177 035542 254 00 0 00 057606 JRST DSSTX]
4178 035543 367 02 0 00 035524 SOJG 2,DSST0 ; loop till done
4179
4180 ; Exit
4181
4182 035544 037 00 0 00 057616 DSSTX: TMSGC <LAR Last/> ; print LAR data
4183 035545 200 00 0 00 035447* MOVE SLAST ; get last address
4184 035546 037 04 0 00 000000 PNT4 ; print it
4185 035547 037 00 0 00 057621 TMSG < Next/>
4186 035550 200 00 0 00 035475* MOVE SNEXT ; get next address
4187 035551 037 04 0 00 000000 PNT4 ; print it
4188 035552 037 00 0 00 057623 TMSG < CSR/> ; print CSR data
4189 035553 200 00 0 00 035526* MOVE SDATA ; get it
4190 035554 037 13 0 00 000000 PNTHW ; print it
4191 035555 037 00 0 00 030242 PCRL ; end of line
4192 035556 263 17 0 00 000000 RTN
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 96
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0283
4193
4194 ;#********************************************************************
4195 ;* DSSPNT - Print single step history
4196 ;#********************************************************************
4197
4198 035557 201 00 0 00 000024 DSSPNT: MOVEI ^D20 ; set default number of ssteps
4199 035560 202 00 0 00 035520* MOVEM ARGUM ; to print to 20
4200 035561 210 01 0 00 057635 MOVN 1,[FMSGCD (SPRINT EntryCount or SPRINT <CR>)]
4201 035562 260 17 0 00 035514* GO .DARG ; get argument
4202 035563 263 17 0 00 000000 RTN ; error/altmode/question - exit
4203 035564 255 00 0 00 000000 JFCL ; no argument given
4204 035565 200 03 0 00 035560* MOVE 3,ARGUM ; get argument
4205 035566 200 01 0 00 035610 MOVE 1,SSLOC ; get current location
4206 035567 037 00 0 00 057552 TMSGCD < RAR LAR CSR (final) SS#>
4207 035570 260 17 0 00 037011 DSSPN0: GO PNTHST ; print an item
4208 035571 037 07 0 00 000003 TTALTM ; altmode typed?
4209 035572 334 00 0 00 000000 SKIPA ; no - continue
4210 035573 263 17 0 00 000000 RTN ; yes - exit
4211 035574 375 00 0 00 000001 SOSGE 1 ; decrement pointer - at start of list?
4212 035575 201 01 0 00 000177 MOVEI 1,177 ; yes - point to end now
4213 035576 333 00 0 01 035611 SKIPLE SSNUM(1) ; valid entry?
4214 035577 367 03 0 00 035570 SOJG 3,DSSPN0 ; yes - loop till done
4215 035600 263 17 0 00 000000 RTN ; no - return
4216
4217
4218 ;#********************************************************************
4219 ;* DSSCLR - Clear single step history data
4220 ;#********************************************************************
4221
4222 035601 200 01 0 00 057642 DSSCLR: MOVE 1,[FMSGCD (SCLEAR <CR>)]
4223 035602 260 17 0 00 035466* GO CHKARG ; check for argument
4224 035603 263 17 0 00 000000 RTN ; error - exit
4225 035604 402 00 0 00 035610 SETZM SSLOC ; clear first word
4226 035605 200 00 0 00 057643 MOVE [SSLOC,,SSLOC+1] ; build BLT pointer
4227 035606 251 00 0 00 037010 BLT SSCSRN+177 ; clear it
4228 035607 263 17 0 00 000000 RTN ; return
4229
4230 ; Ring buffer and miscellaneous data
4231
4232 035610 000000 000000 SSLOC: 0 ; pointer to single step entry
4233 035611 SSNUM: BLOCK 200 ; latest single step number
4234 036011 SSADRL: BLOCK 200 ; initial address
4235 036211 SSADRN: BLOCK 200 ; final address
4236 036411 SSCSRL: BLOCK 200 ; initial CSR
4237 036611 SSCSRN: BLOCK 200 ; final CSR
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 97
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0284
4238
4239 ;#********************************************************************
4240 ;* PNTHST - Print a single step history entry
4241 ;
4242 ; Argument: AC1 - location to print (offset into tables)
4243 ;#********************************************************************
4244
4245 037011 261 17 0 00 000000 PNTHST: PUT 0 ; save AC0
4246 037012 200 00 0 01 036011 MOVE SSADRL(1) ; print LAR (last) contents
4247 037013 037 04 0 00 000000 PNT4
4248 037014 037 00 0 00 051536 TMSG < >
4249 037015 200 00 0 01 036211 MOVE SSADRN(1) ; print LAR (next) contents
4250 037016 037 04 0 00 000000 PNT4
4251 037017 037 00 0 00 051536 TMSG < >
4252 037020 200 00 0 01 036611 MOVE SSCSRN(1) ; get CSR (final) data
4253 037021 037 13 0 00 000000 PNTHW ; print it
4254 037022 037 00 0 00 051536 TMSG < >
4255 037023 200 00 0 01 035611 MOVE SSNUM(1) ; get sstep number
4256 037024 037 16 0 00 000003 PNTOCS ; print it
4257 037025 037 00 0 00 030242 PCRL
4258 037026 262 17 0 00 000000 GET 0 ; restore AC0
4259 037027 263 17 0 00 000000 RTN ; return
4260
4261
4262 ;#********************************************************************
4263 ;* SAVHST - Save single step history data
4264 ;#********************************************************************
4265
4266 037030 261 17 0 00 000000 SAVHST: RPUT (0,1,2) ; save AC's
4267
4268 037033 200 02 0 00 035610 MOVE 2,SSLOC ; get last offset
4269 037034 200 02 0 02 035611 MOVE 2,SSNUM(2) ; get last number
4270 037035 350 01 0 00 035610 AOS 1,SSLOC ; get/increment offset
4271 037036 301 01 0 00 000200 CAIL 1,200 ; overflow ring buffer yet?
4272 037037 403 01 0 00 035610 SETZB 1,SSLOC ; yes - reinitialize pointer
4273 037040 350 00 0 00 000002 AOS 2 ; increment ss number
4274 037041 202 02 0 01 035611 MOVEM 2,SSNUM(1) ; save it
4275 037042 200 00 0 00 035545* MOVE SLAST ; get initial address
4276 037043 202 00 0 01 036011 MOVEM SSADRL(1) ; save it
4277 037044 200 00 0 00 035550* MOVE SNEXT ; get final address
4278 037045 202 00 0 01 036211 MOVEM SSADRN(1) ; save it
4279 037046 200 00 0 00 064400' MOVE SLDATA ; get initial CSR data
4280 037047 202 00 0 01 036411 MOVEM SSCSRL(1) ; save it
4281 037050 200 00 0 00 035553* MOVE SDATA ; get final CSR data
4282 037051 202 00 0 01 036611 MOVEM SSCSRN(1) ; save it
4283 037052 262 17 0 00 000002 RGET (2,1,0) ; restore AC's
4284
4285 037055 263 17 0 00 000000 RTN ; return
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 98
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0285
4286
4287 ;#********************************************************************
4288 ;* DCONT - Continue the port
4289 ;
4290 ; Arguments set up for IPASRT:
4291 ;
4292 ; SNEXT - Points to next address, from IPASTP or IPASST
4293 ; SDATA - Defaults to current contents of SDATA last set up by IPASTP.
4294 ;#********************************************************************
4295
4296 037056 200 01 0 00 057647 DCONT: MOVE 1,[FMSGCD (CONT <CR>)]
4297 037057 260 17 0 00 035602* GO CHKARG ; check for argument
4298 037060 263 17 0 00 000000 RTN ; error - exit
4299 037061 260 17 0 00 035452* GO IPASRT ; start it up
4300 JRST [FMSGCD <? Error accessing CSR register>
4301 GO FIOFF
4302 037062 254 00 0 00 057447 RTN]
4303 JRST [FMSGCD <? Port not stopped>
4304 GO FIOFF
4305 037063 254 00 0 00 057457 RTN]
4306 037064 334 00 0 00 000000 SKIPA ; error - Error bits set in CSR
4307 037065 263 17 0 00 000000 RTN ; exit
4308 037066 037 01 0 00 057650 FMSGCD <? CONT failed - Error bits set in CSR>
4309 037067 200 01 0 00 037050* MOVE 1,SDATA ; get CSR data
4310 037070 260 17 0 00 043215 GO CSRPNT ; print CSR register
4311 037071 037 01 0 00 030242 PCRLF ; end of line
4312 037072 263 17 0 00 000000 RTN ; continue
4313
4314
4315 ;#********************************************************************
4316 ;* DEEBUF - Examine EBUF register
4317 ;#********************************************************************
4318
4319 037073 200 01 0 00 057664 DEEBUF: MOVE 1,[FMSGCD (EEBUF <CR>)]
4320 037074 260 17 0 00 037057* GO CHKARG ; check for argument
4321 037075 263 17 0 00 000000 RTN ; error - exit
4322 037076 260 17 0 00 035517* GO ISTOP ; stop the port
4323 037077 260 17 0 00 000000* GO SETEBU ; ensure 'Test EBUF' bit is set
4324 JRST [FMSGCD <? Error accessing CSR register>
4325 GO FIOFF
4326 037100 254 00 0 00 057447 RTN]
4327
4328 ; Now read the data
4329
4330 037101 260 17 0 00 035347* GO RDEBUF ; read EBUF
4331 037102 037 00 0 00 057665 TMSGC <EBUF/ > ; print out the data
4332 037103 200 00 0 00 000001 MOVE 1
4333 037104 037 13 0 00 000000 PNTHW
4334 037105 037 00 0 00 030242 PCRL
4335 037106 263 17 0 00 000000 RTN ; continue
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 99
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0286
4336
4337 ;#********************************************************************
4338 ;* DDEBUF - Deposit EBUF register
4339 ;* DZEBUF - Zero EBUF register
4340 ;#********************************************************************
4341
4342 037107 200 01 0 00 057672 DZEBUF: MOVE 1,[FMSGCD (ZEBUF <CR>)]
4343 037110 260 17 0 00 037074* GO CHKARG ; check for argument
4344 037111 263 17 0 00 000000 RTN ; error - exit
4345 037112 402 00 0 00 035565* SETZM ARGUM ; clear data
4346 037113 254 00 0 00 037120 JRST DDEBU1 ; continue
4347
4348 037114 210 01 0 00 057701 DDEBUF: MOVN 1,[FMSGCD (DEBUF xxxxxxxxxxxx <CR>)]
4349 037115 260 17 0 00 035441* GO .OARG ; get argument
4350 037116 263 17 0 00 000000 RTN ; error/altmode/question - exit
4351 JRST [FMSGCD <? Missing argument>
4352 GO FIOFF
4353 037117 254 00 0 00 054406 RTN]
4354 037120 260 17 0 00 037076* DDEBU1: GO ISTOP ; stop the port
4355 037121 260 17 0 00 037077* GO SETEBU ; ensure 'Test EBUF' bit is set
4356 JRST [FMSGCD <? Error accessing CSR register>
4357 GO FIOFF
4358 037122 254 00 0 00 057447 RTN]
4359 037123 200 01 0 00 037112* MOVE 1,ARGUM ; get argument
4360 037124 260 17 0 00 035360* GO LDEBUF ; write it
4361 037125 263 17 0 00 000000 RTN ; continue
4362
4363
4364 ;#********************************************************************
4365 ;* DELAR - Examine LAR register
4366 ;#********************************************************************
4367
4368 037126 200 01 0 00 057705 DELAR: MOVE 1,[FMSGCD (ELAR <CR>)]
4369 037127 260 17 0 00 037110* GO CHKARG ; check for argument
4370 037130 263 17 0 00 000000 RTN ; error - exit
4371 037131 260 17 0 00 037120* GO ISTOP ; stop the port
4372 037132 201 01 0 00 040000 MOVEI 1,SELLAR ; get 'DIAG Sel LAR' bit
4373 037133 260 17 0 00 035340* GO LDCSR ; write to CSR register
4374 037134 260 17 0 00 000000* GO RDLAR ; read LAR
4375 037135 037 00 0 00 057706 TMSGC <LAR: > ; print out the data
4376 037136 200 00 0 00 000001 MOVE 1
4377 037137 037 16 0 00 000003 PNTOCS
4378 037140 037 00 0 00 057710 TMSG < (Adr: >
4379 037141 242 01 0 00 777777 LSH 1,-1 ; don't print out RAR bit
4380 037142 200 00 0 00 000001 MOVE 1
4381 037143 037 16 0 00 000003 PNTOCS
4382 037144 037 00 0 00 053441 TMSGD <)>
4383 037145 263 17 0 00 000000 RTN ; continue
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 100
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0287
4384
4385 ;#********************************************************************
4386 ;* DDRAR - Deposit RAR register
4387 ;#********************************************************************
4388
4389 037146 210 01 0 00 057716 DDRAR: MOVN 1,[FMSGCD (DRAR addr <CR>)]
4390 037147 260 17 0 00 037115* GO .OARG ; get test number
4391 037150 263 17 0 00 000000 RTN ; error/altmode/question - exit
4392 JRST [FMSGCD <? Missing argument>
4393 GO FIOFF
4394 037151 254 00 0 00 054406 RTN]
4395 037152 260 17 0 00 037131* GO ISTOP ; stop the port
4396 037153 400 01 0 00 000000 SETZ 1, ; ensure we can write the RAR
4397 037154 260 17 0 00 037133* GO LDCSR ; by clearing CSR register
4398 037155 200 01 0 00 037123* MOVE 1,ARGUM ; get argument
4399 037156 260 17 0 00 000000* GO LDRAR ; write it
4400 037157 263 17 0 00 000000 RTN ; continue
4401
4402
4403 ;#********************************************************************
4404 ;* DZRAR - Zero RAR register
4405 ;#********************************************************************
4406
4407 037160 200 01 0 00 057722 DZRAR: MOVE 1,[FMSGCD (ZRAR <CR>)]
4408 037161 260 17 0 00 037127* GO CHKARG ; check for argument
4409 037162 263 17 0 00 000000 RTN ; error - exit
4410 037163 260 17 0 00 037152* GO ISTOP ; stop the port
4411 037164 400 01 0 00 000000 SETZ 1, ; clear data
4412 037165 260 17 0 00 037154* GO LDCSR ; clear CSR first
4413 037166 260 17 0 00 037156* GO LDRAR ; write it
4414 037167 263 17 0 00 000000 RTN ; continue
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 101
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0288
4415
4416 ;#*********************************************************************
4417 ;* DECRAM - Examine CRAM locations specified by "PARG1" and "PARG2".
4418 ;#*********************************************************************
4419
4420 037170 201 00 0 00 000000 DECRAM: MOVEI 0 ; set the 'EDZL' flag
4421 037171 202 00 0 00 064334' MOVEM DFLAG# ; to 0 (Examine)
4422 037172 254 00 0 00 037212 JRST DCOMGO ; process arguments
4423
4424 ;#*********************************************************************
4425 ;* DDCRAM - Change CRAM locations.
4426 ;#*********************************************************************
4427
4428 037173 201 00 0 00 000001 DDCRAM: MOVEI 1 ; set the 'EDZL' flag
4429 037174 202 00 0 00 064334' MOVEM DFLAG ; to 1 (Deposit)
4430 037175 254 00 0 00 037212 JRST DCOMGO ; process arguments
4431
4432 ;#*********************************************************************
4433 ;* DBCRAM - Change CRAM locations by field
4434 ;#*********************************************************************
4435
4436 037176 201 00 0 00 000002 DBCRAM: MOVEI 2 ; set the 'EDZL' flag
4437 037177 202 00 0 00 064334' MOVEM DFLAG ; to 1 (Deposit)
4438 037200 254 00 0 00 037212 JRST DCOMGO ; process arguments
4439
4440 ;#*********************************************************************
4441 ;* DACRAM - Alter CRAM locations.
4442 ;#*********************************************************************
4443
4444 037201 201 00 0 00 000003 DACRAM: MOVEI 3 ; set the 'EDZL' flag
4445 037202 202 00 0 00 064334' MOVEM DFLAG ; to 1 (Deposit)
4446 037203 254 00 0 00 037212 JRST DCOMGO ; process arguments
4447
4448 ;#*********************************************************************
4449 ;* DZCRAM -- Zero CRAM addresses specified.
4450 ;#*********************************************************************
4451
4452 037204 201 00 0 00 000004 DZCRAM: MOVEI 4 ; set the 'EDZL' flag
4453 037205 202 00 0 00 064334' MOVEM DFLAG ; to 2 (Zero)
4454 037206 254 00 0 00 037212 JRST DCOMGO ; process arguments
4455
4456 ;#*********************************************************************
4457 ;* DLCRAM -- List CRAM addresses specified.
4458 ;#*********************************************************************
4459
4460 037207 201 00 0 00 000005 DLCRAM: MOVEI 5 ; set the 'EDZL' flag
4461 037210 202 00 0 00 064334' MOVEM DFLAG ; to 3 (List)
4462 037211 254 00 0 00 037212 JRST DCOMGO ; process arguments
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 102
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0289
4463
4464 ; Start to process the arguments typed - both should be CRAM
4465 ; addresses in octal.
4466
4467 037212 200 00 0 00 037260 DCOMGO: MOVE RTO ; set up default range of CRAM locs
4468 037213 202 00 0 00 037254 MOVEM CRAMTO ; to be whatever typed before or
4469 037214 200 00 0 00 037261 MOVE RFROM ; if nothing typed, then 0-0
4470 037215 202 00 0 00 037253 MOVEM CRAMFR
4471
4472 ; Get first address
4473
4474 037216 200 01 0 00 057730 MOVE 1,[FMSGCD <xCRAM addr,addr (CR)>]
4475 037217 260 17 0 00 037147* GO .OARG ; get first address
4476 037220 263 17 0 00 000000 RTN ; error/altmode/question - exit
4477 037221 254 00 0 00 037233 JRST DCOM0 ; no arguments given - continue
4478 037222 200 00 0 00 037155* MOVE ARGUM ; get argument
4479 037223 202 00 0 00 037253 MOVEM CRAMFR ; save in 'from' location
4480 037224 202 00 0 00 037254 MOVEM CRAMTO ; save in 'to' location
4481
4482 ; Get 2nd address
4483
4484 037225 210 01 0 00 057730 MOVN 1,[FMSGCD <xCRAM addr,addr (CR)>]
4485 037226 260 17 0 00 037217* GO .OARG ; get first address
4486 037227 263 17 0 00 000000 RTN ; error/altmode/question - exit
4487 037230 254 00 0 00 037233 JRST DCOM0 ; no arguments given - continue
4488 037231 200 00 0 00 037222* MOVE ARGUM ; get argument
4489 037232 202 00 0 00 037254 MOVEM CRAMTO ; save in 'to' location
4490
4491 ; Now range check the arguments
4492
4493 037233 331 01 0 00 037253 DCOM0: SKIPL 1,CRAMFR ; 1st argument in range?
4494 037234 303 01 0 00 007777 CAILE 1,7777
4495 JRST [FMSGCD <? Range of CRAM locations is 0000-7777>
4496 SETOM ALTF
4497 GO FIOFF
4498 037235 254 00 0 00 057731 RTN]
4499 037236 331 01 0 00 037254 SKIPL 1,CRAMTO ; 1st argument in range?
4500 037237 303 01 0 00 007777 CAILE 1,7777
4501 JRST [FMSGCD <? Range of CRAM locations is 0000-7777>
4502 GO FIOFF
4503 037240 254 00 0 00 056630 RTN]
4504 037241 274 01 0 00 037253 SUB 1,CRAMFR ; see if range ok
4505 JUMPL 1,[FMSGCD <? Range nonsensical>
4506 GO FIOFF
4507 037242 321 01 0 00 057176 RTN]
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 103
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0290
4508
4509 ;#*********************************************************************
4510 ; Process the command - examine, deposit, or zero
4511 ;#*********************************************************************
4512
4513 ; Save default arguments
4514
4515 037243 200 00 0 00 037253 MOVE CRAMFR ; set up the new default range
4516 037244 202 00 0 00 037261 MOVEM RFROM ; selected, for later EXAM,
4517 037245 200 00 0 00 037254 MOVE CRAMTO ; DEPOS, or ZEROs
4518 037246 202 00 0 00 037260 MOVEM RTO
4519
4520 ; Then ensure the port is stopped
4521
4522 037247 260 17 0 00 037163* GO ISTOP ; stop the port
4523
4524 ; Now do it
4525
4526 037250 476 00 0 00 064333' DCOM1: SETOM DC1ST# ; init 'first location' flag
4527 037251 200 01 0 00 064334' MOVE 1,DFLAG ; get type of command
4528 JRST @[DCOMEX ; dispatch to proper routine
4529 DCOMDE
4530 DCOMDB
4531 DCOMAL
4532 DCOMZE
4533 037252 254 00 1 01 057735 DCOMLI](1)
4534
4535 ; Default CRAM locations, CRAM data, and Misc
4536
4537 037253 000000 000000 CRAMFR: 0 ; range is from CRAMFR to
4538 037254 000000 000000 CRAMTO: 0 ; CRAMTO
4539 037255 000000 000000 CADDR: 0 ; current address
4540
4541 037256 000000 000000 CWORDL: 0 ; left 30 bits
4542 037257 000000 000000 CWORDR: 0 ; right 30 bits
4543
4544 037260 000000 000000 RTO: 0 ; start address (default)
4545 037261 000000 000000 RFROM: 0 ; end address (default)
4546
4547 037262 000000 000000 ANEXT: 0 ; next address
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 104
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0291
4548
4549 ;#*********************************************************************
4550 ; Deposit into CRAM locations.
4551 ;#*********************************************************************
4552
4553 DCOMDE: MOVEI [SETZM ALTF ; set up altmode transfer address
4554 GO FIOFF ; to exit this command
4555 037263 201 00 0 00 051550 RTN]
4556 037264 202 00 0 00 030063 MOVEM ALTMGO
4557 037265 335 00 0 00 064333' SKIPGE DC1ST ; first location?
4558 037266 037 01 0 00 057743 FMSGC <Type xxxx,xxxx,xxxx,xxxx,xxxx>
4559 037267 402 00 0 00 064333' SETZM DC1ST ; clear 'first location' flag
4560 037270 037 01 0 00 030242 PCRLF
4561 037271 476 00 0 00 037256 SETOM CWORDL ; initialize left 30 bits
4562 037272 476 00 0 00 037257 SETOM CWORDR ; initialize right 30 bits
4563 037273 200 00 0 00 037253 MOVE CRAMFR ; get the address to modify
4564 037274 202 00 0 00 037255 MOVEM CADDR ; save address for writing
4565 037275 037 04 0 00 000001 PNT4F ; print it
4566 037276 037 01 0 00 057752 FMSG <:: >
4567 037277 403 04 0 00 000005 SETZB 4,5 ; clear data input locations
4568 037300 476 00 0 00 034265* SETOM ARGFLG ; ensure that an argument is expected
4569 037301 200 01 0 00 057763 MOVE 1,[FMSGCD <xxxx,xxxx,xxxx,xxxx,xxxx (CR)>]
4570 037302 260 17 0 00 037226* GO .OARG ; get first address
4571 037303 263 17 0 00 000000 RTN ; error/altmode/question - exit
4572 JRST [FMSGCD <? Missing arguments>
4573 GO FIOFF
4574 037304 254 00 0 00 057771 RTN]
4575 037305 200 00 0 00 037231* MOVE ARGUM ; get argument
4576 037306 137 00 0 00 057774 DPB [POINT 12,4,11] ; save it
4577 037307 200 01 0 00 057763 MOVE 1,[FMSGCD <xxxx,xxxx,xxxx,xxxx,xxxx (CR)>]
4578 037310 260 17 0 00 037302* GO .OARG ; get first address
4579 037311 263 17 0 00 000000 RTN ; error/altmode/question - exit
4580 JRST [FMSGCD <? Missing arguments>
4581 GO FIOFF
4582 037312 254 00 0 00 057771 RTN]
4583 037313 200 00 0 00 037305* MOVE ARGUM ; get argument
4584 037314 137 00 0 00 057775 DPB [POINT 12,4,23] ; save it
4585 037315 200 01 0 00 057763 MOVE 1,[FMSGCD <xxxx,xxxx,xxxx,xxxx,xxxx (CR)>]
4586 037316 260 17 0 00 037310* GO .OARG ; get first address
4587 037317 263 17 0 00 000000 RTN ; error/altmode/question - exit
4588 JRST [FMSGCD <? Missing arguments>
4589 GO FIOFF
4590 037320 254 00 0 00 057771 RTN]
4591 037321 200 00 0 00 037313* MOVE ARGUM ; get argument
4592 037322 137 00 0 00 057776 DPB [POINT 12,4,35] ; save it
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 105
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0292
4593 037323 200 01 0 00 057763 MOVE 1,[FMSGCD <xxxx,xxxx,xxxx,xxxx,xxxx (CR)>]
4594 037324 260 17 0 00 037316* GO .OARG ; get first address
4595 037325 263 17 0 00 000000 RTN ; error/altmode/question - exit
4596 JRST [FMSGCD <? Missing arguments>
4597 GO FIOFF
4598 037326 254 00 0 00 057771 RTN]
4599 037327 200 00 0 00 037321* MOVE ARGUM ; get argument
4600 037330 137 00 0 00 057777 DPB [POINT 12,5,11] ; save it
4601 037331 210 01 0 00 057763 MOVN 1,[FMSGCD <xxxx,xxxx,xxxx,xxxx,xxxx (CR)>]
4602 037332 260 17 0 00 037324* GO .OARG ; get first address
4603 037333 263 17 0 00 000000 RTN ; error/altmode/question - exit
4604 JRST [FMSGCD <? Missing argument>
4605 GO FIOFF
4606 037334 254 00 0 00 054406 RTN]
4607 037335 200 00 0 00 037327* MOVE ARGUM ; get argument
4608 037336 137 00 0 00 060000 DPB [POINT 12,5,23] ; save it
4609 037337 135 00 0 00 060001 LDB [POINT 30,4,29] ; get left 30 bits
4610 037340 202 00 0 00 037256 MOVEM CWORDL ; save them
4611 037341 246 04 0 00 777772 LSHC 4,-^D6 ; position right 30 bits properly
4612 037342 135 00 0 00 060002 LDB [POINT 30,5,29] ; get right 30 bits
4613 037343 202 00 0 00 037257 MOVEM CWORDR ; save them
4614 037344 260 17 0 00 037703 GO DWCRAM ; go write CRAM location
4615 037345 350 01 0 00 037253 AOS 1,CRAMFR ; update the specified address
4616 037346 202 01 0 00 037262 MOVEM 1,ANEXT ; save next address
4617 037347 317 01 0 00 037254 CAMG 1,CRAMTO ; reach end yet?
4618 037350 254 00 0 00 037263 JRST DCOMDE ; no - loop till done
4619 037351 263 17 0 00 000000 RTN ; yes - exit
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 106
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0293
4620
4621 ;#*********************************************************************
4622 ; Deposit into CRAM locations (by bit field)
4623 ;#*********************************************************************
4624
4625 037352 402 00 0 00 037256 DCOMDB: SETZM CWORDL ; initialize left 30 bits
4626 037353 402 00 0 00 037257 SETZM CWORDR ; initialize right 30 bits
4627 037354 200 00 0 00 037253 MOVE CRAMFR ; get the address to modify
4628 037355 202 00 0 00 037255 MOVEM CADDR ; save address for writing
4629 037356 254 00 0 00 037362 JRST DCOMAG
4630
4631 037357 200 00 0 00 037253 DCOMAL: MOVE CRAMFR ; get the address to modify
4632 037360 202 00 0 00 037255 MOVEM CADDR ; save address for writing
4633 037361 260 17 0 00 037735 GO DRCRAM ; read CRAM (init both words)
4634
4635 ; Set up initial data
4636
4637 037362 335 00 0 00 064333' DCOMAG: SKIPGE DC1ST ; first location?
4638 PNTMSF [ASCIZ /
4639 037363 037 01 0 00 060003 Type value,value... or ^,CR,^Z,field name/]
4640 037364 402 00 0 00 064333' SETZM DC1ST ; clear 'first location' flag
4641 037365 037 01 0 00 030242 PCRLF
4642 MOVEI [SETZM ALTF ; set up altmode transfer address
4643 GO FIOFF ; to exit this command
4644 PCRLF
4645 037366 201 00 0 00 060014 RTN]
4646 037367 202 00 0 00 030063 MOVEM ALTMGO
4647 037370 200 00 0 00 037253 MOVE CRAMFR ; get the address to modify
4648 037371 037 04 0 00 000001 PNT4F ; print it
4649 037372 037 01 0 00 060020 FMSGD <::>
4650 037373 260 17 0 00 034244* GO CLRBUF ; clear input buffer
4651 037374 402 00 0 00 030231 SETZM $TTCHR ; clear last character typed
4652
4653 ; Select an entry from the bit table
4654
4655 037375 201 06 0 00 000001 MOVEI 6,1 ; init bit pointer
4656 037376 275 06 0 00 000002 DCOMA0: SUBI 6,2 ; decrement entry pointer
4657 037377 315 06 0 00 060021 CAMGE 6,[-1] ; backed up too far?
4658 037400 474 06 0 00 000000 SETO 6, ; force to start at beginning
4659 037401 350 00 0 00 000006 DCOMA1: AOS 6 ; point to next entry
4660 037402 303 06 0 00 000021 CAILE 6,^D17 ; done with microword?
4661 037403 254 00 0 00 037451 JRST DCOMAX ; yes - exit (write location)
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 107
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0294
4662
4663 ; Have an entry - now get input/dispatch data
4664
4665 037404 200 00 0 00 030231 MOVE $TTCHR ; get last character typed
4666 037405 302 00 0 00 000054 CAIE "," ; was it a comma
4667 037406 306 00 0 00 000040 CAIN " " ; or a blank?
4668 037407 334 00 0 00 000000 SKIPA ; yes - check file input
4669 037410 254 00 0 00 037414 JRST DCOMAA ; no - continue
4670 037411 332 00 0 00 064341' SKIPE FINPUT ; file input?
4671 JRST [GO FINCMD ; yes - input sixbit cmd
4672 JRST .+1 ; error or EOF
4673 037412 254 00 0 00 060022 JRST DCOM3A] ; continue
4674 037413 254 00 0 00 037425 JRST DCOMA3
4675 037414 332 00 0 00 064341' DCOMAA: SKIPE FINPUT ; file input?
4676 JRST [GO FINCMD ; yes - input sixbit cmd
4677 JRST .+1 ; error or EOF
4678 037415 254 00 0 00 060025 JRST DCOM3A] ; continue
4679 037416 200 00 0 00 064334' MOVE DFLAG ; get dispatch flag
4680 037417 306 00 0 00 000002 CAIN 2 ; alter?
4681 037420 254 00 0 00 037424 JRST DCOMA2 ; no - continue
4682 037421 260 17 1 06 037504 GO @DCOLDB(6) ; yes - get data byte
4683 037422 037 17 0 00 000003 PNTOCF
4684 037423 037 01 0 00 000040 PSPF
4685
4686 037424 256 00 0 06 037462 DCOMA2: XCT DCOMSG(6) ; no - print field name
4687 037425 037 10 0 00 000003 DCOMA3: TTSIXB ; get input
4688 ALTCHK [GET XXW# ; adjust stack properly
4689 SKIPN $TWCNT ; did a timeout occur?
4690 JRST DCOMA3 ; yes - keep looking for input
4691 MOVE $TTCHR ; get character typed
4692 CAIN "^" ; backup character?
4693 JRST DCOMA0 ; yes - backup
4694 CAIN 32 ; control-Z?
4695 PCRLF ; yes - a final blank line
4696 CAIN 32 ; control-Z?
4697 JRST DCOMAX ; yes - exit - done
4698 CAIN "?" ; question mark?
4699 JRST [XCT MWDQUE(6); yes - handle
4700 PCRLF
4701 JRST DCOMAA]
4702 FMSGCD <? Argument error>
4703 GO CLRBUF
4704 PCRLF
4705 GO FIOFF
4706 037426 007 00 0 00 060040 JRST DCOMA2] ; no - error - reask question
4707 DCOM3A: JUMPE [MOVE $TTCHR ; anything typed? if a space, keep
4708 CAIN 40 ; looking for an argument, if not
4709 JRST DCOMA3 ; exit
4710 037427 322 00 0 00 060061 JRST DCOMA5]
4711 037430 202 00 0 00 064374' MOVEM SAVFLD# ; save argument
4712 037431 200 01 0 00 064374' MOVE 1,SAVFLD ; get into AC1
4713 037432 260 17 0 00 034147* GO CONVSX ; convert to octal
4714 037433 334 00 0 00 000000 SKIPA
4715 037434 254 00 0 00 037444 JRST DCOMA4 ; ok - insert into data
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 108
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0295
4716
4717 ; Unrecognizable - check if a field was specified
4718
4719 037435 200 01 0 00 064374' MOVE 1,SAVFLD ; get command into AC1
4720 037436 201 02 0 00 037550 MOVEI 2,FLDLIS ; get address of field list
4721 037437 260 17 0 00 034716* GO .COMM ; handle command decoding
4722 JRST [FMSGCD <? Argument error>
4723 GO CLRBUF
4724 PCRLF
4725 GO FIOFF
4726 037440 254 00 0 00 060054 JRST DCOMA2] ; no - error - reask question
4727 037441 370 00 0 00 000001 SOS 1 ; normalize to -1..12
4728 037442 200 06 0 00 000001 MOVE 6,1 ; put into AC6
4729 037443 254 00 0 00 037401 JRST DCOMA1 ; go handle the field
4730
4731 ; Insert field entry
4732
4733 037444 200 00 0 00 000001 DCOMA4: MOVE 1 ; get number
4734 037445 260 17 1 06 037526 GO @DCODPB(6) ; yes - insert it
4735 037446 200 00 0 00 030231 DCOMA5: MOVE $TTCHR ; get last character typed
4736 037447 312 00 0 00 000015 CAME 15 ; CRLF?
4737 037450 254 00 0 00 037401 JRST DCOMA1 ; no - get next entry
4738
4739 ; Finally, write the location
4740
4741 037451 260 17 0 00 037703 DCOMAX: GO DWCRAM ; go write CRAM location
4742 037452 350 01 0 00 037253 AOS 1,CRAMFR ; update the specified address
4743 037453 202 01 0 00 037262 MOVEM 1,ANEXT ; save next address
4744 037454 313 01 0 00 037254 CAMLE 1,CRAMTO ; reach end yet?
4745 037455 263 17 0 00 000000 RTN ; yes - exit
4746 037456 200 00 0 00 064334' MOVE DFLAG ; get dispatch flag
4747 037457 302 00 0 00 000003 CAIE 3 ; alter?
4748 037460 254 00 0 00 037352 JRST DCOMDB ; no - deposit by bit field
4749 037461 254 00 0 00 037357 JRST DCOMAL ; yes - alter by bit field
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 109
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0296
4750
4751 ; Input message table
4752
4753 037462 037 01 0 00 060065 DCOMSG: FMSG <J - >
4754 037463 037 01 0 00 060066 FMSG <PAR - >
4755 037464 037 01 0 00 060070 FMSG <OENA - >
4756 037465 037 01 0 00 060072 FMSG <MGC - >
4757 037466 037 01 0 00 060074 FMSG <SORC - >
4758 037467 037 01 0 00 060076 FMSG <FUNC - >
4759 037470 037 01 0 00 060100 FMSG <DEST - >
4760 037471 037 01 0 00 060102 FMSG <CENA - >
4761 037472 037 01 0 00 060104 FMSG <RAM - >
4762 037473 037 01 0 00 060106 FMSG <A - >
4763 037474 037 01 0 00 060107 FMSG <B - >
4764 037475 037 01 0 00 060110 FMSG <SK - >
4765 037476 037 01 0 00 060112 FMSG <BUS - >
4766 037477 037 01 0 00 060114 FMSG <CRY - >
4767 037500 037 01 0 00 060116 FMSG <CTL - >
4768 037501 037 01 0 00 060120 FMSG <TIME - >
4769 037502 037 01 0 00 060122 FMSG <SPARE - >
4770 037503 037 01 0 00 060124 FMSG <MARK - >
4771
4772 ; Microword load byte pointer table
4773
4774 DCOLDB: [LDB [POINT 12,CWORDL,17] ; J - Bits 6-17
4775 037504 000000 060127 RTN]
4776 [LDB [POINT 1,CWORDL,18] ; PAR - Bit 18
4777 037505 000000 060132 RTN]
4778 [LDB [POINT 1,CWORDL,19] ; OENA - Bit 19
4779 037506 000000 060135 RTN]
4780 [LDB [POINT 10,CWORDL,29] ; MGC - Bits 20-29
4781 037507 000000 060140 RTN]
4782 [LDB [POINT 3,CWORDL,32] ; SORC - Bits 30-32
4783 037510 000000 060143 RTN]
4784 [LDB [POINT 3,CWORDL,35] ; FUNC - Bits 33-35
4785 037511 000000 060146 RTN]
4786 [LDB [POINT 3,CWORDR,8] ; DEST - Bits 6-8
4787 037512 000000 060151 RTN]
4788 [LDB [POINT 1,CWORDR,9] ; CENA - Bit 9
4789 037513 000000 060154 RTN]
4790 [LDB [POINT 1,CWORDR,10] ; RAM - Bit 10
4791 037514 000000 060157 RTN]
4792 [LDB [POINT 4,CWORDR,14] ; A - Bits 11-14
4793 037515 000000 060162 RTN]
4794 [LDB [POINT 4,CWORDR,18] ; B - Bits 15-18
4795 037516 000000 060165 RTN]
4796 [LDB [POINT 5,CWORDR,23] ; SK - Bits 19-23
4797 037517 000000 060170 RTN]
4798 [LDB [POINT 3,CWORDR,26] ; BUS - Bits 24-26
4799 037520 000000 060173 RTN]
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 110
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0297
4800 [LDB [POINT 1,CWORDR,27] ; CRY - Bits 27
4801 037521 000000 060176 RTN]
4802 [LDB [POINT 4,CWORDR,31] ; OP - Bits 28-31
4803 037522 000000 060201 RTN]
4804 [LDB [POINT 1,CWORDR,32] ; TIME - Bit 32
4805 037523 000000 060204 RTN]
4806 [LDB [POINT 2,CWORDR,34] ; SPARE - Bits 33-34
4807 037524 000000 060207 RTN]
4808 [LDB [POINT 1,CWORDR,35] ; MARK - Bit 35
4809 037525 000000 060212 RTN]
4810
4811 ; Microword deposit byte pointer table
4812
4813 DCODPB: [DPB [POINT 12,CWORDL,17] ; J - Bits 6-17
4814 037526 000000 060214 RTN]
4815 [DPB [POINT 1,CWORDL,18] ; PAR - Bit 18
4816 037527 000000 060216 RTN]
4817 [DPB [POINT 1,CWORDL,19] ; OENA - Bit 19
4818 037530 000000 060220 RTN]
4819 [DPB [POINT 10,CWORDL,29] ; MGC - Bits 20-29
4820 037531 000000 060222 RTN]
4821 [DPB [POINT 3,CWORDL,32] ; SORC - Bits 30-32
4822 037532 000000 060224 RTN]
4823 [DPB [POINT 3,CWORDL,35] ; FUNC - Bits 33-35
4824 037533 000000 060226 RTN]
4825 [DPB [POINT 3,CWORDR,8] ; DEST - Bits 6-8
4826 037534 000000 060230 RTN]
4827 [DPB [POINT 1,CWORDR,9] ; CENA - Bit 9
4828 037535 000000 060232 RTN]
4829 [DPB [POINT 1,CWORDR,10] ; RAM - Bit 10
4830 037536 000000 060234 RTN]
4831 [DPB [POINT 4,CWORDR,14] ; A - Bits 11-14
4832 037537 000000 060236 RTN]
4833 [DPB [POINT 4,CWORDR,18] ; B - Bits 15-18
4834 037540 000000 060240 RTN]
4835 [DPB [POINT 5,CWORDR,23] ; SK - Bits 19-23
4836 037541 000000 060242 RTN]
4837 [DPB [POINT 3,CWORDR,26] ; BUS - Bits 24-26
4838 037542 000000 060244 RTN]
4839 [DPB [POINT 1,CWORDR,27] ; CRY - Bits 27
4840 037543 000000 060246 RTN]
4841 [DPB [POINT 4,CWORDR,31] ; OP - Bits 28-31
4842 037544 000000 060250 RTN]
4843 [DPB [POINT 1,CWORDR,32] ; TIME - Bit 32
4844 037545 000000 060252 RTN]
4845 [DPB [POINT 2,CWORDR,34] ; SPARE - Bits 33-34
4846 037546 000000 060254 RTN]
4847 [DPB [POINT 1,CWORDR,35] ; MARK - Bit 35
4848 037547 000000 060256 RTN]
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 111
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0298
4849
4850 ; Field command table
4851
4852 037550 52 00 00 00 00 00 FLDLIS: SIXBIT /J/
4853 037551 60 41 62 00 00 00 SIXBIT /PAR/
4854 037552 57 45 56 41 00 00 SIXBIT /OENA/
4855 037553 55 47 43 00 00 00 SIXBIT /MGC/
4856 037554 63 57 62 43 00 00 SIXBIT /SORC/
4857 037555 46 65 56 43 00 00 SIXBIT /FUNC/
4858 037556 44 45 63 64 00 00 SIXBIT /DEST/
4859 037557 43 45 56 41 00 00 SIXBIT /CENA/
4860 037560 62 41 55 00 00 00 SIXBIT /RAM/
4861 037561 41 00 00 00 00 00 SIXBIT /A/
4862 037562 42 00 00 00 00 00 SIXBIT /B/
4863 037563 63 53 00 00 00 00 SIXBIT /SK/
4864 037564 42 65 63 00 00 00 SIXBIT /BUS/
4865 037565 43 62 71 00 00 00 SIXBIT /CRY/
4866 037566 43 64 54 00 00 00 SIXBIT /CTL/
4867 037567 64 51 55 45 00 00 SIXBIT /TIME/
4868 037570 63 60 41 62 45 00 SIXBIT /SPARE/
4869 037571 55 41 62 53 00 00 SIXBIT /MARK/
4870 037572 000000 000000 0
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 112
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0299
4871
4872 ; Help text
4873
4874 037573 037 01 0 00 060260 MWDQUE: FMSGCD <Jump field>
4875 037574 037 01 0 00 060263 FMSGCD <Parity bit - Pgm calculates it unless SET PAR is off>
4876 037575 037 01 0 00 060277 FMSGCD <Ouput enable>
4877 037576 037 01 0 00 060303 FMSGCD <Magic # field>
4878 FMSGD <
4879 Source field:
4880 0-AQ 2-0Q 4-0A 6-DQ
4881 037577 037 01 0 00 060307 1-AB 3-0B 5-DA 7-D0>
4882 FMSGD <
4883 ALU Function:
4884 0-Plus 2-Rmin 4-And 6-Xor
4885 037600 037 01 0 00 060325 1-Smin 3-Or 5-Nand 7-Xnor>
4886 FMSGD <
4887 Destination field:
4888 0-QF 2-BA 4-/2BQF 6-*2BQF
4889 037601 037 01 0 00 060346 1-F 3-BF 5-/2BF 7-*2BF>
4890 037602 037 01 0 00 060367 FMSGCD <CC Enable>
4891 037603 037 01 0 00 060372 FMSGCD <RAM Mode>
4892 037604 037 01 0 00 060375 FMSGCD <Port A 0-17>
4893 037605 037 01 0 00 060401 FMSGCD <Port B 0-17>
4894 FMSGD <
4895 Skip field - Select:
4896 00/20-CCCbusAvail 10/30-CCEbusRqst
4897 01/21-CCGrntCsr 11/31-CCOverflow
4898 02/22-CCFeq0 12/32-CCMbSign
4899 03/23-CCCsrChng 13/33-CCMVParChk
4900 04/24-CCEbParerr 14/34-CCCbusParErr
4901 05/25-CCRcvBufAFul 15/35-CCPliParErr
4902 06/26-CCRcvBufBFul 16/36-CCChanErr
4903 07/27-CCXmtrAttn 17/37-CCCbLstWd
4904
4905 20/30-LoadSadReg 23/33-LdLocalMem
4906 21/31-SelMbusFld 24/34-SelCnstFld
4907 037606 037 01 0 00 060405 22/32-RdLocalMem>
4908 FMSGD <
4909 Bus Ctl field - Select:
4910 0-Nul 2-Mbus 4-Cbus
4911 037607 037 01 0 00 060532 1-Pli 3-Fmtr 5-Ebus>
4912 037610 037 01 0 00 060552 FMSGCD <Carry input>
4913 FMSGD <
4914 2910 Control field:
4915 00-JZ 04-PUSH 10-RFCT 14-LDCT
4916 01-CJS 05-JSRP 11-RPCT 15-LOOP
4917 02-JMAP 06-CJV 12-CRTN 16-CONT
4918 037611 037 01 0 00 060556 03-CJP 07-JRP 13-CJPP 17-TWB>
4919 037612 037 01 0 00 060621 FMSGCD <Time field>
4920 037613 037 01 0 00 060624 FMSGCD <Spare bits>
4921 037614 037 01 0 00 060627 FMSGCD <Mark bit>
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 113
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0300
4922
4923 ;#*********************************************************************
4924 ; Zero CRAM addresses specified by "PARG1" and "PARG2"
4925 ;#*********************************************************************
4926
4927 037615 402 00 0 00 037256 DCOMZE: SETZM CWORDL ; clear CRAM words left and
4928 037616 402 00 0 00 037257 SETZM CWORDR ; right
4929 037617 200 00 0 00 037253 MOVE CRAMFR ; get the address to modify
4930 037620 202 00 0 00 037255 MOVEM CADDR ; save address for writing
4931 037621 260 17 0 00 037703 GO DWCRAM ; go write CRAM location
4932 037622 037 07 0 00 000003 TTALTM ; altmode key struck?
4933 037623 334 00 0 00 000000 SKIPA ; no - proceed
4934 037624 263 17 0 00 000000 RTN ; yes - exit
4935 037625 350 01 0 00 037253 AOS 1,CRAMFR ; update the specified address
4936 037626 202 01 0 00 037262 MOVEM 1,ANEXT ; save next address
4937 037627 317 01 0 00 037254 CAMG 1,CRAMTO ; reach end yet?
4938 037630 254 00 0 00 037615 JRST DCOMZE ; no - loop till done
4939 037631 263 17 0 00 000000 RTN ; yes - exit
4940
4941
4942 ;#*********************************************************************
4943 ; Examine CRAM locations
4944 ;#*********************************************************************
4945
4946 037632 200 00 0 00 037253 DCOMEX: MOVE CRAMFR ; get the address to modify
4947 037633 202 00 0 00 037255 MOVEM CADDR ; save address
4948 037634 037 00 0 00 030242 PCRL
4949 037635 001 04 0 00 037255 PNTOCC 4,CADDR ; print address
4950 037636 037 00 0 00 060632 TMSG </ >
4951 037637 260 17 0 00 037735 GO DRCRAM ; read CRAM location
4952 037640 255 00 0 00 000000 JFCL ; error return
4953 037641 200 02 0 00 037256 MOVE 2,CWORDL ; get left half
4954 037642 200 03 0 00 037257 MOVE 3,CWORDR ; get right half
4955 037643 260 17 0 00 043103 GO PNTWD ; print it
4956 037644 037 07 0 00 000003 TTALTM ; altmode key struck?
4957 037645 334 00 0 00 000000 SKIPA ; no - proceed
4958 JRST [SETOM ALTF ; yes - set altmode typed flag
4959 SETZM MULFLG ; and clear 'examine next' flag
4960 037646 254 00 0 00 060633 JRST DCOMEZ] ; and exit
4961 037647 350 01 0 00 037253 AOS 1,CRAMFR ; update the specified address
4962 037650 202 01 0 00 037262 MOVEM 1,ANEXT ; save next address
4963 037651 317 01 0 00 037254 CAMG 1,CRAMTO ; reach end yet?
4964 037652 254 00 0 00 037632 JRST DCOMEX ; no - loop till done
4965 037653 336 00 0 00 064354' DCOMEZ: SKIPN MULFLG ; in 'examine next'?
4966 037654 037 00 0 00 030242 PCRL ; no - print blank line
4967 037655 263 17 0 00 000000 RTN ; yes - exit
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 114
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0301
4968
4969 ;#*********************************************************************
4970 ; List CRAM locations
4971 ;#*********************************************************************
4972
4973 ; Print this CRAM entry
4974 037656 332 00 0 00 064355' DCOMLI: SKIPE MULINI ; in 'examine next'?
4975 037657 037 00 0 00 060636 TMSGC <ADDR/ JUMP PAR OUT MGC SOR FUN DES CC RAM PA PB SK BUS CRY CTL TM SP MK>
4976 037660 200 00 0 00 037253 DCOML0: MOVE CRAMFR ; get the address to list
4977 037661 202 00 0 00 037255 MOVEM CADDR ; save address
4978 037662 260 17 0 00 037735 GO DRCRAM ; read CRAM location
4979 037663 255 00 0 00 000000 JFCL ; error return
4980 037664 037 00 0 00 030242 PCRL ; start a new line
4981 037665 001 04 0 00 037255 PNTOCC 4,CADDR ; print cram address
4982 037666 037 00 0 00 060632 TMSG </ >
4983 037667 200 02 0 00 037256 MOVE 2,CWORDL ; get left word
4984 037670 200 03 0 00 037257 MOVE 3,CWORDR ; get right word
4985 037671 260 17 0 00 043007 GO PNTCRM ; go print it
4986 037672 332 00 0 00 064326' SKIPE ALTF ; altmode typed?
4987 037673 254 00 0 00 037700 JRST DCOMLX ; yes - return
4988 037674 350 01 0 00 037253 AOS 1,CRAMFR ; no - update the specified address
4989 037675 202 01 0 00 037262 MOVEM 1,ANEXT ; save next address
4990 037676 317 01 0 00 037254 CAMG 1,CRAMTO ; reach end yet?
4991 037677 254 00 0 00 037660 JRST DCOML0 ; no - loop till done
4992 037700 336 00 0 00 064354' DCOMLX: SKIPN MULFLG ; in 'examine next'?
4993 037701 037 00 0 00 030242 PCRL ; no - print blank line
4994 037702 263 17 0 00 000000 RTN ; yes - exit
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 115
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0302
4995
4996 ;#********************************************************************
4997 ; DWCRAM - Load CRAM word at 'CADDR' with data in 'CWORDL' and 'CWORDR'
4998 ;#********************************************************************
4999
5000 037703 261 17 0 00 000000 DWCRAM: RPUT (0,1,2,3) ; save AC's
5001
5002 037707 200 01 0 00 037255 MOVE 1,CADDR ; get actual CRAM load address
5003 037710 242 01 0 00 000001 LSH 1,1 ; convert to address for RAR
5004 037711 660 01 0 00 000001 TRO 1,1 ; set bit 12 (for left 30 bits)
5005 037712 260 17 0 00 037166* GO LDRAR ; load RAR with it
5006 037713 200 02 0 00 037256 MOVE 2,CWORDL ; get left 30 bits
5007 037714 200 03 0 00 037257 MOVE 3,CWORDR ; get right 30 bits
5008 037715 400 01 0 00 000000 SETZ 1, ; ignore 'bad parity' bit
5009 037716 332 00 0 00 035271 SKIPE PARFLG ; calculate parity?
5010 037717 260 17 0 00 043125 GO CALPAR ; yes - do so
5011 037720 200 01 0 00 000002 MOVE 1,2 ; get left 30 bits
5012 037721 260 17 0 00 000000* GO LDCRAM ; load it
5013
5014 037722 200 01 0 00 037255 MOVE 1,CADDR ; get actual CRAM load address
5015 037723 242 01 0 00 000001 LSH 1,1 ; convert to address for RAR
5016 037724 620 01 0 00 000001 TRZ 1,1 ; clear bit 12 (for right 30 bits)
5017 037725 260 17 0 00 037712* GO LDRAR ; load address
5018 037726 200 01 0 00 000003 MOVE 1,3 ; get right 30 bits
5019 037727 260 17 0 00 037721* GO LDCRAM ; load it
5020 037730 262 17 0 00 000003 RGET (3,2,1,0) ; restore AC's
5021
5022 037734 263 17 0 00 000000 RTN
5023
5024 ;#********************************************************************
5025 ; DRCRAM - Read CRAM word at 'CADDR' into 'CWORDL' and 'CWORDR'
5026 ;#********************************************************************
5027
5028 037735 261 17 0 00 000000 DRCRAM: RPUT (0,1) ; save AC's
5029
5030 037737 200 01 0 00 037255 MOVE 1,CADDR ; get actual CRAM address
5031 037740 242 01 0 00 000001 LSH 1,1 ; convert to address for RAR
5032 037741 660 01 0 00 000001 TRO 1,1 ; set bit 12 (for left 30 bits)
5033 037742 260 17 0 00 037725* GO LDRAR ; load RAR with it
5034 037743 260 17 0 00 000000* GO RDCRAM ; load it
5035 037744 202 01 0 00 037256 MOVEM 1,CWORDL ; save it
5036
5037 037745 200 01 0 00 037255 MOVE 1,CADDR ; get actual CRAM load address
5038 037746 242 01 0 00 000001 LSH 1,1 ; convert to address for RAR
5039 037747 620 01 0 00 000001 TRZ 1,1 ; clear bit 12 (for right 30 bits)
5040 037750 260 17 0 00 037742* GO LDRAR ; load address
5041 037751 260 17 0 00 037743* GO RDCRAM ; load it
5042 037752 202 01 0 00 037257 MOVEM 1,CWORDR ; save it
5043 037753 262 17 0 00 000001 RGET (1,0) ; restore AC's
5044
5045 037755 263 17 0 00 000000 RTN ; return
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 116
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0303
5046
5047 ;#********************************************************************
5048 ;* DEALU - Examine 2901 registers
5049 ;
5050 ; Arguments: Reg1,Reg2
5051 ;#********************************************************************
5052
5053 037756 200 00 0 00 040260 DEALU: MOVE ALUFR ; set up default of register range
5054 037757 202 00 0 00 064364' MOVEM RALUB# ; to be whatever was typed before
5055 037760 200 00 0 00 040261 MOVE ALUTO ; or if nothing typed, then 0-20
5056 037761 202 00 0 00 064365' MOVEM RALUE#
5057
5058 ; Get arguments
5059
5060 037762 200 01 0 00 060664 MOVE 1,[FMSGCD <E2901 reg1,reg2 (CR) (20=QReg)>]
5061 037763 260 17 0 00 037332* GO .OARG ; get 1st argument
5062 037764 263 17 0 00 000000 RTN ; error/altmode/question - exit
5063 037765 254 00 0 00 037777 JRST DEALU0 ; no arguments given - continue
5064 037766 200 00 0 00 037335* MOVE ARGUM ; get argument
5065 037767 202 00 0 00 064364' MOVEM RALUB ; save in 'from' location
5066 037770 202 00 0 00 064365' MOVEM RALUE ; save in 'to' location
5067
5068 037771 210 01 0 00 060672 MOVN 1,[FMSGCD <E2901 reg1,reg2 (CR)>]
5069 037772 260 17 0 00 037763* GO .OARG ; get 2nd argument
5070 037773 263 17 0 00 000000 RTN ; error/altmode/question - exit
5071 037774 254 00 0 00 037777 JRST DEALU0 ; no arguments given - continue
5072 037775 200 00 0 00 037766* MOVE ARGUM ; get argument
5073 037776 202 00 0 00 064365' MOVEM RALUE ; save in 'to' location
5074
5075 ; Now range check the arguments
5076
5077 037777 331 01 0 00 064364' DEALU0: SKIPL 1,RALUB ; 1st argument in range?
5078 040000 303 01 0 00 000020 CAILE 1,20
5079 JRST [FMSGCD <? Range of 2901 registers is 0-20 (20=QReg)>
5080 SETOM ALTF
5081 GO FIOFF
5082 040001 254 00 0 00 060705 RTN]
5083 040002 331 01 0 00 064365' SKIPL 1,RALUE ; 2nd argument in range?
5084 040003 303 01 0 00 000020 CAILE 1,20
5085 JRST [FMSGCD <? Range of 2901 registers is 0-20 (20=QReg)>
5086 GO FIOFF
5087 040004 254 00 0 00 060711 RTN]
5088 040005 274 01 0 00 064364' SUB 1,RALUB ; see if range ok
5089 JUMPL 1,[FMSGCD <? Range nonsensical>
5090 GO FIOFF
5091 040006 321 01 0 00 057176 RTN]
5092 040007 200 00 0 00 064364' MOVE RALUB ; get 'from' argument
5093 040010 202 00 0 00 040260 MOVEM ALUFR ; save it
5094 040011 200 00 0 00 064365' MOVE RALUE ; get 'to' argument
5095 040012 202 00 0 00 040261 MOVEM ALUTO ; save it
5096 040013 201 00 0 00 000006 MOVEI 6 ; get E2901 flag
5097 040014 202 00 0 00 064334' MOVEM DFLAG ; save it
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 117
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0304
5098
5099 ; Save CRAM location
5100
5101 040015 200 01 0 00 060714 MOVE 1,[-1,,7750] ; set up AOBJN word
5102 040016 260 17 0 00 043340 GO SAVCRM ; save the CRAM locations
5103
5104 ; Now do each register
5105
5106 040017 037 00 0 00 060715 DEALU1: TMSGC <R> ; start a new line
5107 040020 200 02 0 00 064364' MOVE 2,RALUB ; get register number
5108 040021 200 00 0 00 000002 MOVE 2 ; get register number
5109 040022 137 02 0 00 060716 DPB 2,[POINT 4,DEALUM+1,14] ; save it in microword
5110 040023 306 02 0 00 000020 CAIN 2,20 ; Q-Register?
5111 040024 037 00 0 00 060717 TMSG <Q> ; yes - print Q
5112 040025 302 02 0 00 000020 CAIE 2,20 ; Q-Register?
5113 040026 037 16 0 00 000003 PNTOCS ; no - print register number
5114 040027 037 00 0 00 060632 TMSG </ >
5115 040030 201 00 0 00 000004 MOVEI 4 ; get source field of 4 (0A)
5116 040031 306 02 0 00 000020 CAIN 2,20 ; Q-Register?
5117 040032 201 00 0 00 000002 MOVEI 2 ; yes - use source of 2 (0Q)
5118 040033 137 00 0 00 060720 DPB [POINT 3,DEALUM+1,2] ; set up source field
5119 040034 201 01 0 00 040237 MOVEI 1,DEALUM ; set up microcode address
5120 040035 260 17 0 00 042507 GO MLOADN ; load/verify it
5121 040036 255 00 0 00 000000 JFCL ; ignore error
5122 040037 201 01 0 00 007750 MOVEI 1,7750 ; get start address
5123 040040 242 01 0 00 000001 LSH 1,1 ; position correctly
5124 040041 260 17 0 00 037750* GO LDRAR ; load the RAR
5125 040042 201 01 0 00 220010 MOVEI 1,SINCYC!MPRUN!TSTEBF ; single step once
5126 040043 260 17 0 00 037165* GO LDCSR
5127 040044 260 17 0 00 037101* GO RDEBUF ; read EBUF contents
5128 040045 200 00 0 00 000001 MOVE 1 ; get register data
5129 040046 037 13 0 00 000000 PNTHW ; print it
5130 040047 350 00 0 00 000002 AOS 2 ; point to next register
5131 040050 202 02 0 00 037262 MOVEM 2,ANEXT ; save next register
5132 040051 037 07 0 00 000003 TTALTM ; altmode key struck?
5133 040052 334 00 0 00 000000 SKIPA ; no - proceed
5134 JRST [SETOM ALTF ; yes - set altmode typed flag
5135 SETZM MULFLG ; and clear 'examine next' flag
5136 040053 254 00 0 00 060721 JRST DEALUX] ; and exit
5137 040054 350 01 0 00 064364' AOS 1,RALUB ; point to next register
5138 040055 317 01 0 00 064365' CAMG 1,RALUE ; done yet?
5139 040056 254 00 0 00 040017 JRST DEALU1 ; no - loop till done
5140
5141 ; Restore CRAM location and exit
5142
5143 040057 336 00 0 00 064354' DEALUX: SKIPN MULFLG ; in 'examine next'?
5144 040060 037 00 0 00 030242 PCRL ; no - print blank line
5145 040061 200 01 0 00 060714 MOVE 1,[-1,,7750] ; set up AOBJN word
5146 040062 260 17 0 00 043362 GO RESCRM ; restore CRAM data
5147 040063 263 17 0 00 000000 RTN ; return
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 118
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0305
5148
5149 ;#********************************************************************
5150 ;* DDALU - Deposit register
5151 ;
5152 ; Format: DALU reg,data
5153 ;#********************************************************************
5154
5155 040064 200 01 0 00 060731 DDALU: MOVE 1,[FMSGCD <DALU reg,data (CR)>]
5156 040065 260 17 0 00 035562* GO .DARG ; get register number
5157 040066 263 17 0 00 000000 RTN ; error/altmode/question - exit
5158 JRST [FMSGCD <? Missing argument>
5159 GO FIOFF
5160 040067 254 00 0 00 054406 RTN]
5161 040070 331 01 0 00 037775* DDALU0: SKIPL 1,ARGUM ; argument in range?
5162 040071 303 01 0 00 000020 CAILE 1,20
5163 JRST [FMSGCD <? Range of 2901 registers is 0-20 (20=QReg)>
5164 GO FIOFF
5165 040072 254 00 0 00 060711 RTN]
5166 040073 202 01 0 00 064364' MOVEM 1,RALUB ; get 'from' argument
5167 040074 202 01 0 00 040260 MOVEM 1,ALUFR ; save it
5168 040075 202 01 0 00 064365' MOVEM 1,RALUE ; get 'to' argument
5169 040076 202 01 0 00 040261 MOVEM 1,ALUTO ; save it
5170 040077 200 01 0 00 060731 MOVE 1,[FMSGCD <DALU reg,data (CR)>]
5171 040100 260 17 0 00 037772* GO .OARG ; get data
5172 040101 263 17 0 00 000000 RTN ; error/altmode/question - exit
5173 JRST [FMSGCD <? Missing argument>
5174 GO FIOFF
5175 040102 254 00 0 00 054406 RTN]
5176 040103 200 00 0 00 040070* MOVE ARGUM ; get argument
5177 040104 202 00 0 00 064345' MOVEM LARG2 ; save it
5178 040105 201 00 0 00 000007 MOVEI 7 ; get D2901 flag
5179 040106 202 00 0 00 064334' MOVEM DFLAG ; save it
5180
5181 ; Save CRAM locations
5182
5183 040107 200 01 0 00 060732 MOVE 1,[-5,,7750] ; set up AOBJN word
5184 040110 260 17 0 00 043340 GO SAVCRM ; save the CRAM locations
5185
5186 ; Load microcode
5187
5188 040111 200 02 0 00 064364' MOVE 2,RALUB ; get location to write
5189 040112 137 02 0 00 060733 DPB 2,[POINT 4,DDALUM+7,18] ; set up 2901 register
5190 040113 201 00 0 00 000002 MOVEI 2 ; get destination field of 2 (BA)
5191 040114 306 02 0 00 000020 CAIN 2,20 ; Q-Register?
5192 040115 201 00 0 00 000000 MOVEI 0 ; yes - use destination of 0 (QF)
5193 040116 137 00 0 00 060734 DPB [POINT 3,DDALUM+7,8] ; set up source field
5194 040117 201 01 0 00 040242 MOVEI 1,DDALUM ; set up microcode address
5195 040120 260 17 0 00 042507 GO MLOADN ; load/verify it
5196 040121 255 00 0 00 000000 JFCL ; ignore error
5197 040122 350 00 0 00 000002 AOS 2 ; point to next register
5198 040123 202 02 0 00 037262 MOVEM 2,ANEXT ; save next register
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 119
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0306
5199
5200 ; Now do the deposit
5201
5202 040124 201 01 0 00 007750 MOVEI 1,7750 ; get start address
5203 040125 242 01 0 00 000001 LSH 1,1 ; position correctly
5204 040126 260 17 0 00 040041* GO LDRAR ; load the RAR
5205 040127 201 01 0 00 000010 MOVEI 1,MPRUN ; set initial data
5206 040130 260 17 0 00 040043* GO LDCSR ; start the port
5207 040131 200 01 0 00 064345' MOVE 1,LARG2 ; get data to write
5208 040132 260 17 0 00 000000* GO .DATAO ; give to port
5209 040133 400 01 0 00 000000 SETZ 1, ; stop the port
5210 040134 260 17 0 00 040130* GO LDCSR
5211
5212 ; Check if additional arguments
5213
5214 040135 336 00 0 00 037300* SKIPN ARGFLG ; any more arguments
5215 040136 254 00 0 00 040142 JRST DDALUX ; no - exit
5216 040137 200 00 0 00 037262 MOVE ANEXT ; get register number
5217 040140 202 00 0 00 040103* MOVEM ARGUM ; save it
5218 040141 254 00 0 00 040070 JRST DDALU0 ; loop till done
5219
5220 ; Restore CRAM locations and exit
5221
5222 040142 200 01 0 00 060732 DDALUX: MOVE 1,[-5,,7750] ; set up AOBJN word
5223 040143 260 17 0 00 043362 GO RESCRM ; restore CRAM data
5224 040144 263 17 0 00 000000 RTN ; return
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 120
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0307
5225
5226 ;#********************************************************************
5227 ;* DZALU - Zero 2901 registers
5228 ;
5229 ; Format: ZALU reg1,reg2
5230 ;#********************************************************************
5231
5232 040145 200 00 0 00 040260 DZALU: MOVE ALUFR ; set up default of register range
5233 040146 202 00 0 00 064364' MOVEM RALUB ; to be whatever was typed before
5234 040147 200 00 0 00 040261 MOVE ALUTO ; or if nothing typed, then 0-0
5235 040150 202 00 0 00 064365' MOVEM RALUE
5236
5237 ; Get arguments
5238
5239 040151 200 01 0 00 060742 MOVE 1,[FMSGCD <ZALU reg1,reg2 (CR)>]
5240 040152 260 17 0 00 040065* GO .DARG ; get first argument
5241 040153 263 17 0 00 000000 RTN ; error/altmode/question - exit
5242 040154 254 00 0 00 040166 JRST DZALU0 ; no arguments given - continue
5243 040155 200 00 0 00 040140* MOVE ARGUM ; get argument
5244 040156 202 00 0 00 064364' MOVEM RALUB ; save in 'from' location
5245 040157 202 00 0 00 064365' MOVEM RALUE ; save in 'to' location
5246
5247 040160 210 01 0 00 060742 MOVN 1,[FMSGCD <ZALU reg1,reg2 (CR)>]
5248 040161 260 17 0 00 040152* GO .DARG ; get 2nd argument
5249 040162 263 17 0 00 000000 RTN ; error/altmode/question - exit
5250 040163 254 00 0 00 040166 JRST DZALU0 ; no arguments given - continue
5251 040164 200 00 0 00 040155* MOVE ARGUM ; get argument
5252 040165 202 00 0 00 064365' MOVEM RALUE ; save in 'to' location
5253
5254 ; Now range check the arguments
5255
5256 040166 331 01 0 00 064364' DZALU0: SKIPL 1,RALUB ; 1st argument in range?
5257 040167 303 01 0 00 000020 CAILE 1,20
5258 JRST [FMSGCD <? Range of 2901 registers is 0-20 (20=QReg)>
5259 GO FIOFF
5260 040170 254 00 0 00 060711 RTN]
5261 040171 331 01 0 00 064365' SKIPL 1,RALUE ; 2nd argument in range?
5262 040172 303 01 0 00 000020 CAILE 1,20
5263 JRST [FMSGCD <? Range of 2901 registers is 0-20 (20=QReg)>
5264 GO FIOFF
5265 040173 254 00 0 00 060711 RTN]
5266 040174 274 01 0 00 064364' SUB 1,RALUB ; see if range ok
5267 JUMPL 1,[FMSGCD <? Range nonsensical>
5268 GO FIOFF
5269 040175 321 01 0 00 057176 RTN]
5270 040176 200 00 0 00 064364' MOVE RALUB ; get 'from' argument
5271 040177 202 00 0 00 040260 MOVEM ALUFR ; save it
5272 040200 200 00 0 00 064365' MOVE RALUE ; get 'to' argument
5273 040201 202 00 0 00 040261 MOVEM ALUTO ; save it
5274 040202 201 00 0 00 000010 MOVEI 8 ; get Z2901 flag
5275 040203 202 00 0 00 064334' MOVEM DFLAG ; save it
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 121
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0308
5276
5277 ; Save CRAM location
5278
5279 040204 200 01 0 00 060714 MOVE 1,[-1,,7750] ; set up AOBJN word
5280 040205 260 17 0 00 043340 GO SAVCRM ; save the CRAM location
5281
5282 ; Now do each location
5283
5284 040206 200 02 0 00 064364' DZALU1: MOVE 2,RALUB ; get location to write
5285 040207 137 02 0 00 060743 DPB 2,[POINT 4,DZALUM+1,18] ; set up register number
5286 040210 201 00 0 00 000002 MOVEI 2 ; get destination field of 2 (BA)
5287 040211 306 02 0 00 000020 CAIN 2,20 ; Q-Register?
5288 040212 201 00 0 00 000000 MOVEI 0 ; yes - use destination of 0 (QF)
5289 040213 137 00 0 00 060744 DPB [POINT 3,DZALUM+1,8] ; set up destination field
5290 040214 201 01 0 00 040255 MOVEI 1,DZALUM ; set up microcode address
5291 040215 260 17 0 00 042507 GO MLOADN ; load/verify it
5292 040216 255 00 0 00 000000 JFCL ; ignore error
5293 040217 350 00 0 00 000002 AOS 2 ; point to next register
5294 040220 202 02 0 00 037262 MOVEM 2,ANEXT ; save next register
5295 040221 201 01 0 00 007750 MOVEI 1,7750 ; get start address
5296 040222 242 01 0 00 000001 LSH 1,1 ; position correctly
5297 040223 260 17 0 00 040126* GO LDRAR ; load the RAR
5298 040224 201 01 0 00 020010 MOVEI 1,MPRUN!SINCYC ; start it up
5299 040225 260 17 0 00 040134* GO LDCSR
5300 040226 037 07 0 00 000003 TTALTM ; altmode key struck?
5301 040227 334 00 0 00 000000 SKIPA ; no - proceed
5302 040230 254 00 0 00 040234 JRST DZALUX ; yes - exit
5303 040231 350 01 0 00 064364' AOS 1,RALUB ; point to next location
5304 040232 317 01 0 00 064365' CAMG 1,RALUE ; done yet?
5305 040233 254 00 0 00 040206 JRST DZALU1 ; no - loop till done
5306
5307 ; Restore CRAM location and exit
5308
5309 040234 200 01 0 00 060714 DZALUX: MOVE 1,[-1,,7750] ; set up AOBJN word
5310 040235 260 17 0 00 043362 GO RESCRM ; restore CRAM data
5311 040236 263 17 0 00 000000 RTN ; return
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 122
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0309
5312
5313 ; Microcode to examine 2901's
5314
5315 040237 775077 502004 DEALUM: MWORD <ADDR=7750,JMAP,J=7750,S0A,OR,D=1,OENA,SELE,MGC=4>
5316 040240 431000 005040
5317 040241 777777 777777 -1
5318
5319 ; Microcode to deposit 2901's
5320
5321 040242 775077 510000 DDALUM: MWORD <ADDR=7750,JMAP,J=7751,D=1> ; 7750
5322 040243 001000 000040
5323 040244 775177 530000 MWORD <CJP,J=7753,D=1,CENA,CCER> ; 7751
5324 040245 001400 100060
5325 040246 775277 510000 MWORD <JMAP,J=7751,D=1> ; 7752
5326 040247 001000 000040
5327 040250 775300 000010 MWORD <CONT,SD0,OR,D=2,SELE,MGC=10> ; 7753
5328 040251 732000 005340
5329 040252 775477 540000 MWORD <JMAP,J=7754,D=1> ; 7754
5330 040253 001000 000040
5331 040254 777777 777777 -1
5332
5333 ; Microcode to zero 2901's
5334
5335 040255 775077 500000 DZALUM: MWORD <ADDR=7750,JMAP,J=7750,S0A,AND,D=2>
5336 040256 442000 000040
5337 040257 777777 777777 -1
5338
5339 ; Arguments
5340
5341 040260 000000 000000 ALUFR: 0 ; default range of
5342 040261 000000 000020 ALUTO: 20 ; registers
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 123
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0310
5343
5344 ;#********************************************************************
5345 ;* DELOCS - Examine local storage
5346 ;
5347 ; Format: ELOCS adr1,adr2
5348 ;#********************************************************************
5349
5350 040262 200 00 0 00 040553 DELOCS: MOVE LOCFR ; set up default of local storage range
5351 040263 202 00 0 00 064370' MOVEM RLOCB# ; to be whatever was typed before
5352 040264 200 00 0 00 040554 MOVE LOCTO ; or if nothing typed, then 0-0
5353 040265 202 00 0 00 064371' MOVEM RLOCE#
5354
5355 ; Get arguments
5356
5357 040266 200 01 0 00 060753 MOVE 1,[FMSGCD <ELOCS addr1,addr2 (CR)>]
5358 040267 260 17 0 00 040161* GO .DARG ; get first address
5359 040270 263 17 0 00 000000 RTN ; error/altmode/question - exit
5360 040271 254 00 0 00 040303 JRST DELOC0 ; no arguments given - continue
5361 040272 200 00 0 00 040164* MOVE ARGUM ; get argument
5362 040273 202 00 0 00 064370' MOVEM RLOCB ; save in 'from' location
5363 040274 202 00 0 00 064371' MOVEM RLOCE ; save in 'to' location
5364
5365 040275 210 01 0 00 060753 MOVN 1,[FMSGCD <ELOCS addr1,addr2 (CR)>]
5366 040276 260 17 0 00 040267* GO .DARG ; get 2nd address
5367 040277 263 17 0 00 000000 RTN ; error/altmode/question - exit
5368 040300 254 00 0 00 040303 JRST DELOC0 ; no arguments given - continue
5369 040301 200 00 0 00 040272* MOVE ARGUM ; get argument
5370 040302 202 00 0 00 064371' MOVEM RLOCE ; save in 'to' location
5371
5372 ; Now range check the arguments
5373
5374 040303 331 01 0 00 064370' DELOC0: SKIPL 1,RLOCB ; 1st argument in range?
5375 040304 303 01 0 00 001777 CAILE 1,1777
5376 JRST [FMSGCD <? Range of local storage locations is 0-1777>
5377 SETOM ALTF
5378 GO FIOFF
5379 040305 254 00 0 00 060766 RTN]
5380 040306 331 01 0 00 064371' SKIPL 1,RLOCE ; 2nd argument in range?
5381 040307 303 01 0 00 001777 CAILE 1,1777
5382 JRST [FMSGCD <? Range of local storage locations is 0-1777>
5383 GO FIOFF
5384 040310 254 00 0 00 060772 RTN]
5385 040311 274 01 0 00 064370' SUB 1,RLOCB ; see if range ok
5386 JUMPL 1,[FMSGCD <? Range nonsensical>
5387 GO FIOFF
5388 040312 321 01 0 00 057176 RTN]
5389 040313 200 00 0 00 064370' MOVE RLOCB ; get 'from' argument
5390 040314 202 00 0 00 040553 MOVEM LOCFR ; save it
5391 040315 200 00 0 00 064371' MOVE RLOCE ; get 'to' argument
5392 040316 202 00 0 00 040554 MOVEM LOCTO ; save it
5393 040317 201 00 0 00 000011 MOVEI 9 ; get ELOCS flag
5394 040320 202 00 0 00 064334' MOVEM DFLAG ; save it
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 124
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0311
5395
5396 ; Save CRAM locations
5397
5398 040321 200 01 0 00 060775 MOVE 1,[-2,,7750] ; set up AOBJN word
5399 040322 260 17 0 00 043340 GO SAVCRM ; save the CRAM locations
5400 040323 200 07 0 00 064370' MOVE 7,RLOCB ; get initial address
5401
5402 ; Now do each location
5403
5404 040324 200 06 0 00 064370' DELOC1: MOVE 6,RLOCB ; get current address
5405 040325 274 06 0 00 000007 SUB 6,7 ; calculate word # (0..n)
5406 040326 602 06 0 00 000003 TRNE 6,3 ; multiple of 4?
5407 040327 037 00 0 00 051536 TMSG < > ; no - print a few spaces
5408 040330 606 06 0 00 000003 TRNN 6,3 ; multiple of 4?
5409 GO [TMSGC <LS> ; yes - start a new line
5410 MOVE RLOCB
5411 PNTOCS
5412 TMSG </ >
5413 040331 260 17 0 00 060777 RTN]
5414 040332 200 00 0 00 064370' MOVE RLOCB ; get local storage address
5415 040333 137 00 0 00 061004 DPB [POINT 10,DELOCM,35] ; save it in microword
5416 040334 201 01 0 00 040530 MOVEI 1,DELOCM ; set up microcode address
5417 040335 260 17 0 00 042507 GO MLOADN ; load/verify it
5418 040336 255 00 0 00 000000 JFCL ; ignore error
5419 040337 201 01 0 00 007750 MOVEI 1,7750 ; get start address
5420 040340 242 01 0 00 000001 LSH 1,1 ; position correctly
5421 040341 260 17 0 00 040223* GO LDRAR ; load the RAR
5422 040342 201 01 0 00 000010 MOVEI 1,MPRUN ; start it up
5423 040343 260 17 0 00 040225* GO LDCSR ; write to CSR register
5424 040344 201 01 0 00 200000 MOVEI 1,TSTEBF ; set up to read EBUF data
5425 040345 260 17 0 00 040343* GO LDCSR ; write to CSR register
5426 040346 260 17 0 00 040044* GO RDEBUF ; read EBUF contents
5427 040347 200 00 0 00 000001 MOVE 1 ; get register data
5428 040350 037 13 0 00 000000 PNTHW ; print it
5429 040351 037 07 0 00 000003 TTALTM ; altmode key struck?
5430 040352 334 00 0 00 000000 SKIPA ; no - proceed
5431 JRST [SETOM ALTF ; yes - set altmode typed flag
5432 SETZM MULFLG ; and clear 'examine next' flag
5433 040353 254 00 0 00 061005 JRST DELOCX] ; and exit
5434 040354 350 01 0 00 064370' AOS 1,RLOCB ; point to next location
5435 040355 202 01 0 00 037262 MOVEM 1,ANEXT ; save next location
5436 040356 317 01 0 00 064371' CAMG 1,RLOCE ; done yet?
5437 040357 254 00 0 00 040324 JRST DELOC1 ; no - loop till done
5438
5439 ; Restore CRAM locations and exit
5440
5441 040360 336 00 0 00 064354' DELOCX: SKIPN MULFLG ; in 'examine next'?
5442 040361 037 00 0 00 030242 PCRL ; no - print blank line
5443 040362 200 01 0 00 060775 MOVE 1,[-2,,7750] ; set up AOBJN word
5444 040363 260 17 0 00 043362 GO RESCRM ; restore CRAM data
5445 040364 263 17 0 00 000000 RTN ; return
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 125
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0312
5446
5447 ;#********************************************************************
5448 ;* DDLOCS - Deposit local storage
5449 ;
5450 ; Format: DLOCS adr,data
5451 ;#********************************************************************
5452
5453 040365 200 01 0 00 061015 DDLOCS: MOVE 1,[FMSGCD <DLOCS addr,data (CR)>]
5454 040366 260 17 0 00 040276* GO .DARG ; get address
5455 040367 263 17 0 00 000000 RTN ; error/altmode/question - exit
5456 JRST [FMSGCD <? Missing argument>
5457 GO FIOFF
5458 040370 254 00 0 00 054406 RTN]
5459 040371 200 00 0 00 040301* DDLOC0: MOVE ARGUM ; get argument
5460 040372 301 00 0 00 000000 CAIL 0 ; in range 0-1777?
5461 040373 303 00 0 00 001777 CAILE 1777
5462 JRST [FMSGCD <? Range of Local Storage addresses is 0-1777>
5463 GO FIOFF
5464 040374 254 00 0 00 061030 RTN]
5465 040375 202 00 0 00 040553 MOVEM LOCFR ; save 'from' argument
5466 040376 202 00 0 00 040554 MOVEM LOCTO ; save 'to' argument
5467 040377 200 01 0 00 061015 MOVE 1,[FMSGCD <DLOCS addr,data (CR)>]
5468 040400 260 17 0 00 040100* GO .OARG ; get data
5469 040401 263 17 0 00 000000 RTN ; error/altmode/question - exit
5470 JRST [FMSGCD <? Missing argument>
5471 GO FIOFF
5472 040402 254 00 0 00 054406 RTN]
5473 040403 200 00 0 00 040371* MOVE ARGUM ; get argument
5474 040404 202 00 0 00 064345' MOVEM LARG2# ; save it
5475 040405 201 00 0 00 000012 MOVEI ^D10 ; get DLOCS flag
5476 040406 202 00 0 00 064334' MOVEM DFLAG ; save it
5477
5478 ; Save CRAM locations
5479
5480 040407 200 01 0 00 060732 MOVE 1,[-5,,7750] ; set up AOBJN word
5481 040410 260 17 0 00 043340 GO SAVCRM ; save the CRAM locations
5482
5483 ; Load microcode
5484
5485 040411 200 00 0 00 040553 MOVE LOCFR ; get location to write
5486 040412 137 00 0 00 061033 DPB [POINT 10,DDLOCM+8,35] ; set up local storage address
5487 040413 202 00 0 00 037262 MOVEM ANEXT ; save address
5488 040414 350 00 0 00 037262 AOS ANEXT ; set to next address
5489 040415 201 01 0 00 040535 MOVEI 1,DDLOCM ; set up microcode address
5490 040416 260 17 0 00 042507 GO MLOADN ; load/verify it
5491 040417 255 00 0 00 000000 JFCL ; ignore error
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 126
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0313
5492
5493 ; Now do the deposit
5494
5495 040420 201 01 0 00 007750 MOVEI 1,7750 ; get start address
5496 040421 242 01 0 00 000001 LSH 1,1 ; position correctly
5497 040422 260 17 0 00 040341* GO LDRAR ; load the RAR
5498 040423 201 01 0 00 000010 MOVEI 1,MPRUN ; set initial data
5499 040424 260 17 0 00 040345* GO LDCSR ; start the port
5500 040425 200 01 0 00 064345' MOVE 1,LARG2 ; get data to write
5501 040426 260 17 0 00 040132* GO .DATAO ; give to port
5502 040427 400 01 0 00 000000 SETZ 1, ; stop the port
5503 040430 260 17 0 00 040424* GO LDCSR
5504
5505 ; Check if additional arguments
5506
5507 040431 336 00 0 00 040135* SKIPN ARGFLG ; any more arguments
5508 040432 254 00 0 00 040436 JRST DDLOCX ; no - exit
5509 040433 200 00 0 00 037262 MOVE ANEXT ; get register number
5510 040434 202 00 0 00 040403* MOVEM ARGUM ; save it
5511 040435 254 00 0 00 040371 JRST DDLOC0 ; loop till done
5512
5513 ; Restore CRAM locations and exit
5514
5515 040436 200 01 0 00 060732 DDLOCX: MOVE 1,[-5,,7750] ; set up AOBJN word
5516 040437 260 17 0 00 043362 GO RESCRM ; restore CRAM data
5517 040440 263 17 0 00 000000 RTN ; return
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 127
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0314
5518
5519 ;#********************************************************************
5520 ;* DZLOCS - Zero local storage
5521 ;
5522 ; Format: ZLOCS adr1,adr2
5523 ;#********************************************************************
5524
5525 040441 200 00 0 00 040553 DZLOCS: MOVE LOCFR ; set up default of local storage range
5526 040442 202 00 0 00 064370' MOVEM RLOCB# ; to be whatever was typed before
5527 040443 200 00 0 00 040554 MOVE LOCTO ; or if nothing typed, then 0-0
5528 040444 202 00 0 00 064371' MOVEM RLOCE#
5529
5530 ; Get arguments
5531
5532 040445 200 01 0 00 061042 MOVE 1,[FMSGCD <ZLOCS addr1,addr2 (CR)>]
5533 040446 260 17 0 00 040366* GO .DARG ; get first address
5534 040447 263 17 0 00 000000 RTN ; error/altmode/question - exit
5535 040450 254 00 0 00 040462 JRST DZLOC0 ; no arguments given - continue
5536 040451 200 00 0 00 040434* MOVE ARGUM ; get argument
5537 040452 202 00 0 00 064370' MOVEM RLOCB ; save in 'from' location
5538 040453 202 00 0 00 064371' MOVEM RLOCE ; save in 'to' location
5539
5540 040454 210 01 0 00 061042 MOVN 1,[FMSGCD <ZLOCS addr1,addr2 (CR)>]
5541 040455 260 17 0 00 040446* GO .DARG ; get 2nd address
5542 040456 263 17 0 00 000000 RTN ; error/altmode/question - exit
5543 040457 254 00 0 00 040462 JRST DZLOC0 ; no arguments given - continue
5544 040460 200 00 0 00 040451* MOVE ARGUM ; get argument
5545 040461 202 00 0 00 064371' MOVEM RLOCE ; save in 'to' location
5546
5547 ; Now range check the arguments
5548
5549 040462 331 01 0 00 064370' DZLOC0: SKIPL 1,RLOCB ; 1st argument in range?
5550 040463 303 01 0 00 001777 CAILE 1,1777
5551 JRST [FMSGCD <? Range of local storage locations is 0-1777>
5552 GO FIOFF
5553 040464 254 00 0 00 060772 RTN]
5554 040465 331 01 0 00 064371' SKIPL 1,RLOCE ; 2nd argument in range?
5555 040466 303 01 0 00 001777 CAILE 1,1777
5556 JRST [FMSGCD <? Range of local storage locations is 0-1777>
5557 GO FIOFF
5558 040467 254 00 0 00 060772 RTN]
5559 040470 274 01 0 00 064370' SUB 1,RLOCB ; see if range ok
5560 JUMPL 1,[FMSGCD <? Range nonsensical>
5561 GO FIOFF
5562 040471 321 01 0 00 057176 RTN]
5563 040472 200 00 0 00 064370' MOVE RLOCB ; get 'from' argument
5564 040473 202 00 0 00 040553 MOVEM LOCFR ; save it
5565 040474 200 00 0 00 064371' MOVE RLOCE ; get 'to' argument
5566 040475 202 00 0 00 040554 MOVEM LOCTO ; save it
5567 040476 201 00 0 00 000013 MOVEI ^D11 ; get ZLOCS flag
5568 040477 202 00 0 00 064334' MOVEM DFLAG ; save it
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 128
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0315
5569
5570 ; Save CRAM location
5571
5572 040500 200 01 0 00 060714 MOVE 1,[-1,,7750] ; set up AOBJN word
5573 040501 260 17 0 00 043340 GO SAVCRM ; save the CRAM locations
5574
5575 ; Now do each location
5576
5577 040502 200 00 0 00 064370' DZLOC1: MOVE RLOCB ; get location to write
5578 040503 137 00 0 00 061043 DPB [POINT 10,DZLOCM,35] ; set up local storage address
5579 040504 201 01 0 00 040550 MOVEI 1,DZLOCM ; set up microcode address
5580 040505 260 17 0 00 042507 GO MLOADN ; load/verify it
5581 040506 255 00 0 00 000000 JFCL ; ignore error
5582 040507 201 01 0 00 007750 MOVEI 1,7750 ; get start address
5583 040510 242 01 0 00 000001 LSH 1,1 ; position correctly
5584 040511 260 17 0 00 040422* GO LDRAR ; load the RAR
5585 040512 201 01 0 00 000010 MOVEI 1,MPRUN ; start it up
5586 040513 260 17 0 00 040430* GO LDCSR
5587 040514 400 01 0 00 000000 SETZ 1, ; stop the port
5588 040515 260 17 0 00 040513* GO LDCSR
5589 040516 037 07 0 00 000003 TTALTM ; altmode key struck?
5590 040517 334 00 0 00 000000 SKIPA ; no - proceed
5591 040520 254 00 0 00 040525 JRST DZLOCX ; yes - exit
5592 040521 350 01 0 00 064370' AOS 1,RLOCB ; point to next location
5593 040522 202 01 0 00 037262 MOVEM 1,ANEXT ; save next location
5594 040523 317 01 0 00 064371' CAMG 1,RLOCE ; done yet?
5595 040524 254 00 0 00 040502 JRST DZLOC1 ; no - loop till done
5596
5597 ; Restore CRAM location and exit
5598
5599 040525 200 01 0 00 060714 DZLOCX: MOVE 1,[-1,,7750] ; set up AOBJN word
5600 040526 260 17 0 00 043362 GO RESCRM ; restore CRAM data
5601 040527 263 17 0 00 000000 RTN ; return
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 129
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0316
5602
5603 ; Microcode to examine local storage
5604
5605 040530 775077 510000 DELOCM: MWORD <ADDR=7750,JMAP,J=7751,SD0,OR,D=2,RDLM>
5606 040531 732000 220040
5607 040532 775177 512004 MWORD <JMAP,J=7751,S0A,OR,D=1,OENA,SELE,MGC=4>
5608 040533 431000 005040
5609 040534 777777 777777 -1
5610
5611 ; Microcode to deposit local storage
5612
5613 040535 775077 510000 DDLOCM: MWORD <ADDR=7750,JMAP,J=7751,D=1> ; 7750
5614 040536 001000 000040
5615 040537 775177 530000 MWORD <CJP,J=7753,D=1,CENA,CCER> ; 7751
5616 040540 001400 100060
5617 040541 775277 510000 MWORD <JMAP,J=7751,D=1> ; 7752
5618 040542 001000 000040
5619 040543 775300 000010 MWORD <CONT,SD0,OR,D=2,SELE,MGC=10> ; 7753
5620 040544 732000 005340
5621 040545 775477 542000 MWORD <JMAP,J=7754,S0A,OR,D=1,OENA,LDLM,MGC=0>; 7754
5622 040546 431000 230040
5623 040547 777777 777777 -1
5624
5625 ; Microcode to zero local storage
5626
5627 040550 775077 502000 DZLOCM: MWORD <ADDR=7750,JMAP,J=7750,S0A,AND,D=1,LDLM,OENA>
5628 040551 441000 230040
5629 040552 777777 777777 -1
5630
5631 ; Arguments
5632
5633 040553 000000 000000 LOCFR: 0 ; default range of
5634 040554 000000 000000 LOCTO: 0 ; locations
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 130
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0317
5635
5636 ;#********************************************************************
5637 ;* DMARK - Set mark bit in CRAM locations
5638 ;#********************************************************************
5639
5640 ; First check for any argument
5641
5642 040555 336 00 0 00 040431* DMARK: SKIPN ARGFLG ; argument given?
5643 JRST [FMSGCD <? Missing argument>
5644 GO FIOFF
5645 040556 254 00 0 00 054406 RTN]
5646
5647 ; Obtain argument
5648
5649 040557 200 01 0 00 061052 DMARK0: MOVE 1,[FMSGCD <MARK addr,addr,... (CR)>]
5650 040560 260 17 0 00 040400* GO .OARG ; get argument
5651 040561 263 17 0 00 000000 RTN ; error/altmode/question - exit
5652 040562 263 17 0 00 000000 RTN ; done - no more arguments
5653 040563 331 01 0 00 040460* SKIPL 1,ARGUM ; argument out of range?
5654 040564 303 01 0 00 007777 CAILE 1,7777 ; (0-7777)
5655 JRST [FMSGCD <? Range of CRAM locations is 0000-7777>
5656 GO FIOFF
5657 040565 254 00 0 00 056630 RTN]
5658
5659 ; Then ensure the port is stopped
5660
5661 040566 260 17 0 00 037247* GO ISTOP ; stop the port
5662
5663 ; Now obtain CRAM data and set MARK bit
5664
5665 040567 202 01 0 00 037255 MOVEM 1,CADDR ; set up address to load
5666 040570 476 00 0 00 037256 SETOM CWORDL ; initialize left half
5667 040571 476 00 0 00 037257 SETOM CWORDR ; initialize right half
5668 040572 260 17 0 00 037735 GO DRCRAM ; read the data
5669 040573 200 02 0 00 037256 MOVE 2,CWORDL ; get left half
5670 040574 200 03 0 00 037257 MOVE 3,CWORDR ; get right half
5671 040575 660 03 0 00 000001 TRO 3,1 ; set mark bit
5672 040576 202 03 0 00 037257 MOVEM 3,CWORDR ; save data
5673 040577 261 17 0 00 035271 PUT PARFLG ; save state of parity flag
5674 040600 402 00 0 00 035271 SETZM PARFLG ; clear parity flag
5675 040601 260 17 0 00 037703 GO DWCRAM ; load CRAM data
5676 040602 262 17 0 00 035271 GET PARFLG ; restore state of parity flag
5677 040603 254 00 0 00 040557 JRST DMARK0 ; get next address
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 131
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0318
5678
5679 ;#********************************************************************
5680 ;* DRMARK - Remove mark bit in CRAM locations
5681 ;#********************************************************************
5682
5683 ; First check for any argument
5684
5685 040604 336 00 0 00 040555* DRMARK: SKIPN ARGFLG ; argument given?
5686 JRST [FMSGCD <? Missing argument>
5687 GO FIOFF
5688 040605 254 00 0 00 054406 RTN]
5689
5690 ; Obtain argument
5691
5692 040606 200 01 0 00 061061 DRMAR0: MOVE 1,[FMSGCD <RMARK addr,addr,... (CR)>]
5693 040607 260 17 0 00 040560* GO .OARG ; get argument
5694 040610 263 17 0 00 000000 RTN ; error/altmode/question - exit
5695 040611 263 17 0 00 000000 RTN ; done - no more arguments
5696 040612 331 01 0 00 040563* SKIPL 1,ARGUM ; argument out of range?
5697 040613 303 01 0 00 007777 CAILE 1,7777 ; (0-7777)
5698 JRST [FMSGCD <? Range of CRAM locations is 0000-7777>
5699 GO FIOFF
5700 040614 254 00 0 00 056630 RTN]
5701
5702 ; Then ensure the port is stopped
5703
5704 040615 260 17 0 00 040566* GO ISTOP ; stop the port
5705
5706 ; Now obtain CRAM data and set MARK bit
5707
5708 040616 202 01 0 00 037255 MOVEM 1,CADDR ; set up address to load
5709 040617 476 00 0 00 037256 SETOM CWORDL ; initialize left half
5710 040620 476 00 0 00 037257 SETOM CWORDR ; initialize right half
5711 040621 260 17 0 00 037735 GO DRCRAM ; read the data
5712 040622 200 02 0 00 037256 MOVE 2,CWORDL ; get left half
5713 040623 200 03 0 00 037257 MOVE 3,CWORDR ; get right half
5714 040624 620 03 0 00 000001 TRZ 3,1 ; clear mark bit
5715 040625 202 03 0 00 037257 MOVEM 3,CWORDR ; save data
5716 040626 261 17 0 00 035271 PUT PARFLG ; save state of parity flag
5717 040627 402 00 0 00 035271 SETZM PARFLG ; clear parity flag
5718 040630 260 17 0 00 037703 GO DWCRAM ; load CRAM data
5719 040631 262 17 0 00 035271 GET PARFLG ; restore state of parity flag
5720 040632 254 00 0 00 040606 JRST DRMAR0 ; get next address
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 132
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0319
5721
5722 ;#********************************************************************
5723 ;* DCMARK - Clear all mark bits
5724 ;
5725 ; If arguments are given, they are assumed to the the locations between
5726 ; which all mark bits are to be removed.
5727 ;#********************************************************************
5728
5729 ; Start to process the arguments typed - both should be CRAM
5730 ; addresses in octal.
5731
5732 040633 400 05 0 00 000000 DCMARK: SETZ 5, ; init range of addresses
5733 040634 201 06 0 00 007777 MOVEI 6,7777 ; to 0-7777
5734
5735 ; Get first address
5736
5737 040635 200 01 0 00 061070 MOVE 1,[FMSGCD <CMARK addr1,addr2 (CR)>]
5738 040636 260 17 0 00 040607* GO .OARG ; get first address
5739 040637 263 17 0 00 000000 RTN ; error/altmode/question - exit
5740 040640 254 00 0 00 040652 JRST DCMAR0 ; no arguments given - continue
5741 040641 200 00 0 00 040612* MOVE ARGUM ; get argument
5742 040642 202 00 0 00 000005 MOVEM 5 ; save in 'from' location
5743 040643 202 00 0 00 000006 MOVEM 6 ; save in 'to' location
5744
5745 ; Get 2nd address
5746
5747 040644 210 01 0 00 061070 MOVN 1,[FMSGCD <CMARK addr1,addr2 (CR)>]
5748 040645 260 17 0 00 040636* GO .OARG ; get first address
5749 040646 263 17 0 00 000000 RTN ; error/altmode/question - exit
5750 040647 254 00 0 00 040652 JRST DCMAR0 ; no arguments given - continue
5751 040650 200 00 0 00 040641* MOVE ARGUM ; get argument
5752 040651 202 00 0 00 000006 MOVEM 6 ; save in 'to' location
5753
5754 ; Now range check the arguments
5755
5756 040652 331 00 0 00 000005 DCMAR0: SKIPL 5 ; 1st argument in range?
5757 040653 303 05 0 00 007777 CAILE 5,7777
5758 JRST [FMSGCD <? Range of CRAM locations is 0000-7777>
5759 GO FIOFF
5760 040654 254 00 0 00 056630 RTN]
5761 040655 331 01 0 00 000006 SKIPL 1,6 ; 2nd argument in range?
5762 040656 303 06 0 00 007777 CAILE 6,7777
5763 JRST [FMSGCD <? Range of CRAM locations is 0000-7777>
5764 GO FIOFF
5765 040657 254 00 0 00 056630 RTN]
5766 040660 274 01 0 00 000005 SUB 1,5 ; see if range ok
5767 JUMPL 1,[FMSGCD <? Range nonsensical>
5768 GO FIOFF
5769 040661 321 01 0 00 057176 RTN]
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 133
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0320
5770
5771 ; Then ensure the port is stopped
5772
5773 040662 260 17 0 00 040615* GO ISTOP ; stop the port
5774
5775 ; Now obtain CRAM data and load back into CRAM without MARK bit set
5776
5777 040663 202 05 0 00 037255 DCMAR1: MOVEM 5,CADDR ; set up address to load
5778 040664 476 00 0 00 037256 SETOM CWORDL ; initialize left half
5779 040665 476 00 0 00 037257 SETOM CWORDR ; initialize right half
5780 040666 260 17 0 00 037735 GO DRCRAM ; read the data
5781 040667 200 02 0 00 037256 MOVE 2,CWORDL ; get left half
5782 040670 200 03 0 00 037257 MOVE 3,CWORDR ; get right half
5783 040671 626 03 0 00 000001 TRZN 3,1 ; clear mark bit - set?
5784 040672 254 00 0 00 040700 JRST DCMAR2 ; no - continue
5785 040673 202 03 0 00 037257 MOVEM 3,CWORDR ; save data
5786 040674 261 17 0 00 035271 PUT PARFLG ; save state of parity flag
5787 040675 402 00 0 00 035271 SETZM PARFLG ; clear parity flag
5788 040676 260 17 0 00 037703 GO DWCRAM ; load CRAM data
5789 040677 262 17 0 00 035271 GET PARFLG ; restore state of parity flag
5790 040700 350 00 0 00 000005 DCMAR2: AOS 5 ; increment 'from' address
5791 040701 317 05 0 00 000006 CAMG 5,6 ; exceed 'to' address?
5792 040702 254 00 0 00 040663 JRST DCMAR1 ; no - get next address
5793 040703 263 17 0 00 000000 RTN ; yes - exit
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 134
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0321
5794
5795 ;#********************************************************************
5796 ;* DLMARK - List locations with mark bit set
5797 ;
5798 ; If arguments are given, they are assumed to the the locations between
5799 ; which all mark bits are to be listed.
5800 ;#********************************************************************
5801
5802 ; Start to process the arguments typed - both should be CRAM
5803 ; addresses in octal.
5804
5805 040704 400 05 0 00 000000 DLMARK: SETZ 5, ; init range of addresses
5806 040705 201 06 0 00 007777 MOVEI 6,7777 ; to 0-7777
5807
5808 ; Get first address
5809
5810 040706 200 01 0 00 061077 MOVE 1,[FMSGCD <LMARK addr1,addr2 (CR)>]
5811 040707 260 17 0 00 040645* GO .OARG ; get first address
5812 040710 263 17 0 00 000000 RTN ; error/altmode/question - exit
5813 040711 254 00 0 00 040723 JRST DLMAR0 ; no arguments given - continue
5814 040712 200 00 0 00 040650* MOVE ARGUM ; get argument
5815 040713 202 00 0 00 000005 MOVEM 5 ; save in 'from' location
5816 040714 202 00 0 00 000006 MOVEM 6 ; save in 'to' location
5817
5818 ; Get 2nd address
5819
5820 040715 210 01 0 00 061077 MOVN 1,[FMSGCD <LMARK addr1,addr2 (CR)>]
5821 040716 260 17 0 00 040707* GO .OARG ; get first address
5822 040717 263 17 0 00 000000 RTN ; error/altmode/question - exit
5823 040720 254 00 0 00 040723 JRST DLMAR0 ; no arguments given - continue
5824 040721 200 00 0 00 040712* MOVE ARGUM ; get argument
5825 040722 202 00 0 00 000006 MOVEM 6 ; save in 'to' location
5826
5827 ; Now range check the arguments
5828
5829 040723 331 00 0 00 000005 DLMAR0: SKIPL 5 ; 1st argument in range?
5830 040724 303 05 0 00 007777 CAILE 5,7777
5831 JRST [FMSGCD <? Range of CRAM locations is 0000-7777>
5832 GO FIOFF
5833 040725 254 00 0 00 056630 RTN]
5834 040726 331 01 0 00 000006 SKIPL 1,6 ; 2nd argument in range?
5835 040727 303 06 0 00 007777 CAILE 6,7777
5836 JRST [FMSGCD <? Range of CRAM locations is 0000-7777>
5837 GO FIOFF
5838 040730 254 00 0 00 056630 RTN]
5839 040731 274 01 0 00 000005 SUB 1,5 ; see if range ok
5840 JUMPL 1,[FMSGCD <? Range nonsensical>
5841 GO FIOFF
5842 040732 321 01 0 00 057176 RTN]
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 135
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0322
5843
5844 ; Then ensure the port is stopped
5845
5846 040733 260 17 0 00 040662* GO ISTOP ; stop the port
5847 040734 200 07 0 00 061100 MOVE 7,[-2] ; initialize mark bit count
5848 040735 037 00 0 00 061101 TMSGC <Mark bit set at: >
5849
5850 ; Now obtain CRAM data and check mark bit
5851
5852 040736 202 05 0 00 037255 DLMAR1: MOVEM 5,CADDR ; set up address to load
5853 040737 476 00 0 00 037256 SETOM CWORDL ; initialize left half
5854 040740 476 00 0 00 037257 SETOM CWORDR ; initialize right half
5855 040741 260 17 0 00 037735 GO DRCRAM ; read the data
5856 040742 200 03 0 00 037257 MOVE 3,CWORDR ; get right word
5857 040743 606 03 0 00 000001 TRNN 3,1 ; mark bit set?
5858 040744 254 00 0 00 040752 JRST DLMAR2 ; no - continue
5859
5860 ; Print location
5861
5862 040745 350 00 0 00 000007 AOS 7 ; next 5 characters
5863 040746 303 07 0 00 000007 CAILE 7,7 ; done with line?
5864 GO [SETO 7, ; yes - init counter
5865 TMSGC < >
5866 040747 260 17 0 00 061113 RTN]
5867 040750 001 04 0 00 000005 PNTOCC 4,5 ; print address
5868 040751 037 00 0 00 000040 PSP ; print a space
5869
5870 ; Increment to next location
5871
5872 040752 037 07 0 00 000003 DLMAR2: TTALTM ; altmode key struck?
5873 040753 334 00 0 00 000000 SKIPA ; no - proceed
5874 040754 254 00 0 00 040760 JRST DLMARX ; yes - exit
5875 040755 350 00 0 00 000005 AOS 5 ; increment 'from' address
5876 040756 317 05 0 00 000006 CAMG 5,6 ; exceed 'to' address?
5877 040757 254 00 0 00 040736 JRST DLMAR1 ; no - get next address
5878 040760 037 00 0 00 030242 DLMARX: PCRL ; yes - print blank line
5879 040761 263 17 0 00 000000 RTN ; and exit
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 136
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0323
5880
5881 ;#********************************************************************
5882 ;* DENEXT - Examine next
5883 ;#********************************************************************
5884
5885 040762 402 00 0 00 040721* DENEXT: SETZM ARGUM ; default to repeat count
5886 040763 350 00 0 00 040762* AOS ARGUM ; of 1
5887 040764 200 01 0 00 061126 MOVE 1,[FMSGCD (ENEXT repcount <CR> or ENEXT <CR>)]
5888 040765 260 17 0 00 040455* GO .DARG ; get repeat count
5889 040766 263 17 0 00 000000 RTN ; error/altmode/question - exit
5890 040767 255 00 0 00 000000 JFCL ; no argument given
5891 040770 200 00 0 00 040763* MOVE ARGUM ; get argument
5892
5893 ; Do the examine
5894
5895 040771 476 00 0 00 064354' DENE0: SETOM MULFLG ; set 'multiple examine' flag
5896 040772 200 00 0 00 040770* MOVE ARGUM ; get argument
5897 040773 307 00 0 00 000001 CAIG 1 ; only one more repetition?
5898 040774 402 00 0 00 064354' SETZM MULFLG ; yes - clear 'multiple examine' flag
5899 040775 200 01 0 00 064334' MOVE 1,DFLAG ; get last operation done
5900 040776 554 00 0 01 041007 HLRZ DETAB(1) ; get new value of DFLAG
5901 040777 202 00 0 00 064334' MOVEM DFLAG ; save it
5902 041000 550 02 0 01 041007 HRRZ 2,DETAB(1) ; get dispatch address
5903 041001 260 17 0 02 000000 GO (2) ; dispatch
5904 041002 336 00 0 00 064326' SKIPN ALTF ; altmode typed?
5905 041003 377 00 0 00 040772* SOSG ARGUM ; repeat count exhausted?
5906 041004 263 17 0 00 000000 RTN ; yes - exit
5907 041005 402 00 0 00 064355' SETZM MULINI ; clear 'initial examine' flag
5908 041006 254 00 0 00 040771 JRST DENE0 ; no - loop till done
5909
5910 ; Dispatch table
5911
5912 041007 000000 041023 DETAB: 0,,DENEX0 ; ECRAM
5913 041010 000000 041023 0,,DENEX0 ; DCRAM
5914 041011 000000 041023 0,,DENEX0 ; BCRAM
5915 041012 000000 041023 0,,DENEX0 ; ACRAM
5916 041013 000000 041023 0,,DENEX0 ; ZCRAM
5917 041014 000005 041023 5,,DENEX0 ; LCRAM
5918 041015 000006 041027 6,,DENEX1 ; E2901
5919 041016 000006 041027 6,,DENEX1 ; D2901
5920 041017 000006 041027 6,,DENEX1 ; Z2901
5921 041020 000011 041033 9,,DENEX2 ; ELOCS
5922 041021 000011 041033 9,,DENEX2 ; DLOCS
5923 041022 000011 041033 9,,DENEX2 ; ZLOCS
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 137
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0324
5924
5925 ; To handle CRAM examine ...
5926
5927 041023 200 00 0 00 037262 DENEX0: MOVE ANEXT ; get address
5928 041024 202 00 0 00 037254 MOVEM CRAMTO ; set up 'to' and 'from'
5929 041025 202 00 0 00 037253 MOVEM CRAMFR ; addresses
5930 041026 254 00 0 00 037233 PJRST DCOM0 ; go handle
5931
5932 ; To handle 2901 registers
5933
5934 041027 200 00 0 00 037262 DENEX1: MOVE ANEXT ; get register number
5935 041030 202 00 0 00 064364' MOVEM RALUB ; save in 'from' location
5936 041031 202 00 0 00 064365' MOVEM RALUE ; save in 'to' location
5937 041032 254 00 0 00 037777 PJRST DEALU0 ; go handle
5938
5939 ; To handle local storage
5940
5941 041033 200 00 0 00 037262 DENEX2: MOVE ANEXT ; get address
5942 041034 202 00 0 00 064370' MOVEM RLOCB ; save in 'from' location
5943 041035 202 00 0 00 064371' MOVEM RLOCE ; save in 'to' location
5944 041036 254 00 0 00 040303 PJRST DELOC0 ; go handle
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 138
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0325
5945
5946 ;#********************************************************************
5947 ;* DDNEXT - Deposit next
5948 ;#********************************************************************
5949
5950 041037 200 01 0 00 064334' DDNEXT: MOVE 1,DFLAG ; get last operation done
5951 041040 554 00 0 01 041044 HLRZ DDTAB(1) ; get new value of DFLAG
5952 041041 202 00 0 00 064334' MOVEM DFLAG ; save it
5953 041042 550 02 0 01 041044 HRRZ 2,DDTAB(1) ; get dispatch address
5954 041043 254 00 0 02 000000 JRST (2) ; dispatch
5955
5956 ; Dispatch table
5957
5958 041044 000001 041060 DDTAB: 1,,DDNEX0 ; ECRAM
5959 041045 000001 041060 1,,DDNEX0 ; DCRAM
5960 041046 000002 041060 2,,DDNEX0 ; BCRAM
5961 041047 000003 041060 3,,DDNEX0 ; ACRAM
5962 041050 000003 041060 3,,DDNEX0 ; ZCRAM
5963 041051 000003 041060 3,,DDNEX0 ; LCRAM
5964 041052 000007 041067 7,,DDNEX1 ; E2901
5965 041053 000007 041067 7,,DDNEX1 ; D2901
5966 041054 000007 041067 7,,DDNEX1 ; Z2901
5967 041055 000012 041074 ^D10,,DDNEX2 ; ELOCS
5968 041056 000012 041074 ^D10,,DDNEX2 ; DLOCS
5969 041057 000012 041074 ^D10,,DDNEX2 ; ZLOCS
5970
5971 ; To handle CRAM deposit ...
5972
5973 041060 200 01 0 00 061132 DDNEX0: MOVE 1,[FMSGCD (DNEXT <CR>)]
5974 041061 260 17 0 00 037161* GO CHKARG ; check for argument
5975 041062 263 17 0 00 000000 RTN ; error - exit
5976 041063 200 00 0 00 037262 MOVE ANEXT ; get address
5977 041064 202 00 0 00 037254 MOVEM CRAMTO ; set up 'to' and 'from'
5978 041065 202 00 0 00 037253 MOVEM CRAMFR ; addresses
5979 041066 254 00 0 00 037233 PJRST DCOM0 ; go handle
5980
5981 ; To handle 2901 registers
5982
5983 041067 200 00 0 00 037262 DDNEX1: MOVE ANEXT ; get register number
5984 041070 202 00 0 00 064364' MOVEM RALUB ; save in 'from' location
5985 041071 202 00 0 00 064365' MOVEM RALUE ; save in 'to' location
5986 041072 202 00 0 00 041003* MOVEM ARGUM ; save it
5987 041073 254 00 0 00 040070 PJRST DDALU0 ; go handle
5988
5989 ; To handle local storage
5990
5991 041074 200 00 0 00 037262 DDNEX2: MOVE ANEXT ; get address
5992 041075 202 00 0 00 064370' MOVEM RLOCB ; save in 'from' location
5993 041076 202 00 0 00 064371' MOVEM RLOCE ; save in 'to' location
5994 041077 202 00 0 00 041072* MOVEM ARGUM ; save it
5995 041100 254 00 0 00 040371 PJRST DDLOC0 ; go handle
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 139
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0326
5996
5997 ;#********************************************************************
5998 ;* DESTAK - examine 2910 stack
5999 ;#********************************************************************
6000
6001 041101 200 01 0 00 061137 DESTAK: MOVE 1,[FMSGCD (ESTACK <CR>)]
6002 041102 260 17 0 00 041061* GO CHKARG ; check for argument
6003 041103 263 17 0 00 000000 RTN ; error - exit
6004 041104 200 01 0 00 060714 MOVE 1,[-1,,7750] ; set up AOBJN word
6005 041105 260 17 0 00 043340 GO SAVCRM ; save the CRAM locations
6006 041106 201 01 0 00 041136 MOVEI 1,DESTKM ; set up microcode address
6007 041107 260 17 0 00 042507 GO MLOADN ; load/verify it
6008 041110 255 00 0 00 000000 JFCL ; ignore error
6009
6010 ; Do the task
6011
6012 041111 260 17 0 00 040733* GO ISTOP ; stop the port
6013 041112 037 00 0 00 061140 TMSGC <2910 Stack:>
6014 041113 037 00 0 00 061143 TMSGC < Location Contents (addr)>
6015 041114 474 04 0 00 000000 SETO 4, ; initialize location pointer
6016 041115 350 00 0 00 000004 DESTA0: AOS 4 ; point to next location
6017 041116 303 04 0 00 000004 CAILE 4,4 ; done yet?
6018 041117 254 00 0 00 041132 JRST DESTAX ; yes - exit
6019 041120 402 00 0 00 037067* SETZM SDATA ; get initial CSR data
6020 041121 201 00 0 00 007750 MOVEI 7750 ; set up next address
6021 041122 202 00 0 00 037044* MOVEM SNEXT ; for IPASST
6022 041123 260 17 0 00 035530* GO IPASST ; single step once
6023 JRST [FMSGCD <? Error accessing CSR register>
6024 GO FIOFF
6025 041124 254 00 0 00 061151 JRST DESTAY]
6026 JRST [FMSGCD <? Port not stopped>
6027 GO FIOFF
6028 041125 254 00 0 00 061154 JRST DESTAY]
6029 041126 255 00 0 00 000000 JFCL ; error bits set in CSR
6030 XCT [TMSGC < Top >
6031 TMSGC < -1 >
6032 TMSGC < -2 >
6033 TMSGC < -3 >
6034 041127 256 00 0 04 061176 TMSGC < -4 >](4)
6035 041130 001 12 0 00 041122* PNTOCC 12,SNEXT ; print address
6036 041131 254 00 0 00 041115 JRST DESTA0 ; loop till done
6037
6038 ; Restore CRAM location/exit
6039
6040 041132 037 00 0 00 030242 DESTAX: PCRL
6041 041133 200 01 0 00 060714 DESTAY: MOVE 1,[-1,,7750] ; set up AOBJN word
6042 041134 260 17 0 00 043362 GO RESCRM ; restore CRAM data
6043 041135 263 17 0 00 000000 RTN ; return
6044
6045 ; Microcode
6046
6047 041136 775000 000000 DESTKM: MWORD <ADDR=7750,CRTN,D=1> ; 7750
6048 041137 001000 000240
6049 041140 777777 777777 -1
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 140
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0327
6050
6051 ;#********************************************************************
6052 ;* DBREAK - Set breakpoint
6053 ;
6054 ; A breakpoint is set by reading the particular CRAM location and
6055 ; rewriting it with bad parity. Nothing can be done at the break-
6056 ; point except read the CSR register.
6057 ;#********************************************************************
6058
6059 ; First check for any argument
6060
6061 041141 336 00 0 00 040604* DBREAK: SKIPN ARGFLG ; argument given?
6062 JRST [FMSGCD <? Missing argument>
6063 GO FIOFF
6064 041142 254 00 0 00 054406 RTN]
6065
6066 ; Obtain argument
6067
6068 041143 200 01 0 00 061211 DBREA0: MOVE 1,[FMSGCD <BREAK addr,addr,... (CR)>]
6069 041144 260 17 0 00 040716* GO .OARG ; get argument
6070 041145 263 17 0 00 000000 RTN ; error/altmode/question - exit
6071 041146 263 17 0 00 000000 RTN ; done - no more arguments
6072 041147 331 01 0 00 041077* SKIPL 1,ARGUM ; argument out of range?
6073 041150 303 01 0 00 007777 CAILE 1,7777 ; (0-7777)
6074 JRST [FMSGCD <? Range of CRAM locations is 0000-7777>
6075 GO FIOFF
6076 041151 254 00 0 00 056630 RTN]
6077
6078 ; Then ensure the port is stopped
6079
6080 041152 260 17 0 00 041111* GO ISTOP ; stop the port
6081
6082 ; Now obtain CRAM data and give it bad parity
6083
6084 041153 202 01 0 00 037255 MOVEM 1,CADDR ; set up address to load
6085 041154 476 00 0 00 037256 SETOM CWORDL ; initialize left half
6086 041155 476 00 0 00 037257 SETOM CWORDR ; initialize right half
6087 041156 260 17 0 00 037735 GO DRCRAM ; read the data
6088 041157 261 17 0 00 000001 PUT 1 ; save AC1
6089 041160 474 01 0 00 000000 SETO 1, ; set 'force bad parity' flag
6090 041161 200 02 0 00 037256 MOVE 2,CWORDL ; get left half
6091 041162 200 03 0 00 037257 MOVE 3,CWORDR ; get right half
6092 041163 260 17 0 00 043125 GO CALPAR ; insert parity
6093 041164 202 02 0 00 037256 MOVEM 2,CWORDL ; save left half
6094 041165 202 03 0 00 037257 MOVEM 3,CWORDR ; save right half
6095 041166 262 17 0 00 000001 GET 1 ; restore AC1
6096 041167 261 17 0 00 035271 PUT PARFLG ; save state of parity flag
6097 041170 402 00 0 00 035271 SETZM PARFLG ; clear parity flag
6098 041171 260 17 0 00 037703 GO DWCRAM ; load CRAM data (now with bad parity)
6099 041172 262 17 0 00 035271 GET PARFLG ; restore state of parity flag
6100 041173 254 00 0 00 041143 JRST DBREA0 ; get next address
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 141
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0328
6101
6102 ;#********************************************************************
6103 ;* DRBRK - Remove breakpoint
6104 ;#********************************************************************
6105
6106 ; First check for any argument
6107
6108 041174 336 00 0 00 041141* DRBRK: SKIPN ARGFLG ; argument given?
6109 JRST [FMSGCD <? Missing argument>
6110 GO FIOFF
6111 041175 254 00 0 00 054406 RTN]
6112
6113 ; Obtain argument
6114
6115 041176 200 01 0 00 061220 DRBR0: MOVE 1,[FMSGCD <RBREAK addr,addr,... (CR)>]
6116 041177 260 17 0 00 041144* GO .OARG ; get argument
6117 041200 263 17 0 00 000000 RTN ; error/altmode/question - exit
6118 041201 263 17 0 00 000000 RTN ; done - no more arguments
6119 041202 331 01 0 00 041147* SKIPL 1,ARGUM ; argument out of range?
6120 041203 303 01 0 00 007777 CAILE 1,7777 ; (0-7777)
6121 JRST [FMSGCD <? Range of CRAM locations is 0000-7777>
6122 GO FIOFF
6123 041204 254 00 0 00 056630 RTN]
6124
6125 ; Then ensure the port is stopped
6126
6127 041205 260 17 0 00 041152* GO ISTOP ; stop the port
6128
6129 ; Now obtain CRAM data and load back into CRAM with good parity
6130
6131 041206 202 01 0 00 037255 MOVEM 1,CADDR ; set up address to load
6132 041207 476 00 0 00 037256 SETOM CWORDL ; initialize left half
6133 041210 476 00 0 00 037257 SETOM CWORDR ; initialize right half
6134 041211 260 17 0 00 037735 GO DRCRAM ; read the data
6135 041212 261 17 0 00 035271 PUT PARFLG ; save state of parity flag
6136 041213 476 00 0 00 035271 SETOM PARFLG ; set parity flag
6137 041214 260 17 0 00 037703 GO DWCRAM ; load CRAM data (now with good parity)
6138 041215 262 17 0 00 035271 GET PARFLG ; restore state of parity flag
6139 041216 254 00 0 00 041176 JRST DRBR0 ; get next address
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 142
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0329
6140
6141 ;#********************************************************************
6142 ;* DCBRK - Clear all breakpoints
6143 ;
6144 ; If arguments are given, they are assumed to the the locations between
6145 ; which all breakpoints are to be removed.
6146 ;#********************************************************************
6147
6148 ; Start to process the arguments typed - both should be CRAM
6149 ; addresses in octal.
6150
6151 041217 400 05 0 00 000000 DCBRK: SETZ 5, ; init range of addresses
6152 041220 201 06 0 00 007777 MOVEI 6,7777 ; to 0-7777
6153
6154 ; Get first address
6155
6156 041221 200 01 0 00 061227 MOVE 1,[FMSGCD <CBREAK addr1,addr2 (CR)>]
6157 041222 260 17 0 00 041177* GO .OARG ; get first address
6158 041223 263 17 0 00 000000 RTN ; error/altmode/question - exit
6159 041224 254 00 0 00 041236 JRST DCBR0 ; no arguments given - continue
6160 041225 200 00 0 00 041202* MOVE ARGUM ; get argument
6161 041226 202 00 0 00 000005 MOVEM 5 ; save in 'from' location
6162 041227 202 00 0 00 000006 MOVEM 6 ; save in 'to' location
6163
6164 ; Get 2nd address
6165
6166 041230 210 01 0 00 061227 MOVN 1,[FMSGCD <CBREAK addr1,addr2 (CR)>]
6167 041231 260 17 0 00 041222* GO .OARG ; get first address
6168 041232 263 17 0 00 000000 RTN ; error/altmode/question - exit
6169 041233 254 00 0 00 041236 JRST DCBR0 ; no arguments given - continue
6170 041234 200 00 0 00 041225* MOVE ARGUM ; get argument
6171 041235 202 00 0 00 000006 MOVEM 6 ; save in 'to' location
6172
6173 ; Now range check the arguments
6174
6175 041236 331 00 0 00 000005 DCBR0: SKIPL 5 ; 1st argument in range?
6176 041237 303 05 0 00 007777 CAILE 5,7777
6177 JRST [FMSGCD <? Range of CRAM locations is 0000-7777>
6178 GO FIOFF
6179 041240 254 00 0 00 056630 RTN]
6180 041241 331 01 0 00 000006 SKIPL 1,6 ; 2nd argument in range?
6181 041242 303 06 0 00 007777 CAILE 6,7777
6182 JRST [FMSGCD <? Range of CRAM locations is 0000-7777>
6183 GO FIOFF
6184 041243 254 00 0 00 056630 RTN]
6185 041244 274 01 0 00 000005 SUB 1,5 ; see if range ok
6186 JUMPL 1,[FMSGCD <? Range nonsensical>
6187 GO FIOFF
6188 041245 321 01 0 00 057176 RTN]
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 143
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0330
6189
6190 ; Then ensure the port is stopped
6191
6192 041246 260 17 0 00 041205* GO ISTOP ; stop the port
6193
6194 ; Now obtain CRAM data and load back into CRAM with good parity
6195
6196 041247 202 05 0 00 037255 DCBR1: MOVEM 5,CADDR ; set up address to load
6197 041250 476 00 0 00 037256 SETOM CWORDL ; initialize left half
6198 041251 476 00 0 00 037257 SETOM CWORDR ; initialize right half
6199 041252 260 17 0 00 037735 GO DRCRAM ; read the data
6200 041253 261 17 0 00 035271 PUT PARFLG ; save state of parity flag
6201 041254 476 00 0 00 035271 SETOM PARFLG ; set parity flag
6202 041255 260 17 0 00 037703 GO DWCRAM ; load CRAM data (now with good parity)
6203 041256 262 17 0 00 035271 GET PARFLG ; restore state of parity flag
6204 041257 350 00 0 00 000005 AOS 5 ; increment 'from' address
6205 041260 317 05 0 00 000006 CAMG 5,6 ; exceed 'to' address?
6206 041261 254 00 0 00 041247 JRST DCBR1 ; no - get next address
6207 041262 263 17 0 00 000000 RTN ; yes - exit
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 144
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0331
6208
6209 ;#********************************************************************
6210 ;* DLBRK - List breakpoints
6211 ;
6212 ; If arguments are given, they are assumed to the the locations between
6213 ; which all breakpoints are to be listed.
6214 ;#********************************************************************
6215
6216 ; Start to process the arguments typed - both should be CRAM
6217 ; addresses in octal.
6218
6219 041263 400 05 0 00 000000 DLBRK: SETZ 5, ; init range of addresses
6220 041264 201 06 0 00 007777 MOVEI 6,7777 ; to 0-7777
6221
6222 ; Get first address
6223
6224 041265 200 01 0 00 061236 MOVE 1,[FMSGCD <LBREAK addr1,addr2 (CR)>]
6225 041266 260 17 0 00 041231* GO .OARG ; get first address
6226 041267 263 17 0 00 000000 RTN ; error/altmode/question - exit
6227 041270 254 00 0 00 041302 JRST DLBR0 ; no arguments given - continue
6228 041271 200 00 0 00 041234* MOVE ARGUM ; get argument
6229 041272 202 00 0 00 000005 MOVEM 5 ; save in 'from' location
6230 041273 202 00 0 00 000006 MOVEM 6 ; save in 'to' location
6231
6232 ; Get 2nd address
6233
6234 041274 210 01 0 00 061236 MOVN 1,[FMSGCD <LBREAK addr1,addr2 (CR)>]
6235 041275 260 17 0 00 041266* GO .OARG ; get first address
6236 041276 263 17 0 00 000000 RTN ; error/altmode/question - exit
6237 041277 254 00 0 00 041302 JRST DLBR0 ; no arguments given - continue
6238 041300 200 00 0 00 041271* MOVE ARGUM ; get argument
6239 041301 202 00 0 00 000006 MOVEM 6 ; save in 'to' location
6240
6241 ; Now range check the arguments
6242
6243 041302 331 00 0 00 000005 DLBR0: SKIPL 5 ; 1st argument in range?
6244 041303 303 05 0 00 007777 CAILE 5,7777
6245 JRST [FMSGCD <? Range of CRAM locations is 0000-7777>
6246 GO FIOFF
6247 041304 254 00 0 00 056630 RTN]
6248 041305 331 01 0 00 000006 SKIPL 1,6 ; 2nd argument in range?
6249 041306 303 06 0 00 007777 CAILE 6,7777
6250 JRST [FMSGCD <? Range of CRAM locations is 0000-7777>
6251 GO FIOFF
6252 041307 254 00 0 00 056630 RTN]
6253 041310 274 01 0 00 000005 SUB 1,5 ; see if range ok
6254 JUMPL 1,[FMSGCD <? Range nonsensical>
6255 GO FIOFF
6256 041311 321 01 0 00 057176 RTN]
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 145
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0332
6257
6258 ; Then ensure the port is stopped
6259
6260 041312 260 17 0 00 041246* GO ISTOP ; stop the port
6261 041313 200 07 0 00 061100 MOVE 7,[-2] ; initialize breakpoint count
6262 041314 037 00 0 00 061237 TMSGC <Breakpoints: >
6263
6264 ; Now obtain CRAM data and check parity
6265
6266 041315 202 05 0 00 037255 DLBR1: MOVEM 5,CADDR ; set up address to load
6267 041316 476 00 0 00 037256 SETOM CWORDL ; initialize left half
6268 041317 476 00 0 00 037257 SETOM CWORDR ; initialize right half
6269 041320 260 17 0 00 037735 GO DRCRAM ; read the data
6270 041321 400 01 0 00 000000 SETZ 1, ; clear 'bad' parity flag
6271 041322 200 02 0 00 037256 MOVE 2,CWORDL ; get left word
6272 041323 200 03 0 00 037257 MOVE 3,CWORDR ; get right word
6273 041324 260 17 0 00 043125 GO CALPAR ; calculate parity
6274 041325 316 02 0 00 037256 CAMN 2,CWORDL ; same as before?
6275 041326 254 00 0 00 041334 JRST DLBR2 ; yes - good parity
6276
6277 ; Print location
6278
6279 041327 350 00 0 00 000007 AOS 7 ; next 5 characters
6280 041330 303 07 0 00 000007 CAILE 7,7 ; done with line?
6281 GO [SETO 7, ; yes - init counter
6282 TMSGC < >
6283 041331 260 17 0 00 061247 RTN]
6284 041332 001 04 0 00 000005 PNTOCC 4,5 ; print address
6285 041333 037 00 0 00 000040 PSP ; print a space
6286
6287 ; Increment to next location
6288
6289 041334 037 07 0 00 000003 DLBR2: TTALTM ; altmode key struck?
6290 041335 334 00 0 00 000000 SKIPA ; no - proceed
6291 041336 254 00 0 00 041342 JRST DLBRX ; yes - exit
6292 041337 350 00 0 00 000005 AOS 5 ; increment 'from' address
6293 041340 317 05 0 00 000006 CAMG 5,6 ; exceed 'to' address?
6294 041341 254 00 0 00 041315 JRST DLBR1 ; no - get next address
6295 041342 037 00 0 00 030242 DLBRX: PCRL ; yes - print blank line
6296 041343 263 17 0 00 000000 RTN ; and exit
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 146
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0333
6297
6298 ;#********************************************************************
6299 ;* DLOAD - Load microcode into CRAM from a test.
6300 ;#********************************************************************
6301
6302 041344 210 01 0 00 061256 DLOAD: MOVN 1,[FMSGCD (LOAD XXnnn <CR>)]
6303 041345 260 17 0 00 035136* GO .SARG ; get argument
6304 041346 263 17 0 00 000000 RTN ; error/altmode/question - exit
6305 JRST [FMSGCD <? Missing argument>
6306 GO FIOFF
6307 041347 254 00 0 00 054406 RTN]
6308 041350 200 01 0 00 041300* MOVE 1,ARGUM ; get argument
6309 041351 260 17 0 00 034133 GO TSTDEC ; check for alternate format
6310 JRST [FMSGCD <? Argument error>
6311 GO FIOFF
6312 041352 254 00 0 00 061257 RTN]
6313 JRST [FMSGC <? Test number out of range 1 - >
6314 MOVE 1
6315 PNTOCF
6316 PCRLF
6317 GO FIOFF
6318 041353 254 00 0 00 061262 RTN]
6319 041354 260 17 0 00 042304 GO TSTGET ; get test data
6320 041355 200 01 0 00 046312 MOVE 1,TSTMIC ; get test microcode address
6321 JUMPLE 1,[FMSGCD <? Test specified does not have microcode>
6322 GO FIOFF
6323 041356 323 01 0 00 061301 RTN]
6324 041357 260 17 0 00 041312* GO ISTOP ; stop the port
6325 041360 260 17 0 00 042511 GO MLOADY ; load it
6326 041361 255 00 0 00 000000 JFCL ; failed
6327 041362 037 00 0 00 061304 TMSGC <[Number of CRAM locations loaded/verified = >
6328 041363 200 00 0 00 064353' MOVE MLNUM ; get number of words loaded/verified
6329 041364 037 15 0 00 000000 PNTDEC
6330 041365 037 00 0 00 061316 TMSGD <.]>
6331 041366 263 17 0 00 000000 RTN
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 147
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0334
6332
6333 ;#********************************************************************
6334 ;* DLIST - List microcode from test
6335 ;#********************************************************************
6336
6337 041367 210 01 0 00 061323 DLIST: MOVN 1,[FMSGCD (LIST XXnnn <CR>)]
6338 041370 260 17 0 00 041345* GO .SARG ; get argument
6339 041371 263 17 0 00 000000 RTN ; error/altmode/question - exit
6340 JRST [FMSGCD <? Missing argument>
6341 GO FIOFF
6342 041372 254 00 0 00 054406 RTN]
6343 041373 200 01 0 00 041350* MOVE 1,ARGUM ; get argument
6344 041374 260 17 0 00 034133 GO TSTDEC ; check for alternate format
6345 JRST [FMSGCD <? Argument error>
6346 GO FIOFF
6347 041375 254 00 0 00 061257 RTN]
6348 JRST [FMSGC <? Test number out of range 1 - >
6349 MOVE 1
6350 PNTOCF
6351 PCRLF
6352 GO FIOFF
6353 041376 254 00 0 00 061262 RTN]
6354 041377 260 17 0 00 042304 GO TSTGET ; get test data
6355 041400 200 01 0 00 046312 MOVE 1,TSTMIC ; get test microcode address
6356 JUMPLE 1,[FMSGCD <? Test specified does not have microcode>
6357 GO FIOFF
6358 041401 323 01 0 00 061301 RTN]
6359 041402 260 17 0 00 042746 GO MLIST ; list it
6360 041403 263 17 0 00 000000 RTN ; continue
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 148
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0335
6361
6362 ;#********************************************************************
6363 ;* DFLOAD - Load microcode from file into CRAM
6364 ;#********************************************************************
6365
6366 041404 200 01 0 00 061327 DFLOAD: MOVE 1,[FMSGCD (FLOAD <CR>)]
6367 041405 260 17 0 00 041102* GO CHKARG ; check for argument
6368 041406 263 17 0 00 000000 RTN ; error - exit
6369 041407 400 02 0 00 000000 SETZ 2, ; init count of words loaded
6370 041410 260 17 0 00 000000* GO FINIT ; init file for reading
6371 041411 263 17 0 00 000000 RTN ; failed - return
6372 041412 260 17 0 00 041357* GO ISTOP ; stop the port
6373 041413 260 17 0 00 000000* DFLOA0: GO FGETW ; get microcode entry
6374 041414 254 00 0 00 041426 JRST DFLOAX ; error/EOF occurred
6375 041415 261 17 0 00 035271 PUT PARFLG ; save state of parity flag
6376 041416 402 00 0 00 035271 SETZM PARFLG ; ensure no parity is generated
6377 041417 260 17 0 00 037703 GO DWCRAM ; load it
6378 041420 262 17 0 00 035271 GET PARFLG ; restore state of parity flag
6379 041421 350 00 0 00 000002 AOS 2 ; increment count
6380 041422 332 00 0 00 064326' SKIPE ALTF ; altmode typed?
6381 041423 254 00 0 00 041426 JRST DFLOAX ; yes - exit
6382 041424 037 07 0 00 000003 TTALTM ; altmode key struck?
6383 041425 254 00 0 00 041413 JRST DFLOA0 ; no - loop til done
6384
6385 041426 037 00 0 00 061330 DFLOAX: TMSGC <[Number of CRAM locations loaded = >
6386 041427 200 00 0 00 000002 MOVE 2
6387 041430 037 15 0 00 000000 PNTDEC
6388 041431 037 00 0 00 061316 TMSGD <.]>
6389 041432 037 00 0 00 061340 TMSGC <[Ucode version >
6390 041433 201 00 0 00 000137 MOVEI 137 ; read location 137 which contains
6391 041434 202 00 0 00 037255 MOVEM CADDR ; microcode version in MGC field
6392 041435 260 17 0 00 037735 GO DRCRAM ; bits 14-23
6393 041436 135 00 0 00 060137 LDB [POINT 10,CWORDL,29]
6394 041437 037 16 0 00 000003 PNTOCS ; print it
6395 041440 037 00 0 00 053745 TMSGD <]>
6396 041441 263 17 0 00 000000 RTN ; return
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 149
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0336
6397
6398 ;#********************************************************************
6399 ;* DFVERF - Verify microcode from file versus CRAM
6400 ;#********************************************************************
6401
6402 041442 200 01 0 00 061350 DFVERF: MOVE 1,[FMSGCD (FVERFY <CR>)]
6403 041443 260 17 0 00 041405* GO CHKARG ; check for argument
6404 041444 263 17 0 00 000000 RTN ; error - exit
6405 041445 400 02 0 00 000000 SETZ 2, ; init count of words verified
6406 041446 402 00 0 00 064357' SETZM MVNUM ; init error count
6407 041447 260 17 0 00 041410* GO FINIT ; init file for reading
6408 041450 263 17 0 00 000000 RTN ; failed - return
6409 041451 260 17 0 00 041412* GO ISTOP ; stop the port
6410 041452 260 17 0 00 041413* DFVER0: GO FGETW ; get microcode entry
6411 041453 254 00 0 00 041474 JRST DFVERX ; error/EOF occurred
6412 041454 200 00 0 00 037256 MOVE CWORDL ; get left word
6413 041455 202 00 0 00 064414' MOVEM XWORDL# ; save it
6414 041456 200 00 0 00 037257 MOVE CWORDR ; get right word
6415 041457 202 00 0 00 064415' MOVEM XWORDR# ; save it
6416 041460 260 17 0 00 037735 GO DRCRAM ; read the location
6417 041461 200 00 0 00 037256 MOVE CWORDL ; get left word
6418 041462 312 00 0 00 064414' CAME XWORDL# ; same as loaded?
6419 041463 254 00 0 00 041466 JRST .+3 ; no - report error
6420 041464 200 00 0 00 037257 MOVE CWORDR ; get right word
6421 041465 312 00 0 00 064415' CAME XWORDR# ; same as loaded?
6422 041466 260 17 0 00 041504 GO DFVERR ; no - report error
6423 041467 350 00 0 00 000002 AOS 2 ; increment count
6424 041470 332 00 0 00 064326' SKIPE ALTF ; altmode typed?
6425 041471 254 00 0 00 041474 JRST DFVERX ; yes - exit
6426 041472 037 07 0 00 000003 TTALTM ; altmode key struck?
6427 041473 254 00 0 00 041452 JRST DFVER0 ; no - loop til done
6428
6429 041474 037 00 0 00 061351 DFVERX: TMSGC <[Number of CRAM locations verified = >
6430 041475 200 00 0 00 000002 MOVE 2
6431 041476 037 15 0 00 000000 PNTDEC
6432 041477 037 00 0 00 061361 TMSG <. Errors = >
6433 041500 200 00 0 00 064357' MOVE MVNUM
6434 041501 037 15 0 00 000000 PNTDEC
6435 041502 037 00 0 00 061316 TMSGD <.]>
6436 041503 263 17 0 00 000000 RTN ; return
6437
6438 ; Print error data
6439
6440 041504 261 17 0 00 000000 DFVERR: RPUT (0,1,2,3) ; save some AC's
6441
6442 041510 350 01 0 00 064357' AOS 1,MVNUM ; get error count
6443 041511 303 01 0 00 000004 CAILE 1,4 ; more than 4 errors?
6444 041512 254 00 0 00 041527 JRST DFVERY ; yes - exit
6445 041513 037 00 0 00 061364 TMSGC <Verify error at CRAM location >
6446 041514 200 00 0 00 037255 MOVE CADDR
6447 041515 037 04 0 00 000000 PNT4
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 150
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0337
6448 041516 037 00 0 00 061373 TMSGC < Correct: >
6449 041517 200 02 0 00 064414' MOVE 2,XWORDL ; get left half
6450 041520 200 03 0 00 064415' MOVE 3,XWORDR ; get right half
6451 041521 260 17 0 00 043103 GO PNTWD ; print it
6452 041522 037 00 0 00 061376 TMSGC < Actual: >
6453 041523 200 02 0 00 037256 MOVE 2,CWORDL ; get left half
6454 041524 200 03 0 00 037257 MOVE 3,CWORDR ; get right half
6455 041525 260 17 0 00 043103 GO PNTWD ; print it
6456 041526 037 00 0 00 030242 PCRL
6457 041527 262 17 0 00 000003 DFVERY: RGET (3,2,1,0) ; restore AC's
6458
6459 041533 263 17 0 00 000000 RTN ; return
6460
6461
6462 ;#********************************************************************
6463 ;* DFLIST - List microcode in file
6464 ;#********************************************************************
6465
6466 041534 200 01 0 00 061404 DFLIST: MOVE 1,[FMSGCD (FLIST <CR>)]
6467 041535 260 17 0 00 041443* GO CHKARG ; check for argument
6468 041536 263 17 0 00 000000 RTN ; error - exit
6469 041537 260 17 0 00 041447* GO FINIT ; init file for reading
6470 041540 263 17 0 00 000000 RTN ; error occurred - exit
6471 041541 037 00 0 00 060636 TMSGC <ADDR/ JUMP PAR OUT MGC SOR FUN DES CC RAM PA PB SK BUS CRY CTL TM SP MK>
6472 041542 260 17 0 00 041452* DFLIS0: GO FGETW ; get microcode entry
6473 041543 254 00 0 00 041561 JRST DFLISX ; error/EOF occurred
6474 041544 200 02 0 00 037256 MOVE 2,CWORDL ; get left half
6475 041545 200 03 0 00 037257 MOVE 3,CWORDR ; get right half
6476 041546 037 00 0 00 030242 PCRL ; start a new line
6477 041547 001 04 0 00 037255 PNTOCC 4,CADDR ; print CRAM load address
6478 041550 037 00 0 00 060632 TMSG </ >
6479 041551 400 01 0 00 000000 SETZ 1, ; ignore 'bad parity' bit
6480 041552 332 00 0 00 035271 SKIPE PARFLG ; calculate parity?
6481 041553 260 17 0 00 043125 GO CALPAR ; yes - do so
6482 041554 260 17 0 00 043007 GO PNTCRM ; print it
6483 041555 332 00 0 00 064326' SKIPE ALTF ; altmode typed?
6484 041556 254 00 0 00 041561 JRST DFLISX ; yes - exit
6485 041557 037 07 0 00 000003 TTALTM ; altmode key struck?
6486 041560 254 00 0 00 041542 JRST DFLIS0 ; no - loop till done
6487
6488 041561 037 00 0 00 030242 DFLISX: PCRL ; final CRLF
6489 041562 263 17 0 00 000000 RTN ; exit
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 151
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0338
6490
6491 ;#********************************************************************
6492 ;* DFEXAM - Examine microcode in file
6493 ;#********************************************************************
6494
6495 041563 200 01 0 00 061410 DFEXAM: MOVE 1,[FMSGCD (FEXAM <CR>)]
6496 041564 260 17 0 00 041535* GO CHKARG ; check for argument
6497 041565 263 17 0 00 000000 RTN ; error - exit
6498 041566 260 17 0 00 041537* GO FINIT ; init file for reading
6499 041567 263 17 0 00 000000 RTN ; error occurred - exit
6500 041570 260 17 0 00 041542* DFEXA0: GO FGETW ; get microcode entry
6501 041571 254 00 0 00 041607 JRST DFEXAX ; error/EOF occurred
6502 041572 200 02 0 00 037256 MOVE 2,CWORDL ; get left half
6503 041573 200 03 0 00 037257 MOVE 3,CWORDR ; get right half
6504 041574 037 00 0 00 030242 PCRL ; start a new line
6505 041575 001 04 0 00 037255 PNTOCC 4,CADDR ; print CRAM load address
6506 041576 037 00 0 00 060632 TMSG </ >
6507 041577 400 01 0 00 000000 SETZ 1, ; ignore 'bad parity' bit
6508 041600 332 00 0 00 035271 SKIPE PARFLG ; calculate parity?
6509 041601 260 17 0 00 043125 GO CALPAR ; yes - do so
6510 041602 260 17 0 00 043103 GO PNTWD ; print it
6511 041603 332 00 0 00 064326' SKIPE ALTF ; altmode typed?
6512 041604 254 00 0 00 041607 JRST DFEXAX ; yes - exit
6513 041605 037 07 0 00 000003 TTALTM ; altmode key struck?
6514 041606 254 00 0 00 041570 JRST DFEXA0 ; no - loop till done
6515
6516 041607 037 00 0 00 030242 DFEXAX: PCRL ; final CRLF
6517 041610 263 17 0 00 000000 RTN ; exit
6518
6519
6520 ;#********************************************************************
6521 ;* DTRANS - Translate CSR bits to English
6522 ;#********************************************************************
6523
6524 041611 210 01 0 00 061416 DTRANS: MOVN 1,[FMSGCD (TRANSL data <CR>)]
6525 041612 260 17 0 00 041275* GO .OARG ; get argument
6526 041613 263 17 0 00 000000 RTN ; error/altmode/question - exit
6527 JRST [FMSGCD <? Missing argument>
6528 GO FIOFF
6529 041614 254 00 0 00 054406 RTN]
6530 041615 200 01 0 00 041373* MOVE 1,ARGUM ; get argument
6531 041616 260 17 0 00 043215 GO CSRPNT ; print CSR data in English
6532 041617 037 00 0 00 030242 PCRL ; end of line
6533 041620 263 17 0 00 000000 RTN ; return
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 152
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0339
6534
6535 ;#********************************************************************
6536 ;* DCCODE - Print condition codes
6537 ;#********************************************************************
6538
6539 041621 200 01 0 00 061422 DCCODE: MOVE 1,[FMSGCD (CCODE <CR>)]
6540 041622 260 17 0 00 041564* GO CHKARG ; check for argument
6541 041623 263 17 0 00 000000 RTN ; error - exit
6542
6543 ; Save CRAM locations
6544
6545 041624 200 01 0 00 061423 MOVE 1,[-4,,7750] ; set up AOBJN word
6546 041625 260 17 0 00 043340 GO SAVCRM ; save the CRAM locations
6547
6548 ; Loop on condition code
6549
6550 041626 474 07 0 00 000000 SETO 7, ; initialize pointer
6551 041627 350 00 0 00 000007 DCCOD1: AOS 7 ; point to next condition code
6552 041630 303 07 0 00 000017 CAILE 7,17 ; done yet?
6553 041631 254 00 0 00 041653 JRST DCCOD2 ; yes - go print results
6554 041632 137 07 0 00 061424 DPB 7,[POINT 4,CCMIC+3,23] ; no - set up microcode
6555 041633 201 01 0 00 041737 MOVEI 1,CCMIC ; set up microcode address
6556 041634 260 17 0 00 042507 GO MLOADN ; load/verify it
6557 041635 255 00 0 00 000000 JFCL ; ignore error
6558 041636 201 01 0 00 007750 MOVEI 1,7750 ; get start address
6559 041637 242 01 0 00 000001 LSH 1,1 ; position correctly
6560 041640 260 17 0 00 040511* GO LDRAR ; load the RAR
6561 041641 201 01 0 00 000010 MOVEI 1,MPRUN ; start it up
6562 041642 260 17 0 00 040515* GO LDCSR ; write to CSR register
6563 041643 201 01 0 00 040000 MOVEI 1,SELLAR ; set up to read LAR
6564 041644 260 17 0 00 041642* GO LDCSR ; stop the port
6565 041645 260 17 0 00 037134* GO RDLAR ; read stopping address
6566 041646 242 01 0 00 777777 LSH 1,-1 ; position correctly
6567 041647 402 00 0 07 041717 SETZM CCTAB3(7) ; initialize result
6568 041650 306 01 0 00 007753 CAIN 1,7753 ; was the cc set?
6569 041651 476 00 0 07 041717 SETOM CCTAB3(7) ; yes - indicate such
6570 041652 254 00 0 00 041627 JRST DCCOD1 ; loop till done
6571
6572 ; Print the results
6573
6574 041653 037 00 0 00 061425 DCCOD2: TMSGC <CC On: >
6575 041654 474 07 0 00 000000 SETO 7, ; initialize pointer
6576 041655 350 00 0 00 000007 DCCOD3: AOS 7 ; point to next entry
6577 041656 303 07 0 00 000017 CAILE 7,17 ; done yet?
6578 041657 254 00 0 00 041663 JRST DCCOD4 ; yes - continue
6579 041660 332 00 0 07 041717 SKIPE CCTAB3(7) ; no - cc on?
6580 041661 256 00 0 07 041677 XCT CCTAB1(7) ; yes - print text
6581 041662 254 00 0 00 041655 JRST DCCOD3
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 153
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0340
6582
6583 041663 037 00 0 00 061430 DCCOD4: TMSGC <CC Off: >
6584 041664 474 07 0 00 000000 SETO 7, ; initialize pointer
6585 041665 350 00 0 00 000007 DCCOD5: AOS 7 ; point to next entry
6586 041666 303 07 0 00 000017 CAILE 7,17 ; done yet?
6587 041667 254 00 0 00 041673 JRST DCCOD6 ; yes - continue
6588 041670 336 00 0 07 041717 SKIPN CCTAB3(7) ; no - cc on?
6589 041671 256 00 0 07 041677 XCT CCTAB1(7) ; yes - print text
6590 041672 254 00 0 00 041665 JRST DCCOD5
6591 041673 037 00 0 00 030242 DCCOD6: PCRL
6592
6593 ; Restore CRAM locations and exit
6594
6595 041674 200 01 0 00 061423 MOVE 1,[-4,,7750] ; set up AOBJN word
6596 041675 260 17 0 00 043362 GO RESCRM ; restore CRAM data
6597 041676 263 17 0 00 000000 RTN ; return
6598
6599 ; Tables
6600
6601 041677 037 00 0 00 061433 CCTAB1: TMSG < CBAV> ; 0 - CCCBUSAVAIL
6602 041700 037 00 0 00 061435 TMSG < GCSR> ; 1 - CCGRNTCSR
6603 041701 037 00 0 00 061437 TMSG < FEQ0> ; 2 - CCFEQ0
6604 041702 037 00 0 00 061441 TMSG < CSRC> ; 3 - CCCSRCHNG
6605 041703 037 00 0 00 061443 TMSG < EBPE> ; 4 - CCEBPARERR
6606 041704 037 00 0 00 061445 TMSG < AFUL> ; 5 - CCRCVRBUFAFUL
6607 041705 037 00 0 00 061447 TMSG < BFUL> ; 6 - CCRCVRBUFBFUL
6608 041706 037 00 0 00 061451 TMSG < XATN> ; 7 - CCXMTRATTN
6609 041707 037 00 0 00 061453 TMSG < ERQS> ; 10 - CCEBUSRQST
6610 041710 037 00 0 00 061455 TMSG < IACT> ; 11 - CCINTRACTIVE
6611 041711 037 00 0 00 061457 TMSG < MSGN> ; 12 - CCMBSIGN
6612 041712 037 00 0 00 061461 TMSG < MVRP> ; 13 - CCMVRPARCHK
6613 041713 037 00 0 00 061463 TMSG < CBPE> ; 14 - CCCBUSPARERR
6614 041714 037 00 0 00 061465 TMSG < PLPE> ; 15 - CCPLIPARERR
6615 041715 037 00 0 00 061467 TMSG < CHER> ; 16 - CCCHANERR
6616 041716 037 00 0 00 061471 TMSG < CBLW> ; 17 - CCCBLSTWD
6617
6618 041717 CCTAB3: BLOCK ^D16 ; results
6619
6620 ; Microcode
6621
6622 041737 775077 510000 CCMIC: MWORD <ADDR=7750,JMAP,J=7751,D=1> ; 7750
6623 041740 001000 000040
6624 041741 775177 530000 MWORD <CJP,J=7753,D=1,CENA> ; 7751
6625 041742 001400 000060
6626 041743 775277 520000 MWORD <JMAP,J=7752,D=1> ; 7752
6627 041744 001000 000040
6628 041745 775377 530000 MWORD <JMAP,J=7753,D=1> ; 7753
6629 041746 001000 000040
6630 041747 777777 777777 -1
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 154
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0341
6631
6632 ;#********************************************************************
6633 ;* DFILLN - Fill CRAM with special data (J=PC+1,OPCode)
6634 ;#********************************************************************
6635
6636 041750 210 01 0 00 061503 DFILLN: MOVN 1,[FMSGCD <FILLNX number (2910 Op code 0-17)>]
6637 041751 260 17 0 00 041612* GO .OARG ; get argument
6638 041752 263 17 0 00 000000 RTN ; error/altmode/question - exit
6639 JRST [FMSGCD <? Missing argument>
6640 GO FIOFF
6641 041753 254 00 0 00 054406 RTN]
6642 041754 260 17 0 00 041451* GO ISTOP ; stop the port
6643 041755 200 01 0 00 041615* MOVE 1,ARGUM ; get argument
6644 041756 400 02 0 00 000000 SETZ 2, ; initialize address
6645 041757 402 00 0 00 037256 SETZM CWORDL ; initialize left half
6646 041760 402 00 0 00 037257 SETZM CWORDR ; initialize right half
6647 041761 202 02 0 00 037255 DFILN0: MOVEM 2,CADDR ; set up address
6648 041762 350 00 0 00 000002 AOS 2 ; point to next address
6649 041763 303 02 0 00 007777 CAILE 2,7777 ; at end yet?
6650 041764 400 02 0 00 000000 SETZ 2, ; yes - set back to zero
6651 041765 137 02 0 00 060126 DPB 2,[POINT 12,CWORDL,17] ; insert J field
6652 041766 137 01 0 00 060200 DPB 1,[POINT 4,CWORDR,31] ; insert CTL field
6653 041767 260 17 0 00 037703 GO DWCRAM ; load it
6654 041770 326 02 0 00 041761 JUMPN 2,DFILN0 ; loop till done
6655 041771 037 00 0 00 061504 TMSGCD <[Number of CRAM locations loaded = 4096.]>
6656 041772 263 17 0 00 000000 RTN ; return
6657
6658
6659 ;#********************************************************************
6660 ;* DFILLP - Fill CRAM with special data (J=PC,OPCode)
6661 ;#********************************************************************
6662
6663 041773 210 01 0 00 061526 DFILLP: MOVN 1,[FMSGCD <FILLPC number (2910 Op code 0-17)>]
6664 041774 260 17 0 00 041751* GO .OARG ; get argument
6665 041775 263 17 0 00 000000 RTN ; error/altmode/question - exit
6666 JRST [FMSGCD <? Missing argument>
6667 GO FIOFF
6668 041776 254 00 0 00 054406 RTN]
6669 041777 260 17 0 00 041754* GO ISTOP ; stop the port
6670 042000 200 01 0 00 041755* MOVE 1,ARGUM ; get argument
6671 042001 476 00 0 00 037255 SETOM CADDR ; initialize address
6672 042002 402 00 0 00 037256 SETZM CWORDL ; initialize left half
6673 042003 402 00 0 00 037257 SETZM CWORDR ; initialize right half
6674 042004 350 02 0 00 037255 DFILP0: AOS 2,CADDR ; set up address
6675 042005 137 02 0 00 060126 DPB 2,[POINT 12,CWORDL,17] ; insert J field
6676 042006 137 01 0 00 060200 DPB 1,[POINT 4,CWORDR,31] ; insert CTL field
6677 042007 260 17 0 00 037703 GO DWCRAM ; load it
6678 042010 307 02 0 00 007777 CAIG 2,7777 ; done yet?
6679 042011 254 00 0 00 042004 JRST DFILP0 ; no - loop till done
6680 042012 037 00 0 00 061504 TMSGCD <[Number of CRAM locations loaded = 4096.]>
6681 042013 263 17 0 00 000000 RTN ; return
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 155
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0342
6682
6683 ;#********************************************************************
6684 ;* DRDINI - Initialize everything for a read
6685 ;#********************************************************************
6686
6687 042014 200 01 0 00 061533 DRDINI: MOVE 1,[FMSGCD (RDINIT <CR>)]
6688 042015 260 17 0 00 041622* GO CHKARG ; check for argument
6689 042016 263 17 0 00 000000 RTN ; error - exit
6690 042017 201 01 0 00 000001 MOVEI 1,1 ; set 'read' flag
6691
6692 042020 202 01 0 00 042036 DRDINC: MOVEM 1,LASDTC ; save operation
6693 042021 200 14 0 00 035274 MOVE PAT,DSPAT ; get buffer pattern
6694 042022 200 00 0 00 035275 MOVE DSTPAT ; get operator select pattern
6695 042023 202 00 0 00 051002 MOVEM TPAT ; save it
6696 042024 200 02 0 00 035273 MOVE 2,DSWORD ; get buffer length
6697 042025 202 02 0 00 051000 MOVEM 2,TWORD ; save it also
6698 042026 260 17 0 00 000000* GO BUFGEN ; insert buffer pattern
6699 042027 200 01 0 00 061534 MOVE 1,[CBUFSZ,,CBUF] ; get pointer to control buffer
6700 042030 260 17 0 00 000000* GO CHINIT ; initialize software
6701 042031 551 01 0 00 047000 HRRZI 1,BUFF ; buffer address
6702 042032 200 02 0 00 051000 MOVE 2,TWORD ; word count
6703 042033 400 03 0 00 000000 SETZ 3, ; clear zero fill specifier
6704 042034 260 17 0 00 000000* GO GENCCW ; generate a CCW list
6705 042035 263 17 0 00 000000 RTN ; return
6706
6707 042036 777777 777777 LASDTC: -1 ; last data transfer operation
6708
6709
6710 ;#********************************************************************
6711 ;* DWRINI - Initialize everything for a write
6712 ;#********************************************************************
6713
6714 042037 200 01 0 00 061541 DWRINI: MOVE 1,[FMSGCD (WRINIT <CR>)]
6715 042040 260 17 0 00 042015* GO CHKARG ; check for argument
6716 042041 263 17 0 00 000000 RTN ; error - exit
6717 042042 201 01 0 00 000002 MOVEI 1,2 ; set 'write' flag
6718 042043 254 00 0 00 042020 JRST DRDINC ; continue at common code
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 156
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0343
6719
6720 ;#********************************************************************
6721 ;* DBPNT - Print buffer contents
6722 ;#********************************************************************
6723
6724 042044 200 00 0 00 035273 DBPNT: MOVE DSWORD ; set default number to length
6725 042045 303 00 0 00 000024 CAILE ^D20 ; of buffer or 20 words
6726 042046 201 00 0 00 000024 MOVEI ^D20 ; whichever is smaller
6727 042047 202 00 0 00 042000* MOVEM ARGUM
6728 042050 210 01 0 00 061552 MOVN 1,[FMSGCD (BPRINT WordCount or BPRINT <CR>)]
6729 042051 260 17 0 00 040765* GO .DARG ; get argument
6730 042052 263 17 0 00 000000 RTN ; error/altmode/question - exit
6731 042053 255 00 0 00 000000 JFCL ; no argument given
6732 042054 210 03 0 00 042047* MOVN 3,ARGUM ; get argument
6733 042055 514 03 0 00 000003 HRLZ 3,3 ; make AOBJN pointer
6734 042056 541 03 0 00 047000 HRRI 3,BUFF ; insert buffer address
6735 042057 550 00 0 00 000003 DBPNT0: HRRZ 3 ; get address
6736 042060 275 00 0 00 047000 SUBI BUFF ; normalize to 0..n-1
6737 042061 602 00 0 00 000003 TRNE 3 ; multiple of 4?
6738 042062 037 00 0 00 054617 TMSG < > ; no - 2 spaces
6739 042063 602 00 0 00 000003 TRNE 3 ; multiple of 4?
6740 042064 254 00 0 00 042071 JRST DBPNT1 ; no - don't print address
6741 042065 037 00 0 00 061553 TMSGC <Wrd > ; print word location
6742 042066 350 00 0 00 000000 AOS ; make from 1..n
6743 042067 037 15 0 00 000000 PNTDEC
6744 042070 037 00 0 00 061555 TMSG <. >
6745 042071 200 00 0 03 000000 DBPNT1: MOVE (3) ; get data
6746 042072 037 13 0 00 000000 PNTHW ; print data
6747 042073 037 07 0 00 000003 TTALTM ; altmode typed?
6748 042074 253 03 0 00 042057 AOBJN 3,DBPNT0 ; no - do next word - loop till done
6749 042075 037 00 0 00 030242 PCRL ; final CRLF
6750 042076 263 17 0 00 000000 RTN ; return
6751
6752
6753 ;#********************************************************************
6754 ;* DCWPNT - Print CCW list
6755 ;#********************************************************************
6756
6757 042077 200 01 0 00 061562 DCWPNT: MOVE 1,[FMSGCD (CCWPNT <CR>)]
6758 042100 260 17 0 00 042040* GO CHKARG ; check for argument
6759 042101 263 17 0 00 000000 RTN ; error - exit
6760 042102 260 17 0 00 000000* GO CCWPNT ; print CCW list
6761 042103 037 00 0 00 030242 PCRL
6762 042104 263 17 0 00 000000 RTN ; return
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 157
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0344
6763
6764 ;#********************************************************************
6765 ;* DLGPNT - Print logout data
6766 ;#********************************************************************
6767
6768 042105 200 01 0 00 061567 DLGPNT: MOVE 1,[FMSGCD (LOGPNT <CR>)]
6769 042106 260 17 0 00 042100* GO CHKARG ; check for argument
6770 042107 263 17 0 00 000000 RTN ; error - exit
6771 042110 201 01 0 00 000000* MOVEI 1,LOGBUF ; set up logout data storage area
6772 042111 260 17 0 00 000000* GO GETLOG ; get logout data to a buffer area
6773 042112 260 17 0 00 000000* GO LOGPNT ; print channel logout data
6774 042113 037 00 0 00 030242 PCRL
6775 042114 263 17 0 00 000000 RTN ; return
6776
6777
6778 ;#********************************************************************
6779 ;* DCOMPA - Compare data buffer
6780 ;#********************************************************************
6781
6782 042115 200 01 0 00 061574 DCOMPA: MOVE 1,[FMSGCD (COMPAR <CR>)]
6783 042116 260 17 0 00 042106* GO CHKARG ; check for argument
6784 042117 263 17 0 00 000000 RTN ; error - exit
6785 042120 200 01 0 00 042036 MOVE 1,LASDTC ; get last data transfer setup cmd
6786 042121 301 01 0 00 000001 CAIL 1,1 ; this command valid?
6787 042122 303 01 0 00 000003 CAILE 1,3
6788 JRST [FMSGCD <? No data transfer setup command executed yet>
6789 GO FIOFF
6790 042123 254 00 0 00 061607 RTN]
6791 042124 200 02 0 00 035273 MOVE 2,DSWORD ; get buffer length
6792 042125 260 17 0 00 000000* GO BUFCOM ; do the buffer compare
6793 042126 332 00 0 00 000000* SKIPE WRDERR ; any errors?
6794 042127 037 00 0 00 030242 PCRL ; yes - end with a CRLF
6795 042130 263 17 0 00 000000 RTN ; return
6796
6797
6798 ;#********************************************************************
6799 ;* DSWIT - Switch complement commands
6800 ;#********************************************************************
6801
6802 042131 200 01 0 00 054442 DSWIT: MOVE 1,[FMSGCD (Switch Name <CR>)]
6803 042132 260 17 0 00 042116* GO CHKARG ; check for argument
6804 042133 263 17 0 00 000000 RTN ; error - exit
6805 042134 261 17 0 00 000001 PUT 1 ; save AC1
6806 042135 200 01 0 00 032524* MOVE 1,.CGOT ; get dispatch number
6807 042136 275 01 0 00 000116 SUBI 1,SWSTP ; normalize to 0..
6808 042137 260 17 0 00 032526* GO SWCOM ; complement switch
6809 042140 262 17 0 00 000001 GET 1 ; restore AC1
6810 042141 263 17 0 00 000000 RTN ; continue
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 158
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0345
6811
6812 ;#********************************************************************
6813 ;* IPRINT - Print interrupt history
6814 ;#********************************************************************
6815
6816 042142 200 01 0 00 061616 DIPRIN: MOVE 1,[FMSGCD (IPRINT <CR>)]
6817 042143 260 17 0 00 042132* GO CHKARG ; check for argument
6818 042144 263 17 0 00 000000 RTN ; error - exit
6819 042145 261 17 0 00 000000 IPRINT: RPUT (0,1,2) ; save AC's
6820
6821 042150 335 01 0 00 000000* IPRIN0: SKIPGE 1,INTNUM ; any interrupt yet?
6822 042151 254 00 0 00 042155 JRST IPRINX
6823 042152 260 17 0 00 042161 GO IPRINI ; yes - print the data
6824 042153 037 07 0 00 000003 TTALTM ; check for altmode typed
6825 042154 254 00 0 00 042150 JRST IPRIN0 ; no - keep looping
6826 042155 262 17 0 00 000002 IPRINX: RGET (2,1,0) ; yes - restore AC's
6827
6828 042160 263 17 0 00 000000 RTN ; exit
6829
6830 ; Print interrupt data
6831
6832 042161 370 01 0 00 042150* IPRINI: SOS 1,INTNUM ; point to previous interrupt
6833 042162 303 01 0 00 000023 CAILE 1,^D19 ; overflow interrupt?
6834 042163 201 01 0 00 000023 MOVEI 1,^D19 ; yes - limit to 20 interrupts
6835 042164 202 01 0 00 042161* MOVEM 1,INTNUM ; save interrupt number
6836 042165 037 00 0 00 061617 TMSGC <=====>
6837 042166 550 02 0 01 000000* HRRZ 2,INTTYP(1) ; get type
6838 XCT [TMSGC <Vectored (PC = >
6839 TMSGC <NV Chn 1 (PC = >
6840 TMSGC <NV Chn 2 (PC = >
6841 TMSGC <NV Chn 3 (PC = >
6842 TMSGC <NV Chn 4 (PC = >
6843 TMSGC <NV Chn 5 (PC = >
6844 TMSGC <NV Chn 6 (PC = >
6845 042167 256 00 0 02 061661 TMSGC <NV Chn 7 (PC = >](2)
6846 042170 550 00 0 01 000000* HRRZ INTPC(1) ; get interrupt PC
6847 042171 037 16 0 00 000003 PNTOCS ; print it
6848 042172 037 00 0 00 061671 TMSG <) at >
6849 042173 200 00 0 01 000000* MOVE INTTIM(1) ; get milliseconds
6850 042174 037 15 0 00 000000 PNTDEC
6851 042175 037 00 0 00 061673 TMSG <.ms + >
6852 042176 200 00 0 01 000000* MOVE INTUSE(1) ; get microseconds
6853 042177 037 15 0 00 000000 PNTDEC
6854 042200 037 00 0 00 061675 TMSG <.us>
6855 042201 037 00 0 00 061676 TMSGC <CONI PI = >
6856 042202 200 00 0 01 000000* MOVE INTCON(1) ; get CONI PI data
6857 042203 037 13 0 00 000000 PNTHW ; print it
6858 042204 037 00 0 00 061701 TMSG < CONI APR = >
6859 042205 200 00 0 01 000000* MOVE INTAPR(1) ; get APR data
6860 042206 037 13 0 00 000000 PNTHW ; print it
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 159
DFPTA1 MAC 10-Oct-83 21:43 Port Debugger SEQ 0346
6861 042207 037 00 0 00 061704 TMSG < CSR = >
6862 042210 200 00 0 01 000000* MOVE INTCSR(1) ; get CSR data
6863 042211 037 13 0 00 000000 PNTHW ; print it
6864 042212 037 00 0 00 030242 PCRL
6865 042213 335 00 0 01 042166* SKIPGE INTTYP(1)
6866 042214 037 00 0 00 061706 TMSGCD < ##### (Interrupts flushed) #####>
6867 042215 263 17 0 00 000000 RTN
6868
6869
6870 ;#********************************************************************
6871 ;* IINIT - Initialize interrupt system
6872 ;#********************************************************************
6873
6874 042216 200 01 0 00 061721 DIINIT: MOVE 1,[FMSGCD (IINIT <CR>)]
6875 042217 260 17 0 00 042143* GO CHKARG ; check for argument
6876 042220 263 17 0 00 000000 RTN ; error - exit
6877 042221 260 17 0 00 031017* GO INITPI ; init PI system
6878 042222 260 17 0 00 032126* GO SETVEC ; set up vector addresses
6879 042223 263 17 0 00 000000 RTN ; return
6880
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 160
DFPTA1 MAC 10-Oct-83 21:43 Program Utility Routines SEQ 0347
6881 SUBTTL Program Utility Routines
6882
6883 ;#*********************************************************************
6884 ;* TRACE - Program Trace Routine
6885 ;
6886 ; This routine traces test execution if the TRACE switch is set. This
6887 ; routine sets up TSTSUB, ERFLG, ERRPC for error reporting during the
6888 ; test, and ERRNUM for interrupt handling.
6889 ;#********************************************************************
6890
6891 042224 261 17 0 00 000000 TRACE: RPUT (0,1) ; save AC's
6892
6893 042226 202 00 0 00 046322 MOVEM TSTOFF ; save relocatable offset
6894 042227 260 17 0 00 034226* GO SWITT ; get switches
6895 042230 606 00 0 00 400000 TRNN TRACET ; want to trace?
6896 042231 254 00 0 00 042250 JRST TRACE0 ; no
6897
6898 ; Print test number if tracing
6899
6900 042232 037 00 0 00 061722 TMSG <* >
6901 042233 260 17 0 00 033132* GO PNTDEV ; print device name
6902 042234 037 00 0 00 061723 TMSG < Test >
6903 042235 200 01 0 00 046304 MOVE 1,TSTCLS ; get test class
6904 042236 200 00 0 01 031123 MOVE INDLIS(1) ; get class description
6905 042237 037 00 0 00 000002 PNTSIX ; print it
6906 042240 200 00 0 00 046305 MOVE TSTNUM ; get test number
6907 042241 037 16 0 00 000003 PNTOCS ; print it
6908 042242 200 00 0 00 046310 MOVE TSTFLG ; get test flags
6909 042243 603 00 0 00 000100 TLNE (TDENA) ; disabled?
6910 042244 037 00 0 00 061725 TMSG < (Disabled)> ; yes - print such
6911 042245 603 00 0 00 001000 TLNE (TUSER) ; run in user mode?
6912 042246 037 00 0 00 061730 TMSG < (Ommitted)> ; no - print such
6913 042247 037 00 0 00 030242 PCRL
6914
6915 ; Initialize flags
6916
6917 042250 402 00 0 00 000015 TRACE0: SETZM ERFLG ; clear the error detected flag
6918 042251 402 00 0 00 030052 SETZM ERRPC ; clear the error PC
6919 042252 402 00 0 00 046306 SETZM TSTSUB ; clear subtest number
6920 042253 402 00 0 00 000000* SETZM SCOOFF ; clear error offset
6921 042254 476 00 0 00 042164* SETOM INTNUM ; initialize interrupt number
6922 042255 402 00 0 00 041130* SETZM SNEXT ; initialize next address
6923 042256 402 00 0 00 041120* SETZM SDATA ; initialize CSR data
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 161
DFPTA1 MAC 10-Oct-83 21:43 Program Utility Routines SEQ 0348
6924
6925 ; Determine whether or not test should be run
6926
6927 042257 200 00 0 00 046310 MOVE TSTFLG ; get test flags
6928 042260 603 00 0 00 000100 TLNE (TDENA) ; test disabled?
6929 042261 254 00 0 00 042300 JRST TRACEX ; yes - exit test
6930 042262 603 00 0 00 001000 TLNE (TUSER) ; cannot run in user mode?
6931 042263 254 00 0 00 042300 JRST TRACEX ; no - exit test
6932
6933 ; Handle microcode loaded flags
6934
6935 042264 316 16 0 00 046275 CAMN MBCN,PORTNI ; NI port selected?
6936 042265 332 00 0 00 046312 SKIPE TSTMIC ; yes - any test microcode?
6937 042266 334 00 0 00 000000 SKIPA ; no - continue
6938 042267 476 00 0 00 064404' SETOM TSLOD1 ; yes - init ucode loaded flag (NI)
6939 042270 316 16 0 00 046276 CAMN MBCN,PORTCI ; CI port selected?
6940 042271 332 00 0 00 046312 SKIPE TSTMIC ; yes - any test microcode?
6941 042272 334 00 0 00 000000 SKIPA ; no - continue
6942 042273 476 00 0 00 064405' SETOM TSLOD2 ; yes - init ucode loaded flag (CI)
6943
6944 ; Exit and run test
6945
6946 042274 262 17 0 00 000001 RGET (1,0) ; restore AC's
6947
6948 042276 350 00 0 17 777777 AOS -1(P) ; increment test return address
6949 042277 263 17 0 00 000000 RTN ; exit normally
6950
6951 ; Exit and skip test
6952
6953 042300 262 17 0 00 000001 TRACEX: RGET (1,0,XXX) ; restore AC's
6954
6955 042303 263 17 0 00 000000 RTN ; exit test
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 162
DFPTA1 MAC 10-Oct-83 21:43 Program Utility Routines SEQ 0349
6956
6957 ;#********************************************************************
6958 ;* TSTGET - Get test related data based on test dispatch address
6959 ;
6960 ; Given: TSTADD - Contains address within a test dispatch table, this is
6961 ; location contains the address of the current test.
6962 ;
6963 ; Returns: TSTCLS - Test class 0-5
6964 ; TSTNUM - Test number
6965 ; TSTSUB - Zeroed test offset
6966 ; TSTNAM - Address of ASCIZ test description
6967 ; TSTPC - Current test PC
6968 ; TSTFLG - Current test flags
6969 ; TSTADD - Current test descriptor entry address
6970 ; TSTMIC - Current test microcode address
6971 ; TSTHIG - Addr of high probability modules
6972 ; TSTLOW - Addr of low probability modules
6973 ;#********************************************************************
6974
6975 042304 261 17 0 00 000001 TSTGET: RPUT (1,2) ; save AC's
6976
6977 042306 402 00 0 00 046306 SETZM TSTSUB ; clear subtest number
6978 042307 200 01 1 00 046311 MOVE 1,@TSTADD ; get test address
6979 042310 202 01 0 00 046307 MOVEM 1,TSTPC ; save it
6980 042311 200 02 0 01 000001 MOVE 2,1(1) ; get test flags
6981 042312 202 02 0 00 046310 MOVEM 2,TSTFLG ; save them
6982 042313 554 02 0 01 000002 HLRZ 2,2(1) ; get microcode address
6983 042314 202 02 0 00 046312 MOVEM 2,TSTMIC ; save it
6984 042315 550 02 0 01 000002 HRRZ 2,2(1) ; get test description
6985 042316 202 02 0 00 046303 MOVEM 2,TSTNAM ; save it
6986 042317 554 02 0 01 000003 HLRZ 2,3(1) ; get address of high prob modules
6987 042320 202 02 0 00 046320 MOVEM 2,TSTHIG ; save it
6988 042321 550 02 0 01 000003 HRRZ 2,3(1) ; get address of low prob modules
6989 042322 202 02 0 00 046321 MOVEM 2,TSTLOW ; save it
6990 042323 550 01 0 00 046310 HRRZ 1,TSTFLG ; get test number
6991 042324 202 01 0 00 046305 MOVEM 1,TSTNUM ; save it
6992 042325 135 01 0 00 061733 LDB 1,[POINT 3,TSTFLG,17] ; get test class
6993 042326 202 01 0 00 046304 MOVEM 1,TSTCLS ; save it
6994 042327 262 17 0 00 000002 RGET (2,1) ; restore AC's
6995
6996 042331 263 17 0 00 000000 RTN
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 163
DFPTA1 MAC 10-Oct-83 21:43 Program Utility Routines SEQ 0350
6997
6998 ;#********************************************************************
6999 ;* SELTST - Select a test to run.
7000 ;
7001 ; This routine selects the next test in a test descriptor table.
7002 ; TSTADD contains the address within a test dispatch table of the
7003 ; current test to run. If there are no more tests to run, this
7004 ; will contain -1.
7005 ;
7006 ; Return: +1 - No more tests found
7007 ; +2 - Test found is not valid
7008 ; +3 - Test found is valid
7009 ;#********************************************************************
7010
7011 042332 261 17 0 00 000000 SELTST: RPUT (0,1,2) ; save AC's
7012
7013 042335 350 01 0 00 046311 AOS 1,TSTADD ; get address in dispatch table
7014 042336 200 02 0 01 000000 MOVE 2,(1) ; get dispatch address
7015 042337 316 02 0 00 060021 CAMN 2,[-1] ; end of tests?
7016 042340 254 00 0 00 042346 JRST SELTSX ; yes - exit +1
7017
7018 ; Obtain test data
7019
7020 042341 260 17 0 00 042304 GO TSTGET ; get test data
7021 042342 260 17 0 00 042352 GO CHKTST ; check if test is valid
7022 042343 334 00 0 00 000000 SKIPA ; no - exit +2 (test not valid)
7023 042344 350 00 0 17 777775 AOS -3(P) ; set up exit +3 (Found a test)
7024 042345 350 00 0 17 777775 AOS -3(P) ; set up exit +2 (Test not valid)
7025
7026 ; Exit
7027
7028 042346 262 17 0 00 000002 SELTSX: RGET (2,1,0) ; restore AC's
7029
7030 042351 263 17 0 00 000000 RTN ; return
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 164
DFPTA1 MAC 10-Oct-83 21:43 Program Utility Routines SEQ 0351
7031
7032 ;#********************************************************************
7033 ;* CHKTST - Check if this is a valid test to execute and set up test type.
7034 ;
7035 ; A test is determined to be a valid test if the following are true:
7036 ;
7037 ; - A class of tests has been selected, and this test is in that class.
7038 ; - The test can be run, ie., that the modules specified as required
7039 ; are not indicated as missing by the switches.
7040 ;
7041 ; Argument: TSTPC - Contains test address
7042 ;
7043 ; Return: +1 - Not a valid test
7044 ; +2 - Valid test
7045 ;#********************************************************************
7046
7047 042352 261 17 0 00 000000 CHKTST: RPUT (0,1,2) ; save some AC's
7048
7049 042355 200 01 0 00 046307 MOVE 1,TSTPC ; get test pc
7050 042356 331 00 0 00 046316 SKIPL TSTMUL ; multiple tests?
7051 042357 254 00 0 00 042363 JRST CHKTS0 ; no - continue
7052
7053 ; Verify proper class of tests
7054
7055 042360 200 02 0 00 046313 MOVE 2,TSTMSK ; get test mask
7056 042361 616 02 0 01 000001 TDNN 2,1(1) ; valid test to execute?
7057 042362 254 00 0 00 042401 JRST CHKTSX ; no - exit (+1)
7058
7059 ; Check if there are enough boards here to run this
7060
7061 042363 400 00 0 00 000000 CHKTS0: SETZ 0, ; clear switches
7062 042364 332 00 0 00 030056 SKIPE $ONETM ; initial startup?
7063 042365 260 17 0 00 042227* GO SWITT ; no - get program switches
7064 042366 606 00 0 00 000003 TRNN MMPROC!MCBUS ; any modules missing?
7065 042367 254 00 0 00 042400 JRST CHKTS1 ; no - continue
7066 042370 602 00 0 00 000002 TRNE MMPROC ; MPROC module missing?
7067 042371 607 02 0 00 000600 TLNN 2,(NDMP!NDCB) ; need this module?
7068 042372 334 00 0 00 000000 SKIPA ; no - check CBUS module
7069 042373 254 00 0 00 042401 JRST CHKTSX ; yes - exit (+1) (not a valid test)
7070 042374 602 00 0 00 000001 TRNE MCBUS ; CBUS module missing?
7071 042375 607 02 0 00 000200 TLNN 2,(NDCB) ; need this module?
7072 042376 334 00 0 00 000000 SKIPA ; no - continue (valid test)
7073 042377 254 00 0 00 042401 JRST CHKTSX ; yes - exit (+1) (not a valid test)
7074 042400 350 00 0 17 777775 CHKTS1: AOS -3(P) ; set up RTN +2
7075 042401 262 17 0 00 000002 CHKTSX: RGET (2,1,0) ; restore AC's
7076
7077 042404 263 17 0 00 000000 RTN ; return
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 165
DFPTA1 MAC 10-Oct-83 21:43 Program Utility Routines SEQ 0352
7078
7079 ;#********************************************************************
7080 ;* TSTPNT - Print test name/number
7081 ;#********************************************************************
7082
7083 042405 261 17 0 00 000000 TSTPNT: RPUT (0,1) ; save AC's
7084
7085 042407 200 01 0 00 046304 MOVE 1,TSTCLS ; get test class
7086 042410 200 00 0 01 031123 MOVE INDLIS(1) ; get class description
7087 042411 037 00 0 00 000002 PNTSIX ; print it
7088 042412 200 00 0 00 046305 MOVE TSTNUM ; get test number
7089 042413 037 16 0 00 000003 PNTOCS ; print it
7090 042414 200 00 0 00 046306 MOVE TSTSUB ; get subtest number
7091 042415 322 00 0 00 042420 JUMPE TSTPN0 ; zero? yes - continue
7092 042416 037 00 0 00 053407 TMSG <-> ; no - print it
7093 042417 037 16 0 00 000003 PNTOCS
7094 042420 260 17 0 00 042365* TSTPN0: GO SWITT ; get switches
7095 042421 603 00 0 00 000200 TLNE TXTINH ; text inhibit set?
7096 042422 254 00 0 00 042425 JRST TSTPNX ; yes - exit
7097 042423 037 00 0 00 053451 TMSG < - >
7098 042424 037 00 1 00 046303 PNTMSG @TSTNAM ; print test description
7099 042425 262 17 0 00 000001 TSTPNX: RGET (1,0) ; restore AC's
7100
7101 042427 263 17 0 00 000000 RTN
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 166
DFPTA1 MAC 10-Oct-83 21:43 Program Utility Routines SEQ 0353
7102
7103 ;#********************************************************************
7104 ;* ODELAY - Delay a specified amount of time (in milliseconds in AC0)
7105 ;#********************************************************************
7106
7107 042430 332 00 0 00 030037 ODELAY: SKIPE USER ; user mode?
7108 042431 254 00 0 00 042447 JRST ODELA1 ; yes - go handle
7109
7110 ; Exec mode - inspect timers
7111
7112 042432 261 17 0 00 000002 RPUT (2,3) ; save some AC's
7113
7114 042434 400 03 0 00 000000 SETZ 3, ; set up so RUNTME doesn't print time
7115 042435 260 17 0 00 033142* GO RUNTME ; get initial time
7116 042436 200 02 0 00 000000* MOVE 2,DEBTIM ; get time in msecs
7117 042437 272 00 0 00 000002 ADDM 2 ; add in the time to delay
7118 042440 400 03 0 00 000000 ODELA0: SETZ 3, ; set up so RUNTME doesn't print time
7119 042441 260 17 0 00 042435* GO RUNTME ; get time
7120 042442 313 02 0 00 042436* CAMLE 2,DEBTIM ; done?
7121 042443 254 00 0 00 042440 JRST ODELA0 ; no - keep checking time
7122 042444 262 17 0 00 000003 RGET (3,2) ; restore AC's
7123
7124 042446 263 17 0 00 000000 RTN ; return
7125
7126 ; User mode - use DISMS JSYS
7127
7128 042447 261 17 0 00 000000 ODELA1: RPUT (0,1) ; save AC's
7129
7130 042451 200 01 0 00 000000 MOVE 1,0 ; get time to wait
7131 042452 104 00 0 00 000167 DISMS ; wait
7132 042453 262 17 0 00 000001 RGET (1,0) ; restore AC's
7133
7134 042455 263 17 0 00 000000 RTN ; return
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 167
DFPTA1 MAC 10-Oct-83 21:43 Program Utility Routines SEQ 0354
7135
7136 ;#********************************************************************
7137 ;* DDELAY - Delay a specified amount of time (in milliseconds in AC0)
7138 ;
7139 ; While waiting the data buffer is read and the CSR register is read to
7140 ; see if the test has signalled end of test by setting the ENABLE bit.
7141 ;#********************************************************************
7142
7143 042456 261 17 0 00 000001 DDELAY: RPUT (1,2,3,4) ; save some AC's
7144
7145 042462 403 03 0 00 000004 SETZB 3,4 ; set up so RUNTME doesn't print time
7146 042463 260 17 0 00 042441* GO RUNTME ; get initial time
7147 042464 200 02 0 00 042442* MOVE 2,DEBTIM ; get time in msecs
7148 042465 272 00 0 00 000002 ADDM 2 ; add in the time to delay
7149 042466 400 03 0 00 000000 DDELA0: SETZ 3, ; set up so RUNTME doesn't print time
7150 042467 260 17 0 00 042463* GO RUNTME ; get time
7151 042470 317 02 0 00 042464* CAMG 2,DEBTIM ; done?
7152 042471 254 00 0 00 042502 JRST DDELAX ; yes - exit
7153 042472 200 01 0 04 047000 MOVE 1,BUFF(4) ; read a word in buffer
7154 042473 350 00 0 00 000004 AOS 4 ; point to next word
7155 042474 301 04 0 00 001000 CAIL 4,^D512 ; reach end of buffer?
7156 042475 400 04 0 00 000000 SETZ 4, ; yes - reinitialize pointer
7157 042476 260 17 0 00 035460* GO RDCSR ; read CSR
7158 042477 255 00 0 00 000000 JFCL ; error
7159 042500 606 01 0 00 000200 TRNN 1,RESQAV ; RESQAV bit set?
7160 042501 254 00 0 00 042466 JRST DDELA0 ; no - keep checking time
7161 042502 262 17 0 00 000004 DDELAX: RGET (4,3,2,1) ; restore AC's
7162
7163 042506 263 17 0 00 000000 RTN ; return
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 168
DFPTA1 MAC 10-Oct-83 21:43 Program Utility Routines SEQ 0355
7164
7165 ;#********************************************************************
7166 ;* MLOADN - Load microcode and verify it (do not print errors)
7167 ;* MLOADY - Load microcode and verify it (print errors)
7168 ;
7169 ; Arguments: AC1 - Contains address where microcode starts
7170 ;
7171 ; Returns: AC1 - Number of words loaded/verified
7172 ; +1 - Error occurred loading/verifying microcode
7173 ; +2 - Ok
7174 ;
7175 ; Microcode format: The microcode is given in 2 word segments
7176 ; (specifying address and 60 CRAM bits). The ucode is in a
7177 ; table beginning at the address given in AC1. The end of
7178 ; this table is indicated by a word containing -1.
7179 ;
7180 ; Word 1: Bits 00-11 - Microword load address (0000-7777)
7181 ; 12-35 - Bits 0-23 of microword to load
7182 ; Word 2: Bits 00-34 - Bits 24-57,59 of microword to load
7183 ; 35 ---- Force Bad Parity flag
7184 ;#********************************************************************
7185
7186 042507 402 00 0 00 064360' MLOADN: SETZM MVREP# ; clear print flag
7187 042510 334 00 0 00 000000 SKIPA ; continue
7188 042511 476 00 0 00 064360' MLOADY: SETOM MVREP ; set print flag
7189 042512 402 00 0 00 064356' SETZM MVFLAG# ; clear verify flag
7190 042513 261 17 0 00 000001 PUT 1 ; save AC1
7191 042514 260 17 0 00 042524 GO MVCOM ; load microcode
7192 042515 255 00 0 00 000000 JFCL ; error - ignore
7193 042516 262 17 0 00 000001 GET 1 ; restore AC1
7194 042517 476 00 0 00 064356' SETOM MVFLAG ; set verify flag
7195 042520 260 17 0 00 042524 GO MVCOM ; verify microcode
7196 042521 263 17 0 00 000000 RTN ; error - return
7197 042522 350 00 0 17 000000 AOS (P) ; set up proper return
7198 042523 263 17 0 00 000000 RTN ; return
7199
7200 042524 476 00 0 00 064357' MVCOM: SETOM MVNUM# ; init number of verify errors
7201 JUMPLE 1,[SETZ 1, ; exit if no microcode table specified
7202 042525 323 01 0 00 061734 RTN]
7203 042526 261 17 0 00 000000 RPUT (0,2,3,4,5) ; save some AC's
7204
7205 042533 200 04 0 00 000001 MOVE 4,1 ; get address of table in AC4
7206 042534 200 01 0 00 061736 MOVE 1,[MWBADR,,MWBADR+1] ; build a BLT pointer
7207 042535 476 00 0 00 042640 SETOM MWBADR ; initialize first word
7208 042536 251 01 0 00 042656 BLT 1,MWBRAC+2 ; initialize the rest
7209
7210 ; First stop the port and ensure 'DIAG TEST EBUF' is not set
7211
7212 042537 260 17 0 00 041777* GO ISTOP ; stop the port
7213 042540 260 17 0 00 000000* GO CLREBU ; ensure cleared
7214 042541 255 00 0 00 000000 JFCL ; ignore error
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 169
DFPTA1 MAC 10-Oct-83 21:43 Program Utility Routines SEQ 0356
7215
7216 ; Load microwords
7217
7218 042542 400 05 0 00 000000 SETZ 5, ; clear word count
7219 042543 200 02 0 04 000000 MLOAD0: MOVE 2,(4) ; get first word
7220 042544 316 02 0 00 060021 CAMN 2,[-1] ; end of list?
7221 042545 254 00 0 00 042625 JRST MLOADX ; yes - exit
7222 042546 200 03 0 04 000001 MOVE 3,1(4) ; get second word
7223
7224 ; Load bits 0-27
7225
7226 042547 135 01 0 00 061737 LDB 1,[POINT 12,2,11] ; get actual CRAM load address
7227 042550 202 01 0 00 037255 MOVEM 1,CADDR ; save address
7228 042551 242 01 0 00 000001 LSH 1,1 ; convert to address for RAR
7229 042552 660 01 0 00 000001 TRO 1,1 ; set bit 12 (for left 30 bits)
7230 042553 202 01 0 00 064376' MOVEM 1,SAVRAR# ; save address loaded
7231 042554 260 17 0 00 041640* GO LDRAR ; load RAR with it
7232 042555 200 01 0 00 000003 MOVE 1,3 ; get word 2 (it has 'bad parity' flag)
7233 042556 135 02 0 00 061740 LDB 2,[POINT 24,2,35] ; get CRAM bits 0-23
7234 042557 246 02 0 00 000006 LSHC 2,6 ; now get bits 0-29 in AC2 (left half)
7235 042560 242 03 0 00 777772 LSH 3,-6 ; right justify AC3 (right half)
7236 042561 622 03 0 00 000002 TRZE 3,2 ; bit 59 set?
7237 042562 660 03 0 00 000001 TRO 3,1 ; yes - set rightmost bit
7238 042563 260 17 0 00 043125 GO CALPAR ; calculate parity
7239 042564 200 01 0 00 000002 MOVE 1,2 ; get left 30 bits
7240 042565 336 00 0 00 064356' SKIPN MVFLAG ; load?
7241 042566 260 17 0 00 037727* GO LDCRAM ; yes - load it
7242 042567 332 00 0 00 064356' SKIPE MVFLAG ; verify?
7243 GO [GO RDCRAM ; yes - read CRAM
7244 MOVEM 1,CWORDL ; save it
7245 042570 260 17 0 00 061741 RTN]
7246
7247 ; Load bits 30-59
7248
7249 042571 200 01 0 00 064376' MOVE 1,SAVRAR ; get RAR address (for left 30 bits)
7250 042572 620 01 0 00 000001 TRZ 1,1 ; clear bit 12 (for right 30 bits)
7251 042573 260 17 0 00 042554* GO LDRAR ; load address
7252 042574 200 01 0 00 000003 MOVE 1,3 ; get right 30 bits
7253 042575 336 00 0 00 064356' SKIPN MVFLAG ; load?
7254 042576 260 17 0 00 042566* GO LDCRAM ; yes - load it
7255 042577 336 00 0 00 064356' SKIPN MVFLAG ; load?
7256 042600 254 00 0 00 042622 JRST MLOAD1 ; yes - next location
7257 042601 260 17 0 00 037751* GO RDCRAM ; yes - read CRAM
7258 042602 202 01 0 00 037257 MOVEM 1,CWORDR ; save it
7259 042603 316 02 0 00 037256 CAMN 2,CWORDL ; valid data?
7260 042604 312 03 0 00 037257 CAME 3,CWORDR
7261 042605 334 00 0 00 000000 SKIPA ; no - continue
7262 042606 254 00 0 00 042622 JRST MLOAD1 ; yes - next location
7263 042607 350 01 0 00 064357' AOS 1,MVNUM ; get error count
7264 042610 303 01 0 00 000002 CAILE 1,2 ; more than 3 errors?
7265 042611 254 00 0 00 042622 JRST MLOAD1 ; yes - next location
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 170
DFPTA1 MAC 10-Oct-83 21:43 Program Utility Routines SEQ 0357
7266 042612 200 00 0 00 037255 MOVE CADDR ; get address
7267 042613 202 00 0 01 042640 MOVEM MWBADR(1) ; save it
7268 042614 202 02 0 01 042643 MOVEM 2,MWBLCO(1) ; save left 30 bits (correct)
7269 042615 202 03 0 01 042651 MOVEM 3,MWBRCO(1) ; save right 30 bits (correct)
7270 042616 200 02 0 00 037256 MOVE 2,CWORDL ; get left 30 bits
7271 042617 202 02 0 01 042646 MOVEM 2,MWBLAC(1) ; save it (actual)
7272 042620 200 02 0 00 037257 MOVE 2,CWORDR ; get right 30 bits
7273 042621 202 03 0 01 042654 MOVEM 3,MWBRAC(1) ; save it (actual)
7274
7275 ; Point to next microword
7276
7277 042622 350 00 0 00 000005 MLOAD1: AOS 5 ; increment word count
7278 042623 271 04 0 00 000002 ADDI 4,2 ; increment by 2
7279 042624 254 00 0 00 042543 JRST MLOAD0 ; loop till done
7280
7281 ; Done - return count of words loaded
7282
7283 042625 337 00 0 00 064357' MLOADX: SKIPG MVNUM ; any verify errors?
7284 042626 350 00 0 17 777773 AOS -5(P) ; no - set up RTN+2
7285 042627 332 00 0 00 064360' SKIPE MVREP ; report errors?
7286 042630 260 17 0 00 042657 GO MVPNT ; yes - print errors
7287 042631 202 05 0 00 064353' MOVEM 5,MLNUM# ; save count of words loaded
7288 042632 262 17 0 00 000005 RGET (5,4,3,2,0) ; restore AC's
7289
7290 042637 263 17 0 00 000000 RTN ; return
7291
7292 042640 MWBADR: BLOCK 3 ; CRAM addresses
7293 042643 MWBLCO: BLOCK 3 ; left correct
7294 042646 MWBLAC: BLOCK 3 ; left actual
7295 042651 MWBRCO: BLOCK 3 ; right correct
7296 042654 MWBRAC: BLOCK 3 ; right actual
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 171
DFPTA1 MAC 10-Oct-83 21:43 Program Utility Routines SEQ 0358
7297
7298 ;#********************************************************************
7299 ;* MVPNT - Print verify error data
7300 ;#********************************************************************
7301
7302 042657 335 00 0 00 064357' MVPNT: SKIPGE MVNUM ; any errors to report?
7303 042660 263 17 0 00 000000 RTN ; no - return
7304 042661 261 17 0 00 000000 RPUT (0,1,2,3,4,5,6) ; save some AC's
7305
7306 042670 350 01 0 00 064357' AOS 1,MVNUM ; get correct error count 1..n
7307 042671 200 00 0 00 000001 MOVE 1
7308 042672 037 00 0 00 051602 TMSGC <? >
7309 042673 037 15 0 00 000000 PNTDEC ; print it
7310 042674 037 00 0 00 061744 TMSG <. CRAM verify errors:>
7311 042675 037 00 0 00 061751 TMSGC <Addr --- Correct --- --- Actual --- -- Discrepancy -->
7312 042676 400 04 0 00 000000 SETZ 4, ; pointer to error data
7313 042677 200 00 0 04 042640 MVPNT1: MOVE MWBADR(4) ; get address
7314 042700 037 00 0 00 030242 PCRL
7315 042701 037 04 0 00 000000 PNT4 ; print it
7316 042702 037 00 0 00 051536 TMSG < >
7317 042703 200 02 0 04 042643 MOVE 2,MWBLCO(4) ; get left half
7318 042704 200 03 0 04 042651 MOVE 3,MWBRCO(4) ; get right half
7319 042705 260 17 0 00 042736 GO MVPNTW ; print it
7320 042706 037 00 0 00 051536 TMSG < >
7321 042707 200 02 0 04 042646 MOVE 2,MWBLAC(4) ; get left half
7322 042710 200 03 0 04 042654 MOVE 3,MWBRAC(4) ; get right half
7323 042711 260 17 0 00 042736 GO MVPNTW ; print it
7324 042712 037 00 0 00 051536 TMSG < >
7325 042713 200 02 0 04 042643 MOVE 2,MWBLCO(4) ; get left half
7326 042714 430 02 0 04 042646 XOR 2,MWBLAC(4) ; xor actual data
7327 042715 200 03 0 04 042651 MOVE 3,MWBRCO(4) ; get right half
7328 042716 430 03 0 04 042654 XOR 3,MWBRAC(4) ; xor actual data
7329 042717 260 17 0 00 042736 GO MVPNTW ; print it
7330 042720 377 00 0 00 000001 SOSG 1 ; decrement error count - done?
7331 042721 254 00 0 00 042726 JRST MVPNTX ; yes - exit
7332 042722 350 00 0 00 000004 AOS 4 ; point to next word
7333 042723 305 04 0 00 000003 CAIGE 4,3 ; 3 printed already?
7334 042724 254 00 0 00 042677 JRST MVPNT1 ; no - loop till done
7335 042725 037 00 0 00 061767 TMSGC < ...>
7336 042726 262 17 0 00 000006 MVPNTX: RGET (6,5,4,3,2,1,0) ; yes - restore AC's
7337
7338 042735 263 17 0 00 000000 RTN ; return
7339
7340 042736 242 03 0 00 000006 MVPNTW: LSH 3,^D6 ; left justify the data
7341 042737 246 02 0 00 000006 LSHC 2,^D6 ; left justify both words
7342 042740 200 05 0 00 061771 MOVE 5,[POINT 3,2] ; initial byte pointer
7343 042741 201 06 0 00 000024 MOVEI 6,^D20 ; number of bytes to print
7344 042742 134 00 0 00 000005 ILDB 5 ; get byte
7345 042743 037 16 0 00 000003 PNTOCS ; print it
7346 042744 365 06 0 00 042742 SOJGE 6,.-2 ; loop till done
7347 042745 263 17 0 00 000000 RTN
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 172
DFPTA1 MAC 10-Oct-83 21:43 Program Utility Routines SEQ 0359
7348
7349 ;#********************************************************************
7350 ;* MLIST - List microcode of a test
7351 ;#********************************************************************
7352
7353 042746 261 17 0 00 000000 MLIST: RPUT (0,1,2,3,4) ; save some AC's
7354
7355 042753 037 00 0 00 060636 TMSGC <ADDR/ JUMP PAR OUT MGC SOR FUN DES CC RAM PA PB SK BUS CRY CTL TM SP MK>
7356 042754 200 04 0 00 000001 MOVE 4,1 ; get address of table in AC4
7357 042755 200 02 0 04 000000 MLIST0: MOVE 2,(4) ; get first word
7358 042756 316 02 0 00 060021 CAMN 2,[-1] ; end of list?
7359 042757 254 00 0 00 043000 JRST MLISTX ; yes - exit
7360 042760 200 03 0 04 000001 MOVE 3,1(4) ; get second word
7361
7362 ; Print this CRAM entry
7363
7364 042761 037 00 0 00 030242 PCRL ; start a new line
7365 042762 135 00 0 00 061737 LDB [POINT 12,2,11] ; get cram load address
7366 042763 001 04 0 00 000000 PNTOCC 4,0 ; print it
7367 042764 037 00 0 00 060632 TMSG </ >
7368 042765 200 01 0 00 000003 MOVE 1,3 ; get word 2 (it has 'bad parity' flag)
7369 042766 135 02 0 00 061740 LDB 2,[POINT 24,2,35] ; get CRAM bits 0-23
7370 042767 246 02 0 00 000006 LSHC 2,6 ; now get bits 0-30 in AC2 (left half)
7371 042770 242 03 0 00 777772 LSH 3,-6 ; right justify AC3 (right half)
7372 042771 622 03 0 00 000002 TRZE 3,2 ; bit 59 set?
7373 042772 660 03 0 00 000001 TRO 3,1 ; yes - set rightmost bit
7374 042773 260 17 0 00 043125 GO CALPAR ; calculate parity
7375 042774 260 17 0 00 043007 GO PNTCRM ; print it
7376
7377 ; Point to next microword / Exit if Altmode typed / Exit when done
7378
7379 042775 271 04 0 00 000002 ADDI 4,2 ; increment by 2
7380 042776 336 00 0 00 064326' SKIPN ALTF ; altmode typed?
7381 042777 254 00 0 00 042755 JRST MLIST0 ; no - loop till done
7382 043000 037 00 0 00 030242 MLISTX: PCRL
7383 043001 262 17 0 00 000004 RGET (4,3,2,1,0) ; restore AC's
7384
7385 043006 263 17 0 00 000000 RTN ; return
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 173
DFPTA1 MAC 10-Oct-83 21:43 Program Utility Routines SEQ 0360
7386
7387 ;#********************************************************************
7388 ;* PNTCRM - Print CRAM word
7389 ;
7390 ; Arguments: AC2 - Left 30 bits
7391 ; AC3 - Right 30 bits
7392 ;#********************************************************************
7393
7394 043007 261 17 0 00 000000 PNTCRM: RPUT (0,1) ; save AC's
7395
7396 043011 135 00 0 00 061772 LDB [POINT 12,2,17] ; get MWJMPFLD
7397 043012 001 04 0 00 000000 PNTOCC 4,0 ; print it
7398 043013 037 00 0 00 054617 TMSG < >
7399 043014 135 00 0 00 061773 LDB [POINT 1,2,18] ; get MWPAR
7400 043015 037 01 0 00 000000 PNT1 ; print it
7401 043016 037 00 0 00 054617 TMSG < >
7402 043017 135 00 0 00 061774 LDB [POINT 1,2,19] ; get MWOUTPUTENA
7403 043020 037 01 0 00 000000 PNT1 ; print it
7404 043021 135 00 0 00 061775 LDB [POINT 10,2,29] ; get MWMGCFLD
7405 043022 001 04 0 00 000000 PNTOCC 4,0 ; print it
7406 043023 037 00 0 00 054617 TMSG < >
7407 043024 135 00 0 00 061776 LDB [POINT 3,2,32] ; get MWSORCEFLD
7408 043025 037 01 0 00 000000 PNT1 ; print it
7409 043026 037 00 0 00 054617 TMSG < >
7410 043027 135 00 0 00 061777 LDB [POINT 3,2,35] ; get MWFUNCTFLD
7411 043030 037 01 0 00 000000 PNT1 ; print it
7412 043031 037 00 0 00 054617 TMSG < >
7413 043032 135 00 0 00 062000 LDB [POINT 3,3,8] ; get MWDESTFLD
7414 043033 037 01 0 00 000000 PNT1 ; print it
7415 043034 037 00 0 00 054617 TMSG < >
7416 043035 135 00 0 00 062001 LDB [POINT 1,3,9] ; get MWCCENA
7417 043036 037 01 0 00 000000 PNT1 ; print it
7418 043037 037 00 0 00 000040 PSP
7419 043040 135 00 0 00 062002 LDB [POINT 1,3,10] ; get MWRAMODE
7420 043041 037 01 0 00 000000 PNT1 ; print it
7421 043042 037 00 0 00 000040 PSP
7422 043043 135 00 0 00 062003 LDB [POINT 4,3,14] ; get MWPORTAFLD
7423 043044 001 02 0 00 000000 PNTOCC 2,0 ; print it
7424 043045 037 00 0 00 000040 PSP
7425 043046 135 00 0 00 062004 LDB [POINT 4,3,18] ; get MWPORTBFLD
7426 043047 001 02 0 00 000000 PNTOCC 2,0 ; print it
7427 043050 037 00 0 00 000040 PSP
7428 043051 135 00 0 00 062005 LDB [POINT 5,3,23] ; get MWSKIPFLD
7429 043052 001 02 0 00 000000 PNTOCC 2,0 ; print it
7430 043053 037 00 0 00 054617 TMSG < >
7431 043054 135 00 0 00 062006 LDB [POINT 3,3,26] ; get MWBUSCTLFLD
7432 043055 037 01 0 00 000000 PNT1 ; print it
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 174
DFPTA1 MAC 10-Oct-83 21:43 Program Utility Routines SEQ 0361
7433 043056 037 00 0 00 054617 TMSG < >
7434 043057 135 00 0 00 062007 LDB [POINT 1,3,27] ; get MWCARRY
7435 043060 037 01 0 00 000000 PNT1 ; print it
7436 043061 037 00 0 00 000040 PSP
7437 043062 135 01 0 00 062010 LDB 1,[POINT 4,3,31] ; get MWCTRLFLD
7438 XCT [TMSG <JZ > ; print in English
7439 TMSG <CJS >
7440 TMSG <JMAP>
7441 TMSG <CJP >
7442 TMSG <PUSH>
7443 TMSG <JSRP>
7444 TMSG <CJV >
7445 TMSG <JRP >
7446 TMSG <RFCT>
7447 TMSG <RPCT>
7448 TMSG <CRTN>
7449 TMSG <CJPP>
7450 TMSG <LDCT>
7451 TMSG <LOOP>
7452 TMSG <CONT>
7453 043063 256 00 0 01 062031 TMSG <TWB >](1)
7454 043064 037 00 0 00 054617 TMSG < >
7455 043065 135 00 0 00 062051 LDB [POINT 1,3,32] ; get MWTIMEFLD
7456 043066 037 01 0 00 000000 PNT1 ; print it
7457 043067 037 00 0 00 000040 PSP
7458 043070 135 00 0 00 062052 LDB [POINT 2,3,34] ; get MWSPARE00-01
7459 043071 037 01 0 00 000000 PNT1 ; print it
7460 043072 037 00 0 00 000040 PSP
7461 043073 135 00 0 00 062053 LDB [POINT 1,3,35] ; get MWMARKBIT
7462 043074 037 01 0 00 000000 PNT1 ; print it
7463 043075 037 07 0 00 000003 TTALTM ; altmode typed?
7464 043076 334 00 0 00 000000 SKIPA ; no - continue
7465 GO [SETOM ALTF ; yes - set 'altmode typed' flag
7466 SETZM MULFLG ; and clear 'examine next' flag
7467 043077 260 17 0 00 062054 RTN]
7468 043100 262 17 0 00 000001 RGET (1,0) ; restore AC's
7469
7470 043102 263 17 0 00 000000 RTN ; return
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 175
DFPTA1 MAC 10-Oct-83 21:43 Program Utility Routines SEQ 0362
7471
7472 ;#********************************************************************
7473 ;* PNTWD - Print a CRAM word (xxxx xxxx xxxx xxxx xxxx)
7474 ;
7475 ; Argument: AC2 - Left half
7476 ; AC3 - Right half
7477 ;#********************************************************************
7478
7479 043103 261 17 0 00 000000 PNTWD: RPUT (0,1) ; save AC's
7480
7481 043105 135 00 0 00 061772 LDB [POINT 12,2,17] ; get 1st 4 digits
7482 043106 037 04 0 00 000000 PNT4 ; print them
7483 043107 135 00 0 00 062057 LDB [POINT 12,2,29] ; get 2nd 4 digits
7484 043110 037 04 0 00 000000 PNT4 ; print them
7485 043111 135 01 0 00 062060 LDB 1,[POINT 6,2,35] ; get next 6 bits
7486 043112 135 00 0 00 062061 LDB [POINT 6,3,11] ; get next 6 bits
7487 043113 242 01 0 00 000006 LSH 1,6 ; position correctly
7488 043114 434 00 0 00 000001 IOR 1 ; build 12 bits (3rd 4 digits)
7489 043115 037 04 0 00 000000 PNT4 ; print them
7490 043116 135 00 0 00 062062 LDB [POINT 12,3,23] ; get 1st 4 digits
7491 043117 037 04 0 00 000000 PNT4 ; print them
7492 043120 135 00 0 00 062063 LDB [POINT 12,3,35] ; get last 4 digits
7493 043121 037 04 0 00 000000 PNT4 ; print them
7494 043122 262 17 0 00 000001 RGET (1,0) ; restore AC's
7495
7496 043124 263 17 0 00 000000 RTN ; return
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 176
DFPTA1 MAC 10-Oct-83 21:43 Program Utility Routines SEQ 0363
7497
7498 ;#********************************************************************
7499 ;* CALPAR - Calculate parity for a CRAM location
7500 ;
7501 ; Arguments: AC1 - Contains 2nd word of microword as put together
7502 ; by the microword macro MWORD. This is only used
7503 ; to look at bit 35 which is a flag specifying bad
7504 ; parity.
7505 ; AC2 - Bits 0-29 (Right justified)
7506 ; AC3 - Bits 30-59 (Right justified)
7507 ;
7508 ; Function: Calculate good parity and insert into Bit 12 of the
7509 ; microword which is Bit 18 in AC2. Then if 'force bad
7510 ; parity' flag is set, complement this bit.
7511 ;
7512 ; Return: +1 always. AC's are unmodified, except bit 18 of AC2.
7513 ;#********************************************************************
7514
7515 043125 261 17 0 00 000004 CALPAR: RPUT (4,5,6,7) ; save AC's
7516
7517 043131 402 00 0 00 064330' SETZM CALMAR# ; clear MARK bit location
7518 043132 602 03 0 00 000001 TRNE 3,1 ; MARK bit set?
7519 043133 476 00 0 00 064330' SETOM CALMAR ; yes - note the fact
7520 043134 620 03 0 00 000001 TRZ 3,1 ; ensure MARK bit is zero
7521 043135 400 04 0 00 000000 SETZ 4, ; clear count of number of 1's
7522 043136 200 05 0 00 000002 MOVE 5,2 ; get left half
7523 043137 210 06 0 00 000005 MOVN 6,5 ; calculate number of 1's
7524 043140 632 05 0 00 000006 TDZE 5,6 ; ...
7525 043141 344 04 0 00 043137 AOJA 4,.-2 ; ...
7526 043142 200 05 0 00 000003 MOVE 5,3 ; get right half
7527 043143 210 06 0 00 000005 MOVN 6,5 ; calculate number of 1's
7528 043144 632 05 0 00 000006 TDZE 5,6 ; ...
7529 043145 344 04 0 00 043143 AOJA 4,.-2 ; ...
7530
7531 ; Now, the parity is even if bit 35 of AC4 is zero, and odd if bit 35 set
7532
7533 043146 606 04 0 00 000001 TRNN 4,1 ; bit 35 set?
7534 043147 431 02 0 00 400000 XORI 2,400000 ; no - complement bit 18
7535
7536 ; Also, handle force parity flag
7537
7538 043150 602 01 0 00 000001 TRNE 1,1 ; 'force bad parity' flag set?
7539 043151 431 02 0 00 400000 XORI 2,400000 ; yes - complement bit 18
7540
7541 ; Done - exit
7542
7543 043152 332 00 0 00 064330' SKIPE CALMAR ; MARK bit set initially?
7544 043153 660 03 0 00 000001 TRO 3,1 ; yes - set it now
7545 043154 262 17 0 00 000007 RGET (7,6,5,4) ; restore AC's
7546
7547 043160 263 17 0 00 000000 RTN ; return
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 177
DFPTA1 MAC 10-Oct-83 21:43 Program Utility Routines SEQ 0364
7548
7549 ;#********************************************************************
7550 ;* TLOAD - Load microcode/verify it for a test
7551 ;
7552 ; Arguments: AC1 - Contains address where microcode starts
7553 ;
7554 ; Function: Issue a port clear to the port to ensure it is stopped.
7555 ; Then call MLOAD to load the microcode, then call MVERFY
7556 ; to verify it. Abort on any error.
7557 ;
7558 ; Returns: +1 - Error occurred loading/verifying microcode
7559 ; +2 - Ok
7560 ;#********************************************************************
7561
7562 043161 332 00 0 00 064346' TLOAD: SKIPE LDEBUG ; ucode load debug switch set?
7563 043162 254 00 0 00 043201 JRST TLOADX ; yes - don't load ucode
7564 043163 316 16 0 00 046275 CAMN MBCN,PORTNI ; NI port?
7565 JRST [CAMN 1,TSLOD1 ; yes - already loaded?
7566 JRST TLOADX ; yes - don't load ucode
7567 043164 254 00 0 00 062064 JRST .+1]
7568 043165 316 16 0 00 046276 CAMN MBCN,PORTCI ; CI port?
7569 JRST [CAMN 1,TSLOD2 ; yes - already loaded?
7570 JRST TLOADX ; yes - don't load ucode
7571 043166 254 00 0 00 062067 JRST .+1]
7572 043167 261 17 0 00 000001 PUT 1 ; save AC1
7573 043170 260 17 0 00 035423* GO IPACLR ; do a 'port clear'
7574 043171 260 17 0 00 042507 GO MLOADN ; load it
7575 043172 254 00 0 00 043203 JRST TLOADE ; failed
7576 043173 200 01 0 17 000000 MOVE 1,(P) ; get microcode address
7577 043174 316 16 0 00 046275 CAMN MBCN,PORTNI ; NI port?
7578 043175 202 01 0 00 064404' MOVEM 1,TSLOD1 ; yes - save it
7579 043176 316 16 0 00 046276 CAMN MBCN,PORTCI ; CI port?
7580 043177 202 01 0 00 064405' MOVEM 1,TSLOD2 ; yes - save it
7581 043200 262 17 0 00 000001 GET 1 ; restore AC1
7582 043201 350 00 0 17 000000 TLOADX: AOS (P) ; set up RTN +2
7583 043202 263 17 0 00 000000 RTN ; exit
7584
7585 043203 262 17 0 00 000001 TLOADE: GET 1 ; restore AC1
7586 043204 474 15 0 00 000000 SETO ERFLG, ; set error flag
7587 043205 027 00 0 00 043213 SCOPER TLERR ; print error message
7588 043206 255 00 0 00 000000 JFCL ; don't allow test looping
7589 043207 255 00 0 00 000000 JFCL ; ignore altmode
7590 043210 332 00 0 00 064352' SKIPE MDEBUG ; error message debug switch set?
7591 043211 350 00 0 17 000000 AOS (P) ; yes - skip this error
7592 043212 263 17 0 00 000000 RTN ; exit
7593
7594 043213 160000 062072 TLERR: MSG!TXALL![ASCIZ /Error loading test microcode - test aborted./]
7595 043214 270000 042657 LAST!CALL!TXALL!MVPNT ; print verify errors
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 178
DFPTA1 MAC 10-Oct-83 21:43 Program Utility Routines SEQ 0365
7596
7597 ;#********************************************************************
7598 ;* CSRPNT - Print CSR register as 'CSR: xxxxxx,,xxxxxx' followed by
7599 ;* English translation.
7600 ;#********************************************************************
7601
7602 043215 261 17 0 00 000000 CSRPNT: RPUT (0,1,2,3) ; save AC's
7603
7604 043221 037 00 0 00 062103 TMSGC <CSR: > ; print out the data
7605 043222 200 00 0 00 000001 MOVE 1
7606 043223 037 13 0 00 000000 PNTHW
7607 043224 260 17 0 00 042420* GO SWITT ; get switches
7608 043225 603 00 0 00 000200 TLNE TXTINH ; TXTINH set?
7609 043226 254 00 0 00 043232 JRST CSRPNX ; yes - exit
7610 043227 201 02 0 00 000023 MOVEI 2,^D19 ; character count so far
7611 043230 201 03 0 00 000023 MOVEI 3,^D19 ; continuation line column number
7612 043231 260 17 0 00 043237 GO CSRENG ; go print in English
7613 043232 262 17 0 00 000003 CSRPNX: RGET (3,2,1,0) ; restore AC's
7614
7615 043236 263 17 0 00 000000 RTN ; return
7616
7617 ;#********************************************************************
7618 ;* CSRENG - Print CSR data in English
7619 ;
7620 ; AC1 - Contains data to print
7621 ; AC2 - Contains character count on line so far
7622 ; AC3 - Contains column to start continuation lines
7623 ;#********************************************************************
7624
7625 043237 261 17 0 00 000000 CSRENG: RPUT (0,1,4,5,6) ; save AC's
7626
7627 043244 202 01 0 00 064332' MOVEM 1,CSRENS# ; save CSR data
7628 043245 200 04 0 00 000001 MOVE 4,1 ; get data into AC1
7629 043246 400 05 0 00 000000 SETZ 5, ; clear bit index
7630 043247 404 04 0 00 062105 AND 4,[777770,,777770] ; clear port ID and PI bits
7631 043250 434 04 0 00 062106 IOR 4,[000004,,000004] ; set bits so both are printed
7632 043251 322 04 0 00 043270 CSREN0: JUMPE 4,CSRENX ; zero? yes - exit
7633 043252 607 04 0 00 400000 TLNN 4,400000 ; no - bit set?
7634 043253 254 00 0 00 043266 JRST CSREN2 ; no - continue
7635 043254 271 02 0 00 000007 ADDI 2,7 ; increment character count
7636 043255 305 02 0 00 000110 CAIGE 2,^D72 ; over 72 characters?
7637 043256 254 00 0 00 043265 JRST CSREN1 ; no - go print
7638 043257 037 00 0 00 030242 PCRL ; yes - print CRLF, then
7639 043260 200 01 0 00 000003 MOVE 1,3 ; print spaces to start
7640 043261 037 00 0 00 051536 TMSG < > ; in proper column, and
7641 043262 367 01 0 00 043261 SOJG 1,.-1 ; adjust character count
7642 043263 200 02 0 00 000003 MOVE 2,3 ; properly
7643 043264 271 02 0 00 000007 ADDI 2,7 ; increment character count
7644 043265 256 00 0 05 043276 CSREN1: XCT CSRENB(5) ; yes - print it
7645 043266 242 04 0 00 000001 CSREN2: LSH 4,1 ; left shift one bit
7646 043267 345 05 0 00 043251 AOJGE 5,CSREN0 ; increment and keep looping
7647 043270 262 17 0 00 000006 CSRENX: RGET (6,5,4,1,0) ; restore AC's
7648
7649 043275 263 17 0 00 000000 RTN
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 179
DFPTA1 MAC 10-Oct-83 21:43 Program Utility Routines SEQ 0366
7650
7651 ;#********************************************************************
7652 ;* CSRENB - CSR bits
7653 ;#********************************************************************
7654
7655 043276 037 00 0 00 062107 CSRENB: TMSG <PortP > ; 0
7656 043277 037 00 0 00 062111 TMSG <CsrRqs > ; 1
7657 043300 037 00 0 00 062113 TMSG <CsrChn > ; 2
7658 043301 037 00 0 00 062115 TMSG <Dinit > ; 3
7659 043302 037 00 0 00 062117 TMSG <PI00Rq > ; 4
7660 043303 037 00 0 00 062121 TMSG <RqInt > ; 5
7661 043304 037 00 0 00 062123 TMSG <CramPE > ; 6
7662 043305 037 00 0 00 062125 TMSG <MBErr > ; 7
7663 043306 037 00 0 00 062127 TMSG <Unused > ; 8
7664 043307 037 00 0 00 062127 TMSG <Unused > ; 9
7665 043310 037 00 0 00 062127 TMSG <Unused > ; 10
7666 043311 037 00 0 00 062131 TMSG <Idle > ; 11
7667 043312 037 00 0 00 062133 TMSG <Dcomp > ; 12
7668 043313 037 00 0 00 062135 TMSG <Ecomp > ; 13
7669 043314 037 00 0 00 062127 TMSG <Unused > ; 14
7670 GO [TMSG <ID=> ; 15
7671 LDB [POINT 3,CSRENS,17]
7672 PNT1
7673 043315 260 17 0 00 062141 RTN]
7674 043316 255 00 0 00 000000 JFCL ; 16
7675 043317 255 00 0 00 000000 JFCL ; 17
7676 043320 037 00 0 00 062145 TMSG <PClr > ; 18
7677 043321 037 00 0 00 062147 TMSG <TEbuf > ; 19
7678 043322 037 00 0 00 062151 TMSG <GenEPE > ; 20
7679 043323 037 00 0 00 062153 TMSG <SelLAR > ; 21
7680 043324 037 00 0 00 062155 TMSG <SinCyc > ; 22
7681 043325 037 00 0 00 062157 TMSG <Spare1 > ; 23
7682 043326 037 00 0 00 062161 TMSG <EbusPE > ; 24
7683 043327 037 00 0 00 062163 TMSG <FQErr > ; 25
7684 043330 037 00 0 00 062165 TMSG <MVErr > ; 26
7685 043331 037 00 0 00 062167 TMSG <CmdQAV > ; 27
7686 043332 037 00 0 00 062171 TMSG <ResQAV > ; 28
7687 043333 037 00 0 00 062173 TMSG <Spare2 > ; 29
7688 043334 037 00 0 00 062175 TMSG <Disabl > ; 30
7689 043335 037 00 0 00 062177 TMSG <Enable > ; 31
7690 043336 037 00 0 00 062201 TMSG <MPRun > ; 32
7691 GO [LDB [POINT 3,CSRENS,35]
7692 SKIPN
7693 RTN
7694 TMSG <Pia=> ; 33-35
7695 PNT1
7696 043337 260 17 0 00 062205 RTN]
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 180
DFPTA1 MAC 10-Oct-83 21:43 Program Utility Routines SEQ 0367
7697
7698 ;#********************************************************************
7699 ;* SAVCRM - Save specified CRAM locations in a buffer
7700 ;#********************************************************************
7701
7702 043340 261 17 0 00 000000 SAVCRM: RPUT (0,1,2,3) ; save AC's
7703
7704 043344 260 17 0 00 043170* GO IPACLR ; do a 'port clear'
7705 043345 201 02 0 00 043407 MOVEI 2,SAVCRL ; get address of storage area
7706 043346 200 03 0 00 000001 MOVE 3,1 ; get AOBJN word
7707 043347 552 03 0 00 037255 SAVCR0: HRRZM 3,CADDR ; set up CRAM address
7708 043350 260 17 0 00 037735 GO DRCRAM ; read CRAM location
7709 043351 120 00 0 00 037256 DMOVE CWORDL ; get location
7710 043352 124 00 0 02 000000 DMOVEM (2) ; save it
7711 043353 271 02 0 00 000002 ADDI 2,2 ; point to next location
7712 043354 253 03 0 00 043347 AOBJN 3,SAVCR0 ; loop till done
7713 043355 262 17 0 00 000003 RGET (3,2,1,0) ; restore AC's
7714
7715 043361 263 17 0 00 000000 RTN ; return
7716
7717
7718 ;#********************************************************************
7719 ;* RESCRM - Restore CRAM locations
7720 ;#********************************************************************
7721
7722 043362 261 17 0 00 000000 RESCRM: RPUT (0,1,2,3) ; save AC's
7723
7724 043366 260 17 0 00 043344* GO IPACLR ; do a 'port clear'
7725 043367 261 17 0 00 035271 PUT PARFLG ; save parity flag
7726 043370 402 00 0 00 035271 SETZM PARFLG ; don't calculate parity
7727 043371 201 02 0 00 043407 MOVEI 2,SAVCRL ; get address of storage area
7728 043372 200 03 0 00 000001 MOVE 3,1 ; get AOBJN word
7729 043373 552 03 0 00 037255 RESCR0: HRRZM 3,CADDR ; set up CRAM address
7730 043374 120 00 0 02 000000 DMOVE (2) ; save it
7731 043375 124 00 0 00 037256 DMOVEM CWORDL ; get location
7732 043376 260 17 0 00 037703 GO DWCRAM ; read CRAM location
7733 043377 271 02 0 00 000002 ADDI 2,2 ; point to next location
7734 043400 253 03 0 00 043373 AOBJN 3,RESCR0 ; loop till done
7735 043401 262 17 0 00 035271 GET PARFLG ; restore parity flag
7736 043402 262 17 0 00 000003 RGET (3,2,1,0) ; restore AC's
7737
7738 043406 263 17 0 00 000000 RTN ; return
7739
7740 ; CRAM storage area
7741
7742 043407 SAVCRL: BLOCK ^D50
7743
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 181
DFPTA1 MAC 10-Oct-83 21:43 SPEAR Reporting SEQ 0368
7744 SUBTTL SPEAR Reporting
7745
7746 ;#********************************************************************
7747 ;* SPREP1 - Print initial SPEAR report 'diagnostic started'
7748 ;#********************************************************************
7749
7750 043471 332 00 0 00 064413' SPREP1: SKIPE UDEBUG ; debug mode?
7751 043472 263 17 0 00 000000 RTN ; yes - return
7752 043473 332 00 0 00 030037 SKIPE USER ; exec mode?
7753 043474 332 00 0 00 064401' SKIPE SPEAR1 ; already done?
7754 043475 263 17 0 00 000000 RTN ; yes - return
7755
7756 ; Check switches first
7757
7758 043476 261 17 0 00 000000 RPUT (0,1) ; save AC's
7759
7760 043500 260 17 0 00 043224* GO SWITT ; get program switches
7761 043501 602 00 0 00 004000 TRNE DSPEAR ; SPEAR reporting disabled?
7762 043502 254 00 0 00 043513 JRST SPRE1X ; yes - exit
7763
7764 ; Get PPN and build entry / get time and insert it
7765
7766 043503 260 17 0 00 043700 SPCHK1: GO GETPPN ; get user's PPN
7767 043504 202 01 0 00 043530 MOVEM 1,SENT10+11+1 ; save in SPEAR entry block
7768 043505 104 00 0 00 000227 GTAD ; get time and day
7769 043506 202 01 0 00 043524 MOVEM 1,SENT10+5+1 ; save it
7770
7771 ; Make the entry
7772
7773 043507 201 01 0 00 043516 MOVEI 1,SENT10 ; get address of argument block
7774 043510 201 02 0 00 000013 MOVEI 2,^D10+1 ; get length
7775 043511 104 00 0 00 000527 S1: SYERR ; write to SYSERR file
7776
7777 ; Exit
7778
7779 043512 476 00 0 00 064401' SETOM SPEAR1 ; set 'SPEAR initial msg done' flag
7780 043513 262 17 0 00 000001 SPRE1X: RGET (1,0) ; restore AC's
7781
7782 043515 263 17 0 00 000000 RTN ; return
7783
7784 ; SPEAR entry block 10
7785
7786 043516 250000 000000 SENT10: 250000,,0 ; event type
7787 043517 000000 000000 0 ; zero
7788 043520 000000 000000 0 ; zero
7789 043521 000000 000000 0 ; zero
7790 043522 000000 000000 0 ; (for Release 6.0 or later)
7791 043523 000000 020002 20002 ; time of occurence block
7792 043524 000000 000000 0 ; time
7793 043525 000000 100004 0,,100004 ; 4 words, type 10 code
7794 043526 44 46 60 64 41 00 SIXBIT /DFPTA/ ; diagnostic name
7795 043527 000000 000001 MCNVER,,DECVER ; diagnostic version
7796 043530 000000 000000 0 ; user PPN
7797 043531 000000 000000 0
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 182
DFPTA1 MAC 10-Oct-83 21:43 SPEAR Reporting SEQ 0369
7798
7799 ;#********************************************************************
7800 ;* SPREP2 - Print error or successful completion SPEAR report
7801 ;#********************************************************************
7802
7803 043532 336 00 0 00 064413' SPREP2: SKIPN UDEBUG ; debug mode?
7804 043533 336 00 0 00 030037 SKIPN USER ; exec mode?
7805 043534 263 17 0 00 000000 RTN ; yes - return
7806
7807 ; First check if anything should be reported now
7808
7809 043535 261 17 0 00 000000 PUT 0 ; save AC0
7810 043536 200 00 0 00 064402' MOVE SPEAR2 ; get reporting flag
7811 043537 322 00 0 00 043543 JUMPE SPRE2A ; nothing yet? yes - continue
7812 043540 316 00 0 00 060021 CAMN [-1] ; already reported an error?
7813 JRST [GET ; yes - exit
7814 043541 254 00 0 00 054655 RTN]
7815 JUMPE ERFLG,[GET ; error this time? no - exit
7816 043542 322 15 0 00 054655 RTN]
7817
7818 ; Check switches
7819
7820 043543 261 17 0 00 000001 SPRE2A: RPUT (1,2,3,4) ; save AC's
7821
7822 043547 260 17 0 00 043500* GO SWITT ; get program switches
7823 043550 602 00 0 00 004000 TRNE DSPEAR ; SPEAR reporting disabled?
7824 043551 254 00 0 00 043630 JRST SPRE2X ; yes - exit
7825
7826 ; Initialize entry
7827
7828 043552 402 00 0 00 043652 SPCHK2: SETZM SENT11+^D11+1 ; clear test number
7829 043553 402 00 0 00 043654 SETZM SENT11+^D13+1 ; ...
7830 043554 201 02 0 00 000003 MOVEI 2,3 ; set block length to 3 words
7831 043555 137 02 0 00 062213 DPB 2,[POINT 9,SEN11L,35] ; save length
7832 043556 322 15 0 00 043614 JUMPE ERFLG,SPRE2C ; error? no - continue
7833
7834 ; Insert test name
7835
7836 043557 200 01 0 00 046304 MOVE 1,TSTCLS ; get test class
7837 MOVE 1,[SIXBIT /TSTE00/
7838 SIXBIT /TSTS00/
7839 SIXBIT /TSTA00/
7840 SIXBIT /TSTM00/
7841 043560 200 01 0 01 062214 SIXBIT /TSTC00/](1)
7842 043561 135 00 0 00 062221 LDB [POINT 3,TSTNUM,32] ; get digit 1
7843 043562 271 00 0 00 000020 ADDI 20 ; convert to SIXBIT
7844 043563 137 00 0 00 062222 DPB [POINT 6,1,29] ; save it
7845 043564 135 00 0 00 062223 LDB [POINT 3,TSTNUM,35] ; get digit 2
7846 043565 271 00 0 00 000020 ADDI 20 ; convert to SIXBIT
7847 043566 137 00 0 00 062224 DPB [POINT 6,1,35] ; save it
7848 043567 202 01 0 00 043652 MOVEM 1,SENT11+^D11+1 ; save test number
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 183
DFPTA1 MAC 10-Oct-83 21:43 SPEAR Reporting SEQ 0370
7849
7850 ; Insert test description
7851
7852 043570 200 02 0 00 046304 MOVE 2,TSTCLS ; get test class
7853 XCT [MOVEI 2,TEBUS ; get starting address in address
7854 MOVEI 2,TSEQ ; table
7855 MOVEI 2,TALU
7856 MOVEI 2,TMPROC
7857 043571 256 00 0 02 053416 MOVEI 2,TCBUS](2)
7858 043572 270 02 0 00 046305 ADD 2,TSTNUM ; include the test number
7859 043573 370 00 0 00 000002 SOS 2 ; allow for tests 1..
7860 043574 202 02 0 00 046311 MOVEM 2,TSTADD ; save the dispatch table address
7861 043575 260 17 0 00 042304 GO TSTGET
7862 043576 200 01 0 00 046303 MOVE 1,TSTNAM ; get address of test description
7863 043577 474 02 0 00 000000 SETO 2, ; initialize character count
7864 043600 200 03 0 00 062225 MOVE 3,[POINT 7,0] ; get initial byte pointer
7865 043601 540 03 0 00 000001 HRR 3,1 ; insert address
7866 043602 200 04 0 00 062226 MOVE 4,[POINT 7,SENT11+^D13+1];get initial byte pointer
7867 043603 134 00 0 00 000003 SPRE2B: ILDB 3 ; get a byte
7868 043604 136 00 0 00 000004 IDPB 4 ; save it
7869 043605 350 00 0 00 000002 AOS 2 ; increment byte count
7870 043606 326 00 0 00 043603 JUMPN SPRE2B ; loop till done
7871
7872 ; Insert block length ...
7873
7874 043607 231 02 0 00 000005 IDIVI 2,5 ; calculate number of words
7875 043610 332 00 0 00 000003 SKIPE 3 ; remainder?
7876 043611 350 00 0 00 000002 AOS 2 ; yes - add in partial word
7877 043612 271 02 0 00 000003 ADDI 2,3 ; calculate subtotal
7878 043613 137 02 0 00 062213 DPB 2,[POINT 9,SEN11L,35] ; save length
7879
7880 ; Add time and day
7881
7882 043614 104 00 0 00 000227 SPRE2C: GTAD ; get time and day
7883 043615 202 01 0 00 043644 MOVEM 1,SENT11+5+1 ; save it
7884
7885 ; Get PPN and build entry / get time and insert it
7886
7887 043616 260 17 0 00 043700 GO GETPPN ; get user's PPN
7888 043617 202 01 0 00 043650 MOVEM 1,SEN11L-1 ; save in SPEAR entry block
7889
7890 ; Make the SPEAR entry
7891
7892 043620 201 01 0 00 043636 MOVEI 1,SENT11 ; get address of argument block
7893 043621 135 02 0 00 062213 LDB 2,[POINT 9,SEN11L,35] ; get length
7894 043622 271 02 0 00 000013 ADDI 2,^D10+1 ; calculate total block length
7895 043623 104 00 0 00 000527 S2: SYERR ; write to SYSERR file
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 184
DFPTA1 MAC 10-Oct-83 21:43 SPEAR Reporting SEQ 0371
7896
7897 ; Exit
7898
7899 043624 200 00 0 00 060021 MOVE [-1] ; get flag for 'Error message'
7900 043625 336 00 0 00 000015 SKIPN ERFLG ; error flag set?
7901 043626 200 00 0 00 061100 MOVE [-2] ; no - get flag for 'Final message'
7902 043627 202 00 0 00 064402' MOVEM SPEAR2 ; set 'SPEAR err/fin msg done' flag
7903 043630 262 17 0 00 000004 SPRE2X: RGET (4,3,2,1,0) ; restore AC's
7904
7905 043635 263 17 0 00 000000 RTN ; return
7906
7907 ; SPEAR entry block 11
7908
7909 043636 250000 000000 SENT11: 250000,,0 ; event type
7910 043637 000000 000000 0 ; zero
7911 043640 000000 000000 0 ; zero
7912 043641 000000 000000 0 ; zero
7913 043642 000000 000000 0 ; (for Release 6.0 or later)
7914 043643 000000 020002 20002 ; time of occurence block
7915 043644 000000 000000 0 ; time
7916
7917 043645 000000 100004 0,,100004 ; 4 words, type 10 code
7918 043646 44 46 60 64 41 00 SIXBIT /DFPTA/ ; diagnostic name
7919 043647 000000 000001 MCNVER,,DECVER ; diagnostic version
7920 043650 000000 000000 0 ; user PPN
7921
7922 043651 000000 110000 SEN11L: 0,,110000 ; type 11 code
7923 043652 000000 000000 0 ; failing test name
7924 043653 000000 000003 3 ; failing test description offset
7925 043654 BLOCK ^D20 ; ASCII test description
7926
7927
7928 ;#********************************************************************
7929 ;* GETPPN - Find out PPN number
7930 ;#********************************************************************
7931
7932 043700 261 17 0 00 000002 GETPPN: RPUT (2,3) ; save AC's
7933
7934 043702 474 01 0 00 000000 SETO 1, ; indicate current job
7935 043703 200 02 0 00 062227 MOVE 2,[-1,,1] ; place 1 word into AC1
7936 043704 201 03 0 00 000003 MOVEI 3,3 ; point to connected directory number
7937 043705 104 00 0 00 000507 GETJI ; get job information
7938 043706 400 01 0 00 000000 SETZ 1, ; error - just clear AC1
7939 043707 262 17 0 00 000003 RGET (3,2) ; restore AC's
7940
7941 043711 263 17 0 00 000000 RTN ; return
7942
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 185
DFPTA1 MAC 10-Oct-83 21:43 Test Execute Routines SEQ 0372
7943 SUBTTL Test Execute Routines
7944
7945 ;#********************************************************************
7946 ;* SEXEC - Execute entries in a 'Single Step Table'
7947 ;
7948 ; This routine is used to simplify the coding of micro-diagnostic tests
7949 ; which single step the microsequencer and which normally pass or fail
7950 ; depending on the CRAM address latched into the Latch Address Register
7951 ; at various points in the test.
7952 ;
7953 ; This routine is given a pointer to the 'Single Step Table'. It then
7954 ; executes one entry and returns +1,+2,+3 or +4 depending on the type
7955 ; of entry and the result.
7956 ;
7957 ; Argument: AC6 - Address of 'Single Step Table'
7958 ;
7959 ; Return: +1 - End of table was seen.
7960 ; +2 - A routine was called, and this entry has completed.
7961 ; +3 - The single steps are done but final address incorrect
7962 ; +4 - The single steps are done and final address correct
7963 ;
7964 ; NSSTEP - Contains number of single steps done
7965 ; SSADDR - Initial starting address
7966 ; SEADDR - Correct final address
7967 ; SAADDR - Actual final address
7968 ;
7969 ; AC6 - Updated to point to the next table location
7970 ;
7971 ; Single Step Table Format:
7972 ;
7973 ; Entry
7974 ; Entry
7975 ; ...
7976 ; SSLAST ; last entry (zero)
7977 ;
7978 ; 'Entry' is of the form:
7979 ;
7980 ; Bits 0-2 - Type of entry - 0 - Single Step (start addr given)(SSSTRT)
7981 ; 1 - Single Step (continue) (SSCONT)
7982 ; 2 - Special Call (SSCALL)
7983 ; 3 - Special Call, pass/fail exit (SSCHK)
7984 ; 4 - Select new table address (SSJRST)
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 186
DFPTA1 MAC 10-Oct-83 21:43 Test Execute Routines SEQ 0373
7985
7986 ; Bits 3-35 - Defined per entry type.
7987 ;
7988 ; Entry type 0 (SSLAST) - All zero - indicates end of table
7989 ;
7990 ; Entry type 1 (SSSTRT) - Bits 3-11 - Single step address to start at
7991 ; 12-23 - Number of single steps to do
7992 ; 24-35 - Correct end address
7993 ;
7994 ; Entry type 2 (SSCONT) - Bits 3-11 - Unused
7995 ; 12-23 - Number of single steps to do
7996 ; 24-35 - Correct end address
7997 ;
7998 ; Entry type 3 (SSCALL) - Bits 3-35 - Address of routine to call
7999 ;
8000 ; Entry type 4 (SSCHK) - Bits 3-35 - Address of routine to call (return
8001 ; +1 if done with test, +2 otherwise)
8002 ;
8003 ; Entry type 5 (SSJRST) - Bits 3-35 - Table address to continue
8004 ;#********************************************************************
8005
8006 043712 261 17 0 00 000000 SEXEC: RPUT (0,1,2) ; save AC's
8007
8008
8009 ; Check if end of table
8010
8011 043715 200 02 0 06 000000 MOVE 2,(6) ; get entry
8012 043716 350 00 0 00 000006 AOS 6 ; point to next entry
8013 043717 322 02 0 00 043723 JUMPE 2,SEXEX1 ; end of table - yes - exit
8014
8015 ; Determine type of entry and dispatch
8016
8017 043720 135 01 0 00 062230 LDB 1,[POINT 3,2,2] ; get entry
8018 XCT [JRST SEXEX1 ; dispatch on it
8019 JRST SEXSSS
8020 JRST SEXSSC
8021 JRST SEXCAL
8022 JRST SEXCHK
8023 JRST SEXJRS
8024 JRST SEXERR
8025 JRST SEXERR
8026 JRST SEXERR
8027 043721 256 00 0 01 062231 JRST SEXERR](1)
8028
8029 ; Error in Single Step Table
8030
8031 043722 037 00 0 00 062243 SEXERR: TMSGCD <Single Step Dispatch Table Error - Entry out of range>
8032 043723 332 00 0 00 064377' SEXEX1: SKIPE SDEBUG ; EXEC debug mode?
8033 043724 037 00 0 00 030242 PCRL ; yes - a final CRLF
8034 043725 262 17 0 00 000002 RGET (2,1,0) ; restore AC's
8035
8036 043730 263 17 0 00 000000 RTN ; return
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 187
DFPTA1 MAC 10-Oct-83 21:43 Test Execute Routines SEQ 0374
8037
8038 ; Execute single step
8039
8040 043731 135 00 0 00 062257 SEXSSS: LDB [POINT 12,2,23] ; get start address
8041 043732 202 00 0 00 042255* MOVEM SNEXT ; save it
8042 043733 200 00 0 00 043732* SEXSSC: MOVE SNEXT ; get next address
8043 043734 202 00 0 00 044045 MOVEM SSADDR ; save as start address
8044 043735 135 00 0 00 062260 LDB [POINT 9,2,11] ; get # of single steps to do
8045 043736 202 00 0 00 044044 MOVEM NSSTEP ; save it
8046 043737 135 00 0 00 062261 LDB [POINT 12,2,35] ; get correct end address
8047 043740 202 00 0 00 044046 MOVEM SEADDR ; save it
8048 043741 350 00 0 00 046306 AOS TSTSUB ; increment test segment
8049
8050 ; Set up start data
8051
8052 043742 336 01 0 00 042256* SKIPN 1,SDATA ; any data given?
8053 043743 201 01 0 00 000014 MOVEI 1,MPRUN!4 ; no - set initial data
8054 043744 332 00 0 00 030037 SKIPE USER ; user mode?
8055 043745 620 01 0 00 000007 TRZ 1,7 ; yes - clear PI level bits
8056 043746 660 01 0 00 060010 TRO 1,SELLAR!MPRUN!SINCYC ; ensure SELLAR,MPRUN,SINCYC are set
8057 043747 202 01 0 00 043742* MOVEM 1,SDATA ; save start data
8058 043750 260 17 0 00 000000* GO SETLAR ; set up to write to LAR
8059 043751 255 00 0 00 000000 JFCL ; error
8060
8061 ; Single step NSSTEP times
8062
8063 043752 200 02 0 00 044044 MOVE 2,NSSTEP ; get number of times
8064
8065 ; First write the LAR
8066
8067 043753 200 01 0 00 043733* SEXSS0: MOVE 1,SNEXT ; get start address
8068 043754 242 01 0 00 000001 LSH 1,1 ; position properly
8069 043755 260 17 0 00 042573* GO LDRAR ; load the register
8070
8071 ; Then do the single step
8072
8073 043756 200 01 0 00 043747* MOVE 1,SDATA ; get start data
8074 043757 260 17 0 00 041644* GO LDCSR ; write to CSR
8075
8076 ; Then read the LAR
8077
8078 043760 260 17 0 00 041645* GO RDLAR ; read LAR
8079 043761 242 01 0 00 777777 LSH 1,-1 ; position properly
8080 043762 202 01 0 00 043753* MOVEM 1,SNEXT ; set up new next address
8081 043763 367 02 0 00 043753 SOJG 2,SEXSS0 ; loop till done
8082 043764 202 01 0 00 044047 MOVEM 1,SAADDR ; save actual end address
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 188
DFPTA1 MAC 10-Oct-83 21:43 Test Execute Routines SEQ 0375
8083
8084 ; Debug output
8085
8086 043765 332 00 0 00 064377' SKIPE SDEBUG ; EXEC debug mode?
8087 GO [TMSGC <SSTEP: #S > ; yes - print debug
8088 MOVE NSSTEP ; output and then
8089 PNTDEC ; continue
8090 TMSG <, SADR >
8091 MOVE SSADDR
8092 PNTOCS
8093 TMSG <, EADR >
8094 MOVE SEADDR
8095 PNTOCS
8096 TMSG <, AADR >
8097 MOVE SAADDR
8098 PNTOCS
8099 043766 260 17 0 00 062273 RTN]
8100
8101 ; Done - compare end address to expected
8102
8103 043767 200 01 0 00 044047 MOVE 1,SAADDR ; save actual end address
8104 043770 316 01 0 00 044046 CAMN 1,SEADDR ; correct result?
8105 043771 350 00 0 17 777775 AOS -3(P) ; yes - increment return
8106 043772 350 00 0 17 777775 AOS -3(P) ; set up return
8107 043773 350 00 0 17 777775 AOS -3(P) ; set up return
8108 043774 262 17 0 00 000002 RGET (2,1,0) ; restore AC's
8109
8110 043777 263 17 0 00 000000 RTN ; return +3/+4
8111
8112 ; Execute a JRST and exit
8113
8114 044000 550 02 0 00 000002 SEXJRS: HRRZ 2,2 ; only want the address
8115 044001 332 00 0 00 064377' SKIPE SDEBUG ; EXEC debug mode?
8116 GO [TMSGC <SJRST Adr > ; yes - print debug
8117 MOVE 2 ; data and continue
8118 PNTOCS
8119 044002 260 17 0 00 062313 RTN]
8120 044003 200 06 0 00 000002 MOVE 6,2 ; get new table address
8121 044004 262 17 0 00 000002 RGET (2,1,0) ; restore AC's
8122
8123 044007 350 00 0 17 000000 AOS (P) ; set up return
8124 044010 263 17 0 00 000000 RTN ; return +2
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 189
DFPTA1 MAC 10-Oct-83 21:43 Test Execute Routines SEQ 0376
8125
8126 ; Execute a CALL and exit
8127
8128 044011 550 02 0 00 000002 SEXCAL: HRRZ 2,2 ; only want the address
8129 044012 332 00 0 00 064377' SKIPE SDEBUG ; EXEC debug mode?
8130 GO [TMSGC <SCALL Adr > ; yes - print debug
8131 MOVE 2 ; data and continue
8132 PNTOCS
8133 044013 260 17 0 00 062322 RTN]
8134 044014 261 17 0 00 000003 RPUT (3,4) ; save some AC's
8135
8136 044016 260 17 1 00 000002 GO @2 ; call the routine
8137 044017 262 17 0 00 000004 RGET (4,3,2,1,0) ; restore AC's
8138
8139 044024 350 00 0 17 000000 AOS (P) ; set up return
8140 044025 263 17 0 00 000000 RTN ; return +2
8141
8142 ; Execute a CALL and exit (if the return is +1 then exit test)
8143
8144 044026 550 02 0 00 000002 SEXCHK: HRRZ 2,2 ; only want the address
8145 044027 332 00 0 00 064377' SKIPE SDEBUG ; EXEC debug mode?
8146 GO [TMSGC <SCHK Adr > ; yes - print debug
8147 MOVE 2 ; data and continue
8148 PNTOCS
8149 044030 260 17 0 00 062331 RTN]
8150 044031 261 17 0 00 000003 RPUT (3,4) ; save some AC's
8151
8152 044033 260 17 1 00 000002 GO @2 ; call the routine
8153 044034 334 00 0 00 000000 SKIPA ; exit test
8154 044035 350 00 0 17 777773 AOS -5(P) ; ok - set up return
8155 044036 262 17 0 00 000004 RGET (4,3,2,1,0) ; restore AC's
8156
8157 044043 263 17 0 00 000000 RTN ; return +2 or +1
8158
8159 ; Miscellaneous
8160
8161 044044 000000 000000 NSSTEP: 0 ; number of single steps to do
8162 044045 000000 000000 SSADDR: 0 ; initial starting address
8163 044046 000000 000000 SEADDR: 0 ; correct final address
8164 044047 000000 000000 SAADDR: 0 ; actual final address
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 190
DFPTA1 MAC 10-Oct-83 21:43 Test Execute Routines SEQ 0377
8165
8166 ;#********************************************************************
8167 ;* SSPNT - Print out single step data that resulted in an error
8168 ;#********************************************************************
8169
8170 044050 261 17 0 00 000000 SSPNT: RPUT (0,1)
8171
8172 044052 200 01 0 00 000000* MOVE 1,SCOSW ; get switches
8173 044053 603 01 0 00 000200 TLNE 1,TXTINH ; inhibit text?
8174 044054 254 00 0 00 044073 JRST SSPN1 ; yes - print alternate format
8175
8176 ; Print single step data
8177
8178 044055 037 00 0 00 062335 TMSGC <Start Addr: >
8179 044056 200 00 0 00 044045 MOVE SSADDR
8180 044057 037 04 0 00 000000 PNT4
8181 044060 037 00 0 00 062341 TMSG <, # Steps: >
8182 044061 200 00 0 00 044044 MOVE NSSTEP
8183 044062 037 15 0 00 000000 PNTDEC
8184 044063 037 00 0 00 057046 TMSG <.>
8185 044064 037 00 0 00 062344 TMSGC <End Addr - Correct: >
8186 044065 200 00 0 00 044046 MOVE SEADDR
8187 044066 037 04 0 00 000000 PNT4
8188 044067 037 00 0 00 062351 TMSGC < Actual: >
8189 044070 200 00 0 00 044047 MOVE SAADDR
8190 044071 037 04 0 00 000000 PNT4
8191 044072 254 00 0 00 044110 JRST SSPNX
8192
8193 ; Print single step data
8194
8195 044073 037 00 0 00 062356 SSPN1: TMSGC <Start >
8196 044074 200 00 0 00 044045 MOVE SSADDR
8197 044075 037 04 0 00 000000 PNT4
8198 044076 037 00 0 00 062360 TMSG <, # Steps >
8199 044077 200 00 0 00 044044 MOVE NSSTEP
8200 044100 037 15 0 00 000000 PNTDEC
8201 044101 037 00 0 00 057046 TMSG <.>
8202 044102 037 00 0 00 062363 TMSGC <End (C): >
8203 044103 200 00 0 00 044046 MOVE SEADDR
8204 044104 037 04 0 00 000000 PNT4
8205 044105 037 00 0 00 062366 TMSGC < (A): >
8206 044106 200 00 0 00 044047 MOVE SAADDR
8207 044107 037 04 0 00 000000 PNT4
8208
8209 ; Done - exit
8210
8211 044110 262 17 0 00 000001 SSPNX: RGET (1,0) ; restore AC's
8212
8213 044112 263 17 0 00 000000 RTN
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 191
DFPTA1 MAC 10-Oct-83 21:43 Test Execute Routines SEQ 0378
8214
8215 ;#********************************************************************
8216 ;* AEXEC - ALU type test execute routine
8217 ;
8218 ; This routine very simply starts up the port and waits for it to
8219 ; stop, then reads the LAR to find out where it stopped. If it
8220 ; does not stop (times out), this routine forces it to stop and
8221 ; records the stopping address.
8222 ;
8223 ; Arguments: AC1 - Amount of time in milliseconds before timeout
8224 ; AC2 - Correct error address
8225 ; AC3 - Correct final address
8226 ; AC4 - Start address
8227 ;
8228 ; Results: Rtn +1 - Error occurred
8229 ; Rtn +2 - No error found
8230 ;
8231 ; Updated: ALSRT - start address
8232 ; ALCSR - final CSR data
8233 ; ALERR - error final address
8234 ; ALCOR - correct final address
8235 ; ALACT - actual final address
8236 ; ALEBF - contents of EBUF at end
8237 ; ALTIM - amount of time to wait before timeout
8238 ; ALFLS - flag - start up (0 ok, -1 failed)
8239 ; ALFLE - flag - error address (0 ok, -1 incorrect)
8240 ; ALFLC - flag - stopped with CRAM PE (0 yes, -1 no)
8241 ; ALFLT - flag - timeout occurred (0 no, -1 yes)
8242 ;#********************************************************************
8243
8244 044113 261 17 0 00 000000 AEXEC: RPUT (0,1,2) ; save some AC's
8245
8246
8247 ; Initialize everything
8248
8249 044116 202 01 0 00 044213 MOVEM 1,ALTIM ; save timeout time
8250 044117 202 02 0 00 044217 MOVEM 2,ALERR ; save error final address
8251 044120 202 03 0 00 044220 MOVEM 3,ALCOR ; correct final address
8252 044121 202 04 0 00 044214 MOVEM 4,ALSRT ; save start address
8253 044122 202 04 0 00 043762* MOVEM 4,SNEXT ; set up start address
8254 044123 402 00 0 00 044215 SETZM ALCSR ; clear final CSR data
8255 044124 402 00 0 00 044221 SETZM ALACT ; clear actual final address
8256 044125 402 00 0 00 044222 SETZM ALFLS ; clear flag 'start up ok'
8257 044126 402 00 0 00 044223 SETZM ALFLE ; clear flag 'error address ok'
8258 044127 402 00 0 00 044224 SETZM ALFLC ; clear flag 'stopped with CRAM PE'
8259 044130 402 00 0 00 044225 SETZM ALFLT ; clear flag 'timeout occurred'
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 192
DFPTA1 MAC 10-Oct-83 21:43 Test Execute Routines SEQ 0379
8260
8261 ; Start up the port
8262
8263 044131 260 17 0 00 043366* GO IPACLR ; do a 'port clear'
8264 044132 260 17 0 00 043750* GO SETLAR ; set up to write the LAR
8265 JRST [SETOM ALFLS ; failed - set flag and
8266 044133 254 00 0 00 062371 JRST AEXECX] ; exit
8267 044134 200 01 0 00 044122* MOVE 1,SNEXT ; get start address
8268 044135 242 01 0 00 000001 LSH 1,1 ; position properly
8269 044136 260 17 0 00 043755* GO LDRAR ; write to RAR
8270 044137 201 01 0 00 000010 MOVEI 1,MPRUN ; get MPRUN bit
8271 044140 260 17 0 00 043757* GO LDCSR ; start up the port
8272
8273 ; Wait the amount of time specified by the timeout period
8274
8275 044141 200 00 0 00 044213 MOVE ALTIM ; get amount of time
8276 044142 260 17 0 00 042430 GO ODELAY ; wait
8277
8278 ; Check final conditions
8279
8280 044143 260 17 0 00 042476* GO RDCSR ; read CSR
8281 JRST [SETOM ALFLS ; failed - set flag and
8282 044144 254 00 0 00 062371 JRST AEXECX] ; exit
8283 044145 202 01 0 00 044215 MOVEM 1,ALCSR ; save final CSR data
8284 044146 607 01 0 00 004000 TLNN 1,(CRAMPE) ; get a CRAM PE?
8285 044147 476 00 0 00 044224 SETOM ALFLC ; no - flag it
8286 044150 606 01 0 00 000010 TRNN 1,MPRUN ; MPRUN still set?
8287 044151 254 00 0 00 044163 JRST AEXEC0 ; no - continue
8288 044152 476 00 0 00 044225 SETOM ALFLT ; yes - flag timeout occurred
8289 044153 400 01 0 00 000000 SETZ 1, ; write 0's to CSR
8290 044154 260 17 0 00 044140* GO LDCSR ; this should stop it
8291 044155 260 17 0 00 044143* GO RDCSR ; read CSR
8292 044156 334 00 0 00 000000 SKIPA ; error
8293 044157 602 01 0 00 000010 TRNE 1,MPRUN ; MPRUN still set?
8294 044160 260 17 0 00 044131* GO IPACLR ; yes - do a port clear
8295 044161 260 17 0 00 044155* GO RDCSR ; read it again
8296 044162 255 00 0 00 000000 JFCL ; error
8297
8298 ; Read EBUF
8299
8300 044163 201 01 0 00 200000 AEXEC0: MOVEI 1,TSTEBF ; set bit to read EBUF
8301 044164 260 17 0 00 044154* GO LDCSR ; write it
8302 044165 260 17 0 00 040346* GO RDEBUF ; read EBUF
8303 044166 202 01 0 00 044216 MOVEM 1,ALEBF ; save data
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 193
DFPTA1 MAC 10-Oct-83 21:43 Test Execute Routines SEQ 0380
8304
8305 ; Read LAR ...
8306
8307 044167 260 17 0 00 044132* GO SETLAR ; set up to read LAR
8308 044170 255 00 0 00 000000 JFCL ; ignore error
8309 044171 260 17 0 00 043760* GO RDLAR ; read it
8310 044172 242 01 0 00 777777 LSH 1,-1 ; position properly
8311 044173 202 01 0 00 044221 MOVEM 1,ALACT ; save final address
8312 044174 312 01 0 00 044220 CAME 1,ALCOR ; correct?
8313 044175 476 00 0 00 044223 SETOM ALFLE ; no - flag it
8314
8315 ; Exit
8316
8317 044176 262 17 0 00 000002 AEXECX: RGET (2,1,0) ; restore AC's
8318
8319 044201 332 00 0 00 044223 SKIPE ALFLE ; error flag set?
8320 044202 263 17 0 00 000000 RTN ; yes - return +1
8321 044203 332 00 0 00 044222 SKIPE ALFLS ; error flag set?
8322 044204 263 17 0 00 000000 RTN ; yes - return +1
8323 044205 332 00 0 00 044224 SKIPE ALFLC ; error flag set?
8324 044206 263 17 0 00 000000 RTN ; yes - return +1
8325 044207 332 00 0 00 044225 SKIPE ALFLT ; error flag set?
8326 044210 263 17 0 00 000000 RTN ; yes - return +1
8327 044211 350 00 0 17 000000 AOS (P) ; no - set up RTN+2
8328 044212 263 17 0 00 000000 RTN ; return +2
8329
8330 ; Test variables
8331
8332 044213 000000 000000 ALTIM: 0 ; timeout time
8333 044214 000000 000000 ALSRT: 0 ; start address
8334 044215 000000 000000 ALCSR: 0 ; final CSR data
8335 044216 000000 000000 ALEBF: 0 ; final EBUF data
8336 044217 000000 000000 ALERR: 0 ; error final address
8337 044220 000000 000000 ALCOR: 0 ; correct final address
8338 044221 000000 000000 ALACT: 0 ; actual final address
8339 044222 000000 000000 ALFLS: 0 ; flag (0 - started ok
8340 ; -1 - failed to start)
8341 044223 000000 000000 ALFLE: 0 ; flag (0 - error address ok
8342 ; -1 - incorrect err addr)
8343 044224 000000 000000 ALFLC: 0 ; flag (0 - stopped with CRAM PE
8344 ; -1 - did not have CRAM PE)
8345 044225 000000 000000 ALFLT: 0 ; flag (0 - no timeout
8346 ; -1 - timeout occurred)
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 194
DFPTA1 MAC 10-Oct-83 21:43 Test Execute Routines SEQ 0381
8347
8348 ;#********************************************************************
8349 ;* AAPNT - Print results message
8350 ;#********************************************************************
8351
8352 044226 261 17 0 00 000000 AAPNT: RPUT (0,1) ; save AC's
8353
8354 044230 037 00 0 00 062373 TMSGC <Start addr: >
8355 044231 200 00 0 00 044214 MOVE ALSRT ; get start address
8356 044232 037 04 0 00 000000 PNT4 ; print it
8357 044233 200 01 0 00 044052* MOVE 1,SCOSW ; get switches
8358 044234 607 01 0 00 000200 TLNN 1,TXTINH ; full printout?
8359 GO [TMSGC <Final CSR data: >
8360 MOVE ALCSR ; yes - get CSR data
8361 PNTHW ; print it
8362 TMSGC <End Addr - Correct: >
8363 MOVE ALCOR
8364 PNT4
8365 TMSGC < Actual: >
8366 044235 260 17 0 00 062403 RTN]
8367 044236 603 01 0 00 000200 TLNE 1,TXTINH ; full printout?
8368 GO [TMSGC <End Addr (C): >
8369 MOVE ALCOR
8370 PNT4
8371 TMSGC < (A): >
8372 044237 260 17 0 00 062423 RTN]
8373 044240 200 00 0 00 044221 MOVE ALACT ; get end address
8374 044241 037 04 0 00 000000 PNT4 ; print it
8375
8376 ; Message if never started up in the first place
8377
8378 044242 336 00 0 00 044222 SKIPN ALFLS ; never got it started?
8379 044243 254 00 0 00 044246 JRST AAPNT0 ; no - continue
8380 044244 037 00 0 00 062430 TMSGC <Couldn't start the port>
8381 044245 254 00 0 00 044261 JRST AAPNTX ; exit
8382
8383 ; Message if stopped in error at the wrong place
8384
8385 044246 336 00 0 00 044223 AAPNT0: SKIPN ALFLE ; error addr correct?
8386 044247 254 00 0 00 044257 JRST AAPNT1 ; yes - continue
8387 044250 603 01 0 00 000200 TLNE 1,TXTINH ; full printout?
8388 044251 254 00 0 00 044261 JRST AAPNTX ; no - exit
8389 044252 037 00 0 00 062436 TMSGC <(Should have stopped at >
8390 044253 200 00 0 00 044220 MOVE ALCOR ; get correct address
8391 044254 037 04 0 00 000000 PNT4 ; print it
8392 044255 037 00 0 00 062444 TMSG < - test did not function properly)>
8393 044256 254 00 0 00 044261 JRST AAPNTX ; exit
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 195
DFPTA1 MAC 10-Oct-83 21:43 Test Execute Routines SEQ 0382
8394
8395 ; Message if CRAM PE did not set also
8396
8397 044257 332 00 0 00 044224 AAPNT1: SKIPE ALFLC ; CRAM PE set?
8398 044260 037 00 0 00 062453 TMSGC <CRAM PE should have set upon error>
8399
8400 ; Exit
8401
8402 044261 262 17 0 00 000001 AAPNTX: RGET (1,0) ; restore AC's
8403
8404 044263 263 17 0 00 000000 RTN ; exit
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 196
DFPTA1 MAC 10-Oct-83 21:43 Test Execute Routines SEQ 0383
8405
8406 ;#********************************************************************
8407 ;* BEXEC - Execute entries in a 'Single Step Table', verifying EBUF data
8408 ;
8409 ; This routine is used to simplify the coding of micro-diagnostic tests
8410 ; which single step the microsequencer and which normally pass or fail
8411 ; depending on the result stored in the EBUF at various points in the
8412 ; test.
8413 ;
8414 ; This routine is given a pointer to the 'Single Step Table'. It then
8415 ; executes one entry and returns +1,+2,+3 or +4 depending on the type
8416 ; of entry and the result.
8417 ;
8418 ; Argument: AC6 - Address of 'Single Step Table'
8419 ;
8420 ; Return: +1 - End of table was seen.
8421 ; +2 - A routine was called, and this entry has completed.
8422 ; +3 - The single steps are done but EBUF data incorrect
8423 ; +4 - The single steps are done and EBUF data correct
8424 ;
8425 ; NSSTEP - Contains number of single steps done
8426 ; SSADDR - Initial starting address
8427 ; SEADDR - Correct final address
8428 ; SAADDR - Actual final address
8429 ; CEBUF - Correct final EBUF data
8430 ; AEBUF - Actual final EBUF data
8431 ; BFLAG - flag - error address (0 ok, -1 incorrect)
8432 ;
8433 ; AC6 - Updated to point to the next table location
8434 ;
8435 ; Single Step Table Format:
8436 ;
8437 ; Entry
8438 ; Entry
8439 ; ...
8440 ; SSLAST ; last entry (zero)
8441 ;
8442 ; 'Entry' is of the form:
8443 ;
8444 ; Bits 0-2 - Type of entry - 0 - Single Step (start addr given)(SSSTRT)
8445 ; 1 - Single Step (continue) (SSCONT)
8446 ; 2 - Special Call (SSCALL)
8447 ; 3 - Special Call, pass/fail exit (SSCHK)
8448 ; 4 - Select new table address (SSJRST)
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 197
DFPTA1 MAC 10-Oct-83 21:43 Test Execute Routines SEQ 0384
8449
8450 ; Bits 3-35 - Defined per entry type.
8451 ;
8452 ; Entry type 0 (SSLAST) - All zero - indicates end of table
8453 ;
8454 ; Entry type 1 (SSSTRT) - Bits 3-11 - Number of single steps to do
8455 ; 12-23 - Single step address to start at
8456 ; 24-35 - Correct end address
8457 ;
8458 ; Entry type 2 (SSCONT) - Bits 3-11 - Number of single steps to do
8459 ; 12-23 - Unused
8460 ; 24-35 - Correct end address
8461 ;
8462 ; Entry type 3 (SSCALL) - Bits 3-35 - Address of routine to call
8463 ;
8464 ; Entry type 4 (SSCHK) - Bits 3-35 - Address of routine to call (return
8465 ; +1 if done with test, +2 otherwise)
8466 ;
8467 ; Entry type 5 (SSJRST) - Bits 3-35 - Table address to continue
8468 ;#********************************************************************
8469
8470 044264 261 17 0 00 000000 BEXEC: RPUT (0,1,2,3) ; save AC's
8471
8472
8473 ; Check if end of table
8474
8475 044270 200 02 0 06 000000 MOVE 2,(6) ; get entry (single step data)
8476 044271 200 03 0 06 000001 MOVE 3,1(6) ; get entry (EBUF correct data)
8477 044272 350 00 0 00 000006 AOS 6 ; point to next entry
8478 044273 322 02 0 00 044277 JUMPE 2,BEXEX1 ; end of table - yes - exit
8479
8480 ; Determine type of entry and dispatch
8481
8482 044274 135 01 0 00 062230 LDB 1,[POINT 3,2,2] ; get entry
8483 XCT [JRST BEXEX1 ; dispatch on it
8484 JRST BEXSSS
8485 JRST BEXSSC
8486 JRST BEXCAL
8487 JRST BEXCHK
8488 JRST BEXJRS
8489 JRST BEXERR
8490 JRST BEXERR
8491 JRST BEXERR
8492 044275 256 00 0 01 062463 JRST BEXERR](1)
8493
8494 ; Error in Single Step Table
8495
8496 044276 037 00 0 00 062243 BEXERR: TMSGCD <Single Step Dispatch Table Error - Entry out of range>
8497 044277 332 00 0 00 064377' BEXEX1: SKIPE SDEBUG ; EXEC debug mode?
8498 044300 037 00 0 00 030242 PCRL ; yes - a final CRLF
8499 044301 262 17 0 00 000003 RGET (3,2,1,0) ; restore AC's
8500
8501 044305 263 17 0 00 000000 RTN ; return
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 198
DFPTA1 MAC 10-Oct-83 21:43 Test Execute Routines SEQ 0385
8502
8503 ; Execute single step
8504
8505 044306 135 00 0 00 062257 BEXSSS: LDB [POINT 12,2,23] ; get start address
8506 044307 202 00 0 00 044134* MOVEM SNEXT ; save it
8507 044310 200 00 0 00 044307* BEXSSC: MOVE SNEXT ; get next address
8508 044311 202 00 0 00 044045 MOVEM SSADDR ; save as start address
8509 044312 135 00 0 00 062260 LDB [POINT 9,2,11] ; get # of single steps to do
8510 044313 202 00 0 00 044044 MOVEM NSSTEP ; save it
8511 044314 135 00 0 00 062261 LDB [POINT 12,2,35] ; get correct end address
8512 044315 202 00 0 00 044046 MOVEM SEADDR ; save it
8513 044316 202 03 0 00 044436 MOVEM 3,CEBUF ; save correct EBUF data
8514 044317 350 00 0 00 046306 AOS TSTSUB ; increment test segment
8515 044320 350 00 0 00 000006 AOS 6 ; point to next entry
8516
8517 ; Set up start data
8518
8519 044321 336 01 0 00 043756* SKIPN 1,SDATA ; any data given?
8520 044322 201 01 0 00 000014 MOVEI 1,MPRUN!4 ; no - set initial data
8521 044323 332 00 0 00 030037 SKIPE USER ; user mode?
8522 044324 620 01 0 00 000007 TRZ 1,7 ; yes - clear PI level bits
8523 044325 660 01 0 00 220010 TRO 1,TSTEBF!MPRUN!SINCYC
8524 044326 202 01 0 00 044321* MOVEM 1,SDATA ; save start data
8525 044327 620 01 0 00 200010 TRZ 1,TSTEBF!MPRUN ; ensure TSTEBF,MPRUN cleared
8526 044330 260 17 0 00 044164* GO LDCSR ; set up to write to LAR
8527
8528 ; Single step NSSTEP times
8529
8530 044331 200 02 0 00 044044 MOVE 2,NSSTEP ; get number of times
8531
8532 ; First write the LAR
8533
8534 044332 200 01 0 00 044310* BEXSS0: MOVE 1,SNEXT ; get start address
8535 044333 242 01 0 00 000001 LSH 1,1 ; position properly
8536 044334 260 17 0 00 044136* GO LDRAR ; load the register
8537
8538 ; Then do the single step
8539
8540 044335 200 01 0 00 044326* MOVE 1,SDATA ; get start data
8541 044336 260 17 0 00 044330* GO LDCSR ; write to CSR
8542
8543 ; Then read the EBUF
8544
8545 044337 260 17 0 00 044165* GO RDEBUF ; read it
8546 044340 202 01 0 00 044435 MOVEM 1,AEBUF ; save actual EBUF data
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 199
DFPTA1 MAC 10-Oct-83 21:43 Test Execute Routines SEQ 0386
8547
8548 ; Then read the LAR
8549
8550 044341 200 01 0 00 044335* MOVE 1,SDATA ; get start data
8551 044342 620 01 0 00 200010 TRZ 1,TSTEBF!MPRUN ; ensure TSTEBF and MPRUN cleared
8552 044343 660 01 0 00 040000 TRO 1,SELLAR ; and set SELLAR
8553 044344 260 17 0 00 044336* GO LDCSR ; write to CSR
8554 044345 260 17 0 00 044171* GO RDLAR ; read LAR
8555 044346 242 01 0 00 777777 LSH 1,-1 ; position properly
8556 044347 202 01 0 00 044332* MOVEM 1,SNEXT ; set up new next address
8557 044350 367 02 0 00 044332 SOJG 2,BEXSS0 ; loop till done
8558 044351 202 01 0 00 044047 MOVEM 1,SAADDR ; save actual end address
8559
8560 ; Debug output
8561
8562 044352 332 00 0 00 064377' SKIPE SDEBUG ; EXEC debug mode?
8563 GO [TMSGC <SSTEP: #S > ; yes - print debug
8564 MOVE NSSTEP ; output and then
8565 PNTDEC ; continue
8566 TMSG <, SADR >
8567 MOVE SSADDR
8568 PNTOCS
8569 TMSG <, EADR >
8570 MOVE SEADDR
8571 PNTOCS
8572 TMSG <, AADR >
8573 MOVE SAADDR
8574 PNTOCS
8575 TMSG <, EBUF >
8576 MOVE AEBUF
8577 PNTHW
8578 044353 260 17 0 00 062477 RTN]
8579
8580 ; Done - compare end address to expected
8581
8582 044354 402 00 0 00 044437 SETZM BFLAG ; clear 'incorrect address' flag
8583 044355 200 01 0 00 044047 MOVE 1,SAADDR ; save actual end address
8584 044356 312 01 0 00 044046 CAME 1,SEADDR ; correct result?
8585 044357 476 00 0 00 044437 SETOM BFLAG ; no - set 'incorrect address' flag
8586 044360 200 01 0 00 044435 MOVE 1,AEBUF ; get actual EBUF data
8587 044361 316 01 0 00 044436 CAMN 1,CEBUF ; correct result?
8588 044362 350 00 0 17 777774 AOS -4(P) ; yes - increment return
8589 044363 350 00 0 17 777774 AOS -4(P) ; set up return
8590 044364 350 00 0 17 777774 AOS -4(P) ; set up return
8591 044365 262 17 0 00 000003 RGET (3,2,1,0) ; restore AC's
8592
8593 044371 263 17 0 00 000000 RTN ; return +3/+4
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 200
DFPTA1 MAC 10-Oct-83 21:43 Test Execute Routines SEQ 0387
8594
8595 ; Execute a JRST and exit
8596
8597 044372 550 02 0 00 000002 BEXJRS: HRRZ 2,2 ; only want the address
8598 044373 332 00 0 00 064377' SKIPE SDEBUG ; EXEC debug mode?
8599 GO [TMSGC <SJRST Adr > ; yes - print debug
8600 MOVE 2 ; data and continue
8601 PNTOCS
8602 044374 260 17 0 00 062313 RTN]
8603 044375 200 06 0 00 000002 MOVE 6,2 ; get new table address
8604 044376 262 17 0 00 000003 RGET (3,2,1,0) ; restore AC's
8605
8606 044402 350 00 0 17 000000 AOS (P) ; set up return
8607 044403 263 17 0 00 000000 RTN ; return +2
8608
8609 ; Execute a CALL and exit
8610
8611 044404 550 02 0 00 000002 BEXCAL: HRRZ 2,2 ; only want the address
8612 044405 332 00 0 00 064377' SKIPE SDEBUG ; EXEC debug mode?
8613 GO [TMSGC <SCALL Adr > ; yes - print debug
8614 MOVE 2 ; data and continue
8615 PNTOCS
8616 044406 260 17 0 00 062322 RTN]
8617 044407 261 17 0 00 000004 PUT 4 ; save another AC
8618 044410 260 17 1 00 000002 GO @2 ; call the routine
8619 044411 262 17 0 00 000004 RGET (4,3,2,1,0) ; restore AC's
8620
8621 044416 350 00 0 17 000000 AOS (P) ; set up return
8622 044417 263 17 0 00 000000 RTN ; return +2
8623
8624 ; Execute a CALL and exit (if the return is +1 then exit test)
8625
8626 044420 550 02 0 00 000002 BEXCHK: HRRZ 2,2 ; only want the address
8627 044421 332 00 0 00 064377' SKIPE SDEBUG ; EXEC debug mode?
8628 GO [TMSGC <SCHK Adr > ; yes - print debug
8629 MOVE 2 ; data and continue
8630 PNTOCS
8631 044422 260 17 0 00 062331 RTN]
8632 044423 261 17 0 00 000004 PUT 4 ; save another AC
8633 044424 260 17 1 00 000002 GO @2 ; call the routine
8634 044425 334 00 0 00 000000 SKIPA ; exit test
8635 044426 350 00 0 17 777773 AOS -5(P) ; ok - set up return
8636 044427 262 17 0 00 000004 RGET (4,3,2,1,0) ; restore AC's
8637
8638 044434 263 17 0 00 000000 RTN ; return +2 or +1
8639
8640 ; Miscellaneous
8641
8642 044435 000000 000000 AEBUF: 0 ; actual EBUF data
8643 044436 000000 000000 CEBUF: 0 ; correct EBUF data
8644 044437 000000 000000 BFLAG: 0 ; 'incorrect address' flag
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 201
DFPTA1 MAC 10-Oct-83 21:43 Test Execute Routines SEQ 0388
8645
8646 ;#********************************************************************
8647 ;* BBPNT - Print out single step data that resulted in an error
8648 ;#********************************************************************
8649
8650 044440 261 17 0 00 000000 BBPNT: RPUT (0,1)
8651
8652 044442 200 01 0 00 044233* MOVE 1,SCOSW ; get switches
8653 044443 603 01 0 00 000200 TLNE 1,TXTINH ; inhibit text?
8654 044444 254 00 0 00 044473 JRST BBPN1 ; yes - print alternate format
8655
8656 ; Print single step data
8657
8658 044445 037 00 0 00 062335 TMSGC <Start Addr: >
8659 044446 200 00 0 00 044045 MOVE SSADDR
8660 044447 037 04 0 00 000000 PNT4
8661 044450 037 00 0 00 062341 TMSG <, # Steps: >
8662 044451 200 00 0 00 044044 MOVE NSSTEP
8663 044452 037 15 0 00 000000 PNTDEC
8664 044453 037 00 0 00 057046 TMSG <.>
8665 044454 336 00 0 00 044437 SKIPN BFLAG ; incorrect end address
8666 JRST [TMSGC <End Addr: > ; no - don't print it
8667 MOVE SEADDR
8668 PNT4
8669 044455 254 00 0 00 062522 JRST BBPN0]
8670 044456 037 00 0 00 062344 TMSGC <End Addr - Correct: >
8671 044457 200 00 0 00 044046 MOVE SEADDR
8672 044460 037 04 0 00 000000 PNT4
8673 044461 037 00 0 00 062351 TMSGC < Actual: >
8674 044462 200 00 0 00 044047 MOVE SAADDR
8675 044463 037 04 0 00 000000 PNT4
8676
8677 ; Print EBUF correct/actual
8678
8679 044464 037 00 0 00 062526 BBPN0: TMSGC <EBUF - Correct: >
8680 044465 200 00 0 00 044436 MOVE CEBUF
8681 044466 037 13 0 00 000000 PNTHW
8682 044467 037 00 0 00 062532 TMSGC < Actual: >
8683 044470 200 00 0 00 044435 MOVE AEBUF
8684 044471 037 13 0 00 000000 PNTHW
8685 044472 254 00 0 00 044520 JRST BBPNX
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 202
DFPTA1 MAC 10-Oct-83 21:43 Test Execute Routines SEQ 0389
8686
8687 ; Print single step data
8688
8689 044473 037 00 0 00 062356 BBPN1: TMSGC <Start >
8690 044474 200 00 0 00 044045 MOVE SSADDR
8691 044475 037 04 0 00 000000 PNT4
8692 044476 037 00 0 00 062360 TMSG <, # Steps >
8693 044477 200 00 0 00 044044 MOVE NSSTEP
8694 044500 037 15 0 00 000000 PNTDEC
8695 044501 037 00 0 00 057046 TMSG <.>
8696 044502 336 00 0 00 044437 SKIPN BFLAG ; incorrect end address
8697 JRST [TMSGC <End > ; no - don't print it
8698 MOVE SEADDR
8699 PNT4
8700 044503 254 00 0 00 062540 JRST BBPN2]
8701 044504 037 00 0 00 062363 TMSGC <End (C): >
8702 044505 200 00 0 00 044046 MOVE SEADDR
8703 044506 037 04 0 00 000000 PNT4
8704 044507 037 00 0 00 062366 TMSGC < (A): >
8705 044510 200 00 0 00 044047 MOVE SAADDR
8706 044511 037 04 0 00 000000 PNT4
8707
8708 ; Print EBUF correct/actual
8709
8710 044512 037 00 0 00 062544 BBPN2: TMSGC <EBUF (C): >
8711 044513 200 00 0 00 044436 MOVE CEBUF
8712 044514 037 13 0 00 000000 PNTHW
8713 044515 037 00 0 00 062547 TMSGC < (A): >
8714 044516 200 00 0 00 044435 MOVE AEBUF
8715 044517 037 13 0 00 000000 PNTHW
8716
8717 ; Return
8718
8719 044520 262 17 0 00 000001 BBPNX: RGET (1,0) ; restore AC's
8720
8721 044522 263 17 0 00 000000 RTN
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 203
DFPTA1 MAC 10-Oct-83 21:43 Test Execute Routines SEQ 0390
8722
8723 ;#********************************************************************
8724 ;* TEXEC - Test execute routine
8725 ;
8726 ; This routine starts up the port and reads CSR register to find
8727 ; out the results of tests performed by microcode. It may also
8728 ; stop the port to read the EBUF and verify its contents.
8729 ;
8730 ; This routine is given a pointer to a 'Test Execute Table'. It
8731 ; then executes one entry and returns +1,+2,+3 or +4 depending on
8732 ; the type of entry and the result.
8733 ;
8734 ; Argument: AC6 - Address of 'Test Execute Table'
8735 ;
8736 ; Return: +1 - End of table was seen.
8737 ; +2 - A routine was called (just do next entry).
8738 ; +3 - Error return.
8739 ; +4 - Success return.
8740 ;
8741 ; TADDR - Initial starting address
8742 ; TADDRF - Final address
8743 ; TCSRF - Final CSR data
8744 ; TTIME - Amount of time to let port run
8745 ; TEBUFC - Correct EBUF data
8746 ; TEBUFA - Actual EBUF data
8747 ; TCOMP - Test completion flag
8748 ; 0 - no - bit 12 never set in CSR
8749 ; -1 - yes - bit 12 set in CSR
8750 ; TFAIL - Test failed flag
8751 ; 0 - no - bit 13 set in CSR
8752 ; -1 - yes - bit 13 never set in CSR
8753 ;
8754 ; AC6 - Updated to point to the next table location
8755 ;
8756 ; Test Execute Table Format:
8757 ;
8758 ; Entry
8759 ; Entry
8760 ; ...
8761 ; TLAST ; last entry (zero)
8762 ;
8763 ; 'Entry' is of the form:
8764 ;
8765 ; Bits 0-3 - Type of entry - 0 - Done with table (TLAST)
8766 ; 1 - Start port (start addr given)(TSTART)
8767 ; 2 - Continue (TCONT)
8768 ; 3 - Call routine (TCALL)
8769 ; 4 - Call routine (test exit) (TCALLC)
8770 ; 5 - Check for test segment done (TCHECK)
8771 ; 6 - Select new table address (TJRST)
8772 ; 7 - Exit test (if error flg set)(TEXIT)
8773 ; 10 - Soft start port (no IPACLR done)(TSSTAR)
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 204
DFPTA1 MAC 10-Oct-83 21:43 Test Execute Routines SEQ 0391
8774
8775 ; Bits 4-35 - Defined per entry type.
8776 ;
8777 ; Entry type 0 (TLAST) - All zero - indicates end of table
8778 ;
8779 ; Entry type 1 (TSTART) - Bits 4-35 - CRAM address to start at
8780 ;
8781 ; Entry type 2 (TCONT) - Bits 4-35 - Unused
8782 ;
8783 ; Entry type 3 (TCALL) - Bits 4-35 - Address of routine to call
8784 ;
8785 ; Entry type 4 (TCALLC) - Bits 4-35 - Address of routine to call
8786 ;
8787 ; Entry type 5 (TCHECK) - Bits 4-17 - Time to wait for port to complete
8788 ; Bits 18-35 - Address of correct EBUF data
8789 ;
8790 ; Entry type 6 (TJRST) - Bits 4-35 - Table address to continue
8791 ;
8792 ; Entry type 7 (TEXIT) - Bits 4-35 - Unused
8793 ;
8794 ; Entry type 10 (TSSTAR) - Bits 4-35 - CRAM address to start at
8795 ;#********************************************************************
8796
8797 044523 261 17 0 00 000000 TEXEC: RPUT (0,1,2) ; save some AC's
8798
8799
8800 ; Check if end of table
8801
8802 044526 200 02 0 06 000000 MOVE 2,(6) ; get entry
8803 044527 350 00 0 00 000006 AOS 6 ; point to next entry
8804 044530 322 02 0 00 044534 JUMPE 2,TEXEX1 ; end of table - yes - exit
8805
8806 ; Determine type of entry and dispatch
8807
8808 044531 135 01 0 00 062552 LDB 1,[POINT 4,2,3] ; get entry
8809 XCT [JRST TEXERR ; dispatch on it
8810 JRST TEXSTR
8811 JRST TEXCON
8812 JRST TEXCAL
8813 JRST TEXCAC
8814 JRST TEXCHK
8815 JRST TEXJRS
8816 JRST TEXEXI
8817 JRST TEXSST
8818 044532 256 00 0 01 062553 JRST TEXERR](1)
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 205
DFPTA1 MAC 10-Oct-83 21:43 Test Execute Routines SEQ 0392
8819
8820 ; Error in Test Execute Table
8821
8822 044533 037 00 0 00 062565 TEXERR: TMSGCD <Test Execute Dispatch Table Error - Entry out of range>
8823 044534 332 00 0 00 064377' TEXEX1: SKIPE SDEBUG ; EXEC debug mode?
8824 044535 037 00 0 00 030242 PCRL ; yes - a final CRLF
8825 044536 262 17 0 00 000002 RGET (2,1,0) ; restore AC's
8826
8827 044541 263 17 0 00 000000 RTN ; return
8828
8829 ; Start/continue the port
8830
8831 044542 135 01 0 00 062601 TEXSST: LDB 1,[POINT 32,2,35] ; get start address
8832 044543 301 01 0 00 007777 CAIL 1,7777 ; default address selected?
8833 044544 200 01 0 00 044724 MOVE 1,TADDR ; yes - get it
8834 044545 202 01 0 00 044347* MOVEM 1,SNEXT ; save it
8835 044546 254 00 0 00 044554 JRST TEXCO0 ; continue
8836 044547 135 01 0 00 062601 TEXSTR: LDB 1,[POINT 32,2,35] ; get start address
8837 044550 301 01 0 00 007777 CAIL 1,7777 ; default address selected?
8838 044551 200 01 0 00 044724 MOVE 1,TADDR ; yes - get it
8839 044552 202 01 0 00 044545* MOVEM 1,SNEXT ; save it
8840 044553 260 17 0 00 044160* TEXCON: GO IPACLR ; do a 'port clear'
8841 044554 200 01 0 00 044552* TEXCO0: MOVE 1,SNEXT ; get next address
8842 044555 202 01 0 00 044724 MOVEM 1,TADDR ; save as start address
8843 044556 242 01 0 00 000001 LSH 1,1 ; position properly
8844 044557 260 17 0 00 044334* GO LDRAR ; load the register
8845 044560 336 01 0 00 044341* SKIPN 1,SDATA ; any data given?
8846 044561 201 01 0 00 000014 MOVEI 1,MPRUN!4 ; no - set initial data
8847 044562 332 00 0 00 030037 SKIPE USER ; user mode?
8848 044563 620 01 0 00 000007 TRZ 1,7 ; yes - clear PI level bits
8849 044564 660 01 0 00 040010 TRO 1,SELLAR!MPRUN ; ensure SELLAR,MPRUN are set
8850 044565 202 01 0 00 044560* MOVEM 1,SDATA ; save start data
8851 044566 260 17 0 00 044344* GO LDCSR ; write to CSR
8852 044567 332 00 0 00 064377' SKIPE SDEBUG ; EXEC debug mode?
8853 GO [TMSGC <TSTART/CONT Adr > ; yes - print debug
8854 MOVE SNEXT ; data and continue
8855 PNTOCS
8856 044570 260 17 0 00 062607 RTN]
8857 044571 262 17 0 00 000002 RGET (2,1,0) ; restore AC's
8858
8859 044574 350 00 0 17 000000 AOS (P) ; set up return
8860 044575 263 17 0 00 000000 RTN ; return +3/+4
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 206
DFPTA1 MAC 10-Oct-83 21:43 Test Execute Routines SEQ 0393
8861
8862 ; Execute a JRST and exit
8863
8864 044576 550 02 0 00 000002 TEXJRS: HRRZ 2,2 ; only want the address
8865 044577 332 00 0 00 064377' SKIPE SDEBUG ; EXEC debug mode?
8866 GO [TMSGC <TJRST Adr > ; yes - print debug
8867 MOVE 2 ; data and continue
8868 PNTOCS
8869 044600 260 17 0 00 062616 RTN]
8870 044601 200 06 0 00 000002 MOVE 6,2 ; get new table address
8871 044602 262 17 0 00 000002 RGET (2,1,0) ; restore AC's
8872
8873 044605 350 00 0 17 000000 AOS (P) ; set up return
8874 044606 263 17 0 00 000000 RTN ; return +2
8875
8876 ; Execute a CALL and exit
8877
8878 044607 550 02 0 00 000002 TEXCAL: HRRZ 2,2 ; only want the address
8879 044610 332 00 0 00 064377' SKIPE SDEBUG ; EXEC debug mode?
8880 GO [TMSGC <TCALL Adr > ; yes - print debug
8881 MOVE 2 ; data and continue
8882 PNTOCS
8883 044611 260 17 0 00 062625 RTN]
8884 044612 261 17 0 00 000003 RPUT (3,4) ; save some AC's
8885
8886 044614 260 17 1 00 000002 GO @2 ; call the routine
8887 044615 262 17 0 00 000004 RGET (4,3,2,1,0) ; restore AC's
8888
8889 044622 350 00 0 17 000000 AOS (P) ; set up return
8890 044623 263 17 0 00 000000 RTN ; return +2
8891
8892 ; Execute a CALL and check if test done and exit
8893
8894 044624 550 02 0 00 000002 TEXCAC: HRRZ 2,2 ; only want the address
8895 044625 332 00 0 00 064377' SKIPE SDEBUG ; EXEC debug mode?
8896 GO [TMSGC <TCALLC Adr > ; yes - print debug
8897 MOVE 2 ; data and continue
8898 PNTOCS
8899 044626 260 17 0 00 062634 RTN]
8900 044627 261 17 0 00 000003 RPUT (3,4) ; save some AC's
8901
8902 044631 260 17 1 00 000002 GO @2 ; call the routine
8903 044632 334 00 0 00 000000 SKIPA ; exit test
8904 044633 350 00 0 17 777773 AOS -5(P) ; set up return
8905 044634 262 17 0 00 000004 RGET (4,3,2,1,0) ; restore AC's
8906
8907 044641 263 17 0 00 000000 RTN ; return +2
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 207
DFPTA1 MAC 10-Oct-83 21:43 Test Execute Routines SEQ 0394
8908
8909 ; Exit test (if error flag is set)
8910
8911 044642 332 00 0 00 064377' TEXEXI: SKIPE SDEBUG ; EXEC debug mode?
8912 GO [TMSGC <TEXIT> ; yes - print debug
8913 044643 260 17 0 00 062642 RTN] ; data and continue
8914 044644 336 00 0 00 000015 SKIPN ERFLG ; any errors yet?
8915 044645 350 00 0 17 777775 AOS -3(P) ; no - not done with test yet
8916 044646 262 17 0 00 000002 RGET (2,1,0) ; restore AC's
8917
8918 044651 263 17 0 00 000000 RTN ; return +2 or +1
8919
8920 ; Check for test segment done
8921
8922 044652 350 00 0 00 046306 TEXCHK: AOS TSTSUB ; increment test segment
8923 044653 402 00 0 00 044732 SETZM TCOMP ; clear completed flag
8924 044654 402 00 0 00 044733 SETZM TFAIL ; clear failed flag
8925 044655 135 00 0 00 062644 LDB [POINT 14,2,17] ; get time to wait
8926 044656 260 17 0 00 042430 GO ODELAY ; wait
8927 044657 260 17 0 00 044161* GO RDCSR ; read CSR
8928 044660 474 15 0 00 000000 SETO ERFLG, ; error accessing CSR
8929 044661 202 01 0 00 044726 MOVEM 1,TCSRF ; save final CSR data
8930 044662 603 01 0 00 000020 TLNE 1,(1B13) ; bit 13 set?
8931 044663 476 00 0 00 044733 SETOM TFAIL ; yes - test failed
8932 044664 603 01 0 00 000040 TLNE 1,(1B12) ; bit 12 set?
8933 044665 476 00 0 00 044732 SETOM TCOMP ; yes - test never completed
8934 044666 332 00 0 00 044733 SKIPE TFAIL ; test failed?
8935 044667 474 15 0 00 000000 SETO ERFLG, ; yes - set error flag
8936 044670 336 00 0 00 044732 SKIPN TCOMP ; test completed?
8937 044671 474 15 0 00 000000 SETO ERFLG, ; no - set error flag
8938
8939 ; Now read LAR to see where stopped, and read EBUF also
8940
8941 044672 201 01 0 00 200000 MOVEI 1,TSTEBF ; set up CSR data
8942 044673 260 17 0 00 044566* GO LDCSR ; write it
8943 044674 260 17 0 00 044337* GO RDEBUF ; read EBUF
8944 044675 202 01 0 00 044731 MOVEM 1,TEBUFA ; save it (actual data)
8945 044676 202 01 0 00 044730 MOVEM 1,TEBUFC ; save it (correct data)
8946 044677 550 01 0 00 000002 HRRZ 1,2 ; get address of correct data
8947 044700 322 01 0 00 044705 JUMPE 1,TEXCH0 ; unused? - yes - continue
8948 044701 200 01 0 01 000000 MOVE 1,(1) ; get correct data
8949 044702 202 01 0 00 044730 MOVEM 1,TEBUFC ; save it (correct data)
8950 044703 312 01 0 00 044731 CAME 1,TEBUFA ; EBUF data correct?
8951 044704 474 15 0 00 000000 SETO ERFLG, ; no - set error flag
8952 044705 201 01 0 00 040000 TEXCH0: MOVEI 1,SELLAR ; set up CSR data
8953 044706 260 17 0 00 044673* GO LDCSR ; write it
8954 044707 260 17 0 00 044345* GO RDLAR ; read LAR
8955 044710 242 01 0 00 777777 LSH 1,-1 ; position correctly
8956 044711 202 01 0 00 044725 MOVEM 1,TADDRF ; save it
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 208
DFPTA1 MAC 10-Oct-83 21:43 Test Execute Routines SEQ 0395
8957
8958 ; And exit +3 or +4
8959
8960 044712 332 00 0 00 064377' SKIPE SDEBUG ; EXEC debug mode?
8961 GO [TMSGC <TCHECK CSR > ; yes - print debug
8962 MOVE TCSRF ; data and continue
8963 PNTHW
8964 TMSG < EBUF >
8965 MOVE TEBUFA
8966 PNTOCS
8967 TMSG < ADR >
8968 MOVE TADDRF
8969 PNTOCS
8970 044713 260 17 0 00 062654 RTN]
8971 044714 336 00 0 00 000015 SKIPN ERFLG ; error flag set?
8972 044715 350 00 0 17 777775 AOS -3(P) ; no - set up good return
8973 044716 350 00 0 17 777775 AOS -3(P) ; set up return
8974 044717 350 00 0 17 777775 AOS -3(P) ; set up return
8975 044720 262 17 0 00 000002 RGET (2,1,0) ; restore AC's
8976
8977 044723 263 17 0 00 000000 RTN ; return
8978
8979 ; Miscellaneous
8980
8981 044724 000000 000000 TADDR: 0 ; initial starting address
8982 044725 000000 000000 TADDRF: 0 ; final address
8983 044726 000000 000000 TCSRF: 0 ; final CSR data
8984 044727 000000 000000 TTIME: 0 ; amount of time to let port run
8985 044730 000000 000000 TEBUFC: 0 ; correct EBUF data
8986 044731 000000 000000 TEBUFA: 0 ; actual EBUF data
8987 044732 000000 000000 TCOMP: 0 ; test completion flag (0-no,1-yes
8988 ; bit 12 did set in CSR)
8989 044733 000000 000000 TFAIL: 0 ; test failed flag (0-no,1-yes
8990 ; bit 13 never set in CSR)
8991
8992
8993 ;#********************************************************************
8994 ;* TTPNT - Print out error data
8995 ;#********************************************************************
8996
8997 044734 261 17 0 00 000000 TTPNT: RPUT (0,1) ; save AC's
8998
8999 044736 200 01 0 00 044442* MOVE 1,SCOSW ; get switches
9000 044737 037 00 0 00 062335 TMSGC <Start Addr: > ; print start address
9001 044740 200 00 0 00 044724 MOVE TADDR
9002 044741 037 04 0 00 000000 PNT4
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 209
DFPTA1 MAC 10-Oct-83 21:43 Test Execute Routines SEQ 0396
9003
9004 ; Check test handshake
9005
9006 044742 332 00 0 00 044732 SKIPE TCOMP ; test completed?
9007 044743 254 00 0 00 044752 JRST TTPN0 ; yes - see how it failed
9008 044744 332 00 0 00 044733 SKIPE TFAIL ; handshake failed?
9009 044745 254 00 0 00 044752 JRST TTPN0 ; no - continue
9010 044746 037 00 0 00 062666 TMSGC <Test handshake unsuccessful - final address: >
9011 044747 200 00 0 00 044725 MOVE TADDRF ; get final address
9012 044750 037 04 0 00 000000 PNT4 ; print it
9013 044751 254 00 0 00 044757 JRST TTPN1 ; exit
9014
9015 ; Check test completion
9016
9017 044752 336 00 0 00 044733 TTPN0: SKIPN TFAIL ; test really did fail?
9018 044753 254 00 0 00 044757 JRST TTPN1 ; no - exit
9019 044754 037 00 0 00 062700 TMSGC <Test did not complete successfully - final address: >
9020 044755 200 00 0 00 044725 MOVE TADDRF ; get final address
9021 044756 037 04 0 00 000000 PNT4 ; print it
9022
9023 ; Print final CSR data
9024
9025 044757 603 01 0 00 000200 TTPN1: TLNE 1,TXTINH ; full printout?
9026 044760 254 00 0 00 044764 JRST TTPN2 ; no - continue
9027 044761 037 00 0 00 062714 TMSGC <Final CSR data: >
9028 044762 200 00 0 00 044726 MOVE TCSRF ; get data
9029 044763 037 13 0 00 000000 PNTHW ; print it
9030
9031 ; Finally check EBUF data
9032
9033 044764 200 00 0 00 044730 TTPN2: MOVE TEBUFC ; get correct EBUF data
9034 044765 316 00 0 00 044731 CAMN TEBUFA ; same as actual?
9035 044766 254 00 0 00 045003 JRST TTPNX ; yes - exit
9036 044767 603 01 0 00 000200 TLNE 1,TXTINH ; full printout?
9037 044770 037 00 0 00 062544 TMSGC <EBUF (C): > ; no
9038 044771 607 01 0 00 000200 TLNN 1,TXTINH ; full printout?
9039 044772 037 00 0 00 062526 TMSGC <EBUF - Correct: > ; yes
9040 044773 200 00 0 00 044730 MOVE TEBUFC
9041 044774 037 13 0 00 000000 PNTHW
9042 044775 603 01 0 00 000200 TLNE 1,TXTINH ; full printout?
9043 044776 037 00 0 00 062547 TMSGC < (A): > ; no
9044 044777 607 01 0 00 000200 TLNN 1,TXTINH ; full printout?
9045 045000 037 00 0 00 062532 TMSGC < Actual: > ; yes
9046 045001 200 00 0 00 044731 MOVE TEBUFA
9047 045002 037 13 0 00 000000 PNTHW
9048
9049 ; Done - exit
9050
9051 045003 262 17 0 00 000001 TTPNX: RGET (1,0) ; restore AC's
9052
9053 045005 263 17 0 00 000000 RTN ; return
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 210
DFPTA1 MAC 10-Oct-83 21:43 Test Execute Routines SEQ 0397
9054
9055 ;#********************************************************************
9056 ;* CEXEC - Data test execute routine
9057 ;
9058 ; This routine is used to execute a CBUS data transfer type test. It
9059 ; allows data transfers to be set up, specifying buffer lengths and
9060 ; data pattern. It can set up and start a data transfer, and inspect
9061 ; the result, and do data compare of the resulting buffer.
9062 ;
9063 ; This routine is given a pointer to a 'Data Test Execute Table'. It
9064 ; then executes one entry and returns +1,+2,+3 or +4 depending on the
9065 ; type of entry and the result.
9066 ;
9067 ; Argument: AC6 - Address of 'Data Test Execute Table'
9068 ;
9069 ; Return: +1 - End of table was seen.
9070 ; +2 - A routine was called (just do next entry).
9071 ; +3 - Error return.
9072 ; +4 - Success return.
9073 ;
9074 ; QADDR - Initial starting address
9075 ; QADDRF - Final address
9076 ; CTIME - Amount of time to let port run
9077 ; CEBUFC - Correct EBUF data
9078 ; CEBUFA - Actual EBUF data
9079 ; CPAT - Data pattern used
9080 ; CLEN - Buffer length
9081 ; CTRAN - Type of transfer 0-none,1-rd,2-wr,3-rd/wr
9082 ; CDERR - Data compare error - 0-no,-1-yes
9083 ; CSERR - Status error - 0-none,xx-error bits
9084 ;
9085 ; AC6 - Updated to point to the next table location
9086 ;
9087 ; Test Execute Table Format:
9088 ;
9089 ; Entry
9090 ; ...
9091 ; CLAST ; last entry (zero)
9092 ;
9093 ; 'Entry' is of the form:
9094 ;
9095 ; Bits 0-3 - Type of entry
9096 ; 0 - Done with table (CLAST) 6 - Call routine (test exit) (CCALLC)
9097 ; 1 - Set up read DT (CSETRD) 7 - Wait for dt completion (CWAIT)
9098 ; 2 - Set up write DT (CSETWR) 10 - Compare data buffer (CCOMP)
9099 ; 3 - Set up rd/wr DT (CSETRW) 11 - Select new table address (CJRST)
9100 ; 4 - Start port (CSTART) 12 - Exit test (if erflg set) (CEXIT)
9101 ; 5 - Call routine (CCALL)
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 211
DFPTA1 MAC 10-Oct-83 21:43 Test Execute Routines SEQ 0398
9102
9103 ; Bits 4-35 - Defined per entry type.
9104 ;
9105 ; Entry type 0 (CLAST) - All zero - indicates end of table
9106 ;
9107 ; Entry type 1 (CSETWR) - Bits 4-17 - data pattern (0=default)
9108 ; 18-35 - buffer length
9109 ;
9110 ; Entry type 2 (CSETRD) - Bits 4-17 - data pattern (0=default)
9111 ; 18-35 - buffer length
9112 ;
9113 ; Entry type 3 (CSETRW) - Bits 4-17 - data pattern (0=default)
9114 ; 18-35 - buffer length
9115 ;
9116 ; Entry type 4 (CSTART) - Bits 4-35 - CRAM address to start at
9117 ;
9118 ; Entry type 5 (CCALL) - Bits 4-35 - Address of routine to call
9119 ;
9120 ; Entry type 6 (CCALLC) - Bits 4-35 - Address of routine to call
9121 ;
9122 ; Entry type 7 (CWAIT) - Bits 4-17 - time to wait (in milliseconds)
9123 ;
9124 ; Entry type 10 (CCOMP) - Bits 4-35 - Unused
9125 ;
9126 ; Entry type 11 (CJRST) - Bits 4-35 - Table address to continue
9127 ;
9128 ; Entry type 12 (CEXIT) - Bits 4-35 - Unused
9129 ;#********************************************************************
9130
9131 045006 261 17 0 00 000000 CEXEC: RPUT (0,1,2) ; save some AC's
9132
9133
9134 ; Check if end of table
9135
9136 045011 200 02 0 06 000000 MOVE 2,(6) ; get entry
9137 045012 350 00 0 00 000006 AOS 6 ; point to next entry
9138 045013 322 02 0 00 045017 JUMPE 2,CEXEX1 ; end of table - yes - exit
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 212
DFPTA1 MAC 10-Oct-83 21:43 Test Execute Routines SEQ 0399
9139
9140 ; Determine type of entry and dispatch
9141
9142 045014 135 01 0 00 062552 LDB 1,[POINT 4,2,3] ; get entry
9143 XCT [JRST CEXERR ; dispatch on it
9144 JRST CEXSRD
9145 JRST CEXSWR
9146 JRST CEXSRW
9147 JRST CEXSTR
9148 JRST CEXCAL
9149 JRST CEXCAC
9150 JRST CEXWAI
9151 JRST CEXCOM
9152 JRST CEXJRS
9153 JRST CEXEXI
9154 JRST CEXERR
9155 045015 256 00 0 01 062720 JRST CEXERR](1)
9156
9157 ; Error in Test Execute Table
9158
9159 045016 037 00 0 00 062735 CEXERR: TMSGCD <Data Test Execute Dispatch Table Error - Entry out of range>
9160 045017 332 00 0 00 064377' CEXEX1: SKIPE SDEBUG ; EXEC debug mode?
9161 045020 037 00 0 00 030242 PCRL ; yes - a final CRLF
9162 045021 262 17 0 00 000002 RGET (2,1,0) ; restore AC's
9163
9164 045024 263 17 0 00 000000 RTN ; return
9165
9166 ; Set up a read data transfer
9167
9168 045025 550 00 0 00 000002 CEXSRD: HRRZ 2 ; get transfer length
9169 045026 332 00 0 00 000000 SKIPE ; zero?
9170 045027 202 00 0 00 045332 MOVEM CLEN ; no - save it
9171 045030 135 00 0 00 062644 LDB [POINT 14,2,17] ; get data pattern
9172 045031 332 00 0 00 000000 SKIPE ; zero?
9173 045032 202 00 0 00 045331 MOVEM CPAT ; no - save it
9174 045033 201 00 0 00 000001 MOVEI 1 ; get type of transfer (read)
9175 045034 202 00 0 00 045333 MOVEM CTRAN ; save it
9176 045035 201 01 0 00 005000 CSETCC: MOVEI 1,5000 ; get start address
9177 045036 242 01 0 00 000001 LSH 1,1 ; position correctly
9178 045037 260 17 0 00 044557* GO LDRAR ; load the register
9179 045040 201 01 0 00 000010 MOVEI 1,MPRUN ; get 'MPRUN' bit
9180 045041 260 17 0 00 044706* GO LDCSR ; start up the port
9181 045042 200 01 0 00 062752 MOVE 1,[400000,,1] ; get fill pattern
9182 045043 202 01 0 00 047000 MOVEM 1,BUFF ; put fill pattern throughout
9183 045044 200 01 0 00 062753 MOVE 1,[BUFF,,BUFF+1] ; entire buffer area
9184 045045 251 01 0 00 047777 BLT 1,BUFF+^D511 ; ...
9185 045046 200 14 0 00 045331 MOVE PAT,CPAT ; get data pattern
9186 045047 200 01 0 00 045333 MOVE 1,CTRAN ; get transfer type
9187 045050 200 02 0 00 045332 MOVE 2,CLEN ; get transfer length
9188 045051 306 01 0 00 000003 CAIN 1,3 ; read/write?
9189 045052 242 02 0 00 777777 LSH 2,-1 ; yes - divide by 2
9190 045053 260 17 0 00 042026* GO BUFGEN ; generate buffer contents
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 213
DFPTA1 MAC 10-Oct-83 21:43 Test Execute Routines SEQ 0400
9191 045054 200 01 0 00 061534 MOVE 1,[CBUFSZ,,CBUF] ; get pointer to control buffer
9192 045055 260 17 0 00 042030* GO CHINIT ; initialize software
9193 045056 551 01 0 00 047000 HRRZI 1,BUFF ; buffer address
9194 045057 200 02 0 00 045332 MOVE 2,CLEN ; word count
9195 045060 200 03 0 00 045333 MOVE 3,CTRAN ; get transfer type
9196 045061 306 03 0 00 000003 CAIN 3,3 ; read/write?
9197 045062 242 02 0 00 777777 LSH 2,-1 ; yes - divide by 2
9198 045063 400 03 0 00 000000 SETZ 3, ; clear zero fill specifier
9199 045064 260 17 0 00 042034* GO GENCCW ; generate a CCW list
9200 045065 332 00 0 00 064377' SKIPE SDEBUG ; EXEC debug mode?
9201 GO [TMSGC <CSET> ; yes - print debug
9202 MOVE 1,CTRAN ; data and continue
9203 XCT [TMSG <RD>
9204 TMSG <WR>
9205 TMSG <RW>](1)
9206 TMSG < Pat=>
9207 MOVE CPAT
9208 PNTOCS
9209 TMSG < Len=>
9210 MOVE CLEN
9211 PNTOCS
9212 045066 260 17 0 00 062770 RTN]
9213 045067 350 00 0 17 777775 AOS -3(P) ; set up proper return
9214 045070 262 17 0 00 000002 RGET (2,1,0) ; restore AC's
9215
9216 045073 263 17 0 00 000000 RTN ; return
9217
9218 ; Set up a write data transfer
9219
9220 045074 550 00 0 00 000002 CEXSWR: HRRZ 2 ; get transfer length
9221 045075 332 00 0 00 000000 SKIPE ; zero?
9222 045076 202 00 0 00 045332 MOVEM CLEN ; no - save it
9223 045077 135 00 0 00 062644 LDB [POINT 14,2,17] ; get data pattern
9224 045100 332 00 0 00 000000 SKIPE ; zero?
9225 045101 202 00 0 00 045331 MOVEM CPAT ; no - save it
9226 045102 201 00 0 00 000002 MOVEI 2 ; get type of transfer (write)
9227 045103 202 00 0 00 045333 MOVEM CTRAN ; save it
9228 045104 254 00 0 00 045035 JRST CSETCC ; common code
9229
9230 ; Set up a read/write data transfer
9231
9232 045105 550 00 0 00 000002 CEXSRW: HRRZ 2 ; get transfer length
9233 045106 332 00 0 00 000000 SKIPE ; zero?
9234 045107 202 00 0 00 045332 MOVEM CLEN ; no - save it
9235 045110 135 00 0 00 062644 LDB [POINT 14,2,17] ; get data pattern
9236 045111 332 00 0 00 000000 SKIPE ; zero?
9237 045112 202 00 0 00 045331 MOVEM CPAT ; no - save it
9238 045113 201 00 0 00 000003 MOVEI 3 ; get type of transfer (read/write)
9239 045114 202 00 0 00 045333 MOVEM CTRAN ; save it
9240 045115 200 14 0 00 045331 MOVE PAT,CPAT ; get data pattern
9241 045116 254 00 0 00 045035 JRST CSETCC ; common code
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 214
DFPTA1 MAC 10-Oct-83 21:43 Test Execute Routines SEQ 0401
9242
9243 ; Start the port
9244
9245 045117 260 17 0 00 044553* CEXSTR: GO IPACLR ; do a 'port clear'
9246 045120 135 01 0 00 062601 LDB 1,[POINT 32,2,35] ; get start address
9247 045121 301 01 0 00 007777 CAIL 1,7777 ; default address selected?
9248 045122 200 01 0 00 045321 MOVE 1,QADDR ; yes - get it
9249 045123 202 01 0 00 044554* MOVEM 1,SNEXT ; save it
9250 045124 202 01 0 00 045321 MOVEM 1,QADDR ; save as start address
9251 045125 242 01 0 00 000001 LSH 1,1 ; position properly
9252 045126 260 17 0 00 045037* GO LDRAR ; load the register
9253 045127 336 01 0 00 044565* SKIPN 1,SDATA ; any data given?
9254 045130 201 01 0 00 000014 MOVEI 1,MPRUN!4 ; no - set initial data
9255 045131 332 00 0 00 030037 SKIPE USER ; user mode?
9256 045132 620 01 0 00 000007 TRZ 1,7 ; yes - clear PI level bits
9257 045133 660 01 0 00 040210 TRO 1,SELLAR!MPRUN!RESQAV ; ensure SELLAR,MPRUN,RESQAV are set
9258 045134 202 01 0 00 045127* MOVEM 1,SDATA ; save start data
9259 045135 200 01 0 00 045134* MOVE 1,SDATA ; get start data
9260 045136 260 17 0 00 045041* GO LDCSR ; write to CSR
9261 045137 332 00 0 00 064377' SKIPE SDEBUG ; EXEC debug mode?
9262 GO [TMSGC <CSTART Adr > ; yes - print debug
9263 MOVE 2 ; data and continue
9264 PNTOCS
9265 045140 260 17 0 00 063006 RTN]
9266 045141 350 00 0 17 777775 AOS -3(P) ; set up return
9267 045142 262 17 0 00 000002 RGET (2,1,0) ; restore AC's
9268
9269 045145 263 17 0 00 000000 RTN ; return +3/+4
9270
9271 ; Execute a JRST and exit
9272
9273 045146 550 02 0 00 000002 CEXJRS: HRRZ 2,2 ; only want the address
9274 045147 332 00 0 00 064377' SKIPE SDEBUG ; EXEC debug mode?
9275 GO [TMSGC <CJRST Adr > ; yes - print debug
9276 MOVE 2 ; data and continue
9277 PNTOCS
9278 045150 260 17 0 00 063015 RTN]
9279 045151 200 06 0 00 000002 MOVE 6,2 ; get new table address
9280 045152 262 17 0 00 000002 RGET (2,1,0) ; restore AC's
9281
9282 045155 350 00 0 17 000000 AOS (P) ; set up return
9283 045156 263 17 0 00 000000 RTN ; return +2
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 215
DFPTA1 MAC 10-Oct-83 21:43 Test Execute Routines SEQ 0402
9284
9285 ; Execute a CALL and exit
9286
9287 045157 550 02 0 00 000002 CEXCAL: HRRZ 2,2 ; only want the address
9288 045160 332 00 0 00 064377' SKIPE SDEBUG ; EXEC debug mode?
9289 GO [TMSGC <CCALL Adr > ; yes - print debug
9290 MOVE 2 ; data and continue
9291 PNTOCS
9292 045161 260 17 0 00 063024 RTN]
9293 045162 261 17 0 00 000003 RPUT (3,4) ; save some AC's
9294
9295 045164 260 17 1 00 000002 GO @2 ; call the routine
9296 045165 262 17 0 00 000004 RGET (4,3,2,1,0) ; restore AC's
9297
9298 045172 350 00 0 17 000000 AOS (P) ; set up return
9299 045173 263 17 0 00 000000 RTN ; return +2
9300
9301 ; Execute a CALL and check if test done and exit
9302
9303 045174 550 02 0 00 000002 CEXCAC: HRRZ 2,2 ; only want the address
9304 045175 332 00 0 00 064377' SKIPE SDEBUG ; EXEC debug mode?
9305 GO [TMSGC <CCALLC Adr > ; yes - print debug
9306 MOVE 2 ; data and continue
9307 PNTOCS
9308 045176 260 17 0 00 063033 RTN]
9309 045177 261 17 0 00 000003 RPUT (3,4) ; save some AC's
9310
9311 045201 260 17 1 00 000002 GO @2 ; call the routine
9312 045202 334 00 0 00 000000 SKIPA ; exit test
9313 045203 350 00 0 17 777773 AOS -5(P) ; set up return
9314 045204 262 17 0 00 000004 RGET (4,3,2,1,0) ; restore AC's
9315
9316 045211 263 17 0 00 000000 RTN ; return +2
9317
9318 ; Exit test (if error flag is set)
9319
9320 045212 332 00 0 00 064377' CEXEXI: SKIPE SDEBUG ; EXEC debug mode?
9321 GO [TMSGC <CEXIT> ; yes - print debug
9322 045213 260 17 0 00 063041 RTN] ; data and continue
9323 045214 336 00 0 00 000015 SKIPN ERFLG ; any errors yet?
9324 045215 350 00 0 17 777775 AOS -3(P) ; no - not done with test yet
9325 045216 262 17 0 00 000002 RGET (2,1,0) ; restore AC's
9326
9327 045221 263 17 0 00 000000 RTN ; return +2 or +1
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 216
DFPTA1 MAC 10-Oct-83 21:43 Test Execute Routines SEQ 0403
9328
9329 ; Wait for data transfer to complete
9330
9331 045222 350 00 0 00 046306 CEXWAI: AOS TSTSUB ; increment test segment
9332 045223 550 00 0 00 000002 HRRZ 2 ; get EBUF address
9333 045224 202 00 0 00 064331' MOVEM CEBUAD# ; save it
9334 045225 135 00 0 00 062644 LDB [POINT 14,2,17] ; get time to wait
9335 045226 260 17 0 00 042456 GO DDELAY ; wait (while read buffer/checking CSR)
9336 045227 260 17 0 00 044657* GO RDCSR ; read CSR
9337 045230 254 00 0 00 045265 JRST CEXWA3 ; error accessing CSR
9338 045231 202 01 0 00 045323 MOVEM 1,CCSR ; save CSR data
9339
9340 ; Get and verify EBUF data (if any specified)
9341
9342 045232 201 01 0 00 200000 MOVEI 1,TSTEBF ; set up to read EBUF
9343 045233 260 17 0 00 045136* GO LDCSR ; write CSR
9344 045234 260 17 0 00 044674* GO RDEBUF ; read EBUF
9345 045235 202 01 0 00 045326 MOVEM 1,CEBUFA ; save it (actual)
9346 045236 202 01 0 00 045325 MOVEM 1,CEBUFC ; save it (correct)
9347 045237 336 01 0 00 064331' SKIPN 1,CEBUAD ; get address of correct EBUF data
9348 045240 254 00 0 00 045243 JRST CEXWA2 ; none - continue
9349 045241 200 01 0 01 000000 MOVE 1,(1) ; get correct EBUF data
9350 045242 202 01 0 00 045325 MOVEM 1,CEBUFC ; save it
9351 045243 200 01 0 00 045326 CEXWA2: MOVE 1,CEBUFA ; get actual data
9352 045244 312 01 0 00 045325 CAME 1,CEBUFC ; error?
9353 045245 474 15 0 00 000000 SETO ERFLG, ; yes - set error flag
9354
9355 ; Find out final address
9356
9357 045246 201 01 0 00 040000 MOVEI 1,SELLAR ; gset up to read LAR
9358 045247 260 17 0 00 045233* GO LDCSR ; write CSR
9359 045250 260 17 0 00 044707* GO RDLAR ; read LAR
9360 045251 242 01 0 00 777777 LSH 1,-1 ; position correctly
9361 045252 202 01 0 00 045322 MOVEM 1,QADDRF ; save it
9362
9363 ; Check out channel logout status ...
9364
9365 045253 402 00 0 00 045327 SETZM CSERR ; clear error status
9366 045254 336 00 0 00 045334 SKIPN CSTATF ; check logout status?
9367 045255 254 00 0 00 045266 JRST CEXWA4 ; no - continue
9368 045256 260 17 0 00 000000* GO CHDATA ; check logout data for errors
9369 045257 332 00 0 00 000001 SKIPE 1 ; any errors?
9370 045260 474 15 0 00 000000 SETO ERFLG, ; yes - set error flag
9371 045261 202 01 0 00 045327 MOVEM 1,CSERR ; save error flags
9372 045262 200 01 0 00 063043 MOVE 1,[CSTWRD,,CLOGBF] ; move it from CSTWRD to
9373 045263 251 01 0 00 045337 BLT 1,CLOGBF+2 ; CLOGBF
9374 045264 334 00 0 00 000000 SKIPA ; continue
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 217
DFPTA1 MAC 10-Oct-83 21:43 Test Execute Routines SEQ 0404
9375
9376 ; Error did occur
9377
9378 045265 474 15 0 00 000000 CEXWA3: SETO ERFLG, ; set error flag
9379
9380 ; Exit
9381
9382 045266 332 00 0 00 064377' CEXWA4: SKIPE SDEBUG ; EXEC debug mode?
9383 GO [TMSGC <CWAIT CSR > ; yes - print debug
9384 MOVE CCSR ; data and continue
9385 PNTHW
9386 TMSG < EBUF >
9387 MOVE CEBUFA
9388 PNTOCS
9389 TMSG < ChnErr >
9390 MOVE CSERR
9391 PNTOCS
9392 045267 260 17 0 00 063051 RTN]
9393 045270 336 00 0 00 000015 SKIPN ERFLG ; error flag set?
9394 045271 350 00 0 17 777775 AOS -3(P) ; no - set up good return
9395 045272 350 00 0 17 777775 AOS -3(P) ; set up return
9396 045273 350 00 0 17 777775 AOS -3(P) ; set up return
9397 045274 262 17 0 00 000002 RGET (2,1,0) ; restore AC's
9398
9399 045277 263 17 0 00 000000 RTN ; return
9400
9401 ; Do data compare
9402
9403 045300 350 00 0 00 046306 CEXCOM: AOS TSTSUB ; increment test segment
9404 045301 210 01 0 00 045333 MOVN 1,CTRAN ; get transfer type
9405 045302 200 02 0 00 045332 MOVE 2,CLEN ; get transfer length
9406 045303 200 14 0 00 045331 MOVE PAT,CPAT ; get data pattern
9407 045304 260 17 0 00 042125* GO BUFCOM ; compare the data
9408 045305 332 00 0 00 000001 SKIPE 1 ; any data compare errors?
9409 045306 476 00 0 00 045330 SETOM CDERR ; yes - set data compare error flag
9410 045307 332 00 0 00 000001 SKIPE 1 ; any data compare errors?
9411 045310 474 15 0 00 000000 SETO ERFLG, ; yes - set error flag
9412 045311 336 00 0 00 000015 SKIPN ERFLG ; error flag set?
9413 045312 350 00 0 17 777775 AOS -3(P) ; no - set up good return
9414 045313 350 00 0 17 777775 AOS -3(P) ; set up return
9415 045314 350 00 0 17 777775 AOS -3(P) ; set up return
9416 045315 262 17 0 00 000002 RGET (2,1,0) ; restore AC's
9417
9418 045320 263 17 0 00 000000 RTN ; return
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 218
DFPTA1 MAC 10-Oct-83 21:43 Test Execute Routines SEQ 0405
9419
9420 ; Miscellaneous
9421
9422 045321 000000 000000 QADDR: 0 ; initial starting address
9423 045322 000000 000000 QADDRF: 0 ; final address
9424 045323 000000 000000 CCSR: 0 ; final CSR data
9425 045324 000000 000000 CTIME: 0 ; amount of time to let port run
9426 045325 000000 000000 CEBUFC: 0 ; correct EBUF data
9427 045326 000000 000000 CEBUFA: 0 ; actual EBUF data
9428 045327 000000 000000 CSERR: 0 ; status error (0-no,xx-error flags)
9429 045330 000000 000000 CDERR: 0 ; data compare error flag (0-no,-1-yes)
9430 045331 000000 000000 CPAT: 0 ; data pattern used
9431 045332 000000 000000 CLEN: 0 ; buffer length
9432 045333 000000 000000 CTRAN: 0 ; transfer type (0-none,1-rd,2-wr
9433 ; 3-rd/wr)
9434 045334 000000 000000 CSTATF: 0 ; check logout status flag (0-n,-1-y)
9435
9436 045335 CLOGBF: BLOCK 3 ; logout area buffer
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 219
DFPTA1 MAC 10-Oct-83 21:43 Test Execute Routines SEQ 0406
9437
9438 ;#********************************************************************
9439 ;* CCPNT - Print out error data
9440 ;#********************************************************************
9441
9442 045340 261 17 0 00 000000 CCPNT: RPUT (0,1) ; save AC's
9443
9444 045342 200 01 0 00 044736* MOVE 1,SCOSW ; get switches
9445
9446 ; Print start/end address
9447
9448 045343 603 01 0 00 000200 TLNE 1,TXTINH ; full printout?
9449 GO [TMSGC <Start > ; no
9450 MOVE QADDR
9451 PNT4
9452 TMSG < End > ; print end address
9453 MOVE QADDRF
9454 PNT4
9455 045344 260 17 0 00 063067 RTN]
9456 045345 603 01 0 00 000200 TLNE 1,TXTINH ; full printout
9457 045346 254 00 0 00 045360 JRST CCPN0 ; no - continue
9458 045347 037 00 0 00 062335 TMSGC <Start Addr: > ; print start address
9459 045350 200 00 0 00 045321 MOVE QADDR
9460 045351 037 04 0 00 000000 PNT4
9461 045352 037 00 0 00 063076 TMSGC <End Addr: > ; print end address
9462 045353 200 00 0 00 045322 MOVE QADDRF
9463 045354 037 04 0 00 000000 PNT4
9464 045355 037 00 0 00 062714 TMSGC <Final CSR data: >
9465 045356 200 00 0 00 045323 MOVE CCSR
9466 045357 037 13 0 00 000000 PNTHW ; print it
9467
9468 ; Check EBUF data
9469
9470 045360 200 00 0 00 045325 CCPN0: MOVE CEBUFC ; get correct EBUF data
9471 045361 316 00 0 00 045326 CAMN CEBUFA ; same as actual?
9472 045362 254 00 0 00 045377 JRST CCPN2 ; yes - exit
9473 045363 603 01 0 00 000200 TLNE 1,TXTINH ; full printout?
9474 045364 037 00 0 00 062544 TMSGC <EBUF (C): > ; no
9475 045365 607 01 0 00 000200 TLNN 1,TXTINH ; full printout?
9476 045366 037 00 0 00 062526 TMSGC <EBUF - Correct: > ; yes
9477 045367 200 00 0 00 045325 MOVE CEBUFC
9478 045370 037 13 0 00 000000 PNTHW
9479 045371 603 01 0 00 000200 TLNE 1,TXTINH ; full printout?
9480 045372 037 00 0 00 062547 TMSGC < (A): > ; no
9481 045373 607 01 0 00 000200 TLNN 1,TXTINH ; full printout?
9482 045374 037 00 0 00 062532 TMSGC < Actual: > ; yes
9483 045375 200 00 0 00 045326 MOVE CEBUFA
9484 045376 037 13 0 00 000000 PNTHW
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 220
DFPTA1 MAC 10-Oct-83 21:43 Test Execute Routines SEQ 0407
9485
9486 ; Print status errors
9487
9488 045377 200 01 0 00 045342* CCPN2: MOVE 1,SCOSW ; get switches
9489 045400 603 01 0 00 000200 TLNE 1,TXTINH ; full printout?
9490 045401 254 00 0 00 045405 JRST CCPN3 ; no - continue
9491 045402 201 01 0 00 045335 MOVEI 1,CLOGBF ; get address of logout area
9492 045403 260 17 0 00 042112* GO LOGPNT ; print it out
9493 045404 254 00 0 00 045431 JRST CCPN4 ; continue
9494
9495 045405 332 01 0 00 045327 CCPN3: SKIPE 1,CSERR ; get status bits
9496 045406 037 00 0 00 063102 TMSGC <Status errors: >
9497 045407 603 01 0 00 200000 TLNE 1,(MPER) ; mem parity error
9498 045410 037 00 0 00 063106 TMSG <MPERR >
9499 045411 603 01 0 00 100000 TLNE 1,(ADRPE) ; address parity error
9500 045412 037 00 0 00 063110 TMSG <ADRPE >
9501 045413 603 01 0 00 040000 TLNE 1,(NOTWC0) ; not word count zero
9502 045414 037 00 0 00 063112 TMSG <NOTWC0 >
9503 045415 603 01 0 00 020000 TLNE 1,(NEXM) ; non-existant memory
9504 045416 037 00 0 00 063114 TMSG <NEXM >
9505 045417 603 01 0 00 000400 TLNE 1,(LAXER) ; last xfer error
9506 045420 037 00 0 00 063116 TMSG <LAXER >
9507 045421 603 01 0 00 000200 TLNE 1,(IPAER) ; Port error
9508 045422 037 00 0 00 063120 TMSG <IPAER >
9509 045423 603 01 0 00 000100 TLNE 1,(LGWC) ; long word count
9510 045424 037 00 0 00 063122 TMSG <LGWC >
9511 045425 603 01 0 00 000040 TLNE 1,(SHWC) ; short word count
9512 045426 037 00 0 00 063124 TMSG <SHWC >
9513 045427 603 01 0 00 000020 TLNE 1,(OVN) ; overrrun
9514 045430 037 00 0 00 063126 TMSG <OVN >
9515
9516 ; Print data compare errors
9517
9518 045431 336 00 0 00 045330 CCPN4: SKIPN CDERR ; any data compare errors?
9519 045432 254 00 0 00 045437 JRST CCPNX ; no - exit
9520 045433 200 01 0 00 045333 MOVE 1,CTRAN ; get transfer type
9521 045434 200 02 0 00 045332 MOVE 2,CLEN ; get transfer length
9522 045435 200 14 0 00 045331 MOVE PAT,CPAT ; get data pattern
9523 045436 260 17 0 00 045304* GO BUFCOM ; compare the data
9524
9525 ; Exit
9526
9527 045437 262 17 0 00 000001 CCPNX: RGET (1,0) ; restore AC's
9528
9529 045441 263 17 0 00 000000 RTN ; return
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 221
DFPTA1 MAC 10-Oct-83 21:43 Test Execute Routines SEQ 0408
9530
9531 ;#********************************************************************
9532 ;* IEXEC - Interrupt test execute routine
9533 ;
9534 ; This routine is used to execute a interrupt type test. It allows
9535 ; the interrupt system to be set up and interrupts to be fielded.
9536 ;
9537 ; This routine is given a pointer to an 'Interrupt Test Execute
9538 ; Table'. It then executes one entry and returns +1,+2,+3 or +4
9539 ; depending on the type of entry and the result.
9540 ;
9541 ; Argument: AC6 - Address of 'Interrupt Test Execute Table'
9542 ;
9543 ; Return: +1 - End of table was seen.
9544 ; +2 - A routine was called (just do next entry).
9545 ; +3 - Error return.
9546 ; +4 - Success return.
9547 ;
9548 ; IADDR - Initial starting address
9549 ; IADDRF - Final address
9550 ; ICSR - Final CSR data
9551 ; ITIME - Amount of time to let port run
9552 ; IFLAG - Interrupt should occur data
9553 ; bits 0-2 - IOP function
9554 ; 0 - non-vectored
9555 ; 1 - vectored
9556 ; 2 - examine
9557 ; 3 - deposit
9558 ; 4 - increment
9559 ; 5 - decrement
9560 ; 6 - examine/increment
9561 ; bits 3-8 - type of interrupt
9562 ; 0 - vectored
9563 ; 1 - non-vectored on PI level 1
9564 ; .. ... ...
9565 ; 7 7
9566 ; 77 - no interrupt should occur
9567 ; bits 9-35 - address to execute (for vectored
9568 ; or non-vectored interrupts) or the
9569 ; location to increment, decrement,
9570 ; examine, or deposit
9571 ; IITYPE - Type of interrupt which occurred
9572 ; -1 - none
9573 ; 0 - vectored
9574 ; 1 - non-vectored on PI level 1
9575 ; . ... ...
9576 ; 7 - non-vectored on PI level 7
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 222
DFPTA1 MAC 10-Oct-83 21:43 Test Execute Routines SEQ 0409
9577
9578 ; IINTPC - Interrupt PC
9579 ; IIADR - Address of location to be inc/dec/exa/dep
9580 ; IIINCC - Contents of location to be inc/dec (correct)
9581 ; IIINCA - Contents of location to be inc/dec (actual)
9582 ; IIEXDC - Contents of location exam/depos (correct)
9583 ; IIEXDA - Contents of location exam/depos (actual)
9584 ; IEBUF - EBUF contents (of 2901 register 5)
9585 ;
9586 ; AC6 - Updated to point to the next table location
9587 ;
9588 ; Interrupt Test Execute Table Format:
9589 ;
9590 ; Entry
9591 ; ...
9592 ; ILAST ; last entry (zero)
9593 ;
9594 ; 'Entry' is of the form:
9595 ;
9596 ; Bits 0-3 - Type of entry
9597 ; 0 - Done with table (ILAST) 6 - Call routine/exit (ICALLC)
9598 ; 1 - Set up examine (ISETEX) 7 - Wait for interrupt (IWAIT)
9599 ; 2 - Set up deposit (ISETDE) 10 - Select new tbl addr(IJRST)
9600 ; 3 - Set up inc/dec (ISETID) 11 - Start port (ISTART)
9601 ; 4 - Set up v/nv int (ISETIN) 12 - Exit test (if ERFLG set) (IEXIT)
9602 ; 5 - Call routine (ICALL)
9603 ;
9604 ; Bits 4-35 - Defined per entry type.
9605 ;
9606 ; Entry type 0 (ILAST) - All zero - Indicates end of table
9607 ;
9608 ; Entry type 1 (ISETEX) - Bits 4-17 - IOP function
9609 ; 18-35 - Address of list containing addr to
9610 ; be examined and the data to use
9611 ;
9612 ; Entry type 2 (ISETDE) - Bits 4-17 - IOP function
9613 ; 18-35 - Address of list containing addr to
9614 ; be deposited and the data to use
9615 ;
9616 ; Entry type 3 (ISETID) - Bits 4-17 - IOP function
9617 ; 18-35 - Address of list containing addr to
9618 ; be inc/dec and data to use
9619 ;
9620 ; Entry type 4 (ISETIN) - Bits 4-17 - IOP function
9621 ; 18-35 - Interrupt type expected (0-vectored,
9622 ; n-nonvectored on PI level n)
9623 ;
9624 ; Entry type 5 (ISETEI) - Bits 4-17 - IOP function
9625 ; 18-35 - Address of list containing addr to
9626 ; be examined and the data to use
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 223
DFPTA1 MAC 10-Oct-83 21:43 Test Execute Routines SEQ 0410
9627
9628 ; Entry type 6 (ICALL) - Bits 4-35 - Address of routine to call
9629 ;
9630 ; Entry type 7 (ICALLC) - Bits 4-35 - Address of routine to call
9631 ;
9632 ; Entry type 10 (IWAIT) - Bits 4-35 - Time to wait (in milliseconds)
9633 ; After the wait is complete, and interrupt data gotten, the PI
9634 ; system is shut off and R5 is read by restarting port at location
9635 ; 1100, then stopping the port and reading the EBUF.
9636 ;
9637 ; Entry type 11 (IJRST) - Bits 4-35 - Table address to continue
9638 ;
9639 ; Entry type 12 (ISTART) - Bits 4-35 - CRAM address to start at
9640 ;
9641 ; Entry type 13 (IEXIT) - Bits 4-35 - Unused
9642 ;#********************************************************************
9643
9644 045442 261 17 0 00 000000 IEXEC: RPUT (0,1,2) ; save some AC's
9645
9646
9647 ; Check if end of table
9648
9649 045445 200 02 0 06 000000 MOVE 2,(6) ; get entry
9650 045446 350 00 0 00 000006 AOS 6 ; point to next entry
9651 045447 322 02 0 00 045453 JUMPE 2,IEXEX1 ; end of table - yes - exit
9652
9653 ; Determine type of entry and dispatch
9654
9655 045450 135 01 0 00 062552 LDB 1,[POINT 4,2,3] ; get entry
9656 XCT [JRST IEXERR ; dispatch on it
9657 JRST IEXSEX
9658 JRST IEXSDE
9659 JRST IEXSID
9660 JRST IEXSIN
9661 JRST IEXSEI
9662 JRST IEXCAL
9663 JRST IEXCAC
9664 JRST IEXWAI
9665 JRST IEXJRS
9666 JRST IEXSTR
9667 JRST IEXEXI
9668 JRST IEXERR
9669 045451 256 00 0 01 063127 JRST IEXERR](1)
9670
9671 ; Error in Test Execute Table
9672
9673 045452 037 00 0 00 062735 IEXERR: TMSGCD <Data Test Execute Dispatch Table Error - Entry out of range>
9674 045453 332 00 0 00 064377' IEXEX1: SKIPE SDEBUG ; EXEC debug mode?
9675 045454 037 00 0 00 030242 PCRL ; yes - a final CRLF
9676 045455 262 17 0 00 000002 RGET (2,1,0) ; restore AC's
9677
9678 045460 263 17 0 00 000000 RTN ; return
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 224
DFPTA1 MAC 10-Oct-83 21:43 Test Execute Routines SEQ 0411
9679
9680 ; Set up an examine transfer
9681
9682 045461 135 01 0 00 063145 IEXSEX: LDB 1,[POINT 18,2,35] ; get address of list
9683 045462 200 00 0 01 000000 MOVE (1) ; get address
9684 045463 202 00 0 00 046074 MOVEM IIADR ; save it
9685 045464 200 00 0 01 000001 MOVE 1(1) ; get data
9686 045465 202 00 0 00 046075 MOVEM IIINCC ; save it
9687 045466 202 00 0 00 046076 MOVEM IIINCA ; save it
9688 045467 202 00 0 00 046101 MOVEM IIDEPC ; save it
9689 045470 202 00 0 00 046102 MOVEM IIDEPA ; save it
9690 045471 202 00 0 00 046077 MOVEM IIEXAC ; save it
9691 045472 200 00 0 00 062752 MOVE [400000,,1] ; get null data
9692 045473 202 00 0 00 046100 MOVEM IIEXAA ; save it as actual
9693 045474 200 01 0 00 046074 MOVE 1,IIADR ; include address
9694 045475 201 00 0 00 000002 MOVEI 2 ; get IOP function
9695 045476 137 00 0 00 063146 DPB [POINT 3,1,2] ; save it
9696 045477 201 00 0 00 000077 MOVEI 77 ; get 'no interrupt' code
9697 045500 137 00 0 00 063147 DPB [POINT 6,1,8] ; save it
9698 045501 202 01 0 00 046070 MOVEM 1,IFLAG ; save interrupt type
9699 045502 332 00 0 00 064377' SKIPE SDEBUG ; test debug mode?
9700 GO [TMSGC <ISETEX Iflag >; yes - print debug
9701 MOVE IFLAG ; data and continue
9702 PNTHW
9703 TMSG < Adr >
9704 MOVE 1,IIADR
9705 PNTOCS
9706 TMSG < Data >
9707 MOVE 1,IIEXAC
9708 PNTOCS
9709 045503 260 17 0 00 063160 RTN]
9710 045504 350 00 0 17 777775 AOS -3(P) ; set up proper return
9711 045505 262 17 0 00 000002 RGET (2,1,0) ; restore AC's
9712
9713 045510 263 17 0 00 000000 RTN ; return
9714
9715 ; Set up a deposit transfer
9716
9717 045511 135 01 0 00 063145 IEXSDE: LDB 1,[POINT 18,2,35] ; get address of list
9718 045512 200 00 0 01 000000 MOVE (1) ; get address
9719 045513 202 00 0 00 046074 MOVEM IIADR ; save it
9720 045514 200 00 0 01 000001 MOVE 1(1) ; get data
9721 045515 202 00 0 00 046075 MOVEM IIINCC ; save it
9722 045516 202 00 0 00 046076 MOVEM IIINCA ; save it
9723 045517 202 00 0 00 046077 MOVEM IIEXAC ; save it
9724 045520 202 00 0 00 046100 MOVEM IIEXAA ; save it
9725 045521 202 00 0 00 046101 MOVEM IIDEPC ; save it
9726 045522 200 00 0 00 062752 MOVE [400000,,1] ; get null data
9727 045523 202 00 0 00 046102 MOVEM IIDEPA ; save it as actual
9728 045524 200 01 0 00 046074 MOVE 1,IIADR ; include address
9729 045525 201 00 0 00 000003 MOVEI 3 ; get IOP function
9730 045526 137 00 0 00 063146 DPB [POINT 3,1,2] ; save it
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 225
DFPTA1 MAC 10-Oct-83 21:43 Test Execute Routines SEQ 0412
9731 045527 201 00 0 00 000077 MOVEI 77 ; get 'no interrupt' code
9732 045530 137 00 0 00 063147 DPB [POINT 6,1,8] ; save it
9733 045531 202 01 0 00 046070 MOVEM 1,IFLAG ; save interrupt type
9734 045532 332 00 0 00 064377' SKIPE SDEBUG ; test debug mode?
9735 GO [TMSGC <ISETDE Iflag >; yes - print debug
9736 MOVE IFLAG ; data and continue
9737 PNTHW
9738 TMSG < Adr >
9739 MOVE 1,IIADR
9740 PNTOCS
9741 TMSG < Data >
9742 MOVE 1,IIDEPC
9743 PNTOCS
9744 045533 260 17 0 00 063176 RTN]
9745 045534 350 00 0 17 777775 AOS -3(P) ; set up proper return
9746 045535 262 17 0 00 000002 RGET (2,1,0) ; restore AC's
9747
9748 045540 263 17 0 00 000000 RTN ; return
9749
9750 ; Set up an inc/dec operation
9751
9752 045541 135 01 0 00 063145 IEXSID: LDB 1,[POINT 18,2,35] ; get address of list
9753 045542 200 00 0 01 000000 MOVE (1) ; get address
9754 045543 202 00 0 00 046074 MOVEM IIADR ; save it
9755 045544 200 00 0 01 000001 MOVE 1(1) ; get data
9756 045545 202 00 0 00 046077 MOVEM IIEXAC ; save it
9757 045546 202 00 0 00 046100 MOVEM IIEXAA ; save it
9758 045547 202 00 0 00 046101 MOVEM IIDEPC ; save it
9759 045550 202 00 0 00 046102 MOVEM IIDEPA ; save it
9760 045551 202 00 0 00 046075 MOVEM IIINCC ; save it
9761 045552 200 00 0 00 062752 MOVE [400000,,1] ; get null data
9762 045553 202 00 0 00 046076 MOVEM IIINCA ; save it as actual
9763 045554 200 01 0 00 046074 MOVE 1,IIADR ; include address
9764 045555 201 00 0 00 000004 MOVEI 4 ; get IOP function
9765 045556 137 00 0 00 063146 DPB [POINT 3,1,2] ; save it
9766 045557 201 00 0 00 000077 MOVEI 77 ; get 'no interrupt' code
9767 045560 137 00 0 00 063147 DPB [POINT 6,1,8] ; save it
9768 045561 202 01 0 00 046070 MOVEM 1,IFLAG ; save interrupt type
9769 045562 332 00 0 00 064377' SKIPE SDEBUG ; test debug mode?
9770 GO [TMSGC <ISETID Iflag >; yes - print debug
9771 MOVE IFLAG ; data and continue
9772 PNTHW
9773 TMSG < Adr >
9774 MOVE 1,IIADR
9775 PNTOCS
9776 TMSG < Data >
9777 MOVE 1,IIINCC
9778 PNTOCS
9779 045563 260 17 0 00 063214 RTN]
9780 045564 350 00 0 17 777775 AOS -3(P) ; set up proper return
9781 045565 262 17 0 00 000002 RGET (2,1,0) ; restore AC's
9782
9783 045570 263 17 0 00 000000 RTN ; return
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 226
DFPTA1 MAC 10-Oct-83 21:43 Test Execute Routines SEQ 0413
9784
9785 ; Set up an examine/increment operation
9786
9787 045571 135 01 0 00 063145 IEXSEI: LDB 1,[POINT 18,2,35] ; get address of list
9788 045572 200 00 0 01 000000 MOVE (1) ; get address
9789 045573 202 00 0 00 046074 MOVEM IIADR ; save it
9790 045574 200 00 0 01 000001 MOVE 1(1) ; get data
9791 045575 350 00 0 00 000000 AOS ; get correct data
9792 045576 202 00 0 00 046077 MOVEM IIEXAC ; save it
9793 045577 202 00 0 00 046101 MOVEM IIDEPC ; save it
9794 045600 202 00 0 00 046102 MOVEM IIDEPA ; save it
9795 045601 202 00 0 00 046075 MOVEM IIINCC ; save it
9796 045602 200 00 0 00 062752 MOVE [400000,,1] ; get null data
9797 045603 202 00 0 00 046076 MOVEM IIINCA ; save it as actual
9798 045604 202 00 0 00 046100 MOVEM IIEXAA ; save it as actual
9799 045605 200 01 0 00 046074 MOVE 1,IIADR ; include address
9800 045606 201 00 0 00 000006 MOVEI 6 ; get IOP function
9801 045607 137 00 0 00 063146 DPB [POINT 3,1,2] ; save it
9802 045610 201 00 0 00 000077 MOVEI 77 ; get 'no interrupt' code
9803 045611 137 00 0 00 063147 DPB [POINT 6,1,8] ; save it
9804 045612 202 01 0 00 046070 MOVEM 1,IFLAG ; save interrupt type
9805 045613 332 00 0 00 064377' SKIPE SDEBUG ; test debug mode?
9806 GO [TMSGC <ISETEI Iflag >; yes - print debug
9807 MOVE IFLAG ; data and continue
9808 PNTHW
9809 TMSG < Adr >
9810 MOVE 1,IIADR
9811 PNTOCS
9812 TMSG < Data >
9813 MOVE 1,IIEXAC
9814 PNTOCS
9815 045614 260 17 0 00 063232 RTN]
9816 045615 350 00 0 17 777775 AOS -3(P) ; set up proper return
9817 045616 262 17 0 00 000002 RGET (2,1,0) ; restore AC's
9818
9819 045621 263 17 0 00 000000 RTN ; return
9820
9821 ; Set up interrupt (non-vectored or vectored)
9822
9823 045622 260 17 0 00 042221* IEXSIN: GO INITPI ; init PI system
9824 045623 260 17 0 00 042222* GO SETVEC ; set up vector addresses
9825 045624 200 01 0 00 046064 MOVE 1,IADDR ; get address
9826 045625 135 00 0 00 062644 LDB [POINT 14,2,17] ; get IOP function
9827 045626 137 00 0 00 063146 DPB [POINT 3,1,2] ; position correctly for IFLAG
9828 045627 135 00 0 00 063145 LDB [POINT 18,2,35] ; get interrupt type expected
9829 045630 137 00 0 00 063147 DPB [POINT 6,1,8] ; position correctly for IFLAG
9830 045631 202 01 0 00 046070 MOVEM 1,IFLAG ; save interrupt type
9831 045632 200 00 0 00 046075 MOVE IIINCC ; get correct increment data
9832 045633 202 00 0 00 046076 MOVEM IIINCA ; save actual increment data
9833 045634 200 00 0 00 046077 MOVE IIEXAC ; get correct examine data
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 227
DFPTA1 MAC 10-Oct-83 21:43 Test Execute Routines SEQ 0414
9834 045635 202 00 0 00 046100 MOVEM IIEXAA ; save actual examine data
9835 045636 200 00 0 00 046101 MOVE IIDEPC ; get correct deposit data
9836 045637 202 00 0 00 046102 MOVEM IIDEPA ; save actual deposit data
9837 045640 332 00 0 00 064377' SKIPE SDEBUG ; test debug mode?
9838 GO [TMSGC <ISETIN Iflag >; yes - print debug
9839 MOVE IFLAG ; data and continue
9840 PNTHW
9841 045641 260 17 0 00 063250 RTN]
9842 045642 350 00 0 17 777775 AOS -3(P) ; set up proper return
9843 045643 262 17 0 00 000002 RGET (2,1,0) ; restore AC's
9844
9845 045646 263 17 0 00 000000 RTN ; return
9846
9847 ; Start the port
9848
9849 045647 260 17 0 00 045117* IEXSTR: GO IPACLR ; do a 'port clear'
9850 045650 200 00 0 00 063254 MOVE [INTNUM,,INTNUM+1] ; build BLT pointer
9851 045651 251 00 0 00 000000* BLT INTEND ; clear interrupt history data
9852 045652 135 01 0 00 062601 LDB 1,[POINT 32,2,35] ; get start address
9853 045653 301 01 0 00 007777 CAIL 1,7777 ; default address selected?
9854 045654 200 01 0 00 046064 MOVE 1,IADDR ; yes - get it
9855 045655 202 01 0 00 045123* MOVEM 1,SNEXT ; save it
9856 045656 202 01 0 00 046064 MOVEM 1,IADDR ; save as start address
9857 045657 242 01 0 00 000001 LSH 1,1 ; position properly
9858 045660 260 17 0 00 045126* GO LDRAR ; load the register
9859 045661 336 01 0 00 045135* SKIPN 1,SDATA ; any data given?
9860 045662 201 01 0 00 000014 MOVEI 1,MPRUN!4 ; no - set initial data
9861 045663 332 00 0 00 030037 SKIPE USER ; user mode?
9862 045664 620 01 0 00 000007 TRZ 1,7 ; yes - clear PI level bits
9863 045665 660 01 0 00 040010 TRO 1,SELLAR!MPRUN ; ensure SELLAR,MPRUN are set
9864 045666 202 01 0 00 045661* MOVEM 1,SDATA ; save start data
9865 045667 200 01 0 00 045666* MOVE 1,SDATA ; get start data
9866 045670 260 17 0 00 045247* GO LDCSR ; write to CSR
9867 045671 332 00 0 00 064377' SKIPE SDEBUG ; EXEC debug mode?
9868 GO [TMSGC <ISTART Adr > ; yes - print debug
9869 MOVE IADDR ; data and continue
9870 PNTOCS
9871 045672 260 17 0 00 063261 RTN]
9872 045673 350 00 0 17 777775 AOS -3(P) ; set up return
9873 045674 262 17 0 00 000002 RGET (2,1,0) ; restore AC's
9874
9875 045677 263 17 0 00 000000 RTN ; return +3/+4
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 228
DFPTA1 MAC 10-Oct-83 21:43 Test Execute Routines SEQ 0415
9876
9877 ; Execute a JRST and exit
9878
9879 045700 550 02 0 00 000002 IEXJRS: HRRZ 2,2 ; only want the address
9880 045701 332 00 0 00 064377' SKIPE SDEBUG ; EXEC debug mode?
9881 GO [TMSGC <IJRST Adr > ; yes - print debug
9882 MOVE 2 ; data and continue
9883 PNTOCS
9884 045702 260 17 0 00 063270 RTN]
9885 045703 200 06 0 00 000002 MOVE 6,2 ; get new table address
9886 045704 262 17 0 00 000002 RGET (2,1,0) ; restore AC's
9887
9888 045707 350 00 0 17 000000 AOS (P) ; set up return
9889 045710 263 17 0 00 000000 RTN ; return +2
9890
9891 ; Execute a CALL and exit
9892
9893 045711 550 02 0 00 000002 IEXCAL: HRRZ 2,2 ; only want the address
9894 045712 332 00 0 00 064377' SKIPE SDEBUG ; EXEC debug mode?
9895 GO [TMSGC <ICALL Adr > ; yes - print debug
9896 MOVE 2 ; data and continue
9897 PNTOCS
9898 045713 260 17 0 00 063277 RTN]
9899 045714 261 17 0 00 000003 RPUT (3,4) ; save some AC's
9900
9901 045716 260 17 1 00 000002 GO @2 ; call the routine
9902 045717 262 17 0 00 000004 RGET (4,3,2,1,0) ; restore AC's
9903
9904 045724 350 00 0 17 000000 AOS (P) ; set up return
9905 045725 263 17 0 00 000000 RTN ; return +2
9906
9907 ; Execute a CALL and check if test done and exit
9908
9909 045726 550 02 0 00 000002 IEXCAC: HRRZ 2,2 ; only want the address
9910 045727 332 00 0 00 064377' SKIPE SDEBUG ; EXEC debug mode?
9911 GO [TMSGC <ICALLC Adr > ; yes - print debug
9912 MOVE 2 ; data and continue
9913 PNTOCS
9914 045730 260 17 0 00 063306 RTN]
9915 045731 261 17 0 00 000003 RPUT (3,4) ; save some AC's
9916
9917 045733 260 17 1 00 000002 GO @2 ; call the routine
9918 045734 334 00 0 00 000000 SKIPA ; exit test
9919 045735 350 00 0 17 777773 AOS -5(P) ; set up return
9920 045736 262 17 0 00 000004 RGET (4,3,2,1,0) ; restore AC's
9921
9922 045743 263 17 0 00 000000 RTN ; return +2
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 229
DFPTA1 MAC 10-Oct-83 21:43 Test Execute Routines SEQ 0416
9923
9924 ; Exit test (if error flag is set)
9925
9926 045744 332 00 0 00 064377' IEXEXI: SKIPE SDEBUG ; EXEC debug mode?
9927 GO [TMSGC <IEXIT> ; yes - print debug
9928 045745 260 17 0 00 063314 RTN] ; data and continue
9929 045746 336 00 0 00 000015 SKIPN ERFLG ; any errors yet?
9930 045747 350 00 0 17 777775 AOS -3(P) ; no - not done with test yet
9931 045750 262 17 0 00 000002 RGET (2,1,0) ; restore AC's
9932
9933 045753 263 17 0 00 000000 RTN ; return +2 or +1
9934
9935 ; Wait for interrupt operation to complete
9936
9937 045754 350 00 0 00 046306 IEXWAI: AOS TSTSUB ; increment test segment
9938 045755 135 00 0 00 062601 LDB [POINT 32,2,35] ; get time to wait
9939 045756 260 17 0 00 042430 GO ODELAY ; wait
9940 045757 260 17 0 00 045227* GO RDCSR ; read CSR
9941 045760 254 00 0 00 046037 JRST IEXWA5 ; error accessing CSR
9942 045761 202 01 0 00 046066 MOVEM 1,ICSR ; save CSR data
9943 045762 260 17 0 00 000000* GO .PIOFF ; shut off PI system
9944
9945 ; Find out final address
9946
9947 045763 201 01 0 00 040000 MOVEI 1,SELLAR ; gset up to read LAR
9948 045764 260 17 0 00 045670* GO LDCSR ; write CSR
9949 045765 260 17 0 00 045250* GO RDLAR ; read LAR
9950 045766 242 01 0 00 777777 LSH 1,-1 ; position correctly
9951 045767 202 01 0 00 046065 MOVEM 1,IADDRF ; save it
9952
9953 ; Handle inc/dec/exam/depos location
9954
9955 045770 135 02 0 00 063316 LDB 2,[POINT 3,IFLAG,2] ; get interrupt type
9956 045771 307 02 0 00 000001 CAIG 2,1 ; vectored or non-vectored?
9957 045772 254 00 0 00 046015 JRST IEXWA0 ; yes - continue
9958 045773 306 02 0 00 000002 CAIN 2,2 ; no - examine?
9959 GO [GO IEXWRG ; yes - read examine data
9960 MOVEM 1,IEBUF ; save EBUF data
9961 MOVEM 1,IIEXAA ; save for compare
9962 045774 260 17 0 00 063317 RTN]
9963 045775 306 02 0 00 000006 CAIN 2,6 ; examine/increment?
9964 GO [GO IEXWRG ; yes - read examine data
9965 MOVEM 1,IEBUF ; save EBUF data
9966 MOVEM 1,IIEXAA ; save for compare
9967 045776 260 17 0 00 063317 RTN]
9968 045777 200 00 0 00 046100 MOVE IIEXAA ; get actual data examined
9969 046000 312 00 0 00 046077 CAME IIEXAC ; same as correct data?
9970 046001 474 15 0 00 000000 SETO ERFLG, ; no - set error flag
9971 046002 336 00 0 00 046074 SKIPN IIADR ; valid address of data?
9972 046003 254 00 0 00 046015 JRST IEXWA0 ; no - skip over these compares
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 230
DFPTA1 MAC 10-Oct-83 21:43 Test Execute Routines SEQ 0417
9973 046004 200 01 1 00 046074 MOVE 1,@IIADR ; get actual data
9974 046005 312 01 0 00 046075 CAME 1,IIINCC ; same as correct?
9975 046006 474 15 0 00 000000 SETO ERFLG, ; no - set error flag
9976 046007 312 01 0 00 046101 CAME 1,IIDEPC ; same as correct?
9977 046010 474 15 0 00 000000 SETO ERFLG, ; no - set error flag
9978 046011 301 02 0 00 000004 CAIL 2,4 ; increment of some sort?
9979 046012 202 01 0 00 046076 MOVEM 1,IIINCA ; yes - save actual data
9980 046013 306 02 0 00 000003 CAIN 2,3 ; deposit?
9981 046014 202 01 0 00 046101 MOVEM 1,IIDEPC ; yes - save actual data
9982
9983 ; Find out interrupt data
9984
9985 046015 335 00 0 00 042254* IEXWA0: SKIPGE INTNUM ; any interrupts occurred?
9986 JRST [SETOM IITYPE ; no - flag such and clear
9987 SETOM IINTPC ; interrupt PC and
9988 046016 254 00 0 00 063323 JRST IEXWA1] ; continue
9989 046017 200 01 0 00 046015* MOVE 1,INTNUM ; get interrupt number
9990 046020 301 01 0 00 000024 CAIL 1,^D20 ; overflow interrupt?
9991 046021 201 01 0 00 000023 MOVEI 1,^D19 ; yes - get last saved interrupt
9992 046022 550 00 0 01 042213* HRRZ INTTYP(1) ; get interrupt type
9993 046023 202 00 0 00 046072 MOVEM IITYPE ; save it
9994 046024 200 00 0 01 042170* MOVE INTPC(1) ; get interrupt PC
9995 046025 202 00 0 00 046073 MOVEM IINTPC ; save it
9996
9997 ; Now determine if an error occurred due to receipt or lack of receipt of
9998 ; an interrupt.
9999
10000 046026 135 02 0 00 063326 IEXWA1: LDB 2,[POINT 6,IFLAG,8] ; get interrupt type
10001 046027 302 02 0 00 000077 CAIE 2,77 ; interrupt expected?
10002 046030 254 00 0 00 046034 JRST IEXWA2 ; yes - continue
10003 046031 331 00 0 00 046017* SKIPL INTNUM ; interrupt occurred?
10004 046032 474 15 0 00 000000 SETO ERFLG, ; yes - set error flag
10005 046033 254 00 0 00 046040 JRST IEXWA6 ; continue
10006
10007 ; Interrupt was expected - verify that the correct one really did occur
10008
10009 046034 312 02 0 01 046022* IEXWA2: CAME 2,INTTYP(1) ; correct type interrupt occurred?
10010 046035 474 15 0 00 000000 SETO ERFLG, ; no - set error flag
10011 046036 254 00 0 00 046040 JRST IEXWA6 ; continue
10012
10013 ; Error did occur/exit
10014
10015 046037 474 15 0 00 000000 IEXWA5: SETO ERFLG, ; set error flag
10016 046040 332 00 0 00 064377' IEXWA6: SKIPE SDEBUG ; EXEC debug mode?
10017 GO [TMSGC <IWAIT CSR > ; yes - print debug
10018 MOVE ICSR ; data and continue
10019 PNTHW
10020 TMSG < Stopped at >
10021 MOVE IADDRF
10022 PNTOCS
10023 046041 260 17 0 00 063335 RTN]
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 231
DFPTA1 MAC 10-Oct-83 21:43 Test Execute Routines SEQ 0418
10024 046042 260 17 0 00 000000* GO .PION ; turn interrupt system back on
10025 046043 336 00 0 00 000015 SKIPN ERFLG ; error flag set?
10026 046044 350 00 0 17 777775 AOS -3(P) ; no - set up good return
10027 046045 350 00 0 17 777775 AOS -3(P) ; set up return
10028 046046 350 00 0 17 777775 AOS -3(P) ; set up return
10029 046047 262 17 0 00 000002 RGET (2,1,0) ; restore AC's
10030
10031 046052 263 17 0 00 000000 RTN ; return
10032
10033 ; Routine to read 2901 register with the examine data it it
10034
10035 046053 201 01 0 00 001100 IEXWRG: MOVEI 1,1100 ; yes - get start address
10036 046054 242 01 0 00 000001 LSH 1,1 ; position correctly
10037 046055 260 17 0 00 045660* GO LDRAR ; load the register
10038 046056 201 01 0 00 020010 MOVEI 1,SINCYC!MPRUN ; get proper bits
10039 046057 260 17 0 00 045764* GO LDCSR ; write CSR
10040 046060 201 01 0 00 200000 MOVEI 1,TSTEBF ; set up to read EBUF
10041 046061 260 17 0 00 046057* GO LDCSR ; write CSR
10042 046062 260 17 0 00 045234* GO RDEBUF ; read the EBUF
10043 046063 263 17 0 00 000000 RTN ; return
10044
10045 ; Miscellaneous
10046
10047 046064 000000 000000 IADDR: 0 ; initial starting address
10048 046065 000000 000000 IADDRF: 0 ; final address
10049 046066 000000 000000 ICSR: 0 ; final CSR data
10050 046067 000000 000000 ITIME: 0 ; amount of time to let port run
10051 046070 000000 000000 IFLAG: 0 ; interrupt should occur data
10052 046071 000000 000000 IIOPF: 0 ; IOP function word
10053 046072 000000 000000 IITYPE: 0 ; type of interrupt which occurred
10054 046073 000000 000000 IINTPC: 0 ; interrupt PC
10055 046074 000000 000000 IIADR: 0 ; address of location to be inc/dec/exa/dep
10056 046075 000000 000000 IIINCC: 0 ; contents of location to be inc/dec (correct)
10057 046076 000000 000000 IIINCA: 0 ; contents of location to be inc/dec (actual)
10058 046077 000000 000000 IIEXAC: 0 ; data examined (correct)
10059 046100 000000 000000 IIEXAA: 0 ; data examined (actual)
10060 046101 000000 000000 IIDEPC: 0 ; data deposited (correct)
10061 046102 000000 000000 IIDEPA: 0 ; data deposited (actual)
10062 046103 000000 000000 IEBUF: 0 ; EBUF contents (of 2901 register 5)
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 232
DFPTA1 MAC 10-Oct-83 21:43 Test Execute Routines SEQ 0419
10063
10064 ;#********************************************************************
10065 ;* IIPNT - Print out error data
10066 ;#********************************************************************
10067
10068 046104 261 17 0 00 000000 IIPNT: RPUT (0,1) ; save AC's
10069
10070 046106 200 01 0 00 045377* MOVE 1,SCOSW ; get switches
10071
10072 ; Print start/end address
10073
10074 046107 603 01 0 00 000200 TLNE 1,TXTINH ; full printout?
10075 GO [TMSGC <Start > ; no
10076 MOVE IADDR
10077 PNT4
10078 TMSG < End > ; print end address
10079 MOVE IADDRF
10080 PNT4
10081 046110 260 17 0 00 063344 RTN]
10082 046111 603 01 0 00 000200 TLNE 1,TXTINH ; full printout
10083 046112 254 00 0 00 046127 JRST IIPN0 ; no - continue
10084 046113 037 00 0 00 062335 TMSGC <Start Addr: > ; print start address
10085 046114 200 00 0 00 046064 MOVE IADDR
10086 046115 037 04 0 00 000000 PNT4
10087 046116 037 00 0 00 063076 TMSGC <End Addr: > ; print end address
10088 046117 200 00 0 00 046065 MOVE IADDRF
10089 046120 037 04 0 00 000000 PNT4
10090 046121 037 00 0 00 062714 TMSGC <Final CSR data: >
10091 046122 200 00 0 00 046066 MOVE ICSR
10092 046123 037 13 0 00 000000 PNTHW ; print it
10093 046124 037 00 0 00 063353 TMSGC <Final EBUF data: >
10094 046125 200 00 0 00 046103 MOVE IEBUF
10095 046126 037 13 0 00 000000 PNTHW ; print it
10096
10097 ; Print IOP function word
10098
10099 046127 037 00 0 00 063360 IIPN0: TMSGC <IOP Function word: >
10100 046130 200 00 0 00 046071 MOVE IIOPF
10101 046131 037 13 0 00 000000 PNTHW
10102 046132 603 01 0 00 000200 TLNE 1,TXTINH ; full printout?
10103 046133 254 00 0 00 046201 JRST IIPN3 ; no - continue
10104 046134 037 00 0 00 063365 TMSG <, AdrSpa = >
10105 046135 135 01 0 00 063370 LDB 1,[POINT 3,IIOPF,2] ; get address space
10106 XCT [TMSG <EPT>
10107 TMSG <ExecVir>
10108 TMSG <Illegal Function>
10109 TMSG <Illegal Function>
10110 046136 256 00 0 01 063402 TMSG <Physical>](1) ; print it
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 233
DFPTA1 MAC 10-Oct-83 21:43 Test Execute Routines SEQ 0420
10111 046137 037 00 0 00 063407 TMSG <, Func = >
10112 046140 135 01 0 00 063411 LDB 1,[POINT 3,IIOPF,5] ; get function
10113 XCT [TMSG <Non-Vect Int,> ; print it
10114 TMSG <Non-Vect Int,>
10115 TMSG <Vect Int>
10116 GO [MOVE IIOPF
10117 TLNN 4000
10118 TMSG <Increment,>
10119 TLNE 4000
10120 TMSG <Decrement,>
10121 RTN]
10122 TMSG <Examine,>
10123 TMSG <Deposit,>
10124 TMSG <Byte,>
10125 046141 256 00 0 01 063444 TMSG <Examine/Incr,>](1)
10126 046142 037 00 0 00 063454 TMSGC < Qual = >
10127 046143 135 00 0 00 063457 LDB [POINT 1,IIOPF,6] ; get QUAL bit
10128 046144 037 16 0 00 000003 PNTOCS ; print it
10129 046145 037 00 0 00 063460 TMSG <, DevNum = >
10130 046146 135 00 0 00 063463 LDB [POINT 4,IIOPF,10] ; get device number
10131 046147 037 16 0 00 000003 PNTOCS ; print it
10132 046150 037 00 0 00 063464 TMSG <, Addr = >
10133 046151 135 00 0 00 063466 LDB [POINT 24,IIOPF,35] ; get address
10134 046152 037 16 0 00 000003 PNTOCS ; print it
10135
10136 ; Print type of interrupt expected
10137
10138 046153 135 01 0 00 063326 IIPN1: LDB 1,[POINT 6,IFLAG,8] ; get interrupt expected
10139 046154 306 01 0 00 000077 CAIN 1,77 ; any interrupt expected?
10140 046155 037 00 0 00 063467 TMSGC <No interrupt expected> ; no - print such
10141 046156 306 01 0 00 000077 CAIN 1,77 ; any interrupt expected?
10142 046157 254 00 0 00 046167 JRST IIPN2 ; no - continue
10143 046160 037 00 0 00 063474 TMSGC <Interrupt function attempted: >
10144 046161 135 01 0 00 063316 LDB 1,[POINT 3,IFLAG,2] ; get type
10145 XCT [TMSG <Non-Vectored interrupt>
10146 TMSG <Vectored interrupt>
10147 TMSG <Examine addr >
10148 TMSG <Deposit addr >
10149 TMSG <Increment addr >
10150 TMSG <Decrement addr >
10151 046162 256 00 0 01 063537 TMSG <Examine/increment addr >](1)
10152 046163 307 01 0 00 000001 CAIG 1,1 ; vectored or non-vectored?
10153 046164 254 00 0 00 046167 JRST IIPN2 ; yes - continue
10154 046165 135 00 0 00 063546 LDB [POINT 18,IFLAG,35] ; get address
10155 046166 037 16 0 00 000003 PNTOCS ; print it out
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 234
DFPTA1 MAC 10-Oct-83 21:43 Test Execute Routines SEQ 0421
10156
10157 ; Print which type of interrupt did occur
10158
10159 046167 335 01 0 00 046072 IIPN2: SKIPGE 1,IITYPE ; any interrupt occurred?
10160 046170 037 00 0 00 063547 TMSGC <No interrupt occurred> ; no - print such
10161 046171 321 01 0 00 046201 JUMPL 1,IIPN3 ; any interrupt occurred? no - continue
10162 046172 336 00 0 00 000001 SKIPN 1 ; vectored interrupt occurred?
10163 046173 037 00 0 00 063554 TMSGC <Vectored interrupt occurred>
10164 046174 332 00 0 00 000001 SKIPE 1 ; non-vectored interrupt occurred?
10165 046175 037 00 0 00 063562 TMSGC <Non-Vectored interrupt occurred>
10166 046176 037 00 0 00 063571 TMSG < from PC >
10167 046177 200 00 0 00 046073 MOVE IINTPC ; get PC
10168 046200 037 16 0 00 000003 PNTOCS ; print it
10169
10170 ; Print increment/decrement c/a
10171
10172 046201 200 01 0 00 046106* IIPN3: MOVE 1,SCOSW ; get switches
10173 046202 200 00 0 00 046075 MOVE IIINCC ; get correct inc/dec data
10174 046203 316 00 0 00 046076 CAMN IIINCA ; same as actual?
10175 046204 254 00 0 00 046224 JRST IIPN4 ; yes - continue
10176 046205 037 00 0 00 063573 TMSGC <Address inc/dec: >
10177 046206 200 00 0 00 046074 MOVE IIADR ; get address inc/dec
10178 046207 037 16 0 00 000003 PNTOCS ; print it
10179 046210 603 01 0 00 000200 TLNE 1,TXTINH ; full printout
10180 046211 037 00 0 00 063600 TMSGC < (C): > ; no
10181 046212 607 01 0 00 000200 TLNN 1,TXTINH ; full printout
10182 046213 037 00 0 00 063602 TMSGC < Correct: > ; yes
10183 046214 200 00 0 00 046075 MOVE IIINCC
10184 046215 037 13 0 00 000000 PNTHW
10185 046216 603 01 0 00 000200 TLNE 1,TXTINH ; full printout
10186 046217 037 00 0 00 063605 TMSGC < (A): > ; no
10187 046220 607 01 0 00 000200 TLNN 1,TXTINH ; full printout
10188 046221 037 00 0 00 063607 TMSGC < Actual: > ; yes
10189 046222 200 00 0 00 046076 MOVE IIINCA
10190 046223 037 13 0 00 000000 PNTHW
10191
10192 ; Print examine c/a
10193
10194 046224 200 01 0 00 046201* IIPN4: MOVE 1,SCOSW ; get switches
10195 046225 200 00 0 00 046077 MOVE IIEXAC ; get correct examine data
10196 046226 316 00 0 00 046100 CAMN IIEXAA ; same as actual?
10197 046227 254 00 0 00 046247 JRST IIPN5 ; yes - continue
10198 046230 037 00 0 00 063612 TMSGC <Address examined: >
10199 046231 200 00 0 00 046074 MOVE IIADR ; get address inc/dec
10200 046232 037 16 0 00 000003 PNTOCS ; print it
10201 046233 603 01 0 00 000200 TLNE 1,TXTINH ; full printout
10202 046234 037 00 0 00 063600 TMSGC < (C): > ; no
10203 046235 607 01 0 00 000200 TLNN 1,TXTINH ; full printout
10204 046236 037 00 0 00 063602 TMSGC < Correct: > ; yes
10205 046237 200 00 0 00 046077 MOVE IIEXAC
10206 046240 037 13 0 00 000000 PNTHW
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 235
DFPTA1 MAC 10-Oct-83 21:43 Test Execute Routines SEQ 0422
10207 046241 603 01 0 00 000200 TLNE 1,TXTINH ; full printout
10208 046242 037 00 0 00 063605 TMSGC < (A): > ; no
10209 046243 607 01 0 00 000200 TLNN 1,TXTINH ; full printout
10210 046244 037 00 0 00 063607 TMSGC < Actual: > ; yes
10211 046245 200 00 0 00 046100 MOVE IIEXAA
10212 046246 037 13 0 00 000000 PNTHW
10213
10214 ; Print deposit c/a
10215
10216 046247 200 01 0 00 046224* IIPN5: MOVE 1,SCOSW ; get switches
10217 046250 200 00 0 00 046101 MOVE IIDEPC ; get correct deposit data
10218 046251 316 00 0 00 046102 CAMN IIDEPA ; same as actual?
10219 046252 254 00 0 00 046272 JRST IIPNX ; yes - continue
10220 046253 037 00 0 00 063617 TMSGC <Address deposited: >
10221 046254 200 00 0 00 046074 MOVE IIADR ; get address inc/dec
10222 046255 037 16 0 00 000003 PNTOCS ; print it
10223 046256 603 01 0 00 000200 TLNE 1,TXTINH ; full printout
10224 046257 037 00 0 00 063600 TMSGC < (C): > ; no
10225 046260 607 01 0 00 000200 TLNN 1,TXTINH ; full printout
10226 046261 037 00 0 00 063602 TMSGC < Correct: > ; yes
10227 046262 200 00 0 00 046101 MOVE IIDEPC
10228 046263 037 13 0 00 000000 PNTHW
10229 046264 603 01 0 00 000200 TLNE 1,TXTINH ; full printout
10230 046265 037 00 0 00 063605 TMSGC < (A): > ; no
10231 046266 607 01 0 00 000200 TLNN 1,TXTINH ; full printout
10232 046267 037 00 0 00 063607 TMSGC < Actual: > ; yes
10233 046270 200 00 0 00 046102 MOVE IIDEPA
10234 046271 037 13 0 00 000000 PNTHW
10235
10236 ; Exit
10237
10238 046272 262 17 0 00 000001 IIPNX: RGET (1,0) ; restore AC's
10239
10240 046274 263 17 0 00 000000 RTN ; return
10241
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 236
DFPTA1 MAC 10-Oct-83 21:43 Miscellaneous Test Variables SEQ 0423
10242 SUBTTL Miscellaneous Test Variables
10243
10244 ;#********************************************************************
10245 ; Port device code selection
10246 ;
10247 ; Select word (NISEL or CISEL):
10248 ; Bit 0 - Port exists - 0 - no (This is determined by whether or not
10249 ; 1 - yes a CONI succeeds and bit 0 is set,
10250 ; indicating a port).
10251 ; 1 - Port selectable - 0 - no (This is determined by whether
10252 ; 1 - yes or not a DEVREQ succeeds).
10253 ; 2 - Port selected - 0 - no
10254 ; 1 - yes
10255 ;#********************************************************************
10256
10257 046275 056400 000000 PORTNI: 56400,,0 ; NI port device code
10258 046276 057400 000000 PORTCI: 57400,,0 ; CI port device code
10259 046277 000000 000000 NISEL: 0 ; NI port selected
10260 046300 000000 000000 CISEL: 0 ; CI port selected
10261 046301 000000 000000 PORSEL: 0 ; port currently selected
10262 046302 000000 000000 UUT: 0 ; unit under test
10263
10264
10265 ;#*********************************************************************
10266 ; Current Test Data
10267 ;#*********************************************************************
10268
10269 046303 000 00 0 00 000000 TSTNAM: Z ; current test description
10270 046304 000 00 0 00 000000 TSTCLS: Z ; current test class (0-5)
10271 046305 000 00 0 00 000000 TSTNUM: Z ; current test number (1-n)
10272 046306 000 00 0 00 000000 TSTSUB: Z ; current subtest number
10273 046307 000 00 0 00 000000 TSTPC: Z ; current test PC
10274 046310 000 00 0 00 000000 TSTFLG: Z ; current test flags
10275 046311 000 00 0 00 000000 TSTADD: Z ; current test dispatch table address
10276 046312 000 00 0 00 000000 TSTMIC: Z ; current test microcode address
10277 046313 000 00 0 00 000000 TSTMSK: Z ; mask to determine what test to run
10278 046314 000 00 0 00 000000 TSTREP: Z ; number of test repetitions done
10279 046315 000 00 0 00 000000 TSTREQ: Z ; number of test repetitions requested
10280 046316 000 00 0 00 000000 TSTMUL: Z ; multiple test flag (0-no,1-yes)
10281 046317 000 00 0 00 000000 TSTINH: Z ; inhibit fault isolation flag
10282 046320 000 00 0 00 000000 TSTHIG: Z ; addr of high probability modules
10283 046321 000 00 0 00 000000 TSTLOW: Z ; addr of low probability modules
10284 046322 000 00 0 00 000000 TSTOFF: Z ; relocatable offset of test module
10285 046323 000 00 0 00 000000 TSTREL: Z ; reliability mode repeat count
10286 046324 000 00 0 00 000000 TSTCNT: Z ; reliability mode repeat count
10287 046325 000 00 0 00 000000 FLTCLS: Z ; failing test class
10288 046326 000 00 0 00 000000 FLTNUM: Z ; failing test number
10289 046327 000 00 0 00 000000 NERROR: Z ; number of errors so far
10290
10291 046330 000 00 0 00 000000 PMODE: Z ; program mode
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 237
DFPTA1 MAC 10-Oct-83 21:43 Miscellaneous Test Variables SEQ 0424
10292
10293 ;#*********************************************************************
10294 ;* Data Buffer Areas For Reading And Writing
10295 ;#*********************************************************************
10296
10297 047000 LOC <.+1000>&777000
10298
10299 047000 BUFF: BLOCK ^D1024
10300
10301
10302 ;#********************************************************************
10303 ;* Data transfer paramters
10304 ;#********************************************************************
10305
10306 051000 000000 000100 TWORD: 100 ; number of words
10307 051001 000000 000000 TMODE: 0 ; data format
10308 051002 222333 444555 TPAT: 222333,,444555 ; selected data pattern
10309
10310 051003 CBUF: BLOCK CBUFSZ ; channel control word storage area
10311
10312 051320 CSTWRD: BLOCK 4 ; channel logout storage
10313
10314
10315 ;#********************************************************************
10316 ; PATCH - Patch Area
10317 ;#********************************************************************
10318
10319 051324 PATCH0:
10320 051324 PATCH: BLOCK 100 ; patch area
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 238
DFPTA1 MAC 10-Oct-83 21:43 Miscellaneous Test Variables SEQ 0425
10321
10322 ;#********************************************************************
10323 ;* Special code to test SPEAR entries
10324 ;#********************************************************************
10325
10326 051424 200 00 0 00 051541 STEST: MOVE [JFCL] ; get noop
10327 051425 202 00 0 00 043511 MOVEM S1 ; delete SYERR call #1
10328 051426 202 00 0 00 043623 MOVEM S2 ; delete SYERR call #2
10329 051427 260 17 0 00 051433 GO .+4 ; do it
10330 051430 201 01 0 00 043516 MOVEI 1,SENT10 ; get address to print
10331 051431 260 17 0 00 051466 GO STESTP ; print it
10332 051432 254 00 0 00 051436 JRST STEST0 ; continue
10333 051433 261 17 0 00 000000 RPUT (0,1) ; save AC's
10334
10335 051435 254 00 0 00 043503 JRST SPCHK1 ; check entry type 1
10336
10337 051436 260 17 0 00 051442 STEST0: GO .+4 ; do it
10338 051437 201 01 0 00 043636 MOVEI 1,SENT11 ; get address to print
10339 051440 260 17 0 00 051466 GO STESTP ; print it
10340 051441 254 00 0 00 051451 JRST STEST1 ; continue
10341 051442 261 17 0 00 000000 RPUT (0,1,2,3,4) ; save AC's
10342
10343 051447 400 15 0 00 000000 SETZ ERFLG, ; clear error flag
10344 051450 254 00 0 00 043552 JRST SPCHK2 ; check entry type 2 (no error)
10345
10346 051451 260 17 0 00 051455 STEST1: GO .+4 ; do it
10347 051452 201 01 0 00 043636 MOVEI 1,SENT11 ; get address to print
10348 051453 260 17 0 00 051466 GO STESTP ; print it
10349 051454 254 00 0 00 030007 JRST SRTDDT ; continue
10350 051455 261 17 0 00 000000 RPUT (0,1,2,3,4) ; save AC's
10351
10352 051462 474 15 0 00 000000 SETO ERFLG, ; set error flag
10353 051463 201 00 0 00 000012 MOVEI 12 ; get test number
10354 051464 202 00 0 00 046305 MOVEM TSTNUM ; save it
10355 051465 254 00 0 00 043552 JRST SPCHK2 ; check entry type 2 (error)
10356
10357 051466 037 00 0 00 063624 STESTP: TMSGCD <Buffer:>
10358 051467 505 01 0 00 777753 HRLI 1,-25 ; build AOBJN word
10359 051470 200 00 0 01 000000 MOVE (1) ; get data
10360 051471 037 13 0 00 000000 PNTHW ; print
10361 051472 037 00 0 00 030242 PCRL
10362 051473 253 01 0 00 051470 AOBJN 1,STESTP+2 ; loop till done
10363 051474 263 17 0 00 000000 RTN ; return
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page 239
DFPTA1 MAC 10-Oct-83 21:43 Miscellaneous Test Variables SEQ 0426
10364
10365 ;#********************************************************************
10366 ;* Special code to produce an EXE version
10367 ;#********************************************************************
10368
10369 051475 200 00 0 00 063627 EXEN: MOVE [SKIPA]
10370 051476 202 00 0 00 000000* MOVEM REQ1
10371 051477 202 00 0 00 000000* MOVEM REQ2
10372 051500 202 00 0 00 000000* MOVEM REL
10373 051501 200 00 0 00 063630 EXE: MOVE [10,,0]
10374 051502 202 00 0 00 030046 MOVEM CONSW
10375 051503 200 00 0 00 063631 MOVE [SETOM $$TOGG]
10376 051504 202 00 0 00 030641 MOVEM START+31
10377 051505 201 00 0 00 030000 MOVEI 30000
10378 051506 542 00 0 00 000120 HRRM .JBSA
10379 051507 402 00 0 00 030056 SETZM $ONETM
10380 051510 402 00 0 00 000000* SETZM HAVECI
10381 051511 402 00 0 00 000000* SETZM HAVENI
10382 051512 402 00 0 00 000016 SETZM MBCN
10383 051513 402 00 0 00 064404' SETZM TSLOD1
10384 051514 402 00 0 00 064405' SETZM TSLOD2
10385 051515 254 00 0 00 030007 JRST SRTDDT
10386
10387
10388 ;#********************************************************************
10389 ; End of Mainline Module
10390 ;#********************************************************************
10391
10392 051516 D1LIT: XLIST
10393
NO ERRORS DETECTED
PROGRAM BREAK IS 064420
ABSOLUTE BREAK IS 064325
CPU TIME USED 01:16.093
126P CORE USED
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page S-1
DFPTA1 MAC 10-Oct-83 21:43 SYMBOL TABLE SEQ 0427
AADDR 000000 ext CALPAR 043125 ent CMD3A 034256 DCMARK 040633
AAPNT 044226 ent CBASE 030652 ext CMD4 034260 DCODPB 037526
AAPNT0 044246 CBUF 051003 ent CMDQUE 034275 DCOLDB 037504
AAPNT1 044257 CBUFSZ 000315 spd CMDQUU 034300 DCOM0 037233
AAPNTX 044261 CBUS 100000 000000 spd CONFIG 032142 DCOM1 037250
ABORT 400000 spd CCMIC 041737 CONPNT 032215 DCOM3A 037427
ADRPE 100000 000000 spd CCPN0 045360 CONSW 030046 DCOMA0 037376
AEBUF 044435 int CCPN2 045377 CONVSX 037432 ext DCOMA1 037401
AEXEC 044113 ent CCPN3 045405 CPAT 045331 int DCOMA2 037424
AEXEC0 044163 CCPN4 045431 CRAMFR 037253 DCOMA3 037425
AEXECX 044176 CCPNT 045340 ent CRAMPE 004000 000000 spd DCOMA4 037444
ALACT 044221 int CCPNX 045437 CRAMTO 037254 DCOMA5 037446
ALCOR 044220 int CCSR 045323 int CSERR 045327 DCOMAA 037414
ALCSR 044215 int CCTAB1 041677 CSETCC 045035 DCOMAG 037362
ALEBF 044216 int CCTAB3 041717 CSHFLG 030506 DCOMAL 037357
ALERR 044217 int CCWPNT 042102 ext CSHMEM 030507 DCOMAX 037451
ALFLC 044224 int CDERR 045330 int CSREN0 043251 DCOMDB 037352
ALFLE 044223 int CEBUAD 064331' CSREN1 043265 DCOMDE 037263
ALFLS 044222 int CEBUF 044436 int CSREN2 043266 DCOMEX 037632
ALFLT 044225 int CEBUFA 045326 int CSRENB 043276 DCOMEZ 037653
ALL 770000 000000 spd CEBUFC 045325 int CSRENG 043237 ent DCOMGO 037212
ALSRT 044214 int CEXCAC 045174 CSRENS 064332' DCOML0 037660
ALTCHK 007000 000000 CEXCAL 045157 CSRENX 043270 DCOMLI 037656
ALTF 064326' int CEXCOM 045300 CSRPNT 043215 ent DCOMLX 037700
ALTIM 044213 int CEXEC 045006 ent CSRPNX 043232 DCOMPA 042115
ALTMGO 030063 CEXERR 045016 CSTATF 045334 int DCOMSG 037462
ALU 020000 000000 spd CEXEX1 045017 CSTWRD 051320 ent DCOMZE 037615
ALUFR 040260 CEXEXI 045212 CTIME 045324 DCONI 035323
ALUTO 040261 CEXJRS 045146 CTRAN 045333 DCONI1 035326
ANEXT 037262 CEXSRD 045025 CURTIM 032644 ext DCONO 035333
ARGFLG 041174 ext CEXSRW 045105 CWORDL 037256 int DCONO1 035337
ARGUM 053766 ext CEXSTR 045117 CWORDR 037257 int DCONT 037056
BBPN0 044464 CEXSWR 045074 D1LIT 051516 DCWPNT 042077
BBPN1 044473 CEXWA2 045243 DACRAM 037201 DDALU 040064
BBPN2 044512 CEXWA3 045265 DBCRAM 037176 DDALU0 040070
BBPNT 044440 ent CEXWA4 045266 DBPNT 042044 DDALUM 040242
BBPNX 044520 CEXWAI 045222 DBPNT0 042057 DDALUX 040142
BEGIN 030000 CHDATA 045256 ext DBPNT1 042071 DDATI 035344
BEXCAL 044404 CHINIT 045055 ext DBREA0 041143 DDATI1 035347
BEXCHK 044420 CHKARG 055324 ext DBREAK 041141 DDATO 035353
BEXEC 044264 ent CHKCSR 000000 ext DC1ST 064333' DDATO1 035357
BEXERR 044276 CHKTS0 042363 DCBR0 041236 DDCRAM 037173
BEXEX1 044277 CHKTS1 042400 DCBR1 041247 DDCSR 035306
BEXJRS 044372 CHKTST 042352 DCBRK 041217 DDEBU1 037120
BEXSS0 044332 CHKTSX 042401 DCCOD1 041627 DDEBUF 037114
BEXSSC 044310 CIPORT 000020 spd DCCOD2 041653 DDELA0 042466
BEXSSS 044306 CISEL 046300 ent DCCOD3 041655 DDELAX 042502
BFLAG 044437 CLEN 045332 int DCCOD4 041663 DDELAY 042456
BONETM 064327' CLOGBF 045335 DCCOD5 041665 DDLOC0 040371
BUFCOM 045436 ext CLRBUF 060055 ext DCCOD6 041673 DDLOCM 040535
BUFF 047000 int CLREBU 042540 ext DCCODE 041621 DDLOCS 040365
BUFGEN 045053 ext CMD0 034207 DCLEAR 035420 DDLOCX 040436
CADDR 037255 int CMD1 034214 DCMAR0 040652 DDNEX0 041060
CALL 200000 000000 spd CMD2 034221 DCMAR1 040663 DDNEX1 041067
CALMAR 064330' CMD3 034245 DCMAR2 040700 DDNEX2 041074
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page S-2
DFPTA1 MAC 10-Oct-83 21:43 SYMBOL TABLE SEQ 0428
DDNEXT 041037 DFVERX 041474 DSETC1 035001 DZALUM 040255
DDRAR 037146 DFVERY 041527 DSETC2 035002 DZALUX 040234
DDTAB 041044 DHELP 034622 DSETCS 034772 DZCRAM 037204
DEALU 037756 DHELP0 034634 DSETD1 035114 DZCSR 035315
DEALU0 037777 DHELP1 034665 DSETD2 035115 DZEBUF 037107
DEALU1 040017 DIINIT 042216 DSETD3 035125 DZLOC0 040462
DEALUM 040237 DIPRIN 042142 DSETDA 035067 DZLOC1 040502
DEALUX 040057 DISGO 031222 DSETDX 035110 DZLOCM 040550
DEBTIM 042470 ext DISLIS 031132 DSETE1 035040 DZLOCS 040441
DEBUG1 002000 spd DISMS 104000 000167 int DSETE2 035041 DZLOCX 040525
DEBUG2 001000 spd DISP0 030757 DSETEB 035027 DZRAR 037160
DEBUG3 000400 spd DISP0A 031035 DSETF0 035143 EADDR 000000 ext
DEBUG4 000200 spd DISP0B 031037 DSETF1 035146 EBUS 400000 000000 spd
DEBUG5 000100 spd DISP1 031045 DSETF2 035147 ENATST 064336'
DECRAM 037170 DISP2 031111 DSETFA 035173 ENDFIX 030577
DECSR 035276 DISPAT 030753 DSETFN 035127 ENDUUO 037500 000004
DECVER 000001 spd DISPD 031073 DSETHE 035260 EOPUUO 037700 000004
DECYN 035033 ext DISPE 031106 DSETHL 035266 ERESET 035416 ext
DEEBUF 037073 DISPR 031060 DSETL1 035061 ERFLG 000015
DELAR 037126 DISPX 031112 DSETL2 035062 ERRCNT 064337'
DELOC0 040303 DISQUE 031116 DSETLN 035047 ERRPC 030052
DELOC1 040324 DISQUU 031121 DSETP1 035020 EXE 051501
DELOCM 040530 DLBR0 041302 DSETP2 035021 EXEN 051475
DELOCS 040262 DLBR1 041315 DSETPL 035223 FGETW 041570 ext
DELOCX 040360 DLBR2 041334 DSETPP 035242 FINCMD 060025 ext
DENE0 040771 DLBRK 041263 DSETPR 035007 FINECH 064340' int
DENEX0 041023 DLBRX 041342 DSETPX 035256 FINIT 041566 ext
DENEX1 041027 DLCRAM 037207 DSETUP 032147 ext FINPUT 064341' int
DENEX2 041033 DLGPNT 042105 DSETWH 035157 FIOFF 061610 ext
DENEXT 040762 DLIST 041367 DSINIT 035425 FLDLIS 037550
DESTA0 041115 DLMAR0 040723 DSPAT 035274 FLTCH0 034110
DESTAK 041101 DLMAR1 040736 DSPEAR 004000 spd FLTCH1 034122
DESTAX 041132 DLMAR2 040752 DSSCLR 035601 FLTCHK 034105
DESTAY 041133 DLMARK 040704 DSSPN0 035570 FLTCHX 034131
DESTKM 041136 DLMARX 040760 DSSPNT 035557 FLTCLS 046325
DETAB 041007 DLOAD 041344 DSST0 035524 FLTHA0 034071
DEVREL 032134 ext DMARK 040555 DSST1 035540 FLTHAN 034067
DEVREQ 034212 ext DMARK0 040557 DSSTEP 035510 FLTNUM 046326
DFEXA0 041570 DRBR0 041176 DSSTX 035544 FLTPNT 064342'
DFEXAM 041563 DRBRK 041174 DSTAR0 035444 FMTTYP 064343'
DFEXAX 041607 DRCRAM 037735 ent DSTART 035440 FOARG 000000 ext
DFILLN 041750 DRDINC 042020 DSTOP 035465 FORPNT 033140 ext
DFILLP 041773 DRDINI 042014 DSTOP1 035500 FSELEC 037240 000004
DFILN0 041761 DRESET 035413 DSTPAT 035275 GENCCW 045064 ext
DFILP0 042004 DRMAR0 040606 DSWIT 042131 GET 262740 000000
DFLAG 064334' DRMARK 040604 DSWORD 035273 GETJI 104000 000507 int
DFLIS0 041542 DROUT1 035370 DTRAC0 035512 GETLOG 042111 ext
DFLIST 041534 DROUTN 035364 DTRACE 035505 GETPPN 043700
DFLISX 041561 DSADDR 035267 DTRANS 041611 GO 260740 000000
DFLOA0 041413 DSDATA 035270 DTRFLG 064335' GTAD 104000 000227 int
DFLOAD 041404 DSET 034710 DWCRAM 037703 ent HALT 254200 000000
DFLOAX 041426 DSETA1 034764 DWRINI 042037 HAVECI 051510 ext
DFVER0 041452 DSETA2 034765 DZALU 040145 HAVENI 051511 ext
DFVERF 041442 DSETAD 034751 DZALU0 040166 IADDR 046064 int
DFVERR 041504 DSETB1 035205 DZALU1 040206 IADDRF 046065
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page S-3
DFPTA1 MAC 10-Oct-83 21:43 SYMBOL TABLE SEQ 0429
ICSR 046066 int IPACLR 045647 ext MLOAD1 042622 PATPNT 035247 ext
IDEBUG 064344' int IPAER 000200 000000 spd MLOADN 042507 ent PCMD 064363'
IEBUF 046103 IPASRT 037061 ext MLOADX 042625 PCRL 037000 030242
IEXCAC 045726 IPASST 041123 ext MLOADY 042511 ent PCRL2 037000 030243
IEXCAL 045711 IPASTP 035470 ext MMPROC 000002 spd PCRLF 037040 030242
IEXEC 045442 ent IPRIN0 042150 MONTYP 030516 PFORCE 037040 000026
IEXERR 045452 IPRINI 042161 MPER 200000 000000 spd PFSET 030655 ext
IEXEX1 045453 IPRINT 042145 ent MPROC 200000 000000 spd PGMINT 265000 030011
IEXEXI 045744 IPRINX 042155 MPRUN 000010 spd PGMNAM 030600 int
IEXJRS 045700 ISOPN0 031363 MSG 100000 000000 spd PJRST 254000 000000
IEXSDE 045511 ISOPN1 031374 MULFLG 064354' PMODE 046330 int
IEXSEI 045571 ISOPN2 031376 MULINI 064355' PNT1 037040 000000
IEXSEX 045461 ISOPN3 031402 MVCOM 042524 PNT4 037200 000000
IEXSID 045541 ISOPN4 031417 MVFLAG 064356' PNT4F 037200 000001
IEXSIN 045622 ISOPN5 031423 MVNUM 064357' PNTAL 037740 000000
IEXSTR 045647 ISOPN6 031441 MVPNT 042657 PNTCIF 037040 000000
IEXWA0 046015 ISOPN7 031455 MVPNT1 042677 PNTCRM 043007
IEXWA1 046026 ISOPN8 031461 MVPNTW 042736 PNTDCF 037640 000001
IEXWA2 046034 ISOPNT 031343 MVPNTX 042726 PNTDEC 037640 000000
IEXWA5 046037 ISOPNX 031462 MVREP 064360' PNTDEV 042233 ext
IEXWA6 046040 ISTOP 042537 ext MWBADR 042640 PNTENB 030220
IEXWAI 045754 ITERAT 000005 spd MWBLAC 042646 PNTHST 037011
IEXWRG 046053 ITIME 046067 MWBLCO 042643 PNTHW 037540 000000
IFLAG 046070 int ITRCNT 030024 MWBRAC 042654 PNTMSF 037040 000000
IIADR 046074 LARG2 064345' MWBRCO 042651 PNTMSG 037000 000000
IIDEPA 046102 LASARG 035157 ext MWDQUE 037573 PNTOCC 001000 000000
IIDEPC 046101 LASDTC 042036 NCBUS 100000 000000 spd PNTOCF 037740 000003
IIEXAA 046100 LAST 010000 000000 spd NDCB 000200 000000 spd PNTOCS 037700 000003
IIEXAC 046077 LAXER 000400 000000 spd NDMP 000400 000000 spd PNTSIX 037000 000002
IIINCA 046076 LDCRAM 042576 ext NEBUS 400000 000000 spd PNTSXF 037040 000002
IIINCC 046075 LDCSR 046061 ext NERROR 046327 PNTWD 043103
IINTPC 046073 LDEBUF 037124 ext NETBAD 031601 PORSEL 046301 ent
IIOPF 046071 int LDEBUG 064346' int NETDES 031711 PORTCI 046276 ent
IIPN0 046127 LDRAR 046055 ext NETPNT 031471 PORTNI 046275 ent
IIPN1 046153 LGWC 000100 000000 spd NEXM 020000 000000 spd PRSFLG 035272
IIPN2 046167 LOCFR 040553 NIPORT 000040 spd PSP 037000 000040
IIPN3 046201 LOCTO 040554 NISEL 046277 ent PSPF 037040 000040
IIPN4 046224 LOGBUF 042110 ext NMBUS 040000 000000 spd PTEST 032335
IIPN5 046247 LOGPNT 045403 ext NMPROC 200000 000000 spd PTEST0 032352
IIPNT 046104 ent LOOPGM 040000 spd NOTWC0 040000 000000 spd PTESTP 032354
IIPNX 046272 LOOPTS 020000 spd NSSTEP 044044 int PTESTX 032365
IITYPE 046072 MAPNEW 030143 ODELA0 042440 PUT 261740 000000
INDLIS 031123 ent MBARG 064347' ODELA1 042447 PVPAGI 030511
INHFLT 200000 spd MBARGF 064350' ODELAY 042430 ent QADDR 045321 int
INITPD 032125 ext MBCN 000016 OPRSEL 000010 spd QADDRF 045322 int
INITPI 045622 ext MBUS 010000 000000 spd OVN 000020 000000 spd RALUB 064364'
INTAPR 042205 ext MCBUS 000001 spd P 000017 RALUE 064365'
INTCON 042202 ext MCNVER 000000 spd PARFLG 035271 int RANCNT 064366'
INTCSR 042210 ext MCPUS 064351' PASCNT 030047 RANDBS 030022
INTEND 055313 ext MDEBUG 064352' int PASPNT 030734 RANGEN 032612
INTNUM 055314 ext MLIST 042746 PAT 000014 RANNUM 064367'
INTPC 046024 ext MLIST0 042755 PAT1 064361' RDCRAM 061741 ext
INTTIM 042173 ext MLISTX 043000 PAT2 064362' RDCSR 045757 ext
INTTYP 046034 ext MLNUM 064353' PATCH 051324 RDEBUF 046062 ext
INTUSE 042176 ext MLOAD0 042543 PATCH0 051324 RDLAR 045765 ext
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page S-4
DFPTA1 MAC 10-Oct-83 21:43 SYMBOL TABLE SEQ 0430
REL 051500 ext SLDATA 064400' TEBUS 033146 TSTA35 000000 ext
RELIAB 000400 spd SNARKF 000000 ext TEND 033517 TSTA36 000000 ext
REQ1 051476 ext SNEXT 062610 ext TEXCAC 044624 TSTA37 000000 ext
REQ2 051477 ext SPCHK1 043503 TEXCAL 044607 TSTA4 000000 ext
RESCR0 043373 SPCHK2 043552 TEXCH0 044705 TSTA40 000000 ext
RESCRM 043362 SPEAR1 064401' TEXCHK 044652 TSTA41 000000 ext
RESQAV 000200 spd SPEAR2 064402' ent TEXCO0 044554 TSTA42 000000 ext
RFROM 037261 SPRE1X 043513 TEXCON 044553 TSTA5 000000 ext
RLOCB 064370' SPRE2A 043543 TEXEC 044523 ent TSTA6 000000 ext
RLOCE 064371' SPRE2B 043603 TEXERR 044533 TSTA7 000000 ext
RSTART 200000 spd SPRE2C 043614 TEXEX1 044534 TSTADD 046311 ent
RTN 263740 000000 SPRE2X 043630 TEXEXI 044642 TSTAL0 033115
RTO 037260 SPREP1 043471 TEXJRS 044576 TSTALT 033106
RUNTME 042467 ext SPREP2 043532 ent TEXSST 044542 TSTC1 000000 ext
S1 043511 SRTDDT 030007 TEXSTR 044547 TSTC10 000000 ext
S2 043623 SRTLIS 000026 spd TFAIL 044733 TSTC11 000000 ext
SAADDR 044047 int SSADDR 044045 int TLERR 043213 TSTC12 000000 ext
SAVADD 064372' SSADRL 036011 TLOAD 043161 ent TSTC13 000000 ext
SAVCMD 064373' SSADRN 036211 TLOADE 043203 TSTC14 000000 ext
SAVCR0 043347 SSCSRL 036411 TLOADX 043201 TSTC15 000000 ext
SAVCRL 043407 SSCSRN 036611 TMODE 051001 TSTC16 000000 ext
SAVCRM 043340 SSLOC 035610 TMP1 064403' TSTC17 000000 ext
SAVFLD 064374' SSNUM 035611 TMPROC 033376 TSTC2 000000 ext
SAVHST 037030 SSPN1 044073 TPAT 051002 int TSTC20 000000 ext
SAVMAX 064375' SSPNT 044050 ent TRACE 042224 ent TSTC21 000000 ext
SAVRAR 064376' SSPNX 044110 TRACE0 042250 TSTC22 000000 ext
SB 030607 START 030610 ent TRACET 400000 spd TSTC23 000000 ext
SCOOFF 042253 ext STARTA 030711 ent TRACEX 042300 TSTC24 000000 ext
SCOPER 027000 000000 STARTB 030733 TSEQ 033244 TSTC25 000000 ext
SCOSW 046247 ext STCLOK 030653 ext TSLOD1 064404' int TSTC26 000000 ext
SDATA 045667 ext STEST 051424 TSLOD2 064405' int TSTC27 000000 ext
SDEBUG 064377' int STEST0 051436 TSTA1 000000 ext TSTC3 000000 ext
SEADDR 044046 int STEST1 051451 TSTA10 000000 ext TSTC30 000000 ext
SELLAR 040000 spd STESTP 051466 TSTA11 000000 ext TSTC31 000000 ext
SELTST 042332 STRT1 030644 TSTA12 000000 ext TSTC32 000000 ext
SELTSX 042346 SWCHPT 000000 ext TSTA13 000000 ext TSTC33 000000 ext
SEN11L 043651 SWCOM 042137 ext TSTA14 000000 ext TSTC34 000000 ext
SENT10 043516 SWITT 043547 ext TSTA15 000000 ext TSTC35 000000 ext
SENT11 043636 SWPTAB 030525 TSTA16 000000 ext TSTC36 000000 ext
SEQ 040000 000000 spd SWRGT 030633 ext TSTA17 000000 ext TSTC37 000000 ext
SETEBU 037121 ext SWSTP 000116 spd TSTA2 000000 ext TSTC4 000000 ext
SETLAR 044167 ext SWSTT 000036 spd TSTA20 000000 ext TSTC40 000000 ext
SETVEC 045623 ext SYERR 104000 000527 int TSTA21 000000 ext TSTC41 000000 ext
SEXCAL 044011 TADDR 044724 int TSTA22 000000 ext TSTC42 000000 ext
SEXCHK 044026 TADDRF 044725 int TSTA23 000000 ext TSTC43 000000 ext
SEXEC 043712 ent TAKFIL 032564 int TSTA24 000000 ext TSTC44 000000 ext
SEXERR 043722 TALU 033334 TSTA25 000000 ext TSTC45 000000 ext
SEXEX1 043723 TCBUS 033437 TSTA26 000000 ext TSTC46 000000 ext
SEXJRS 044000 TCOMP 044732 TSTA27 000000 ext TSTC47 000000 ext
SEXSS0 043753 TCSRF 044726 int TSTA3 000000 ext TSTC5 000000 ext
SEXSSC 043733 TDENA 000100 000000 spd TSTA30 000000 ext TSTC50 000000 ext
SEXSSS 043731 TDISP1 033146 TSTA31 000000 ext TSTC51 000000 ext
SHWC 000040 000000 spd TDISP2 033520 TSTA32 000000 ext TSTC52 000000 ext
SINCYC 020000 spd TEBUFA 044731 int TSTA33 000000 ext TSTC53 000000 ext
SLAST 037042 ext TEBUFC 044730 int TSTA34 000000 ext TSTC54 000000 ext
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page S-5
DFPTA1 MAC 10-Oct-83 21:43 SYMBOL TABLE SEQ 0431
TSTC55 000000 ext TSTE32 000000 ext TSTHLT 032131 TSTS37 000000 ext
TSTC56 000000 ext TSTE33 000000 ext TSTINH 046317 int TSTS4 000000 ext
TSTC57 000000 ext TSTE34 000000 ext TSTL1 064407' TSTS40 000000 ext
TSTC6 000000 ext TSTE35 000000 ext TSTL2 064410' TSTS41 000000 ext
TSTC60 000000 ext TSTE36 000000 ext TSTL3 064411' TSTS42 000000 ext
TSTC7 000000 ext TSTE37 000000 ext TSTLI0 032021 TSTS43 000000 ext
TSTCLS 046304 ent TSTE4 000000 ext TSTLI1 032036 TSTS44 000000 ext
TSTCNT 046324 TSTE40 000000 ext TSTLIS 032014 TSTS45 000000 ext
TSTD0 032702 TSTE41 000000 ext TSTLOW 046321 TSTS46 000000 ext
TSTD1 032724 TSTE42 000000 ext TSTLSS 032076 TSTS47 000000 ext
TSTD10 033052 TSTE43 000000 ext TSTLST 032044 TSTS5 000000 ext
TSTD11 033067 TSTE44 000000 ext TSTMB0 031324 TSTS50 000000 ext
TSTD12 033076 TSTE45 000000 ext TSTMBU 031311 TSTS51 000000 ext
TSTD2 032736 TSTE46 000000 ext TSTMIC 046312 ent TSTS52 000000 ext
TSTD3 032737 TSTE47 000000 ext TSTMSK 046313 ent TSTS53 000000 ext
TSTD4 032746 TSTE5 000000 ext TSTMUL 046316 TSTS54 000000 ext
TSTD5 032751 TSTE50 000000 ext TSTNAM 046303 ent TSTS55 000000 ext
TSTD6 032774 TSTE51 000000 ext TSTNUM 046305 ent TSTS56 000000 ext
TSTD7 033006 TSTE52 000000 ext TSTOFF 046322 ent TSTS57 000000 ext
TSTD8 033030 TSTE53 000000 ext TSTPC 046307 ent TSTS6 000000 ext
TSTD9 033035 TSTE54 000000 ext TSTPN0 042420 TSTS60 000000 ext
TSTDDT 032120 TSTE55 000000 ext TSTPNT 042405 ent TSTS61 000000 ext
TSTDE0 034147 TSTE56 000000 ext TSTPNX 042425 TSTS62 000000 ext
TSTDEB 034203 TSTE57 000000 ext TSTRA0 032646 TSTS63 000000 ext
TSTDEC 034133 TSTE6 000000 ext TSTRAA 032655 TSTS64 000000 ext
TSTDED 034172 TSTE60 000000 ext TSTRAN 032632 TSTS65 000000 ext
TSTDEE 034166 TSTE61 000000 ext TSTREL 046323 TSTS66 000000 ext
TSTDER 034165 TSTE62 000000 ext TSTREP 046314 ent TSTS67 000000 ext
TSTDIA 032113 TSTE63 000000 ext TSTREQ 046315 TSTS7 000000 ext
TSTDIS 032663 TSTE64 000000 ext TSTS1 000000 ext TSTS70 000000 ext
TSTDL0 032470 TSTE65 000000 ext TSTS10 000000 ext TSTSAV 064412'
TSTDS0 032440 TSTE66 000000 ext TSTS11 000000 ext TSTSE0 032237
TSTDSA 032427 TSTE67 000000 ext TSTS12 000000 ext TSTSEG 032274
TSTDSL 032461 TSTE7 000000 ext TSTS13 000000 ext TSTSEL 032233
TSTE1 000000 ext TSTE70 000000 ext TSTS14 000000 ext TSTSEX 032321
TSTE10 000000 ext TSTE71 000000 ext TSTS15 000000 ext TSTSG0 032305
TSTE11 000000 ext TSTE72 000000 ext TSTS16 000000 ext TSTSP0 032610
TSTE12 000000 ext TSTE73 000000 ext TSTS17 000000 ext TSTSPC 032566
TSTE13 000000 ext TSTE74 000000 ext TSTS2 000000 ext TSTSSW 032521
TSTE14 000000 ext TSTE75 000000 ext TSTS20 000000 ext TSTSUB 046306 ent
TSTE15 000000 ext TSTE76 000000 ext TSTS21 000000 ext TSTSWI 032507
TSTE16 000000 ext TSTEBF 200000 spd TSTS22 000000 ext TSTSWP 032514
TSTE17 000000 ext TSTEN0 032436 TSTS23 000000 ext TSTTA0 032547
TSTE2 000000 ext TSTENA 032433 TSTS24 000000 ext TSTTAK 032532
TSTE20 000000 ext TSTEOP 033126 TSTS25 000000 ext TSTTAN 032530
TSTE21 000000 ext TSTEPP 064406' TSTS26 000000 ext TSTU1 000000 ext
TSTE22 000000 ext TSTEXE 031334 TSTS27 000000 ext TSTU10 000000 ext
TSTE23 000000 ext TSTEXG 031336 TSTS3 000000 ext TSTU11 000000 ext
TSTE24 000000 ext TSTFLG 046310 ent TSTS30 000000 ext TSTU12 000000 ext
TSTE25 000000 ext TSTGET 042304 TSTS31 000000 ext TSTU13 000000 ext
TSTE26 000000 ext TSTHIG 046320 TSTS32 000000 ext TSTU14 000000 ext
TSTE27 000000 ext TSTHL0 032403 TSTS33 000000 ext TSTU15 000000 ext
TSTE3 000000 ext TSTHLC 032411 TSTS34 000000 ext TSTU16 000000 ext
TSTE30 000000 ext TSTHLL 032420 TSTS35 000000 ext TSTU17 000000 ext
TSTE31 000000 ext TSTHLP 032371 TSTS36 000000 ext TSTU2 000000 ext
DFPTA (Port Basic Device Diagnostic) MACRO %53A(1152) 09:26 16-Oct-84 Page S-6
DFPTA1 MAC 10-Oct-83 21:43 SYMBOL TABLE SEQ 0432
TSTU20 000000 ext $B 000044 .MOR 000007 spd
TSTU21 000000 ext $CHR 000044 .MRDLM 000037 spd
TSTU22 000000 ext $GARG 000001 .MS0A 000007 spd
TSTU23 000000 ext $ONETM 030056 .MSD0 000007 spd
TSTU24 000000 ext $TTCHR 030231 .MSELE 000007 spd
TSTU25 000000 ext $TWCNT 030225 .OARG 041774 ext
TSTU26 000000 ext %ADDR 007754 spd .PIOFF 045762 ext
TSTU27 000000 ext %ML 775377 530000 spd .PION 046042 ext
TSTU3 000000 ext %MR 001000 000040 spd .PNTOC 000000 ext
TSTU30 000000 ext .CGOT 042135 ext .RAND 040000 000000 spd
TSTU31 000000 ext .CLOSE 032135 ext .RCCER 100000 spd
TSTU32 000000 ext .COMM 037437 ext .RCENA 000400 000000 spd
TSTU33 000000 ext .CONI 000000 ext .RCJP 000060 spd
TSTU34 000000 ext .CONO 000000 ext .RCONT 000340 spd
TSTU35 000000 ext .DARG 042051 ext .RCRTN 000240 spd
TSTU36 000000 ext .DATAI 000000 ext .RD 001000 000000 spd
TSTU37 000000 ext .DATAO 040426 ext .RESET 030644 ext
TSTU4 000000 ext .DBCMD 034303 .RJ 000000 spd
TSTU40 000000 ext .DBDIS 034453 .RJMAP 000040 spd
TSTU41 000000 ext .HLCMD 034642 .RLDLM 230000 spd
TSTU5 000000 ext .INPNT 034214 ext .RMGC 000000 spd
TSTU6 000000 ext .INWD1 031025 ext .ROENA 000000 spd
TSTU7 000000 ext .ISWT 055321 ext .ROR 030000 000000 spd
TTALTM 037340 000003 .JBSA 000120 spd .RRDLM 220000 spd
TTIDEC 037200 000003 .LADDR 000100 000000 spd .RS0A 400000 000000 spd
TTIME 044727 .LAND 000000 spd .RSD0 700000 000000 spd
TTNBRF 030510 .LCCER 000000 spd .RSELE 005000 spd
TTPN0 044752 .LCENA 000000 spd .RSWIT 030634 ext
TTPN1 044757 .LCJP 000000 spd .SARG 041370 ext
TTPN2 044764 .LCONT 000000 spd .STCMD 034722
TTPNT 044734 ent .LCRTN 000000 spd .STDIS 034736
TTPNX 045003 .LD 000000 spd .SWCHP 055326 ext
TTSIXB 037400 000003 .LJ 010000 spd
TTYYES 032311 ext .LJMAP 000000 spd
TUSER 001000 000000 spd .LLDLM 000000 spd
TWORD 051000 int .LMGC 000001 spd
TXALL 060000 000000 spd .LOENA 002000 spd
TXTINH 000200 spd .LOR 000000 spd
UDEBUG 064413' int .LRDLM 000000 spd
UNAME 035150 ext .LS0A 000000 spd
USER 030037 .LSD0 000000 spd
USRION 032150 ext .LSELE 000000 spd
UUT 046302 ent .LSWIT 000000 ext
WRDERR 042126 ext .MAND 000007 spd
XWORDL 064414' .MCCER 000037 spd
XWORDR 064415' .MCENA 000001 spd
XXW 064416' .MCJP 000017 spd
XXX 064417' .MCONT 000017 spd
ZAL 200000 000000 spd .MCRTN 000017 spd
ZCB 400000 000000 spd .MD 000007 spd
ZEB 000000 spd .MJ 007777 spd
ZMP 300000 000000 spd .MJMAP 000017 spd
ZSE 100000 000000 spd .MLDLM 000037 spd
$$TOGG 030521 .MMGC 001777 spd
$ARG2 000001 .MOENA 000001 spd
AADDR 110#
AAPNT 44 8352# SEQ 0433
AAPNT0 8379 8385#
AAPNT1 8386 8397#
AAPNTX 8381 8388 8393 8402#
ABORT 267 1830
ADRPE 9499
AEBUF 49 8546 8576 8586 8642# 8683 8714
AEXEC 44 8244#
AEXEC0 8287 8300#
AEXECX 8266 8282 8317#
ALACT 45 8255 8311 8338# 8373
ALCOR 45 8251 8312 8337# 8363 8369 8390
ALCSR 45 8254 8283 8334# 8360
ALEBF 45 8303 8335#
ALERR 45 8250 8336#
ALFLC 46 8258 8285 8323 8343# 8397
ALFLE 46 8257 8313 8319 8341# 8385
ALFLS 46 8256 8265 8281 8321 8339# 8378
ALFLT 46 8259 8288 8325 8345#
ALL 746
ALSRT 45 8252 8333# 8355
ALTF 37 260 348# 348 361 365 1070 1912 1942 2906 2910 4496 4553 4642
4958 4986 5080 5134 5377 5431 5904 6380 6424 6483 6511 7380 7465
ALTIM 45 8249 8275 8332#
ALTMGO 364 1634 1682 1720 1913 1916 2909 4556 4646
ALU 749
ALUFR 5053 5093 5167 5232 5271 5341#
ALUTO 5055 5095 5169 5234 5273 5342#
ANEXT 4547# 4616 4743 4936 4962 4989 5131 5198 5216 5294 5435 5487 5488 5509
5593 5927 5934 5941 5976 5983 5991
ARGFLG 122# 440 443 695 703 962 1480 1644 1652 1725 1733 1765 2940 2943
4568 5214 5507 5642 5685 6061 6108
ARGUM 122# 701 971 1031 1046 1233 1274 1395 1397 1491 1590 1596 1650 1731
3308 3310 3478 3520 3546 3612 3637 3652 3680 3686 3731 3775 3784 3877
3917 3947 4043 4125 4126 4131 4199 4204 4345 4359 4398 4478 4488 4575
4583 4591 4599 4607 5064 5072 5161 5176 5217 5243 5251 5361 5369 5459
5473 5510 5536 5544 5653 5696 5741 5751 5814 5824 5885 5886 5891 5896
5905 5986 5994 6072 6119 6160 6170 6228 6238 6308 6343 6530 6643 6670
6727 6732
BBPN0 8669 8679#
BBPN1 8654 8689#
BBPN2 8700 8710#
BBPNT 48 8650#
BBPNX 8685 8719#
BEGIN 10393
BEXCAL 8486 8611#
BEXCHK 8487 8626#
BEXEC 48 8470#
BEXERR 8489 8490 8491 8492 8496#
BEXEX1 8478 8483 8497#
BEXJRS 8488 8597#
BEXSS0 8534# 8557
BEXSSC 8485 8507#
BEXSSS 8484 8505# SEQ 0434
BFLAG 8582 8585 8644# 8665 8696
BONETM 171# 171 173 413
BUFCOM 123# 6792 9407 9523
BUFF 21 6701 6734 6736 7153 9182 9183 9184 9193 10299#
BUFGEN 123# 6698 9190
CADDR 26 4539# 4564 4628 4632 4930 4947 4949 4977 4981 5002 5014 5030 5037
5665 5708 5777 5852 6084 6131 6196 6266 6391 6446 6477 6505 6647 6671
6674 7227 7266 7707 7729
CALL 7595
CALMAR 7517# 7517 7519 7543
CALPAR 25 5010 6092 6273 6481 6509 7238 7374 7515#
CBASE 113# 200
CBUF 66 6699 9191 10310#
CBUFSZ 6699 9191 10310
CBUS 751
CCMIC 6554 6555 6622#
CCPN0 9457 9470#
CCPN2 9472 9488#
CCPN3 9490 9495#
CCPN4 9493 9518#
CCPNT 54 9442#
CCPNX 9519 9527#
CCSR 55 9338 9384 9424# 9465
CCTAB1 6580 6589 6601#
CCTAB3 6567 6569 6579 6588 6618#
CCWPNT 113# 6760
CDERR 55 9409 9429# 9518
CEBUAD 9333# 9333 9347
CEBUF 49 8513 8587 8643# 8680 8711
CEBUFA 55 9345 9351 9387 9427# 9471 9483
CEBUFC 55 9346 9350 9352 9426# 9470 9477
CEXCAC 9149 9303#
CEXCAL 9148 9287#
CEXCOM 9151 9403#
CEXEC 54 9131#
CEXERR 9143 9154 9155 9159#
CEXEX1 9138 9160#
CEXEXI 9153 9320#
CEXJRS 9152 9273#
CEXSRD 9144 9168#
CEXSRW 9146 9232#
CEXSTR 9147 9245#
CEXSWR 9145 9220#
CEXWA2 9348 9351#
CEXWA3 9337 9378#
CEXWA4 9367 9382#
CEXWAI 9150 9331#
CHDATA 113# 9368
CHINIT 113# 6700 9192
CHKARG 122# 637 1078 1089 1104 1520 1550 1556 1567 2859 3146 3163 3240 3258
3263 3814 3858 3887 3899 3929 3987 3998 4008 4074 4223 4297 4320 4343
4369 4408 5974 6002 6367 6403 6467 6496 6540 6688 6715 6758 6769 6783
6803 6817 6875 SEQ 0435
CHKCSR 109#
CHKTS0 7051 7061#
CHKTS1 7065 7074#
CHKTST 7021 7047#
CHKTSX 7057 7069 7073 7075#
CIPORT 243 246 248 1172 1178
CISEL 66 234 244 1183 1211 1248 1250 1260 1265 1295 1300 1318 1325 1339
1343 1364 1372 1809 1819 10260#
CLEN 55 9170 9187 9194 9210 9222 9234 9405 9431# 9521
CLOGBF 9372 9373 9436# 9491
CLRBUF 119# 372 2904 4650 4703 4723
CLREBU 109# 7213
CMD0 2865# 2955
CMD1 2874# 2908 2934 2952 2954 2961
CMD2 2882#
CMD3 2905# 2920 2926 2938
CMD3A 2923# 2937
CMD4 2921 2935#
CMDQUE 2929 2959#
CMDQUU 2960 2963#
CONFIG 229 633 1128# 3157
CONPNT 639 1187 1196# 3165
CONSW 10374
CONVSX 120# 2631 4713
CPAT 55 9173 9185 9207 9225 9237 9240 9406 9430# 9522
CRAMFR 4470 4479 4493 4504 4515 4537# 4563 4615 4627 4631 4647 4742 4929 4935
4946 4961 4976 4988 5929 5978
CRAMPE 8284
CRAMTO 4468 4480 4489 4499 4517 4538# 4617 4744 4937 4963 4990 5928 5977
CSERR 9365 9371 9390 9428# 9495
CSETCC 9176# 9228 9241
CSHFLG 160
CSHMEM 161
CSREN0 7632# 7646
CSREN1 7637 7644#
CSREN2 7634 7645#
CSRENB 7644 7655#
CSRENG 30 7612 7625#
CSRENS 7627# 7627 7671 7691
CSRENX 7632 7647#
CSRPNT 30 3862 4060 4090 4310 6531 7602#
CSRPNX 7609 7613#
CSTATF 55 9366 9434#
CSTWRD 66 9372 10312#
CTIME 9425#
CTRAN 9175 9186 9195 9202 9227 9239 9404 9432# 9520
CURTIM 119# 1691
CWORDL 26 4541# 4561 4610 4625 4774 4776 4778 4780 4782 4784 4813 4815 4817
4819 4821 4823 4927 4953 4983 5006 5035 5666 5669 5709 5712 5778 5781
5853 6085 6090 6093 6132 6197 6267 6271 6274 6393 6412 6417 6453 6474
6502 6645 6651 6672 6675 7244 7259 7270 7709 7731
CWORDR 26 4542# 4562 4613 4626 4786 4788 4790 4792 4794 4796 4798 4800 4802
4804 4806 4808 4825 4827 4829 4831 4833 4835 4837 4839 4841 4843 4845 SEQ 0436
4847 4928 4954 4984 5007 5042 5667 5670 5672 5710 5713 5715 5779 5782
5785 5854 5856 6086 6091 6094 6133 6198 6268 6272 6414 6420 6454 6475
6503 6646 6652 6673 6676 7258 7260 7272
D1LIT 10392#
DACRAM 3197 4444#
DBCRAM 3196 4436#
DBPNT 3252 6724#
DBPNT0 6735# 6748
DBPNT1 6740 6745#
DBREA0 6068# 6100
DBREAK 3221 6061#
DC1ST 4526# 4526 4557 4559 4637 4640
DCBR0 6159 6169 6175#
DCBR1 6196# 6206
DCBRK 3223 6151#
DCCOD1 6551# 6570
DCCOD2 6553 6574#
DCCOD3 6576# 6581
DCCOD4 6578 6583#
DCCOD5 6585# 6590
DCCOD6 6587 6591#
DCCODE 3234 6539#
DCLEAR 3176 3997#
DCMAR0 5740 5750 5756#
DCMAR1 5777# 5792
DCMAR2 5784 5790#
DCMARK 3218 5732#
DCODPB 4734 4813#
DCOLDB 4682 4774#
DCOM0 4477 4487 4493# 5930 5979
DCOM1 4526#
DCOM3A 4673 4678 4707#
DCOMA0 4656# 4693
DCOMA1 4659# 4729 4737
DCOMA2 4681 4686# 4706 4726
DCOMA3 4674 4687# 4690 4709
DCOMA4 4715 4733#
DCOMA5 4710 4735#
DCOMAA 4669 4675# 4701
DCOMAG 4629 4637#
DCOMAL 4531 4631# 4749
DCOMAX 4661 4697 4741#
DCOMDB 4530 4625# 4748
DCOMDE 4529 4553# 4618
DCOMEX 4528 4946# 4964
DCOMEZ 4960 4965#
DCOMGO 4422 4430 4438 4446 4454 4462 4467#
DCOML0 4976# 4991
DCOMLI 4533 4974#
DCOMLX 4987 4992#
DCOMPA 3255 6782#
DCOMSG 4686 4753#
DCOMZE 4532 4927# 4938 SEQ 0437
DCONI 3210 3898#
DCONI1 3901# 3904
DCONO 3211 3911#
DCONO1 3917# 3920
DCONT 3180 4296#
DCWPNT 3253 6757#
DDALU 3203 5155#
DDALU0 5161# 5218 5987
DDALUM 5189 5193 5194 5321#
DDALUX 5215 5222#
DDATI 3212 3928#
DDATI1 3931# 3933
DDATO 3213 3941#
DDATO1 3947# 3950
DDCRAM 3195 4428#
DDCSR 3172 3871#
DDEBU1 4346 4354#
DDEBUF 3188 4348#
DDELA0 7149# 7160
DDELAX 7152 7161#
DDELAY 7143# 9335
DDLOC0 5459# 5511 5995
DDLOCM 5486 5489 5613#
DDLOCS 3207 5453#
DDLOCX 5508 5515#
DDNEX0 5958 5959 5960 5961 5962 5963 5973#
DDNEX1 5964 5965 5966 5983#
DDNEX2 5967 5968 5969 5991#
DDNEXT 3156 5950#
DDRAR 3192 4389#
DDTAB 5951 5953 5958#
DEALU 3202 5053#
DEALU0 5063 5071 5077# 5937
DEALU1 5106# 5139
DEALUM 5109 5118 5119 5315#
DEALUX 5136 5143#
DEBTIM 119# 7116 7120 7147 7151
DEBUG1 215 384 2888
DEBUG2 217 386 2890
DEBUG3 388 2892
DEBUG4 219 390 2894
DEBUG5 221 392 2896
DECRAM 3198 4420#
DECSR 3171 3857#
DECVER 9 7795 7919
DECYN 122# 3565 3589
DEEBUF 3187 4319#
DELAR 3191 4368#
DELOC0 5360 5368 5374# 5944
DELOC1 5404# 5437
DELOCM 5415 5416 5605#
DELOCS 3206 5350#
DELOCX 5433 5441# SEQ 0438
DENE0 5895# 5908
DENEX0 5912 5913 5914 5915 5916 5917 5927#
DENEX1 5918 5919 5920 5934#
DENEX2 5921 5922 5923 5941#
DENEXT 3155 5885#
DESTA0 6016# 6036
DESTAK 3235 6001#
DESTAX 6018 6040#
DESTAY 6025 6028 6041#
DESTKM 6006 6047#
DETAB 5900 5902 5912#
DEVREL 114# 1080 1106
DEVREQ 114# 486 1158 1165 1843 2868
DFEXA0 6500# 6514
DFEXAM 3231 6495#
DFEXAX 6501 6512 6516#
DFILLN 3236 6636#
DFILLP 3237 6663#
DFILN0 6647# 6654
DFILP0 6674# 6679
DFLAG 4421# 4421 4429 4437 4445 4453 4461 4527 4679 4746 5097 5179 5275 5394
5476 5568 5899 5901 5950 5952
DFLIS0 6472# 6486
DFLIST 3230 6466#
DFLISX 6473 6484 6488#
DFLOA0 6373# 6383
DFLOAD 3228 6366#
DFLOAX 6374 6381 6385#
DFVER0 6410# 6427
DFVERF 3229 6402#
DFVERR 6422 6440#
DFVERX 6411 6425 6429#
DFVERY 6444 6457#
DHELP 3144 3300#
DHELP0 3318# 3322
DHELP1 3318 3345#
DIINIT 3248 6874#
DIPRIN 3238 6816#
DISGO 499 620# 650 662
DISLIS 448 468 551#
DISP0 356# 359 423 428 438 475 485 489 495 506 513
DISP0A 425# 437
DISP0B 424 435#
DISP1 447#
DISP2 407 451 499#
DISPAT 259 348#
DISPD 457 479#
DISPE 434 482 493#
DISPR 458 465#
DISPX 461 504#
DISQUE 433 511#
DISQUU 512 515#
DLBR0 6227 6237 6243# SEQ 0439
DLBR1 6266# 6294
DLBR2 6275 6289#
DLBRK 3224 6219#
DLBRX 6291 6295#
DLCRAM 3199 4460#
DLGPNT 3254 6768#
DLIST 3227 6337#
DLMAR0 5813 5823 5829#
DLMAR1 5852# 5877
DLMAR2 5858 5872#
DLMARK 3219 5805#
DLMARX 5874 5878#
DLOAD 3226 6302#
DMARK 3216 5642#
DMARK0 5649# 5677
DRBR0 6115# 6139
DRBRK 3222 6108#
DRCRAM 25 4633 4951 4978 5028# 5668 5711 5780 5855 6087 6134 6199 6269 6392
6416 7708
DRDINC 6692# 6718
DRDINI 3250 6687#
DRESET 3175 3986#
DRMAR0 5692# 5720
DRMARK 3217 5685#
DROUT1 3961# 3978
DROUTN 3214 3957#
DSADDR 3521 3527 3532 3842# 4010 4038
DSDATA 3547 3552 3843# 4012 4046
DSET 3152 3469#
DSETA1 3519 3530# 3711 4014
DSETA2 3531#
DSETAD 3500 3516#
DSETB1 3730 3740#
DSETC1 3545 3550#
DSETC2 3551# 3712 4015
DSETCS 3501 3542#
DSETD1 3636 3659#
DSETD2 3660# 3716
DSETD3 3664 3668#
DSETDA 3505 3633#
DSETDX 3645 3654#
DSETE1 3588 3596#
DSETE2 3597# 3714
DSETEB 3503 3585#
DSETF0 3685 3688#
DSETF1 3679 3692#
DSETF2 3693# 3717
DSETFA 3510 3724#
DSETFN 3506 3676#
DSETHE 3509 3813#
DSETHL 3817 3820#
DSETL1 3611 3621#
DSETL2 3622# 3715 SEQ 0440
DSETLN 3504 3608#
DSETP1 3564 3572#
DSETP2 3573# 3713
DSETPL 3507 3768#
DSETPP 3774 3783 3792# 3805
DSETPR 3502 3561#
DSETPX 3803 3806#
DSETUP 114# 1130
DSETWH 3508 3706#
DSINIT 3185 4007#
DSPAT 3643 3661 3771 3850# 6693
DSPEAR 7761 7823
DSSCLR 3184 4016 4222#
DSSPN0 4207# 4214
DSSPNT 3183 4198#
DSST0 4138# 4178
DSST1 4168#
DSSTEP 3181 4122#
DSSTX 4152 4157 4177 4182#
DSTAR0 4042#
DSTART 3178 4035#
DSTOP 3179 4073#
DSTOP1 4083 4088#
DSTPAT 3653 3666 3851# 6694
DSWIT 3270 3271 3272 3273 3274 3275 3276 3277 3278 3279 3280 3281 3282 3283
3284 3285 3286 3287 3288 3289 3290 3291 3292 3293 3294 6802#
DSWORD 3618 3623 3848# 6696 6724 6791
DTRAC0 4120 4125#
DTRACE 3182 4118#
DTRANS 3233 6524#
DTRFLG 4119 4122# 4122 4133 4151 4163 4171
DWCRAM 25 4614 4741 4931 5000# 5675 5718 5788 6098 6137 6202 6377 6653 6677
7732
DWRINI 3251 6714#
DZALU 3204 5232#
DZALU0 5242 5250 5256#
DZALU1 5284# 5305
DZALUM 5285 5289 5290 5335#
DZALUX 5302 5309#
DZCRAM 3200 4452#
DZCSR 3173 3886#
DZEBUF 3189 4342#
DZLOC0 5535 5543 5549#
DZLOC1 5577# 5595
DZLOCM 5578 5579 5627#
DZLOCS 3208 5525#
DZLOCX 5591 5599#
DZRAR 3193 4407#
EADDR 110#
EBUS 747
ENATST 1473# 1473 1477# 1477 1508 1510
ENDFIX 10
ERESET 109# 3989 SEQ 0441
ERFLG 371 758 1875 2577 2582 2590 2876 6917 7586 7815 7832 7900 8914 8928
8935 8937 8951 8971 9323 9353 9370 9378 9393 9411 9412 9929 9970 9975
9977 10004 10010 10015 10025 10343 10352
ERRCNT 1848# 1848 1880 1888
ERRPC 6918
EXE 10373#
EXEN 10369#
FGETW 120# 6373 6410 6472 6500
FINCMD 120# 422 2919 4671 4676
FINECH 31 166# 166 415 416 1583 1585 2912 2913
FINIT 120# 6370 6407 6469 6498
FINPUT 31 165# 165 414 421 1619 1767 2911 2918 4670 4675
FIOFF 120# 362 474 494 974 980 1037 1052 1239 1280 1401 1482 1494 1500
1601 1941 2907 2933 2951 3314 3476 3482 3525 3616 3641 3650 3735 3789
3796 3875 3915 3945 4050 4053 4078 4081 4144 4147 4301 4304 4325 4352
4357 4393 4497 4502 4506 4554 4573 4581 4589 4597 4605 4643 4705 4725
5081 5086 5090 5159 5164 5174 5259 5264 5268 5378 5383 5387 5457 5463
5471 5552 5557 5561 5644 5656 5687 5699 5759 5764 5768 5832 5837 5841
6024 6027 6063 6075 6110 6122 6178 6183 6187 6246 6251 6255 6306 6311
6317 6322 6341 6346 6352 6357 6528 6640 6667 6789
FLDLIS 4720 4852#
FLTCH0 2575# 2581
FLTCH1 2574 2588# 2594
FLTCHK 1874 2569#
FLTCHX 2582 2587 2598#
FLTCLS 10287#
FLTHA0 2539# 2561
FLTHAN 1901 1906 2537#
FLTNUM 2576 2589 3737 3741 3743 10288#
FLTPNT 777# 777 779 1849
FMTTYP 170# 170
FOARG 120#
FORPNT 120# 187 289 1962
GENCCW 113# 6704 9199
GETLOG 113# 6772
GETPPN 7766 7887 7932#
HAVECI 115# 10380
HAVENI 115# 10381
IADDR 58 9825 9854 9856 9869 10047# 10076 10085
IADDRF 9951 10021 10048# 10079 10088
ICSR 58 9942 10018 10049# 10091
IDEBUG 18 147# 147 213 222 382 393 844 851 1873 1891 1904 1907 2543
2886 2897
IEBUF 9960 9965 10062# 10094
IEXCAC 9663 9909#
IEXCAL 9662 9893#
IEXEC 57 9644#
IEXERR 9656 9668 9669 9673#
IEXEX1 9651 9674#
IEXEXI 9667 9926#
IEXJRS 9665 9879#
IEXSDE 9658 9717#
IEXSEI 9661 9787# SEQ 0442
IEXSEX 9657 9682#
IEXSID 9659 9752#
IEXSIN 9660 9823#
IEXSTR 9666 9849#
IEXWA0 9957 9972 9985#
IEXWA1 9988 10000#
IEXWA2 10002 10009#
IEXWA5 9941 10015#
IEXWA6 10005 10011 10016#
IEXWAI 9664 9937#
IEXWRG 9959 9964 10035#
IFLAG 58 9698 9701 9733 9736 9768 9771 9804 9807 9830 9839 9955 10000 10051#
10138 10144 10154
IIADR 9684 9693 9704 9719 9728 9739 9754 9763 9774 9789 9799 9810 9971 9973
10055# 10177 10199 10221
IIDEPA 9689 9727 9759 9794 9836 10061# 10218 10233
IIDEPC 9688 9725 9742 9758 9793 9835 9976 9981 10060# 10217 10227
IIEXAA 9692 9724 9757 9798 9834 9961 9966 9968 10059# 10196 10211
IIEXAC 9690 9707 9723 9756 9792 9813 9833 9969 10058# 10195 10205
IIINCA 9687 9722 9762 9797 9832 9979 10057# 10174 10189
IIINCC 9686 9721 9760 9777 9795 9831 9974 10056# 10173 10183
IINTPC 9987 9995 10054# 10167
IIOPF 58 10052# 10100 10105 10112 10116 10127 10130 10133
IIPN0 10083 10099#
IIPN1 10138#
IIPN2 10142 10153 10159#
IIPN3 10103 10161 10172#
IIPN4 10175 10194#
IIPN5 10197 10216#
IIPNT 57 10068#
IIPNX 10219 10238#
IITYPE 9986 9993 10053# 10159
INDLIS 35 539# 1538 1894 2622 2669 6904 7086
INHFLT 1744
INITPD 111# 1093
INITPI 111# 257 400 6877 9823
INTAPR 112# 6859
INTCON 112# 6856
INTCSR 112# 6862
INTEND 112# 3245 9851
INTNUM 112# 3243 3244 3246 6821 6832 6835 6921 9850 9985 9989 10003
INTPC 112# 6846 9994
INTTIM 112# 6849
INTTYP 112# 6837 6865 9992 10009
INTUSE 112# 6852
IPACLR 109# 3961 4000 7573 7704 7724 8263 8294 8840 9245 9849
IPAER 9507
IPASRT 110# 4048 4299
IPASST 110# 4142 6022
IPASTP 110# 4076
IPRIN0 6821# 6825
IPRINI 6823 6832#
IPRINT 62 6819# SEQ 0443
IPRINX 6822 6826#
ISOPN0 786# 790 794
ISOPN1 788 795#
ISOPN2 800# 806
ISOPN3 804# 810 816 820
ISOPN4 812 817#
ISOPN5 802 824#
ISOPN6 838# 853
ISOPN7 845 850#
ISOPN8 840 857#
ISOPNT 763 774# 1813 1826 1944
ISOPNX 795 858#
ISTOP 109# 4042 4130 4322 4354 4371 4395 4410 4522 5661 5704 5773 5846 6012
6080 6127 6192 6260 6324 6372 6409 6642 6669 7212
ITERAT 223
ITIME 10050#
ITRCNT 224
LARG2 5177 5207 5474# 5474 5500
LASARG 122# 3654 3706
LASDTC 6692 6707# 6785
LAST 7595
LAXER 9505
LDCRAM 108# 5012 5019 7241 7254
LDCSR 108# 3878 3890 3918 4373 4397 4412 5126 5206 5210 5299 5423 5425 5499
5503 5586 5588 6562 6564 8074 8271 8290 8301 8526 8541 8553 8851 8942
8953 9180 9260 9343 9358 9866 9948 10039 10041
LDEBUF 108# 3948 4360
LDEBUG 17 146# 146 212 220 381 391 2885 2895 7562
LDRAR 108# 4399 4413 5005 5017 5033 5040 5124 5204 5297 5421 5497 5584 6560
7231 7251 8069 8269 8536 8844 9178 9252 9858 10037
LGWC 9509
LOCFR 5350 5390 5465 5485 5525 5564 5633#
LOCTO 5352 5392 5466 5527 5566 5634#
LOGBUF 113# 6771
LOGPNT 113# 6773 9492
LOOPGM 273
LOOPTS 1637
MAPNEW 148
MBARG 702# 702 1759
MBARGF 694# 694 704 1757
MBCN 485 1139 1148 1157 1164 1244 1285 1306 1329 1332 1355 1357 1359 1363
1366 1375 1377 1379 1839 1841 1842 1868 2867 3159 3168 6935 6939 7564
7568 7577 7579 10382
MBUS 729 752 1756
MCBUS 7064 7070
MCNVER 9 7795 7919
MCPUS 156# 156
MDEBUG 15 144# 144 211 218 379 387 2883 2891 7590
MLIST 6359 7353#
MLIST0 7357# 7381
MLISTX 7359 7382#
MLNUM 6328 7287# 7287
MLOAD0 7219# 7279 SEQ 0444
MLOAD1 7256 7262 7265 7277#
MLOADN 25 5120 5195 5291 5417 5490 5580 6007 6556 7186# 7574
MLOADX 7221 7283#
MLOADY 25 6325 7188#
MMPROC 7064 7066
MONTYP 196
MPER 9497
MPROC 750
MPRUN 5125 5205 5298 5422 5498 5585 6561 8053 8056 8270 8286 8293 8520 8523
8525 8551 8846 8849 9179 9254 9257 9860 9863 10038
MSG 7594
MULFLG 395# 395 2899 4959 4965 4992 5135 5143 5432 5441 5895 5898 7466
MULINI 396# 396 2900 4974 5907
MVCOM 7191 7195 7200#
MVFLAG 7189# 7189 7194 7240 7242 7253 7255
MVNUM 6406 6433 6442 7200# 7200 7263 7283 7302 7306
MVPNT 7286 7302# 7595
MVPNT1 7313# 7334
MVPNTW 7319 7323 7329 7340#
MVPNTX 7331 7336#
MVREP 7186# 7186 7188 7285
MWBADR 7206 7207 7267 7292# 7313
MWBLAC 7271 7294# 7321 7326
MWBLCO 7268 7293# 7317 7325
MWBRAC 7208 7273 7296# 7322 7328
MWBRCO 7269 7295# 7318 7327
MWDQUE 4699 4874#
NCBUS 871# 925 926 927 928 929 930 931 932 933 934 935 936 937
938 939 940 941 942 943 944 945 946 947 948
NDCB 7067 7071
NDMP 7067
NEBUS 869# 876 877 878 879 880 881 882 883 884 885 886 887 888
889 890 891 892 893 894 895 896 897 898 899
NERROR 10289#
NETBAD 789 867# 1845 1846 1847 2540
NETDES 827 842 876# 2545
NETPNT 782 783 784 791 792 807 808 813 814 817 818 819 826 839
847 866#
NEXM 9503
NIPORT 238 241 248 1172 1174
NISEL 66 233 239 1182 1201 1245 1247 1252 1257 1287 1292 1307 1314 1330
1336 1342 1360 1371 1807 1817 10259#
NMBUS 872#
NMPROC 870# 903 904 905 906 907 908 909 910 911 912 913 914 915
916 917 918 919 920 921
NOTWC0 9501
NSSTEP 42 8045 8063 8088 8161# 8182 8199 8510 8530 8564 8662 8693
ODELA0 7118# 7121
ODELA1 7108 7128#
ODELAY 30 7107# 8276 8926 9939
OPRSEL 231 263 351 357 360 406 505 1750 1787 1946
OVN 9513
P 1667 1670 1671 1672 2659 2660 2861 3160 3169 6948 7023 7024 7074 7197 SEQ 0445
7284 7576 7582 7591 8105 8106 8107 8123 8139 8154 8327 8588 8589 8590
8606 8621 8635 8859 8873 8889 8904 8915 8972 8973 8974 9213 9266 9282
9298 9313 9324 9394 9395 9396 9413 9414 9415 9710 9745 9780 9816 9842
9872 9888 9904 9919 9930 10026 10027 10028
PARFLG 26 3567 3569 3574 3576 3845# 5009 5673 5674 5676 5716 5717 5719 5786
5787 5789 6096 6097 6099 6135 6136 6138 6200 6201 6203 6375 6376 6378
6480 6508 7725 7726 7735
PASCNT 202 279 285 408
PASPNT 264 279#
PAT 3771 3772 3773 3781 3782 3792 3793 3794 3799 3800 3804 6693 9185 9240
9406 9522
PAT1 3772# 3772 3776# 3776 3781 3787 3792
PAT2 3773# 3773 3782 3785 3786 3804
PATCH 10320#
PATCH0 10319#
PATPNT 123# 3662 3799
PCMD 2875# 2875 2939 2947
PFSET 114# 206
PGMNAM 19 129#
PMODE 37 225 394 1781 2898 10291#
PNTCRM 4985 6482 7375 7394#
PNTDEV 119# 825 1956 6901
PNTENB 186 370 2878
PNTHST 4164 4207 4245#
PNTWD 4955 6451 6455 6510 7479#
PORSEL 66 1800 1805 1814 1840 10261#
PORTCI 66 1148 1164 1332 1357 1363 1377 1841 6939 7568 7579 10258#
PORTNI 66 1139 1157 1329 1355 1359 1375 1839 6935 7564 7577 10257#
PRSFLG 3591 3593 3598 3600 3846# 4139
PTEST 483 1354# 2865
PTEST0 1356 1358 1362 1367#
PTESTP 484 1370# 2866
PTESTX 1374 1379#
PVPAGI 149
QADDR 55 9248 9250 9422# 9450 9459
QADDRF 55 9361 9423# 9453 9462
RALUB 5054# 5054 5065 5077 5088 5092 5107 5137 5166 5188 5233 5244 5256 5266
5270 5284 5303 5935 5984
RALUE 5056# 5056 5066 5073 5083 5094 5138 5168 5235 5245 5252 5261 5272 5304
5936 5985
RANCNT 1688# 1688 1701 1707
RANDBS 1663
RANGEN 1660# 1697
RANNUM 1662# 1662 1665 1692
RDCRAM 108# 5034 5041 7243 7257
RDCSR 108# 1140 1149 3860 3901 4058 7157 8280 8291 8295 8927 9336 9940
RDEBUF 108# 3931 4330 5127 5426 8302 8545 8943 9344 10042
RDLAR 108# 4374 6565 8078 8309 8554 8954 9359 9949
REL 115# 10372
RELIAB 1857
REQ1 115# 10370
REQ2 115# 10371
RESCR0 7729# 7734 SEQ 0446
RESCRM 5146 5223 5310 5444 5516 5600 6042 6596 7722#
RESQAV 7159 9257
RFROM 4469 4516 4545#
RLOCB 5351# 5351 5362 5374 5385 5389 5400 5404 5410 5414 5434 5526# 5526 5537
5549 5559 5563 5577 5592 5942 5992
RLOCE 5353# 5353 5363 5370 5380 5391 5436 5528# 5528 5538 5545 5554 5565 5594
5943 5993
RSTART 1925
RTO 4467 4518 4544#
RUNTME 119# 291 1690 1964 7115 7119 7146 7150
S1 7775# 10327
S2 7895# 10328
SAADDR 42 8082 8097 8103 8164# 8189 8206 8558 8573 8583 8674 8705
SAVADD 1780# 1780 1795 1853
SAVCMD 2861# 2861
SAVCR0 7707# 7712
SAVCRL 7705 7727 7742#
SAVCRM 5102 5184 5280 5399 5481 5573 6005 6546 7702#
SAVFLD 4711# 4711 4712 4719
SAVHST 4149 4158 4266#
SAVMAX 465# 465 471
SAVRAR 7230# 7230 7249
SB 138#
SCOOFF 123# 6920
SCOSW 123# 8172 8357 8652 8999 9444 9488 10070 10172 10194 10216
SDATA 110# 4013 4047 4089 4140 4189 4281 4309 6019 6923 8052 8057 8073 8519
8524 8540 8550 8845 8850 9253 9258 9259 9859 9864 9865
SDEBUG 16 145# 145 380 389 2884 2893 8032 8086 8115 8129 8145 8497 8562
8598 8612 8627 8823 8852 8865 8879 8895 8911 8960 9160 9200 9261 9274
9288 9304 9320 9382 9674 9699 9734 9769 9805 9837 9867 9880 9894 9910
9926 10016
SEADDR 42 8047 8094 8104 8163# 8186 8203 8512 8570 8584 8667 8671 8698 8702
SELLAR 4372 6563 8056 8552 8849 8952 9257 9357 9863 9947
SELTST 1526 1865 7011#
SELTSX 7016 7028#
SEN11L 7831 7878 7888 7893 7922#
SENT10 7767 7769 7773 7786# 10330
SENT11 7828 7829 7848 7866 7883 7892 7909# 10338 10347
SEQ 748
SETEBU 109# 4323 4355
SETLAR 109# 8058 8264 8307
SETVEC 111# 258 401 1094 6878 9824
SEXCAL 8021 8128#
SEXCHK 8022 8144#
SEXEC 41 8006#
SEXERR 8024 8025 8026 8027 8031#
SEXEX1 8013 8018 8032#
SEXJRS 8023 8114#
SEXSS0 8067# 8081
SEXSSC 8020 8042#
SEXSSS 8019 8040#
SHWC 9511
SINCYC 5125 5298 8056 8523 10038 SEQ 0447
SLAST 110# 4045 4183 4275
SLDATA 4141# 4141 4279
SNARKF 114#
SNEXT 110# 4011 4044 4085 4186 4277 6021 6035 6922 8041 8042 8067 8080 8253
8267 8506 8507 8534 8556 8834 8839 8841 8854 9249 9855
SPCHK1 7766# 10335
SPCHK2 7828# 10344 10355
SPEAR1 189# 189 7753 7779
SPEAR2 36 190# 190 7810 7902
SPRE1X 7762 7780#
SPRE2A 7811 7820#
SPRE2B 7867# 7870
SPRE2C 7832 7882#
SPRE2X 7824 7903#
SPREP1 253 7750#
SPREP2 36 759 7803#
SRTDDT 1092 10349 10385
SRTLIS 650# 1007
SSADDR 42 8043 8091 8162# 8179 8196 8508 8567 8659 8690
SSADRL 4234# 4246 4276
SSADRN 4235# 4249 4278
SSCSRL 4236# 4280
SSCSRN 4227 4237# 4252 4282
SSLOC 4162 4205 4225 4226 4232# 4268 4270 4272
SSNUM 4213 4233# 4255 4269 4274
SSPN1 8174 8195#
SSPNT 41 8170#
SSPNX 8191 8211#
START 20 139# 1111 1926 10376
STARTA 20 237 257# 271 274
STARTB 236 261 269 275#
STCLOK 119# 201
STEST 10326#
STEST0 10332 10337#
STEST1 10340 10346#
STESTP 10331 10339 10348 10357# 10362
STRT1 175 194#
SWCHPT 121#
SWCOM 121# 1571 6808
SWITT 121# 214 230 262 265 272 350 356 383 504 1171 1636 1737 1786
1828 1855 1924 1945 2887 6894 7063 7094 7607 7760 7822
SWPTAB 181
SWRGT 121# 179
SWSTP 3268# 6807
SWSTT 662# 1570
TADDR 52 8833 8838 8842 8981# 9001
TADDRF 52 8956 8968 8982# 9011 9020
TAKFIL 37 1591 1597 1602 1605 1608 1613 1616 1624#
TALU 1011 1017 2106# 2636 2637 2650 7855
TCBUS 1013 1019 2179# 2638 2639 2652 7857
TCOMP 8923 8933 8936 8987# 9006
TCSRF 52 8929 8962 8983# 9028
TDENA 1509 1511 1531 6909 6928 SEQ 0448
TDISP1 990 1523 1696 1698 1746 1982#
TDISP2 1748 2235#
TEBUFA 52 8944 8950 8965 8986# 9034 9046
TEBUFC 52 8945 8949 8985# 9033 9040
TEBUS 1009 1981# 2635 2648 7853
TEND 992 1020 1696 2227# 2639
TEXCAC 8813 8894#
TEXCAL 8812 8878#
TEXCH0 8947 8952#
TEXCHK 8814 8922#
TEXCO0 8835 8841#
TEXCON 8811 8840#
TEXEC 51 8797#
TEXERR 8809 8818 8822#
TEXEX1 8804 8823#
TEXEXI 8816 8911#
TEXJRS 8815 8864#
TEXSST 8817 8831#
TEXSTR 8810 8836#
TFAIL 8924 8931 8934 8989# 9008 9017
TLERR 7587 7594#
TLOAD 25 7562#
TLOADE 7575 7585#
TLOADX 7563 7566 7570 7582#
TMODE 10307#
TMP1 1475# 1475 1479# 1479 1487 3681 3688
TMPROC 1012 1018 2143# 2637 2638 2651 7856
TPAT 31 6695 10308#
TRACE 30 6891#
TRACE0 6896 6917#
TRACET 6895
TRACEX 6929 6931 6953#
TSEQ 1010 1016 2047# 2635 2636 2649 7854
TSLOD1 37 373# 373 6938 7565 7578 10383
TSLOD2 37 374# 374 6942 7569 7580 10384
TSTA1 87# 2106 2354
TSTA10 87# 2113 2361
TSTA11 88# 2114 2362
TSTA12 88# 2115 2363
TSTA13 88# 2116 2364
TSTA14 88# 2117 2365
TSTA15 88# 2118 2366
TSTA16 88# 2119 2367
TSTA17 88# 2120 2368
TSTA2 87# 2107 2355
TSTA20 88# 2121 2369
TSTA21 89# 2122 2370
TSTA22 89# 2123 2371
TSTA23 89# 2124 2372
TSTA24 89# 2125 2373
TSTA25 89# 2126 2374
TSTA26 89# 2127 2375
TSTA27 89# 2128 2376 SEQ 0449
TSTA3 87# 2108 2356
TSTA30 89# 2129 2377
TSTA31 90# 2130 2378
TSTA32 90# 2131 2379
TSTA33 90# 2132 2380
TSTA34 90# 2133 2381
TSTA35 90# 2134 2382
TSTA36 90# 2135 2383
TSTA37 90# 2136 2384
TSTA4 87# 2109 2357
TSTA40 90# 2137 2385
TSTA41 91# 2138 2386
TSTA42 91# 2139 2387
TSTA5 87# 2110 2358
TSTA6 87# 2111 2359
TSTA7 87# 2112 2360
TSTADD 35 459 982 1063 1524 1699 1749 1779 1796 1854 1884 2655 6978 7013
7860 10275#
TSTAL0 1935 1940#
TSTALT 1633 1719 1933#
TSTC1 99# 2179 2452
TSTC10 99# 2186 2482
TSTC11 100# 2187 2454
TSTC12 100# 2188 2486
TSTC13 100# 2189 2487
TSTC14 100# 2190 2488
TSTC15 100# 2191 2489
TSTC16 100# 2192 2490
TSTC17 100# 2193 2491
TSTC2 99# 2180 2453
TSTC20 100# 2194 2492
TSTC21 101# 2195 2493
TSTC22 101# 2196 2494
TSTC23 101# 2197 2495
TSTC24 101# 2198 2496
TSTC25 101# 2199 2497
TSTC26 101# 2200 2498
TSTC27 101# 2201 2499
TSTC3 99# 2181 2477
TSTC30 101# 2202 2500
TSTC31 102# 2203 2501
TSTC32 102# 2204 2502
TSTC33 102# 2205 2503
TSTC34 102# 2206 2504
TSTC35 102# 2207 2505
TSTC36 102# 2208 2506
TSTC37 102# 2209 2507
TSTC4 99# 2182 2478
TSTC40 102# 2210 2511
TSTC41 103# 2211 2512
TSTC42 103# 2212 2513
TSTC43 103# 2213 2514
TSTC44 103# 2214 2515 SEQ 0450
TSTC45 103# 2215 2516
TSTC46 103# 2216 2517
TSTC47 103# 2217 2518
TSTC5 99# 2183 2479
TSTC50 103# 2218 2519
TSTC51 104# 2219 2520
TSTC52 104# 2220 2521
TSTC53 104# 2221 2522
TSTC54 104# 2222 2523
TSTC55 104# 2223 2524
TSTC56 104# 2224 2525
TSTC57 104# 2225 2526
TSTC6 99# 2184 2480
TSTC60 104# 2226 2527
TSTC7 99# 2185 2481
TSTCLS 35 467 1008 1537 1893 2625 2634 2647 2672 6903 6993 7085 7836 7852
10270#
TSTCNT 1864 1920 10286#
TSTD0 1726 1737#
TSTD1 1758 1764# 1772
TSTD10 1881 1888#
TSTD11 1872 1875 1912#
TSTD12 1867 1870 1922#
TSTD2 1760 1766 1769 1775#
TSTD3 1653 1700 1751 1779#
TSTD4 1795# 1834
TSTD5 1804# 1821 1844 1866 1928
TSTD6 1816 1826#
TSTD7 1822 1839#
TSTD8 1863# 1929
TSTD9 1868# 1921
TSTDDT 643 1088# 3150
TSTDE0 2631# 2675
TSTDEB 632 2858#
TSTDEC 456 972 1492 2614# 6309 6344
TSTDED 2624 2667#
TSTDEE 2632 2661# 2671
TSTDER 2643 2660#
TSTDIA 642 1077# 1947
TSTDIS 754 1719#
TSTDL0 1526# 1532 1543
TSTDS0 1487# 1513
TSTDSA 647 1473#
TSTDSL 648 1519#
TSTE1 70# 1982 2236
TSTE10 70# 1989 2246
TSTE11 71# 1990 2250
TSTE12 71# 1991 2251
TSTE13 71# 1992 2347
TSTE14 71# 1993 2252
TSTE15 71# 1994 2253
TSTE16 71# 1995 2254
TSTE17 71# 1996 2258 SEQ 0451
TSTE2 70# 1983 2237
TSTE20 71# 1997 2259
TSTE21 72# 1998 2260
TSTE22 72# 1999 2396
TSTE23 72# 2000 2264
TSTE24 72# 2001 2265
TSTE25 72# 2002 2397
TSTE26 72# 2003 2398
TSTE27 72# 2004 2399
TSTE3 70# 1984 2238
TSTE30 72# 2005 2400
TSTE31 73# 2006 2401
TSTE32 73# 2007 2402
TSTE33 73# 2008 2403
TSTE34 73# 2009 2404
TSTE35 73# 2010 2348
TSTE36 73# 2011 2349
TSTE37 73# 2012 2350
TSTE4 70# 1985 2239
TSTE40 73# 2013 2391
TSTE41 74# 2014 2392
TSTE42 74# 2015 2405
TSTE43 74# 2016 2406
TSTE44 74# 2017 2407
TSTE45 74# 2018 2408
TSTE46 74# 2019 2409
TSTE47 74# 2020 2410
TSTE5 70# 1986 2240
TSTE50 74# 2021 2411
TSTE51 75# 2022 2412
TSTE52 75# 2023
TSTE53 75# 2024 2277
TSTE54 75# 2025 2235
TSTE55 75# 2026 2417
TSTE56 75# 2027 2418
TSTE57 75# 2028 2278
TSTE6 70# 1987 2244
TSTE60 75# 2029 2440
TSTE61 76# 2030 2441
TSTE62 76# 2031 2442
TSTE63 76# 2032 2443
TSTE64 76# 2033 2444
TSTE65 76# 2034 2445
TSTE66 76# 2035
TSTE67 76# 2036
TSTE7 70# 1988 2245
TSTE70 76# 2037 2446
TSTE71 77# 2038 2447
TSTE72 77# 2039 2448
TSTE73 77# 2040 2413
TSTE74 77# 2041 2414
TSTE75 77# 2042 2415
TSTE76 77# 2043 2416 SEQ 0452
TSTEBF 5125 5424 8300 8523 8525 8551 8941 9342 10040
TSTEN0 1476 1480#
TSTENA 646 1477#
TSTEOP 1811 1952#
TSTEPP 1785# 1785 1790 1953
TSTEXE 621 622 623 624 625 626 746#
TSTEXG 731 754#
TSTFLG 35 1507 1530 6908 6927 6981 6990 6992 10274#
TSTGET 1064 1505 6319 6354 6975# 7020 7861
TSTHIG 1889 2573 6987 10282#
TSTHL0 1405# 1409
TSTHLC 1398 1412#
TSTHLL 1405 1420#
TSTHLP 645 1388#
TSTHLT 644 1103#
TSTINH 37 775 961 1522 1643 1687 1743 1745 1747 1871 10281#
TSTL1 983# 983 991 1014 1023 1039 1043 1059 1066
TSTL2 960 984# 984 993 1021 1044 1055 1061
TSTL3 1015# 1015 1054
TSTLI0 967# 986
TSTLI1 963 990#
TSTLIS 652 959#
TSTLOW 1902 2586 6989 10283#
TSTLSS 985 994 1030 1045 1059# 1068
TSTLST 653 654 655 656 657 1007#
TSTMB0 696 708#
TSTMBU 627 694#
TSTMIC 36 6320 6355 6936 6940 6983 10276#
TSTMSK 36 730 753 1755 7055 10277#
TSTMUL 774 1642 1686 1724 1927 1943 1952 7050 10280#
TSTNAM 35 6985 7098 7862 10269#
TSTNUM 35 1540 1896 2633 6906 6991 7088 7842 7845 7858 10271# 10354
TSTOFF 36 6893 10284#
TSTPC 35 1506 1869 1882 6979 7049 10273#
TSTPN0 7091 7094#
TSTPNT 30 1065 7083#
TSTPNX 7096 7099#
TSTRA0 1696# 1702
TSTRAA 1681 1706#
TSTRAN 628 1681#
TSTREL 1859 1863 10285#
TSTREP 36 1635 1683 1721 1827 1934 1937 1958 10278#
TSTREQ 1641 1651 1685 1722 1723 1732 1764 1775 1788 1833 10279#
TSTS1 79# 2047 2288
TSTS10 79# 2054 2295
TSTS11 80# 2055 2296
TSTS12 80# 2056 2297
TSTS13 80# 2057 2298
TSTS14 80# 2058 2299
TSTS15 80# 2059 2300
TSTS16 80# 2060 2301
TSTS17 80# 2061 2302
TSTS2 79# 2048 2289 SEQ 0453
TSTS20 80# 2062 2303
TSTS21 81# 2063 2304
TSTS22 81# 2064 2305
TSTS23 81# 2065 2306
TSTS24 81# 2066 2307
TSTS25 81# 2067 2308
TSTS26 81# 2068 2309
TSTS27 81# 2069 2310
TSTS3 79# 2049 2290
TSTS30 81# 2070 2311
TSTS31 82# 2071 2312
TSTS32 82# 2072 2313
TSTS33 82# 2073 2314
TSTS34 82# 2074 2315
TSTS35 82# 2075 2316
TSTS36 82# 2076 2317
TSTS37 82# 2077 2318
TSTS4 79# 2050 2291
TSTS40 82# 2078 2319
TSTS41 83# 2079 2320
TSTS42 83# 2080 2321
TSTS43 83# 2081 2322
TSTS44 83# 2082 2323
TSTS45 83# 2083 2324
TSTS46 83# 2084 2325
TSTS47 83# 2085 2326
TSTS5 79# 2051 2292
TSTS50 83# 2086 2327
TSTS51 84# 2087 2328
TSTS52 84# 2088 2329
TSTS53 84# 2089 2330
TSTS54 84# 2090 2331
TSTS55 84# 2091 2332
TSTS56 84# 2092 2333
TSTS57 84# 2093 2334
TSTS6 79# 2052 2293
TSTS60 84# 2094 2335
TSTS61 85# 2095 2336
TSTS62 85# 2096 2337
TSTS63 85# 2097 2338
TSTS64 85# 2098 2339
TSTS65 85# 2099 2340
TSTS66 85# 2100 2341
TSTS67 85# 2101 2342
TSTS7 79# 2053 2294
TSTS70 85# 2102 2343
TSTSAV 439# 439 447 479
TSTSE0 1233#
TSTSEG 249 1232 1306#
TSTSEL 634 641 1229# 3158 3167
TSTSEX 232 1273 1302 1320 1336#
TSTSG0 1309 1318#
TSTSP0 1645 1652# SEQ 0454
TSTSPC 460 1633#
TSTSSW 664 665 666 667 668 669 670 671 672 673 674 675 676 677
678 679 680 681 682 683 684 685 686 687 688 1566#
TSTSUB 35 6919 6977 7090 8048 8514 8922 9331 9403 9937 10272#
TSTSWI 659 1549#
TSTSWP 660 1555#
TSTTA0 1589 1595 1601#
TSTTAK 630 1585# 3153
TSTTAN 631 1583# 3154
TSTU1 93# 2143 2269
TSTU10 93# 2150 2422
TSTU11 94# 2151 2423
TSTU12 94# 2152 2424
TSTU13 94# 2153 2425
TSTU14 94# 2154 2458
TSTU15 94# 2155 2459
TSTU16 94# 2156 2460
TSTU17 94# 2157 2461
TSTU2 93# 2144 2270
TSTU20 94# 2158 2462
TSTU21 95# 2159 2463
TSTU22 95# 2160 2464
TSTU23 95# 2161 2465
TSTU24 95# 2162 2466
TSTU25 95# 2163 2467
TSTU26 95# 2164 2468
TSTU27 95# 2165 2469
TSTU3 93# 2145 2271
TSTU30 95# 2166 2470
TSTU31 96# 2167 2471
TSTU32 96# 2168 2472
TSTU33 96# 2169 2473
TSTU34 96# 2170 2429
TSTU35 96# 2171 2430
TSTU36 96# 2172 2431
TSTU37 96# 2173 2432
TSTU4 93# 2146 2272
TSTU40 96# 2174 2436
TSTU41 97# 2175 2284
TSTU5 93# 2147 2273
TSTU6 93# 2148 2282
TSTU7 93# 2149 2283
TTIME 8984#
TTNBRF 1773
TTPN0 9007 9009 9017#
TTPN1 9013 9018 9025#
TTPN2 9026 9033#
TTPNT 51 8997#
TTPNX 9035 9051#
TTYYES 119# 1311 1322
TUSER 6911 6930
TWORD 31 6697 6702 10306#
TXALL 7594 7595 SEQ 0455
TXTINH 7095 7608 8173 8358 8367 8387 8653 9025 9036 9038 9042 9044 9448 9456
9473 9475 9479 9481 9489 10074 10082 10102 10179 10181 10185 10187 10201 10203
10207 10209 10223 10225 10229 10231
UDEBUG 14 143# 143 210 216 378 385 1134 2882 2889 7750 7803
UNAME 120# 3687 3689 3694 3697
USER 266 1829 1922 7107 7752 7804 8054 8521 8847 9255 9861
USRION 114# 1131
UUT 66 1842 1868 10262#
WRDERR 123# 6793
XWORDL 6413# 6413 6418# 6418 6449
XWORDR 6415# 6415 6421# 6421 6450
XXW 426# 426 2924# 2924 4688# 4688
XXX 1710# 1710 3148# 3148 6955
ZAL 1975#
ZCB 1977#
ZEB 1973#
ZMP 1976#
ZSE 1974#
$$TOGG 188 10375
$ARG2 5315# 5315 5321# 5321 5323# 5323 5325# 5325 5327# 5327 5329# 5329 5335# 5335
5605# 5605 5607# 5607 5613# 5613 5615# 5615 5617# 5617 5619# 5619 5621# 5621
5627# 5627 6047# 6047 6622# 6622 6624# 6624 6626# 6626 6628# 6628
$B 5315# 5315 5321# 5321 5323# 5323 5325# 5325 5327# 5327 5329# 5329 5335# 5335
5605# 5605 5607# 5607 5613# 5613 5615# 5615 5617# 5617 5619# 5619 5621# 5621
5627# 5627 6047# 6047 6622# 6622 6624# 6624 6626# 6626 6628# 6628
$CHR 5315# 5315 5321# 5321 5323# 5323 5325# 5325 5327# 5327 5329# 5329 5335# 5335
5605# 5605 5607# 5607 5613# 5613 5615# 5615 5617# 5617 5619# 5619 5621# 5621
5627# 5627 6047# 6047 6622# 6622 6624# 6624 6626# 6626 6628# 6628
$GARG 5315# 5315 5321# 5321 5323# 5323 5325# 5325 5327# 5327 5329# 5329 5335# 5335
5605# 5605 5607# 5607 5613# 5613 5615# 5615 5617# 5617 5619# 5619 5621# 5621
5627# 5627 6047# 6047 6622# 6622 6624# 6624 6626# 6626 6628# 6628
$ONETM 138 155 172 174 7062 10379
$TTCHR 429 435 441 2927 2935 2941 4651 4665 4691 4707 4735
$TWCNT 427 2925 4689
%ADDR 5315# 5315 5321# 5321 5323 5323# 5325 5325# 5327 5327# 5329 5329# 5335# 5335
5605# 5605 5607 5607# 5613# 5613 5615 5615# 5617 5617# 5619 5619# 5621 5621#
5627# 5627 6047# 6047 6622# 6622 6624 6624# 6626 6626# 6628 6628#
%ML 5315# 5315 5321# 5321 5323# 5323 5325# 5325 5327# 5327 5329# 5329 5335# 5335
5605# 5605 5607# 5607 5613# 5613 5615# 5615 5617# 5617 5619# 5619 5621# 5621
5627# 5627 6047# 6047 6622# 6622 6624# 6624 6626# 6626 6628# 6628
%MR 5315# 5315 5321# 5321 5323# 5323 5325# 5325 5327# 5327 5329# 5329 5335# 5335
5605# 5605 5607# 5607 5613# 5613 5615# 5615 5617# 5617 5619# 5619 5621# 5621
5627# 5627 6047# 6047 6622# 6622 6624# 6624 6626# 6626 6628# 6628
.CGOT 122# 1569 6806
.CLOSE 119# 1107
.COMM 122# 449 481 1237 1278 1399 2623 2670 2949 3312 3480 4721
.CONI 111#
.CONO 111#
.DARG 122# 698 1028 1041 1647 1728 3609 4127 4201 5156 5240 5248 5358 5366
5454 5533 5541 5888 6729
.DATAI 111#
.DATAO 111# 5208 5501
.DBCMD 480 2948 2990# SEQ 0456
.DBDIS 488 2953 3143# 3268
.HLCMD 3311 3325#
.INPNT 114# 2874
.INWD1 114# 412
.ISWT 121# 1552 3260
.JBSA 10378
.LADDR 5315 5321 5335 5605 5613 5627 6047 6622
.LAND 5335 5627
.LCCER 5323 5615
.LCENA 5323 5615 6624
.LCJP 5323 5615 6624
.LCONT 5327 5619
.LCRTN 6047
.LD 5315 5321 5323 5325 5327 5329 5335 5605 5607 5613 5615 5617 5619 5621
5627 6047 6622 6624 6626 6628
.LJ 5315 5321 5323 5325 5329 5335 5605 5607 5613 5615 5617 5621 5627 6622
6624 6626 6628
.LJMAP 5315 5321 5325 5329 5335 5605 5607 5613 5617 5621 5627 6622 6626 6628
.LLDLM 5621 5627
.LMGC 5315 5327 5607 5619 5621
.LOENA 5315 5607 5621 5627
.LOR 5315 5327 5605 5607 5619 5621
.LRDLM 5605
.LS0A 5315 5335 5607 5621 5627
.LSD0 5327 5605 5619
.LSELE 5315 5327 5607 5619
.LSWIT 121#
.MAND 5335 5627
.MCCER 5323 5615
.MCENA 5323 5615 6624
.MCJP 5323 5615 6624
.MCONT 5327 5619
.MCRTN 6047
.MD 5315 5321 5323 5325 5327 5329 5335 5605 5607 5613 5615 5617 5619 5621
5627 6047 6622 6624 6626 6628
.MJ 5315 5321 5323 5325 5329 5335 5605 5607 5613 5615 5617 5621 5627 6622
6624 6626 6628
.MJMAP 5315 5321 5325 5329 5335 5605 5607 5613 5617 5621 5627 6622 6626 6628
.MLDLM 5621 5627
.MMGC 5315 5327 5607 5619 5621
.MOENA 5315 5607 5621 5627
.MOR 5315 5327 5605 5607 5619 5621
.MRDLM 5605
.MS0A 5315 5335 5607 5621 5627
.MSD0 5327 5605 5619
.MSELE 5315 5327 5607 5619
.OARG 122# 3517 3543 3634 3647 3728 3769 3779 3872 3912 3942 3958 4036 4349
4390 4475 4485 4570 4578 4586 4594 4602 5061 5069 5171 5468 5650 5693
5738 5748 5811 5821 6069 6116 6157 6167 6225 6235 6525 6637 6664
.PIOFF 111# 9943
.PION 111# 10024
.PNTOC 121#
.RAND 5335 5627 SEQ 0457
.RCCER 5323 5615
.RCENA 5323 5615 6624
.RCJP 5323 5615 6624
.RCONT 5327 5619
.RCRTN 6047
.RD 5315 5321 5323 5325 5327 5329 5335 5605 5607 5613 5615 5617 5619 5621
5627 6047 6622 6624 6626 6628
.RESET 120# 194
.RJ 5315 5321 5323 5325 5329 5335 5605 5607 5613 5615 5617 5621 5627 6622
6624 6626 6628
.RJMAP 5315 5321 5325 5329 5335 5605 5607 5613 5617 5621 5627 6622 6626 6628
.RLDLM 5621 5627
.RMGC 5315 5327 5607 5619 5621
.ROENA 5315 5607 5621 5627
.ROR 5315 5327 5605 5607 5619 5621
.RRDLM 5605
.RS0A 5315 5335 5607 5621 5627
.RSD0 5327 5605 5619
.RSELE 5315 5327 5607 5619
.RSWIT 121# 180
.SARG 122# 968 1230 1271 1392 1488 1587 1593 3305 3473 3562 3586 3677 3683
6303 6338
.STCMD 3479 3487#
.STDIS 3484 3500#
.SWCHP 121# 1558 3265
ALTCHK 426 1772 2924 4688
CALC 5315 5321 5323 5325 5327 5329 5335 5605 5607 5613 5615 5617 5619 5621 SEQ 0458
5627 6047 6622 6624 6626 6628
CONCAT 5315 5321 5323 5325 5327 5329 5335 5605 5607 5613 5615 5617 5619 5621
5627 6047 6622 6624 6626 6628
DISMS 7131
ENDUUO 270
EOPUUO 275
FIELD 5315 5321 5323 5325 5327 5329 5335 5605 5607 5613 5615 5617 5619 5621
5627 6047 6622 6624 6626 6628
FMSG 419 470 1936 1939 2916 4566 4753 4754 4755 4756 4757 4758 4759 4760
4761 4762 4763 4764 4765 4766 4767 4768 4769 4770
FMSGC 466 976 1033 1048 1310 1321 1496 1604 1612 1706 1770 1933 4558 6313
6348
FMSGCD 352 493 636 697 967 973 1027 1040 1077 1088 1091 1103 1229 1238
1255 1263 1270 1279 1290 1298 1400 1474 1478 1481 1493 1519 1549 1555
1566 1586 1592 1646 1727 2858 2869 2932 2950 3145 3162 3239 3257 3262
3313 3475 3481 3516 3524 3542 3561 3585 3608 3615 3633 3640 3646 3649
3656 3676 3682 3708 3724 3768 3778 3788 3795 3813 3857 3871 3874 3886
3898 3911 3914 3928 3941 3944 3957 3986 3997 4007 4035 4049 4052 4057
4073 4077 4080 4088 4118 4123 4143 4146 4200 4222 4296 4300 4303 4308
4319 4324 4342 4348 4351 4356 4368 4389 4392 4407 4474 4484 4495 4501
4505 4569 4572 4577 4580 4585 4588 4593 4596 4601 4604 4702 4722 4874
4875 4876 4877 4890 4891 4892 4893 4912 4919 4920 4921 5060 5068 5079
5085 5089 5155 5158 5163 5170 5173 5239 5247 5258 5263 5267 5357 5365
5376 5382 5386 5453 5456 5462 5467 5470 5532 5540 5551 5556 5560 5643
5649 5655 5686 5692 5698 5737 5747 5758 5763 5767 5810 5820 5831 5836
5840 5887 5973 6001 6023 6026 6062 6068 6074 6109 6115 6121 6156 6166
6177 6182 6186 6224 6234 6245 6250 6254 6302 6305 6310 6321 6337 6340
6345 6356 6366 6402 6466 6495 6524 6527 6539 6636 6639 6663 6666 6687
6714 6728 6757 6768 6782 6788 6802 6816 6874
FMSGD 1388 1610 1618 1709 1940 3300 3469 4649 4878 4882 4886 4894 4908 4913
FSELEC 1603
GET 426 858 860 1188 1190 1221 1223 1367 1381 1673 1675 1710 1966 2556
2562 2598 2661 2663 2924 3148 4258 4283 4285 4688 5020 5022 5043 5045
5676 5719 5789 6095 6099 6138 6203 6378 6457 6459 6809 6826 6828 6946
6948 6953 6955 6994 6996 7028 7030 7075 7077 7099 7101 7122 7124 7132
7134 7161 7163 7193 7288 7290 7336 7338 7383 7385 7468 7470 7494 7496
7545 7547 7581 7585 7613 7615 7647 7649 7713 7715 7735 7736 7738 7780
7782 7813 7815 7903 7905 7939 7941 8034 8036 8108 8110 8121 8123 8137
8139 8155 8157 8211 8213 8317 8319 8402 8404 8499 8501 8591 8593 8604
8606 8619 8621 8636 8638 8719 8721 8825 8827 8857 8859 8871 8873 8887
8889 8905 8907 8916 8918 8975 8977 9051 9053 9162 9164 9214 9216 9267
9269 9280 9282 9296 9298 9314 9316 9325 9327 9397 9399 9416 9418 9527
9529 9676 9678 9711 9713 9746 9748 9781 9783 9817 9819 9843 9845 9873
9875 9886 9888 9902 9904 9920 9922 9931 9933 10029 10031 10238 10240
GETJI 7937
GO 194 201 206 214 229 230 232 239 244 249 253 257 258 259
262 264 265 272 291 350 356 362 372 383 400 401 417 422
449 456 460 474 481 483 484 486 488 494 499 504 633 634
637 639 698 754 759 763 825 968 972 974 980 985 994 1028
1037 1041 1052 1064 1065 1078 1080 1089 1092 1093 1094 1104 1106 1107
1130 1131 1140 1142 1149 1151 1158 1165 1171 1175 1179 1187 1230 1237
1239 1252 1260 1271 1278 1280 1287 1295 1311 1322 1392 1394 1399 1401
1482 1488 1492 1494 1500 1505 1520 1526 1534 1550 1552 1556 1558 1567 SEQ 0459
1571 1587 1593 1601 1636 1647 1690 1697 1700 1728 1737 1786 1788 1811
1813 1826 1828 1843 1855 1865 1869 1874 1892 1901 1906 1924 1941 1944
1945 1956 1964 2544 2623 2631 2670 2859 2865 2866 2868 2874 2887 2904
2907 2914 2919 2933 2949 2951 2953 3146 3157 3158 3163 3165 3167 3240
3258 3260 3263 3265 3305 3307 3312 3314 3473 3476 3480 3482 3484 3517
3525 3543 3562 3565 3586 3589 3609 3616 3634 3641 3647 3650 3654 3677
3683 3706 3711 3712 3713 3714 3715 3716 3717 3728 3735 3769 3779 3789
3796 3814 3858 3860 3862 3872 3875 3878 3887 3890 3899 3901 3912 3915
3918 3929 3931 3942 3945 3948 3958 3961 3987 3989 3998 4000 4008 4014
4015 4016 4036 4042 4048 4050 4053 4058 4060 4074 4076 4078 4081 4090
4127 4130 4142 4144 4147 4149 4158 4164 4201 4207 4223 4297 4299 4301
4304 4310 4320 4322 4323 4325 4330 4343 4349 4352 4354 4355 4357 4360
4369 4371 4373 4374 4390 4393 4395 4397 4399 4408 4410 4412 4413 4475
4485 4497 4502 4506 4522 4554 4570 4573 4578 4581 4586 4589 4594 4597
4602 4605 4614 4633 4643 4650 4671 4676 4682 4703 4705 4713 4721 4723
4725 4734 4741 4931 4951 4955 4978 4985 5005 5010 5012 5017 5019 5033
5034 5040 5041 5061 5069 5081 5086 5090 5102 5120 5124 5126 5127 5146
5156 5159 5164 5171 5174 5184 5195 5204 5206 5208 5210 5223 5240 5248
5259 5264 5268 5280 5291 5297 5299 5310 5358 5366 5378 5383 5387 5399
5409 5417 5421 5423 5425 5426 5444 5454 5457 5463 5468 5471 5481 5490
5497 5499 5501 5503 5516 5533 5541 5552 5557 5561 5573 5580 5584 5586
5588 5600 5644 5650 5656 5661 5668 5675 5687 5693 5699 5704 5711 5718
5738 5748 5759 5764 5768 5773 5780 5788 5811 5821 5832 5837 5841 5846
5855 5864 5888 5903 5974 6002 6005 6007 6012 6022 6024 6027 6042 6063
6069 6075 6080 6087 6092 6098 6110 6116 6122 6127 6134 6137 6157 6167
6178 6183 6187 6192 6199 6202 6225 6235 6246 6251 6255 6260 6269 6273
6281 6303 6306 6309 6311 6317 6319 6322 6324 6325 6338 6341 6344 6346
6352 6354 6357 6359 6367 6370 6372 6373 6377 6392 6403 6407 6409 6410
6416 6422 6451 6455 6467 6469 6472 6481 6482 6496 6498 6500 6509 6510
6525 6528 6531 6540 6546 6556 6560 6562 6564 6565 6596 6637 6640 6642
6653 6664 6667 6669 6677 6688 6698 6700 6704 6715 6729 6758 6760 6769
6772 6773 6783 6789 6792 6803 6808 6817 6823 6875 6877 6878 6894 6901
7020 7021 7063 7094 7115 7119 7146 7150 7157 7191 7195 7212 7213 7231
7238 7241 7243 7251 7254 7257 7286 7319 7323 7329 7374 7375 7465 7573
7574 7607 7612 7670 7691 7704 7708 7724 7732 7760 7766 7822 7861 7887
8058 8069 8074 8078 8087 8116 8130 8136 8146 8152 8263 8264 8269 8271
8276 8280 8290 8291 8294 8295 8301 8302 8307 8309 8359 8368 8526 8536
8541 8545 8553 8554 8563 8599 8613 8618 8628 8633 8840 8844 8851 8853
8866 8880 8886 8896 8902 8912 8926 8927 8942 8943 8953 8954 8961 9178
9180 9190 9192 9199 9201 9245 9252 9260 9262 9275 9289 9295 9305 9311
9321 9335 9336 9343 9344 9358 9359 9368 9383 9407 9449 9492 9523 9700
9735 9770 9806 9823 9824 9838 9849 9858 9866 9868 9881 9895 9901 9911
9917 9927 9939 9940 9943 9948 9949 9959 9964 10017 10024 10037 10039 10041
10042 10075 10116 10329 10331 10337 10339 10346 10348
GTAD 7768 7882
HALT 1110
MFLD 5315# 5315 5321# 5321 5323# 5323 5325# 5325 5327# 5327 5329# 5329 5335# 5335
5605# 5605 5607# 5607 5613# 5613 5615# 5615 5617# 5617 5619# 5619 5621# 5621
5627# 5627 6047# 6047 6622# 6622 6624# 6624 6626# 6626 6628# 6628
MWORD 5315 5321 5323 5325 5327 5329 5335 5605 5607 5613 5615 5617 5619 5621
5627 6047 6622 6624 6626 6628
PCRL 292 824 857 1060 1069 1220 1346 1527 1535 1908 1965 2905 3530 3534
3550 3554 3572 3596 3621 3659 3668 3692 3699 3748 3755 3761 3798 3863 SEQ 0460
4061 4091 4170 4191 4257 4334 4948 4966 4980 4993 5144 5442 5878 6040
6295 6456 6476 6488 6504 6516 6532 6591 6749 6761 6774 6794 6864 6913
7314 7364 7382 7638 8033 8498 8824 9161 9675 10361
PCRL2 3806
PCRLF 358 418 473 979 1036 1051 1499 2915 4311 4560 4641 4644 4695 4700
4704 4724 6316 6351
PFORCE 417 511 708 728 1403 2914 2959 3316 3816
PGMINT 195
PJRST 731 1527 3745 3751 5930 5937 5944 5979 5987 5995
PNT1 7400 7403 7408 7411 7414 7417 7420 7432 7435 7456 7459 7462 7672 7695
PNT4 4086 4184 4187 4247 4250 6447 7315 7482 7484 7489 7491 7493 8180 8187
8190 8197 8204 8207 8356 8364 8370 8374 8391 8660 8668 8672 8675 8691
8699 8703 8706 9002 9012 9021 9451 9454 9460 9463 10077 10080 10086 10089
PNT4F 4565 4648
PNTAL 2554
PNTCIF 1607 1615
PNTDCF 1708 1938
PNTDEC 287 1960 3624 6329 6387 6431 6434 6743 6850 6853 7309 8089 8183 8200
8565 8663 8694
PNTHW 3667 4190 4253 4333 5129 5428 6746 6857 6860 6863 7606 8361 8577 8681
8684 8712 8715 8963 9029 9041 9047 9385 9466 9478 9484 9702 9737 9772
9808 9840 10019 10092 10095 10101 10184 10190 10206 10212 10228 10234 10360
PNTMSF 352 419 466 470 493 636 697 967 973 976 1027 1033 1040 1048
1077 1088 1091 1103 1229 1238 1255 1263 1270 1279 1290 1298 1310 1321
1391 1400 1474 1478 1481 1493 1496 1519 1549 1555 1566 1586 1592 1604
1610 1612 1618 1646 1706 1709 1727 1770 1933 1936 1939 1940 2858 2869
2916 2932 2950 3145 3162 3239 3257 3262 3304 3313 3472 3475 3481 3516
3524 3542 3561 3585 3608 3615 3633 3640 3646 3649 3656 3676 3682 3708
3727 3768 3778 3788 3795 3813 3857 3871 3874 3886 3898 3911 3914 3928
3941 3944 3957 3986 3997 4007 4035 4049 4052 4057 4073 4077 4080 4088
4118 4123 4143 4146 4200 4222 4296 4300 4303 4308 4319 4324 4342 4348
4351 4356 4368 4389 4392 4407 4474 4484 4495 4501 4505 4558 4566 4569
4572 4577 4580 4585 4588 4593 4596 4601 4604 4638 4649 4702 4722 4753
4754 4755 4756 4757 4758 4759 4760 4761 4762 4763 4764 4765 4766 4767
4768 4769 4770 4874 4875 4876 4877 4881 4885 4889 4890 4891 4892 4893
4907 4911 4912 4918 4919 4920 4921 5060 5068 5079 5085 5089 5155 5158
5163 5170 5173 5239 5247 5258 5263 5267 5357 5365 5376 5382 5386 5453
5456 5462 5467 5470 5532 5540 5551 5556 5560 5643 5649 5655 5686 5692
5698 5737 5747 5758 5763 5767 5810 5820 5831 5836 5840 5887 5973 6001
6023 6026 6062 6068 6074 6109 6115 6121 6156 6166 6177 6182 6186 6224
6234 6245 6250 6254 6302 6305 6310 6313 6321 6337 6340 6345 6348 6356
6366 6402 6466 6495 6524 6527 6539 6636 6639 6663 6666 6687 6714 6728
6757 6768 6782 6788 6802 6816 6874
PNTMSG 284 288 512 716 722 727 829 831 833 835 836 843 846 850
1198 1199 1200 1202 1203 1204 1205 1206 1207 1208 1209 1210 1212 1213
1214 1215 1216 1217 1218 1219 1338 1341 1345 1376 1378 1380 1420 1430
1442 1447 1455 1465 1740 1741 1742 1892 1898 1899 1905 1957 1961 2960
3345 3360 3365 3370 3374 3384 3389 3394 3399 3407 3412 3417 3424 3430
3436 3444 3452 3462 3531 3551 3573 3575 3577 3597 3599 3601 3622 3625
3660 3665 3693 3696 3710 3734 3740 3745 3751 3757 3817 3861 4084 4134
4150 4153 4156 4173 4176 4182 4185 4188 4206 4248 4251 4254 4331 4375
4378 4382 4950 4975 4982 5106 5111 5114 5407 5409 5412 5848 5865 6013
6014 6030 6031 6032 6033 6034 6262 6282 6327 6330 6385 6388 6389 6395 SEQ 0461
6429 6432 6435 6445 6448 6452 6471 6478 6506 6574 6583 6601 6602 6603
6604 6605 6606 6607 6608 6609 6610 6611 6612 6613 6614 6615 6616 6655
6680 6738 6741 6744 6836 6838 6839 6840 6841 6842 6843 6844 6845 6848
6851 6854 6855 6858 6861 6866 6900 6902 6910 6912 7092 7097 7098 7308
7310 7311 7316 7320 7324 7335 7355 7367 7398 7401 7406 7409 7412 7415
7430 7433 7438 7439 7440 7441 7442 7443 7444 7445 7446 7447 7448 7449
7450 7451 7452 7453 7454 7604 7640 7655 7656 7657 7658 7659 7660 7661
7662 7663 7664 7665 7666 7667 7668 7669 7670 7676 7677 7678 7679 7680
7681 7682 7683 7684 7685 7686 7687 7688 7689 7690 7694 8031 8087 8090
8093 8096 8116 8130 8146 8178 8181 8184 8185 8188 8195 8198 8201 8202
8205 8354 8359 8362 8365 8368 8371 8380 8389 8392 8398 8496 8563 8566
8569 8572 8575 8599 8613 8628 8658 8661 8664 8666 8670 8673 8679 8682
8689 8692 8695 8697 8701 8704 8710 8713 8822 8853 8866 8880 8896 8912
8961 8964 8967 9000 9010 9019 9027 9037 9039 9043 9045 9159 9201 9203
9204 9205 9206 9209 9262 9275 9289 9305 9321 9383 9386 9389 9449 9452
9458 9461 9464 9474 9476 9480 9482 9496 9498 9500 9502 9504 9506 9508
9510 9512 9514 9673 9700 9703 9706 9735 9738 9741 9770 9773 9776 9806
9809 9812 9838 9868 9881 9895 9911 9927 10017 10020 10075 10078 10084 10087
10090 10093 10099 10104 10106 10107 10108 10109 10110 10111 10113 10114 10115 10118
10120 10122 10123 10124 10125 10126 10129 10132 10140 10143 10145 10146 10147 10148
10149 10150 10151 10160 10163 10165 10166 10176 10180 10182 10186 10188 10198 10202
10204 10208 10210 10220 10224 10226 10230 10232 10357
PNTOCC 4949 4981 5867 6035 6284 6477 6505 7366 7397 7405 7423 7426 7429
PNTOCF 472 978 1035 1050 1498 4683 6315 6350
PNTOCS 848 1541 1897 3533 3553 3742 3747 3754 3760 4155 4175 4256 4377 4381
5113 5411 6394 6847 6907 7089 7093 7345 8092 8095 8098 8118 8132 8148
8568 8571 8574 8601 8615 8630 8855 8868 8882 8898 8966 8969 9208 9211
9264 9277 9291 9307 9388 9391 9705 9708 9740 9743 9775 9778 9811 9814
9870 9883 9897 9913 10022 10128 10131 10134 10155 10168 10178 10200 10222
PNTSIX 1539 1895 3695 3698 6905 7087
PNTSXF 469 1606 1609 1614 1617
PSP 849 1542 2555 5868 6285 7418 7421 7424 7427 7436 7457 7460
PSPF 4684
PUT 780 782 1128 1130 1196 1198 1354 1370 1660 1662 1955 2538 2544 2569
2614 2616 4245 4266 4268 5000 5002 5028 5030 5673 5716 5786 6088 6096
6135 6200 6375 6440 6442 6805 6819 6821 6891 6893 6975 6977 7011 7013
7047 7049 7083 7085 7112 7114 7128 7130 7143 7145 7190 7203 7205 7304
7306 7353 7355 7394 7396 7479 7481 7515 7517 7572 7602 7604 7625 7627
7702 7704 7722 7724 7725 7758 7760 7809 7820 7822 7932 7934 8006 8008
8134 8136 8150 8152 8170 8172 8244 8246 8352 8354 8470 8472 8617 8632
8650 8652 8797 8799 8884 8886 8900 8902 8997 8999 9131 9133 9293 9295
9309 9311 9442 9444 9644 9646 9899 9901 9915 9917 10068 10070 10333 10335
10341 10343 10350 10352
RGET 858 1188 1221 1673 2556 2661 4283 5020 5043 6457 6826 6946 6953 6994
7028 7075 7099 7122 7132 7161 7288 7336 7383 7468 7494 7545 7613 7647
7713 7736 7780 7903 7939 8034 8108 8121 8137 8155 8211 8317 8402 8499
8591 8604 8619 8636 8719 8825 8857 8871 8887 8905 8916 8975 9051 9162
9214 9267 9280 9296 9314 9325 9397 9416 9527 9676 9711 9746 9781 9817
9843 9873 9886 9902 9920 9931 10029 10238
RPUT 780 1128 1196 1660 2544 2614 4266 5000 5028 6440 6819 6891 6975 7011
7047 7083 7112 7128 7143 7203 7304 7353 7394 7479 7515 7602 7625 7702
7722 7758 7820 7932 8006 8134 8150 8170 8244 8352 8470 8650 8797 8884
8900 8997 9131 9293 9309 9442 9644 9899 9915 10068 10333 10341 10350 SEQ 0462
RTN 242 247 283 293 363 420 507 620 635 638 640 699 764 776
778 860 969 970 975 981 995 1029 1038 1042 1053 1062 1071 1079
1090 1096 1105 1144 1153 1177 1181 1190 1223 1231 1240 1256 1258 1264
1266 1272 1281 1291 1293 1299 1301 1347 1368 1382 1393 1396 1402 1406
1410 1483 1489 1490 1495 1501 1521 1528 1536 1551 1553 1557 1559 1568
1572 1588 1594 1611 1620 1648 1675 1711 1729 1791 1832 1835 1900 1948
1954 1967 2537 2557 2563 2599 2663 2860 2867 2870 2917 3143 3147 3149
3161 3164 3166 3170 3241 3247 3259 3261 3264 3266 3306 3309 3315 3319
3323 3474 3477 3483 3485 3518 3526 3528 3535 3544 3548 3555 3563 3566
3568 3570 3578 3587 3590 3592 3594 3602 3610 3617 3619 3626 3635 3642
3648 3651 3655 3657 3669 3678 3684 3690 3700 3707 3709 3718 3729 3736
3738 3749 3756 3762 3770 3780 3790 3797 3807 3815 3818 3859 3864 3873
3876 3879 3888 3891 3900 3905 3913 3916 3921 3930 3934 3943 3946 3951
3959 3979 3988 3990 3999 4001 4009 4017 4037 4051 4054 4056 4062 4075
4079 4082 4092 4128 4145 4148 4172 4192 4202 4210 4215 4224 4228 4259
4285 4298 4302 4305 4307 4312 4321 4326 4335 4344 4350 4353 4358 4361
4370 4383 4391 4394 4400 4409 4414 4476 4486 4498 4503 4507 4555 4571
4574 4579 4582 4587 4590 4595 4598 4603 4606 4619 4645 4745 4775 4777
4779 4781 4783 4785 4787 4789 4791 4793 4795 4797 4799 4801 4803 4805
4807 4809 4814 4816 4818 4820 4822 4824 4826 4828 4830 4832 4834 4836
4838 4840 4842 4844 4846 4848 4934 4939 4967 4994 5022 5045 5062 5070
5082 5087 5091 5147 5157 5160 5165 5172 5175 5224 5241 5249 5260 5265
5269 5311 5359 5367 5379 5384 5388 5413 5445 5455 5458 5464 5469 5472
5517 5534 5542 5553 5558 5562 5601 5645 5651 5652 5657 5688 5694 5695
5700 5739 5749 5760 5765 5769 5793 5812 5822 5833 5838 5842 5866 5879
5889 5906 5975 6003 6043 6064 6070 6071 6076 6111 6117 6118 6123 6158
6168 6179 6184 6188 6207 6226 6236 6247 6252 6256 6283 6296 6304 6307
6312 6318 6323 6331 6339 6342 6347 6353 6358 6360 6368 6371 6396 6404
6408 6436 6459 6468 6470 6489 6497 6499 6517 6526 6529 6533 6541 6597
6638 6641 6656 6665 6668 6681 6689 6705 6716 6730 6750 6759 6762 6770
6775 6784 6790 6795 6804 6810 6818 6828 6867 6876 6879 6949 6955 6996
7030 7077 7101 7124 7134 7163 7196 7198 7202 7245 7290 7303 7338 7347
7385 7467 7470 7496 7547 7583 7592 7615 7649 7673 7693 7696 7715 7738
7751 7754 7782 7805 7814 7816 7905 7941 8036 8099 8110 8119 8124 8133
8140 8149 8157 8213 8320 8322 8324 8326 8328 8366 8372 8404 8501 8578
8593 8602 8607 8616 8622 8631 8638 8721 8827 8856 8860 8869 8874 8883
8890 8899 8907 8913 8918 8970 8977 9053 9164 9212 9216 9265 9269 9278
9283 9292 9299 9308 9316 9322 9327 9392 9399 9418 9455 9529 9678 9709
9713 9744 9748 9779 9783 9815 9819 9841 9845 9871 9875 9884 9889 9898
9905 9914 9922 9928 9933 9962 9967 10023 10031 10043 10081 10121 10240 10363
SCOPER 7587
SYERR 7775 7895
TMSG 288 846 1202 1203 1204 1205 1206 1207 1208 1209 1212 1213 1214 1215
1216 1217 1218 1219 1898 1957 1961 3531 3551 3573 3597 3622 3660 3665
3693 3696 3745 3751 3757 4173 4185 4188 4248 4251 4254 4378 4950 4982
5111 5114 5407 5412 6432 6478 6506 6601 6602 6603 6604 6605 6606 6607
6608 6609 6610 6611 6612 6613 6614 6615 6616 6738 6744 6848 6851 6854
6858 6861 6900 6902 6910 6912 7092 7097 7310 7316 7320 7324 7367 7398
7401 7406 7409 7412 7415 7430 7433 7438 7439 7440 7441 7442 7443 7444
7445 7446 7447 7448 7449 7450 7451 7452 7453 7454 7640 7655 7656 7657
7658 7659 7660 7661 7662 7663 7664 7665 7666 7667 7668 7669 7670 7676
7677 7678 7679 7680 7681 7682 7683 7684 7685 7686 7687 7688 7689 7690
7694 8090 8093 8096 8181 8184 8198 8201 8392 8566 8569 8572 8575 8661 SEQ 0463
8664 8692 8695 8964 8967 9203 9204 9205 9206 9209 9386 9389 9452 9498
9500 9502 9504 9506 9508 9510 9512 9514 9703 9706 9738 9741 9773 9776
9809 9812 10020 10078 10104 10106 10107 10108 10109 10110 10111 10113 10114 10115
10118 10120 10122 10123 10124 10125 10129 10132 10145 10146 10147 10148 10149 10150
10151 10166
TMSGC 284 709 717 843 1198 1199 1200 1210 1338 1341 1345 1892 1899 1905
3740 3861 4084 4150 4153 4182 4331 4375 4975 5106 5409 5848 5865 6013
6014 6030 6031 6032 6033 6034 6262 6282 6327 6385 6389 6429 6445 6448
6452 6471 6574 6583 6741 6836 6838 6839 6840 6841 6842 6843 6844 6845
6855 7308 7311 7335 7355 7604 8087 8116 8130 8146 8178 8185 8188 8195
8202 8205 8354 8359 8362 8365 8368 8371 8380 8389 8398 8563 8599 8613
8628 8658 8666 8670 8673 8679 8682 8689 8697 8701 8704 8710 8713 8853
8866 8880 8896 8912 8961 9000 9010 9019 9027 9037 9039 9043 9045 9201
9262 9275 9289 9305 9321 9383 9449 9458 9461 9464 9474 9476 9480 9482
9496 9700 9735 9770 9806 9838 9868 9881 9895 9911 9927 10017 10075 10084
10087 10090 10093 10099 10126 10140 10143 10160 10163 10165 10176 10180 10182 10186
10188 10198 10202 10204 10208 10210 10220 10224 10226 10230 10232
TMSGCD 723 836 1376 1378 1380 1420 1740 1741 1742 3345 3710 3734 4134 4206
6655 6680 6866 8031 8496 8822 9159 9673 10357
TMSGD 829 831 833 835 1422 1432 1444 1449 1457 3347 3362 3367 3372 3376
3386 3391 3396 3401 3409 3414 3419 3426 3432 3438 3446 3454 3575 3577
3599 3601 3625 4156 4176 4382 6330 6388 6395 6435
TTALTM 1067 1914 3801 3903 3919 3932 3949 3977 4168 4208 4932 4956 5132 5300
5429 5589 5872 6289 6382 6426 6485 6513 6747 6824 7463
TTIDEC 1771
TTSIXB 425 2923 4687
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 1
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0464
1 SUBTTL EBUS Module Tests
2
3 SALL
4
5 SEARCH DFPTA,MONSYM
6
7 ; INTERN's
8
9 ENTRY TSTE1,TSTE2,TSTE3,TSTE4,TSTE5,TSTE6,TSTE7,TSTE10
10 ENTRY TSTE11,TSTE12,TSTE13,TSTE14,TSTE15,TSTE16,TSTE17,TSTE20
11 ENTRY TSTE21,TSTE22,TSTE23,TSTE24,TSTE25,TSTE26,TSTE27,TSTE30
12 ENTRY TSTE31,TSTE32,TSTE33,TSTE34,TSTE35,TSTE36,TSTE37,TSTE40
13 ENTRY TSTE41,TSTE42,TSTE43,TSTE44,TSTE45,TSTE46,TSTE47,TSTE50
14 ENTRY TSTE51,TSTE52,TSTE53,TSTE54,TSTE55,TSTE56,TSTE57,TSTE60
15 ENTRY TSTE61,TSTE62,TSTE63,TSTE64,TSTE65,TSTE66,TSTE67,TSTE70
16 ENTRY TSTE71,TSTE72,TSTE73,TSTE74,TSTE75,TSTE76
17
18 ; EXTERN's
19
20 EXTERN TSTA1,TSTA2,TSTA3,TSTA4,TSTA5,TSTA6,TSTA7
21 EXTERN TSTU6,TSTU7,TSTU10,TSTU11,TSTU12,TSTU13,TSTU41
22
23 ; EXTERN's located in DFPTA1.MAC (Mainline code..)
24
25 EXTERN TSTFLG,TSTSUB,TSTPC,UDEBUG,BUFF
26 EXTERN TLOAD,CSRPNT,CSRENG,TRACE,ODELAY
27 EXTERN IEXEC,IIPNT,ICSR,IADDR,BEXEC,BBPNT,CEBUF,AEBUF,IFLAG,IIOPF
28
29 ; EXTERN's located in DFPTAI.MAC (Port Device Handling Routines module)
30
31 EXTERN LDEBUF,LDRAR,LDCSR,RDEBUF,RDCSR,ERESET,IPACLR
32 EXTERN IPASRT,SNEXT,SDATA,.DATAI,.DATAO
33 EXTERN INITPI,.PION,SETVEC,.CONI,.CONO,INTNUM,INTTYP
34 EXTERN PFAPR,PFAIL,PF500,PF501,PF502,PISYOF,PISYON
35
36 ; EXTERN's located in DFPTAU.MAC (Utility Routines module)
37
38 EXTERN SCOSW,BUFGEN
39
40 ;#********************************************************************
41 ; Z2 - Address for use in DDT
42 ;#********************************************************************
43
44 000000' Z2: ; address of 00000'
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 2
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0465
45
46 ;#********************************************************************
47 ;* TEST 1 - Is there an port out there?
48 ;
49 ; Description: Just do a CONI and see if there is any device out
50 ; there at all.
51 ;
52 ; Procedure: EBUS Reset
53 ; Read CSR
54 ; Data? non-zero - ok
55 ; zero - failed
56 ;
57 ; Failure: If the CONI CSR returns zero, it is likely that
58 ; the CONI is failing and timeout has occurred.
59 ;#********************************************************************
60
61 ; Test data
62
63 000000' 254 00 0 00 000005' TSTE1: JRST TG1 ; go start test
64 000001' 400000 000001 EBUS!ZEBUS!1 ; test mask
65 000002' 000000 010374' 0,,[ASCIZ /CONI Works?/] ; ucode,,description
66 000003' 010377' 010401' [EXP E1,MLAST!E22],,[EXP E9,MLAST!E5]
67 000004' 777777 777777 -1 ; failure test table
68
69 ; Start test
70
71 000005' 201 00 0 00 000000' TG1: MOVEI Z2 ; get address of module start
72 000006' 260 17 0 00 000000* GO TRACE ; handle trace output
73
74 000007' 400 15 0 00 000000 TA1: SETZ ERFLG, ; clear error flag
75 000010' 260 17 0 00 000000* GO ERESET ; do an EBUS Reset
76 000011' 260 17 0 00 000000* GO RDCSR ; read CSR
77 000012' 474 15 0 00 000000 SETO ERFLG, ; failed - set error flag
78 000013' 336 00 0 00 000001 SKIPN 1 ; result zero?
79 000014' 474 15 0 00 000000 SETO ERFLG, ; yes - set error flag
80 000015' 027 00 0 00 000021' SCOPER MA1 ; print error message
81 000016' 254 00 0 00 000007' JRST TA1 ; loop on error
82 000017' 254 00 0 00 000020' JRST TX1 ; altmode exit
83
84 ; End of test
85
86 000020' 263 17 0 00 000000 TX1: RTN ; return
87
88 ; Error messages
89
90 000021' 140000 010403' MA1: MSG!TXNOT![ASCIZ /Did EBUS Reset, then CONI CSR - Should be non-zero./]
91 000022' 140000 010416' MSG!TXNOT![ASCIZ /CSR - Actual: 000000,,000000/]
92 000023' 140000 010424' MSG!TXNOT![ASCIZ / Correct: 400003,,000000/]
93 000024' 130000 010432' LAST!MSG!TXYES![ASCIZ /CSR zero after EBUS Reset/]
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 3
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0466
94
95 ;#********************************************************************
96 ;* Test 2 - RH20/Port Interaction
97 ;
98 ; Description: Check for RH20/Port Interaction problems by doing
99 ; a reset, then doing something to an RH20 and then
100 ; seeing if something can be done to the port.
101 ;
102 ; Procedure: EBUS Reset
103 ; Read CSR and save results
104 ; CONI RH0
105 ; Read CSR
106 ; CONI data should be the same as the first
107 ; CONI - if so - ok,
108 ; if not - error
109 ;
110 ; Repeat the EBUS Reset/CONI/CONI sequence
111 ; for each RH1-7 except the port(s).
112 ;
113 ; Failure: The CONI RHx may be decoded and executed partially
114 ; by the port. The second CONI then returns incorrect
115 ; data because it is completing a partially done CONI.
116 ;#********************************************************************
117
118 ; Test data
119
120 000025' 254 00 0 00 000035' TSTE2: JRST TG2 ; go start test
121 000026' 400000 000002 EBUS!ZEBUS!2 ; test mask
122 000027' 000000 010440' 0,,[ASCIZ ^RH20/Port Interaction^]
123 000030' 010377' 010401' [EXP E1,MLAST!E22],,[EXP E9,MLAST!E5]
124 000031' 000000 000123' TSTE3 ; failure test table
125 000032' 000000 000214' TSTE4 ; ...
126 000033' 000000 000307' TSTE5
127 000034' 777777 777777 -1
128
129 ; Start test
130
131 000035' 201 00 0 00 000000' TG2: MOVEI Z2 ; get address of module start
132 000036' 260 17 0 00 000006* GO TRACE ; handle trace output
133 000037' 260 17 0 00 000010* GO ERESET ; do an EBUS Reset
134 000040' 202 16 0 00 013666' MOVEM MBCN,SAVMBC# ; save the MBC number
135 000041' 200 16 0 00 010445' MOVE MBCN,[54000,,0] ; initialize RH number
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 4
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0467
136
137 ; Segment 0-7 of test
138
139 000042' 350 00 0 00 000000* TA2: AOS TSTSUB ; indicate next subtest
140 000043' 400 15 0 00 000000 TA2L: SETZ ERFLG, ; clear error flag
141 000044' 316 16 0 00 013666' CAMN MBCN,SAVMBC ; is this the port under test?
142 000045' 254 00 0 00 000070' JRST TA2X ; yes - do next RH
143
144 000046' 250 16 0 00 013666' EXCH MBCN,SAVMBC ; set up to read port
145 000047' 260 17 0 00 000011* GO RDCSR ; read CSR
146 000050' 255 00 0 00 000000 JFCL ; ignore error
147 000051' 250 16 0 00 013666' EXCH MBCN,SAVMBC ; restore MBC number
148 000052' 202 01 0 00 010362' MOVEM 1,SAVDA1 ; save result
149 000053' 260 17 0 00 000000* GO .CONI ; do a CONI of RH x
150 000054' 202 01 0 00 010363' MOVEM 1,SAVDA2 ; save result
151 000055' 250 16 0 00 013666' EXCH MBCN,SAVMBC ; set up to read port
152 000056' 260 17 0 00 000047* GO RDCSR ; read CSR
153 000057' 255 00 0 00 000000 JFCL ; ignore error
154 000060' 250 16 0 00 013666' EXCH MBCN,SAVMBC ; restore MBC number
155 000061' 202 01 0 00 010364' MOVEM 1,SAVDA3 ; save result
156 000062' 312 01 0 00 010362' CAME 1,SAVDA1 ; data same as before?
157 000063' 474 15 0 00 000000 SETO ERFLG, ; no - set error flag
158 000064' 027 00 0 00 000075' SCOPER MA2 ; print error message
159 000065' 254 00 0 00 000043' JRST TA2L ; loop on error
160 000066' 254 00 0 00 000073' JRST TX2 ; altmode exit
161 000067' 326 15 0 00 000073' JUMPN ERFLG,TX2 ; error? yes - exit
162
163 000070' 270 16 0 00 010446' TA2X: ADD MBCN,[400,,0] ; point to next RH
164 000071' 317 16 0 00 010447' CAMG MBCN,[57400,,0] ; reach RH6 yet?
165 000072' 254 00 0 00 000042' JRST TA2 ; no - loop till done
166
167 ; End of test
168
169 000073' 200 16 0 00 013666' TX2: MOVE MBCN,SAVMBC ; restore MBC number
170 000074' 263 17 0 00 000000 RTN ; return
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 5
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0468
171
172 ; Error messages
173
174 000075' 140000 010450' MA2: MSG!TXNOT![ASCIZ /Did EBUS Reset, then CONI CSR, then CONI RH/]
175 000076' 240000 000102' CALL!TXNOT!MA2PNA
176 000077' 140000 010461' MSG!TXNOT![ASCIZ /Both CONI CSR's should be the same./]
177 000100' 240000 000106' CALL!TXNOT!MA2PNB
178 000101' 230000 010224' LAST!CALL!TXYES!MPNT1 ; Port/RH Interaction Message
179
180 000102' 135 00 0 00 010471' MA2PNA: LDB [POINT 3,MBCN,9] ; get basic 3 bits
181 000103' 037 16 0 00 000003 PNTOCS
182 000104' 037 00 0 00 010472' TMSG <, then CONI CSR.>
183 000105' 263 17 0 00 000000 RTN
184
185 000106' 037 00 0 00 010476' MA2PNB: TMSGC <CONI RH>
186 000107' 135 00 0 00 010471' LDB [POINT 3,MBCN,9] ; get basic 3 bits
187 000110' 037 16 0 00 000003 PNTOCS
188 000111' 037 00 0 00 010500' TMSG <: >
189 000112' 200 00 0 00 010363' MOVE SAVDA2
190 000113' 037 13 0 00 000000 PNTHW
191 000114' 037 00 0 00 010501' TMSGC <CSR (Original): >
192 000115' 200 00 0 00 010362' MOVE SAVDA1
193 000116' 037 13 0 00 000000 PNTHW
194 000117' 037 00 0 00 010505' TMSGC < (After CONI): >
195 000120' 200 00 0 00 010364' MOVE SAVDA3
196 000121' 037 13 0 00 000000 PNTHW
197 000122' 263 17 0 00 000000 RTN ; return
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 6
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0469
198
199 ;#********************************************************************
200 ;* Test 3 - RH20/Port Interaction
201 ;
202 ; Description: Check for RH20/Port Interaction problems by doing
203 ; a reset, then doing something to the port, then
204 ; seeing if something can be done to an RH20.
205 ;
206 ; Procedure: EBUS Reset
207 ; CONI RH0 and save results
208 ; Read CSR
209 ; CONI RH0
210 ; CONI data should be the same as the first
211 ; CONI - if so - ok
212 ; if not - error
213 ;
214 ; Repeat this sequence for each RH1-7 except the port(s).
215 ;
216 ; Failure: The CONI CSR may leave the EBUS Control logic in
217 ; a funny state that causes successive CONI's to
218 ; other devices to fail.
219 ;#********************************************************************
220
221 ; Test data
222
223 000123' 254 00 0 00 000132' TSTE3: JRST TG3 ; go start test
224 000124' 400000 000003 EBUS!ZEBUS!3 ; test mask
225 000125' 000000 010440' 0,,[ASCIZ ^RH20/Port Interaction^]
226 000126' 010377' 010401' [EXP E1,MLAST!E22],,[EXP E9,MLAST!E5]
227 000127' 000000 000214' TSTE4 ; failure test table
228 000130' 000000 000307' TSTE5 ; ...
229 000131' 777777 777777 -1
230
231 ; Start test
232
233 000132' 332 00 0 00 030037 TG3: SKIPE USER ; user mode?
234 GO [MOVE TSTFLG ; yes - ensure this test does not
235 TLO (TUSER) ; get run (but only if not in
236 SKIPN UDEBUG ; debug mode)
237 MOVEM TSTFLG
238 000133' 260 17 0 00 010511' RTN]
239 000134' 201 00 0 00 000000' MOVEI Z2 ; get address of module start
240 000135' 260 17 0 00 000036* GO TRACE ; handle trace output
241 000136' 260 17 0 00 000037* GO ERESET ; do an EBUS Reset
242 000137' 202 16 0 00 013666' MOVEM MBCN,SAVMBC ; save the MBC number
243 000140' 200 16 0 00 010445' MOVE MBCN,[54000,,0] ; initialize RH number
244
245 ; Segment 0-7 of test
246
247 000141' 350 00 0 00 000042* TA3: AOS TSTSUB ; indicate next subtest
248 000142' 400 15 0 00 000000 TA3L: SETZ ERFLG, ; clear error flag
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 7
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0470
249 000143' 316 16 0 00 013666' CAMN MBCN,SAVMBC ; is this the port?
250 000144' 254 00 0 00 000163' JRST TA3X ; yes - do next RH
251 000145' 260 17 0 00 000053* GO .CONI ; do a CONI of RH x
252 000146' 202 01 0 00 010362' MOVEM 1,SAVDA1 ; save result
253 000147' 250 16 0 00 013666' EXCH MBCN,SAVMBC ; set up to read port
254 000150' 260 17 0 00 000056* GO RDCSR ; read CSR
255 000151' 255 00 0 00 000000 JFCL ; ignore error
256 000152' 250 16 0 00 013666' EXCH MBCN,SAVMBC ; restore MBC number
257 000153' 260 17 0 00 000145* GO .CONI ; do a CONI of RH x
258 000154' 202 01 0 00 010363' MOVEM 1,SAVDA2 ; save result
259 000155' 312 01 0 00 010362' CAME 1,SAVDA1 ; data same as before?
260 000156' 474 15 0 00 000000 SETO ERFLG, ; no - set error flag
261 000157' 027 00 0 00 000170' SCOPER MA3 ; print error message
262 000160' 254 00 0 00 000142' JRST TA3L ; loop on error
263 000161' 254 00 0 00 000166' JRST TX3 ; altmode exit
264 000162' 326 15 0 00 000166' JUMPN ERFLG,TX3 ; error? yes - exit
265
266 000163' 270 16 0 00 010446' TA3X: ADD MBCN,[400,,0] ; point to next RH
267 000164' 317 16 0 00 010447' CAMG MBCN,[57400,,0] ; reach RH6 yet?
268 000165' 254 00 0 00 000141' JRST TA3 ; no - loop till done
269
270 ; End of test
271
272 000166' 200 16 0 00 013666' TX3: MOVE MBCN,SAVMBC ; restore MBC number
273 000167' 263 17 0 00 000000 RTN ; return
274
275 ; Error messages
276
277 000170' 240000 000172' MA3: CALL!TXNOT!MA3PNT
278 000171' 230000 010224' LAST!CALL!TXYES!MPNT1 ; Port/RH Interaction Message
279
280 000172' 037 00 0 00 010516' MA3PNT: TMSGC <Did EBUS Reset, then CONI RH>
281 000173' 135 00 0 00 010471' LDB [POINT 3,MBCN,9] ; get basic 3 bits
282 000174' 037 16 0 00 000003 PNTOCS
283 000175' 037 00 0 00 010525' TMSG <, then CONI CSR, then CONI RH>
284 000176' 135 00 0 00 010471' LDB [POINT 3,MBCN,9] ; get basic 3 bits
285 000177' 037 16 0 00 000003 PNTOCS
286 000200' 037 00 0 00 010415' TMSG <.>
287 000201' 037 00 0 00 010533' TMSGC <Both CONI RH's should be the same.>
288
289 000202' 037 00 0 00 010476' TMSGC <CONI RH>
290 000203' 135 00 0 00 010471' LDB [POINT 3,MBCN,9] ; get basic 3 bits
291 000204' 037 16 0 00 000003 PNTOCS
292 000205' 037 00 0 00 010502' TMSG < (Original): >
293 000206' 200 00 0 00 010362' MOVE SAVDA1
294 000207' 037 13 0 00 000000 PNTHW
295 000210' 037 00 0 00 010543' TMSGC < (After RdCSR): >
296 000211' 200 00 0 00 010363' MOVE SAVDA2
297 000212' 037 13 0 00 000000 PNTHW
298 000213' 263 17 0 00 000000 RTN ; return
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 8
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0471
299
300 ;#********************************************************************
301 ;* Test 4 - RH20/Port Interaction
302 ;
303 ; Description: Check for RH20/Port Interaction problems by doing
304 ; a reset, then doing something to an RH20 and then
305 ; seeing if something can be done to the port.
306 ;
307 ; Procedure: EBUS Reset
308 ; Read CSR and save results
309 ; CONO RH0
310 ; Read CSR
311 ; CSR data should be the same as the first
312 ; CSR - if so - ok
313 ; if not - error
314 ;
315 ; Repeat this sequence for each RH1-7 except the port(s).
316 ;
317 ; Failure: The CONO RH0 may be decoded and executed partially
318 ; by the port. The CONI then returns incorrect data
319 ; because it is completing a partially done CONO.
320 ;#********************************************************************
321
322 ; Test data
323
324 000214' 254 00 0 00 000222' TSTE4: JRST TG4 ; go start test
325 000215' 400000 000004 EBUS!ZEBUS!4 ; test mask
326 000216' 000000 010440' 0,,[ASCIZ ^RH20/Port Interaction^]
327 000217' 010377' 010401' [EXP E1,MLAST!E22],,[EXP E9,MLAST!E5]
328 000220' 000000 000307' TSTE5 ; failure test table
329 000221' 777777 777777 -1 ; ...
330
331 ; Start test
332
333 000222' 332 00 0 00 030037 TG4: SKIPE USER ; user mode?
334 GO [MOVE TSTFLG ; yes - ensure this test does not
335 TLO (TUSER) ; get run (but only if not in
336 SKIPN UDEBUG ; debug mode)
337 MOVEM TSTFLG
338 000223' 260 17 0 00 010511' RTN]
339 000224' 201 00 0 00 000000' MOVEI Z2 ; get address of module start
340 000225' 260 17 0 00 000135* GO TRACE ; handle trace output
341 000226' 202 16 0 00 013666' MOVEM MBCN,SAVMBC ; save the MBC number
342 000227' 200 16 0 00 010445' MOVE MBCN,[54000,,0] ; initialize RH number
343
344 ; Segment 0-7 of test
345
346 000230' 350 00 0 00 000141* TA4: AOS TSTSUB ; indicate next subtest
347 000231' 400 15 0 00 000000 TA4L: SETZ ERFLG, ; clear error flag
348 000232' 316 16 0 00 013666' CAMN MBCN,SAVMBC ; is this the port?
349 000233' 254 00 0 00 000257' JRST TA4X ; yes - do next RH
350
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 9
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351 000234' 260 17 0 00 000136* GO ERESET ; do an EBUS Reset
352 000235' 250 16 0 00 013666' EXCH MBCN,SAVMBC ; set up to read port
353 000236' 260 17 0 00 000150* GO RDCSR ; read CSR
354 000237' 255 00 0 00 000000 JFCL ; ignore error
355 000240' 202 01 0 00 010362' MOVEM 1,SAVDA1 ; save result
356 000241' 250 16 0 00 013666' EXCH MBCN,SAVMBC ; restore MBC number
357 000242' 201 01 0 00 002000 MOVEI 1,2000 ; set some RH bits
358 000243' 260 17 0 00 000000* GO .CONO ; do a CONO of RH x
359 000244' 250 16 0 00 013666' EXCH MBCN,SAVMBC ; set up to read port
360 000245' 260 17 0 00 000236* GO RDCSR ; read CSR
361 000246' 255 00 0 00 000000 JFCL ; ignore error
362 000247' 202 01 0 00 010363' MOVEM 1,SAVDA2 ; save result
363 000250' 250 16 0 00 013666' EXCH MBCN,SAVMBC ; restore MBC number
364 000251' 312 01 0 00 010362' CAME 1,SAVDA1 ; data same as before?
365 000252' 474 15 0 00 000000 SETO ERFLG, ; no - set error flag
366 000253' 027 00 0 00 000264' SCOPER MA4 ; print error message
367 000254' 254 00 0 00 000231' JRST TA4L ; loop on error
368 000255' 254 00 0 00 000262' JRST TX4 ; altmode exit
369 000256' 326 15 0 00 000262' JUMPN ERFLG,TX4 ; error? yes - exit
370
371 000257' 270 16 0 00 010446' TA4X: ADD MBCN,[400,,0] ; point to next RH
372 000260' 317 16 0 00 010447' CAMG MBCN,[57400,,0] ; reach RH6 yet?
373 000261' 254 00 0 00 000230' JRST TA4 ; no - loop till done
374
375 ; End of test
376
377 000262' 200 16 0 00 013666' TX4: MOVE MBCN,SAVMBC ; restore MBC number
378 000263' 263 17 0 00 000000 RTN ; return
379
380 ; Error messages
381
382 000264' 140000 010550' MA4: MSG!TXNOT![ASCIZ /Did EBUS Reset, then CONI CSR, then CONO RH/]
383 000265' 240000 000271' CALL!TXNOT!MA4PNA
384 000266' 140000 010561' MSG!TXNOT![ASCIZ / CONI CSR. Both CONI CSR's should be the same./]
385 000267' 240000 000275' CALL!TXNOT!MA4PNB
386 000270' 230000 010224' LAST!CALL!TXYES!MPNT1 ; Port/RH Interaction Message
387
388 000271' 135 00 0 00 010471' MA4PNA: LDB [POINT 3,MBCN,9]
389 000272' 037 16 0 00 000003 PNTOCS
390 000273' 037 00 0 00 010573' TMSG <, then>
391 000274' 263 17 0 00 000000 RTN
392
393 000275' 037 00 0 00 010575' MA4PNB: TMSGC <CONO on RH>
394 000276' 135 00 0 00 010471' LDB [POINT 3,MBCN,9] ; get basic 3 bits
395 000277' 037 01 0 00 000000 PNT1
396 000300' 037 00 0 00 010501' TMSGC <CSR (Original): >
397 000301' 200 00 0 00 010362' MOVE SAVDA1
398 000302' 037 13 0 00 000000 PNTHW
399 000303' 037 00 0 00 010600' TMSGC < (After CONO): >
400 000304' 200 00 0 00 010363' MOVE SAVDA2
401 000305' 037 13 0 00 000000 PNTHW
402 000306' 263 17 0 00 000000 RTN ; return
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 10
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0473
403
404 ;#********************************************************************
405 ;* Test 5 - RH20/Port Interaction
406 ;
407 ; Description: Check for RH20/Port Interaction problems by doing
408 ; a reset, then doing something to the port, then
409 ; seeing if something can be done to an RH20.
410 ;
411 ; Procedure: EBUS Reset
412 ; CONI RH0 and save results
413 ; Write CSR (Set some bits)
414 ; CONI RH0
415 ; CONI data should be the same as the first
416 ; CONI - if so - ok
417 ; if not - error
418 ;
419 ; Repeat this sequence for each RH1-7 except the port(s).
420 ;
421 ; Failure: The CONO CSR may leave the EBUS Control logic in
422 ; a funny state that causes successive CONI's to
423 ; other devices to fail.
424 ;#********************************************************************
425
426 ; Test data
427
428 000307' 254 00 0 00 000314' TSTE5: JRST TG5 ; go start test
429 000310' 400000 000005 EBUS!ZEBUS!5 ; test mask
430 000311' 000000 010440' 0,,[ASCIZ ^RH20/Port Interaction^]
431 000312' 010377' 010401' [EXP E1,MLAST!E22],,[EXP E9,MLAST!E5]
432 000313' 777777 777777 -1 ; failure test table
433
434 ; Start test
435
436 000314' 332 00 0 00 030037 TG5: SKIPE USER ; user mode?
437 GO [MOVE TSTFLG ; yes - ensure this test does not
438 TLO (TUSER) ; get run (but only if not in
439 SKIPN UDEBUG ; debug mode)
440 MOVEM TSTFLG
441 000315' 260 17 0 00 010511' RTN]
442 000316' 201 00 0 00 000000' MOVEI Z2 ; get address of module start
443 000317' 260 17 0 00 000225* GO TRACE ; handle trace output
444 000320' 260 17 0 00 000234* GO ERESET ; do an EBUS Reset
445 000321' 202 16 0 00 013666' MOVEM MBCN,SAVMBC ; save the MBC number
446 000322' 200 16 0 00 010445' MOVE MBCN,[54000,,0] ; initialize RH number
447
448 ; Segment 0-7 of test
449
450 000323' 350 00 0 00 000230* TA5: AOS TSTSUB ; indicate next subtest
451 000324' 400 15 0 00 000000 TA5L: SETZ ERFLG, ; clear error flag
452 000325' 316 16 0 00 010447' CAMN MBCN,[57400,,0] ; is this the port?
453 000326' 254 00 0 00 000345' JRST TA5X ; yes - do next RH
454
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 11
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0474
455 000327' 260 17 0 00 000153* GO .CONI ; do a CONI of RH x
456 000330' 202 01 0 00 010362' MOVEM 1,SAVDA1 ; save result
457 000331' 250 16 0 00 013666' EXCH MBCN,SAVMBC ; set up to read port
458 000332' 201 01 0 00 263007 MOVEI 1,263007 ; write some bits to
459 000333' 260 17 0 00 000000* GO LDCSR ; CSR register
460 000334' 250 16 0 00 013666' EXCH MBCN,SAVMBC ; restore MBC number
461 000335' 260 17 0 00 000327* GO .CONI ; do a CONI of RH x
462 000336' 202 01 0 00 010363' MOVEM 1,SAVDA2 ; save result
463 000337' 312 01 0 00 010362' CAME 1,SAVDA1 ; data same as before?
464 000340' 474 15 0 00 000000 SETO ERFLG, ; no - set error flag
465 000341' 027 00 0 00 000352' SCOPER MA5 ; print error message
466 000342' 254 00 0 00 000324' JRST TA5L ; loop on error
467 000343' 254 00 0 00 000350' JRST TX5 ; altmode exit
468 000344' 326 15 0 00 000350' JUMPN ERFLG,TX5 ; error? yes - exit
469
470 000345' 270 16 0 00 010446' TA5X: ADD MBCN,[400,,0] ; point to next RH
471 000346' 317 16 0 00 010447' CAMG MBCN,[57400,,0] ; reach RH6 yet?
472 000347' 254 00 0 00 000323' JRST TA5 ; no - loop till done
473
474 ; End of test
475
476 000350' 200 16 0 00 013666' TX5: MOVE MBCN,SAVMBC ; restore MBC number
477 000351' 263 17 0 00 000000 RTN ; return
478
479 ; Error messages
480
481 000352' 240000 000354' MA5: CALL!TXNOT!MA5PNT
482 000353' 230000 010224' LAST!CALL!TXYES!MPNT1 ; Port/RH Interaction Message
483
484 000354' 037 00 0 00 010516' MA5PNT: TMSGC <Did EBUS Reset, then CONI RH>
485 000355' 135 00 0 00 010471' LDB [POINT 3,MBCN,9]
486 000356' 037 16 0 00 000003 PNTOCS
487 000357' 037 00 0 00 010604' TMSG <, then CONO CSR, then>
488 000360' 037 00 0 00 010611' TMSGC < CONI RH>
489 000361' 135 00 0 00 010471' LDB [POINT 3,MBCN,9]
490 000362' 037 16 0 00 000003 PNTOCS
491 000363' 037 00 0 00 010614' TMSG <. Both CONI RH's should be the same.>
492
493 000364' 037 00 0 00 010476' TMSGC <CONI RH>
494 000365' 135 00 0 00 010471' LDB [POINT 3,MBCN,9] ; get basic 3 bits
495 000366' 037 16 0 00 000003 PNTOCS
496 000367' 037 00 0 00 010502' TMSG < (Original): >
497 000370' 200 00 0 00 010362' MOVE SAVDA1
498 000371' 037 13 0 00 000000 PNTHW
499 000372' 037 00 0 00 010624' TMSGC < (After LDCSR): >
500 000373' 200 00 0 00 010363' MOVE SAVDA2
501 000374' 037 13 0 00 000000 PNTHW
502 000375' 263 17 0 00 000000 RTN ; return
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 12
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0475
503
504 ;#********************************************************************
505 ;* Test 6 - CSR Cleared After Reset
506 ;
507 ; Description: Ensure that an EBUS Reset signal propagates from
508 ; the CBUS to CBus Module and to reset logic on the
509 ; EBus Module correctly.
510 ;
511 ; Procedure: EBUS Reset
512 ; Read CSR
513 ; Correct bits set? yes - ok
514 ; no - error
515 ;
516 ; Failure: Either the reset failed to clear the CSR Register
517 ; or it is not possible to read the CSR Register
518 ; correctly.
519 ;#********************************************************************
520
521 ; Test data
522
523 000376' 254 00 0 00 000410' TSTE6: JRST TG6 ; go start test
524 000377' 400000 000006 EBUS!ZEBUS!6 ; test mask
525 000400' 000000 010631' 0,,[ASCIZ ^CSR Cleared After Reset^]
526 000401' 010636' 000000 [EXP E6,E1,E21,E22,E9,E5,E11,E12,E13,E14,E15,E16,MLAST!E17],,0
527 000402' 000000 000432' TSTE7 ; failure test table
528 000403' 000000 000616' TSTE10 ; ...
529 000404' 000000 000704' TSTE11
530 000405' 000000 000735' TSTE12
531 000406' 000000 001106' TSTE14
532 000407' 777777 777777 -1
533
534 ; Start test
535
536 000410' 332 00 0 00 030037 TG6: SKIPE USER ; user mode?
537 GO [MOVE TSTFLG ; yes - ensure this test does not
538 TLO (TUSER) ; get run (but only if not in
539 SKIPN UDEBUG ; debug mode)
540 MOVEM TSTFLG
541 000411' 260 17 0 00 010511' RTN]
542 000412' 201 00 0 00 000000' MOVEI Z2 ; get address of module start
543 000413' 260 17 0 00 000317* GO TRACE ; handle trace output
544 000414' 200 00 0 00 010653' MOVE [400003,,0] ; set up correct data
545 000415' 202 00 0 00 010367' MOVEM SAVCS2 ; save it
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 13
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0476
546
547 000416' 400 15 0 00 000000 TA6: SETZ ERFLG, ; clear error flag
548 000417' 260 17 0 00 000320* GO ERESET ; do an EBUS reset
549 000420' 260 17 0 00 000335* GO .CONI ; read CSR register
550 000421' 202 01 0 00 010370' MOVEM 1,SAVCS3 ; save data
551 000422' 312 01 0 00 010367' CAME 1,SAVCS2 ; correct bits set?
552 000423' 474 15 0 00 000000 SETO ERFLG, ; no - set error flag
553 000424' 027 00 0 00 000430' SCOPER MA6 ; print error message
554 000425' 254 00 0 00 000416' JRST TA6 ; loop on error
555 000426' 254 00 0 00 000427' JRST TX6 ; altmode exit
556
557 ; End of test
558
559 000427' 263 17 0 00 000000 TX6: RTN ; return
560
561 ; Error messages
562
563 000430' 140000 010654' MA6: MSG!TXNOT![ASCIZ /Do EBUS Reset, then read CSR. CSR incorrect./]
564 000431' 270000 010254' LAST!CALL!TXALL!MPNT5 ; print CSR contents
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 14
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0477
565
566 ;#********************************************************************
567 ;* Test 7 - Read/Write CSR Bits
568 ;
569 ; Description: Ensure that CSR bits can be read and written.
570 ; Each bit including the read/write only bits is
571 ; written. The CSR Register is then read and
572 ; verified, then the bit is cleared and the CSR
573 ; Register read and verified again.
574 ;
575 ; Procedure: EBUS Reset
576 ; Select bit 18
577 ; Write CSR (set a bit)
578 ; Read CSR (read the bit)
579 ; Correct result read? if not - error
580 ; Write CSR (clear the bit)
581 ; Read CSR (read the bit)
582 ; Correct result read? if not - error
583 ;
584 ; Repeat test for each bit 18-35
585 ;
586 ; Failure: ---
587 ;#********************************************************************
588
589 ; Test data
590
591 000432' 254 00 0 00 000440' TSTE7: JRST TG7 ; go start test
592 000433' 400000 000007 EBUS!ZEBUS!7 ; test mask
593 000434' 000000 010666' 0,,[ASCIZ ^Read/Write CSR Bits^]
594 000435' 010672' 000000 [EXP E6,E1,E21,E22,E9,E11,E12,E13,E14,E15,E16,MLAST!E17],,0
595 000436' 000000 000616' TSTE10 ; failure test table
596 000437' 777777 777777 -1 ; ...
597
598 ; Start test
599
600 000440' 201 00 0 00 000000' TG7: MOVEI Z2 ; get address of module start
601 000441' 260 17 0 00 000413* GO TRACE ; handle trace output
602 000442' 400 06 0 00 000000 SETZ 6, ; clear bit table pointer
603
604 ; First, set the bit
605
606 000443' 400 15 0 00 000000 TA7: SETZ ERFLG, ; clear error flag
607 000444' 200 00 0 00 000006 MOVE 6 ; set up subtest number as
608 000445' 231 00 0 00 000003 IDIVI 3 ; pattern number * 2 + 1
609 000446' 242 00 0 00 000001 LSH 1 ; and save
610 000447' 271 00 0 00 000001 ADDI 1
611 000450' 202 00 0 00 000323* MOVEM TSTSUB
612 000451' 336 01 0 06 000530' SKIPN 1,TA7PAT(6) ; get bit to write
613 000452' 254 00 0 00 000511' JRST TX7 ; zero - end of test
614
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 15
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0478
615 000453' 260 17 0 00 000417* GO ERESET ; do an EBUS reset
616 000454' 202 01 0 00 010366' MOVEM 1,SAVCS1 ; save data
617 000455' 260 17 0 00 000333* GO LDCSR ; write data
618 000456' 260 17 0 00 000245* GO RDCSR ; read CSR
619 000457' 255 00 0 00 000000 JFCL ; ignore error
620 000460' 202 01 0 00 010370' MOVEM 1,SAVCS3 ; save data
621 000461' 200 00 0 06 000531' MOVE TA7PAT+1(6) ; get correct data
622 000462' 202 00 0 00 010367' MOVEM SAVCS2 ; save data
623 000463' 312 00 0 00 000001 CAME 1 ; actual same as correct?
624 000464' 474 15 0 00 000000 SETO ERFLG, ; no - set error flag
625 000465' 027 00 0 00 000512' SCOPER MA7 ; print error message
626 000466' 254 00 0 00 000443' JRST TA7 ; loop on error
627 000467' 254 00 0 00 000511' JRST TX7 ; altmode exit
628 000470' 326 15 0 00 000511' JUMPN ERFLG,TX7 ; error? yes - exit
629
630 ; Then, clear the bit
631
632 000471' 350 00 0 00 000450* AOS TSTSUB ; point to next subtest
633 000472' 400 01 0 00 000000 SETZ 1, ; zero
634 000473' 260 17 0 00 000455* GO LDCSR ; clear the bit
635 000474' 260 17 0 00 000456* GO RDCSR ; read CSR
636 000475' 255 00 0 00 000000 JFCL ; ignore error
637 000476' 202 01 0 00 010370' MOVEM 1,SAVCS3 ; save data
638 000477' 200 00 0 06 000532' MOVE TA7PAT+2(6) ; get correct data
639 000500' 202 00 0 00 010367' MOVEM SAVCS2 ; save data
640 000501' 312 00 0 00 000001 CAME 1 ; actual same as correct?
641 000502' 474 15 0 00 000000 SETO ERFLG, ; no - set error flag
642 000503' 027 00 0 00 000521' SCOPER MB7 ; print error message
643 000504' 254 00 0 00 000443' JRST TA7 ; loop on error
644 000505' 254 00 0 00 000511' JRST TX7 ; altmode exit
645 000506' 326 15 0 00 000511' JUMPN ERFLG,TX7 ; error? yes - exit
646
647 ; Increment bit table pointer
648
649 000507' 271 06 0 00 000003 ADDI 6,3 ; point to next entry
650 000510' 254 00 0 00 000443' JRST TA7 ; repeat this segment
651
652 ; End of test
653
654 000511' 263 17 0 00 000000 TX7: RTN ; return
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 16
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0479
655
656 ; Error messages
657
658 000512' 240000 000514' MA7: CALL!TXNOT!MA7PNT ; print data written
659 000513' 270000 010254' LAST!CALL!TXALL!MPNT5 ; print CSR correct/actual
660
661 000514' 037 00 0 00 010706' MA7PNT: TMSGC <Write CSR '>
662 000515' 200 00 0 00 010366' MOVE SAVCS1
663 000516' 037 06 0 00 000000 PNT6
664 000517' 037 00 0 00 010711' TMSG <', then read CSR, verify result.>
665 000520' 263 17 0 00 000000 RTN
666
667 000521' 240000 000523' MB7: CALL!TXNOT!MB7PNT ; print data written
668 000522' 270000 010254' LAST!CALL!TXALL!MPNT5 ; print CSR correct/actual
669
670 000523' 037 00 0 00 010706' MB7PNT: TMSGC <Write CSR '>
671 000524' 200 00 0 00 010366' MOVE SAVCS1
672 000525' 037 06 0 00 000000 PNT6
673 000526' 037 00 0 00 010720' TMSG <', then clear CSR, verify result.>
674 000527' 263 17 0 00 000000 RTN
675
676 000530' 000000 400000 TA7PAT: EXP 400000,400003000000,500003000000 ; bit 18
677 000531' 400003 000000
678 000532' 500003 000000
679 000533' 000000 200000 EXP 200000,500003200000,500003000000 ; bit 19
680 000534' 500003 200000
681 000535' 500003 000000
682 000536' 000000 100000 EXP 100000,500003104000,500003004000 ; bit 20
683 000537' 500003 104000
684 000540' 500003 004000
685 000541' 000000 040000 EXP 040000,500003040000,500003000000 ; bit 21
686 000542' 500003 040000
687 000543' 500003 000000
688 000544' 000000 020000 EXP 020000,500003020000,500003000000 ; bit 22
689 000545' 500003 020000
690 000546' 500003 000000
691 000547' 000000 010000 EXP 010000,500003010000,500003000000 ; bit 23
692 000550' 500003 010000
693 000551' 500003 000000
694 000552' 000000 004000 EXP 004000,500003000000,500003000000 ; bit 24
695 000553' 500003 000000
696 000554' 500003 000000
697 000555' 000000 002000 EXP 002000,500003000000,500003000000 ; bit 25
698 000556' 500003 000000
699 000557' 500003 000000
700 000560' 000000 001000 EXP 001000,500003000000,500003000000 ; bit 26
701 000561' 500003 000000
702 000562' 500003 000000
703 000563' 000000 000400 EXP 000400,500003000400,500003000400 ; bit 27
704 000564' 500003 000400
705 000565' 500003 000400
706 000566' 000000 000200 EXP 000200,500003000000,500003000000 ; bit 28
707 000567' 500003 000000
708 000570' 500003 000000
709 000571' 000000 000100 EXP 000100,500003000000,500003000000 ; bit 29
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 16-1
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0480
710 000572' 500003 000000
711 000573' 500003 000000
712 000574' 000000 000040 EXP 000040,500003000040,500003000040 ; bit 30
713 000575' 500003 000040
714 000576' 500003 000040
715 000577' 000000 000020 EXP 000020,500003000020,500003000020 ; bit 31
716 000600' 500003 000020
717 000601' 500003 000020
718 000602' 000000 000004 EXP 000004,500003000004,500003000000 ; bit 32
719 000603' 500003 000004
720 000604' 500003 000000
721 000605' 000000 000002 EXP 000002,500003000002,500003000000 ; bit 33
722 000606' 500003 000002
723 000607' 500003 000000
724 000610' 000000 000001 EXP 000001,500003000001,500003000000 ; bit 34
725 000611' 500003 000001
726 000612' 500003 000000
727 000613' 000000 000000 EXP 000000,500003000000,500003000000 ; bit 35
728 000614' 500003 000000
729 000615' 500003 000000
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 17
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0481
730
731 ;#********************************************************************
732 ;* TEST 10 - CSR Bits Interaction
733 ;
734 ; Description: Check for interaction between bits of the CSR
735 ; Register. Write them all either ones or zeros and
736 ; verify the results. If any of these bits are tied
737 ; to other CSR bits, the interaction will be seen.
738 ; Also, since the 18 bits of data is put on each
739 ; halfword of the EBUS, interaction between the
740 ; left and right halves of the CSR register may be
741 ; detected.
742 ;
743 ; Procedure: EBUS Reset
744 ; Write CSR with all 1's (except for 'Port Clear'
745 ; and 'MPRun' bits)
746 ; Read CSR and compare against what bits
747 ; should be set - if same - ok
748 ; if not - error
749 ; Write CSR with all 0's
750 ; Read CSR and compare against what bits
751 ; should be set - if same - ok
752 ; if not - error
753 ;
754 ; Failure: Some interaction between the CSR bits occurred,
755 ; which probably was also seen by prior tests.
756 ;#********************************************************************
757
758 ; Test data
759
760 000616' 254 00 0 00 000627' TSTE10: JRST TG10 ; go start test
761 000617' 400000 000010 EBUS!ZEBUS!10 ; test mask
762 000620' 000000 010727' 0,,[ASCIZ ^CSR Bits Interaction^]
763 000621' 010672' 000000 [EXP E6,E1,E21,E22,E9,E11,E12,E13,E14,E15,E16,MLAST!E17],,0
764 000622' 000000 000704' TSTE11 ; failure test table
765 000623' 000000 000735' TSTE12 ; ...
766 000624' 000000 001106' TSTE14
767 000625' 000000 001162' TSTE15
768 000626' 777777 777777 -1
769
770 ; Start test
771
772 000627' 201 00 0 00 000000' TG10: MOVEI Z2 ; get address of module start
773 000630' 260 17 0 00 000441* GO TRACE ; handle trace output
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 18
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0482
774
775 ; 1st segment of test (Segment A)
776
777 000631' 400 15 0 00 000000 TA10: SETZ ERFLG, ; clear error flag
778 000632' 201 00 0 00 000001 MOVEI 1 ; set subtest number
779 000633' 202 00 0 00 000471* MOVEM TSTSUB ; to 1
780 000634' 260 17 0 00 000000* GO IPACLR ; do a 'port clear'
781 000635' 200 01 0 00 010734' MOVE 1,[500003,,370467] ; get data expected
782 000636' 202 01 0 00 010367' MOVEM 1,SAVCS2 ; save it
783 000637' 201 01 0 00 377767 MOVEI 1,377767 ; get all 1's (except PCLEAR and MPRUN)
784 000640' 202 01 0 00 010366' MOVEM 1,SAVCS1 ; save data written
785 000641' 260 17 0 00 000473* GO LDCSR ; write CSR
786 000642' 260 17 0 00 000474* GO RDCSR ; read CSR
787 000643' 474 15 0 00 000000 SETO ERFLG, ; error reading CSR - flag it
788 000644' 202 01 0 00 010370' MOVEM 1,SAVCS3 ; save data read
789 000645' 312 01 0 00 010367' CAME 1,SAVCS2 ; data same as expected?
790 000646' 474 15 0 00 000000 SETO ERFLG, ; no - flag error
791 000647' 027 00 0 00 000675' SCOPER MA10 ; print error message
792 000650' 254 00 0 00 000631' JRST TA10 ; loop on error
793 000651' 254 00 0 00 000674' JRST TX10 ; altmode exit
794 000652' 326 15 0 00 000674' JUMPN ERFLG,TX10 ; error? yes - exit
795
796 ; 2nd segment of test (Segment B)
797
798 000653' 400 15 0 00 000000 TB10: SETZ ERFLG, ; clear error flag
799 000654' 201 00 0 00 000002 MOVEI 2 ; set up subtest number
800 000655' 202 00 0 00 000633* MOVEM TSTSUB ; to 2
801 000656' 260 17 0 00 000634* GO IPACLR ; do a 'port clear'
802 000657' 200 01 0 00 010735' MOVE 1,[500003,,000000] ; get data expected
803 000660' 202 01 0 00 010367' MOVEM 1,SAVCS2 ; save it
804 000661' 400 01 0 00 000000 SETZ 1, ; get all 0's
805 000662' 202 01 0 00 010366' MOVEM 1,SAVCS1 ; save data written
806 000663' 260 17 0 00 000641* GO LDCSR ; write CSR
807 000664' 260 17 0 00 000642* GO RDCSR ; read CSR
808 000665' 474 15 0 00 000000 SETO ERFLG, ; error reading CSR - flag it
809 000666' 202 01 0 00 010370' MOVEM 1,SAVCS3 ; save data read
810 000667' 312 01 0 00 010367' CAME 1,SAVCS2 ; data same as expected?
811 000670' 474 15 0 00 000000 SETO ERFLG, ; no - flag error
812 000671' 027 00 0 00 000675' SCOPER MA10 ; print error message
813 000672' 254 00 0 00 000653' JRST TB10 ; loop on error
814 000673' 254 00 0 00 000674' JRST TX10 ; altmode exit
815
816 ; End of test
817
818 000674' 263 17 0 00 000000 TX10: RTN ; return
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 19
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0483
819
820 ; Error messages
821
822 000675' 240000 000677' MA10: CALL!TXNOT!MA10PN ; print data written
823 000676' 270000 010254' LAST!CALL!TXALL!MPNT5 ; print CSR correct/actual
824
825 000677' 037 00 0 00 010706' MA10PN: TMSGC <Write CSR '>
826 000700' 200 00 0 00 010366' MOVE SAVCS1
827 000701' 037 13 0 00 000000 PNTHW
828 000702' 037 00 0 00 010711' TMSG <', then read CSR, verify result.>
829 000703' 263 17 0 00 000000 RTN
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 20
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0484
830
831 ;#********************************************************************
832 ;* TEST 11 - EBUF Access Test
833 ;
834 ; Description: This test is intended to do a simple test to if
835 ; it is possible to access the EBUF. It just reads
836 ; it and if read it should be zero.
837 ;
838 ; Procedure: EBUS Reset
839 ; Write CSR bit 19 a one (set 'DIAG Test EBUF')
840 ; Read EBUF
841 ; Data should be all 0's - if so - ok
842 ; if not - error
843 ;
844 ; Failure: --
845 ;#********************************************************************
846
847 ; Test data
848
849 000704' 254 00 0 00 000715' TSTE11: JRST TG11 ; go start test
850 000705' 410000 000011 EBUS!MBUS!ZEBUS!11 ; test mask
851 000706' 000000 010736' 0,,[ASCIZ ^EBUF Access Test^]
852 000707' 010742' 010744' [EXP E20,MLAST!E9],,[EXP MLAST!E1]
853 000710' 000000 000735' TSTE12 ; failure test table
854 000711' 000000 001106' TSTE14 ; ...
855 000712' 000000 001162' TSTE15
856 000713' 000000 001220' TSTE16
857 000714' 777777 777777 -1
858
859 ; Start test
860
861 000715' 201 00 0 00 000000' TG11: MOVEI Z2 ; get address of module start
862 000716' 260 17 0 00 000630* GO TRACE ; handle trace output
863
864 000717' 400 15 0 00 000000 TA11: SETZ ERFLG, ; clear error flag
865 000720' 260 17 0 00 000453* GO ERESET ; do an EBUS Reset
866 000721' 201 01 0 00 200000 MOVEI 1,TSTEBF ; set 'Diag Test Ebuf'
867 000722' 260 17 0 00 000663* GO LDCSR ; write it
868 000723' 260 17 0 00 000000* GO RDEBUF ; read EBUF
869 000724' 202 01 0 00 010362' MOVEM 1,SAVDA1 ; save data read
870 000725' 332 00 0 00 000001 SKIPE 1 ; get back zeros?
871 000726' 474 15 0 00 000000 SETO ERFLG, ; no - flag error
872 000727' 027 00 0 00 000733' SCOPER MA11 ; print error message
873 000730' 254 00 0 00 000717' JRST TA11 ; loop on error
874 000731' 254 00 0 00 000732' JRST TX11 ; altmode exit
875
876 ; End of test
877
878 000732' 263 17 0 00 000000 TX11: RTN ; return
879
880 ; Error messages
881
882 000733' 140000 010745' MA11: MSG!TXNOT![ASCIZ /Did EBUS Reset, then read EBUF./]
883 000734' 270000 010236' LAST!CALL!TXALL!MPNT4 ; print EBUS Correct/Actual
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 21
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0485
884
885 ;#********************************************************************
886 ;* TEST 12 - EBUF/CSR Conflict Test
887 ;
888 ; Description: This test verifies that writing the EBUF does not
889 ; also write the CSR Register.
890 ;
891 ; Procedure: EBUS Reset
892 ; Write CSR 1's except 'Port Clear' and error bits.
893 ; Write 0's to EBUF (DATAO EBUF)
894 ; Read CSR
895 ; CSR bits already set should still be
896 ; set - if so - ok
897 ; if not - error
898 ;
899 ; Failure: Any error implicates the RMUX which determines
900 ; which is read - CSR or EBUF.
901 ;#********************************************************************
902
903 ; Test data
904
905 000735' 254 00 0 00 000745' TSTE12: JRST TG12 ; go start test
906 000736' 410000 000012 EBUS!MBUS!ZEBUS!12 ; test mask
907 000737' 000000 010754' 0,,[ASCIZ ^EBUF/CSR Conflict Test^]
908 000740' 010761' 010762' [EXP MLAST!E11],,[EXP E10,E1,E12,E13,E14,E15,E16,MLAST!E17]
909 000741' 000000 001106' TSTE14 ; failure test table
910 000742' 000000 001162' TSTE15 ; ...
911 000743' 000000 001220' TSTE16
912 000744' 777777 777777 -1
913
914 ; Start test
915
916 000745' 201 00 0 00 000000' TG12: MOVEI Z2 ; get address of module start
917 000746' 260 17 0 00 000716* GO TRACE ; handle trace output
918 000747' 200 00 0 00 010772' MOVE [500003,,270467] ; get correct data
919 000750' 202 00 0 00 010367' MOVEM SAVCS2 ; save it
920
921 000751' 400 15 0 00 000000 TA12: SETZ ERFLG, ; clear error flag
922 000752' 260 17 0 00 000720* GO ERESET ; do an EBUS Reset
923 000753' 201 01 0 00 273767 MOVEI 1,273767 ; get CSR bits
924 000754' 260 17 0 00 000722* GO LDCSR ; write to CSR
925 000755' 400 01 0 00 000000 SETZ 1, ; clear AC1
926 000756' 260 17 0 00 000000* GO LDEBUF ; write 0's to EBUF
927 000757' 260 17 0 00 000664* GO RDCSR ; read CSR
928 000760' 474 15 0 00 000000 SETO ERFLG, ; error accessing CSR
929 000761' 202 01 0 00 010370' MOVEM 1,SAVCS3 ; save CSR data
930 000762' 312 01 0 00 010367' CAME 1,SAVCS2 ; same as expected?
931 000763' 474 15 0 00 000000 SETO ERFLG, ; no - flag error
932 000764' 027 00 0 00 000770' SCOPER MA12 ; print error message
933 000765' 254 00 0 00 000751' JRST TA12 ; loop on error
934 000766' 254 00 0 00 000767' JRST TX12 ; altmode exit
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 22
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0486
935
936 ; End of test
937
938 000767' 263 17 0 00 000000 TX12: RTN ; return
939
940 ; Error messages
941
942 000770' 140000 010773' MA12: MSG!TXNOT![ASCIZ /Wrote 273767 to CSR, wrote 0's to EBUF, then read CSR./]
943 000771' 140000 011006' MSG!TXNOT![ASCIZ /CSR should not have changed./]
944 000772' 270000 010254' LAST!CALL!TXALL!MPNT5 ; print CSR correct/actual
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 23
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0487
945
946 ;#********************************************************************
947 ;* TEST 13 - KMUX Parity Generators
948 ;
949 ; Description: The port writes a series of data patterns to the
950 ; KL10 all of which have good parity. If correct
951 ; parity was not generated, a page fail will occur.
952 ;
953 ; Procedure: EBUS Reset
954 ; Load microcode
955 ; Start microcode at location 0
956 ;
957 ; Write data pattern to the port
958 ; Read the same data pattern from the port
959 ; Did a page fail occur due to AR/ARX parity
960 ; error? if no - ok
961 ; if yes - error
962 ;
963 ; Repeat for each data pattern.
964 ;
965 ; Data Patterns: floating one's 777000,,777000
966 ; floating zero's 777777,,000000
967 ; floating 777's 000777,,777777
968 ; floating 000's 777000,,777777
969 ; 000000,,777777 777777,,000777
970 ; 000777,,000777 777777,,777000
971 ; 777000,,000777 777777,,777777
972 ; 000777,,777000 000000,,000000
973 ;
974 ; Failure: KMUX parity generators
975 ;#********************************************************************
976
977 ; Test data
978
979 000773' 254 00 0 00 001000' TSTE13: JRST TG13 ; go start test
980 000774' 400400 000013 EBUS!NDMP!ZEBUS!13 ; test mask
981 000775' 001063' 011014' T13M,,[ASCIZ ^KMUX Parity Generators^]
982 000776' 011021' 011022' [EXP MLAST!E18],,[EXP E9,MLAST!E22]
983 000777' 777777 777777 -1 ; failure test table
984
985 ; Start test
986
987 001000' 332 00 0 00 030037 TG13: SKIPE USER ; user mode?
988 GO [MOVE TSTFLG ; yes - ensure this test does not
989 TLO (TUSER) ; get run (but only if not in
990 SKIPN UDEBUG ; debug mode)
991 MOVEM TSTFLG
992 001001' 260 17 0 00 010511' RTN]
993 001002' 201 00 0 00 000000' MOVEI Z2 ; get address of module start
994 001003' 260 17 0 00 000746* GO TRACE ; handle trace output
995 001004' 201 01 0 00 001063' MOVEI 1,T13M ; set up microcode address
996 001005' 260 17 0 00 000000* GO TLOAD ; load/verify it
997 001006' 263 17 0 00 000000 RTN ; failed - exit test
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 24
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0488
998
999 ; 1st segment of test (Segment A) (Start the port)
1000
1001 001007' 400 15 0 00 000000 TA13: SETZ ERFLG, ; clear error flag
1002 001010' 201 00 0 00 000001 MOVEI 1 ; set subtest number
1003 001011' 202 00 0 00 000655* MOVEM TSTSUB ; to 1
1004 001012' 201 00 0 00 000010 MOVEI MPRUN ; only set MPRUN bit when
1005 001013' 202 00 0 00 000000* MOVEM SDATA ; starting the port
1006 001014' 402 00 0 00 000000* SETZM SNEXT ; set start address to 0
1007 001015' 260 17 0 00 010277' GO MSTART ; start up port
1008 001016' 254 00 0 00 001007' JRST TA13 ; loop on error
1009 001017' 254 00 0 00 001045' JRST TX13 ; altmode exit
1010 001020' 326 15 0 00 001045' JUMPN ERFLG,TX13 ; error? yes - exit
1011
1012 ; Remaining test segments
1013
1014 001021' 400 06 0 00 000000 SETZ 6, ; clear bit table pointer
1015
1016 ; First, get the data pattern to write
1017
1018 001022' 400 15 0 00 000000 TB13: SETZ ERFLG, ; clear error flag
1019 001023' 201 00 0 06 000002 MOVEI 2(6) ; set subtest number to
1020 001024' 202 00 0 00 001011* MOVEM TSTSUB ; pattern number + 1
1021 001025' 200 01 0 06 001634' MOVE 1,T23PAT(6) ; get pattern to write
1022 001026' 306 01 0 00 000377 CAIN 1,377 ; end of table?
1023 001027' 254 00 0 00 001045' JRST TX13 ; yes - end of test
1024 001030' 202 01 0 00 010362' MOVEM 1,SAVDA1 ; save data
1025
1026 ; Write/read data
1027
1028 001031' 402 00 0 00 000000* SETZM PFAIL ; clear page fail flag
1029 001032' 260 17 0 00 000000* GO .DATAO ; write to port
1030 001033' 260 17 0 00 000000* GO .DATAI ; read from port
1031 001034' 202 01 0 00 010363' MOVEM 1,SAVDA2 ; save data read
1032 001035' 332 00 0 00 001031* SKIPE PFAIL ; ARX page fail occurred?
1033 001036' 474 15 0 00 000000 SETO ERFLG, ; yes - flag error
1034
1035 ; Handle error printout
1036
1037 001037' 027 00 0 00 001046' SCOPER MA13 ; print error message
1038 001040' 254 00 0 00 001022' JRST TB13 ; loop on error
1039 001041' 254 00 0 00 001045' JRST TX13 ; altmode exit
1040 001042' 326 15 0 00 001045' JUMPN ERFLG,TX13 ; error? yes - exit
1041
1042 ; Increment data pattern pointer
1043
1044 001043' 350 00 0 00 000006 AOS 6 ; point to next data pattern
1045 001044' 254 00 0 00 001022' JRST TB13 ; repeat this segment
1046
1047 ; End of test
1048
1049 001045' 263 17 0 00 000000 TX13: RTN ; return
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 25
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0489
1050
1051 ; Error messages
1052
1053 001046' 240000 001050' MA13: CALL!TXNOT!MA13PN
1054 001047' 270000 010231' LAST!CALL!TXALL!MPNT2
1055
1056 001050' 037 00 0 00 011024' MA13PN: TMSGC <Wrote '>
1057 001051' 200 00 0 00 010362' MOVE SAVDA1
1058 001052' 037 13 0 00 000000 PNTHW
1059 001053' 037 00 0 00 011026' TMSG <' to port>
1060 001054' 037 00 0 00 011030' TMSGC <Read '>
1061 001055' 200 00 0 00 010363' MOVE SAVDA2
1062 001056' 037 13 0 00 000000 PNTHW
1063 001057' 037 00 0 00 011032' TMSG <' from port>
1064 001060' 037 00 0 00 011035' TMSGC <Page fail (AR/ARX parity error) occurred>
1065 001061' 260 17 0 00 010314' GO PFPNT ; print page fail data
1066 001062' 263 17 0 00 000000 RTN
1067
1068 ; Microcode
1069
1070 001063' 000000 010000 T13M: MWORD <ADDR=0,JMAP,J=1> ; 0
1071 001064' 000000 000040
1072 001065' 000100 030000 MWORD <CJP,J=3,CENA,CCER> ; 1
1073 001066' 000400 100060
1074 001067' 000200 010000 MWORD <JMAP,J=1> ; 2
1075 001070' 000000 000040
1076 001071' 000300 100010 MWORD <LDCT,J=10,SD0,OR,D=2,SELE,MGC=10> ; 3
1077 001072' 732000 005300
1078 001073' 000400 040000 MWORD <RPCT,J=4> ; 4
1079 001074' 000000 000220
1080 001075' 000500 070000 MWORD <CJP,J=7,CENA,CCER> ; 5
1081 001076' 000400 100060
1082 001077' 000600 050000 MWORD <JMAP,J=5> ; 6
1083 001100' 000000 000040
1084 001101' 000700 002020 MWORD <CONT,S0A,OR,D=1,OENA,SELE,MGC=20> ; 7
1085 001102' 431000 005340
1086 001103' 001000 000000 MWORD <JZ> ; 10
1087 001104' 000000 000000
1088 001105' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 26
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0490
1089
1090 ;#********************************************************************
1091 ;* TEST 14 - EBUF/CSR Conflict Test
1092 ;
1093 ; Description: This test does further verification that writing
1094 ; the EBUF does not also write the CSR Register.
1095 ;
1096 ; Procedure: EBUS Reset
1097 ; Write CSR setting bit 19
1098 ; Write 1's to EBUF (DATAO EBUF)
1099 ; Read CSR
1100 ; CSR bits already set should still be
1101 ; set - if so - ok
1102 ; if not - error
1103 ; Read EBUF (DATAI EBUF)
1104 ; Data should be 1's - if so - ok
1105 ; if not - error
1106 ;
1107 ; Failure: Any error implicates the RMUX which determines
1108 ; which is read - CSR or EBUF.
1109 ;#********************************************************************
1110
1111 ; Test data
1112
1113 001106' 254 00 0 00 001115' TSTE14: JRST TG14 ; go start test
1114 001107' 410000 000014 EBUS!MBUS!ZEBUS!14 ; test mask
1115 001110' 000000 010754' 0,,[ASCIZ ^EBUF/CSR Conflict Test^]
1116 001111' 010761' 010762' [EXP MLAST!E11],,[EXP E10,E1,E12,E13,E14,E15,E16,MLAST!E17]
1117 001112' 000000 001162' TSTE15 ; failure test table
1118 001113' 000000 001220' TSTE16 ; ...
1119 001114' 777777 777777 -1
1120
1121 ; Start test
1122
1123 001115' 201 00 0 00 000000' TG14: MOVEI Z2 ; get address of module start
1124 001116' 260 17 0 00 001003* GO TRACE ; handle trace output
1125 001117' 200 00 0 00 011046' MOVE [500003,,200000] ; get correct CSR data
1126 001120' 202 00 0 00 010367' MOVEM SAVCS2 ; save it
1127 001121' 476 00 0 00 010372' SETOM SAVEB1 ; set up correct EBUF data
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 27
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0491
1128
1129 ; 1st segment of test (Segment A)
1130
1131 001122' 400 15 0 00 000000 TA14: SETZ ERFLG, ; clear error flag
1132 001123' 201 00 0 00 000001 MOVEI 1 ; set subtest number
1133 001124' 202 00 0 00 001024* MOVEM TSTSUB ; to 1
1134 001125' 260 17 0 00 000752* GO ERESET ; do an EBUS Reset
1135 001126' 201 01 0 00 200000 MOVEI 1,TSTEBF ; get 'DIAG Test EBUF' bit
1136 001127' 260 17 0 00 000754* GO LDCSR ; write to CSR register
1137 001130' 474 01 0 00 000000 SETO 1, ; get 1's
1138 001131' 260 17 0 00 000756* GO LDEBUF ; write to EBUF
1139 001132' 260 17 0 00 000757* GO RDCSR ; read CSR
1140 001133' 474 15 0 00 000000 SETO ERFLG, ; error accessing CSR
1141 001134' 202 01 0 00 010370' MOVEM 1,SAVCS3 ; save CSR data
1142 001135' 312 01 0 00 010367' CAME 1,SAVCS2 ; CSR correct?
1143 001136' 474 15 0 00 000000 SETO ERFLG, ; no - set error flag
1144 001137' 027 00 0 00 001154' SCOPER MA14 ; print error message
1145 001140' 254 00 0 00 001122' JRST TA14 ; loop on error
1146 001141' 254 00 0 00 001153' JRST TX14 ; altmode exit
1147 001142' 326 15 0 00 001153' JUMPN ERFLG,TX14 ; error? yes - exit
1148
1149 ; 2nd segment of test (Segment B)
1150
1151 001143' 350 00 0 00 001124* AOS TSTSUB ; point to next subtest
1152 001144' 260 17 0 00 000723* GO RDEBUF ; read EBUF
1153 001145' 202 01 0 00 010373' MOVEM 1,SAVEB2 ; save EBUF data
1154 001146' 312 01 0 00 010372' CAME 1,SAVEB1 ; EBUF data correct?
1155 001147' 474 15 0 00 000000 SETO ERFLG, ; no - flag error
1156 001150' 027 00 0 00 001157' SCOPER MB14 ; print error message
1157 001151' 254 00 0 00 001122' JRST TA14 ; loop on error
1158 001152' 254 00 0 00 001153' JRST TX14 ; altmode exit
1159
1160 ; End of test
1161
1162 001153' 263 17 0 00 000000 TX14: RTN ; return
1163
1164 ; Error messages
1165
1166 001154' 140000 011047' MA14: MSG!TXNOT![ASCIZ /Write CSR 'Diag Test Ebuf', write 1's to EBUF. CSR got/]
1167 001155' 140000 011063' MSG!TXNOT![ASCIZ /written by write of EBUF./]
1168 001156' 270000 010254' LAST!CALL!TXALL!MPNT5 ; print CSR correct/actual
1169
1170 001157' 140000 011071' MB14: MSG!TXNOT![ASCIZ /Write CSR 'Diag Test Ebuf', write 1's to EBUF/]
1171 001160' 140000 011103' MSG!TXNOT![ASCIZ /Read CSR, then read EBUF. EBUF incorrect/]
1172 001161' 270000 010236' LAST!CALL!TXALL!MPNT4 ; print EBUF correct/actual
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 28
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0492
1173
1174 ;#********************************************************************
1175 ;* TEST 15 - EBUF Reset Test
1176 ;
1177 ; Description: This test verifies that the EBUF is cleared by an
1178 ; EBUS Reset.
1179 ;
1180 ; Procedure: EBUS Reset
1181 ; Write CSR setting bit 19
1182 ; Write 1's to EBUF (DATAO EBUF)
1183 ; EBUS Reset
1184 ; Write CSR setting bit 19
1185 ; Read EBUF (DATAI EBUF)
1186 ; Data should be 0's - if so - ok
1187 ; if not - error
1188 ;
1189 ; Failure: Any error implicates reset logic or EBUF.
1190 ;#********************************************************************
1191
1192 ; Test data
1193
1194 001162' 254 00 0 00 001170' TSTE15: JRST TG15 ; go start test
1195 001163' 400000 000015 EBUS!ZEBUS!15 ; test mask
1196 001164' 000000 011114' 0,,[ASCIZ ^EBUF Reset Test^]
1197 001165' 011120' 000000 [EXP E6,MLAST!E20],,0
1198 001166' 000000 001220' TSTE16 ; failure test table
1199 001167' 777777 777777 -1 ; ...
1200
1201 ; Start test
1202
1203 001170' 332 00 0 00 030037 TG15: SKIPE USER ; user mode?
1204 GO [MOVE TSTFLG ; yes - ensure this test does not
1205 TLO (TUSER) ; get run (but only if not in
1206 SKIPN UDEBUG ; debug mode)
1207 MOVEM TSTFLG
1208 001171' 260 17 0 00 010511' RTN]
1209 001172' 201 00 0 00 000000' MOVEI Z2 ; get address of module start
1210 001173' 260 17 0 00 001116* GO TRACE ; handle trace output
1211 001174' 402 00 0 00 010372' SETZM SAVEB1 ; set up correct EBUF data
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 29
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0493
1212
1213 001175' 400 15 0 00 000000 TA15: SETZ ERFLG, ; clear error flag
1214 001176' 260 17 0 00 001125* GO ERESET ; do an EBUS Reset
1215 001177' 201 01 0 00 200000 MOVEI 1,TSTEBF ; get 'DIAG Test EBUF' bit
1216 001200' 260 17 0 00 001127* GO LDCSR ; write to CSR
1217 001201' 474 01 0 00 000000 SETO 1, ; get all 1's
1218 001202' 260 17 0 00 001131* GO LDEBUF ; write to EBUF
1219 001203' 260 17 0 00 001176* GO ERESET ; do an EBUS Reset
1220 001204' 201 01 0 00 200000 MOVEI 1,TSTEBF ; get 'DIAG Test EBUF' bit
1221 001205' 260 17 0 00 001200* GO LDCSR ; write to CSR
1222 001206' 260 17 0 00 001144* GO RDEBUF ; write to EBUF
1223 001207' 202 01 0 00 010373' MOVEM 1,SAVEB2 ; save EBUF data
1224 001210' 312 01 0 00 010372' CAME 1,SAVEB1 ; correct (zero)?
1225 001211' 474 15 0 00 000000 SETO ERFLG, ; no - flag error
1226 001212' 027 00 0 00 001216' SCOPER MA15 ; print error message
1227 001213' 254 00 0 00 001175' JRST TA15 ; loop on error
1228 001214' 254 00 0 00 001215' JRST TX15 ; altmode exit
1229
1230 ; End of test
1231
1232 001215' 263 17 0 00 000000 TX15: RTN ; return
1233
1234 ; Error messages
1235
1236 001216' 140000 011122' MA15: MSG!TXNOT![ASCIZ /EBUS Reset did not clear EBUF./]
1237 001217' 270000 010236' LAST!CALL!TXALL!MPNT4 ; print EBUF correct/actual
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 30
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0494
1238
1239 ;#********************************************************************
1240 ;* TEST 16 - EBUF Data Path Test
1241 ;
1242 ; Description: This test verifies that the data path to the EBUF
1243 ; and looped back on the MBus is valid.
1244 ;
1245 ; Procedure: EBUS Reset
1246 ; Write CSR setting bit 19
1247 ; Write data pattern to EBUF (DATAO EBUF)
1248 ; Read EBUF (DATAI EBUF)
1249 ; Data the same - if so - ok
1250 ; if not - error
1251 ;
1252 ; Repeat with remaining data patterns
1253 ;
1254 ; Data Patterns: zero's
1255 ; one's
1256 ; alternating (52..)
1257 ; alternating (25..)
1258 ; floating one
1259 ; floating zero
1260 ;
1261 ; Failure: ---
1262 ;#********************************************************************
1263
1264 ; Test data
1265
1266 001220' 254 00 0 00 001225' TSTE16: JRST TG16 ; go start test
1267 001221' 410000 000016 EBUS!MBUS!ZEBUS!16 ; test mask
1268 001222' 000000 011131' 0,,[ASCIZ ^EBUF Data Path Test^]
1269 001223' 011121' 011135' [EXP MLAST!E20],,[EXP MLAST!E6]
1270 001224' 777777 777777 -1 ; failure test table
1271
1272 ; Start test
1273
1274 001225' 201 00 0 00 000000' TG16: MOVEI Z2 ; get address of module start
1275 001226' 260 17 0 00 001173* GO TRACE ; handle trace output
1276 001227' 400 06 0 00 000000 SETZ 6, ; clear bit table pointer
1277
1278 ; First, get the data pattern to write
1279
1280 001230' 400 15 0 00 000000 TA16: SETZ ERFLG, ; clear error flag
1281 001231' 201 00 0 06 000001 MOVEI 1(6) ; set subtest number to
1282 001232' 202 00 0 00 001143* MOVEM TSTSUB ; pattern number + 1
1283 001233' 200 01 0 06 001261' MOVE 1,T16PAT(6) ; get pattern to write
1284 001234' 306 01 0 00 000377 CAIN 1,377 ; end of table?
1285 001235' 254 00 0 00 001256' JRST TX16 ; yes - end of test
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 31
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0495
1286
1287 ; First test segment - verify EBUF write/read correctly
1288
1289 001236' 202 01 0 00 010372' MOVEM 1,SAVEB1 ; save data
1290 001237' 260 17 0 00 001203* GO ERESET ; do an EBUS Reset
1291 001240' 201 01 0 00 200000 MOVEI 1,TSTEBF ; get 'DIAG Test EBUF' bit
1292 001241' 260 17 0 00 001205* GO LDCSR ; write to CSR
1293 001242' 200 01 0 00 010372' MOVE 1,SAVEB1 ; get data pattern
1294 001243' 260 17 0 00 001202* GO LDEBUF ; write to EBUF
1295 001244' 260 17 0 00 001206* GO RDEBUF ; write to EBUF
1296 001245' 202 01 0 00 010373' MOVEM 1,SAVEB2 ; save EBUF data
1297 001246' 312 01 0 00 010372' CAME 1,SAVEB1 ; correct?
1298 001247' 474 15 0 00 000000 SETO ERFLG, ; no - flag error
1299 001250' 027 00 0 00 001257' SCOPER MA16 ; print error message
1300 001251' 254 00 0 00 001230' JRST TA16 ; loop on error
1301 001252' 254 00 0 00 001256' JRST TX16 ; altmode exit
1302 001253' 326 15 0 00 001256' JUMPN ERFLG,TX16 ; error? yes - exit
1303
1304 ; Increment data pattern pointer
1305
1306 001254' 350 00 0 00 000006 AOS 6 ; point to next data pattern
1307 001255' 254 00 0 00 001230' JRST TA16 ; repeat this segment
1308
1309 ; End of test
1310
1311 001256' 263 17 0 00 000000 TX16: RTN ; return
1312
1313 ; Error messages
1314
1315 001257' 140000 011136' MA16: MSG!TXNOT![ASCIZ /EBUF data loopback failed./]
1316 001260' 270000 010236' LAST!CALL!TXALL!MPNT4 ; print EBUF correct/actual
1317
1318 ; Data Patterns
1319
1320 001261' 000000 000000 T16PAT: EXP 0,-2,525252525252,252525252525
1321 001262' 777777 777776
1322 001263' 525252 525252
1323 001264' 252525 252525
1324 001265' 000000 000001 EXP 000000000001,000000000002,000000000004
1325 001266' 000000 000002
1326 001267' 000000 000004
1327 001270' 000000 000010 EXP 000000000010,000000000020,000000000040
1328 001271' 000000 000020
1329 001272' 000000 000040
1330 001273' 000000 000100 EXP 000000000100,000000000200,000000000400
1331 001274' 000000 000200
1332 001275' 000000 000400
1333 001276' 000000 001000 EXP 000000001000,000000002000,000000004000
1334 001277' 000000 002000
1335 001300' 000000 004000
1336 001301' 000000 010000 EXP 000000010000,000000020000,000000040000
1337 001302' 000000 020000
1338 001303' 000000 040000
1339 001304' 000000 100000 EXP 000000100000,000000200000,000000400000
1340 001305' 000000 200000
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 31-1
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0496
1341 001306' 000000 400000
1342 001307' 000001 000000 EXP 000001000000,000002000000,000004000000
1343 001310' 000002 000000
1344 001311' 000004 000000
1345 001312' 000010 000000 EXP 000010000000,000020000000,000040000000
1346 001313' 000020 000000
1347 001314' 000040 000000
1348 001315' 000100 000000 EXP 000100000000,000200000000,000400000000
1349 001316' 000200 000000
1350 001317' 000400 000000
1351 001320' 001000 000000 EXP 001000000000,002000000000,004000000000
1352 001321' 002000 000000
1353 001322' 004000 000000
1354 001323' 010000 000000 EXP 010000000000,020000000000,040000000000
1355 001324' 020000 000000
1356 001325' 040000 000000
1357 001326' 100000 000000 EXP 100000000000,200000000000,400000000000
1358 001327' 200000 000000
1359 001330' 400000 000000
1360 001331' 777777 777776 EXP 777777777776,777777777775,777777777773
1361 001332' 777777 777775
1362 001333' 777777 777773
1363 001334' 777777 777767 EXP 777777777767,777777777757,777777777737
1364 001335' 777777 777757
1365 001336' 777777 777737
1366 001337' 777777 777677 EXP 777777777677,777777777577,777777777377
1367 001340' 777777 777577
1368 001341' 777777 777377
1369 001342' 777777 776777 EXP 777777776777,777777775777,777777773777
1370 001343' 777777 775777
1371 001344' 777777 773777
1372 001345' 777777 767777 EXP 777777767777,777777757777,777777737777
1373 001346' 777777 757777
1374 001347' 777777 737777
1375 001350' 777777 677777 EXP 777777677777,777777577777,777777377777
1376 001351' 777777 577777
1377 001352' 777777 377777
1378 001353' 777776 777777 EXP 777776777777,777775777777,777773777777
1379 001354' 777775 777777
1380 001355' 777773 777777
1381 001356' 777767 777777 EXP 777767777777,777757777777,777737777777
1382 001357' 777757 777777
1383 001360' 777737 777777
1384 001361' 777677 777777 EXP 777677777777,777577777777,777377777777
1385 001362' 777577 777777
1386 001363' 777377 777777
1387 001364' 776777 777777 EXP 776777777777,775777777777,773777777777
1388 001365' 775777 777777
1389 001366' 773777 777777
1390 001367' 767777 777777 EXP 767777777777,757777777777,737777777777
1391 001370' 757777 777777
1392 001371' 737777 777777
1393 001372' 677777 777777 EXP 677777777777,577777777777,377777777777
1394 001373' 577777 777777
1395 001374' 377777 777777
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 31-2
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0497
1396 001375' 000000 000377 EXP 377 ; table terminator
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 32
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0498
1397
1398 ;#********************************************************************
1399 ;* TEST 17 - CSR Bit 18 Self Clearing Test
1400 ;
1401 ; Description: This test verifies that the clear bit resets
1402 ; after the clear is done.
1403 ;
1404 ; Procedure: EBUS Reset
1405 ; Write CSR setting bit 18
1406 ; Read CSR
1407 ; Bit 18 cleared? if so - ok
1408 ; if not - error
1409 ;
1410 ; Failure: ---
1411 ;#********************************************************************
1412
1413 ; Test data
1414
1415 001376' 254 00 0 00 001405' TSTE17: JRST TG17 ; go start test
1416 001377' 400000 000017 EBUS!ZEBUS!17 ; test mask
1417 001400' 000000 011144' 0,,[ASCIZ ^CSR Bit 18 Self Clearing Test^]
1418 001401' 011135' 000000 [EXP MLAST!E6],,0
1419 001402' 000000 001424' TSTE20 ; failure test table
1420 001403' 000000 001453' TSTE21 ; ...
1421 001404' 777777 777777 -1
1422
1423 ; Start test
1424
1425 001405' 201 00 0 00 000000' TG17: MOVEI Z2 ; get address of module start
1426 001406' 260 17 0 00 001226* GO TRACE ; handle trace output
1427
1428 001407' 400 15 0 00 000000 TA17: SETZ ERFLG, ; clear error flag
1429 001410' 260 17 0 00 000656* GO IPACLR ; do a 'port clear'
1430 001411' 260 17 0 00 001132* GO RDCSR ; read CSR
1431 001412' 474 15 0 00 000000 SETO ERFLG, ; error accessing CSR
1432 001413' 202 01 0 00 010365' MOVEM 1,SAVCSR ; save data
1433 001414' 602 01 0 00 400000 TRNE 1,PCLEAR ; 'Port Clear' still set?
1434 001415' 474 15 0 00 000000 SETO ERFLG, ; yes - flag error
1435 001416' 027 00 0 00 001422' SCOPER MA17 ; print error message
1436 001417' 254 00 0 00 001407' JRST TA17 ; loop on error
1437 001420' 254 00 0 00 001421' JRST TX17 ; altmode exit
1438
1439 ; End of test
1440
1441 001421' 263 17 0 00 000000 TX17: RTN ; return
1442
1443 ; Error messages
1444
1445 001422' 140000 011152' MA17: MSG!TXNOT![ASCIZ /CSR Bit 18 'Port Clear' did not self-clear./]
1446 001423' 270000 010231' LAST!CALL!TXALL!MPNT2 ; print CSR data
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 33
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0499
1447
1448 ;#********************************************************************
1449 ;* TEST 20 - CSR Bit 18 Reset Test
1450 ;
1451 ; Description: This test verifies that the clear bit resets the
1452 ; port module (in particular the CSR register).
1453 ;
1454 ; Procedure: EBUS Reset
1455 ; Write CSR setting bit 18 and other bits
1456 ; Read CSR
1457 ; Bits cleared? if so - ok
1458 ; if not - error
1459 ;
1460 ; Failure: ---
1461 ;#********************************************************************
1462
1463 ; Test data
1464
1465 001424' 254 00 0 00 001432' TSTE20: JRST TG20 ; go start test
1466 001425' 400000 000020 EBUS!ZEBUS!20 ; test mask
1467 001426' 000000 011163' 0,,[ASCIZ ^CSR Bit 18 Reset Test^]
1468 001427' 011170' 010744' [EXP E6,E11,E12,E13,E14,E15,E16,MLAST!E17],,[EXP MLAST!E1]
1469 001430' 000000 001453' TSTE21 ; failure test table
1470 001431' 777777 777777 -1 ; ...
1471
1472 ; Start test
1473
1474 001432' 201 00 0 00 000000' TG20: MOVEI Z2 ; get address of module start
1475 001433' 260 17 0 00 001406* GO TRACE ; handle trace output
1476 001434' 200 00 0 00 010653' MOVE [400003,,0] ; get correct CSR data
1477 001435' 202 00 0 00 010367' MOVEM SAVCS2 ; save it
1478
1479 001436' 400 15 0 00 000000 TA20: SETZ ERFLG, ; clear error flag
1480 001437' 260 17 0 00 001410* GO IPACLR ; do a 'port clear'
1481 001440' 260 17 0 00 001411* GO RDCSR ; read CSR
1482 001441' 474 15 0 00 000000 SETO ERFLG, ; error accessing CSR
1483 001442' 202 01 0 00 010370' MOVEM 1,SAVCS3 ; save data
1484 001443' 312 01 0 00 010367' CAME 1,SAVCS2 ; CSR cleared?
1485 001444' 474 15 0 00 000000 SETO ERFLG, ; no - flag error
1486 001445' 027 00 0 00 001451' SCOPER MA20 ; print error message
1487 001446' 254 00 0 00 001436' JRST TA20 ; loop on error
1488 001447' 254 00 0 00 001450' JRST TX20 ; altmode exit
1489
1490 ; End of test
1491
1492 001450' 263 17 0 00 000000 TX20: RTN ; return
1493
1494 ; Error messages
1495
1496 001451' 140000 011200' MA20: MSG!TXNOT![ASCIZ /CSR Bit 18 'Port Clear' did not reset proper bits in CSR./]
1497 001452' 270000 010254' LAST!CALL!TXALL!MPNT5 ; print CSR correct/actual
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 34
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0500
1498
1499 ;#********************************************************************
1500 ;* TEST 21 - CSR Bit 18 Reset Test
1501 ;
1502 ; Description: This test verifies that the clear bit resets the
1503 ; port module (in particular the EBUF).
1504 ;
1505 ; Procedure: EBUS Reset
1506 ; Write CSR setting bit 19
1507 ; Write 1's to EBUF (DATAO EBUF)
1508 ; Write CSR setting bit 18
1509 ; Write CSR setting bit 19
1510 ; Read EBUF (DATAI EBUF)
1511 ; Bits cleared? if so - ok
1512 ; if not - error
1513 ;
1514 ; Failure: ---
1515 ;#********************************************************************
1516
1517 ; Test data
1518
1519 001453' 254 00 0 00 001460' TSTE21: JRST TG21 ; go start test
1520 001454' 400000 000021 EBUS!ZEBUS!21 ; test mask
1521 001455' 000000 011163' 0,,[ASCIZ ^CSR Bit 18 Reset Test^]
1522 001456' 011120' 000000 [EXP E6,MLAST!E20],,0
1523 001457' 777777 777777 -1 ; failure test table
1524
1525 ; Start test
1526
1527 001460' 201 00 0 00 000000' TG21: MOVEI Z2 ; get address of module start
1528 001461' 260 17 0 00 001433* GO TRACE ; handle trace output
1529 001462' 402 00 0 00 010372' SETZM SAVEB1 ; set up EBUF correct data
1530
1531 001463' 400 15 0 00 000000 TA21: SETZ ERFLG, ; clear error flag
1532 001464' 260 17 0 00 001237* GO ERESET ; do an EBUS Reset
1533 001465' 201 01 0 00 200000 MOVEI 1,TSTEBF ; get 'DIAG Test EBUF' bit
1534 001466' 260 17 0 00 001241* GO LDCSR ; write to CSR
1535 001467' 474 01 0 00 000000 SETO 1, ; get all 1's
1536 001470' 260 17 0 00 001243* GO LDEBUF ; write to EBUF
1537 001471' 260 17 0 00 001437* GO IPACLR ; do a 'Port Clear'
1538 001472' 201 01 0 00 200000 MOVEI 1,TSTEBF ; get 'DIAG Test EBUF' bit
1539 001473' 260 17 0 00 001466* GO LDCSR ; write to CSR
1540 001474' 260 17 0 00 001244* GO RDEBUF ; write to EBUF
1541 001475' 202 01 0 00 010373' MOVEM 1,SAVEB2 ; save data
1542 001476' 332 00 0 00 000001 SKIPE 1 ; zero?
1543 001477' 474 15 0 00 000000 SETO ERFLG, ; no - flag error
1544 001500' 027 00 0 00 001504' SCOPER MA21 ; print error message
1545 001501' 254 00 0 00 001463' JRST TA21 ; loop on error
1546 001502' 254 00 0 00 001503' JRST TX21 ; altmode exit
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 35
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0501
1547
1548 ; End of test
1549
1550 001503' 263 17 0 00 000000 TX21: RTN ; return
1551
1552 ; Error messages
1553
1554 001504' 140000 011214' MA21: MSG!TXNOT![ASCIZ /'Port Clear' did not clear EBUF./]
1555 001505' 270000 010236' LAST!CALL!TXALL!MPNT4 ; print EBUF correct/actual
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 36
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0502
1556
1557 ;#********************************************************************
1558 ;* TEST 22 - Read/Write EBUF When Ucode Running
1559 ;
1560 ; Description: Verify that the EBUF cannot be written from the
1561 ; KL if the microprocessor is running.
1562 ;
1563 ; Procedure: KL> EBUS Reset
1564 ; KL> Load test ucode
1565 ; KL> Set CSR Bit 19 (DIAG TEST EBUF) and clear EBUF
1566 ; KL> Start micro-sequencer at location 0
1567 ; KL> Read CSR and verify that MPRUN is set
1568 ; KL> Write data pattern to EBUF, read EBUF, Verify
1569 ; that nothing was read.
1570 ; KL> Repeat with several data patterns:
1571 ; 00..01
1572 ; one's
1573 ; 5252..
1574 ; 2525..
1575 ;
1576 ; Failure: The EBUF can be read from the KL side only if the
1577 ; port is not running. This is so the KL does not
1578 ; inadvertently destroy the microcode, while it is
1579 ; running.
1580 ;#********************************************************************
1581
1582 ; Test data
1583
1584 001506' 254 00 0 00 001515' TSTE22: JRST TG22 ; go start test
1585 001507' 400400 000022 EBUS!NDMP!ZEBUS!22 ; test mask
1586 001510' 001561' 011223' T22M,,[ASCIZ ^Read/Write EBUF When Ucode Running^]
1587 001511' 010744' 011232' [EXP MLAST!E1],,[EXP E10,E9,MLAST!E20]
1588 001512' 000000 004751' TSTE55 ; failure test table
1589 001513' 000000 005025' TSTE56 ; ...
1590 001514' 777777 777777 -1
1591
1592 ; Start test
1593
1594 001515' 201 00 0 00 000000' TG22: MOVEI Z2 ; get address of module start
1595 001516' 260 17 0 00 001461* GO TRACE ; handle trace output
1596 001517' 201 01 0 00 001561' MOVEI 1,T22M ; set up microcode address
1597 001520' 260 17 0 00 001005* GO TLOAD ; load/verify it
1598 001521' 263 17 0 00 000000 RTN ; failed - exit test
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 37
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0503
1599
1600 ; 1st segment of test (Segment A) - Start up port
1601
1602 001522' 400 15 0 00 000000 TA22: SETZ ERFLG, ; clear error flag
1603 001523' 201 00 0 00 000001 MOVEI 1 ; set subtest number
1604 001524' 202 00 0 00 001232* MOVEM TSTSUB ; to 1
1605 001525' 260 17 0 00 001471* GO IPACLR ; do a 'port clear'
1606 001526' 201 01 0 00 200000 MOVEI 1,TSTEBF ; get 'Diag Test EBUF' bit
1607 001527' 202 01 0 00 001013* MOVEM 1,SDATA ; save it for start routine
1608 001530' 260 17 0 00 001473* GO LDCSR ; set it in CSR Register
1609 001531' 400 01 0 00 000000 SETZ 1, ; clear AC1
1610 001532' 260 17 0 00 001470* GO LDEBUF ; clear EBUF
1611 001533' 402 00 0 00 001014* SETZM SNEXT ; set start address to 0
1612 001534' 260 17 0 00 010277' GO MSTART ; start up port
1613 001535' 254 00 0 00 001522' JRST TA22 ; loop on error
1614 001536' 254 00 0 00 001556' JRST TX22 ; altmode exit
1615 001537' 326 15 0 00 001556' JUMPN ERFLG,TX22 ; error? yes - exit
1616
1617 ; 2nd segments (B) - Try to write data to EBUF
1618
1619 001540' 402 00 0 00 010372' SETZM SAVEB1 ; set up valid EBUF data
1620 001541' 201 02 0 00 000003 MOVEI 2,3 ; count of data patterns
1621 001542' 350 00 0 00 001524* TB22: AOS TSTSUB ; point to next subtest
1622 MOVE 1,[1 ; get data to write
1623 -1
1624 525252525252
1625 001543' 200 01 0 02 011235' 252525252525](2)
1626 001544' 260 17 0 00 001532* GO LDEBUF ; write EBUF
1627 001545' 260 17 0 00 001474* GO RDEBUF ; read EBUF
1628 001546' 332 00 0 00 000001 SKIPE 1 ; data zero (failed)?
1629 001547' 474 15 0 00 000000 SETO ERFLG, ; no - flag error
1630 001550' 202 01 0 00 010373' MOVEM 1,SAVEB2 ; save data
1631 001551' 027 00 0 00 001557' SCOPER MB22 ; print error message
1632 001552' 254 00 0 00 001522' JRST TA22 ; loop on error
1633 001553' 254 00 0 00 001556' JRST TX22 ; altmode exit
1634 001554' 326 15 0 00 001556' JUMPN ERFLG,TX22 ; abort test on first error
1635 001555' 365 02 0 00 001542' SOJGE 2,TB22 ; loop on data patterns
1636
1637 ; End of test
1638
1639 001556' 263 17 0 00 000000 TX22: RTN ; return
1640
1641 ; Error message - EBUF read and it shouldn't have been
1642
1643 001557' 140000 011241' MB22: MSG!TXNOT![ASCIZ /Shouldn't have been able to read EBUF/]
1644 001560' 270000 010236' LAST!CALL!TXALL!MPNT4
1645
1646 ; Microcode:
1647
1648 001561' 000000 000000 T22M: MWORD <ADDR=0,JZ>
1649 001562' 000000 000000
1650 001563' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 38
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0504
1651
1652 ;#********************************************************************
1653 ;* TEST 23 - Par Gen - Not Forcing an Error
1654 ;
1655 ; Description: Write a series of data patterns to verify that
1656 ; correct parity is being checked when data is
1657 ; received over the EBUS.
1658 ;
1659 ; Procedure: EBUS Reset
1660 ; Write CSR Bit 19 (DIAG TEST EBUF)
1661 ; Write data pattern to EBUF
1662 ; Read CSR register
1663 ; Did parity error bit set? if so - error
1664 ; if not - ok
1665 ;
1666 ; Repeat for each data pattern.
1667 ;
1668 ; Data Patterns: floating one's 777000,,777000
1669 ; floating zero's 777777,,000000
1670 ; floating 777's 000777,,777777
1671 ; floating 000's 777777,,777000
1672 ; 000000,,777777 777777,,000777
1673 ; 000777,,000777 777777,,777000
1674 ; 777000,,000777 777777,,777777
1675 ; 000777,,777000 000000,,000000
1676 ;
1677 ; Failure: ---
1678 ;#********************************************************************
1679
1680 ; Test data
1681
1682 001564' 254 00 0 00 001572' TSTE23: JRST TG23 ; go start test
1683 001565' 400000 000023 EBUS!ZEBUS!23 ; test mask
1684 001566' 000000 011251' 0,,[ASCIZ ^Par Gen - Not Forcing an Error^]
1685 001567' 011260' 011262' [EXP E18,MLAST!E19],,[EXP E16,MLAST!E20]
1686 001570' 000000 001773' TSTE24 ; failure test table
1687 001571' 777777 777777 -1 ; ...
1688
1689 ; Start test
1690
1691 001572' 201 00 0 00 000000' TG23: MOVEI Z2 ; get address of module start
1692 001573' 260 17 0 00 001516* GO TRACE ; handle trace output
1693 001574' 400 06 0 00 000000 SETZ 6, ; clear bit table pointer
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 39
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0505
1694
1695 ; First, get the data pattern to write
1696
1697 001575' 400 15 0 00 000000 TA23: SETZ ERFLG, ; clear error flag
1698 001576' 201 00 0 06 000001 MOVEI 1(6) ; set subtest number to
1699 001577' 202 00 0 00 001542* MOVEM TSTSUB ; pattern number + 1
1700 001600' 200 01 0 06 001634' MOVE 1,T23PAT(6) ; get pattern to write
1701 001601' 306 01 0 00 000377 CAIN 1,377 ; end of table?
1702 001602' 254 00 0 00 001624' JRST TX23 ; yes - end of test
1703 001603' 202 01 0 00 010361' MOVEM 1,SAVDAT ; save data
1704 001604' 260 17 0 00 001464* GO ERESET ; do an EBUS Reset
1705 001605' 201 01 0 00 200000 MOVEI 1,TSTEBF ; get 'DIAG Test EBUF' bit
1706 001606' 260 17 0 00 001530* GO LDCSR ; write to CSR
1707 001607' 200 01 0 00 010361' MOVE 1,SAVDAT ; get data pattern
1708 001610' 260 17 0 00 001544* GO LDEBUF ; write to EBUF
1709 001611' 260 17 0 00 001440* GO RDCSR ; write to EBUF
1710 001612' 474 15 0 00 000000 SETO ERFLG, ; error accessing CSR
1711 001613' 202 01 0 00 010365' MOVEM 1,SAVCSR ; save CSR data
1712 001614' 602 01 0 00 004000 TRNE 1,EBUSPE ; parity error set?
1713 001615' 474 15 0 00 000000 SETO ERFLG, ; yes - flag error
1714 001616' 027 00 0 00 001625' SCOPER MA23 ; print error message
1715 001617' 254 00 0 00 001575' JRST TA23 ; loop on error
1716 001620' 254 00 0 00 001624' JRST TX23 ; altmode exit
1717 001621' 326 15 0 00 001624' JUMPN ERFLG,TX23 ; error? yes - exit
1718
1719 ; Increment data pattern pointer
1720
1721 001622' 350 00 0 00 000006 AOS 6 ; point to next data pattern
1722 001623' 254 00 0 00 001575' JRST TA23 ; repeat this segment
1723
1724 ; End of test
1725
1726 001624' 263 17 0 00 000000 TX23: RTN ; return
1727
1728 ; Error messages
1729
1730 001625' 240000 001627' MA23: CALL!TXNOT!MA23PN
1731 001626' 270000 010272' LAST!CALL!TXALL!MPNT6
1732
1733 001627' 037 00 0 00 011024' MA23PN: TMSGC <Wrote '>
1734 001630' 200 00 0 00 010361' MOVE SAVDAT
1735 001631' 037 13 0 00 000000 PNTHW
1736 001632' 037 00 0 00 011264' TMSG <' to EBUF - PE occurred.>
1737 001633' 263 17 0 00 000000 RTN
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 40
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0506
1738
1739 ; Data Patterns
1740
1741 001634' 000000 000001 T23PAT: EXP 000000000001,000000000002,000000000004
1742 001635' 000000 000002
1743 001636' 000000 000004
1744 001637' 000000 000010 EXP 000000000010,000000000020,000000000040
1745 001640' 000000 000020
1746 001641' 000000 000040
1747 001642' 000000 000100 EXP 000000000100,000000000200,000000000400
1748 001643' 000000 000200
1749 001644' 000000 000400
1750 001645' 000000 001000 EXP 000000001000,000000002000,000000004000
1751 001646' 000000 002000
1752 001647' 000000 004000
1753 001650' 000000 010000 EXP 000000010000,000000020000,000000040000
1754 001651' 000000 020000
1755 001652' 000000 040000
1756 001653' 000000 100000 EXP 000000100000,000000200000,000000400000
1757 001654' 000000 200000
1758 001655' 000000 400000
1759 001656' 000001 000000 EXP 000001000000,000002000000,000004000000
1760 001657' 000002 000000
1761 001660' 000004 000000
1762 001661' 000010 000000 EXP 000010000000,000020000000,000040000000
1763 001662' 000020 000000
1764 001663' 000040 000000
1765 001664' 000100 000000 EXP 000100000000,000200000000,000400000000
1766 001665' 000200 000000
1767 001666' 000400 000000
1768 001667' 001000 000000 EXP 001000000000,002000000000,004000000000
1769 001670' 002000 000000
1770 001671' 004000 000000
1771 001672' 010000 000000 EXP 010000000000,020000000000,040000000000
1772 001673' 020000 000000
1773 001674' 040000 000000
1774 001675' 100000 000000 EXP 100000000000,200000000000,400000000000
1775 001676' 200000 000000
1776 001677' 400000 000000
1777 001700' 777777 777776 EXP 777777777776,777777777775,777777777773
1778 001701' 777777 777775
1779 001702' 777777 777773
1780 001703' 777777 777767 EXP 777777777767,777777777757,777777777737
1781 001704' 777777 777757
1782 001705' 777777 777737
1783 001706' 777777 777677 EXP 777777777677,777777777577,777777777377
1784 001707' 777777 777577
1785 001710' 777777 777377
1786 001711' 777777 776777 EXP 777777776777,777777775777,777777773777
1787 001712' 777777 775777
1788 001713' 777777 773777
1789 001714' 777777 767777 EXP 777777767777,777777757777,777777737777
1790 001715' 777777 757777
1791 001716' 777777 737777
1792 001717' 777777 677777 EXP 777777677777,777777577777,777777377777
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 40-1
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0507
1793 001720' 777777 577777
1794 001721' 777777 377777
1795 001722' 777776 777777 EXP 777776777777,777775777777,777773777777
1796 001723' 777775 777777
1797 001724' 777773 777777
1798 001725' 777767 777777 EXP 777767777777,777757777777,777737777777
1799 001726' 777757 777777
1800 001727' 777737 777777
1801 001730' 777677 777777 EXP 777677777777,777577777777,777377777777
1802 001731' 777577 777777
1803 001732' 777377 777777
1804 001733' 776777 777777 EXP 776777777777,775777777777,773777777777
1805 001734' 775777 777777
1806 001735' 773777 777777
1807 001736' 767777 777777 EXP 767777777777,757777777777,737777777777
1808 001737' 757777 777777
1809 001740' 737777 777777
1810 001741' 677777 777777 EXP 677777777777,577777777777,377777777777
1811 001742' 577777 777777
1812 001743' 377777 777777
1813 001744' 000000 000777 EXP 000000000777,000000777000,000777000000,77700000000
1814 001745' 000000 777000
1815 001746' 000777 000000
1816 001747' 077700 000000
1817 001750' 777777 777000 EXP 777777777000,777777000777,777000777777,00077777777
1818 001751' 777777 000777
1819 001752' 777000 777777
1820 001753' 000077 777777
1821 001754' 000000 777777 EXP 000000777777,000777000777,777000000777
1822 001755' 000777 000777
1823 001756' 777000 000777
1824 001757' 000777 777000 EXP 000777777000,777000777000,777777000000
1825 001760' 777000 777000
1826 001761' 777777 000000
1827 001762' 000777 777777 EXP 000777777777,777000777777,777777000777
1828 001763' 777000 777777
1829 001764' 777777 000777
1830 001765' 777777 777000 EXP 777777777000,777777777777,000000000000
1831 001766' 777777 777777
1832 001767' 000000 000000
1833 001770' 777777 777777 EXP -1,0
1834 001771' 000000 000000
1835 001772' 000000 000377 EXP 377 ; table terminator
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 41
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0508
1836
1837 ;#********************************************************************
1838 ;* TEST 24 - Par Gen - Forcing an Error
1839 ;
1840 ; Description: Set up CSR register so that data sent to the EBus
1841 ; Module results in the detection of a parity error
1842 ; which then appears in the CSR register. Write a
1843 ; series of data patterns and check for a parity
1844 ; error afterwards.
1845 ;
1846 ; Procedure: EBUS Reset
1847 ; Write CSR Bit 20 (Generate EBUS PE)
1848 ; Write data pattern to EBus module
1849 ; Read CSR register
1850 ; Did parity error bit set? if no - error
1851 ; if yes - ok
1852 ;
1853 ; Repeat for each data pattern.
1854 ;
1855 ; Data Patterns: floating one's 777000,,777000
1856 ; floating zero's 777777,,000000
1857 ; floating 777's 000777,,777777
1858 ; floating 000's 777000,,777777
1859 ; 000000,,777777 777777,,000777
1860 ; 000777,,000777 777777,,777000
1861 ; 777000,,000777 777777,,777777
1862 ; 000777,,777000 000000,,000000
1863 ;
1864 ; Failure: ---
1865 ;#********************************************************************
1866
1867 ; Test data
1868
1869 001773' 254 00 0 00 002000' TSTE24: JRST TG24 ; go start test
1870 001774' 400000 000024 EBUS!ZEBUS!24 ; test mask
1871 001775' 000000 011271' 0,,[ASCIZ ^Par Gen - Forcing an Error^]
1872 001776' 011260' 011262' [EXP E18,MLAST!E19],,[EXP E16,MLAST!E20]
1873 001777' 777777 777777 -1 ; failure test table
1874
1875 ; Start test
1876
1877 002000' 201 00 0 00 000000' TG24: MOVEI Z2 ; get address of module start
1878 002001' 260 17 0 00 001573* GO TRACE ; handle trace output
1879 002002' 400 06 0 00 000000 SETZ 6, ; clear bit table pointer
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 42
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0509
1880
1881 ; First, get the data pattern to write
1882
1883 002003' 400 15 0 00 000000 TA24: SETZ ERFLG, ; clear error flag
1884 002004' 201 00 0 06 000001 MOVEI 1(6) ; set subtest number to
1885 002005' 202 00 0 00 001577* MOVEM TSTSUB ; pattern number + 1
1886 002006' 200 01 0 06 001634' MOVE 1,T23PAT(6) ; get pattern to write
1887 002007' 306 01 0 00 000377 CAIN 1,377 ; end of table?
1888 002010' 254 00 0 00 002032' JRST TX24 ; yes - end of test
1889
1890 002011' 202 01 0 00 010361' MOVEM 1,SAVDAT ; save data
1891 002012' 260 17 0 00 001604* GO ERESET ; do an EBUS Reset
1892 002013' 201 01 0 00 300000 MOVEI 1,TSTEBF!GENEPE ; get 'Test EBUF','Gen EBUS PE' bits
1893 002014' 260 17 0 00 001606* GO LDCSR ; write to CSR
1894 002015' 200 01 0 00 010361' MOVE 1,SAVDAT ; get data pattern
1895 002016' 260 17 0 00 001610* GO LDEBUF ; write to EBUF
1896 002017' 260 17 0 00 001611* GO RDCSR ; write to EBUF
1897 002020' 474 15 0 00 000000 SETO ERFLG, ; error accessing CSR
1898 002021' 202 01 0 00 010365' MOVEM 1,SAVCSR ; save CSR data
1899 002022' 606 01 0 00 004000 TRNN 1,EBUSPE ; parity error set?
1900 002023' 474 15 0 00 000000 SETO ERFLG, ; no - flag error
1901 002024' 027 00 0 00 002033' SCOPER MA24 ; print error message
1902 002025' 254 00 0 00 002003' JRST TA24 ; loop on error
1903 002026' 254 00 0 00 002032' JRST TX24 ; altmode exit
1904 002027' 326 15 0 00 002032' JUMPN ERFLG,TX24 ; error? yes - exit
1905
1906 ; Increment data pattern pointer
1907
1908 002030' 350 00 0 00 000006 AOS 6 ; point to next data pattern
1909 002031' 254 00 0 00 002003' JRST TA24 ; repeat this segment
1910
1911 ; End of test
1912
1913 002032' 263 17 0 00 000000 TX24: RTN ; return
1914
1915 ; Error messages
1916
1917 002033' 240000 002035' MA24: CALL!TXNOT!MA24PN
1918 002034' 270000 010231' LAST!CALL!TXALL!MPNT2
1919
1920 002035' 037 00 0 00 011024' MA24PN: TMSGC <Wrote '>
1921 002036' 200 00 0 00 010361' MOVE SAVDAT
1922 002037' 037 13 0 00 000000 PNTHW
1923 002040' 037 00 0 00 011277' TMSG <' to EBUF with 'Gen Ebus PE' set in CSR.>
1924 002041' 037 00 0 00 011310' TMSGC <PE did not occur.>
1925 002042' 263 17 0 00 000000 RTN
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 43
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0510
1926
1927 ;#********************************************************************
1928 ;* TEST 25 - Read only CSR Bits
1929 ;
1930 ; Description: Verify that the CSR bits specified as read only
1931 ; are indeed read only. These are bits 00-10, 14-
1932 ; 23, 29, 32-35.
1933 ;
1934 ; Procedure: KL> EBUS Reset
1935 ; KL> Load test ucode
1936 ; UC> Write CSR bits 00-35 all one's
1937 ; UC> Read the CSR register
1938 ; UC> Put results in EBUF
1939 ; KL> Read EBUF
1940 ; KL> CSR bits ok?
1941 ;
1942 ; Failure: If the bits are returned incorrectly, and the
1943 ; logic to read and write the EBUF is ok, then bits
1944 ; in the EMUX may be affected by other bits connected
1945 ; to the EMUX which would be due to misconnections or
1946 ; legs of the mixers tied together for some reason.
1947 ;#********************************************************************
1948
1949 ; Test data
1950
1951 002043' 254 00 0 00 002050' TSTE25: JRST TG25 ; go start test
1952 002044' 400400 000025 EBUS!NDMP!ZEBUS!25 ; test mask
1953 002045' 002106' 011314' T25M,,[ASCIZ ^Read only CSR Bits^]
1954 002046' 011320' 011322' [EXP E10,MLAST!E7],,[EXP E1,MLAST!M11]
1955 002047' 777777 777777 -1 ; failure test table
1956
1957 ; Start test
1958
1959 002050' 201 00 0 00 000000' TG25: MOVEI Z2 ; get address of module start
1960 002051' 260 17 0 00 002001* GO TRACE ; handle trace output
1961 002052' 201 01 0 00 002106' MOVEI 1,T25M ; set up microcode address
1962 002053' 260 17 0 00 001520* GO TLOAD ; load/verify it
1963 002054' 263 17 0 00 000000 RTN ; failed - exit test
1964
1965 ; 1st segment of test (Segment A) (Start the port)
1966
1967 002055' 400 15 0 00 000000 TA25: SETZ ERFLG, ; clear error flag
1968 002056' 201 00 0 00 000001 MOVEI 1 ; set subtest number
1969 002057' 202 00 0 00 002005* MOVEM TSTSUB ; to 1
1970 002060' 201 00 0 00 000010 MOVEI MPRUN ; only set MPRUN bit when
1971 002061' 202 00 0 00 001527* MOVEM SDATA ; starting the port
1972 002062' 402 00 0 00 001533* SETZM SNEXT ; set start address to 0
1973 002063' 260 17 0 00 010277' GO MSTART ; start up port
1974 002064' 254 00 0 00 002055' JRST TA25 ; loop on error
1975 002065' 254 00 0 00 002103' JRST TX25 ; altmode exit
1976 002066' 326 15 0 00 002103' JUMPN ERFLG,TX25 ; error? yes - exit
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 44
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0511
1977
1978 ; 2nd segment of test (Segment B) (Read EBUF)
1979
1980 002067' 350 00 0 00 002057* AOS TSTSUB ; point to next subtest
1981 002070' 200 01 0 00 011324' MOVE 1,[160,,3210] ; set up correct CSR
1982 002071' 202 01 0 00 010367' MOVEM 1,SAVCS2 ; data
1983 002072' 201 01 0 00 200000 MOVEI 1,TSTEBF ; set 'DIAG Test EBUF' and
1984 002073' 260 17 0 00 002014* GO LDCSR ; stop the port
1985 002074' 260 17 0 00 001545* GO RDEBUF ; read EBUF
1986 002075' 202 01 0 00 010370' MOVEM 1,SAVCS3 ; save EBUF data
1987 002076' 312 01 0 00 010367' CAME 1,SAVCS2 ; same as expected
1988 002077' 474 15 0 00 000000 SETO ERFLG, ; no - flag error
1989 002100' 027 00 0 00 002104' SCOPER MB25 ; print error message
1990 002101' 254 00 0 00 002055' JRST TA25 ; loop on error
1991 002102' 254 00 0 00 002103' JRST TX25 ; altmode exit
1992
1993 ; End of test
1994
1995 002103' 263 17 0 00 000000 TX25: RTN ; return
1996
1997 ; Error message - CSR seen by uproc incorrect
1998
1999 002104' 140000 011325' MB25: MSG!TXNOT![ASCIZ /Ucode wrote CSR bits all 1's, then read CSR - CSR incorrect/]
2000 002105' 270000 010254' LAST!CALL!TXALL!MPNT5
2001
2002 ; Microcode: First write 1's to EBUF and to CSR
2003
2004 002106' 000000 010000 T25M: MWORD <ADDR=0,JMAP,J=1,SD0,AND,B=2,D=2> ; 0
2005 002107' 742001 000040
2006 002110' 000100 002004 MWORD <CONT,S0B,XNOR,B=2,D=1,OENA,SELE,MGC=4> ; 1
2007 002111' 371001 005340
2008 002112' 000200 040040 MWORD <CJP,J=4,CENA,CCGC,SELE,MGC=40> ; 2
2009 002113' 000400 015060
2010 002114' 000300 020000 MWORD <JMAP,J=2> ; 3
2011 002115' 000000 000040
2012 002116' 000400 000200 MWORD <CONT,S0A,A=1,OR,D=1,SELE,MGC=200> ; 4
2013 002117' 431010 005340
2014
2015 ; Read CSR into register 2 and write to EBUF and stop
2016
2017 002120' 000500 070040 MWORD <CJP,J=7,CENA,CCGC,SELE,MGC=40> ; 5
2018 002121' 000400 015060
2019 002122' 000600 050000 MWORD <JMAP,J=5> ; 6
2020 002123' 000000 000040
2021 002124' 000700 000100 MWORD <CONT,SD0,B=2,OR,D=2,SELE,MGC=100> ; 7
2022 002125' 732001 005340
2023 002126' 001000 002004 MWORD <CONT,S0A,A=2,OR,D=1,OENA,SELE,MGC=4> ; 10
2024 002127' 431020 005340
2025 002130' 001100 110000 MWORD <JMAP,J=11> ; 11
2026 002131' 000000 000040
2027 002132' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 45
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0512
2028
2029 ;#********************************************************************
2030 ;* TEST 26 - CSR 01 'DIAG RQST CSR'
2031 ;
2032 ; Description: Verify that when the microcode requests access to
2033 ; the CSR, the KL cannot read or write the CSR
2034 ; register, but gets timeout errors instead.
2035 ;
2036 ; Procedure: KL> EBUS Reset
2037 ; KL> Load test ucode
2038 ; UC> Set 'MPRQSTCSR'
2039 ; KL> Write CSR (to clear port)
2040 ; KL> Read CSR
2041 ; KL> Timeout error?
2042 ;
2043 ; Failure: CSR Bit 01 is 'EBI1 MPRQSTCSRLTCH' and is set
2044 ; whenever 'EBI2 MPRQSTCSR' is set which gets
2045 ; decoded from microword bits.
2046 ;#********************************************************************
2047
2048 ; Test data
2049
2050 002133' 254 00 0 00 002145' TSTE26: JRST TG26 ; go start test
2051 002134' 400400 000026 EBUS!NDMP!ZEBUS!26 ; test mask
2052 002135' 002202' 011341' T26M,,[ASCIZ ^CSR 01 'DIAG RQST CSR'^]
2053 002136' 011346' 011351' [EXP E3,E1,MLAST!E7],,[EXP E9,MLAST!E10]
2054 002137' 000000 002211' TSTE27 ; failure test table
2055 002140' 000000 002272' TSTE30 ; ...
2056 002141' 000000 002347' TSTE31
2057 002142' 000000 002427' TSTE32
2058 002143' 000000 002501' TSTE33
2059 002144' 777777 777777 -1
2060
2061 ; Start test
2062
2063 002145' 201 00 0 00 000000' TG26: MOVEI Z2 ; get address of module start
2064 002146' 260 17 0 00 002051* GO TRACE ; handle trace output
2065 002147' 201 01 0 00 002202' MOVEI 1,T26M ; set up microcode address
2066 002150' 260 17 0 00 002053* GO TLOAD ; load/verify it
2067 002151' 263 17 0 00 000000 RTN ; failed - exit test
2068
2069 ; 1st segment of test (Segment A) (Start the port)
2070
2071 002152' 400 15 0 00 000000 TA26: SETZ ERFLG, ; clear error flag
2072 002153' 201 00 0 00 000001 MOVEI 1 ; set subtest number
2073 002154' 202 00 0 00 002067* MOVEM TSTSUB ; to 1
2074 002155' 201 00 0 00 000010 MOVEI MPRUN ; only set MPRUN bit when
2075 002156' 202 00 0 00 002061* MOVEM SDATA ; starting the port
2076 002157' 201 00 0 00 000001 MOVEI 1 ; set start address to 1
2077 002160' 202 00 0 00 002062* MOVEM SNEXT ; for MSTART
2078 002161' 260 17 0 00 010277' GO MSTART ; start up port
2079 002162' 254 00 0 00 002152' JRST TA26 ; loop on error
2080 002163' 254 00 0 00 002177' JRST TX26 ; altmode exit
2081 002164' 326 15 0 00 002177' JUMPN ERFLG,TX26 ; error? yes - exit
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 46
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0513
2082
2083 ; 2nd segment of test (Segment B) (Write and read CSR)
2084
2085 002165' 350 00 0 00 002154* AOS TSTSUB ; point to next subtest
2086 002166' 400 01 0 00 000000 SETZ 1, ; get 0's
2087 002167' 260 17 0 00 002073* GO LDCSR ; write to CSR
2088 002170' 260 17 0 00 002017* GO RDCSR ; read it
2089 002171' 334 00 0 00 000000 SKIPA ; error - good
2090 002172' 474 15 0 00 000000 SETO ERFLG, ; no error - failed
2091 002173' 202 01 0 00 010365' MOVEM 1,SAVCSR ; save CSR data
2092 002174' 027 00 0 00 002200' SCOPER MB26 ; print error message
2093 002175' 254 00 0 00 002152' JRST TA26 ; loop on error
2094 002176' 254 00 0 00 002177' JRST TX26 ; altmode exit
2095
2096 ; End of test
2097
2098 002177' 263 17 0 00 000000 TX26: RTN ; return
2099
2100 ; Error message - CSR accessible when ucode should have it hung
2101
2102 002200' 140000 011353' MB26: MSG!TXNOT![ASCIZ /KL could access CSR after ucode set 'MPRQSTCSR'/]
2103 002201' 270000 010231' LAST!CALL!TXALL!MPNT2
2104
2105 ; Microcode: Request CSR
2106
2107 002202' 000000 020040 T26M: MWORD <ADDR=0,CJP,J=2,CENA,CCGC,SELE,MGC=40> ; 0
2108 002203' 000400 015060
2109 002204' 000100 000000 MWORD <JMAP,J=0> ; 1
2110 002205' 000000 000040
2111 002206' 000200 020000 MWORD <JMAP,J=2> ; 2
2112 002207' 000000 000040
2113 002210' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 47
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0514
2114
2115 ;#********************************************************************
2116 ;* TEST 27 - CSR 01 'DIAG RQST CSR'
2117 ;
2118 ; Description: Verify that CSR bit 01 sets when the microcode
2119 ; requests access to the CSR.
2120 ;
2121 ; Procedure: KL> EBUS Reset
2122 ; KL> Load test ucode
2123 ; UC> Continually request access to CSR and reads it
2124 ; KL> Read CSR
2125 ; KL> CSR bit 01 set?
2126 ; KL> Repeat the above 2 steps until it happens that
2127 ; we read CSR register just before the micro-
2128 ; processer is granted access to it.
2129 ;
2130 ; Failure: CSR Bit 01 is 'EBI1 MPRQSTCSRLTCH' and is set
2131 ; whenever 'EBI2 MPRQSTCSR' is set which gets
2132 ; decoded from microword bits.
2133 ;#********************************************************************
2134
2135 ; Test data
2136
2137 002211' 254 00 0 00 002222' TSTE27: JRST TG27 ; go start test
2138 002212' 400400 000027 EBUS!NDMP!ZEBUS!27 ; test mask
2139 002213' 002261' 011341' T27M,,[ASCIZ ^CSR 01 'DIAG RQST CSR'^]
2140 002214' 011365' 011351' [EXP MLAST!E3],,[EXP E9,MLAST!E10]
2141 002215' 000000 002272' TSTE30 ; failure test table
2142 002216' 000000 002347' TSTE31 ; ...
2143 002217' 000000 002427' TSTE32
2144 002220' 000000 002501' TSTE33
2145 002221' 777777 777777 -1
2146
2147 ; Start test
2148
2149 002222' 201 00 0 00 000000' TG27: MOVEI Z2 ; get address of module start
2150 002223' 260 17 0 00 002146* GO TRACE ; handle trace output
2151 002224' 201 01 0 00 002261' MOVEI 1,T27M ; set up microcode address
2152 002225' 260 17 0 00 002150* GO TLOAD ; load/verify it
2153 002226' 263 17 0 00 000000 RTN ; failed - exit test
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 48
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0515
2154
2155 ; 1st segment of test (Segment A) (Start the port)
2156
2157 002227' 400 15 0 00 000000 TA27: SETZ ERFLG, ; clear error flag
2158 002230' 201 00 0 00 000001 MOVEI 1 ; set subtest number
2159 002231' 202 00 0 00 002165* MOVEM TSTSUB ; to 1
2160 002232' 201 00 0 00 000010 MOVEI MPRUN ; only set MPRUN bit when
2161 002233' 202 00 0 00 002156* MOVEM SDATA ; starting the port
2162 002234' 201 00 0 00 000003 MOVEI 3 ; set start address to 3
2163 002235' 202 00 0 00 002160* MOVEM SNEXT ; for MSTART
2164 002236' 260 17 0 00 010277' GO MSTART ; start up port
2165 002237' 254 00 0 00 002227' JRST TA27 ; loop on error
2166 002240' 254 00 0 00 002256' JRST TX27 ; altmode exit
2167 002241' 326 15 0 00 002256' JUMPN ERFLG,TX27 ; error? yes - exit
2168
2169 ; 2nd segment of test (Segment B) (Look for bit 01 set in CSR)
2170
2171 002242' 350 00 0 00 002231* AOS TSTSUB ; point to next subtest
2172 002243' 201 01 0 00 000200 MOVEI 1,200 ; check up to 200 times
2173 002244' 260 17 0 00 002170* TB27: GO RDCSR ; read it
2174 002245' 400 01 0 00 000000 SETZ 1, ; error - ensure CSR data cleared
2175 002246' 607 01 0 00 200000 TLNN 1,(CSRRQS) ; set?
2176 002247' 367 01 0 00 002244' SOJG 1,TB27 ; no - keep looking for it
2177 002250' 202 01 0 00 010365' MOVEM 1,SAVCSR ; save CSR data
2178 002251' 607 01 0 00 200000 TLNN 1,(CSRRQS) ; set yet?
2179 002252' 474 15 0 00 000000 SETO ERFLG, ; no - set error flag
2180 002253' 027 00 0 00 002257' SCOPER MB27 ; print error message
2181 002254' 254 00 0 00 002227' JRST TA27 ; loop on error
2182 002255' 254 00 0 00 002256' JRST TX27 ; altmode exit
2183
2184 ; End of test
2185
2186 002256' 263 17 0 00 000000 TX27: RTN ; return
2187
2188 ; Error message - CSR bit 01 did not set
2189
2190 002257' 140000 011366' MB27: MSG!TXNOT![ASCIZ /Could not set Bit 01 'CSRRQS' in CSR/]
2191 002260' 270000 010231' LAST!CALL!TXALL!MPNT2
2192
2193 ; Microcode: Request/read CSR
2194
2195 002261' 000000 020040 T27M: MWORD <ADDR=0,CJP,J=2,CENA,CCGC,SELE,MGC=40> ; 0
2196 002262' 000400 015060
2197 002263' 000100 000000 MWORD <JMAP,J=0> ; 1
2198 002264' 000000 000040
2199 002265' 000200 000100 MWORD <CONT,SELE,MGC=100> ; 2
2200 002266' 000000 005340
2201 002267' 000300 000000 MWORD <JZ> ; 3
2202 002270' 000000 000000
2203 002271' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 49
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0516
2204
2205 ;#********************************************************************
2206 ;* TEST 30 - CSR 01 'DIAG RQST CSR'
2207 ;
2208 ; Description: Verify that CSR bit 01 clears when the microcode
2209 ; reads the CSR register.
2210 ;
2211 ; Procedure: KL> EBUS Reset
2212 ; KL> Load test ucode
2213 ; UC> Set 'MPRQSTCSR'
2214 ; UC> Set 'MPREADCSR'
2215 ; KL> Read CSR
2216 ; KL> CSR bit 01 cleared?
2217 ;
2218 ; Failure: CSR Bit 01 is 'EBI1 MPRQSTCSRLTCH' and is set
2219 ; whenever 'EBI2 MPRQSTCSR' is set which gets
2220 ; decoded from microword bits.
2221 ;#********************************************************************
2222
2223 ; Test data
2224
2225 002272' 254 00 0 00 002302' TSTE30: JRST TG30 ; go start test
2226 002273' 400400 000030 EBUS!NDMP!ZEBUS!30 ; test mask
2227 002274' 002336' 011341' T30M,,[ASCIZ ^CSR 01 'DIAG RQST CSR'^]
2228 002275' 011365' 011376' [EXP MLAST!E3],,[EXP E9,MLAST!E7]
2229 002276' 000000 002347' TSTE31 ; failure test table
2230 002277' 000000 002427' TSTE32 ; ...
2231 002300' 000000 002501' TSTE33
2232 002301' 777777 777777 -1
2233
2234 ; Start test
2235
2236 002302' 201 00 0 00 000000' TG30: MOVEI Z2 ; get address of module start
2237 002303' 260 17 0 00 002223* GO TRACE ; handle trace output
2238 002304' 201 01 0 00 002336' MOVEI 1,T30M ; set up microcode address
2239 002305' 260 17 0 00 002225* GO TLOAD ; load/verify it
2240 002306' 263 17 0 00 000000 RTN ; failed - exit test
2241
2242 ; 1st segment of test (Segment A) (Start the port)
2243
2244 002307' 400 15 0 00 000000 TA30: SETZ ERFLG, ; clear error flag
2245 002310' 201 00 0 00 000001 MOVEI 1 ; set subtest number
2246 002311' 202 00 0 00 002242* MOVEM TSTSUB ; to 1
2247 002312' 201 00 0 00 000010 MOVEI MPRUN ; only set MPRUN bit when
2248 002313' 202 00 0 00 002233* MOVEM SDATA ; starting the port
2249 002314' 201 00 0 00 000001 MOVEI 1 ; set start address to 1
2250 002315' 202 00 0 00 002235* MOVEM SNEXT ; for MSTART
2251 002316' 260 17 0 00 010277' GO MSTART ; start up port
2252 002317' 254 00 0 00 002307' JRST TA30 ; loop on error
2253 002320' 254 00 0 00 002333' JRST TX30 ; altmode exit
2254 002321' 326 15 0 00 002333' JUMPN ERFLG,TX30 ; error? yes - exit
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 50
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0517
2255
2256 ; 2nd segment of test (Segment B) (Verify that bit 01 is cleared in CSR)
2257
2258 002322' 350 00 0 00 002311* AOS TSTSUB ; point to next subtest
2259 002323' 260 17 0 00 002244* GO RDCSR ; read it
2260 002324' 474 15 0 00 000000 SETO ERFLG, ; error
2261 002325' 603 01 0 00 200000 TLNE 1,(CSRRQS) ; set?
2262 002326' 474 15 0 00 000000 SETO ERFLG, ; yes - set error flag
2263 002327' 202 01 0 00 010365' MOVEM 1,SAVCSR ; save CSR data
2264 002330' 027 00 0 00 002334' SCOPER MB30 ; print error message
2265 002331' 254 00 0 00 002307' JRST TA30 ; loop on error
2266 002332' 254 00 0 00 002333' JRST TX30 ; altmode exit
2267
2268 ; End of test
2269
2270 002333' 263 17 0 00 000000 TX30: RTN ; return
2271
2272 ; Error message - CSR bit 01 set
2273
2274 002334' 140000 011400' MB30: MSG!TXNOT![ASCIZ /CSR bit 01 still set after ucode reads CSR/]
2275 002335' 270000 010231' LAST!CALL!TXALL!MPNT2
2276
2277 ; Microcode: Read CSR
2278
2279 002336' 000000 020040 T30M: MWORD <ADDR=0,CJP,J=2,CENA,CCGC,SELE,MGC=40> ; 0
2280 002337' 000400 015060
2281 002340' 000100 000000 MWORD <JMAP,J=0> ; 1
2282 002341' 000000 000040
2283 002342' 000200 000100 MWORD <CONT,SELE,MGC=100> ; 2
2284 002343' 000000 005340
2285 002344' 000300 030000 MWORD <JMAP,J=3> ; 3
2286 002345' 000000 000040
2287 002346' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 51
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0518
2288
2289 ;#********************************************************************
2290 ;* TEST 31 - CSR 01 'DIAG RQST CSR'
2291 ;
2292 ; Description: Verify that CSR bit 01 clears when the microcode
2293 ; writes the CSR register.
2294 ;
2295 ; Procedure: KL> EBUS Reset
2296 ; KL> Load test ucode
2297 ; UC> Set 'MPRQSTCSR'
2298 ; UC> Set 'MPLOADCSR'
2299 ; KL> Read CSR
2300 ; KL> CSR bit 01 cleared?
2301 ;
2302 ; Failure: CSR Bit 01 is 'EBI1 MPRQSTCSRLTCH' and is set
2303 ; whenever 'EBI2 MPRQSTCSR' is set which gets
2304 ; decoded from microword bits.
2305 ;#********************************************************************
2306
2307 ; Test data
2308
2309 002347' 254 00 0 00 002356' TSTE31: JRST TG31 ; go start test
2310 002350' 400400 000031 EBUS!NDMP!ZEBUS!31 ; test mask
2311 002351' 002412' 011341' T31M,,[ASCIZ ^CSR 01 'DIAG RQST CSR'^]
2312 002352' 011365' 011376' [EXP MLAST!E3],,[EXP E9,MLAST!E7]
2313 002353' 000000 002427' TSTE32 ; failure test table
2314 002354' 000000 002501' TSTE33 ; ...
2315 002355' 777777 777777 -1
2316
2317 ; Start test
2318
2319 002356' 201 00 0 00 000000' TG31: MOVEI Z2 ; get address of module start
2320 002357' 260 17 0 00 002303* GO TRACE ; handle trace output
2321 002360' 201 01 0 00 002412' MOVEI 1,T31M ; set up microcode address
2322 002361' 260 17 0 00 002305* GO TLOAD ; load/verify it
2323 002362' 263 17 0 00 000000 RTN ; failed - exit test
2324
2325 ; 1st segment of test (Segment A) (Start the port)
2326
2327 002363' 400 15 0 00 000000 TA31: SETZ ERFLG, ; clear error flag
2328 002364' 201 00 0 00 000001 MOVEI 1 ; set subtest number
2329 002365' 202 00 0 00 002322* MOVEM TSTSUB ; to 1
2330 002366' 201 00 0 00 000010 MOVEI MPRUN ; only set MPRUN bit when
2331 002367' 202 00 0 00 002313* MOVEM SDATA ; starting the port
2332 002370' 201 00 0 00 000005 MOVEI 5 ; set start address to 5
2333 002371' 202 00 0 00 002315* MOVEM SNEXT ; for MSTART
2334 002372' 260 17 0 00 010277' GO MSTART ; start up port
2335 002373' 254 00 0 00 002363' JRST TA31 ; loop on error
2336 002374' 254 00 0 00 002407' JRST TX31 ; altmode exit
2337 002375' 326 15 0 00 002407' JUMPN ERFLG,TX31 ; error? yes - exit
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 52
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0519
2338
2339 ; 2nd segment of test (Segment B) (Verify that bit 01 is cleared in CSR)
2340
2341 002376' 350 00 0 00 002365* AOS TSTSUB ; point to next subtest
2342 002377' 260 17 0 00 002323* GO RDCSR ; read it
2343 002400' 474 15 0 00 000000 SETO ERFLG, ; error
2344 002401' 603 01 0 00 200000 TLNE 1,(CSRRQS) ; set?
2345 002402' 474 15 0 00 000000 SETO ERFLG, ; yes - set error flag
2346 002403' 202 01 0 00 010365' MOVEM 1,SAVCSR ; save CSR data
2347 002404' 027 00 0 00 002410' SCOPER MB31 ; print error message
2348 002405' 254 00 0 00 002363' JRST TA31 ; loop on error
2349 002406' 254 00 0 00 002407' JRST TX31 ; altmode exit
2350
2351 ; End of test
2352
2353 002407' 263 17 0 00 000000 TX31: RTN ; return
2354
2355 ; Error message - CSR bit 01 set
2356
2357 002410' 140000 011411' MB31: MSG!TXNOT![ASCIZ /CSR bit 01 still set after ucode writes CSR/]
2358 002411' 270000 010231' LAST!CALL!TXALL!MPNT2
2359
2360 ; Microcode: Write CSR
2361
2362 002412' 000000 012004 T31M: MWORD <ADDR=0,JMAP,J=1,S0A,A=1,AND,D=1,OENA,SELE,MGC=4>
2363 002413' 441010 005040
2364 002414' 000100 030040 MWORD <CJP,J=3,CENA,CCGC,SELE,MGC=40> ; 1
2365 002415' 000400 015060
2366 002416' 000200 010000 MWORD <JMAP,J=1> ; 2
2367 002417' 000000 000040
2368 002420' 000300 000200 MWORD <CONT,SELE,MGC=200> ; 3
2369 002421' 000000 005340
2370 002422' 000400 040000 MWORD <JMAP,J=4> ; 4
2371 002423' 000000 000040
2372 002424' 000500 000000 MWORD <JZ> ; 5
2373 002425' 000000 000000
2374 002426' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 53
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0520
2375
2376 ;#********************************************************************
2377 ;* TEST 32 - CSR 01 'DIAG RQST CSR'
2378 ;
2379 ; Description: Verify that CSR bit 01 clears when a reset via
2380 ; the CSR register is done.
2381 ;
2382 ; Procedure: KL> EBUS Reset
2383 ; KL> Load test ucode
2384 ; UC> Set 'MPRQSTCSR'
2385 ; KL> Set CSR bit 18 ('Clear Port')
2386 ; KL> Read CSR
2387 ; KL> CSR bit 01 cleared?
2388 ;
2389 ; Failure: ---
2390 ;#********************************************************************
2391
2392 ; Test data
2393
2394 002427' 254 00 0 00 002435' TSTE32: JRST TG32 ; go start test
2395 002430' 400400 000032 EBUS!NDMP!ZEBUS!32 ; test mask
2396 002431' 002472' 011341' T32M,,[ASCIZ ^CSR 01 'DIAG RQST CSR'^]
2397 002432' 011422' 011376' [EXP E3,MLAST!E6],,[EXP E9,MLAST!E7]
2398 002433' 000000 002501' TSTE33 ; failure test table
2399 002434' 777777 777777 -1 ; ...
2400
2401 ; Start test
2402
2403 002435' 201 00 0 00 000000' TG32: MOVEI Z2 ; get address of module start
2404 002436' 260 17 0 00 002357* GO TRACE ; handle trace output
2405 002437' 201 01 0 00 002472' MOVEI 1,T32M ; set up microcode address
2406 002440' 260 17 0 00 002361* GO TLOAD ; load/verify it
2407 002441' 263 17 0 00 000000 RTN ; failed - exit test
2408
2409 ; 1st segment of test (Segment A) (Start the port)
2410
2411 002442' 400 15 0 00 000000 TA32: SETZ ERFLG, ; clear error flag
2412 002443' 201 00 0 00 000001 MOVEI 1 ; set subtest number
2413 002444' 202 00 0 00 002376* MOVEM TSTSUB ; to 1
2414 002445' 201 00 0 00 000010 MOVEI MPRUN ; only set MPRUN bit when
2415 002446' 202 00 0 00 002367* MOVEM SDATA ; starting the port
2416 002447' 201 00 0 00 000001 MOVEI 1 ; set start address to 1
2417 002450' 202 00 0 00 002371* MOVEM SNEXT ; for MSTART
2418 002451' 260 17 0 00 010277' GO MSTART ; start up port
2419 002452' 254 00 0 00 002442' JRST TA32 ; loop on error
2420 002453' 254 00 0 00 002467' JRST TX32 ; altmode exit
2421 002454' 326 15 0 00 002467' JUMPN ERFLG,TX32 ; error? yes - exit
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 54
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0521
2422
2423 ; 2nd segment of test (Segment B) (Verify that bit 01 is cleared in CSR)
2424
2425 002455' 350 00 0 00 002444* AOS TSTSUB ; point to next subtest
2426 002456' 260 17 0 00 001525* GO IPACLR ; do a 'port clear'
2427 002457' 260 17 0 00 002377* GO RDCSR ; read it
2428 002460' 474 15 0 00 000000 SETO ERFLG, ; error
2429 002461' 603 01 0 00 200000 TLNE 1,(CSRRQS) ; set?
2430 002462' 474 15 0 00 000000 SETO ERFLG, ; yes - set error flag
2431 002463' 202 01 0 00 010365' MOVEM 1,SAVCSR ; save CSR data
2432 002464' 027 00 0 00 002470' SCOPER MB32 ; print error message
2433 002465' 254 00 0 00 002442' JRST TA32 ; loop on error
2434 002466' 254 00 0 00 002467' JRST TX32 ; altmode exit
2435
2436 ; End of test
2437
2438 002467' 263 17 0 00 000000 TX32: RTN ; return
2439
2440 ; Error message - CSR bit 01 set
2441
2442 002470' 140000 011424' MB32: MSG!TXNOT![ASCIZ /CSR bit 01 still set after 'Port Clear'/]
2443 002471' 270000 010231' LAST!CALL!TXALL!MPNT2
2444
2445 ; Microcode: Request CSR
2446
2447 002472' 000000 020040 T32M: MWORD <ADDR=0,CJP,J=2,CENA,CCGC,SELE,MGC=40> ; 0
2448 002473' 000400 015060
2449 002474' 000100 000000 MWORD <JMAP,J=0> ; 1
2450 002475' 000000 000040
2451 002476' 000200 020000 MWORD <JMAP,J=2> ; 2
2452 002477' 000000 000040
2453 002500' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 55
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0522
2454
2455 ;#********************************************************************
2456 ;* TEST 33 - CSR 01 'DIAG RQST CSR'
2457 ;
2458 ; Description: Verify that CSR bit 01 clears when a reset via an
2459 ; EBUS Reset is done.
2460 ;
2461 ; Procedure: KL> EBUS Reset
2462 ; KL> Load test ucode
2463 ; UC> Set 'MPRQSTCSR'
2464 ; KL> EBUS Reset
2465 ; KL> Read CSR
2466 ; KL> CSR bit 01 cleared?
2467 ;
2468 ; Failure: ---
2469 ;#********************************************************************
2470
2471 ; Test data
2472
2473 002501' 254 00 0 00 002506' TSTE33: JRST TG33 ; go start test
2474 002502' 400400 000033 EBUS!NDMP!ZEBUS!33 ; test mask
2475 002503' 002545' 011341' T33M,,[ASCIZ ^CSR 01 'DIAG RQST CSR'^]
2476 002504' 011422' 011376' [EXP E3,MLAST!E6],,[EXP E9,MLAST!E7]
2477 002505' 777777 777777 -1 ; failure test table
2478
2479 ; Start test
2480
2481 002506' 332 00 0 00 030037 TG33: SKIPE USER ; user mode?
2482 GO [MOVE TSTFLG ; yes - ensure this test does not
2483 TLO (TUSER) ; get run (but only if not in
2484 SKIPN UDEBUG ; debug mode)
2485 MOVEM TSTFLG
2486 002507' 260 17 0 00 010511' RTN]
2487 002510' 201 00 0 00 000000' MOVEI Z2 ; get address of module start
2488 002511' 260 17 0 00 002436* GO TRACE ; handle trace output
2489 002512' 201 01 0 00 002545' MOVEI 1,T33M ; set up microcode address
2490 002513' 260 17 0 00 002440* GO TLOAD ; load/verify it
2491 002514' 263 17 0 00 000000 RTN ; failed - exit test
2492
2493 ; 1st segment of test (Segment A) (Start the port)
2494
2495 002515' 400 15 0 00 000000 TA33: SETZ ERFLG, ; clear error flag
2496 002516' 201 00 0 00 000001 MOVEI 1 ; set subtest number
2497 002517' 202 00 0 00 002455* MOVEM TSTSUB ; to 1
2498 002520' 201 00 0 00 000010 MOVEI MPRUN ; only set MPRUN bit when
2499 002521' 202 00 0 00 002446* MOVEM SDATA ; starting the port
2500 002522' 201 00 0 00 000001 MOVEI 1 ; set start address to 1
2501 002523' 202 00 0 00 002450* MOVEM SNEXT ; for MSTART
2502 002524' 260 17 0 00 010277' GO MSTART ; start up port
2503 002525' 254 00 0 00 002515' JRST TA33 ; loop on error
2504 002526' 254 00 0 00 002542' JRST TX33 ; altmode exit
2505 002527' 326 15 0 00 002542' JUMPN ERFLG,TX33 ; error? yes - exit
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 56
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0523
2506
2507 ; 2nd segment of test (Segment B) (Verify that bit 01 is cleared in CSR)
2508
2509 002530' 350 00 0 00 002517* AOS TSTSUB ; point to next subtest
2510 002531' 260 17 0 00 002012* GO ERESET ; do an EBUS Reset
2511 002532' 260 17 0 00 002457* GO RDCSR ; read it
2512 002533' 474 15 0 00 000000 SETO ERFLG, ; error
2513 002534' 603 01 0 00 200000 TLNE 1,(CSRRQS) ; set?
2514 002535' 474 15 0 00 000000 SETO ERFLG, ; yes - set error flag
2515 002536' 202 01 0 00 010365' MOVEM 1,SAVCSR ; save CSR data
2516 002537' 027 00 0 00 002543' SCOPER MB33 ; print error message
2517 002540' 254 00 0 00 002515' JRST TA33 ; loop on error
2518 002541' 254 00 0 00 002542' JRST TX33 ; altmode exit
2519
2520 ; End of test
2521
2522 002542' 263 17 0 00 000000 TX33: RTN ; return
2523
2524 ; Error message - CSR bit 01 set
2525
2526 002543' 140000 011434' MB33: MSG!TXNOT![ASCIZ /CSR bit 01 still set after 'EBUS Reset'/]
2527 002544' 270000 010231' LAST!CALL!TXALL!MPNT2
2528
2529 ; Microcode: Request CSR
2530
2531 002545' 000000 020040 T33M: MWORD <ADDR=0,CJP,J=2,CENA,CCGC,SELE,MGC=40> ; 0
2532 002546' 000400 015060
2533 002547' 000100 000000 MWORD <JMAP,J=0> ; 1
2534 002550' 000000 000040
2535 002551' 000200 020000 MWORD <JMAP,J=2> ; 2
2536 002552' 000000 000040
2537 002553' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 57
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0524
2538
2539 ;#********************************************************************
2540 ;* TEST 34 - CSR 02 'DIAG CSR CHNG'
2541 ;
2542 ; Description: Verify that CSR bit 02 sets when the KL writes
2543 ; the CSR register and clears when the port reads
2544 ; it.
2545 ;
2546 ; Procedure: KL> EBUS Reset
2547 ; KL> Load test ucode and start it at location 0
2548 ; (ie. writing CSR register)
2549 ; UC> Read CSR register (this turns off CSR 02)
2550 ; KL> Read CSR register and verify CSR 02 is not set
2551 ; KL> Write the CSR register
2552 ; UC> See that CSR changed and read it again
2553 ; KL> Verify CSR 02 is set
2554 ;
2555 ; Failure: CSR Bit 02 is 'EBI2 CCCSRCHNG' and is set whenever
2556 ; the KL writes the CSR register via a CONO CSR or
2557 ; if an MBUS error occurs.
2558 ;#********************************************************************
2559
2560 ; Test data
2561
2562 002554' 254 00 0 00 002561' TSTE34: JRST TG34 ; go start test
2563 002555' 400400 000034 EBUS!NDMP!ZEBUS!34 ; test mask
2564 002556' 002633' 011444' T34M,,[ASCIZ ^CSR 02 'DIAG CSR CHNG'^]
2565 002557' 011451' 011452' [EXP MLAST!E8],,[EXP E3,MLAST!E9]
2566 002560' 777777 777777 -1 ; failure test table
2567
2568 ; Start test
2569
2570 002561' 201 00 0 00 000000' TG34: MOVEI Z2 ; get address of module start
2571 002562' 260 17 0 00 002511* GO TRACE ; handle trace output
2572 002563' 201 01 0 00 002633' MOVEI 1,T34M ; set up microcode address
2573 002564' 260 17 0 00 002513* GO TLOAD ; load/verify it
2574 002565' 263 17 0 00 000000 RTN ; failed - exit test
2575
2576 ; 1st segment of test (Segment A) (Start the port)
2577
2578 002566' 400 15 0 00 000000 TA34: SETZ ERFLG, ; clear error flag
2579 002567' 201 00 0 00 000001 MOVEI 1 ; set subtest number
2580 002570' 202 00 0 00 002530* MOVEM TSTSUB ; to 1
2581 002571' 201 00 0 00 000010 MOVEI MPRUN ; only set MPRUN bit when
2582 002572' 202 00 0 00 002521* MOVEM SDATA ; starting the port
2583 002573' 201 00 0 00 000001 MOVEI 1 ; set start address to 1
2584 002574' 202 00 0 00 002523* MOVEM SNEXT ; for MSTART
2585 002575' 260 17 0 00 010277' GO MSTART ; start up port
2586 002576' 254 00 0 00 002566' JRST TA34 ; loop on error
2587 002577' 254 00 0 00 002626' JRST TX34 ; altmode exit
2588 002600' 326 15 0 00 002626' JUMPN ERFLG,TX34 ; error? yes - exit
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 58
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0525
2589
2590 ; 2nd segment of test (Segment B) (Verify that bit 02 is cleared in CSR)
2591
2592 002601' 350 00 0 00 002570* AOS TSTSUB ; point to next subtest
2593 002602' 260 17 0 00 002532* GO RDCSR ; read it
2594 002603' 474 15 0 00 000000 SETO ERFLG, ; error
2595 002604' 603 01 0 00 100000 TLNE 1,(CSRCHN) ; bit set?
2596 002605' 474 15 0 00 000000 SETO ERFLG, ; no - set error flag
2597 002606' 202 01 0 00 010365' MOVEM 1,SAVCSR ; save CSR data
2598 002607' 027 00 0 00 002627' SCOPER MA34 ; print error message
2599 002610' 254 00 0 00 002566' JRST TA34 ; loop on error
2600 002611' 254 00 0 00 002626' JRST TX34 ; altmode exit
2601 002612' 326 15 0 00 002626' JUMPN ERFLG,TX34 ; error? yes - exit
2602
2603 ; 3rd segment of test (Segment C) (Verify that bit 02 is set in CSR)
2604
2605 002613' 350 00 0 00 002601* AOS TSTSUB ; point to next subtest
2606 002614' 200 01 0 00 010365' MOVE 1,SAVCSR ; get CSR contents
2607 002615' 260 17 0 00 002167* GO LDCSR ; write CSR
2608 002616' 260 17 0 00 002602* GO RDCSR ; read it
2609 002617' 474 15 0 00 000000 SETO ERFLG, ; error
2610 002620' 607 01 0 00 100000 TLNN 1,(CSRCHN) ; bit set?
2611 002621' 474 15 0 00 000000 SETO ERFLG, ; no - set error flag
2612 002622' 202 01 0 00 010365' MOVEM 1,SAVCSR ; save CSR data
2613 002623' 027 00 0 00 002631' SCOPER MB34 ; print error message
2614 002624' 254 00 0 00 002566' JRST TA34 ; loop on error
2615 002625' 254 00 0 00 002626' JRST TX34 ; altmode exit
2616
2617 ; End of test
2618
2619 002626' 263 17 0 00 000000 TX34: RTN ; return
2620
2621 ; Error message - CSR bit 02 not set
2622
2623 002627' 140000 011454' MA34: MSG!TXNOT![ASCIZ /CSR bit 02 not initially cleared/]
2624 002630' 270000 010231' LAST!CALL!TXALL!MPNT2
2625
2626 002631' 140000 011463' MB34: MSG!TXNOT![ASCIZ /CSR bit 02 not set after KL writes CSR/]
2627 002632' 270000 010231' LAST!CALL!TXALL!MPNT2
2628
2629 ; Microcode: First read CSR to turn off CSR 02
2630
2631 002633' 000000 020040 T34M: MWORD <ADDR=0,CJP,J=2,CENA,CCGC,SELE,MGC=40> ; 0
2632 002634' 000400 015060
2633 002635' 000100 000000 MWORD <JMAP,J=0> ; 1
2634 002636' 000000 000040
2635 002637' 000200 000100 MWORD <CONT,SELE,MGC=100> ; 2
2636 002640' 000000 005340
2637 002641' 000300 030000 MWORD <JMAP,J=3> ; 3 done
2638 002642' 000000 000040
2639 002643' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 59
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0526
2640
2641 ;#********************************************************************
2642 ;* Test 35 - Constant MUX
2643 ;
2644 ; Description: Verify various data patterns can be used by the
2645 ; 2901's via the Cnst MUX correctly.
2646 ;
2647 ; Procedure: Clear Port
2648 ; Load microcode
2649 ;
2650 ; Single step microcode twice doing a JMAP,CONT
2651 ; Read EBUF, verify data matches the data pattern
2652 ; (middle 16 bits are indeterminate)
2653 ;
2654 ; Repeat for starting addresses 0,2,4,6,10,12,14,16,
2655 ; 20,22,24,26,30,32,34,36,40,42,44,46,50,52,54,56
2656 ; which is data patterns floating 0's, floating 1's,
2657 ; 0's,1's, 5252.., and 2525..
2658 ;
2659 ; Failure: ---
2660 ;#********************************************************************
2661
2662 ; Test data
2663
2664 002644' 254 00 0 00 002661' TSTE35: JRST TG35 ; go start test
2665 002645' 410400 000035 EBUS!MBUS!NDMP!ZEBUS!35 ; test mask
2666 002646' 002775' 011473' T35M,,[ASCIZ ^Constant MUX^]
2667 002647' 011476' 011501' [EXP E24,E23,MLAST!M11],,[EXP E7,E20,MLAST!M12]
2668 002650' 000000 003136' TSTE36 ; failure test table
2669 002651' 000000000000# TSTA1 ; ...
2670 002652' 000000000000# TSTA2
2671 002653' 000000000000# TSTA3
2672 002654' 000000000000# TSTA4
2673 002655' 000000000000# TSTA5
2674 002656' 000000000000# TSTA6
2675 002657' 000000000000# TSTA7
2676 002660' 777777 777777 -1
2677
2678 ; Start test
2679
2680 002661' 201 00 0 00 000000' TG35: MOVEI Z2 ; get address of module start
2681 002662' 260 17 0 00 002562* GO TRACE ; handle trace output
2682 002663' 201 01 0 00 002775' MOVEI 1,T35M ; set up microcode address
2683 002664' 260 17 0 00 002564* GO TLOAD ; load/verify it
2684 002665' 263 17 0 00 000000 RTN ; failed - exit test
2685
2686 ; Initialization
2687
2688 002666' 400 15 0 00 000000 TL35: SETZ ERFLG, ; clear error flag
2689 002667' 260 17 0 00 002456* GO IPACLR ; clear port
2690 002670' 201 06 0 00 002711' MOVEI 6,TS35 ; get sstep table address
2691 002671' 402 00 0 00 002613* SETZM TSTSUB ; initialize subtest number
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 60
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0527
2692
2693 ; Loop on single step table entries
2694
2695 002672' 260 17 0 00 000000* TA35: GO BEXEC ; execute table entry
2696 002673' 254 00 0 00 002710' JRST TX35 ; end of sstep table
2697 002674' 254 00 0 00 002672' JRST TA35 ; keep looping after call
2698 002675' 255 00 0 00 000000 JFCL ; error - EBUF data incorrect
2699 002676' 200 01 0 00 000000* MOVE 1,CEBUF ; get correct data
2700 002677' 404 01 0 00 011504' AND 1,[777400,,1777] ; mask out indeterminate bits
2701 002700' 200 02 0 00 000000* MOVE 2,AEBUF ; get actual data
2702 002701' 404 02 0 00 011504' AND 2,[777400,,1777] ; mask out indeterminate bits
2703 002702' 312 01 0 00 000002 CAME 1,2 ; result correct?
2704 002703' 474 15 0 00 000000 SETO ERFLG, ; no - set error flag
2705
2706 ; Handle error printouts and scope looping
2707
2708 002704' 027 00 0 00 002772' SCOPER MA35 ; print error message
2709 002705' 254 00 0 00 002666' JRST TL35 ; loop on error
2710 002706' 254 00 0 00 002710' JRST TX35 ; altmode exit
2711 002707' 322 15 0 00 002672' JUMPE ERFLG,TA35 ; do next sstep table entry
2712
2713 ; End of test
2714
2715 002710' 263 17 0 00 000000 TX35: RTN ; return
2716
2717 ; Sstep table, with EBUF data, as: (CMD,#Steps,Start addr,End Addr,EBUF data)
2718
2719 002711' 100200 000002 TS35: ATABLE (SSSTRT,2,0,2,400000001)
2720 002712' 000400 000001
2721 002713' 100200 020004 ATABLE (SSSTRT,2,2,4,1000000002)
2722 002714' 001000 000002
2723 002715' 100200 040006 ATABLE (SSSTRT,2,4,6,2000000004)
2724 002716' 002000 000004
2725 002717' 100200 060010 ATABLE (SSSTRT,2,6,10,4000000010)
2726 002720' 004000 000010
2727 002721' 100200 100012 ATABLE (SSSTRT,2,10,12,10000000020)
2728 002722' 010000 000020
2729 002723' 100200 120014 ATABLE (SSSTRT,2,12,14,20000000040)
2730 002724' 020000 000040
2731 002725' 100200 140016 ATABLE (SSSTRT,2,14,16,40000000100)
2732 002726' 040000 000100
2733 002727' 100200 160020 ATABLE (SSSTRT,2,16,20,100000000200)
2734 002730' 100000 000200
2735 002731' 100200 200022 ATABLE (SSSTRT,2,20,22,200000000400)
2736 002732' 200000 000400
2737 002733' 100200 220024 ATABLE (SSSTRT,2,22,24,400000001000)
2738 002734' 400000 001000
2739 002735' 100200 240026 ATABLE (SSSTRT,2,24,26,777000001776)
2740 002736' 777000 001776
2741 002737' 100200 260030 ATABLE (SSSTRT,2,26,30,776400001775)
2742 002740' 776400 001775
2743 002741' 100200 300032 ATABLE (SSSTRT,2,30,32,775400001773)
2744 002742' 775400 001773
2745 002743' 100200 320034 ATABLE (SSSTRT,2,32,34,773400001767)
2746 002744' 773400 001767
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 60-1
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0528
2747 002745' 100200 340036 ATABLE (SSSTRT,2,34,36,767400001757)
2748 002746' 767400 001757
2749 002747' 100200 360040 ATABLE (SSSTRT,2,36,40,757400001737)
2750 002750' 757400 001737
2751 002751' 100200 400042 ATABLE (SSSTRT,2,40,42,737400001677)
2752 002752' 737400 001677
2753 002753' 100200 420044 ATABLE (SSSTRT,2,42,44,677400001577)
2754 002754' 677400 001577
2755 002755' 100200 440046 ATABLE (SSSTRT,2,44,46,577400001377)
2756 002756' 577400 001377
2757 002757' 100200 460050 ATABLE (SSSTRT,2,46,50,377400000777)
2758 002760' 377400 000777
2759 002761' 100200 500052 ATABLE (SSSTRT,2,50,52,000000000000)
2760 002762' 000000 000000
2761 002763' 100200 520054 ATABLE (SSSTRT,2,52,54,777400001777)
2762 002764' 777400 001777
2763 002765' 100200 540056 ATABLE (SSSTRT,2,54,56,525000001252)
2764 002766' 525000 001252
2765 002767' 100200 560060 ATABLE (SSSTRT,2,56,60,252400000525)
2766 002770' 252400 000525
2767 002771' 000000 000000 ATABLE (SSLAST)
2768
2769 ; Error messages
2770
2771 002772' 140000 011505' MA35: MSG!TXNOT![ASCIZ /Constant not gated through CNST MUX correctly/]
2772 002773' 140000 011517' MSG!TXNOT![ASCIZ /Result in EBUF (Middle 16 bits indeterminate)/]
2773 002774' 000000000000# LAST!CALL!TXALL!BBPNT ; print sequencer data
2774
2775 ; Microcode:
2776
2777 002775' 000000 010001 T35M: MWORD <ADDR=0,JMAP,J=1,SD0,OR,D=2,SKCN,MGC=1> ; 0
2778 002776' 732000 240040
2779 002777' 000100 002004 MWORD <CONT,S0A,OR,D=1,SELE,MGC=4,OENA> ; 1
2780 003000' 431000 005340
2781 003001' 000200 030002 MWORD <JMAP,J=3,SD0,OR,D=2,SKCN,MGC=2> ; 2
2782 003002' 732000 240040
2783 003003' 000300 002004 MWORD <CONT,S0A,OR,D=1,SELE,MGC=4,OENA> ; 3
2784 003004' 431000 005340
2785 003005' 000400 050004 MWORD <JMAP,J=5,SD0,OR,D=2,SKCN,MGC=4> ; 4
2786 003006' 732000 240040
2787 003007' 000500 002004 MWORD <CONT,S0A,OR,D=1,SELE,MGC=4,OENA> ; 5
2788 003010' 431000 005340
2789 003011' 000600 070010 MWORD <JMAP,J=7,SD0,OR,D=2,SKCN,MGC=10> ; 6
2790 003012' 732000 240040
2791 003013' 000700 002004 MWORD <CONT,S0A,OR,D=1,SELE,MGC=4,OENA> ; 7
2792 003014' 431000 005340
2793 003015' 001000 110020 MWORD <JMAP,J=11,SD0,OR,D=2,SKCN,MGC=20> ; 10
2794 003016' 732000 240040
2795 003017' 001100 002004 MWORD <CONT,S0A,OR,D=1,SELE,MGC=4,OENA> ; 11
2796 003020' 431000 005340
2797 003021' 001200 130040 MWORD <JMAP,J=13,SD0,OR,D=2,SKCN,MGC=40> ; 12
2798 003022' 732000 240040
2799 003023' 001300 002004 MWORD <CONT,S0A,OR,D=1,SELE,MGC=4,OENA> ; 13
2800 003024' 431000 005340
2801 003025' 001400 150100 MWORD <JMAP,J=15,SD0,OR,D=2,SKCN,MGC=100> ; 14
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 60-2
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0529
2802 003026' 732000 240040
2803 003027' 001500 002004 MWORD <CONT,S0A,OR,D=1,SELE,MGC=4,OENA> ; 15
2804 003030' 431000 005340
2805 003031' 001600 170200 MWORD <JMAP,J=17,SD0,OR,D=2,SKCN,MGC=200> ; 16
2806 003032' 732000 240040
2807 003033' 001700 002004 MWORD <CONT,S0A,OR,D=1,SELE,MGC=4,OENA> ; 17
2808 003034' 431000 005340
2809 003035' 002000 210400 MWORD <JMAP,J=21,SD0,OR,D=2,SKCN,MGC=400> ; 20
2810 003036' 732000 240040
2811 003037' 002100 002004 MWORD <CONT,S0A,OR,D=1,SELE,MGC=4,OENA> ; 21
2812 003040' 431000 005340
2813 003041' 002200 231000 MWORD <JMAP,J=23,SD0,OR,D=2,SKCN,MGC=1000> ; 22
2814 003042' 732000 240040
2815 003043' 002300 002004 MWORD <CONT,S0A,OR,D=1,SELE,MGC=4,OENA> ; 23
2816 003044' 431000 005340
2817 003045' 002400 251776 MWORD <JMAP,J=25,SD0,OR,D=2,SKCN,MGC=1776> ; 24
2818 003046' 732000 240040
2819 003047' 002500 002004 MWORD <CONT,S0A,OR,D=1,SELE,MGC=4,OENA> ; 25
2820 003050' 431000 005340
2821 003051' 002600 271775 MWORD <JMAP,J=27,SD0,OR,D=2,SKCN,MGC=1775> ; 26
2822 003052' 732000 240040
2823 003053' 002700 002004 MWORD <CONT,S0A,OR,D=1,SELE,MGC=4,OENA> ; 27
2824 003054' 431000 005340
2825 003055' 003000 311773 MWORD <JMAP,J=31,SD0,OR,D=2,SKCN,MGC=1773> ; 30
2826 003056' 732000 240040
2827 003057' 003100 002004 MWORD <CONT,S0A,OR,D=1,SELE,MGC=4,OENA> ; 31
2828 003060' 431000 005340
2829 003061' 003200 331767 MWORD <JMAP,J=33,SD0,OR,D=2,SKCN,MGC=1767> ; 32
2830 003062' 732000 240040
2831 003063' 003300 002004 MWORD <CONT,S0A,OR,D=1,SELE,MGC=4,OENA> ; 33
2832 003064' 431000 005340
2833 003065' 003400 351757 MWORD <JMAP,J=35,SD0,OR,D=2,SKCN,MGC=1757> ; 34
2834 003066' 732000 240040
2835 003067' 003500 002004 MWORD <CONT,S0A,OR,D=1,SELE,MGC=4,OENA> ; 35
2836 003070' 431000 005340
2837 003071' 003600 371737 MWORD <JMAP,J=37,SD0,OR,D=2,SKCN,MGC=1737> ; 36
2838 003072' 732000 240040
2839 003073' 003700 002004 MWORD <CONT,S0A,OR,D=1,SELE,MGC=4,OENA> ; 37
2840 003074' 431000 005340
2841 003075' 004000 411677 MWORD <JMAP,J=41,SD0,OR,D=2,SKCN,MGC=1677> ; 40
2842 003076' 732000 240040
2843 003077' 004100 002004 MWORD <CONT,S0A,OR,D=1,SELE,MGC=4,OENA> ; 41
2844 003100' 431000 005340
2845 003101' 004200 431577 MWORD <JMAP,J=43,SD0,OR,D=2,SKCN,MGC=1577> ; 42
2846 003102' 732000 240040
2847 003103' 004300 002004 MWORD <CONT,S0A,OR,D=1,SELE,MGC=4,OENA> ; 43
2848 003104' 431000 005340
2849 003105' 004400 451377 MWORD <JMAP,J=45,SD0,OR,D=2,SKCN,MGC=1377> ; 44
2850 003106' 732000 240040
2851 003107' 004500 002004 MWORD <CONT,S0A,OR,D=1,SELE,MGC=4,OENA> ; 45
2852 003110' 431000 005340
2853 003111' 004600 470777 MWORD <JMAP,J=47,SD0,OR,D=2,SKCN,MGC=777> ; 46
2854 003112' 732000 240040
2855 003113' 004700 002004 MWORD <CONT,S0A,OR,D=1,SELE,MGC=4,OENA> ; 47
2856 003114' 431000 005340
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 60-3
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0530
2857 003115' 005000 510000 MWORD <JMAP,J=51,SD0,OR,D=2,SKCN,MGC=0> ; 50
2858 003116' 732000 240040
2859 003117' 005100 002004 MWORD <CONT,S0A,OR,D=1,SELE,MGC=4,OENA> ; 51
2860 003120' 431000 005340
2861 003121' 005200 531777 MWORD <JMAP,J=53,SD0,OR,D=2,SKCN,MGC=1777> ; 52
2862 003122' 732000 240040
2863 003123' 005300 002004 MWORD <CONT,S0A,OR,D=1,SELE,MGC=4,OENA> ; 53
2864 003124' 431000 005340
2865 003125' 005400 551252 MWORD <JMAP,J=55,SD0,OR,D=2,SKCN,MGC=1252> ; 54
2866 003126' 732000 240040
2867 003127' 005500 002004 MWORD <CONT,S0A,OR,D=1,SELE,MGC=4,OENA> ; 55
2868 003130' 431000 005340
2869 003131' 005600 570525 MWORD <JMAP,J=57,SD0,OR,D=2,SKCN,MGC=525> ; 56
2870 003132' 732000 240040
2871 003133' 005700 002004 MWORD <CONT,S0A,OR,D=1,SELE,MGC=4,OENA> ; 57
2872 003134' 431000 005340
2873 003135' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 61
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0531
2874
2875 ;#********************************************************************
2876 ;* Test 36 - Constant MUX Interference
2877 ;
2878 ; Description: Verify that the CNST MUX is not selected when the
2879 ; skip field selection of the constant MUX is not
2880 ; asserted.
2881 ;
2882 ; Procedure: Clear Port
2883 ; Load microcode
2884 ;
2885 ; Single step microcode 4 times doing a JMAP,CONT,
2886 ; CONT,CONT
2887 ; Read EBUF, verify data is zero.
2888 ;
2889 ; Failure: ---
2890 ;#********************************************************************
2891
2892 ; Test data
2893
2894 003136' 254 00 0 00 003152' TSTE36: JRST TG36 ; go start test
2895 003137' 400400 000036 EBUS!NDMP!ZEBUS!36 ; test mask
2896 003140' 003201' 011531' T36M,,[ASCIZ ^Constant MUX Interference^]
2897 003141' 011537' 011541' [EXP E24,MLAST!M11],,[EXP E23,MLAST!M12]
2898 003142' 000000000000# TSTA1 ; failure test table
2899 003143' 000000000000# TSTA2 ; ...
2900 003144' 000000000000# TSTA3
2901 003145' 000000000000# TSTA4
2902 003146' 000000000000# TSTA5
2903 003147' 000000000000# TSTA6
2904 003150' 000000000000# TSTA7
2905 003151' 777777 777777 -1
2906
2907 ; Start test
2908
2909 003152' 201 00 0 00 000000' TG36: MOVEI Z2 ; get address of module start
2910 003153' 260 17 0 00 002662* GO TRACE ; handle trace output
2911 003154' 201 01 0 00 003201' MOVEI 1,T36M ; set up microcode address
2912 003155' 260 17 0 00 002664* GO TLOAD ; load/verify it
2913 003156' 263 17 0 00 000000 RTN ; failed - exit test
2914
2915 ; Initialization
2916
2917 003157' 400 15 0 00 000000 TL36: SETZ ERFLG, ; clear error flag
2918 003160' 260 17 0 00 002667* GO IPACLR ; clear port
2919 003161' 201 06 0 00 003174' MOVEI 6,TS36 ; get sstep table address
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 62
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0532
2920
2921 ; Loop on single step table entries
2922
2923 003162' 260 17 0 00 002672* TA36: GO BEXEC ; execute table entry
2924 003163' 254 00 0 00 003173' JRST TX36 ; end of sstep table
2925 003164' 254 00 0 00 003162' JRST TA36 ; keep looping after call
2926 003165' 474 15 0 00 000000 SETO ERFLG, ; error - EBUF data incorrect
2927
2928 ; Handle error printouts and scope looping
2929
2930 003166' 402 00 0 00 002671* SETZM TSTSUB ; clear subtest number
2931 003167' 027 00 0 00 003177' SCOPER MA36 ; print error message
2932 003170' 254 00 0 00 003157' JRST TL36 ; loop on error
2933 003171' 254 00 0 00 003173' JRST TX36 ; altmode exit
2934 003172' 322 15 0 00 003162' JUMPE ERFLG,TA36 ; do next sstep table entry
2935
2936 ; End of test
2937
2938 003173' 263 17 0 00 000000 TX36: RTN ; return
2939
2940 ; Sstep table, with EBUF data, as: (CMD,#Steps,Start addr,End Addr,EBUF data)
2941
2942 003174' 100400 000004 TS36: ATABLE (SSSTRT,4,0,4,0)
2943 003175' 000000 000000
2944 003176' 000000 000000 ATABLE (SSLAST)
2945
2946 ; Error messages
2947
2948 003177' 140000 011543' MA36: MSG!TXNOT![ASCIZ /CNST MUX seems to interfere with loading of 2901's/]
2949 003200' 000000000000# LAST!CALL!TXALL!BBPNT ; print sequencer data
2950
2951 ; Microcode:
2952
2953 003201' 000000 010000 T36M: MWORD <ADDR=0,JMAP,J=1,SD0,AND,D=2> ; 0
2954 003202' 742000 000040
2955 003203' 000100 002777 MWORD <CONT,S0A,OR,D=2,OENA,LDLM,MGC=777> ; 1
2956 003204' 432000 230340
2957 003205' 000200 000777 MWORD <CONT,SD0,OR,D=2,RDLM,MGC=777> ; 2
2958 003206' 732000 220340
2959 003207' 000300 002004 MWORD <CONT,S0A,OR,D=1,SELE,MGC=4,OENA> ; 3
2960 003210' 431000 005340
2961 003211' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 63
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0533
2962
2963 ;#********************************************************************
2964 ;* TEST 37 - CSR Bit 24 - EBUS PE Occurs at Wrong Time
2965 ;
2966 ; Description: Set up CSR register so that data sent to the EBus
2967 ; Module results in the detection of a parity error
2968 ; which then appears in the CSR register. Read
2969 ; EBUF, then read CSR and verify that an EBUS PE
2970 ; has not occurred.
2971 ;
2972 ; Procedure: EBUS Reset
2973 ; Write CSR Bit 19,20,24 (Set up to access EBUF,
2974 ; generate EBUS PE, and clear the parity error
2975 ; caused by writing the CSR register)
2976 ; Read EBUF
2977 ; Read CSR register
2978 ; Did parity error bit set? if so - error
2979 ; if not - ok
2980 ;
2981 ; Failure: ---
2982 ;#********************************************************************
2983
2984 ; Test data
2985
2986 003212' 254 00 0 00 003217' TSTE37: JRST TG37 ; go start test
2987 003213' 400000 000037 EBUS!ZEBUS!37 ; test mask
2988 003214' 000000 011556' 0,,[ASCIZ ^CSR Bit 24 - EBUS PE Occurs at Wrong Time^]
2989 003215' 011567' 011570' [EXP MLAST!E16],,[EXP MLAST!E4]
2990 003216' 777777 777777 -1 ; failure test table
2991
2992 ; Start test
2993
2994 003217' 201 00 0 00 000000' TG37: MOVEI Z2 ; get address of module start
2995 003220' 260 17 0 00 003153* GO TRACE ; handle trace output
2996
2997 003221' 400 15 0 00 000000 TA37: SETZ ERFLG, ; clear error flag
2998 003222' 260 17 0 00 002531* GO ERESET ; do an EBUS Reset
2999 003223' 201 01 0 00 304000 MOVEI 1,TSTEBF!GENEPE!EBUSPE ; get CSR bits
3000 003224' 260 17 0 00 002615* GO LDCSR ; write to CSR
3001 003225' 260 17 0 00 002074* GO RDEBUF ; read EBUF
3002 003226' 260 17 0 00 002616* GO RDCSR ; read CSR
3003 003227' 474 15 0 00 000000 SETO ERFLG, ; error accessing CSR
3004 003230' 202 01 0 00 010365' MOVEM 1,SAVCSR ; save CSR data
3005 003231' 602 01 0 00 004000 TRNE 1,EBUSPE ; parity error set?
3006 003232' 474 15 0 00 000000 SETO ERFLG, ; yes - flag error
3007 003233' 027 00 0 00 003237' SCOPER MA37 ; print error message
3008 003234' 254 00 0 00 003221' JRST TA37 ; loop on error
3009 003235' 254 00 0 00 003236' JRST TX37 ; altmode exit
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 64
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0534
3010
3011 ; End of test
3012
3013 003236' 263 17 0 00 000000 TX37: RTN ; return
3014
3015 ; Error messages
3016
3017 003237' 140000 011571' MA37: MSG!TXNOT![ASCIZ /CSR Bit 24 'EBUS PE' set without writing anything over EBUS/]
3018 003240' 270000 010231' LAST!CALL!TXALL!MPNT2
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 65
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0535
3019
3020 ;#********************************************************************
3021 ;* TEST 40 - EBUS Transfer via DATAO's
3022 ;
3023 ; Description: Transfer data from the KL to the port by using a
3024 ; DATAO. This verifies that IOP function 'examine'
3025 ; may work, but without using the interrupt system.
3026 ;
3027 ; Procedure: KL> Port Clear
3028 ; KL> Start up port
3029 ; KL> Immediately do a DATAO of data pattern
3030 ; UC> Wait for 'CCEBUSRQST', then read EBUS data
3031 ; into EBUF
3032 ; KL> Stop the port, read EBUF and verify the data
3033 ;
3034 ; Data Pattern: 0's 525252,,525252
3035 ; 1's 252525,,252525
3036 ;
3037 ; Failure: ---
3038 ;#********************************************************************
3039
3040 ; Test data
3041
3042 003241' 254 00 0 00 003247' TSTE40: JRST TG40 ; go start test
3043 003242' 400400 000040 EBUS!NDMP!ZEBUS!40 ; test mask
3044 003243' 003336' 011605' T40M,,[ASCIZ ^EBUS Transfer via DATAO's^]
3045 003244' 011613' 000000 [EXP E2,E1,E4,MLAST!E7],,0
3046 003245' 000000 003353' TSTE41 ; failure test table
3047 003246' 777777 777777 -1 ; ...
3048
3049 ; Start test
3050
3051 003247' 201 00 0 00 000000' TG40: MOVEI Z2 ; get address of module start
3052 003250' 260 17 0 00 003220* GO TRACE ; handle trace output
3053 003251' 201 01 0 00 003336' MOVEI 1,T40M ; set up microcode address
3054 003252' 260 17 0 00 003155* GO TLOAD ; load/verify it
3055 003253' 263 17 0 00 000000 RTN ; failed - exit test
3056
3057 ; Initialization/test
3058
3059 003254' 201 06 0 00 003312' MOVEI 6,T40DAT ; init data pattern pointer
3060
3061 003255' 400 15 0 00 000000 TA40: SETZ ERFLG, ; clear error flag
3062 003256' 200 00 0 00 000006 MOVE 6 ; calculate subtest
3063 003257' 275 00 0 00 003311' SUBI T40DAT-1 ; number and save
3064 003260' 202 00 0 00 003166* MOVEM TSTSUB ; it
3065 003261' 260 17 0 00 003160* GO IPACLR ; clear port
3066 003262' 400 01 0 00 000000 SETZ 1, ; set up for address 0
3067 003263' 260 17 0 00 000000* GO LDRAR ; write the RAR
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 66
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0536
3068 003264' 201 01 0 00 000010 MOVEI 1,MPRUN ; get 'MPRUN' bit
3069 003265' 260 17 0 00 003224* GO LDCSR ; write to CSR register
3070 003266' 200 02 0 00 011617' MOVE 2,[DATAO (6)] ; build a DATAO
3071 003267' 434 02 0 00 000016 IOR 2,MBCN ; include the device code
3072 003270' 336 00 0 00 000000* SKIPN UDEBUG ; debug mode?
3073 003271' 256 00 0 00 000002 XCT 2 ; no - do the DATAO
3074 003272' 201 01 0 00 200000 MOVEI 1,TSTEBF ; set up to read EBUF
3075 003273' 260 17 0 00 003265* GO LDCSR ; write to CSR register
3076 003274' 260 17 0 00 003225* GO RDEBUF ; read EBUF
3077 003275' 202 01 0 00 010373' MOVEM 1,SAVEB2 ; save EBUF data (actual)
3078 003276' 200 00 0 06 000000 MOVE (6) ; get correct data
3079 003277' 202 00 0 00 010372' MOVEM SAVEB1 ; save EBUF data (correct)
3080 003300' 312 00 0 00 000001 CAME 1 ; data correct?
3081 003301' 474 15 0 00 000000 SETO ERFLG, ; no - flag error
3082
3083 ; Handle error printouts and scope looping
3084
3085 003302' 027 00 0 00 003316' SCOPER MA40 ; print error message
3086 003303' 254 00 0 00 003255' JRST TA40 ; loop on error
3087 003304' 254 00 0 00 003311' JRST TX40 ; altmode exit
3088 003305' 326 15 0 00 003311' JUMPN ERFLG,TX40 ; error yet? yes - exit test
3089
3090 ; Loop on data patterns
3091
3092 003306' 350 00 0 00 000006 AOS 6 ; point to next data pattern
3093 003307' 307 06 0 00 003315' CAIG 6,T40DAT+3 ; done yet?
3094 003310' 254 00 0 00 003255' JRST TA40 ; no - loop till done
3095
3096 ; End of test
3097
3098 003311' 263 17 0 00 000000 TX40: RTN ; return
3099
3100 ; Data Patterns
3101
3102 003312' 000000 000000 T40DAT: 0
3103 003313' 777777 777777 -1
3104 003314' 525252 525252 525252525252
3105 003315' 252525 252525 252525252525
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 67
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0537
3106
3107 ; Error messages
3108
3109 003316' 140000 011620' MA40: MSG!TXNOT![ASCIZ /Data from a DATAO not received by port properly/]
3110 003317' 270000 003320' LAST!CALL!TXALL!MA40PN ; print DATAO data
3111
3112 003320' 200 01 0 00 000000* MA40PN: MOVE 1,SCOSW ; get switches
3113 003321' 603 01 0 00 000200 TLNE 1,TXTINH ; inhibit text?
3114 003322' 037 00 0 00 011632' TMSGC <DATAO (C): > ; yes
3115 003323' 607 01 0 00 000200 TLNN 1,TXTINH ; inhibit text?
3116 003324' 037 00 0 00 011635' TMSGC <DATAO (Correct): > ; no
3117 003325' 200 00 0 00 010372' MOVE SAVEB1 ; get DATAO data written
3118 003326' 037 13 0 00 000000 PNTHW
3119 003327' 603 01 0 00 000200 TLNE 1,TXTINH ; inhibit text?
3120 003330' 037 00 0 00 011642' TMSGC < (A): > ; yes
3121 003331' 607 01 0 00 000200 TLNN 1,TXTINH ; inhibit text?
3122 003332' 037 00 0 00 011645' TMSGC < (Actual): > ; no
3123 003333' 200 00 0 00 010373' MOVE SAVEB2 ; get DATAO data
3124 003334' 037 13 0 00 000000 PNTHW
3125 003335' 263 17 0 00 000000 RTN
3126
3127 ; Microcode:
3128
3129 003336' 000000 010000 T40M: MWORD <ADDR=0,JMAP,J=1> ; 0
3130 003337' 000000 000040
3131 003340' 000100 030000 MWORD <CJP,J=3,CENA,CCER> ; 1
3132 003341' 000400 100060
3133 003342' 000200 010000 MWORD <JMAP,J=1> ; 2
3134 003343' 000000 000040
3135 003344' 000300 000010 MWORD <CONT,SD0,OR,D=2,SELE,MGC=10> ; 3
3136 003345' 732000 005340
3137 003346' 000400 002004 MWORD <CONT,S0A,OR,D=1,OENA,SELE,MGC=4> ; 4
3138 003347' 431000 005340
3139 003350' 000500 050000 MWORD <JMAP,J=5,D=1> ; 5
3140 003351' 001000 000040
3141 003352' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 68
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0538
3142
3143 ;#********************************************************************
3144 ;* TEST 41 - EBUS Transfer via DATAI's
3145 ;
3146 ; Description: Transfer data from the port to the KL by using a
3147 ; DATAI. This verifies that IOP function 'deposit'
3148 ; may work, but without using the interrupt system.
3149 ;
3150 ; Procedure: KL> Port Clear
3151 ; KL> Start up port
3152 ; KL> Immediately do a DATAI
3153 ; UC> Wait for 'CCEBUSRQST', then load EBUS data
3154 ; with data pattern built and placed in EBUF
3155 ; KL> Verify result of the DATAI is correct
3156 ;
3157 ; Data Pattern: 0's 525252,,525252
3158 ; 1's 252525,,252525
3159 ;
3160 ; Failure: ---
3161 ;#********************************************************************
3162
3163 ; Test data
3164
3165 003353' 254 00 0 00 003360' TSTE41: JRST TG41 ; go start test
3166 003354' 400400 000041 EBUS!NDMP!ZEBUS!41 ; test mask
3167 003355' 003451' 011652' T41M,,[ASCIZ ^EBUS Transfer via DATAI's^]
3168 003356' 011613' 000000 [EXP E2,E1,E4,MLAST!E7],,0
3169 003357' 777777 777777 -1 ; failure test table
3170
3171 ; Start test
3172
3173 003360' 201 00 0 00 000000' TG41: MOVEI Z2 ; get address of module start
3174 003361' 260 17 0 00 003250* GO TRACE ; handle trace output
3175 003362' 201 01 0 00 003451' MOVEI 1,T41M ; set up microcode address
3176 003363' 260 17 0 00 003252* GO TLOAD ; load/verify it
3177 003364' 263 17 0 00 000000 RTN ; failed - exit test
3178
3179 ; Initialization/test
3180
3181 003365' 201 06 0 00 003425' MOVEI 6,T41DAT ; init data pattern pointer
3182
3183 003366' 400 15 0 00 000000 TA41: SETZ ERFLG, ; clear error flag
3184 003367' 200 00 0 00 000006 MOVE 6 ; calculate subtest
3185 003370' 275 00 0 00 003424' SUBI T41DAT-1 ; number and save
3186 003371' 202 00 0 00 003260* MOVEM TSTSUB ; it
3187 003372' 260 17 0 00 003261* GO IPACLR ; clear port
3188 003373' 200 01 0 00 000006 MOVE 1,6 ; calculate starting address
3189 003374' 275 01 0 00 003425' SUBI 1,T41DAT ; 0-3
3190 003375' 242 01 0 00 000001 LSH 1,1 ; position properly
3191 003376' 260 17 0 00 003263* GO LDRAR ; write the RAR
3192 003377' 201 01 0 00 000010 MOVEI 1,MPRUN ; get 'MPRUN' bit
3193 003400' 260 17 0 00 003273* GO LDCSR ; write to CSR register
3194 003401' 201 00 0 00 000100 MOVEI 100 ; set up delay to allow enough time
3195 003402' 367 00 0 00 003402' SOJG . ; for ucode to prepare for DATAI
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 69
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0539
3196 003403' 200 01 0 00 010744' MOVE 1,[400000,,1] ; get null pattern
3197 003404' 200 01 0 00 011660' MOVE 1,[DATAI 2] ; build a DATAI
3198 003405' 434 01 0 00 000016 IOR 1,MBCN ; include the device code
3199 003406' 336 00 0 00 003270* SKIPN UDEBUG ; debug mode?
3200 003407' 256 00 0 00 000001 XCT 1 ; no - do the DATAI
3201 003410' 202 02 0 00 010363' MOVEM 2,SAVDA2 ; save DATAI data (actual)
3202 003411' 200 00 0 06 000000 MOVE (6) ; get correct data
3203 003412' 202 00 0 00 010362' MOVEM SAVDA1 ; save DATAI data (correct)
3204 003413' 312 00 0 00 000002 CAME 2 ; data correct?
3205 003414' 474 15 0 00 000000 SETO ERFLG, ; no - flag error
3206
3207 ; Handle error printouts and scope looping
3208
3209 003415' 027 00 0 00 003431' SCOPER MA41 ; print error message
3210 003416' 254 00 0 00 003366' JRST TA41 ; loop on error
3211 003417' 254 00 0 00 003424' JRST TX41 ; altmode exit
3212 003420' 326 15 0 00 003424' JUMPN ERFLG,TX41 ; error yet? yes - exit test
3213
3214 ; Loop on data patterns
3215
3216 003421' 350 00 0 00 000006 AOS 6 ; point to next data pattern
3217 003422' 307 06 0 00 003430' CAIG 6,T41DAT+3 ; done yet?
3218 003423' 254 00 0 00 003366' JRST TA41 ; no - loop till done
3219
3220 ; End of test
3221
3222 003424' 263 17 0 00 000000 TX41: RTN ; return
3223
3224 ; Data Patterns
3225
3226 003425' 000000 000000 T41DAT: 0
3227 003426' 777777 777777 -1
3228 003427' 525252 525252 525252525252
3229 003430' 252525 252525 252525252525
3230
3231 ; Error messages
3232
3233 003431' 140000 011661' MA41: MSG!TXNOT![ASCIZ /Data for a DATAI not received by KL properly/]
3234 003432' 270000 003433' LAST!CALL!TXALL!MA41PN ; print DATAI data
3235
3236 003433' 200 01 0 00 003320* MA41PN: MOVE 1,SCOSW ; get switches
3237 003434' 603 01 0 00 000200 TLNE 1,TXTINH ; inhibit text?
3238 003435' 037 00 0 00 011672' TMSGC <DATAI (C): > ; yes
3239 003436' 607 01 0 00 000200 TLNN 1,TXTINH ; inhibit text?
3240 003437' 037 00 0 00 011675' TMSGC <DATAI (Correct): > ; no
3241 003440' 200 00 0 00 010362' MOVE SAVDA1 ; get DATAI data written
3242 003441' 037 13 0 00 000000 PNTHW
3243 003442' 603 01 0 00 000200 TLNE 1,TXTINH ; inhibit text?
3244 003443' 037 00 0 00 011642' TMSGC < (A): > ; yes
3245 003444' 607 01 0 00 000200 TLNN 1,TXTINH ; inhibit text?
3246 003445' 037 00 0 00 011645' TMSGC < (Actual): > ; no
3247 003446' 200 00 0 00 010363' MOVE SAVDA2 ; get DATAI data
3248 003447' 037 13 0 00 000000 PNTHW
3249 003450' 263 17 0 00 000000 RTN
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 70
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0540
3250
3251 ; Microcode:
3252
3253 003451' 000001 000000 T41M: MWORD <ADDR=0,JMAP,J=100,S0A,AND,B=3,D=2> ; 0 0's
3254 003452' 442001 400040
3255 003453' 000100 100000 MWORD <JMAP,J=10,S0A,AND,B=3,D=2> ; 1 1's
3256 003454' 442001 400040
3257 003455' 000200 200000 MWORD <JMAP,J=20,S0A,AND,B=3,D=2> ; 2 5252..
3258 003456' 442001 400040
3259 003457' 000300 300000 MWORD <JMAP,J=30,S0A,AND,B=3,D=2> ; 3 2525..
3260 003460' 442001 400040
3261
3262 003461' 001001 000000 MWORD <ADDR=10,JMAP,J=100,S0A,XNOR,A=3,B=3,D=2> ; 10
3263 003462' 472031 400040
3264
3265 003463' 002000 210000 MWORD <ADDR=20,LDCT,J=21,D=1> ; 20
3266 003464' 001000 000300
3267 003465' 002100 000000 MWORD <CONT,S0B,B=3,PLUS,D=7,CRY> ; 21
3268 003466' 307001 400740
3269 003467' 002200 210000 MWORD <RPCT,J=21,S0B,B=3,OR,D=7> ; 22
3270 003470' 337001 400220
3271 003471' 002301 000000 MWORD <JMAP,J=100,S0B,B=3,PLUS,CRY,D=7> ; 23
3272 003472' 307001 400440
3273
3274 003473' 003000 210000 MWORD <ADDR=30,LDCT,J=21,D=1> ; 30
3275 003474' 001000 000300
3276 003475' 003100 000000 MWORD <CONT,S0B,B=3,PLUS,D=7,CRY> ; 31
3277 003476' 307001 400740
3278 003477' 003200 310000 MWORD <RPCT,J=31,S0B,B=3,OR,D=7> ; 32
3279 003500' 337001 400220
3280 003501' 003300 000000 MWORD <CONT,S0B,B=3,PLUS,CRY,D=7> ; 33
3281 003502' 307001 400740
3282 003503' 003401 000000 MWORD <JMAP,J=100,S0B,XNOR,B=3,D=2> ; 34
3283 003504' 372001 400040
3284
3285 ; Write the data to the EBUS
3286
3287 003505' 010000 002004 MWORD <ADDR=100,CONT,S0A,A=3,OR,D=1,OENA,SELE,MGC=4>
3288 003506' 431030 005340
3289 003507' 010101 030000 MWORD <CJP,J=103,CENA,CCER> ; 101
3290 003510' 000400 100060
3291 003511' 010201 010000 MWORD <JMAP,J=101> ; 102
3292 003512' 000000 000040
3293 003513' 010300 002020 MWORD <CONT,D=1,OENA,SELE,MGC=20> ; 103
3294 003514' 001000 005340
3295 003515' 010401 040000 MWORD <JMAP,J=104,D=1> ; 104
3296 003516' 001000 000040
3297 003517' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 71
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0541
3298
3299 ;#********************************************************************
3300 ;* TEST 42 - CSR 05 'Rqst Interrupt'
3301 ;
3302 ; Description: Verify that CSR bit 05 can be cleared by an EBUS
3303 ; Reset.
3304 ;
3305 ; Procedure: KL> EBUS Reset
3306 ; KL> Load test ucode
3307 ; UC> Set CSR bit 05
3308 ; KL> EBUS Reset
3309 ; KL> Verify CSR 05 is now cleared
3310 ;
3311 ; Failure: ---
3312 ;#********************************************************************
3313
3314 ; Test data
3315
3316 003520' 254 00 0 00 003527' TSTE42: JRST TG42 ; go start test
3317 003521' 400400 000042 EBUS!NDMP!ZEBUS!42 ; test mask
3318 003522' 003563' 011702' T42M,,[ASCIZ ^CSR 05 'Rqst Interrupt'^]
3319 003523' 011707' 011710' [EXP MLAST!E14],,[EXP E9,MLAST!E6]
3320 003524' 000000 003572' TSTE43 ; failure test table
3321 003525' 000000 003643' TSTE44 ; ...
3322 003526' 777777 777777 -1
3323
3324 ; Start test
3325
3326 003527' 201 00 0 00 000000' TG42: MOVEI Z2 ; get address of module start
3327 003530' 260 17 0 00 003361* GO TRACE ; handle trace output
3328 003531' 201 01 0 00 003563' MOVEI 1,T42M ; set up microcode address
3329 003532' 260 17 0 00 003363* GO TLOAD ; load/verify it
3330 003533' 263 17 0 00 000000 RTN ; failed - exit test
3331
3332 ; 1st segment of test (Segment A) (Start the port)
3333
3334 003534' 400 15 0 00 000000 TA42: SETZ ERFLG, ; clear error flag
3335 003535' 201 00 0 00 000001 MOVEI 1 ; set subtest number
3336 003536' 202 00 0 00 003371* MOVEM TSTSUB ; to 1
3337 003537' 201 00 0 00 000010 MOVEI MPRUN ; only set MPRUN bit when
3338 003540' 202 00 0 00 002572* MOVEM SDATA ; starting the port
3339 003541' 402 00 0 00 002574* SETZM SNEXT ; set start address to 0
3340 003542' 260 17 0 00 010277' GO MSTART ; start up port
3341 003543' 254 00 0 00 003534' JRST TA42 ; loop on error
3342 003544' 254 00 0 00 003560' JRST TX42 ; altmode exit
3343 003545' 326 15 0 00 003560' JUMPN ERFLG,TX42 ; error? yes - exit
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 72
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0542
3344
3345 ; 2nd segment of test (Segment B) (Verify that bit 05 is cleared in CSR)
3346
3347 003546' 350 00 0 00 003536* TB42: AOS TSTSUB ; point to next subtest
3348 003547' 260 17 0 00 003222* GO ERESET ; do and EBUS Reset
3349 003550' 260 17 0 00 003226* GO RDCSR ; read it
3350 003551' 474 15 0 00 000000 SETO ERFLG, ; error
3351 003552' 603 01 0 00 010000 TLNE 1,(RQINT) ; bit set?
3352 003553' 474 15 0 00 000000 SETO ERFLG, ; no - set error flag
3353 003554' 202 01 0 00 010365' MOVEM 1,SAVCSR ; save CSR data
3354 003555' 027 00 0 00 003561' SCOPER MB42 ; print error message
3355 003556' 254 00 0 00 003534' JRST TA42 ; loop on error
3356 003557' 254 00 0 00 003560' JRST TX42 ; altmode exit
3357
3358 ; End of test
3359
3360 003560' 263 17 0 00 000000 TX42: RTN ; return
3361
3362 ; Error message - CSR bit 05 set
3363
3364 003561' 140000 011712' MB42: MSG!TXNOT![ASCIZ /CSR bit 05 set after EBUS Reset/]
3365 003562' 270000 010231' LAST!CALL!TXALL!MPNT2
3366
3367 ; Microcode: Cause CSR bit 05 to set
3368
3369 003563' 000000 010000 T42M: MWORD <ADDR=0,JMAP,J=1> ; 0
3370 003564' 000000 000040
3371 003565' 000100 010000 MWORD <JMAP,J=1,BAD> ; 1
3372 003566' 000000 000041
3373 003567' 000200 020000 MWORD <JMAP,J=2> ; 2
3374 003570' 000000 000040
3375 003571' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 73
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0543
3376
3377 ;#********************************************************************
3378 ;* TEST 43 - CSR 05 'Rqst Interrupt'
3379 ;
3380 ; Description: Verify that CSR bit 05 is set after a CRAM Parity
3381 ; Error.
3382 ;
3383 ; Procedure: KL> EBUS Reset
3384 ; KL> Load test ucode with incorrect parity
3385 ; KL> Start microcode at location 0
3386 ; KL> Verify CSR 05 is set
3387 ;
3388 ; Failure: ---
3389 ;#********************************************************************
3390
3391 ; Test data
3392
3393 003572' 254 00 0 00 003601' TSTE43: JRST TG43 ; go start test
3394 003573' 400400 000043 EBUS!NDMP!ZEBUS!43 ; test mask
3395 003574' 003634' 011702' T43M,,[ASCIZ ^CSR 05 'Rqst Interrupt'^]
3396 003575' 011721' 011723' [EXP E14,MLAST!E15],,[EXP E9,E6,MLAST!M12]
3397 003576' 000000 003643' TSTE44 ; failure test table
3398 003577' 000000 003713' TSTE45 ; ...
3399 003600' 777777 777777 -1
3400
3401 ; Start test
3402
3403 003601' 201 00 0 00 000000' TG43: MOVEI Z2 ; get address of module start
3404 003602' 260 17 0 00 003530* GO TRACE ; handle trace output
3405 003603' 201 01 0 00 003634' MOVEI 1,T43M ; set up microcode address
3406 003604' 260 17 0 00 003532* GO TLOAD ; load/verify it
3407 003605' 263 17 0 00 000000 RTN ; failed - exit test
3408
3409 ; 1st segment of test (Segment A) (Start the port)
3410
3411 003606' 400 15 0 00 000000 TA43: SETZ ERFLG, ; clear error flag
3412 003607' 201 00 0 00 000001 MOVEI 1 ; set subtest number
3413 003610' 202 00 0 00 003546* MOVEM TSTSUB ; to 1
3414 003611' 201 00 0 00 000010 MOVEI MPRUN ; only set MPRUN bit when
3415 003612' 202 00 0 00 003540* MOVEM SDATA ; starting the port
3416 003613' 402 00 0 00 003541* SETZM SNEXT ; set start address to 0
3417 003614' 260 17 0 00 010277' GO MSTART ; start up port
3418 003615' 254 00 0 00 003606' JRST TA43 ; loop on error
3419 003616' 254 00 0 00 003631' JRST TX43 ; altmode exit
3420 003617' 326 15 0 00 003631' JUMPN ERFLG,TX43 ; error? yes - exit
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 74
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0544
3421
3422 ; 2nd segment of test (Segment B) (Verify that bit 05 is set in CSR)
3423
3424 003620' 350 00 0 00 003610* TB43: AOS TSTSUB ; point to next subtest
3425 003621' 260 17 0 00 003550* GO RDCSR ; read it
3426 003622' 474 15 0 00 000000 SETO ERFLG, ; error
3427 003623' 607 01 0 00 010000 TLNN 1,(RQINT) ; bit set?
3428 003624' 474 15 0 00 000000 SETO ERFLG, ; no - set error flag
3429 003625' 202 01 0 00 010365' MOVEM 1,SAVCSR ; save CSR data
3430 003626' 027 00 0 00 003632' SCOPER MB43 ; print error message
3431 003627' 254 00 0 00 003606' JRST TA43 ; loop on error
3432 003630' 254 00 0 00 003631' JRST TX43 ; altmode exit
3433
3434 ; End of test
3435
3436 003631' 263 17 0 00 000000 TX43: RTN ; return
3437
3438 ; Error message - CSR bit 05 not set
3439
3440 003632' 140000 011726' MB43: MSG!TXNOT![ASCIZ /CSR bit 05 not set after CRAM PE/]
3441 003633' 270000 010231' LAST!CALL!TXALL!MPNT2
3442
3443 ; Microcode: Set CRAM PE on second instruction
3444
3445 003634' 000000 010000 T43M: MWORD <ADDR=0,JMAP,J=1> ; 0
3446 003635' 000000 000040
3447 003636' 000100 010000 MWORD <JMAP,J=1,BAD> ; 1
3448 003637' 000000 000041
3449 003640' 000200 020000 MWORD <JMAP,J=2> ; 2
3450 003641' 000000 000040
3451 003642' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 75
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0545
3452
3453 ;#********************************************************************
3454 ;* TEST 44 - CSR 05 'Rqst Interrupt'
3455 ;
3456 ; Description: Verify that CSR bit 05 is set after an MBUS Error.
3457 ;
3458 ; Procedure: KL> EBUS Reset
3459 ; KL> Load test ucode and start at loc 0
3460 ; UC> Turn on a whole bunch of MBUS drivers
3461 ; UC> Turn off a whole bunch of MBUS drivers
3462 ; KL> Verify CSR 05 is set
3463 ;
3464 ; Failure: ---
3465 ;#********************************************************************
3466
3467 ; Test data
3468
3469 003643' 254 00 0 00 003655' TSTE44: JRST TG44 ; go start test
3470 003644' 400400 000044 EBUS!NDMP!ZEBUS!44 ; test mask
3471 003645' 003710' 011702' T44M,,[ASCIZ ^CSR 05 'Rqst Interrupt'^]
3472 003646' 011721' 011735' [EXP E14,MLAST!E15],,[EXP E9,E6,MLAST!M3]
3473 003647' 000000 003762' TSTE46 ; failure test table
3474 003650' 000000000000# TSTU10 ; ...
3475 003651' 000000000000# TSTU11
3476 003652' 000000000000# TSTU12
3477 003653' 000000000000# TSTU13
3478 003654' 777777 777777 -1
3479
3480 ; Start test
3481
3482 003655' 201 00 0 00 000000' TG44: MOVEI Z2 ; get address of module start
3483 003656' 260 17 0 00 003602* GO TRACE ; handle trace output
3484 003657' 201 01 0 00 003710' MOVEI 1,T44M ; set up microcode address
3485 003660' 260 17 0 00 003604* GO TLOAD ; load/verify it
3486 003661' 263 17 0 00 000000 RTN ; failed - exit test
3487
3488 ; 1st segment of test (Segment A) (Start the port)
3489
3490 003662' 400 15 0 00 000000 TA44: SETZ ERFLG, ; clear error flag
3491 003663' 201 00 0 00 000001 MOVEI 1 ; set subtest number
3492 003664' 202 00 0 00 003620* MOVEM TSTSUB ; to 1
3493 003665' 201 00 0 00 000010 MOVEI MPRUN ; only set MPRUN bit when
3494 003666' 202 00 0 00 003612* MOVEM SDATA ; starting the port
3495 003667' 402 00 0 00 003613* SETZM SNEXT ; set start address to 0
3496 003670' 260 17 0 00 010277' GO MSTART ; start up port
3497 003671' 254 00 0 00 003662' JRST TA44 ; loop on error
3498 003672' 254 00 0 00 003705' JRST TX44 ; altmode exit
3499 003673' 326 15 0 00 003705' JUMPN ERFLG,TX44 ; error? yes - exit
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 76
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0546
3500
3501 ; 2nd segment of test (Segment B) (Verify that bit 05 is set in CSR)
3502
3503 003674' 350 00 0 00 003664* TB44: AOS TSTSUB ; point to next subtest
3504 003675' 260 17 0 00 003621* GO RDCSR ; read it
3505 003676' 474 15 0 00 000000 SETO ERFLG, ; error
3506 003677' 607 01 0 00 010000 TLNN 1,(RQINT) ; bit set?
3507 003700' 474 15 0 00 000000 SETO ERFLG, ; no - set error flag
3508 003701' 202 01 0 00 010365' MOVEM 1,SAVCSR ; save CSR data
3509 003702' 027 00 0 00 003706' SCOPER MB44 ; print error message
3510 003703' 254 00 0 00 003662' JRST TA44 ; loop on error
3511 003704' 254 00 0 00 003705' JRST TX44 ; altmode exit
3512
3513 ; End of test
3514
3515 003705' 263 17 0 00 000000 TX44: RTN ; return
3516
3517 ; Error message - CSR bit 05 not set
3518
3519 003706' 140000 011740' MB44: MSG!TXNOT![ASCIZ /CSR bit 05 not set after MBUS Error/]
3520 003707' 270000 010231' LAST!CALL!TXALL!MPNT2
3521
3522 ; Microcode: Turn on several MBUS drivers to cause MBUS Error
3523 ; to set.
3524
3525 003710' 000000 002130 T44M: MWORD <ADDR=0,JZ,OENA,RDLM,SELE,MGC=130>
3526 003711' 000000 225000
3527 003712' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 77
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0547
3528
3529 ;#********************************************************************
3530 ;* TEST 45 - CSR 06 'CRAM Par Err'
3531 ;
3532 ; Description: Verify that CSR bit 06 is set after a CRAM parity
3533 ; error.
3534 ;
3535 ; Procedure: KL> EBUS Reset
3536 ; KL> Load test ucode with bad parity
3537 ; KL> Start microcode at location 0
3538 ; KL> Read CSR and verify CSR Bit 06 is now set
3539 ;
3540 ; Failure: This bit is set directly from 'MPR7 CRAMPE'.
3541 ;#********************************************************************
3542
3543 ; Test data
3544
3545 003713' 254 00 0 00 003720' TSTE45: JRST TG45 ; go start test
3546 003714' 400400 000045 EBUS!NDMP!ZEBUS!45 ; test mask
3547 003715' 003753' 011750' T45M,,[ASCIZ ^CSR 06 'CRAM Par Err'^]
3548 003716' 011503' 011755' [EXP MLAST!M12],,[EXP E9,E6,MLAST!E16]
3549 003717' 777777 777777 -1 ; failure test table
3550
3551 ; Start test
3552
3553 003720' 201 00 0 00 000000' TG45: MOVEI Z2 ; get address of module start
3554 003721' 260 17 0 00 003656* GO TRACE ; handle trace output
3555 003722' 201 01 0 00 003753' MOVEI 1,T45M ; set up microcode address
3556 003723' 260 17 0 00 003660* GO TLOAD ; load/verify it
3557 003724' 263 17 0 00 000000 RTN ; failed - exit test
3558
3559 ; 1st segment of test (Segment A) (Start the port)
3560
3561 003725' 400 15 0 00 000000 TA45: SETZ ERFLG, ; clear error flag
3562 003726' 201 00 0 00 000001 MOVEI 1 ; set subtest number
3563 003727' 202 00 0 00 003674* MOVEM TSTSUB ; to 1
3564 003730' 201 00 0 00 000010 MOVEI MPRUN ; only set MPRUN bit when
3565 003731' 202 00 0 00 003666* MOVEM SDATA ; starting the port
3566 003732' 402 00 0 00 003667* SETZM SNEXT ; set start address to 0
3567 003733' 260 17 0 00 010277' GO MSTART ; start up port
3568 003734' 254 00 0 00 003725' JRST TA45 ; loop on error
3569 003735' 254 00 0 00 003750' JRST TX45 ; altmode exit
3570 003736' 326 15 0 00 003750' JUMPN ERFLG,TX45 ; error? yes - exit
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 78
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0548
3571
3572 ; 2nd segment of test (Segment B) (Verify that bit 06 is set in CSR)
3573
3574 003737' 350 00 0 00 003727* TB45: AOS TSTSUB ; point to next subtest
3575 003740' 260 17 0 00 003675* GO RDCSR ; read it
3576 003741' 474 15 0 00 000000 SETO ERFLG, ; error
3577 003742' 607 01 0 00 004000 TLNN 1,(CRAMPE) ; bit set?
3578 003743' 474 15 0 00 000000 SETO ERFLG, ; no - set error flag
3579 003744' 202 01 0 00 010365' MOVEM 1,SAVCSR ; save CSR data
3580 003745' 027 00 0 00 003751' SCOPER MB45 ; print error message
3581 003746' 254 00 0 00 003725' JRST TA45 ; loop on error
3582 003747' 254 00 0 00 003750' JRST TX45 ; altmode exit
3583
3584 ; End of test
3585
3586 003750' 263 17 0 00 000000 TX45: RTN ; return
3587
3588 ; Error message - CSR bit 06 not set
3589
3590 003751' 140000 011760' MB45: MSG!TXNOT![ASCIZ /CSR bit 06 not set after CRAM PE/]
3591 003752' 270000 010231' LAST!CALL!TXALL!MPNT2
3592
3593 ; Microcode: Set CRAM PE on second instruction
3594
3595 003753' 000000 010000 T45M: MWORD <ADDR=0,JMAP,J=1> ; 0
3596 003754' 000000 000040
3597 003755' 000100 010000 MWORD <JMAP,J=1,BAD> ; 1
3598 003756' 000000 000041
3599 003757' 000200 020000 MWORD <JMAP,J=2> ; 2
3600 003760' 000000 000040
3601 003761' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 79
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0549
3602
3603 ;#********************************************************************
3604 ;* TEST 46 - CSR 07 'MBUS Err'
3605 ;
3606 ; Description: Verify that CSR Bit 07 is set when a MBUS error
3607 ; is detected on the MPROC module.
3608 ;
3609 ; Procedure: KL> EBUS Reset
3610 ; KL> Load test ucode
3611 ; UC> Turn on a whole bunch of MBUS drivers
3612 ; KL> Verify CSR 07 is set
3613 ;
3614 ; Failure: This bit is set directly from 'MPR7 CRAMPE'.
3615 ;#********************************************************************
3616
3617 ; Test data
3618
3619 003762' 254 00 0 00 003773' TSTE46: JRST TG46 ; go start test
3620 003763' 410400 000046 EBUS!MBUS!NDMP!ZEBUS!46 ; test mask
3621 003764' 004030' 011767' T46M,,[ASCIZ ^CSR 07 'MBUS Err'^]
3622 003765' 011737' 011710' [EXP MLAST!M3],,[EXP E9,MLAST!E6]
3623 003766' 000000000000# TSTU10 ; failure test table
3624 003767' 000000000000# TSTU11 ; ...
3625 003770' 000000000000# TSTU12
3626 003771' 000000000000# TSTU13
3627 003772' 777777 777777 -1
3628
3629 ; Start test
3630
3631 003773' 201 00 0 00 000000' TG46: MOVEI Z2 ; get address of module start
3632 003774' 260 17 0 00 003721* GO TRACE ; handle trace output
3633 003775' 201 01 0 00 004030' MOVEI 1,T46M ; set up microcode address
3634 003776' 260 17 0 00 003723* GO TLOAD ; load/verify it
3635 003777' 263 17 0 00 000000 RTN ; failed - exit test
3636
3637 ; 1st segment of test (Segment A) (Start the port)
3638
3639 004000' 400 15 0 00 000000 TA46: SETZ ERFLG, ; clear error flag
3640 004001' 201 00 0 00 000001 MOVEI 1 ; set subtest number
3641 004002' 202 00 0 00 003737* MOVEM TSTSUB ; to 1
3642 004003' 201 00 0 00 000010 MOVEI MPRUN ; only set MPRUN bit when
3643 004004' 202 00 0 00 003731* MOVEM SDATA ; starting the port
3644 004005' 402 00 0 00 003732* SETZM SNEXT ; set start address to 0
3645 004006' 260 17 0 00 010277' GO MSTART ; start up port
3646 004007' 254 00 0 00 004000' JRST TA46 ; loop on error
3647 004010' 254 00 0 00 004023' JRST TX46 ; altmode exit
3648 004011' 326 15 0 00 004023' JUMPN ERFLG,TX46 ; error? yes - exit
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 80
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0550
3649
3650 ; 2nd segment of test (Segment B) (Verify that bit 07 is set in CSR)
3651
3652 004012' 350 00 0 00 004002* TB46: AOS TSTSUB ; point to next subtest
3653 004013' 260 17 0 00 003740* GO RDCSR ; read it
3654 004014' 474 15 0 00 000000 SETO ERFLG, ; error
3655 004015' 607 01 0 00 002000 TLNN 1,(MBERR) ; bit set?
3656 004016' 474 15 0 00 000000 SETO ERFLG, ; no - set error flag
3657 004017' 202 01 0 00 010365' MOVEM 1,SAVCSR ; save CSR data
3658 004020' 027 00 0 00 004026' SCOPER MB46 ; print error message
3659 004021' 254 00 0 00 004000' JRST TA46 ; loop on error
3660 004022' 254 00 0 00 004023' JRST TX46 ; altmode exit
3661
3662 ; End of test
3663
3664 004023' 263 17 0 00 000000 TX46: RTN ; return
3665
3666 ; Error message - Couldn't start port
3667
3668 004024' 140000 011773' MA46: MSG!TXNOT![ASCIZ /Failed to start port properly/]
3669 004025' 270000 010272' LAST!CALL!TXALL!MPNT6
3670
3671 ; Error message - CSR bit 07 not set
3672
3673 004026' 140000 012001' MB46: MSG!TXNOT![ASCIZ /CSR bit 07 not set after MBUS Error/]
3674 004027' 270000 010231' LAST!CALL!TXALL!MPNT2
3675
3676 ; Microcode: Turn on several MBUS drivers to cause MBUS Error
3677 ; to set.
3678
3679 004030' 000000 002130 T46M: MWORD <ADDR=0,JZ,OENA,RDLM,SELE,MGC=130>
3680 004031' 000000 225000
3681 004032' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 81
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0551
3682
3683 ;#********************************************************************
3684 ;* TEST 47 - CSR 11 'Idle' Bit
3685 ;
3686 ; Description: Verify that CSR Bit 11 can be read and written by
3687 ; the microcode, and read by by the KL10 with a
3688 ; CONI.
3689 ;
3690 ; Procedure: KL> EBUS Reset
3691 ; KL> Load test ucode and start it at loc 0
3692 ; UC> Read CSR and verify bit 11 zero
3693 ; UC> Write CSR bit 11, read CSR, verify that it set
3694 ; KL> Read CSR and verify bit 11 is set
3695 ; KL> Write CSR to indicate to microcode that this
3696 ; has been done by the KL
3697 ; UC> Zero CSR Bit 11, read CSR, verify that it cleared
3698 ; KL> Read CSR and verify bit 11 zero
3699 ; KL> EBUS Reset
3700 ; KL> Read CSR and verify bit 11 zero
3701 ;
3702 ; Failure: This bit is written by the microcode via the EBUF
3703 ; and read by the microcode via the MBUS and read
3704 ; by the KL as the CSR register.
3705 ;#********************************************************************
3706
3707 ; Test data
3708
3709 004033' 254 00 0 00 004044' TSTE47: JRST TG47 ; go start test
3710 004034' 400400 000047 EBUS!NDMP!ZEBUS!47 ; test mask
3711 004035' 004132' 012011' T47M,,[ASCIZ ^CSR 11 'Idle' Bit^]
3712 004036' 012015' 011710' [EXP MLAST!E12],,[EXP E9,MLAST!E6]
3713 004037' 000000 004233' TSTE50 ; failure test table
3714 004040' 000000 004432' TSTE51 ; ...
3715 004041' 000000 007402' TSTE74
3716 004042' 000000 007744' TSTE76
3717 004043' 777777 777777 -1
3718
3719 ; Start test
3720
3721 004044' 201 00 0 00 000000' TG47: MOVEI Z2 ; get address of module start
3722 004045' 260 17 0 00 003774* GO TRACE ; handle trace output
3723 004046' 201 01 0 00 004132' MOVEI 1,T47M ; set up microcode address
3724 004047' 260 17 0 00 003776* GO TLOAD ; load/verify it
3725 004050' 263 17 0 00 000000 RTN ; failed - exit test
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 82
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0552
3726
3727 ; 1st segment of test (Segment A) (Start the port)
3728
3729 004051' 400 15 0 00 000000 TA47: SETZ ERFLG, ; clear error flag
3730 004052' 201 00 0 00 000001 MOVEI 1 ; set subtest number
3731 004053' 202 00 0 00 004012* MOVEM TSTSUB ; to 1
3732 004054' 201 00 0 00 000010 MOVEI MPRUN ; only set MPRUN bit when
3733 004055' 202 00 0 00 004004* MOVEM SDATA ; starting the port
3734 004056' 402 00 0 00 004005* SETZM SNEXT ; set start address to 0
3735 004057' 260 17 0 00 010277' GO MSTART ; start up port
3736 004060' 254 00 0 00 004051' JRST TA47 ; loop on error
3737 004061' 254 00 0 00 004123' JRST TX47 ; altmode exit
3738 004062' 326 15 0 00 004123' JUMPN ERFLG,TX47 ; error? yes - exit
3739
3740 ; 2nd segment of test (Segment B) (Verify that bit 11 is set in CSR)
3741
3742 004063' 350 00 0 00 004053* TB47: AOS TSTSUB ; point to next subtest
3743 004064' 260 17 0 00 004013* GO RDCSR ; read it
3744 004065' 474 15 0 00 000000 SETO ERFLG, ; error
3745 004066' 202 01 0 00 010365' MOVEM 1,SAVCSR ; save CSR data
3746 004067' 607 01 0 00 000100 TLNN 1,(IDLE) ; bit set?
3747 004070' 474 15 0 00 000000 SETO ERFLG, ; no - set error flag
3748 004071' 027 00 0 00 004124' SCOPER MB47 ; print error message
3749 004072' 254 00 0 00 004051' JRST TA47 ; loop on error
3750 004073' 254 00 0 00 004123' JRST TX47 ; altmode exit
3751 004074' 326 15 0 00 004123' JUMPN ERFLG,TX47 ; error? yes - exit
3752
3753 ; 3rd segment of test (Segment C) (Verify that bit 11 is cleared in CSR)
3754
3755 004075' 350 00 0 00 004063* TC47: AOS TSTSUB ; point to next subtest
3756 004076' 550 01 0 00 010365' HRRZ 1,SAVCSR ; save CSR data
3757 004077' 260 17 0 00 003400* GO LDCSR ; write CSR register
3758 004100' 260 17 0 00 004064* GO RDCSR ; read it
3759 004101' 474 15 0 00 000000 SETO ERFLG, ; error
3760 004102' 603 01 0 00 000100 TLNE 1,(IDLE) ; bit set?
3761 004103' 474 15 0 00 000000 SETO ERFLG, ; no - set error flag
3762 004104' 202 01 0 00 010365' MOVEM 1,SAVCSR ; save CSR data
3763 004105' 027 00 0 00 004126' SCOPER MC47 ; print error message
3764 004106' 254 00 0 00 004051' JRST TA47 ; loop on error
3765 004107' 254 00 0 00 004123' JRST TX47 ; altmode exit
3766 004110' 326 15 0 00 004123' JUMPN ERFLG,TX47 ; error? yes - exit
3767
3768 ; 4th segment of test (Segment D) (Verify that bit 11 is cleared in CSR)
3769
3770 004111' 350 00 0 00 004075* TD47: AOS TSTSUB ; point to next subtest
3771 004112' 260 17 0 00 003372* GO IPACLR ; do a 'port clear'
3772 004113' 260 17 0 00 004100* GO RDCSR ; read it
3773 004114' 474 15 0 00 000000 SETO ERFLG, ; error
3774 004115' 603 01 0 00 000100 TLNE 1,(IDLE) ; bit set?
3775 004116' 474 15 0 00 000000 SETO ERFLG, ; no - set error flag
3776 004117' 202 01 0 00 010365' MOVEM 1,SAVCSR ; save CSR data
3777 004120' 027 00 0 00 004126' SCOPER MC47 ; print error message
3778 004121' 254 00 0 00 004051' JRST TA47 ; loop on error
3779 004122' 254 00 0 00 004123' JRST TX47 ; altmode exit
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 83
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0553
3780
3781 ; End of test
3782
3783 004123' 263 17 0 00 000000 TX47: RTN ; return
3784
3785 ; Error message - CSR bit 11 not set
3786
3787 004124' 140000 012016' MB47: MSG!TXNOT![ASCIZ /CSR bit 11 is not set after ucode writes it/]
3788 004125' 270000 010231' LAST!CALL!TXALL!MPNT2
3789
3790 ; Error message - CSR bit 11 set
3791
3792 004126' 140000 012027' MC47: MSG!TXNOT![ASCIZ /CSR bit 11 set after ucode clears it/]
3793 004127' 270000 010231' LAST!CALL!TXALL!MPNT2
3794
3795 ; Error message - CSR bit 11 set
3796
3797 004130' 140000 012037' MD47: MSG!TXNOT![ASCIZ /CSR bit 11 set after EBUS Reset/]
3798 004131' 270000 010231' LAST!CALL!TXALL!MPNT2
3799
3800 ; Microcode: First, load a 1 bit mask into Register 2 (bit 11
3801 ; set)
3802
3803 004132' 000000 010000 T47M: MWORD <ADDR=0,JMAP,J=1,SD0,AND,B=2,D=2> ; 0
3804 004133' 742001 000040
3805 004134' 000100 000000 MWORD <CONT,S0B,PLUS,B=2,D=2,CRY> ; 1
3806 004135' 302001 000740
3807 004136' 000200 270000 MWORD <LDCT,J=27> ; 2
3808 004137' 000000 000300
3809 004140' 000300 030000 MWORD <RPCT,J=3,SAB,PLUS,A=2,B=2,D=2> ; 3
3810 004141' 102021 000220
3811
3812 ; Read CSR into register 1
3813
3814 004142' 000400 060040 MWORD <CJP,J=6,CENA,CCGC,SELE,MGC=40> ; 4
3815 004143' 000400 015060
3816 004144' 000500 040000 MWORD <JMAP,J=4> ; 5
3817 004145' 000000 000040
3818 004146' 000600 000100 MWORD <CONT,SD0,B=1,OR,D=2,SELE,MGC=100> ; 6
3819 004147' 732000 405340
3820
3821 ; Verify CSR bit 11 is zero
3822
3823 004150' 000700 110000 MWORD <CJP,J=11,SAB,A=2,B=1,AND,D=1,CENA,CCFZ> ; 7
3824 004151' 141420 420060
3825 004152' 001001 000000 MWORD <JMAP,J=100> ; 10
3826 004153' 000000 000040
3827
3828 ; Write to CSR (set bit 11)
3829
3830 004154' 001100 002004 MWORD <CONT,S0A,A=2,OR,D=1,OENA,SELE,MGC=4> ; 11
3831 004155' 431020 005340
3832 004156' 001200 140040 MWORD <CJP,J=14,CENA,CCGC,SELE,MGC=40> ; 12
3833 004157' 000400 015060
3834 004160' 001300 120000 MWORD <JMAP,J=12> ; 13
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 83-1
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0554
3835 004161' 000000 000040
3836 004162' 001400 000200 MWORD <CONT,S0A,A=1,OR,D=1,SELE,MGC=200> ; 14
3837 004163' 431010 005340
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 84
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0555
3838
3839 ; Read CSR into register 1
3840
3841 004164' 001500 170040 MWORD <CJP,J=17,CENA,CCGC,SELE,MGC=40> ; 15
3842 004165' 000400 015060
3843 004166' 001600 150000 MWORD <JMAP,J=15> ; 16
3844 004167' 000000 000040
3845 004170' 001700 000100 MWORD <CONT,SD0,B=1,OR,D=2,SELE,MGC=100> ; 17
3846 004171' 732000 405340
3847
3848 ; Verify CSR bit 11 is set
3849
3850 004172' 002001 010000 MWORD <CJP,J=101,SAB,A=2,B=1,AND,D=1,CENA,CCFZ> ; 20
3851 004173' 141420 420060
3852
3853 ; Wait for 'CCCSRCHNG' to come up, indicating the KL code
3854 ; has done its bit.
3855
3856 004174' 002100 230000 MWORD <CJP,J=23,CENA,CCCC> ; 21
3857 004175' 000400 030060
3858 004176' 002200 210000 MWORD <JMAP,J=21> ; 22
3859 004177' 000000 000040
3860
3861 ; Write to CSR (clear bit 11)
3862
3863 004200' 002300 002004 MWORD <CONT,S0A,A=1,AND,D=1,OENA,SELE,MGC=4> ; 23
3864 004201' 441010 005340
3865 004202' 002400 260040 MWORD <CJP,J=26,CENA,CCGC,SELE,MGC=40> ; 24
3866 004203' 000400 015060
3867 004204' 002500 240000 MWORD <JMAP,J=24> ; 25
3868 004205' 000000 000040
3869 004206' 002600 000200 MWORD <CONT,SELE,MGC=200> ; 26
3870 004207' 000000 005340
3871
3872 ; Read CSR into register 1
3873
3874 004210' 002700 310040 MWORD <CJP,J=31,CENA,CCGC,SELE,MGC=40> ; 27
3875 004211' 000400 015060
3876 004212' 003000 270000 MWORD <JMAP,J=27> ; 30
3877 004213' 000000 000040
3878 004214' 003100 000100 MWORD <CONT,SD0,B=1,OR,D=2,SELE,MGC=100> ; 31
3879 004215' 732000 405340
3880
3881 ; Verify CSR bit 11 is clear
3882
3883 004216' 003200 340000 MWORD <CJP,J=34,SAB,A=2,B=1,AND,D=1,CENA,CCFZ> ; 32
3884 004217' 141420 420060
3885 004220' 003301 020000 MWORD <JMAP,J=102> ; 33
3886 004221' 000000 000040
3887
3888 ; Done - loop forever
3889
3890 004222' 003400 340000 MWORD <JMAP,J=34> ; 34
3891 004223' 000000 000040
3892
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 84-1
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0556
3893 ; Error 100 - bit 11 not initially zero
3894 ; Error 101 - bit 11 failed to set
3895 ; Error 102 - bit 11 failed to clear
3896
3897 004224' 010001 000000 MWORD <ADDR=100,JMAP,J=100> ; 100
3898 004225' 000000 000040
3899 004226' 010101 010000 MWORD <ADDR=101,JMAP,J=101> ; 101
3900 004227' 000000 000040
3901 004230' 010201 020000 MWORD <ADDR=102,JMAP,J=102> ; 102
3902 004231' 000000 000040
3903 004232' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 85
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0557
3904
3905 ;#********************************************************************
3906 ;* TEST 50 - CSR 12 'Disable Complete' Bit
3907 ;
3908 ; Description: Verify that CSR Bit 12 can be read and written by
3909 ; the microcode, and read by by the KL10 with a
3910 ; CONI.
3911 ;
3912 ; Procedure: KL> EBUS Reset
3913 ; KL> Load test ucode and start it at loc 0
3914 ; UC> Read CSR and verify bit 12 zero
3915 ; UC> Write CSR bit 12, read CSR, verify it set
3916 ; KL> Read CSR and verify bit 12 is set
3917 ; KL> Write CSR to indicate to microcode that this
3918 ; has been done by the KL
3919 ; UC> Zero CSR Bit 12, read CSR, verify it cleared
3920 ; KL> Read CSR and verify bit 12 zero
3921 ; KL> EBUS Reset
3922 ; KL> Read CSR and verify bit 12 zero
3923 ;
3924 ; Failure: This bit is written by the microcode via the EBUF
3925 ; and read by the microcode via the MBUS and read
3926 ; by the KL as the CSR register.
3927 ;#********************************************************************
3928
3929 ; Test data
3930
3931 004233' 254 00 0 00 004243' TSTE50: JRST TG50 ; go start test
3932 004234' 400400 000050 EBUS!NDMP!ZEBUS!50 ; test mask
3933 004235' 004331' 012046' T50M,,[ASCIZ ^CSR 12 'Disable Complete' Bit^]
3934 004236' 012015' 011710' [EXP MLAST!E12],,[EXP E9,MLAST!E6]
3935 004237' 000000 004432' TSTE51 ; failure test table
3936 004240' 000000 007402' TSTE74 ; ...
3937 004241' 000000 007744' TSTE76
3938 004242' 777777 777777 -1
3939
3940 ; Start test
3941
3942 004243' 201 00 0 00 000000' TG50: MOVEI Z2 ; get address of module start
3943 004244' 260 17 0 00 004045* GO TRACE ; handle trace output
3944 004245' 201 01 0 00 004331' MOVEI 1,T50M ; set up microcode address
3945 004246' 260 17 0 00 004047* GO TLOAD ; load/verify it
3946 004247' 263 17 0 00 000000 RTN ; failed - exit test
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 86
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0558
3947
3948 ; 1st segment of test (Segment A) (Start the port)
3949
3950 004250' 400 15 0 00 000000 TA50: SETZ ERFLG, ; clear error flag
3951 004251' 201 00 0 00 000001 MOVEI 1 ; set subtest number
3952 004252' 202 00 0 00 004111* MOVEM TSTSUB ; to 1
3953 004253' 201 00 0 00 000010 MOVEI MPRUN ; only set MPRUN bit when
3954 004254' 202 00 0 00 004055* MOVEM SDATA ; starting the port
3955 004255' 402 00 0 00 004056* SETZM SNEXT ; set start address to 0
3956 004256' 260 17 0 00 010277' GO MSTART ; start up port
3957 004257' 254 00 0 00 004250' JRST TA50 ; loop on error
3958 004260' 254 00 0 00 004322' JRST TX50 ; altmode exit
3959 004261' 326 15 0 00 004322' JUMPN ERFLG,TX50 ; error? yes - exit
3960
3961 ; 2nd segment of test (Segment B) (Verify that bit 12 is set in CSR)
3962
3963 004262' 350 00 0 00 004252* TB50: AOS TSTSUB ; point to next subtest
3964 004263' 260 17 0 00 004113* GO RDCSR ; read it
3965 004264' 474 15 0 00 000000 SETO ERFLG, ; error
3966 004265' 202 01 0 00 010365' MOVEM 1,SAVCSR ; save CSR data
3967 004266' 607 01 0 00 000040 TLNN 1,(DCOMP) ; bit set?
3968 004267' 474 15 0 00 000000 SETO ERFLG, ; no - set error flag
3969 004270' 027 00 0 00 004323' SCOPER MB50 ; print error message
3970 004271' 254 00 0 00 004250' JRST TA50 ; loop on error
3971 004272' 254 00 0 00 004322' JRST TX50 ; altmode exit
3972 004273' 326 15 0 00 004322' JUMPN ERFLG,TX50 ; error? yes - exit
3973
3974 ; 3rd segment of test (Segment C) (Verify that bit 12 is cleared in CSR)
3975
3976 004274' 350 00 0 00 004262* TC50: AOS TSTSUB ; point to next subtest
3977 004275' 550 01 0 00 010365' HRRZ 1,SAVCSR ; save CSR data
3978 004276' 260 17 0 00 004077* GO LDCSR ; write CSR register
3979 004277' 260 17 0 00 004263* GO RDCSR ; read it
3980 004300' 474 15 0 00 000000 SETO ERFLG, ; error
3981 004301' 603 01 0 00 000040 TLNE 1,(DCOMP) ; bit set?
3982 004302' 474 15 0 00 000000 SETO ERFLG, ; no - set error flag
3983 004303' 202 01 0 00 010365' MOVEM 1,SAVCSR ; save CSR data
3984 004304' 027 00 0 00 004325' SCOPER MC50 ; print error message
3985 004305' 254 00 0 00 004250' JRST TA50 ; loop on error
3986 004306' 254 00 0 00 004322' JRST TX50 ; altmode exit
3987 004307' 326 15 0 00 004322' JUMPN ERFLG,TX50 ; error? yes - exit
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 87
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0559
3988
3989 ; 4th segment of test (Segment D) (Verify that bit 12 is cleared in CSR)
3990
3991 004310' 350 00 0 00 004274* TD50: AOS TSTSUB ; point to next subtest
3992 004311' 260 17 0 00 004112* GO IPACLR ; do a 'port clear'
3993 004312' 260 17 0 00 004277* GO RDCSR ; read it
3994 004313' 474 15 0 00 000000 SETO ERFLG, ; error
3995 004314' 603 01 0 00 000040 TLNE 1,(DCOMP) ; bit set?
3996 004315' 474 15 0 00 000000 SETO ERFLG, ; no - set error flag
3997 004316' 202 01 0 00 010365' MOVEM 1,SAVCSR ; save CSR data
3998 004317' 027 00 0 00 004325' SCOPER MC50 ; print error message
3999 004320' 254 00 0 00 004250' JRST TA50 ; loop on error
4000 004321' 254 00 0 00 004322' JRST TX50 ; altmode exit
4001
4002 ; End of test
4003
4004 004322' 263 17 0 00 000000 TX50: RTN ; return
4005
4006 ; Error message - CSR bit 12 not set
4007
4008 004323' 140000 012054' MB50: MSG!TXNOT![ASCIZ /CSR bit 12 is not set after ucode writes it/]
4009 004324' 270000 010231' LAST!CALL!TXALL!MPNT2
4010
4011 ; Error message - CSR bit 12 set
4012
4013 004325' 140000 012065' MC50: MSG!TXNOT![ASCIZ /CSR bit 12 set after ucode clears it/]
4014 004326' 270000 010231' LAST!CALL!TXALL!MPNT2
4015
4016 ; Error message - CSR bit 12 set
4017
4018 004327' 140000 012075' MD50: MSG!TXNOT![ASCIZ /CSR bit 12 set after EBUS Reset/]
4019 004330' 270000 010231' LAST!CALL!TXALL!MPNT2
4020
4021 ; Microcode: First, load a 1 bit mask into Register 0 (bit 12
4022 ; set)
4023
4024 004331' 000000 010000 T50M: MWORD <ADDR=0,JMAP,J=1,SD0,AND,B=2,D=2> ; 0
4025 004332' 742001 000040
4026 004333' 000100 000000 MWORD <CONT,S0B,PLUS,B=2,D=2,CRY> ; 1
4027 004334' 302001 000740
4028 004335' 000200 260000 MWORD <LDCT,J=26> ; 2
4029 004336' 000000 000300
4030 004337' 000300 030000 MWORD <RPCT,J=3,SAB,PLUS,A=2,B=2,D=2> ; 3
4031 004340' 102021 000220
4032
4033 ; Read CSR into register 1
4034
4035 004341' 000400 060040 MWORD <CJP,J=6,CENA,CCGC,SELE,MGC=40> ; 4
4036 004342' 000400 015060
4037 004343' 000500 040000 MWORD <JMAP,J=4> ; 5
4038 004344' 000000 000040
4039 004345' 000600 000100 MWORD <CONT,SD0,B=1,OR,D=2,SELE,MGC=100> ; 6
4040 004346' 732000 405340
4041
4042 ; Verify CSR bit 12 is zero
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 87-1
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0560
4043
4044 004347' 000700 110000 MWORD <CJP,J=11,SAB,A=2,B=1,AND,D=1,CENA,CCFZ> ; 7
4045 004350' 141420 420060
4046 004351' 001001 000000 MWORD <JMAP,J=100> ; 10
4047 004352' 000000 000040
4048
4049 ; Write to CSR (set bit 12)
4050
4051 004353' 001100 002004 MWORD <CONT,S0A,A=2,OR,D=1,OENA,SELE,MGC=4> ; 11
4052 004354' 431020 005340
4053 004355' 001200 140040 MWORD <CJP,J=14,CENA,CCGC,SELE,MGC=40> ; 12
4054 004356' 000400 015060
4055 004357' 001300 120000 MWORD <JMAP,J=12> ; 13
4056 004360' 000000 000040
4057 004361' 001400 000200 MWORD <CONT,S0A,A=1,OR,D=1,SELE,MGC=200> ; 14
4058 004362' 431010 005340
4059
4060 ; Read CSR into register 1
4061
4062 004363' 001500 170040 MWORD <CJP,J=17,CENA,CCGC,SELE,MGC=40> ; 15
4063 004364' 000400 015060
4064 004365' 001600 150000 MWORD <JMAP,J=15> ; 16
4065 004366' 000000 000040
4066 004367' 001700 000100 MWORD <CONT,SD0,B=1,OR,D=2,SELE,MGC=100> ; 17
4067 004370' 732000 405340
4068
4069 ; Verify CSR bit 12 is set
4070
4071 004371' 002001 010000 MWORD <CJP,J=101,SAB,A=2,B=1,AND,D=1,CENA,CCFZ> ; 20
4072 004372' 141420 420060
4073
4074 ; Wait for 'CCCSRCHNG' to come up, indicating the KL code
4075 ; has done its bit.
4076
4077 004373' 002100 230000 MWORD <CJP,J=23,CENA,CCCC> ; 21
4078 004374' 000400 030060
4079 004375' 002200 210000 MWORD <JMAP,J=21> ; 22
4080 004376' 000000 000040
4081
4082 ; Write to CSR (clear bit 12)
4083
4084 004377' 002300 002004 MWORD <CONT,S0A,A=1,AND,D=1,OENA,SELE,MGC=4> ; 23
4085 004400' 441010 005340
4086 004401' 002400 260040 MWORD <CJP,J=26,CENA,CCGC,SELE,MGC=40> ; 24
4087 004402' 000400 015060
4088 004403' 002500 240000 MWORD <JMAP,J=24> ; 25
4089 004404' 000000 000040
4090 004405' 002600 000200 MWORD <CONT,SELE,MGC=200> ; 26
4091 004406' 000000 005340
4092
4093 ; Read CSR into register 1
4094
4095 004407' 002700 310040 MWORD <CJP,J=31,CENA,CCGC,SELE,MGC=40> ; 27
4096 004410' 000400 015060
4097 004411' 003000 270000 MWORD <JMAP,J=27> ; 30
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 87-2
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0561
4098 004412' 000000 000040
4099 004413' 003100 000100 MWORD <CONT,SD0,B=1,OR,D=2,SELE,MGC=100> ; 31
4100 004414' 732000 405340
4101
4102 ; Verify CSR bit 12 is clear
4103
4104 004415' 003200 340000 MWORD <CJP,J=34,SAB,A=2,B=1,AND,D=1,CENA,CCFZ> ; 32
4105 004416' 141420 420060
4106 004417' 003301 020000 MWORD <JMAP,J=102> ; 33
4107 004420' 000000 000040
4108
4109 ; Done - loop forever
4110
4111 004421' 003400 340000 MWORD <JMAP,J=34> ; 34
4112 004422' 000000 000040
4113
4114 ; Error 100 - bit 12 not initially zero
4115 ; Error 101 - bit 12 failed to set
4116 ; Error 102 - bit 12 failed to clear
4117
4118 004423' 010001 000000 MWORD <ADDR=100,JMAP,J=100> ; 100
4119 004424' 000000 000040
4120 004425' 010101 010000 MWORD <ADDR=101,JMAP,J=101> ; 101
4121 004426' 000000 000040
4122 004427' 010201 020000 MWORD <ADDR=102,JMAP,J=102> ; 102
4123 004430' 000000 000040
4124 004431' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 88
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0562
4125
4126 ;#********************************************************************
4127 ;* TEST 51 - CSR 13 'Enable Complete' Bit
4128 ;
4129 ; Description: Verify that CSR Bit 13 can be read and written by
4130 ; the microcode, and read by the KL10 with a CONI.
4131 ;
4132 ; Procedure: KL> EBUS Reset
4133 ; KL> Load test ucode and start it at loc 0
4134 ; UC> Read CSR and verify bit 13 zero
4135 ; UC> Write CSR bit 13, read CSR and verify it set
4136 ; KL> Read CSR and verify bit 13 is set
4137 ; KL> Write CSR to indicate to microcode that
4138 ; this has been done by the KL
4139 ; UC> Zero CSR Bit 13, read CSR, verify it cleared
4140 ; KL> Read CSR and verify bit 13 zero
4141 ; KL> EBUS Reset
4142 ; KL> Read CSR and verify bit 13 zero
4143 ;
4144 ; Failure: This bit is written by the microcode via the EBUF
4145 ; and read by the microcode via the MBUS and read
4146 ; by the KL as the CSR register.
4147 ;#********************************************************************
4148
4149 ; Test data
4150
4151 004432' 254 00 0 00 004441' TSTE51: JRST TG51 ; go start test
4152 004433' 400400 000051 EBUS!NDMP!ZEBUS!51 ; test mask
4153 004434' 004527' 012104' T51M,,[ASCIZ ^CSR 13 'Enable Complete' Bit^]
4154 004435' 012015' 011710' [EXP MLAST!E12],,[EXP E9,MLAST!E6]
4155 004436' 000000 007402' TSTE74 ; failure test table
4156 004437' 000000 007744' TSTE76 ; ...
4157 004440' 777777 777777 -1
4158
4159 ; Start test
4160
4161 004441' 201 00 0 00 000000' TG51: MOVEI Z2 ; get address of module start
4162 004442' 260 17 0 00 004244* GO TRACE ; handle trace output
4163 004443' 201 01 0 00 004527' MOVEI 1,T51M ; set up microcode address
4164 004444' 260 17 0 00 004246* GO TLOAD ; load/verify it
4165 004445' 263 17 0 00 000000 RTN ; failed - exit test
4166
4167 ; 1st segment of test (Segment A) (Start the port)
4168
4169 004446' 400 15 0 00 000000 TA51: SETZ ERFLG, ; clear error flag
4170 004447' 201 00 0 00 000001 MOVEI 1 ; set subtest number
4171 004450' 202 00 0 00 004310* MOVEM TSTSUB ; to 1
4172 004451' 201 00 0 00 000010 MOVEI MPRUN ; only set MPRUN bit when
4173 004452' 202 00 0 00 004254* MOVEM SDATA ; starting the port
4174 004453' 402 00 0 00 004255* SETZM SNEXT ; set start address to 0
4175 004454' 260 17 0 00 010277' GO MSTART ; start up port
4176 004455' 254 00 0 00 004446' JRST TA51 ; loop on error
4177 004456' 254 00 0 00 004520' JRST TX51 ; altmode exit
4178 004457' 326 15 0 00 004520' JUMPN ERFLG,TX51 ; error? yes - exit
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 89
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0563
4179
4180 ; 2nd segment of test (Segment B) (Verify that bit 13 is set in CSR)
4181
4182 004460' 350 00 0 00 004450* TB51: AOS TSTSUB ; point to next subtest
4183 004461' 260 17 0 00 004312* GO RDCSR ; read it
4184 004462' 474 15 0 00 000000 SETO ERFLG, ; error
4185 004463' 202 01 0 00 010365' MOVEM 1,SAVCSR ; save CSR data
4186 004464' 607 01 0 00 000020 TLNN 1,(ECOMP) ; bit set?
4187 004465' 474 15 0 00 000000 SETO ERFLG, ; no - set error flag
4188 004466' 027 00 0 00 004521' SCOPER MB51 ; print error message
4189 004467' 254 00 0 00 004446' JRST TA51 ; loop on error
4190 004470' 254 00 0 00 004520' JRST TX51 ; altmode exit
4191 004471' 326 15 0 00 004520' JUMPN ERFLG,TX51 ; error? yes - exit
4192
4193 ; 3rd segment of test (Segment C) (Verify that bit 13 is cleared in CSR)
4194
4195 004472' 350 00 0 00 004460* TC51: AOS TSTSUB ; point to next subtest
4196 004473' 550 01 0 00 010365' HRRZ 1,SAVCSR ; save CSR data
4197 004474' 260 17 0 00 004276* GO LDCSR ; write CSR register
4198 004475' 260 17 0 00 004461* GO RDCSR ; read it
4199 004476' 474 15 0 00 000000 SETO ERFLG, ; error
4200 004477' 603 01 0 00 000020 TLNE 1,(ECOMP) ; bit set?
4201 004500' 474 15 0 00 000000 SETO ERFLG, ; no - set error flag
4202 004501' 202 01 0 00 010365' MOVEM 1,SAVCSR ; save CSR data
4203 004502' 027 00 0 00 004523' SCOPER MC51 ; print error message
4204 004503' 254 00 0 00 004446' JRST TA51 ; loop on error
4205 004504' 254 00 0 00 004520' JRST TX51 ; altmode exit
4206 004505' 326 15 0 00 004520' JUMPN ERFLG,TX51 ; error? yes - exit
4207
4208 ; 4th segment of test (Segment D) (Verify that bit 13 is cleared in CSR)
4209
4210 004506' 350 00 0 00 004472* TD51: AOS TSTSUB ; point to next subtest
4211 004507' 260 17 0 00 004311* GO IPACLR ; do a 'port clear'
4212 004510' 260 17 0 00 004475* GO RDCSR ; read it
4213 004511' 474 15 0 00 000000 SETO ERFLG, ; error
4214 004512' 603 01 0 00 000020 TLNE 1,(ECOMP) ; bit set?
4215 004513' 474 15 0 00 000000 SETO ERFLG, ; no - set error flag
4216 004514' 202 01 0 00 010365' MOVEM 1,SAVCSR ; save CSR data
4217 004515' 027 00 0 00 004523' SCOPER MC51 ; print error message
4218 004516' 254 00 0 00 004446' JRST TA51 ; loop on error
4219 004517' 254 00 0 00 004520' JRST TX51 ; altmode exit
4220
4221 ; End of test
4222
4223 004520' 263 17 0 00 000000 TX51: RTN ; return
4224
4225 ; Error message - CSR bit 13 not set
4226
4227 004521' 140000 012112' MB51: MSG!TXNOT![ASCIZ /CSR bit 13 is not set after ucode writes it/]
4228 004522' 270000 010231' LAST!CALL!TXALL!MPNT2
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 90
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0564
4229
4230 ; Error message - CSR bit 13 set
4231
4232 004523' 140000 012123' MC51: MSG!TXNOT![ASCIZ /CSR bit 13 set after ucode clears it/]
4233 004524' 270000 010231' LAST!CALL!TXALL!MPNT2
4234
4235 ; Error message - CSR bit 13 set
4236
4237 004525' 140000 012133' MD51: MSG!TXNOT![ASCIZ /CSR bit 13 set after EBUS Reset/]
4238 004526' 270000 010231' LAST!CALL!TXALL!MPNT2
4239
4240 ; Microcode: First, load a 1 bit mask into Register 0 (bit 13
4241 ; set)
4242
4243 004527' 000000 010000 T51M: MWORD <ADDR=0,JMAP,J=1,SD0,AND,B=2,D=2> ; 0
4244 004530' 742001 000040
4245 004531' 000100 000000 MWORD <CONT,S0B,PLUS,B=2,D=2,CRY> ; 1
4246 004532' 302001 000740
4247 004533' 000200 250000 MWORD <LDCT,J=25> ; 2
4248 004534' 000000 000300
4249 004535' 000300 030000 MWORD <RPCT,J=3,SAB,PLUS,A=2,B=2,D=2> ; 3
4250 004536' 102021 000220
4251
4252 ; Read CSR into register 1
4253
4254 004537' 000400 060040 MWORD <CJP,J=6,CENA,CCGC,SELE,MGC=40> ; 4
4255 004540' 000400 015060
4256 004541' 000500 040000 MWORD <JMAP,J=4> ; 5
4257 004542' 000000 000040
4258 004543' 000600 000100 MWORD <CONT,SD0,B=1,OR,D=2,SELE,MGC=100> ; 6
4259 004544' 732000 405340
4260
4261 ; Verify CSR bit 13 is zero
4262
4263 004545' 000700 110000 MWORD <CJP,J=11,SAB,A=2,B=1,AND,D=1,CENA,CCFZ> ; 7
4264 004546' 141420 420060
4265 004547' 001001 000000 MWORD <JMAP,J=100> ; 10
4266 004550' 000000 000040
4267
4268 ; Write to CSR (set bit 13)
4269
4270 004551' 001100 002004 MWORD <CONT,S0A,A=2,OR,D=1,OENA,SELE,MGC=4> ; 11
4271 004552' 431020 005340
4272 004553' 001200 140040 MWORD <CJP,J=14,CENA,CCGC,SELE,MGC=40> ; 12
4273 004554' 000400 015060
4274 004555' 001300 120000 MWORD <JMAP,J=12> ; 13
4275 004556' 000000 000040
4276 004557' 001400 000200 MWORD <CONT,S0A,A=1,OR,D=1,SELE,MGC=200> ; 14
4277 004560' 431010 005340
4278
4279 ; Read CSR into register 1
4280
4281 004561' 001500 170040 MWORD <CJP,J=17,CENA,CCGC,SELE,MGC=40> ; 15
4282 004562' 000400 015060
4283 004563' 001600 150000 MWORD <JMAP,J=15> ; 16
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 90-1
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0565
4284 004564' 000000 000040
4285 004565' 001700 000100 MWORD <CONT,SD0,B=1,OR,D=2,SELE,MGC=100> ; 17
4286 004566' 732000 405340
4287
4288 ; Verify CSR bit 13 is set
4289
4290 004567' 002001 010000 MWORD <CJP,J=101,SAB,A=2,B=1,AND,D=1,CENA,CCFZ> ; 20
4291 004570' 141420 420060
4292
4293 ; Wait for 'CCCSRCHNG' to come up, indicating the KL code
4294 ; has done its bit.
4295
4296 004571' 002100 230000 MWORD <CJP,J=23,CENA,CCCC> ; 21
4297 004572' 000400 030060
4298 004573' 002200 210000 MWORD <JMAP,J=21> ; 22
4299 004574' 000000 000040
4300
4301 ; Write to CSR (clear bit 13)
4302
4303 004575' 002300 002004 MWORD <CONT,S0A,A=1,AND,D=1,OENA,SELE,MGC=4> ; 23
4304 004576' 441010 005340
4305 004577' 002400 260040 MWORD <CJP,J=26,CENA,CCGC,SELE,MGC=40> ; 24
4306 004600' 000400 015060
4307 004601' 002500 240000 MWORD <JMAP,J=24> ; 25
4308 004602' 000000 000040
4309 004603' 002600 000200 MWORD <CONT,SELE,MGC=200> ; 26
4310 004604' 000000 005340
4311
4312 ; Read CSR into register 1
4313
4314 004605' 002700 310040 MWORD <CJP,J=31,CENA,CCGC,SELE,MGC=40> ; 27
4315 004606' 000400 015060
4316 004607' 003000 270000 MWORD <JMAP,J=27> ; 30
4317 004610' 000000 000040
4318 004611' 003100 000100 MWORD <CONT,SD0,B=1,OR,D=2,SELE,MGC=100> ; 31
4319 004612' 732000 405340
4320
4321 ; Verify CSR bit 13 is clear
4322
4323 004613' 003200 340000 MWORD <CJP,J=34,SAB,A=2,B=1,AND,D=1,CENA,CCFZ> ; 32
4324 004614' 141420 420060
4325 004615' 003301 020000 MWORD <JMAP,J=102> ; 33
4326 004616' 000000 000040
4327
4328 ; Done - loop forever
4329
4330 004617' 003400 340000 MWORD <JMAP,J=34> ; 34
4331 004620' 000000 000040
4332
4333 ; Error 100 - bit 13 not initially zero
4334 ; Error 101 - bit 13 failed to set
4335 ; Error 102 - bit 13 failed to clear
4336
4337 004621' 010001 000000 MWORD <ADDR=100,JMAP,J=100> ; 100
4338 004622' 000000 000040
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 90-2
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0566
4339 004623' 010101 010000 MWORD <ADDR=101,JMAP,J=101> ; 101
4340 004624' 000000 000040
4341 004625' 010201 020000 MWORD <ADDR=102,JMAP,J=102> ; 102
4342 004626' 000000 000040
4343 004627' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 91
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0567
4344
4345 ;#********************************************************************
4346 ;* TEST 52 - x
4347 ;#********************************************************************
4348
4349 ; Test data
4350
4351 004630' 263 17 0 00 000000 TSTE52: RTN ; exit
4352 004631' 000000 000052 ZEBUS!52 ; test mask
4353 004632' 000000 012142' 0,,[ASCIZ ^x^]
4354 004633' 000000 000000 0,,0
4355 004634' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 92
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0568
4356
4357 ;#********************************************************************
4358 ;* TEST 53 - MPROC Run Bit
4359 ;
4360 ; Description: This test verifies that once MPROC Run is set it
4361 ; stays set.
4362 ;
4363 ; Procedure: KL> EBUS Reset
4364 ; KL> Load test ucode (set to start at location 0)
4365 ; KL> Write CSR to set MPROC Run
4366 ; KL> Read CSR and verify that MPROC Run is still
4367 ; set? (It should be)
4368 ;
4369 ; Failure: Once set and if Single Step is not set, MPROC Run
4370 ; stays set until either cleared by re-writing the
4371 ; CSR Register or upon occurence of an error.
4372 ;#********************************************************************
4373
4374 ; Test data
4375
4376 004635' 254 00 0 00 004646' TSTE53: JRST TG53 ; go start test
4377 004636' 400400 000053 EBUS!NDMP!ZEBUS!53 ; test mask
4378 004637' 004701' 012143' T53M,,[ASCIZ ^MPROC Run Bit^]
4379 004640' 010652' 012146' [EXP MLAST!E17],,[EXP E6,E1,E12,E14,MLAST!M1]
4380 004641' 000000000000# TSTU6 ; failure test table
4381 004642' 000000000000# TSTU7 ; ...
4382 004643' 000000000000# TSTU41
4383 004644' 000000 003713' TSTE45
4384 004645' 777777 777777 -1
4385
4386 ; Start test
4387
4388 004646' 201 00 0 00 000000' TG53: MOVEI Z2 ; get address of module start
4389 004647' 260 17 0 00 004442* GO TRACE ; handle trace output
4390 004650' 201 01 0 00 004701' MOVEI 1,T53M ; set up microcode address
4391 004651' 260 17 0 00 004444* GO TLOAD ; load/verify it
4392 004652' 263 17 0 00 000000 RTN ; failed - exit test
4393
4394 ; 1st segment of test (Segment A) (Start the port)
4395
4396 004653' 400 15 0 00 000000 TA53: SETZ ERFLG, ; clear error flag
4397 004654' 201 00 0 00 000001 MOVEI 1 ; set subtest number
4398 004655' 202 00 0 00 004506* MOVEM TSTSUB ; to 1
4399 004656' 201 00 0 00 000010 MOVEI MPRUN ; only set MPRUN bit when
4400 004657' 202 00 0 00 004452* MOVEM SDATA ; starting the port
4401 004660' 402 00 0 00 004453* SETZM SNEXT ; set start address to 0
4402 004661' 260 17 0 00 010277' GO MSTART ; start up port
4403 004662' 254 00 0 00 004653' JRST TA53 ; loop on error
4404 004663' 254 00 0 00 004676' JRST TX53 ; altmode exit
4405 004664' 326 15 0 00 004676' JUMPN ERFLG,TX53 ; error? yes - exit
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 93
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0569
4406
4407 ; 2nd segment of test (Segment B) (Verify MPRun bit)
4408
4409 004665' 350 00 0 00 004655* TB53: AOS TSTSUB ; point to next subtest
4410 004666' 260 17 0 00 004510* GO RDCSR ; read CSR
4411 004667' 474 15 0 00 000000 SETO ERFLG, ; error
4412 004670' 202 01 0 00 010365' MOVEM 1,SAVCSR ; save data
4413 004671' 606 01 0 00 000010 TRNN 1,MPRUN ; 'MPRun' set?
4414 004672' 474 15 0 00 000000 SETO ERFLG, ; no - flag error
4415 004673' 027 00 0 00 004677' SCOPER MB53 ; print error message
4416 004674' 254 00 0 00 004653' JRST TA53 ; loop on error
4417 004675' 254 00 0 00 004676' JRST TX53 ; altmode exit
4418
4419 ; End of test
4420
4421 004676' 263 17 0 00 000000 TX53: RTN ; return
4422
4423 ; Error message - MPRun cleared
4424
4425 004677' 140000 012153' MB53: MSG!TXNOT![ASCIZ /CSR Bit 32 'MPRun' did not stay set/]
4426 004700' 270000 010231' LAST!CALL!TXALL!MPNT2
4427
4428 ; Microcode: Infinite loop.
4429
4430 004701' 000000 000000 T53M: MWORD <ADDR=0,JZ>
4431 004702' 000000 000000
4432 004703' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 94
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0570
4433
4434 ;#********************************************************************
4435 ;* TEST 54 - Basic KMUX Parity Test
4436 ;
4437 ; Description: Do a CONI and see if a page fail occurred.
4438 ;
4439 ; Procedure: EBUS Reset (CSR should have odd parity)
4440 ; Read CSR
4441 ; Page fail (due to AR/ARx parity error?
4442 ; if yes - error
4443 ; if no - ok
4444 ; Write 0's to CSR (should now have even parity)
4445 ; Read CSR
4446 ; Page fail (due to AR/ARx parity error?
4447 ; if yes - error
4448 ; if no - ok
4449 ; Write 1 to CSR (should now have odd parity)
4450 ; Read CSR
4451 ; Page fail (due to AR/ARx parity error?
4452 ; if yes - error
4453 ; if no - ok
4454 ;
4455 ; Failure: Parity not received properly over the EBUS.
4456 ; KMUX Parity Generators
4457 ;#********************************************************************
4458
4459 ; Test data
4460
4461 004704' 254 00 0 00 004711' TSTE54: JRST TG54 ; go start test
4462 004705' 400000 000054 EBUS!ZEBUS!54 ; test mask
4463 004706' 000000 012163' 0,,[ASCIZ ^Basic KMUX Parity Test^]
4464 004707' 011021' 011022' [EXP MLAST!E18],,[EXP E9,MLAST!E22]
4465 004710' 777777 777777 -1 ; failure test table
4466
4467 ; Start test
4468
4469 004711' 332 00 0 00 030037 TG54: SKIPE USER ; user mode?
4470 GO [MOVE TSTFLG ; yes - ensure this test does not
4471 TLO (TUSER) ; get run (but only if not in
4472 SKIPN UDEBUG ; debug mode)
4473 MOVEM TSTFLG
4474 004712' 260 17 0 00 010511' RTN]
4475 004713' 201 00 0 00 000000' MOVEI Z2 ; get address of module start
4476 004714' 260 17 0 00 004647* GO TRACE ; handle trace output
4477
4478 004715' 400 15 0 00 000000 TA54: SETZ ERFLG, ; clear error flag
4479 004716' 260 17 0 00 003547* GO ERESET ; do an EBUS Reset
4480 004717' 402 00 0 00 001035* SETZM PFAIL ; clear page fail count
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 95
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0571
4481
4482 ; First check for page fail
4483
4484 004720' 260 17 0 00 004666* GO RDCSR ; read CSR
4485 004721' 255 00 0 00 000000 JFCL ; error - ignore
4486 004722' 332 00 0 00 004717* SKIPE PFAIL ; page fail occurred?
4487 004723' 254 00 0 00 004737' JRST TB54 ; yes - go handle error
4488
4489 ; 2nd check for page fail
4490
4491 004724' 400 01 0 00 000000 SETZ 1, ; clear AC1
4492 004725' 260 17 0 00 004474* GO LDCSR ; write 0's to CSR
4493 004726' 260 17 0 00 004720* GO RDCSR ; read CSR
4494 004727' 255 00 0 00 000000 JFCL ; error - ignore
4495 004730' 332 00 0 00 004722* SKIPE PFAIL ; page fail occurred?
4496 004731' 254 00 0 00 004737' JRST TB54 ; yes - go handle error
4497
4498 ; 3rd check for page fail
4499
4500 004732' 201 01 0 00 000001 MOVEI 1,1 ; set up AC1
4501 004733' 260 17 0 00 004725* GO LDCSR ; write 1 to CSR
4502 004734' 260 17 0 00 004726* GO RDCSR ; read CSR
4503 004735' 255 00 0 00 000000 JFCL ; error - ignore
4504 004736' 332 00 0 00 004730* SKIPE PFAIL ; page fail occurred?
4505 004737' 474 15 0 00 000000 TB54: SETO ERFLG, ; yes - set error flag
4506
4507 ; Error handling
4508
4509 004740' 027 00 0 00 004744' SCOPER MA54 ; print error message
4510 004741' 254 00 0 00 004715' JRST TA54 ; loop on error
4511 004742' 254 00 0 00 004743' JRST TX54 ; altmode exit
4512
4513 ; End of test
4514
4515 004743' 263 17 0 00 000000 TX54: RTN ; return
4516
4517 ; Error messages
4518
4519 004744' 140000 012170' MA54: MSG!TXNOT![ASCIZ /Did EBUS Reset, then CONI CSR/]
4520 004745' 270000 004746' LAST!CALL!TXALL!MA54PN
4521
4522 004746' 037 00 0 00 012176' MA54PN: TMSGC <Page fail occurred (AR/ARx parity error)>
4523 004747' 260 17 0 00 010314' GO PFPNT ; print page fail data
4524 004750' 263 17 0 00 000000 RTN ; return
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 96
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0572
4525
4526 ;#********************************************************************
4527 ;* TEST 55 - Clearing MPROC Run Bit
4528 ;
4529 ; Description: This test verifies that the 'MPROC Run' bit is
4530 ; actually is reset upon detection of an error.
4531 ;
4532 ; Procedure: KL> EBUS Reset
4533 ; KL> Load test ucode with bad parity
4534 ; KL> Write CSR to set MPROC Run
4535 ; UC> The first microword executes ok
4536 ; UC> The 2nd microword generates CRAM PE
4537 ; KL> Read CSR - MPROC Run should be cleared
4538 ;
4539 ; Failure: MPROC Err sets whenever the micro-processor sets
4540 ; either CRAM PE or MBUS Error. This bit then
4541 ; clears MPROC Run.
4542 ;#********************************************************************
4543
4544 ; Test data
4545
4546 004751' 254 00 0 00 004763' TSTE55: JRST TG55 ; go start test
4547 004752' 400400 000055 EBUS!NDMP!ZEBUS!55 ; test mask
4548 004753' 005016' 012207' T55M,,[ASCIZ ^Clearing MPROC Run Bit^]
4549 004754' 012214' 000000 [EXP E17,MLAST!E14],,0
4550 004755' 000000 005025' TSTE56 ; failure test table
4551 004756' 000000000000# TSTU10 ; ...
4552 004757' 000000000000# TSTU11
4553 004760' 000000000000# TSTU12
4554 004761' 000000000000# TSTU13
4555 004762' 777777 777777 -1
4556
4557 ; Start test
4558
4559 004763' 201 00 0 00 000000' TG55: MOVEI Z2 ; get address of module start
4560 004764' 260 17 0 00 004714* GO TRACE ; handle trace output
4561 004765' 201 01 0 00 005016' MOVEI 1,T55M ; set up microcode address
4562 004766' 260 17 0 00 004651* GO TLOAD ; load/verify it
4563 004767' 263 17 0 00 000000 RTN ; failed - exit test
4564
4565 ; 1st segment of test (Segment A) (Start the port)
4566
4567 004770' 400 15 0 00 000000 TA55: SETZ ERFLG, ; clear error flag
4568 004771' 201 00 0 00 000001 MOVEI 1 ; set subtest number
4569 004772' 202 00 0 00 004665* MOVEM TSTSUB ; to 1
4570 004773' 201 00 0 00 000010 MOVEI MPRUN ; only set MPRUN bit when
4571 004774' 202 00 0 00 004657* MOVEM SDATA ; starting the port
4572 004775' 402 00 0 00 004660* SETZM SNEXT ; set start address to 0
4573 004776' 260 17 0 00 010277' GO MSTART ; start up port
4574 004777' 254 00 0 00 004770' JRST TA55 ; loop on error
4575 005000' 254 00 0 00 005013' JRST TX55 ; altmode exit
4576 005001' 326 15 0 00 005013' JUMPN ERFLG,TX55 ; error? yes - exit
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 97
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0573
4577
4578 ; 2nd segment of test (Segment B) (Verify that MPRun cleared in CSR)
4579
4580 005002' 350 00 0 00 004772* TB55: AOS TSTSUB ; point to next subtest
4581 005003' 260 17 0 00 004734* GO RDCSR ; read it
4582 005004' 474 15 0 00 000000 SETO ERFLG, ; error
4583 005005' 602 01 0 00 000010 TRNE 1,MPRUN ; bit set?
4584 005006' 474 15 0 00 000000 SETO ERFLG, ; yes - set error flag
4585 005007' 202 01 0 00 010365' MOVEM 1,SAVCSR ; save CSR data
4586 005010' 027 00 0 00 005014' SCOPER MB55 ; print error message
4587 005011' 254 00 0 00 004770' JRST TA55 ; loop on error
4588 005012' 254 00 0 00 005013' JRST TX55 ; altmode exit
4589
4590 ; End of test
4591
4592 005013' 263 17 0 00 000000 TX55: RTN ; return
4593
4594 ; Error message - MPRun did not clear
4595
4596 005014' 140000 012216' MB55: MSG!TXNOT![ASCIZ /CSR bit 32 'MPRun' not cleared after CRAM PE/]
4597 005015' 270000 010231' LAST!CALL!TXALL!MPNT2
4598
4599 ; Microcode: Cause CRAM PE on 2nd microword
4600
4601 005016' 000000 010000 T55M: MWORD <ADDR=0,JMAP,J=1> ; 0
4602 005017' 000000 000040
4603 005020' 000100 010000 MWORD <JMAP,J=1,BAD> ; 1
4604 005021' 000000 000041
4605 005022' 000200 020000 MWORD <JMAP,J=2> ; 2
4606 005023' 000000 000040
4607 005024' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 98
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0574
4608
4609 ;#********************************************************************
4610 ;* TEST 56 - Clearing MPROC Run Bit
4611 ;
4612 ; Description: This test verifies that the 'MPROC Run' bit is
4613 ; actually is reset when a clear port is done.
4614 ;
4615 ; Procedure: KL> EBUS Reset
4616 ; KL> Load test ucode
4617 ; KL> Write CSR to set MPROC Run
4618 ; KL> Write CSR to set 'Clear Port'
4619 ; KL> Read CSR - MPROC Run should be cleared
4620 ;
4621 ; Failure: Setting the 'Clear Port' bit should immediately
4622 ; clear MPROC Run.
4623 ;#********************************************************************
4624
4625 ; Test data
4626
4627 005025' 254 00 0 00 005036' TSTE56: JRST TG56 ; go start test
4628 005026' 400400 000056 EBUS!NDMP!ZEBUS!56 ; test mask
4629 005027' 005073' 012207' T56M,,[ASCIZ ^Clearing MPROC Run Bit^]
4630 005030' 012227' 000000 [EXP E17,MLAST!E6],,0
4631 005031' 000000000000# TSTU10 ; failure test table
4632 005032' 000000000000# TSTU11 ; ...
4633 005033' 000000000000# TSTU12
4634 005034' 000000000000# TSTU13
4635 005035' 777777 777777 -1
4636
4637 ; Start test
4638
4639 005036' 201 00 0 00 000000' TG56: MOVEI Z2 ; get address of module start
4640 005037' 260 17 0 00 004764* GO TRACE ; handle trace output
4641 005040' 201 01 0 00 005073' MOVEI 1,T56M ; set up microcode address
4642 005041' 260 17 0 00 004766* GO TLOAD ; load/verify it
4643 005042' 263 17 0 00 000000 RTN ; failed - exit test
4644
4645 ; 1st segment of test (Segment A) (Start the port)
4646
4647 005043' 400 15 0 00 000000 TA56: SETZ ERFLG, ; clear error flag
4648 005044' 201 00 0 00 000001 MOVEI 1 ; set subtest number
4649 005045' 202 00 0 00 005002* MOVEM TSTSUB ; to 1
4650 005046' 201 00 0 00 000010 MOVEI MPRUN ; only set MPRUN bit when
4651 005047' 202 00 0 00 004774* MOVEM SDATA ; starting the port
4652 005050' 402 00 0 00 004775* SETZM SNEXT ; set start address to 0
4653 005051' 260 17 0 00 010277' GO MSTART ; start up port
4654 005052' 254 00 0 00 005043' JRST TA56 ; loop on error
4655 005053' 254 00 0 00 005070' JRST TX56 ; altmode exit
4656 005054' 326 15 0 00 005070' JUMPN ERFLG,TX56 ; error? yes - exit
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 99
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0575
4657
4658 ; 2nd segment of test (Segment B) (Verify that MPRun cleared in CSR)
4659
4660 005055' 350 00 0 00 005045* TB56: AOS TSTSUB ; point to next subtest
4661 005056' 201 01 0 00 400010 MOVEI 1,PCLEAR!MPRUN ; set both bits
4662 005057' 260 17 0 00 004733* GO LDCSR ; write them
4663 005060' 260 17 0 00 005003* GO RDCSR ; read it
4664 005061' 474 15 0 00 000000 SETO ERFLG, ; error
4665 005062' 602 01 0 00 000010 TRNE 1,MPRUN ; bit set?
4666 005063' 474 15 0 00 000000 SETO ERFLG, ; yes - set error flag
4667 005064' 202 01 0 00 010365' MOVEM 1,SAVCSR ; save CSR data
4668 005065' 027 00 0 00 005071' SCOPER MB56 ; print error message
4669 005066' 254 00 0 00 005043' JRST TA56 ; loop on error
4670 005067' 254 00 0 00 005070' JRST TX56 ; altmode exit
4671
4672 ; End of test
4673
4674 005070' 263 17 0 00 000000 TX56: RTN ; return
4675
4676 ; Error message - MPRun did not clear
4677
4678 005071' 140000 012231' MB56: MSG!TXNOT![ASCIZ /CSR bit 32 'MPRun' not cleared after 'Port Clear'/]
4679 005072' 270000 010231' LAST!CALL!TXALL!MPNT2
4680
4681 ; Microcode: Infinite loop.
4682
4683 005073' 000000 000000 T56M: MWORD <ADDR=0,JZ>
4684 005074' 000000 000000
4685 005075' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 100
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0576
4686
4687 ;#********************************************************************
4688 ;* TEST 57 - Verify 'Diag Single Cyc'
4689 ;
4690 ; Description: This test verifies when CSR Bit 22 'Diag Single
4691 ; Cycle' is set, the microprocessor stops after one
4692 ; instruction and clears 'MPROC Run' bit.
4693 ;
4694 ; Procedure: KL> EBUS Reset
4695 ; KL> Load test ucode
4696 ; KL> Write CSR - set 'Single Cycle' and 'MPROC Run'
4697 ; KL> Read CSR - MPROC Run should be cleared
4698 ; if not - error
4699 ; KL> 'Single Cycle' bit still set?
4700 ; if not - error
4701 ;
4702 ; Failure: ---
4703 ;#********************************************************************
4704
4705 ; Test data
4706
4707 005076' 254 00 0 00 005103' TSTE57: JRST TG57 ; go start test
4708 005077' 400400 000057 EBUS!NDMP!ZEBUS!57 ; test mask
4709 005100' 005140' 012243' T57M,,[ASCIZ ^Verify 'Diag Single Cyc'^]
4710 005101' 012250' 012253' [EXP E17,E12,MLAST!M1],,[EXP E6,E14,MLAST!E1]
4711 005102' 777777 777777 -1 ; failure test table
4712
4713 ; Start test
4714
4715 005103' 201 00 0 00 000000' TG57: MOVEI Z2 ; get address of module start
4716 005104' 260 17 0 00 005037* GO TRACE ; handle trace output
4717 005105' 201 01 0 00 005140' MOVEI 1,T57M ; set up microcode address
4718 005106' 260 17 0 00 005041* GO TLOAD ; load/verify it
4719 005107' 263 17 0 00 000000 RTN ; failed - exit test
4720
4721 ; 1st segment of test (Segment A) (Start the port)
4722
4723 005110' 400 15 0 00 000000 TA57: SETZ ERFLG, ; clear error flag
4724 005111' 201 00 0 00 000001 MOVEI 1 ; set subtest number
4725 005112' 202 00 0 00 005055* MOVEM TSTSUB ; to 1
4726 005113' 201 00 0 00 000010 MOVEI MPRUN ; only set MPRUN bit when
4727 005114' 202 00 0 00 005047* MOVEM SDATA ; starting the port
4728 005115' 402 00 0 00 005050* SETZM SNEXT ; set start address to 0
4729 005116' 260 17 0 00 010277' GO MSTART ; start up port
4730 005117' 254 00 0 00 005110' JRST TA57 ; loop on error
4731 005120' 254 00 0 00 005135' JRST TX57 ; altmode exit
4732 005121' 326 15 0 00 005135' JUMPN ERFLG,TX57 ; error? yes - exit
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 101
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0577
4733
4734 ; 2nd segment of test (Segment B) (Verify that MPRun cleared in CSR)
4735
4736 005122' 350 00 0 00 005112* TB57: AOS TSTSUB ; point to next subtest
4737 005123' 201 01 0 00 020010 MOVEI 1,SINCYC!MPRUN ; set both bits
4738 005124' 260 17 0 00 005057* GO LDCSR ; write them
4739 005125' 260 17 0 00 005060* GO RDCSR ; read it
4740 005126' 474 15 0 00 000000 SETO ERFLG, ; error
4741 005127' 602 01 0 00 000010 TRNE 1,MPRUN ; bit set?
4742 005130' 474 15 0 00 000000 SETO ERFLG, ; yes - set error flag
4743 005131' 202 01 0 00 010365' MOVEM 1,SAVCSR ; save CSR data
4744 005132' 027 00 0 00 005136' SCOPER MB57 ; print error message
4745 005133' 254 00 0 00 005110' JRST TA57 ; loop on error
4746 005134' 254 00 0 00 005135' JRST TX57 ; altmode exit
4747
4748 ; End of test
4749
4750 005135' 263 17 0 00 000000 TX57: RTN ; return
4751
4752 ; Error message - MPRun did not clear
4753
4754 005136' 140000 012256' MB57: MSG!TXNOT![ASCIZ /CSR bit 32 'MPRun' not cleared after a single cycle/]
4755 005137' 270000 010231' LAST!CALL!TXALL!MPNT2
4756
4757 ; Microcode: Infinite loop.
4758
4759 005140' 000000 000000 T57M: MWORD <ADDR=0,JZ>
4760 005141' 000000 000000
4761 005142' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 102
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0578
4762
4763 ;#********************************************************************
4764 ;* TEST 60 - PI Level n/0 Interrupts
4765 ;
4766 ; Description: This test verifies that microcode can perform
4767 ; PI Level 0 interrupts at the same time that a PI
4768 ; Level n interrupt is in progress.
4769 ;
4770 ; Procedure: KL> Port Clear
4771 ; KL> Load test ucode
4772 ; KL> Initialize PI system, but leave interrupts off
4773 ; KL> Clear locations BUFF => BUFF+17
4774 ; KL> Write CSR to set MPROC Run (PIA bits = 0)
4775 ; KL> Write physical addr BUFF to port
4776 ; KL> Set CSR Register PIA bits 33-35 to 4
4777 ;
4778 ; KL> Wait for non-vectored interrupt
4779 ; KL> Service and dismiss interrupt (PI system shut
4780 ; off for anywhere between 20 ms)
4781 ;
4782 ; KL> Verify the number of increments done, within
4783 ; an acceptable range.
4784 ; If error - print error message
4785 ;
4786 ; Failure: ---
4787 ;#********************************************************************
4788
4789 ; Test data
4790
4791 005143' 254 00 0 00 005150' TSTE60: JRST TG60 ; go start test
4792 005144' 400400 000060 EBUS!NDMP!ZEBUS!60 ; test mask
4793 005145' 005233' 012271' T60M,,[ASCIZ ^PI Level n/0 Interrupts^]
4794 005146' 012276' 012300' [EXP E14,MLAST!E7],,[EXP E4,MLAST!E1]
4795 005147' 777777 777777 -1
4796
4797 ; Start test
4798
4799 005150' 332 00 0 00 030037 TG60: SKIPE USER ; user mode?
4800 GO [MOVE TSTFLG ; yes - ensure this test does not
4801 TLO (TUSER) ; get run (but only if not in
4802 SKIPN UDEBUG ; debug mode)
4803 MOVEM TSTFLG
4804 005151' 260 17 0 00 010511' RTN]
4805 005152' 201 00 0 00 000000' MOVEI Z2 ; get address of module start
4806 005153' 260 17 0 00 005104* GO TRACE ; handle trace output
4807 005154' 201 01 0 00 005233' MOVEI 1,T60M ; set up microcode address
4808 005155' 260 17 0 00 005106* GO TLOAD ; load/verify it
4809 005156' 263 17 0 00 000000 RTN ; failed - exit test
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 103
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0579
4810
4811 ; Initialization
4812
4813 005157' 400 15 0 00 000000 TL60: SETZ ERFLG, ; clear error flag
4814 005160' 402 00 0 00 000000* SETZM BUFF ; clear buffer area
4815 005161' 200 00 0 00 012302' MOVE [BUFF,,BUFF+1] ; ...
4816 005162' 251 00 0 00 000000# BLT BUFF+^D100 ; ...
4817 005163' 260 17 0 00 004507* GO IPACLR ; do a 'port clear'
4818 005164' 260 17 0 00 000000* GO INITPI ; init PI system
4819 005165' 260 17 0 00 000000* GO SETVEC ; set up vector addresses
4820 005166' 260 17 0 00 000000* GO PISYON ; turn on PI system
4821 005167' 260 17 0 00 000000* GO PISYOF ; turn off PI system
4822
4823 ; Start up the port
4824
4825 005170' 201 01 0 00 005000 MOVEI 1,5000 ; get start address (5000)
4826 005171' 242 01 0 00 000001 LSH 1,1 ; position properly
4827 005172' 260 17 0 00 003376* GO LDRAR ; load the register
4828 005173' 201 01 0 00 000014 MOVEI 1,MPRUN!4 ; set initial data
4829 005174' 260 17 0 00 005124* GO LDCSR ; write to CSR
4830 005175' 201 02 0 00 005160* MOVEI 2,BUFF ; get buffer address
4831 005176' 336 00 0 00 003406* SKIPN UDEBUG ; debug mode?
4832 005177' 257 02 0 02 000000 MAP 2,(2) ; no - map to physical
4833 005200' 621 02 0 00 777000 TLZ 2,777000 ; mask off unused bits
4834 005201' 200 01 0 00 012303' MOVE 1,[DATAO 2] ; build a DATAO
4835 005202' 434 01 0 00 000016 IOR 1,MBCN ; include the device code
4836 005203' 336 00 0 00 005176* SKIPN UDEBUG ; debug mode?
4837 005204' 256 00 0 00 000001 XCT 1 ; no - do the DATAO
4838
4839 ; Wait a bit
4840
4841 005205' 201 00 0 00 000024 MOVEI ^D20 ; wait 20 milliseconds
4842 005206' 260 17 0 00 000000* GO ODELAY ; ...
4843
4844 ; Turn on PI system and wait for interrupt
4845
4846 005207' 260 17 0 00 005166* GO PISYON ; turn on PI system
4847 005210' 201 01 0 00 000764 MOVEI 1,^D500 ; check only 500 times
4848 005211' 335 00 0 00 000000* SKIPGE INTNUM ; interrupt occurred yet?
4849 005212' 367 01 0 00 005211' SOJG 1,.-1 ; no - loop till one does
4850 005213' 260 17 0 00 005163* GO IPACLR ; do a 'port clear'
4851
4852 ; Check results
4853
4854 005214' 200 00 0 00 005175* MOVE BUFF ; get number of examines done
4855 005215' 305 00 0 00 002734 CAIGE ^D1500 ; within range?
4856 005216' 474 15 0 00 000000 SETO ERFLG, ; no - set error flag
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 104
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0580
4857
4858 ; Handle error printouts and scope looping
4859
4860 005217' 027 00 0 00 005223' SCOPER MA60 ; print error message
4861 005220' 254 00 0 00 005157' JRST TL60 ; loop on error
4862 005221' 254 00 0 00 005222' JRST TX60 ; altmode exit
4863
4864 ; End of test
4865
4866 005222' 263 17 0 00 000000 TX60: RTN ; return
4867
4868 ; Error messages
4869
4870 005223' 270000 005224' MA60: LAST!CALL!TXALL!MA60PN ; print test data
4871
4872 MA60PN: TMSG <
4873 While PI Level 4 interrupt requested but PI system off, more than 1500.
4874 005224' 037 00 0 00 012304' interrupts should have occurred - only >
4875 005225' 200 00 0 00 005214* MOVE BUFF
4876 005226' 037 15 0 00 000000 PNTDEC
4877 005227' 037 00 0 00 012334' TMSG <. actually did.>
4878 005230' 335 00 0 00 005211* SKIPGE INTNUM ; an interrupt occurred?
4879 005231' 037 00 0 00 012340' TMSGC <PI Level 4 interrupt did not occur when PI system back on>
4880 005232' 263 17 0 00 000000 RTN
4881
4882 ; Microcode:
4883
4884 005233' 500000 000000 T60M: MWORD <ADDR=5000,JZ> ; 5000
4885 005234' 000000 000000
4886
4887 ; Initialization
4888
4889 005235' 000000 010000 MWORD <ADDR=0,JMAP,J=1> ; 0
4890 005236' 000000 000040
4891 005237' 000100 030000 MWORD <CJP,J=3,CENA,CCER> ; 1
4892 005240' 000400 100060
4893 005241' 000200 010000 MWORD <JMAP,J=1> ; 2
4894 005242' 000000 000040
4895 005243' 000300 000010 MWORD <CONT,SD0,OR,B=5,D=2,SELE,MGC=10> ; 3
4896 005244' 732002 405340
4897 005245' 000400 320470 MWORD <LDCT,J=32,SD0,OR,B=7,D=2,SKCN,MGC=470> ; 4
4898 005246' 732003 640300
4899 005247' 000500 050000 MWORD <RPCT,J=5,S0B,OR,B=7,D=7> ; 5
4900 005250' 337003 400220
4901 005251' 000600 310020 MWORD <LDCT,J=31,SD0,OR,B=11,D=2,SKCN,MGC=20> ; 6
4902 005252' 732004 640300
4903 005253' 000700 070000 MWORD <RPCT,J=7,S0B,OR,B=11,D=5> ; 7
4904 005254' 335004 400220
4905 005255' 001000 120040 MWORD <CJP,J=12,CENA,CCGC,SELE,MGC=40> ; 10
4906 005256' 000400 015060
4907 005257' 001100 100000 MWORD <JMAP,J=10> ; 11
4908 005260' 000000 000040
4909 005261' 001200 200100 MWORD <JMAP,J=20,SD0,B=2,OR,D=2,SELE,MGC=100> ; 12
4910 005262' 732001 005040
4911
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 104-1
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0581
4912 ; Request a PI level n interrupt
4913
4914 005263' 002000 210002 MWORD <ADDR=20,JMAP,J=21,S0A,AND,B=6,D=2,SELE,MGC=2> ; 20
4915 005264' 442003 005040
4916 005265' 002101 000000 MWORD <CJS,J=100,S0B,PLUS,B=6,D=2,CRY> ; 21
4917 005266' 302003 000420
4918 005267' 002200 210000 MWORD <CJP,J=21,CENA,CCIA> ; 22
4919 005270' 000400 110060
4920 005271' 002300 230000 MWORD <JMAP,J=23> ; 23
4921 005272' 000000 000040
4922
4923 ; Subroutine to do a PI level 0 interrupt (Examine/increment)
4924
4925 005273' 010001 010000 MWORD <ADDR=100,JMAP,J=101,S0A,OR,A=5,B=10,D=2> ; 100
4926 005274' 432054 000040
4927 005275' 010100 050000 MWORD <LDCT,J=5,D=2> ; 101
4928 005276' 002000 000300
4929 005277' 010201 020000 MWORD <RPCT,J=102> ; 102
4930 005300' 000000 000220
4931 005301' 010300 000000 MWORD <CONT,SAB,OR,A=7,B=10,D=2> ; 103
4932 005302' 132074 000340
4933 005303' 010400 002004 MWORD <CONT,S0B,OR,B=10,D=1,OENA,SELE,MGC=4> ; 104
4934 005304' 331004 005340
4935 005305' 010500 000001 MWORD <CONT,SELE,MGC=1> ; 105
4936 005306' 000000 005340
4937 005307' 010601 100000 MWORD <CJP,J=110,CENA,CCER> ; 106
4938 005310' 000400 100060
4939 005311' 010701 060000 MWORD <JMAP,J=106> ; 107
4940 005312' 000000 000040
4941 005313' 011000 000010 MWORD <CONT,SD0,OR,D=2,B=16,SELE,MGC=10> ; 110
4942 005314' 732007 005340
4943 005315' 011100 000000 MWORD <CRTN> ; 111
4944 005316' 000000 000240
4945 005317' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 105
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0582
4946
4947 ;#********************************************************************
4948 ;* TEST 61 - Check PIA Level 0
4949 ;
4950 ; Description: This test verifies when CSR Bit 33-35 specify PIA
4951 ; Level 0, that no interrupt occurs. The PI system
4952 ; is turned on so that interrupts would otherwise
4953 ; occur.
4954 ;
4955 ; Procedure: KL> EBUS Reset
4956 ; KL> Load test ucode (with bad parity)
4957 ; KL> Set up PI system so that interrupts are handled
4958 ; properly.
4959 ; KL> Set CSR Register PIA bits 33-35 to 0
4960 ; KL> Write CSR to set MPROC Run
4961 ; KL> Wait for interrupt, and if one occurs, print
4962 ; error information.
4963 ;
4964 ; Failure: ---
4965 ;#********************************************************************
4966
4967 ; Test data
4968
4969 005320' 254 00 0 00 005327' TSTE61: JRST TG61 ; go start test
4970 005321' 400400 000061 EBUS!NDMP!ZEBUS!61 ; test mask
4971 005322' 005372' 012354' T61M,,[ASCIZ ^Check PIA Level 0^]
4972 005323' 011570' 012360' [EXP MLAST!E4],,[EXP E1,E14,E15,MLAST!E6]
4973 005324' 000000 005401' TSTE62 ; failure test table
4974 005325' 000000 005503' TSTE63 ; ...
4975 005326' 777777 777777 -1
4976
4977 ; Start test
4978
4979 005327' 332 00 0 00 030037 TG61: SKIPE USER ; user mode?
4980 GO [MOVE TSTFLG ; yes - ensure this test does not
4981 TLO (TUSER) ; get run (but only if not in
4982 SKIPN UDEBUG ; debug mode)
4983 MOVEM TSTFLG
4984 005330' 260 17 0 00 010511' RTN]
4985 005331' 201 00 0 00 000000' MOVEI Z2 ; get address of module start
4986 005332' 260 17 0 00 005153* GO TRACE ; handle trace output
4987 005333' 201 01 0 00 005372' MOVEI 1,T61M ; set up microcode address
4988 005334' 260 17 0 00 005155* GO TLOAD ; load/verify it
4989 005335' 263 17 0 00 000000 RTN ; failed - exit test
4990
4991 ; Set up interrupt system, etc.
4992
4993 005336' 400 15 0 00 000000 TA61: SETZ ERFLG, ; clear error flag
4994 005337' 260 17 0 00 005213* GO IPACLR ; do a 'port clear'
4995 005340' 260 17 0 00 005164* GO INITPI ; init PI system
4996 005341' 260 17 0 00 005165* GO SETVEC ; set up vector addresses
4997 005342' 260 17 0 00 000000* GO .PION ; set up CSR ok and turn on PI
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 106
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0583
4998
4999 ; 1st segment of test (Segment A) (Start the port)
5000
5001 005343' 201 00 0 00 000001 MOVEI 1 ; set subtest number
5002 005344' 202 00 0 00 005122* MOVEM TSTSUB ; to 1
5003 005345' 201 00 0 00 000010 MOVEI MPRUN ; get startup bits (PI level 0)
5004 005346' 202 00 0 00 005114* MOVEM SDATA ; save in startup data word
5005 005347' 402 00 0 00 005115* SETZM SNEXT ; set start address to 0
5006 005350' 260 17 0 00 010277' GO MSTART ; start up port
5007 005351' 254 00 0 00 005336' JRST TA61 ; loop on error
5008 005352' 254 00 0 00 005366' JRST TX61 ; altmode exit
5009 005353' 326 15 0 00 005366' JUMPN ERFLG,TX61 ; error? yes - exit
5010
5011 ; 2nd segment of test (Segment B) (Look for interrupt)
5012
5013 005354' 350 00 0 00 005344* TB61: AOS TSTSUB ; point to next subtest
5014 005355' 201 00 0 00 000012 MOVEI ^D10 ; wait 10 ms for interrupt
5015 005356' 260 17 0 00 005206* GO ODELAY ; do the delay
5016 005357' 331 00 0 00 005230* SKIPL INTNUM ; any interrupt occurred?
5017 005360' 474 15 0 00 000000 SETO ERFLG, ; yes - flag error
5018 005361' 260 17 0 00 005125* GO RDCSR ; read CSR
5019 005362' 255 00 0 00 000000 JFCL ; error - ignore it
5020 005363' 027 00 0 00 005367' SCOPER MB61 ; print error message
5021 005364' 254 00 0 00 005336' JRST TA61 ; loop on error
5022 005365' 254 00 0 00 005366' JRST TX61 ; altmode exit
5023
5024 ; End of test
5025
5026 005366' 263 17 0 00 000000 TX61: RTN ; return
5027
5028 ; Error message - An interrupt request seen
5029
5030 005367' 140000 012364' MB61: MSG!TXNOT![ASCIZ /An interrupt occurred with PI Level 0/]
5031 005370' 260000 010231' CALL!TXALL!MPNT2
5032 005371' 270000 010331' LAST!CALL!TXALL!INTPNT
5033
5034 ; Microcode: Cause cram parity error.
5035
5036 005372' 000000 010000 T61M: MWORD <ADDR=0,JMAP,J=1> ; 0
5037 005373' 000000 000040
5038 005374' 000100 010000 MWORD <JMAP,J=1,BAD> ; 1
5039 005375' 000000 000041
5040 005376' 000200 020000 MWORD <JMAP,J=2> ; 2
5041 005377' 000000 000040
5042 005400' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 107
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0584
5043
5044 ;#********************************************************************
5045 ;* TEST 62 - Check Interrupt on Level 1-7
5046 ;
5047 ; Description: This test verifies when CSR Bit 33-35 specify PIA
5048 ; Levels 1-7 and an interrupt should occur, that an
5049 ; interrupt does in fact occur and on the specified
5050 ; level only.
5051 ;
5052 ; Procedure: KL> EBUS Reset
5053 ; KL> Load test ucode (with bad parity)
5054 ; KL> Set up PI system so that no interrupts occur
5055 ; but they are recognized
5056 ; KL> Set CSR Register PIA bits 33-35 to 1
5057 ; KL> Write CSR to set MPROC Run
5058 ; KL> Do a CONI PI - check that the proper program
5059 ; request bit is set
5060 ; KL> Do a CONO PI to enable the interrupt request
5061 ; on all levels
5062 ; KL> Process the interrupt and verify that only
5063 ; one occurred and on the proper level
5064 ;
5065 ; Repeat for PI Levels 2-7
5066 ;
5067 ; Failure: ---
5068 ;#********************************************************************
5069
5070 ; Test data
5071
5072 005401' 254 00 0 00 005411' TSTE62: JRST TG62 ; go start test
5073 005402' 400400 000062 EBUS!NDMP!ZEBUS!62 ; test mask
5074 005403' 005474' 012374' T62M,,[ASCIZ ^Check Interrupt on Level 1-7^]
5075 005404' 011570' 012360' [EXP MLAST!E4],,[EXP E1,E14,E15,MLAST!E6]
5076 005405' 000000 005503' TSTE63 ; failure test table
5077 005406' 000000 005603' TSTE64 ; ...
5078 005407' 000000 006030' TSTE65
5079 005410' 777777 777777 -1
5080
5081 ; Start test
5082
5083 005411' 332 00 0 00 030037 TG62: SKIPE USER ; user mode?
5084 GO [MOVE TSTFLG ; yes - ensure this test does not
5085 TLO (TUSER) ; get run (but only if not in
5086 SKIPN UDEBUG ; debug mode)
5087 MOVEM TSTFLG
5088 005412' 260 17 0 00 010511' RTN]
5089 005413' 201 00 0 00 000000' MOVEI Z2 ; get address of module start
5090 005414' 260 17 0 00 005332* GO TRACE ; handle trace output
5091 005415' 201 01 0 00 005474' MOVEI 1,T62M ; set up microcode address
5092 005416' 260 17 0 00 005334* GO TLOAD ; load/verify it
5093 005417' 263 17 0 00 000000 RTN ; failed - exit test
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 108
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0585
5094
5095 ; Initialize PI level
5096
5097 005420' 402 00 0 00 010361' SETZM SAVDAT ; set initial PI level to
5098 005421' 350 00 0 00 010361' AOS SAVDAT ; be 1
5099
5100 ; Set up interrupt system, etc.
5101
5102 005422' 400 15 0 00 000000 TA62: SETZ ERFLG, ; clear error flag
5103 005423' 260 17 0 00 005340* GO INITPI ; init PI system
5104 005424' 260 17 0 00 005341* GO SETVEC ; set up vector addresses
5105 005425' 260 17 0 00 005342* GO .PION ; set up CSR ok and turn on PI
5106
5107 ; 1st segment of test (Segment A) (Start the port)
5108
5109 005426' 200 00 0 00 010361' MOVE SAVDAT ; set subtest number to
5110 005427' 242 00 0 00 000001 LSH 1 ; PI level * 2 -1
5111 005430' 275 00 0 00 000001 SUBI 1 ; and save
5112 005431' 202 00 0 00 005354* MOVEM TSTSUB
5113 005432' 201 00 0 00 000010 MOVEI MPRUN ; get startup bits
5114 005433' 434 00 0 00 010361' OR SAVDAT ; insert PI level
5115 005434' 202 00 0 00 005346* MOVEM SDATA ; save in startup data word
5116 005435' 402 00 0 00 005347* SETZM SNEXT ; set start address to 0
5117 005436' 260 17 0 00 010277' GO MSTART ; start up port
5118 005437' 254 00 0 00 005422' JRST TA62 ; loop on error
5119 005440' 254 00 0 00 005464' JRST TX62 ; altmode exit
5120 005441' 326 15 0 00 005464' JUMPN ERFLG,TX62 ; error? yes - exit
5121
5122 ; 2nd segment of test (Segment B) (Field interrupt)
5123
5124 005442' 201 02 0 00 000620 TB62: MOVEI 2,^D400 ; check up to 400 times
5125 005443' 350 00 0 00 005431* AOS TSTSUB ; point to next subtest
5126 005444' 335 00 0 00 005357* TB62A: SKIPGE INTNUM ; interrupt occurred yet?
5127 005445' 367 02 0 00 005444' SOJG 2,TB62A ; no - loop till timeout
5128 005446' 332 00 0 00 005444* SKIPE INTNUM ; only one interrupt occurred?
5129 005447' 474 15 0 00 000000 SETO ERFLG, ; no - set error flag
5130 005450' 200 00 0 00 000000* MOVE INTTYP ; get interrupt type
5131 005451' 312 00 0 00 010361' CAME SAVDAT ; non-vectored on level 4?
5132 005452' 474 15 0 00 000000 SETO ERFLG, ; no - set error flag
5133 005453' 260 17 0 00 005361* GO RDCSR ; read CSR
5134 005454' 255 00 0 00 000000 JFCL ; error - ignore it
5135 005455' 027 00 0 00 005465' SCOPER MB62 ; print error message
5136 005456' 254 00 0 00 005422' JRST TA62 ; loop on error
5137 005457' 254 00 0 00 005464' JRST TX62 ; altmode exit
5138 005460' 326 15 0 00 005464' JUMPN ERFLG,TX62 ; error? yes - exit
5139
5140 ; Now do next PI level
5141
5142 005461' 350 01 0 00 010361' AOS 1,SAVDAT ; increment PI level
5143 005462' 307 01 0 00 000007 CAIG 1,7 ; done all 7 yet?
5144 005463' 254 00 0 00 005422' JRST TA62 ; no - loop till done
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 109
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0586
5145
5146 ; End of test
5147
5148 005464' 263 17 0 00 000000 TX62: RTN ; return
5149
5150 ; Error message - No interrupt seen
5151
5152 005465' 240000 005470' MB62: CALL!TXNOT!MB62PN
5153 005466' 260000 010231' CALL!TXALL!MPNT2
5154 005467' 270000 010331' LAST!CALL!TXALL!INTPNT
5155
5156 005470' 037 00 0 00 012402' MB62PN: TMSGC <Failed to get 1 non-vectored interrupt on Level >
5157 005471' 200 00 0 00 010361' MOVE SAVDAT
5158 005472' 037 16 0 00 000003 PNTOCS
5159 005473' 263 17 0 00 000000 RTN
5160
5161 ; Microcode: Cause cram parity error.
5162
5163 005474' 000000 010000 T62M: MWORD <ADDR=0,JMAP,J=1> ; 0
5164 005475' 000000 000040
5165 005476' 000100 010000 MWORD <JMAP,J=1,BAD> ; 1
5166 005477' 000000 000041
5167 005500' 000200 020000 MWORD <JMAP,J=2> ; 2
5168 005501' 000000 000040
5169 005502' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 110
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0587
5170
5171 ;#********************************************************************
5172 ;* TEST 63 - CSR 05 'Rqst Interrupt' Clearing
5173 ;
5174 ; Description: Verify that CSR bit 05 is cleared when an
5175 ; interrupt occurs.
5176 ;
5177 ; Procedure: KL> EBUS Reset
5178 ; KL> Load test ucode
5179 ; KL> Set up PI system so that interrupts are
5180 ; recognized and enabled on Level 4
5181 ; KL> Set CSR Register PIA bits 33-35 to 4
5182 ; KL> Write CSR to set MPROC Run
5183 ; UC> Set MPRQSTINTR
5184 ; KL> Process the interrupt
5185 ; KL> Read the CSR and verify that CSR 05 'Rqst
5186 ; Interrupt' cleared - error if it didn't.
5187 ;
5188 ; Failure: When an interrupt occurs, the bit gets cleared
5189 ; by the interrupt handshake sequence (when an IOP
5190 ; word is put on the EBUS).
5191 ;#********************************************************************
5192
5193 ; Test data
5194
5195 005503' 254 00 0 00 005512' TSTE63: JRST TG63 ; go start test
5196 005504' 400400 000063 EBUS!NDMP!ZEBUS!63 ; test mask
5197 005505' 005574' 012415' T63M,,[ASCIZ ^CSR 05 'Rqst Interrupt' Clearing^]
5198 005506' 011707' 012300' [EXP MLAST!E14],,[EXP E4,MLAST!E1]
5199 005507' 000000 005603' TSTE64 ; failure test table
5200 005510' 000000 006030' TSTE65 ; ...
5201 005511' 777777 777777 -1
5202
5203 ; Start test
5204
5205 005512' 332 00 0 00 030037 TG63: SKIPE USER ; user mode?
5206 GO [MOVE TSTFLG ; yes - ensure this test does not
5207 TLO (TUSER) ; get run (but only if not in
5208 SKIPN UDEBUG ; debug mode)
5209 MOVEM TSTFLG
5210 005513' 260 17 0 00 010511' RTN]
5211 005514' 201 00 0 00 000000' MOVEI Z2 ; get address of module start
5212 005515' 260 17 0 00 005414* GO TRACE ; handle trace output
5213 005516' 201 01 0 00 005574' MOVEI 1,T63M ; set up microcode address
5214 005517' 260 17 0 00 005416* GO TLOAD ; load/verify it
5215 005520' 263 17 0 00 000000 RTN ; failed - exit test
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 111
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0588
5216
5217 ; Set up interrupt system, etc.
5218
5219 005521' 400 15 0 00 000000 TA63: SETZ ERFLG, ; clear error flag
5220 005522' 260 17 0 00 005423* GO INITPI ; init PI system
5221 005523' 260 17 0 00 005424* GO SETVEC ; set up vector addresses
5222 005524' 260 17 0 00 005425* GO .PION ; set up CSR ok and turn on PI
5223
5224 ; 1st segment of test (Segment A) (Start the port)
5225
5226 005525' 201 00 0 00 000001 MOVEI 1 ; set subtest number
5227 005526' 202 00 0 00 005443* MOVEM TSTSUB ; to 1
5228 005527' 201 00 0 00 000014 MOVEI MPRUN!4 ; get startup bits
5229 005530' 202 00 0 00 005434* MOVEM SDATA ; save in startup data word
5230 005531' 402 00 0 00 005435* SETZM SNEXT ; set start address to 0
5231 005532' 260 17 0 00 010277' GO MSTART ; start up port
5232 005533' 254 00 0 00 005521' JRST TA63 ; loop on error
5233 005534' 254 00 0 00 005566' JRST TX63 ; altmode exit
5234 005535' 326 15 0 00 005566' JUMPN ERFLG,TX63 ; error? yes - exit
5235
5236 ; 2nd segment of test (Segment B) (Field interrupt)
5237
5238 005536' 201 02 0 00 000620 MOVEI 2,^D400 ; check up to 400 times
5239 005537' 350 00 0 00 005526* AOS TSTSUB ; point to next subtest
5240 005540' 335 00 0 00 005446* TB63: SKIPGE INTNUM ; interrupt occurred yet?
5241 005541' 367 02 0 00 005540' SOJG 2,TB63 ; no - loop till timeout
5242 005542' 332 00 0 00 005540* SKIPE INTNUM ; only one interrupt occurred?
5243 005543' 474 15 0 00 000000 SETO ERFLG, ; no - set error flag
5244 005544' 200 00 0 00 005450* MOVE INTTYP ; get interrupt type
5245 005545' 302 00 0 00 000004 CAIE 4 ; non-vectored on level 4?
5246 005546' 474 15 0 00 000000 SETO ERFLG, ; no - set error flag
5247 005547' 260 17 0 00 005453* GO RDCSR ; read CSR
5248 005550' 255 00 0 00 000000 JFCL ; error - ignore it
5249 005551' 027 00 0 00 005567' SCOPER MB63 ; print error message
5250 005552' 254 00 0 00 005521' JRST TA63 ; loop on error
5251 005553' 254 00 0 00 005566' JRST TX63 ; altmode exit
5252 005554' 326 15 0 00 005566' JUMPN ERFLG,TX63 ; error? yes - exit
5253
5254 ; 3rd segment of test (Segment C) (Verify 'Rqst Interrupt' bit cleared)
5255
5256 005555' 350 00 0 00 005537* TC63: AOS TSTSUB ; point to next subtest
5257 005556' 260 17 0 00 005547* GO RDCSR ; read CSR
5258 005557' 474 15 0 00 000000 SETO ERFLG, ; error
5259 005560' 202 01 0 00 010365' MOVEM 1,SAVCSR ; save data
5260 005561' 603 01 0 00 010000 TLNE 1,(RQINT) ; 'Rqst Interrupt' still set?
5261 005562' 474 15 0 00 000000 SETO ERFLG, ; no - flag error
5262 005563' 027 00 0 00 005572' SCOPER MC63 ; print error message
5263 005564' 254 00 0 00 005521' JRST TA63 ; loop on error
5264 005565' 254 00 0 00 005566' JRST TX63 ; altmode exit
5265
5266 ; End of test
5267
5268 005566' 263 17 0 00 000000 TX63: RTN ; return
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 112
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0589
5269
5270 ; Error message - No interrupt seen
5271
5272 005567' 140000 012424' MB63: MSG!TXNOT![ASCIZ /Failed to get 1 non-vectored interrupt on Level 4/]
5273 005570' 260000 010231' CALL!TXALL!MPNT2
5274 005571' 270000 010331' LAST!CALL!TXALL!INTPNT
5275
5276 ; Error message - 'Rqst Int' still set
5277
5278 005572' 140000 012436' MC63: MSG!TXNOT![ASCIZ /CSR Bit 05 'Rqst Int' still set/]
5279 005573' 270000 010231' LAST!CALL!TXALL!MPNT2
5280
5281 ; Microcode: Cause cram parity error.
5282
5283 005574' 000000 010000 T63M: MWORD <ADDR=0,JMAP,J=1> ; 0
5284 005575' 000000 000040
5285 005576' 000100 010000 MWORD <JMAP,J=1,BAD> ; 1
5286 005577' 000000 000041
5287 005600' 000200 020000 MWORD <JMAP,J=2> ; 2
5288 005601' 000000 000040
5289 005602' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 113
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0590
5290
5291 ;#********************************************************************
5292 ;* TEST 64 - IOP Function 0 - 40+2N Interrupt
5293 ;
5294 ; Description: This test verifies that microcode can request an
5295 ; interrupt with an IOP word specifying function 0
5296 ; and this will cause a non-vectored interrupt to
5297 ; 40+2N of the EPT.
5298 ;
5299 ; Procedure: KL> Port Clear
5300 ; KL> Load test ucode
5301 ; KL> Set up PI system so that interrupts may occur
5302 ; KL> Set CSR Register PIA bits 33-35 to 4
5303 ; KL> Write CSR to set MPROC Run
5304 ; KL> Process the interrupt and verify that a non-
5305 ; vectored interrupt occurred on PI level 4
5306 ;
5307 ; Do for IOP words specifying:
5308 ;
5309 ; AdrSpa Func Qual Device Addr IOP Word
5310 ; EPT 0 0 0 0 000000,,000000
5311 ; EPT 0 1 0 0 004000,,000000
5312 ; Exec Vir 0 0 0 0 100000,,000000
5313 ; Exec Vir 0 1 0 0 104000,,000000
5314 ; Physical 0 0 0 0 400000,,000000
5315 ; Physical 0 1 0 0 404000,,000000
5316 ; EPT 0 0 0 1000 000000,,001000
5317 ; EPT 0 1 0 1000 004000,,001000
5318 ; Exec Vir 0 0 0 1000 100000,,001000
5319 ; Exec Vir 0 1 0 1000 104000,,001000
5320 ; Physical 0 0 0 1000 400000,,001000
5321 ; Physical 0 1 0 1000 404000,,001000
5322 ;
5323 ; Failure: ---
5324 ;#********************************************************************
5325
5326 ; Test data
5327
5328 005603' 254 00 0 00 005611' TSTE64: JRST TG64 ; go start test
5329 005604' 400400 000064 EBUS!NDMP!ZEBUS!64 ; test mask
5330 005605' 005703' 012445' T64M,,[ASCIZ ^IOP Function 0 - 40+2N Interrupt^]
5331 005606' 012276' 012300' [EXP E14,MLAST!E7],,[EXP E4,MLAST!E1]
5332 005607' 000000 006030' TSTE65 ; failure test table
5333 005610' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 114
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0591
5334
5335 ; Start test
5336
5337 005611' 332 00 0 00 030037 TG64: SKIPE USER ; user mode?
5338 GO [MOVE TSTFLG ; yes - ensure this test does not
5339 TLO (TUSER) ; get run (but only if not in
5340 SKIPN UDEBUG ; debug mode)
5341 MOVEM TSTFLG
5342 005612' 260 17 0 00 010511' RTN]
5343 005613' 201 00 0 00 000000' MOVEI Z2 ; get address of module start
5344 005614' 260 17 0 00 005515* GO TRACE ; handle trace output
5345 005615' 201 01 0 00 005703' MOVEI 1,T64M ; set up microcode address
5346 005616' 260 17 0 00 005517* GO TLOAD ; load/verify it
5347 005617' 263 17 0 00 000000 RTN ; failed - exit test
5348
5349 ; Initialization
5350
5351 005620' 400 15 0 00 000000 TL64: SETZ ERFLG, ; clear error flag
5352 005621' 201 06 0 00 005635' MOVEI 6,TS64 ; get test table address
5353 005622' 402 00 0 00 005555* SETZM TSTSUB ; initialize subtest number
5354
5355 ; Loop on test execute table entries
5356
5357 005623' 260 17 0 00 005337* TA64: GO IPACLR ; clear port
5358 005624' 260 17 0 00 000000* TB64: GO IEXEC ; execute table entry
5359 005625' 254 00 0 00 005634' JRST TX64 ; end of test execute table
5360 005626' 254 00 0 00 005624' JRST TB64 ; keep looping after call
5361 005627' 474 15 0 00 000000 SETO ERFLG, ; error occurred
5362
5363 ; Handle error printouts and scope looping
5364
5365 005630' 027 00 0 00 005701' SCOPER MA64 ; print error message
5366 005631' 254 00 0 00 005620' JRST TL64 ; loop on error
5367 005632' 254 00 0 00 005634' JRST TX64 ; altmode exit
5368 005633' 322 15 0 00 005623' JUMPE ERFLG,TA64 ; do next test execute table entry
5369
5370 ; End of test
5371
5372 005634' 263 17 0 00 000000 TX64: RTN ; return
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 115
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0592
5373
5374 ; Interrupt Test Execute Table, as: (CMD,parameters)
5375
5376 005635' 300000 005652' TS64: ITABLE (ICALL,T64ADI) ; initialize start address
5377 005636' 140004 005650' ITABLE (ISETID,4,TS64Z) ; set up default inc/dec data
5378 005637' 040002 005650' ITABLE (ISETEX,2,TS64Z) ; set up default examine data
5379 005640' 100002 005650' ITABLE (ISETDE,2,TS64Z) ; set up default deposit data
5380 005641' 340000 005654' TS64A: ITABLE (ICALLC,T64ADD) ; increment test address
5381 005642' 200000 000004 ITABLE (ISETIN,0,4) ; set up interrupt
5382 005643' 500000 777777 ITABLE (ISTART,777777) ; start at default address
5383 005644' 400000 000010 ITABLE (IWAIT,10) ; wait for 10 ms.
5384 005645' 540000 000000 ITABLE (IEXIT) ; exit test if any error yet
5385 005646' 440000 005641' ITABLE (IJRST,TS64A) ; loop till done
5386 005647' 000000 000000 ITABLE (ILAST) ; end of table
5387
5388 005650' 000000 000000 TS64Z: 0
5389 005651' 000000 000000 0
5390
5391 ; Start address handling routines
5392
5393 005652' 476 00 0 00 013667' T64ADI: SETOM T64ADR# ; initialize start address
5394 005653' 263 17 0 00 000000 RTN ; return
5395
5396 005654' 350 01 0 00 013667' T64ADD: AOS 1,T64ADR ; increment address
5397 MOVE [000000,,000000 ; get IOP function word
5398 004000,,000000
5399 100000,,000000
5400 104000,,000000
5401 400000,,000000
5402 404000,,000000
5403 000000,,001000
5404 004000,,001000
5405 100000,,001000
5406 104000,,001000
5407 400000,,001000
5408 005655' 200 00 0 01 012454' 404000,,001000](1)
5409 005656' 202 00 0 00 000000* MOVEM IIOPF ; save it
5410 005657' 200 01 0 01 005664' MOVE 1,T64ADT(1) ; use dispatch table
5411 005660' 202 01 0 00 000000* MOVEM 1,IADDR ; set up start address
5412 005661' 302 01 0 00 000777 CAIE 1,777 ; done yet?
5413 005662' 350 00 0 17 000000 AOS (P) ; no - set up ok return
5414 005663' 263 17 0 00 000000 RTN ; return
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 116
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0593
5415
5416 ; Start address table
5417
5418 005664' 000000 000000 T64ADT: 0
5419 005665' 000000 000001 1
5420 005666' 000000 000002 2
5421 005667' 000000 000003 3
5422 005670' 000000 000004 4
5423 005671' 000000 000005 5
5424 005672' 000000 000006 6
5425 005673' 000000 000012 12
5426 005674' 000000 000016 16
5427 005675' 000000 000022 22
5428 005676' 000000 000026 26
5429 005677' 000000 000032 32
5430 005700' 000000 000777 777
5431
5432 ; Error messages
5433
5434 005701' 140000 012470' MA64: MSG!TXNOT![ASCIZ /IOP error detected/]
5435 005702' 000000000000# LAST!CALL!TXALL!IIPNT ; print test data
5436
5437 ; Microcode:
5438
5439 ; IOP = 000000,,000000 EPT / NVInt / Qual=0 / Addr=0
5440 ; IOP = 004000,,000000 EPT / NVInt / Qual=1 / Addr=0
5441 ; IOP = 100000,,000000 Exec Vir / NVInt / Qual=0 / Addr=0
5442 ; IOP = 104000,,000000 Exec Vir / NVInt / Qual=1 / Addr=0
5443 ; IOP = 400000,,000000 Physical / NVInt / Qual=0 / Addr=0
5444 ; IOP = 404000,,000000 Physical / NVInt / Qual=1 / Addr=0
5445
5446 005703' 000007 000000 T64M: MWORD <ADDR=0,JMAP,J=700,SD0,OR,D=2,SKCN,MGC=0>
5447 005704' 732000 240040
5448 005705' 000107 000004 MWORD <JMAP,J=700,SD0,OR,D=2,SKCN,MGC=4> ; 1
5449 005706' 732000 240040
5450 005707' 000207 000100 MWORD <JMAP,J=700,SD0,OR,D=2,SKCN,MGC=100> ; 2
5451 005710' 732000 240040
5452 005711' 000307 000104 MWORD <JMAP,J=700,SD0,OR,D=2,SKCN,MGC=104> ; 3
5453 005712' 732000 240040
5454 005713' 000407 000400 MWORD <JMAP,J=700,SD0,OR,D=2,SKCN,MGC=400> ; 4
5455 005714' 732000 240040
5456 005715' 000507 000404 MWORD <JMAP,J=700,SD0,OR,D=2,SKCN,MGC=404> ; 5
5457 005716' 732000 240040
5458
5459 ; IOP = 000000,,001000 EPT / NVInt / Qual=0 / Addr=1000
5460
5461 005717' 000600 070000 MWORD <JMAP,J=7,S0A,AND,D=2> ; 6
5462 005720' 442000 000040
5463 005721' 000700 140000 MWORD <LDCT,J=14,SAB,PLUS,D=2,CRY> ; 7
5464 005722' 102000 000700
5465 005723' 001010 000000 MWORD <CJS,J=1000> ; 10
5466 005724' 000000 000020
5467 005725' 001107 010000 MWORD <JMAP,J=701,SD0,OR,D=2,SKCN,MGC=0> ; 11
5468 005726' 732000 240040
5469
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 116-1
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0594
5470 ; IOP = 004000,,001000 EPT / NVInt / Qual=1 / Addr=1000
5471
5472 005727' 001200 130000 MWORD <JMAP,J=13,S0A,AND,D=2> ; 12
5473 005730' 442000 000040
5474 005731' 001300 140000 MWORD <LDCT,J=14,SAB,PLUS,D=2,CRY> ; 13
5475 005732' 102000 000700
5476 005733' 001410 000000 MWORD <CJS,J=1000> ; 14
5477 005734' 000000 000020
5478 005735' 001507 010004 MWORD <JMAP,J=701,SD0,OR,D=2,SKCN,MGC=4> ; 15
5479 005736' 732000 240040
5480
5481 ; IOP = 100000,,001000 Exec Vir / NVInt / Qual=0 / Addr=1000
5482
5483 005737' 001600 170000 MWORD <JMAP,J=17,S0A,AND,D=2> ; 16
5484 005740' 442000 000040
5485 005741' 001700 140000 MWORD <LDCT,J=14,SAB,PLUS,D=2,CRY> ; 17
5486 005742' 102000 000700
5487 005743' 002010 000000 MWORD <CJS,J=1000> ; 20
5488 005744' 000000 000020
5489 005745' 002107 010100 MWORD <JMAP,J=701,SD0,OR,D=2,SKCN,MGC=100> ; 21
5490 005746' 732000 240040
5491
5492 ; IOP = 104000,,001000 Exec Vir / NVInt / Qual=1 / Addr=1000
5493
5494 005747' 002200 230000 MWORD <JMAP,J=23,S0A,AND,D=2> ; 22
5495 005750' 442000 000040
5496 005751' 002300 140000 MWORD <LDCT,J=14,SAB,PLUS,D=2,CRY> ; 23
5497 005752' 102000 000700
5498 005753' 002410 000000 MWORD <CJS,J=1000> ; 24
5499 005754' 000000 000020
5500 005755' 002507 010104 MWORD <JMAP,J=701,SD0,OR,D=2,SKCN,MGC=104> ; 25
5501 005756' 732000 240040
5502
5503 ; IOP = 400000,,001000 Physical / NVInt / Qual=0 / Addr=1000
5504
5505 005757' 002600 270000 MWORD <JMAP,J=27,S0A,AND,D=2> ; 26
5506 005760' 442000 000040
5507 005761' 002700 140000 MWORD <LDCT,J=14,SAB,PLUS,D=2,CRY> ; 27
5508 005762' 102000 000700
5509 005763' 003010 000000 MWORD <CJS,J=1000> ; 30
5510 005764' 000000 000020
5511 005765' 003107 010400 MWORD <JMAP,J=701,SD0,OR,D=2,SKCN,MGC=400> ; 31
5512 005766' 732000 240040
5513
5514 ; IOP = 404000,,001000 Physical / NVInt / Qual=1 / Addr=1000
5515
5516 005767' 003200 330000 MWORD <JMAP,J=33,S0A,AND,D=2> ; 32
5517 005770' 442000 000040
5518 005771' 003300 140000 MWORD <LDCT,J=14,SAB,PLUS,D=2,CRY> ; 33
5519 005772' 102000 000700
5520 005773' 003410 000000 MWORD <CJS,J=1000> ; 34
5521 005774' 000000 000020
5522 005775' 003507 010404 MWORD <JMAP,J=701,SD0,OR,D=2,SKCN,MGC=404> ; 35
5523 005776' 732000 240040
5524
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 116-2
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0595
5525 ; Subroutine to shift the right justified bit field in R0 to
5526 ; bits 1-10, all other bits zero. Then to place in R5 and
5527 ; in EBUF to prepare for IOP request. Then request interrupt
5528 ; and halt.
5529
5530 005777' 070000 000000 MWORD <ADDR=700,CONT,S0A,AND,B=5,D=2> ; 700
5531 006000' 442002 400340
5532 006001' 070100 320000 MWORD <LDCT,J=32,D=1> ; 701
5533 006002' 001000 000300
5534 006003' 070207 020000 MWORD <RPCT,J=702,S0A,OR,D=7> ; 702
5535 006004' 437000 000220
5536 006005' 070300 002004 MWORD <CONT,SAB,OR,D=3,B=5,OENA,SELE,MGC=4> ; 703
5537 006006' 133002 405340
5538 006007' 070400 000002 MWORD <CONT,SELE,MGC=2> ; 704
5539 006010' 000000 005340
5540 006011' 070507 050000 MWORD <JMAP,J=705> ; 705
5541 006012' 000000 000040
5542
5543 ; Subroutine to shift a bit over in R0, insert into R5, then
5544 ; zero R0.
5545
5546 006013' 100000 000000 MWORD <ADDR=1000,CONT,S0A,AND,D=2,B=5> ; 1000
5547 006014' 442002 400340
5548 006015' 100110 010000 MWORD <RPCT,J=1001,S0A,OR,D=7> ; 1001
5549 006016' 437000 000220
5550 006017' 100200 000000 MWORD <CONT,SAB,OR,D=2,B=5> ; 1002
5551 006020' 132002 400340
5552 006021' 100300 000000 MWORD <CRTN,S0A,AND,D=2> ; 1003
5553 006022' 442000 000240
5554
5555 ; Subroutine to read R5
5556
5557 006023' 110011 012004 MWORD <ADDR=1100,JMAP,J=1101,S0A,A=5,OR,D=1,OENA,SELE,MGC=4>
5558 006024' 431050 005040
5559 006025' 110111 010000 MWORD <JMAP,J=1101> ; 1101
5560 006026' 000000 000040
5561 006027' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 117
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0596
5562
5563 ;#********************************************************************
5564 ;* TEST 65 - IOP Function 1 - 40+2N Interrupt
5565 ;
5566 ; Description: This test verifies that microcode can request an
5567 ; interrupt with an IOP word specifying function 1
5568 ; and this will cause a non-vectored interrupt to
5569 ; 40+2N of the EPT.
5570 ;
5571 ; Procedure: KL> Port Clear
5572 ; KL> Load test ucode
5573 ; KL> Set up PI system so that interrupts may occur
5574 ; KL> Set CSR Register PIA bits 33-35 to 4
5575 ; KL> Write CSR to set MPROC Run
5576 ; KL> Process the interrupt and verify that a non-
5577 ; vectored interrupt occurred on PI level 4
5578 ;
5579 ; Do for IOP words specifying:
5580 ;
5581 ; AdrSpa Func Qual Device Addr IOP Word
5582 ; EPT 1 0 0 0 010000,,000000
5583 ; EPT 1 1 0 0 014000,,000000
5584 ; Exec Vir 1 0 0 0 110000,,000000
5585 ; Exec Vir 1 1 0 0 114000,,000000
5586 ; Physical 1 0 0 0 410000,,000000
5587 ; Physical 1 1 0 0 414000,,000000
5588 ; EPT 1 0 0 1000 010000,,001000
5589 ; EPT 1 1 0 1000 014000,,001000
5590 ; Exec Vir 1 0 0 1000 110000,,001000
5591 ; Exec Vir 1 1 0 1000 114000,,001000
5592 ; Physical 1 0 0 1000 410000,,001000
5593 ; Physical 1 1 0 1000 414000,,001000
5594 ;
5595 ; Failure: ---
5596 ;#********************************************************************
5597
5598 ; Test data
5599
5600 006030' 254 00 0 00 006035' TSTE65: JRST TG65 ; go start test
5601 006031' 400400 000065 EBUS!NDMP!ZEBUS!65 ; test mask
5602 006032' 006127' 012474' T65M,,[ASCIZ ^IOP Function 1 - 40+2N Interrupt^]
5603 006033' 012276' 012300' [EXP E14,MLAST!E7],,[EXP E4,MLAST!E1]
5604 006034' 777777 777777 -1
5605
5606 ; Start test
5607
5608 006035' 332 00 0 00 030037 TG65: SKIPE USER ; user mode?
5609 GO [MOVE TSTFLG ; yes - ensure this test does not
5610 TLO (TUSER) ; get run (but only if not in
5611 SKIPN UDEBUG ; debug mode)
5612 MOVEM TSTFLG
5613 006036' 260 17 0 00 010511' RTN]
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 118
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0597
5614 006037' 201 00 0 00 000000' MOVEI Z2 ; get address of module start
5615 006040' 260 17 0 00 005614* GO TRACE ; handle trace output
5616 006041' 201 01 0 00 006127' MOVEI 1,T65M ; set up microcode address
5617 006042' 260 17 0 00 005616* GO TLOAD ; load/verify it
5618 006043' 263 17 0 00 000000 RTN ; failed - exit test
5619
5620 ; Initialization
5621
5622 006044' 400 15 0 00 000000 TL65: SETZ ERFLG, ; clear error flag
5623 006045' 201 06 0 00 006061' MOVEI 6,TS65 ; get test table address
5624 006046' 402 00 0 00 005622* SETZM TSTSUB ; initialize subtest number
5625
5626 ; Loop on test execute table entries
5627
5628 006047' 260 17 0 00 005623* TA65: GO IPACLR ; clear port
5629 006050' 260 17 0 00 005624* TB65: GO IEXEC ; execute table entry
5630 006051' 254 00 0 00 006060' JRST TX65 ; end of test execute table
5631 006052' 254 00 0 00 006050' JRST TB65 ; keep looping after call
5632 006053' 474 15 0 00 000000 SETO ERFLG, ; error occurred
5633
5634 ; Handle error printouts and scope looping
5635
5636 006054' 027 00 0 00 006125' SCOPER MA65 ; print error message
5637 006055' 254 00 0 00 006044' JRST TL65 ; loop on error
5638 006056' 254 00 0 00 006060' JRST TX65 ; altmode exit
5639 006057' 322 15 0 00 006047' JUMPE ERFLG,TA65 ; do next test execute table entry
5640
5641 ; End of test
5642
5643 006060' 263 17 0 00 000000 TX65: RTN ; return
5644
5645 ; Interrupt Test Execute Table, as: (CMD,parameters)
5646
5647 006061' 300000 006076' TS65: ITABLE (ICALL,T65ADI) ; initialize start address
5648 006062' 140004 006074' ITABLE (ISETID,4,TS65Z) ; set up default inc/dec data
5649 006063' 040002 006074' ITABLE (ISETEX,2,TS65Z) ; set up default examine data
5650 006064' 100002 006074' ITABLE (ISETDE,2,TS65Z) ; set up default deposit data
5651 006065' 340000 006100' TS65A: ITABLE (ICALLC,T65ADD) ; increment test address
5652 006066' 200000 000004 ITABLE (ISETIN,0,4) ; set up interrupt
5653 006067' 500000 777777 ITABLE (ISTART,777777) ; start at default address
5654 006070' 400000 000010 ITABLE (IWAIT,10) ; wait for 10 ms.
5655 006071' 540000 000000 ITABLE (IEXIT) ; exit test if any error yet
5656 006072' 440000 006065' ITABLE (IJRST,TS65A) ; loop till done
5657 006073' 000000 000000 ITABLE (ILAST) ; end of table
5658
5659 006074' 000000 000000 TS65Z: 0
5660 006075' 000000 000000 0
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 119
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0598
5661
5662 ; Start address handling routines
5663
5664 006076' 476 00 0 00 013670' T65ADI: SETOM T65ADR# ; initialize start address
5665 006077' 263 17 0 00 000000 RTN ; return
5666
5667 006100' 350 01 0 00 013670' T65ADD: AOS 1,T65ADR ; increment address
5668 MOVE [010000,,000000 ; get IOP function word
5669 014000,,000000
5670 110000,,000000
5671 114000,,000000
5672 410000,,000000
5673 414000,,000000
5674 010000,,001000
5675 014000,,001000
5676 110000,,001000
5677 114000,,001000
5678 410000,,001000
5679 006101' 200 00 0 01 012503' 414000,,001000](1)
5680 006102' 202 00 0 00 005656* MOVEM IIOPF ; save it
5681 006103' 200 01 0 01 006110' MOVE 1,T65ADT(1) ; use dispatch table
5682 006104' 202 01 0 00 005660* MOVEM 1,IADDR ; set up start address
5683 006105' 302 01 0 00 000777 CAIE 1,777 ; done yet?
5684 006106' 350 00 0 17 000000 AOS (P) ; no - set up ok return
5685 006107' 263 17 0 00 000000 RTN ; return
5686
5687 ; Start address table
5688
5689 006110' 000000 000000 T65ADT: 0
5690 006111' 000000 000001 1
5691 006112' 000000 000002 2
5692 006113' 000000 000003 3
5693 006114' 000000 000004 4
5694 006115' 000000 000005 5
5695 006116' 000000 000006 6
5696 006117' 000000 000012 12
5697 006120' 000000 000016 16
5698 006121' 000000 000022 22
5699 006122' 000000 000026 26
5700 006123' 000000 000032 32
5701 006124' 000000 000777 777
5702
5703 ; Error messages
5704
5705 006125' 140000 012470' MA65: MSG!TXNOT![ASCIZ /IOP error detected/]
5706 006126' 000000000000# LAST!CALL!TXALL!IIPNT ; print test data
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 120
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0599
5707
5708 ; Microcode:
5709
5710 ; IOP = 010000,,000000 EPT / NVInt / Qual=0 / Addr=0
5711 ; IOP = 014000,,000000 EPT / NVInt / Qual=1 / Addr=0
5712 ; IOP = 110000,,000000 Exec Vir / NVInt / Qual=0 / Addr=0
5713 ; IOP = 114000,,000000 Exec Vir / NVInt / Qual=1 / Addr=0
5714 ; IOP = 410000,,000000 Physical / NVInt / Qual=0 / Addr=0
5715 ; IOP = 414000,,000000 Physical / NVInt / Qual=1 / Addr=0
5716
5717 006127' 000007 000010 T65M: MWORD <ADDR=0,JMAP,J=700,SD0,OR,D=2,SKCN,MGC=10>
5718 006130' 732000 240040
5719 006131' 000107 000014 MWORD <JMAP,J=700,SD0,OR,D=2,SKCN,MGC=14> ; 1
5720 006132' 732000 240040
5721 006133' 000207 000110 MWORD <JMAP,J=700,SD0,OR,D=2,SKCN,MGC=110> ; 2
5722 006134' 732000 240040
5723 006135' 000307 000114 MWORD <JMAP,J=700,SD0,OR,D=2,SKCN,MGC=114> ; 3
5724 006136' 732000 240040
5725 006137' 000407 000410 MWORD <JMAP,J=700,SD0,OR,D=2,SKCN,MGC=410> ; 4
5726 006140' 732000 240040
5727 006141' 000507 000414 MWORD <JMAP,J=700,SD0,OR,D=2,SKCN,MGC=414> ; 5
5728 006142' 732000 240040
5729
5730 ; IOP = 010000,,001000 EPT / NVInt / Qual=0 / Addr=1000
5731
5732 006143' 000600 070000 MWORD <JMAP,J=7,S0A,AND,D=2> ; 6
5733 006144' 442000 000040
5734 006145' 000700 140000 MWORD <LDCT,J=14,SAB,PLUS,D=2,CRY> ; 7
5735 006146' 102000 000700
5736 006147' 001010 000000 MWORD <CJS,J=1000> ; 10
5737 006150' 000000 000020
5738 006151' 001107 010010 MWORD <JMAP,J=701,SD0,OR,D=2,SKCN,MGC=10> ; 11
5739 006152' 732000 240040
5740
5741 ; IOP = 014000,,001000 EPT / NVInt / Qual=1 / Addr=1000
5742
5743 006153' 001200 130000 MWORD <JMAP,J=13,S0A,AND,D=2> ; 12
5744 006154' 442000 000040
5745 006155' 001300 140000 MWORD <LDCT,J=14,SAB,PLUS,D=2,CRY> ; 13
5746 006156' 102000 000700
5747 006157' 001410 000000 MWORD <CJS,J=1000> ; 14
5748 006160' 000000 000020
5749 006161' 001507 010014 MWORD <JMAP,J=701,SD0,OR,D=2,SKCN,MGC=14> ; 15
5750 006162' 732000 240040
5751
5752 ; IOP = 110000,,001000 Exec Vir / NVInt / Qual=0 / Addr=1000
5753
5754 006163' 001600 170000 MWORD <JMAP,J=17,S0A,AND,D=2> ; 16
5755 006164' 442000 000040
5756 006165' 001700 140000 MWORD <LDCT,J=14,SAB,PLUS,D=2,CRY> ; 17
5757 006166' 102000 000700
5758 006167' 002010 000000 MWORD <CJS,J=1000> ; 20
5759 006170' 000000 000020
5760 006171' 002107 010110 MWORD <JMAP,J=701,SD0,OR,D=2,SKCN,MGC=110> ; 21
5761 006172' 732000 240040
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 120-1
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0600
5762
5763 ; IOP = 114000,,001000 Exec Vir / NVInt / Qual=1 / Addr=1000
5764
5765 006173' 002200 230000 MWORD <JMAP,J=23,S0A,AND,D=2> ; 22
5766 006174' 442000 000040
5767 006175' 002300 140000 MWORD <LDCT,J=14,SAB,PLUS,D=2,CRY> ; 23
5768 006176' 102000 000700
5769 006177' 002410 000000 MWORD <CJS,J=1000> ; 24
5770 006200' 000000 000020
5771 006201' 002507 010114 MWORD <JMAP,J=701,SD0,OR,D=2,SKCN,MGC=114> ; 25
5772 006202' 732000 240040
5773
5774 ; IOP = 410000,,001000 Physical / NVInt / Qual=0 / Addr=1000
5775
5776 006203' 002600 270000 MWORD <JMAP,J=27,S0A,AND,D=2> ; 26
5777 006204' 442000 000040
5778 006205' 002700 140000 MWORD <LDCT,J=14,SAB,PLUS,D=2,CRY> ; 27
5779 006206' 102000 000700
5780 006207' 003010 000000 MWORD <CJS,J=1000> ; 30
5781 006210' 000000 000020
5782 006211' 003107 010410 MWORD <JMAP,J=701,SD0,OR,D=2,SKCN,MGC=410> ; 31
5783 006212' 732000 240040
5784
5785 ; IOP = 414000,,001000 Physical / NVInt / Qual=1 / Addr=1000
5786
5787 006213' 003200 330000 MWORD <JMAP,J=33,S0A,AND,D=2> ; 32
5788 006214' 442000 000040
5789 006215' 003300 140000 MWORD <LDCT,J=14,SAB,PLUS,D=2,CRY> ; 33
5790 006216' 102000 000700
5791 006217' 003410 000000 MWORD <CJS,J=1000> ; 34
5792 006220' 000000 000020
5793 006221' 003507 010414 MWORD <JMAP,J=701,SD0,OR,D=2,SKCN,MGC=414> ; 35
5794 006222' 732000 240040
5795
5796 ; Subroutine to shift the right justified bit field in R0 to
5797 ; bits 1-10, all other bits zero. Then to place in R5 and
5798 ; in EBUF to prepare for IOP request. Then request interrupt
5799 ; and halt.
5800
5801 006223' 070000 000000 MWORD <ADDR=700,CONT,S0A,AND,B=5,D=2> ; 700
5802 006224' 442002 400340
5803 006225' 070100 320000 MWORD <LDCT,J=32,D=1> ; 701
5804 006226' 001000 000300
5805 006227' 070207 020000 MWORD <RPCT,J=702,S0A,OR,D=7> ; 702
5806 006230' 437000 000220
5807 006231' 070300 002004 MWORD <CONT,SAB,OR,D=3,B=5,OENA,SELE,MGC=4> ; 703
5808 006232' 133002 405340
5809 006233' 070400 000002 MWORD <CONT,SELE,MGC=2> ; 704
5810 006234' 000000 005340
5811 006235' 070507 050000 MWORD <JMAP,J=705> ; 705
5812 006236' 000000 000040
5813
5814 ; Subroutine to shift a bit over in R0, insert into R5, then
5815 ; zero R0.
5816
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 120-2
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0601
5817 006237' 100000 000000 MWORD <ADDR=1000,CONT,S0A,AND,D=2,B=5> ; 1000
5818 006240' 442002 400340
5819 006241' 100110 010000 MWORD <RPCT,J=1001,S0A,OR,D=7> ; 1001
5820 006242' 437000 000220
5821 006243' 100200 000000 MWORD <CONT,SAB,OR,D=2,B=5> ; 1002
5822 006244' 132002 400340
5823 006245' 100300 000000 MWORD <CRTN,S0A,AND,D=2> ; 1003
5824 006246' 442000 000240
5825
5826 ; Subroutine to read R5
5827
5828 006247' 110011 012004 MWORD <ADDR=1100,JMAP,J=1101,S0A,A=5,OR,D=1,OENA,SELE,MGC=4>
5829 006250' 431050 005040
5830 006251' 110111 010000 MWORD <JMAP,J=1101> ; 1101
5831 006252' 000000 000040
5832 006253' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 121
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0602
5833
5834 ;#********************************************************************
5835 ;* TEST 66 - x
5836 ;#********************************************************************
5837
5838 ; Test data
5839
5840 006254' 263 17 0 00 000000 TSTE66: RTN ; exit
5841 006255' 000000 000066 ZEBUS!66 ; test mask
5842 006256' 000000 012142' 0,,[ASCIZ ^x^]
5843 006257' 000000 000000 0,,0
5844 006260' 777777 777777 -1
5845
5846
5847 ;#********************************************************************
5848 ;* TEST 67 - x
5849 ;#********************************************************************
5850
5851 ; Test data
5852
5853 006261' 263 17 0 00 000000 TSTE67: RTN ; exit
5854 006262' 000000 000067 ZEBUS!67 ; test mask
5855 006263' 000000 012142' 0,,[ASCIZ ^x^]
5856 006264' 000000 000000 0,,0
5857 006265' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 122
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0603
5858
5859 ;#********************************************************************
5860 ;* TEST 70 - IOP Function 4 - Examine
5861 ;
5862 ; Description: This test verifies that microcode can request an
5863 ; interrupt with an IOP word specifying function 4
5864 ; and this will cause the location specified by
5865 ; the address portion of the function word to be
5866 ; placed on the EBUS for reading by the port.
5867 ;
5868 ; Procedure: KL> Port Clear
5869 ; KL> Load test ucode
5870 ; KL> Set up PI system so that interrupts may occur
5871 ; KL> Set CSR Register PIA bits 33-35 to 0
5872 ; KL> Write CSR to set MPROC Run
5873 ; KL> Stop the port, then read the EBUF and verify
5874 ; that the data pattern specified is now in
5875 ; the EBUF.
5876 ;
5877 ; Data pattern to use: 525252,,777777
5878 ;
5879 ; Do for IOP words specifying:
5880 ;
5881 ; AdrSpa Func Qual Device Addr IOP Word
5882 ; Physical 4 0 0 BUFF 440000,,BUFF
5883 ; EPT 4 0 0 100 040000,,000100
5884 ; Exec Vir 4 0 0 500 140000,,000500
5885 ; Physical 4 0 0 600 440000,,000600
5886 ;
5887 ; Failure: ---
5888 ;#********************************************************************
5889
5890 ; Test data
5891
5892 006266' 254 00 0 00 006275' TSTE70: JRST TG70 ; go start test
5893 006267' 400400 000070 EBUS!NDMP!ZEBUS!70 ; test mask
5894 006270' 006425' 012517' T70M,,[ASCIZ ^IOP Function 4 - Examine^]
5895 006271' 012276' 012300' [EXP E14,MLAST!E7],,[EXP E4,MLAST!E1]
5896 006272' 000000 006522' TSTE71 ; failure test table
5897 006273' 000000 006764' TSTE72 ; ...
5898 006274' 777777 777777 -1
5899
5900 ; Start test
5901
5902 006275' 201 00 0 00 000000' TG70: MOVEI Z2 ; get address of module start
5903 006276' 260 17 0 00 006040* GO TRACE ; handle trace output
5904 006277' 201 01 0 00 006425' MOVEI 1,T70M ; set up microcode address
5905 006300' 260 17 0 00 006042* GO TLOAD ; load/verify it
5906 006301' 263 17 0 00 000000 RTN ; failed - exit test
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 123
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0604
5907
5908 ; Initialization
5909
5910 006302' 201 01 0 00 000001 MOVEI 1,1 ; set to 'read'
5911 006303' 201 02 0 00 000010 MOVEI 2,10 ; set to 10 words
5912 006304' 201 14 0 00 000010 MOVEI PAT,10 ; set up data pattern
5913 006305' 260 17 0 00 000000* GO BUFGEN ; build CCW list (locks BUFF in core)
5914
5915 006306' 400 15 0 00 000000 TL70: SETZ ERFLG, ; clear error flag
5916 006307' 201 06 0 00 006323' MOVEI 6,TS70 ; get test table address
5917 006310' 402 00 0 00 006046* SETZM TSTSUB ; initialize subtest number
5918
5919 ; Loop on test execute table entries
5920
5921 006311' 260 17 0 00 006047* TA70: GO IPACLR ; clear port
5922 006312' 260 17 0 00 006050* TB70: GO IEXEC ; execute table entry
5923 006313' 254 00 0 00 006322' JRST TX70 ; end of test execute table
5924 006314' 254 00 0 00 006312' JRST TB70 ; keep looping after call
5925 006315' 474 15 0 00 000000 SETO ERFLG, ; error occurred
5926
5927 ; Handle error printouts and scope looping
5928
5929 006316' 027 00 0 00 006423' SCOPER MA70 ; print error message
5930 006317' 254 00 0 00 006306' JRST TL70 ; loop on error
5931 006320' 254 00 0 00 006322' JRST TX70 ; altmode exit
5932 006321' 322 15 0 00 006311' JUMPE ERFLG,TA70 ; do next test execute table entry
5933
5934 ; End of test
5935
5936 006322' 263 17 0 00 000000 TX70: RTN ; return
5937
5938 ; Interrupt Test Execute Table, as: (CMD,parameters)
5939
5940 006323' 140004 006342' TS70: ITABLE (ISETID,4,TS70Z) ; set up increment/decrement data
5941 006324' 100002 006342' ITABLE (ISETDE,2,TS70Z) ; set up default deposit data
5942
5943 006325' 300000 006371' ITABLE (ICALL,TS70EX) ; set up test data
5944 006326' 040002 006344' ITABLE (ISETEX,2,TS70AA) ; set up examine data
5945 006327' 500000 000100 ITABLE (ISTART,100) ; start at 100
5946 006330' 400000 000010 ITABLE (IWAIT,10) ; wait for 10 ms.
5947 006331' 540000 000000 ITABLE (IEXIT) ; exit test if any error yet
5948
5949 006332' 340000 006346' ITABLE (ICALLC,T70ADI) ; initialize start address
5950 006333' 340000 006352' TS70A: ITABLE (ICALLC,T70ADD) ; increment test address
5951 006334' 040002 006344' ITABLE (ISETEX,2,TS70AA) ; set up examine data
5952 006335' 500000 777777 ITABLE (ISTART,777777) ; start at default address
5953 006336' 400000 000010 ITABLE (IWAIT,10) ; wait for 10 ms.
5954 006337' 540000 000000 ITABLE (IEXIT) ; exit test if any error yet
5955 006340' 440000 006333' ITABLE (IJRST,TS70A) ; loop till done
5956 006341' 000000 000000 ITABLE (ILAST) ; end of table
5957
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 124
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0605
5958
5959 006342' 000000 000000 TS70Z: 0
5960 006343' 000000 000000 0
5961
5962 006344' 000000 000000 TS70AA: 0
5963 006345' 000000 000000 0
5964
5965 ; Start address handling routines
5966
5967 006346' 476 00 0 00 013671' T70ADI: SETOM T70ADR# ; initialize start address
5968 006347' 336 00 0 00 030037 SKIPN USER ; done with test (user mode)?
5969 006350' 350 00 0 17 000000 AOS (P) ; no - set up ok return
5970 006351' 263 17 0 00 000000 RTN ; return
5971
5972 006352' 350 01 0 00 013671' T70ADD: AOS 1,T70ADR ; increment address
5973 MOVE [040000,,000100 ; get IOP function word
5974 140000,,000500
5975 006353' 200 00 0 01 012524' 440000,,000600](1)
5976 006354' 202 00 0 00 006102* MOVEM IIOPF ; save it
5977 006355' 200 00 0 00 012527' MOVE [525252,,777777] ; initial data
5978 006356' 202 00 0 00 340100 MOVEM 340100 ; save it location 100
5979 006357' 202 00 0 00 340500 MOVEM 340500 ; save in location 400
5980 006360' 202 00 0 00 340600 MOVEM 340600 ; save in location 600
5981 006361' 202 00 0 00 006345' MOVEM TS70AA+1 ; save correct data
5982 006362' 200 01 0 01 006417' MOVE 1,T70ADT(1) ; use dispatch table
5983 006363' 202 01 0 00 006104* MOVEM 1,IADDR ; set up start address
5984 006364' 201 00 0 00 000010 MOVEI 10 ; get start CSR data and save in SDATA
5985 006365' 202 00 0 00 005530* MOVEM SDATA ; (this ensures PI bits not set)
5986 006366' 302 01 0 00 000777 CAIE 1,777 ; done yet?
5987 006367' 350 00 0 17 000000 AOS (P) ; no - set up ok return
5988 006370' 263 17 0 00 000000 RTN ; return
5989
5990 ; Initial examine routine
5991
5992 006371' 200 00 0 00 012530' TS70EX: MOVE [440000,,BUFF] ; get IOP function word
5993 006372' 202 00 0 00 006354* MOVEM IIOPF ; save it
5994 006373' 200 00 0 00 012527' MOVE [525252,,777777] ; initial data
5995 006374' 202 00 0 00 005225* MOVEM BUFF ; save it
5996 006375' 202 00 0 00 006345' MOVEM TS70AA+1 ; save correct
5997 006376' 550 02 0 00 006372* HRRZ 2,IIOPF ; get address to be examined
5998 006377' 202 02 0 00 006344' MOVEM 2,TS70AA ; save it
5999 006400' 336 00 0 00 005203* SKIPN UDEBUG ; debug mode?
6000 006401' 257 02 0 02 000000 MAP 2,(2) ; no - map to physical
6001 006402' 621 02 0 00 777000 TLZ 2,777000 ; mask off unused bits
6002 006403' 201 01 0 00 000300 MOVEI 1,300 ; get start address
6003 006404' 242 01 0 00 000001 LSH 1,1 ; convert to address for RAR
6004 006405' 260 17 0 00 005172* GO LDRAR ; load RAR
6005 006406' 201 01 0 00 000010 MOVEI 1,MPRUN ; get start data
6006 006407' 260 17 0 00 005174* GO LDCSR ; start the port
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 125
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0606
6007 006410' 200 01 0 00 012303' MOVE 1,[DATAO 2] ; build a DATAO
6008 006411' 434 01 0 00 000016 IOR 1,MBCN ; include the device code
6009 006412' 336 00 0 00 006400* SKIPN UDEBUG ; debug mode?
6010 006413' 256 00 0 00 000001 XCT 1 ; no - do the DATAO
6011 006414' 400 01 0 00 000000 SETZ 1, ; clear CSR data
6012 006415' 260 17 0 00 006407* GO LDCSR ; stop the port
6013 006416' 263 17 0 00 000000 RTN ; return
6014
6015 ; Start address table
6016
6017 006417' 000000 000000 T70ADT: 0
6018 006420' 000000 000003 3
6019 006421' 000000 000006 6
6020 006422' 000000 000777 777
6021
6022 ; Error messages
6023
6024 006423' 140000 012470' MA70: MSG!TXNOT![ASCIZ /IOP error detected/]
6025 006424' 000000000000# LAST!CALL!TXALL!IIPNT ; print test data
6026
6027 ; Microcode:
6028
6029 ; IOP = 040000,,000100 EPT / Examine / Qual=0 / Addr=100
6030
6031 006425' 000000 010000 T70M: MWORD <ADDR=0,JMAP,J=1> ; 0
6032 006426' 000000 000040
6033 006427' 000106 000100 MWORD <CJS,J=600,SD0,OR,D=2,SKCN,MGC=100> ; 1
6034 006430' 732000 240020
6035 006431' 000207 010040 MWORD <JMAP,J=701,SD0,OR,D=2,SKCN,MGC=40> ; 2
6036 006432' 732000 240040
6037
6038 ; IOP = 140000,,000500 Exec Vir / Examine / Qual=0 / Addr=500
6039
6040 006433' 000300 040000 MWORD <JMAP,J=4> ; 3
6041 006434' 000000 000040
6042 006435' 000406 000500 MWORD <CJS,J=600,SD0,OR,D=2,SKCN,MGC=500> ; 4
6043 006436' 732000 240020
6044 006437' 000507 010140 MWORD <JMAP,J=701,SD0,OR,D=2,SKCN,MGC=140> ; 5
6045 006440' 732000 240040
6046
6047 ; IOP = 440000,,000600 Physical / Examine / Qual=0 / Addr=600
6048
6049 006441' 000600 070000 MWORD <JMAP,J=7> ; 6
6050 006442' 000000 000040
6051 006443' 000706 000600 MWORD <CJS,J=600,SD0,OR,D=2,SKCN,MGC=600> ; 7
6052 006444' 732000 240020
6053 006445' 001007 010440 MWORD <JMAP,J=701,SD0,OR,D=2,SKCN,MGC=440> ; 10
6054 006446' 732000 240040
6055
6056 ; IOP = 440000,,BUFF Physical / Examine / Qual=0 / Addr=BUFF
6057
6058 006447' 010001 010000 MWORD <ADDR=100,JMAP,J=101> ; 100
6059 006450' 000000 000040
6060 006451' 010107 010440 MWORD <JMAP,J=701,SD0,OR,D=2,SKCN,MGC=440> ; 101
6061 006452' 732000 240040
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 125-1
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0607
6062
6063 ; Routine to read the buffer address and save in R5
6064
6065 006453' 030003 010000 MWORD <ADDR=300,JMAP,J=301> ; 300
6066 006454' 000000 000040
6067 006455' 030103 030000 MWORD <CJP,J=303,CENA,CCER> ; 301
6068 006456' 000400 100060
6069 006457' 030203 010000 MWORD <JMAP,J=301> ; 302
6070 006460' 000000 000040
6071 006461' 030300 000010 MWORD <CONT,SD0,OR,D=2,B=5,SELE,MGC=10> ; 303
6072 006462' 732002 405340
6073 006463' 030403 040000 MWORD <JMAP,J=304,D=1> ; 304
6074 006464' 001000 000040
6075
6076 ; Subroutine to insert right 10 bits of R0 into R5 zeroing
6077 ; the rest of R5.
6078
6079 006465' 060000 310000 MWORD <ADDR=600,LDCT,J=31,S0A,OR,B=5,D=2> ; 600
6080 006466' 432002 400300
6081 006467' 060106 010000 MWORD <RPCT,J=601,S0B,B=5,OR,D=5> ; 601
6082 006470' 335002 400220
6083 006471' 060200 000000 MWORD <CRTN> ; 602
6084 006472' 000000 000240
6085
6086 ; Subroutine to shift the right justified bit field in R0 to
6087 ; bits 0-8, all other bits zero. Then request interrupt and
6088 ; wait for CC EbusRqst. Then put EBUS data into R5 and halt.
6089
6090 006473' 070000 000000 MWORD <ADDR=700,CONT,S0A,AND,B=5,D=2> ; 700
6091 006474' 442002 400340
6092 006475' 070100 320000 MWORD <LDCT,J=32,D=1> ; 701
6093 006476' 001000 000300
6094 006477' 070207 020000 MWORD <RPCT,J=702,S0A,OR,D=7> ; 702
6095 006500' 437000 000220
6096 006501' 070300 002004 MWORD <CONT,SAB,OR,B=5,D=3,OENA,SELE,MGC=4> ; 703
6097 006502' 133002 405340
6098 006503' 070400 000001 MWORD <CONT,SELE,MGC=1> ; 704 (Ex/Dep int)
6099 006504' 000000 005340
6100 006505' 070507 070000 MWORD <CJP,J=707,D=1,CENA,CCER> ; 705
6101 006506' 001400 100060
6102 006507' 070607 050000 MWORD <JMAP,J=705,D=1> ; 706
6103 006510' 001000 000040
6104 006511' 070700 000010 MWORD <CONT,SD0,OR,D=2,B=5,SELE,MGC=10> ; 707
6105 006512' 732002 405340
6106 006513' 071007 100000 MWORD <JMAP,J=710> ; 710
6107 006514' 000000 000040
6108
6109 ; Subroutine to read R5
6110
6111 006515' 110011 012004 MWORD <ADDR=1100,JMAP,J=1101,S0A,A=5,OR,D=1,OENA,SELE,MGC=4>
6112 006516' 431050 005040
6113 006517' 110111 010000 MWORD <JMAP,J=1101> ; 1101
6114 006520' 000000 000040
6115 006521' 777777 777777 -1
6116
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 126
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0608
6117
6118 ;#********************************************************************
6119 ;* TEST 71 - IOP Function 5 - Deposit
6120 ;
6121 ; Description: This test verifies that microcode can request an
6122 ; interrupt with an IOP word specifying function 5
6123 ; and this will cause the location specified by
6124 ; the address portion of the function word to be
6125 ; deposited with the data the port places on the
6126 ; EBUS.
6127 ;
6128 ; Procedure: KL> Port Clear
6129 ; KL> Load test ucode
6130 ; KL> Set up PI system so that interrupts may occur
6131 ; KL> Set CSR Register PIA bits 33-35 to 0
6132 ; KL> Write CSR to set MPROC Run
6133 ; KL> Examine the selected location and verify that
6134 ; it contains the correct data.
6135 ;
6136 ; Data pattern to use: 652100,,001525
6137 ;
6138 ; Do for IOP words specifying:
6139 ;
6140 ; AdrSpa Func Qual Device Addr IOP Word
6141 ; Physical 5 0 0 BUFF 450000,,BUFF
6142 ; EPT 5 0 0 100 050000,,000100
6143 ; Exec Vir 5 0 0 500 150000,,000500
6144 ; Physical 5 0 0 600 450000,,000600
6145 ;
6146 ; Failure: ---
6147 ;#********************************************************************
6148
6149 ; Test data
6150
6151 006522' 254 00 0 00 006530' TSTE71: JRST TG71 ; go start test
6152 006523' 400400 000071 EBUS!NDMP!ZEBUS!71 ; test mask
6153 006524' 006661' 012531' T71M,,[ASCIZ ^IOP Function 5 - Deposit^]
6154 006525' 012276' 012300' [EXP E14,MLAST!E7],,[EXP E4,MLAST!E1]
6155 006526' 000000 006764' TSTE72 ; failure test table
6156 006527' 777777 777777 -1
6157
6158 ; Start test
6159
6160 006530' 201 00 0 00 000000' TG71: MOVEI Z2 ; get address of module start
6161 006531' 260 17 0 00 006276* GO TRACE ; handle trace output
6162 006532' 201 01 0 00 006661' MOVEI 1,T71M ; set up microcode address
6163 006533' 260 17 0 00 006300* GO TLOAD ; load/verify it
6164 006534' 263 17 0 00 000000 RTN ; failed - exit test
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 127
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0609
6165
6166 ; Initialization
6167
6168 006535' 201 01 0 00 000001 MOVEI 1,1 ; set to 'read'
6169 006536' 201 02 0 00 000010 MOVEI 2,10 ; set to 10 words
6170 006537' 201 14 0 00 000010 MOVEI PAT,10 ; set up data pattern
6171 006540' 260 17 0 00 006305* GO BUFGEN ; build CCW list (locks BUFF in core)
6172
6173 006541' 400 15 0 00 000000 TL71: SETZ ERFLG, ; clear error flag
6174 006542' 201 06 0 00 006556' MOVEI 6,TS71 ; get test table address
6175 006543' 402 00 0 00 006310* SETZM TSTSUB ; initialize subtest number
6176
6177 ; Loop on test execute table entries
6178
6179 006544' 260 17 0 00 006311* TA71: GO IPACLR ; clear port
6180 006545' 260 17 0 00 006312* TB71: GO IEXEC ; execute table entry
6181 006546' 254 00 0 00 006555' JRST TX71 ; end of test execute table
6182 006547' 254 00 0 00 006545' JRST TB71 ; keep looping after call
6183 006550' 474 15 0 00 000000 SETO ERFLG, ; error occurred
6184
6185 ; Handle error printouts and scope looping
6186
6187 006551' 027 00 0 00 006657' SCOPER MA71 ; print error message
6188 006552' 254 00 0 00 006541' JRST TL71 ; loop on error
6189 006553' 254 00 0 00 006555' JRST TX71 ; altmode exit
6190 006554' 322 15 0 00 006544' JUMPE ERFLG,TA71 ; do next test execute table entry
6191
6192 ; End of test
6193
6194 006555' 263 17 0 00 000000 TX71: RTN ; return
6195
6196 ; Interrupt Test Execute Table, as: (CMD,parameters)
6197
6198 006556' 140004 006575' TS71: ITABLE (ISETID,4,TS71Z) ; set up increment/decrement data
6199 006557' 040002 006575' ITABLE (ISETEX,2,TS71Z) ; set up default examine data
6200
6201 006560' 300000 006626' ITABLE (ICALL,TS71DE) ; set up test data
6202 006561' 100002 006577' ITABLE (ISETDE,2,TS71AA) ; set up examine data
6203 006562' 500000 000100 ITABLE (ISTART,100) ; start at 100
6204 006563' 400000 000010 ITABLE (IWAIT,10) ; wait for 10 ms.
6205 006564' 540000 000000 ITABLE (IEXIT) ; exit test if any error yet
6206
6207 006565' 340000 006601' ITABLE (ICALLC,T71ADI) ; initialize start address
6208 006566' 340000 006605' TS71A: ITABLE (ICALLC,T71ADD) ; increment test address
6209 006567' 100003 006577' ITABLE (ISETDE,3,TS71AA) ; set up deposit data
6210 006570' 500000 777777 ITABLE (ISTART,777777) ; start at default address
6211 006571' 400000 000010 ITABLE (IWAIT,10) ; wait for 10 ms.
6212 006572' 540000 000000 ITABLE (IEXIT) ; exit test if any error yet
6213 006573' 440000 006566' ITABLE (IJRST,TS71A) ; loop till done
6214 006574' 000000 000000 ITABLE (ILAST) ; end of table
6215
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 128
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0610
6216
6217 006575' 000000 000000 TS71Z: 0
6218 006576' 000000 000000 0
6219
6220 006577' 000000 000000 TS71AA: 0
6221 006600' 000000 001234 1234
6222
6223 ; Start address handling routines
6224
6225 006601' 476 00 0 00 013672' T71ADI: SETOM T71ADR# ; initialize start address
6226 006602' 336 00 0 00 030037 SKIPN USER ; done with test (user mode)?
6227 006603' 350 00 0 17 000000 AOS (P) ; no - set up ok return
6228 006604' 263 17 0 00 000000 RTN ; return
6229
6230 006605' 350 01 0 00 013672' T71ADD: AOS 1,T71ADR ; increment address
6231 MOVE [050000,,000100 ; get IOP function word
6232 150000,,000500
6233 006606' 200 00 0 01 012536' 450000,,000600](1)
6234 006607' 202 00 0 00 006376* MOVEM IIOPF ; save it
6235 006610' 200 00 0 00 010744' MOVE [400000,,1] ; initial data
6236 006611' 202 00 0 00 340100 MOVEM 340100 ; save it location 100
6237 006612' 202 00 0 00 340500 MOVEM 340500 ; save in location 500
6238 006613' 202 00 0 00 340600 MOVEM 340600 ; save in location 600
6239 006614' 550 00 0 00 006607* HRRZ IIOPF ; get address to be deposited to
6240 006615' 202 00 0 00 006577' MOVEM TS71AA ; save it
6241 006616' 200 01 0 00 013672' MOVE 1,T71ADR ; get address offset
6242 006617' 200 01 0 01 006653' MOVE 1,T71ADT(1) ; use dispatch table
6243 006620' 202 01 0 00 006363* MOVEM 1,IADDR ; set up start address
6244 006621' 201 00 0 00 000010 MOVEI 10 ; get start CSR data and save in SDATA
6245 006622' 202 00 0 00 006365* MOVEM SDATA ; (this ensures PI bits not set)
6246 006623' 302 01 0 00 000777 CAIE 1,777 ; done yet?
6247 006624' 350 00 0 17 000000 AOS (P) ; no - set up ok return
6248 006625' 263 17 0 00 000000 RTN ; return
6249
6250 ; Initial examine routine
6251
6252 006626' 200 00 0 00 012541' TS71DE: MOVE [450000,,BUFF] ; get IOP function word
6253 006627' 202 00 0 00 006614* MOVEM IIOPF ; save it
6254 006630' 200 00 0 00 010744' MOVE [400000,,1] ; initial data
6255 006631' 202 00 0 00 006374* MOVEM BUFF ; save it
6256 006632' 550 02 0 00 006627* HRRZ 2,IIOPF ; get address to be examined
6257 006633' 202 02 0 00 006577' MOVEM 2,TS71AA ; save it
6258 006634' 336 00 0 00 006412* SKIPN UDEBUG ; debug mode?
6259 006635' 257 02 0 02 000000 MAP 2,(2) ; no - map to physical
6260 006636' 621 02 0 00 777000 TLZ 2,777000 ; mask off unused bits
6261 006637' 201 01 0 00 000300 MOVEI 1,300 ; get start address
6262 006640' 242 01 0 00 000001 LSH 1,1 ; convert to address for RAR
6263 006641' 260 17 0 00 006405* GO LDRAR ; load RAR
6264 006642' 201 01 0 00 000010 MOVEI 1,MPRUN ; get start data
6265 006643' 260 17 0 00 006415* GO LDCSR ; start the port
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 129
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0611
6266 006644' 200 01 0 00 012303' MOVE 1,[DATAO 2] ; build a DATAO
6267 006645' 434 01 0 00 000016 IOR 1,MBCN ; include the device code
6268 006646' 336 00 0 00 006634* SKIPN UDEBUG ; debug mode?
6269 006647' 256 00 0 00 000001 XCT 1 ; no - do the DATAO
6270 006650' 400 01 0 00 000000 SETZ 1, ; clear CSR data
6271 006651' 260 17 0 00 006643* GO LDCSR ; stop the port
6272 006652' 263 17 0 00 000000 RTN ; return
6273
6274 ; Start address table
6275
6276 006653' 000000 000000 T71ADT: 0
6277 006654' 000000 000003 3
6278 006655' 000000 000006 6
6279 006656' 000000 000777 777
6280
6281 ; Error messages
6282
6283 006657' 140000 012470' MA71: MSG!TXNOT![ASCIZ /IOP error detected/]
6284 006660' 000000000000# LAST!CALL!TXALL!IIPNT ; print test data
6285
6286 ; Microcode:
6287
6288 ; IOP = 050000,,000100 EPT / Deposit / Qual = 0 / Addr= 100
6289
6290 006661' 000000 010000 T71M: MWORD <ADDR=0,JMAP,J=1> ; 0
6291 006662' 000000 000040
6292 006663' 000106 000100 MWORD <CJS,J=600,SD0,OR,D=2,SKCN,MGC=100> ; 1
6293 006664' 732000 240020
6294 006665' 000207 010050 MWORD <JMAP,J=701,SD0,OR,D=2,SKCN,MGC=50> ; 2
6295 006666' 732000 240040
6296
6297 ; IOP = 150000,,000500 Exec Vir / Deposit / Qual = 0 / Addr=500
6298
6299 006667' 000300 040000 MWORD <JMAP,J=4> ; 3
6300 006670' 000000 000040
6301 006671' 000406 000500 MWORD <CJS,J=600,SD0,OR,D=2,SKCN,MGC=500> ; 4
6302 006672' 732000 240020
6303 006673' 000507 010150 MWORD <JMAP,J=701,SD0,OR,D=2,SKCN,MGC=150> ; 5
6304 006674' 732000 240040
6305
6306 ; IOP = 450000,,000600 Physical / Deposit / Qual = 0 / Addr=600
6307
6308 006675' 000600 070000 MWORD <JMAP,J=7> ; 6
6309 006676' 000000 000040
6310 006677' 000706 000600 MWORD <CJS,J=600,SD0,OR,D=2,SKCN,MGC=600> ; 7
6311 006700' 732000 240020
6312 006701' 001007 010450 MWORD <JMAP,J=701,SD0,OR,D=2,SKCN,MGC=450> ; 10
6313 006702' 732000 240040
6314
6315 ; IOP = 450000,,BUFF Physical / Deposit / Qual=0 / Addr=BUFF
6316
6317 006703' 010001 010000 MWORD <ADDR=100,JMAP,J=101> ; 100
6318 006704' 000000 000040
6319 006705' 010107 010450 MWORD <JMAP,J=701,SD0,OR,D=2,SKCN,MGC=450> ; 101
6320 006706' 732000 240040
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 129-1
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0612
6321
6322 ; Routine to read the buffer address and save in R5
6323
6324 006707' 030003 010000 MWORD <ADDR=300,JMAP,J=301> ; 300
6325 006710' 000000 000040
6326 006711' 030103 030000 MWORD <CJP,J=303,CENA,CCER> ; 301
6327 006712' 000400 100060
6328 006713' 030203 010000 MWORD <JMAP,J=301> ; 302
6329 006714' 000000 000040
6330 006715' 030300 000010 MWORD <CONT,SD0,OR,D=2,B=5,SELE,MGC=10> ; 303
6331 006716' 732002 405340
6332 006717' 030403 040000 MWORD <JMAP,J=304,D=1> ; 304
6333 006720' 001000 000040
6334
6335 ; Subroutine to insert right 10 bits of R0 into R5 zeroing
6336 ; the rest of R5.
6337
6338 006721' 060000 310000 MWORD <ADDR=600,LDCT,J=31,S0A,OR,B=5,D=2> ; 600
6339 006722' 432002 400300
6340 006723' 060106 010000 MWORD <RPCT,J=601,S0B,B=5,OR,D=5> ; 601
6341 006724' 335002 400220
6342 006725' 060200 000000 MWORD <CRTN> ; 602
6343 006726' 000000 000240
6344
6345 ; Subroutine to shift the right justified bit field in R0 to
6346 ; bits 0-8, all other bits zero. Then to place in R5 and
6347 ; in EBUF to prepare for IOP request. Then request interrupt
6348 ; and halt.
6349
6350 006727' 070000 000000 MWORD <ADDR=700,CONT,S0A,AND,B=5,D=2> ; 700
6351 006730' 442002 400340
6352 006731' 070100 320000 MWORD <LDCT,J=32,D=1> ; 701
6353 006732' 001000 000300
6354 006733' 070207 020000 MWORD <RPCT,J=702,S0A,OR,D=7> ; 702
6355 006734' 437000 000220
6356 006735' 070300 002004 MWORD <CONT,SAB,B=5,OR,D=3,OENA,SELE,MGC=4> ; 703
6357 006736' 133002 405340
6358 006737' 070400 311234 MWORD <LDCT,J=31,SD0,OR,D=2,B=6,SKCN,MGC=1234>; 704
6359 006740' 732003 240300
6360 006741' 070507 050000 MWORD <RPCT,J=705,S0B,B=6,D=5> ; 705
6361 006742' 305003 000220
6362 006743' 070600 000001 MWORD <CONT,SELE,MGC=1> ; 706 (Ex/Dep int)
6363 006744' 000000 005340
6364 006745' 070707 110000 MWORD <CJP,J=711,D=1,CENA,CCER> ; 707
6365 006746' 001400 100060
6366 006747' 071007 070000 MWORD <JMAP,J=707,D=1> ; 710
6367 006750' 001000 000040
6368 006751' 071100 002004 MWORD <CONT,S0A,OR,A=6,D=1,SELE,MGC=4,OENA> ; 711
6369 006752' 431060 005340
6370 006753' 071200 000020 MWORD <CONT,D=1,SELE,MGC=20> ; 712
6371 006754' 001000 005340
6372 006755' 071307 130000 MWORD <JMAP,J=713> ; 713
6373 006756' 000000 000040
6374
6375 ; Subroutine to read R5
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 129-2
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0613
6376
6377 006757' 110011 012004 MWORD <ADDR=1100,JMAP,J=1101,S0A,A=6,OR,D=1,OENA,SELE,MGC=4>
6378 006760' 431060 005040
6379 006761' 110111 010000 MWORD <JMAP,J=1101> ; 1101
6380 006762' 000000 000040
6381 006763' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 130
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0614
6382
6383 ;#********************************************************************
6384 ;* TEST 72 - IOP Function 7 - Examine/Increment
6385 ;
6386 ; Description: This test verifies that microcode can request an
6387 ; interrupt with an IOP word specifying function 7
6388 ; and this will cause the location specified by
6389 ; the IOP word to be incremented in KL10 memory
6390 ; and examined by the port.
6391 ;
6392 ; Procedure: KL> Port Clear
6393 ; KL> Load test ucode
6394 ; KL> Set up PI system so that interrupts may occur
6395 ; KL> Set CSR Register PIA bits 33-35 to 0
6396 ; KL> Write CSR to set MPROC Run
6397 ; KL> Stop the port, then read the EBUF and verify
6398 ; that the data pattern specified is now in
6399 ; the EBUF.
6400 ;
6401 ; Data pattern to use: 125252,,777777
6402 ;
6403 ; Do for IOP words specifying:
6404 ;
6405 ; AdrSpa Func Qual Device Addr IOP Word
6406 ; Physical 7 0 0 BUFF 440000,,BUFF
6407 ; EPT 7 0 0 100 040000,,000100
6408 ; Exec Vir 7 0 0 500 140000,,000500
6409 ; Physical 7 0 0 600 440000,,000600
6410 ;
6411 ; Failure: ---
6412 ;#********************************************************************
6413
6414 ; Test data
6415
6416 006764' 254 00 0 00 006771' TSTE72: JRST TG72 ; go start test
6417 006765' 400400 000072 EBUS!NDMP!ZEBUS!72 ; test mask
6418 006766' 007122' 012542' T72M,,[ASCIZ ^IOP Function 7 - Examine/Increment^]
6419 006767' 012276' 012300' [EXP E14,MLAST!E7],,[EXP E4,MLAST!E1]
6420 006770' 777777 777777 -1 ; failure test table
6421
6422 ; Start test
6423
6424 006771' 201 00 0 00 000000' TG72: MOVEI Z2 ; get address of module start
6425 006772' 260 17 0 00 006531* GO TRACE ; handle trace output
6426 006773' 201 01 0 00 007122' MOVEI 1,T72M ; set up microcode address
6427 006774' 260 17 0 00 006533* GO TLOAD ; load/verify it
6428 006775' 263 17 0 00 000000 RTN ; failed - exit test
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 131
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0615
6429
6430 ; Initialization
6431
6432 006776' 201 01 0 00 000001 MOVEI 1,1 ; set to 'read'
6433 006777' 201 02 0 00 000010 MOVEI 2,10 ; set to 10 words
6434 007000' 201 14 0 00 000010 MOVEI PAT,10 ; set up data pattern
6435 007001' 260 17 0 00 006540* GO BUFGEN ; build CCW list (locks BUFF in core)
6436
6437 007002' 400 15 0 00 000000 TL72: SETZ ERFLG, ; clear error flag
6438 007003' 201 06 0 00 007017' MOVEI 6,TS72 ; get test table address
6439 007004' 402 00 0 00 006543* SETZM TSTSUB ; initialize subtest number
6440
6441 ; Loop on test execute table entries
6442
6443 007005' 260 17 0 00 006544* TA72: GO IPACLR ; clear port
6444 007006' 260 17 0 00 006545* TB72: GO IEXEC ; execute table entry
6445 007007' 254 00 0 00 007016' JRST TX72 ; end of test execute table
6446 007010' 254 00 0 00 007006' JRST TB72 ; keep looping after call
6447 007011' 474 15 0 00 000000 SETO ERFLG, ; error occurred
6448
6449 ; Handle error printouts and scope looping
6450
6451 007012' 027 00 0 00 007120' SCOPER MA72 ; print error message
6452 007013' 254 00 0 00 007002' JRST TL72 ; loop on error
6453 007014' 254 00 0 00 007016' JRST TX72 ; altmode exit
6454 007015' 322 15 0 00 007005' JUMPE ERFLG,TA72 ; do next test execute table entry
6455
6456 ; End of test
6457
6458 007016' 263 17 0 00 000000 TX72: RTN ; return
6459
6460 ; Interrupt Test Execute Table, as: (CMD,parameters)
6461
6462 007017' 040002 007114' TS72: ITABLE (ISETEX,2,TS72Z) ; set up default examine data
6463 007020' 100002 007114' ITABLE (ISETDE,2,TS72Z) ; set up default deposit data
6464
6465 007021' 300000 007062' ITABLE (ICALL,TS72EX) ; set up test data
6466 007022' 240002 007116' ITABLE (ISETEI,2,TS72AA) ; set up examine data
6467 007023' 500000 000100 ITABLE (ISTART,100) ; start at 100
6468 007024' 400000 000010 ITABLE (IWAIT,10) ; wait for 10 ms.
6469 007025' 540000 000000 ITABLE (IEXIT) ; exit test if any error yet
6470
6471 007026' 340000 007036' ITABLE (ICALLC,T72ADI) ; initialize start address
6472 007027' 340000 007040' TS72A: ITABLE (ICALLC,T72ADD) ; increment test address
6473 007030' 240004 007116' ITABLE (ISETEI,4,TS72AA) ; set up increment/decrement data
6474 007031' 500000 777777 ITABLE (ISTART,777777) ; start at default address
6475 007032' 400000 000010 ITABLE (IWAIT,10) ; wait for 10 ms.
6476 007033' 540000 000000 ITABLE (IEXIT) ; exit test if any error yet
6477 007034' 440000 007027' ITABLE (IJRST,TS72A) ; loop till done
6478 007035' 000000 000000 ITABLE (ILAST) ; end of table
6479
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 132
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0616
6480
6481 ; Start address handling routines
6482
6483 007036' 476 00 0 00 013673' T72ADI: SETOM T72ADR# ; initialize start address
6484 007037' 263 17 0 00 000000 RTN ; return
6485
6486 007040' 350 01 0 00 013673' T72ADD: AOS 1,T72ADR ; increment address
6487 MOVE [070000,,000100 ; get IOP function word
6488 170000,,000500
6489 007041' 200 00 0 01 012551' 470000,,000600](1)
6490 007042' 202 00 0 00 006632* MOVEM IIOPF ; save it
6491 007043' 200 01 0 00 012554' MOVE 1,[125252,,777777] ; initial data
6492 007044' 202 01 0 00 000100 MOVEM 1,100 ; save it in locations
6493 007045' 202 01 0 00 000500 MOVEM 1,500 ; ...
6494 007046' 202 01 0 00 000600 MOVEM 1,600 ; ...
6495 007047' 202 01 0 00 007117' MOVEM 1,TS72AA+1 ; save correct data
6496 007050' 550 00 0 00 007042* HRRZ IIOPF ; get address to increment
6497 007051' 202 00 0 00 007116' MOVEM TS72AA ; save it
6498 007052' 200 01 0 00 013673' MOVE 1,T72ADR ; get address offset
6499 007053' 200 01 0 01 007110' MOVE 1,T72ADT(1) ; use dispatch table
6500 007054' 202 01 0 00 006620* MOVEM 1,IADDR ; set up start address
6501 007055' 201 00 0 00 000010 MOVEI 10 ; get start CSR data and save in SDATA
6502 007056' 202 00 0 00 006622* MOVEM SDATA ; (this ensures PI bits not set)
6503 007057' 302 01 0 00 000777 CAIE 1,777 ; done yet?
6504 007060' 350 00 0 17 000000 AOS (P) ; no - set up ok return
6505 007061' 263 17 0 00 000000 RTN ; return
6506
6507 ; Initial examine routine
6508
6509 007062' 200 00 0 00 012555' TS72EX: MOVE [470000,,BUFF] ; get IOP function word
6510 007063' 202 00 0 00 007050* MOVEM IIOPF ; save it
6511 007064' 200 00 0 00 012554' MOVE [125252,,777777] ; initial data
6512 007065' 202 00 0 00 006631* MOVEM BUFF ; save it
6513 007066' 202 00 0 00 007117' MOVEM TS72AA+1 ; save correct
6514 007067' 550 02 0 00 007063* HRRZ 2,IIOPF ; get address to be examined
6515 007070' 202 02 0 00 007116' MOVEM 2,TS72AA ; save it
6516 007071' 336 00 0 00 006646* SKIPN UDEBUG ; debug mode?
6517 007072' 257 02 0 02 000000 MAP 2,(2) ; no - map to physical
6518 007073' 621 02 0 00 777000 TLZ 2,777000 ; mask off unused bits
6519 007074' 201 01 0 00 000300 MOVEI 1,300 ; get start address
6520 007075' 242 01 0 00 000001 LSH 1,1 ; convert to address for RAR
6521 007076' 260 17 0 00 006641* GO LDRAR ; load RAR
6522 007077' 201 01 0 00 000010 MOVEI 1,MPRUN ; get start data
6523 007100' 260 17 0 00 006651* GO LDCSR ; start the port
6524 007101' 200 01 0 00 012303' MOVE 1,[DATAO 2] ; build a DATAO
6525 007102' 434 01 0 00 000016 IOR 1,MBCN ; include the device code
6526 007103' 336 00 0 00 007071* SKIPN UDEBUG ; debug mode?
6527 007104' 256 00 0 00 000001 XCT 1 ; no - do the DATAO
6528 007105' 400 01 0 00 000000 SETZ 1, ; clear CSR data
6529 007106' 260 17 0 00 007100* GO LDCSR ; stop the port
6530 007107' 263 17 0 00 000000 RTN ; return
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 133
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0617
6531
6532 ; Start address table
6533
6534 007110' 000000 000000 T72ADT: 0
6535 007111' 000000 000003 3
6536 007112' 000000 000006 6
6537 007113' 000000 000777 777
6538
6539 007114' 000000 000000 TS72Z: 0
6540 007115' 000000 000000 0
6541
6542 007116' 000000 000000 TS72AA: 0
6543 007117' 000000 000000 0
6544
6545 ; Error messages
6546
6547 007120' 140000 012470' MA72: MSG!TXNOT![ASCIZ /IOP error detected/]
6548 007121' 000000000000# LAST!CALL!TXALL!IIPNT ; print test data
6549
6550 ; Microcode:
6551
6552 ; IOP = 070000,,000100 EPT / Exam-Incr / Qual=0 / Addr=100
6553
6554 007122' 000000 010000 T72M: MWORD <ADDR=0,JMAP,J=1> ; 0
6555 007123' 000000 000040
6556 007124' 000106 000100 MWORD <CJS,J=600,SD0,OR,D=2,SKCN,MGC=100> ; 1
6557 007125' 732000 240020
6558 007126' 000207 010070 MWORD <JMAP,J=701,SD0,OR,D=2,SKCN,MGC=70> ; 2
6559 007127' 732000 240040
6560
6561 ; IOP = 170000,,000500 Exec Vir / Exam-Incr / Qual=0 / Addr=500
6562
6563 007130' 000300 040000 MWORD <JMAP,J=4> ; 3
6564 007131' 000000 000040
6565 007132' 000406 000500 MWORD <CJS,J=600,SD0,OR,D=2,SKCN,MGC=500> ; 4
6566 007133' 732000 240020
6567 007134' 000507 010170 MWORD <JMAP,J=701,SD0,OR,D=2,SKCN,MGC=170> ; 5
6568 007135' 732000 240040
6569
6570 ; IOP = 470000,,000600 Physical / Exam-Incr / Qual=0 / Addr=600
6571
6572 007136' 000600 070000 MWORD <JMAP,J=7> ; 6
6573 007137' 000000 000040
6574 007140' 000706 000600 MWORD <CJS,J=600,SD0,OR,D=2,SKCN,MGC=600> ; 7
6575 007141' 732000 240020
6576 007142' 001007 010470 MWORD <JMAP,J=701,SD0,OR,D=2,SKCN,MGC=470> ; 10
6577 007143' 732000 240040
6578
6579 ; IOP = 470000,,BUFF Physical / Examine-Inc / Qual=0 / Addr=BUFF
6580
6581 007144' 010001 010000 MWORD <ADDR=100,JMAP,J=101> ; 100
6582 007145' 000000 000040
6583 007146' 010107 010470 MWORD <JMAP,J=701,SD0,OR,D=2,SKCN,MGC=470> ; 101
6584 007147' 732000 240040
6585
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 133-1
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0618
6586 ; Routine to read the buffer address and save in R5
6587
6588 007150' 030003 010000 MWORD <ADDR=300,JMAP,J=301> ; 300
6589 007151' 000000 000040
6590 007152' 030103 030000 MWORD <CJP,J=303,CENA,CCER> ; 301
6591 007153' 000400 100060
6592 007154' 030203 010000 MWORD <JMAP,J=301> ; 302
6593 007155' 000000 000040
6594 007156' 030300 000010 MWORD <CONT,SD0,OR,D=2,B=5,SELE,MGC=10> ; 303
6595 007157' 732002 405340
6596 007160' 030403 040000 MWORD <JMAP,J=304,D=1> ; 304
6597 007161' 001000 000040
6598
6599 ; Subroutine to insert right 10 bits of R0 into R5 zeroing
6600 ; the rest of R5.
6601
6602 007162' 060000 310000 MWORD <ADDR=600,LDCT,J=31,S0A,OR,B=5,D=2> ; 600
6603 007163' 432002 400300
6604 007164' 060106 010000 MWORD <RPCT,J=601,S0B,B=5,OR,D=5> ; 601
6605 007165' 335002 400220
6606 007166' 060200 000000 MWORD <CRTN> ; 602
6607 007167' 000000 000240
6608
6609 ; Subroutine to shift the right justified bit field in R0 to
6610 ; bits 0-8, all other bits zero. Then request interrupt and
6611 ; wait for CC EbusRqst. Then put EBUS data into R5 and halt.
6612
6613 007170' 070000 000000 MWORD <ADDR=700,CONT,S0A,AND,B=5,D=2> ; 700
6614 007171' 442002 400340
6615 007172' 070100 320000 MWORD <LDCT,J=32,D=1> ; 701
6616 007173' 001000 000300
6617 007174' 070207 020000 MWORD <RPCT,J=702,S0A,OR,D=7> ; 702
6618 007175' 437000 000220
6619 007176' 070300 002004 MWORD <CONT,SAB,OR,B=5,D=3,OENA,SELE,MGC=4> ; 703
6620 007177' 133002 405340
6621 007200' 070400 000001 MWORD <CONT,SELE,MGC=1> ; 704 (Ex/Dep int)
6622 007201' 000000 005340
6623 007202' 070507 070000 MWORD <CJP,J=707,D=1,CENA,CCER> ; 705
6624 007203' 001400 100060
6625 007204' 070607 050000 MWORD <JMAP,J=705,D=1> ; 706
6626 007205' 001000 000040
6627 007206' 070700 000010 MWORD <CONT,SD0,OR,D=2,B=5,SELE,MGC=10> ; 707
6628 007207' 732002 405340
6629 007210' 071007 100000 MWORD <JMAP,J=710> ; 710
6630 007211' 000000 000040
6631
6632 ; Subroutine to read R5
6633
6634 007212' 110011 012004 MWORD <ADDR=1100,JMAP,J=1101,S0A,A=5,OR,D=1,OENA,SELE,MGC=4>
6635 007213' 431050 005040
6636 007214' 110111 010000 MWORD <JMAP,J=1101> ; 1101
6637 007215' 000000 000040
6638 007216' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 134
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0619
6639
6640 ;#********************************************************************
6641 ;* TEST 73 - CSR 25-26 & 28 KL-side
6642 ;
6643 ; Description: Verify that CSR Bits 25-26 and 28 can be read
6644 ; and written properly from the KL side.
6645 ;
6646 ; Procedure: KL> Load test ucode
6647 ;
6648 ; KL> EBUS Reset
6649 ; KL> Read CSR and verify that bits 25-26,28 are 0's
6650 ;
6651 ; KL> Write 0's to bits 25-26,28
6652 ; KL> Read CSR and verify that bits 25-26,28 are 0's
6653 ;
6654 ; KL> Write 1's to bits 25-26,28
6655 ; KL> Read CSR and verify that bits 25-26,28 are 0's
6656 ;
6657 ; KL> Start up port at location 0
6658 ; UC> Write 1's to bits 25-26,28
6659 ; KL> Read CSR and verify that bits 25-26,28 are 1's
6660 ;
6661 ; KL> Write 1's to bits 25-26,28
6662 ; KL> Read CSR and verify that bits 25-26,28 are 0's
6663 ;
6664 ; KL> Start up port at location 0
6665 ; UC> Write 1's to bits 25-26,28
6666 ; KL> Do an EBUS Reset
6667 ; KL> Read CSR and verify that bits 25-26,28 are 0's
6668 ;
6669 ; Failure: ---
6670 ;#********************************************************************
6671
6672 ; Test data
6673
6674 007217' 254 00 0 00 007227' TSTE73: JRST TG73 ; go start test
6675 007220' 400400 000073 EBUS!NDMP!ZEBUS!73 ; test mask
6676 007221' 007361' 012556' T73M,,[ASCIZ ^CSR 25-26 & 28 KL-side^]
6677 007222' 010761' 012563' [EXP MLAST!E11],,[EXP E9,E1,MLAST!E6]
6678 007223' 000000 007402' TSTE74 ; failure test table
6679 007224' 000000 007613' TSTE75 ; ...
6680 007225' 000000 007744' TSTE76
6681 007226' 777777 777777 -1
6682
6683 ; Start test
6684
6685 007227' 201 00 0 00 000000' TG73: MOVEI Z2 ; get address of module start
6686 007230' 260 17 0 00 006772* GO TRACE ; handle trace output
6687 007231' 201 01 0 00 007361' MOVEI 1,T73M ; set up microcode address
6688 007232' 260 17 0 00 006774* GO TLOAD ; load/verify it
6689 007233' 263 17 0 00 000000 RTN ; failed - exit test
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 135
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0620
6690
6691 ; KL> EBUS Reset
6692 ; KL> Read CSR and verify that bits 25-26,28 are 0's
6693
6694 007234' 400 15 0 00 000000 TA73: SETZ ERFLG, ; clear error flag
6695 007235' 260 17 0 00 004716* GO ERESET ; do an EBUS Reset
6696 007236' 201 00 0 00 000001 MOVEI 1 ; initialize subtest number
6697 007237' 202 00 0 00 007004* MOVEM TSTSUB ; to 1
6698 007240' 260 17 0 00 005556* GO RDCSR ; read CSR register
6699 007241' 255 00 0 00 000000 JFCL ; error - ignore
6700 007242' 603 01 0 00 003200 TLNE 1,3200 ; bits all zero?
6701 007243' 474 15 0 00 000000 SETO ERFLG, ; no - set error flag
6702 007244' 027 00 0 00 007346' SCOPER MB73 ; print error message
6703 007245' 254 00 0 00 007234' JRST TA73 ; loop on error
6704 007246' 254 00 0 00 007345' JRST TX73 ; altmode exit
6705 007247' 326 15 0 00 007345' JUMPN ERFLG,TX73 ; error? yes - exit
6706
6707 ; KL> Write 0's to bits 25-26,28
6708 ; KL> Read CSR and verify that bits 25-26,28 are 0's
6709
6710 007250' 350 00 0 00 007237* AOS TSTSUB ; indicate next subtest
6711 007251' 400 01 0 00 000000 SETZ 1, ; clear data
6712 007252' 260 17 0 00 007106* GO LDCSR ; write CSR register
6713 007253' 260 17 0 00 007240* GO RDCSR ; read CSR register
6714 007254' 255 00 0 00 000000 JFCL ; error - ignore
6715 007255' 603 01 0 00 003200 TLNE 1,3200 ; bits all zero?
6716 007256' 474 15 0 00 000000 SETO ERFLG, ; no - set error flag
6717 007257' 027 00 0 00 007346' SCOPER MB73 ; print error message
6718 007260' 254 00 0 00 007234' JRST TA73 ; loop on error
6719 007261' 254 00 0 00 007345' JRST TX73 ; altmode exit
6720 007262' 326 15 0 00 007345' JUMPN ERFLG,TX73 ; error? yes - exit
6721
6722 ; KL> Write 1's to bits 25-26,28
6723 ; KL> Read CSR and verify that bits 25-26,28 are 0's
6724
6725 007263' 350 00 0 00 007250* AOS TSTSUB ; indicate next subtest
6726 007264' 201 01 0 00 003200 MOVEI 1,3200 ; get 1's for bits
6727 007265' 260 17 0 00 007252* GO LDCSR ; write CSR register
6728 007266' 260 17 0 00 007253* GO RDCSR ; read CSR register
6729 007267' 255 00 0 00 000000 JFCL ; error - ignore
6730 007270' 603 01 0 00 003200 TLNE 1,3200 ; bits all zero?
6731 007271' 474 15 0 00 000000 SETO ERFLG, ; no - set error flag
6732 007272' 027 00 0 00 007346' SCOPER MB73 ; print error message
6733 007273' 254 00 0 00 007234' JRST TA73 ; loop on error
6734 007274' 254 00 0 00 007345' JRST TX73 ; altmode exit
6735 007275' 326 15 0 00 007345' JUMPN ERFLG,TX73 ; error? yes - exit
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 136
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0621
6736
6737 ; KL> Start up port at location 0
6738 ; UC> Write 1's to bits 25-26,28
6739 ; KL> Read CSR and verify that bits 25-26,28 are 1's
6740
6741 007276' 350 00 0 00 007263* AOS TSTSUB ; indicate next subtest
6742 007277' 400 01 0 00 000000 SETZ 1, ; set up address 0
6743 007300' 260 17 0 00 007076* GO LDRAR ; write to RAR
6744 007301' 201 01 0 00 000010 MOVEI 1,10 ; get 1's for bits
6745 007302' 260 17 0 00 007265* GO LDCSR ; write CSR register
6746 007303' 260 17 0 00 007266* GO RDCSR ; read CSR register
6747 007304' 255 00 0 00 000000 JFCL ; error - ignore
6748 007305' 135 00 0 00 012566' LDB [POINT 4,1,28] ; get bits
6749 007306' 302 00 0 00 000015 CAIE 15 ; all set?
6750 007307' 474 15 0 00 000000 SETO ERFLG, ; no - set error flag
6751 007310' 027 00 0 00 007346' SCOPER MB73 ; print error message
6752 007311' 254 00 0 00 007234' JRST TA73 ; loop on error
6753 007312' 254 00 0 00 007345' JRST TX73 ; altmode exit
6754 007313' 326 15 0 00 007345' JUMPN ERFLG,TX73 ; error? yes - exit
6755
6756 ; KL> Write 1's to bits 25-26,28
6757 ; KL> Read CSR and verify that bits 25-26,28 are 0's
6758
6759 007314' 350 00 0 00 007276* AOS TSTSUB ; indicate next subtest
6760 007315' 201 01 0 00 003200 MOVEI 1,3200 ; get 1's for bits
6761 007316' 260 17 0 00 007302* GO LDCSR ; write CSR register
6762 007317' 260 17 0 00 007303* GO RDCSR ; read CSR register
6763 007320' 255 00 0 00 000000 JFCL ; error - ignore
6764 007321' 603 01 0 00 003200 TLNE 1,3200 ; bits all zero?
6765 007322' 474 15 0 00 000000 SETO ERFLG, ; no - set error flag
6766 007323' 027 00 0 00 007346' SCOPER MB73 ; print error message
6767 007324' 254 00 0 00 007234' JRST TA73 ; loop on error
6768 007325' 254 00 0 00 007345' JRST TX73 ; altmode exit
6769 007326' 326 15 0 00 007345' JUMPN ERFLG,TX73 ; error? yes - exit
6770
6771 ; KL> Start up port at location 0
6772 ; UC> Write 1's to bits 25-26,28
6773 ; KL> Do an EBUS Reset
6774 ; KL> Read CSR and verify that bits 25-26,28 are 0's
6775
6776 007327' 350 00 0 00 007314* AOS TSTSUB ; indicate next subtest
6777 007330' 400 01 0 00 000000 SETZ 1, ; set up address 0
6778 007331' 260 17 0 00 007300* GO LDRAR ; write to RAR
6779 007332' 201 01 0 00 000010 MOVEI 1,10 ; get 1's for bits
6780 007333' 260 17 0 00 007316* GO LDCSR ; write CSR register
6781 007334' 260 17 0 00 007235* GO ERESET ; do an EBUS reset
6782 007335' 260 17 0 00 007317* GO RDCSR ; read CSR register
6783 007336' 255 00 0 00 000000 JFCL ; error - ignore
6784 007337' 603 01 0 00 003200 TLNE 1,3200 ; bits all zero?
6785 007340' 474 15 0 00 000000 SETO ERFLG, ; no - set error flag
6786 007341' 027 00 0 00 007346' SCOPER MB73 ; print error message
6787 007342' 254 00 0 00 007234' JRST TA73 ; loop on error
6788 007343' 254 00 0 00 007345' JRST TX73 ; altmode exit
6789 007344' 326 15 0 00 007345' JUMPN ERFLG,TX73 ; error? yes - exit
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 137
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0622
6790
6791 ; End of test
6792
6793 007345' 263 17 0 00 000000 TX73: RTN ; return
6794
6795 ; Error messages
6796
6797 007346' 270000 007347' MB73: LAST!CALL!TXALL!MB73PN ; print data
6798
6799 007347' 200 02 0 00 007327* MB73PN: MOVE 2,TSTSUB ; get subtest number
6800 007350' 256 00 0 02 007352' XCT MB73PP-1(2) ; print text
6801 007351' 260 17 0 00 010231' GO MPNT2 ; print CSR data
6802 007352' 263 17 0 00 000000 RTN
6803
6804 MB73PP: TMSG <
6805 Did EBUS Reset
6806 007353' 037 00 0 00 012567' CSR Bits 25-26 & 28 not zero>
6807 TMSG <
6808 Did EBUS Reset, then wrote 0's to CSR
6809 007354' 037 00 0 00 012601' CSR Bits 25-26 & 28 not zero>
6810 TMSG <
6811 Did EBUS Reset, then wrote 1's to CSR
6812 007355' 037 00 0 00 012617' CSR Bits 25-26 & 28 not zero>
6813 TMSG <
6814 Port wrote 1's to CSR bits 25-26 & 28, then KL read CSR
6815 007356' 037 00 0 00 012635' CSR Bits 25-26 & 28 not set>
6816 TMSG <
6817 Port wrote 1's to CSR bits 25-26 & 28, then KL wrote 1's to CSR
6818 007357' 037 00 0 00 012657' CSR Bits 25-26 & 28 not cleared>
6819 TMSG <
6820 Port wrote 1's to CSR bits 25-26 & 28, then KL did an EBUS Reset
6821 007360' 037 00 0 00 012703' CSR Bits 25-26 & 28 not cleared>
6822
6823 ; Microcode:
6824
6825 007361' 000000 010015 T73M: MWORD <ADDR=0,JMAP,J=1,SD0,OR,D=2,SKCN,MGC=15> ; 0
6826 007362' 732000 240040
6827 007363' 000100 220000 MWORD <LDCT,J=22,D=1> ; 1
6828 007364' 001000 000300
6829 007365' 000200 020000 MWORD <RPCT,J=2,S0A,OR,D=5> ; 2
6830 007366' 435000 000220
6831 007367' 000300 002004 MWORD <CONT,S0A,OR,D=1,OENA,SELE,MGC=4> ; 3
6832 007370' 431000 005340
6833 007371' 000400 060040 MWORD <CJP,J=6,CENA,CCGC,SELE,MGC=40> ; 4
6834 007372' 000400 015060
6835 007373' 000500 040000 MWORD <JMAP,J=4> ; 5
6836 007374' 000000 000040
6837 007375' 000600 000200 MWORD <CONT,S0A,A=1,OR,SELE,MGC=200> ; 6
6838 007376' 430010 005340
6839 007377' 000700 070000 MWORD <JMAP,J=7> ; 7
6840 007400' 000000 000040
6841 007401' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 138
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0623
6842
6843 ;#********************************************************************
6844 ;* TEST 74 - CSR 25-26 & 28 Port-side
6845 ;
6846 ; Description: Verify that CSR Bits 25-26 and 28 can be read
6847 ; and written properly from the port side.
6848 ;
6849 ; Procedure: KL> Load test ucode
6850 ; KL> EBUS Reset
6851 ; KL> Start port at location 0
6852 ;
6853 ; UC> Read CSR and verify that bits 25-26,28 are 0's
6854 ; If error - set completion code in EBUF of 1
6855 ;
6856 ; UC> Write 0's to bits 25-26,28
6857 ; UC> Read CSR and verify that bits 25-26,28 are 0's
6858 ; If error - set completion code in EBUF of 2
6859 ;
6860 ; UC> Write 1's to bits 25-26,28
6861 ; UC> Read CSR and verify that bits 25-26,28 are 1's
6862 ; If error - set completion code in EBUF of 3
6863 ;
6864 ; UC> Write 0's to bits 25-26,28
6865 ; UC> Read CSR and verify that bits 25-26,28 are 1's
6866 ; If error - set completion code in EBUF of 4
6867 ;
6868 ; If no errors - set completion code in EBUF of 0
6869 ;
6870 ; Failure: ---
6871 ;#********************************************************************
6872
6873 ; Test data
6874
6875 007402' 254 00 0 00 007411' TSTE74: JRST TG74 ; go start test
6876 007403' 400400 000074 EBUS!NDMP!ZEBUS!74 ; test mask
6877 007404' 007462' 012727' T74M,,[ASCIZ ^CSR 25-26 & 28 Port-side^]
6878 007405' 010761' 012563' [EXP MLAST!E11],,[EXP E9,E1,MLAST!E6]
6879 007406' 000000 007613' TSTE75 ; failure test table
6880 007407' 000000 007744' TSTE76 ; ...
6881 007410' 777777 777777 -1
6882
6883 ; Start test
6884
6885 007411' 201 00 0 00 000000' TG74: MOVEI Z2 ; get address of module start
6886 007412' 260 17 0 00 007230* GO TRACE ; handle trace output
6887 007413' 201 01 0 00 007462' MOVEI 1,T74M ; set up microcode address
6888 007414' 260 17 0 00 007232* GO TLOAD ; load/verify it
6889 007415' 263 17 0 00 000000 RTN ; failed - exit test
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 139
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0624
6890
6891 ; KL> EBUS Reset
6892 ; KL> Start port at location 0
6893
6894 007416' 400 15 0 00 000000 TA74: SETZ ERFLG, ; clear error flag
6895 007417' 260 17 0 00 007334* GO ERESET ; do an EBUS Reset
6896 007420' 201 00 0 00 000001 MOVEI 1 ; set subtest number
6897 007421' 202 00 0 00 007347* MOVEM TSTSUB ; to 1
6898 007422' 201 00 0 00 000014 MOVEI MPRUN!4 ; get startup bits
6899 007423' 202 00 0 00 007056* MOVEM SDATA ; save in startup data word
6900 007424' 402 00 0 00 005531* SETZM SNEXT ; set start address to 0
6901 007425' 260 17 0 00 010277' GO MSTART ; start up port
6902 007426' 254 00 0 00 007416' JRST TA74 ; loop on error
6903 007427' 254 00 0 00 007445' JRST TX74 ; altmode exit
6904 007430' 326 15 0 00 007445' JUMPN ERFLG,TX74 ; error? yes - exit
6905
6906 ; Port does the remainder of the testing and returns completion code
6907 ; in the EBUF.
6908
6909 007431' 350 00 0 00 007421* AOS TSTSUB ; set up subtest number
6910 007432' 201 01 0 00 200000 MOVEI 1,TSTEBF ; set up to read EBUF
6911 007433' 260 17 0 00 007333* GO LDCSR ; stop the port
6912 007434' 260 17 0 00 003274* GO RDEBUF ; read completion code
6913 007435' 405 01 0 00 000007 ANDI 1,7 ; mask out irrelevant bits
6914 007436' 202 01 0 00 013665' MOVEM 1,SAVEBU# ; save completion code
6915 007437' 332 00 0 00 000001 SKIPE 1 ; error code set?
6916 007440' 474 15 0 00 000000 SETO ERFLG, ; yes - set error flag
6917 007441' 027 00 0 00 007446' SCOPER MB74 ; print error message
6918 007442' 254 00 0 00 007416' JRST TA74 ; loop on error
6919 007443' 254 00 0 00 007445' JRST TX74 ; altmode exit
6920 007444' 326 15 0 00 007445' JUMPN ERFLG,TX74 ; error? yes - exit
6921
6922 ; End of test
6923
6924 007445' 263 17 0 00 000000 TX74: RTN ; return
6925
6926 ; Error messages
6927
6928 007446' 270000 007447' MB74: LAST!CALL!TXALL!MB74PN ; print data
6929
6930 007447' 200 02 0 00 013665' MB74PN: MOVE 2,SAVEBU ; get subtest number
6931 007450' 256 00 0 02 007452' XCT MB74PP-1(2) ; print text
6932 007451' 260 17 0 00 010231' GO MPNT2 ; print CSR data
6933 007452' 263 17 0 00 000000 RTN
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 140
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0625
6934
6935 MB74PP: TMSG <
6936 Did EBUS Reset, Port read CSR
6937 007453' 037 00 0 00 012734' CSR Bits 25-26 & 28 not zero>
6938 TMSG <
6939 Did EBUS Reset, Port wrote 0's to CSR
6940 007454' 037 00 0 00 012751' CSR Bits 25-26 & 28 not zero>
6941 TMSG <
6942 Port wrote 1's to CSR
6943 007455' 037 00 0 00 012767' CSR Bits 25-26 & 28 not 1's>
6944 TMSG <
6945 Port wrote 1's to CSR
6946 Port wrote 0's to CSR
6947 007456' 037 00 0 00 013002' CSR Bits 25-26 & 28 not 1's>
6948 007457' 037 00 0 00 013022' TMSGC <Failure code incorrect - 5>
6949 007460' 037 00 0 00 013030' TMSGC <Failure code incorrect - 6>
6950 007461' 037 00 0 00 013036' TMSGC <Failure code incorrect - 7>
6951
6952 ; Microcode: Build pattern in R2
6953
6954 007462' 000000 010015 T74M: MWORD <ADDR=0,JMAP,J=1,SD0,OR,B=2,D=2,SKCN,MGC=15> ; 0
6955 007463' 732001 240040
6956 007464' 000100 310000 MWORD <LDCT,J=31> ; 1
6957 007465' 000000 000300
6958 007466' 000200 020000 MWORD <RPCT,J=2,S0B,OR,B=2,D=5> ; 2
6959 007467' 335001 000220
6960 007470' 000300 060000 MWORD <LDCT,J=6> ; 3
6961 007471' 000000 000300
6962 007472' 000400 040000 MWORD <RPCT,J=4,S0B,OR,B=2,D=7> ; 4
6963 007473' 337001 000220
6964
6965 ; Read CSR and verify that bits 25-26,28 are 0's
6966
6967 007474' 000500 070040 MWORD <CJP,J=7,CENA,CCGC,SELE,MGC=40> ; 5
6968 007475' 000400 015060
6969 007476' 000600 050000 MWORD <JMAP,J=5> ; 6
6970 007477' 000000 000040
6971 007500' 000700 000100 MWORD <CONT,SD0,B=1,OR,D=2,SELE,MGC=100> ; 7
6972 007501' 732000 405340
6973 007502' 001000 000000 MWORD <CONT,SAB,A=2,B=1,AND,D=2> ; 10
6974 007503' 142020 400340
6975 007504' 001100 130000 MWORD <CJP,J=13,SAB,AND,A=1,B=2,D=1,CENA,CCFZ> ; 11
6976 007505' 141411 020060
6977 007506' 001201 000001 MWORD <JMAP,J=100,SD0,OR,D=2,SKCN,MGC=1> ; 12
6978 007507' 732000 240040
6979
6980 ; UC> Write 0's to bits 25-26,28
6981 ; UC> Read CSR and verify that bits 25-26,28 are 0's
6982
6983 007510' 001300 002004 MWORD <CONT,S0A,AND,D=1,OENA,SELE,MGC=4> ; 13
6984 007511' 441000 005340
6985 007512' 001400 160040 MWORD <CJP,J=16,CENA,CCGC,SELE,MGC=40> ; 14
6986 007513' 000400 015060
6987 007514' 001500 140000 MWORD <JMAP,J=14> ; 15
6988 007515' 000000 000040
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 140-1
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0626
6989 007516' 001600 000200 MWORD <CONT,SELE,MGC=200> ; 16
6990 007517' 000000 005340
6991
6992 007520' 001700 210040 MWORD <CJP,J=21,CENA,CCGC,SELE,MGC=40> ; 17
6993 007521' 000400 015060
6994 007522' 002000 170000 MWORD <JMAP,J=17> ; 20
6995 007523' 000000 000040
6996 007524' 002100 000100 MWORD <CONT,SD0,B=1,OR,D=2,SELE,MGC=100> ; 21
6997 007525' 732000 405340
6998 007526' 002200 000000 MWORD <CONT,SAB,A=2,B=1,AND,D=2> ; 22
6999 007527' 142020 400340
7000 007530' 002300 250000 MWORD <CJP,J=25,SAB,AND,A=1,B=2,D=1,CENA,CCFZ> ; 23
7001 007531' 141411 020060
7002 007532' 002401 000002 MWORD <JMAP,J=100,SD0,OR,D=2,SKCN,MGC=2> ; 24
7003 007533' 732000 240040
7004
7005 ; UC> Write 1's to bits 25-26,28
7006 ; UC> Read CSR and verify that bits 25-26,28 are 1's
7007
7008 007534' 002500 002004 MWORD <CONT,S0A,OR,A=2,D=1,OENA,SELE,MGC=4> ; 25
7009 007535' 431020 005340
7010 007536' 002600 300040 MWORD <CJP,J=30,CENA,CCGC,SELE,MGC=40> ; 26
7011 007537' 000400 015060
7012 007540' 002700 260000 MWORD <JMAP,J=26> ; 27
7013 007541' 000000 000040
7014 007542' 003000 000200 MWORD <CONT,SELE,MGC=200> ; 30
7015 007543' 000000 005340
7016
7017 007544' 003100 330040 MWORD <CJP,J=33,CENA,CCGC,SELE,MGC=40> ; 31
7018 007545' 000400 015060
7019 007546' 003200 310000 MWORD <JMAP,J=31> ; 32
7020 007547' 000000 000040
7021 007550' 003300 000100 MWORD <CONT,SD0,B=1,OR,D=2,SELE,MGC=100> ; 33
7022 007551' 732000 405340
7023 007552' 003400 000000 MWORD <CONT,SAB,A=2,B=1,AND,D=2> ; 34
7024 007553' 142020 400340
7025 007554' 003500 370000 MWORD <CJP,J=37,SAB,XOR,A=1,B=2,D=1,CENA,CCFZ> ; 35
7026 007555' 161411 020060
7027 007556' 003601 000003 MWORD <JMAP,J=100,SD0,OR,D=2,SKCN,MGC=3> ; 36
7028 007557' 732000 240040
7029
7030 ; UC> Write 0's to bits 25-26,28
7031 ; UC> Read CSR and verify that bits 25-26,28 are 1's
7032
7033 007560' 003700 002004 MWORD <CONT,S0A,AND,A=2,D=1,OENA,SELE,MGC=4> ; 37
7034 007561' 441020 005340
7035 007562' 004000 420040 MWORD <CJP,J=42,CENA,CCGC,SELE,MGC=40> ; 40
7036 007563' 000400 015060
7037 007564' 004100 400000 MWORD <JMAP,J=40> ; 41
7038 007565' 000000 000040
7039 007566' 004200 000200 MWORD <CONT,SELE,MGC=200> ; 42
7040 007567' 000000 005340
7041
7042 007570' 004300 450040 MWORD <CJP,J=45,CENA,CCGC,SELE,MGC=40> ; 43
7043 007571' 000400 015060
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 140-2
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0627
7044 007572' 004400 430000 MWORD <JMAP,J=43> ; 44
7045 007573' 000000 000040
7046 007574' 004500 000100 MWORD <CONT,SD0,B=1,OR,D=2,SELE,MGC=100> ; 45
7047 007575' 732000 405340
7048 007576' 004600 000000 MWORD <CONT,SAB,A=2,B=1,AND,D=2> ; 46
7049 007577' 142020 400340
7050 007600' 004700 510000 MWORD <CJP,J=51,SAB,XOR,A=1,B=2,D=1,CENA,CCFZ> ; 47
7051 007601' 161411 020060
7052 007602' 005001 000004 MWORD <JMAP,J=100,SD0,OR,D=2,SKCN,MGC=4> ; 50
7053 007603' 732000 240040
7054 007604' 005101 000000 MWORD <JMAP,J=100,SD0,OR,D=2,SKCN,MGC=0> ; 51
7055 007605' 732000 240040
7056
7057 ; UC> Write completion code
7058
7059 007606' 010000 002004 MWORD <ADDR=100,CONT,S0A,OR,D=1,OENA,SELE,MGC=4> ; 100
7060 007607' 431000 005340
7061 007610' 010101 010000 MWORD <JMAP,J=101,D=1> ; 101
7062 007611' 001000 000040
7063 007612' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 141
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0628
7064
7065 ;#********************************************************************
7066 ;* TEST 75 - CSR 27 & 30-31 KL-side
7067 ;
7068 ; Description: Verify that CSR Bits 27 and 30-31 can be read
7069 ; and written properly from the KL side.
7070 ;
7071 ; Procedure: KL> EBUS Reset
7072 ; KL> Read CSR and verify that bits 27,30-31 are 0's
7073 ;
7074 ; KL> Write 0's to bits 27,30-31
7075 ; KL> Read CSR and verify that bits 27,30-31 are 0's
7076 ;
7077 ; KL> Write 1's to bits 27,30-31
7078 ; KL> Read CSR and verify that bits 27,30-31 are 1's
7079 ;
7080 ; KL> Write 0's to bits 27,30-31
7081 ; KL> Read CSR and verify that bits 27,30-31 are 1's
7082 ;
7083 ; KL> Write 1's to bits 27,30-31
7084 ; KL> Read CSR and verify that bits 27,30-31 are 1's
7085 ;
7086 ; KL> Do an EBUS Reset
7087 ; KL> Read CSR and verify that bits 27,30-31 are 0's
7088 ;
7089 ; Failure: ---
7090 ;#********************************************************************
7091
7092 ; Test data
7093
7094 007613' 254 00 0 00 007621' TSTE75: JRST TG75 ; go start test
7095 007614' 400000 000075 EBUS!ZEBUS!75 ; test mask
7096 007615' 000000 013044' 0,,[ASCIZ ^CSR 27 & 30-31 KL-side^]
7097 007616' 010761' 012563' [EXP MLAST!E11],,[EXP E9,E1,MLAST!E6]
7098 007617' 000000 007744' TSTE76 ; failure test table
7099 007620' 777777 777777 -1
7100
7101 ; Start test
7102
7103 007621' 201 00 0 00 000000' TG75: MOVEI Z2 ; get address of module start
7104 007622' 260 17 0 00 007412* GO TRACE ; handle trace output
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 142
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0629
7105
7106 ; KL> EBUS Reset
7107 ; KL> Read CSR and verify that bits 27,30-31 are 0's
7108
7109 007623' 400 15 0 00 000000 TA75: SETZ ERFLG, ; clear error flag
7110 007624' 260 17 0 00 007417* GO ERESET ; do an EBUS Reset
7111 007625' 201 00 0 00 000001 MOVEI 1 ; initialize subtest number
7112 007626' 202 00 0 00 007431* MOVEM TSTSUB ; to 1
7113 007627' 260 17 0 00 007335* GO RDCSR ; read CSR register
7114 007630' 255 00 0 00 000000 JFCL ; error - ignore
7115 007631' 603 01 0 00 000460 TLNE 1,460 ; bits all zero?
7116 007632' 474 15 0 00 000000 SETO ERFLG, ; no - set error flag
7117 007633' 027 00 0 00 007731' SCOPER MB75 ; print error message
7118 007634' 254 00 0 00 007623' JRST TA75 ; loop on error
7119 007635' 254 00 0 00 007730' JRST TX75 ; altmode exit
7120 007636' 326 15 0 00 007730' JUMPN ERFLG,TX75 ; error? yes - exit
7121
7122 ; KL> Write 0's to bits 27,30-31
7123 ; KL> Read CSR and verify that bits 27,30-31 are 0's
7124
7125 007637' 350 00 0 00 007626* AOS TSTSUB ; indicate next subtest
7126 007640' 400 01 0 00 000000 SETZ 1, ; clear data
7127 007641' 260 17 0 00 007433* GO LDCSR ; write CSR register
7128 007642' 260 17 0 00 007627* GO RDCSR ; read CSR register
7129 007643' 255 00 0 00 000000 JFCL ; error - ignore
7130 007644' 603 01 0 00 000460 TLNE 1,460 ; bits all zero?
7131 007645' 474 15 0 00 000000 SETO ERFLG, ; no - set error flag
7132 007646' 027 00 0 00 007731' SCOPER MB75 ; print error message
7133 007647' 254 00 0 00 007623' JRST TA75 ; loop on error
7134 007650' 254 00 0 00 007730' JRST TX75 ; altmode exit
7135 007651' 326 15 0 00 007730' JUMPN ERFLG,TX75 ; error? yes - exit
7136
7137 ; KL> Write 1's to bits 27,30-31
7138 ; KL> Read CSR and verify that bits 27,30-31 are 1's
7139
7140 007652' 350 00 0 00 007637* AOS TSTSUB ; indicate next subtest
7141 007653' 201 01 0 00 000460 MOVEI 1,460 ; get 1's for bits
7142 007654' 260 17 0 00 007641* GO LDCSR ; write CSR register
7143 007655' 260 17 0 00 007642* GO RDCSR ; read CSR register
7144 007656' 255 00 0 00 000000 JFCL ; error - ignore
7145 007657' 135 00 0 00 013051' LDB [POINT 5,1,31] ; get bits
7146 007660' 302 00 0 00 000023 CAIE 23 ; still set?
7147 007661' 474 15 0 00 000000 SETO ERFLG, ; no - set error flag
7148 007662' 027 00 0 00 007731' SCOPER MB75 ; print error message
7149 007663' 254 00 0 00 007623' JRST TA75 ; loop on error
7150 007664' 254 00 0 00 007730' JRST TX75 ; altmode exit
7151 007665' 326 15 0 00 007730' JUMPN ERFLG,TX75 ; error? yes - exit
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 143
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0630
7152
7153 ; KL> Write 0's to bits 27,30-31
7154 ; KL> Read CSR and verify that bits 27,30-31 are 1's
7155
7156 007666' 350 00 0 00 007652* AOS TSTSUB ; indicate next subtest
7157 007667' 400 01 0 00 000000 SETZ 1, ; zero AC1
7158 007670' 260 17 0 00 007654* GO LDCSR ; zero CSR register
7159 007671' 260 17 0 00 007655* GO RDCSR ; read CSR register
7160 007672' 255 00 0 00 000000 JFCL ; error - ignore
7161 007673' 135 00 0 00 013051' LDB [POINT 5,1,31] ; get bits
7162 007674' 302 00 0 00 000023 CAIE 23 ; still set?
7163 007675' 474 15 0 00 000000 SETO ERFLG, ; no - set error flag
7164 007676' 027 00 0 00 007731' SCOPER MB75 ; print error message
7165 007677' 254 00 0 00 007623' JRST TA75 ; loop on error
7166 007700' 254 00 0 00 007730' JRST TX75 ; altmode exit
7167 007701' 326 15 0 00 007730' JUMPN ERFLG,TX75 ; error? yes - exit
7168
7169 ; KL> Write 1's to bits 27,30-31
7170 ; KL> Read CSR and verify that bits 27,30-31 are 1's
7171
7172 007702' 350 00 0 00 007666* AOS TSTSUB ; indicate next subtest
7173 007703' 201 01 0 00 000460 MOVEI 1,460 ; get 1's for bits
7174 007704' 260 17 0 00 007670* GO LDCSR ; write CSR register
7175 007705' 260 17 0 00 007671* GO RDCSR ; read CSR register
7176 007706' 255 00 0 00 000000 JFCL ; error - ignore
7177 007707' 135 00 0 00 013051' LDB [POINT 5,1,31] ; get bits
7178 007710' 302 00 0 00 000023 CAIE 23 ; still set?
7179 007711' 474 15 0 00 000000 SETO ERFLG, ; no - set error flag
7180 007712' 027 00 0 00 007731' SCOPER MB75 ; print error message
7181 007713' 254 00 0 00 007623' JRST TA75 ; loop on error
7182 007714' 254 00 0 00 007730' JRST TX75 ; altmode exit
7183 007715' 326 15 0 00 007730' JUMPN ERFLG,TX75 ; error? yes - exit
7184
7185 ; KL> Do an EBUS Reset
7186 ; KL> Read CSR and verify that bits 27,30-31 are 0's
7187
7188 007716' 350 00 0 00 007702* AOS TSTSUB ; indicate next subtest
7189 007717' 260 17 0 00 007624* GO ERESET ; do an EBUS reset
7190 007720' 260 17 0 00 007705* GO RDCSR ; read CSR register
7191 007721' 255 00 0 00 000000 JFCL ; error - ignore
7192 007722' 603 01 0 00 000460 TLNE 1,460 ; bits all zero?
7193 007723' 474 15 0 00 000000 SETO ERFLG, ; no - set error flag
7194 007724' 027 00 0 00 007731' SCOPER MB75 ; print error message
7195 007725' 254 00 0 00 007623' JRST TA75 ; loop on error
7196 007726' 254 00 0 00 007730' JRST TX75 ; altmode exit
7197 007727' 326 15 0 00 007730' JUMPN ERFLG,TX75 ; error? yes - exit
7198
7199 ; End of test
7200
7201 007730' 263 17 0 00 000000 TX75: RTN ; return
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 144
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0631
7202
7203 ; Error messages
7204
7205 007731' 270000 007732' MB75: LAST!CALL!TXALL!MB75PN ; print data
7206
7207 007732' 200 02 0 00 007716* MB75PN: MOVE 2,TSTSUB ; get subtest number
7208 007733' 256 00 0 02 007735' XCT MB75PP-1(2) ; print text
7209 007734' 260 17 0 00 010231' GO MPNT2 ; print CSR data
7210 007735' 263 17 0 00 000000 RTN
7211
7212 MB75PP: TMSG <
7213 Did EBUS Reset
7214 007736' 037 00 0 00 013052' CSR Bits 27 & 30-31 not zero>
7215 TMSG <
7216 Did EBUS Reset, then wrote 0's to CSR
7217 007737' 037 00 0 00 013064' CSR Bits 27 & 30-31 not zero>
7218 TMSG <
7219 Did EBUS Reset, then wrote 1's to CSR
7220 007740' 037 00 0 00 013102' CSR Bits 27 & 30-31 not set>
7221 TMSG <
7222 Did EBUS Reset, then wrote 1's to CSR, then wrote 0's to CSR
7223 007741' 037 00 0 00 013120' CSR Bits 27 & 30-31 not still set>
7224 TMSG <
7225 Wrote 1's to CSR with CSR bits 27 & 30-31 set
7226 007742' 037 00 0 00 013144' CSR Bits 27 & 30-31 not still set>
7227 TMSG <
7228 Did EBUS Reset with CSR bits 27 & 30-31 set
7229 007743' 037 00 0 00 013165' CSR Bits 27 & 30-31 not cleared>
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 145
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0632
7230
7231 ;#********************************************************************
7232 ;* TEST 76 - CSR 27 & 30-31 Port-side
7233 ;
7234 ; Description: Verify that CSR Bits 27 and 30-31 can be read
7235 ; and written properly from the port side.
7236 ;
7237 ; Procedure: KL> Load test ucode
7238 ; KL> EBUS Reset
7239 ; KL> Start port at location 0
7240 ;
7241 ; UC> Read CSR and verify that bits 27,30-31 are 0's
7242 ; If error - set completion code in EBUF of 1
7243 ;
7244 ; UC> Write 0's to bits 27,30-31
7245 ; UC> Read CSR and verify that bits 27,30-31 are 0's
7246 ; If error - set completion code in EBUF of 2
7247 ;
7248 ; UC> Write 1's to bits 27,30-31
7249 ; UC> Read CSR and verify that bits 27,30-31 are 0's
7250 ; If error - set completion code in EBUF of 3
7251 ;
7252 ; KL> Start port at location 40
7253 ; KL> Write 1's to bits 27,30-31
7254 ; UC> Read CSR and verify that bits 27,30-31 are 1's
7255 ; If error - set completion code in EBUF of 4
7256 ;
7257 ; UC> Write 1's to bits 27,30-31
7258 ; UC> Read CSR and verify that bits 27,30-31 are 0's
7259 ; If error - set completion code in EBUF of 5
7260 ;
7261 ; If no errors - set completion code in EBUF of 0
7262 ;
7263 ; Failure: ---
7264 ;#********************************************************************
7265
7266 ; Test data
7267
7268 007744' 254 00 0 00 007751' TSTE76: JRST TG76 ; go start test
7269 007745' 400400 000076 EBUS!NDMP!ZEBUS!76 ; test mask
7270 007746' 010053' 013205' T76M,,[ASCIZ ^CSR 27 & 30-31 Port-side^]
7271 007747' 010761' 012563' [EXP MLAST!E11],,[EXP E9,E1,MLAST!E6]
7272 007750' 777777 777777 -1 ; failure test table
7273
7274 ; Start test
7275
7276 007751' 201 00 0 00 000000' TG76: MOVEI Z2 ; get address of module start
7277 007752' 260 17 0 00 007622* GO TRACE ; handle trace output
7278 007753' 201 01 0 00 010053' MOVEI 1,T76M ; set up microcode address
7279 007754' 260 17 0 00 007414* GO TLOAD ; load/verify it
7280 007755' 263 17 0 00 000000 RTN ; failed - exit test
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 146
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0633
7281
7282 ; KL> EBUS Reset
7283 ; KL> Start port at location 0
7284
7285 007756' 400 15 0 00 000000 TA76: SETZ ERFLG, ; clear error flag
7286 007757' 260 17 0 00 007717* GO ERESET ; do an EBUS Reset
7287 007760' 201 00 0 00 000001 MOVEI 1 ; set subtest number
7288 007761' 202 00 0 00 007732* MOVEM TSTSUB ; to 1
7289 007762' 201 00 0 00 000010 MOVEI MPRUN ; get startup bits
7290 007763' 202 00 0 00 007423* MOVEM SDATA ; save in startup data word
7291 007764' 402 00 0 00 007424* SETZM SNEXT ; set start address to 0
7292 007765' 260 17 0 00 010277' GO MSTART ; start up port
7293 007766' 254 00 0 00 007756' JRST TA76 ; loop on error
7294 007767' 254 00 0 00 010036' JRST TX76 ; altmode exit
7295 007770' 326 15 0 00 010036' JUMPN ERFLG,TX76 ; error? yes - exit
7296
7297 ; Port does the remainder of the testing and returns completion code
7298 ; in the EBUF.
7299
7300 007771' 350 00 0 00 007761* AOS TSTSUB ; set up subtest number
7301 007772' 201 01 0 00 200000 MOVEI 1,TSTEBF ; set up to read EBUF
7302 007773' 260 17 0 00 007704* GO LDCSR ; stop the port
7303 007774' 260 17 0 00 007434* GO RDEBUF ; read completion code
7304 007775' 405 01 0 00 000007 ANDI 1,7 ; mask out irrelevant bits
7305 007776' 202 01 0 00 013665' MOVEM 1,SAVEBU ; save completion code
7306 007777' 332 00 0 00 000001 SKIPE 1 ; error code set?
7307 010000' 474 15 0 00 000000 SETO ERFLG, ; yes - set error flag
7308 010001' 027 00 0 00 010037' SCOPER MB76 ; print error message
7309 010002' 254 00 0 00 007756' JRST TA76 ; loop on error
7310 010003' 254 00 0 00 010036' JRST TX76 ; altmode exit
7311 010004' 326 15 0 00 010036' JUMPN ERFLG,TX76 ; error? yes - exit
7312
7313 ; Start up the port for the remainder of the testing
7314
7315 010005' 350 01 0 00 007771* AOS 1,TSTSUB ; increment test segment
7316 010006' 202 01 0 00 013674' MOVEM 1,T76SAV# ; save it
7317 010007' 200 01 0 00 013674' TB76: MOVE 1,T76SAV ; get test segment number
7318 010010' 202 01 0 00 010005* MOVEM 1,TSTSUB ; set up test segment
7319 010011' 260 17 0 00 007757* GO ERESET ; do an EBUS Reset
7320 010012' 201 00 0 00 000470 MOVEI MPRUN!460 ; get startup bits
7321 010013' 202 00 0 00 007763* MOVEM SDATA ; save in startup data word
7322 010014' 201 00 0 00 000040 MOVEI 40 ; get start address 40
7323 010015' 202 00 0 00 007764* MOVEM SNEXT ; and set it up
7324 010016' 260 17 0 00 010277' GO MSTART ; start up port
7325 010017' 254 00 0 00 010007' JRST TB76 ; loop on error
7326 010020' 254 00 0 00 010036' JRST TX76 ; altmode exit
7327 010021' 326 15 0 00 010036' JUMPN ERFLG,TX76 ; error? yes - exit
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 147
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0634
7328
7329 ; Port does the remainder of the testing and returns completion code
7330 ; in the EBUF.
7331
7332 010022' 350 00 0 00 010010* AOS TSTSUB ; increment test segment
7333 010023' 201 01 0 00 200000 MOVEI 1,TSTEBF ; set up to read EBUF
7334 010024' 260 17 0 00 007773* GO LDCSR ; stop the port
7335 010025' 260 17 0 00 007774* GO RDEBUF ; read completion code
7336 010026' 405 01 0 00 000007 ANDI 1,7 ; mask out irrelevant bits
7337 010027' 202 01 0 00 013665' MOVEM 1,SAVEBU ; save completion code
7338 010030' 332 00 0 00 000001 SKIPE 1 ; error code set?
7339 010031' 474 15 0 00 000000 SETO ERFLG, ; yes - set error flag
7340 010032' 027 00 0 00 010037' SCOPER MB76 ; print error message
7341 010033' 254 00 0 00 010007' JRST TB76 ; loop on error
7342 010034' 254 00 0 00 010036' JRST TX76 ; altmode exit
7343 010035' 326 15 0 00 010036' JUMPN ERFLG,TX76 ; error? yes - exit
7344
7345 ; End of test
7346
7347 010036' 263 17 0 00 000000 TX76: RTN ; return
7348
7349 ; Error messages
7350
7351 010037' 270000 010040' MB76: LAST!CALL!TXALL!MB76PN ; print data
7352
7353 010040' 200 02 0 00 013665' MB76PN: MOVE 2,SAVEBU ; get subtest number
7354 010041' 256 00 0 02 010043' XCT MB76PP-1(2) ; print text
7355 010042' 260 17 0 00 010231' GO MPNT2 ; print CSR data
7356 010043' 263 17 0 00 000000 RTN
7357
7358 MB76PP: TMSG <
7359 Did EBUS Reset, Port read CSR
7360 010044' 037 00 0 00 013212' CSR Bits 27 & 30-31 not zero>
7361 TMSG <
7362 Did EBUS Reset, Port wrote 0's to CSR bits 27 & 30-31
7363 010045' 037 00 0 00 013227' CSR Bits 27 & 30-31 not zero>
7364 TMSG <
7365 Did EBUS Reset, Port wrote 0's to CSR bits 27 & 30-31
7366 Then wrote 1's to CSR bits 27 & 30-31
7367 010046' 037 00 0 00 013251' CSR Bits 27 & 30-31 not zero>
7368 TMSG <
7369 KL wrote 1's to CSR bits 27 & 30-31
7370 010047' 037 00 0 00 013302' Port read CSR, CSR Bits 27 & 30-31 not 1's>
7371 TMSG <
7372 KL wrote 1's to CSR bits 27 & 30-31
7373 Port wrote 1's to CSR bits 27 & 30-31
7374 010050' 037 00 0 00 013323' Port read CSR, CSR Bits 27 & 30-31 not now zero>
7375 010051' 037 00 0 00 013030' TMSGC <Failure code incorrect - 6>
7376 010052' 037 00 0 00 013036' TMSGC <Failure code incorrect - 7>
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 148
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0635
7377
7378 ; Microcode: Build pattern in R2
7379
7380 010053' 000000 010023 T76M: MWORD <ADDR=0,JMAP,J=1,SD0,OR,B=2,D=2,SKCN,MGC=23> ; 0
7381 010054' 732001 240040
7382 010055' 000100 310000 MWORD <LDCT,J=31> ; 1
7383 010056' 000000 000300
7384 010057' 000200 020000 MWORD <RPCT,J=2,S0B,OR,B=2,D=5> ; 2
7385 010060' 335001 000220
7386 010061' 000300 030000 MWORD <LDCT,J=3> ; 3
7387 010062' 000000 000300
7388 010063' 000400 040000 MWORD <RPCT,J=4,S0B,OR,B=2,D=7> ; 4
7389 010064' 337001 000220
7390
7391 ; Read CSR and verify that bits 27,30-31 are 0's
7392
7393 010065' 000500 070040 MWORD <CJP,J=7,CENA,CCGC,SELE,MGC=40> ; 5
7394 010066' 000400 015060
7395 010067' 000600 050000 MWORD <JMAP,J=5> ; 6
7396 010070' 000000 000040
7397 010071' 000700 000100 MWORD <CONT,SD0,B=1,OR,D=2,SELE,MGC=100> ; 7
7398 010072' 732000 405340
7399 010073' 001000 000000 MWORD <CONT,SAB,A=2,B=1,AND,D=2> ; 10
7400 010074' 142020 400340
7401 010075' 001100 130000 MWORD <CJP,J=13,SAB,AND,A=1,B=2,D=1,CENA,CCFZ> ; 11
7402 010076' 141411 020060
7403 010077' 001201 000001 MWORD <JMAP,J=100,SD0,OR,D=2,SKCN,MGC=1> ; 12
7404 010100' 732000 240040
7405
7406 ; UC> Write 0's to bits 27,30-31
7407 ; UC> Read CSR and verify that bits 27,30-31 are 0's
7408
7409 010101' 001300 002004 MWORD <CONT,S0A,AND,D=1,OENA,SELE,MGC=4> ; 13
7410 010102' 441000 005340
7411 010103' 001400 160040 MWORD <CJP,J=16,CENA,CCGC,SELE,MGC=40> ; 14
7412 010104' 000400 015060
7413 010105' 001500 140000 MWORD <JMAP,J=14> ; 15
7414 010106' 000000 000040
7415 010107' 001600 000200 MWORD <CONT,SELE,MGC=200> ; 16
7416 010110' 000000 005340
7417
7418 010111' 001700 210040 MWORD <CJP,J=21,CENA,CCGC,SELE,MGC=40> ; 17
7419 010112' 000400 015060
7420 010113' 002000 170000 MWORD <JMAP,J=17> ; 20
7421 010114' 000000 000040
7422 010115' 002100 000100 MWORD <CONT,SD0,B=1,OR,D=2,SELE,MGC=100> ; 21
7423 010116' 732000 405340
7424 010117' 002200 000000 MWORD <CONT,SAB,A=2,B=1,AND,D=2> ; 22
7425 010120' 142020 400340
7426 010121' 002300 250000 MWORD <CJP,J=25,SAB,AND,A=1,B=2,D=1,CENA,CCFZ> ; 23
7427 010122' 141411 020060
7428 010123' 002401 000002 MWORD <JMAP,J=100,SD0,OR,D=2,SKCN,MGC=2> ; 24
7429 010124' 732000 240040
7430
7431 ; UC> Write 1's to bits 27,30-31
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 148-1
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0636
7432 ; UC> Read CSR and verify that bits 27,30-31 are 0's
7433
7434 010125' 002500 002004 MWORD <CONT,S0A,OR,A=2,D=1,OENA,SELE,MGC=4> ; 25
7435 010126' 431020 005340
7436 010127' 002600 300040 MWORD <CJP,J=30,CENA,CCGC,SELE,MGC=40> ; 26
7437 010130' 000400 015060
7438 010131' 002700 260000 MWORD <JMAP,J=26> ; 27
7439 010132' 000000 000040
7440 010133' 003000 000200 MWORD <CONT,SELE,MGC=200> ; 30
7441 010134' 000000 005340
7442
7443 010135' 003100 330040 MWORD <CJP,J=33,CENA,CCGC,SELE,MGC=40> ; 31
7444 010136' 000400 015060
7445 010137' 003200 310000 MWORD <JMAP,J=31> ; 32
7446 010140' 000000 000040
7447 010141' 003300 000100 MWORD <CONT,SD0,B=1,OR,D=2,SELE,MGC=100> ; 33
7448 010142' 732000 405340
7449 010143' 003400 000000 MWORD <CONT,SAB,A=2,B=1,AND,D=2> ; 34
7450 010144' 142020 400340
7451 010145' 003500 370000 MWORD <CJP,J=37,SAB,AND,A=1,B=2,D=1,CENA,CCFZ> ; 35
7452 010146' 141411 020060
7453 010147' 003601 000003 MWORD <JMAP,J=100,SD0,OR,D=2,SKCN,MGC=3> ; 36
7454 010150' 732000 240040
7455 010151' 003701 000000 MWORD <JMAP,J=100,SD0,OR,D=2,SKCN,MGC=0> ; 37
7456 010152' 732000 240040
7457
7458 ; UC> Read CSR and verify that bits 27,30-31 are 1's
7459
7460 010153' 004000 410000 MWORD <ADDR=40,JMAP,J=41> ; 40
7461 010154' 000000 000040
7462 010155' 004100 430040 MWORD <CJP,J=43,CENA,CCGC,SELE,MGC=40> ; 41
7463 010156' 000400 015060
7464 010157' 004200 410000 MWORD <JMAP,J=41> ; 42
7465 010160' 000000 000040
7466 010161' 004300 000100 MWORD <CONT,SD0,B=1,OR,D=2,SELE,MGC=100> ; 43
7467 010162' 732000 405340
7468 010163' 004400 000000 MWORD <CONT,SAB,A=2,B=1,AND,D=2> ; 44
7469 010164' 142020 400340
7470 010165' 004500 470000 MWORD <CJP,J=47,SAB,XOR,A=1,B=2,D=1,CENA,CCFZ> ; 45
7471 010166' 161411 020060
7472 010167' 004601 000004 MWORD <JMAP,J=100,SD0,OR,D=2,SKCN,MGC=4> ; 46
7473 010170' 732000 240040
7474
7475 ; UC> Write 1's to bits 27,30-31
7476 ; UC> Read CSR and verify that bits 27,30-31 are 0's
7477
7478 010171' 004700 002004 MWORD <CONT,S0A,OR,A=2,D=1,OENA,SELE,MGC=4> ; 47
7479 010172' 431020 005340
7480 010173' 005000 520040 MWORD <CJP,J=52,CENA,CCGC,SELE,MGC=40> ; 50
7481 010174' 000400 015060
7482 010175' 005100 500000 MWORD <JMAP,J=50> ; 51
7483 010176' 000000 000040
7484 010177' 005200 000200 MWORD <CONT,SELE,MGC=200> ; 52
7485 010200' 000000 005340
7486
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 148-2
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Tests SEQ 0637
7487 010201' 005300 550040 MWORD <CJP,J=55,CENA,CCGC,SELE,MGC=40> ; 53
7488 010202' 000400 015060
7489 010203' 005400 530000 MWORD <JMAP,J=53> ; 54
7490 010204' 000000 000040
7491 010205' 005500 000100 MWORD <CONT,SD0,B=1,OR,D=2,SELE,MGC=100> ; 55
7492 010206' 732000 405340
7493 010207' 005600 000000 MWORD <CONT,SAB,A=2,B=1,AND,D=2> ; 56
7494 010210' 142020 400340
7495 010211' 005700 610000 MWORD <CJP,J=61,SAB,AND,A=1,B=2,D=1,CENA,CCFZ> ; 57
7496 010212' 141411 020060
7497 010213' 006001 000005 MWORD <JMAP,J=100,SD0,OR,D=2,SKCN,MGC=5> ; 60
7498 010214' 732000 240040
7499 010215' 006101 000000 MWORD <JMAP,J=100,SD0,OR,D=2,SKCN,MGC=0> ; 61
7500 010216' 732000 240040
7501
7502 ; UC> Write completion code
7503
7504 010217' 010000 002004 MWORD <ADDR=100,CONT,S0A,OR,D=1,OENA,SELE,MGC=4> ; 100
7505 010220' 431000 005340
7506 010221' 010101 010000 MWORD <JMAP,J=101,D=1> ; 101
7507 010222' 001000 000040
7508 010223' 777777 777777 -1
7509
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 149
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Error Printing Routines SEQ 0638
7510 SUBTTL EBUS Module Error Printing Routines
7511
7512 ;#********************************************************************
7513 ; MPNT1 - Print Port/RH Interaction Message
7514 ;#********************************************************************
7515
7516 010224' 037 00 0 00 013355' MPNT1: TMSGC <Port/RH>
7517 010225' 135 00 0 00 010471' LDB [POINT 3,MBCN,9] ; get basic 3 bits
7518 010226' 037 16 0 00 000003 PNTOCS
7519 010227' 037 00 0 00 013357' TMSG < Interaction error>
7520 010230' 263 17 0 00 000000 RTN
7521
7522 ;#********************************************************************
7523 ; MPNT2 - Print CSR Contents (Prints contents of SAVCSR)
7524 ;#********************************************************************
7525
7526 010231' 200 01 0 00 010365' MPNT2: MOVE 1,SAVCSR ; get CSR data
7527 010232' 201 02 0 00 000023 MOVEI 2,^D19 ; character count so far
7528 010233' 201 03 0 00 000023 MOVEI 3,^D19 ; continuation line column number
7529 010234' 260 17 0 00 000000* GO CSRPNT ; go print in English
7530 010235' 263 17 0 00 000000 RTN
7531
7532
7533 ;#********************************************************************
7534 ; MPNT4 - Print EBUF data correct/actual (data in SAVEB1,SAVEB2)
7535 ;#********************************************************************
7536
7537 010236' 200 01 0 00 003433* MPNT4: MOVE 1,SCOSW ; get switches
7538 010237' 603 01 0 00 000200 TLNE 1,TXTINH ; inhibit text?
7539 010240' 037 00 0 00 013363' TMSGC <EBUF (C): > ; yes
7540 010241' 607 01 0 00 000200 TLNN 1,TXTINH ; inhibit text?
7541 010242' 037 00 0 00 013366' TMSGC <EBUF (Correct): > ; no
7542 010243' 200 00 0 00 010372' MOVE SAVEB1 ; get EBUF data written
7543 010244' 037 13 0 00 000000 PNTHW
7544 010245' 603 01 0 00 000200 TLNE 1,TXTINH ; inhibit text?
7545 010246' 037 00 0 00 013372' TMSGC < (A): > ; yes
7546 010247' 607 01 0 00 000200 TLNN 1,TXTINH ; inhibit text?
7547 010250' 037 00 0 00 013375' TMSGC < (Actual): > ; no
7548 010251' 200 00 0 00 010373' MOVE SAVEB2 ; get EBUF data
7549 010252' 037 13 0 00 000000 PNTHW
7550 010253' 263 17 0 00 000000 RTN
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 150
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Error Printing Routines SEQ 0639
7551
7552 ;#********************************************************************
7553 ; MPNT5 - Print CSR data correct/actual (data in SAVCS2,SAVCS3)
7554 ;#********************************************************************
7555
7556 010254' 200 01 0 00 010236* MPNT5: MOVE 1,SCOSW ; get switches
7557 010255' 603 01 0 00 000200 TLNE 1,TXTINH ; inhibit text?
7558 010256' 037 00 0 00 013401' TMSGC <CSR (C): > ; yes
7559 010257' 607 01 0 00 000200 TLNN 1,TXTINH ; inhibit text?
7560 010260' 037 00 0 00 013404' TMSGC <CSR (Correct): > ; no
7561 010261' 200 00 0 00 010367' MOVE SAVCS2 ; get CSR data written
7562 010262' 037 13 0 00 000000 PNTHW
7563 010263' 603 01 0 00 000200 TLNE 1,TXTINH ; inhibit text?
7564 010264' 037 00 0 00 013410' TMSGC < (A): > ; yes
7565 010265' 607 01 0 00 000200 TLNN 1,TXTINH ; inhibit text?
7566 010266' 037 00 0 00 013413' TMSGC < (Actual): > ; no
7567 010267' 200 00 0 00 010370' MOVE SAVCS3 ; get CSR data
7568 010270' 037 13 0 00 000000 PNTHW
7569 010271' 263 17 0 00 000000 RTN
7570
7571
7572 ;#********************************************************************
7573 ; MPNT6 - Read and print CSR
7574 ;#********************************************************************
7575
7576 010272' 260 17 0 00 007720* MPNT6: GO RDCSR ; get CSR contents
7577 010273' 255 00 0 00 000000 JFCL ; error
7578 010274' 202 01 0 00 010365' MOVEM 1,SAVCSR ; save it
7579 010275' 260 17 0 00 010231' GO MPNT2 ; print it
7580 010276' 263 17 0 00 000000 RTN ; return
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 151
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Error Printing Routines SEQ 0640
7581
7582 ;#********************************************************************
7583 ; MSTART - Start up the port and handle errors if fails to start
7584 ;#********************************************************************
7585
7586 010277' 260 17 0 00 007005* MSTART: GO IPACLR ; do a 'port clear'
7587 010300' 260 17 0 00 000000* GO IPASRT ; start up port
7588 010301' 474 15 0 00 000000 SETO ERFLG, ; failed
7589 010302' 474 15 0 00 000000 SETO ERFLG, ; failed
7590 010303' 474 15 0 00 000000 SETO ERFLG, ; failed
7591 010304' 027 00 0 00 010312' SCOPER MSTARE ; print error message
7592 010305' 263 17 0 00 000000 RTN ; loop on error (return +1)
7593 PJRST [AOS (P) ; altmode exit (return +2)
7594 010306' 254 00 0 00 013417' RTN]
7595 010307' 350 00 0 17 000000 AOS (P) ; ok (return +3)
7596 010310' 350 00 0 17 000000 AOS (P) ; ok (return +3)
7597 010311' 263 17 0 00 000000 RTN ; return
7598
7599 ; Error message - Couldn't start port
7600
7601 010312' 160000 011773' MSTARE: MSG!TXALL![ASCIZ /Failed to start port properly/]
7602 010313' 270000 010272' LAST!CALL!TXALL!MPNT6
7603
7604
7605 ;#********************************************************************
7606 ;* PFPNT - Print page fail data
7607 ;#********************************************************************
7608
7609 010314' 037 00 0 00 013421' PFPNT: TMSGC <APR status: >
7610 010315' 200 00 0 00 000000* MOVE PFAPR ; get APR status
7611 010316' 037 13 0 00 000000 PNTHW ; print it
7612 010317' 037 00 0 00 013425' TMSGC <EPT500/ > ; print EPT location 500
7613 010320' 200 00 0 00 000000* MOVE PF500 ; get data
7614 010321' 037 13 0 00 000000 PNTHW ; print it
7615 010322' 037 00 0 00 013430' TMSGC <EPT501/ > ; print EPT location 501
7616 010323' 200 00 0 00 000000* MOVE PF501 ; get data
7617 010324' 037 13 0 00 000000 PNTHW ; print it
7618 010325' 037 00 0 00 013433' TMSGC <EPT502/ > ; print EPT location 502
7619 010326' 200 00 0 00 000000* MOVE PF502 ; get data
7620 010327' 037 13 0 00 000000 PNTHW ; print it
7621 010330' 263 17 0 00 000000 RTN
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 152
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Error Printing Routines SEQ 0641
7622
7623 ;#********************************************************************
7624 ;* INTPNT - Print interrupt activity
7625 ;#********************************************************************
7626
7627 010331' 261 17 0 00 000000 INTPNT: RPUT (0,1,2) ; save AC's
7628
7629 010334' 037 00 0 00 013436' TMSGC <Interrupt history: (>
7630 010335' 200 00 0 00 005542* MOVE INTNUM ; get number of interrupts
7631 010336' 037 15 0 00 000000 PNTDEC
7632 010337' 037 00 0 00 013443' TMSG <. interrupts occurred)>
7633
7634 ; Print them
7635
7636 010340' 335 00 0 00 010335* INTPN0: SKIPGE INTNUM ; any interrupt left?
7637 010341' 254 00 0 00 010355' JRST INTPNX ; no - exit
7638 010342' 370 01 0 00 010340* SOS 1,INTNUM ; point to previous interrupt
7639 010343' 303 01 0 00 000012 CAILE 1,^D10 ; overflow interrupt?
7640 010344' 201 01 0 00 000012 MOVEI 1,^D10 ; yes - limit to 10 interrupts
7641 010345' 202 01 0 00 010342* MOVEM 1,INTNUM ; save interrupt number
7642 010346' 037 00 0 00 013450' TMSGC < #>
7643 010347' 200 00 0 00 000001 MOVE 1
7644 010350' 037 15 0 00 000000 PNTDEC
7645 010351' 037 00 0 00 013452' TMSG <. >
7646 010352' 550 02 0 01 005544* HRRZ 2,INTTYP(1) ; get type
7647 XCT [TMSG <Vectored> ; print it
7648 TMSG <NonVect Chn 1>
7649 TMSG <NonVect Chn 2>
7650 TMSG <NonVect Chn 3>
7651 TMSG <NonVect Chn 4>
7652 TMSG <NonVect Chn 5>
7653 TMSG <NonVect Chn 6>
7654 010353' 256 00 0 02 013502' TMSG <NonVect Chn 7>](2)
7655 010354' 254 00 0 00 010340' JRST INTPN0 ; loop till done
7656
7657 ; Exit
7658
7659 010355' 262 17 0 00 000002 INTPNX: RGET (2,1,0) ; yes - restore AC's
7660
7661 010360' 263 17 0 00 000000 RTN ; exit
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page 153
DFPTA2 MAC 21-Apr-84 18:29 EBUS Module Error Printing Routines SEQ 0642
7662
7663 ;#********************************************************************
7664 ; Test temporary storage
7665 ;#********************************************************************
7666
7667 010361' 000000 000000 SAVDAT: 0 ; location for misc data
7668 010362' 000000 000000 SAVDA1: 0 ; location for misc data
7669 010363' 000000 000000 SAVDA2: 0 ; location for misc data
7670 010364' 000000 000000 SAVDA3: 0 ; location for misc data
7671 010365' 000000 000000 SAVCSR: 0 ; location for CSR data
7672 010366' 000000 000000 SAVCS1: 0 ; location for CSR data written
7673 010367' 000000 000000 SAVCS2: 0 ; location for CSR data correct
7674 010370' 000000 000000 SAVCS3: 0 ; location for CSR data actual
7675 010371' 000000 000000 SAVCS4: 0 ; location for misc CSR data
7676 010372' 000000 000000 SAVEB1: 0 ; location for EBUF data correct
7677 010373' 000000 000000 SAVEB2: 0 ; location for EBUF data actual
7678
7679 ;#********************************************************************
7680 ; End of EBUS Module Tests
7681 ;#********************************************************************
7682
7683 XLIST
7684
NO ERRORS DETECTED
PROGRAM BREAK IS 013675
CPU TIME USED 04:07.505
146P CORE USED
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page S-1
DFPTA2 MAC 21-Apr-84 18:29 SYMBOL TABLE SEQ 0643
AEBUF 002700' ext IJRST 000011 spd MA41PN 003433' MB76PN 010040'
BBPNT 000000 ext ILAST 000000 spd MA46 004024' MB76PP 010044'
BEXEC 003162' ext INITPI 005522' ext MA4PNA 000271' MB7PNT 000523'
BUFF 012555' ext INTNUM 010345' ext MA4PNB 000275' MBCN 000016
BUFGEN 007001' ext INTPN0 010340' MA5 000352' MBERR 002000 000000 spd
CALL 200000 000000 spd INTPNT 010331' MA54 004744' MBUS 010000 000000 spd
CEBUF 002676' ext INTPNX 010355' MA54PN 004746' MC47 004126'
CRAMPE 004000 000000 spd INTTYP 010352' ext MA5PNT 000354' MC50 004325'
CSRCHN 100000 000000 spd IPACLR 010277' ext MA6 000430' MC51 004523'
CSRENG 000000 ext IPASRT 010300' ext MA60 005223' MC63 005572'
CSRPNT 010234' ext ISETDE 000002 spd MA60PN 005224' MD47 004130'
CSRRQS 200000 000000 spd ISETEI 000005 spd MA64 005701' MD50 004327'
DCOMP 000040 000000 spd ISETEX 000001 spd MA65 006125' MD51 004525'
E1 000001 spd ISETID 000003 spd MA7 000512' MLAST 400000 000000 spd
E10 000012 spd ISETIN 000004 spd MA70 006423' MPNT1 010224'
E11 000013 spd ISTART 000012 spd MA71 006657' MPNT2 010231'
E12 000014 spd IWAIT 000010 spd MA72 007120' MPNT4 010236'
E13 000015 spd LAST 010000 000000 spd MA7PNT 000514' MPNT5 010254'
E14 000016 spd LDCSR 010024' ext MB14 001157' MPNT6 010272'
E15 000017 spd LDEBUF 002016' ext MB22 001557' MPRUN 000010 spd
E16 000020 spd LDRAR 007331' ext MB25 002104' MSG 100000 000000 spd
E17 000021 spd M1 000031 spd MB26 002200' MSTARE 010312'
E18 000022 spd M11 000043 spd MB27 002257' MSTART 010277'
E19 000023 spd M12 000044 spd MB30 002334' NDMP 000400 000000 spd
E2 000002 spd M3 000033 spd MB31 002410' ODELAY 005356' ext
E20 000024 spd MA1 000021' MB32 002470' P 000017
E21 000025 spd MA10 000675' MB33 002543' PAT 000014
E22 000026 spd MA10PN 000677' MB34 002631' PCLEAR 400000 spd
E23 000027 spd MA11 000733' MB42 003561' PF500 010320' ext
E24 000030 spd MA12 000770' MB43 003632' PF501 010323' ext
E3 000003 spd MA13 001046' MB44 003706' PF502 010326' ext
E4 000004 spd MA13PN 001050' MB45 003751' PFAIL 004736' ext
E5 000005 spd MA14 001154' MB46 004026' PFAPR 010315' ext
E6 000006 spd MA15 001216' MB47 004124' PFPNT 010314'
E7 000007 spd MA16 001257' MB50 004323' PISYOF 005167' ext
E8 000010 spd MA17 001422' MB51 004521' PISYON 005207' ext
E9 000011 spd MA2 000075' MB53 004677' PJRST 254000 000000
EBUS 400000 000000 spd MA20 001451' MB55 005014' PNT1 037040 000000
EBUSPE 004000 spd MA21 001504' MB56 005071' PNT6 037300 000000
ECOMP 000020 000000 spd MA23 001625' MB57 005136' PNTDEC 037640 000000
ERESET 010011' ext MA23PN 001627' MB61 005367' PNTHW 037540 000000
ERFLG 000015 MA24 002033' MB62 005465' PNTMSG 037000 000000
GENEPE 100000 spd MA24PN 002035' MB62PN 005470' PNTOCS 037700 000003
GET 262740 000000 MA2PNA 000102' MB63 005567' PUT 261740 000000
GO 260740 000000 MA2PNB 000106' MB7 000521' RDCSR 010272' ext
IADDR 007054' ext MA3 000170' MB73 007346' RDEBUF 010025' ext
ICALL 000006 spd MA34 002627' MB73PN 007347' RQINT 010000 000000 spd
ICALLC 000007 spd MA35 002772' MB73PP 007353' RTN 263740 000000
ICSR 000000 ext MA36 003177' MB74 007446' SAVCS1 010366'
IDLE 000100 000000 spd MA37 003237' MB74PN 007447' SAVCS2 010367'
IEXEC 007006' ext MA3PNT 000172' MB74PP 007453' SAVCS3 010370'
IEXIT 000013 spd MA4 000264' MB75 007731' SAVCS4 010371'
IFLAG 000000 ext MA40 003316' MB75PN 007732' SAVCSR 010365'
IIOPF 007067' ext MA40PN 003320' MB75PP 007736' SAVDA1 010362'
IIPNT 000000 ext MA41 003431' MB76 010037' SAVDA2 010363'
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page S-2
DFPTA2 MAC 21-Apr-84 18:29 SYMBOL TABLE SEQ 0644
SAVDA3 010364' T65ADR 013670' TA41 003366' TB64 005624'
SAVDAT 010361' T65ADT 006110' TA42 003534' TB65 006050'
SAVEB1 010372' T65M 006127' TA43 003606' TB70 006312'
SAVEB2 010373' T70ADD 006352' TA44 003662' TB71 006545'
SAVEBU 013665' T70ADI 006346' TA45 003725' TB72 007006'
SAVMBC 013666' T70ADR 013671' TA46 004000' TB76 010007'
SCOPER 027000 000000 T70ADT 006417' TA47 004051' TC47 004075'
SCOSW 010254' ext T70M 006425' TA4L 000231' TC50 004274'
SDATA 010013' ext T71ADD 006605' TA4X 000257' TC51 004472'
SETVEC 005523' ext T71ADI 006601' TA5 000323' TC63 005555'
SINCYC 020000 spd T71ADR 013672' TA50 004250' TD47 004111'
SNEXT 010015' ext T71ADT 006653' TA51 004446' TD50 004310'
SSLAST 000000 spd T71M 006661' TA53 004653' TD51 004506'
SSSTRT 000001 spd T72ADD 007040' TA54 004715' TG1 000005'
T13M 001063' T72ADI 007036' TA55 004770' TG10 000627'
T16PAT 001261' T72ADR 013673' TA56 005043' TG11 000715'
T22M 001561' T72ADT 007110' TA57 005110' TG12 000745'
T23PAT 001634' T72M 007122' TA5L 000324' TG13 001000'
T25M 002106' T73M 007361' TA5X 000345' TG14 001115'
T26M 002202' T74M 007462' TA6 000416' TG15 001170'
T27M 002261' T76M 010053' TA61 005336' TG16 001225'
T30M 002336' T76SAV 013674' TA62 005422' TG17 001405'
T31M 002412' TA1 000007' TA63 005521' TG2 000035'
T32M 002472' TA10 000631' TA64 005623' TG20 001432'
T33M 002545' TA11 000717' TA65 006047' TG21 001460'
T34M 002633' TA12 000751' TA7 000443' TG22 001515'
T35M 002775' TA13 001007' TA70 006311' TG23 001572'
T36M 003201' TA14 001122' TA71 006544' TG24 002000'
T40DAT 003312' TA15 001175' TA72 007005' TG25 002050'
T40M 003336' TA16 001230' TA73 007234' TG26 002145'
T41DAT 003425' TA17 001407' TA74 007416' TG27 002222'
T41M 003451' TA2 000042' TA75 007623' TG3 000132'
T42M 003563' TA20 001436' TA76 007756' TG30 002302'
T43M 003634' TA21 001463' TA7PAT 000530' TG31 002356'
T44M 003710' TA22 001522' TB10 000653' TG32 002435'
T45M 003753' TA23 001575' TB13 001022' TG33 002506'
T46M 004030' TA24 002003' TB22 001542' TG34 002561'
T47M 004132' TA25 002055' TB27 002244' TG35 002661'
T50M 004331' TA26 002152' TB42 003546' TG36 003152'
T51M 004527' TA27 002227' TB43 003620' TG37 003217'
T53M 004701' TA2L 000043' TB44 003674' TG4 000222'
T55M 005016' TA2X 000070' TB45 003737' TG40 003247'
T56M 005073' TA3 000141' TB46 004012' TG41 003360'
T57M 005140' TA30 002307' TB47 004063' TG42 003527'
T60M 005233' TA31 002363' TB50 004262' TG43 003601'
T61M 005372' TA32 002442' TB51 004460' TG44 003655'
T62M 005474' TA33 002515' TB53 004665' TG45 003720'
T63M 005574' TA34 002566' TB54 004737' TG46 003773'
T64ADD 005654' TA35 002672' TB55 005002' TG47 004044'
T64ADI 005652' TA36 003162' TB56 005055' TG5 000314'
T64ADR 013667' TA37 003221' TB57 005122' TG50 004243'
T64ADT 005664' TA3L 000142' TB61 005354' TG51 004441'
T64M 005703' TA3X 000163' TB62 005442' TG53 004646'
T65ADD 006100' TA4 000230' TB62A 005444' TG54 004711'
T65ADI 006076' TA40 003255' TB63 005540' TG55 004763'
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page S-3
DFPTA2 MAC 21-Apr-84 18:29 SYMBOL TABLE SEQ 0645
TG56 005036' TSTA6 000000 ext TSTE67 006261' ent TX46 004023'
TG57 005103' TSTA7 000000 ext TSTE7 000432' ent TX47 004123'
TG6 000410' TSTE1 000000' ent TSTE70 006266' ent TX5 000350'
TG60 005150' TSTE10 000616' ent TSTE71 006522' ent TX50 004322'
TG61 005327' TSTE11 000704' ent TSTE72 006764' ent TX51 004520'
TG62 005411' TSTE12 000735' ent TSTE73 007217' ent TX53 004676'
TG63 005512' TSTE13 000773' ent TSTE74 007402' ent TX54 004743'
TG64 005611' TSTE14 001106' ent TSTE75 007613' ent TX55 005013'
TG65 006035' TSTE15 001162' ent TSTE76 007744' ent TX56 005070'
TG7 000440' TSTE16 001220' ent TSTEBF 200000 spd TX57 005135'
TG70 006275' TSTE17 001376' ent TSTFLG 010514' ext TX6 000427'
TG71 006530' TSTE2 000025' ent TSTPC 000000 ext TX60 005222'
TG72 006771' TSTE20 001424' ent TSTSUB 010022' ext TX61 005366'
TG73 007227' TSTE21 001453' ent TSTU10 000000 ext TX62 005464'
TG74 007411' TSTE22 001506' ent TSTU11 000000 ext TX63 005566'
TG75 007621' TSTE23 001564' ent TSTU12 000000 ext TX64 005634'
TG76 007751' TSTE24 001773' ent TSTU13 000000 ext TX65 006060'
TL35 002666' TSTE25 002043' ent TSTU41 000000 ext TX7 000511'
TL36 003157' TSTE26 002133' ent TSTU6 000000 ext TX70 006322'
TL60 005157' TSTE27 002211' ent TSTU7 000000 ext TX71 006555'
TL64 005620' TSTE3 000123' ent TUSER 001000 000000 spd TX72 007016'
TL65 006044' TSTE30 002272' ent TX1 000020' TX73 007345'
TL70 006306' TSTE31 002347' ent TX10 000674' TX74 007445'
TL71 006541' TSTE32 002427' ent TX11 000732' TX75 007730'
TL72 007002' TSTE33 002501' ent TX12 000767' TX76 010036'
TLOAD 007754' ext TSTE34 002554' ent TX13 001045' TXALL 060000 000000 spd
TRACE 007752' ext TSTE35 002644' ent TX14 001153' TXNOT 040000 000000 spd
TS35 002711' TSTE36 003136' ent TX15 001215' TXTINH 000200 spd
TS36 003174' TSTE37 003212' ent TX16 001256' TXYES 020000 000000 spd
TS64 005635' TSTE4 000214' ent TX17 001421' UDEBUG 010513' ext
TS64A 005641' TSTE40 003241' ent TX2 000073' USER 030037
TS64Z 005650' TSTE41 003353' ent TX20 001450' Z2 000000'
TS65 006061' TSTE42 003520' ent TX21 001503' ZEBUS 000000 spd
TS65A 006065' TSTE43 003572' ent TX22 001556' $ARG2 000001
TS65Z 006074' TSTE44 003643' ent TX23 001624' $B 000044
TS70 006323' TSTE45 003713' ent TX24 002032' $CHR 000044
TS70A 006333' TSTE46 003762' ent TX25 002103' $GARG 000001
TS70AA 006344' TSTE47 004033' ent TX26 002177' %ADDR 000102 spd
TS70EX 006371' TSTE5 000307' ent TX27 002256' %ML 010101 010000 spd
TS70Z 006342' TSTE50 004233' ent TX3 000166' %MR 001000 000040 spd
TS71 006556' TSTE51 004432' ent TX30 002333' .CONI 000420' ext
TS71A 006566' TSTE52 004630' ent TX31 002407' .CONO 000243' ext
TS71AA 006577' TSTE53 004635' ent TX32 002467' .DATAI 001033' ext
TS71DE 006626' TSTE54 004704' ent TX33 002542' .DATAO 001032' ext
TS71Z 006575' TSTE55 004751' ent TX34 002626' .LA 000000 spd
TS72 007017' TSTE56 005025' ent TX35 002710' .LADDR 000100 000000 spd
TS72A 007027' TSTE57 005076' ent TX36 003173' .LAND 000000 spd
TS72AA 007116' TSTE6 000376' ent TX37 003236' .LB 000000 spd
TS72EX 007062' TSTE60 005143' ent TX4 000262' .LBAD 000000 spd
TS72Z 007114' TSTE61 005320' ent TX40 003311' .LCCCC 000000 spd
TSTA1 000000 ext TSTE62 005401' ent TX41 003424' .LCCER 000000 spd
TSTA2 000000 ext TSTE63 005503' ent TX42 003560' .LCCFZ 000000 spd
TSTA3 000000 ext TSTE64 005603' ent TX43 003631' .LCCGC 000000 spd
TSTA4 000000 ext TSTE65 006030' ent TX44 003705' .LCCIA 000000 spd
TSTA5 000000 ext TSTE66 006254' ent TX45 003750' .LCENA 000000 spd
.MAIN MACRO %53A(1152) 09:28 16-Oct-84 Page S-4
DFPTA2 MAC 21-Apr-84 18:29 SYMBOL TABLE SEQ 0646
.LCJP 000000 spd .MSD0 000007 spd
.LCJS 000000 spd .MSELE 000007 spd
.LCONT 000000 spd .MSKCN 000037 spd
.LCRTN 000000 spd .MXNOR 000007 spd
.LCRY 000000 spd .MXOR 000007 spd
.LD 000000 spd .PION 005524' ext
.LJ 010000 spd .RA 000010 000000 spd
.LJMAP 000000 spd .RAND 040000 000000 spd
.LJZ 000000 spd .RB 400000 spd
.LLDCT 000000 spd .RBAD 000001 spd
.LLDLM 000000 spd .RCCCC 030000 spd
.LMGC 000001 spd .RCCER 100000 spd
.LOENA 002000 spd .RCCFZ 020000 spd
.LOR 000000 spd .RCCGC 010000 spd
.LPLUS 000000 spd .RCCIA 110000 spd
.LRDLM 000000 spd .RCENA 000400 000000 spd
.LRPCT 000000 spd .RCJP 000060 spd
.LS0A 000000 spd .RCJS 000020 spd
.LS0B 000000 spd .RCONT 000340 spd
.LSAB 000000 spd .RCRTN 000240 spd
.LSD0 000000 spd .RCRY 000400 spd
.LSELE 000000 spd .RD 001000 000000 spd
.LSKCN 000000 spd .RJ 000000 spd
.LXNOR 000000 spd .RJMAP 000040 spd
.LXOR 000000 spd .RJZ 000000 spd
.MA 000017 spd .RLDCT 000300 spd
.MAND 000007 spd .RLDLM 230000 spd
.MB 000017 spd .RMGC 000000 spd
.MBAD 000001 spd .ROENA 000000 spd
.MCCCC 000037 spd .ROR 030000 000000 spd
.MCCER 000037 spd .RPLUS 000000 spd
.MCCFZ 000037 spd .RRDLM 220000 spd
.MCCGC 000037 spd .RRPCT 000220 spd
.MCCIA 000037 spd .RS0A 400000 000000 spd
.MCENA 000001 spd .RS0B 300000 000000 spd
.MCJP 000017 spd .RSAB 100000 000000 spd
.MCJS 000017 spd .RSD0 700000 000000 spd
.MCONT 000017 spd .RSELE 005000 spd
.MCRTN 000017 spd .RSKCN 240000 spd
.MCRY 000001 spd .RXNOR 070000 000000 spd
.MD 000007 spd .RXOR 060000 000000 spd
.MJ 007777 spd
.MJMAP 000017 spd
.MJZ 000017 spd
.MLDCT 000017 spd
.MLDLM 000037 spd
.MMGC 001777 spd
.MOENA 000001 spd
.MOR 000007 spd
.MPLUS 000007 spd
.MRDLM 000037 spd
.MRPCT 000017 spd
.MS0A 000007 spd
.MS0B 000007 spd
.MSAB 000007 spd
AEBUF 27# 2701
BBPNT 27# 2773 2949 SEQ 0647
BEXEC 27# 2695 2923
BUFF 25# 4814 4815 4816 4830 4854 4875 5992 5995 6252 6255 6509 6512
BUFGEN 38# 5913 6171 6435
CALL 175 177 178 277 278 383 385 386 481 482 564 658 659 667
668 822 823 883 944 1053 1054 1168 1172 1237 1316 1446 1497 1555
1644 1730 1731 1917 1918 2000 2103 2191 2275 2358 2443 2527 2624 2627
2773 2949 3018 3110 3234 3365 3441 3520 3591 3669 3674 3788 3793 3798
4009 4014 4019 4228 4233 4238 4426 4520 4597 4679 4755 4870 5031 5032
5152 5153 5154 5273 5274 5279 5435 5706 6025 6284 6548 6797 6928 7205
7351 7602
CEBUF 27# 2699
CRAMPE 3577
CSRCHN 2595 2610
CSRENG 26#
CSRPNT 26# 7529
CSRRQS 2175 2178 2261 2344 2429 2513
DCOMP 3967 3981 3995
E1 66 123 226 327 431 526 594 763 852 908 1116 1468 1587 1954
2053 3045 3168 4379 4710 4794 4972 5075 5198 5331 5603 5895 6154 6419
6677 6878 7097 7271
E10 908 1116 1587 1954 2053 2140
E11 526 594 763 908 1116 1468 6677 6878 7097 7271
E12 526 594 763 908 1116 1468 3712 3934 4154 4379 4710
E13 526 594 763 908 1116 1468
E14 526 594 763 908 1116 1468 3319 3396 3472 4379 4549 4710 4794 4972
5075 5198 5331 5603 5895 6154 6419
E15 526 594 763 908 1116 1468 3396 3472 4972 5075
E16 526 594 763 908 1116 1468 1685 1872 2989 3548
E17 526 594 763 908 1116 1468 4379 4549 4630 4710
E18 982 1685 1872 4464
E19 1685 1872
E2 3045 3168
E20 852 1197 1269 1522 1587 1685 1872 2667
E21 526 594 763
E22 66 123 226 327 431 526 594 763 982 4464
E23 2667 2897
E24 2667 2897
E3 2053 2140 2228 2312 2397 2476 2565
E4 2989 3045 3168 4794 4972 5075 5198 5331 5603 5895 6154 6419
E5 66 123 226 327 431 526
E6 526 594 763 1197 1269 1418 1468 1522 2397 2476 3319 3396 3472 3548
3622 3712 3934 4154 4379 4630 4710 4972 5075 6677 6878 7097 7271
E7 1954 2053 2228 2312 2397 2476 2667 3045 3168 4794 5331 5603 5895 6154
6419
E8 2565
E9 66 123 226 327 431 526 594 763 852 982 1587 2053 2140 2228
2312 2397 2476 2565 3319 3396 3472 3548 3622 3712 3934 4154 4464 6677
6878 7097 7271
EBUS 64 121 224 325 429 524 592 761 850 906 980 1114 1195 1267
1416 1466 1520 1585 1683 1870 1952 2051 2138 2226 2310 2395 2474 2563
2665 2895 2987 3043 3166 3317 3394 3470 3546 3620 3710 3932 4152 4377
4462 4547 4628 4708 4792 4970 5073 5196 5329 5601 5893 6152 6417 6675
6876 7095 7269 SEQ 0648
EBUSPE 1712 1899 2999 3005
ECOMP 4186 4200 4214
ERESET 31# 75 133 241 351 444 548 615 865 922 1134 1214 1219 1290
1532 1704 1891 2510 2998 3348 4479 6695 6781 6895 7110 7189 7286 7319
ERFLG 74 77 79 140 157 161 248 260 264 347 365 369 451 464
468 547 552 606 624 628 641 645 777 787 790 794 798 808
811 864 871 921 928 931 1001 1010 1018 1033 1040 1131 1140 1143
1147 1155 1213 1225 1280 1298 1302 1428 1431 1434 1479 1482 1485 1531
1543 1602 1615 1629 1634 1697 1710 1713 1717 1883 1897 1900 1904 1967
1976 1988 2071 2081 2090 2157 2167 2179 2244 2254 2260 2262 2327 2337
2343 2345 2411 2421 2428 2430 2495 2505 2512 2514 2578 2588 2594 2596
2601 2609 2611 2688 2704 2711 2917 2926 2934 2997 3003 3006 3061 3081
3088 3183 3205 3212 3334 3343 3350 3352 3411 3420 3426 3428 3490 3499
3505 3507 3561 3570 3576 3578 3639 3648 3654 3656 3729 3738 3744 3747
3751 3759 3761 3766 3773 3775 3950 3959 3965 3968 3972 3980 3982 3987
3994 3996 4169 4178 4184 4187 4191 4199 4201 4206 4213 4215 4396 4405
4411 4414 4478 4505 4567 4576 4582 4584 4647 4656 4664 4666 4723 4732
4740 4742 4813 4856 4993 5009 5017 5102 5120 5129 5132 5138 5219 5234
5243 5246 5252 5258 5261 5351 5361 5368 5622 5632 5639 5915 5925 5932
6173 6183 6190 6437 6447 6454 6694 6701 6705 6716 6720 6731 6735 6750
6754 6765 6769 6785 6789 6894 6904 6916 6920 7109 7116 7120 7131 7135
7147 7151 7163 7167 7179 7183 7193 7197 7285 7295 7307 7311 7327 7339
7343 7588 7589 7590
GENEPE 1892 2999
IADDR 27# 5411 5682 5983 6243 6500
ICALL 5376 5377 5647 5648 5943 5944 6201 6202 6465 6466
ICALLC 5380 5381 5651 5652 5949 5950 5951 6207 6208 6209 6471 6472 6473
ICSR 27#
IDLE 3746 3760 3774
IEXEC 27# 5358 5629 5922 6180 6444
IEXIT 5384 5655 5947 5954 6205 6212 6469 6476
IFLAG 27#
IIOPF 27# 5409 5680 5976 5993 5997 6234 6239 6253 6256 6490 6496 6510 6514
IIPNT 27# 5435 5706 6025 6284 6548
IJRST 5385 5386 5656 5657 5955 5956 6213 6214 6477 6478
ILAST 5386 5387 5657 5658 5956 5957 6214 6215 6478 6479
INITPI 33# 4818 4995 5103 5220
INTNUM 33# 4848 4878 5016 5126 5128 5240 5242 7630 7636 7638 7641
INTPN0 7636# 7655
INTPNT 5032 5154 5274 7627#
INTPNX 7637 7659#
INTTYP 33# 5130 5244 7646
IPACLR 31# 780 801 1429 1480 1537 1605 2426 2689 2918 3065 3187 3771 3992
4211 4817 4850 4994 5357 5628 5921 6179 6443 7586
IPASRT 32# 7587
ISETDE 5379 5380 5650 5651 5941 5942 6202 6203 6209 6210 6463 6464
ISETEI 6466 6467 6473 6474
ISETEX 5378 5379 5649 5650 5944 5945 5951 5952 6199 6200 6462 6463
ISETID 5377 5378 5648 5649 5940 5941 6198 6199
ISETIN 5381 5382 5652 5653
ISTART 5382 5383 5653 5654 5945 5946 5952 5953 6203 6204 6210 6211 6467 6468
6474 6475
IWAIT 5383 5384 5654 5655 5946 5947 5953 5954 6204 6205 6211 6212 6468 6469 SEQ 0649
6475 6476
LAST 93 178 278 386 482 564 659 668 823 883 944 1054 1168 1172
1237 1316 1446 1497 1555 1644 1731 1918 2000 2103 2191 2275 2358 2443
2527 2624 2627 2773 2949 3018 3110 3234 3365 3441 3520 3591 3669 3674
3788 3793 3798 4009 4014 4019 4228 4233 4238 4426 4520 4597 4679 4755
4870 5032 5154 5274 5279 5435 5706 6025 6284 6548 6797 6928 7205 7351
7602
LDCSR 31# 459 617 634 785 806 867 924 1136 1216 1221 1292 1534 1539
1608 1706 1893 1984 2087 2607 3000 3069 3075 3193 3757 3978 4197 4492
4501 4662 4738 4829 6006 6012 6265 6271 6523 6529 6712 6727 6745 6761
6780 6911 7127 7142 7158 7174 7302 7334
LDEBUF 31# 926 1138 1218 1294 1536 1610 1626 1708 1895
LDRAR 31# 3067 3191 4827 6004 6263 6521 6743 6778
M1 4379 4710
M11 1954 2667 2897
M12 2667 2897 3396 3548
M3 3472 3622
MA1 80 90#
MA10 791 812 822#
MA10PN 822 825#
MA11 872 882#
MA12 932 942#
MA13 1037 1053#
MA13PN 1053 1056#
MA14 1144 1166#
MA15 1226 1236#
MA16 1299 1315#
MA17 1435 1445#
MA2 158 174#
MA20 1486 1496#
MA21 1544 1554#
MA23 1714 1730#
MA23PN 1730 1733#
MA24 1901 1917#
MA24PN 1917 1920#
MA2PNA 175 180#
MA2PNB 177 185#
MA3 261 277#
MA34 2598 2623#
MA35 2708 2771#
MA36 2931 2948#
MA37 3007 3017#
MA3PNT 277 280#
MA4 366 382#
MA40 3085 3109#
MA40PN 3110 3112#
MA41 3209 3233#
MA41PN 3234 3236#
MA46 3668#
MA4PNA 383 388#
MA4PNB 385 393#
MA5 465 481#
MA54 4509 4519# SEQ 0650
MA54PN 4520 4522#
MA5PNT 481 484#
MA6 553 563#
MA60 4860 4870#
MA60PN 4870 4872#
MA64 5365 5434#
MA65 5636 5705#
MA7 625 658#
MA70 5929 6024#
MA71 6187 6283#
MA72 6451 6547#
MA7PNT 658 661#
MB14 1156 1170#
MB22 1631 1643#
MB25 1989 1999#
MB26 2092 2102#
MB27 2180 2190#
MB30 2264 2274#
MB31 2347 2357#
MB32 2432 2442#
MB33 2516 2526#
MB34 2613 2626#
MB42 3354 3364#
MB43 3430 3440#
MB44 3509 3519#
MB45 3580 3590#
MB46 3658 3673#
MB47 3748 3787#
MB50 3969 4008#
MB51 4188 4227#
MB53 4415 4425#
MB55 4586 4596#
MB56 4668 4678#
MB57 4744 4754#
MB61 5020 5030#
MB62 5135 5152#
MB62PN 5152 5156#
MB63 5249 5272#
MB7 642 667#
MB73 6702 6717 6732 6751 6766 6786 6797#
MB73PN 6797 6799#
MB73PP 6800 6804#
MB74 6917 6928#
MB74PN 6928 6930#
MB74PP 6931 6935#
MB75 7117 7132 7148 7164 7180 7194 7205#
MB75PN 7205 7207#
MB75PP 7208 7212#
MB76 7308 7340 7351#
MB76PN 7351 7353#
MB76PP 7354 7358#
MB7PNT 667 670#
MBCN 134 135 141 144 147 151 154 163 164 169 180 186 242 243 SEQ 0651
249 253 256 266 267 272 281 284 290 341 342 348 352 356
359 363 371 372 377 388 394 445 446 452 457 460 470 471
476 485 489 494 3071 3198 4835 6008 6267 6525 7517
MBERR 3655
MBUS 850 906 1114 1267 2665 3620
MC47 3763 3777 3792#
MC50 3984 3998 4013#
MC51 4203 4217 4232#
MC63 5262 5278#
MD47 3797#
MD50 4018#
MD51 4237#
MLAST 66 123 226 327 431 526 594 763 852 908 982 1116 1197 1269
1418 1468 1522 1587 1685 1872 1954 2053 2140 2228 2312 2397 2476 2565
2667 2897 2989 3045 3168 3319 3396 3472 3548 3622 3712 3934 4154 4379
4464 4549 4630 4710 4794 4972 5075 5198 5331 5603 5895 6154 6419 6677
6878 7097 7271
MPNT1 178 278 386 482 7516#
MPNT2 1054 1446 1918 2103 2191 2275 2358 2443 2527 2624 2627 3018 3365 3441
3520 3591 3674 3788 3793 3798 4009 4014 4019 4228 4233 4238 4426 4597
4679 4755 5031 5153 5273 5279 6801 6932 7209 7355 7526# 7579
MPNT4 883 1172 1237 1316 1555 1644 7537#
MPNT5 564 659 668 823 944 1168 1497 2000 7556#
MPNT6 1731 3669 7576# 7602
MPRUN 1004 1970 2074 2160 2247 2330 2414 2498 2581 3068 3192 3337 3414 3493
3564 3642 3732 3953 4172 4399 4413 4570 4583 4650 4661 4665 4726 4737
4741 4828 5003 5113 5228 6005 6264 6522 6898 7289 7320
MSG 90 91 92 93 174 176 382 384 563 882 942 943 1166 1167
1170 1171 1236 1315 1445 1496 1554 1643 1999 2102 2190 2274 2357 2442
2526 2623 2626 2771 2772 2948 3017 3109 3233 3364 3440 3519 3590 3668
3673 3787 3792 3797 4008 4013 4018 4227 4232 4237 4425 4519 4596 4678
4754 5030 5272 5278 5434 5705 6024 6283 6547 7601
MSTARE 7591 7601#
MSTART 1007 1612 1973 2078 2164 2251 2334 2418 2502 2585 3340 3417 3496 3567
3645 3735 3956 4175 4402 4573 4653 4729 5006 5117 5231 6901 7292 7324
7586#
NDMP 980 1585 1952 2051 2138 2226 2310 2395 2474 2563 2665 2895 3043 3166
3317 3394 3470 3546 3620 3710 3932 4152 4377 4547 4628 4708 4792 4970
5073 5196 5329 5601 5893 6152 6417 6675 6876 7269
ODELAY 26# 4842 5015
P 5413 5684 5969 5987 6227 6247 6504 7593 7595 7596
PAT 5912 6170 6434
PCLEAR 1433 4661
PF500 34# 7613
PF501 34# 7616
PF502 34# 7619
PFAIL 34# 1028 1032 4480 4486 4495 4504
PFAPR 34# 7610
PFPNT 1065 4523 7609#
PISYOF 34# 4821
PISYON 34# 4820 4846
RDCSR 31# 76 145 152 254 353 360 618 635 786 807 927 1139 1430
1481 1709 1896 2088 2173 2259 2342 2427 2511 2593 2608 3002 3349 3425 SEQ 0652
3504 3575 3653 3743 3758 3772 3964 3979 3993 4183 4198 4212 4410 4484
4493 4502 4581 4663 4739 5018 5133 5247 5257 6698 6713 6728 6746 6762
6782 7113 7128 7143 7159 7175 7190 7576
RDEBUF 31# 868 1152 1222 1295 1540 1627 1985 3001 3076 6912 7303 7335
RQINT 3351 3427 3506 5260
SAVCS1 616 662 671 784 805 826 7672#
SAVCS2 545 551 622 639 782 789 803 810 919 930 1126 1142 1477 1484
1982 1987 7561 7673#
SAVCS3 550 620 637 788 809 929 1141 1483 1986 7567 7674#
SAVCS4 7675#
SAVCSR 1432 1711 1898 2091 2177 2263 2346 2431 2515 2597 2606 2612 3004 3353
3429 3508 3579 3657 3745 3756 3762 3776 3966 3977 3983 3997 4185 4196
4202 4216 4412 4585 4667 4743 5259 7526 7578 7671#
SAVDA1 148 156 192 252 259 293 355 364 397 456 463 497 869 1024
1057 3203 3241 7668#
SAVDA2 150 189 258 296 362 400 462 500 1031 1061 3201 3247 7669#
SAVDA3 155 195 7670#
SAVDAT 1703 1707 1734 1890 1894 1921 5097 5098 5109 5114 5131 5142 5157 7667#
SAVEB1 1127 1154 1211 1224 1289 1293 1297 1529 1619 3079 3117 7542 7676#
SAVEB2 1153 1223 1296 1541 1630 3077 3123 7548 7677#
SAVEBU 6914# 6914 6930 7305 7337 7353
SAVMBC 134# 134 141 144 147 151 154 169 242 249 253 256 272 341
348 352 356 359 363 377 445 457 460 476
SCOSW 38# 3112 3236 7537 7556
SDATA 32# 1005 1607 1971 2075 2161 2248 2331 2415 2499 2582 3338 3415 3494
3565 3643 3733 3954 4173 4400 4571 4651 4727 5004 5115 5229 5985 6245
6502 6899 7290 7321
SETVEC 33# 4819 4996 5104 5221
SINCYC 4737
SNEXT 32# 1006 1611 1972 2077 2163 2250 2333 2417 2501 2584 3339 3416 3495
3566 3644 3734 3955 4174 4401 4572 4652 4728 5005 5116 5230 6900 7291
7323
SSLAST 2767 2768 2944 2945
SSSTRT 2719 2720 2721 2722 2723 2724 2725 2726 2727 2728 2729 2730 2731 2732
2733 2734 2735 2736 2737 2738 2739 2740 2741 2742 2743 2744 2745 2746
2747 2748 2749 2750 2751 2752 2753 2754 2755 2756 2757 2758 2759 2760
2761 2762 2763 2764 2765 2766 2767 2942 2943 2944
T13M 981 995 1070#
T16PAT 1283 1320#
T22M 1586 1596 1648#
T23PAT 1021 1700 1741# 1886
T25M 1953 1961 2004#
T26M 2052 2065 2107#
T27M 2139 2151 2195#
T30M 2227 2238 2279#
T31M 2311 2321 2362#
T32M 2396 2405 2447#
T33M 2475 2489 2531#
T34M 2564 2572 2631#
T35M 2666 2682 2777#
T36M 2896 2911 2953#
T40DAT 3059 3063 3093 3102#
T40M 3044 3053 3129# SEQ 0653
T41DAT 3181 3185 3189 3217 3226#
T41M 3167 3175 3253#
T42M 3318 3328 3369#
T43M 3395 3405 3445#
T44M 3471 3484 3525#
T45M 3547 3555 3595#
T46M 3621 3633 3679#
T47M 3711 3723 3803#
T50M 3933 3944 4024#
T51M 4153 4163 4243#
T53M 4378 4390 4430#
T55M 4548 4561 4601#
T56M 4629 4641 4683#
T57M 4709 4717 4759#
T60M 4793 4807 4884#
T61M 4971 4987 5036#
T62M 5074 5091 5163#
T63M 5197 5213 5283#
T64ADD 5380 5396#
T64ADI 5376 5393#
T64ADR 5393# 5393 5396
T64ADT 5410 5418#
T64M 5330 5345 5446#
T65ADD 5651 5667#
T65ADI 5647 5664#
T65ADR 5664# 5664 5667
T65ADT 5681 5689#
T65M 5602 5616 5717#
T70ADD 5950 5972#
T70ADI 5949 5967#
T70ADR 5967# 5967 5972
T70ADT 5982 6017#
T70M 5894 5904 6031#
T71ADD 6208 6230#
T71ADI 6207 6225#
T71ADR 6225# 6225 6230 6241
T71ADT 6242 6276#
T71M 6153 6162 6290#
T72ADD 6472 6486#
T72ADI 6471 6483#
T72ADR 6483# 6483 6486 6498
T72ADT 6499 6534#
T72M 6418 6426 6554#
T73M 6676 6687 6825#
T74M 6877 6887 6954#
T76M 7270 7278 7380#
T76SAV 7316# 7316 7317
TA1 74# 81
TA10 777# 792
TA11 864# 873
TA12 921# 933
TA13 1001# 1008
TA14 1131# 1145 1157 SEQ 0654
TA15 1213# 1227
TA16 1280# 1300 1307
TA17 1428# 1436
TA2 139# 165
TA20 1479# 1487
TA21 1531# 1545
TA22 1602# 1613 1632
TA23 1697# 1715 1722
TA24 1883# 1902 1909
TA25 1967# 1974 1990
TA26 2071# 2079 2093
TA27 2157# 2165 2181
TA2L 140# 159
TA2X 142 163#
TA3 247# 268
TA30 2244# 2252 2265
TA31 2327# 2335 2348
TA32 2411# 2419 2433
TA33 2495# 2503 2517
TA34 2578# 2586 2599 2614
TA35 2695# 2697 2711
TA36 2923# 2925 2934
TA37 2997# 3008
TA3L 248# 262
TA3X 250 266#
TA4 346# 373
TA40 3061# 3086 3094
TA41 3183# 3210 3218
TA42 3334# 3341 3355
TA43 3411# 3418 3431
TA44 3490# 3497 3510
TA45 3561# 3568 3581
TA46 3639# 3646 3659
TA47 3729# 3736 3749 3764 3778
TA4L 347# 367
TA4X 349 371#
TA5 450# 472
TA50 3950# 3957 3970 3985 3999
TA51 4169# 4176 4189 4204 4218
TA53 4396# 4403 4416
TA54 4478# 4510
TA55 4567# 4574 4587
TA56 4647# 4654 4669
TA57 4723# 4730 4745
TA5L 451# 466
TA5X 453 470#
TA6 547# 554
TA61 4993# 5007 5021
TA62 5102# 5118 5136 5144
TA63 5219# 5232 5250 5263
TA64 5357# 5368
TA65 5628# 5639
TA7 606# 626 643 650 SEQ 0655
TA70 5921# 5932
TA71 6179# 6190
TA72 6443# 6454
TA73 6694# 6703 6718 6733 6752 6767 6787
TA74 6894# 6902 6918
TA75 7109# 7118 7133 7149 7165 7181 7195
TA76 7285# 7293 7309
TA7PAT 612 621 638 676#
TB10 798# 813
TB13 1018# 1038 1045
TB22 1621# 1635
TB27 2173# 2176
TB42 3347#
TB43 3424#
TB44 3503#
TB45 3574#
TB46 3652#
TB47 3742#
TB50 3963#
TB51 4182#
TB53 4409#
TB54 4487 4496 4505#
TB55 4580#
TB56 4660#
TB57 4736#
TB61 5013#
TB62 5124#
TB62A 5126# 5127
TB63 5240# 5241
TB64 5358# 5360
TB65 5629# 5631
TB70 5922# 5924
TB71 6180# 6182
TB72 6444# 6446
TB76 7317# 7325 7341
TC47 3755#
TC50 3976#
TC51 4195#
TC63 5256#
TD47 3770#
TD50 3991#
TD51 4210#
TG1 63 71#
TG10 760 772#
TG11 849 861#
TG12 905 916#
TG13 979 987#
TG14 1113 1123#
TG15 1194 1203#
TG16 1266 1274#
TG17 1415 1425#
TG2 120 131#
TG20 1465 1474# SEQ 0656
TG21 1519 1527#
TG22 1584 1594#
TG23 1682 1691#
TG24 1869 1877#
TG25 1951 1959#
TG26 2050 2063#
TG27 2137 2149#
TG3 223 233#
TG30 2225 2236#
TG31 2309 2319#
TG32 2394 2403#
TG33 2473 2481#
TG34 2562 2570#
TG35 2664 2680#
TG36 2894 2909#
TG37 2986 2994#
TG4 324 333#
TG40 3042 3051#
TG41 3165 3173#
TG42 3316 3326#
TG43 3393 3403#
TG44 3469 3482#
TG45 3545 3553#
TG46 3619 3631#
TG47 3709 3721#
TG5 428 436#
TG50 3931 3942#
TG51 4151 4161#
TG53 4376 4388#
TG54 4461 4469#
TG55 4546 4559#
TG56 4627 4639#
TG57 4707 4715#
TG6 523 536#
TG60 4791 4799#
TG61 4969 4979#
TG62 5072 5083#
TG63 5195 5205#
TG64 5328 5337#
TG65 5600 5608#
TG7 591 600#
TG70 5892 5902#
TG71 6151 6160#
TG72 6416 6424#
TG73 6674 6685#
TG74 6875 6885#
TG75 7094 7103#
TG76 7268 7276#
TL35 2688# 2709
TL36 2917# 2932
TL60 4813# 4861
TL64 5351# 5366
TL65 5622# 5637 SEQ 0657
TL70 5915# 5930
TL71 6173# 6188
TL72 6437# 6452
TLOAD 26# 996 1597 1962 2066 2152 2239 2322 2406 2490 2573 2683 2912 3054
3176 3329 3406 3485 3556 3634 3724 3945 4164 4391 4562 4642 4718 4808
4988 5092 5214 5346 5617 5905 6163 6427 6688 6888 7279
TRACE 26# 72 132 240 340 443 543 601 773 862 917 994 1124 1210
1275 1426 1475 1528 1595 1692 1878 1960 2064 2150 2237 2320 2404 2488
2571 2681 2910 2995 3052 3174 3327 3404 3483 3554 3632 3722 3943 4162
4389 4476 4560 4640 4716 4806 4986 5090 5212 5344 5615 5903 6161 6425
6686 6886 7104 7277
TS35 2690 2719#
TS36 2919 2942#
TS64 5352 5376#
TS64A 5380# 5385
TS64Z 5377 5378 5379 5388#
TS65 5623 5647#
TS65A 5651# 5656
TS65Z 5648 5649 5650 5659#
TS70 5916 5940#
TS70A 5950# 5955
TS70AA 5944 5951 5962# 5981 5996 5998
TS70EX 5943 5992#
TS70Z 5940 5941 5959#
TS71 6174 6198#
TS71A 6208# 6213
TS71AA 6202 6209 6220# 6240 6257
TS71DE 6201 6252#
TS71Z 6198 6199 6217#
TS72 6438 6462#
TS72A 6472# 6477
TS72AA 6466 6473 6495 6497 6513 6515 6542#
TS72EX 6465 6509#
TS72Z 6462 6463 6539#
TSTA1 20# 2669 2898
TSTA2 20# 2670 2899
TSTA3 20# 2671 2900
TSTA4 20# 2672 2901
TSTA5 20# 2673 2902
TSTA6 20# 2674 2903
TSTA7 20# 2675 2904
TSTE1 9 63#
TSTE10 9 528 595 760#
TSTE11 10 529 764 849#
TSTE12 10 530 765 853 905#
TSTE13 10 979#
TSTE14 10 531 766 854 909 1113#
TSTE15 10 767 855 910 1117 1194#
TSTE16 10 856 911 1118 1198 1266#
TSTE17 10 1415#
TSTE2 9 120#
TSTE20 10 1419 1465#
TSTE21 11 1420 1469 1519# SEQ 0658
TSTE22 11 1584#
TSTE23 11 1682#
TSTE24 11 1686 1869#
TSTE25 11 1951#
TSTE26 11 2050#
TSTE27 11 2054 2137#
TSTE3 9 124 223#
TSTE30 11 2055 2141 2225#
TSTE31 12 2056 2142 2229 2309#
TSTE32 12 2057 2143 2230 2313 2394#
TSTE33 12 2058 2144 2231 2314 2398 2473#
TSTE34 12 2562#
TSTE35 12 2664#
TSTE36 12 2668 2894#
TSTE37 12 2986#
TSTE4 9 125 227 324#
TSTE40 12 3042#
TSTE41 13 3046 3165#
TSTE42 13 3316#
TSTE43 13 3320 3393#
TSTE44 13 3321 3397 3469#
TSTE45 13 3398 3545# 4383
TSTE46 13 3473 3619#
TSTE47 13 3709#
TSTE5 9 126 228 328 428#
TSTE50 13 3713 3931#
TSTE51 14 3714 3935 4151#
TSTE52 14 4351#
TSTE53 14 4376#
TSTE54 14 4461#
TSTE55 14 1588 4546#
TSTE56 14 1589 4550 4627#
TSTE57 14 4707#
TSTE6 9 523#
TSTE60 14 4791#
TSTE61 15 4969#
TSTE62 15 4973 5072#
TSTE63 15 4974 5076 5195#
TSTE64 15 5077 5199 5328#
TSTE65 15 5078 5200 5332 5600#
TSTE66 15 5840#
TSTE67 15 5853#
TSTE7 9 527 591#
TSTE70 15 5892#
TSTE71 16 5896 6151#
TSTE72 16 5897 6155 6416#
TSTE73 16 6674#
TSTE74 16 3715 3936 4155 6678 6875#
TSTE75 16 6679 6879 7094#
TSTE76 16 3716 3937 4156 6680 6880 7098 7268#
TSTEBF 866 1135 1215 1220 1291 1533 1538 1606 1705 1892 1983 2999 3074 6910
7301 7333
TSTFLG 25# 234 237 334 337 437 440 537 540 988 991 1204 1207 2482 SEQ 0659
2485 4470 4473 4800 4803 4980 4983 5084 5087 5206 5209 5338 5341 5609
5612
TSTPC 25#
TSTSUB 25# 139 247 346 450 611 632 779 800 1003 1020 1133 1151 1282
1604 1621 1699 1885 1969 1980 2073 2085 2159 2171 2246 2258 2329 2341
2413 2425 2497 2509 2580 2592 2605 2691 2930 3064 3186 3336 3347 3413
3424 3492 3503 3563 3574 3641 3652 3731 3742 3755 3770 3952 3963 3976
3991 4171 4182 4195 4210 4398 4409 4569 4580 4649 4660 4725 4736 5002
5013 5112 5125 5227 5239 5256 5353 5624 5917 6175 6439 6697 6710 6725
6741 6759 6776 6799 6897 6909 7112 7125 7140 7156 7172 7188 7207 7288
7300 7315 7318 7332
TSTU10 21# 3474 3623 4551 4631
TSTU11 21# 3475 3624 4552 4632
TSTU12 21# 3476 3625 4553 4633
TSTU13 21# 3477 3626 4554 4634
TSTU41 21# 4382
TSTU6 21# 4380
TSTU7 21# 4381
TUSER 235 335 438 538 989 1205 2483 4471 4801 4981 5085 5207 5339 5610
TX1 82 86#
TX10 793 794 814 818#
TX11 874 878#
TX12 934 938#
TX13 1009 1010 1023 1039 1040 1049#
TX14 1146 1147 1158 1162#
TX15 1228 1232#
TX16 1285 1301 1302 1311#
TX17 1437 1441#
TX2 160 161 169#
TX20 1488 1492#
TX21 1546 1550#
TX22 1614 1615 1633 1634 1639#
TX23 1702 1716 1717 1726#
TX24 1888 1903 1904 1913#
TX25 1975 1976 1991 1995#
TX26 2080 2081 2094 2098#
TX27 2166 2167 2182 2186#
TX3 263 264 272#
TX30 2253 2254 2266 2270#
TX31 2336 2337 2349 2353#
TX32 2420 2421 2434 2438#
TX33 2504 2505 2518 2522#
TX34 2587 2588 2600 2601 2615 2619#
TX35 2696 2710 2715#
TX36 2924 2933 2938#
TX37 3009 3013#
TX4 368 369 377#
TX40 3087 3088 3098#
TX41 3211 3212 3222#
TX42 3342 3343 3356 3360#
TX43 3419 3420 3432 3436#
TX44 3498 3499 3511 3515#
TX45 3569 3570 3582 3586# SEQ 0660
TX46 3647 3648 3660 3664#
TX47 3737 3738 3750 3751 3765 3766 3779 3783#
TX5 467 468 476#
TX50 3958 3959 3971 3972 3986 3987 4000 4004#
TX51 4177 4178 4190 4191 4205 4206 4219 4223#
TX53 4404 4405 4417 4421#
TX54 4511 4515#
TX55 4575 4576 4588 4592#
TX56 4655 4656 4670 4674#
TX57 4731 4732 4746 4750#
TX6 555 559#
TX60 4862 4866#
TX61 5008 5009 5022 5026#
TX62 5119 5120 5137 5138 5148#
TX63 5233 5234 5251 5252 5264 5268#
TX64 5359 5367 5372#
TX65 5630 5638 5643#
TX7 613 627 628 644 645 654#
TX70 5923 5931 5936#
TX71 6181 6189 6194#
TX72 6445 6453 6458#
TX73 6704 6705 6719 6720 6734 6735 6753 6754 6768 6769 6788 6789 6793#
TX74 6903 6904 6919 6920 6924#
TX75 7119 7120 7134 7135 7150 7151 7166 7167 7182 7183 7196 7197 7201#
TX76 7294 7295 7310 7311 7326 7327 7342 7343 7347#
TXALL 564 659 668 823 883 944 1054 1168 1172 1237 1316 1446 1497 1555
1644 1731 1918 2000 2103 2191 2275 2358 2443 2527 2624 2627 2773 2949
3018 3110 3234 3365 3441 3520 3591 3669 3674 3788 3793 3798 4009 4014
4019 4228 4233 4238 4426 4520 4597 4679 4755 4870 5031 5032 5153 5154
5273 5274 5279 5435 5706 6025 6284 6548 6797 6928 7205 7351 7601 7602
TXNOT 90 91 92 174 175 176 177 277 382 383 384 385 481 563
658 667 822 882 942 943 1053 1166 1167 1170 1171 1236 1315 1445
1496 1554 1643 1730 1917 1999 2102 2190 2274 2357 2442 2526 2623 2626
2771 2772 2948 3017 3109 3233 3364 3440 3519 3590 3668 3673 3787 3792
3797 4008 4013 4018 4227 4232 4237 4425 4519 4596 4678 4754 5030 5152
5272 5278 5434 5705 6024 6283 6547
TXTINH 3113 3115 3119 3121 3237 3239 3243 3245 7538 7540 7544 7546 7557 7559
7563 7565
TXYES 93 178 278 386 482
UDEBUG 25# 236 336 439 539 990 1206 2484 3072 3199 4472 4802 4831 4836
4982 5086 5208 5340 5611 5999 6009 6258 6268 6516 6526
USER 233 333 436 536 987 1203 2481 4469 4799 4979 5083 5205 5337 5608
5968 6226
Z2 44# 71 131 239 339 442 542 600 772 861 916 993 1123 1209
1274 1425 1474 1527 1594 1691 1877 1959 2063 2149 2236 2319 2403 2487
2570 2680 2909 2994 3051 3173 3326 3403 3482 3553 3631 3721 3942 4161
4388 4475 4559 4639 4715 4805 4985 5089 5211 5343 5614 5902 6160 6424
6685 6885 7103 7276
ZEBUS 64 121 224 325 429 524 592 761 850 906 980 1114 1195 1267
1416 1466 1520 1585 1683 1870 1952 2051 2138 2226 2310 2395 2474 2563
2665 2895 2987 3043 3166 3317 3394 3470 3546 3620 3710 3932 4152 4352
4377 4462 4547 4628 4708 4792 4970 5073 5196 5329 5601 5841 5854 5893
6152 6417 6675 6876 7095 7269 SEQ 0661
$ARG2 1070# 1070 1072# 1072 1074# 1074 1076# 1076 1078# 1078 1080# 1080 1082# 1082
1084# 1084 1086# 1086 1648# 1648 2004# 2004 2006# 2006 2008# 2008 2010# 2010
2012# 2012 2017# 2017 2019# 2019 2021# 2021 2023# 2023 2025# 2025 2107# 2107
2109# 2109 2111# 2111 2195# 2195 2197# 2197 2199# 2199 2201# 2201 2279# 2279
2281# 2281 2283# 2283 2285# 2285 2362# 2362 2364# 2364 2366# 2366 2368# 2368
2370# 2370 2372# 2372 2447# 2447 2449# 2449 2451# 2451 2531# 2531 2533# 2533
2535# 2535 2631# 2631 2633# 2633 2635# 2635 2637# 2637 2777# 2777 2779# 2779
2781# 2781 2783# 2783 2785# 2785 2787# 2787 2789# 2789 2791# 2791 2793# 2793
2795# 2795 2797# 2797 2799# 2799 2801# 2801 2803# 2803 2805# 2805 2807# 2807
2809# 2809 2811# 2811 2813# 2813 2815# 2815 2817# 2817 2819# 2819 2821# 2821
2823# 2823 2825# 2825 2827# 2827 2829# 2829 2831# 2831 2833# 2833 2835# 2835
2837# 2837 2839# 2839 2841# 2841 2843# 2843 2845# 2845 2847# 2847 2849# 2849
2851# 2851 2853# 2853 2855# 2855 2857# 2857 2859# 2859 2861# 2861 2863# 2863
2865# 2865 2867# 2867 2869# 2869 2871# 2871 2953# 2953 2955# 2955 2957# 2957
2959# 2959 3129# 3129 3131# 3131 3133# 3133 3135# 3135 3137# 3137 3139# 3139
3253# 3253 3255# 3255 3257# 3257 3259# 3259 3262# 3262 3265# 3265 3267# 3267
3269# 3269 3271# 3271 3274# 3274 3276# 3276 3278# 3278 3280# 3280 3282# 3282
3287# 3287 3289# 3289 3291# 3291 3293# 3293 3295# 3295 3369# 3369 3371# 3371
3373# 3373 3445# 3445 3447# 3447 3449# 3449 3525# 3525 3595# 3595 3597# 3597
3599# 3599 3679# 3679 3803# 3803 3805# 3805 3807# 3807 3809# 3809 3814# 3814
3816# 3816 3818# 3818 3823# 3823 3825# 3825 3830# 3830 3832# 3832 3834# 3834
3836# 3836 3841# 3841 3843# 3843 3845# 3845 3850# 3850 3856# 3856 3858# 3858
3863# 3863 3865# 3865 3867# 3867 3869# 3869 3874# 3874 3876# 3876 3878# 3878
3883# 3883 3885# 3885 3890# 3890 3897# 3897 3899# 3899 3901# 3901 4024# 4024
4026# 4026 4028# 4028 4030# 4030 4035# 4035 4037# 4037 4039# 4039 4044# 4044
4046# 4046 4051# 4051 4053# 4053 4055# 4055 4057# 4057 4062# 4062 4064# 4064
4066# 4066 4071# 4071 4077# 4077 4079# 4079 4084# 4084 4086# 4086 4088# 4088
4090# 4090 4095# 4095 4097# 4097 4099# 4099 4104# 4104 4106# 4106 4111# 4111
4118# 4118 4120# 4120 4122# 4122 4243# 4243 4245# 4245 4247# 4247 4249# 4249
4254# 4254 4256# 4256 4258# 4258 4263# 4263 4265# 4265 4270# 4270 4272# 4272
4274# 4274 4276# 4276 4281# 4281 4283# 4283 4285# 4285 4290# 4290 4296# 4296
4298# 4298 4303# 4303 4305# 4305 4307# 4307 4309# 4309 4314# 4314 4316# 4316
4318# 4318 4323# 4323 4325# 4325 4330# 4330 4337# 4337 4339# 4339 4341# 4341
4430# 4430 4601# 4601 4603# 4603 4605# 4605 4683# 4683 4759# 4759 4884# 4884
4889# 4889 4891# 4891 4893# 4893 4895# 4895 4897# 4897 4899# 4899 4901# 4901
4903# 4903 4905# 4905 4907# 4907 4909# 4909 4914# 4914 4916# 4916 4918# 4918
4920# 4920 4925# 4925 4927# 4927 4929# 4929 4931# 4931 4933# 4933 4935# 4935
4937# 4937 4939# 4939 4941# 4941 4943# 4943 5036# 5036 5038# 5038 5040# 5040
5163# 5163 5165# 5165 5167# 5167 5283# 5283 5285# 5285 5287# 5287 5446# 5446
5448# 5448 5450# 5450 5452# 5452 5454# 5454 5456# 5456 5461# 5461 5463# 5463
5465# 5465 5467# 5467 5472# 5472 5474# 5474 5476# 5476 5478# 5478 5483# 5483
5485# 5485 5487# 5487 5489# 5489 5494# 5494 5496# 5496 5498# 5498 5500# 5500
5505# 5505 5507# 5507 5509# 5509 5511# 5511 5516# 5516 5518# 5518 5520# 5520
5522# 5522 5530# 5530 5532# 5532 5534# 5534 5536# 5536 5538# 5538 5540# 5540
5546# 5546 5548# 5548 5550# 5550 5552# 5552 5557# 5557 5559# 5559 5717# 5717
5719# 5719 5721# 5721 5723# 5723 5725# 5725 5727# 5727 5732# 5732 5734# 5734
5736# 5736 5738# 5738 5743# 5743 5745# 5745 5747# 5747 5749# 5749 5754# 5754
5756# 5756 5758# 5758 5760# 5760 5765# 5765 5767# 5767 5769# 5769 5771# 5771
5776# 5776 5778# 5778 5780# 5780 5782# 5782 5787# 5787 5789# 5789 5791# 5791
5793# 5793 5801# 5801 5803# 5803 5805# 5805 5807# 5807 5809# 5809 5811# 5811
5817# 5817 5819# 5819 5821# 5821 5823# 5823 5828# 5828 5830# 5830 6031# 6031
6033# 6033 6035# 6035 6040# 6040 6042# 6042 6044# 6044 6049# 6049 6051# 6051
6053# 6053 6058# 6058 6060# 6060 6065# 6065 6067# 6067 6069# 6069 6071# 6071 SEQ 0662
6073# 6073 6079# 6079 6081# 6081 6083# 6083 6090# 6090 6092# 6092 6094# 6094
6096# 6096 6098# 6098 6100# 6100 6102# 6102 6104# 6104 6106# 6106 6111# 6111
6113# 6113 6290# 6290 6292# 6292 6294# 6294 6299# 6299 6301# 6301 6303# 6303
6308# 6308 6310# 6310 6312# 6312 6317# 6317 6319# 6319 6324# 6324 6326# 6326
6328# 6328 6330# 6330 6332# 6332 6338# 6338 6340# 6340 6342# 6342 6350# 6350
6352# 6352 6354# 6354 6356# 6356 6358# 6358 6360# 6360 6362# 6362 6364# 6364
6366# 6366 6368# 6368 6370# 6370 6372# 6372 6377# 6377 6379# 6379 6554# 6554
6556# 6556 6558# 6558 6563# 6563 6565# 6565 6567# 6567 6572# 6572 6574# 6574
6576# 6576 6581# 6581 6583# 6583 6588# 6588 6590# 6590 6592# 6592 6594# 6594
6596# 6596 6602# 6602 6604# 6604 6606# 6606 6613# 6613 6615# 6615 6617# 6617
6619# 6619 6621# 6621 6623# 6623 6625# 6625 6627# 6627 6629# 6629 6634# 6634
6636# 6636 6825# 6825 6827# 6827 6829# 6829 6831# 6831 6833# 6833 6835# 6835
6837# 6837 6839# 6839 6954# 6954 6956# 6956 6958# 6958 6960# 6960 6962# 6962
6967# 6967 6969# 6969 6971# 6971 6973# 6973 6975# 6975 6977# 6977 6983# 6983
6985# 6985 6987# 6987 6989# 6989 6992# 6992 6994# 6994 6996# 6996 6998# 6998
7000# 7000 7002# 7002 7008# 7008 7010# 7010 7012# 7012 7014# 7014 7017# 7017
7019# 7019 7021# 7021 7023# 7023 7025# 7025 7027# 7027 7033# 7033 7035# 7035
7037# 7037 7039# 7039 7042# 7042 7044# 7044 7046# 7046 7048# 7048 7050# 7050
7052# 7052 7054# 7054 7059# 7059 7061# 7061 7380# 7380 7382# 7382 7384# 7384
7386# 7386 7388# 7388 7393# 7393 7395# 7395 7397# 7397 7399# 7399 7401# 7401
7403# 7403 7409# 7409 7411# 7411 7413# 7413 7415# 7415 7418# 7418 7420# 7420
7422# 7422 7424# 7424 7426# 7426 7428# 7428 7434# 7434 7436# 7436 7438# 7438
7440# 7440 7443# 7443 7445# 7445 7447# 7447 7449# 7449 7451# 7451 7453# 7453
7455# 7455 7460# 7460 7462# 7462 7464# 7464 7466# 7466 7468# 7468 7470# 7470
7472# 7472 7478# 7478 7480# 7480 7482# 7482 7484# 7484 7487# 7487 7489# 7489
7491# 7491 7493# 7493 7495# 7495 7497# 7497 7499# 7499 7504# 7504 7506# 7506
$B 1070# 1070 1072# 1072 1074# 1074 1076# 1076 1078# 1078 1080# 1080 1082# 1082
1084# 1084 1086# 1086 1648# 1648 2004# 2004 2006# 2006 2008# 2008 2010# 2010
2012# 2012 2017# 2017 2019# 2019 2021# 2021 2023# 2023 2025# 2025 2107# 2107
2109# 2109 2111# 2111 2195# 2195 2197# 2197 2199# 2199 2201# 2201 2279# 2279
2281# 2281 2283# 2283 2285# 2285 2362# 2362 2364# 2364 2366# 2366 2368# 2368
2370# 2370 2372# 2372 2447# 2447 2449# 2449 2451# 2451 2531# 2531 2533# 2533
2535# 2535 2631# 2631 2633# 2633 2635# 2635 2637# 2637 2777# 2777 2779# 2779
2781# 2781 2783# 2783 2785# 2785 2787# 2787 2789# 2789 2791# 2791 2793# 2793
2795# 2795 2797# 2797 2799# 2799 2801# 2801 2803# 2803 2805# 2805 2807# 2807
2809# 2809 2811# 2811 2813# 2813 2815# 2815 2817# 2817 2819# 2819 2821# 2821
2823# 2823 2825# 2825 2827# 2827 2829# 2829 2831# 2831 2833# 2833 2835# 2835
2837# 2837 2839# 2839 2841# 2841 2843# 2843 2845# 2845 2847# 2847 2849# 2849
2851# 2851 2853# 2853 2855# 2855 2857# 2857 2859# 2859 2861# 2861 2863# 2863
2865# 2865 2867# 2867 2869# 2869 2871# 2871 2953# 2953 2955# 2955 2957# 2957
2959# 2959 3129# 3129 3131# 3131 3133# 3133 3135# 3135 3137# 3137 3139# 3139
3253# 3253 3255# 3255 3257# 3257 3259# 3259 3262# 3262 3265# 3265 3267# 3267
3269# 3269 3271# 3271 3274# 3274 3276# 3276 3278# 3278 3280# 3280 3282# 3282
3287# 3287 3289# 3289 3291# 3291 3293# 3293 3295# 3295 3369# 3369 3371# 3371
3373# 3373 3445# 3445 3447# 3447 3449# 3449 3525# 3525 3595# 3595 3597# 3597
3599# 3599 3679# 3679 3803# 3803 3805# 3805 3807# 3807 3809# 3809 3814# 3814
3816# 3816 3818# 3818 3823# 3823 3825# 3825 3830# 3830 3832# 3832 3834# 3834
3836# 3836 3841# 3841 3843# 3843 3845# 3845 3850# 3850 3856# 3856 3858# 3858
3863# 3863 3865# 3865 3867# 3867 3869# 3869 3874# 3874 3876# 3876 3878# 3878
3883# 3883 3885# 3885 3890# 3890 3897# 3897 3899# 3899 3901# 3901 4024# 4024
4026# 4026 4028# 4028 4030# 4030 4035# 4035 4037# 4037 4039# 4039 4044# 4044
4046# 4046 4051# 4051 4053# 4053 4055# 4055 4057# 4057 4062# 4062 4064# 4064
4066# 4066 4071# 4071 4077# 4077 4079# 4079 4084# 4084 4086# 4086 4088# 4088 SEQ 0663
4090# 4090 4095# 4095 4097# 4097 4099# 4099 4104# 4104 4106# 4106 4111# 4111
4118# 4118 4120# 4120 4122# 4122 4243# 4243 4245# 4245 4247# 4247 4249# 4249
4254# 4254 4256# 4256 4258# 4258 4263# 4263 4265# 4265 4270# 4270 4272# 4272
4274# 4274 4276# 4276 4281# 4281 4283# 4283 4285# 4285 4290# 4290 4296# 4296
4298# 4298 4303# 4303 4305# 4305 4307# 4307 4309# 4309 4314# 4314 4316# 4316
4318# 4318 4323# 4323 4325# 4325 4330# 4330 4337# 4337 4339# 4339 4341# 4341
4430# 4430 4601# 4601 4603# 4603 4605# 4605 4683# 4683 4759# 4759 4884# 4884
4889# 4889 4891# 4891 4893# 4893 4895# 4895 4897# 4897 4899# 4899 4901# 4901
4903# 4903 4905# 4905 4907# 4907 4909# 4909 4914# 4914 4916# 4916 4918# 4918
4920# 4920 4925# 4925 4927# 4927 4929# 4929 4931# 4931 4933# 4933 4935# 4935
4937# 4937 4939# 4939 4941# 4941 4943# 4943 5036# 5036 5038# 5038 5040# 5040
5163# 5163 5165# 5165 5167# 5167 5283# 5283 5285# 5285 5287# 5287 5446# 5446
5448# 5448 5450# 5450 5452# 5452 5454# 5454 5456# 5456 5461# 5461 5463# 5463
5465# 5465 5467# 5467 5472# 5472 5474# 5474 5476# 5476 5478# 5478 5483# 5483
5485# 5485 5487# 5487 5489# 5489 5494# 5494 5496# 5496 5498# 5498 5500# 5500
5505# 5505 5507# 5507 5509# 5509 5511# 5511 5516# 5516 5518# 5518 5520# 5520
5522# 5522 5530# 5530 5532# 5532 5534# 5534 5536# 5536 5538# 5538 5540# 5540
5546# 5546 5548# 5548 5550# 5550 5552# 5552 5557# 5557 5559# 5559 5717# 5717
5719# 5719 5721# 5721 5723# 5723 5725# 5725 5727# 5727 5732# 5732 5734# 5734
5736# 5736 5738# 5738 5743# 5743 5745# 5745 5747# 5747 5749# 5749 5754# 5754
5756# 5756 5758# 5758 5760# 5760 5765# 5765 5767# 5767 5769# 5769 5771# 5771
5776# 5776 5778# 5778 5780# 5780 5782# 5782 5787# 5787 5789# 5789 5791# 5791
5793# 5793 5801# 5801 5803# 5803 5805# 5805 5807# 5807 5809# 5809 5811# 5811
5817# 5817 5819# 5819 5821# 5821 5823# 5823 5828# 5828 5830# 5830 6031# 6031
6033# 6033 6035# 6035 6040# 6040 6042# 6042 6044# 6044 6049# 6049 6051# 6051
6053# 6053 6058# 6058 6060# 6060 6065# 6065 6067# 6067 6069# 6069 6071# 6071
6073# 6073 6079# 6079 6081# 6081 6083# 6083 6090# 6090 6092# 6092 6094# 6094
6096# 6096 6098# 6098 6100# 6100 6102# 6102 6104# 6104 6106# 6106 6111# 6111
6113# 6113 6290# 6290 6292# 6292 6294# 6294 6299# 6299 6301# 6301 6303# 6303
6308# 6308 6310# 6310 6312# 6312 6317# 6317 6319# 6319 6324# 6324 6326# 6326
6328# 6328 6330# 6330 6332# 6332 6338# 6338 6340# 6340 6342# 6342 6350# 6350
6352# 6352 6354# 6354 6356# 6356 6358# 6358 6360# 6360 6362# 6362 6364# 6364
6366# 6366 6368# 6368 6370# 6370 6372# 6372 6377# 6377 6379# 6379 6554# 6554
6556# 6556 6558# 6558 6563# 6563 6565# 6565 6567# 6567 6572# 6572 6574# 6574
6576# 6576 6581# 6581 6583# 6583 6588# 6588 6590# 6590 6592# 6592 6594# 6594
6596# 6596 6602# 6602 6604# 6604 6606# 6606 6613# 6613 6615# 6615 6617# 6617
6619# 6619 6621# 6621 6623# 6623 6625# 6625 6627# 6627 6629# 6629 6634# 6634
6636# 6636 6825# 6825 6827# 6827 6829# 6829 6831# 6831 6833# 6833 6835# 6835
6837# 6837 6839# 6839 6954# 6954 6956# 6956 6958# 6958 6960# 6960 6962# 6962
6967# 6967 6969# 6969 6971# 6971 6973# 6973 6975# 6975 6977# 6977 6983# 6983
6985# 6985 6987# 6987 6989# 6989 6992# 6992 6994# 6994 6996# 6996 6998# 6998
7000# 7000 7002# 7002 7008# 7008 7010# 7010 7012# 7012 7014# 7014 7017# 7017
7019# 7019 7021# 7021 7023# 7023 7025# 7025 7027# 7027 7033# 7033 7035# 7035
7037# 7037 7039# 7039 7042# 7042 7044# 7044 7046# 7046 7048# 7048 7050# 7050
7052# 7052 7054# 7054 7059# 7059 7061# 7061 7380# 7380 7382# 7382 7384# 7384
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6328 6328# 6330 6330# 6332 6332# 6338# 6338 6340 6340# 6342 6342# 6350# 6350
6352 6352# 6354 6354# 6356 6356# 6358 6358# 6360 6360# 6362 6362# 6364 6364#
6366 6366# 6368 6368# 6370 6370# 6372 6372# 6377# 6377 6379 6379# 6554# 6554
6556 6556# 6558 6558# 6563 6563# 6565 6565# 6567 6567# 6572 6572# 6574 6574#
6576 6576# 6581# 6581 6583 6583# 6588# 6588 6590 6590# 6592 6592# 6594 6594#
6596 6596# 6602# 6602 6604 6604# 6606 6606# 6613# 6613 6615 6615# 6617 6617#
6619 6619# 6621 6621# 6623 6623# 6625 6625# 6627 6627# 6629 6629# 6634# 6634
6636 6636# 6825# 6825 6827 6827# 6829 6829# 6831 6831# 6833 6833# 6835 6835#
6837 6837# 6839 6839# 6954# 6954 6956 6956# 6958 6958# 6960 6960# 6962 6962#
6967 6967# 6969 6969# 6971 6971# 6973 6973# 6975 6975# 6977 6977# 6983 6983#
6985 6985# 6987 6987# 6989 6989# 6992 6992# 6994 6994# 6996 6996# 6998 6998#
7000 7000# 7002 7002# 7008 7008# 7010 7010# 7012 7012# 7014 7014# 7017 7017#
7019 7019# 7021 7021# 7023 7023# 7025 7025# 7027 7027# 7033 7033# 7035 7035#
7037 7037# 7039 7039# 7042 7042# 7044 7044# 7046 7046# 7048 7048# 7050 7050#
7052 7052# 7054 7054# 7059# 7059 7061 7061# 7380# 7380 7382 7382# 7384 7384#
7386 7386# 7388 7388# 7393 7393# 7395 7395# 7397 7397# 7399 7399# 7401 7401#
7403 7403# 7409 7409# 7411 7411# 7413 7413# 7415 7415# 7418 7418# 7420 7420#
7422 7422# 7424 7424# 7426 7426# 7428 7428# 7434 7434# 7436 7436# 7438 7438#
7440 7440# 7443 7443# 7445 7445# 7447 7447# 7449 7449# 7451 7451# 7453 7453#
7455 7455# 7460# 7460 7462 7462# 7464 7464# 7466 7466# 7468 7468# 7470 7470#
7472 7472# 7478 7478# 7480 7480# 7482 7482# 7484 7484# 7487 7487# 7489 7489#
7491 7491# 7493 7493# 7495 7495# 7497 7497# 7499 7499# 7504# 7504 7506 7506#
%ML 1070# 1070 1072# 1072 1074# 1074 1076# 1076 1078# 1078 1080# 1080 1082# 1082
1084# 1084 1086# 1086 1648# 1648 2004# 2004 2006# 2006 2008# 2008 2010# 2010
2012# 2012 2017# 2017 2019# 2019 2021# 2021 2023# 2023 2025# 2025 2107# 2107
2109# 2109 2111# 2111 2195# 2195 2197# 2197 2199# 2199 2201# 2201 2279# 2279
2281# 2281 2283# 2283 2285# 2285 2362# 2362 2364# 2364 2366# 2366 2368# 2368
2370# 2370 2372# 2372 2447# 2447 2449# 2449 2451# 2451 2531# 2531 2533# 2533
2535# 2535 2631# 2631 2633# 2633 2635# 2635 2637# 2637 2777# 2777 2779# 2779
2781# 2781 2783# 2783 2785# 2785 2787# 2787 2789# 2789 2791# 2791 2793# 2793
2795# 2795 2797# 2797 2799# 2799 2801# 2801 2803# 2803 2805# 2805 2807# 2807
2809# 2809 2811# 2811 2813# 2813 2815# 2815 2817# 2817 2819# 2819 2821# 2821
2823# 2823 2825# 2825 2827# 2827 2829# 2829 2831# 2831 2833# 2833 2835# 2835
2837# 2837 2839# 2839 2841# 2841 2843# 2843 2845# 2845 2847# 2847 2849# 2849
2851# 2851 2853# 2853 2855# 2855 2857# 2857 2859# 2859 2861# 2861 2863# 2863
2865# 2865 2867# 2867 2869# 2869 2871# 2871 2953# 2953 2955# 2955 2957# 2957
2959# 2959 3129# 3129 3131# 3131 3133# 3133 3135# 3135 3137# 3137 3139# 3139
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3816# 3816 3818# 3818 3823# 3823 3825# 3825 3830# 3830 3832# 3832 3834# 3834
3836# 3836 3841# 3841 3843# 3843 3845# 3845 3850# 3850 3856# 3856 3858# 3858
3863# 3863 3865# 3865 3867# 3867 3869# 3869 3874# 3874 3876# 3876 3878# 3878
3883# 3883 3885# 3885 3890# 3890 3897# 3897 3899# 3899 3901# 3901 4024# 4024
4026# 4026 4028# 4028 4030# 4030 4035# 4035 4037# 4037 4039# 4039 4044# 4044
4046# 4046 4051# 4051 4053# 4053 4055# 4055 4057# 4057 4062# 4062 4064# 4064
4066# 4066 4071# 4071 4077# 4077 4079# 4079 4084# 4084 4086# 4086 4088# 4088
4090# 4090 4095# 4095 4097# 4097 4099# 4099 4104# 4104 4106# 4106 4111# 4111
4118# 4118 4120# 4120 4122# 4122 4243# 4243 4245# 4245 4247# 4247 4249# 4249 SEQ 0669
4254# 4254 4256# 4256 4258# 4258 4263# 4263 4265# 4265 4270# 4270 4272# 4272
4274# 4274 4276# 4276 4281# 4281 4283# 4283 4285# 4285 4290# 4290 4296# 4296
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4889# 4889 4891# 4891 4893# 4893 4895# 4895 4897# 4897 4899# 4899 4901# 4901
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4920# 4920 4925# 4925 4927# 4927 4929# 4929 4931# 4931 4933# 4933 4935# 4935
4937# 4937 4939# 4939 4941# 4941 4943# 4943 5036# 5036 5038# 5038 5040# 5040
5163# 5163 5165# 5165 5167# 5167 5283# 5283 5285# 5285 5287# 5287 5446# 5446
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5485# 5485 5487# 5487 5489# 5489 5494# 5494 5496# 5496 5498# 5498 5500# 5500
5505# 5505 5507# 5507 5509# 5509 5511# 5511 5516# 5516 5518# 5518 5520# 5520
5522# 5522 5530# 5530 5532# 5532 5534# 5534 5536# 5536 5538# 5538 5540# 5540
5546# 5546 5548# 5548 5550# 5550 5552# 5552 5557# 5557 5559# 5559 5717# 5717
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7052# 7052 7054# 7054 7059# 7059 7061# 7061 7380# 7380 7382# 7382 7384# 7384
7386# 7386 7388# 7388 7393# 7393 7395# 7395 7397# 7397 7399# 7399 7401# 7401
7403# 7403 7409# 7409 7411# 7411 7413# 7413 7415# 7415 7418# 7418 7420# 7420
7422# 7422 7424# 7424 7426# 7426 7428# 7428 7434# 7434 7436# 7436 7438# 7438
7440# 7440 7443# 7443 7445# 7445 7447# 7447 7449# 7449 7451# 7451 7453# 7453
7455# 7455 7460# 7460 7462# 7462 7464# 7464 7466# 7466 7468# 7468 7470# 7470
7472# 7472 7478# 7478 7480# 7480 7482# 7482 7484# 7484 7487# 7487 7489# 7489
7491# 7491 7493# 7493 7495# 7495 7497# 7497 7499# 7499 7504# 7504 7506# 7506
%MR 1070# 1070 1072# 1072 1074# 1074 1076# 1076 1078# 1078 1080# 1080 1082# 1082
1084# 1084 1086# 1086 1648# 1648 2004# 2004 2006# 2006 2008# 2008 2010# 2010
2012# 2012 2017# 2017 2019# 2019 2021# 2021 2023# 2023 2025# 2025 2107# 2107 SEQ 0670
2109# 2109 2111# 2111 2195# 2195 2197# 2197 2199# 2199 2201# 2201 2279# 2279
2281# 2281 2283# 2283 2285# 2285 2362# 2362 2364# 2364 2366# 2366 2368# 2368
2370# 2370 2372# 2372 2447# 2447 2449# 2449 2451# 2451 2531# 2531 2533# 2533
2535# 2535 2631# 2631 2633# 2633 2635# 2635 2637# 2637 2777# 2777 2779# 2779
2781# 2781 2783# 2783 2785# 2785 2787# 2787 2789# 2789 2791# 2791 2793# 2793
2795# 2795 2797# 2797 2799# 2799 2801# 2801 2803# 2803 2805# 2805 2807# 2807
2809# 2809 2811# 2811 2813# 2813 2815# 2815 2817# 2817 2819# 2819 2821# 2821
2823# 2823 2825# 2825 2827# 2827 2829# 2829 2831# 2831 2833# 2833 2835# 2835
2837# 2837 2839# 2839 2841# 2841 2843# 2843 2845# 2845 2847# 2847 2849# 2849
2851# 2851 2853# 2853 2855# 2855 2857# 2857 2859# 2859 2861# 2861 2863# 2863
2865# 2865 2867# 2867 2869# 2869 2871# 2871 2953# 2953 2955# 2955 2957# 2957
2959# 2959 3129# 3129 3131# 3131 3133# 3133 3135# 3135 3137# 3137 3139# 3139
3253# 3253 3255# 3255 3257# 3257 3259# 3259 3262# 3262 3265# 3265 3267# 3267
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3373# 3373 3445# 3445 3447# 3447 3449# 3449 3525# 3525 3595# 3595 3597# 3597
3599# 3599 3679# 3679 3803# 3803 3805# 3805 3807# 3807 3809# 3809 3814# 3814
3816# 3816 3818# 3818 3823# 3823 3825# 3825 3830# 3830 3832# 3832 3834# 3834
3836# 3836 3841# 3841 3843# 3843 3845# 3845 3850# 3850 3856# 3856 3858# 3858
3863# 3863 3865# 3865 3867# 3867 3869# 3869 3874# 3874 3876# 3876 3878# 3878
3883# 3883 3885# 3885 3890# 3890 3897# 3897 3899# 3899 3901# 3901 4024# 4024
4026# 4026 4028# 4028 4030# 4030 4035# 4035 4037# 4037 4039# 4039 4044# 4044
4046# 4046 4051# 4051 4053# 4053 4055# 4055 4057# 4057 4062# 4062 4064# 4064
4066# 4066 4071# 4071 4077# 4077 4079# 4079 4084# 4084 4086# 4086 4088# 4088
4090# 4090 4095# 4095 4097# 4097 4099# 4099 4104# 4104 4106# 4106 4111# 4111
4118# 4118 4120# 4120 4122# 4122 4243# 4243 4245# 4245 4247# 4247 4249# 4249
4254# 4254 4256# 4256 4258# 4258 4263# 4263 4265# 4265 4270# 4270 4272# 4272
4274# 4274 4276# 4276 4281# 4281 4283# 4283 4285# 4285 4290# 4290 4296# 4296
4298# 4298 4303# 4303 4305# 4305 4307# 4307 4309# 4309 4314# 4314 4316# 4316
4318# 4318 4323# 4323 4325# 4325 4330# 4330 4337# 4337 4339# 4339 4341# 4341
4430# 4430 4601# 4601 4603# 4603 4605# 4605 4683# 4683 4759# 4759 4884# 4884
4889# 4889 4891# 4891 4893# 4893 4895# 4895 4897# 4897 4899# 4899 4901# 4901
4903# 4903 4905# 4905 4907# 4907 4909# 4909 4914# 4914 4916# 4916 4918# 4918
4920# 4920 4925# 4925 4927# 4927 4929# 4929 4931# 4931 4933# 4933 4935# 4935
4937# 4937 4939# 4939 4941# 4941 4943# 4943 5036# 5036 5038# 5038 5040# 5040
5163# 5163 5165# 5165 5167# 5167 5283# 5283 5285# 5285 5287# 5287 5446# 5446
5448# 5448 5450# 5450 5452# 5452 5454# 5454 5456# 5456 5461# 5461 5463# 5463
5465# 5465 5467# 5467 5472# 5472 5474# 5474 5476# 5476 5478# 5478 5483# 5483
5485# 5485 5487# 5487 5489# 5489 5494# 5494 5496# 5496 5498# 5498 5500# 5500
5505# 5505 5507# 5507 5509# 5509 5511# 5511 5516# 5516 5518# 5518 5520# 5520
5522# 5522 5530# 5530 5532# 5532 5534# 5534 5536# 5536 5538# 5538 5540# 5540
5546# 5546 5548# 5548 5550# 5550 5552# 5552 5557# 5557 5559# 5559 5717# 5717
5719# 5719 5721# 5721 5723# 5723 5725# 5725 5727# 5727 5732# 5732 5734# 5734
5736# 5736 5738# 5738 5743# 5743 5745# 5745 5747# 5747 5749# 5749 5754# 5754
5756# 5756 5758# 5758 5760# 5760 5765# 5765 5767# 5767 5769# 5769 5771# 5771
5776# 5776 5778# 5778 5780# 5780 5782# 5782 5787# 5787 5789# 5789 5791# 5791
5793# 5793 5801# 5801 5803# 5803 5805# 5805 5807# 5807 5809# 5809 5811# 5811
5817# 5817 5819# 5819 5821# 5821 5823# 5823 5828# 5828 5830# 5830 6031# 6031
6033# 6033 6035# 6035 6040# 6040 6042# 6042 6044# 6044 6049# 6049 6051# 6051
6053# 6053 6058# 6058 6060# 6060 6065# 6065 6067# 6067 6069# 6069 6071# 6071
6073# 6073 6079# 6079 6081# 6081 6083# 6083 6090# 6090 6092# 6092 6094# 6094
6096# 6096 6098# 6098 6100# 6100 6102# 6102 6104# 6104 6106# 6106 6111# 6111
6113# 6113 6290# 6290 6292# 6292 6294# 6294 6299# 6299 6301# 6301 6303# 6303 SEQ 0671
6308# 6308 6310# 6310 6312# 6312 6317# 6317 6319# 6319 6324# 6324 6326# 6326
6328# 6328 6330# 6330 6332# 6332 6338# 6338 6340# 6340 6342# 6342 6350# 6350
6352# 6352 6354# 6354 6356# 6356 6358# 6358 6360# 6360 6362# 6362 6364# 6364
6366# 6366 6368# 6368 6370# 6370 6372# 6372 6377# 6377 6379# 6379 6554# 6554
6556# 6556 6558# 6558 6563# 6563 6565# 6565 6567# 6567 6572# 6572 6574# 6574
6576# 6576 6581# 6581 6583# 6583 6588# 6588 6590# 6590 6592# 6592 6594# 6594
6596# 6596 6602# 6602 6604# 6604 6606# 6606 6613# 6613 6615# 6615 6617# 6617
6619# 6619 6621# 6621 6623# 6623 6625# 6625 6627# 6627 6629# 6629 6634# 6634
6636# 6636 6825# 6825 6827# 6827 6829# 6829 6831# 6831 6833# 6833 6835# 6835
6837# 6837 6839# 6839 6954# 6954 6956# 6956 6958# 6958 6960# 6960 6962# 6962
6967# 6967 6969# 6969 6971# 6971 6973# 6973 6975# 6975 6977# 6977 6983# 6983
6985# 6985 6987# 6987 6989# 6989 6992# 6992 6994# 6994 6996# 6996 6998# 6998
7000# 7000 7002# 7002 7008# 7008 7010# 7010 7012# 7012 7014# 7014 7017# 7017
7019# 7019 7021# 7021 7023# 7023 7025# 7025 7027# 7027 7033# 7033 7035# 7035
7037# 7037 7039# 7039 7042# 7042 7044# 7044 7046# 7046 7048# 7048 7050# 7050
7052# 7052 7054# 7054 7059# 7059 7061# 7061 7380# 7380 7382# 7382 7384# 7384
7386# 7386 7388# 7388 7393# 7393 7395# 7395 7397# 7397 7399# 7399 7401# 7401
7403# 7403 7409# 7409 7411# 7411 7413# 7413 7415# 7415 7418# 7418 7420# 7420
7422# 7422 7424# 7424 7426# 7426 7428# 7428 7434# 7434 7436# 7436 7438# 7438
7440# 7440 7443# 7443 7445# 7445 7447# 7447 7449# 7449 7451# 7451 7453# 7453
7455# 7455 7460# 7460 7462# 7462 7464# 7464 7466# 7466 7468# 7468 7470# 7470
7472# 7472 7478# 7478 7480# 7480 7482# 7482 7484# 7484 7487# 7487 7489# 7489
7491# 7491 7493# 7493 7495# 7495 7497# 7497 7499# 7499 7504# 7504 7506# 7506
.CONI 33# 149 251 257 455 461 549
.CONO 33# 358
.DATAI 32# 1030
.DATAO 32# 1029
.LA 2012 2023 2362 3262 3287 3809 3823 3830 3836 3850 3863 3883 4030 4044
4051 4057 4071 4084 4104 4249 4263 4270 4276 4290 4303 4323 4925 4931
5557 5828 6111 6368 6377 6634 6837 6973 6975 6998 7000 7008 7023 7025
7033 7048 7050 7399 7401 7424 7426 7434 7449 7451 7468 7470 7478 7493
7495
.LADDR 1070 1648 2004 2107 2195 2279 2362 2447 2531 2631 2777 2953 3129 3253
3262 3265 3274 3287 3369 3445 3525 3595 3679 3803 3897 3899 3901 4024
4118 4120 4122 4243 4337 4339 4341 4430 4601 4683 4759 4884 4889 4914
4925 5036 5163 5283 5446 5530 5546 5557 5717 5801 5817 5828 6031 6058
6065 6079 6090 6111 6290 6317 6324 6338 6350 6377 6554 6581 6588 6602
6613 6634 6825 6954 7059 7380 7460 7504
.LAND 2004 2362 2953 3253 3255 3257 3259 3803 3823 3850 3863 3883 4024 4044
4071 4084 4104 4243 4263 4290 4303 4323 4914 5461 5472 5483 5494 5505
5516 5530 5546 5552 5732 5743 5754 5765 5776 5787 5801 5817 5823 6090
6350 6613 6973 6975 6983 6998 7000 7023 7033 7048 7399 7401 7409 7424
7426 7449 7451 7468 7493 7495
.LB 2004 2006 2021 3253 3255 3257 3259 3262 3267 3269 3271 3276 3278 3280
3282 3803 3805 3809 3818 3823 3845 3850 3878 3883 4024 4026 4030 4039
4044 4066 4071 4099 4104 4243 4245 4249 4258 4263 4285 4290 4318 4323
4895 4897 4899 4901 4903 4909 4914 4916 4925 4931 4933 4941 5530 5536
5546 5550 5801 5807 5817 5821 6071 6079 6081 6090 6096 6104 6330 6338
6340 6350 6356 6358 6360 6594 6602 6604 6613 6619 6627 6954 6958 6962
6971 6973 6975 6996 6998 7000 7021 7023 7025 7046 7048 7050 7380 7384
7388 7397 7399 7401 7422 7424 7426 7447 7449 7451 7466 7468 7470 7491
7493 7495
.LBAD 3371 3447 3597 4603 5038 5165 5285 SEQ 0672
.LCCCC 3856 4077 4296
.LCCER 1072 1080 3131 3289 4891 4937 6067 6100 6326 6364 6590 6623
.LCCFZ 3823 3850 3883 4044 4071 4104 4263 4290 4323 6975 7000 7025 7050 7401
7426 7451 7470 7495
.LCCGC 2008 2017 2107 2195 2279 2364 2447 2531 2631 3814 3832 3841 3865 3874
4035 4053 4062 4086 4095 4254 4272 4281 4305 4314 4905 6833 6967 6985
6992 7010 7017 7035 7042 7393 7411 7418 7436 7443 7462 7480 7487
.LCCIA 4918
.LCENA 1072 1080 2008 2017 2107 2195 2279 2364 2447 2531 2631 3131 3289 3814
3823 3832 3841 3850 3856 3865 3874 3883 4035 4044 4053 4062 4071 4077
4086 4095 4104 4254 4263 4272 4281 4290 4296 4305 4314 4323 4891 4905
4918 4937 6067 6100 6326 6364 6590 6623 6833 6967 6975 6985 6992 7000
7010 7017 7025 7035 7042 7050 7393 7401 7411 7418 7426 7436 7443 7451
7462 7470 7480 7487 7495
.LCJP 1072 1080 2008 2017 2107 2195 2279 2364 2447 2531 2631 3131 3289 3814
3823 3832 3841 3850 3856 3865 3874 3883 4035 4044 4053 4062 4071 4077
4086 4095 4104 4254 4263 4272 4281 4290 4296 4305 4314 4323 4891 4905
4918 4937 6067 6100 6326 6364 6590 6623 6833 6967 6975 6985 6992 7000
7010 7017 7025 7035 7042 7050 7393 7401 7411 7418 7426 7436 7443 7451
7462 7470 7480 7487 7495
.LCJS 4916 5465 5476 5487 5498 5509 5520 5736 5747 5758 5769 5780 5791 6033
6042 6051 6292 6301 6310 6556 6565 6574
.LCONT 1084 2006 2012 2021 2023 2199 2283 2368 2635 2779 2783 2787 2791 2795
2799 2803 2807 2811 2815 2819 2823 2827 2831 2835 2839 2843 2847 2851
2855 2859 2863 2867 2871 2955 2957 2959 3135 3137 3267 3276 3280 3287
3293 3805 3818 3830 3836 3845 3863 3869 3878 4026 4039 4051 4057 4066
4084 4090 4099 4245 4258 4270 4276 4285 4303 4309 4318 4895 4931 4933
4935 4941 5530 5536 5538 5546 5550 5801 5807 5809 5817 5821 6071 6090
6096 6098 6104 6330 6350 6356 6362 6368 6370 6594 6613 6619 6621 6627
6831 6837 6971 6973 6983 6989 6996 6998 7008 7014 7021 7023 7033 7039
7046 7048 7059 7397 7399 7409 7415 7422 7424 7434 7440 7447 7449 7466
7468 7478 7484 7491 7493 7504
.LCRTN 4943 5552 5823 6083 6342 6606
.LCRY 3267 3271 3276 3280 3805 4026 4245 4916 5463 5474 5485 5496 5507 5518
5734 5745 5756 5767 5778 5789
.LD 1076 1084 2004 2006 2012 2021 2023 2362 2777 2779 2781 2783 2785 2787
2789 2791 2793 2795 2797 2799 2801 2803 2805 2807 2809 2811 2813 2815
2817 2819 2821 2823 2825 2827 2829 2831 2833 2835 2837 2839 2841 2843
2845 2847 2849 2851 2853 2855 2857 2859 2861 2863 2865 2867 2869 2871
2953 2955 2957 2959 3135 3137 3139 3253 3255 3257 3259 3262 3265 3267
3269 3271 3274 3276 3278 3280 3282 3287 3293 3295 3803 3805 3809 3818
3823 3830 3836 3845 3850 3863 3878 3883 4024 4026 4030 4039 4044 4051
4057 4066 4071 4084 4099 4104 4243 4245 4249 4258 4263 4270 4276 4285
4290 4303 4318 4323 4895 4897 4899 4901 4903 4909 4914 4916 4925 4927
4931 4933 4941 5446 5448 5450 5452 5454 5456 5461 5463 5467 5472 5474
5478 5483 5485 5489 5494 5496 5500 5505 5507 5511 5516 5518 5522 5530
5532 5534 5536 5546 5548 5550 5552 5557 5717 5719 5721 5723 5725 5727
5732 5734 5738 5743 5745 5749 5754 5756 5760 5765 5767 5771 5776 5778
5782 5787 5789 5793 5801 5803 5805 5807 5817 5819 5821 5823 5828 6033
6035 6042 6044 6051 6053 6060 6071 6073 6079 6081 6090 6092 6094 6096
6100 6102 6104 6111 6292 6294 6301 6303 6310 6312 6319 6330 6332 6338
6340 6350 6352 6354 6356 6358 6360 6364 6366 6368 6370 6377 6556 6558
6565 6567 6574 6576 6583 6594 6596 6602 6604 6613 6615 6617 6619 6623 SEQ 0673
6625 6627 6634 6825 6827 6829 6831 6954 6958 6962 6971 6973 6975 6977
6983 6996 6998 7000 7002 7008 7021 7023 7025 7027 7033 7046 7048 7050
7052 7054 7059 7061 7380 7384 7388 7397 7399 7401 7403 7409 7422 7424
7426 7428 7434 7447 7449 7451 7453 7455 7466 7468 7470 7472 7478 7491
7493 7495 7497 7499 7504 7506
.LJ 1070 1072 1074 1076 1078 1080 1082 2004 2008 2010 2017 2019 2025 2107
2109 2111 2195 2197 2279 2281 2285 2362 2364 2366 2370 2447 2449 2451
2531 2533 2535 2631 2633 2637 2777 2781 2785 2789 2793 2797 2801 2805
2809 2813 2817 2821 2825 2829 2833 2837 2841 2845 2849 2853 2857 2861
2865 2869 2953 3129 3131 3133 3139 3253 3255 3257 3259 3262 3265 3269
3271 3274 3278 3282 3289 3291 3295 3369 3371 3373 3445 3447 3449 3595
3597 3599 3803 3807 3809 3814 3816 3823 3825 3832 3834 3841 3843 3850
3856 3858 3865 3867 3874 3876 3883 3885 3890 3897 3899 3901 4024 4028
4030 4035 4037 4044 4046 4053 4055 4062 4064 4071 4077 4079 4086 4088
4095 4097 4104 4106 4111 4118 4120 4122 4243 4247 4249 4254 4256 4263
4265 4272 4274 4281 4283 4290 4296 4298 4305 4307 4314 4316 4323 4325
4330 4337 4339 4341 4601 4603 4605 4889 4891 4893 4897 4899 4901 4903
4905 4907 4909 4914 4916 4918 4920 4925 4927 4929 4937 4939 5036 5038
5040 5163 5165 5167 5283 5285 5287 5446 5448 5450 5452 5454 5456 5461
5463 5465 5467 5472 5474 5476 5478 5483 5485 5487 5489 5494 5496 5498
5500 5505 5507 5509 5511 5516 5518 5520 5522 5532 5534 5540 5548 5557
5559 5717 5719 5721 5723 5725 5727 5732 5734 5736 5738 5743 5745 5747
5749 5754 5756 5758 5760 5765 5767 5769 5771 5776 5778 5780 5782 5787
5789 5791 5793 5803 5805 5811 5819 5828 5830 6031 6033 6035 6040 6042
6044 6049 6051 6053 6058 6060 6065 6067 6069 6073 6079 6081 6092 6094
6100 6102 6106 6111 6113 6290 6292 6294 6299 6301 6303 6308 6310 6312
6317 6319 6324 6326 6328 6332 6338 6340 6352 6354 6358 6360 6364 6366
6372 6377 6379 6554 6556 6558 6563 6565 6567 6572 6574 6576 6581 6583
6588 6590 6592 6596 6602 6604 6615 6617 6623 6625 6629 6634 6636 6825
6827 6829 6833 6835 6839 6954 6956 6958 6960 6962 6967 6969 6975 6977
6985 6987 6992 6994 7000 7002 7010 7012 7017 7019 7025 7027 7035 7037
7042 7044 7050 7052 7054 7061 7380 7382 7384 7386 7388 7393 7395 7401
7403 7411 7413 7418 7420 7426 7428 7436 7438 7443 7445 7451 7453 7455
7460 7462 7464 7470 7472 7480 7482 7487 7489 7495 7497 7499 7506
.LJMAP 1070 1074 1082 2004 2010 2019 2025 2109 2111 2197 2281 2285 2362 2366
2370 2449 2451 2533 2535 2633 2637 2777 2781 2785 2789 2793 2797 2801
2805 2809 2813 2817 2821 2825 2829 2833 2837 2841 2845 2849 2853 2857
2861 2865 2869 2953 3129 3133 3139 3253 3255 3257 3259 3262 3271 3282
3291 3295 3369 3371 3373 3445 3447 3449 3595 3597 3599 3803 3816 3825
3834 3843 3858 3867 3876 3885 3890 3897 3899 3901 4024 4037 4046 4055
4064 4079 4088 4097 4106 4111 4118 4120 4122 4243 4256 4265 4274 4283
4298 4307 4316 4325 4330 4337 4339 4341 4601 4603 4605 4889 4893 4907
4909 4914 4920 4925 4939 5036 5038 5040 5163 5165 5167 5283 5285 5287
5446 5448 5450 5452 5454 5456 5461 5467 5472 5478 5483 5489 5494 5500
5505 5511 5516 5522 5540 5557 5559 5717 5719 5721 5723 5725 5727 5732
5738 5743 5749 5754 5760 5765 5771 5776 5782 5787 5793 5811 5828 5830
6031 6035 6040 6044 6049 6053 6058 6060 6065 6069 6073 6102 6106 6111
6113 6290 6294 6299 6303 6308 6312 6317 6319 6324 6328 6332 6366 6372
6377 6379 6554 6558 6563 6567 6572 6576 6581 6583 6588 6592 6596 6625
6629 6634 6636 6825 6835 6839 6954 6969 6977 6987 6994 7002 7012 7019
7027 7037 7044 7052 7054 7061 7380 7395 7403 7413 7420 7428 7438 7445
7453 7455 7460 7464 7472 7482 7489 7497 7499 7506
.LJZ 1086 1648 2201 2372 3525 3679 4430 4683 4759 4884 SEQ 0674
.LLDCT 1076 3265 3274 3807 4028 4247 4897 4901 4927 5463 5474 5485 5496 5507
5518 5532 5734 5745 5756 5767 5778 5789 5803 6079 6092 6338 6352 6358
6602 6615 6827 6956 6960 7382 7386
.LLDLM 2955
.LMGC 1076 1084 2006 2008 2012 2017 2021 2023 2107 2195 2199 2279 2283 2362
2364 2368 2447 2531 2631 2635 2777 2779 2781 2783 2785 2787 2789 2791
2793 2795 2797 2799 2801 2803 2805 2807 2809 2811 2813 2815 2817 2819
2821 2823 2825 2827 2829 2831 2833 2835 2837 2839 2841 2843 2845 2847
2849 2851 2853 2855 2857 2859 2861 2863 2865 2867 2869 2871 2955 2957
2959 3135 3137 3287 3293 3525 3679 3814 3818 3830 3832 3836 3841 3845
3863 3865 3869 3874 3878 4035 4039 4051 4053 4057 4062 4066 4084 4086
4090 4095 4099 4254 4258 4270 4272 4276 4281 4285 4303 4305 4309 4314
4318 4895 4897 4901 4905 4909 4914 4933 4935 4941 5446 5448 5450 5452
5454 5456 5467 5478 5489 5500 5511 5522 5536 5538 5557 5717 5719 5721
5723 5725 5727 5738 5749 5760 5771 5782 5793 5807 5809 5828 6033 6035
6042 6044 6051 6053 6060 6071 6096 6098 6104 6111 6292 6294 6301 6303
6310 6312 6319 6330 6356 6358 6362 6368 6370 6377 6556 6558 6565 6567
6574 6576 6583 6594 6619 6621 6627 6634 6825 6831 6833 6837 6954 6967
6971 6977 6983 6985 6989 6992 6996 7002 7008 7010 7014 7017 7021 7027
7033 7035 7039 7042 7046 7052 7054 7059 7380 7393 7397 7403 7409 7411
7415 7418 7422 7428 7434 7436 7440 7443 7447 7453 7455 7462 7466 7472
7478 7480 7484 7487 7491 7497 7499 7504
.LOENA 1084 2006 2023 2362 2779 2783 2787 2791 2795 2799 2803 2807 2811 2815
2819 2823 2827 2831 2835 2839 2843 2847 2851 2855 2859 2863 2867 2871
2955 2959 3137 3287 3293 3525 3679 3830 3863 4051 4084 4270 4303 4933
5536 5557 5807 5828 6096 6111 6356 6368 6377 6619 6634 6831 6983 7008
7033 7059 7409 7434 7478 7504
.LOR 1076 1084 2012 2021 2023 2777 2779 2781 2783 2785 2787 2789 2791 2793
2795 2797 2799 2801 2803 2805 2807 2809 2811 2813 2815 2817 2819 2821
2823 2825 2827 2829 2831 2833 2835 2837 2839 2841 2843 2845 2847 2849
2851 2853 2855 2857 2859 2861 2863 2865 2867 2869 2871 2955 2957 2959
3135 3137 3269 3278 3287 3818 3830 3836 3845 3878 4039 4051 4057 4066
4099 4258 4270 4276 4285 4318 4895 4897 4899 4901 4903 4909 4925 4931
4933 4941 5446 5448 5450 5452 5454 5456 5467 5478 5489 5500 5511 5522
5534 5536 5548 5550 5557 5717 5719 5721 5723 5725 5727 5738 5749 5760
5771 5782 5793 5805 5807 5819 5821 5828 6033 6035 6042 6044 6051 6053
6060 6071 6079 6081 6094 6096 6104 6111 6292 6294 6301 6303 6310 6312
6319 6330 6338 6340 6354 6356 6358 6368 6377 6556 6558 6565 6567 6574
6576 6583 6594 6602 6604 6617 6619 6627 6634 6825 6829 6831 6837 6954
6958 6962 6971 6977 6996 7002 7008 7021 7027 7046 7052 7054 7059 7380
7384 7388 7397 7403 7422 7428 7434 7447 7453 7455 7466 7472 7478 7491
7497 7499 7504
.LPLUS 3267 3271 3276 3280 3805 3809 4026 4030 4245 4249 4916 5463 5474 5485
5496 5507 5518 5734 5745 5756 5767 5778 5789
.LRDLM 2957 3525 3679
.LRPCT 1078 3269 3278 3809 4030 4249 4899 4903 4929 5534 5548 5805 5819 6081
6094 6340 6354 6360 6604 6617 6829 6958 6962 7384 7388
.LS0A 1084 2012 2023 2362 2779 2783 2787 2791 2795 2799 2803 2807 2811 2815
2819 2823 2827 2831 2835 2839 2843 2847 2851 2855 2859 2863 2867 2871
2955 2959 3137 3253 3255 3257 3259 3262 3287 3830 3836 3863 4051 4057
4084 4270 4276 4303 4914 4925 5461 5472 5483 5494 5505 5516 5530 5534
5546 5548 5552 5557 5732 5743 5754 5765 5776 5787 5801 5805 5817 5819
5823 5828 6079 6090 6094 6111 6338 6350 6354 6368 6377 6602 6613 6617 SEQ 0675
6634 6829 6831 6837 6983 7008 7033 7059 7409 7434 7478 7504
.LS0B 2006 3267 3269 3271 3276 3278 3280 3282 3805 4026 4245 4899 4903 4916
4933 6081 6340 6360 6604 6958 6962 7384 7388
.LSAB 3809 3823 3850 3883 4030 4044 4071 4104 4249 4263 4290 4323 4931 5463
5474 5485 5496 5507 5518 5536 5550 5734 5745 5756 5767 5778 5789 5807
5821 6096 6356 6619 6973 6975 6998 7000 7023 7025 7048 7050 7399 7401
7424 7426 7449 7451 7468 7470 7493 7495
.LSD0 1076 2004 2021 2777 2781 2785 2789 2793 2797 2801 2805 2809 2813 2817
2821 2825 2829 2833 2837 2841 2845 2849 2853 2857 2861 2865 2869 2953
2957 3135 3803 3818 3845 3878 4024 4039 4066 4099 4243 4258 4285 4318
4895 4897 4901 4909 4941 5446 5448 5450 5452 5454 5456 5467 5478 5489
5500 5511 5522 5717 5719 5721 5723 5725 5727 5738 5749 5760 5771 5782
5793 6033 6035 6042 6044 6051 6053 6060 6071 6104 6292 6294 6301 6303
6310 6312 6319 6330 6358 6556 6558 6565 6567 6574 6576 6583 6594 6627
6825 6954 6971 6977 6996 7002 7021 7027 7046 7052 7054 7380 7397 7403
7422 7428 7447 7453 7455 7466 7472 7491 7497 7499
.LSELE 1076 1084 2006 2008 2012 2017 2021 2023 2107 2195 2199 2279 2283 2362
2364 2368 2447 2531 2631 2635 2779 2783 2787 2791 2795 2799 2803 2807
2811 2815 2819 2823 2827 2831 2835 2839 2843 2847 2851 2855 2859 2863
2867 2871 2959 3135 3137 3287 3293 3525 3679 3814 3818 3830 3832 3836
3841 3845 3863 3865 3869 3874 3878 4035 4039 4051 4053 4057 4062 4066
4084 4086 4090 4095 4099 4254 4258 4270 4272 4276 4281 4285 4303 4305
4309 4314 4318 4895 4905 4909 4914 4933 4935 4941 5536 5538 5557 5807
5809 5828 6071 6096 6098 6104 6111 6330 6356 6362 6368 6370 6377 6594
6619 6621 6627 6634 6831 6833 6837 6967 6971 6983 6985 6989 6992 6996
7008 7010 7014 7017 7021 7033 7035 7039 7042 7046 7059 7393 7397 7409
7411 7415 7418 7422 7434 7436 7440 7443 7447 7462 7466 7478 7480 7484
7487 7491 7504
.LSKCN 2777 2781 2785 2789 2793 2797 2801 2805 2809 2813 2817 2821 2825 2829
2833 2837 2841 2845 2849 2853 2857 2861 2865 2869 4897 4901 5446 5448
5450 5452 5454 5456 5467 5478 5489 5500 5511 5522 5717 5719 5721 5723
5725 5727 5738 5749 5760 5771 5782 5793 6033 6035 6042 6044 6051 6053
6060 6292 6294 6301 6303 6310 6312 6319 6358 6556 6558 6565 6567 6574
6576 6583 6825 6954 6977 7002 7027 7052 7054 7380 7403 7428 7453 7455
7472 7497 7499
.LXNOR 2006 3262 3282
.LXOR 7025 7050 7470
.MA 2012 2023 2362 3262 3287 3809 3823 3830 3836 3850 3863 3883 4030 4044
4051 4057 4071 4084 4104 4249 4263 4270 4276 4290 4303 4323 4925 4931
5557 5828 6111 6368 6377 6634 6837 6973 6975 6998 7000 7008 7023 7025
7033 7048 7050 7399 7401 7424 7426 7434 7449 7451 7468 7470 7478 7493
7495
.MAND 2004 2362 2953 3253 3255 3257 3259 3803 3823 3850 3863 3883 4024 4044
4071 4084 4104 4243 4263 4290 4303 4323 4914 5461 5472 5483 5494 5505
5516 5530 5546 5552 5732 5743 5754 5765 5776 5787 5801 5817 5823 6090
6350 6613 6973 6975 6983 6998 7000 7023 7033 7048 7399 7401 7409 7424
7426 7449 7451 7468 7493 7495
.MB 2004 2006 2021 3253 3255 3257 3259 3262 3267 3269 3271 3276 3278 3280
3282 3803 3805 3809 3818 3823 3845 3850 3878 3883 4024 4026 4030 4039
4044 4066 4071 4099 4104 4243 4245 4249 4258 4263 4285 4290 4318 4323
4895 4897 4899 4901 4903 4909 4914 4916 4925 4931 4933 4941 5530 5536
5546 5550 5801 5807 5817 5821 6071 6079 6081 6090 6096 6104 6330 6338
6340 6350 6356 6358 6360 6594 6602 6604 6613 6619 6627 6954 6958 6962 SEQ 0676
6971 6973 6975 6996 6998 7000 7021 7023 7025 7046 7048 7050 7380 7384
7388 7397 7399 7401 7422 7424 7426 7447 7449 7451 7466 7468 7470 7491
7493 7495
.MBAD 3371 3447 3597 4603 5038 5165 5285
.MCCCC 3856 4077 4296
.MCCER 1072 1080 3131 3289 4891 4937 6067 6100 6326 6364 6590 6623
.MCCFZ 3823 3850 3883 4044 4071 4104 4263 4290 4323 6975 7000 7025 7050 7401
7426 7451 7470 7495
.MCCGC 2008 2017 2107 2195 2279 2364 2447 2531 2631 3814 3832 3841 3865 3874
4035 4053 4062 4086 4095 4254 4272 4281 4305 4314 4905 6833 6967 6985
6992 7010 7017 7035 7042 7393 7411 7418 7436 7443 7462 7480 7487
.MCCIA 4918
.MCENA 1072 1080 2008 2017 2107 2195 2279 2364 2447 2531 2631 3131 3289 3814
3823 3832 3841 3850 3856 3865 3874 3883 4035 4044 4053 4062 4071 4077
4086 4095 4104 4254 4263 4272 4281 4290 4296 4305 4314 4323 4891 4905
4918 4937 6067 6100 6326 6364 6590 6623 6833 6967 6975 6985 6992 7000
7010 7017 7025 7035 7042 7050 7393 7401 7411 7418 7426 7436 7443 7451
7462 7470 7480 7487 7495
.MCJP 1072 1080 2008 2017 2107 2195 2279 2364 2447 2531 2631 3131 3289 3814
3823 3832 3841 3850 3856 3865 3874 3883 4035 4044 4053 4062 4071 4077
4086 4095 4104 4254 4263 4272 4281 4290 4296 4305 4314 4323 4891 4905
4918 4937 6067 6100 6326 6364 6590 6623 6833 6967 6975 6985 6992 7000
7010 7017 7025 7035 7042 7050 7393 7401 7411 7418 7426 7436 7443 7451
7462 7470 7480 7487 7495
.MCJS 4916 5465 5476 5487 5498 5509 5520 5736 5747 5758 5769 5780 5791 6033
6042 6051 6292 6301 6310 6556 6565 6574
.MCONT 1084 2006 2012 2021 2023 2199 2283 2368 2635 2779 2783 2787 2791 2795
2799 2803 2807 2811 2815 2819 2823 2827 2831 2835 2839 2843 2847 2851
2855 2859 2863 2867 2871 2955 2957 2959 3135 3137 3267 3276 3280 3287
3293 3805 3818 3830 3836 3845 3863 3869 3878 4026 4039 4051 4057 4066
4084 4090 4099 4245 4258 4270 4276 4285 4303 4309 4318 4895 4931 4933
4935 4941 5530 5536 5538 5546 5550 5801 5807 5809 5817 5821 6071 6090
6096 6098 6104 6330 6350 6356 6362 6368 6370 6594 6613 6619 6621 6627
6831 6837 6971 6973 6983 6989 6996 6998 7008 7014 7021 7023 7033 7039
7046 7048 7059 7397 7399 7409 7415 7422 7424 7434 7440 7447 7449 7466
7468 7478 7484 7491 7493 7504
.MCRTN 4943 5552 5823 6083 6342 6606
.MCRY 3267 3271 3276 3280 3805 4026 4245 4916 5463 5474 5485 5496 5507 5518
5734 5745 5756 5767 5778 5789
.MD 1076 1084 2004 2006 2012 2021 2023 2362 2777 2779 2781 2783 2785 2787
2789 2791 2793 2795 2797 2799 2801 2803 2805 2807 2809 2811 2813 2815
2817 2819 2821 2823 2825 2827 2829 2831 2833 2835 2837 2839 2841 2843
2845 2847 2849 2851 2853 2855 2857 2859 2861 2863 2865 2867 2869 2871
2953 2955 2957 2959 3135 3137 3139 3253 3255 3257 3259 3262 3265 3267
3269 3271 3274 3276 3278 3280 3282 3287 3293 3295 3803 3805 3809 3818
3823 3830 3836 3845 3850 3863 3878 3883 4024 4026 4030 4039 4044 4051
4057 4066 4071 4084 4099 4104 4243 4245 4249 4258 4263 4270 4276 4285
4290 4303 4318 4323 4895 4897 4899 4901 4903 4909 4914 4916 4925 4927
4931 4933 4941 5446 5448 5450 5452 5454 5456 5461 5463 5467 5472 5474
5478 5483 5485 5489 5494 5496 5500 5505 5507 5511 5516 5518 5522 5530
5532 5534 5536 5546 5548 5550 5552 5557 5717 5719 5721 5723 5725 5727
5732 5734 5738 5743 5745 5749 5754 5756 5760 5765 5767 5771 5776 5778
5782 5787 5789 5793 5801 5803 5805 5807 5817 5819 5821 5823 5828 6033 SEQ 0677
6035 6042 6044 6051 6053 6060 6071 6073 6079 6081 6090 6092 6094 6096
6100 6102 6104 6111 6292 6294 6301 6303 6310 6312 6319 6330 6332 6338
6340 6350 6352 6354 6356 6358 6360 6364 6366 6368 6370 6377 6556 6558
6565 6567 6574 6576 6583 6594 6596 6602 6604 6613 6615 6617 6619 6623
6625 6627 6634 6825 6827 6829 6831 6954 6958 6962 6971 6973 6975 6977
6983 6996 6998 7000 7002 7008 7021 7023 7025 7027 7033 7046 7048 7050
7052 7054 7059 7061 7380 7384 7388 7397 7399 7401 7403 7409 7422 7424
7426 7428 7434 7447 7449 7451 7453 7455 7466 7468 7470 7472 7478 7491
7493 7495 7497 7499 7504 7506
.MJ 1070 1072 1074 1076 1078 1080 1082 2004 2008 2010 2017 2019 2025 2107
2109 2111 2195 2197 2279 2281 2285 2362 2364 2366 2370 2447 2449 2451
2531 2533 2535 2631 2633 2637 2777 2781 2785 2789 2793 2797 2801 2805
2809 2813 2817 2821 2825 2829 2833 2837 2841 2845 2849 2853 2857 2861
2865 2869 2953 3129 3131 3133 3139 3253 3255 3257 3259 3262 3265 3269
3271 3274 3278 3282 3289 3291 3295 3369 3371 3373 3445 3447 3449 3595
3597 3599 3803 3807 3809 3814 3816 3823 3825 3832 3834 3841 3843 3850
3856 3858 3865 3867 3874 3876 3883 3885 3890 3897 3899 3901 4024 4028
4030 4035 4037 4044 4046 4053 4055 4062 4064 4071 4077 4079 4086 4088
4095 4097 4104 4106 4111 4118 4120 4122 4243 4247 4249 4254 4256 4263
4265 4272 4274 4281 4283 4290 4296 4298 4305 4307 4314 4316 4323 4325
4330 4337 4339 4341 4601 4603 4605 4889 4891 4893 4897 4899 4901 4903
4905 4907 4909 4914 4916 4918 4920 4925 4927 4929 4937 4939 5036 5038
5040 5163 5165 5167 5283 5285 5287 5446 5448 5450 5452 5454 5456 5461
5463 5465 5467 5472 5474 5476 5478 5483 5485 5487 5489 5494 5496 5498
5500 5505 5507 5509 5511 5516 5518 5520 5522 5532 5534 5540 5548 5557
5559 5717 5719 5721 5723 5725 5727 5732 5734 5736 5738 5743 5745 5747
5749 5754 5756 5758 5760 5765 5767 5769 5771 5776 5778 5780 5782 5787
5789 5791 5793 5803 5805 5811 5819 5828 5830 6031 6033 6035 6040 6042
6044 6049 6051 6053 6058 6060 6065 6067 6069 6073 6079 6081 6092 6094
6100 6102 6106 6111 6113 6290 6292 6294 6299 6301 6303 6308 6310 6312
6317 6319 6324 6326 6328 6332 6338 6340 6352 6354 6358 6360 6364 6366
6372 6377 6379 6554 6556 6558 6563 6565 6567 6572 6574 6576 6581 6583
6588 6590 6592 6596 6602 6604 6615 6617 6623 6625 6629 6634 6636 6825
6827 6829 6833 6835 6839 6954 6956 6958 6960 6962 6967 6969 6975 6977
6985 6987 6992 6994 7000 7002 7010 7012 7017 7019 7025 7027 7035 7037
7042 7044 7050 7052 7054 7061 7380 7382 7384 7386 7388 7393 7395 7401
7403 7411 7413 7418 7420 7426 7428 7436 7438 7443 7445 7451 7453 7455
7460 7462 7464 7470 7472 7480 7482 7487 7489 7495 7497 7499 7506
.MJMAP 1070 1074 1082 2004 2010 2019 2025 2109 2111 2197 2281 2285 2362 2366
2370 2449 2451 2533 2535 2633 2637 2777 2781 2785 2789 2793 2797 2801
2805 2809 2813 2817 2821 2825 2829 2833 2837 2841 2845 2849 2853 2857
2861 2865 2869 2953 3129 3133 3139 3253 3255 3257 3259 3262 3271 3282
3291 3295 3369 3371 3373 3445 3447 3449 3595 3597 3599 3803 3816 3825
3834 3843 3858 3867 3876 3885 3890 3897 3899 3901 4024 4037 4046 4055
4064 4079 4088 4097 4106 4111 4118 4120 4122 4243 4256 4265 4274 4283
4298 4307 4316 4325 4330 4337 4339 4341 4601 4603 4605 4889 4893 4907
4909 4914 4920 4925 4939 5036 5038 5040 5163 5165 5167 5283 5285 5287
5446 5448 5450 5452 5454 5456 5461 5467 5472 5478 5483 5489 5494 5500
5505 5511 5516 5522 5540 5557 5559 5717 5719 5721 5723 5725 5727 5732
5738 5743 5749 5754 5760 5765 5771 5776 5782 5787 5793 5811 5828 5830
6031 6035 6040 6044 6049 6053 6058 6060 6065 6069 6073 6102 6106 6111
6113 6290 6294 6299 6303 6308 6312 6317 6319 6324 6328 6332 6366 6372
6377 6379 6554 6558 6563 6567 6572 6576 6581 6583 6588 6592 6596 6625 SEQ 0678
6629 6634 6636 6825 6835 6839 6954 6969 6977 6987 6994 7002 7012 7019
7027 7037 7044 7052 7054 7061 7380 7395 7403 7413 7420 7428 7438 7445
7453 7455 7460 7464 7472 7482 7489 7497 7499 7506
.MJZ 1086 1648 2201 2372 3525 3679 4430 4683 4759 4884
.MLDCT 1076 3265 3274 3807 4028 4247 4897 4901 4927 5463 5474 5485 5496 5507
5518 5532 5734 5745 5756 5767 5778 5789 5803 6079 6092 6338 6352 6358
6602 6615 6827 6956 6960 7382 7386
.MLDLM 2955
.MMGC 1076 1084 2006 2008 2012 2017 2021 2023 2107 2195 2199 2279 2283 2362
2364 2368 2447 2531 2631 2635 2777 2779 2781 2783 2785 2787 2789 2791
2793 2795 2797 2799 2801 2803 2805 2807 2809 2811 2813 2815 2817 2819
2821 2823 2825 2827 2829 2831 2833 2835 2837 2839 2841 2843 2845 2847
2849 2851 2853 2855 2857 2859 2861 2863 2865 2867 2869 2871 2955 2957
2959 3135 3137 3287 3293 3525 3679 3814 3818 3830 3832 3836 3841 3845
3863 3865 3869 3874 3878 4035 4039 4051 4053 4057 4062 4066 4084 4086
4090 4095 4099 4254 4258 4270 4272 4276 4281 4285 4303 4305 4309 4314
4318 4895 4897 4901 4905 4909 4914 4933 4935 4941 5446 5448 5450 5452
5454 5456 5467 5478 5489 5500 5511 5522 5536 5538 5557 5717 5719 5721
5723 5725 5727 5738 5749 5760 5771 5782 5793 5807 5809 5828 6033 6035
6042 6044 6051 6053 6060 6071 6096 6098 6104 6111 6292 6294 6301 6303
6310 6312 6319 6330 6356 6358 6362 6368 6370 6377 6556 6558 6565 6567
6574 6576 6583 6594 6619 6621 6627 6634 6825 6831 6833 6837 6954 6967
6971 6977 6983 6985 6989 6992 6996 7002 7008 7010 7014 7017 7021 7027
7033 7035 7039 7042 7046 7052 7054 7059 7380 7393 7397 7403 7409 7411
7415 7418 7422 7428 7434 7436 7440 7443 7447 7453 7455 7462 7466 7472
7478 7480 7484 7487 7491 7497 7499 7504
.MOENA 1084 2006 2023 2362 2779 2783 2787 2791 2795 2799 2803 2807 2811 2815
2819 2823 2827 2831 2835 2839 2843 2847 2851 2855 2859 2863 2867 2871
2955 2959 3137 3287 3293 3525 3679 3830 3863 4051 4084 4270 4303 4933
5536 5557 5807 5828 6096 6111 6356 6368 6377 6619 6634 6831 6983 7008
7033 7059 7409 7434 7478 7504
.MOR 1076 1084 2012 2021 2023 2777 2779 2781 2783 2785 2787 2789 2791 2793
2795 2797 2799 2801 2803 2805 2807 2809 2811 2813 2815 2817 2819 2821
2823 2825 2827 2829 2831 2833 2835 2837 2839 2841 2843 2845 2847 2849
2851 2853 2855 2857 2859 2861 2863 2865 2867 2869 2871 2955 2957 2959
3135 3137 3269 3278 3287 3818 3830 3836 3845 3878 4039 4051 4057 4066
4099 4258 4270 4276 4285 4318 4895 4897 4899 4901 4903 4909 4925 4931
4933 4941 5446 5448 5450 5452 5454 5456 5467 5478 5489 5500 5511 5522
5534 5536 5548 5550 5557 5717 5719 5721 5723 5725 5727 5738 5749 5760
5771 5782 5793 5805 5807 5819 5821 5828 6033 6035 6042 6044 6051 6053
6060 6071 6079 6081 6094 6096 6104 6111 6292 6294 6301 6303 6310 6312
6319 6330 6338 6340 6354 6356 6358 6368 6377 6556 6558 6565 6567 6574
6576 6583 6594 6602 6604 6617 6619 6627 6634 6825 6829 6831 6837 6954
6958 6962 6971 6977 6996 7002 7008 7021 7027 7046 7052 7054 7059 7380
7384 7388 7397 7403 7422 7428 7434 7447 7453 7455 7466 7472 7478 7491
7497 7499 7504
.MPLUS 3267 3271 3276 3280 3805 3809 4026 4030 4245 4249 4916 5463 5474 5485
5496 5507 5518 5734 5745 5756 5767 5778 5789
.MRDLM 2957 3525 3679
.MRPCT 1078 3269 3278 3809 4030 4249 4899 4903 4929 5534 5548 5805 5819 6081
6094 6340 6354 6360 6604 6617 6829 6958 6962 7384 7388
.MS0A 1084 2012 2023 2362 2779 2783 2787 2791 2795 2799 2803 2807 2811 2815
2819 2823 2827 2831 2835 2839 2843 2847 2851 2855 2859 2863 2867 2871 SEQ 0679
2955 2959 3137 3253 3255 3257 3259 3262 3287 3830 3836 3863 4051 4057
4084 4270 4276 4303 4914 4925 5461 5472 5483 5494 5505 5516 5530 5534
5546 5548 5552 5557 5732 5743 5754 5765 5776 5787 5801 5805 5817 5819
5823 5828 6079 6090 6094 6111 6338 6350 6354 6368 6377 6602 6613 6617
6634 6829 6831 6837 6983 7008 7033 7059 7409 7434 7478 7504
.MS0B 2006 3267 3269 3271 3276 3278 3280 3282 3805 4026 4245 4899 4903 4916
4933 6081 6340 6360 6604 6958 6962 7384 7388
.MSAB 3809 3823 3850 3883 4030 4044 4071 4104 4249 4263 4290 4323 4931 5463
5474 5485 5496 5507 5518 5536 5550 5734 5745 5756 5767 5778 5789 5807
5821 6096 6356 6619 6973 6975 6998 7000 7023 7025 7048 7050 7399 7401
7424 7426 7449 7451 7468 7470 7493 7495
.MSD0 1076 2004 2021 2777 2781 2785 2789 2793 2797 2801 2805 2809 2813 2817
2821 2825 2829 2833 2837 2841 2845 2849 2853 2857 2861 2865 2869 2953
2957 3135 3803 3818 3845 3878 4024 4039 4066 4099 4243 4258 4285 4318
4895 4897 4901 4909 4941 5446 5448 5450 5452 5454 5456 5467 5478 5489
5500 5511 5522 5717 5719 5721 5723 5725 5727 5738 5749 5760 5771 5782
5793 6033 6035 6042 6044 6051 6053 6060 6071 6104 6292 6294 6301 6303
6310 6312 6319 6330 6358 6556 6558 6565 6567 6574 6576 6583 6594 6627
6825 6954 6971 6977 6996 7002 7021 7027 7046 7052 7054 7380 7397 7403
7422 7428 7447 7453 7455 7466 7472 7491 7497 7499
.MSELE 1076 1084 2006 2008 2012 2017 2021 2023 2107 2195 2199 2279 2283 2362
2364 2368 2447 2531 2631 2635 2779 2783 2787 2791 2795 2799 2803 2807
2811 2815 2819 2823 2827 2831 2835 2839 2843 2847 2851 2855 2859 2863
2867 2871 2959 3135 3137 3287 3293 3525 3679 3814 3818 3830 3832 3836
3841 3845 3863 3865 3869 3874 3878 4035 4039 4051 4053 4057 4062 4066
4084 4086 4090 4095 4099 4254 4258 4270 4272 4276 4281 4285 4303 4305
4309 4314 4318 4895 4905 4909 4914 4933 4935 4941 5536 5538 5557 5807
5809 5828 6071 6096 6098 6104 6111 6330 6356 6362 6368 6370 6377 6594
6619 6621 6627 6634 6831 6833 6837 6967 6971 6983 6985 6989 6992 6996
7008 7010 7014 7017 7021 7033 7035 7039 7042 7046 7059 7393 7397 7409
7411 7415 7418 7422 7434 7436 7440 7443 7447 7462 7466 7478 7480 7484
7487 7491 7504
.MSKCN 2777 2781 2785 2789 2793 2797 2801 2805 2809 2813 2817 2821 2825 2829
2833 2837 2841 2845 2849 2853 2857 2861 2865 2869 4897 4901 5446 5448
5450 5452 5454 5456 5467 5478 5489 5500 5511 5522 5717 5719 5721 5723
5725 5727 5738 5749 5760 5771 5782 5793 6033 6035 6042 6044 6051 6053
6060 6292 6294 6301 6303 6310 6312 6319 6358 6556 6558 6565 6567 6574
6576 6583 6825 6954 6977 7002 7027 7052 7054 7380 7403 7428 7453 7455
7472 7497 7499
.MXNOR 2006 3262 3282
.MXOR 7025 7050 7470
.PION 33# 4997 5105 5222
.RA 2012 2023 2362 3262 3287 3809 3823 3830 3836 3850 3863 3883 4030 4044
4051 4057 4071 4084 4104 4249 4263 4270 4276 4290 4303 4323 4925 4931
5557 5828 6111 6368 6377 6634 6837 6973 6975 6998 7000 7008 7023 7025
7033 7048 7050 7399 7401 7424 7426 7434 7449 7451 7468 7470 7478 7493
7495
.RAND 2004 2362 2953 3253 3255 3257 3259 3803 3823 3850 3863 3883 4024 4044
4071 4084 4104 4243 4263 4290 4303 4323 4914 5461 5472 5483 5494 5505
5516 5530 5546 5552 5732 5743 5754 5765 5776 5787 5801 5817 5823 6090
6350 6613 6973 6975 6983 6998 7000 7023 7033 7048 7399 7401 7409 7424
7426 7449 7451 7468 7493 7495
.RB 2004 2006 2021 3253 3255 3257 3259 3262 3267 3269 3271 3276 3278 3280 SEQ 0680
3282 3803 3805 3809 3818 3823 3845 3850 3878 3883 4024 4026 4030 4039
4044 4066 4071 4099 4104 4243 4245 4249 4258 4263 4285 4290 4318 4323
4895 4897 4899 4901 4903 4909 4914 4916 4925 4931 4933 4941 5530 5536
5546 5550 5801 5807 5817 5821 6071 6079 6081 6090 6096 6104 6330 6338
6340 6350 6356 6358 6360 6594 6602 6604 6613 6619 6627 6954 6958 6962
6971 6973 6975 6996 6998 7000 7021 7023 7025 7046 7048 7050 7380 7384
7388 7397 7399 7401 7422 7424 7426 7447 7449 7451 7466 7468 7470 7491
7493 7495
.RBAD 3371 3447 3597 4603 5038 5165 5285
.RCCCC 3856 4077 4296
.RCCER 1072 1080 3131 3289 4891 4937 6067 6100 6326 6364 6590 6623
.RCCFZ 3823 3850 3883 4044 4071 4104 4263 4290 4323 6975 7000 7025 7050 7401
7426 7451 7470 7495
.RCCGC 2008 2017 2107 2195 2279 2364 2447 2531 2631 3814 3832 3841 3865 3874
4035 4053 4062 4086 4095 4254 4272 4281 4305 4314 4905 6833 6967 6985
6992 7010 7017 7035 7042 7393 7411 7418 7436 7443 7462 7480 7487
.RCCIA 4918
.RCENA 1072 1080 2008 2017 2107 2195 2279 2364 2447 2531 2631 3131 3289 3814
3823 3832 3841 3850 3856 3865 3874 3883 4035 4044 4053 4062 4071 4077
4086 4095 4104 4254 4263 4272 4281 4290 4296 4305 4314 4323 4891 4905
4918 4937 6067 6100 6326 6364 6590 6623 6833 6967 6975 6985 6992 7000
7010 7017 7025 7035 7042 7050 7393 7401 7411 7418 7426 7436 7443 7451
7462 7470 7480 7487 7495
.RCJP 1072 1080 2008 2017 2107 2195 2279 2364 2447 2531 2631 3131 3289 3814
3823 3832 3841 3850 3856 3865 3874 3883 4035 4044 4053 4062 4071 4077
4086 4095 4104 4254 4263 4272 4281 4290 4296 4305 4314 4323 4891 4905
4918 4937 6067 6100 6326 6364 6590 6623 6833 6967 6975 6985 6992 7000
7010 7017 7025 7035 7042 7050 7393 7401 7411 7418 7426 7436 7443 7451
7462 7470 7480 7487 7495
.RCJS 4916 5465 5476 5487 5498 5509 5520 5736 5747 5758 5769 5780 5791 6033
6042 6051 6292 6301 6310 6556 6565 6574
.RCONT 1084 2006 2012 2021 2023 2199 2283 2368 2635 2779 2783 2787 2791 2795
2799 2803 2807 2811 2815 2819 2823 2827 2831 2835 2839 2843 2847 2851
2855 2859 2863 2867 2871 2955 2957 2959 3135 3137 3267 3276 3280 3287
3293 3805 3818 3830 3836 3845 3863 3869 3878 4026 4039 4051 4057 4066
4084 4090 4099 4245 4258 4270 4276 4285 4303 4309 4318 4895 4931 4933
4935 4941 5530 5536 5538 5546 5550 5801 5807 5809 5817 5821 6071 6090
6096 6098 6104 6330 6350 6356 6362 6368 6370 6594 6613 6619 6621 6627
6831 6837 6971 6973 6983 6989 6996 6998 7008 7014 7021 7023 7033 7039
7046 7048 7059 7397 7399 7409 7415 7422 7424 7434 7440 7447 7449 7466
7468 7478 7484 7491 7493 7504
.RCRTN 4943 5552 5823 6083 6342 6606
.RCRY 3267 3271 3276 3280 3805 4026 4245 4916 5463 5474 5485 5496 5507 5518
5734 5745 5756 5767 5778 5789
.RD 1076 1084 2004 2006 2012 2021 2023 2362 2777 2779 2781 2783 2785 2787
2789 2791 2793 2795 2797 2799 2801 2803 2805 2807 2809 2811 2813 2815
2817 2819 2821 2823 2825 2827 2829 2831 2833 2835 2837 2839 2841 2843
2845 2847 2849 2851 2853 2855 2857 2859 2861 2863 2865 2867 2869 2871
2953 2955 2957 2959 3135 3137 3139 3253 3255 3257 3259 3262 3265 3267
3269 3271 3274 3276 3278 3280 3282 3287 3293 3295 3803 3805 3809 3818
3823 3830 3836 3845 3850 3863 3878 3883 4024 4026 4030 4039 4044 4051
4057 4066 4071 4084 4099 4104 4243 4245 4249 4258 4263 4270 4276 4285
4290 4303 4318 4323 4895 4897 4899 4901 4903 4909 4914 4916 4925 4927 SEQ 0681
4931 4933 4941 5446 5448 5450 5452 5454 5456 5461 5463 5467 5472 5474
5478 5483 5485 5489 5494 5496 5500 5505 5507 5511 5516 5518 5522 5530
5532 5534 5536 5546 5548 5550 5552 5557 5717 5719 5721 5723 5725 5727
5732 5734 5738 5743 5745 5749 5754 5756 5760 5765 5767 5771 5776 5778
5782 5787 5789 5793 5801 5803 5805 5807 5817 5819 5821 5823 5828 6033
6035 6042 6044 6051 6053 6060 6071 6073 6079 6081 6090 6092 6094 6096
6100 6102 6104 6111 6292 6294 6301 6303 6310 6312 6319 6330 6332 6338
6340 6350 6352 6354 6356 6358 6360 6364 6366 6368 6370 6377 6556 6558
6565 6567 6574 6576 6583 6594 6596 6602 6604 6613 6615 6617 6619 6623
6625 6627 6634 6825 6827 6829 6831 6954 6958 6962 6971 6973 6975 6977
6983 6996 6998 7000 7002 7008 7021 7023 7025 7027 7033 7046 7048 7050
7052 7054 7059 7061 7380 7384 7388 7397 7399 7401 7403 7409 7422 7424
7426 7428 7434 7447 7449 7451 7453 7455 7466 7468 7470 7472 7478 7491
7493 7495 7497 7499 7504 7506
.RJ 1070 1072 1074 1076 1078 1080 1082 2004 2008 2010 2017 2019 2025 2107
2109 2111 2195 2197 2279 2281 2285 2362 2364 2366 2370 2447 2449 2451
2531 2533 2535 2631 2633 2637 2777 2781 2785 2789 2793 2797 2801 2805
2809 2813 2817 2821 2825 2829 2833 2837 2841 2845 2849 2853 2857 2861
2865 2869 2953 3129 3131 3133 3139 3253 3255 3257 3259 3262 3265 3269
3271 3274 3278 3282 3289 3291 3295 3369 3371 3373 3445 3447 3449 3595
3597 3599 3803 3807 3809 3814 3816 3823 3825 3832 3834 3841 3843 3850
3856 3858 3865 3867 3874 3876 3883 3885 3890 3897 3899 3901 4024 4028
4030 4035 4037 4044 4046 4053 4055 4062 4064 4071 4077 4079 4086 4088
4095 4097 4104 4106 4111 4118 4120 4122 4243 4247 4249 4254 4256 4263
4265 4272 4274 4281 4283 4290 4296 4298 4305 4307 4314 4316 4323 4325
4330 4337 4339 4341 4601 4603 4605 4889 4891 4893 4897 4899 4901 4903
4905 4907 4909 4914 4916 4918 4920 4925 4927 4929 4937 4939 5036 5038
5040 5163 5165 5167 5283 5285 5287 5446 5448 5450 5452 5454 5456 5461
5463 5465 5467 5472 5474 5476 5478 5483 5485 5487 5489 5494 5496 5498
5500 5505 5507 5509 5511 5516 5518 5520 5522 5532 5534 5540 5548 5557
5559 5717 5719 5721 5723 5725 5727 5732 5734 5736 5738 5743 5745 5747
5749 5754 5756 5758 5760 5765 5767 5769 5771 5776 5778 5780 5782 5787
5789 5791 5793 5803 5805 5811 5819 5828 5830 6031 6033 6035 6040 6042
6044 6049 6051 6053 6058 6060 6065 6067 6069 6073 6079 6081 6092 6094
6100 6102 6106 6111 6113 6290 6292 6294 6299 6301 6303 6308 6310 6312
6317 6319 6324 6326 6328 6332 6338 6340 6352 6354 6358 6360 6364 6366
6372 6377 6379 6554 6556 6558 6563 6565 6567 6572 6574 6576 6581 6583
6588 6590 6592 6596 6602 6604 6615 6617 6623 6625 6629 6634 6636 6825
6827 6829 6833 6835 6839 6954 6956 6958 6960 6962 6967 6969 6975 6977
6985 6987 6992 6994 7000 7002 7010 7012 7017 7019 7025 7027 7035 7037
7042 7044 7050 7052 7054 7061 7380 7382 7384 7386 7388 7393 7395 7401
7403 7411 7413 7418 7420 7426 7428 7436 7438 7443 7445 7451 7453 7455
7460 7462 7464 7470 7472 7480 7482 7487 7489 7495 7497 7499 7506
.RJMAP 1070 1074 1082 2004 2010 2019 2025 2109 2111 2197 2281 2285 2362 2366
2370 2449 2451 2533 2535 2633 2637 2777 2781 2785 2789 2793 2797 2801
2805 2809 2813 2817 2821 2825 2829 2833 2837 2841 2845 2849 2853 2857
2861 2865 2869 2953 3129 3133 3139 3253 3255 3257 3259 3262 3271 3282
3291 3295 3369 3371 3373 3445 3447 3449 3595 3597 3599 3803 3816 3825
3834 3843 3858 3867 3876 3885 3890 3897 3899 3901 4024 4037 4046 4055
4064 4079 4088 4097 4106 4111 4118 4120 4122 4243 4256 4265 4274 4283
4298 4307 4316 4325 4330 4337 4339 4341 4601 4603 4605 4889 4893 4907
4909 4914 4920 4925 4939 5036 5038 5040 5163 5165 5167 5283 5285 5287
5446 5448 5450 5452 5454 5456 5461 5467 5472 5478 5483 5489 5494 5500 SEQ 0682
5505 5511 5516 5522 5540 5557 5559 5717 5719 5721 5723 5725 5727 5732
5738 5743 5749 5754 5760 5765 5771 5776 5782 5787 5793 5811 5828 5830
6031 6035 6040 6044 6049 6053 6058 6060 6065 6069 6073 6102 6106 6111
6113 6290 6294 6299 6303 6308 6312 6317 6319 6324 6328 6332 6366 6372
6377 6379 6554 6558 6563 6567 6572 6576 6581 6583 6588 6592 6596 6625
6629 6634 6636 6825 6835 6839 6954 6969 6977 6987 6994 7002 7012 7019
7027 7037 7044 7052 7054 7061 7380 7395 7403 7413 7420 7428 7438 7445
7453 7455 7460 7464 7472 7482 7489 7497 7499 7506
.RJZ 1086 1648 2201 2372 3525 3679 4430 4683 4759 4884
.RLDCT 1076 3265 3274 3807 4028 4247 4897 4901 4927 5463 5474 5485 5496 5507
5518 5532 5734 5745 5756 5767 5778 5789 5803 6079 6092 6338 6352 6358
6602 6615 6827 6956 6960 7382 7386
.RLDLM 2955
.RMGC 1076 1084 2006 2008 2012 2017 2021 2023 2107 2195 2199 2279 2283 2362
2364 2368 2447 2531 2631 2635 2777 2779 2781 2783 2785 2787 2789 2791
2793 2795 2797 2799 2801 2803 2805 2807 2809 2811 2813 2815 2817 2819
2821 2823 2825 2827 2829 2831 2833 2835 2837 2839 2841 2843 2845 2847
2849 2851 2853 2855 2857 2859 2861 2863 2865 2867 2869 2871 2955 2957
2959 3135 3137 3287 3293 3525 3679 3814 3818 3830 3832 3836 3841 3845
3863 3865 3869 3874 3878 4035 4039 4051 4053 4057 4062 4066 4084 4086
4090 4095 4099 4254 4258 4270 4272 4276 4281 4285 4303 4305 4309 4314
4318 4895 4897 4901 4905 4909 4914 4933 4935 4941 5446 5448 5450 5452
5454 5456 5467 5478 5489 5500 5511 5522 5536 5538 5557 5717 5719 5721
5723 5725 5727 5738 5749 5760 5771 5782 5793 5807 5809 5828 6033 6035
6042 6044 6051 6053 6060 6071 6096 6098 6104 6111 6292 6294 6301 6303
6310 6312 6319 6330 6356 6358 6362 6368 6370 6377 6556 6558 6565 6567
6574 6576 6583 6594 6619 6621 6627 6634 6825 6831 6833 6837 6954 6967
6971 6977 6983 6985 6989 6992 6996 7002 7008 7010 7014 7017 7021 7027
7033 7035 7039 7042 7046 7052 7054 7059 7380 7393 7397 7403 7409 7411
7415 7418 7422 7428 7434 7436 7440 7443 7447 7453 7455 7462 7466 7472
7478 7480 7484 7487 7491 7497 7499 7504
.ROENA 1084 2006 2023 2362 2779 2783 2787 2791 2795 2799 2803 2807 2811 2815
2819 2823 2827 2831 2835 2839 2843 2847 2851 2855 2859 2863 2867 2871
2955 2959 3137 3287 3293 3525 3679 3830 3863 4051 4084 4270 4303 4933
5536 5557 5807 5828 6096 6111 6356 6368 6377 6619 6634 6831 6983 7008
7033 7059 7409 7434 7478 7504
.ROR 1076 1084 2012 2021 2023 2777 2779 2781 2783 2785 2787 2789 2791 2793
2795 2797 2799 2801 2803 2805 2807 2809 2811 2813 2815 2817 2819 2821
2823 2825 2827 2829 2831 2833 2835 2837 2839 2841 2843 2845 2847 2849
2851 2853 2855 2857 2859 2861 2863 2865 2867 2869 2871 2955 2957 2959
3135 3137 3269 3278 3287 3818 3830 3836 3845 3878 4039 4051 4057 4066
4099 4258 4270 4276 4285 4318 4895 4897 4899 4901 4903 4909 4925 4931
4933 4941 5446 5448 5450 5452 5454 5456 5467 5478 5489 5500 5511 5522
5534 5536 5548 5550 5557 5717 5719 5721 5723 5725 5727 5738 5749 5760
5771 5782 5793 5805 5807 5819 5821 5828 6033 6035 6042 6044 6051 6053
6060 6071 6079 6081 6094 6096 6104 6111 6292 6294 6301 6303 6310 6312
6319 6330 6338 6340 6354 6356 6358 6368 6377 6556 6558 6565 6567 6574
6576 6583 6594 6602 6604 6617 6619 6627 6634 6825 6829 6831 6837 6954
6958 6962 6971 6977 6996 7002 7008 7021 7027 7046 7052 7054 7059 7380
7384 7388 7397 7403 7422 7428 7434 7447 7453 7455 7466 7472 7478 7491
7497 7499 7504
.RPLUS 3267 3271 3276 3280 3805 3809 4026 4030 4245 4249 4916 5463 5474 5485
5496 5507 5518 5734 5745 5756 5767 5778 5789 SEQ 0683
.RRDLM 2957 3525 3679
.RRPCT 1078 3269 3278 3809 4030 4249 4899 4903 4929 5534 5548 5805 5819 6081
6094 6340 6354 6360 6604 6617 6829 6958 6962 7384 7388
.RS0A 1084 2012 2023 2362 2779 2783 2787 2791 2795 2799 2803 2807 2811 2815
2819 2823 2827 2831 2835 2839 2843 2847 2851 2855 2859 2863 2867 2871
2955 2959 3137 3253 3255 3257 3259 3262 3287 3830 3836 3863 4051 4057
4084 4270 4276 4303 4914 4925 5461 5472 5483 5494 5505 5516 5530 5534
5546 5548 5552 5557 5732 5743 5754 5765 5776 5787 5801 5805 5817 5819
5823 5828 6079 6090 6094 6111 6338 6350 6354 6368 6377 6602 6613 6617
6634 6829 6831 6837 6983 7008 7033 7059 7409 7434 7478 7504
.RS0B 2006 3267 3269 3271 3276 3278 3280 3282 3805 4026 4245 4899 4903 4916
4933 6081 6340 6360 6604 6958 6962 7384 7388
.RSAB 3809 3823 3850 3883 4030 4044 4071 4104 4249 4263 4290 4323 4931 5463
5474 5485 5496 5507 5518 5536 5550 5734 5745 5756 5767 5778 5789 5807
5821 6096 6356 6619 6973 6975 6998 7000 7023 7025 7048 7050 7399 7401
7424 7426 7449 7451 7468 7470 7493 7495
.RSD0 1076 2004 2021 2777 2781 2785 2789 2793 2797 2801 2805 2809 2813 2817
2821 2825 2829 2833 2837 2841 2845 2849 2853 2857 2861 2865 2869 2953
2957 3135 3803 3818 3845 3878 4024 4039 4066 4099 4243 4258 4285 4318
4895 4897 4901 4909 4941 5446 5448 5450 5452 5454 5456 5467 5478 5489
5500 5511 5522 5717 5719 5721 5723 5725 5727 5738 5749 5760 5771 5782
5793 6033 6035 6042 6044 6051 6053 6060 6071 6104 6292 6294 6301 6303
6310 6312 6319 6330 6358 6556 6558 6565 6567 6574 6576 6583 6594 6627
6825 6954 6971 6977 6996 7002 7021 7027 7046 7052 7054 7380 7397 7403
7422 7428 7447 7453 7455 7466 7472 7491 7497 7499
.RSELE 1076 1084 2006 2008 2012 2017 2021 2023 2107 2195 2199 2279 2283 2362
2364 2368 2447 2531 2631 2635 2779 2783 2787 2791 2795 2799 2803 2807
2811 2815 2819 2823 2827 2831 2835 2839 2843 2847 2851 2855 2859 2863
2867 2871 2959 3135 3137 3287 3293 3525 3679 3814 3818 3830 3832 3836
3841 3845 3863 3865 3869 3874 3878 4035 4039 4051 4053 4057 4062 4066
4084 4086 4090 4095 4099 4254 4258 4270 4272 4276 4281 4285 4303 4305
4309 4314 4318 4895 4905 4909 4914 4933 4935 4941 5536 5538 5557 5807
5809 5828 6071 6096 6098 6104 6111 6330 6356 6362 6368 6370 6377 6594
6619 6621 6627 6634 6831 6833 6837 6967 6971 6983 6985 6989 6992 6996
7008 7010 7014 7017 7021 7033 7035 7039 7042 7046 7059 7393 7397 7409
7411 7415 7418 7422 7434 7436 7440 7443 7447 7462 7466 7478 7480 7484
7487 7491 7504
.RSKCN 2777 2781 2785 2789 2793 2797 2801 2805 2809 2813 2817 2821 2825 2829
2833 2837 2841 2845 2849 2853 2857 2861 2865 2869 4897 4901 5446 5448
5450 5452 5454 5456 5467 5478 5489 5500 5511 5522 5717 5719 5721 5723
5725 5727 5738 5749 5760 5771 5782 5793 6033 6035 6042 6044 6051 6053
6060 6292 6294 6301 6303 6310 6312 6319 6358 6556 6558 6565 6567 6574
6576 6583 6825 6954 6977 7002 7027 7052 7054 7380 7403 7428 7453 7455
7472 7497 7499
.RXNOR 2006 3262 3282
.RXOR 7025 7050 7470
ATABLE 2719 2721 2723 2725 2727 2729 2731 2733 2735 2737 2739 2741 2743 2745
2747 2749 2751 2753 2755 2757 2759 2761 2763 2765 2767 2942 2944 SEQ 0684
CALC 1070 1072 1074 1076 1078 1080 1082 1084 1086 1648 2004 2006 2008 2010
2012 2017 2019 2021 2023 2025 2107 2109 2111 2195 2197 2199 2201 2279
2281 2283 2285 2362 2364 2366 2368 2370 2372 2447 2449 2451 2531 2533
2535 2631 2633 2635 2637 2777 2779 2781 2783 2785 2787 2789 2791 2793
2795 2797 2799 2801 2803 2805 2807 2809 2811 2813 2815 2817 2819 2821
2823 2825 2827 2829 2831 2833 2835 2837 2839 2841 2843 2845 2847 2849
2851 2853 2855 2857 2859 2861 2863 2865 2867 2869 2871 2953 2955 2957
2959 3129 3131 3133 3135 3137 3139 3253 3255 3257 3259 3262 3265 3267
3269 3271 3274 3276 3278 3280 3282 3287 3289 3291 3293 3295 3369 3371
3373 3445 3447 3449 3525 3595 3597 3599 3679 3803 3805 3807 3809 3814
3816 3818 3823 3825 3830 3832 3834 3836 3841 3843 3845 3850 3856 3858
3863 3865 3867 3869 3874 3876 3878 3883 3885 3890 3897 3899 3901 4024
4026 4028 4030 4035 4037 4039 4044 4046 4051 4053 4055 4057 4062 4064
4066 4071 4077 4079 4084 4086 4088 4090 4095 4097 4099 4104 4106 4111
4118 4120 4122 4243 4245 4247 4249 4254 4256 4258 4263 4265 4270 4272
4274 4276 4281 4283 4285 4290 4296 4298 4303 4305 4307 4309 4314 4316
4318 4323 4325 4330 4337 4339 4341 4430 4601 4603 4605 4683 4759 4884
4889 4891 4893 4895 4897 4899 4901 4903 4905 4907 4909 4914 4916 4918
4920 4925 4927 4929 4931 4933 4935 4937 4939 4941 4943 5036 5038 5040
5163 5165 5167 5283 5285 5287 5446 5448 5450 5452 5454 5456 5461 5463
5465 5467 5472 5474 5476 5478 5483 5485 5487 5489 5494 5496 5498 5500
5505 5507 5509 5511 5516 5518 5520 5522 5530 5532 5534 5536 5538 5540
5546 5548 5550 5552 5557 5559 5717 5719 5721 5723 5725 5727 5732 5734
5736 5738 5743 5745 5747 5749 5754 5756 5758 5760 5765 5767 5769 5771
5776 5778 5780 5782 5787 5789 5791 5793 5801 5803 5805 5807 5809 5811
5817 5819 5821 5823 5828 5830 6031 6033 6035 6040 6042 6044 6049 6051
6053 6058 6060 6065 6067 6069 6071 6073 6079 6081 6083 6090 6092 6094
6096 6098 6100 6102 6104 6106 6111 6113 6290 6292 6294 6299 6301 6303
6308 6310 6312 6317 6319 6324 6326 6328 6330 6332 6338 6340 6342 6350
6352 6354 6356 6358 6360 6362 6364 6366 6368 6370 6372 6377 6379 6554
6556 6558 6563 6565 6567 6572 6574 6576 6581 6583 6588 6590 6592 6594
6596 6602 6604 6606 6613 6615 6617 6619 6621 6623 6625 6627 6629 6634
6636 6825 6827 6829 6831 6833 6835 6837 6839 6954 6956 6958 6960 6962
6967 6969 6971 6973 6975 6977 6983 6985 6987 6989 6992 6994 6996 6998
7000 7002 7008 7010 7012 7014 7017 7019 7021 7023 7025 7027 7033 7035
7037 7039 7042 7044 7046 7048 7050 7052 7054 7059 7061 7380 7382 7384
7386 7388 7393 7395 7397 7399 7401 7403 7409 7411 7413 7415 7418 7420
7422 7424 7426 7428 7434 7436 7438 7440 7443 7445 7447 7449 7451 7453
7455 7460 7462 7464 7466 7468 7470 7472 7478 7480 7482 7484 7487 7489
7491 7493 7495 7497 7499 7504 7506
CONCAT 1070 1072 1074 1076 1078 1080 1082 1084 1086 1648 2004 2006 2008 2010
2012 2017 2019 2021 2023 2025 2107 2109 2111 2195 2197 2199 2201 2279
2281 2283 2285 2362 2364 2366 2368 2370 2372 2447 2449 2451 2531 2533
2535 2631 2633 2635 2637 2777 2779 2781 2783 2785 2787 2789 2791 2793
2795 2797 2799 2801 2803 2805 2807 2809 2811 2813 2815 2817 2819 2821
2823 2825 2827 2829 2831 2833 2835 2837 2839 2841 2843 2845 2847 2849
2851 2853 2855 2857 2859 2861 2863 2865 2867 2869 2871 2953 2955 2957
2959 3129 3131 3133 3135 3137 3139 3253 3255 3257 3259 3262 3265 3267
3269 3271 3274 3276 3278 3280 3282 3287 3289 3291 3293 3295 3369 3371
3373 3445 3447 3449 3525 3595 3597 3599 3679 3803 3805 3807 3809 3814
3816 3818 3823 3825 3830 3832 3834 3836 3841 3843 3845 3850 3856 3858
3863 3865 3867 3869 3874 3876 3878 3883 3885 3890 3897 3899 3901 4024
4026 4028 4030 4035 4037 4039 4044 4046 4051 4053 4055 4057 4062 4064 SEQ 0685
4066 4071 4077 4079 4084 4086 4088 4090 4095 4097 4099 4104 4106 4111
4118 4120 4122 4243 4245 4247 4249 4254 4256 4258 4263 4265 4270 4272
4274 4276 4281 4283 4285 4290 4296 4298 4303 4305 4307 4309 4314 4316
4318 4323 4325 4330 4337 4339 4341 4430 4601 4603 4605 4683 4759 4884
4889 4891 4893 4895 4897 4899 4901 4903 4905 4907 4909 4914 4916 4918
4920 4925 4927 4929 4931 4933 4935 4937 4939 4941 4943 5036 5038 5040
5163 5165 5167 5283 5285 5287 5446 5448 5450 5452 5454 5456 5461 5463
5465 5467 5472 5474 5476 5478 5483 5485 5487 5489 5494 5496 5498 5500
5505 5507 5509 5511 5516 5518 5520 5522 5530 5532 5534 5536 5538 5540
5546 5548 5550 5552 5557 5559 5717 5719 5721 5723 5725 5727 5732 5734
5736 5738 5743 5745 5747 5749 5754 5756 5758 5760 5765 5767 5769 5771
5776 5778 5780 5782 5787 5789 5791 5793 5801 5803 5805 5807 5809 5811
5817 5819 5821 5823 5828 5830 6031 6033 6035 6040 6042 6044 6049 6051
6053 6058 6060 6065 6067 6069 6071 6073 6079 6081 6083 6090 6092 6094
6096 6098 6100 6102 6104 6106 6111 6113 6290 6292 6294 6299 6301 6303
6308 6310 6312 6317 6319 6324 6326 6328 6330 6332 6338 6340 6342 6350
6352 6354 6356 6358 6360 6362 6364 6366 6368 6370 6372 6377 6379 6554
6556 6558 6563 6565 6567 6572 6574 6576 6581 6583 6588 6590 6592 6594
6596 6602 6604 6606 6613 6615 6617 6619 6621 6623 6625 6627 6629 6634
6636 6825 6827 6829 6831 6833 6835 6837 6839 6954 6956 6958 6960 6962
6967 6969 6971 6973 6975 6977 6983 6985 6987 6989 6992 6994 6996 6998
7000 7002 7008 7010 7012 7014 7017 7019 7021 7023 7025 7027 7033 7035
7037 7039 7042 7044 7046 7048 7050 7052 7054 7059 7061 7380 7382 7384
7386 7388 7393 7395 7397 7399 7401 7403 7409 7411 7413 7415 7418 7420
7422 7424 7426 7428 7434 7436 7438 7440 7443 7445 7447 7449 7451 7453
7455 7460 7462 7464 7466 7468 7470 7472 7478 7480 7482 7484 7487 7489
7491 7493 7495 7497 7499 7504 7506
FIELD 1070 1072 1074 1076 1078 1080 1082 1084 1086 1648 2004 2006 2008 2010
2012 2017 2019 2021 2023 2025 2107 2109 2111 2195 2197 2199 2201 2279
2281 2283 2285 2362 2364 2366 2368 2370 2372 2447 2449 2451 2531 2533
2535 2631 2633 2635 2637 2777 2779 2781 2783 2785 2787 2789 2791 2793
2795 2797 2799 2801 2803 2805 2807 2809 2811 2813 2815 2817 2819 2821
2823 2825 2827 2829 2831 2833 2835 2837 2839 2841 2843 2845 2847 2849
2851 2853 2855 2857 2859 2861 2863 2865 2867 2869 2871 2953 2955 2957
2959 3129 3131 3133 3135 3137 3139 3253 3255 3257 3259 3262 3265 3267
3269 3271 3274 3276 3278 3280 3282 3287 3289 3291 3293 3295 3369 3371
3373 3445 3447 3449 3525 3595 3597 3599 3679 3803 3805 3807 3809 3814
3816 3818 3823 3825 3830 3832 3834 3836 3841 3843 3845 3850 3856 3858
3863 3865 3867 3869 3874 3876 3878 3883 3885 3890 3897 3899 3901 4024
4026 4028 4030 4035 4037 4039 4044 4046 4051 4053 4055 4057 4062 4064
4066 4071 4077 4079 4084 4086 4088 4090 4095 4097 4099 4104 4106 4111
4118 4120 4122 4243 4245 4247 4249 4254 4256 4258 4263 4265 4270 4272
4274 4276 4281 4283 4285 4290 4296 4298 4303 4305 4307 4309 4314 4316
4318 4323 4325 4330 4337 4339 4341 4430 4601 4603 4605 4683 4759 4884
4889 4891 4893 4895 4897 4899 4901 4903 4905 4907 4909 4914 4916 4918
4920 4925 4927 4929 4931 4933 4935 4937 4939 4941 4943 5036 5038 5040
5163 5165 5167 5283 5285 5287 5446 5448 5450 5452 5454 5456 5461 5463
5465 5467 5472 5474 5476 5478 5483 5485 5487 5489 5494 5496 5498 5500
5505 5507 5509 5511 5516 5518 5520 5522 5530 5532 5534 5536 5538 5540
5546 5548 5550 5552 5557 5559 5717 5719 5721 5723 5725 5727 5732 5734
5736 5738 5743 5745 5747 5749 5754 5756 5758 5760 5765 5767 5769 5771
5776 5778 5780 5782 5787 5789 5791 5793 5801 5803 5805 5807 5809 5811
5817 5819 5821 5823 5828 5830 6031 6033 6035 6040 6042 6044 6049 6051 SEQ 0686
6053 6058 6060 6065 6067 6069 6071 6073 6079 6081 6083 6090 6092 6094
6096 6098 6100 6102 6104 6106 6111 6113 6290 6292 6294 6299 6301 6303
6308 6310 6312 6317 6319 6324 6326 6328 6330 6332 6338 6340 6342 6350
6352 6354 6356 6358 6360 6362 6364 6366 6368 6370 6372 6377 6379 6554
6556 6558 6563 6565 6567 6572 6574 6576 6581 6583 6588 6590 6592 6594
6596 6602 6604 6606 6613 6615 6617 6619 6621 6623 6625 6627 6629 6634
6636 6825 6827 6829 6831 6833 6835 6837 6839 6954 6956 6958 6960 6962
6967 6969 6971 6973 6975 6977 6983 6985 6987 6989 6992 6994 6996 6998
7000 7002 7008 7010 7012 7014 7017 7019 7021 7023 7025 7027 7033 7035
7037 7039 7042 7044 7046 7048 7050 7052 7054 7059 7061 7380 7382 7384
7386 7388 7393 7395 7397 7399 7401 7403 7409 7411 7413 7415 7418 7420
7422 7424 7426 7428 7434 7436 7438 7440 7443 7445 7447 7449 7451 7453
7455 7460 7462 7464 7466 7468 7470 7472 7478 7480 7482 7484 7487 7489
7491 7493 7495 7497 7499 7504 7506
GET 7659 7661
GO 72 75 76 132 133 145 149 152 234 240 241 251 254 257
334 340 351 353 358 360 437 443 444 455 459 461 537 543
548 549 601 615 617 618 634 635 773 780 785 786 801 806
807 862 865 867 868 917 922 924 926 927 988 994 996 1007
1029 1030 1065 1124 1134 1136 1138 1139 1152 1204 1210 1214 1216 1218
1219 1221 1222 1275 1290 1292 1294 1295 1426 1429 1430 1475 1480 1481
1528 1532 1534 1536 1537 1539 1540 1595 1597 1605 1608 1610 1612 1626
1627 1692 1704 1706 1708 1709 1878 1891 1893 1895 1896 1960 1962 1973
1984 1985 2064 2066 2078 2087 2088 2150 2152 2164 2173 2237 2239 2251
2259 2320 2322 2334 2342 2404 2406 2418 2426 2427 2482 2488 2490 2502
2510 2511 2571 2573 2585 2593 2607 2608 2681 2683 2689 2695 2910 2912
2918 2923 2995 2998 3000 3001 3002 3052 3054 3065 3067 3069 3075 3076
3174 3176 3187 3191 3193 3327 3329 3340 3348 3349 3404 3406 3417 3425
3483 3485 3496 3504 3554 3556 3567 3575 3632 3634 3645 3653 3722 3724
3735 3743 3757 3758 3771 3772 3943 3945 3956 3964 3978 3979 3992 3993
4162 4164 4175 4183 4197 4198 4211 4212 4389 4391 4402 4410 4470 4476
4479 4484 4492 4493 4501 4502 4523 4560 4562 4573 4581 4640 4642 4653
4662 4663 4716 4718 4729 4738 4739 4800 4806 4808 4817 4818 4819 4820
4821 4827 4829 4842 4846 4850 4980 4986 4988 4994 4995 4996 4997 5006
5015 5018 5084 5090 5092 5103 5104 5105 5117 5133 5206 5212 5214 5220
5221 5222 5231 5247 5257 5338 5344 5346 5357 5358 5609 5615 5617 5628
5629 5903 5905 5913 5921 5922 6004 6006 6012 6161 6163 6171 6179 6180
6263 6265 6271 6425 6427 6435 6443 6444 6521 6523 6529 6686 6688 6695
6698 6712 6713 6727 6728 6743 6745 6746 6761 6762 6778 6780 6781 6782
6801 6886 6888 6895 6901 6911 6912 6932 7104 7110 7113 7127 7128 7142
7143 7158 7159 7174 7175 7189 7190 7209 7277 7279 7286 7292 7302 7303
7319 7324 7334 7335 7355 7529 7576 7579 7586 7587
ITABLE 5376 5377 5378 5379 5380 5381 5382 5383 5384 5385 5386 5647 5648 5649
5650 5651 5652 5653 5654 5655 5656 5657 5940 5941 5943 5944 5945 5946
5947 5949 5950 5951 5952 5953 5954 5955 5956 6198 6199 6201 6202 6203
6204 6205 6207 6208 6209 6210 6211 6212 6213 6214 6462 6463 6465 6466
6467 6468 6469 6471 6472 6473 6474 6475 6476 6477 6478
MFLD 1070# 1070 1072# 1072 1074# 1074 1076# 1076 1078# 1078 1080# 1080 1082# 1082
1084# 1084 1086# 1086 1648# 1648 2004# 2004 2006# 2006 2008# 2008 2010# 2010
2012# 2012 2017# 2017 2019# 2019 2021# 2021 2023# 2023 2025# 2025 2107# 2107
2109# 2109 2111# 2111 2195# 2195 2197# 2197 2199# 2199 2201# 2201 2279# 2279
2281# 2281 2283# 2283 2285# 2285 2362# 2362 2364# 2364 2366# 2366 2368# 2368
2370# 2370 2372# 2372 2447# 2447 2449# 2449 2451# 2451 2531# 2531 2533# 2533 SEQ 0687
2535# 2535 2631# 2631 2633# 2633 2635# 2635 2637# 2637 2777# 2777 2779# 2779
2781# 2781 2783# 2783 2785# 2785 2787# 2787 2789# 2789 2791# 2791 2793# 2793
2795# 2795 2797# 2797 2799# 2799 2801# 2801 2803# 2803 2805# 2805 2807# 2807
2809# 2809 2811# 2811 2813# 2813 2815# 2815 2817# 2817 2819# 2819 2821# 2821
2823# 2823 2825# 2825 2827# 2827 2829# 2829 2831# 2831 2833# 2833 2835# 2835
2837# 2837 2839# 2839 2841# 2841 2843# 2843 2845# 2845 2847# 2847 2849# 2849
2851# 2851 2853# 2853 2855# 2855 2857# 2857 2859# 2859 2861# 2861 2863# 2863
2865# 2865 2867# 2867 2869# 2869 2871# 2871 2953# 2953 2955# 2955 2957# 2957
2959# 2959 3129# 3129 3131# 3131 3133# 3133 3135# 3135 3137# 3137 3139# 3139
3253# 3253 3255# 3255 3257# 3257 3259# 3259 3262# 3262 3265# 3265 3267# 3267
3269# 3269 3271# 3271 3274# 3274 3276# 3276 3278# 3278 3280# 3280 3282# 3282
3287# 3287 3289# 3289 3291# 3291 3293# 3293 3295# 3295 3369# 3369 3371# 3371
3373# 3373 3445# 3445 3447# 3447 3449# 3449 3525# 3525 3595# 3595 3597# 3597
3599# 3599 3679# 3679 3803# 3803 3805# 3805 3807# 3807 3809# 3809 3814# 3814
3816# 3816 3818# 3818 3823# 3823 3825# 3825 3830# 3830 3832# 3832 3834# 3834
3836# 3836 3841# 3841 3843# 3843 3845# 3845 3850# 3850 3856# 3856 3858# 3858
3863# 3863 3865# 3865 3867# 3867 3869# 3869 3874# 3874 3876# 3876 3878# 3878
3883# 3883 3885# 3885 3890# 3890 3897# 3897 3899# 3899 3901# 3901 4024# 4024
4026# 4026 4028# 4028 4030# 4030 4035# 4035 4037# 4037 4039# 4039 4044# 4044
4046# 4046 4051# 4051 4053# 4053 4055# 4055 4057# 4057 4062# 4062 4064# 4064
4066# 4066 4071# 4071 4077# 4077 4079# 4079 4084# 4084 4086# 4086 4088# 4088
4090# 4090 4095# 4095 4097# 4097 4099# 4099 4104# 4104 4106# 4106 4111# 4111
4118# 4118 4120# 4120 4122# 4122 4243# 4243 4245# 4245 4247# 4247 4249# 4249
4254# 4254 4256# 4256 4258# 4258 4263# 4263 4265# 4265 4270# 4270 4272# 4272
4274# 4274 4276# 4276 4281# 4281 4283# 4283 4285# 4285 4290# 4290 4296# 4296
4298# 4298 4303# 4303 4305# 4305 4307# 4307 4309# 4309 4314# 4314 4316# 4316
4318# 4318 4323# 4323 4325# 4325 4330# 4330 4337# 4337 4339# 4339 4341# 4341
4430# 4430 4601# 4601 4603# 4603 4605# 4605 4683# 4683 4759# 4759 4884# 4884
4889# 4889 4891# 4891 4893# 4893 4895# 4895 4897# 4897 4899# 4899 4901# 4901
4903# 4903 4905# 4905 4907# 4907 4909# 4909 4914# 4914 4916# 4916 4918# 4918
4920# 4920 4925# 4925 4927# 4927 4929# 4929 4931# 4931 4933# 4933 4935# 4935
4937# 4937 4939# 4939 4941# 4941 4943# 4943 5036# 5036 5038# 5038 5040# 5040
5163# 5163 5165# 5165 5167# 5167 5283# 5283 5285# 5285 5287# 5287 5446# 5446
5448# 5448 5450# 5450 5452# 5452 5454# 5454 5456# 5456 5461# 5461 5463# 5463
5465# 5465 5467# 5467 5472# 5472 5474# 5474 5476# 5476 5478# 5478 5483# 5483
5485# 5485 5487# 5487 5489# 5489 5494# 5494 5496# 5496 5498# 5498 5500# 5500
5505# 5505 5507# 5507 5509# 5509 5511# 5511 5516# 5516 5518# 5518 5520# 5520
5522# 5522 5530# 5530 5532# 5532 5534# 5534 5536# 5536 5538# 5538 5540# 5540
5546# 5546 5548# 5548 5550# 5550 5552# 5552 5557# 5557 5559# 5559 5717# 5717
5719# 5719 5721# 5721 5723# 5723 5725# 5725 5727# 5727 5732# 5732 5734# 5734
5736# 5736 5738# 5738 5743# 5743 5745# 5745 5747# 5747 5749# 5749 5754# 5754
5756# 5756 5758# 5758 5760# 5760 5765# 5765 5767# 5767 5769# 5769 5771# 5771
5776# 5776 5778# 5778 5780# 5780 5782# 5782 5787# 5787 5789# 5789 5791# 5791
5793# 5793 5801# 5801 5803# 5803 5805# 5805 5807# 5807 5809# 5809 5811# 5811
5817# 5817 5819# 5819 5821# 5821 5823# 5823 5828# 5828 5830# 5830 6031# 6031
6033# 6033 6035# 6035 6040# 6040 6042# 6042 6044# 6044 6049# 6049 6051# 6051
6053# 6053 6058# 6058 6060# 6060 6065# 6065 6067# 6067 6069# 6069 6071# 6071
6073# 6073 6079# 6079 6081# 6081 6083# 6083 6090# 6090 6092# 6092 6094# 6094
6096# 6096 6098# 6098 6100# 6100 6102# 6102 6104# 6104 6106# 6106 6111# 6111
6113# 6113 6290# 6290 6292# 6292 6294# 6294 6299# 6299 6301# 6301 6303# 6303
6308# 6308 6310# 6310 6312# 6312 6317# 6317 6319# 6319 6324# 6324 6326# 6326
6328# 6328 6330# 6330 6332# 6332 6338# 6338 6340# 6340 6342# 6342 6350# 6350
6352# 6352 6354# 6354 6356# 6356 6358# 6358 6360# 6360 6362# 6362 6364# 6364 SEQ 0688
6366# 6366 6368# 6368 6370# 6370 6372# 6372 6377# 6377 6379# 6379 6554# 6554
6556# 6556 6558# 6558 6563# 6563 6565# 6565 6567# 6567 6572# 6572 6574# 6574
6576# 6576 6581# 6581 6583# 6583 6588# 6588 6590# 6590 6592# 6592 6594# 6594
6596# 6596 6602# 6602 6604# 6604 6606# 6606 6613# 6613 6615# 6615 6617# 6617
6619# 6619 6621# 6621 6623# 6623 6625# 6625 6627# 6627 6629# 6629 6634# 6634
6636# 6636 6825# 6825 6827# 6827 6829# 6829 6831# 6831 6833# 6833 6835# 6835
6837# 6837 6839# 6839 6954# 6954 6956# 6956 6958# 6958 6960# 6960 6962# 6962
6967# 6967 6969# 6969 6971# 6971 6973# 6973 6975# 6975 6977# 6977 6983# 6983
6985# 6985 6987# 6987 6989# 6989 6992# 6992 6994# 6994 6996# 6996 6998# 6998
7000# 7000 7002# 7002 7008# 7008 7010# 7010 7012# 7012 7014# 7014 7017# 7017
7019# 7019 7021# 7021 7023# 7023 7025# 7025 7027# 7027 7033# 7033 7035# 7035
7037# 7037 7039# 7039 7042# 7042 7044# 7044 7046# 7046 7048# 7048 7050# 7050
7052# 7052 7054# 7054 7059# 7059 7061# 7061 7380# 7380 7382# 7382 7384# 7384
7386# 7386 7388# 7388 7393# 7393 7395# 7395 7397# 7397 7399# 7399 7401# 7401
7403# 7403 7409# 7409 7411# 7411 7413# 7413 7415# 7415 7418# 7418 7420# 7420
7422# 7422 7424# 7424 7426# 7426 7428# 7428 7434# 7434 7436# 7436 7438# 7438
7440# 7440 7443# 7443 7445# 7445 7447# 7447 7449# 7449 7451# 7451 7453# 7453
7455# 7455 7460# 7460 7462# 7462 7464# 7464 7466# 7466 7468# 7468 7470# 7470
7472# 7472 7478# 7478 7480# 7480 7482# 7482 7484# 7484 7487# 7487 7489# 7489
7491# 7491 7493# 7493 7495# 7495 7497# 7497 7499# 7499 7504# 7504 7506# 7506
MWORD 1070 1072 1074 1076 1078 1080 1082 1084 1086 1648 2004 2006 2008 2010
2012 2017 2019 2021 2023 2025 2107 2109 2111 2195 2197 2199 2201 2279
2281 2283 2285 2362 2364 2366 2368 2370 2372 2447 2449 2451 2531 2533
2535 2631 2633 2635 2637 2777 2779 2781 2783 2785 2787 2789 2791 2793
2795 2797 2799 2801 2803 2805 2807 2809 2811 2813 2815 2817 2819 2821
2823 2825 2827 2829 2831 2833 2835 2837 2839 2841 2843 2845 2847 2849
2851 2853 2855 2857 2859 2861 2863 2865 2867 2869 2871 2953 2955 2957
2959 3129 3131 3133 3135 3137 3139 3253 3255 3257 3259 3262 3265 3267
3269 3271 3274 3276 3278 3280 3282 3287 3289 3291 3293 3295 3369 3371
3373 3445 3447 3449 3525 3595 3597 3599 3679 3803 3805 3807 3809 3814
3816 3818 3823 3825 3830 3832 3834 3836 3841 3843 3845 3850 3856 3858
3863 3865 3867 3869 3874 3876 3878 3883 3885 3890 3897 3899 3901 4024
4026 4028 4030 4035 4037 4039 4044 4046 4051 4053 4055 4057 4062 4064
4066 4071 4077 4079 4084 4086 4088 4090 4095 4097 4099 4104 4106 4111
4118 4120 4122 4243 4245 4247 4249 4254 4256 4258 4263 4265 4270 4272
4274 4276 4281 4283 4285 4290 4296 4298 4303 4305 4307 4309 4314 4316
4318 4323 4325 4330 4337 4339 4341 4430 4601 4603 4605 4683 4759 4884
4889 4891 4893 4895 4897 4899 4901 4903 4905 4907 4909 4914 4916 4918
4920 4925 4927 4929 4931 4933 4935 4937 4939 4941 4943 5036 5038 5040
5163 5165 5167 5283 5285 5287 5446 5448 5450 5452 5454 5456 5461 5463
5465 5467 5472 5474 5476 5478 5483 5485 5487 5489 5494 5496 5498 5500
5505 5507 5509 5511 5516 5518 5520 5522 5530 5532 5534 5536 5538 5540
5546 5548 5550 5552 5557 5559 5717 5719 5721 5723 5725 5727 5732 5734
5736 5738 5743 5745 5747 5749 5754 5756 5758 5760 5765 5767 5769 5771
5776 5778 5780 5782 5787 5789 5791 5793 5801 5803 5805 5807 5809 5811
5817 5819 5821 5823 5828 5830 6031 6033 6035 6040 6042 6044 6049 6051
6053 6058 6060 6065 6067 6069 6071 6073 6079 6081 6083 6090 6092 6094
6096 6098 6100 6102 6104 6106 6111 6113 6290 6292 6294 6299 6301 6303
6308 6310 6312 6317 6319 6324 6326 6328 6330 6332 6338 6340 6342 6350
6352 6354 6356 6358 6360 6362 6364 6366 6368 6370 6372 6377 6379 6554
6556 6558 6563 6565 6567 6572 6574 6576 6581 6583 6588 6590 6592 6594
6596 6602 6604 6606 6613 6615 6617 6619 6621 6623 6625 6627 6629 6634
6636 6825 6827 6829 6831 6833 6835 6837 6839 6954 6956 6958 6960 6962 SEQ 0689
6967 6969 6971 6973 6975 6977 6983 6985 6987 6989 6992 6994 6996 6998
7000 7002 7008 7010 7012 7014 7017 7019 7021 7023 7025 7027 7033 7035
7037 7039 7042 7044 7046 7048 7050 7052 7054 7059 7061 7380 7382 7384
7386 7388 7393 7395 7397 7399 7401 7403 7409 7411 7413 7415 7418 7420
7422 7424 7426 7428 7434 7436 7438 7440 7443 7445 7447 7449 7451 7453
7455 7460 7462 7464 7466 7468 7470 7472 7478 7480 7482 7484 7487 7489
7491 7493 7495 7497 7499 7504 7506
PJRST 7593
PNT1 395
PNT6 663 672
PNTDEC 4876 7631 7644
PNTHW 190 193 196 294 297 398 401 498 501 827 1058 1062 1735 1922
3118 3124 3242 3248 7543 7549 7562 7568 7611 7614 7617 7620
PNTMSG 182 185 188 191 194 280 283 286 287 289 292 295 390 393
396 399 484 487 488 491 493 496 499 661 664 670 673 825
828 1056 1059 1060 1063 1064 1733 1736 1920 1923 1924 3114 3116 3120
3122 3238 3240 3244 3246 4522 4874 4877 4879 5156 6806 6809 6812 6815
6818 6821 6937 6940 6943 6947 6948 6949 6950 7214 7217 7220 7223 7226
7229 7360 7363 7367 7370 7374 7375 7376 7516 7519 7539 7541 7545 7547
7558 7560 7564 7566 7609 7612 7615 7618 7629 7632 7642 7645 7647 7648
7649 7650 7651 7652 7653 7654
PNTOCS 181 187 282 285 291 389 486 490 495 5158 7518
PUT 7627 7629
RGET 7659
RPUT 7627
RTN 86 170 183 197 238 273 298 338 378 391 402 441 477 502
541 559 654 665 674 818 829 878 938 992 997 1049 1066 1162
1208 1232 1311 1441 1492 1550 1598 1639 1726 1737 1913 1925 1963 1995
2067 2098 2153 2186 2240 2270 2323 2353 2407 2438 2486 2491 2522 2574
2619 2684 2715 2913 2938 3013 3055 3098 3125 3177 3222 3249 3330 3360
3407 3436 3486 3515 3557 3586 3635 3664 3725 3783 3946 4004 4165 4223
4351 4392 4421 4474 4515 4524 4563 4592 4643 4674 4719 4750 4804 4809
4866 4880 4984 4989 5026 5088 5093 5148 5159 5210 5215 5268 5342 5347
5372 5394 5414 5613 5618 5643 5665 5685 5840 5853 5906 5936 5970 5988
6013 6164 6194 6228 6248 6272 6428 6458 6484 6505 6530 6689 6793 6802
6889 6924 6933 7201 7210 7280 7347 7356 7520 7530 7550 7569 7580 7592
7594 7597 7621 7661
SCOPER 80 158 261 366 465 553 625 642 791 812 872 932 1037 1144
1156 1226 1299 1435 1486 1544 1631 1714 1901 1989 2092 2180 2264 2347
2432 2516 2598 2613 2708 2931 3007 3085 3209 3354 3430 3509 3580 3658
3748 3763 3777 3969 3984 3998 4188 4203 4217 4415 4509 4586 4668 4744
4860 5020 5135 5249 5262 5365 5636 5929 6187 6451 6702 6717 6732 6751
6766 6786 6917 7117 7132 7148 7164 7180 7194 7308 7340 7591
TMSG 182 188 283 286 292 390 487 491 496 664 673 828 1059 1063
1736 1923 4872 4877 6804 6807 6810 6813 6816 6819 6935 6938 6941 6944
7212 7215 7218 7221 7224 7227 7358 7361 7364 7368 7371 7519 7632 7645
7647 7648 7649 7650 7651 7652 7653 7654
TMSGC 185 191 194 280 287 289 295 393 396 399 484 488 493 499
661 670 825 1056 1060 1064 1733 1920 1924 3114 3116 3120 3122 3238
3240 3244 3246 4522 4879 5156 6948 6949 6950 7375 7376 7516 7539 7541
7545 7547 7558 7560 7564 7566 7609 7612 7615 7618 7629 7642
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 1
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0690
1 SUBTTL MP Control Module: 2910 Basic Instruction Tests
2
3 SALL
4
5 SEARCH DFPTA,MONSYM
6
7 ; INTERN's
8
9 ENTRY TSTS1,TSTS2,TSTS3,TSTS4,TSTS5,TSTS6,TSTS7,TSTS10
10 ENTRY TSTS11,TSTS12,TSTS13,TSTS14,TSTS15,TSTS16,TSTS17,TSTS20
11 ENTRY TSTS21,TSTS22,TSTS23,TSTS24,TSTS25,TSTS26,TSTS27,TSTS30
12 ENTRY TSTS31,TSTS32,TSTS33,TSTS34,TSTS35,TSTS36,TSTS37,TSTS40
13 ENTRY TSTS41,TSTS42,TSTS43,TSTS44,TSTS45,TSTS46,TSTS47,TSTS50
14 ENTRY TSTS51,TSTS52,TSTS53,TSTS54,TSTS55,TSTS56,TSTS57,TSTS60
15 ENTRY TSTS61,TSTS62,TSTS63,TSTS64,TSTS65,TSTS66,TSTS67,TSTS70
16
17 ; EXTERN's located in DFPTA1.MAC (Mainline code..)
18
19 EXTERN TLOAD,CSRPNT,TRACE,TSTSUB,ODELAY,TSLOD1,TSLOD2,SEXEC,SSPNT
20 EXTERN CALPAR,DWCRAM,CADDR,CWORDL,CWORDR,PARFLG,UDEBUG,PORTCI,PORTNI
21
22 ; EXTERN's located in DFPTAI.MAC (Port Device Handling Routines module)
23
24 EXTERN RDLAR,RDCSR,SETLAR,IPACLR,IPASRT,SNEXT,SDATA
25
26
27 ;#********************************************************************
28 ; Z3 - Address for use in DDT
29 ;#********************************************************************
30
31 000000' Z3: ; address of 00000'
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 2
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0691
32
33 ;#********************************************************************
34 ;* Test 1 - JMAP Instruction
35 ;
36 ; Description: Verify that the JMAP instruction unconditionally
37 ; jumps to the address specified by the direct
38 ; inputs, regardless of the TEST inputs.
39 ;
40 ; Procedure: Clear Port
41 ; Load test microcode
42 ;
43 ; Set start address = 0 (Test En/Cond=OFF/OFF)
44 ; Set MPRUN/SINGLE STEP (execute JMAP)
45 ; Read LAR, and verify address = 'pattern'
46 ;
47 ; Set start address = 1 (Test En/Cond=OFF/ON)
48 ; Set MPRUN/SINGLE STEP (execute JMAP)
49 ; Read LAR, and verify address = 'pattern'
50 ;
51 ; Set start address = 2 (Test En/Cond=ON/OFF)
52 ; Set MPRUN/SINGLE STEP (execute JMAP)
53 ; Read LAR, and verify address = 'pattern'
54 ;
55 ; Set start address = 3 (Test En/Cond=ON/ON)
56 ; Set MPRUN/SINGLE STEP (execute JMAP)
57 ; Read LAR, and verify address = 'pattern'
58 ;
59 ; Do for each data pattern: 0's
60 ; 1's
61 ; floating 0's
62 ; floating 1's
63 ;
64 ; Failure: The wrong address was selected. Either the 2910
65 ; itself failed or the Jmp Mux was enabled when it
66 ; shouldn't have been (so the low order 8 bits came
67 ; off the MBUS instead of the microword jump field).
68 ;#********************************************************************
69
70 ; Test data
71
72 000000' 254 00 0 00 000011' TSTS1: JRST TG1 ; go start test
73 000001' 240401 000001 SEQ!MPROC!NDMP!ZSEQ!1 ; test mask
74 000002' 000130' 010436' T1M,,[ASCIZ ^JMAP Instruction^]
75 000003' 010442' 010443' [EXP MLAST!M7],,[EXP M16,M9,E17,M1,MLAST!M8]
76 000004' 000000 000141' TSTS2 ; failure test table
77 000005' 000000 000226' TSTS3 ; ...
78 000006' 000000 000327' TSTS4
79 000007' 000000 000430' TSTS5
80 000010' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 3
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0692
81
82 ; Start test
83
84 000011' 201 00 0 00 000000' TG1: MOVEI Z3 ; get address of module start
85 000012' 260 17 0 00 000000* GO TRACE ; handle trace output
86
87 ; Initialization
88
89 000013' 260 17 0 00 000000* TL1: GO IPACLR ; clear port
90 000014' 402 00 0 00 000000* SETZM TSTSUB ; initialize subtest number
91 000015' 201 06 0 00 000031' MOVEI 6,TS1 ; get sstep table address
92 000016' 201 07 0 00 000046' MOVEI 7,TS1PAT-1 ; get data pattern table address
93
94 ; Loop on single step table entries
95
96 000017' 400 15 0 00 000000 TA1: SETZ ERFLG, ; clear error flag
97 000020' 260 17 0 00 000000* GO SEXEC ; execute table entry
98 000021' 254 00 0 00 000030' JRST TX1 ; end of sstep table
99 000022' 254 00 0 00 000017' JRST TA1 ; keep looping after call
100 000023' 474 15 0 00 000000 SETO ERFLG, ; error - end address incorrect
101
102 ; Handle error printouts and scope looping
103
104 000024' 027 00 0 00 000126' SCOPER MA1 ; print error message
105 000025' 254 00 0 00 000013' JRST TL1 ; loop on error
106 000026' 254 00 0 00 000030' JRST TX1 ; altmode exit
107 000027' 322 15 0 00 000017' JUMPE ERFLG,TA1 ; do next entry (if no error yet)
108
109 ; End of test
110
111 000030' 263 17 0 00 000000 TX1: RTN ; return
112
113 ; Single step table, as: (CMD,#Steps,Start addr,End Addr)
114
115 000031' 400000 000041' TS1: STABLE (SSCHK,TS1CHK) ; check if done yet
116 000032' 400000 000100' STABLE (SSCHK,TS1LOD) ; load ucode with special jump field
117 000033' 100100 000000 STABLE (SSSTRT,1,0,0) ; do 1st JMAP
118 000034' 100100 010000 STABLE (SSSTRT,1,1,0) ; do 2nd JMAP
119 000035' 100100 020000 STABLE (SSSTRT,1,2,0) ; do 3rd JMAP
120 000036' 100100 030000 STABLE (SSSTRT,1,3,0) ; do 4th JMAP
121 000037' 500000 000031' STABLE (SSJRST,TS1) ; loop till done
122 000040' 000000 000000 STABLE (SSLAST)
123
124 ; Check if pattern table complete
125
126 000041' 350 00 0 00 000007 TS1CHK: AOS 7 ; increment table pointer
127 000042' 200 01 0 07 000000 MOVE 1,(7) ; get pattern - done?
128 000043' 202 01 0 00 012214' MOVEM 1,DATPAT# ; save data pattern
129 000044' 331 00 0 00 000001 SKIPL 1 ; done with patterns?
130 000045' 350 00 0 17 000000 AOS (P) ; no - return +1
131 000046' 263 17 0 00 000000 RTN ; return
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 4
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0693
132
133 ; Data patterns
134
135 000047' 000000 000000 TS1PAT: 0
136 000050' 000000 005777 5777
137 000051' 000000 000001 0001
138 000052' 000000 000002 0002
139 000053' 000000 000004 0004
140 000054' 000000 000010 0010
141 000055' 000000 000020 0020
142 000056' 000000 000040 0040
143 000057' 000000 000100 0100
144 000060' 000000 000200 0200
145 000061' 000000 000400 0400
146 000062' 000000 001000 1000
147 000063' 000000 002000 2000
148 000064' 000000 004000 4000
149 000065' 000000 005776 5776
150 000066' 000000 005775 5775
151 000067' 000000 005773 5773
152 000070' 000000 005767 5767
153 000071' 000000 005757 5757
154 000072' 000000 005737 5737
155 000073' 000000 005677 5677
156 000074' 000000 005577 5577
157 000075' 000000 005377 5377
158 000076' 000000 003777 3777
159 000077' 777777 777777 -1
160
161 ; Load microcode with special jump field / Set up end address
162
163 000100' 400 02 0 00 000000 TS1LOD: SETZ 2, ; init microword counter
164 000101' 200 00 0 02 000130' MOVE T1M(2) ; get 1st half of 1st uword
165 000102' 404 00 0 00 010450' AND [777700007777] ; mask out address given
166 000103' 200 01 0 00 012214' MOVE 1,DATPAT ; get proper address
167 000104' 137 01 0 00 010451' DPB 1,[POINT 12,0,23] ; insert it
168 000105' 137 01 0 00 010452' DPB 1,[POINT 12,TS1+2,35] ; set up end address
169 000106' 137 01 0 00 010453' DPB 1,[POINT 12,TS1+3,35] ; set up end address
170 000107' 137 01 0 00 010454' DPB 1,[POINT 12,TS1+4,35] ; set up end address
171 000110' 137 01 0 00 010455' DPB 1,[POINT 12,TS1+5,35] ; set up end address
172 000111' 202 00 0 02 000130' MOVEM T1M(2) ; update the microword
173 000112' 271 02 0 00 000002 ADDI 2,2 ; point to next one
174 000113' 305 02 0 00 000010 CAIGE 2,^D8 ; reach end yet?
175 000114' 254 00 0 00 000101' JRST TS1LOD+1 ; no - loop till done
176 000115' 316 16 0 00 000000* CAMN MBCN,PORTNI ; NI port?
177 000116' 476 00 0 00 000000* SETOM TSLOD1 ; yes - must reload microcode each time
178 000117' 316 16 0 00 000000* CAMN MBCN,PORTCI ; CI port?
179 000120' 476 00 0 00 000000* SETOM TSLOD2 ; yes - must reload microcode each time
180 000121' 201 01 0 00 000130' MOVEI 1,T1M ; set up microcode address
181 000122' 260 17 0 00 000000* GO TLOAD ; load/verify it
182 000123' 334 00 0 00 000000 SKIPA ; failed - exit test
183 000124' 350 00 0 17 000000 AOS (P) ; set up ok return
184 000125' 263 17 0 00 000000 RTN ; yes - return
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 5
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0694
185
186 ; Error messages
187
188 000126' 140000 010456' MA1: MSG!TXNOT![ASCIZ /JMAP did not dispatch to correct location/]
189 000127' 000000000000# LAST!CALL!TXALL!SSPNT ; print sequencer data
190
191 ; Test microcode
192
193 000130' 000000 000000 T1M: MWORD <ADDR=0,JMAP,J=0,DISA,CCOF> ; disa/off
194 000131' 000000 010040
195 000132' 000100 000000 MWORD <JMAP,J=0,DISA,CCON> ; disa/on (1)
196 000133' 000000 030040
197 000134' 000200 000000 MWORD <JMAP,J=0,ENA,CCOF> ; ena/off (2)
198 000135' 000400 010040
199 000136' 000300 000000 MWORD <JMAP,J=0,ENA,CCON> ; ena/on (3)
200 000137' 000400 030040
201 000140' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 6
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0695
202
203 ;#********************************************************************
204 ;* Test 2 - JZ Instruction
205 ;
206 ; Description: Verify that the JZ instruction unconditionally
207 ; causes a jump to CRAM address 0. Execute a JZ
208 ; instruction at location 5777 and verify the next
209 ; CRAM address goes to zero. Repeat with location
210 ; 3777.
211 ;
212 ; The JZ also resets the stack - that it does so is
213 ; tested in subsequent tests.
214 ;
215 ; Procedure: Clear Port
216 ; Load test microcode
217 ;
218 ; Load RAR with 1
219 ; Set MPRUN/SINGLE STEP (execute JMAP,JZ)
220 ; Read LAR, and verify address = 0
221 ;
222 ; Load RAR with 2
223 ; Set MPRUN/SINGLE STEP (execute JMAP,JZ)
224 ; Read LAR, and verify address = 0
225 ;
226 ; Load RAR with 3
227 ; Set MPRUN/SINGLE STEP (execute JMAP,JZ)
228 ; Read LAR, and verify address = 0
229 ;
230 ; Load RAR with 4
231 ; Set MPRUN/SINGLE STEP (execute JMAP,JZ)
232 ; Read LAR, and verify address = 0
233 ;
234 ; Failure: ---
235 ;#********************************************************************
236
237 ; Test data
238
239 000141' 254 00 0 00 000152' TSTS2: JRST TG2 ; go start test
240 000142' 240401 000002 SEQ!MPROC!NDMP!ZSEQ!2 ; test mask
241 000143' 000203' 010467' T2M,,[ASCIZ ^JZ Instruction^]
242 000144' 010442' 010443' [EXP MLAST!M7],,[EXP M16,M9,E17,M1,MLAST!M8]
243 000145' 000000 000226' TSTS3 ; failure test table
244 000146' 000000 000327' TSTS4 ; ...
245 000147' 000000 000430' TSTS5
246 000150' 000000 000564' TSTS6
247 000151' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 7
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0696
248
249 ; Start test
250
251 000152' 201 00 0 00 000000' TG2: MOVEI Z3 ; get address of module start
252 000153' 260 17 0 00 000012* GO TRACE ; handle trace output
253 000154' 201 01 0 00 000203' MOVEI 1,T2M ; set up microcode address
254 000155' 260 17 0 00 000122* GO TLOAD ; load/verify it
255 000156' 263 17 0 00 000000 RTN ; failed - exit test
256
257 ; Initialization
258
259 000157' 260 17 0 00 000013* TL2: GO IPACLR ; clear port
260 000160' 402 00 0 00 000014* SETZM TSTSUB ; initialize subtest number
261 000161' 201 06 0 00 000174' MOVEI 6,TS2 ; get sstep table address
262
263 ; Loop on single step table entries
264
265 000162' 400 15 0 00 000000 TA2: SETZ ERFLG, ; clear error flag
266 000163' 260 17 0 00 000020* GO SEXEC ; execute table entry
267 000164' 254 00 0 00 000173' JRST TX2 ; end of sstep table
268 000165' 254 00 0 00 000162' JRST TA2 ; keep looping after call
269 000166' 474 15 0 00 000000 SETO ERFLG, ; error - end address incorrect
270
271 ; Handle error printouts and scope looping
272
273 000167' 027 00 0 00 000201' SCOPER MA2 ; print error message
274 000170' 254 00 0 00 000157' JRST TL2 ; loop on error
275 000171' 254 00 0 00 000173' JRST TX2 ; altmode exit
276 000172' 322 15 0 00 000162' JUMPE ERFLG,TA2 ; do next entry (if no error yet)
277
278 ; End of test
279
280 000173' 263 17 0 00 000000 TX2: RTN ; return
281
282 ; Single step table, as: (CMD,#Steps,Start addr,End Addr)
283
284 000174' 100200 010000 TS2: STABLE (SSSTRT,2,1,0)
285 000175' 100200 020000 STABLE (SSSTRT,2,2,0)
286 000176' 100200 030000 STABLE (SSSTRT,2,3,0)
287 000177' 100200 040000 STABLE (SSSTRT,2,4,0)
288 000200' 000000 000000 STABLE (SSLAST)
289
290 ; Error messages
291
292 000201' 140000 010472' MA2: MSG!TXNOT![ASCIZ /JZ did not go to location 0/]
293 000202' 000000000000# LAST!CALL!TXALL!SSPNT ; print sequencer data
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 8
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0697
294
295 ; Test microcode
296
297 000203' 000000 000000 T2M: MWORD <ADDR=0,JZ>
298 000204' 000000 000000
299 000205' 000137 760000 MWORD <JMAP,J=3776> ; 1
300 000206' 000000 000040
301 000207' 000237 770000 MWORD <JMAP,J=3777> ; 2
302 000210' 000000 000040
303 000211' 000357 760000 MWORD <JMAP,J=5776> ; 3
304 000212' 000000 000040
305 000213' 000457 770000 MWORD <JMAP,J=5777> ; 4
306 000214' 000000 000040
307
308 000215' 377600 770000 MWORD <ADDR=3776,JZ,J=77,DISA,CCOF> ; disa/off
309 000216' 000000 010000
310 000217' 377700 770000 MWORD <ADDR=3777,JZ,J=77,ENA,CCOF> ; disa/off
311 000220' 000400 010000
312 000221' 577600 770000 MWORD <ADDR=5776,JZ,J=77,DISA,CCON> ; disa/on
313 000222' 000000 030000
314 000223' 577700 770000 MWORD <ADDR=5777,JZ,J=77,ENA,CCON> ; disa/on
315 000224' 000400 030000
316 000225' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 9
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0698
317
318 ;#********************************************************************
319 ;* Test 3 - JZ Instruction - Effect on Reg/Ctr
320 ;
321 ; Description: Verify that the JZ instruction does not affect
322 ; the contents of the register/counter. Load the
323 ; counter, do a JZ, and branch to register contents
324 ; to see if it changed.
325 ;
326 ; Procedure: Clear Port
327 ; Load test microcode
328 ;
329 ; Set RAR to 100 (Test En/Cond=OFF/OFF)
330 ; Set MPRUN/SINGLE STEP (execute JMAP,LDCT,JZ,JRP)
331 ; Read LAR, and verify address = 777
332 ;
333 ; Set RAR to 103 (Test En/Cond=OFF/ON)
334 ; Set MPRUN/SINGLE STEP (execute JMAP,LDCT,JZ,JRP)
335 ; Read LAR, and verify address = 777
336 ;
337 ; Set RAR to 106 (Test En/Cond=ON/OFF)
338 ; Set MPRUN/SINGLE STEP (execute JMAP,LDCT,JZ,JRP)
339 ; Read LAR, and verify address = 777
340 ;
341 ; Set RAR to 111 (Test En/Cond=ON/ON)
342 ; Set MPRUN/SINGLE STEP (execute JMAP,LDCT,JZ,JRP)
343 ; Read LAR, and verify address = 777
344 ;
345 ; Failure: ---
346 ;#********************************************************************
347
348 ; Test data
349
350 000226' 254 00 0 00 000237' TSTS3: JRST TG3 ; go start test
351 000227' 240401 000003 SEQ!MPROC!NDMP!ZSEQ!3 ; test mask
352 000230' 000270' 010500' T3M,,[ASCIZ ^JZ Instruction - Effect on Reg/Ctr^]
353 000231' 010442' 010443' [EXP MLAST!M7],,[EXP M16,M9,E17,M1,MLAST!M8]
354 000232' 000000 000327' TSTS4 ; failure test table
355 000233' 000000 000430' TSTS5 ; ...
356 000234' 000000 000564' TSTS6
357 000235' 000000 000637' TSTS7
358 000236' 777777 777777 -1
359
360 ; Start test
361
362 000237' 201 00 0 00 000000' TG3: MOVEI Z3 ; get address of module start
363 000240' 260 17 0 00 000153* GO TRACE ; handle trace output
364 000241' 201 01 0 00 000270' MOVEI 1,T3M ; set up microcode address
365 000242' 260 17 0 00 000155* GO TLOAD ; load/verify it
366 000243' 263 17 0 00 000000 RTN ; failed - exit test
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 10
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0699
367
368 ; Initialization
369
370 000244' 260 17 0 00 000157* TL3: GO IPACLR ; clear port
371 000245' 402 00 0 00 000160* SETZM TSTSUB ; initialize subtest number
372 000246' 201 06 0 00 000261' MOVEI 6,TS3 ; get sstep table address
373
374 ; Loop on single step table entries
375
376 000247' 400 15 0 00 000000 TA3: SETZ ERFLG, ; clear error flag
377 000250' 260 17 0 00 000163* GO SEXEC ; execute table entry
378 000251' 254 00 0 00 000260' JRST TX3 ; end of sstep table
379 000252' 254 00 0 00 000247' JRST TA3 ; keep looping after call
380 000253' 474 15 0 00 000000 SETO ERFLG, ; error - end address incorrect
381
382 ; Handle error printouts and scope looping
383
384 000254' 027 00 0 00 000266' SCOPER MA3 ; print error message
385 000255' 254 00 0 00 000244' JRST TL3 ; loop on error
386 000256' 254 00 0 00 000260' JRST TX3 ; altmode exit
387 000257' 322 15 0 00 000247' JUMPE ERFLG,TA3 ; do next entry (if no error yet)
388
389 ; End of test
390
391 000260' 263 17 0 00 000000 TX3: RTN ; return
392
393 ; Single step table, as: (CMD,#Steps,Start addr,End Addr)
394
395 000261' 100401 000777 TS3: STABLE (SSSTRT,4,100,777)
396 000262' 100401 030777 STABLE (SSSTRT,4,103,777)
397 000263' 100401 060777 STABLE (SSSTRT,4,106,777)
398 000264' 100401 110777 STABLE (SSSTRT,4,111,777)
399 000265' 000000 000000 STABLE (SSLAST)
400
401 ; Error messages
402
403 000266' 140000 010507' MA3: MSG!TXNOT![ASCIZ ^JZ affected Reg/Ctr^]
404 000267' 000000000000# LAST!CALL!TXALL!SSPNT ; print sequencer data
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 11
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0700
405
406 ; Test microcode
407
408 000270' 000004 000000 T3M: MWORD <ADDR=0,JRP,ENA,CCOF,J=400> ; jump to cntr addr
409 000271' 000400 010160
410 000272' 010001 010000 MWORD <ADDR=100,JMAP,J=101> ; (100)
411 000273' 000000 000040
412 000274' 010107 770000 MWORD <LDCT,J=777> ; load counter (101)
413 000275' 000000 000300
414 000276' 010204 000000 MWORD <JZ,J=400,DISA,CCOF> ; disa/off (102)
415 000277' 000000 010000
416 000300' 010301 040000 MWORD <JMAP,J=104> ; (103)
417 000301' 000000 000040
418 000302' 010407 770000 MWORD <LDCT,J=777> ; load counter (104)
419 000303' 000000 000300
420 000304' 010504 000000 MWORD <JZ,J=400,DISA,CCON> ; disa/on (105)
421 000305' 000000 030000
422 000306' 010601 070000 MWORD <JMAP,J=107> ; (106)
423 000307' 000000 000040
424 000310' 010707 770000 MWORD <LDCT,J=777> ; load counter (107)
425 000311' 000000 000300
426 000312' 011004 000000 MWORD <JZ,J=400,ENA,CCOF> ; ena/off (110)
427 000313' 000400 010000
428 000314' 011101 120000 MWORD <JMAP,J=112> ; (111)
429 000315' 000000 000040
430 000316' 011207 770000 MWORD <LDCT,J=777> ; load counter (112)
431 000317' 000000 000300
432 000320' 011304 000000 MWORD <JZ,J=400,ENA,CCON> ; ena/on (113)
433 000321' 000400 030000
434
435 000322' 040004 000000 MWORD <ADDR=400,JMAP,J=400> ; error if here (400)
436 000323' 000000 000040
437 000324' 077704 000000 MWORD <ADDR=777,JMAP,J=400> ; succeed if here (777)
438 000325' 000000 000040
439 000326' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 12
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0701
440
441 ;#********************************************************************
442 ;* Test 4 - JZ Instruction - Effect on Reg/Ctr
443 ;
444 ; Description: Verify that the JZ instruction does not affect
445 ; the contents of the register/counter. Load the
446 ; counter, do a JZ, and branch to register contents
447 ; to see if it changed.
448 ;
449 ; Procedure: Clear Port
450 ; Load test microcode
451 ;
452 ; Set RAR to 100 (Test En/Cond=OFF/OFF)
453 ; Set MPRUN/SINGLE STEP (execute JMAP,LDCT,JZ,JRP)
454 ; Read LAR, and verify address = 777
455 ;
456 ; Set RAR to 103 (Test En/Cond=OFF/ON)
457 ; Set MPRUN/SINGLE STEP (execute JMAP,LDCT,JZ,JRP)
458 ; Read LAR, and verify address = 777
459 ;
460 ; Set RAR to 106 (Test En/Cond=ON/OFF)
461 ; Set MPRUN/SINGLE STEP (execute JMAP,LDCT,JZ,JRP)
462 ; Read LAR, and verify address = 777
463 ;
464 ; Set RAR to 111 (Test En/Cond=ON/ON)
465 ; Set MPRUN/SINGLE STEP (execute JMAP,LDCT,JZ,JRP)
466 ; Read LAR, and verify address = 777
467 ;
468 ; Failure: ---
469 ;#********************************************************************
470
471 ; Test data
472
473 000327' 254 00 0 00 000340' TSTS4: JRST TG4 ; go start test
474 000330' 240401 000004 SEQ!MPROC!NDMP!ZSEQ!4 ; test mask
475 000331' 000371' 010500' T4M,,[ASCIZ ^JZ Instruction - Effect on Reg/Ctr^]
476 000332' 010442' 010443' [EXP MLAST!M7],,[EXP M16,M9,E17,M1,MLAST!M8]
477 000333' 000000 000430' TSTS5 ; failure test table
478 000334' 000000 000564' TSTS6 ; ...
479 000335' 000000 000637' TSTS7
480 000336' 000000 000712' TSTS10
481 000337' 777777 777777 -1
482
483 ; Start test
484
485 000340' 201 00 0 00 000000' TG4: MOVEI Z3 ; get address of module start
486 000341' 260 17 0 00 000240* GO TRACE ; handle trace output
487 000342' 201 01 0 00 000371' MOVEI 1,T4M ; set up microcode address
488 000343' 260 17 0 00 000242* GO TLOAD ; load/verify it
489 000344' 263 17 0 00 000000 RTN ; failed - exit test
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 13
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0702
490
491 ; Initialization
492
493 000345' 260 17 0 00 000244* TL4: GO IPACLR ; clear port
494 000346' 402 00 0 00 000245* SETZM TSTSUB ; initialize subtest number
495 000347' 201 06 0 00 000362' MOVEI 6,TS4 ; get sstep table address
496
497 ; Loop on single step table entries
498
499 000350' 400 15 0 00 000000 TA4: SETZ ERFLG, ; clear error flag
500 000351' 260 17 0 00 000250* GO SEXEC ; execute table entry
501 000352' 254 00 0 00 000361' JRST TX4 ; end of sstep table
502 000353' 254 00 0 00 000350' JRST TA4 ; keep looping after call
503 000354' 474 15 0 00 000000 SETO ERFLG, ; error - end address incorrect
504
505 ; Handle error printouts and scope looping
506
507 000355' 027 00 0 00 000367' SCOPER MA4 ; print error message
508 000356' 254 00 0 00 000345' JRST TL4 ; loop on error
509 000357' 254 00 0 00 000361' JRST TX4 ; altmode exit
510 000360' 322 15 0 00 000350' JUMPE ERFLG,TA4 ; do next sstep table entry
511
512 ; End of test
513
514 000361' 263 17 0 00 000000 TX4: RTN ; return
515
516 ; Single step table, as: (CMD,#Steps,Start addr,End Addr)
517
518 000362' 100401 000777 TS4: STABLE (SSSTRT,4,100,777)
519 000363' 100401 030777 STABLE (SSSTRT,4,103,777)
520 000364' 100401 060777 STABLE (SSSTRT,4,106,777)
521 000365' 100401 110777 STABLE (SSSTRT,4,111,777)
522 000366' 000000 000000 STABLE (SSLAST)
523
524 ; Error messages
525
526 000367' 140000 010507' MA4: MSG!TXNOT![ASCIZ ^JZ affected Reg/Ctr^]
527 000370' 000000000000# LAST!CALL!TXALL!SSPNT ; print sequencer data
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 14
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0703
528
529 ; Test microcode
530
531 000371' 000004 000000 T4M: MWORD <ADDR=0,JRP,J=400,ENA,CCOF> ; jump to cntr addr
532 000372' 000400 010160
533 000373' 010001 010000 MWORD <ADDR=100,JMAP,J=101> ; (100)
534 000374' 000000 000040
535 000375' 010107 770000 MWORD <LDCT,J=777> ; load counter (101)
536 000376' 000000 000300
537 000377' 010200 000000 MWORD <JZ,J=0,DISA,CCOF> ; disa/off (102)
538 000400' 000000 010000
539 000401' 010301 040000 MWORD <JMAP,J=104> ; (103)
540 000402' 000000 000040
541 000403' 010407 770000 MWORD <LDCT,J=777> ; load counter (104)
542 000404' 000000 000300
543 000405' 010500 000000 MWORD <JZ,J=0,DISA,CCON> ; disa/on (105)
544 000406' 000000 030000
545 000407' 010601 070000 MWORD <JMAP,J=107> ; (106)
546 000410' 000000 000040
547 000411' 010707 770000 MWORD <LDCT,J=777> ; load counter (107)
548 000412' 000000 000300
549 000413' 011000 000000 MWORD <JZ,J=0,ENA,CCOF> ; ena/off (110)
550 000414' 000400 010000
551 000415' 011101 120000 MWORD <JMAP,J=112> ; (111)
552 000416' 000000 000040
553 000417' 011207 770000 MWORD <LDCT,J=777> ; load counter (112)
554 000420' 000000 000300
555 000421' 011300 000000 MWORD <JZ,J=0,ENA,CCON> ; ena/on (113)
556 000422' 000400 030000
557
558 000423' 040004 000000 MWORD <ADDR=400,JMAP,J=400> ; error if here (400)
559 000424' 000000 000040
560 000425' 077704 000000 MWORD <ADDR=777,JMAP,J=400> ; success if here (777)
561 000426' 000000 000040
562 000427' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 15
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0704
563
564 ;#********************************************************************
565 ;* Test 5 - CONT Instruction
566 ;
567 ; Description: Verify that the CONT instruction unconditionally
568 ; increments CRAM address by one. Load CRAM test
569 ; address with a CONT, then verify that the CONT
570 ; instruction produces test address + 1.
571 ;
572 ; Procedure: Clear Port
573 ; Load test microcode and set RAR to 0
574 ;
575 ; Set MPRUN/SINGLE STEP (execute JMAP)
576 ; Set MPRUN/SINGLE STEP (execute CONT)
577 ; Read LAR, and verify address = 2
578 ; Set MPRUN/SINGLE STEP (execute CONT)
579 ; Read LAR, and verify address = 3
580 ; Set MPRUN/SINGLE STEP (execute CONT)
581 ; Read LAR, and verify address = 4
582 ; Set MPRUN/SINGLE STEP (execute CONT)
583 ; Read LAR, and verify address = 5
584 ;
585 ; Set MPRUN/SINGLE STEP (execute JMAP,CONT)
586 ; Read LAR, and verify address = 10
587 ;
588 ; Repeat above 2 steps for CONT resulting
589 ; in LAR addresses of: 10,20,40,100,400,
590 ; 1000,2000,4000
591 ;
592 ; Failure: ---
593 ;#********************************************************************
594
595 ; Test data
596
597 000430' 254 00 0 00 000441' TSTS5: JRST TG5 ; go start test
598 000431' 240401 000005 SEQ!MPROC!NDMP!ZSEQ!5 ; test mask
599 000432' 000503' 010513' T5M,,[ASCIZ ^CONT Instruction^]
600 000433' 010442' 010517' [EXP MLAST!M7],,[EXP M16,M9,M1,MLAST!M8]
601 000434' 000000 000564' TSTS6 ; failure test table
602 000435' 000000 000637' TSTS7 ; ...
603 000436' 000000 000712' TSTS10
604 000437' 000000 000765' TSTS11
605 000440' 777777 777777 -1
606
607 ; Start test
608
609 000441' 201 00 0 00 000000' TG5: MOVEI Z3 ; get address of module start
610 000442' 260 17 0 00 000341* GO TRACE ; handle trace output
611 000443' 201 01 0 00 000503' MOVEI 1,T5M ; set up microcode address
612 000444' 260 17 0 00 000343* GO TLOAD ; load/verify it
613 000445' 263 17 0 00 000000 RTN ; failed - exit test
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 16
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0705
614
615 ; Initialization
616
617 000446' 260 17 0 00 000345* TL5: GO IPACLR ; clear port
618 000447' 402 00 0 00 000346* SETZM TSTSUB ; initialize subtest number
619 000450' 201 06 0 00 000463' MOVEI 6,TS5 ; get sstep table address
620
621 ; Loop on single step table entries
622
623 000451' 400 15 0 00 000000 TA5: SETZ ERFLG, ; clear error flag
624 000452' 260 17 0 00 000351* GO SEXEC ; execute table entry
625 000453' 254 00 0 00 000462' JRST TX5 ; end of sstep table
626 000454' 254 00 0 00 000451' JRST TA5 ; keep looping after call
627 000455' 474 15 0 00 000000 SETO ERFLG, ; error - end address incorrect
628
629 ; Handle error printouts and scope looping
630
631 000456' 027 00 0 00 000501' SCOPER MA5 ; print error message
632 000457' 254 00 0 00 000446' JRST TL5 ; loop on error
633 000460' 254 00 0 00 000462' JRST TX5 ; altmode exit
634 000461' 322 15 0 00 000451' JUMPE ERFLG,TA5 ; do next sstep table entry
635
636 ; End of test
637
638 000462' 263 17 0 00 000000 TX5: RTN ; return
639
640 ; Single step table, as: (CMD,#Steps,Start addr,End Addr)
641
642 000463' 100200 000002 TS5: STABLE (SSSTRT,2,0,2)
643 000464' 200100 000003 STABLE (SSCONT,1,3)
644 000465' 200100 000004 STABLE (SSCONT,1,4)
645 000466' 200100 000005 STABLE (SSCONT,1,5)
646 000467' 100200 060010 STABLE (SSSTRT,2,6,10)
647 000470' 100200 160020 STABLE (SSSTRT,2,16,20)
648 000471' 100200 360040 STABLE (SSSTRT,2,36,40)
649 000472' 100200 760100 STABLE (SSSTRT,2,76,100)
650 000473' 100201 760200 STABLE (SSSTRT,2,176,200)
651 000474' 100203 760400 STABLE (SSSTRT,2,376,400)
652 000475' 100207 761000 STABLE (SSSTRT,2,776,1000)
653 000476' 100217 762000 STABLE (SSSTRT,2,1776,2000)
654 000477' 100237 764000 STABLE (SSSTRT,2,3776,4000)
655 000500' 000000 000000 STABLE (SSLAST)
656
657 ; Error messages
658
659 000501' 140000 010523' MA5: MSG!TXNOT![ASCIZ /CONT did not go to PC+1/]
660 000502' 000000000000# LAST!CALL!TXALL!SSPNT ; print sequencer data
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 17
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0706
661
662 ; Test microcode
663
664 000503' 000000 010000 T5M: MWORD <ADDR=0,JMAP,J=1> ; 0
665 000504' 000000 000040
666 000505' 000100 440000 MWORD <CONT,J=44> ; 1
667 000506' 000000 000340
668 000507' 000200 440000 MWORD <CONT,J=44> ; 2
669 000510' 000000 000340
670 000511' 000300 440000 MWORD <CONT,J=44> ; 3
671 000512' 000000 000340
672 000513' 000400 440000 MWORD <CONT,J=44> ; 4
673 000514' 000000 000340
674 000515' 000600 070000 MWORD <ADDR=6,JMAP,J=7> ; 6
675 000516' 000000 000040
676 000517' 000700 440000 MWORD <CONT,J=44> ; 7
677 000520' 000000 000340
678 000521' 001600 170000 MWORD <ADDR=16,JMAP,J=17> ; 16
679 000522' 000000 000040
680 000523' 001700 440000 MWORD <CONT,J=44> ; 17
681 000524' 000000 000340
682 000525' 003600 370000 MWORD <ADDR=36,JMAP,J=37> ; 36
683 000526' 000000 000040
684 000527' 003700 440000 MWORD <CONT,J=44> ; 37
685 000530' 000000 000340
686 000531' 007600 770000 MWORD <ADDR=76,JMAP,J=77> ; 76
687 000532' 000000 000040
688 000533' 007700 440000 MWORD <CONT,J=44> ; 77
689 000534' 000000 000340
690 000535' 017601 770000 MWORD <ADDR=176,JMAP,J=177> ; 176
691 000536' 000000 000040
692 000537' 017700 440000 MWORD <CONT,J=44> ; 177
693 000540' 000000 000340
694 000541' 037603 770000 MWORD <ADDR=376,JMAP,J=377> ; 376
695 000542' 000000 000040
696 000543' 037700 440000 MWORD <CONT,J=44> ; 377
697 000544' 000000 000340
698 000545' 077607 770000 MWORD <ADDR=776,JMAP,J=777> ; 776
699 000546' 000000 000040
700 000547' 077700 440000 MWORD <CONT,J=44> ; 777
701 000550' 000000 000340
702 000551' 177617 770000 MWORD <ADDR=1776,JMAP,J=1777> ; 1776
703 000552' 000000 000040
704 000553' 177700 440000 MWORD <CONT,J=44> ; 1777
705 000554' 000000 000340
706 000555' 377637 770000 MWORD <ADDR=3776,JMAP,J=3777> ; 3776
707 000556' 000000 000040
708 000557' 377700 440000 MWORD <CONT,J=44> ; 3777
709 000560' 000000 000340
710 000561' 004400 440000 MWORD <ADDR=44,JMAP,J=44> ; error address
711 000562' 000000 000040
712 000563' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 18
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0707
713
714 ;#********************************************************************
715 ;* Test 6 - CJP Instruction
716 ;
717 ; Description: Verify that the CJP instruction causes a jump to
718 ; CRAM address specified by the direct inputs if
719 ; the TEST inputs are satisfied and does not jump
720 ; if the TEST inputs are not satisfied.
721 ;
722 ; Procedure: Clear Port
723 ; Load test microcode and set RAR to 0
724 ; Set MPRUN/SINGLE STEP (execute CJP)
725 ; Read LAR, and verify address = 37
726 ; Set MPRUN/SINGLE STEP (execute CJP)
727 ; Read LAR, and verify address = 77
728 ; Set MPRUN/SINGLE STEP (execute CJP)
729 ; Read LAR, and verify address = 137
730 ; Set MPRUN/SINGLE STEP (execute CJP)
731 ; Read LAR, and verify address = 140
732 ;
733 ; Failure: ---
734 ;#********************************************************************
735
736 ; Test data
737
738 000564' 254 00 0 00 000575' TSTS6: JRST TG6 ; go start test
739 000565' 240401 000006 SEQ!MPROC!NDMP!ZSEQ!6 ; test mask
740 000566' 000626' 010530' T6M,,[ASCIZ ^CJP Instruction^]
741 000567' 010442' 010517' [EXP MLAST!M7],,[EXP M16,M9,M1,MLAST!M8]
742 000570' 000000 000637' TSTS7 ; failure test table
743 000571' 000000 000712' TSTS10 ; ...
744 000572' 000000 000765' TSTS11
745 000573' 000000 001033' TSTS12
746 000574' 777777 777777 -1
747
748 ; Start test
749
750 000575' 201 00 0 00 000000' TG6: MOVEI Z3 ; get address of module start
751 000576' 260 17 0 00 000442* GO TRACE ; handle trace output
752 000577' 201 01 0 00 000626' MOVEI 1,T6M ; set up microcode address
753 000600' 260 17 0 00 000444* GO TLOAD ; load/verify it
754 000601' 263 17 0 00 000000 RTN ; failed - exit test
755
756 ; Initialization
757
758 000602' 260 17 0 00 000446* TL6: GO IPACLR ; clear port
759 000603' 402 00 0 00 000447* SETZM TSTSUB ; initialize subtest number
760 000604' 201 06 0 00 000617' MOVEI 6,TS6 ; get sstep table address
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 19
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0708
761
762 ; Loop on single step table entries
763
764 000605' 400 15 0 00 000000 TA6: SETZ ERFLG, ; clear error flag
765 000606' 260 17 0 00 000452* GO SEXEC ; execute table entry
766 000607' 254 00 0 00 000616' JRST TX6 ; end of sstep table
767 000610' 254 00 0 00 000605' JRST TA6 ; keep looping after call
768 000611' 474 15 0 00 000000 SETO ERFLG, ; error - end address incorrect
769
770 ; Handle error printouts and scope looping
771
772 000612' 027 00 0 00 000624' SCOPER MA6 ; print error message
773 000613' 254 00 0 00 000602' JRST TL6 ; loop on error
774 000614' 254 00 0 00 000616' JRST TX6 ; altmode exit
775 000615' 322 15 0 00 000605' JUMPE ERFLG,TA6 ; do next sstep table entry
776
777 ; End of test
778
779 000616' 263 17 0 00 000000 TX6: RTN ; return
780
781 ; Single step table, as: (CMD,#Steps,Start addr,End Addr)
782
783 000617' 100100 000037 TS6: STABLE (SSSTRT,1,0,37)
784 000620' 200100 000077 STABLE (SSCONT,1,77)
785 000621' 200100 000137 STABLE (SSCONT,1,137)
786 000622' 200100 000140 STABLE (SSCONT,1,140)
787 000623' 000000 000000 STABLE (SSLAST)
788
789 ; Error messages
790
791 000624' 140000 010534' MA6: MSG!TXNOT![ASCIZ /CJP did not dispatch correctly/]
792 000625' 000000000000# LAST!CALL!TXALL!SSPNT ; print sequencer data
793
794 ; Test microcode
795
796 000626' 000000 370000 T6M: MWORD <ADDR=0,CJP,DISA,CCOF,J=37> ; disa/off (0)
797 000627' 000000 010060
798 000630' 003700 770000 MWORD <ADDR=37,CJP,DISA,CCON,J=77> ; disa/on (37)
799 000631' 000000 030060
800 000632' 007701 370000 MWORD <ADDR=77,CJP,CENA,CCON,J=137> ; ena/on (77)
801 000633' 000400 030060
802 000634' 013707 770000 MWORD <ADDR=137,CJP,CENA,CCOF,J=777> ; ena/off (137)
803 000635' 000400 010060
804 000636' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 20
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0709
805
806 ;#********************************************************************
807 ;* Test 7 - CJV Instruction
808 ;
809 ; Description: Verify that the CJV instruction causes a jump if
810 ; the TEST inputs are satisfied and does not jump
811 ; if not.
812 ;
813 ; Procedure: Clear Port
814 ; Load test microcode and set RAR to 0
815 ; Set MPRUN/SINGLE STEP (execute CJV)
816 ; Read LAR, and verify address = 37
817 ; Set MPRUN/SINGLE STEP (execute CJV)
818 ; Read LAR, and verify address = 77
819 ; Set MPRUN/SINGLE STEP (execute CJV)
820 ; Read LAR, and verify address = 137
821 ; Set MPRUN/SINGLE STEP (execute CJV)
822 ; Read LAR, and verify address = 140
823 ;
824 ; Failure: ---
825 ;#********************************************************************
826
827 ; Test data
828
829 000637' 254 00 0 00 000650' TSTS7: JRST TG7 ; go start test
830 000640' 240401 000007 SEQ!MPROC!NDMP!ZSEQ!7 ; test mask
831 000641' 000701' 010543' T7M,,[ASCIZ ^CJV Instruction^]
832 000642' 010442' 010517' [EXP MLAST!M7],,[EXP M16,M9,M1,MLAST!M8]
833 000643' 000000 000712' TSTS10 ; failure test table
834 000644' 000000 000765' TSTS11 ; ...
835 000645' 000000 001033' TSTS12
836 000646' 000000 001113' TSTS13
837 000647' 777777 777777 -1
838
839 ; Start test
840
841 000650' 201 00 0 00 000000' TG7: MOVEI Z3 ; get address of module start
842 000651' 260 17 0 00 000576* GO TRACE ; handle trace output
843 000652' 201 01 0 00 000701' MOVEI 1,T7M ; set up microcode address
844 000653' 260 17 0 00 000600* GO TLOAD ; load/verify it
845 000654' 263 17 0 00 000000 RTN ; failed - exit test
846
847 ; Initialization
848
849 000655' 260 17 0 00 000602* TL7: GO IPACLR ; clear port
850 000656' 402 00 0 00 000603* SETZM TSTSUB ; initialize subtest number
851 000657' 201 06 0 00 000672' MOVEI 6,TS7 ; get sstep table address
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 21
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0710
852
853 ; Loop on single step table entries
854
855 000660' 400 15 0 00 000000 TA7: SETZ ERFLG, ; clear error flag
856 000661' 260 17 0 00 000606* GO SEXEC ; execute table entry
857 000662' 254 00 0 00 000671' JRST TX7 ; end of sstep table
858 000663' 254 00 0 00 000660' JRST TA7 ; keep looping after call
859 000664' 474 15 0 00 000000 SETO ERFLG, ; error - end address incorrect
860
861 ; Handle error printouts and scope looping
862
863 000665' 027 00 0 00 000677' SCOPER MA7 ; print error message
864 000666' 254 00 0 00 000655' JRST TL7 ; loop on error
865 000667' 254 00 0 00 000671' JRST TX7 ; altmode exit
866 000670' 322 15 0 00 000660' JUMPE ERFLG,TA7 ; do next sstep table entry
867
868 ; End of test
869
870 000671' 263 17 0 00 000000 TX7: RTN ; return
871
872 ; Single step table, as: (CMD,#Steps,Start addr,End Addr)
873
874 000672' 100100 000037 TS7: STABLE (SSSTRT,1,0,37)
875 000673' 200100 000077 STABLE (SSCONT,1,77)
876 000674' 200100 000137 STABLE (SSCONT,1,137)
877 000675' 200100 000140 STABLE (SSCONT,1,140)
878 000676' 000000 000000 STABLE (SSLAST)
879
880 ; Error messages
881
882 000677' 140000 010547' MA7: MSG!TXNOT![ASCIZ /CJV did not dispatch correctly/]
883 000700' 000000000000# LAST!CALL!TXALL!SSPNT ; print sequencer data
884
885 ; Test microcode
886
887 000701' 000000 370000 T7M: MWORD <ADDR=0,CJV,DISA,CCOF,J=37> ; disa/off (0)
888 000702' 000000 010140
889 000703' 003700 770000 MWORD <ADDR=37,CJV,DISA,CCON,J=77> ; disa/on (37)
890 000704' 000000 030140
891 000705' 007701 370000 MWORD <ADDR=77,CJV,CENA,CCON,J=137> ; ena/on (77)
892 000706' 000400 030140
893 000707' 013707 770000 MWORD <ADDR=137,CJV,CENA,CCOF,J=777> ; ena/off (137)
894 000710' 000400 010140
895 000711' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 22
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0711
896
897 ;#********************************************************************
898 ;* Test 10 - CJS Instruction
899 ;
900 ; Description: Verify that the CJS instruction jumps to the
901 ; specified subroutine address if the TEST input is
902 ; satisfied, and does not if not.
903 ;
904 ; Procedure: Clear Port
905 ; Load test microcode and set RAR to 0
906 ; Set MPRUN/SINGLE STEP (execute CJS)
907 ; Read LAR, and verify address = 37
908 ; Set MPRUN/SINGLE STEP (execute CJS)
909 ; Read LAR, and verify address = 77
910 ; Set MPRUN/SINGLE STEP (execute CJS)
911 ; Read LAR, and verify address = 137
912 ; Set MPRUN/SINGLE STEP (execute CJS)
913 ; Read LAR, and verify address = 140
914 ;
915 ; Failure: ---
916 ;#********************************************************************
917
918 ; Test data
919
920 000712' 254 00 0 00 000723' TSTS10: JRST TG10 ; go start test
921 000713' 240401 000010 SEQ!MPROC!NDMP!ZSEQ!10 ; test mask
922 000714' 000754' 010556' T10M,,[ASCIZ ^CJS Instruction^]
923 000715' 010442' 010517' [EXP MLAST!M7],,[EXP M16,M9,M1,MLAST!M8]
924 000716' 000000 000765' TSTS11 ; failure test table
925 000717' 000000 001033' TSTS12 ; ...
926 000720' 000000 001113' TSTS13
927 000721' 000000 001163' TSTS14
928 000722' 777777 777777 -1
929
930 ; Start test
931
932 000723' 201 00 0 00 000000' TG10: MOVEI Z3 ; get address of module start
933 000724' 260 17 0 00 000651* GO TRACE ; handle trace output
934 000725' 201 01 0 00 000754' MOVEI 1,T10M ; set up microcode address
935 000726' 260 17 0 00 000653* GO TLOAD ; load/verify it
936 000727' 263 17 0 00 000000 RTN ; failed - exit test
937
938 ; Initialization
939
940 000730' 260 17 0 00 000655* TL10: GO IPACLR ; clear port
941 000731' 402 00 0 00 000656* SETZM TSTSUB ; initialize subtest number
942 000732' 201 06 0 00 000745' MOVEI 6,TS10 ; get sstep table address
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 23
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0712
943
944 ; Loop on single step table entries
945
946 000733' 400 15 0 00 000000 TA10: SETZ ERFLG, ; clear error flag
947 000734' 260 17 0 00 000661* GO SEXEC ; execute table entry
948 000735' 254 00 0 00 000744' JRST TX10 ; end of sstep table
949 000736' 254 00 0 00 000733' JRST TA10 ; keep looping after call
950 000737' 474 15 0 00 000000 SETO ERFLG, ; error - end address incorrect
951
952 ; Handle error printouts and scope looping
953
954 000740' 027 00 0 00 000752' SCOPER MA10 ; print error message
955 000741' 254 00 0 00 000730' JRST TL10 ; loop on error
956 000742' 254 00 0 00 000744' JRST TX10 ; altmode exit
957 000743' 322 15 0 00 000733' JUMPE ERFLG,TA10 ; do next sstep table entry
958
959 ; End of test
960
961 000744' 263 17 0 00 000000 TX10: RTN ; return
962
963 ; Single step table, as: (CMD,#Steps,Start addr,End Addr)
964
965 000745' 100100 000037 TS10: STABLE (SSSTRT,1,0,37)
966 000746' 200100 000077 STABLE (SSCONT,1,77)
967 000747' 200100 000137 STABLE (SSCONT,1,137)
968 000750' 200100 000140 STABLE (SSCONT,1,140)
969 000751' 000000 000000 STABLE (SSLAST)
970
971 ; Error messages
972
973 000752' 140000 010562' MA10: MSG!TXNOT![ASCIZ /CJS did not dispatch correctly/]
974 000753' 000000000000# LAST!CALL!TXALL!SSPNT ; print sequencer data
975
976 ; Test microcode
977
978 000754' 000000 370000 T10M: MWORD <ADDR=0,CJS,DISA,CCOF,J=37> ; disa/off (0)
979 000755' 000000 010020
980 000756' 003700 770000 MWORD <ADDR=37,CJS,DISA,CCON,J=77> ; disa/on (37)
981 000757' 000000 030020
982 000760' 007701 370000 MWORD <ADDR=77,CJS,CENA,CCON,J=137> ; ena/on (77)
983 000761' 000400 030020
984 000762' 013707 770000 MWORD <ADDR=137,CJS,CENA,CCOF,J=777> ; ena/off (137)
985 000763' 000400 010020
986 000764' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 24
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0713
987
988 ;#********************************************************************
989 ;* Test 11 - CJS Instruction
990 ;
991 ; Description: Verify that the CJS instruction pushes 'adr + 1'
992 ; onto stack if TEST is asserted and that the CRTN
993 ; instruction correctly pops it off if TEST is
994 ; asserted. This test implicitly verifies that the
995 ; the first stack location can hold the value '1'
996 ; and that the stack pointer works to the extent
997 ; of handling a single push/pop.
998 ;
999 ; Procedure: Clear Port
1000 ; Load test microcode and set RAR to 1
1001 ; Set MPRUN/SINGLE STEP (execute the JZ)
1002 ; Set MPRUN/SINGLE STEP (execute the CJS)
1003 ; Set MPRUN/SINGLE STEP (execute the CRTN)
1004 ; Read LAR, and verify address = 1
1005 ;
1006 ; Failure: ---
1007 ;#********************************************************************
1008
1009 ; Test data
1010
1011 000765' 254 00 0 00 000776' TSTS11: JRST TG11 ; go start test
1012 000766' 240401 000011 SEQ!MPROC!NDMP!ZSEQ!11 ; test mask
1013 000767' 001024' 010556' T11M,,[ASCIZ ^CJS Instruction^]
1014 000770' 010442' 010517' [EXP MLAST!M7],,[EXP M16,M9,M1,MLAST!M8]
1015 000771' 000000 001033' TSTS12 ; failure test table
1016 000772' 000000 001113' TSTS13 ; ...
1017 000773' 000000 001163' TSTS14
1018 000774' 000000 001267' TSTS15
1019 000775' 777777 777777 -1
1020
1021 ; Start test
1022
1023 000776' 201 00 0 00 000000' TG11: MOVEI Z3 ; get address of module start
1024 000777' 260 17 0 00 000724* GO TRACE ; handle trace output
1025 001000' 201 01 0 00 001024' MOVEI 1,T11M ; set up microcode address
1026 001001' 260 17 0 00 000726* GO TLOAD ; load/verify it
1027 001002' 263 17 0 00 000000 RTN ; failed - exit test
1028
1029 ; Initialization
1030
1031 001003' 260 17 0 00 000730* TL11: GO IPACLR ; clear port
1032 001004' 402 00 0 00 000731* SETZM TSTSUB ; initialize subtest number
1033 001005' 201 06 0 00 001020' MOVEI 6,TS11 ; get sstep table address
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 25
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0714
1034
1035 ; Loop on single step table entries
1036
1037 001006' 400 15 0 00 000000 TA11: SETZ ERFLG, ; clear error flag
1038 001007' 260 17 0 00 000734* GO SEXEC ; execute table entry
1039 001010' 254 00 0 00 001017' JRST TX11 ; end of sstep table
1040 001011' 254 00 0 00 001006' JRST TA11 ; keep looping after call
1041 001012' 474 15 0 00 000000 SETO ERFLG, ; error - end address incorrect
1042
1043 ; Handle error printouts and scope looping
1044
1045 001013' 027 00 0 00 001022' SCOPER MA11 ; print error message
1046 001014' 254 00 0 00 001003' JRST TL11 ; loop on error
1047 001015' 254 00 0 00 001017' JRST TX11 ; altmode exit
1048 001016' 322 15 0 00 001006' JUMPE ERFLG,TA11 ; do next sstep table entry
1049
1050 ; End of test
1051
1052 001017' 263 17 0 00 000000 TX11: RTN ; return
1053
1054 ; Single step table, as: (CMD,#Steps,Start addr,End Addr)
1055
1056 001020' 100300 010001 TS11: STABLE (SSSTRT,3,1,1)
1057 001021' 000000 000000 STABLE (SSLAST)
1058
1059 ; Error messages
1060
1061 001022' 140000 010571' MA11: MSG!TXNOT![ASCIZ ^CJS/CRTN did not push/pop stack correctly^]
1062 001023' 000000000000# LAST!CALL!TXALL!SSPNT ; print sequencer data
1063
1064 ; Test microcode
1065
1066 001024' 000000 770000 T11M: MWORD <ADDR=0,CJS,J=77> ; call subroutine (0)
1067 001025' 000000 000020
1068 001026' 000100 000000 MWORD <ADDR=1,JZ> ; initialize stack (1)
1069 001027' 000000 000000
1070 001030' 007700 000000 MWORD <ADDR=77,CRTN> ; return to 1 (77)
1071 001031' 000000 000240
1072 001032' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 26
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0715
1073
1074 ;#********************************************************************
1075 ;* Test 12 - CJS Instruction
1076 ;
1077 ; Description: Verify that the CJS instruction does not push
1078 ; 'addr + 1' onto the stack if TEST is negated.
1079 ;
1080 ; Procedure: Clear Port
1081 ; Load test microcode and set RAR to 4
1082 ; Set MPRUN/SINGLE STEP (execute the JZ)
1083 ; Set MPRUN/SINGLE STEP (execute the CONT,CONT,CONT)
1084 ; Set MPRUN/SINGLE STEP (execute the CJS,CJS)
1085 ; Set MPRUN/SINGLE STEP (execute the CRTN)
1086 ; Read LAR, and verify address = 4
1087 ;
1088 ; Failure: ---
1089 ;#********************************************************************
1090
1091 ; Test data
1092
1093 001033' 254 00 0 00 001044' TSTS12: JRST TG12 ; go start test
1094 001034' 240401 000012 SEQ!MPROC!NDMP!ZSEQ!12 ; test mask
1095 001035' 001072' 010556' T12M,,[ASCIZ ^CJS Instruction^]
1096 001036' 010442' 010517' [EXP MLAST!M7],,[EXP M16,M9,M1,MLAST!M8]
1097 001037' 000000 001113' TSTS13 ; failure test table
1098 001040' 000000 001163' TSTS14 ; ...
1099 001041' 000000 001267' TSTS15
1100 001042' 000000 001461' TSTS16
1101 001043' 777777 777777 -1
1102
1103 ; Start test
1104
1105 001044' 201 00 0 00 000000' TG12: MOVEI Z3 ; get address of module start
1106 001045' 260 17 0 00 000777* GO TRACE ; handle trace output
1107 001046' 201 01 0 00 001072' MOVEI 1,T12M ; set up microcode address
1108 001047' 260 17 0 00 001001* GO TLOAD ; load/verify it
1109 001050' 263 17 0 00 000000 RTN ; failed - exit test
1110
1111 ; Initialization
1112
1113 001051' 260 17 0 00 001003* TL12: GO IPACLR ; clear port
1114 001052' 402 00 0 00 001004* SETZM TSTSUB ; initialize subtest number
1115 001053' 201 06 0 00 001066' MOVEI 6,TS12 ; get sstep table address
1116
1117 ; Loop on single step table entries
1118
1119 001054' 400 15 0 00 000000 TA12: SETZ ERFLG, ; clear error flag
1120 001055' 260 17 0 00 001007* GO SEXEC ; execute table entry
1121 001056' 254 00 0 00 001065' JRST TX12 ; end of sstep table
1122 001057' 254 00 0 00 001054' JRST TA12 ; keep looping after call
1123 001060' 474 15 0 00 000000 SETO ERFLG, ; error - end address incorrect
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 27
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0716
1124
1125 ; Handle error printouts and scope looping
1126
1127 001061' 027 00 0 00 001070' SCOPER MA12 ; print error message
1128 001062' 254 00 0 00 001051' JRST TL12 ; loop on error
1129 001063' 254 00 0 00 001065' JRST TX12 ; altmode exit
1130 001064' 322 15 0 00 001054' JUMPE ERFLG,TA12 ; do next sstep table entry
1131
1132 ; End of test
1133
1134 001065' 263 17 0 00 000000 TX12: RTN ; return
1135
1136 ; Single step table, as: (CMD,#Steps,Start addr,End Addr)
1137
1138 001066' 100700 040004 TS12: STABLE (SSSTRT,7,4,4)
1139 001067' 000000 000000 STABLE (SSLAST)
1140
1141 ; Error messages
1142
1143 001070' 140000 010602' MA12: MSG!TXNOT![ASCIZ /CJS without test conditions met shouldn't have affected stack/]
1144 001071' 000000000000# LAST!CALL!TXALL!SSPNT ; print sequencer data
1145
1146 ; Test microcode
1147
1148 001072' 000000 000000 T12M: MWORD <ADDR=0,CONT> ; (0)
1149 001073' 000000 000340
1150 001074' 000100 000000 MWORD <CONT> ; (1)
1151 001075' 000000 000340
1152 001076' 000200 000000 MWORD <CONT> ; (2)
1153 001077' 000000 000340
1154 001100' 000300 050000 MWORD <CJS,J=5> ; TEST satisfied (3)
1155 001101' 000000 000020
1156 001102' 000400 000000 MWORD <JZ> ; initialize stack (4)
1157 001103' 000000 000000
1158 001104' 000500 770000 MWORD <CJS,ENA,CCOF,J=77> ; no stack push (5)
1159 001105' 000400 010020
1160 001106' 000600 000000 MWORD <CRTN> ; return to 4 (6)
1161 001107' 000000 000240
1162
1163 001110' 007700 770000 MWORD <ADDR=77,JMAP,J=77> ; error if here (77)
1164 001111' 000000 000040
1165 001112' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 28
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0717
1166
1167 ;#********************************************************************
1168 ;* Test 13 - CRTN Instruction
1169 ;
1170 ; Description: Verify that the conditional CRTN instruction does
1171 ; not do a return if TEST inputs are not satisfied.
1172 ;
1173 ; Procedure: Clear Port
1174 ; Load test microcode and set RAR to 2
1175 ; Set MPRUN/SINGLE STEP (execute JZ,CJS)
1176 ; Set MPRUN/SINGLE STEP (execute CRTN)
1177 ; Read LAR, and verify address = 100
1178 ;
1179 ; Failure: ---
1180 ;#********************************************************************
1181
1182 ; Test data
1183
1184 001113' 254 00 0 00 001124' TSTS13: JRST TG13 ; go start test
1185 001114' 240401 000013 SEQ!MPROC!NDMP!ZSEQ!13 ; test mask
1186 001115' 001152' 010617' T13M,,[ASCIZ ^CRTN Instruction^]
1187 001116' 010442' 010517' [EXP MLAST!M7],,[EXP M16,M9,M1,MLAST!M8]
1188 001117' 000000 001163' TSTS14 ; failure test table
1189 001120' 000000 001267' TSTS15 ; ...
1190 001121' 000000 001461' TSTS16
1191 001122' 000000 001653' TSTS17
1192 001123' 777777 777777 -1
1193
1194 ; Start test
1195
1196 001124' 201 00 0 00 000000' TG13: MOVEI Z3 ; get address of module start
1197 001125' 260 17 0 00 001045* GO TRACE ; handle trace output
1198 001126' 201 01 0 00 001152' MOVEI 1,T13M ; set up microcode address
1199 001127' 260 17 0 00 001047* GO TLOAD ; load/verify it
1200 001130' 263 17 0 00 000000 RTN ; failed - exit test
1201
1202 ; Initialization
1203
1204 001131' 260 17 0 00 001051* TL13: GO IPACLR ; clear port
1205 001132' 402 00 0 00 001052* SETZM TSTSUB ; initialize subtest number
1206 001133' 201 06 0 00 001146' MOVEI 6,TS13 ; get sstep table address
1207
1208 ; Loop on single step table entries
1209
1210 001134' 400 15 0 00 000000 TA13: SETZ ERFLG, ; clear error flag
1211 001135' 260 17 0 00 001055* GO SEXEC ; execute table entry
1212 001136' 254 00 0 00 001145' JRST TX13 ; end of sstep table
1213 001137' 254 00 0 00 001134' JRST TA13 ; keep looping after call
1214 001140' 474 15 0 00 000000 SETO ERFLG, ; error - end address incorrect
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 29
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0718
1215
1216 ; Handle error printouts and scope looping
1217
1218 001141' 027 00 0 00 001150' SCOPER MA13 ; print error message
1219 001142' 254 00 0 00 001131' JRST TL13 ; loop on error
1220 001143' 254 00 0 00 001145' JRST TX13 ; altmode exit
1221 001144' 322 15 0 00 001134' JUMPE ERFLG,TA13 ; do next sstep table entry
1222
1223 ; End of test
1224
1225 001145' 263 17 0 00 000000 TX13: RTN ; return
1226
1227 ; Single step table, as: (CMD,#Steps,Start addr,End Addr)
1228
1229 001146' 100300 020100 TS13: STABLE (SSSTRT,3,2,100)
1230 001147' 000000 000000 STABLE (SSLAST)
1231
1232 ; Error messages
1233
1234 001150' 140000 010623' MA13: MSG!TXNOT![ASCIZ /CRTN did a return without test conditions satisfied/]
1235 001151' 000000000000# LAST!CALL!TXALL!SSPNT ; print sequencer data
1236
1237 ; Test microcode
1238
1239 001152' 000000 770000 T13M: MWORD <ADDR=0,CJS,J=77> ; call subroutine (0)
1240 001153' 000000 000020
1241 001154' 000100 010000 MWORD <JMAP,J=1> ; error if here (1)
1242 001155' 000000 000040
1243 001156' 000200 000000 MWORD <JZ> ; init stack pointer (2)
1244 001157' 000000 000000
1245 001160' 007700 000000 MWORD <ADDR=77,CRTN,ENA,CCOF> ; do not return (77)
1246 001161' 000400 010240
1247 001162' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 30
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0719
1248
1249 ;#********************************************************************
1250 ;* Test 14 - CRTN Instruction
1251 ;
1252 ; Description: Verify that the conditional CRTN instruction does
1253 ; a return if TEST inputs are asserted, and this is
1254 ; not affected by the register/counter contents.
1255 ;
1256 ; Procedure: Clear Port
1257 ; Load test microcode and set RAR to 15
1258 ; Set MPRUN/SINGLE STEP (execute JZ,LDCT,CJS,CRTN)
1259 ; Set MPRUN/SINGLE STEP (execute LDCT,CJS,CRTN)
1260 ; Set MPRUN/SINGLE STEP (execute LDCT,CJS,CRTN)
1261 ; Set MPRUN/SINGLE STEP (execute LDCT,CJS,CRTN)
1262 ; Set MPRUN/SINGLE STEP (execute LDCT,CJS,CRTN)
1263 ; Set MPRUN/SINGLE STEP (execute LDCT,CJS,CRTN)
1264 ; Read LAR, and verify address = 4
1265 ;
1266 ; Failure: ---
1267 ;#********************************************************************
1268
1269 ; Test data
1270
1271 001163' 254 00 0 00 001174' TSTS14: JRST TG14 ; go start test
1272 001164' 240401 000014 SEQ!MPROC!NDMP!ZSEQ!14 ; test mask
1273 001165' 001222' 010617' T14M,,[ASCIZ ^CRTN Instruction^]
1274 001166' 010442' 010517' [EXP MLAST!M7],,[EXP M16,M9,M1,MLAST!M8]
1275 001167' 000000 001267' TSTS15 ; failure test table
1276 001170' 000000 001461' TSTS16 ; ...
1277 001171' 000000 001653' TSTS17
1278 001172' 000000 002047' TSTS20
1279 001173' 777777 777777 -1
1280
1281 ; Start test
1282
1283 001174' 201 00 0 00 000000' TG14: MOVEI Z3 ; get address of module start
1284 001175' 260 17 0 00 001125* GO TRACE ; handle trace output
1285 001176' 201 01 0 00 001222' MOVEI 1,T14M ; set up microcode address
1286 001177' 260 17 0 00 001127* GO TLOAD ; load/verify it
1287 001200' 263 17 0 00 000000 RTN ; failed - exit test
1288
1289 ; Initialization
1290
1291 001201' 260 17 0 00 001131* TL14: GO IPACLR ; clear port
1292 001202' 402 00 0 00 001132* SETZM TSTSUB ; initialize subtest number
1293 001203' 201 06 0 00 001216' MOVEI 6,TS14 ; get sstep table address
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 31
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0720
1294
1295 ; Loop on single step table entries
1296
1297 001204' 400 15 0 00 000000 TA14: SETZ ERFLG, ; clear error flag
1298 001205' 260 17 0 00 001135* GO SEXEC ; execute table entry
1299 001206' 254 00 0 00 001215' JRST TX14 ; end of sstep table
1300 001207' 254 00 0 00 001204' JRST TA14 ; keep looping after call
1301 001210' 474 15 0 00 000000 SETO ERFLG, ; error - end address incorrect
1302
1303 ; Handle error printouts and scope looping
1304
1305 001211' 027 00 0 00 001220' SCOPER MA14 ; print error message
1306 001212' 254 00 0 00 001201' JRST TL14 ; loop on error
1307 001213' 254 00 0 00 001215' JRST TX14 ; altmode exit
1308 001214' 322 15 0 00 001204' JUMPE ERFLG,TA14 ; do next sstep table entry
1309
1310 ; End of test
1311
1312 001215' 263 17 0 00 000000 TX14: RTN ; return
1313
1314 ; Single step table, as: (CMD,#Steps,Start addr,End Addr)
1315
1316 001216' 102300 150014 TS14: STABLE (SSSTRT,^D19,15,14)
1317 001217' 000000 000000 STABLE (SSLAST)
1318
1319 ; Error messages
1320
1321 001220' 140000 010636' MA14: MSG!TXNOT![ASCIZ /CRTN either did not return or affected cntr/]
1322 001221' 000000000000# LAST!CALL!TXALL!SSPNT ; print sequencer data
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 32
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0721
1323
1324 ; Test microcode
1325
1326 001222' 000000 000000 T14M: MWORD <ADDR=0,LDCT,J=0> ; zero counter (0)
1327 001223' 000000 000300
1328 001224' 000100 770000 MWORD <CJS,J=77> ; call subroutine (1)
1329 001225' 000000 000020
1330 001226' 000207 770000 MWORD <LDCT,J=777> ; set counter to 777 (2)
1331 001227' 000000 000300
1332 001230' 000300 770000 MWORD <CJS,J=77> ; call subroutine (3)
1333 001231' 000000 000020
1334 001232' 000400 000000 MWORD <LDCT,J=0> ; zero counter (4)
1335 001233' 000000 000300
1336 001234' 000501 000000 MWORD <CJS,J=100> ; call subroutine (5)
1337 001235' 000000 000020
1338 001236' 000607 770000 MWORD <LDCT,J=777> ; set counter to 777 (6)
1339 001237' 000000 000300
1340 001240' 000701 000000 MWORD <CJS,J=100> ; call subroutine (7)
1341 001241' 000000 000020
1342 001242' 001000 000000 MWORD <LDCT,J=0> ; zero counter (10)
1343 001243' 000000 000300
1344 001244' 001101 010000 MWORD <CJS,J=101> ; call subroutine (11)
1345 001245' 000000 000020
1346 001246' 001207 770000 MWORD <LDCT,J=777> ; set counter to 777 (12)
1347 001247' 000000 000300
1348 001250' 001301 010000 MWORD <CJS,J=101> ; call subroutine (13)
1349 001251' 000000 000020
1350 001252' 001407 770000 MWORD <JMAP,J=777> ; done (14)
1351 001253' 000000 000040
1352 001254' 001500 000000 MWORD <JZ> ; initialize stack (15)
1353 001255' 000000 000000
1354
1355 001256' 007700 000000 MWORD <ADDR=77,CRTN,DISA,CCOF> ; disa/off (77)
1356 001257' 000000 010240
1357 001260' 010000 000000 MWORD <CRTN,DISA,CCON> ; disa/on (100)
1358 001261' 000000 030240
1359 001262' 010100 000000 MWORD <CRTN,ENA,CCON> ; ena/on (101)
1360 001263' 000400 030240
1361
1362 001264' 077707 770000 MWORD <ADDR=777,JMAP,J=777> ; error if here (777)
1363 001265' 000000 000040
1364 001266' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 33
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0722
1365
1366 ;#********************************************************************
1367 ;* Test 15 - Stack location #1
1368 ;
1369 ; Description: Verify that the first stack location can hold
1370 ; various data patterns.
1371 ;
1372 ; Procedure: Clear Port
1373 ; Load test microcode and set RAR to 73
1374 ; Set MPRUN/SINGLE STEP (execute JZ)
1375 ; Set MPRUN/SINGLE STEP 66 times
1376 ; Read LAR, and verify address = 5777
1377 ;
1378 ; Failure: ---
1379 ;#********************************************************************
1380
1381 ; Test data
1382
1383 001267' 254 00 0 00 001300' TSTS15: JRST TG15 ; go start test
1384 001270' 240401 000015 SEQ!MPROC!NDMP!ZSEQ!15 ; test mask
1385 001271' 001326' 010647' T15M,,[ASCIZ ^Stack location #1^]
1386 001272' 010442' 010517' [EXP MLAST!M7],,[EXP M16,M9,M1,MLAST!M8]
1387 001273' 000000 001461' TSTS16 ; failure test table
1388 001274' 000000 001653' TSTS17 ; ...
1389 001275' 000000 002047' TSTS20
1390 001276' 000000 002237' TSTS21
1391 001277' 777777 777777 -1
1392
1393 ; Start test
1394
1395 001300' 201 00 0 00 000000' TG15: MOVEI Z3 ; get address of module start
1396 001301' 260 17 0 00 001175* GO TRACE ; handle trace output
1397 001302' 201 01 0 00 001326' MOVEI 1,T15M ; set up microcode address
1398 001303' 260 17 0 00 001177* GO TLOAD ; load/verify it
1399 001304' 263 17 0 00 000000 RTN ; failed - exit test
1400
1401 ; Initialization
1402
1403 001305' 260 17 0 00 001201* TL15: GO IPACLR ; clear port
1404 001306' 402 00 0 00 001202* SETZM TSTSUB ; initialize subtest number
1405 001307' 201 06 0 00 001322' MOVEI 6,TS15 ; get sstep table address
1406
1407 ; Loop on single step table entries
1408
1409 001310' 400 15 0 00 000000 TA15: SETZ ERFLG, ; clear error flag
1410 001311' 260 17 0 00 001205* GO SEXEC ; execute table entry
1411 001312' 254 00 0 00 001321' JRST TX15 ; end of sstep table
1412 001313' 254 00 0 00 001310' JRST TA15 ; keep looping after call
1413 001314' 474 15 0 00 000000 SETO ERFLG, ; error - end address incorrect
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 34
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0723
1414
1415 ; Handle error printouts and scope looping
1416
1417 001315' 027 00 0 00 001324' SCOPER MA15 ; print error message
1418 001316' 254 00 0 00 001305' JRST TL15 ; loop on error
1419 001317' 254 00 0 00 001321' JRST TX15 ; altmode exit
1420 001320' 322 15 0 00 001310' JUMPE ERFLG,TA15 ; do next sstep table entry
1421
1422 ; End of test
1423
1424 001321' 263 17 0 00 000000 TX15: RTN ; return
1425
1426 ; Single step table, as: (CMD,#Steps,Start addr,End Addr)
1427
1428 001322' 110200 735777 TS15: STABLE (SSSTRT,^D66,73,5777)
1429 001323' 000000 000000 STABLE (SSLAST)
1430
1431 ; Error messages
1432
1433 001324' 140000 010653' MA15: MSG!TXNOT![ASCIZ /Stack location #1 broken/]
1434 001325' 000000000000# LAST!CALL!TXALL!SSPNT ; print sequencer data
1435
1436 ; Test microcode
1437
1438 001326' 000000 740000 T15M: MWORD <ADDR=0,CJS,J=74> ; call subroutine (0)
1439 001327' 000000 000020
1440 001330' 000100 740000 MWORD <CJS,J=74> ; call subroutine (1)
1441 001331' 000000 000020
1442 001332' 000200 740000 MWORD <CJS,J=74> ; call subroutine (2)
1443 001333' 000000 000020
1444 001334' 000300 740000 MWORD <CJS,J=74> ; call subroutine (3)
1445 001335' 000000 000020
1446 001336' 000400 070000 MWORD <JMAP,J=7> ; go to next address (4)
1447 001337' 000000 000040
1448 001340' 000700 740000 MWORD <ADDR=7,CJS,J=74> ; call subroutine (7)
1449 001341' 000000 000020
1450 001342' 001000 170000 MWORD <ADDR=10,JMAP,J=17> ; go to next address (10)
1451 001343' 000000 000040
1452 001344' 001700 740000 MWORD <ADDR=17,CJS,J=74> ; call subroutine (17)
1453 001345' 000000 000020
1454 001346' 002000 370000 MWORD <ADDR=20,JMAP,J=37> ; go to next address (20)
1455 001347' 000000 000040
1456 001350' 003700 740000 MWORD <ADDR=37,CJS,J=74> ; call subroutine (37)
1457 001351' 000000 000020
1458 001352' 004000 770000 MWORD <ADDR=40,JMAP,J=77> ; go to next address (40)
1459 001353' 000000 000040
1460 001354' 007700 740000 MWORD <ADDR=77,CJS,J=74> ; call subroutine (77)
1461 001355' 000000 000020
1462 001356' 010001 770000 MWORD <ADDR=100,JMAP,J=177> ; go to next address (100)
1463 001357' 000000 000040
1464 001360' 017700 740000 MWORD <ADDR=177,CJS,J=74> ; call subroutine (177)
1465 001361' 000000 000020
1466 001362' 020003 770000 MWORD <ADDR=200,JMAP,J=377> ; go to next address (200)
1467 001363' 000000 000040
1468 001364' 037700 740000 MWORD <ADDR=377,CJS,J=74> ; call subroutine (377)
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 34-1
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0724
1469 001365' 000000 000020
1470 001366' 040007 770000 MWORD <ADDR=400,JMAP,J=777> ; go to next address (400)
1471 001367' 000000 000040
1472 001370' 077700 740000 MWORD <ADDR=777,CJS,J=74> ; call subroutine (777)
1473 001371' 000000 000020
1474 001372' 100017 770000 MWORD <ADDR=1000,JMAP,J=1777> ; go to next address (1000)
1475 001373' 000000 000040
1476 001374' 177700 740000 MWORD <ADDR=1777,CJS,J=74> ; call subroutine (1777)
1477 001375' 000000 000020
1478 001376' 200037 770000 MWORD <ADDR=2000,JMAP,J=3777> ; go to next address (2000)
1479 001377' 000000 000040
1480 001400' 377700 740000 MWORD <ADDR=3777,CJS,J=74> ; call subroutine (3777)
1481 001401' 000000 000020
1482 001402' 400047 770000 MWORD <ADDR=4000,JMAP,J=4777> ; go to next address (4000)
1483 001403' 000000 000040
1484 001404' 477700 740000 MWORD <ADDR=4777,CJS,J=74> ; call subroutine (4777)
1485 001405' 000000 000020
1486 001406' 500053 770000 MWORD <ADDR=5000,JMAP,J=5377> ; go to next address (5000)
1487 001407' 000000 000040
1488 001410' 537700 740000 MWORD <ADDR=5377,CJS,J=74> ; call subroutine (5377)
1489 001411' 000000 000020
1490 001412' 540055 770000 MWORD <ADDR=5400,JMAP,J=5577> ; go to next address (5400)
1491 001413' 000000 000040
1492 001414' 557700 740000 MWORD <ADDR=5577,CJS,J=74> ; call subroutine (5577)
1493 001415' 000000 000020
1494 001416' 560056 770000 MWORD <ADDR=5600,JMAP,J=5677> ; go to next address (5600)
1495 001417' 000000 000040
1496 001420' 567700 740000 MWORD <ADDR=5677,CJS,J=74> ; call subroutine (5677)
1497 001421' 000000 000020
1498 001422' 570057 370000 MWORD <ADDR=5700,JMAP,J=5737> ; go to next address (5700)
1499 001423' 000000 000040
1500 001424' 573700 740000 MWORD <ADDR=5737,CJS,J=74> ; call subroutine (5737)
1501 001425' 000000 000020
1502 001426' 574057 570000 MWORD <ADDR=5740,JMAP,J=5757> ; go to next address (5740)
1503 001427' 000000 000040
1504 001430' 575700 740000 MWORD <ADDR=5757,CJS,J=74> ; call subroutine (5757)
1505 001431' 000000 000020
1506 001432' 576057 670000 MWORD <ADDR=5760,JMAP,J=5767> ; go to next address (5760)
1507 001433' 000000 000040
1508 001434' 576700 740000 MWORD <ADDR=5767,CJS,J=74> ; call subroutine (5767)
1509 001435' 000000 000020
1510 001436' 577057 730000 MWORD <ADDR=5770,JMAP,J=5773> ; go to next address (5770)
1511 001437' 000000 000040
1512 001440' 577300 740000 MWORD <ADDR=5773,CJS,J=74> ; call subroutine (5773)
1513 001441' 000000 000020
1514 001442' 577400 740000 MWORD <ADDR=5774,CJS,J=74> ; call subroutine (5774)
1515 001443' 000000 000020
1516 001444' 577500 740000 MWORD <ADDR=5775,CJS,J=74> ; call subroutine (5775)
1517 001445' 000000 000020
1518 001446' 577600 740000 MWORD <ADDR=5776,CJS,J=74> ; call subroutine (5776)
1519 001447' 000000 000020
1520 001450' 577724 000000 MWORD <ADDR=5777,JMAP,J=2400> ; done (5777)
1521 001451' 000000 000040
1522 001452' 240024 000000 MWORD <ADDR=2400,JMAP,J=2400> ; error (2400)
1523 001453' 000000 000040
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 34-2
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0725
1524
1525 001454' 007300 000000 MWORD <ADDR=73,JZ> ; initialize stack (73)
1526 001455' 000000 000000
1527 001456' 007400 000000 MWORD <ADDR=74,CRTN> ; return (74)
1528 001457' 000000 000240
1529 001460' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 35
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0726
1530
1531 ;#********************************************************************
1532 ;* Test 16 - Stack location #2
1533 ;
1534 ; Description: Verify that the second stack location can hold
1535 ; various data patterns.
1536 ;
1537 ; Procedure: Clear Port
1538 ; Load test microcode and set RAR to 73
1539 ; Set MPRUN/SINGLE STEP (execute JZ)
1540 ; Set MPRUN/SINGLE STEP 63 times
1541 ; Read LAR, and verify address = 5777
1542 ;
1543 ; Failure: ---
1544 ;#********************************************************************
1545
1546 ; Test data
1547
1548 001461' 254 00 0 00 001472' TSTS16: JRST TG16 ; go start test
1549 001462' 240401 000016 SEQ!MPROC!NDMP!ZSEQ!16 ; test mask
1550 001463' 001520' 010660' T16M,,[ASCIZ ^Stack location #2^]
1551 001464' 010442' 010517' [EXP MLAST!M7],,[EXP M16,M9,M1,MLAST!M8]
1552 001465' 000000 001653' TSTS17 ; failure test table
1553 001466' 000000 002047' TSTS20 ; ...
1554 001467' 000000 002237' TSTS21
1555 001470' 000000 002433' TSTS22
1556 001471' 777777 777777 -1
1557
1558 ; Start test
1559
1560 001472' 201 00 0 00 000000' TG16: MOVEI Z3 ; get address of module start
1561 001473' 260 17 0 00 001301* GO TRACE ; handle trace output
1562 001474' 201 01 0 00 001520' MOVEI 1,T16M ; set up microcode address
1563 001475' 260 17 0 00 001303* GO TLOAD ; load/verify it
1564 001476' 263 17 0 00 000000 RTN ; failed - exit test
1565
1566 ; Initialization
1567
1568 001477' 260 17 0 00 001305* TL16: GO IPACLR ; clear port
1569 001500' 402 00 0 00 001306* SETZM TSTSUB ; initialize subtest number
1570 001501' 201 06 0 00 001514' MOVEI 6,TS16 ; get sstep table address
1571
1572 ; Loop on single step table entries
1573
1574 001502' 400 15 0 00 000000 TA16: SETZ ERFLG, ; clear error flag
1575 001503' 260 17 0 00 001311* GO SEXEC ; execute table entry
1576 001504' 254 00 0 00 001513' JRST TX16 ; end of sstep table
1577 001505' 254 00 0 00 001502' JRST TA16 ; keep looping after call
1578 001506' 474 15 0 00 000000 SETO ERFLG, ; error - end address incorrect
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 36
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0727
1579
1580 ; Handle error printouts and scope looping
1581
1582 001507' 027 00 0 00 001516' SCOPER MA16 ; print error message
1583 001510' 254 00 0 00 001477' JRST TL16 ; loop on error
1584 001511' 254 00 0 00 001513' JRST TX16 ; altmode exit
1585 001512' 322 15 0 00 001502' JUMPE ERFLG,TA16 ; do next sstep table entry
1586
1587 ; End of test
1588
1589 001513' 263 17 0 00 000000 TX16: RTN ; return
1590
1591 ; Single step table, as: (CMD,#Steps,Start addr,End Addr)
1592
1593 001514' 107700 735777 TS16: STABLE (SSSTRT,^D63,73,5777)
1594 001515' 000000 000000 STABLE (SSLAST)
1595
1596 ; Error messages
1597
1598 001516' 140000 010664' MA16: MSG!TXNOT![ASCIZ /Stack location #2 broken/]
1599 001517' 000000000000# LAST!CALL!TXALL!SSPNT ; print sequencer data
1600
1601 ; Test microcode
1602
1603 001520' 000000 020000 T16M: MWORD <ADDR=0,CJS,J=2> ; call subroutine (0)
1604 001521' 000000 000020
1605 001522' 000100 010000 MWORD <JMAP,J=1> ; error loop (1)
1606 001523' 000000 000040
1607 001524' 000200 740000 MWORD <CJS,J=74> ; call subroutine (2)
1608 001525' 000000 000020
1609 001526' 000300 740000 MWORD <CJS,J=74> ; call subroutine (3)
1610 001527' 000000 000020
1611 001530' 000400 070000 MWORD <JMAP,J=7> ; go to next address (4)
1612 001531' 000000 000040
1613 001532' 000700 740000 MWORD <ADDR=7,CJS,J=74> ; call subroutine (7)
1614 001533' 000000 000020
1615 001534' 001000 170000 MWORD <ADDR=10,JMAP,J=17> ; go to next address (10)
1616 001535' 000000 000040
1617 001536' 001700 740000 MWORD <ADDR=17,CJS,J=74> ; call subroutine (17)
1618 001537' 000000 000020
1619 001540' 002000 370000 MWORD <ADDR=20,JMAP,J=37> ; go to next address (20)
1620 001541' 000000 000040
1621 001542' 003700 740000 MWORD <ADDR=37,CJS,J=74> ; call subroutine (37)
1622 001543' 000000 000020
1623 001544' 004000 770000 MWORD <ADDR=40,JMAP,J=77> ; go to next address (40)
1624 001545' 000000 000040
1625 001546' 007700 740000 MWORD <ADDR=77,CJS,J=74> ; call subroutine (77)
1626 001547' 000000 000020
1627 001550' 010001 770000 MWORD <ADDR=100,JMAP,J=177> ; go to next address (100)
1628 001551' 000000 000040
1629 001552' 017700 740000 MWORD <ADDR=177,CJS,J=74> ; call subroutine (177)
1630 001553' 000000 000020
1631 001554' 020003 770000 MWORD <ADDR=200,JMAP,J=377> ; go to next address (200)
1632 001555' 000000 000040
1633 001556' 037700 740000 MWORD <ADDR=377,CJS,J=74> ; call subroutine (377)
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 36-1
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0728
1634 001557' 000000 000020
1635 001560' 040007 770000 MWORD <ADDR=400,JMAP,J=777> ; go to next address (400)
1636 001561' 000000 000040
1637 001562' 077700 740000 MWORD <ADDR=777,CJS,J=74> ; call subroutine (777)
1638 001563' 000000 000020
1639 001564' 100017 770000 MWORD <ADDR=1000,JMAP,J=1777> ; go to next address (1000)
1640 001565' 000000 000040
1641 001566' 177700 740000 MWORD <ADDR=1777,CJS,J=74> ; call subroutine (1777)
1642 001567' 000000 000020
1643 001570' 200037 770000 MWORD <ADDR=2000,JMAP,J=3777> ; go to next address (2000)
1644 001571' 000000 000040
1645 001572' 377700 740000 MWORD <ADDR=3777,CJS,J=74> ; call subroutine (3777)
1646 001573' 000000 000020
1647 001574' 400047 770000 MWORD <ADDR=4000,JMAP,J=4777> ; go to next address (4000)
1648 001575' 000000 000040
1649 001576' 477700 740000 MWORD <ADDR=4777,CJS,J=74> ; call subroutine (4777)
1650 001577' 000000 000020
1651 001600' 500053 770000 MWORD <ADDR=5000,JMAP,J=5377> ; go to next address (5000)
1652 001601' 000000 000040
1653 001602' 537700 740000 MWORD <ADDR=5377,CJS,J=74> ; call subroutine (5377)
1654 001603' 000000 000020
1655 001604' 540055 770000 MWORD <ADDR=5400,JMAP,J=5577> ; go to next address (5400)
1656 001605' 000000 000040
1657 001606' 557700 740000 MWORD <ADDR=5577,CJS,J=74> ; call subroutine (5577)
1658 001607' 000000 000020
1659 001610' 560056 770000 MWORD <ADDR=5600,JMAP,J=5677> ; go to next address (5600)
1660 001611' 000000 000040
1661 001612' 567700 740000 MWORD <ADDR=5677,CJS,J=74> ; call subroutine (5677)
1662 001613' 000000 000020
1663 001614' 570057 370000 MWORD <ADDR=5700,JMAP,J=5737> ; go to next address (5700)
1664 001615' 000000 000040
1665 001616' 573700 740000 MWORD <ADDR=5737,CJS,J=74> ; call subroutine (5737)
1666 001617' 000000 000020
1667 001620' 574057 570000 MWORD <ADDR=5740,JMAP,J=5757> ; go to next address (5740)
1668 001621' 000000 000040
1669 001622' 575700 740000 MWORD <ADDR=5757,CJS,J=74> ; call subroutine (5757)
1670 001623' 000000 000020
1671 001624' 576057 670000 MWORD <ADDR=5760,JMAP,J=5767> ; go to next address (5760)
1672 001625' 000000 000040
1673 001626' 576700 740000 MWORD <ADDR=5767,CJS,J=74> ; call subroutine (5767)
1674 001627' 000000 000020
1675 001630' 577057 730000 MWORD <ADDR=5770,JMAP,J=5773> ; go to next address (5770)
1676 001631' 000000 000040
1677 001632' 577300 740000 MWORD <ADDR=5773,CJS,J=74> ; call subroutine (5773)
1678 001633' 000000 000020
1679 001634' 577400 740000 MWORD <ADDR=5774,CJS,J=74> ; call subroutine (5774)
1680 001635' 000000 000020
1681 001636' 577500 740000 MWORD <ADDR=5775,CJS,J=74> ; call subroutine (5775)
1682 001637' 000000 000020
1683 001640' 577600 740000 MWORD <ADDR=5776,CJS,J=74> ; call subroutine (5776)
1684 001641' 000000 000020
1685 001642' 577724 000000 MWORD <ADDR=5777,JMAP,J=2400> ; done (5777)
1686 001643' 000000 000040
1687 001644' 240024 000000 MWORD <ADDR=2400,JMAP,J=2400> ; error (2400)
1688 001645' 000000 000040
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 36-2
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0729
1689
1690 001646' 007300 000000 MWORD <ADDR=73,JZ> ; initialize stack (73)
1691 001647' 000000 000000
1692 001650' 007400 000000 MWORD <ADDR=74,CRTN> ; return (74)
1693 001651' 000000 000240
1694 001652' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 37
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0730
1695
1696 ;#********************************************************************
1697 ;* Test 17 - Stack location #3
1698 ;
1699 ; Description: Verify that the third stack location can hold
1700 ; various data patterns.
1701 ;
1702 ; Procedure: Clear Port
1703 ; Load test microcode and set RAR to 73
1704 ; Set MPRUN/SINGLE STEP (execute JZ)
1705 ; Set MPRUN/SINGLE STEP 61 times
1706 ; Read LAR, and verify address = 5777
1707 ;
1708 ; Failure: ---
1709 ;#********************************************************************
1710
1711 ; Test data
1712
1713 001653' 254 00 0 00 001664' TSTS17: JRST TG17 ; go start test
1714 001654' 240401 000017 SEQ!MPROC!NDMP!ZSEQ!17 ; test mask
1715 001655' 001712' 010671' T17M,,[ASCIZ ^Stack location #3^]
1716 001656' 010442' 010517' [EXP MLAST!M7],,[EXP M16,M9,M1,MLAST!M8]
1717 001657' 000000 002047' TSTS20 ; failure test table
1718 001660' 000000 002237' TSTS21 ; ...
1719 001661' 000000 002433' TSTS22
1720 001662' 000000 002511' TSTS23
1721 001663' 777777 777777 -1
1722
1723 ; Start test
1724
1725 001664' 201 00 0 00 000000' TG17: MOVEI Z3 ; get address of module start
1726 001665' 260 17 0 00 001473* GO TRACE ; handle trace output
1727 001666' 201 01 0 00 001712' MOVEI 1,T17M ; set up microcode address
1728 001667' 260 17 0 00 001475* GO TLOAD ; load/verify it
1729 001670' 263 17 0 00 000000 RTN ; failed - exit test
1730
1731 ; Initialization
1732
1733 001671' 260 17 0 00 001477* TL17: GO IPACLR ; clear port
1734 001672' 402 00 0 00 001500* SETZM TSTSUB ; initialize subtest number
1735 001673' 201 06 0 00 001706' MOVEI 6,TS17 ; get sstep table address
1736
1737 ; Loop on single step table entries
1738
1739 001674' 400 15 0 00 000000 TA17: SETZ ERFLG, ; clear error flag
1740 001675' 260 17 0 00 001503* GO SEXEC ; execute table entry
1741 001676' 254 00 0 00 001705' JRST TX17 ; end of sstep table
1742 001677' 254 00 0 00 001674' JRST TA17 ; keep looping after call
1743 001700' 474 15 0 00 000000 SETO ERFLG, ; error - end address incorrect
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 38
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0731
1744
1745 ; Handle error printouts and scope looping
1746
1747 001701' 027 00 0 00 001710' SCOPER MA17 ; print error message
1748 001702' 254 00 0 00 001671' JRST TL17 ; loop on error
1749 001703' 254 00 0 00 001705' JRST TX17 ; altmode exit
1750 001704' 322 15 0 00 001674' JUMPE ERFLG,TA17 ; do next sstep table entry
1751
1752 ; End of test
1753
1754 001705' 263 17 0 00 000000 TX17: RTN ; return
1755
1756 ; Single step table, as: (CMD,#Steps,Start addr,End Addr)
1757
1758 001706' 107600 735777 TS17: STABLE (SSSTRT,^D62,73,5777)
1759 001707' 000000 000000 STABLE (SSLAST)
1760
1761 ; Error messages
1762
1763 001710' 140000 010675' MA17: MSG!TXNOT![ASCIZ /Stack location #3 broken/]
1764 001711' 000000000000# LAST!CALL!TXALL!SSPNT ; print sequencer data
1765
1766 ; Test microcode
1767
1768 001712' 000000 020000 T17M: MWORD <ADDR=0,CJS,J=2> ; call subroutine (0)
1769 001713' 000000 000020
1770 001714' 000100 010000 MWORD <JMAP,J=1> ; error loop (1)
1771 001715' 000000 000040
1772 001716' 000200 040000 MWORD <CJS,J=4> ; call subroutine (2)
1773 001717' 000000 000020
1774 001720' 000300 030000 MWORD <JMAP,J=3> ; error loop (3)
1775 001721' 000000 000040
1776 001722' 000400 740000 MWORD <CJS,J=74> ; call subroutine (4)
1777 001723' 000000 000020
1778 001724' 000500 070000 MWORD <JMAP,J=7> ; go to next address (5)
1779 001725' 000000 000040
1780 001726' 000700 740000 MWORD <ADDR=7,CJS,J=74> ; call subroutine (7)
1781 001727' 000000 000020
1782 001730' 001000 170000 MWORD <ADDR=10,JMAP,J=17> ; go to next address (10)
1783 001731' 000000 000040
1784 001732' 001700 740000 MWORD <ADDR=17,CJS,J=74> ; call subroutine (17)
1785 001733' 000000 000020
1786 001734' 002000 370000 MWORD <ADDR=20,JMAP,J=37> ; go to next address (20)
1787 001735' 000000 000040
1788 001736' 003700 740000 MWORD <ADDR=37,CJS,J=74> ; call subroutine (37)
1789 001737' 000000 000020
1790 001740' 004000 770000 MWORD <ADDR=40,JMAP,J=77> ; go to next address (40)
1791 001741' 000000 000040
1792 001742' 007700 740000 MWORD <ADDR=77,CJS,J=74> ; call subroutine (77)
1793 001743' 000000 000020
1794 001744' 010001 770000 MWORD <ADDR=100,JMAP,J=177> ; go to next address (100)
1795 001745' 000000 000040
1796 001746' 017700 740000 MWORD <ADDR=177,CJS,J=74> ; call subroutine (177)
1797 001747' 000000 000020
1798 001750' 020003 770000 MWORD <ADDR=200,JMAP,J=377> ; go to next address (200)
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 38-1
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0732
1799 001751' 000000 000040
1800 001752' 037700 740000 MWORD <ADDR=377,CJS,J=74> ; call subroutine (377)
1801 001753' 000000 000020
1802 001754' 040007 770000 MWORD <ADDR=400,JMAP,J=777> ; go to next address (400)
1803 001755' 000000 000040
1804 001756' 077700 740000 MWORD <ADDR=777,CJS,J=74> ; call subroutine (777)
1805 001757' 000000 000020
1806 001760' 100017 770000 MWORD <ADDR=1000,JMAP,J=1777> ; go to next address (1000)
1807 001761' 000000 000040
1808 001762' 177700 740000 MWORD <ADDR=1777,CJS,J=74> ; call subroutine (1777)
1809 001763' 000000 000020
1810 001764' 200037 770000 MWORD <ADDR=2000,JMAP,J=3777> ; go to next address (2000)
1811 001765' 000000 000040
1812 001766' 377700 740000 MWORD <ADDR=3777,CJS,J=74> ; call subroutine (3777)
1813 001767' 000000 000020
1814 001770' 400047 770000 MWORD <ADDR=4000,JMAP,J=4777> ; go to next address (4000)
1815 001771' 000000 000040
1816 001772' 477700 740000 MWORD <ADDR=4777,CJS,J=74> ; call subroutine (4777)
1817 001773' 000000 000020
1818 001774' 500053 770000 MWORD <ADDR=5000,JMAP,J=5377> ; go to next address (5000)
1819 001775' 000000 000040
1820 001776' 537700 740000 MWORD <ADDR=5377,CJS,J=74> ; call subroutine (5377)
1821 001777' 000000 000020
1822 002000' 540055 770000 MWORD <ADDR=5400,JMAP,J=5577> ; go to next address (5400)
1823 002001' 000000 000040
1824 002002' 557700 740000 MWORD <ADDR=5577,CJS,J=74> ; call subroutine (5577)
1825 002003' 000000 000020
1826 002004' 560056 770000 MWORD <ADDR=5600,JMAP,J=5677> ; go to next address (5600)
1827 002005' 000000 000040
1828 002006' 567700 740000 MWORD <ADDR=5677,CJS,J=74> ; call subroutine (5677)
1829 002007' 000000 000020
1830 002010' 570057 370000 MWORD <ADDR=5700,JMAP,J=5737> ; go to next address (5700)
1831 002011' 000000 000040
1832 002012' 573700 740000 MWORD <ADDR=5737,CJS,J=74> ; call subroutine (5737)
1833 002013' 000000 000020
1834 002014' 574057 570000 MWORD <ADDR=5740,JMAP,J=5757> ; go to next address (5740)
1835 002015' 000000 000040
1836 002016' 575700 740000 MWORD <ADDR=5757,CJS,J=74> ; call subroutine (5757)
1837 002017' 000000 000020
1838 002020' 576057 670000 MWORD <ADDR=5760,JMAP,J=5767> ; go to next address (5760)
1839 002021' 000000 000040
1840 002022' 576700 740000 MWORD <ADDR=5767,CJS,J=74> ; call subroutine (5767)
1841 002023' 000000 000020
1842 002024' 577057 730000 MWORD <ADDR=5770,JMAP,J=5773> ; go to next address (5770)
1843 002025' 000000 000040
1844 002026' 577300 740000 MWORD <ADDR=5773,CJS,J=74> ; call subroutine (5773)
1845 002027' 000000 000020
1846 002030' 577400 740000 MWORD <ADDR=5774,CJS,J=74> ; call subroutine (5774)
1847 002031' 000000 000020
1848 002032' 577500 740000 MWORD <ADDR=5775,CJS,J=74> ; call subroutine (5775)
1849 002033' 000000 000020
1850 002034' 577600 740000 MWORD <ADDR=5776,CJS,J=74> ; call subroutine (5776)
1851 002035' 000000 000020
1852 002036' 577724 000000 MWORD <ADDR=5777,JMAP,J=2400> ; done (5777)
1853 002037' 000000 000040
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 38-2
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0733
1854 002040' 240024 000000 MWORD <ADDR=2400,JMAP,J=2400> ; error (2400)
1855 002041' 000000 000040
1856
1857 002042' 007300 000000 MWORD <ADDR=73,JZ> ; initialize stack (73)
1858 002043' 000000 000000
1859 002044' 007400 000000 MWORD <ADDR=74,CRTN> ; return (74)
1860 002045' 000000 000240
1861 002046' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 39
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0734
1862
1863 ;#********************************************************************
1864 ;* Test 20 - Stack location #4
1865 ;
1866 ; Description: Verify that the fourth stack location can hold
1867 ; various data patterns.
1868 ;
1869 ; Procedure: Clear Port
1870 ; Load test microcode and set RAR to 73
1871 ; Set MPRUN/SINGLE STEP (execute JZ)
1872 ; Set MPRUN/SINGLE STEP 61 times
1873 ; Read LAR, and verify address = 5777
1874 ;
1875 ; Failure: ---
1876 ;#********************************************************************
1877
1878 ; Test data
1879
1880 002047' 254 00 0 00 002060' TSTS20: JRST TG20 ; go start test
1881 002050' 240401 000020 SEQ!MPROC!NDMP!ZSEQ!20 ; test mask
1882 002051' 002106' 010702' T20M,,[ASCIZ ^Stack location #4^]
1883 002052' 010442' 010517' [EXP MLAST!M7],,[EXP M16,M9,M1,MLAST!M8]
1884 002053' 000000 002237' TSTS21 ; failure test table
1885 002054' 000000 002433' TSTS22 ; ...
1886 002055' 000000 002511' TSTS23
1887 002056' 000000 002571' TSTS24
1888 002057' 777777 777777 -1
1889
1890 ; Start test
1891
1892 002060' 201 00 0 00 000000' TG20: MOVEI Z3 ; get address of module start
1893 002061' 260 17 0 00 001665* GO TRACE ; handle trace output
1894 002062' 201 01 0 00 002106' MOVEI 1,T20M ; set up microcode address
1895 002063' 260 17 0 00 001667* GO TLOAD ; load/verify it
1896 002064' 263 17 0 00 000000 RTN ; failed - exit test
1897
1898 ; Initialization
1899
1900 002065' 260 17 0 00 001671* TL20: GO IPACLR ; clear port
1901 002066' 402 00 0 00 001672* SETZM TSTSUB ; initialize subtest number
1902 002067' 201 06 0 00 002102' MOVEI 6,TS20 ; get sstep table address
1903
1904 ; Loop on single step table entries
1905
1906 002070' 400 15 0 00 000000 TA20: SETZ ERFLG, ; clear error flag
1907 002071' 260 17 0 00 001675* GO SEXEC ; execute table entry
1908 002072' 254 00 0 00 002101' JRST TX20 ; end of sstep table
1909 002073' 254 00 0 00 002070' JRST TA20 ; keep looping after call
1910 002074' 474 15 0 00 000000 SETO ERFLG, ; error - end address incorrect
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 40
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0735
1911
1912 ; Handle error printouts and scope looping
1913
1914 002075' 027 00 0 00 002104' SCOPER MA20 ; print error message
1915 002076' 254 00 0 00 002065' JRST TL20 ; loop on error
1916 002077' 254 00 0 00 002101' JRST TX20 ; altmode exit
1917 002100' 322 15 0 00 002070' JUMPE ERFLG,TA20 ; do next sstep table entry
1918
1919 ; End of test
1920
1921 002101' 263 17 0 00 000000 TX20: RTN ; return
1922
1923 ; Single step table, as: (CMD,#Steps,Start addr,End Addr)
1924
1925 002102' 107400 735777 TS20: STABLE (SSSTRT,^D60,73,5777)
1926 002103' 000000 000000 STABLE (SSLAST)
1927
1928 ; Error messages
1929
1930 002104' 140000 010706' MA20: MSG!TXNOT![ASCIZ /Stack location #4 broken/]
1931 002105' 000000000000# LAST!CALL!TXALL!SSPNT ; print sequencer data
1932
1933 ; Test microcode
1934
1935 002106' 000000 020000 T20M: MWORD <ADDR=0,CJS,J=2> ; call subroutine (0)
1936 002107' 000000 000020
1937 002110' 000100 010000 MWORD <JMAP,J=1> ; error loop (1)
1938 002111' 000000 000040
1939 002112' 000200 040000 MWORD <CJS,J=4> ; call subroutine (2)
1940 002113' 000000 000020
1941 002114' 000300 030000 MWORD <JMAP,J=3> ; error loop (3)
1942 002115' 000000 000040
1943 002116' 000400 070000 MWORD <CJS,J=7> ; call subroutine (4)
1944 002117' 000000 000020
1945 002120' 000500 050000 MWORD <JMAP,J=5> ; go to next address (5)
1946 002121' 000000 000040
1947 002122' 000700 740000 MWORD <ADDR=7,CJS,J=74> ; call subroutine (7)
1948 002123' 000000 000020
1949 002124' 001000 170000 MWORD <ADDR=10,JMAP,J=17> ; go to next address (10)
1950 002125' 000000 000040
1951 002126' 001700 740000 MWORD <ADDR=17,CJS,J=74> ; call subroutine (17)
1952 002127' 000000 000020
1953 002130' 002000 370000 MWORD <ADDR=20,JMAP,J=37> ; go to next address (20)
1954 002131' 000000 000040
1955 002132' 003700 740000 MWORD <ADDR=37,CJS,J=74> ; call subroutine (37)
1956 002133' 000000 000020
1957 002134' 004000 770000 MWORD <ADDR=40,JMAP,J=77> ; go to next address (40)
1958 002135' 000000 000040
1959 002136' 007700 740000 MWORD <ADDR=77,CJS,J=74> ; call subroutine (77)
1960 002137' 000000 000020
1961 002140' 010001 770000 MWORD <ADDR=100,JMAP,J=177> ; go to next address (100)
1962 002141' 000000 000040
1963 002142' 017700 740000 MWORD <ADDR=177,CJS,J=74> ; call subroutine (177)
1964 002143' 000000 000020
1965 002144' 020003 770000 MWORD <ADDR=200,JMAP,J=377> ; go to next address (200)
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 40-1
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0736
1966 002145' 000000 000040
1967 002146' 037700 740000 MWORD <ADDR=377,CJS,J=74> ; call subroutine (377)
1968 002147' 000000 000020
1969 002150' 040007 770000 MWORD <ADDR=400,JMAP,J=777> ; go to next address (400)
1970 002151' 000000 000040
1971 002152' 077700 740000 MWORD <ADDR=777,CJS,J=74> ; call subroutine (777)
1972 002153' 000000 000020
1973 002154' 100017 770000 MWORD <ADDR=1000,JMAP,J=1777> ; go to next address (1000)
1974 002155' 000000 000040
1975 002156' 177700 740000 MWORD <ADDR=1777,CJS,J=74> ; call subroutine (1777)
1976 002157' 000000 000020
1977 002160' 200037 770000 MWORD <ADDR=2000,JMAP,J=3777> ; go to next address (2000)
1978 002161' 000000 000040
1979 002162' 377700 740000 MWORD <ADDR=3777,CJS,J=74> ; call subroutine (3777)
1980 002163' 000000 000020
1981 002164' 400047 770000 MWORD <ADDR=4000,JMAP,J=4777> ; go to next address (4000)
1982 002165' 000000 000040
1983 002166' 477700 740000 MWORD <ADDR=4777,CJS,J=74> ; call subroutine (4777)
1984 002167' 000000 000020
1985 002170' 500053 770000 MWORD <ADDR=5000,JMAP,J=5377> ; go to next address (5000)
1986 002171' 000000 000040
1987 002172' 537700 740000 MWORD <ADDR=5377,CJS,J=74> ; call subroutine (5377)
1988 002173' 000000 000020
1989 002174' 540055 770000 MWORD <ADDR=5400,JMAP,J=5577> ; go to next address (5400)
1990 002175' 000000 000040
1991 002176' 557700 740000 MWORD <ADDR=5577,CJS,J=74> ; call subroutine (5577)
1992 002177' 000000 000020
1993 002200' 560056 770000 MWORD <ADDR=5600,JMAP,J=5677> ; go to next address (5600)
1994 002201' 000000 000040
1995 002202' 567700 740000 MWORD <ADDR=5677,CJS,J=74> ; call subroutine (5677)
1996 002203' 000000 000020
1997 002204' 570057 370000 MWORD <ADDR=5700,JMAP,J=5737> ; go to next address (5700)
1998 002205' 000000 000040
1999 002206' 573700 740000 MWORD <ADDR=5737,CJS,J=74> ; call subroutine (5737)
2000 002207' 000000 000020
2001 002210' 574057 570000 MWORD <ADDR=5740,JMAP,J=5757> ; go to next address (5740)
2002 002211' 000000 000040
2003 002212' 575700 740000 MWORD <ADDR=5757,CJS,J=74> ; call subroutine (5757)
2004 002213' 000000 000020
2005 002214' 576057 670000 MWORD <ADDR=5760,JMAP,J=5767> ; go to next address (5760)
2006 002215' 000000 000040
2007 002216' 576700 740000 MWORD <ADDR=5767,CJS,J=74> ; call subroutine (5767)
2008 002217' 000000 000020
2009 002220' 577057 730000 MWORD <ADDR=5770,JMAP,J=5773> ; go to next address (5770)
2010 002221' 000000 000040
2011 002222' 577300 740000 MWORD <ADDR=5773,CJS,J=74> ; call subroutine (5773)
2012 002223' 000000 000020
2013 002224' 577400 740000 MWORD <ADDR=5774,CJS,J=74> ; call subroutine (5774)
2014 002225' 000000 000020
2015 002226' 577500 740000 MWORD <ADDR=5775,CJS,J=74> ; call subroutine (5775)
2016 002227' 000000 000020
2017 002230' 577600 740000 MWORD <ADDR=5776,CJS,J=74> ; call subroutine (5776)
2018 002231' 000000 000020
2019
2020 002232' 007300 000000 MWORD <ADDR=73,JZ> ; initialize stack (73)
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 40-2
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0737
2021 002233' 000000 000000
2022 002234' 007400 000000 MWORD <ADDR=74,CRTN> ; return (74)
2023 002235' 000000 000240
2024 002236' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 41
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0738
2025
2026 ;#********************************************************************
2027 ;* Test 21 - Stack location #5
2028 ;
2029 ; Description: Verify that the fifth stack location can hold
2030 ; various data patterns.
2031 ;
2032 ; Procedure: Clear Port
2033 ; Load test microcode and set RAR to 73
2034 ; Set MPRUN/SINGLE STEP (execute JZ)
2035 ; Set MPRUN/SINGLE STEP 61 times
2036 ; Read LAR, and verify address = 5777
2037 ;
2038 ; Failure: ---
2039 ;#********************************************************************
2040
2041 ; Test data
2042
2043 002237' 254 00 0 00 002250' TSTS21: JRST TG21 ; go start test
2044 002240' 240401 000021 SEQ!MPROC!NDMP!ZSEQ!21 ; test mask
2045 002241' 002276' 010713' T21M,,[ASCIZ ^Stack location #5^]
2046 002242' 010442' 010517' [EXP MLAST!M7],,[EXP M16,M9,M1,MLAST!M8]
2047 002243' 000000 002433' TSTS22 ; failure test table
2048 002244' 000000 002511' TSTS23 ; ...
2049 002245' 000000 002571' TSTS24
2050 002246' 000000 002653' TSTS25
2051 002247' 777777 777777 -1
2052
2053 ; Start test
2054
2055 002250' 201 00 0 00 000000' TG21: MOVEI Z3 ; get address of module start
2056 002251' 260 17 0 00 002061* GO TRACE ; handle trace output
2057 002252' 201 01 0 00 002276' MOVEI 1,T21M ; set up microcode address
2058 002253' 260 17 0 00 002063* GO TLOAD ; load/verify it
2059 002254' 263 17 0 00 000000 RTN ; failed - exit test
2060
2061 ; Initialization
2062
2063 002255' 260 17 0 00 002065* TL21: GO IPACLR ; clear port
2064 002256' 402 00 0 00 002066* SETZM TSTSUB ; initialize subtest number
2065 002257' 201 06 0 00 002272' MOVEI 6,TS21 ; get sstep table address
2066
2067 ; Loop on single step table entries
2068
2069 002260' 400 15 0 00 000000 TA21: SETZ ERFLG, ; clear error flag
2070 002261' 260 17 0 00 002071* GO SEXEC ; execute table entry
2071 002262' 254 00 0 00 002271' JRST TX21 ; end of sstep table
2072 002263' 254 00 0 00 002260' JRST TA21 ; keep looping after call
2073 002264' 474 15 0 00 000000 SETO ERFLG, ; error - end address incorrect
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 42
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0739
2074
2075 ; Handle error printouts and scope looping
2076
2077 002265' 027 00 0 00 002274' SCOPER MA21 ; print error message
2078 002266' 254 00 0 00 002255' JRST TL21 ; loop on error
2079 002267' 254 00 0 00 002271' JRST TX21 ; altmode exit
2080 002270' 322 15 0 00 002260' JUMPE ERFLG,TA21 ; do next sstep table entry
2081
2082 ; End of test
2083
2084 002271' 263 17 0 00 000000 TX21: RTN ; return
2085
2086 ; Single step table, as: (CMD,#Steps,Start addr,End Addr)
2087
2088 002272' 107200 735777 TS21: STABLE (SSSTRT,^D58,73,5777)
2089 002273' 000000 000000 STABLE (SSLAST)
2090
2091 ; Error messages
2092
2093 002274' 140000 010717' MA21: MSG!TXNOT![ASCIZ /Stack location #5 broken/]
2094 002275' 000000000000# LAST!CALL!TXALL!SSPNT ; print sequencer data
2095
2096 ; Test microcode
2097
2098 002276' 000000 020000 T21M: MWORD <ADDR=0,CJS,J=2> ; call subroutine (0)
2099 002277' 000000 000020
2100 002300' 000100 010000 MWORD <JMAP,J=1> ; error loop (1)
2101 002301' 000000 000040
2102 002302' 000200 040000 MWORD <CJS,J=4> ; call subroutine (2)
2103 002303' 000000 000020
2104 002304' 000300 030000 MWORD <JMAP,J=3> ; error loop (3)
2105 002305' 000000 000040
2106 002306' 000400 070000 MWORD <CJS,J=7> ; call subroutine (4)
2107 002307' 000000 000020
2108 002310' 000500 050000 MWORD <JMAP,J=5> ; go to next address (5)
2109 002311' 000000 000040
2110 002312' 000700 170000 MWORD <ADDR=7,CJS,J=17> ; call subroutine (7)
2111 002313' 000000 000020
2112 002314' 001000 100000 MWORD <ADDR=10,JMAP,J=10> ; go to next address (10)
2113 002315' 000000 000040
2114 002316' 001700 740000 MWORD <ADDR=17,CJS,J=74> ; call subroutine (17)
2115 002317' 000000 000020
2116 002320' 002000 370000 MWORD <ADDR=20,JMAP,J=37> ; go to next address (20)
2117 002321' 000000 000040
2118 002322' 003700 740000 MWORD <ADDR=37,CJS,J=74> ; call subroutine (37)
2119 002323' 000000 000020
2120 002324' 004000 770000 MWORD <ADDR=40,JMAP,J=77> ; go to next address (40)
2121 002325' 000000 000040
2122 002326' 007700 740000 MWORD <ADDR=77,CJS,J=74> ; call subroutine (77)
2123 002327' 000000 000020
2124 002330' 010001 770000 MWORD <ADDR=100,JMAP,J=177> ; go to next address (100)
2125 002331' 000000 000040
2126 002332' 017700 740000 MWORD <ADDR=177,CJS,J=74> ; call subroutine (177)
2127 002333' 000000 000020
2128 002334' 020003 770000 MWORD <ADDR=200,JMAP,J=377> ; go to next address (200)
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 42-1
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0740
2129 002335' 000000 000040
2130 002336' 037700 740000 MWORD <ADDR=377,CJS,J=74> ; call subroutine (377)
2131 002337' 000000 000020
2132 002340' 040007 770000 MWORD <ADDR=400,JMAP,J=777> ; go to next address (400)
2133 002341' 000000 000040
2134 002342' 077700 740000 MWORD <ADDR=777,CJS,J=74> ; call subroutine (777)
2135 002343' 000000 000020
2136 002344' 100017 770000 MWORD <ADDR=1000,JMAP,J=1777> ; go to next address (1000)
2137 002345' 000000 000040
2138 002346' 177700 740000 MWORD <ADDR=1777,CJS,J=74> ; call subroutine (1777)
2139 002347' 000000 000020
2140 002350' 200037 770000 MWORD <ADDR=2000,JMAP,J=3777> ; go to next address (2000)
2141 002351' 000000 000040
2142 002352' 377700 740000 MWORD <ADDR=3777,CJS,J=74> ; call subroutine (3777)
2143 002353' 000000 000020
2144 002354' 400047 770000 MWORD <ADDR=4000,JMAP,J=4777> ; go to next address (4000)
2145 002355' 000000 000040
2146 002356' 477700 740000 MWORD <ADDR=4777,CJS,J=74> ; call subroutine (4777)
2147 002357' 000000 000020
2148 002360' 500053 770000 MWORD <ADDR=5000,JMAP,J=5377> ; go to next address (5000)
2149 002361' 000000 000040
2150 002362' 537700 740000 MWORD <ADDR=5377,CJS,J=74> ; call subroutine (5377)
2151 002363' 000000 000020
2152 002364' 540055 770000 MWORD <ADDR=5400,JMAP,J=5577> ; go to next address (5400)
2153 002365' 000000 000040
2154 002366' 557700 740000 MWORD <ADDR=5577,CJS,J=74> ; call subroutine (5577)
2155 002367' 000000 000020
2156 002370' 560056 770000 MWORD <ADDR=5600,JMAP,J=5677> ; go to next address (5600)
2157 002371' 000000 000040
2158 002372' 567700 740000 MWORD <ADDR=5677,CJS,J=74> ; call subroutine (5677)
2159 002373' 000000 000020
2160 002374' 570057 370000 MWORD <ADDR=5700,JMAP,J=5737> ; go to next address (5700)
2161 002375' 000000 000040
2162 002376' 573700 740000 MWORD <ADDR=5737,CJS,J=74> ; call subroutine (5737)
2163 002377' 000000 000020
2164 002400' 574057 570000 MWORD <ADDR=5740,JMAP,J=5757> ; go to next address (5740)
2165 002401' 000000 000040
2166 002402' 575700 740000 MWORD <ADDR=5757,CJS,J=74> ; call subroutine (5757)
2167 002403' 000000 000020
2168 002404' 576057 670000 MWORD <ADDR=5760,JMAP,J=5767> ; go to next address (5760)
2169 002405' 000000 000040
2170 002406' 576700 740000 MWORD <ADDR=5767,CJS,J=74> ; call subroutine (5767)
2171 002407' 000000 000020
2172 002410' 577057 730000 MWORD <ADDR=5770,JMAP,J=5773> ; go to next address (5770)
2173 002411' 000000 000040
2174 002412' 577300 740000 MWORD <ADDR=5773,CJS,J=74> ; call subroutine (5773)
2175 002413' 000000 000020
2176 002414' 577400 740000 MWORD <ADDR=5774,CJS,J=74> ; call subroutine (5774)
2177 002415' 000000 000020
2178 002416' 577500 740000 MWORD <ADDR=5775,CJS,J=74> ; call subroutine (5775)
2179 002417' 000000 000020
2180 002420' 577600 740000 MWORD <ADDR=5776,CJS,J=74> ; call subroutine (5776)
2181 002421' 000000 000020
2182 002422' 577724 000000 MWORD <ADDR=5777,JMAP,J=2400> ; done (5777)
2183 002423' 000000 000040
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 42-2
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0741
2184 002424' 240024 000000 MWORD <ADDR=2400,JMAP,J=2400> ; error (2400)
2185 002425' 000000 000040
2186
2187 002426' 007300 000000 MWORD <ADDR=73,JZ> ; initialize stack (73)
2188 002427' 000000 000000
2189 002430' 007400 000000 MWORD <ADDR=74,CRTN> ; return (74)
2190 002431' 000000 000240
2191 002432' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 43
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0742
2192
2193 ;#********************************************************************
2194 ;* Test 22 - Increment/Decrement Stack Pointer
2195 ;
2196 ; Description: Verify that the 2910 stack pointer increments and
2197 ; decrements correctly. Do five nested subroutine
2198 ; calls followed by a return.
2199 ;
2200 ; Procedure: Clear Port
2201 ; Load test microcode
2202 ; Set up RAR to start at location 1
2203 ; Set MPRUN/SINGLE STEP (execute JZ)
2204 ; Set MPRUN/SINGLE STEP 5 times (execute 5 CJS's)
2205 ; Set MPRUN/SINGLE STEP (execute CRTN)
2206 ; Read LAR, and verify address = 16
2207 ;
2208 ; Failure: ---
2209 ;#********************************************************************
2210
2211 ; Test data
2212
2213 002433' 254 00 0 00 002444' TSTS22: JRST TG22 ; go start test
2214 002434' 240401 000022 SEQ!MPROC!NDMP!ZSEQ!22 ; test mask
2215 002435' 002472' 010724' T22M,,[ASCIZ ^Increment/Decrement Stack Pointer^]
2216 002436' 010442' 010517' [EXP MLAST!M7],,[EXP M16,M9,M1,MLAST!M8]
2217 002437' 000000 002511' TSTS23 ; failure test table
2218 002440' 000000 002571' TSTS24 ; ...
2219 002441' 000000 002653' TSTS25
2220 002442' 000000 002737' TSTS26
2221 002443' 777777 777777 -1
2222
2223 ; Start test
2224
2225 002444' 201 00 0 00 000000' TG22: MOVEI Z3 ; get address of module start
2226 002445' 260 17 0 00 002251* GO TRACE ; handle trace output
2227 002446' 201 01 0 00 002472' MOVEI 1,T22M ; set up microcode address
2228 002447' 260 17 0 00 002253* GO TLOAD ; load/verify it
2229 002450' 263 17 0 00 000000 RTN ; failed - exit test
2230
2231 ; Initialization
2232
2233 002451' 260 17 0 00 002255* TL22: GO IPACLR ; clear port
2234 002452' 402 00 0 00 002256* SETZM TSTSUB ; initialize subtest number
2235 002453' 201 06 0 00 002466' MOVEI 6,TS22 ; get sstep table address
2236
2237 ; Loop on single step table entries
2238
2239 002454' 400 15 0 00 000000 TA22: SETZ ERFLG, ; clear error flag
2240 002455' 260 17 0 00 002261* GO SEXEC ; execute table entry
2241 002456' 254 00 0 00 002465' JRST TX22 ; end of sstep table
2242 002457' 254 00 0 00 002454' JRST TA22 ; keep looping after call
2243 002460' 474 15 0 00 000000 SETO ERFLG, ; error - end address incorrect
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 44
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0743
2244
2245 ; Handle error printouts and scope looping
2246
2247 002461' 027 00 0 00 002470' SCOPER MA22 ; print error message
2248 002462' 254 00 0 00 002451' JRST TL22 ; loop on error
2249 002463' 254 00 0 00 002465' JRST TX22 ; altmode exit
2250 002464' 322 15 0 00 002454' JUMPE ERFLG,TA22 ; do next sstep table entry
2251
2252 ; End of test
2253
2254 002465' 263 17 0 00 000000 TX22: RTN ; return
2255
2256 ; Single step table, as: (CMD,#Steps,Start addr,End Addr)
2257
2258 002466' 100700 010016 TS22: STABLE (SSSTRT,7,1,16)
2259 002467' 000000 000000 STABLE (SSLAST)
2260
2261 ; Error messages
2262
2263 002470' 140000 010733' MA22: MSG!TXNOT![ASCIZ /Stack pointer not working/]
2264 002471' 000000000000# LAST!CALL!TXALL!SSPNT ; print sequencer data
2265
2266 ; Test microcode
2267
2268 002472' 000000 040000 T22M: MWORD <ADDR=0,CJS,J=4> ; call subroutine (0)
2269 002473' 000000 000020
2270 002474' 000100 000000 MWORD <JZ> ; initialize stack (1)
2271 002475' 000000 000000
2272 002476' 000400 070000 MWORD <ADDR=4,CJS,J=7> ; call subroutine (4)
2273 002477' 000000 000020
2274 002500' 000700 120000 MWORD <ADDR=7,CJS,J=12> ; call subroutine (7)
2275 002501' 000000 000020
2276 002502' 001200 150000 MWORD <ADDR=12,CJS,J=15> ; call subroutine (12)
2277 002503' 000000 000020
2278 002504' 001500 200000 MWORD <ADDR=15,CJS,J=20> ; call subroutine (15)
2279 002505' 000000 000020
2280 002506' 002000 000000 MWORD <ADDR=20,CRTN> ; return to 16 (20)
2281 002507' 000000 000240
2282 002510' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 45
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0744
2283
2284 ;#********************************************************************
2285 ;* Test 23 - Increment/Decrement Stack Pointer
2286 ;
2287 ; Description: Verify that the 2910 stack pointer increments and
2288 ; decrements correctly. Do five nested subroutine
2289 ; calls followed by two returns.
2290 ;
2291 ; Procedure: Clear Port
2292 ; Load test microcode
2293 ; Set up RAR to start at location 1
2294 ; Set MPRUN/SINGLE STEP (execute JZ)
2295 ; Set MPRUN/SINGLE STEP 5 times (execute 5 CJS's)
2296 ; Set MPRUN/SINGLE STEP (execute CRTN)
2297 ; Set MPRUN/SINGLE STEP (execute CRTN)
2298 ; Read LAR, and verify address = 13
2299 ;
2300 ; Failure: ---
2301 ;#********************************************************************
2302
2303 ; Test data
2304
2305 002511' 254 00 0 00 002522' TSTS23: JRST TG23 ; go start test
2306 002512' 240401 000023 SEQ!MPROC!NDMP!ZSEQ!23 ; test mask
2307 002513' 002550' 010724' T23M,,[ASCIZ ^Increment/Decrement Stack Pointer^]
2308 002514' 010442' 010517' [EXP MLAST!M7],,[EXP M16,M9,M1,MLAST!M8]
2309 002515' 000000 002571' TSTS24 ; failure test table
2310 002516' 000000 002653' TSTS25 ; ...
2311 002517' 000000 002737' TSTS26
2312 002520' 000000 003032' TSTS30
2313 002521' 777777 777777 -1
2314
2315 ; Start test
2316
2317 002522' 201 00 0 00 000000' TG23: MOVEI Z3 ; get address of module start
2318 002523' 260 17 0 00 002445* GO TRACE ; handle trace output
2319 002524' 201 01 0 00 002550' MOVEI 1,T23M ; set up microcode address
2320 002525' 260 17 0 00 002447* GO TLOAD ; load/verify it
2321 002526' 263 17 0 00 000000 RTN ; failed - exit test
2322
2323 ; Initialization
2324
2325 002527' 260 17 0 00 002451* TL23: GO IPACLR ; clear port
2326 002530' 402 00 0 00 002452* SETZM TSTSUB ; initialize subtest number
2327 002531' 201 06 0 00 002544' MOVEI 6,TS23 ; get sstep table address
2328
2329 ; Loop on single step table entries
2330
2331 002532' 400 15 0 00 000000 TA23: SETZ ERFLG, ; clear error flag
2332 002533' 260 17 0 00 002455* GO SEXEC ; execute table entry
2333 002534' 254 00 0 00 002543' JRST TX23 ; end of sstep table
2334 002535' 254 00 0 00 002532' JRST TA23 ; keep looping after call
2335 002536' 474 15 0 00 000000 SETO ERFLG, ; error - end address incorrect
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 46
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0745
2336
2337 ; Handle error printouts and scope looping
2338
2339 002537' 027 00 0 00 002546' SCOPER MA23 ; print error message
2340 002540' 254 00 0 00 002527' JRST TL23 ; loop on error
2341 002541' 254 00 0 00 002543' JRST TX23 ; altmode exit
2342 002542' 322 15 0 00 002532' JUMPE ERFLG,TA23 ; do next sstep table entry
2343
2344 ; End of test
2345
2346 002543' 263 17 0 00 000000 TX23: RTN ; return
2347
2348 ; Single step table, as: (CMD,#Steps,Start addr,End Addr)
2349
2350 002544' 101000 010013 TS23: STABLE (SSSTRT,^D8,1,13)
2351 002545' 000000 000000 STABLE (SSLAST)
2352
2353 ; Error messages
2354
2355 002546' 140000 010733' MA23: MSG!TXNOT![ASCIZ /Stack pointer not working/]
2356 002547' 000000000000# LAST!CALL!TXALL!SSPNT ; print sequencer data
2357
2358 ; Test microcode
2359
2360 002550' 000000 040000 T23M: MWORD <ADDR=0,CJS,J=4> ; call subroutine (0)
2361 002551' 000000 000020
2362 002552' 000100 000000 MWORD <JZ> ; initialize stack (1)
2363 002553' 000000 000000
2364 002554' 000400 070000 MWORD <ADDR=4,CJS,J=7> ; call subroutine (4)
2365 002555' 000000 000020
2366 002556' 000700 120000 MWORD <ADDR=7,CJS,J=12> ; call subroutine (7)
2367 002557' 000000 000020
2368 002560' 001200 150000 MWORD <ADDR=12,CJS,J=15> ; call subroutine (12)
2369 002561' 000000 000020
2370 002562' 001500 200000 MWORD <ADDR=15,CJS,J=20> ; call subroutine (15)
2371 002563' 000000 000020
2372 002564' 002000 000000 MWORD <ADDR=20,CRTN> ; return to 16 (20)
2373 002565' 000000 000240
2374 002566' 001600 000000 MWORD <ADDR=16,CRTN> ; return to 13 (16)
2375 002567' 000000 000240
2376 002570' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 47
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0746
2377
2378 ;#********************************************************************
2379 ;* Test 24 - Increment/Decrement Stack Pointer
2380 ;
2381 ; Description: Verify that the 2910 stack pointer increments and
2382 ; decrements correctly. Do five nested subroutine
2383 ; calls followed by three returns.
2384 ;
2385 ; Procedure: Clear Port
2386 ; Load test microcode
2387 ; Set up RAR to start at location 1
2388 ; Set MPRUN/SINGLE STEP (execute JZ)
2389 ; Set MPRUN/SINGLE STEP 5 times (execute 5 CJS's)
2390 ; Set MPRUN/SINGLE STEP 3 times (execute 3 CRTN's)
2391 ; Read LAR, and verify address = 10
2392 ;
2393 ; Failure: ---
2394 ;#********************************************************************
2395
2396 ; Test data
2397
2398 002571' 254 00 0 00 002602' TSTS24: JRST TG24 ; go start test
2399 002572' 240401 000024 SEQ!MPROC!NDMP!ZSEQ!24 ; test mask
2400 002573' 002630' 010724' T24M,,[ASCIZ ^Increment/Decrement Stack Pointer^]
2401 002574' 010442' 010517' [EXP MLAST!M7],,[EXP M16,M9,M1,MLAST!M8]
2402 002575' 000000 002653' TSTS25 ; failure test table
2403 002576' 000000 002737' TSTS26 ; ...
2404 002577' 000000 003032' TSTS30
2405 002600' 000000 003122' TSTS31
2406 002601' 777777 777777 -1
2407
2408 ; Start test
2409
2410 002602' 201 00 0 00 000000' TG24: MOVEI Z3 ; get address of module start
2411 002603' 260 17 0 00 002523* GO TRACE ; handle trace output
2412 002604' 201 01 0 00 002630' MOVEI 1,T24M ; set up microcode address
2413 002605' 260 17 0 00 002525* GO TLOAD ; load/verify it
2414 002606' 263 17 0 00 000000 RTN ; failed - exit test
2415
2416 ; Initialization
2417
2418 002607' 260 17 0 00 002527* TL24: GO IPACLR ; clear port
2419 002610' 402 00 0 00 002530* SETZM TSTSUB ; initialize subtest number
2420 002611' 201 06 0 00 002624' MOVEI 6,TS24 ; get sstep table address
2421
2422 ; Loop on single step table entries
2423
2424 002612' 400 15 0 00 000000 TA24: SETZ ERFLG, ; clear error flag
2425 002613' 260 17 0 00 002533* GO SEXEC ; execute table entry
2426 002614' 254 00 0 00 002623' JRST TX24 ; end of sstep table
2427 002615' 254 00 0 00 002612' JRST TA24 ; keep looping after call
2428 002616' 474 15 0 00 000000 SETO ERFLG, ; error - end address incorrect
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 48
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0747
2429
2430 ; Handle error printouts and scope looping
2431
2432 002617' 027 00 0 00 002626' SCOPER MA24 ; print error message
2433 002620' 254 00 0 00 002607' JRST TL24 ; loop on error
2434 002621' 254 00 0 00 002623' JRST TX24 ; altmode exit
2435 002622' 322 15 0 00 002612' JUMPE ERFLG,TA24 ; do next sstep table entry
2436
2437 ; End of test
2438
2439 002623' 263 17 0 00 000000 TX24: RTN ; return
2440
2441 ; Single step table, as: (CMD,#Steps,Start addr,End Addr)
2442
2443 002624' 101100 010010 TS24: STABLE (SSSTRT,^D9,1,10)
2444 002625' 000000 000000 STABLE (SSLAST)
2445
2446 ; Error messages
2447
2448 002626' 140000 010733' MA24: MSG!TXNOT![ASCIZ /Stack pointer not working/]
2449 002627' 000000000000# LAST!CALL!TXALL!SSPNT ; print sequencer data
2450
2451 ; Test microcode
2452
2453 002630' 000000 040000 T24M: MWORD <ADDR=0,CJS,J=4> ; call subroutine (0)
2454 002631' 000000 000020
2455 002632' 000100 000000 MWORD <JZ> ; initialize stack (1)
2456 002633' 000000 000000
2457 002634' 000400 070000 MWORD <ADDR=4,CJS,J=7> ; call subroutine (4)
2458 002635' 000000 000020
2459 002636' 000700 120000 MWORD <ADDR=7,CJS,J=12> ; call subroutine (7)
2460 002637' 000000 000020
2461 002640' 001200 150000 MWORD <ADDR=12,CJS,J=15> ; call subroutine (12)
2462 002641' 000000 000020
2463 002642' 001500 200000 MWORD <ADDR=15,CJS,J=20> ; call subroutine (15)
2464 002643' 000000 000020
2465 002644' 002000 000000 MWORD <ADDR=20,CRTN> ; return to 16 (20)
2466 002645' 000000 000240
2467 002646' 001600 000000 MWORD <ADDR=16,CRTN> ; return to 13 (16)
2468 002647' 000000 000240
2469 002650' 001300 000000 MWORD <ADDR=13,CRTN> ; return to 10 (13)
2470 002651' 000000 000240
2471 002652' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 49
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0748
2472
2473 ;#********************************************************************
2474 ;* Test 25 - Increment/Decrement Stack Pointer
2475 ;
2476 ; Description: Verify that the 2910 stack pointer increments and
2477 ; decrements correctly. Do five nested subroutine
2478 ; calls followed by four returns.
2479 ;
2480 ; Procedure: Clear Port
2481 ; Load test microcode
2482 ; Set up RAR to start at location 1
2483 ; Set MPRUN/SINGLE STEP (execute JZ)
2484 ; Set MPRUN/SINGLE STEP 5 times (execute 5 CJS's)
2485 ; Set MPRUN/SINGLE STEP 4 times (execute 4 CRTN's)
2486 ; Read LAR, and verify address = 5
2487 ;
2488 ; Failure: ---
2489 ;#********************************************************************
2490
2491 ; Test data
2492
2493 002653' 254 00 0 00 002664' TSTS25: JRST TG25 ; go start test
2494 002654' 240401 000025 SEQ!MPROC!NDMP!ZSEQ!25 ; test mask
2495 002655' 002712' 010724' T25M,,[ASCIZ ^Increment/Decrement Stack Pointer^]
2496 002656' 010442' 010517' [EXP MLAST!M7],,[EXP M16,M9,M1,MLAST!M8]
2497 002657' 000000 002737' TSTS26 ; failure test table
2498 002660' 000000 003032' TSTS30 ; ...
2499 002661' 000000 003122' TSTS31
2500 002662' 000000 003236' TSTS32
2501 002663' 777777 777777 -1
2502
2503 ; Start test
2504
2505 002664' 201 00 0 00 000000' TG25: MOVEI Z3 ; get address of module start
2506 002665' 260 17 0 00 002603* GO TRACE ; handle trace output
2507 002666' 201 01 0 00 002712' MOVEI 1,T25M ; set up microcode address
2508 002667' 260 17 0 00 002605* GO TLOAD ; load/verify it
2509 002670' 263 17 0 00 000000 RTN ; failed - exit test
2510
2511 ; Initialization
2512
2513 002671' 260 17 0 00 002607* TL25: GO IPACLR ; clear port
2514 002672' 402 00 0 00 002610* SETZM TSTSUB ; initialize subtest number
2515 002673' 201 06 0 00 002706' MOVEI 6,TS25 ; get sstep table address
2516
2517 ; Loop on single step table entries
2518
2519 002674' 400 15 0 00 000000 TA25: SETZ ERFLG, ; clear error flag
2520 002675' 260 17 0 00 002613* GO SEXEC ; execute table entry
2521 002676' 254 00 0 00 002705' JRST TX25 ; end of sstep table
2522 002677' 254 00 0 00 002674' JRST TA25 ; keep looping after call
2523 002700' 474 15 0 00 000000 SETO ERFLG, ; error - end address incorrect
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 50
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0749
2524
2525 ; Handle error printouts and scope looping
2526
2527 002701' 027 00 0 00 002710' SCOPER MA25 ; print error message
2528 002702' 254 00 0 00 002671' JRST TL25 ; loop on error
2529 002703' 254 00 0 00 002705' JRST TX25 ; altmode exit
2530 002704' 322 15 0 00 002674' JUMPE ERFLG,TA25 ; do next sstep table entry
2531
2532 ; End of test
2533
2534 002705' 263 17 0 00 000000 TX25: RTN ; return
2535
2536 ; Single step table, as: (CMD,#Steps,Start addr,End Addr)
2537
2538 002706' 101200 010005 TS25: STABLE (SSSTRT,^D10,1,5)
2539 002707' 000000 000000 STABLE (SSLAST)
2540
2541 ; Error messages
2542
2543 002710' 140000 010733' MA25: MSG!TXNOT![ASCIZ /Stack pointer not working/]
2544 002711' 000000000000# LAST!CALL!TXALL!SSPNT ; print sequencer data
2545
2546 ; Test microcode
2547
2548 002712' 000000 040000 T25M: MWORD <ADDR=0,CJS,J=4> ; call subroutine (0)
2549 002713' 000000 000020
2550 002714' 000100 000000 MWORD <JZ> ; initialize stack (1)
2551 002715' 000000 000000
2552 002716' 000400 070000 MWORD <ADDR=4,CJS,J=7> ; call subroutine (4)
2553 002717' 000000 000020
2554 002720' 000700 120000 MWORD <ADDR=7,CJS,J=12> ; call subroutine (7)
2555 002721' 000000 000020
2556 002722' 001200 150000 MWORD <ADDR=12,CJS,J=15> ; call subroutine (12)
2557 002723' 000000 000020
2558 002724' 001500 200000 MWORD <ADDR=15,CJS,J=20> ; call subroutine (15)
2559 002725' 000000 000020
2560 002726' 002000 000000 MWORD <ADDR=20,CRTN> ; return to 16 (20)
2561 002727' 000000 000240
2562 002730' 001600 000000 MWORD <ADDR=16,CRTN> ; return to 13 (16)
2563 002731' 000000 000240
2564 002732' 001300 000000 MWORD <ADDR=13,CRTN> ; return to 10 (13)
2565 002733' 000000 000240
2566 002734' 001000 000000 MWORD <ADDR=10,CRTN> ; return to 5 (10)
2567 002735' 000000 000240
2568 002736' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 51
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0750
2569
2570 ;#********************************************************************
2571 ;* Test 26 - Increment/Decrement Stack Pointer
2572 ;
2573 ; Description: Verify that the 2910 stack pointer increments and
2574 ; decrements correctly. Do five nested subroutine
2575 ; calls followed by five returns.
2576 ;
2577 ; Procedure: Clear Port
2578 ; Load test microcode
2579 ; Set up RAR to start at location 1
2580 ; Set MPRUN/SINGLE STEP (execute JZ)
2581 ; Set MPRUN/SINGLE STEP 5 times (execute 5 CJS's)
2582 ; Set MPRUN/SINGLE STEP 5 times (execute 5 CRTN's)
2583 ; Read LAR, and verify address = 2
2584 ;
2585 ; Failure: ---
2586 ;#********************************************************************
2587
2588 ; Test data
2589
2590 002737' 254 00 0 00 002750' TSTS26: JRST TG26 ; go start test
2591 002740' 240401 000026 SEQ!MPROC!NDMP!ZSEQ!26 ; test mask
2592 002741' 002776' 010724' T26M,,[ASCIZ ^Increment/Decrement Stack Pointer^]
2593 002742' 010442' 010517' [EXP MLAST!M7],,[EXP M16,M9,M1,MLAST!M8]
2594 002743' 000000 003032' TSTS30 ; failure test table
2595 002744' 000000 003122' TSTS31 ; ...
2596 002745' 000000 003236' TSTS32
2597 002746' 000000 003314' TSTS33
2598 002747' 777777 777777 -1
2599
2600 ; Start test
2601
2602 002750' 201 00 0 00 000000' TG26: MOVEI Z3 ; get address of module start
2603 002751' 260 17 0 00 002665* GO TRACE ; handle trace output
2604 002752' 201 01 0 00 002776' MOVEI 1,T26M ; set up microcode address
2605 002753' 260 17 0 00 002667* GO TLOAD ; load/verify it
2606 002754' 263 17 0 00 000000 RTN ; failed - exit test
2607
2608 ; Initialization
2609
2610 002755' 260 17 0 00 002671* TL26: GO IPACLR ; clear port
2611 002756' 402 00 0 00 002672* SETZM TSTSUB ; initialize subtest number
2612 002757' 201 06 0 00 002772' MOVEI 6,TS26 ; get sstep table address
2613
2614 ; Loop on single step table entries
2615
2616 002760' 400 15 0 00 000000 TA26: SETZ ERFLG, ; clear error flag
2617 002761' 260 17 0 00 002675* GO SEXEC ; execute table entry
2618 002762' 254 00 0 00 002771' JRST TX26 ; end of sstep table
2619 002763' 254 00 0 00 002760' JRST TA26 ; keep looping after call
2620 002764' 474 15 0 00 000000 SETO ERFLG, ; error - end address incorrect
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 52
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0751
2621
2622 ; Handle error printouts and scope looping
2623
2624 002765' 027 00 0 00 002774' SCOPER MA26 ; print error message
2625 002766' 254 00 0 00 002755' JRST TL26 ; loop on error
2626 002767' 254 00 0 00 002771' JRST TX26 ; altmode exit
2627 002770' 322 15 0 00 002760' JUMPE ERFLG,TA26 ; do next sstep table entry
2628
2629 ; End of test
2630
2631 002771' 263 17 0 00 000000 TX26: RTN ; return
2632
2633 ; Single step table, as: (CMD,#Steps,Start addr,End Addr)
2634
2635 002772' 101300 010001 TS26: STABLE (SSSTRT,^D11,1,1)
2636 002773' 000000 000000 STABLE (SSLAST)
2637
2638 ; Error messages
2639
2640 002774' 140000 010733' MA26: MSG!TXNOT![ASCIZ /Stack pointer not working/]
2641 002775' 000000000000# LAST!CALL!TXALL!SSPNT ; print sequencer data
2642
2643 ; Test microcode
2644
2645 002776' 000000 040000 T26M: MWORD <ADDR=0,CJS,J=4> ; call subroutine (0)
2646 002777' 000000 000020
2647 003000' 000100 000000 MWORD <JZ> ; initialize stack (1)
2648 003001' 000000 000000
2649 003002' 000400 070000 MWORD <ADDR=4,CJS,J=7> ; call subroutine (4)
2650 003003' 000000 000020
2651 003004' 000700 120000 MWORD <ADDR=7,CJS,J=12> ; call subroutine (7)
2652 003005' 000000 000020
2653 003006' 001200 150000 MWORD <ADDR=12,CJS,J=15> ; call subroutine (12)
2654 003007' 000000 000020
2655 003010' 001500 200000 MWORD <ADDR=15,CJS,J=20> ; call subroutine (15)
2656 003011' 000000 000020
2657 003012' 002000 000000 MWORD <ADDR=20,CRTN> ; return to 16 (20)
2658 003013' 000000 000240
2659 003014' 001600 000000 MWORD <ADDR=16,CRTN> ; return to 13 (16)
2660 003015' 000000 000240
2661 003016' 001300 000000 MWORD <ADDR=13,CRTN> ; return to 10 (13)
2662 003017' 000000 000240
2663 003020' 001000 000000 MWORD <ADDR=10,CRTN> ; return to 5 (10)
2664 003021' 000000 000240
2665 003022' 000500 000000 MWORD <ADDR=5,CRTN> ; return to 1 (5)
2666 003023' 000000 000240
2667 003024' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 53
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0752
2668
2669 ;#********************************************************************
2670 ;* Test 27 - x
2671 ;#********************************************************************
2672
2673 003025' 263 17 0 00 000000 TSTS27: RTN ; return
2674 003026' 000001 000027 ZSEQ!27 ; test mask
2675 003027' 000000 010741' 0,,[ASCIZ ^x^]
2676 003030' 000000 000000 0,,0
2677 003031' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 54
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0753
2678
2679 ;#********************************************************************
2680 ;* Test 30 - CJPP Instruction
2681 ;
2682 ; Description: Verify that a CJPP instruction does a jump if the
2683 ; TEST inputs are satisfied, and not if not.
2684 ;
2685 ; Procedure: Clear Port
2686 ; Load test microcode
2687 ; Set up RAR to start at location 0
2688 ; Set MPRUN/SINGLE STEP (execute CJPP,CJPP,CJPP,CJPP)
2689 ; Read LAR, and verify address = 7
2690 ;
2691 ; Failure: ---
2692 ;#********************************************************************
2693
2694 ; Test data
2695
2696 003032' 254 00 0 00 003043' TSTS30: JRST TG30 ; go start test
2697 003033' 240401 000030 SEQ!MPROC!NDMP!ZSEQ!30 ; test mask
2698 003034' 003071' 010742' T30M,,[ASCIZ ^CJPP Instruction^]
2699 003035' 010442' 010517' [EXP MLAST!M7],,[EXP M16,M9,M1,MLAST!M8]
2700 003036' 000000 003122' TSTS31 ; failure test table
2701 003037' 000000 003236' TSTS32 ; ...
2702 003040' 000000 003314' TSTS33
2703 003041' 000000 003360' TSTS34
2704 003042' 777777 777777 -1
2705
2706 ; Start test
2707
2708 003043' 201 00 0 00 000000' TG30: MOVEI Z3 ; get address of module start
2709 003044' 260 17 0 00 002751* GO TRACE ; handle trace output
2710 003045' 201 01 0 00 003071' MOVEI 1,T30M ; set up microcode address
2711 003046' 260 17 0 00 002753* GO TLOAD ; load/verify it
2712 003047' 263 17 0 00 000000 RTN ; failed - exit test
2713
2714 ; Initialization
2715
2716 003050' 260 17 0 00 002755* TL30: GO IPACLR ; clear port
2717 003051' 402 00 0 00 002756* SETZM TSTSUB ; initialize subtest number
2718 003052' 201 06 0 00 003065' MOVEI 6,TS30 ; get sstep table address
2719
2720 ; Loop on single step table entries
2721
2722 003053' 400 15 0 00 000000 TA30: SETZ ERFLG, ; clear error flag
2723 003054' 260 17 0 00 002761* GO SEXEC ; execute table entry
2724 003055' 254 00 0 00 003064' JRST TX30 ; end of sstep table
2725 003056' 254 00 0 00 003053' JRST TA30 ; keep looping after call
2726 003057' 474 15 0 00 000000 SETO ERFLG, ; error - end address incorrect
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 55
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0754
2727
2728 ; Handle error printouts and scope looping
2729
2730 003060' 027 00 0 00 003067' SCOPER MA30 ; print error message
2731 003061' 254 00 0 00 003050' JRST TL30 ; loop on error
2732 003062' 254 00 0 00 003064' JRST TX30 ; altmode exit
2733 003063' 322 15 0 00 003053' JUMPE ERFLG,TA30 ; do next sstep table entry
2734
2735 ; End of test
2736
2737 003064' 263 17 0 00 000000 TX30: RTN ; return
2738
2739 ; Single step table, as: (CMD,#Steps,Start addr,End Addr)
2740
2741 003065' 100400 000007 TS30: STABLE (SSSTRT,4,0,7)
2742 003066' 000000 000000 STABLE (SSLAST)
2743
2744 ; Error messages
2745
2746 003067' 140000 010746' MA30: MSG!TXNOT![ASCIZ /CJPP did not dispatch correctly/]
2747 003070' 000000000000# LAST!CALL!TXALL!SSPNT ; print sequencer data
2748
2749 ; Test microcode
2750
2751 003071' 000000 020000 T30M: MWORD <ADDR=0,CJPP,J=2,DISA,CCOF> ; disa/off (0)
2752 003072' 000000 010260
2753 003073' 000100 100000 MWORD <JMAP,J=10> ; (1)
2754 003074' 000000 000040
2755 003075' 000200 040000 MWORD <CJPP,J=4,DISA,CCON> ; disa/on (2)
2756 003076' 000000 030260
2757 003077' 000300 110000 MWORD <JMAP,J=11> ; (3)
2758 003100' 000000 000040
2759 003101' 000400 060000 MWORD <CJPP,J=6,ENA,CCON> ; ena/on (4)
2760 003102' 000400 030260
2761 003103' 000500 120000 MWORD <JMAP,J=12> ; (5)
2762 003104' 000000 000040
2763 003105' 000600 130000 MWORD <CJPP,J=13,ENA,CCOF> ; ena/on (6)
2764 003106' 000400 010260
2765 003107' 000700 070000 MWORD <JMAP,J=7> ; (7)
2766 003110' 000000 000040
2767
2768 003111' 001000 100000 MWORD <ADDR=10,JMAP,J=10> ; error if here (10)
2769 003112' 000000 000040
2770 003113' 001100 110000 MWORD <ADDR=11,JMAP,J=11> ; error if here (11)
2771 003114' 000000 000040
2772 003115' 001200 120000 MWORD <ADDR=12,JMAP,J=12> ; error if here (12)
2773 003116' 000000 000040
2774 003117' 001300 130000 MWORD <ADDR=13,JMAP,J=13> ; error if here (13)
2775 003120' 000000 000040
2776 003121' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 56
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0755
2777
2778 ;#********************************************************************
2779 ;* Test 31 - CJPP Instruction
2780 ;
2781 ; Description: Verify that the CJPP instruction pops the stack
2782 ; if the TEST input is asserted.
2783 ;
2784 ; Procedure: Clear Port
2785 ; Load test microcode
2786 ; Set up RAR to start at location 100
2787 ; Set MPRUN/SINGLE STEP (execute JZ)
2788 ; Set MPRUN/SINGLE STEP (execute CJS,CJS,CJPP,CRTN)
2789 ; Set MPRUN/SINGLE STEP (execute CJS,CJS,CJPP,CRTN)
2790 ; Set MPRUN/SINGLE STEP (execute CJS,CJS,CJPP,CRTN)
2791 ; Read LAR, and verify address = 3
2792 ;
2793 ; Failure: ---
2794 ;#********************************************************************
2795
2796 ; Test data
2797
2798 003122' 254 00 0 00 003133' TSTS31: JRST TG31 ; go start test
2799 003123' 240401 000031 SEQ!MPROC!NDMP!ZSEQ!31 ; test mask
2800 003124' 003161' 010742' T31M,,[ASCIZ ^CJPP Instruction^]
2801 003125' 010442' 010517' [EXP MLAST!M7],,[EXP M16,M9,M1,MLAST!M8]
2802 003126' 000000 003236' TSTS32 ; failure test table
2803 003127' 000000 003314' TSTS33 ; ...
2804 003130' 000000 003360' TSTS34
2805 003131' 000000 003444' TSTS35
2806 003132' 777777 777777 -1
2807
2808 ; Start test
2809
2810 003133' 201 00 0 00 000000' TG31: MOVEI Z3 ; get address of module start
2811 003134' 260 17 0 00 003044* GO TRACE ; handle trace output
2812 003135' 201 01 0 00 003161' MOVEI 1,T31M ; set up microcode address
2813 003136' 260 17 0 00 003046* GO TLOAD ; load/verify it
2814 003137' 263 17 0 00 000000 RTN ; failed - exit test
2815
2816 ; Initialization
2817
2818 003140' 260 17 0 00 003050* TL31: GO IPACLR ; clear port
2819 003141' 402 00 0 00 003051* SETZM TSTSUB ; initialize subtest number
2820 003142' 201 06 0 00 003155' MOVEI 6,TS31 ; get sstep table address
2821
2822 ; Loop on single step table entries
2823
2824 003143' 400 15 0 00 000000 TA31: SETZ ERFLG, ; clear error flag
2825 003144' 260 17 0 00 003054* GO SEXEC ; execute table entry
2826 003145' 254 00 0 00 003154' JRST TX31 ; end of sstep table
2827 003146' 254 00 0 00 003143' JRST TA31 ; keep looping after call
2828 003147' 474 15 0 00 000000 SETO ERFLG, ; error - end address incorrect
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 57
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0756
2829
2830 ; Handle error printouts and scope looping
2831
2832 003150' 027 00 0 00 003157' SCOPER MA31 ; print error message
2833 003151' 254 00 0 00 003140' JRST TL31 ; loop on error
2834 003152' 254 00 0 00 003154' JRST TX31 ; altmode exit
2835 003153' 322 15 0 00 003143' JUMPE ERFLG,TA31 ; do next sstep table entry
2836
2837 ; End of test
2838
2839 003154' 263 17 0 00 000000 TX31: RTN ; return
2840
2841 ; Single step table, as: (CMD,#Steps,Start addr,End Addr)
2842
2843 003155' 101501 000003 TS31: STABLE (SSSTRT,^D13,100,3)
2844 003156' 000000 000000 STABLE (SSLAST)
2845
2846 ; Error messages
2847
2848 003157' 140000 010755' MA31: MSG!TXNOT![ASCIZ /CJPP did not pop stack when test conditions met/]
2849 003160' 000000000000# LAST!CALL!TXALL!SSPNT ; print sequencer data
2850
2851 ; Test microcode
2852
2853 003161' 000000 100000 T31M: MWORD <ADDR=0,CJS,J=10> ; call subroutine (0)
2854 003162' 000000 000020
2855 003163' 001000 200000 MWORD <ADDR=10,CJS,J=20> ; call subroutine (10)
2856 003164' 000000 000020
2857 003165' 001100 110000 MWORD <ADDR=11,JMAP,J=11> ; error if here (11)
2858 003166' 000000 000040
2859 003167' 002000 300000 MWORD <ADDR=20,CJPP,DISA,CCOF,J=30> ; jump/pop (disa/off) (20)
2860 003170' 000000 010260
2861 003171' 002100 210000 MWORD <ADDR=21,JMAP,J=21> ; error if here (21)
2862 003172' 000000 000040
2863 003173' 003000 000000 MWORD <ADDR=30,CRTN> ; return to 1 (30)
2864 003174' 000000 000240
2865 003175' 003100 310000 MWORD <ADDR=31,JMAP,J=31> ; error if here (31)
2866 003176' 000000 000040
2867
2868 003177' 000100 120000 MWORD <ADDR=1,CJS,J=12> ; call subroutine (1)
2869 003200' 000000 000020
2870 003201' 001200 220000 MWORD <ADDR=12,CJS,J=22> ; call subroutine (12)
2871 003202' 000000 000020
2872 003203' 001300 130000 MWORD <ADDR=13,JMAP,J=13> ; error if here (13)
2873 003204' 000000 000040
2874 003205' 002200 320000 MWORD <ADDR=22,CJPP,DISA,CCON,J=32> ; jump/pop (disa/on) (22)
2875 003206' 000000 030260
2876 003207' 002300 230000 MWORD <ADDR=23,JMAP,J=23> ; error if here (23)
2877 003210' 000000 000040
2878 003211' 003200 000000 MWORD <ADDR=32,CRTN> ; return to 2 (32)
2879 003212' 000000 000240
2880 003213' 003300 330000 MWORD <ADDR=33,JMAP,J=33> ; error if here (33)
2881 003214' 000000 000040
2882
2883 003215' 000200 140000 MWORD <ADDR=2,CJS,J=14> ; call subroutine (2)
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 57-1
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0757
2884 003216' 000000 000020
2885 003217' 001400 240000 MWORD <ADDR=14,CJS,J=24> ; call subroutine (14)
2886 003220' 000000 000020
2887 003221' 001500 150000 MWORD <ADDR=15,JMAP,J=15> ; error if here (15)
2888 003222' 000000 000040
2889 003223' 002400 340000 MWORD <ADDR=24,CJPP,ENA,CCON,J=34> ; jump and pop (ena/on) (24)
2890 003224' 000400 030260
2891 003225' 002500 250000 MWORD <ADDR=25,JMAP,J=25> ; error if here (25)
2892 003226' 000000 000040
2893 003227' 003400 000000 MWORD <ADDR=34,CRTN> ; return to 2 (34)
2894 003230' 000000 000240
2895 003231' 003500 350000 MWORD <ADDR=35,JMAP,J=35> ; error if here (35)
2896 003232' 000000 000040
2897
2898 003233' 010000 000000 MWORD <ADDR=100,JZ> ; initialize stack (100)
2899 003234' 000000 000000
2900 003235' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 58
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0758
2901
2902 ;#********************************************************************
2903 ;* Test 32 - CJPP Instruction
2904 ;
2905 ; Description: Verify that the CJPP instruction does not pop the
2906 ; stack if the TEST input is negated.
2907 ;
2908 ; Procedure: Clear Port
2909 ; Load test microcode
2910 ; Set up RAR to start at location 1
2911 ; Set MPRUN/SINGLE STEP (execute JZ,CJS,CJS)
2912 ; Set MPRUN/SINGLE STEP (execute CJPP)
2913 ; Set MPRUN/SINGLE STEP (execute CRTN)
2914 ; Read LAR, and verify address = 5
2915 ;
2916 ; Failure: ---
2917 ;#********************************************************************
2918
2919 ; Test data
2920
2921 003236' 254 00 0 00 003247' TSTS32: JRST TG32 ; go start test
2922 003237' 240401 000032 SEQ!MPROC!NDMP!ZSEQ!32 ; test mask
2923 003240' 003275' 010742' T32M,,[ASCIZ ^CJPP Instruction^]
2924 003241' 010442' 010517' [EXP MLAST!M7],,[EXP M16,M9,M1,MLAST!M8]
2925 003242' 000000 003314' TSTS33 ; failure test table
2926 003243' 000000 003360' TSTS34 ; ...
2927 003244' 000000 003444' TSTS35
2928 003245' 000000 003706' TSTS36
2929 003246' 777777 777777 -1
2930
2931 ; Start test
2932
2933 003247' 201 00 0 00 000000' TG32: MOVEI Z3 ; get address of module start
2934 003250' 260 17 0 00 003134* GO TRACE ; handle trace output
2935 003251' 201 01 0 00 003275' MOVEI 1,T32M ; set up microcode address
2936 003252' 260 17 0 00 003136* GO TLOAD ; load/verify it
2937 003253' 263 17 0 00 000000 RTN ; failed - exit test
2938
2939 ; Initialization
2940
2941 003254' 260 17 0 00 003140* TL32: GO IPACLR ; clear port
2942 003255' 402 00 0 00 003141* SETZM TSTSUB ; initialize subtest number
2943 003256' 201 06 0 00 003271' MOVEI 6,TS32 ; get sstep table address
2944
2945 ; Loop on single step table entries
2946
2947 003257' 400 15 0 00 000000 TA32: SETZ ERFLG, ; clear error flag
2948 003260' 260 17 0 00 003144* GO SEXEC ; execute table entry
2949 003261' 254 00 0 00 003270' JRST TX32 ; end of sstep table
2950 003262' 254 00 0 00 003257' JRST TA32 ; keep looping after call
2951 003263' 474 15 0 00 000000 SETO ERFLG, ; error - end address incorrect
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 59
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0759
2952
2953 ; Handle error printouts and scope looping
2954
2955 003264' 027 00 0 00 003273' SCOPER MA32 ; print error message
2956 003265' 254 00 0 00 003254' JRST TL32 ; loop on error
2957 003266' 254 00 0 00 003270' JRST TX32 ; altmode exit
2958 003267' 322 15 0 00 003257' JUMPE ERFLG,TA32 ; do next sstep table entry
2959
2960 ; End of test
2961
2962 003270' 263 17 0 00 000000 TX32: RTN ; return
2963
2964 ; Single step table, as: (CMD,#Steps,Start addr,End Addr)
2965
2966 003271' 100500 010005 TS32: STABLE (SSSTRT,5,1,5)
2967 003272' 000000 000000 STABLE (SSLAST)
2968
2969 ; Error messages
2970
2971 003273' 140000 010767' MA32: MSG!TXNOT![ASCIZ /CJPP popped the stack when test conditions not met/]
2972 003274' 000000000000# LAST!CALL!TXALL!SSPNT ; print sequencer data
2973
2974 ; Test microcode
2975
2976 003275' 000000 040000 T32M: MWORD <ADDR=0,CJS,J=4> ; call subroutine (0)
2977 003276' 000000 000020
2978 003277' 000100 000000 MWORD <ADDR=1,JZ> ; initialize stack (1)
2979 003300' 000000 000000
2980 003301' 000400 070000 MWORD <ADDR=4,CJS,J=7> ; call subroutine (4)
2981 003302' 000000 000020
2982 003303' 000500 000000 MWORD <ADDR=5,JZ> ; initialize stack (5)
2983 003304' 000000 000000
2984 003305' 000701 000000 MWORD <ADDR=7,CJPP,ENA,CCOF,J=100> ; ena/off (7)
2985 003306' 000400 010260
2986 003307' 001000 000000 MWORD <ADDR=10,CRTN> ; return to 5 (10)
2987 003310' 000000 000240
2988 003311' 010001 000000 MWORD <ADDR=100,JMAP,J=100> ; error if here (100)
2989 003312' 000000 000040
2990 003313' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 60
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0760
2991
2992 ;#********************************************************************
2993 ;* Test 33 - LDCT Instruction
2994 ;
2995 ; Description: Verify that the LDCT instruction does a continue
2996 ; among other things.
2997 ;
2998 ; Procedure: Clear Port
2999 ; Load test microcode and set RAR to 0
3000 ; Set MPRUN/SINGLE STEP (execute JMAP,LDCT)
3001 ; Read LAR, and verify address = 2
3002 ;
3003 ; Failure: ---
3004 ;#********************************************************************
3005
3006 ; Test data
3007
3008 003314' 254 00 0 00 003325' TSTS33: JRST TG33 ; go start test
3009 003315' 240401 000033 SEQ!MPROC!NDMP!ZSEQ!33 ; test mask
3010 003316' 003353' 011002' T33M,,[ASCIZ ^LDCT Instruction^]
3011 003317' 010442' 010517' [EXP MLAST!M7],,[EXP M16,M9,M1,MLAST!M8]
3012 003320' 000000 003360' TSTS34 ; failure test table
3013 003321' 000000 003444' TSTS35 ; ...
3014 003322' 000000 003706' TSTS36
3015 003323' 000000 004000' TSTS37
3016 003324' 777777 777777 -1
3017
3018 ; Start test
3019
3020 003325' 201 00 0 00 000000' TG33: MOVEI Z3 ; get address of module start
3021 003326' 260 17 0 00 003250* GO TRACE ; handle trace output
3022 003327' 201 01 0 00 003353' MOVEI 1,T33M ; set up microcode address
3023 003330' 260 17 0 00 003252* GO TLOAD ; load/verify it
3024 003331' 263 17 0 00 000000 RTN ; failed - exit test
3025
3026 ; Initialization
3027
3028 003332' 260 17 0 00 003254* TL33: GO IPACLR ; clear port
3029 003333' 402 00 0 00 003255* SETZM TSTSUB ; initialize subtest number
3030 003334' 201 06 0 00 003347' MOVEI 6,TS33 ; get sstep table address
3031
3032 ; Loop on single step table entries
3033
3034 003335' 400 15 0 00 000000 TA33: SETZ ERFLG, ; clear error flag
3035 003336' 260 17 0 00 003260* GO SEXEC ; execute table entry
3036 003337' 254 00 0 00 003346' JRST TX33 ; end of sstep table
3037 003340' 254 00 0 00 003335' JRST TA33 ; keep looping after call
3038 003341' 474 15 0 00 000000 SETO ERFLG, ; error - end address incorrect
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 61
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0761
3039
3040 ; Handle error printouts and scope looping
3041
3042 003342' 027 00 0 00 003351' SCOPER MA33 ; print error message
3043 003343' 254 00 0 00 003332' JRST TL33 ; loop on error
3044 003344' 254 00 0 00 003346' JRST TX33 ; altmode exit
3045 003345' 322 15 0 00 003335' JUMPE ERFLG,TA33 ; do next sstep table entry
3046
3047 ; End of test
3048
3049 003346' 263 17 0 00 000000 TX33: RTN ; return
3050
3051 ; Single step table, as: (CMD,#Steps,Start addr,End Addr)
3052
3053 003347' 100200 000002 TS33: STABLE (SSSTRT,2,0,2)
3054 003350' 000000 000000 STABLE (SSLAST)
3055
3056 ; Error messages
3057
3058 003351' 140000 011006' MA33: MSG!TXNOT![ASCIZ /LDCT did not continue at PC+1/]
3059 003352' 000000000000# LAST!CALL!TXALL!SSPNT ; print sequencer data
3060
3061 ; Test microcode
3062
3063 003353' 000000 010000 T33M: MWORD <ADDR=0,JMAP,J=1>
3064 003354' 000000 000040
3065 003355' 000100 770000 MWORD <LDCT,J=77>
3066 003356' 000000 000300
3067 003357' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 62
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0762
3068
3069 ;#********************************************************************
3070 ;* Test 34 - LDCT Instruction
3071 ;
3072 ; Description: Verify that the LDCT instruction loads the
3073 ; register/counter with the data on the direct
3074 ; inputs. At the same time, verify that the JRP
3075 ; instruction causes a jump to address specified in
3076 ; the register/counter if the TEST inputs are not
3077 ; satisfied.
3078 ;
3079 ; Also, verify that the load is not affected by the
3080 ; initial register/counter contents.
3081 ;
3082 ; Procedure: Clear Port
3083 ; Load test microcode
3084 ; Set up RAR to start at location 100
3085 ; Set MPRUN/SINGLE STEP (execute JZ)
3086 ; Set MPRUN/SINGLE STEP (execute LDCT,JRP)
3087 ; Set MPRUN/SINGLE STEP (execute LDCT,JRP)
3088 ; Set MPRUN/SINGLE STEP (execute LDCT,JRP)
3089 ; Read LAR, and verify address = 0
3090 ;
3091 ; Failure: ---
3092 ;#********************************************************************
3093
3094 ; Test data
3095
3096 003360' 254 00 0 00 003371' TSTS34: JRST TG34 ; go start test
3097 003361' 240401 000034 SEQ!MPROC!NDMP!ZSEQ!34 ; test mask
3098 003362' 003417' 011002' T34M,,[ASCIZ ^LDCT Instruction^]
3099 003363' 010442' 010517' [EXP MLAST!M7],,[EXP M16,M9,M1,MLAST!M8]
3100 003364' 000000 003444' TSTS35 ; failure test table
3101 003365' 000000 003706' TSTS36 ; ...
3102 003366' 000000 004000' TSTS37
3103 003367' 000000 004076' TSTS40
3104 003370' 777777 777777 -1
3105
3106 ; Start test
3107
3108 003371' 201 00 0 00 000000' TG34: MOVEI Z3 ; get address of module start
3109 003372' 260 17 0 00 003326* GO TRACE ; handle trace output
3110 003373' 201 01 0 00 003417' MOVEI 1,T34M ; set up microcode address
3111 003374' 260 17 0 00 003330* GO TLOAD ; load/verify it
3112 003375' 263 17 0 00 000000 RTN ; failed - exit test
3113
3114 ; Initialization
3115
3116 003376' 260 17 0 00 003332* TL34: GO IPACLR ; clear port
3117 003377' 402 00 0 00 003333* SETZM TSTSUB ; initialize subtest number
3118 003400' 201 06 0 00 003413' MOVEI 6,TS34 ; get sstep table address
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 63
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0763
3119
3120 ; Loop on single step table entries
3121
3122 003401' 400 15 0 00 000000 TA34: SETZ ERFLG, ; clear error flag
3123 003402' 260 17 0 00 003336* GO SEXEC ; execute table entry
3124 003403' 254 00 0 00 003412' JRST TX34 ; end of sstep table
3125 003404' 254 00 0 00 003401' JRST TA34 ; keep looping after call
3126 003405' 474 15 0 00 000000 SETO ERFLG, ; error - end address incorrect
3127
3128 ; Handle error printouts and scope looping
3129
3130 003406' 027 00 0 00 003415' SCOPER MA34 ; print error message
3131 003407' 254 00 0 00 003376' JRST TL34 ; loop on error
3132 003410' 254 00 0 00 003412' JRST TX34 ; altmode exit
3133 003411' 322 15 0 00 003401' JUMPE ERFLG,TA34 ; do next sstep table entry
3134
3135 ; End of test
3136
3137 003412' 263 17 0 00 000000 TX34: RTN ; return
3138
3139 ; Single step table, as: (CMD,#Steps,Start addr,End Addr)
3140
3141 003413' 100701 000000 TS34: STABLE (SSSTRT,7,100,0)
3142 003414' 000000 000000 STABLE (SSLAST)
3143
3144 ; Error messages
3145
3146 003415' 140000 011014' MA34: MSG!TXNOT![ASCIZ /LDCT did not load cntr or JRP did not jump there/]
3147 003416' 000000000000# LAST!CALL!TXALL!SSPNT ; print sequencer data
3148
3149 ; Test microcode
3150
3151 003417' 010000 000000 T34M: MWORD <ADDR=100,JZ> ; init pc (100)
3152 003420' 000000 000000
3153 003421' 000000 330000 MWORD <ADDR=0,LDCT,J=33> ; load counter (0)
3154 003422' 000000 000300
3155 003423' 000100 020000 MWORD <JRP,ENA,CCOF,J=2> ; go to 33 (1)
3156 003424' 000400 010160
3157 003425' 000200 020000 MWORD <JMAP,J=2> ; error if here (2)
3158 003426' 000000 000040
3159 003427' 003300 440000 MWORD <ADDR=33,LDCT,J=44> ; load counter (33)
3160 003430' 000000 000300
3161 003431' 003400 350000 MWORD <JRP,ENA,CCOF,J=35> ; go to 44 (34)
3162 003432' 000400 010160
3163 003433' 003500 350000 MWORD <JMAP,J=35> ; error if here (35)
3164 003434' 000000 000040
3165 003435' 004400 000000 MWORD <ADDR=44,LDCT,J=0> ; load counter (44)
3166 003436' 000000 000300
3167 003437' 004500 460000 MWORD <JRP,ENA,CCOF,J=46> ; go to 0 (45)
3168 003440' 000400 010160
3169 003441' 004600 460000 MWORD <JMAP,J=46> ; error if here (46)
3170 003442' 000000 000040
3171 003443' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 64
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0764
3172
3173 ;#********************************************************************
3174 ;* Test 35 - Register/Counter
3175 ;
3176 ; Description: Verify that the register/counter can hold various
3177 ; data patterns.
3178 ;
3179 ; Procedure: Clear Port
3180 ; Load test microcode
3181 ; Set up RAR to start at location 30
3182 ; Set MPRUN/SINGLE STEP to execute all 21 LDCT,
3183 ; JRP pairs - total of 42 instructions
3184 ; Read LAR, and verify address = 5776
3185 ;
3186 ; This is done for register contents as follows:
3187 ; 0,1,3,7,17,37,77,177,377,777,1777,3777,
3188 ; 5777,5776,5775,5773,5767,5757,5737,5677,
3189 ; 5577,5377,4777
3190 ;
3191 ; Failure: ---
3192 ;#********************************************************************
3193
3194 ; Test data
3195
3196 003444' 254 00 0 00 003455' TSTS35: JRST TG35 ; go start test
3197 003445' 240401 000035 SEQ!MPROC!NDMP!ZSEQ!35 ; test mask
3198 003446' 003503' 011026' T35M,,[ASCIZ ^Register/Counter^]
3199 003447' 010442' 010517' [EXP MLAST!M7],,[EXP M16,M9,M1,MLAST!M8]
3200 003450' 000000 003706' TSTS36 ; failure test table
3201 003451' 000000 004000' TSTS37 ; ...
3202 003452' 000000 004076' TSTS40
3203 003453' 000000 004176' TSTS41
3204 003454' 777777 777777 -1
3205
3206 ; Start test
3207
3208 003455' 201 00 0 00 000000' TG35: MOVEI Z3 ; get address of module start
3209 003456' 260 17 0 00 003372* GO TRACE ; handle trace output
3210 003457' 201 01 0 00 003503' MOVEI 1,T35M ; set up microcode address
3211 003460' 260 17 0 00 003374* GO TLOAD ; load/verify it
3212 003461' 263 17 0 00 000000 RTN ; failed - exit test
3213
3214 ; Initialization
3215
3216 003462' 260 17 0 00 003376* TL35: GO IPACLR ; clear port
3217 003463' 402 00 0 00 003377* SETZM TSTSUB ; initialize subtest number
3218 003464' 201 06 0 00 003477' MOVEI 6,TS35 ; get sstep table address
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 65
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0765
3219
3220 ; Loop on single step table entries
3221
3222 003465' 400 15 0 00 000000 TA35: SETZ ERFLG, ; clear error flag
3223 003466' 260 17 0 00 003402* GO SEXEC ; execute table entry
3224 003467' 254 00 0 00 003476' JRST TX35 ; end of sstep table
3225 003470' 254 00 0 00 003465' JRST TA35 ; keep looping after call
3226 003471' 474 15 0 00 000000 SETO ERFLG, ; error - end address incorrect
3227
3228 ; Handle error printouts and scope looping
3229
3230 003472' 027 00 0 00 003501' SCOPER MA35 ; print error message
3231 003473' 254 00 0 00 003462' JRST TL35 ; loop on error
3232 003474' 254 00 0 00 003476' JRST TX35 ; altmode exit
3233 003475' 322 15 0 00 003465' JUMPE ERFLG,TA35 ; do next sstep table entry
3234
3235 ; End of test
3236
3237 003476' 263 17 0 00 000000 TX35: RTN ; return
3238
3239 ; Single step table, as: (CMD,#Steps,Start addr,End Addr)
3240
3241 003477' 105300 275776 TS35: STABLE (SSSTRT,^D43,27,5776)
3242 003500' 000000 000000 STABLE (SSLAST)
3243
3244 ; Error messages
3245
3246 003501' 140000 011032' MA35: MSG!TXNOT![ASCIZ /Cntr not loaded properly or dispatch on it failed/]
3247 003502' 000000000000# LAST!CALL!TXALL!SSPNT ; print sequencer data
3248
3249 ; Test microcode
3250
3251 003503' 002700 300000 T35M: MWORD <ADDR=27,JMAP,J=30> ; init PC (27)
3252 003504' 000000 000040
3253 003505' 003000 000000 MWORD <ADDR=30,LDCT,J=0> ; cntr = 0 (30)
3254 003506' 000000 000300
3255 003507' 003100 440000 MWORD <JRP,ENA,CCOF,J=44> ; go to cntr addr (31)
3256 003510' 000400 010160
3257 003511' 003200 320000 MWORD <JMAP,J=32> ; error if here (32)
3258 003512' 000000 000040
3259 003513' 000000 240000 MWORD <ADDR=0,JMAP,J=24> ; (0)
3260 003514' 000000 000040
3261
3262 003515' 002400 010000 MWORD <ADDR=24,LDCT,J=1> ; cntr = 1 (24)
3263 003516' 000000 000300
3264 003517' 002500 440000 MWORD <JRP,ENA,CCOF,J=44> ; go to cntr addr (25)
3265 003520' 000400 010160
3266 003521' 002600 260000 MWORD <JMAP,J=26> ; error if here (26)
3267 003522' 000000 000040
3268 003523' 000100 130000 MWORD <ADDR=1,JMAP,J=13> ; (1)
3269 003524' 000000 000040
3270
3271 003525' 001300 030000 MWORD <ADDR=13,LDCT,J=3> ; cntr = 3 (13)
3272 003526' 000000 000300
3273 003527' 001400 440000 MWORD <JRP,ENA,CCOF,J=44> ; go to cntr addr (14)
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 65-1
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0766
3274 003530' 000400 010160
3275 003531' 001500 150000 MWORD <JMAP,J=15> ; error if here (15)
3276 003532' 000000 000040
3277
3278 003533' 000300 070000 MWORD <ADDR=3,LDCT,J=7> ; cntr = 7 (3)
3279 003534' 000000 000300
3280 003535' 000400 440000 MWORD <JRP,ENA,CCOF,J=44> ; go to cntr addr (4)
3281 003536' 000400 010160
3282 003537' 000500 050000 MWORD <JMAP,J=5> ; error if here (5)
3283 003540' 000000 000040
3284
3285 003541' 000700 170000 MWORD <ADDR=7,LDCT,J=17> ; cntr = 17 (7)
3286 003542' 000000 000300
3287 003543' 001000 440000 MWORD <JRP,ENA,CCOF,J=44> ; go to cntr addr (10)
3288 003544' 000400 010160
3289 003545' 001100 110000 MWORD <JMAP,J=11> ; error if here (11)
3290 003546' 000000 000040
3291
3292 003547' 001700 370000 MWORD <ADDR=17,LDCT,J=37> ; cntr = 37 (17)
3293 003550' 000000 000300
3294 003551' 002000 440000 MWORD <JRP,ENA,CCOF,J=44> ; go to cntr addr (20)
3295 003552' 000400 010160
3296 003553' 002100 210000 MWORD <JMAP,J=21> ; error if here (21)
3297 003554' 000000 000040
3298
3299 003555' 003700 770000 MWORD <ADDR=37,LDCT,J=77> ; cntr = 77 (37)
3300 003556' 000000 000300
3301 003557' 004000 440000 MWORD <JRP,ENA,CCOF,J=44> ; go to cntr addr (40)
3302 003560' 000400 010160
3303 003561' 004100 410000 MWORD <JMAP,J=41> ; error if here (41)
3304 003562' 000000 000040
3305
3306 003563' 007701 770000 MWORD <ADDR=77,LDCT,J=177> ; cntr = 177 (77)
3307 003564' 000000 000300
3308 003565' 010000 440000 MWORD <JRP,ENA,CCOF,J=44> ; go to cntr addr (100)
3309 003566' 000400 010160
3310 003567' 010101 010000 MWORD <JMAP,J=101> ; error if here (101)
3311 003570' 000000 000040
3312
3313 003571' 017703 770000 MWORD <ADDR=177,LDCT,J=377> ; cntr = 377 (177)
3314 003572' 000000 000300
3315 003573' 020000 440000 MWORD <JRP,ENA,CCOF,J=44> ; go to cntr addr (200)
3316 003574' 000400 010160
3317 003575' 020102 010000 MWORD <JMAP,J=201> ; error if here (201)
3318 003576' 000000 000040
3319
3320 003577' 037707 770000 MWORD <ADDR=377,LDCT,J=777> ; cntr = 777 (377)
3321 003600' 000000 000300
3322 003601' 040000 440000 MWORD <JRP,ENA,CCOF,J=44> ; go to cntr addr (400)
3323 003602' 000400 010160
3324 003603' 040104 010000 MWORD <JMAP,J=401> ; error if here (401)
3325 003604' 000000 000040
3326
3327 003605' 077717 770000 MWORD <ADDR=777,LDCT,J=1777> ; cntr = 1777 (777)
3328 003606' 000000 000300
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 65-2
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0767
3329 003607' 100000 440000 MWORD <JRP,ENA,CCOF,J=44> ; go to cntr addr (1000)
3330 003610' 000400 010160
3331 003611' 100110 010000 MWORD <JMAP,J=1001> ; error if here (1001)
3332 003612' 000000 000040
3333
3334 003613' 177737 770000 MWORD <ADDR=1777,LDCT,J=3777> ; cntr = 3777 (1777)
3335 003614' 000000 000300
3336 003615' 200000 440000 MWORD <JRP,ENA,CCOF,J=44> ; go to cntr addr (2000)
3337 003616' 000400 010160
3338 003617' 200120 010000 MWORD <JMAP,J=2001> ; error if here (2001)
3339 003620' 000000 000040
3340
3341 003621' 377747 770000 MWORD <ADDR=3777,LDCT,J=4777> ; cntr = 4777 (3777)
3342 003622' 000000 000300
3343 003623' 400000 440000 MWORD <JRP,ENA,CCOF,J=44> ; go to cntr addr (4000)
3344 003624' 000400 010160
3345 003625' 400140 010000 MWORD <JMAP,J=4001> ; error if here (4001)
3346 003626' 000000 000040
3347
3348 003627' 477753 770000 MWORD <ADDR=4777,LDCT,J=5377> ; cntr = 5377 (4777)
3349 003630' 000000 000300
3350 003631' 500000 440000 MWORD <JRP,ENA,CCOF,J=44> ; go to cntr addr (5000)
3351 003632' 000400 010160
3352 003633' 500150 010000 MWORD <JMAP,J=5001> ; error if here (5001)
3353 003634' 000000 000040
3354
3355 003635' 537755 770000 MWORD <ADDR=5377,LDCT,J=5577> ; cntr = 5577 (5377)
3356 003636' 000000 000300
3357 003637' 540000 440000 MWORD <JRP,ENA,CCOF,J=44> ; go to cntr addr (5400)
3358 003640' 000400 010160
3359 003641' 540154 010000 MWORD <JMAP,J=5401> ; error if here (5401)
3360 003642' 000000 000040
3361
3362 003643' 557756 770000 MWORD <ADDR=5577,LDCT,J=5677> ; cntr = 5677 (5577)
3363 003644' 000000 000300
3364 003645' 560000 440000 MWORD <JRP,ENA,CCOF,J=44> ; go to cntr addr (5600)
3365 003646' 000400 010160
3366 003647' 560156 010000 MWORD <JMAP,J=5601> ; error if here (5601)
3367 003650' 000000 000040
3368
3369 003651' 567757 370000 MWORD <ADDR=5677,LDCT,J=5737> ; cntr = 5737 (5677)
3370 003652' 000000 000300
3371 003653' 570000 440000 MWORD <JRP,ENA,CCOF,J=44> ; go to cntr addr (5700)
3372 003654' 000400 010160
3373 003655' 570157 010000 MWORD <JMAP,J=5701> ; error if here (5701)
3374 003656' 000000 000040
3375
3376 003657' 573757 570000 MWORD <ADDR=5737,LDCT,J=5757> ; cntr = 5757 (5737)
3377 003660' 000000 000300
3378 003661' 574000 440000 MWORD <JRP,ENA,CCOF,J=44> ; go to cntr addr (5740)
3379 003662' 000400 010160
3380 003663' 574157 510000 MWORD <JMAP,J=5751> ; error if here (5741)
3381 003664' 000000 000040
3382
3383 003665' 575757 730000 MWORD <ADDR=5757,LDCT,J=5773> ; cntr = 5773 (5757)
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 65-3
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0768
3384 003666' 000000 000300
3385 003667' 576000 440000 MWORD <JRP,ENA,CCOF,J=44> ; go to cntr addr (5760)
3386 003670' 000400 010160
3387 003671' 576157 610000 MWORD <JMAP,J=5761> ; error if here (5761)
3388 003672' 000000 000040
3389
3390 003673' 577357 760000 MWORD <ADDR=5773,LDCT,J=5776> ; cntr = 5775 (5773)
3391 003674' 000000 000300
3392 003675' 577400 440000 MWORD <JRP,ENA,CCOF,J=44> ; go to cntr addr (5774)
3393 003676' 000400 010160
3394 003677' 577557 750000 MWORD <JMAP,J=5775> ; error if here (5775)
3395 003700' 000000 000040
3396
3397 003701' 577600 000000 MWORD <CONT> ; done - ok (5776)
3398 003702' 000000 000340
3399 003703' 577757 770000 MWORD <JMAP,J=5777> ; error if here (5777)
3400 003704' 000000 000040
3401 003705' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 66
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0769
3402
3403 ;#********************************************************************
3404 ;* Test 36 - JRP Instruction
3405 ;
3406 ; Description: Verify that a JRP jumps to address specified at
3407 ; direct inputs if TEST inputs are satisfied, and
3408 ; not if not. Also, that register/counter contents
3409 ; are not affected by the JRP.
3410 ;
3411 ; Procedure: Clear Port
3412 ; Load test microcode
3413 ; Set up RAR to start at location 100
3414 ; Set MPRUN/SINGLE STEP (execute JZ)
3415 ; Set MPRUN/SINGLE STEP (execute LDCT,JRP,JRP,JRP)
3416 ; Set MPRUN/SINGLE STEP (execute JRP,JRP)
3417 ; Read LAR, and verify address = 11
3418 ;
3419 ; Failure: ---
3420 ;#********************************************************************
3421
3422 ; Test data
3423
3424 003706' 254 00 0 00 003717' TSTS36: JRST TG36 ; go start test
3425 003707' 240401 000036 SEQ!MPROC!NDMP!ZSEQ!36 ; test mask
3426 003710' 003745' 011044' T36M,,[ASCIZ ^JRP Instruction^]
3427 003711' 010442' 010517' [EXP MLAST!M7],,[EXP M16,M9,M1,MLAST!M8]
3428 003712' 000000 004000' TSTS37 ; failure test table
3429 003713' 000000 004076' TSTS40 ; ...
3430 003714' 000000 004176' TSTS41
3431 003715' 000000 004256' TSTS42
3432 003716' 777777 777777 -1
3433
3434 ; Start test
3435
3436 003717' 201 00 0 00 000000' TG36: MOVEI Z3 ; get address of module start
3437 003720' 260 17 0 00 003456* GO TRACE ; handle trace output
3438 003721' 201 01 0 00 003745' MOVEI 1,T36M ; set up microcode address
3439 003722' 260 17 0 00 003460* GO TLOAD ; load/verify it
3440 003723' 263 17 0 00 000000 RTN ; failed - exit test
3441
3442 ; Initialization
3443
3444 003724' 260 17 0 00 003462* TL36: GO IPACLR ; clear port
3445 003725' 402 00 0 00 003463* SETZM TSTSUB ; initialize subtest number
3446 003726' 201 06 0 00 003741' MOVEI 6,TS36 ; get sstep table address
3447
3448 ; Loop on single step table entries
3449
3450 003727' 400 15 0 00 000000 TA36: SETZ ERFLG, ; clear error flag
3451 003730' 260 17 0 00 003466* GO SEXEC ; execute table entry
3452 003731' 254 00 0 00 003740' JRST TX36 ; end of sstep table
3453 003732' 254 00 0 00 003727' JRST TA36 ; keep looping after call
3454 003733' 474 15 0 00 000000 SETO ERFLG, ; error - end address incorrect
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 67
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0770
3455
3456 ; Handle error printouts and scope looping
3457
3458 003734' 027 00 0 00 003743' SCOPER MA36 ; print error message
3459 003735' 254 00 0 00 003724' JRST TL36 ; loop on error
3460 003736' 254 00 0 00 003740' JRST TX36 ; altmode exit
3461 003737' 322 15 0 00 003727' JUMPE ERFLG,TA36 ; do next sstep table entry
3462
3463 ; End of test
3464
3465 003740' 263 17 0 00 000000 TX36: RTN ; return
3466
3467 ; Single step table, as: (CMD,#Steps,Start addr,End Addr)
3468
3469 003741' 101201 000011 TS36: STABLE (SSSTRT,^D10,100,11)
3470 003742' 000000 000000 STABLE (SSLAST)
3471
3472 ; Error messages
3473
3474 003743' 140000 011050' MA36: MSG!TXNOT![ASCIZ /JRP did not dispatch correctly or cntr messed up/]
3475 003744' 000000000000# LAST!CALL!TXALL!SSPNT ; print sequencer data
3476
3477 ; Test microcode
3478
3479 003745' 000000 110000 T36M: MWORD <ADDR=0,LDCT,J=11> ; load counter (0)
3480 003746' 000000 000300
3481 003747' 000100 030000 MWORD <JRP,DISA,CCOF,J=3> ; go to 3 (disa/off) (1)
3482 003750' 000000 010160
3483 003751' 000200 020000 MWORD <JMAP,J=2> ; error if here (2)
3484 003752' 000000 000040
3485 003753' 000300 050000 MWORD <JRP,DISA,CCON,J=5> ; go to 5 (disa/on) (3)
3486 003754' 000000 030160
3487 003755' 000400 040000 MWORD <JMAP,J=4> ; error if here (4)
3488 003756' 000000 000040
3489 003757' 000500 070000 MWORD <JRP,ENA,CCON,J=7> ; go to 7 (ena/on) (5)
3490 003760' 000400 030160
3491 003761' 000600 060000 MWORD <JMAP,J=6> ; error if here (6)
3492 003762' 000000 000040
3493 003763' 000700 770000 MWORD <JRP,ENA,CCOF,J=77> ; go to cntr (ena/off) (7)
3494 003764' 000400 010160
3495 003765' 001000 100000 MWORD <JMAP,J=10> ; error if here (10)
3496 003766' 000000 000040
3497 003767' 001100 770000 MWORD <JRP,ENA,CCOF,J=77> ; go to cntr (ena/off) (11)
3498 003770' 000400 010160
3499 003771' 001200 120000 MWORD <JMAP,J=12> ; error if here (12)
3500 003772' 000000 000040
3501
3502 003773' 007700 770000 MWORD <ADDR=77,JMAP,J=77> ; error if here (77)
3503 003774' 000000 000040
3504 003775' 010000 000000 MWORD <ADDR=100,JZ> ; init PC (100)
3505 003776' 000000 000000
3506 003777' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 68
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0771
3507
3508 ;#********************************************************************
3509 ;* Test 37 - JSRP Instruction
3510 ;
3511 ; Description: Verify that a JSRP jumps to address specified in
3512 ; the register/counter if the TEST inputs are not
3513 ; satisfied.
3514 ;
3515 ; Also, verify that JSRP jumps to D inputs if TEST
3516 ; inputs are satisfied.
3517 ;
3518 ; Procedure: Clear Port
3519 ; Load test microcode
3520 ; Set up RAR to start at location 100
3521 ; Set MPRUN/SINGLE STEP (execute JZ)
3522 ; Set MPRUN/SINGLE STEP (execute LDCT,JSRP)
3523 ; Set MPRUN/SINGLE STEP (execute LDCT,JSRP)
3524 ; Set MPRUN/SINGLE STEP (execute LDCT,JSRP)
3525 ; Set MPRUN/SINGLE STEP (execute LDCT,JSRP)
3526 ; Read LAR, and verify address = 14
3527 ;
3528 ; Failure: ---
3529 ;#********************************************************************
3530
3531 ; Test data
3532
3533 004000' 254 00 0 00 004011' TSTS37: JRST TG37 ; go start test
3534 004001' 240401 000037 SEQ!MPROC!NDMP!ZSEQ!37 ; test mask
3535 004002' 004037' 011062' T37M,,[ASCIZ ^JSRP Instruction^]
3536 004003' 010442' 010517' [EXP MLAST!M7],,[EXP M16,M9,M1,MLAST!M8]
3537 004004' 000000 004076' TSTS40 ; failure test table
3538 004005' 000000 004176' TSTS41 ; ...
3539 004006' 000000 004256' TSTS42
3540 004007' 000000 004355' TSTS43
3541 004010' 777777 777777 -1
3542
3543 ; Start test
3544
3545 004011' 201 00 0 00 000000' TG37: MOVEI Z3 ; get address of module start
3546 004012' 260 17 0 00 003720* GO TRACE ; handle trace output
3547 004013' 201 01 0 00 004037' MOVEI 1,T37M ; set up microcode address
3548 004014' 260 17 0 00 003722* GO TLOAD ; load/verify it
3549 004015' 263 17 0 00 000000 RTN ; failed - exit test
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 69
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0772
3550
3551 ; Initialization
3552
3553 004016' 260 17 0 00 003724* TL37: GO IPACLR ; clear port
3554 004017' 402 00 0 00 003725* SETZM TSTSUB ; initialize subtest number
3555 004020' 201 06 0 00 004033' MOVEI 6,TS37 ; get sstep table address
3556
3557 ; Loop on single step table entries
3558
3559 004021' 400 15 0 00 000000 TA37: SETZ ERFLG, ; clear error flag
3560 004022' 260 17 0 00 003730* GO SEXEC ; execute table entry
3561 004023' 254 00 0 00 004032' JRST TX37 ; end of sstep table
3562 004024' 254 00 0 00 004021' JRST TA37 ; keep looping after call
3563 004025' 474 15 0 00 000000 SETO ERFLG, ; error - end address incorrect
3564
3565 ; Handle error printouts and scope looping
3566
3567 004026' 027 00 0 00 004035' SCOPER MA37 ; print error message
3568 004027' 254 00 0 00 004016' JRST TL37 ; loop on error
3569 004030' 254 00 0 00 004032' JRST TX37 ; altmode exit
3570 004031' 322 15 0 00 004021' JUMPE ERFLG,TA37 ; do next sstep table entry
3571
3572 ; End of test
3573
3574 004032' 263 17 0 00 000000 TX37: RTN ; return
3575
3576 ; Single step table, as: (CMD,#Steps,Start addr,End Addr)
3577
3578 004033' 101101 000014 TS37: STABLE (SSSTRT,^D9,100,14)
3579 004034' 000000 000000 STABLE (SSLAST)
3580
3581 ; Error messages
3582
3583 004035' 140000 011066' MA37: MSG!TXNOT![ASCIZ /JSRP did not dispatch correctly/]
3584 004036' 000000000000# LAST!CALL!TXALL!SSPNT ; print sequencer data
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 70
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0773
3585
3586 ; Test microcode
3587
3588 004037' 010000 000000 T37M: MWORD <ADDR=100,JZ> ; init PC (100)
3589 004040' 000000 000000
3590 004041' 000000 020000 MWORD <ADDR=0,LDCT,J=2> ; load counter (0)
3591 004042' 000000 000300
3592 004043' 000100 030000 MWORD <JSRP,DISA,CCOF,J=3> ; disa/off (1)
3593 004044' 000000 010120
3594 004045' 000200 020000 MWORD <JMAP,J=2> ; error if here (2)
3595 004046' 000000 000040
3596
3597 004047' 000300 050000 MWORD <LDCT,J=5> ; load counter (3)
3598 004050' 000000 000300
3599 004051' 000400 060000 MWORD <JSRP,DISA,CCON,J=6> ; disa/on (4)
3600 004052' 000000 030120
3601 004053' 000500 050000 MWORD <JMAP,J=5> ; error if here (5)
3602 004054' 000000 000040
3603
3604 004055' 000600 100000 MWORD <LDCT,J=10> ; load counter (6)
3605 004056' 000000 000300
3606 004057' 000700 110000 MWORD <JSRP,ENA,CCON,J=11> ; ena/on (7)
3607 004060' 000400 030120
3608 004061' 001000 120000 MWORD <JMAP,J=12> ; error if here (10)
3609 004062' 000000 000040
3610
3611 004063' 001100 140000 MWORD <LDCT,J=14> ; load counter (11)
3612 004064' 000000 000300
3613 004065' 001200 130000 MWORD <JSRP,ENA,CCOF,J=13> ; ena/off (12)
3614 004066' 000400 010120
3615 004067' 001300 130000 MWORD <JMAP,J=13> ; error if here (13)
3616 004070' 000000 000040
3617
3618 004071' 001400 000000 MWORD <CONT> ; done - ok (14)
3619 004072' 000000 000340
3620 004073' 001500 150000 MWORD <JMAP,J=15> ; error if here (15)
3621 004074' 000000 000040
3622 004075' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 71
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0774
3623
3624 ;#********************************************************************
3625 ;* Test 40 - JSRP Instruction
3626 ;
3627 ; Description: Verify that the JSRP pushes 'CRAM address + 1'
3628 ; onto the stack regardless of TEST input.
3629 ;
3630 ; Procedure: Clear Port
3631 ; Load test microcode
3632 ; Set up RAR to start at location 100
3633 ; Set MPRUN/SINGLE STEP (execute JZ,PUSH)
3634 ; Set MPRUN/SINGLE STEP (execute LDCT,JSRP)
3635 ; Set MPRUN/SINGLE STEP (execute LDCT,JSRP)
3636 ; Set MPRUN/SINGLE STEP (execute LDCT,JSRP)
3637 ; Set MPRUN/SINGLE STEP (execute LDCT,JSRP)
3638 ; Set MPRUN/SINGLE STEP (execute CRTN,CRTN,CRTN,CRTN,CRTN)
3639 ; Read LAR, and verify address = 1
3640 ;
3641 ; Failure: ---
3642 ;#********************************************************************
3643
3644 ; Test data
3645
3646 004076' 254 00 0 00 004107' TSTS40: JRST TG40 ; go start test
3647 004077' 240401 000040 SEQ!MPROC!NDMP!ZSEQ!40 ; test mask
3648 004100' 004135' 011062' T40M,,[ASCIZ ^JSRP Instruction^]
3649 004101' 010442' 010517' [EXP MLAST!M7],,[EXP M16,M9,M1,MLAST!M8]
3650 004102' 000000 004176' TSTS41 ; failure test table
3651 004103' 000000 004256' TSTS42 ; ...
3652 004104' 000000 004355' TSTS43
3653 004105' 000000 004447' TSTS44
3654 004106' 777777 777777 -1
3655
3656 ; Start test
3657
3658 004107' 201 00 0 00 000000' TG40: MOVEI Z3 ; get address of module start
3659 004110' 260 17 0 00 004012* GO TRACE ; handle trace output
3660 004111' 201 01 0 00 004135' MOVEI 1,T40M ; set up microcode address
3661 004112' 260 17 0 00 004014* GO TLOAD ; load/verify it
3662 004113' 263 17 0 00 000000 RTN ; failed - exit test
3663
3664 ; Initialization
3665
3666 004114' 260 17 0 00 004016* TL40: GO IPACLR ; clear port
3667 004115' 402 00 0 00 004017* SETZM TSTSUB ; initialize subtest number
3668 004116' 201 06 0 00 004131' MOVEI 6,TS40 ; get sstep table address
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 72
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0775
3669
3670 ; Loop on single step table entries
3671
3672 004117' 400 15 0 00 000000 TA40: SETZ ERFLG, ; clear error flag
3673 004120' 260 17 0 00 004022* GO SEXEC ; execute table entry
3674 004121' 254 00 0 00 004130' JRST TX40 ; end of sstep table
3675 004122' 254 00 0 00 004117' JRST TA40 ; keep looping after call
3676 004123' 474 15 0 00 000000 SETO ERFLG, ; error - end address incorrect
3677
3678 ; Handle error printouts and scope looping
3679
3680 004124' 027 00 0 00 004133' SCOPER MA40 ; print error message
3681 004125' 254 00 0 00 004114' JRST TL40 ; loop on error
3682 004126' 254 00 0 00 004130' JRST TX40 ; altmode exit
3683 004127' 322 15 0 00 004117' JUMPE ERFLG,TA40 ; do next sstep table entry
3684
3685 ; End of test
3686
3687 004130' 263 17 0 00 000000 TX40: RTN ; return
3688
3689 ; Single step table, as: (CMD,#Steps,Start addr,End Addr)
3690
3691 004131' 101701 000001 TS40: STABLE (SSSTRT,^D15,100,1)
3692 004132' 000000 000000 STABLE (SSLAST)
3693
3694 ; Error messages
3695
3696 004133' 140000 011075' MA40: MSG!TXNOT![ASCIZ /JSRP did not do a push/]
3697 004134' 000000000000# LAST!CALL!TXALL!SSPNT ; print sequencer data
3698
3699 ; Test microcode
3700
3701 004135' 000000 000000 T40M: MWORD <ADDR=0,PUSH> ; push 1 (#1) (0)
3702 004136' 000000 000100
3703
3704 004137' 000100 770000 MWORD <LDCT,J=77> ; load counter (1)
3705 004140' 000000 000300
3706 004141' 000200 040000 MWORD <JSRP,DISA,CCOF,J=4> ; go to 4 (push #2) (2)
3707 004142' 000000 010120
3708 004143' 000300 000000 MWORD <CRTN> ; return to 1 (pop #5) (3)
3709 004144' 000000 000240
3710
3711 004145' 000400 770000 MWORD <LDCT,J=77> ; load counter (4)
3712 004146' 000000 000300
3713 004147' 000500 070000 MWORD <JSRP,DISA,CCON,J=7> ; go to 7 (push #3) (5)
3714 004150' 000000 030120
3715 004151' 000600 000000 MWORD <CRTN> ; return to 3 (pop #4) (6)
3716 004152' 000000 000240
3717
3718 004153' 000700 770000 MWORD <LDCT,J=77> ; load counter (7)
3719 004154' 000000 000300
3720 004155' 001000 120000 MWORD <JSRP,ENA,CCON,J=12> ; go to 12 (push #4) (10)
3721 004156' 000400 030120
3722 004157' 001100 000000 MWORD <CRTN> ; return to 6 (pop #3) (11)
3723 004160' 000000 000240
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 72-1
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0776
3724
3725 004161' 001200 150000 MWORD <LDCT,J=15> ; load counter (12)
3726 004162' 000000 000300
3727 004163' 001300 770000 MWORD <JSRP,ENA,CCOF,J=77> ; go to cnt adr (push #5) (13)
3728 004164' 000400 010120
3729 004165' 001400 000000 MWORD <CRTN> ; return to 11 (pop #2) (14)
3730 004166' 000000 000240
3731
3732 004167' 001500 000000 MWORD <CRTN> ; return to 14 (pop #1) (15)
3733 004170' 000000 000240
3734 004171' 007700 770000 MWORD <ADDR=77,JMAP,J=77> ; error if here (77)
3735 004172' 000000 000040
3736
3737 004173' 010000 000000 MWORD <ADDR=100,JZ> ; initialize stack (100)
3738 004174' 000000 000000
3739 004175' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 73
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0777
3740
3741 ;#********************************************************************
3742 ;* Test 41 - JSRP Instruction
3743 ;
3744 ; Description: Verify that the JSRP does not affect register/
3745 ; counter regardless of TEST inputs.
3746 ;
3747 ; Procedure: Clear Port
3748 ; Load test microcode
3749 ; Set MPRUN/SINGLE STEP (execute JZ)
3750 ; Set MPRUN/SINGLE STEP (execute LDCT,JSRP,JSRP,JSRP,JSRP)
3751 ; Read LAR, and verify address = 6
3752 ;
3753 ; Failure: ---
3754 ;#********************************************************************
3755
3756 ; Test data
3757
3758 004176' 254 00 0 00 004207' TSTS41: JRST TG41 ; go start test
3759 004177' 240401 000041 SEQ!MPROC!NDMP!ZSEQ!41 ; test mask
3760 004200' 004235' 011062' T41M,,[ASCIZ ^JSRP Instruction^]
3761 004201' 010442' 010517' [EXP MLAST!M7],,[EXP M16,M9,M1,MLAST!M8]
3762 004202' 000000 004256' TSTS42 ; failure test table
3763 004203' 000000 004355' TSTS43 ; ...
3764 004204' 000000 004447' TSTS44
3765 004205' 000000 004527' TSTS45
3766 004206' 777777 777777 -1
3767
3768 ; Start test
3769
3770 004207' 201 00 0 00 000000' TG41: MOVEI Z3 ; get address of module start
3771 004210' 260 17 0 00 004110* GO TRACE ; handle trace output
3772 004211' 201 01 0 00 004235' MOVEI 1,T41M ; set up microcode address
3773 004212' 260 17 0 00 004112* GO TLOAD ; load/verify it
3774 004213' 263 17 0 00 000000 RTN ; failed - exit test
3775
3776 ; Initialization
3777
3778 004214' 260 17 0 00 004114* TL41: GO IPACLR ; clear port
3779 004215' 402 00 0 00 004115* SETZM TSTSUB ; initialize subtest number
3780 004216' 201 06 0 00 004231' MOVEI 6,TS41 ; get sstep table address
3781
3782 ; Loop on single step table entries
3783
3784 004217' 400 15 0 00 000000 TA41: SETZ ERFLG, ; clear error flag
3785 004220' 260 17 0 00 004120* GO SEXEC ; execute table entry
3786 004221' 254 00 0 00 004230' JRST TX41 ; end of sstep table
3787 004222' 254 00 0 00 004217' JRST TA41 ; keep looping after call
3788 004223' 474 15 0 00 000000 SETO ERFLG, ; error - end address incorrect
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 74
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0778
3789
3790 ; Handle error printouts and scope looping
3791
3792 004224' 027 00 0 00 004233' SCOPER MA41 ; print error message
3793 004225' 254 00 0 00 004214' JRST TL41 ; loop on error
3794 004226' 254 00 0 00 004230' JRST TX41 ; altmode exit
3795 004227' 322 15 0 00 004217' JUMPE ERFLG,TA41 ; do next sstep table entry
3796
3797 ; End of test
3798
3799 004230' 263 17 0 00 000000 TX41: RTN ; return
3800
3801 ; Single step table, as: (CMD,#Steps,Start addr,End Addr)
3802
3803 004231' 100601 000006 TS41: STABLE (SSSTRT,6,100,6)
3804 004232' 000000 000000 STABLE (SSLAST)
3805
3806 ; Error messages
3807
3808 004233' 140000 011102' MA41: MSG!TXNOT![ASCIZ /JSRP affected cntr and it shouldn't have/]
3809 004234' 000000000000# LAST!CALL!TXALL!SSPNT ; print sequencer data
3810
3811 ; Test microcode
3812
3813 004235' 010000 000000 T41M: MWORD <ADDR=100,JZ> ; init PC (100)
3814 004236' 000000 000000
3815 004237' 000000 060000 MWORD <ADDR=0,LDCT,J=6> ; load counter (0)
3816 004240' 000000 000300
3817 004241' 000100 020000 MWORD <JSRP,DISA,CCOF,J=2> ; disa/off (1)
3818 004242' 000000 010120
3819 004243' 000200 030000 MWORD <JSRP,DISA,CCON,J=3> ; disa/on (2)
3820 004244' 000000 030120
3821 004245' 000300 040000 MWORD <JSRP,ENA,CCON,J=4> ; ena/on (3)
3822 004246' 000400 030120
3823 004247' 000400 050000 MWORD <JSRP,ENA,CCOF,J=5> ; ena/off (4)
3824 004250' 000400 010120
3825 004251' 000500 050000 MWORD <JMAP,J=5> ; error if here (5)
3826 004252' 000000 000040
3827 004253' 000600 050000 MWORD <JMAP,J=5> ; here if ok (6)
3828 004254' 000000 000040
3829 004255' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 75
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0779
3830
3831 ;#********************************************************************
3832 ;* Test 42 - PUSH Instruction
3833 ;
3834 ; Description: Verify that the PUSH instruction pushes 'CRAM
3835 ; address + 1' onto the stack.
3836 ;
3837 ; Procedure: Clear Port
3838 ; Load test microcode
3839 ;
3840 ; Set up RAR to start at location 4
3841 ; Set MPRUN/SINGLE STEP (execute JZ,CJS,PUSH,CRTN)
3842 ; Read LAR, and verify address = 6
3843 ;
3844 ; Set up RAR to start at location 1
3845 ; Set MPRUN/SINGLE STEP (execute CJS,PUSH,CRTN)
3846 ; Read LAR, and verify address = 10
3847 ;
3848 ; Set up RAR to start at location 2
3849 ; Set MPRUN/SINGLE STEP (execute CJS,PUSH,CRTN)
3850 ; Read LAR, and verify address = 12
3851 ;
3852 ; Set up RAR to start at location 3
3853 ; Set MPRUN/SINGLE STEP (execute CJS,PUSH,CRTN)
3854 ; Read LAR, and verify address = 14
3855 ;
3856 ; Failure: ---
3857 ;#********************************************************************
3858
3859 ; Test data
3860
3861 004256' 254 00 0 00 004267' TSTS42: JRST TG42 ; go start test
3862 004257' 240401 000042 SEQ!MPROC!NDMP!ZSEQ!42 ; test mask
3863 004260' 004320' 011113' T42M,,[ASCIZ ^PUSH Instruction^]
3864 004261' 010442' 010517' [EXP MLAST!M7],,[EXP M16,M9,M1,MLAST!M8]
3865 004262' 000000 004355' TSTS43 ; failure test table
3866 004263' 000000 004447' TSTS44 ; ...
3867 004264' 000000 004527' TSTS45
3868 004265' 000000 004616' TSTS46
3869 004266' 777777 777777 -1
3870
3871 ; Start test
3872
3873 004267' 201 00 0 00 000000' TG42: MOVEI Z3 ; get address of module start
3874 004270' 260 17 0 00 004210* GO TRACE ; handle trace output
3875 004271' 201 01 0 00 004320' MOVEI 1,T42M ; set up microcode address
3876 004272' 260 17 0 00 004212* GO TLOAD ; load/verify it
3877 004273' 263 17 0 00 000000 RTN ; failed - exit test
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 76
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0780
3878
3879 ; Initialization
3880
3881 004274' 260 17 0 00 004214* TL42: GO IPACLR ; clear port
3882 004275' 402 00 0 00 004215* SETZM TSTSUB ; initialize subtest number
3883 004276' 201 06 0 00 004311' MOVEI 6,TS42 ; get sstep table address
3884
3885 ; Loop on single step table entries
3886
3887 004277' 400 15 0 00 000000 TA42: SETZ ERFLG, ; clear error flag
3888 004300' 260 17 0 00 004220* GO SEXEC ; execute table entry
3889 004301' 254 00 0 00 004310' JRST TX42 ; end of sstep table
3890 004302' 254 00 0 00 004277' JRST TA42 ; keep looping after call
3891 004303' 474 15 0 00 000000 SETO ERFLG, ; error - end address incorrect
3892
3893 ; Handle error printouts and scope looping
3894
3895 004304' 027 00 0 00 004316' SCOPER MA42 ; print error message
3896 004305' 254 00 0 00 004274' JRST TL42 ; loop on error
3897 004306' 254 00 0 00 004310' JRST TX42 ; altmode exit
3898 004307' 322 15 0 00 004277' JUMPE ERFLG,TA42 ; do next sstep table entry
3899
3900 ; End of test
3901
3902 004310' 263 17 0 00 000000 TX42: RTN ; return
3903
3904 ; Single step table, as: (CMD,#Steps,Start addr,End Addr)
3905
3906 004311' 100400 040006 TS42: STABLE (SSSTRT,4,4,6)
3907 004312' 100300 010010 STABLE (SSSTRT,3,1,10)
3908 004313' 100300 020012 STABLE (SSSTRT,3,2,12)
3909 004314' 100300 030014 STABLE (SSSTRT,3,3,14)
3910 004315' 000000 000000 STABLE (SSLAST)
3911
3912 ; Error messages
3913
3914 004316' 140000 011117' MA42: MSG!TXNOT![ASCIZ /PUSH did not push PC+1 onto stack/]
3915 004317' 000000000000# LAST!CALL!TXALL!SSPNT ; print sequencer data
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 77
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0781
3916
3917 ; Test microcode
3918
3919 004320' 000000 050000 T42M: MWORD <ADDR=0,CJS,J=5> ; push 1 onto stack (0)
3920 004321' 000000 000020
3921 004322' 000100 070000 MWORD <CJS,J=7> ; push 2 onto stack (1)
3922 004323' 000000 000020
3923 004324' 000200 110000 MWORD <CJS,J=11> ; push 3 onto stack (2)
3924 004325' 000000 000020
3925 004326' 000300 130000 MWORD <CJS,J=13> ; push 4 onto stack (3)
3926 004327' 000000 000020
3927 004330' 000400 000000 MWORD <JZ> ; initialize stack (4)
3928 004331' 000000 000000
3929
3930 004332' 000500 770000 MWORD <PUSH,DISA,CCOF,J=77> ; disa/off (5)
3931 004333' 000000 010100
3932 004334' 000600 000000 MWORD <CRTN> ; return to 5 (6)
3933 004335' 000000 000240
3934 004336' 000700 770000 MWORD <PUSH,DISA,CCON,J=77> ; disa/on (7)
3935 004337' 000000 030100
3936 004340' 001000 000000 MWORD <CRTN> ; return to 5 (10)
3937 004341' 000000 000240
3938 004342' 001100 770000 MWORD <PUSH,ENA,CCOF,J=77> ; ena/off (11)
3939 004343' 000400 010100
3940 004344' 001200 000000 MWORD <CRTN> ; return to 5 (12)
3941 004345' 000000 000240
3942 004346' 001300 770000 MWORD <PUSH,ENA,CCON,J=77> ; ena/on (13)
3943 004347' 000400 030100
3944 004350' 001400 000000 MWORD <CRTN> ; return to 5 (14)
3945 004351' 000000 000240
3946
3947 004352' 007700 770000 MWORD <ADDR=77,JMAP,J=77> ; error if here (77)
3948 004353' 000000 000040
3949 004354' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 78
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0782
3950
3951 ;#********************************************************************
3952 ;* Test 43 - PUSH Instruction
3953 ;
3954 ; Description: Verify that the PUSH instruction loads the
3955 ; register/counter with the data on the direct
3956 ; inputs when TEST inputs are satisfied. Also,
3957 ; verify that initial register/counter contents do
3958 ; not affect anything.
3959 ;
3960 ; Procedure: Clear Port
3961 ; Load test microcode
3962 ; Set up RAR to start at location 100
3963 ; Set MPRUN/SINGLE STEP (execute JZ)
3964 ; Set MPRUN/SINGLE STEP (execute LDCT,PUSH,JRP)
3965 ; Set MPRUN/SINGLE STEP (execute PUSH,JRP)
3966 ; Set MPRUN/SINGLE STEP (execute PUSH,JRP)
3967 ; Read LAR, and verify address = 12
3968 ;
3969 ; Failure: ---
3970 ;#********************************************************************
3971
3972 ; Test data
3973
3974 004355' 254 00 0 00 004366' TSTS43: JRST TG43 ; go start test
3975 004356' 240401 000043 SEQ!MPROC!NDMP!ZSEQ!43 ; test mask
3976 004357' 004414' 011113' T43M,,[ASCIZ ^PUSH Instruction^]
3977 004360' 010442' 010517' [EXP MLAST!M7],,[EXP M16,M9,M1,MLAST!M8]
3978 004361' 000000 004447' TSTS44 ; failure test table
3979 004362' 000000 004527' TSTS45 ; ...
3980 004363' 000000 004616' TSTS46
3981 004364' 000000 004712' TSTS47
3982 004365' 777777 777777 -1
3983
3984 ; Start test
3985
3986 004366' 201 00 0 00 000000' TG43: MOVEI Z3 ; get address of module start
3987 004367' 260 17 0 00 004270* GO TRACE ; handle trace output
3988 004370' 201 01 0 00 004414' MOVEI 1,T43M ; set up microcode address
3989 004371' 260 17 0 00 004272* GO TLOAD ; load/verify it
3990 004372' 263 17 0 00 000000 RTN ; failed - exit test
3991
3992 ; Initialization
3993
3994 004373' 260 17 0 00 004274* TL43: GO IPACLR ; clear port
3995 004374' 402 00 0 00 004275* SETZM TSTSUB ; initialize subtest number
3996 004375' 201 06 0 00 004410' MOVEI 6,TS43 ; get sstep table address
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 79
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0783
3997
3998 ; Loop on single step table entries
3999
4000 004376' 400 15 0 00 000000 TA43: SETZ ERFLG, ; clear error flag
4001 004377' 260 17 0 00 004300* GO SEXEC ; execute table entry
4002 004400' 254 00 0 00 004407' JRST TX43 ; end of sstep table
4003 004401' 254 00 0 00 004376' JRST TA43 ; keep looping after call
4004 004402' 474 15 0 00 000000 SETO ERFLG, ; error - end address incorrect
4005
4006 ; Handle error printouts and scope looping
4007
4008 004403' 027 00 0 00 004412' SCOPER MA43 ; print error message
4009 004404' 254 00 0 00 004373' JRST TL43 ; loop on error
4010 004405' 254 00 0 00 004407' JRST TX43 ; altmode exit
4011 004406' 322 15 0 00 004376' JUMPE ERFLG,TA43 ; do next sstep table entry
4012
4013 ; End of test
4014
4015 004407' 263 17 0 00 000000 TX43: RTN ; return
4016
4017 ; Single step table, as: (CMD,#Steps,Start addr,End Addr)
4018
4019 004410' 101001 000012 TS43: STABLE (SSSTRT,^D8,100,12)
4020 004411' 000000 000000 STABLE (SSLAST)
4021
4022 ; Error messages
4023
4024 004412' 140000 011126' MA43: MSG!TXNOT![ASCIZ /PUSH did not load cntr properly/]
4025 004413' 000000000000# LAST!CALL!TXALL!SSPNT ; print sequencer data
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 80
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0784
4026
4027 ; Test microcode
4028
4029 004414' 010000 000000 T43M: MWORD <ADDR=100,JZ> ; init PC (100)
4030 004415' 000000 000000
4031 004416' 000000 000000 MWORD <ADDR=0,LDCT,J=0> ; zero counter (0)
4032 004417' 000000 000300
4033 004420' 000100 040000 MWORD <PUSH,DISA,CCOF,J=4> ; load cntr with 4 (1)
4034 004421' 000000 010100
4035 004422' 000200 200000 MWORD <JRP,ENA,CCOF,J=20> ; go to cntr addr (2)
4036 004423' 000400 010160
4037 004424' 000300 030000 MWORD <JMAP,J=3> ; error if here (3)
4038 004425' 000000 000040
4039 004426' 000400 070000 MWORD <PUSH,DISA,CCOF,J=7> ; load cntr with 7 (4)
4040 004427' 000000 010100
4041 004430' 000500 200000 MWORD <JRP,ENA,CCOF,J=20> ; go to cntr addr (5)
4042 004431' 000400 010160
4043 004432' 000600 060000 MWORD <JMAP,J=6> ; error if here (6)
4044 004433' 000000 000040
4045 004434' 000700 120000 MWORD <PUSH,DISA,CCOF,J=12> ; load cntr with 12 (7)
4046 004435' 000000 010100
4047 004436' 001000 200000 MWORD <JRP,ENA,CCOF,J=20> ; go to cntr addr (10)
4048 004437' 000400 010160
4049 004440' 001100 110000 MWORD <JMAP,J=11> ; error if here (11)
4050 004441' 000000 000040
4051 004442' 001200 000000 MWORD <CONT> ; done (12)
4052 004443' 000000 000340
4053
4054 004444' 002000 200000 MWORD <ADDR=20,JMAP,J=20> ; error if here (20)
4055 004445' 000000 000040
4056 004446' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 81
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0785
4057
4058 ;#********************************************************************
4059 ;* Test 44 - PUSH Instruction
4060 ;
4061 ; Description: Verify that the PUSH instruction does not load
4062 ; the register/counter with data on the direct
4063 ; inputs when TEST is negated. Also, that the
4064 ; initial register/counter contents do not affect
4065 ; the instruction.
4066 ;
4067 ; Procedure: Clear Port
4068 ; Load test microcode
4069 ; Set up RAR to start at location 100
4070 ; Set MPRUN/SINGLE STEP (execute JZ)
4071 ; Set MPRUN/SINGLE STEP (execute LDCT,PUSH,JRP)
4072 ; Set MPRUN/SINGLE STEP (execute LDCT,PUSH,JRP)
4073 ; Read LAR, and verify address = 0
4074 ;
4075 ; Failure: ---
4076 ;#********************************************************************
4077
4078 ; Test data
4079
4080 004447' 254 00 0 00 004460' TSTS44: JRST TG44 ; go start test
4081 004450' 240401 000044 SEQ!MPROC!NDMP!ZSEQ!44 ; test mask
4082 004451' 004506' 011113' T44M,,[ASCIZ ^PUSH Instruction^]
4083 004452' 010442' 010517' [EXP MLAST!M7],,[EXP M16,M9,M1,MLAST!M8]
4084 004453' 000000 004527' TSTS45 ; failure test table
4085 004454' 000000 004616' TSTS46 ; ...
4086 004455' 000000 004712' TSTS47
4087 004456' 000000 005002' TSTS50
4088 004457' 777777 777777 -1
4089
4090 ; Start test
4091
4092 004460' 201 00 0 00 000000' TG44: MOVEI Z3 ; get address of module start
4093 004461' 260 17 0 00 004367* GO TRACE ; handle trace output
4094 004462' 201 01 0 00 004506' MOVEI 1,T44M ; set up microcode address
4095 004463' 260 17 0 00 004371* GO TLOAD ; load/verify it
4096 004464' 263 17 0 00 000000 RTN ; failed - exit test
4097
4098 ; Initialization
4099
4100 004465' 260 17 0 00 004373* TL44: GO IPACLR ; clear port
4101 004466' 402 00 0 00 004374* SETZM TSTSUB ; initialize subtest number
4102 004467' 201 06 0 00 004502' MOVEI 6,TS44 ; get sstep table address
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 82
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0786
4103
4104 ; Loop on single step table entries
4105
4106 004470' 400 15 0 00 000000 TA44: SETZ ERFLG, ; clear error flag
4107 004471' 260 17 0 00 004377* GO SEXEC ; execute table entry
4108 004472' 254 00 0 00 004501' JRST TX44 ; end of sstep table
4109 004473' 254 00 0 00 004470' JRST TA44 ; keep looping after call
4110 004474' 474 15 0 00 000000 SETO ERFLG, ; error - end address incorrect
4111
4112 ; Handle error printouts and scope looping
4113
4114 004475' 027 00 0 00 004504' SCOPER MA44 ; print error message
4115 004476' 254 00 0 00 004465' JRST TL44 ; loop on error
4116 004477' 254 00 0 00 004501' JRST TX44 ; altmode exit
4117 004500' 322 15 0 00 004470' JUMPE ERFLG,TA44 ; do next sstep table entry
4118
4119 ; End of test
4120
4121 004501' 263 17 0 00 000000 TX44: RTN ; return
4122
4123 ; Single step table, as: (CMD,#Steps,Start addr,End Addr)
4124
4125 004502' 100701 000000 TS44: STABLE (SSSTRT,7,100,0)
4126 004503' 000000 000000 STABLE (SSLAST)
4127
4128 ; Error messages
4129
4130 004504' 140000 011126' MA44: MSG!TXNOT![ASCIZ /PUSH did not load cntr properly/]
4131 004505' 000000000000# LAST!CALL!TXALL!SSPNT ; print sequencer data
4132
4133 ; Test microcode
4134
4135 004506' 010000 000000 T44M: MWORD <ADDR=100,JZ> ; init PC (100)
4136 004507' 000000 000000
4137 004510' 000000 040000 MWORD <ADDR=0,LDCT,J=4> ; load counter (0)
4138 004511' 000000 000300
4139 004512' 000100 030000 MWORD <PUSH,ENA,CCOF,J=3> ; ena/off (don't load) (1)
4140 004513' 000400 010100
4141 004514' 000200 030000 MWORD <JRP,ENA,CCOF,J=3> ; go to cntr addr (4) (2)
4142 004515' 000400 010160
4143 004516' 000300 030000 MWORD <JMAP,J=3> ; error if here (3)
4144 004517' 000000 000040
4145
4146 004520' 000400 000000 MWORD <LDCT,J=0> ; load counter (4)
4147 004521' 000000 000300
4148 004522' 000500 030000 MWORD <PUSH,ENA,CCOF,J=3> ; ena/off (don't load) (5)
4149 004523' 000400 010100
4150 004524' 000600 030000 MWORD <JRP,ENA,CCOF,J=3> ; go to cntr addr (0) (6)
4151 004525' 000400 010160
4152 004526' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 83
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0787
4153
4154 ;#********************************************************************
4155 ;* Test 45 - LOOP Instruction
4156 ;
4157 ; Description: Verify that the LOOP instruction causes a jump to
4158 ; the address specified at top of stack if TEST is
4159 ; negated.
4160 ;
4161 ; Procedure: Clear Port
4162 ; Load test microcode
4163 ;
4164 ; Set up RAR to start at location 100
4165 ; Set MPRUN/SINGLE STEP (execute JMAP,PUSH,PUSH,PUSH)
4166 ; Set MPRUN/SINGLE STEP (execute LOOP,LOOP)
4167 ; Read LAR, and verify address = 3
4168 ;
4169 ; Set up RAR to start at location 101
4170 ; Set MPRUN/SINGLE STEP (execute JMAP,PUSH,PUSH,PUSH)
4171 ; Set MPRUN/SINGLE STEP (execute LOOP,LOOP)
4172 ; Read LAR, and verify address = 7
4173 ;
4174 ; Failure: ---
4175 ;#********************************************************************
4176
4177 ; Test data
4178
4179 004527' 254 00 0 00 004540' TSTS45: JRST TG45 ; go start test
4180 004530' 240401 000045 SEQ!MPROC!NDMP!ZSEQ!45 ; test mask
4181 004531' 004567' 011135' T45M,,[ASCIZ ^LOOP Instruction^]
4182 004532' 010442' 010517' [EXP MLAST!M7],,[EXP M16,M9,M1,MLAST!M8]
4183 004533' 000000 004616' TSTS46 ; failure test table
4184 004534' 000000 004712' TSTS47 ; ...
4185 004535' 000000 005002' TSTS50
4186 004536' 000000 005366' TSTS51
4187 004537' 777777 777777 -1
4188
4189 ; Start test
4190
4191 004540' 201 00 0 00 000000' TG45: MOVEI Z3 ; get address of module start
4192 004541' 260 17 0 00 004461* GO TRACE ; handle trace output
4193 004542' 201 01 0 00 004567' MOVEI 1,T45M ; set up microcode address
4194 004543' 260 17 0 00 004463* GO TLOAD ; load/verify it
4195 004544' 263 17 0 00 000000 RTN ; failed - exit test
4196
4197 ; Initialization
4198
4199 004545' 260 17 0 00 004465* TL45: GO IPACLR ; clear port
4200 004546' 402 00 0 00 004466* SETZM TSTSUB ; initialize subtest number
4201 004547' 201 06 0 00 004562' MOVEI 6,TS45 ; get sstep table address
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 84
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0788
4202
4203 ; Loop on single step table entries
4204
4205 004550' 400 15 0 00 000000 TA45: SETZ ERFLG, ; clear error flag
4206 004551' 260 17 0 00 004471* GO SEXEC ; execute table entry
4207 004552' 254 00 0 00 004561' JRST TX45 ; end of sstep table
4208 004553' 254 00 0 00 004550' JRST TA45 ; keep looping after call
4209 004554' 474 15 0 00 000000 SETO ERFLG, ; error - end address incorrect
4210
4211 ; Handle error printouts and scope looping
4212
4213 004555' 027 00 0 00 004565' SCOPER MA45 ; print error message
4214 004556' 254 00 0 00 004545' JRST TL45 ; loop on error
4215 004557' 254 00 0 00 004561' JRST TX45 ; altmode exit
4216 004560' 322 15 0 00 004550' JUMPE ERFLG,TA45 ; do next sstep table entry
4217
4218 ; End of test
4219
4220 004561' 263 17 0 00 000000 TX45: RTN ; return
4221
4222 ; Single step table, as: (CMD,#Steps,Start addr,End Addr)
4223
4224 004562' 100601 000003 TS45: STABLE (SSSTRT,6,100,3)
4225 004563' 100601 010007 STABLE (SSSTRT,6,101,7)
4226 004564' 000000 000000 STABLE (SSLAST)
4227
4228 ; Error messages
4229
4230 004565' 140000 011141' MA45: MSG!TXNOT![ASCIZ /LOOP did not dispatch to stack address/]
4231 004566' 000000000000# LAST!CALL!TXALL!SSPNT ; print sequencer data
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 85
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0789
4232
4233 ; Test microcode
4234
4235 ; First do cntr = 0
4236
4237 004567' 010000 000000 T45M: MWORD <ADDR=100,JMAP,J=0> ; init PC (100)
4238 004570' 000000 000040
4239 004571' 000000 000000 MWORD <ADDR=0,PUSH,J=0> ; load cntr with 0 (0)
4240 004572' 000000 000100
4241 004573' 000100 100000 MWORD <PUSH,ENA,CCOF,J=10> ; don't load cntr (1)
4242 004574' 000400 010100
4243 004575' 000200 100000 MWORD <PUSH,ENA,CCOF,J=10> ; don't load cntr (2)
4244 004576' 000400 010100
4245 004577' 000300 440000 MWORD <LOOP,ENA,CCOF,J=44> ; loop to stk contents (3)
4246 004600' 000400 010320
4247
4248 ; Then do cntr = 22
4249
4250 004601' 010100 040000 MWORD <ADDR=101,JMAP,J=4> ; init PC (101)
4251 004602' 000000 000040
4252 004603' 000400 220000 MWORD <ADDR=4,PUSH,J=22> ; load cntr with 22 (4)
4253 004604' 000000 000100
4254 004605' 000500 100000 MWORD <PUSH,ENA,CCOF,J=10> ; don't load cntr (5)
4255 004606' 000400 010100
4256 004607' 000600 100000 MWORD <PUSH,ENA,CCOF,J=10> ; don't load cntr (6)
4257 004610' 000400 010100
4258 004611' 000700 440000 MWORD <LOOP,ENA,CCOF,J=44> ; loop to stk contents (7)
4259 004612' 000400 010320
4260
4261 004613' 001000 100000 MWORD <JMAP,J=10> ; error if here (10)
4262 004614' 000000 000040
4263 004615' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 86
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0790
4264
4265 ;#********************************************************************
4266 ;* Test 46 - LOOP Instruction
4267 ;
4268 ; Description: Verify that the LOOP instruction does a continue
4269 ; to next instruction if TEST is asserted, and that
4270 ; register/counter contents are neither affected
4271 ; nor effect the LOOP instruction. Also, verify
4272 ; that a LOOP instruction pops the stack correctly.
4273 ;
4274 ; Procedure: Clear Port
4275 ; Load test microcode
4276 ; Set up RAR to start at location 100
4277 ; Set MPRUN/SINGLE STEP (execute JZ,5 PUSH's,LDCT)
4278 ; Set MPRUN/SINGLE STEP (execute LOOP,LOOP,LOOP)
4279 ; Set MPRUN/SINGLE STEP (execute JRP,CRTN)
4280 ; Read LAR, and verify address = 2
4281 ;
4282 ; Failure: ---
4283 ;#********************************************************************
4284
4285 ; Test data
4286
4287 004616' 254 00 0 00 004627' TSTS46: JRST TG46 ; go start test
4288 004617' 240401 000046 SEQ!MPROC!NDMP!ZSEQ!46 ; test mask
4289 004620' 004655' 011135' T46M,,[ASCIZ ^LOOP Instruction^]
4290 004621' 010442' 010517' [EXP MLAST!M7],,[EXP M16,M9,M1,MLAST!M8]
4291 004622' 000000 004712' TSTS47 ; failure test table
4292 004623' 000000 005002' TSTS50 ; ...
4293 004624' 000000 005366' TSTS51
4294 004625' 000000 005456' TSTS52
4295 004626' 777777 777777 -1
4296
4297 ; Start test
4298
4299 004627' 201 00 0 00 000000' TG46: MOVEI Z3 ; get address of module start
4300 004630' 260 17 0 00 004541* GO TRACE ; handle trace output
4301 004631' 201 01 0 00 004655' MOVEI 1,T46M ; set up microcode address
4302 004632' 260 17 0 00 004543* GO TLOAD ; load/verify it
4303 004633' 263 17 0 00 000000 RTN ; failed - exit test
4304
4305 ; Initialization
4306
4307 004634' 260 17 0 00 004545* TL46: GO IPACLR ; clear port
4308 004635' 402 00 0 00 004546* SETZM TSTSUB ; initialize subtest number
4309 004636' 201 06 0 00 004651' MOVEI 6,TS46 ; get sstep table address
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 87
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0791
4310
4311 ; Loop on single step table entries
4312
4313 004637' 400 15 0 00 000000 TA46: SETZ ERFLG, ; clear error flag
4314 004640' 260 17 0 00 004551* GO SEXEC ; execute table entry
4315 004641' 254 00 0 00 004650' JRST TX46 ; end of sstep table
4316 004642' 254 00 0 00 004637' JRST TA46 ; keep looping after call
4317 004643' 474 15 0 00 000000 SETO ERFLG, ; error - end address incorrect
4318
4319 ; Handle error printouts and scope looping
4320
4321 004644' 027 00 0 00 004653' SCOPER MA46 ; print error message
4322 004645' 254 00 0 00 004634' JRST TL46 ; loop on error
4323 004646' 254 00 0 00 004650' JRST TX46 ; altmode exit
4324 004647' 322 15 0 00 004637' JUMPE ERFLG,TA46 ; do next sstep table entry
4325
4326 ; End of test
4327
4328 004650' 263 17 0 00 000000 TX46: RTN ; return
4329
4330 ; Single step table, as: (CMD,#Steps,Start addr,End Addr)
4331
4332 004651' 101401 000002 TS46: STABLE (SSSTRT,^D12,100,2)
4333 004652' 000000 000000 STABLE (SSLAST)
4334
4335 ; Error messages
4336
4337 004653' 140000 011151' MA46: MSG!TXNOT![ASCIZ /LOOP broken/]
4338 004654' 000000000000# LAST!CALL!TXALL!SSPNT ; print sequencer data
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 88
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0792
4339
4340 ; Test microcode
4341
4342 004655' 000000 000000 T46M: MWORD <ADDR=0,PUSH> ; push 1 onto stack (0)
4343 004656' 000000 000100
4344 004657' 000100 000000 MWORD <PUSH> ; push 2 onto stack (1)
4345 004660' 000000 000100
4346 004661' 000200 000000 MWORD <PUSH> ; push 3 onto stack (2)
4347 004662' 000000 000100
4348 004663' 000300 000000 MWORD <PUSH> ; push 4 onto stack (3)
4349 004664' 000000 000100
4350 004665' 000400 000000 MWORD <PUSH> ; push 5 onto stack (4)
4351 004666' 000000 000100
4352 004667' 000501 010000 MWORD <LDCT,J=101> ; load counter (5)
4353 004670' 000000 000300
4354 004671' 000600 770000 MWORD <LOOP,DISA,CCOF,J=77> ; disa/off (6)
4355 004672' 000000 010320
4356 004673' 000700 770000 MWORD <LOOP,DISA,CCON,J=77> ; disa/on (7)
4357 004674' 000000 030320
4358 004675' 001000 770000 MWORD <LOOP,ENA,CCON,J=77> ; ena/on (10)
4359 004676' 000400 030320
4360 004677' 001100 120000 MWORD <JRP,ENA,CCOF,J=12> ; go to cntr addr (101) (11)
4361 004700' 000400 010160
4362 004701' 001200 150000 MWORD <JMAP,J=15> ; error if here (12)
4363 004702' 000000 000040
4364
4365 004703' 007700 770000 MWORD <ADDR=77,JMAP,J=77> ; error if here (77)
4366 004704' 000000 000040
4367 004705' 010000 000000 MWORD <JZ> ; initialize stack (100)
4368 004706' 000000 000000
4369 004707' 010100 000000 MWORD <CRTN> ; return to (101)
4370 004710' 000000 000240
4371 004711' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 89
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0793
4372
4373 ;#********************************************************************
4374 ;* Test 47 - LOOP Instruction
4375 ;
4376 ; Description: Verify that the LOOP instruction does not pop the
4377 ; stack if TEST is negated.
4378 ;
4379 ; Procedure: Clear Port
4380 ; Load test microcode
4381 ; Set up RAR to start at location 100
4382 ; Set MPRUN/SINGLE STEP (execute JZ,4 PUSH's)
4383 ; Set MPRUN/SINGLE STEP (execute LDCT,PUSH)
4384 ; Set MPRUN/SINGLE STEP (execute RPCT,LOOP 3 times)
4385 ; Set MPRUN/SINGLE STEP (execute RPCT,JMAP,CRTN)
4386 ; Read LAR, and verify address = 6
4387 ;
4388 ; Failure: ---
4389 ;#********************************************************************
4390
4391 ; Test data
4392
4393 004712' 254 00 0 00 004723' TSTS47: JRST TG47 ; go start test
4394 004713' 240401 000047 SEQ!MPROC!NDMP!ZSEQ!47 ; test mask
4395 004714' 004751' 011135' T47M,,[ASCIZ ^LOOP Instruction^]
4396 004715' 010442' 010517' [EXP MLAST!M7],,[EXP M16,M9,M1,MLAST!M8]
4397 004716' 000000 005002' TSTS50 ; failure test table
4398 004717' 000000 005366' TSTS51 ; ...
4399 004720' 000000 005456' TSTS52
4400 004721' 000000 005653' TSTS53
4401 004722' 777777 777777 -1
4402
4403 ; Start test
4404
4405 004723' 201 00 0 00 000000' TG47: MOVEI Z3 ; get address of module start
4406 004724' 260 17 0 00 004630* GO TRACE ; handle trace output
4407 004725' 201 01 0 00 004751' MOVEI 1,T47M ; set up microcode address
4408 004726' 260 17 0 00 004632* GO TLOAD ; load/verify it
4409 004727' 263 17 0 00 000000 RTN ; failed - exit test
4410
4411 ; Initialization
4412
4413 004730' 260 17 0 00 004634* TL47: GO IPACLR ; clear port
4414 004731' 402 00 0 00 004635* SETZM TSTSUB ; initialize subtest number
4415 004732' 201 06 0 00 004745' MOVEI 6,TS47 ; get sstep table address
4416
4417 ; Loop on single step table entries
4418
4419 004733' 400 15 0 00 000000 TA47: SETZ ERFLG, ; clear error flag
4420 004734' 260 17 0 00 004640* GO SEXEC ; execute table entry
4421 004735' 254 00 0 00 004744' JRST TX47 ; end of sstep table
4422 004736' 254 00 0 00 004733' JRST TA47 ; keep looping after call
4423 004737' 474 15 0 00 000000 SETO ERFLG, ; error - end address incorrect
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 90
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0794
4424
4425 ; Handle error printouts and scope looping
4426
4427 004740' 027 00 0 00 004747' SCOPER MA47 ; print error message
4428 004741' 254 00 0 00 004730' JRST TL47 ; loop on error
4429 004742' 254 00 0 00 004744' JRST TX47 ; altmode exit
4430 004743' 322 15 0 00 004733' JUMPE ERFLG,TA47 ; do next sstep table entry
4431
4432 ; End of test
4433
4434 004744' 263 17 0 00 000000 TX47: RTN ; return
4435
4436 ; Single step table, as: (CMD,#Steps,Start addr,End Addr)
4437
4438 004745' 102001 000006 TS47: STABLE (SSSTRT,^D16,100,6)
4439 004746' 000000 000000 STABLE (SSLAST)
4440
4441 ; Error messages
4442
4443 004747' 140000 011154' MA47: MSG!TXNOT![ASCIZ /LOOP affected the stack when it shouldn't have/]
4444 004750' 000000000000# LAST!CALL!TXALL!SSPNT ; print sequencer data
4445
4446 ; Test microcode
4447
4448 004751' 000000 000000 T47M: MWORD <ADDR=0,PUSH> ; push 1 onto stack (0)
4449 004752' 000000 000100
4450 004753' 000100 000000 MWORD <PUSH> ; push 2 onto stack (1)
4451 004754' 000000 000100
4452 004755' 000200 000000 MWORD <PUSH> ; push 3 onto stack (2)
4453 004756' 000000 000100
4454 004757' 000300 000000 MWORD <PUSH> ; push 4 onto stack (3)
4455 004760' 000000 000100
4456 004761' 000400 030000 MWORD <LDCT,J=3> ; load loop count (4)
4457 004762' 000000 000300
4458 004763' 000500 000000 MWORD <PUSH,ENA,CCOF> ; push 6 onto stack (5)
4459 004764' 000400 010100
4460 004765' 000600 100000 MWORD <RPCT,J=10> ; count down, go to 7 (6)
4461 004766' 000000 000220
4462 004767' 000700 200000 MWORD <JMAP,J=20> ; get out of loop (7)
4463 004770' 000000 000040
4464 004771' 001000 440000 MWORD <LOOP,ENA,CCOF,J=44> ; ena/off (10)
4465 004772' 000400 010320
4466 004773' 001100 110000 MWORD <JMAP,J=11> ; error if here (11)
4467 004774' 000000 000040
4468
4469 004775' 002000 000000 MWORD <ADDR=20,CRTN> ; return to 6 (20)
4470 004776' 000000 000240
4471
4472 004777' 010000 000000 MWORD <ADDR=100,JZ> ; initialize stack (100)
4473 005000' 000000 000000
4474 005001' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 91
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0795
4475
4476 ;#********************************************************************
4477 ;* Test 50 - RFCT Instruction
4478 ;
4479 ; Description: Verify that the RFCT instruction causes a jump to
4480 ; the address specified at top of stack if the
4481 ; counter is not = 0.
4482 ;
4483 ; Procedure: Clear Port
4484 ; Load test microcode
4485 ; Set up RAR to start at location 333
4486 ; Set MPRUN/SINGLE STEP (Execute JZ)
4487 ; Repeat for each data pattern (12 of them,
4488 ; floating 1's): Execute 4(LDCT,CJS,RFCT)
4489 ; Read LAR, and verify address = 74
4490 ;
4491 ; Failure: ---
4492 ;#********************************************************************
4493
4494 ; Test data
4495
4496 005002' 254 00 0 00 005013' TSTS50: JRST TG50 ; go start test
4497 005003' 240401 000050 SEQ!MPROC!NDMP!ZSEQ!50 ; test mask
4498 005004' 005041' 011166' T50M,,[ASCIZ ^RFCT Instruction^]
4499 005005' 010442' 010517' [EXP MLAST!M7],,[EXP M16,M9,M1,MLAST!M8]
4500 005006' 000000 005366' TSTS51 ; failure test table
4501 005007' 000000 005456' TSTS52 ; ...
4502 005010' 000000 005653' TSTS53
4503 005011' 000000 006275' TSTS54
4504 005012' 777777 777777 -1
4505
4506 ; Start test
4507
4508 005013' 201 00 0 00 000000' TG50: MOVEI Z3 ; get address of module start
4509 005014' 260 17 0 00 004724* GO TRACE ; handle trace output
4510 005015' 201 01 0 00 005041' MOVEI 1,T50M ; set up microcode address
4511 005016' 260 17 0 00 004726* GO TLOAD ; load/verify it
4512 005017' 263 17 0 00 000000 RTN ; failed - exit test
4513
4514 ; Initialization
4515
4516 005020' 260 17 0 00 004730* TL50: GO IPACLR ; clear port
4517 005021' 402 00 0 00 004731* SETZM TSTSUB ; initialize subtest number
4518 005022' 201 06 0 00 005035' MOVEI 6,TS50 ; get sstep table address
4519
4520 ; Loop on single step table entries
4521
4522 005023' 400 15 0 00 000000 TA50: SETZ ERFLG, ; clear error flag
4523 005024' 260 17 0 00 004734* GO SEXEC ; execute table entry
4524 005025' 254 00 0 00 005034' JRST TX50 ; end of sstep table
4525 005026' 254 00 0 00 005023' JRST TA50 ; keep looping after call
4526 005027' 474 15 0 00 000000 SETO ERFLG, ; error - end address incorrect
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 92
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0796
4527
4528 ; Handle error printouts and scope looping
4529
4530 005030' 027 00 0 00 005037' SCOPER MA50 ; print error message
4531 005031' 254 00 0 00 005020' JRST TL50 ; loop on error
4532 005032' 254 00 0 00 005034' JRST TX50 ; altmode exit
4533 005033' 322 15 0 00 005023' JUMPE ERFLG,TA50 ; do next sstep table entry
4534
4535 ; End of test
4536
4537 005034' 263 17 0 00 000000 TX50: RTN ; return
4538
4539 ; Single step table, as: (CMD,#Steps,Start addr,End Addr)
4540
4541 005035' 122103 330140 TS50: STABLE (SSSTRT,^D145,333,140)
4542 005036' 000000 000000 STABLE (SSLAST)
4543
4544 ; Error messages
4545
4546 005037' 140000 011172' MA50: MSG!TXNOT![ASCIZ /RFCT did not dispatch to stack address/]
4547 005040' 000000000000# LAST!CALL!TXALL!SSPNT ; print sequencer data
4548
4549 ; Test microcode
4550
4551 005041' 033300 000000 T50M: MWORD <ADDR=333,JZ> ; init PC (333)
4552 005042' 000000 000000
4553
4554 005043' 000000 010000 MWORD <ADDR=0,LDCT,J=1> ; load counter (0)
4555 005044' 000000 000300
4556 005045' 000110 000000 MWORD <CJS,J=1000> ; push/gosub (1)
4557 005046' 000000 000020
4558 005047' 000200 010000 MWORD <LDCT,J=1> ; load counter (2)
4559 005050' 000000 000300
4560 005051' 000310 020000 MWORD <CJS,J=1002> ; push/gosub (3)
4561 005052' 000000 000020
4562 005053' 000400 010000 MWORD <LDCT,J=1> ; load counter (4)
4563 005054' 000000 000300
4564 005055' 000510 040000 MWORD <CJS,J=1004> ; push/gosub (5)
4565 005056' 000000 000020
4566 005057' 000600 010000 MWORD <LDCT,J=1> ; load counter (6)
4567 005060' 000000 000300
4568 005061' 000710 060000 MWORD <CJS,J=1006> ; push/gosub (7)
4569 005062' 000000 000020
4570
4571 005063' 001000 020000 MWORD <LDCT,J=2> ; load counter (10)
4572 005064' 000000 000300
4573 005065' 001110 000000 MWORD <CJS,J=1000> ; push/gosub (11)
4574 005066' 000000 000020
4575 005067' 001200 020000 MWORD <LDCT,J=2> ; load counter (12)
4576 005070' 000000 000300
4577 005071' 001310 020000 MWORD <CJS,J=1002> ; push/gosub (13)
4578 005072' 000000 000020
4579 005073' 001400 020000 MWORD <LDCT,J=2> ; load counter (14)
4580 005074' 000000 000300
4581 005075' 001510 040000 MWORD <CJS,J=1004> ; push/gosub (15)
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 92-1
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0797
4582 005076' 000000 000020
4583 005077' 001600 020000 MWORD <LDCT,J=2> ; load counter (16)
4584 005100' 000000 000300
4585 005101' 001710 060000 MWORD <CJS,J=1006> ; push/gosub (17)
4586 005102' 000000 000020
4587
4588 005103' 002000 040000 MWORD <LDCT,J=4> ; load counter (20)
4589 005104' 000000 000300
4590 005105' 002110 000000 MWORD <CJS,J=1000> ; push/gosub (21)
4591 005106' 000000 000020
4592 005107' 002200 040000 MWORD <LDCT,J=4> ; load counter (22)
4593 005110' 000000 000300
4594 005111' 002310 020000 MWORD <CJS,J=1002> ; push/gosub (23)
4595 005112' 000000 000020
4596 005113' 002400 040000 MWORD <LDCT,J=4> ; load counter (24)
4597 005114' 000000 000300
4598 005115' 002510 040000 MWORD <CJS,J=1004> ; push/gosub (25)
4599 005116' 000000 000020
4600 005117' 002600 040000 MWORD <LDCT,J=4> ; load counter (26)
4601 005120' 000000 000300
4602 005121' 002710 060000 MWORD <CJS,J=1006> ; push/gosub (27)
4603 005122' 000000 000020
4604
4605 005123' 003000 100000 MWORD <LDCT,J=10> ; load counter (30)
4606 005124' 000000 000300
4607 005125' 003110 000000 MWORD <CJS,J=1000> ; push/gosub (31)
4608 005126' 000000 000020
4609 005127' 003200 100000 MWORD <LDCT,J=10> ; load counter (32)
4610 005130' 000000 000300
4611 005131' 003310 020000 MWORD <CJS,J=1002> ; push/gosub (33)
4612 005132' 000000 000020
4613 005133' 003400 100000 MWORD <LDCT,J=10> ; load counter (34)
4614 005134' 000000 000300
4615 005135' 003510 040000 MWORD <CJS,J=1004> ; push/gosub (35)
4616 005136' 000000 000020
4617 005137' 003600 100000 MWORD <LDCT,J=10> ; load counter (36)
4618 005140' 000000 000300
4619 005141' 003710 060000 MWORD <CJS,J=1006> ; push/gosub (37)
4620 005142' 000000 000020
4621
4622 005143' 004000 200000 MWORD <LDCT,J=20> ; load counter (40)
4623 005144' 000000 000300
4624 005145' 004110 000000 MWORD <CJS,J=1000> ; push/gosub (41)
4625 005146' 000000 000020
4626 005147' 004200 200000 MWORD <LDCT,J=20> ; load counter (42)
4627 005150' 000000 000300
4628 005151' 004310 020000 MWORD <CJS,J=1002> ; push/gosub (43)
4629 005152' 000000 000020
4630 005153' 004400 200000 MWORD <LDCT,J=20> ; load counter (44)
4631 005154' 000000 000300
4632 005155' 004510 040000 MWORD <CJS,J=1004> ; push/gosub (45)
4633 005156' 000000 000020
4634 005157' 004600 200000 MWORD <LDCT,J=20> ; load counter (46)
4635 005160' 000000 000300
4636 005161' 004710 060000 MWORD <CJS,J=1006> ; push/gosub (47)
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 92-2
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0798
4637 005162' 000000 000020
4638
4639 005163' 005000 400000 MWORD <LDCT,J=40> ; load counter (50)
4640 005164' 000000 000300
4641 005165' 005110 000000 MWORD <CJS,J=1000> ; push/gosub (51)
4642 005166' 000000 000020
4643 005167' 005200 400000 MWORD <LDCT,J=40> ; load counter (52)
4644 005170' 000000 000300
4645 005171' 005310 020000 MWORD <CJS,J=1002> ; push/gosub (53)
4646 005172' 000000 000020
4647 005173' 005400 400000 MWORD <LDCT,J=40> ; load counter (54)
4648 005174' 000000 000300
4649 005175' 005510 040000 MWORD <CJS,J=1004> ; push/gosub (55)
4650 005176' 000000 000020
4651 005177' 005600 400000 MWORD <LDCT,J=40> ; load counter (56)
4652 005200' 000000 000300
4653 005201' 005710 060000 MWORD <CJS,J=1006> ; push/gosub (57)
4654 005202' 000000 000020
4655
4656 005203' 006001 000000 MWORD <LDCT,J=100> ; load counter (60)
4657 005204' 000000 000300
4658 005205' 006110 000000 MWORD <CJS,J=1000> ; push/gosub (61)
4659 005206' 000000 000020
4660 005207' 006201 000000 MWORD <LDCT,J=100> ; load counter (62)
4661 005210' 000000 000300
4662 005211' 006310 020000 MWORD <CJS,J=1002> ; push/gosub (63)
4663 005212' 000000 000020
4664 005213' 006401 000000 MWORD <LDCT,J=100> ; load counter (64)
4665 005214' 000000 000300
4666 005215' 006510 040000 MWORD <CJS,J=1004> ; push/gosub (65)
4667 005216' 000000 000020
4668 005217' 006601 000000 MWORD <LDCT,J=100> ; load counter (66)
4669 005220' 000000 000300
4670 005221' 006710 060000 MWORD <CJS,J=1006> ; push/gosub (67)
4671 005222' 000000 000020
4672
4673 005223' 007002 000000 MWORD <LDCT,J=200> ; load counter (70)
4674 005224' 000000 000300
4675 005225' 007110 000000 MWORD <CJS,J=1000> ; push/gosub (71)
4676 005226' 000000 000020
4677 005227' 007202 000000 MWORD <LDCT,J=200> ; load counter (72)
4678 005230' 000000 000300
4679 005231' 007310 020000 MWORD <CJS,J=1002> ; push/gosub (73)
4680 005232' 000000 000020
4681 005233' 007402 000000 MWORD <LDCT,J=200> ; load counter (74)
4682 005234' 000000 000300
4683 005235' 007510 040000 MWORD <CJS,J=1004> ; push/gosub (75)
4684 005236' 000000 000020
4685 005237' 007602 000000 MWORD <LDCT,J=200> ; load counter (76)
4686 005240' 000000 000300
4687 005241' 007710 060000 MWORD <CJS,J=1006> ; push/gosub (77)
4688 005242' 000000 000020
4689
4690 005243' 010004 000000 MWORD <LDCT,J=400> ; load counter (100)
4691 005244' 000000 000300
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 92-3
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0799
4692 005245' 010110 000000 MWORD <CJS,J=1000> ; push/gosub (101)
4693 005246' 000000 000020
4694 005247' 010204 000000 MWORD <LDCT,J=400> ; load counter (102)
4695 005250' 000000 000300
4696 005251' 010310 020000 MWORD <CJS,J=1002> ; push/gosub (103)
4697 005252' 000000 000020
4698 005253' 010404 000000 MWORD <LDCT,J=400> ; load counter (104)
4699 005254' 000000 000300
4700 005255' 010510 040000 MWORD <CJS,J=1004> ; push/gosub (105)
4701 005256' 000000 000020
4702 005257' 010604 000000 MWORD <LDCT,J=400> ; load counter (106)
4703 005260' 000000 000300
4704 005261' 010710 060000 MWORD <CJS,J=1006> ; push/gosub (107)
4705 005262' 000000 000020
4706
4707 005263' 011010 000000 MWORD <LDCT,J=1000> ; load counter (110)
4708 005264' 000000 000300
4709 005265' 011110 000000 MWORD <CJS,J=1000> ; push/gosub (111)
4710 005266' 000000 000020
4711 005267' 011210 000000 MWORD <LDCT,J=1000> ; load counter (112)
4712 005270' 000000 000300
4713 005271' 011310 020000 MWORD <CJS,J=1002> ; push/gosub (113)
4714 005272' 000000 000020
4715 005273' 011410 000000 MWORD <LDCT,J=1000> ; load counter (114)
4716 005274' 000000 000300
4717 005275' 011510 040000 MWORD <CJS,J=1004> ; push/gosub (115)
4718 005276' 000000 000020
4719 005277' 011610 000000 MWORD <LDCT,J=1000> ; load counter (116)
4720 005300' 000000 000300
4721 005301' 011710 060000 MWORD <CJS,J=1006> ; push/gosub (117)
4722 005302' 000000 000020
4723
4724 005303' 012020 000000 MWORD <LDCT,J=2000> ; load counter (120)
4725 005304' 000000 000300
4726 005305' 012110 000000 MWORD <CJS,J=1000> ; push/gosub (121)
4727 005306' 000000 000020
4728 005307' 012220 000000 MWORD <LDCT,J=2000> ; load counter (122)
4729 005310' 000000 000300
4730 005311' 012310 020000 MWORD <CJS,J=1002> ; push/gosub (123)
4731 005312' 000000 000020
4732 005313' 012420 000000 MWORD <LDCT,J=2000> ; load counter (124)
4733 005314' 000000 000300
4734 005315' 012510 040000 MWORD <CJS,J=1004> ; push/gosub (125)
4735 005316' 000000 000020
4736 005317' 012620 000000 MWORD <LDCT,J=2000> ; load counter (126)
4737 005320' 000000 000300
4738 005321' 012710 060000 MWORD <CJS,J=1006> ; push/gosub (127)
4739 005322' 000000 000020
4740
4741 005323' 013040 000000 MWORD <LDCT,J=4000> ; load counter (130)
4742 005324' 000000 000300
4743 005325' 013110 000000 MWORD <CJS,J=1000> ; push/gosub (131)
4744 005326' 000000 000020
4745 005327' 013240 000000 MWORD <LDCT,J=4000> ; load counter (132)
4746 005330' 000000 000300
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 92-4
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0800
4747 005331' 013310 020000 MWORD <CJS,J=1002> ; push/gosub (133)
4748 005332' 000000 000020
4749 005333' 013440 000000 MWORD <LDCT,J=4000> ; load counter (134)
4750 005334' 000000 000300
4751 005335' 013510 040000 MWORD <CJS,J=1004> ; push/gosub (135)
4752 005336' 000000 000020
4753 005337' 013640 000000 MWORD <LDCT,J=4000> ; load counter (136)
4754 005340' 000000 000300
4755 005341' 013710 060000 MWORD <CJS,J=1006> ; push/gosub (137)
4756 005342' 000000 000020
4757
4758 005343' 077707 770000 MWORD <ADDR=777,JMAP,J=777> ; error if here (777)
4759 005344' 000000 000040
4760 005345' 100007 770000 MWORD <ADDR=1000,RFCT,DISA,CCOF,J=777>; return to stk addr (1000)
4761 005346' 000000 010200
4762 005347' 100110 010000 MWORD <JMAP,J=1001> ; error if here (1001)
4763 005350' 000000 000040
4764 005351' 100207 770000 MWORD <RFCT,DISA,CCON,J=777> ; return to stack addr (1002)
4765 005352' 000000 030200
4766 005353' 100310 030000 MWORD <JMAP,J=1003> ; error if here (1003)
4767 005354' 000000 000040
4768 005355' 100407 770000 MWORD <RFCT,ENA,CCOF,J=777> ; return to stack addr (1004)
4769 005356' 000400 010200
4770 005357' 100510 050000 MWORD <JMAP,J=1005> ; error if here (1005)
4771 005360' 000000 000040
4772 005361' 100607 770000 MWORD <RFCT,ENA,CCON,J=777> ; return to stack addr (1006)
4773 005362' 000400 030200
4774 005363' 100710 070000 MWORD <JMAP,J=1007> ; error if here (1007)
4775 005364' 000000 000040
4776 005365' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 93
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0801
4777
4778 ;#********************************************************************
4779 ;* Test 51 - RFCT Instruction
4780 ;
4781 ; Description: Verify that the RFCT instruction continues to the
4782 ; next instruction if the counter = 0. Also, verify
4783 ; that the stack is popped with each RFCT.
4784 ;
4785 ; Procedure: Clear Port
4786 ; Load test microcode
4787 ; Set up RAR to start at location 100
4788 ; Set MPRUN/SINGLE STEP (execute JZ,5 PUSH's)
4789 ; Set MPRUN/SINGLE STEP (execute 4 RFCT's,CRTN)
4790 ; Read LAR, and verify address = 1
4791 ;
4792 ; Failure: ---
4793 ;#********************************************************************
4794
4795 ; Test data
4796
4797 005366' 254 00 0 00 005377' TSTS51: JRST TG51 ; go start test
4798 005367' 240401 000051 SEQ!MPROC!NDMP!ZSEQ!51 ; test mask
4799 005370' 005425' 011166' T51M,,[ASCIZ ^RFCT Instruction^]
4800 005371' 010442' 010517' [EXP MLAST!M7],,[EXP M16,M9,M1,MLAST!M8]
4801 005372' 000000 005456' TSTS52 ; failure test table
4802 005373' 000000 005653' TSTS53 ; ...
4803 005374' 000000 006275' TSTS54
4804 005375' 000000 006377' TSTS55
4805 005376' 777777 777777 -1
4806
4807 ; Start test
4808
4809 005377' 201 00 0 00 000000' TG51: MOVEI Z3 ; get address of module start
4810 005400' 260 17 0 00 005014* GO TRACE ; handle trace output
4811 005401' 201 01 0 00 005425' MOVEI 1,T51M ; set up microcode address
4812 005402' 260 17 0 00 005016* GO TLOAD ; load/verify it
4813 005403' 263 17 0 00 000000 RTN ; failed - exit test
4814
4815 ; Initialization
4816
4817 005404' 260 17 0 00 005020* TL51: GO IPACLR ; clear port
4818 005405' 402 00 0 00 005021* SETZM TSTSUB ; initialize subtest number
4819 005406' 201 06 0 00 005421' MOVEI 6,TS51 ; get sstep table address
4820
4821 ; Loop on single step table entries
4822
4823 005407' 400 15 0 00 000000 TA51: SETZ ERFLG, ; clear error flag
4824 005410' 260 17 0 00 005024* GO SEXEC ; execute table entry
4825 005411' 254 00 0 00 005420' JRST TX51 ; end of sstep table
4826 005412' 254 00 0 00 005407' JRST TA51 ; keep looping after call
4827 005413' 474 15 0 00 000000 SETO ERFLG, ; error - end address incorrect
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 94
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0802
4828
4829 ; Handle error printouts and scope looping
4830
4831 005414' 027 00 0 00 005423' SCOPER MA51 ; print error message
4832 005415' 254 00 0 00 005404' JRST TL51 ; loop on error
4833 005416' 254 00 0 00 005420' JRST TX51 ; altmode exit
4834 005417' 322 15 0 00 005407' JUMPE ERFLG,TA51 ; do next sstep table entry
4835
4836 ; End of test
4837
4838 005420' 263 17 0 00 000000 TX51: RTN ; return
4839
4840 ; Single step table, as: (CMD,#Steps,Start addr,End Addr)
4841
4842 005421' 101301 000001 TS51: STABLE (SSSTRT,^D11,100,1)
4843 005422' 000000 000000 STABLE (SSLAST)
4844
4845 ; Error messages
4846
4847 005423' 140000 011202' MA51: MSG!TXNOT![ASCIZ /RFCT not continuing at PC+1 or not popping stack/]
4848 005424' 000000000000# LAST!CALL!TXALL!SSPNT ; print sequencer data
4849
4850 ; Test microcode
4851
4852 005425' 000000 000000 T51M: MWORD <ADDR=0,PUSH> ; push 1 onto stack (0)
4853 005426' 000000 000100
4854 005427' 000100 000000 MWORD <PUSH> ; push 2 onto stack (1)
4855 005430' 000000 000100
4856 005431' 000200 000000 MWORD <PUSH> ; push 3 onto stack (2)
4857 005432' 000000 000100
4858 005433' 000300 000000 MWORD <PUSH> ; push 4 onto stack (3)
4859 005434' 000000 000100
4860 005435' 000400 000000 MWORD <PUSH,J=0> ; push 5/zero cntr (4)
4861 005436' 000000 000100
4862 005437' 000500 770000 MWORD <RFCT,DISA,CCOF,J=77> ; continue to 2 (5)
4863 005440' 000000 010200
4864 005441' 000600 770000 MWORD <RFCT,DISA,CCON,J=77> ; continue to 3 (6)
4865 005442' 000000 030200
4866 005443' 000700 770000 MWORD <RFCT,ENA,CCOF,J=77> ; continue to 4 (7)
4867 005444' 000400 010200
4868 005445' 001000 770000 MWORD <RFCT,ENA,CCON,J=77> ; continue to 5 (10)
4869 005446' 000400 030200
4870 005447' 001100 000000 MWORD <CRTN> ; return to 1 (11)
4871 005450' 000000 000240
4872 005451' 007700 770000 MWORD <ADDR=77,JMAP,J=77> ; (77)
4873 005452' 000000 000040
4874 005453' 010000 000000 MWORD <JZ> ; initialize stack (100)
4875 005454' 000000 000000
4876 005455' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 95
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0803
4877
4878 ;#********************************************************************
4879 ;* Test 52 - RFCT Instruction
4880 ;
4881 ; Description: Verify that the RFCT instruction does not pop the
4882 ; stack if the counter is nonzero.
4883 ;
4884 ; Procedure: Clear Port
4885 ; Load test microcode
4886 ; Set up RAR to start at location 0
4887 ; Set MPRUN/SINGLE STEP (execute JMAP,PUSH,PUSH)
4888 ; Set MPRUN/SINGLE STEP (execute CJS,RFCT,CRTN)
4889 ; Read LAR, and verify address = 4
4890 ;
4891 ; Set up RAR to start at location 5
4892 ; Set MPRUN/SINGLE STEP (execute JMAP,PUSH,PUSH)
4893 ; Set MPRUN/SINGLE STEP (execute CJS,RFCT,CRTN)
4894 ; Read LAR, and verify address = 11
4895 ;
4896 ; Set up RAR to start at location 12
4897 ; Set MPRUN/SINGLE STEP (execute JMAP,PUSH,PUSH)
4898 ; Set MPRUN/SINGLE STEP (execute CJS,RFCT,CRTN)
4899 ; Read LAR, and verify address = 16
4900 ;
4901 ; Set up RAR to start at location 17
4902 ; Set MPRUN/SINGLE STEP (execute JMAP,PUSH,PUSH)
4903 ; Set MPRUN/SINGLE STEP (execute CJS,RFCT,CRTN)
4904 ; Read LAR, and verify address = 23
4905 ;
4906 ; Failure: ---
4907 ;#********************************************************************
4908
4909 ; Test data
4910
4911 005456' 254 00 0 00 005467' TSTS52: JRST TG52 ; go start test
4912 005457' 240401 000052 SEQ!MPROC!NDMP!ZSEQ!52 ; test mask
4913 005460' 005520' 011166' T52M,,[ASCIZ ^RFCT Instruction^]
4914 005461' 010442' 010517' [EXP MLAST!M7],,[EXP M16,M9,M1,MLAST!M8]
4915 005462' 000000 005653' TSTS53 ; failure test table
4916 005463' 000000 006275' TSTS54 ; ...
4917 005464' 000000 006377' TSTS55
4918 005465' 000000 006707' TSTS56
4919 005466' 777777 777777 -1
4920
4921 ; Start test
4922
4923 005467' 201 00 0 00 000000' TG52: MOVEI Z3 ; get address of module start
4924 005470' 260 17 0 00 005400* GO TRACE ; handle trace output
4925 005471' 201 01 0 00 005520' MOVEI 1,T52M ; set up microcode address
4926 005472' 260 17 0 00 005402* GO TLOAD ; load/verify it
4927 005473' 263 17 0 00 000000 RTN ; failed - exit test
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 96
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0804
4928
4929 ; Initialization
4930
4931 005474' 260 17 0 00 005404* TL52: GO IPACLR ; clear port
4932 005475' 402 00 0 00 005405* SETZM TSTSUB ; initialize subtest number
4933 005476' 201 06 0 00 005511' MOVEI 6,TS52 ; get sstep table address
4934
4935 ; Loop on single step table entries
4936
4937 005477' 400 15 0 00 000000 TA52: SETZ ERFLG, ; clear error flag
4938 005500' 260 17 0 00 005410* GO SEXEC ; execute table entry
4939 005501' 254 00 0 00 005510' JRST TX52 ; end of sstep table
4940 005502' 254 00 0 00 005477' JRST TA52 ; keep looping after call
4941 005503' 474 15 0 00 000000 SETO ERFLG, ; error - end address incorrect
4942
4943 ; Handle error printouts and scope looping
4944
4945 005504' 027 00 0 00 005516' SCOPER MA52 ; print error message
4946 005505' 254 00 0 00 005474' JRST TL52 ; loop on error
4947 005506' 254 00 0 00 005510' JRST TX52 ; altmode exit
4948 005507' 322 15 0 00 005477' JUMPE ERFLG,TA52 ; do next sstep table entry
4949
4950 ; End of test
4951
4952 005510' 263 17 0 00 000000 TX52: RTN ; return
4953
4954 ; Single step table, as: (CMD,#Steps,Start addr,End Addr)
4955
4956 005511' 101300 000007 TS52: STABLE (SSSTRT,^D11,0,7)
4957 005512' 101300 200027 STABLE (SSSTRT,^D11,20,27)
4958 005513' 101300 400047 STABLE (SSSTRT,^D11,40,47)
4959 005514' 101300 600067 STABLE (SSSTRT,^D11,60,67)
4960 005515' 000000 000000 STABLE (SSLAST)
4961
4962 ; Error messages
4963
4964 005516' 140000 011214' MA52: MSG!TXNOT![ASCIZ /RFCT affected stack with cntr nonzero/]
4965 005517' 000000000000# LAST!CALL!TXALL!SSPNT ; print sequencer data
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 97
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0805
4966
4967 ; Test microcode
4968
4969 005520' 000000 010000 T52M: MWORD <ADDR=0,CJPP,J=1> ; pop stack (0)
4970 005521' 000000 000260
4971 005522' 000100 020000 MWORD <CJPP,J=2> ; pop stack (1)
4972 005523' 000000 000260
4973 005524' 000200 030000 MWORD <CJPP,J=3> ; pop stack (2)
4974 005525' 000000 000260
4975 005526' 000300 040000 MWORD <CJPP,J=4> ; pop stack (3)
4976 005527' 000000 000260
4977 005530' 000400 050000 MWORD <CJPP,J=5> ; pop stack (4)
4978 005531' 000000 000260
4979 005532' 000500 770000 MWORD <PUSH,J=77> ; push stack (5)
4980 005533' 000000 000100
4981 005534' 000600 770000 MWORD <PUSH,J=77> ; push stack (6)
4982 005535' 000000 000100
4983 005536' 000701 000000 MWORD <CJS,J=100> ; push/gosub (7)
4984 005537' 000000 000020
4985 005540' 001000 000000 MWORD <CRTN> ; return to 10 (10)
4986 005541' 000000 000240
4987
4988 005542' 002000 210000 MWORD <ADDR=20,CJPP,J=21> ; pop stack (20)
4989 005543' 000000 000260
4990 005544' 002100 220000 MWORD <CJPP,J=22> ; pop stack (21)
4991 005545' 000000 000260
4992 005546' 002200 230000 MWORD <CJPP,J=23> ; pop stack (22)
4993 005547' 000000 000260
4994 005550' 002300 240000 MWORD <CJPP,J=24> ; pop stack (23)
4995 005551' 000000 000260
4996 005552' 002400 250000 MWORD <CJPP,J=25> ; pop stack (24)
4997 005553' 000000 000260
4998 005554' 002500 770000 MWORD <PUSH,J=77> ; push stack (25)
4999 005555' 000000 000100
5000 005556' 002600 770000 MWORD <PUSH,J=77> ; push stack (26)
5001 005557' 000000 000100
5002 005560' 002701 020000 MWORD <CJS,J=102> ; push/gosub (27)
5003 005561' 000000 000020
5004 005562' 003000 000000 MWORD <CRTN> ; return to 20 (30)
5005 005563' 000000 000240
5006
5007 005564' 004000 410000 MWORD <ADDR=40,CJPP,J=41> ; pop stack (40)
5008 005565' 000000 000260
5009 005566' 004100 420000 MWORD <CJPP,J=42> ; pop stack (41)
5010 005567' 000000 000260
5011 005570' 004200 430000 MWORD <CJPP,J=43> ; pop stack (42)
5012 005571' 000000 000260
5013 005572' 004300 440000 MWORD <CJPP,J=44> ; pop stack (43)
5014 005573' 000000 000260
5015 005574' 004400 450000 MWORD <CJPP,J=45> ; pop stack (44)
5016 005575' 000000 000260
5017 005576' 004500 770000 MWORD <PUSH,J=77> ; push stack (45)
5018 005577' 000000 000100
5019 005600' 004600 770000 MWORD <PUSH,J=77> ; push stack (46)
5020 005601' 000000 000100
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 97-1
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0806
5021 005602' 004701 040000 MWORD <CJS,J=104> ; push/gosub (47)
5022 005603' 000000 000020
5023 005604' 005000 000000 MWORD <CRTN> ; return to 50 (50)
5024 005605' 000000 000240
5025
5026 005606' 006000 610000 MWORD <ADDR=60,CJPP,J=61> ; pop stack (60)
5027 005607' 000000 000260
5028 005610' 006100 620000 MWORD <CJPP,J=62> ; pop stack (61)
5029 005611' 000000 000260
5030 005612' 006200 630000 MWORD <CJPP,J=63> ; pop stack (62)
5031 005613' 000000 000260
5032 005614' 006300 640000 MWORD <CJPP,J=64> ; pop stack (63)
5033 005615' 000000 000260
5034 005616' 006400 650000 MWORD <CJPP,J=65> ; pop stack (64)
5035 005617' 000000 000260
5036 005620' 006500 770000 MWORD <PUSH,J=77> ; push stack (65)
5037 005621' 000000 000100
5038 005622' 006600 770000 MWORD <PUSH,J=77> ; push stack (66)
5039 005623' 000000 000100
5040 005624' 006701 060000 MWORD <CJS,J=106> ; push/gosub (67)
5041 005625' 000000 000020
5042 005626' 007000 000000 MWORD <CRTN> ; return to 70 (70)
5043 005627' 000000 000240
5044
5045 005630' 010000 770000 MWORD <ADDR=100,RFCT,DISA,CCOF,J=77> ; return to stack addr (100)
5046 005631' 000000 010200
5047 005632' 010101 010000 MWORD <JMAP,J=101> ; error if here (101)
5048 005633' 000000 000040
5049 005634' 010200 770000 MWORD <RFCT,DISA,CCON,J=77> ; return to stack addr (102)
5050 005635' 000000 030200
5051 005636' 010301 030000 MWORD <JMAP,J=103> ; error if here (103)
5052 005637' 000000 000040
5053 005640' 010400 770000 MWORD <RFCT,ENA,CCOF,J=77> ; return to stack addr (104)
5054 005641' 000400 010200
5055 005642' 010501 050000 MWORD <JMAP,J=105> ; error if here (105)
5056 005643' 000000 000040
5057 005644' 010600 770000 MWORD <RFCT,ENA,CCON,J=77> ; return to stack addr (106)
5058 005645' 000400 030200
5059 005646' 010701 070000 MWORD <JMAP,J=107> ; error if here (107)
5060 005647' 000000 000040
5061
5062 005650' 007700 770000 MWORD <ADDR=77,JMAP,J=77> ; error if here (77)
5063 005651' 000000 000040
5064 005652' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 98
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0807
5065
5066 ;#********************************************************************
5067 ;* Test 53 - RFCT Instruction
5068 ;
5069 ; Description: Verify that the RFCT instruction correctly
5070 ; decrements the counter if nonzero, regardless of
5071 ; the TEST inputs.
5072 ;
5073 ; Procedure: Clear Port
5074 ; Load test microcode (except location 50)
5075 ;
5076 ; Load location 50 with first contents
5077 ; Set up RAR to start at location 0, execute JMAP
5078 ; Set MPRUN/SINGLE STEP (execute 26 LDCT,CJS,RFCT,
5079 ; JRP,JMAP segments)
5080 ; Read LAR, and verify address = 616
5081 ;
5082 ; Load location 50 with the 2nd contents
5083 ; Set up RAR to start at location 0, execute JMAP
5084 ; Set MPRUN/SINGLE STEP (execute 26 LDCT,CJS,RFCT,
5085 ; JRP segments)
5086 ; Read LAR, and verify address = 616
5087 ;
5088 ; Load location 50 with the 3rd contents
5089 ; Set up RAR to start at location 0, execute JMAP
5090 ; Set MPRUN/SINGLE STEP (execute 26 LDCT,CJS,RFCT,
5091 ; JRP segments)
5092 ; Read LAR, and verify address = 616
5093 ;
5094 ; Load location 50 with the 4th contents
5095 ; Set up RAR to start at location 0, execute JMAP
5096 ; Set MPRUN/SINGLE STEP (execute 26 LDCT,CJS,RFCT,
5097 ; JRP segments)
5098 ; Read LAR, and verify address = 616
5099 ;
5100 ; Failure: ---
5101 ;#********************************************************************
5102
5103 ; Test data
5104
5105 005653' 254 00 0 00 005664' TSTS53: JRST TG53 ; go start test
5106 005654' 240401 000053 SEQ!MPROC!NDMP!ZSEQ!53 ; test mask
5107 005655' 005744' 011166' T53M,,[ASCIZ ^RFCT Instruction^]
5108 005656' 010442' 010517' [EXP MLAST!M7],,[EXP M16,M9,M1,MLAST!M8]
5109 005657' 000000 006275' TSTS54 ; failure test table
5110 005660' 000000 006377' TSTS55 ; ...
5111 005661' 000000 006707' TSTS56
5112 005662' 000000 006777' TSTS57
5113 005663' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 99
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0808
5114
5115 ; Start test
5116
5117 005664' 201 00 0 00 000000' TG53: MOVEI Z3 ; get address of module start
5118 005665' 260 17 0 00 005470* GO TRACE ; handle trace output
5119 005666' 201 01 0 00 005744' MOVEI 1,T53M ; set up microcode address
5120 005667' 260 17 0 00 005472* GO TLOAD ; load/verify it
5121 005670' 263 17 0 00 000000 RTN ; failed - exit test
5122
5123 ; Initialization
5124
5125 005671' 260 17 0 00 005474* TL53: GO IPACLR ; clear port
5126 005672' 402 00 0 00 005475* SETZM TSTSUB ; initialize subtest number
5127 005673' 201 06 0 00 005707' MOVEI 6,TS53 ; get sstep table address
5128 005674' 474 07 0 00 000000 SETO 7, ; initialize location 50 pointer
5129
5130 ; Loop on single step table entries
5131
5132 005675' 400 15 0 00 000000 TA53: SETZ ERFLG, ; clear error flag
5133 005676' 260 17 0 00 005500* GO SEXEC ; execute table entry
5134 005677' 254 00 0 00 005706' JRST TX53 ; end of sstep table
5135 005700' 254 00 0 00 005675' JRST TA53 ; keep looping after call
5136 005701' 474 15 0 00 000000 SETO ERFLG, ; error - end address incorrect
5137
5138 ; Handle error printouts and scope looping
5139
5140 005702' 027 00 0 00 005742' SCOPER MA53 ; print error message
5141 005703' 254 00 0 00 005671' JRST TL53 ; loop on error
5142 005704' 254 00 0 00 005706' JRST TX53 ; altmode exit
5143 005705' 322 15 0 00 005675' JUMPE ERFLG,TA53 ; do next sstep table entry
5144
5145 ; End of test
5146
5147 005706' 263 17 0 00 000000 TX53: RTN ; return
5148
5149 ; Single step table, as: (CMD,#Steps,Start addr,End Addr)
5150
5151 005707' 300000 005720' TS53: STABLE (SSCALL,T53LOD)
5152 005710' 120304 760616 STABLE (SSSTRT,^D131,476,616)
5153 005711' 300000 005720' STABLE (SSCALL,T53LOD)
5154 005712' 120304 760616 STABLE (SSSTRT,^D131,476,616)
5155 005713' 300000 005720' STABLE (SSCALL,T53LOD)
5156 005714' 120304 760616 STABLE (SSSTRT,^D131,476,616)
5157 005715' 300000 005720' STABLE (SSCALL,T53LOD)
5158 005716' 120304 760616 STABLE (SSSTRT,^D131,476,616)
5159 005717' 000000 000000 STABLE (SSLAST)
5160
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 100
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0809
5161
5162 ; Load location 50 with special microword
5163
5164 005720' 350 01 0 00 000007 T53LOD: AOS 1,7 ; increment/get offset pointer
5165 005721' 221 01 0 00 000003 IMULI 1,3 ; multiply by 2
5166 005722' 271 01 0 00 005726' ADDI 1,T53MM ; set up microcode address
5167 005723' 260 17 0 00 005667* GO TLOAD ; load/verify it
5168 005724' 255 00 0 00 000000 JFCL ; error - ignore
5169 005725' 263 17 0 00 000000 RTN ; exit
5170
5171 ; Special microcode for location 50
5172
5173 005726' 005000 510000 T53MM: MWORD <ADDR=50,RFCT,DISA,CCOF,J=51> ; decrement cntr (50)
5174 005727' 000000 010200
5175 005730' 777777 777777 -1
5176 005731' 005000 510000 MWORD <ADDR=50,RFCT,DISA,CCON,J=51> ; decrement cntr (50)
5177 005732' 000000 030200
5178 005733' 777777 777777 -1
5179 005734' 005000 510000 MWORD <ADDR=50,RFCT,ENA,CCOF,J=51> ; decrement cntr (50)
5180 005735' 000400 010200
5181 005736' 777777 777777 -1
5182 005737' 005000 510000 MWORD <ADDR=50,RFCT,ENA,CCON,J=51> ; decrement cntr (50)
5183 005740' 000400 030200
5184 005741' 777777 777777 -1
5185
5186 ; Error messages
5187
5188 005742' 140000 011224' MA53: MSG!TXNOT![ASCIZ /RFCT not decrementing cntr properly/]
5189 005743' 000000000000# LAST!CALL!TXALL!SSPNT ; print sequencer data
5190
5191 ; Test microcode
5192
5193 005744' 047605 000000 T53M: MWORD <ADDR=476,JMAP,J=500> ; init PC (476)
5194 005745' 000000 000040
5195 005746' 047704 770000 MWORD <ADDR=477,JMAP,J=477> ; error if here (477)
5196 005747' 000000 000040
5197
5198 005750' 050000 010000 MWORD <ADDR=500,LDCT,J=1> ; load counter (500)
5199 005751' 000000 000300
5200 005752' 050100 500000 MWORD <CJS,J=50> ; go decrement cntr (501)
5201 005753' 000000 000020
5202 005754' 050200 510000 MWORD <JRP,ENA,CCOF,J=51> ; go to cntr addr (502)
5203 005755' 000400 010160
5204
5205 005756' 050300 020000 MWORD <LDCT,J=2> ; load counter (503)
5206 005757' 000000 000300
5207 005760' 050400 500000 MWORD <CJS,J=50> ; go decrement cntr (504)
5208 005761' 000000 000020
5209 005762' 050500 510000 MWORD <JRP,ENA,CCOF,J=51> ; go to cntr addr (505)
5210 005763' 000400 010160
5211
5212 005764' 050600 040000 MWORD <LDCT,J=4> ; load counter (506)
5213 005765' 000000 000300
5214 005766' 050700 500000 MWORD <CJS,J=50> ; go decrement cntr (507)
5215 005767' 000000 000020
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 100-1
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0810
5216 005770' 051000 510000 MWORD <JRP,ENA,CCOF,J=51> ; go to cntr addr (510)
5217 005771' 000400 010160
5218
5219 005772' 051100 100000 MWORD <LDCT,J=10> ; load counter (511)
5220 005773' 000000 000300
5221 005774' 051200 500000 MWORD <CJS,J=50> ; go decrement cntr (512)
5222 005775' 000000 000020
5223 005776' 051300 510000 MWORD <JRP,ENA,CCOF,J=51> ; go to cntr addr (513)
5224 005777' 000400 010160
5225
5226 006000' 051400 200000 MWORD <LDCT,J=20> ; load counter (514)
5227 006001' 000000 000300
5228 006002' 051500 500000 MWORD <CJS,J=50> ; go decrement cntr (515)
5229 006003' 000000 000020
5230 006004' 051600 510000 MWORD <JRP,ENA,CCOF,J=51> ; go to cntr addr (516)
5231 006005' 000400 010160
5232
5233 006006' 051700 400000 MWORD <LDCT,J=40> ; load counter (517)
5234 006007' 000000 000300
5235 006010' 052000 500000 MWORD <CJS,J=50> ; go decrement cntr (520)
5236 006011' 000000 000020
5237 006012' 052100 510000 MWORD <JRP,ENA,CCOF,J=51> ; go to cntr addr (521)
5238 006013' 000400 010160
5239
5240 006014' 052201 000000 MWORD <LDCT,J=100> ; load counter (522)
5241 006015' 000000 000300
5242 006016' 052300 500000 MWORD <CJS,J=50> ; go decrement cntr (523)
5243 006017' 000000 000020
5244 006020' 052400 510000 MWORD <JRP,ENA,CCOF,J=51> ; go to cntr addr (524)
5245 006021' 000400 010160
5246
5247 006022' 052502 000000 MWORD <LDCT,J=200> ; load counter (525)
5248 006023' 000000 000300
5249 006024' 052600 500000 MWORD <CJS,J=50> ; go decrement cntr (526)
5250 006025' 000000 000020
5251 006026' 052700 510000 MWORD <JRP,ENA,CCOF,J=51> ; go to cntr addr (527)
5252 006027' 000400 010160
5253
5254 006030' 053004 000000 MWORD <LDCT,J=400> ; load counter (530)
5255 006031' 000000 000300
5256 006032' 053100 500000 MWORD <CJS,J=50> ; go decrement cntr (531)
5257 006033' 000000 000020
5258 006034' 053200 510000 MWORD <JRP,ENA,CCOF,J=51> ; go to cntr addr (532)
5259 006035' 000400 010160
5260
5261 006036' 053310 000000 MWORD <LDCT,J=1000> ; load counter (533)
5262 006037' 000000 000300
5263 006040' 053400 500000 MWORD <CJS,J=50> ; go decrement cntr (534)
5264 006041' 000000 000020
5265 006042' 053500 510000 MWORD <JRP,ENA,CCOF,J=51> ; go to cntr addr (535)
5266 006043' 000400 010160
5267
5268 006044' 053617 770000 MWORD <LDCT,J=1777> ; load counter (536)
5269 006045' 000000 000300
5270 006046' 053700 500000 MWORD <CJS,J=50> ; go decrement cntr (537)
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 100-2
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0811
5271 006047' 000000 000020
5272 006050' 054000 510000 MWORD <JRP,ENA,CCOF,J=51> ; go to cntr addr (540)
5273 006051' 000400 010160
5274
5275 006052' 054120 000000 MWORD <LDCT,J=2000> ; load counter (541)
5276 006053' 000000 000300
5277 006054' 054200 500000 MWORD <CJS,J=50> ; go decrement cntr (542)
5278 006055' 000000 000020
5279 006056' 054300 510000 MWORD <JRP,ENA,CCOF,J=51> ; go to cntr addr (543)
5280 006057' 000400 010160
5281
5282 006060' 054427 770000 MWORD <LDCT,J=2777> ; load counter (544)
5283 006061' 000000 000300
5284 006062' 054500 500000 MWORD <CJS,J=50> ; go decrement cntr (545)
5285 006063' 000000 000020
5286 006064' 054600 510000 MWORD <JRP,ENA,CCOF,J=51> ; go to cntr addr (546)
5287 006065' 000400 010160
5288
5289 006066' 054737 770000 MWORD <LDCT,J=3777> ; load counter (547)
5290 006067' 000000 000300
5291 006070' 055000 500000 MWORD <CJS,J=50> ; go decrement cntr (550)
5292 006071' 000000 000020
5293 006072' 055100 510000 MWORD <JRP,ENA,CCOF,J=51> ; go to cntr addr (551)
5294 006073' 000400 010160
5295
5296 006074' 055240 000000 MWORD <LDCT,J=4000> ; load counter (552)
5297 006075' 000000 000300
5298 006076' 055300 500000 MWORD <CJS,J=50> ; go decrement cntr (553)
5299 006077' 000000 000020
5300 006100' 055400 510000 MWORD <JRP,ENA,CCOF,J=51> ; go to cntr addr (554)
5301 006101' 000400 010160
5302
5303 006102' 055547 770000 MWORD <LDCT,J=4777> ; load counter (555)
5304 006103' 000000 000300
5305 006104' 055600 500000 MWORD <CJS,J=50> ; go decrement cntr (556)
5306 006105' 000000 000020
5307 006106' 055700 510000 MWORD <JRP,ENA,CCOF,J=51> ; go to cntr addr (557)
5308 006107' 000400 010160
5309
5310 006110' 056053 770000 MWORD <LDCT,J=5377> ; load counter (560)
5311 006111' 000000 000300
5312 006112' 056100 500000 MWORD <CJS,J=50> ; go decrement cntr (561)
5313 006113' 000000 000020
5314 006114' 056200 510000 MWORD <JRP,ENA,CCOF,J=51> ; go to cntr addr (562)
5315 006115' 000400 010160
5316
5317 006116' 056355 770000 MWORD <LDCT,J=5577> ; load counter (563)
5318 006117' 000000 000300
5319 006120' 056400 500000 MWORD <CJS,J=50> ; go decrement cntr (564)
5320 006121' 000000 000020
5321 006122' 056500 510000 MWORD <JRP,ENA,CCOF,J=51> ; go to cntr addr (565)
5322 006123' 000400 010160
5323
5324 006124' 056656 770000 MWORD <LDCT,J=5677> ; load counter (566)
5325 006125' 000000 000300
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 100-3
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0812
5326 006126' 056700 500000 MWORD <CJS,J=50> ; go decrement cntr (567)
5327 006127' 000000 000020
5328 006130' 057000 510000 MWORD <JRP,ENA,CCOF,J=51> ; go to cntr addr (570)
5329 006131' 000400 010160
5330
5331 006132' 057157 370000 MWORD <LDCT,J=5737> ; load counter (571)
5332 006133' 000000 000300
5333 006134' 057200 500000 MWORD <CJS,J=50> ; go decrement cntr (572)
5334 006135' 000000 000020
5335 006136' 057300 510000 MWORD <JRP,ENA,CCOF,J=51> ; go to cntr addr (573)
5336 006137' 000400 010160
5337
5338 006140' 057457 570000 MWORD <LDCT,J=5757> ; load counter (574)
5339 006141' 000000 000300
5340 006142' 057500 500000 MWORD <CJS,J=50> ; go decrement cntr (575)
5341 006143' 000000 000020
5342 006144' 057600 510000 MWORD <JRP,ENA,CCOF,J=51> ; go to cntr addr (576)
5343 006145' 000400 010160
5344
5345 006146' 057757 670000 MWORD <LDCT,J=5767> ; load counter (577)
5346 006147' 000000 000300
5347 006150' 060000 500000 MWORD <CJS,J=50> ; go decrement cntr (600)
5348 006151' 000000 000020
5349 006152' 060100 510000 MWORD <JRP,ENA,CCOF,J=51> ; go to cntr addr (601)
5350 006153' 000400 010160
5351
5352 006154' 060257 730000 MWORD <LDCT,J=5773> ; load counter (602)
5353 006155' 000000 000300
5354 006156' 060300 500000 MWORD <CJS,J=50> ; go decrement cntr (603)
5355 006157' 000000 000020
5356 006160' 060400 510000 MWORD <JRP,ENA,CCOF,J=51> ; go to cntr addr (604)
5357 006161' 000400 010160
5358
5359 006162' 060557 750000 MWORD <LDCT,J=5775> ; load counter (605)
5360 006163' 000000 000300
5361 006164' 060600 500000 MWORD <CJS,J=50> ; go decrement cntr (606)
5362 006165' 000000 000020
5363 006166' 060700 510000 MWORD <JRP,ENA,CCOF,J=51> ; go to cntr addr (607)
5364 006167' 000400 010160
5365
5366 006170' 061057 760000 MWORD <LDCT,J=5776> ; load counter (610)
5367 006171' 000000 000300
5368 006172' 061100 500000 MWORD <CJS,J=50> ; go decrement cntr (611)
5369 006173' 000000 000020
5370 006174' 061200 510000 MWORD <JRP,ENA,CCOF,J=51> ; go to cntr addr (612)
5371 006175' 000400 010160
5372
5373 006176' 061357 770000 MWORD <LDCT,J=5777> ; load counter (613)
5374 006177' 000000 000300
5375 006200' 061400 500000 MWORD <CJS,J=50> ; go decrement cntr (614)
5376 006201' 000000 000020
5377 006202' 061500 510000 MWORD <JRP,ENA,CCOF,J=51> ; go to cntr addr (615)
5378 006203' 000400 010160
5379
5380 006204' 061606 170000 MWORD <JMAP,J=617> ; done (616)
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 100-4
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0813
5381 006205' 000000 000040
5382 006206' 061706 170000 MWORD <JMAP,J=617> ; error (617)
5383 006207' 000000 000040
5384
5385 006210' 000005 030000 MWORD <ADDR=0,JMAP,J=503> ; do next segment (0)
5386 006211' 000000 000040
5387 006212' 000105 060000 MWORD <ADDR=1,JMAP,J=506> ; do next segment (1)
5388 006213' 000000 000040
5389 006214' 000305 110000 MWORD <ADDR=3,JMAP,J=511> ; do next segment (3)
5390 006215' 000000 000040
5391 006216' 000705 140000 MWORD <ADDR=7,JMAP,J=514> ; do next segment (7)
5392 006217' 000000 000040
5393 006220' 001705 170000 MWORD <ADDR=17,JMAP,J=517> ; do next segment (17)
5394 006221' 000000 000040
5395 006222' 003705 220000 MWORD <ADDR=37,JMAP,J=522> ; do next segment (37)
5396 006223' 000000 000040
5397 006224' 007705 250000 MWORD <ADDR=77,JMAP,J=525> ; do next segment (77)
5398 006225' 000000 000040
5399 006226' 017705 300000 MWORD <ADDR=177,JMAP,J=530> ; do next segment (177)
5400 006227' 000000 000040
5401 006230' 037705 330000 MWORD <ADDR=377,JMAP,J=533> ; do next segment (377)
5402 006231' 000000 000040
5403 006232' 077705 360000 MWORD <ADDR=777,JMAP,J=536> ; do next segment (777)
5404 006233' 000000 000040
5405 006234' 177605 410000 MWORD <ADDR=1776,JMAP,J=541> ; do next segment (1776)
5406 006235' 000000 000040
5407 006236' 177705 440000 MWORD <ADDR=1777,JMAP,J=544> ; do next segment (1777)
5408 006237' 000000 000040
5409 006240' 277605 470000 MWORD <ADDR=2776,JMAP,J=547> ; do next segment (2776)
5410 006241' 000000 000040
5411 006242' 377605 520000 MWORD <ADDR=3776,JMAP,J=552> ; do next segment (3776)
5412 006243' 000000 000040
5413 006244' 377705 550000 MWORD <ADDR=3777,JMAP,J=555> ; do next segment (3777)
5414 006245' 000000 000040
5415 006246' 477605 600000 MWORD <ADDR=4776,JMAP,J=560> ; do next segment (4776)
5416 006247' 000000 000040
5417 006250' 537605 630000 MWORD <ADDR=5376,JMAP,J=563> ; do next segment (5376)
5418 006251' 000000 000040
5419 006252' 557605 660000 MWORD <ADDR=5576,JMAP,J=566> ; do next segment (5576)
5420 006253' 000000 000040
5421 006254' 567605 710000 MWORD <ADDR=5676,JMAP,J=571> ; do next segment (5676)
5422 006255' 000000 000040
5423 006256' 573605 740000 MWORD <ADDR=5736,JMAP,J=574> ; do next segment (5736)
5424 006257' 000000 000040
5425 006260' 575605 770000 MWORD <ADDR=5756,JMAP,J=577> ; do next segment (5756)
5426 006261' 000000 000040
5427 006262' 576606 020000 MWORD <ADDR=5766,JMAP,J=602> ; do next segment (5766)
5428 006263' 000000 000040
5429 006264' 577206 050000 MWORD <ADDR=5772,JMAP,J=605> ; do next segment (5772)
5430 006265' 000000 000040
5431 006266' 577406 100000 MWORD <ADDR=5774,JMAP,J=610> ; do next segment (5774)
5432 006267' 000000 000040
5433 006270' 577506 130000 MWORD <ADDR=5775,JMAP,J=613> ; do next segment (5775)
5434 006271' 000000 000040
5435 006272' 577606 160000 MWORD <ADDR=5776,JMAP,J=616> ; do next segment (5776)
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 100-5
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0814
5436 006273' 000000 000040
5437 006274' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 101
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0815
5438
5439 ;#********************************************************************
5440 ;* Test 54 - RPCT Instruction
5441 ;
5442 ; Description: Verify that the RPCT instruction causes a jump to
5443 ; the address specified at the direct inputs if the
5444 ; counter is nonzero.
5445 ;
5446 ; And verify that the RPCT instruction continues to
5447 ; the next instruction if the counter is zero.
5448 ;
5449 ; And verify that the counter is not changed if the
5450 ; counter is zero.
5451 ;
5452 ; Procedure: Clear Port
5453 ; Load test microcode
5454 ; Set up RAR to start at location 100
5455 ; Set MPRUN/SINGLE STEP (execute JZ,LDCT,4 RPCT's)
5456 ; Set MPRUN/SINGLE STEP (execute LDCT,4 RPCT's)
5457 ; Set MPRUN/SINGLE STEP (execute JRP)
5458 ; Read LAR, and verify address = 0
5459 ;
5460 ; Failure: ---
5461 ;#********************************************************************
5462
5463 ; Test data
5464
5465 006275' 254 00 0 00 006306' TSTS54: JRST TG54 ; go start test
5466 006276' 240401 000054 SEQ!MPROC!NDMP!ZSEQ!54 ; test mask
5467 006277' 006334' 011234' T54M,,[ASCIZ ^RPCT Instruction^]
5468 006300' 010442' 010517' [EXP MLAST!M7],,[EXP M16,M9,M1,MLAST!M8]
5469 006301' 000000 006377' TSTS55 ; failure test table
5470 006302' 000000 006707' TSTS56 ; ...
5471 006303' 000000 006777' TSTS57
5472 006304' 000000 007051' TSTS60
5473 006305' 777777 777777 -1
5474
5475 ; Start test
5476
5477 006306' 201 00 0 00 000000' TG54: MOVEI Z3 ; get address of module start
5478 006307' 260 17 0 00 005665* GO TRACE ; handle trace output
5479 006310' 201 01 0 00 006334' MOVEI 1,T54M ; set up microcode address
5480 006311' 260 17 0 00 005723* GO TLOAD ; load/verify it
5481 006312' 263 17 0 00 000000 RTN ; failed - exit test
5482
5483 ; Initialization
5484
5485 006313' 260 17 0 00 005671* TL54: GO IPACLR ; clear port
5486 006314' 402 00 0 00 005672* SETZM TSTSUB ; initialize subtest number
5487 006315' 201 06 0 00 006330' MOVEI 6,TS54 ; get sstep table address
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 102
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0816
5488
5489 ; Loop on single step table entries
5490
5491 006316' 400 15 0 00 000000 TA54: SETZ ERFLG, ; clear error flag
5492 006317' 260 17 0 00 005676* GO SEXEC ; execute table entry
5493 006320' 254 00 0 00 006327' JRST TX54 ; end of sstep table
5494 006321' 254 00 0 00 006316' JRST TA54 ; keep looping after call
5495 006322' 474 15 0 00 000000 SETO ERFLG, ; error - end address incorrect
5496
5497 ; Handle error printouts and scope looping
5498
5499 006323' 027 00 0 00 006332' SCOPER MA54 ; print error message
5500 006324' 254 00 0 00 006313' JRST TL54 ; loop on error
5501 006325' 254 00 0 00 006327' JRST TX54 ; altmode exit
5502 006326' 322 15 0 00 006316' JUMPE ERFLG,TA54 ; do next sstep table entry
5503
5504 ; End of test
5505
5506 006327' 263 17 0 00 000000 TX54: RTN ; return
5507
5508 ; Single step table, as: (CMD,#Steps,Start addr,End Addr)
5509
5510 006330' 101401 000000 TS54: STABLE (SSSTRT,^D12,100,0)
5511 006331' 000000 000000 STABLE (SSLAST)
5512
5513 ; Error messages
5514
5515 006332' 140000 011240' MA54: MSG!TXNOT![ASCIZ /RPCT did not dispatch correctly/]
5516 006333' 000000000000# LAST!CALL!TXALL!SSPNT ; print sequencer data
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 103
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0817
5517
5518 ; Test microcode
5519
5520 006334' 010000 000000 T54M: MWORD <ADDR=100,JZ> ; init PC (100)
5521 006335' 000000 000000
5522 006336' 000007 770000 MWORD <ADDR=0,LDCT,J=777> ; load counter (0)
5523 006337' 000000 000300
5524 006340' 000100 030000 MWORD <RPCT,DISA,CCOF,J=3> ; dec cntr/go to 4 (1)
5525 006341' 000000 010220
5526 006342' 000200 020000 MWORD <JMAP,J=2> ; error if here (2)
5527 006343' 000000 000040
5528 006344' 000300 050000 MWORD <RPCT,DISA,CCON,J=5> ; dec cntr/go to 6 (3)
5529 006345' 000000 030220
5530 006346' 000400 040000 MWORD <JMAP,J=4> ; error if here (4)
5531 006347' 000000 000040
5532 006350' 000500 070000 MWORD <RPCT,ENA,CCOF,J=7> ; dec cntr/go to 10 (5)
5533 006351' 000400 010220
5534 006352' 000600 060000 MWORD <JMAP,J=6> ; error if here (6)
5535 006353' 000000 000040
5536 006354' 000700 110000 MWORD <RPCT,ENA,CCON,J=11> ; dec cntr/go to 12 (7)
5537 006355' 000400 030220
5538 006356' 001000 100000 MWORD <JMAP,J=10> ; error if here (10)
5539 006357' 000000 000040
5540
5541 006360' 001100 000000 MWORD <LDCT,J=0> ; load counter (11)
5542 006361' 000000 000300
5543 006362' 001200 770000 MWORD <RPCT,DISA,CCOF,J=77> ; continue (12)
5544 006363' 000000 010220
5545 006364' 001300 770000 MWORD <RPCT,DISA,CCOF,J=77> ; continue (13)
5546 006365' 000000 010220
5547 006366' 001400 770000 MWORD <RPCT,DISA,CCOF,J=77> ; continue (14)
5548 006367' 000000 010220
5549 006370' 001500 770000 MWORD <RPCT,DISA,CCOF,J=77> ; continue (15)
5550 006371' 000000 010220
5551 006372' 001600 770000 MWORD <JRP,ENA,CCOF,J=77> ; go to cntr addr (0) (16)
5552 006373' 000400 010160
5553 006374' 007700 770000 MWORD <ADDR=77,JMAP,J=77> ; error if here (77)
5554 006375' 000000 000040
5555 006376' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 104
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0818
5556
5557 ;#********************************************************************
5558 ;* Test 55 - RPCT Instruction
5559 ;
5560 ; Description: Verify that the RPCT instruction correctly
5561 ; decrements the counter if nonzero regardless of
5562 ; the TEST inputs.
5563 ;
5564 ; Procedure: Clear Port
5565 ; Load test microcode
5566 ; Set up RAR to start at location 333, execute JMAP
5567 ; Set MPRUN/SINGLE STEP (execute 24 segments of
5568 ; LDCT,JMAP,4 RPCT's,JRP,JMAP)
5569 ; Read LAR, and verify address = 560
5570 ;
5571 ; Failure: ---
5572 ;#********************************************************************
5573
5574 ; Test data
5575
5576 006377' 254 00 0 00 006410' TSTS55: JRST TG55 ; go start test
5577 006400' 240401 000055 SEQ!MPROC!NDMP!ZSEQ!55 ; test mask
5578 006401' 006436' 011234' T55M,,[ASCIZ ^RPCT Instruction^]
5579 006402' 010442' 010517' [EXP MLAST!M7],,[EXP M16,M9,M1,MLAST!M8]
5580 006403' 000000 006707' TSTS56 ; failure test table
5581 006404' 000000 006777' TSTS57 ; ...
5582 006405' 000000 007051' TSTS60
5583 006406' 000000 007127' TSTS61
5584 006407' 777777 777777 -1
5585
5586 ; Start test
5587
5588 006410' 201 00 0 00 000000' TG55: MOVEI Z3 ; get address of module start
5589 006411' 260 17 0 00 006307* GO TRACE ; handle trace output
5590 006412' 201 01 0 00 006436' MOVEI 1,T55M ; set up microcode address
5591 006413' 260 17 0 00 006311* GO TLOAD ; load/verify it
5592 006414' 263 17 0 00 000000 RTN ; failed - exit test
5593
5594 ; Initialization
5595
5596 006415' 260 17 0 00 006313* TL55: GO IPACLR ; clear port
5597 006416' 402 00 0 00 006314* SETZM TSTSUB ; initialize subtest number
5598 006417' 201 06 0 00 006432' MOVEI 6,TS55 ; get sstep table address
5599
5600 ; Loop on single step table entries
5601
5602 006420' 400 15 0 00 000000 TA55: SETZ ERFLG, ; clear error flag
5603 006421' 260 17 0 00 006317* GO SEXEC ; execute table entry
5604 006422' 254 00 0 00 006431' JRST TX55 ; end of sstep table
5605 006423' 254 00 0 00 006420' JRST TA55 ; keep looping after call
5606 006424' 474 15 0 00 000000 SETO ERFLG, ; error - end address incorrect
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 105
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0819
5607
5608 ; Handle error printouts and scope looping
5609
5610 006425' 027 00 0 00 006434' SCOPER MA55 ; print error message
5611 006426' 254 00 0 00 006415' JRST TL55 ; loop on error
5612 006427' 254 00 0 00 006431' JRST TX55 ; altmode exit
5613 006430' 322 15 0 00 006420' JUMPE ERFLG,TA55 ; do next sstep table entry
5614
5615 ; End of test
5616
5617 006431' 263 17 0 00 000000 TX55: RTN ; return
5618
5619 ; Single step table, as: (CMD,#Steps,Start addr,End Addr)
5620
5621 006432' 130103 330560 TS55: STABLE (SSSTRT,^D193,333,560)
5622 006433' 000000 000000 STABLE (SSLAST)
5623
5624 ; Error messages
5625
5626 006434' 140000 011247' MA55: MSG!TXNOT![ASCIZ /RPCT did not decrement the cntr properly/]
5627 006435' 000000000000# LAST!CALL!TXALL!SSPNT ; print sequencer data
5628
5629 ; Test microcode
5630
5631 ; Subroutine to do the RPCT's
5632
5633 006436' 033305 000000 T55M: MWORD <ADDR=333,JMAP,J=500> ; init PC (333)
5634 006437' 000000 000040
5635 006440' 005000 520000 MWORD <ADDR=50,RPCT,DISA,CCOF,J=52> ; dec ctr/go to 52 (50)
5636 006441' 000000 010220
5637 006442' 005100 510000 MWORD <JMAP,J=51> ; error if here (51)
5638 006443' 000000 000040
5639 006444' 005200 540000 MWORD <RPCT,DISA,CCON,J=54> ; dec ctr/go to 54 (52)
5640 006445' 000000 030220
5641 006446' 005300 530000 MWORD <JMAP,J=53> ; error if here (53)
5642 006447' 000000 000040
5643 006450' 005400 560000 MWORD <RPCT,ENA,CCOF,J=56> ; dec ctr/go to 56 (54)
5644 006451' 000400 010220
5645 006452' 005500 550000 MWORD <JMAP,J=55> ; error if here (55)
5646 006453' 000000 000040
5647 006454' 005600 600000 MWORD <RPCT,ENA,CCON,J=60> ; dec ctr/go to 60 (56)
5648 006455' 000400 030220
5649 006456' 005700 570000 MWORD <JMAP,J=57> ; error if here (57)
5650 006457' 000000 000040
5651 006460' 006000 570000 MWORD <JRP,ENA,CCOF,J=57> ; go to cntr addr (60)
5652 006461' 000400 010160
5653
5654 006462' 050000 040000 MWORD <ADDR=500,LDCT,J=4> ; load counter (500)
5655 006463' 000000 000300
5656 006464' 050100 500000 MWORD <JMAP,J=50> ; go do RPCT's (501)
5657 006465' 000000 000040
5658 006466' 050200 100000 MWORD <LDCT,J=10> ; load counter (502)
5659 006467' 000000 000300
5660 006470' 050300 500000 MWORD <JMAP,J=50> ; go do RPCT's (503)
5661 006471' 000000 000040
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 105-1
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0820
5662 006472' 050400 200000 MWORD <LDCT,J=20> ; load counter (504)
5663 006473' 000000 000300
5664 006474' 050500 500000 MWORD <JMAP,J=50> ; go do RPCT's (505)
5665 006475' 000000 000040
5666 006476' 050600 400000 MWORD <LDCT,J=40> ; load counter (506)
5667 006477' 000000 000300
5668 006500' 050700 500000 MWORD <JMAP,J=50> ; go do RPCT's (507)
5669 006501' 000000 000040
5670 006502' 051001 000000 MWORD <LDCT,J=100> ; load counter (510)
5671 006503' 000000 000300
5672 006504' 051100 500000 MWORD <JMAP,J=50> ; go do RPCT's (511)
5673 006505' 000000 000040
5674 006506' 051202 000000 MWORD <LDCT,J=200> ; load counter (512)
5675 006507' 000000 000300
5676 006510' 051300 500000 MWORD <JMAP,J=50> ; go do RPCT's (513)
5677 006511' 000000 000040
5678 006512' 051404 000000 MWORD <LDCT,J=400> ; load counter (514)
5679 006513' 000000 000300
5680 006514' 051500 500000 MWORD <JMAP,J=50> ; go do RPCT's (515)
5681 006515' 000000 000040
5682 006516' 051610 000000 MWORD <LDCT,J=1000> ; load counter (516)
5683 006517' 000000 000300
5684 006520' 051700 500000 MWORD <JMAP,J=50> ; go do RPCT's (517)
5685 006521' 000000 000040
5686 006522' 052017 770000 MWORD <LDCT,J=1777> ; load counter (520)
5687 006523' 000000 000300
5688 006524' 052100 500000 MWORD <JMAP,J=50> ; go do RPCT's (521)
5689 006525' 000000 000040
5690 006526' 052220 000000 MWORD <LDCT,J=2000> ; load counter (522)
5691 006527' 000000 000300
5692 006530' 052300 500000 MWORD <JMAP,J=50> ; go do RPCT's (523)
5693 006531' 000000 000040
5694 006532' 052427 770000 MWORD <LDCT,J=2777> ; load counter (524)
5695 006533' 000000 000300
5696 006534' 052500 500000 MWORD <JMAP,J=50> ; go do RPCT's (525)
5697 006535' 000000 000040
5698 006536' 052637 770000 MWORD <LDCT,J=3777> ; load counter (526)
5699 006537' 000000 000300
5700 006540' 052700 500000 MWORD <JMAP,J=50> ; go do RPCT's (527)
5701 006541' 000000 000040
5702 006542' 053040 000000 MWORD <LDCT,J=4000> ; load counter (530)
5703 006543' 000000 000300
5704 006544' 053100 500000 MWORD <JMAP,J=50> ; go do RPCT's (531)
5705 006545' 000000 000040
5706 006546' 053247 770000 MWORD <LDCT,J=4777> ; load counter (532)
5707 006547' 000000 000300
5708 006550' 053300 500000 MWORD <JMAP,J=50> ; go do RPCT's (533)
5709 006551' 000000 000040
5710 006552' 053453 770000 MWORD <LDCT,J=5377> ; load counter (534)
5711 006553' 000000 000300
5712 006554' 053500 500000 MWORD <JMAP,J=50> ; go do RPCT's (535)
5713 006555' 000000 000040
5714 006556' 053655 770000 MWORD <LDCT,J=5577> ; load counter (536)
5715 006557' 000000 000300
5716 006560' 053700 500000 MWORD <JMAP,J=50> ; go do RPCT's (537)
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 105-2
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0821
5717 006561' 000000 000040
5718 006562' 054056 770000 MWORD <LDCT,J=5677> ; load counter (540)
5719 006563' 000000 000300
5720 006564' 054100 500000 MWORD <JMAP,J=50> ; go do RPCT's (541)
5721 006565' 000000 000040
5722 006566' 054257 370000 MWORD <LDCT,J=5737> ; load counter (542)
5723 006567' 000000 000300
5724 006570' 054300 500000 MWORD <JMAP,J=50> ; go do RPCT's (543)
5725 006571' 000000 000040
5726 006572' 054457 570000 MWORD <LDCT,J=5757> ; load counter (544)
5727 006573' 000000 000300
5728 006574' 054500 500000 MWORD <JMAP,J=50> ; go do RPCT's (545)
5729 006575' 000000 000040
5730 006576' 054657 670000 MWORD <LDCT,J=5767> ; load counter (546)
5731 006577' 000000 000300
5732 006600' 054700 500000 MWORD <JMAP,J=50> ; go do RPCT's (547)
5733 006601' 000000 000040
5734 006602' 055057 730000 MWORD <LDCT,J=5773> ; load counter (550)
5735 006603' 000000 000300
5736 006604' 055100 500000 MWORD <JMAP,J=50> ; go do RPCT's (551)
5737 006605' 000000 000040
5738 006606' 055257 750000 MWORD <LDCT,J=5775> ; load counter (552)
5739 006607' 000000 000300
5740 006610' 055300 500000 MWORD <JMAP,J=50> ; go do RPCT's (553)
5741 006611' 000000 000040
5742 006612' 055457 760000 MWORD <LDCT,J=5776> ; load counter (554)
5743 006613' 000000 000300
5744 006614' 055500 500000 MWORD <JMAP,J=50> ; go do RPCT's (555)
5745 006615' 000000 000040
5746 006616' 055657 770000 MWORD <LDCT,J=5777> ; load counter (556)
5747 006617' 000000 000300
5748 006620' 055700 500000 MWORD <JMAP,J=50> ; go do RPCT's (557)
5749 006621' 000000 000040
5750
5751 006622' 056005 610000 MWORD <JMAP,J=561> ; done (560)
5752 006623' 000000 000040
5753 006624' 056105 610000 MWORD <JMAP,J=561> ; error (561)
5754 006625' 000000 000040
5755
5756 006626' 000005 020000 MWORD <ADDR=0,JMAP,J=502> ; do next segment (0)
5757 006627' 000000 000040
5758 006630' 000405 040000 MWORD <ADDR=4,JMAP,J=504> ; do next segment (4)
5759 006631' 000000 000040
5760 006632' 001405 060000 MWORD <ADDR=14,JMAP,J=506> ; do next segment (14)
5761 006633' 000000 000040
5762 006634' 003405 100000 MWORD <ADDR=34,JMAP,J=510> ; do next segment (34)
5763 006635' 000000 000040
5764 006636' 007405 120000 MWORD <ADDR=74,JMAP,J=512> ; do next segment (74)
5765 006637' 000000 000040
5766 006640' 017405 140000 MWORD <ADDR=174,JMAP,J=514> ; do next segment (174)
5767 006641' 000000 000040
5768 006642' 037405 160000 MWORD <ADDR=374,JMAP,J=516> ; do next segment (374)
5769 006643' 000000 000040
5770 006644' 077405 200000 MWORD <ADDR=774,JMAP,J=520> ; do next segment (774)
5771 006645' 000000 000040
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 105-3
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0822
5772 006646' 177305 220000 MWORD <ADDR=1773,JMAP,J=522> ; do next segment (1773)
5773 006647' 000000 000040
5774 006650' 177405 240000 MWORD <ADDR=1774,JMAP,J=524> ; do next segment (1774)
5775 006651' 000000 000040
5776 006652' 277305 260000 MWORD <ADDR=2773,JMAP,J=526> ; do next segment (2773)
5777 006653' 000000 000040
5778 006654' 377305 300000 MWORD <ADDR=3773,JMAP,J=530> ; do next segment (3773)
5779 006655' 000000 000040
5780 006656' 377405 320000 MWORD <ADDR=3774,JMAP,J=532> ; do next segment (3774)
5781 006657' 000000 000040
5782 006660' 477305 340000 MWORD <ADDR=4773,JMAP,J=534> ; do next segment (4773)
5783 006661' 000000 000040
5784 006662' 537305 360000 MWORD <ADDR=5373,JMAP,J=536> ; do next segment (5373)
5785 006663' 000000 000040
5786 006664' 557305 400000 MWORD <ADDR=5573,JMAP,J=540> ; do next segment (5573)
5787 006665' 000000 000040
5788 006666' 567305 420000 MWORD <ADDR=5673,JMAP,J=542> ; do next segment (5673)
5789 006667' 000000 000040
5790 006670' 573305 440000 MWORD <ADDR=5733,JMAP,J=544> ; do next segment (5733)
5791 006671' 000000 000040
5792 006672' 575305 460000 MWORD <ADDR=5753,JMAP,J=546> ; do next segment (5753)
5793 006673' 000000 000040
5794 006674' 576305 500000 MWORD <ADDR=5763,JMAP,J=550> ; do next segment (5763)
5795 006675' 000000 000040
5796 006676' 576705 520000 MWORD <ADDR=5767,JMAP,J=552> ; do next segment (5767)
5797 006677' 000000 000040
5798 006700' 577105 540000 MWORD <ADDR=5771,JMAP,J=554> ; do next segment (5771)
5799 006701' 000000 000040
5800 006702' 577205 560000 MWORD <ADDR=5772,JMAP,J=556> ; do next segment (5772)
5801 006703' 000000 000040
5802 006704' 577305 600000 MWORD <ADDR=5773,JMAP,J=560> ; do next segment (5773)
5803 006705' 000000 000040
5804 006706' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 106
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0823
5805
5806 ;#********************************************************************
5807 ;* Test 56 - TWB Instruction
5808 ;
5809 ; Description: Verify that the TWB instruction continues to the
5810 ; next sequential instruction if TEST is asserted.
5811 ;
5812 ; Procedure: Clear Port
5813 ; Load test microcode
5814 ; Set up RAR to start at location 100
5815 ; Set MPRUN/SINGLE STEP (execute JZ,PUSH,3 TWB's)
5816 ; Set MPRUN/SINGLE STEP (execute PUSH,3 TWB's,JRP)
5817 ; Read LAR, and verify address = 0
5818 ;
5819 ; Failure: ---
5820 ;#********************************************************************
5821
5822 ; Test data
5823
5824 006707' 254 00 0 00 006720' TSTS56: JRST TG56 ; go start test
5825 006710' 240401 000056 SEQ!MPROC!NDMP!ZSEQ!56 ; test mask
5826 006711' 006746' 011260' T56M,,[ASCIZ ^TWB Instruction^]
5827 006712' 010442' 010517' [EXP MLAST!M7],,[EXP M16,M9,M1,MLAST!M8]
5828 006713' 000000 006777' TSTS57 ; failure test table
5829 006714' 000000 007051' TSTS60 ; ...
5830 006715' 000000 007127' TSTS61
5831 006716' 000000 007223' TSTS62
5832 006717' 777777 777777 -1
5833
5834 ; Start test
5835
5836 006720' 201 00 0 00 000000' TG56: MOVEI Z3 ; get address of module start
5837 006721' 260 17 0 00 006411* GO TRACE ; handle trace output
5838 006722' 201 01 0 00 006746' MOVEI 1,T56M ; set up microcode address
5839 006723' 260 17 0 00 006413* GO TLOAD ; load/verify it
5840 006724' 263 17 0 00 000000 RTN ; failed - exit test
5841
5842 ; Initialization
5843
5844 006725' 260 17 0 00 006415* TL56: GO IPACLR ; clear port
5845 006726' 402 00 0 00 006416* SETZM TSTSUB ; initialize subtest number
5846 006727' 201 06 0 00 006742' MOVEI 6,TS56 ; get sstep table address
5847
5848 ; Loop on single step table entries
5849
5850 006730' 400 15 0 00 000000 TA56: SETZ ERFLG, ; clear error flag
5851 006731' 260 17 0 00 006421* GO SEXEC ; execute table entry
5852 006732' 254 00 0 00 006741' JRST TX56 ; end of sstep table
5853 006733' 254 00 0 00 006730' JRST TA56 ; keep looping after call
5854 006734' 474 15 0 00 000000 SETO ERFLG, ; error - end address incorrect
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 107
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0824
5855
5856 ; Handle error printouts and scope looping
5857
5858 006735' 027 00 0 00 006744' SCOPER MA56 ; print error message
5859 006736' 254 00 0 00 006725' JRST TL56 ; loop on error
5860 006737' 254 00 0 00 006741' JRST TX56 ; altmode exit
5861 006740' 322 15 0 00 006730' JUMPE ERFLG,TA56 ; do next sstep table entry
5862
5863 ; End of test
5864
5865 006741' 263 17 0 00 000000 TX56: RTN ; return
5866
5867 ; Single step table, as: (CMD,#Steps,Start addr,End Addr)
5868
5869 006742' 101201 000000 TS56: STABLE (SSSTRT,^D10,100,0)
5870 006743' 000000 000000 STABLE (SSLAST)
5871
5872 ; Error messages
5873
5874 006744' 140000 011264' MA56: MSG!TXNOT![ASCIZ /TWB did not continue PC+1 with test conditions met/]
5875 006745' 000000000000# LAST!CALL!TXALL!SSPNT ; print sequencer data
5876
5877 ; Test microcode
5878
5879 006746' 010000 000000 T56M: MWORD <ADDR=100,JZ> ; init PC (100)
5880 006747' 000000 000000
5881 006750' 000007 770000 MWORD <ADDR=0,PUSH,J=777> ; push 1/load cntr (0)
5882 006751' 000000 000100
5883 006752' 000100 770000 MWORD <TWB,DISA,CCOF,J=77> ; continue to 2 (1)
5884 006753' 000000 010360
5885 006754' 000200 770000 MWORD <TWB,DISA,CCON,J=77> ; continue to 3 (2)
5886 006755' 000000 030360
5887 006756' 000300 770000 MWORD <TWB,ENA,CCON,J=77> ; continue to 4 (3)
5888 006757' 000400 030360
5889 006760' 000400 000000 MWORD <PUSH,J=0> ; push 5/zero cntr (4)
5890 006761' 000000 000100
5891 006762' 000500 770000 MWORD <TWB,DISA,CCOF,J=77> ; continue to 6 (5)
5892 006763' 000000 010360
5893 006764' 000600 770000 MWORD <TWB,DISA,CCON,J=77> ; continue to 7 (6)
5894 006765' 000000 030360
5895 006766' 000700 770000 MWORD <TWB,ENA,CCON,J=77> ; continue to 10 (7)
5896 006767' 000400 030360
5897 006770' 001000 000000 MWORD <JRP,ENA,CCOF> ; go to cntr addr (10)
5898 006771' 000400 010160
5899
5900 006772' 007700 770000 MWORD <ADDR=77,JMAP,J=77> ; error if here (77)
5901 006773' 000000 000040
5902 006774' 077707 770000 MWORD <ADDR=777,JMAP,J=777> ; error if here (777)
5903 006775' 000000 000040
5904 006776' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 108
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0825
5905
5906 ;#********************************************************************
5907 ;* Test 57 - TWB Instruction
5908 ;
5909 ; Description: Verify that the TWB instruction jumps to the
5910 ; address specified at the direct inputs if TEST
5911 ; input is not satisfied and the counter = 0.
5912 ;
5913 ; Procedure: Clear Port
5914 ; Load test microcode
5915 ; Set up RAR to start at location 100
5916 ; Set MPRUN/SINGLE STEP (execute JZ,PUSH,TWB)
5917 ; Read LAR, and verify address = 3
5918 ;
5919 ; Failure: ---
5920 ;#********************************************************************
5921
5922 ; Test data
5923
5924 006777' 254 00 0 00 007010' TSTS57: JRST TG57 ; go start test
5925 007000' 240401 000057 SEQ!MPROC!NDMP!ZSEQ!57 ; test mask
5926 007001' 007036' 011260' T57M,,[ASCIZ ^TWB Instruction^]
5927 007002' 010442' 010517' [EXP MLAST!M7],,[EXP M16,M9,M1,MLAST!M8]
5928 007003' 000000 007051' TSTS60 ; failure test table
5929 007004' 000000 007127' TSTS61 ; ...
5930 007005' 000000 007223' TSTS62
5931 007006' 000000 007323' TSTS63
5932 007007' 777777 777777 -1
5933
5934 ; Start test
5935
5936 007010' 201 00 0 00 000000' TG57: MOVEI Z3 ; get address of module start
5937 007011' 260 17 0 00 006721* GO TRACE ; handle trace output
5938 007012' 201 01 0 00 007036' MOVEI 1,T57M ; set up microcode address
5939 007013' 260 17 0 00 006723* GO TLOAD ; load/verify it
5940 007014' 263 17 0 00 000000 RTN ; failed - exit test
5941
5942 ; Initialization
5943
5944 007015' 260 17 0 00 006725* TL57: GO IPACLR ; clear port
5945 007016' 402 00 0 00 006726* SETZM TSTSUB ; initialize subtest number
5946 007017' 201 06 0 00 007032' MOVEI 6,TS57 ; get sstep table address
5947
5948 ; Loop on single step table entries
5949
5950 007020' 400 15 0 00 000000 TA57: SETZ ERFLG, ; clear error flag
5951 007021' 260 17 0 00 006731* GO SEXEC ; execute table entry
5952 007022' 254 00 0 00 007031' JRST TX57 ; end of sstep table
5953 007023' 254 00 0 00 007020' JRST TA57 ; keep looping after call
5954 007024' 474 15 0 00 000000 SETO ERFLG, ; error - end address incorrect
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 109
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0826
5955
5956 ; Handle error printouts and scope looping
5957
5958 007025' 027 00 0 00 007034' SCOPER MA57 ; print error message
5959 007026' 254 00 0 00 007015' JRST TL57 ; loop on error
5960 007027' 254 00 0 00 007031' JRST TX57 ; altmode exit
5961 007030' 322 15 0 00 007020' JUMPE ERFLG,TA57 ; do next sstep table entry
5962
5963 ; End of test
5964
5965 007031' 263 17 0 00 000000 TX57: RTN ; return
5966
5967 ; Single step table, as: (CMD,#Steps,Start addr,End Addr)
5968
5969 007032' 100301 000003 TS57: STABLE (SSSTRT,3,100,3)
5970 007033' 000000 000000 STABLE (SSLAST)
5971
5972 ; Error messages
5973
5974 007034' 140000 011277' MA57: MSG!TXNOT![ASCIZ /TWB did not dispatch correctly/]
5975 007035' 000000000000# LAST!CALL!TXALL!SSPNT ; print sequencer data
5976
5977 ; Test microcode
5978
5979 007036' 010000 000000 T57M: MWORD <ADDR=100,JZ> ; init PC (100)
5980 007037' 000000 000000
5981 007040' 000000 000000 MWORD <ADDR=0,PUSH,J=0> ; push 1/zero cntr (0)
5982 007041' 000000 000100
5983 007042' 000100 030000 MWORD <TWB,ENA,CCOF,J=3> ; ena/off - go to 3 (1)
5984 007043' 000400 010360
5985 007044' 000200 020000 MWORD <JMAP,J=2> ; error if here (2)
5986 007045' 000000 000040
5987 007046' 000300 000000 MWORD <JMAP,J=0> ; done (3)
5988 007047' 000000 000040
5989 007050' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 110
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0827
5990
5991 ;#********************************************************************
5992 ;* Test 60 - TWB Instruction
5993 ;
5994 ; Description: Verify that the TWB instruction jumps to the
5995 ; address specified by the top of the stack if TEST
5996 ; inputs are not satisfied and counter is not = 0.
5997 ;
5998 ; Procedure: Clear Port
5999 ; Load test microcode
6000 ; Set up RAR to start at location 100
6001 ; Set MPRUN/SINGLE STEP (execute JZ,PUSH,CJS,TWB)
6002 ; Set MPRUN/SINGLE STEP (execute JRP,CRTN)
6003 ; Read LAR, and verify address = 2
6004 ;
6005 ; Failure: ---
6006 ;#********************************************************************
6007
6008 ; Test data
6009
6010 007051' 254 00 0 00 007062' TSTS60: JRST TG60 ; go start test
6011 007052' 240401 000060 SEQ!MPROC!NDMP!ZSEQ!60 ; test mask
6012 007053' 007110' 011260' T60M,,[ASCIZ ^TWB Instruction^]
6013 007054' 010442' 010517' [EXP MLAST!M7],,[EXP M16,M9,M1,MLAST!M8]
6014 007055' 000000 007127' TSTS61 ; failure test table
6015 007056' 000000 007223' TSTS62 ; ...
6016 007057' 000000 007323' TSTS63
6017 007060' 000000 007373' TSTS64
6018 007061' 777777 777777 -1
6019
6020 ; Start test
6021
6022 007062' 201 00 0 00 000000' TG60: MOVEI Z3 ; get address of module start
6023 007063' 260 17 0 00 007011* GO TRACE ; handle trace output
6024 007064' 201 01 0 00 007110' MOVEI 1,T60M ; set up microcode address
6025 007065' 260 17 0 00 007013* GO TLOAD ; load/verify it
6026 007066' 263 17 0 00 000000 RTN ; failed - exit test
6027
6028 ; Initialization
6029
6030 007067' 260 17 0 00 007015* TL60: GO IPACLR ; clear port
6031 007070' 402 00 0 00 007016* SETZM TSTSUB ; initialize subtest number
6032 007071' 201 06 0 00 007104' MOVEI 6,TS60 ; get sstep table address
6033
6034 ; Loop on single step table entries
6035
6036 007072' 400 15 0 00 000000 TA60: SETZ ERFLG, ; clear error flag
6037 007073' 260 17 0 00 007021* GO SEXEC ; execute table entry
6038 007074' 254 00 0 00 007103' JRST TX60 ; end of sstep table
6039 007075' 254 00 0 00 007072' JRST TA60 ; keep looping after call
6040 007076' 474 15 0 00 000000 SETO ERFLG, ; error - end address incorrect
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 111
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0828
6041
6042 ; Handle error printouts and scope looping
6043
6044 007077' 027 00 0 00 007106' SCOPER MA60 ; print error message
6045 007100' 254 00 0 00 007067' JRST TL60 ; loop on error
6046 007101' 254 00 0 00 007103' JRST TX60 ; altmode exit
6047 007102' 322 15 0 00 007072' JUMPE ERFLG,TA60 ; do next sstep table entry
6048
6049 ; End of test
6050
6051 007103' 263 17 0 00 000000 TX60: RTN ; return
6052
6053 ; Single step table, as: (CMD,#Steps,Start addr,End Addr)
6054
6055 007104' 100601 000002 TS60: STABLE (SSSTRT,6,100,2)
6056 007105' 000000 000000 STABLE (SSLAST)
6057
6058 ; Error messages
6059
6060 007106' 140000 011306' MA60: MSG!TXNOT![ASCIZ /TWB did not dispatch to stack address/]
6061 007107' 000000000000# LAST!CALL!TXALL!SSPNT ; print sequencer data
6062
6063 ; Test microcode
6064
6065 007110' 000000 100000 T60M: MWORD <ADDR=0,PUSH,J=10> ; push 1,load ctr 10 (0)
6066 007111' 000000 000100
6067 007112' 000100 100000 MWORD <CJS,J=10> ; gosub 10 (1)
6068 007113' 000000 000020
6069 007114' 000200 000000 MWORD <JRP,ENA,CCOF> ; go to cntr addr (2)
6070 007115' 000400 010160
6071 007116' 000700 000000 MWORD <ADDR=7,CRTN> ; return (to 2) (7)
6072 007117' 000000 000240
6073 007120' 001000 770000 MWORD <TWB,ENA,CCOF,J=77> ; return to 2 (no pop) (10)
6074 007121' 000400 010360
6075 007122' 001100 110000 MWORD <JMAP,J=11> ; error if here (11)
6076 007123' 000000 000040
6077
6078 007124' 010000 000000 MWORD <ADDR=100,JZ> ; initialize stack (100)
6079 007125' 000000 000000
6080 007126' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 112
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0829
6081
6082 ;#********************************************************************
6083 ;* Test 61 - TWB Instruction
6084 ;
6085 ; Description: Verify that the TWB instruction pops the top
6086 ; entry off the stack when TEST is asserted and
6087 ; counter is non-zero, also that the counter is
6088 ; decremented each time.
6089 ;
6090 ; Procedure: Clear Port
6091 ; Load test microcode
6092 ; Set up RAR to start at location 100
6093 ; Set MPRUN/SINGLE STEP (execute JZ,PUSH)
6094 ; Set MPRUN/SINGLE STEP (execute CJS,CJS,CJS,CJS)
6095 ; Set MPRUN/SINGLE STEP (execute TWB,TWB,TWB)
6096 ; Set MPRUN/SINGLE STEP (execute CRTN,JRP)
6097 ; Read LAR, and verify address = 774
6098 ;
6099 ; Failure: ---
6100 ;#********************************************************************
6101
6102 ; Test data
6103
6104 007127' 254 00 0 00 007140' TSTS61: JRST TG61 ; go start test
6105 007130' 240401 000061 SEQ!MPROC!NDMP!ZSEQ!61 ; test mask
6106 007131' 007166' 011260' T61M,,[ASCIZ ^TWB Instruction^]
6107 007132' 010442' 010517' [EXP MLAST!M7],,[EXP M16,M9,M1,MLAST!M8]
6108 007133' 000000 007223' TSTS62 ; failure test table
6109 007134' 000000 007323' TSTS63 ; ...
6110 007135' 000000 007373' TSTS64
6111 007136' 000000 007543' TSTS65
6112 007137' 777777 777777 -1
6113
6114 ; Start test
6115
6116 007140' 201 00 0 00 000000' TG61: MOVEI Z3 ; get address of module start
6117 007141' 260 17 0 00 007063* GO TRACE ; handle trace output
6118 007142' 201 01 0 00 007166' MOVEI 1,T61M ; set up microcode address
6119 007143' 260 17 0 00 007065* GO TLOAD ; load/verify it
6120 007144' 263 17 0 00 000000 RTN ; failed - exit test
6121
6122 ; Initialization
6123
6124 007145' 260 17 0 00 007067* TL61: GO IPACLR ; clear port
6125 007146' 402 00 0 00 007070* SETZM TSTSUB ; initialize subtest number
6126 007147' 201 06 0 00 007162' MOVEI 6,TS61 ; get sstep table address
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 113
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0830
6127
6128 ; Loop on single step table entries
6129
6130 007150' 400 15 0 00 000000 TA61: SETZ ERFLG, ; clear error flag
6131 007151' 260 17 0 00 007073* GO SEXEC ; execute table entry
6132 007152' 254 00 0 00 007161' JRST TX61 ; end of sstep table
6133 007153' 254 00 0 00 007150' JRST TA61 ; keep looping after call
6134 007154' 474 15 0 00 000000 SETO ERFLG, ; error - end address incorrect
6135
6136 ; Handle error printouts and scope looping
6137
6138 007155' 027 00 0 00 007164' SCOPER MA61 ; print error message
6139 007156' 254 00 0 00 007145' JRST TL61 ; loop on error
6140 007157' 254 00 0 00 007161' JRST TX61 ; altmode exit
6141 007160' 322 15 0 00 007150' JUMPE ERFLG,TA61 ; do next sstep table entry
6142
6143 ; End of test
6144
6145 007161' 263 17 0 00 000000 TX61: RTN ; return
6146
6147 ; Single step table, as: (CMD,#Steps,Start addr,End Addr)
6148
6149 007162' 101301 000774 TS61: STABLE (SSSTRT,^D11,100,774)
6150 007163' 000000 000000 STABLE (SSLAST)
6151
6152 ; Error messages
6153
6154 007164' 140000 011316' MA61: MSG!TXNOT![ASCIZ /TWB did not pop correctly or decrement cntr properly/]
6155 007165' 000000000000# LAST!CALL!TXALL!SSPNT ; print sequencer data
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 114
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0831
6156
6157 ; Test microcode
6158
6159 007166' 000007 770000 T61M: MWORD <ADDR=0,PUSH,J=777> ; push 1,load ctr 777 (0)
6160 007167' 000000 000100
6161 007170' 000100 030000 MWORD <CJS,J=3> ; gosub 3 (1)
6162 007171' 000000 000020
6163 007172' 000200 000000 MWORD <JRP,ENA,CCOF> ; go to cntr addr (2)
6164 007173' 000400 010160
6165 007174' 000300 050000 MWORD <CJS,J=5> ; gosub 5 (3)
6166 007175' 000000 000020
6167 007176' 000400 040000 MWORD <JMAP,J=4> ; error if here (4)
6168 007177' 000000 000040
6169 007200' 000500 070000 MWORD <CJS,J=7> ; gosub 7 (5)
6170 007201' 000000 000020
6171 007202' 000600 040000 MWORD <JMAP,J=4> ; error if here (6)
6172 007203' 000000 000040
6173 007204' 000700 110000 MWORD <CJS,J=11> ; gosub 11 (7)
6174 007205' 000000 000020
6175 007206' 001000 100000 MWORD <JMAP,J=10> ; error if here (10)
6176 007207' 000000 000040
6177
6178 007210' 001100 770000 MWORD <TWB,DISA,CCOF,J=77> ; decr cntr/pop stack (11)
6179 007211' 000000 010360
6180 007212' 001200 770000 MWORD <TWB,DISA,CCON,J=77> ; decr cntr/pop stack (12)
6181 007213' 000000 030360
6182 007214' 001300 770000 MWORD <TWB,ENA,CCON,J=77> ; decr cntr/pop stack (13)
6183 007215' 000400 030360
6184 007216' 001400 000000 MWORD <CRTN> ; (14)
6185 007217' 000000 000240
6186
6187 007220' 010000 000000 MWORD <ADDR=100,JZ> ; initialize stack (100)
6188 007221' 000000 000000
6189 007222' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 115
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0832
6190
6191 ;#********************************************************************
6192 ;* Test 62 - TWB Instruction
6193 ;
6194 ; Description: Verify that the TWB instruction pops the top
6195 ; entry off the stack when the counter is zero.
6196 ;
6197 ; Procedure: Clear Port
6198 ; Load test microcode
6199 ; Set up RAR to start at location 100
6200 ; Set MPRUN/SINGLE STEP (execute JZ,5 PUSH's)
6201 ; Set MPRUN/SINGLE STEP (execute 4 TWB's,CRTN)
6202 ; Read LAR, and verify address = 1
6203 ;
6204 ; Failure: ---
6205 ;#********************************************************************
6206
6207 ; Test data
6208
6209 007223' 254 00 0 00 007234' TSTS62: JRST TG62 ; go start test
6210 007224' 240401 000062 SEQ!MPROC!NDMP!ZSEQ!62 ; test mask
6211 007225' 007262' 011260' T62M,,[ASCIZ ^TWB Instruction^]
6212 007226' 010442' 010517' [EXP MLAST!M7],,[EXP M16,M9,M1,MLAST!M8]
6213 007227' 000000 007323' TSTS63 ; failure test table
6214 007230' 000000 007373' TSTS64 ; ...
6215 007231' 000000 007543' TSTS65
6216 007232' 000000 007710' TSTS66
6217 007233' 777777 777777 -1
6218
6219 ; Start test
6220
6221 007234' 201 00 0 00 000000' TG62: MOVEI Z3 ; get address of module start
6222 007235' 260 17 0 00 007141* GO TRACE ; handle trace output
6223 007236' 201 01 0 00 007262' MOVEI 1,T62M ; set up microcode address
6224 007237' 260 17 0 00 007143* GO TLOAD ; load/verify it
6225 007240' 263 17 0 00 000000 RTN ; failed - exit test
6226
6227 ; Initialization
6228
6229 007241' 260 17 0 00 007145* TL62: GO IPACLR ; clear port
6230 007242' 402 00 0 00 007146* SETZM TSTSUB ; initialize subtest number
6231 007243' 201 06 0 00 007256' MOVEI 6,TS62 ; get sstep table address
6232
6233 ; Loop on single step table entries
6234
6235 007244' 400 15 0 00 000000 TA62: SETZ ERFLG, ; clear error flag
6236 007245' 260 17 0 00 007151* GO SEXEC ; execute table entry
6237 007246' 254 00 0 00 007255' JRST TX62 ; end of sstep table
6238 007247' 254 00 0 00 007244' JRST TA62 ; keep looping after call
6239 007250' 474 15 0 00 000000 SETO ERFLG, ; error - end address incorrect
6240
6241 ; Handle error printouts and scope looping
6242
6243 007251' 027 00 0 00 007260' SCOPER MA62 ; print error message
6244 007252' 254 00 0 00 007241' JRST TL62 ; loop on error
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 115-1
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0833
6245 007253' 254 00 0 00 007255' JRST TX62 ; altmode exit
6246 007254' 322 15 0 00 007244' JUMPE ERFLG,TA62 ; do next sstep table entry
6247
6248 ; End of test
6249
6250 007255' 263 17 0 00 000000 TX62: RTN ; return
6251
6252 ; Single step table, as: (CMD,#Steps,Start addr,End Addr)
6253
6254 007256' 101301 000001 TS62: STABLE (SSSTRT,^D11,100,1)
6255 007257' 000000 000000 STABLE (SSLAST)
6256
6257 ; Error messages
6258
6259 007260' 140000 011331' MA62: MSG!TXNOT![ASCIZ /TWB did not do a pop when it should have/]
6260 007261' 000000000000# LAST!CALL!TXALL!SSPNT ; print sequencer data
6261
6262 ; Test microcode
6263
6264 007262' 000000 000000 T62M: MWORD <ADDR=0,PUSH,J=0> ; push 1/zero cntr (0)
6265 007263' 000000 000100
6266 007264' 000100 000000 MWORD <PUSH,J=0> ; push 2/zero cntr (1)
6267 007265' 000000 000100
6268 007266' 000200 000000 MWORD <PUSH,J=0> ; push 3/zero cntr (2)
6269 007267' 000000 000100
6270 007270' 000300 000000 MWORD <PUSH,J=0> ; push 4/zero cntr (3)
6271 007271' 000000 000100
6272 007272' 000400 000000 MWORD <PUSH,J=0> ; push 5/zero cntr (4)
6273 007273' 000000 000100
6274 007274' 000500 700000 MWORD <TWB,ENA,CCON,J=70> ; pop stack,continue (5)
6275 007275' 000400 030360
6276 007276' 000600 100000 MWORD <TWB,ENA,CCOF,J=10> ; pop stack,goto 10 (6)
6277 007277' 000400 010360
6278 007300' 000700 710000 MWORD <JMAP,J=71> ; error if here (7)
6279 007301' 000000 000040
6280 007302' 001000 720000 MWORD <TWB,DISA,CCOF,J=72> ; pop stack,continue (10)
6281 007303' 000000 010360
6282 007304' 001100 730000 MWORD <TWB,DISA,CCON,J=73> ; pop stack,continue (11)
6283 007305' 000000 030360
6284 007306' 001200 000000 MWORD <CRTN> ; return to 1 (12)
6285 007307' 000000 000240
6286 007310' 001300 700000 MWORD <JMAP,J=70> ; error if here (70)
6287 007311' 000000 000040
6288 007312' 001400 710000 MWORD <JMAP,J=71> ; error if here (71)
6289 007313' 000000 000040
6290 007314' 001500 720000 MWORD <JMAP,J=72> ; error if here (72)
6291 007315' 000000 000040
6292 007316' 001600 730000 MWORD <JMAP,J=73> ; error if here (73)
6293 007317' 000000 000040
6294 007320' 010000 000000 MWORD <ADDR=100,JZ> ; initialize stack (100)
6295 007321' 000000 000000
6296 007322' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 116
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0834
6297
6298 ;#********************************************************************
6299 ;* Test 63 - TWB Instruction
6300 ;
6301 ; Description: Verify that the TWB instruction does not pop the
6302 ; stack when the counter is not = 0 and TEST inputs
6303 ; are not satisfied.
6304 ;
6305 ; Procedure: Clear Port
6306 ; Load test microcode
6307 ; Set up RAR to start at location 100
6308 ; Set MPRUN/SINGLE STEP (execute JZ,PUSH,PUSH)
6309 ; Set MPRUN/SINGLE STEP (execute TWB,TWB,TWB)
6310 ; Read LAR, and verify address = 2
6311 ;
6312 ; Failure: ---
6313 ;#********************************************************************
6314
6315 ; Test data
6316
6317 007323' 254 00 0 00 007334' TSTS63: JRST TG63 ; go start test
6318 007324' 240401 000063 SEQ!MPROC!NDMP!ZSEQ!63 ; test mask
6319 007325' 007362' 011260' T63M,,[ASCIZ ^TWB Instruction^]
6320 007326' 010442' 010517' [EXP MLAST!M7],,[EXP M16,M9,M1,MLAST!M8]
6321 007327' 000000 007373' TSTS64 ; failure test table
6322 007330' 000000 007543' TSTS65 ; ...
6323 007331' 000000 007710' TSTS66
6324 007332' 000000 010114' TSTS67
6325 007333' 777777 777777 -1
6326
6327 ; Start test
6328
6329 007334' 201 00 0 00 000000' TG63: MOVEI Z3 ; get address of module start
6330 007335' 260 17 0 00 007235* GO TRACE ; handle trace output
6331 007336' 201 01 0 00 007362' MOVEI 1,T63M ; set up microcode address
6332 007337' 260 17 0 00 007237* GO TLOAD ; load/verify it
6333 007340' 263 17 0 00 000000 RTN ; failed - exit test
6334
6335 ; Initialization
6336
6337 007341' 260 17 0 00 007241* TL63: GO IPACLR ; clear port
6338 007342' 402 00 0 00 007242* SETZM TSTSUB ; initialize subtest number
6339 007343' 201 06 0 00 007356' MOVEI 6,TS63 ; get sstep table address
6340
6341 ; Loop on single step table entries
6342
6343 007344' 400 15 0 00 000000 TA63: SETZ ERFLG, ; clear error flag
6344 007345' 260 17 0 00 007245* GO SEXEC ; execute table entry
6345 007346' 254 00 0 00 007355' JRST TX63 ; end of sstep table
6346 007347' 254 00 0 00 007344' JRST TA63 ; keep looping after call
6347 007350' 474 15 0 00 000000 SETO ERFLG, ; error - end address incorrect
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 117
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0835
6348
6349 ; Handle error printouts and scope looping
6350
6351 007351' 027 00 0 00 007360' SCOPER MA63 ; print error message
6352 007352' 254 00 0 00 007341' JRST TL63 ; loop on error
6353 007353' 254 00 0 00 007355' JRST TX63 ; altmode exit
6354 007354' 322 15 0 00 007344' JUMPE ERFLG,TA63 ; do next sstep table entry
6355
6356 ; End of test
6357
6358 007355' 263 17 0 00 000000 TX63: RTN ; return
6359
6360 ; Single step table, as: (CMD,#Steps,Start addr,End Addr)
6361
6362 007356' 100601 000002 TS63: STABLE (SSSTRT,6,100,2)
6363 007357' 000000 000000 STABLE (SSLAST)
6364
6365 ; Error messages
6366
6367 007360' 140000 011342' MA63: MSG!TXNOT![ASCIZ /TWB popped stack when it shouldn't have/]
6368 007361' 000000000000# LAST!CALL!TXALL!SSPNT ; print sequencer data
6369
6370 ; Test microcode
6371
6372 007362' 000007 770000 T63M: MWORD <ADDR=0,PUSH,J=777> ; push 1/load ctr 777 (0)
6373 007363' 000000 000100
6374 007364' 000107 770000 MWORD <PUSH,J=777> ; push 2/load ctr 777 (1)
6375 007365' 000000 000100
6376 007366' 000200 030000 MWORD <TWB,ENA,CCOF,J=3> ; go to top of stack (2)(2)
6377 007367' 000400 010360
6378 007370' 010000 000000 MWORD <ADDR=100,JZ> ; initialize stack (100)
6379 007371' 000000 000000
6380 007372' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 118
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0836
6381
6382 ;#********************************************************************
6383 ;* Test 64 - Stack Interference Tests
6384 ;
6385 ; Description: Verify that certain instructions do not affect
6386 ; the stack (register/counter nonzero).
6387 ;
6388 ; Procedure: Clear Port
6389 ; Load test microcode
6390 ; Set up RAR to start at location 100
6391 ; Set MPRUN/SINGLE STEP 34 (decimal) times
6392 ; Read LAR, and verify address = 2
6393 ;
6394 ; Failure: ---
6395 ;#********************************************************************
6396
6397 ; Test data
6398
6399 007373' 254 00 0 00 007404' TSTS64: JRST TG64 ; go start test
6400 007374' 240401 000064 SEQ!MPROC!NDMP!ZSEQ!64 ; test mask
6401 007375' 007432' 011352' T64M,,[ASCIZ ^Stack Interference Tests^]
6402 007376' 010442' 010517' [EXP MLAST!M7],,[EXP M16,M9,M1,MLAST!M8]
6403 007377' 000000 007543' TSTS65 ; failure test table
6404 007400' 000000 007710' TSTS66 ; ...
6405 007401' 000000 010114' TSTS67
6406 007402' 000000 010273' TSTS70
6407 007403' 777777 777777 -1
6408
6409 ; Start test
6410
6411 007404' 201 00 0 00 000000' TG64: MOVEI Z3 ; get address of module start
6412 007405' 260 17 0 00 007335* GO TRACE ; handle trace output
6413 007406' 201 01 0 00 007432' MOVEI 1,T64M ; set up microcode address
6414 007407' 260 17 0 00 007337* GO TLOAD ; load/verify it
6415 007410' 263 17 0 00 000000 RTN ; failed - exit test
6416
6417 ; Initialization
6418
6419 007411' 260 17 0 00 007341* TL64: GO IPACLR ; clear port
6420 007412' 402 00 0 00 007342* SETZM TSTSUB ; initialize subtest number
6421 007413' 201 06 0 00 007426' MOVEI 6,TS64 ; get sstep table address
6422
6423 ; Loop on single step table entries
6424
6425 007414' 400 15 0 00 000000 TA64: SETZ ERFLG, ; clear error flag
6426 007415' 260 17 0 00 007345* GO SEXEC ; execute table entry
6427 007416' 254 00 0 00 007425' JRST TX64 ; end of sstep table
6428 007417' 254 00 0 00 007414' JRST TA64 ; keep looping after call
6429 007420' 474 15 0 00 000000 SETO ERFLG, ; error - end address incorrect
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 119
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0837
6430
6431 ; Handle error printouts and scope looping
6432
6433 007421' 027 00 0 00 007430' SCOPER MA64 ; print error message
6434 007422' 254 00 0 00 007411' JRST TL64 ; loop on error
6435 007423' 254 00 0 00 007425' JRST TX64 ; altmode exit
6436 007424' 322 15 0 00 007414' JUMPE ERFLG,TA64 ; do next sstep table entry
6437
6438 ; End of test
6439
6440 007425' 263 17 0 00 000000 TX64: RTN ; return
6441
6442 ; Single step table, as: (CMD,#Steps,Start addr,End Addr)
6443
6444 007426' 104301 000002 TS64: STABLE (SSSTRT,^D35,100,2)
6445 007427' 000000 000000 STABLE (SSLAST)
6446
6447 ; Error messages
6448
6449 007430' 140000 011357' MA64: MSG!TXNOT![ASCIZ /Stack was affected when it shouldn't have been/]
6450 007431' 000000000000# LAST!CALL!TXALL!SSPNT ; print sequencer data
6451
6452 ; Test microcode
6453
6454 007432' 010000 000000 T64M: MWORD <ADDR=100,JZ> ; init PC (100)
6455 007433' 000000 000000
6456 007434' 000007 770000 MWORD <ADDR=0,PUSH,ENA,CCON,J=777> ; ena/on (0)
6457 007435' 000400 030100
6458 007436' 000100 000000 MWORD <PUSH,ENA,CCOF> ; ena/off (1)
6459 007437' 000400 010100
6460 007440' 000200 030000 MWORD <JMAP,DISA,CCOF,J=3> ; disa/off (2)
6461 007441' 000000 010040
6462 007442' 000300 040000 MWORD <JMAP,DISA,CCON,J=4> ; disa/on (3)
6463 007443' 000000 030040
6464 007444' 000400 050000 MWORD <JMAP,ENA,CCOF,J=5> ; ena/off (4)
6465 007445' 000400 010040
6466 007446' 000500 060000 MWORD <JMAP,ENA,CCON,J=6> ; ena/on (5)
6467 007447' 000400 030040
6468 007450' 000600 070000 MWORD <CJP,DISA,CCOF,J=7> ; disa/off (6)
6469 007451' 000000 010060
6470 007452' 000700 100000 MWORD <CJP,DISA,CCON,J=10> ; disa/on (7)
6471 007453' 000000 030060
6472 007454' 001007 770000 MWORD <CJP,ENA,CCOF,J=777> ; ena/off (10)
6473 007455' 000400 010060
6474 007456' 001100 120000 MWORD <CJP,ENA,CCON,J=12> ; ena/on (11)
6475 007457' 000400 030060
6476 007460' 001200 130000 MWORD <CJV,DISA,CCOF,J=13> ; disa/off (12)
6477 007461' 000000 010140
6478 007462' 001300 140000 MWORD <CJV,DISA,CCON,J=14> ; disa/on (13)
6479 007463' 000000 030140
6480 007464' 001407 770000 MWORD <CJV,ENA,CCOF,J=777> ; ena/off (14)
6481 007465' 000400 010140
6482 007466' 001500 160000 MWORD <CJV,ENA,CCON,J=16> ; ena/on (15)
6483 007467' 000400 030140
6484 007470' 001600 170000 MWORD <RPCT,DISA,CCOF,J=17> ; disa/off (16)
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 119-1
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0838
6485 007471' 000000 010220
6486 007472' 001700 200000 MWORD <RPCT,DISA,CCON,J=20> ; disa/on (17)
6487 007473' 000000 030220
6488 007474' 002000 210000 MWORD <RPCT,ENA,CCOF,J=21> ; ena/off (20)
6489 007475' 000400 010220
6490 007476' 002100 220000 MWORD <RPCT,ENA,CCON,J=22> ; ena/on (21)
6491 007477' 000400 030220
6492 007500' 002207 770000 MWORD <CONT,DISA,CCOF,J=777> ; disa/off (22)
6493 007501' 000000 010340
6494 007502' 002307 770000 MWORD <CONT,DISA,CCON,J=777> ; disa/on (23)
6495 007503' 000000 030340
6496 007504' 002407 770000 MWORD <CONT,ENA,CCOF,J=777> ; ena/off (24)
6497 007505' 000400 010340
6498 007506' 002507 770000 MWORD <CONT,ENA,CCON,J=777> ; ena/on (25)
6499 007507' 000400 030340
6500 007510' 002607 770000 MWORD <LDCT,DISA,CCOF,J=777> ; disa/off (26)
6501 007511' 000000 010300
6502 007512' 002707 770000 MWORD <LDCT,DISA,CCON,J=777> ; disa/on (27)
6503 007513' 000000 030300
6504 007514' 003007 770000 MWORD <LDCT,ENA,CCOF,J=777> ; ena/off (30)
6505 007515' 000400 010300
6506 007516' 003100 330000 MWORD <LDCT,ENA,CCON,J=33> ; ena/on (31)
6507 007517' 000400 030300
6508 007520' 003200 330000 MWORD <JRP,ENA,CCOF,J=33> ; ena/off (32)
6509 007521' 000400 010160
6510 007522' 003300 340000 MWORD <JRP,DISA,CCOF,J=34> ; disa/off (33)
6511 007523' 000000 010160
6512 007524' 003400 350000 MWORD <JRP,DISA,CCON,J=35> ; disa/on (34)
6513 007525' 000000 030160
6514 007526' 003500 360000 MWORD <JRP,ENA,CCON,J=36> ; ena/on (35)
6515 007527' 000400 030160
6516 007530' 003607 770000 MWORD <CJS,ENA,CCOF,J=777> ; ena/off (36)
6517 007531' 000400 010020
6518 007532' 003707 770000 MWORD <CRTN,ENA,CCOF,J=777> ; ena/off (37)
6519 007533' 000400 010240
6520 007534' 004007 770000 MWORD <CJPP,ENA,CCOF,J=777> ; ena/off (40)
6521 007535' 000400 010260
6522
6523 007536' 004100 000000 MWORD <CRTN,ENA,CCON> ; ena/on (41)
6524 007537' 000400 030240
6525
6526 007540' 077707 770000 MWORD <ADDR=777,JMAP,J=777> ; error if here (777)
6527 007541' 000000 000040
6528 007542' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 120
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0839
6529
6530 ;#********************************************************************
6531 ;* Test 65 - Stack Interference Tests
6532 ;
6533 ; Description: Verify that certain instructions do not affect
6534 ; the stack (register/counter zero).
6535 ;
6536 ; Procedure: Clear Port
6537 ; Load test microcode
6538 ; Set up RAR to start at location 100
6539 ; Set MPRUN/SINGLE STEP 34 (decimal) times
6540 ; Read LAR, and verify address = 2
6541 ;
6542 ; Failure: ---
6543 ;#********************************************************************
6544
6545 ; Test data
6546
6547 007543' 254 00 0 00 007553' TSTS65: JRST TG65 ; go start test
6548 007544' 240401 000065 SEQ!MPROC!NDMP!ZSEQ!65 ; test mask
6549 007545' 007601' 011352' T65M,,[ASCIZ ^Stack Interference Tests^]
6550 007546' 010442' 010517' [EXP MLAST!M7],,[EXP M16,M9,M1,MLAST!M8]
6551 007547' 000000 007710' TSTS66 ; failure test table
6552 007550' 000000 010114' TSTS67 ; ...
6553 007551' 000000 010273' TSTS70
6554 007552' 777777 777777 -1
6555
6556 ; Start test
6557
6558 007553' 201 00 0 00 000000' TG65: MOVEI Z3 ; get address of module start
6559 007554' 260 17 0 00 007405* GO TRACE ; handle trace output
6560 007555' 201 01 0 00 007601' MOVEI 1,T65M ; set up microcode address
6561 007556' 260 17 0 00 007407* GO TLOAD ; load/verify it
6562 007557' 263 17 0 00 000000 RTN ; failed - exit test
6563
6564 ; Initialization
6565
6566 007560' 260 17 0 00 007411* TL65: GO IPACLR ; clear port
6567 007561' 402 00 0 00 007412* SETZM TSTSUB ; initialize subtest number
6568 007562' 201 06 0 00 007575' MOVEI 6,TS65 ; get sstep table address
6569
6570 ; Loop on single step table entries
6571
6572 007563' 400 15 0 00 000000 TA65: SETZ ERFLG, ; clear error flag
6573 007564' 260 17 0 00 007415* GO SEXEC ; execute table entry
6574 007565' 254 00 0 00 007574' JRST TX65 ; end of sstep table
6575 007566' 254 00 0 00 007563' JRST TA65 ; keep looping after call
6576 007567' 474 15 0 00 000000 SETO ERFLG, ; error - end address incorrect
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 121
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0840
6577
6578 ; Handle error printouts and scope looping
6579
6580 007570' 027 00 0 00 007577' SCOPER MA65 ; print error message
6581 007571' 254 00 0 00 007560' JRST TL65 ; loop on error
6582 007572' 254 00 0 00 007574' JRST TX65 ; altmode exit
6583 007573' 322 15 0 00 007563' JUMPE ERFLG,TA65 ; do next sstep table entry
6584
6585 ; End of test
6586
6587 007574' 263 17 0 00 000000 TX65: RTN ; return
6588
6589 ; Single step table, as: (CMD,#Steps,Start addr,End Addr)
6590
6591 007575' 104201 000002 TS65: STABLE (SSSTRT,^D34,100,2)
6592 007576' 000000 000000 STABLE (SSLAST)
6593
6594 ; Error messages
6595
6596 007577' 140000 011357' MA65: MSG!TXNOT![ASCIZ /Stack was affected when it shouldn't have been/]
6597 007600' 000000000000# LAST!CALL!TXALL!SSPNT ; print sequencer data
6598
6599 ; Test microcode
6600
6601 007601' 010000 000000 T65M: MWORD <ADDR=100,JZ> ; init PC (100)
6602 007602' 000000 000000
6603 007603' 000000 000000 MWORD <ADDR=0,PUSH,ENA,CCON,J=0> ; ena/on (0)
6604 007604' 000400 030100
6605 007605' 000100 000000 MWORD <PUSH,ENA,CCOF> ; ena/off (1)
6606 007606' 000400 010100
6607 007607' 000200 030000 MWORD <JMAP,DISA,CCOF,J=3> ; disa/off (2)
6608 007610' 000000 010040
6609 007611' 000300 040000 MWORD <JMAP,DISA,CCON,J=4> ; disa/on (3)
6610 007612' 000000 030040
6611 007613' 000400 050000 MWORD <JMAP,ENA,CCOF,J=5> ; ena/on (4)
6612 007614' 000400 010040
6613 007615' 000500 060000 MWORD <JMAP,ENA,CCON,J=6> ; ena/off (5)
6614 007616' 000400 030040
6615 007617' 000600 070000 MWORD <CJP,DISA,CCOF,J=7> ; disa/off (6)
6616 007620' 000000 010060
6617 007621' 000700 100000 MWORD <CJP,DISA,CCON,J=10> ; disa/on (7)
6618 007622' 000000 030060
6619 007623' 001007 770000 MWORD <CJP,ENA,CCOF,J=777> ; ena/off (10)
6620 007624' 000400 010060
6621 007625' 001100 120000 MWORD <CJP,ENA,CCON,J=12> ; ena/on (11)
6622 007626' 000400 030060
6623 007627' 001200 130000 MWORD <CJV,DISA,CCOF,J=13> ; disa/off (12)
6624 007630' 000000 010140
6625 007631' 001300 140000 MWORD <CJV,DISA,CCON,J=14> ; disa/on (13)
6626 007632' 000000 030140
6627 007633' 001407 770000 MWORD <CJV,ENA,CCOF,J=777> ; ena/off (14)
6628 007634' 000400 010140
6629 007635' 001500 160000 MWORD <CJV,ENA,CCON,J=16> ; ena/on (15)
6630 007636' 000400 030140
6631 007637' 001607 770000 MWORD <RPCT,DISA,CCOF,J=777> ; disa/off (16)
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 121-1
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0841
6632 007640' 000000 010220
6633 007641' 001707 770000 MWORD <RPCT,DISA,CCON,J=777> ; disa/on (17)
6634 007642' 000000 030220
6635 007643' 002007 770000 MWORD <RPCT,ENA,CCOF,J=777> ; ena/off (20)
6636 007644' 000400 010220
6637 007645' 002107 770000 MWORD <RPCT,ENA,CCON,J=777> ; ena/on (21)
6638 007646' 000400 030220
6639 007647' 002207 770000 MWORD <CONT,DISA,CCOF,J=777> ; disa/off (22)
6640 007650' 000000 010340
6641 007651' 002307 770000 MWORD <CONT,DISA,CCON,J=777> ; disa/on (23)
6642 007652' 000000 030340
6643 007653' 002407 770000 MWORD <CONT,ENA,CCOF,J=777> ; ena/off (24)
6644 007654' 000400 010340
6645 007655' 002507 770000 MWORD <CONT,ENA,CCON,J=777> ; ena/on (25)
6646 007656' 000400 030340
6647 007657' 002600 000000 MWORD <LDCT,DISA,CCOF,J=0> ; disa/off (26)
6648 007660' 000000 010300
6649 007661' 002700 000000 MWORD <LDCT,DISA,CCON,J=0> ; disa/on (27)
6650 007662' 000000 030300
6651 007663' 003000 000000 MWORD <LDCT,ENA,CCOF,J=0> ; ena/off (30)
6652 007664' 000400 010300
6653 007665' 003100 000000 MWORD <LDCT,ENA,CCON,J=0> ; ena/on (31)
6654 007666' 000400 030300
6655 007667' 003200 330000 MWORD <JRP,DISA,CCOF,J=33> ; disa/off (32)
6656 007670' 000000 010160
6657 007671' 003300 340000 MWORD <JRP,DISA,CCON,J=34> ; disa/on (33)
6658 007672' 000000 030160
6659 007673' 003400 350000 MWORD <JRP,ENA,CCON,J=35> ; ena/on (34)
6660 007674' 000400 030160
6661 007675' 003507 770000 MWORD <CJS,ENA,CCOF,J=777> ; ena/off (35)
6662 007676' 000400 010020
6663 007677' 003607 770000 MWORD <CRTN,ENA,CCOF,J=777> ; ena/off (36)
6664 007700' 000400 010240
6665 007701' 003707 770000 MWORD <CJPP,ENA,CCOF,J=777> ; ena/off (37)
6666 007702' 000400 010260
6667
6668 007703' 004000 000000 MWORD <CRTN,ENA,CCON> ; ena/on (40)
6669 007704' 000400 030240
6670
6671 007705' 077707 770000 MWORD <ADDR=777,JMAP,J=777> ; error if here (777)
6672 007706' 000000 000040
6673 007707' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 122
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0842
6674
6675 ;#********************************************************************
6676 ;* Test 66 - Reg/Ctr Interference Tests
6677 ;
6678 ; Description: Verify that certain instructions do not affect
6679 ; the register/counter (which is initially zero).
6680 ;
6681 ; Procedure: Clear Port
6682 ; Load test microcode
6683 ; Set up RAR to start at location 100
6684 ; Set MPRUN/SINGLE STEP 50 (decimal) times
6685 ; Read LAR, and verify address = 0
6686 ;
6687 ; Failure: ---
6688 ;#********************************************************************
6689
6690 ; Test data
6691
6692 007710' 254 00 0 00 007717' TSTS66: JRST TG66 ; go start test
6693 007711' 240401 000066 SEQ!MPROC!NDMP!ZSEQ!66 ; test mask
6694 007712' 007745' 011371' T66M,,[ASCIZ ^Reg/Ctr Interference Tests^]
6695 007713' 010442' 010517' [EXP MLAST!M7],,[EXP M16,M9,M1,MLAST!M8]
6696 007714' 000000 010114' TSTS67 ; failure test table
6697 007715' 000000 010273' TSTS70 ; ...
6698 007716' 777777 777777 -1
6699
6700 ; Start test
6701
6702 007717' 201 00 0 00 000000' TG66: MOVEI Z3 ; get address of module start
6703 007720' 260 17 0 00 007554* GO TRACE ; handle trace output
6704 007721' 201 01 0 00 007745' MOVEI 1,T66M ; set up microcode address
6705 007722' 260 17 0 00 007556* GO TLOAD ; load/verify it
6706 007723' 263 17 0 00 000000 RTN ; failed - exit test
6707
6708 ; Initialization
6709
6710 007724' 260 17 0 00 007560* TL66: GO IPACLR ; clear port
6711 007725' 402 00 0 00 007561* SETZM TSTSUB ; initialize subtest number
6712 007726' 201 06 0 00 007741' MOVEI 6,TS66 ; get sstep table address
6713
6714 ; Loop on single step table entries
6715
6716 007727' 400 15 0 00 000000 TA66: SETZ ERFLG, ; clear error flag
6717 007730' 260 17 0 00 007564* GO SEXEC ; execute table entry
6718 007731' 254 00 0 00 007740' JRST TX66 ; end of sstep table
6719 007732' 254 00 0 00 007727' JRST TA66 ; keep looping after call
6720 007733' 474 15 0 00 000000 SETO ERFLG, ; error - end address incorrect
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 123
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0843
6721
6722 ; Handle error printouts and scope looping
6723
6724 007734' 027 00 0 00 007743' SCOPER MA66 ; print error message
6725 007735' 254 00 0 00 007724' JRST TL66 ; loop on error
6726 007736' 254 00 0 00 007740' JRST TX66 ; altmode exit
6727 007737' 322 15 0 00 007727' JUMPE ERFLG,TA66 ; do next sstep table entry
6728
6729 ; End of test
6730
6731 007740' 263 17 0 00 000000 TX66: RTN ; return
6732
6733 ; Single step table, as: (CMD,#Steps,Start addr,End Addr)
6734
6735 007741' 106201 000000 TS66: STABLE (SSSTRT,^D50,100,0)
6736 007742' 000000 000000 STABLE (SSLAST)
6737
6738 ; Error messages
6739
6740 007743' 140000 011377' MA66: MSG!TXNOT![ASCIZ /Cntr was affected when it shouldn't have been/]
6741 007744' 000000000000# LAST!CALL!TXALL!SSPNT ; print sequencer data
6742
6743 ; Test microcode
6744
6745 007745' 010000 000000 T66M: MWORD <ADDR=100,JZ> ; init PC (100)
6746 007746' 000000 000000
6747 007747' 000000 000000 MWORD <ADDR=0,LDCT,J=0> ; (0)
6748 007750' 000000 000300
6749 007751' 000100 020000 MWORD <JMAP,DISA,CCOF,J=2> ; disa/off (1)
6750 007752' 000000 010040
6751 007753' 000200 030000 MWORD <JMAP,DISA,CCON,J=3> ; disa/on (2)
6752 007754' 000000 030040
6753 007755' 000300 040000 MWORD <JMAP,ENA,CCOF,J=4> ; ena/off (3)
6754 007756' 000400 010040
6755 007757' 000400 050000 MWORD <JMAP,ENA,CCON,J=5> ; ena/on (4)
6756 007760' 000400 030040
6757 007761' 000500 060000 MWORD <CJS,DISA,CCOF,J=6> ; disa/off (5)
6758 007762' 000000 010020
6759 007763' 000600 070000 MWORD <CJS,DISA,CCON,J=7> ; disa/on (6)
6760 007764' 000000 030020
6761 007765' 000707 770000 MWORD <CJS,ENA,CCOF,J=777> ; ena/off (7)
6762 007766' 000400 010020
6763 007767' 001000 110000 MWORD <CJS,ENA,CCON,J=11> ; ena/on (10)
6764 007770' 000400 030020
6765 007771' 001100 120000 MWORD <CJP,DISA,CCOF,J=12> ; disa/off (11)
6766 007772' 000000 010060
6767 007773' 001200 130000 MWORD <CJP,DISA,CCON,J=13> ; disa/on (12)
6768 007774' 000000 030060
6769 007775' 001307 770000 MWORD <CJP,ENA,CCOF,J=777> ; ena/off (13)
6770 007776' 000400 010060
6771 007777' 001400 150000 MWORD <CJP,ENA,CCON,J=15> ; ena/on (14)
6772 010000' 000400 030060
6773 010001' 001507 770000 MWORD <PUSH,ENA,CCOF,J=777> ; ena/off (15)
6774 010002' 000400 010100
6775 010003' 001600 170000 MWORD <JSRP,DISA,CCOF,J=17> ; disa/off (16)
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 123-1
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0844
6776 010004' 000000 010120
6777 010005' 001700 200000 MWORD <JSRP,DISA,CCON,J=20> ; disa/on (17)
6778 010006' 000000 030120
6779 010007' 002000 210000 MWORD <JSRP,ENA,CCON,J=21> ; ena/on (20)
6780 010010' 000400 030120
6781 010011' 002100 220000 MWORD <CJV,DISA,CCOF,J=22> ; disa/off (21)
6782 010012' 000000 010140
6783 010013' 002200 230000 MWORD <CJV,DISA,CCON,J=23> ; disa/on (22)
6784 010014' 000000 030140
6785 010015' 002307 770000 MWORD <CJV,ENA,CCOF,J=777> ; ena/off (23)
6786 010016' 000400 010140
6787 010017' 002400 250000 MWORD <CJV,ENA,CCON,J=25> ; ena/on (24)
6788 010020' 000400 030140
6789 010021' 002500 260000 MWORD <JRP,DISA,CCOF,J=26> ; disa/off (25)
6790 010022' 000000 010160
6791 010023' 002600 270000 MWORD <JRP,DISA,CCON,J=27> ; disa/on (26)
6792 010024' 000000 030160
6793 010025' 002700 300000 MWORD <JRP,ENA,CCON,J=30> ; ena/on (27)
6794 010026' 000400 030160
6795 010027' 003007 770000 MWORD <RFCT,DISA,CCOF,J=777> ; disa/off (30)
6796 010030' 000000 010200
6797 010031' 003107 770000 MWORD <RFCT,DISA,CCON,J=777> ; disa/on (31)
6798 010032' 000000 030200
6799 010033' 003207 770000 MWORD <RFCT,ENA,CCOF,J=777> ; ena/off (32)
6800 010034' 000400 010200
6801 010035' 003307 770000 MWORD <RFCT,ENA,CCON,J=777> ; ena/on (33)
6802 010036' 000400 030200
6803 010037' 003407 770000 MWORD <RPCT,DISA,CCOF,J=777> ; disa/off (34)
6804 010040' 000000 010220
6805 010041' 003507 770000 MWORD <RPCT,DISA,CCON,J=777> ; disa/on (35)
6806 010042' 000000 030220
6807 010043' 003607 770000 MWORD <RPCT,ENA,CCOF,J=777> ; ena/off (36)
6808 010044' 000400 010220
6809 010045' 003707 770000 MWORD <RPCT,ENA,CCON,J=777> ; ena/on (37)
6810 010046' 000400 030220
6811 010047' 004007 770000 MWORD <CRTN,ENA,CCOF,J=777> ; ena/off (40)
6812 010050' 000400 010240
6813 010051' 004100 420000 MWORD <CJPP,DISA,CCOF,J=42> ; disa/off (41)
6814 010052' 000000 010260
6815 010053' 004200 430000 MWORD <CJPP,DISA,CCON,J=43> ; disa/on (42)
6816 010054' 000000 030260
6817 010055' 004307 770000 MWORD <CJPP,ENA,CCOF,J=777> ; ena/off (43)
6818 010056' 000400 010260
6819 010057' 004400 450000 MWORD <CJPP,ENA,CCON,J=45> ; ena/on (44)
6820 010060' 000400 030260
6821 010061' 004507 770000 MWORD <LOOP,DISA,CCOF,J=777> ; disa/off (45)
6822 010062' 000000 010320
6823 010063' 004607 770000 MWORD <LOOP,DISA,CCON,J=777> ; disa/on (46)
6824 010064' 000000 030320
6825 010065' 004707 770000 MWORD <LOOP,ENA,CCON,J=777> ; ena/on (47)
6826 010066' 000400 030320
6827 010067' 005007 770000 MWORD <CONT,DISA,CCOF,J=777> ; disa/off (50)
6828 010070' 000000 010340
6829 010071' 005107 770000 MWORD <CONT,DISA,CCON,J=777> ; disa/on (51)
6830 010072' 000000 030340
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 123-2
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0845
6831 010073' 005207 770000 MWORD <CONT,ENA,CCOF,J=777> ; ena/off (52)
6832 010074' 000400 010340
6833 010075' 005307 770000 MWORD <CONT,ENA,CCON,J=777> ; ena/on (53)
6834 010076' 000400 030340
6835 010077' 005407 770000 MWORD <TWB,DISA,CCOF,J=777> ; disa/off (54)
6836 010100' 000000 010360
6837 010101' 005507 770000 MWORD <TWB,DISA,CCON,J=777> ; disa/on (55)
6838 010102' 000000 030360
6839 010103' 005600 570000 MWORD <TWB,ENA,CCOF,J=57> ; ena/off (56)
6840 010104' 000400 010360
6841 010105' 005707 770000 MWORD <TWB,ENA,CCON,J=777> ; ena/on (57)
6842 010106' 000400 030360
6843
6844 010107' 006007 770000 MWORD <JRP,ENA,CCOF,J=777> ; ena/off (60)
6845 010110' 000400 010160
6846
6847 010111' 077707 770000 MWORD <ADDR=777,JMAP,J=777> ; error if here (777)
6848 010112' 000000 000040
6849 010113' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 124
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0846
6850
6851 ;#********************************************************************
6852 ;* Test 67 - Reg/Ctr Interference Tests
6853 ;
6854 ; Description: Verify that certain instructions do not affect
6855 ; the register/counter (initially non-zero).
6856 ;
6857 ; Procedure: Clear Port
6858 ; Load test microcode
6859 ; Set up RAR to start at location 100
6860 ; Set MPRUN/SINGLE STEP 39 (decimal) times
6861 ; Read LAR, and verify address = 77
6862 ;
6863 ; Failure: ---
6864 ;#********************************************************************
6865
6866 ; Test data
6867
6868 010114' 254 00 0 00 010122' TSTS67: JRST TG67 ; go start test
6869 010115' 240401 000067 SEQ!MPROC!NDMP!ZSEQ!67 ; test mask
6870 010116' 010150' 011371' T67M,,[ASCIZ ^Reg/Ctr Interference Tests^]
6871 010117' 010442' 010517' [EXP MLAST!M7],,[EXP M16,M9,M1,MLAST!M8]
6872 010120' 000000 010273' TSTS70 ; failure test table
6873 010121' 777777 777777 -1 ; ...
6874
6875 ; Start test
6876
6877 010122' 201 00 0 00 000000' TG67: MOVEI Z3 ; get address of module start
6878 010123' 260 17 0 00 007720* GO TRACE ; handle trace output
6879 010124' 201 01 0 00 010150' MOVEI 1,T67M ; set up microcode address
6880 010125' 260 17 0 00 007722* GO TLOAD ; load/verify it
6881 010126' 263 17 0 00 000000 RTN ; failed - exit test
6882
6883 ; Initialization
6884
6885 010127' 260 17 0 00 007724* TL67: GO IPACLR ; clear port
6886 010130' 402 00 0 00 007725* SETZM TSTSUB ; initialize subtest number
6887 010131' 201 06 0 00 010144' MOVEI 6,TS67 ; get sstep table address
6888
6889 ; Loop on single step table entries
6890
6891 010132' 400 15 0 00 000000 TA67: SETZ ERFLG, ; clear error flag
6892 010133' 260 17 0 00 007730* GO SEXEC ; execute table entry
6893 010134' 254 00 0 00 010143' JRST TX67 ; end of sstep table
6894 010135' 254 00 0 00 010132' JRST TA67 ; keep looping after call
6895 010136' 474 15 0 00 000000 SETO ERFLG, ; error - end address incorrect
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 125
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0847
6896
6897 ; Handle error printouts and scope looping
6898
6899 010137' 027 00 0 00 010146' SCOPER MA67 ; print error message
6900 010140' 254 00 0 00 010127' JRST TL67 ; loop on error
6901 010141' 254 00 0 00 010143' JRST TX67 ; altmode exit
6902 010142' 322 15 0 00 010132' JUMPE ERFLG,TA67 ; do next sstep table entry
6903
6904 ; End of test
6905
6906 010143' 263 17 0 00 000000 TX67: RTN ; return
6907
6908 ; Single step table, as: (CMD,#Steps,Start addr,End Addr)
6909
6910 010144' 104601 100077 TS67: STABLE (SSSTRT,^D38,110,77)
6911 010145' 000000 000000 STABLE (SSLAST)
6912
6913 ; Error messages
6914
6915 010146' 140000 011377' MA67: MSG!TXNOT![ASCIZ /Cntr was affected when it shouldn't have been/]
6916 010147' 000000000000# LAST!CALL!TXALL!SSPNT ; print sequencer data
6917
6918 ; Test microcode
6919
6920 010150' 011000 000000 T67M: MWORD <ADDR=110,JZ> ; init PC (110)
6921 010151' 000000 000000
6922 010152' 000000 770000 MWORD <ADDR=0,LDCT,J=77> ; (0)
6923 010153' 000000 000300
6924 010154' 000100 020000 MWORD <JMAP,DISA,CCOF,J=2> ; disa/off (1)
6925 010155' 000000 010040
6926 010156' 000200 030000 MWORD <JMAP,DISA,CCON,J=3> ; disa/on (2)
6927 010157' 000000 030040
6928 010160' 000300 040000 MWORD <JMAP,ENA,CCOF,J=4> ; ena/off (3)
6929 010161' 000400 010040
6930 010162' 000400 050000 MWORD <JMAP,ENA,CCON,J=5> ; ena/on (4)
6931 010163' 000400 030040
6932 010164' 000500 060000 MWORD <CJS,DISA,CCOF,J=6> ; disa/off (5)
6933 010165' 000000 010020
6934 010166' 000600 070000 MWORD <CJS,DISA,CCON,J=7> ; disa/on (6)
6935 010167' 000000 030020
6936 010170' 000707 770000 MWORD <CJS,ENA,CCOF,J=777> ; ena/off (7)
6937 010171' 000400 010020
6938 010172' 001000 110000 MWORD <CJS,ENA,CCON,J=11> ; ena/on (10)
6939 010173' 000400 030020
6940 010174' 001100 120000 MWORD <CJP,DISA,CCOF,J=12> ; disa/off (11)
6941 010175' 000000 010060
6942 010176' 001200 130000 MWORD <CJP,DISA,CCON,J=13> ; disa/on (12)
6943 010177' 000000 030060
6944 010200' 001307 770000 MWORD <CJP,ENA,CCOF,J=777> ; ena/off (13)
6945 010201' 000400 010060
6946 010202' 001400 150000 MWORD <CJP,ENA,CCON,J=15> ; ena/on (14)
6947 010203' 000400 030060
6948 010204' 001507 770000 MWORD <PUSH,ENA,CCOF,J=777> ; disa/on (15)
6949 010205' 000400 010100
6950 010206' 001600 170000 MWORD <JSRP,DISA,CCOF,J=17> ; disa/off (16)
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 125-1
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0848
6951 010207' 000000 010120
6952 010210' 001700 200000 MWORD <JSRP,DISA,CCON,J=20> ; disa/on (17)
6953 010211' 000000 030120
6954 010212' 002000 210000 MWORD <JSRP,ENA,CCON,J=21> ; ena/on (20)
6955 010213' 000400 030120
6956 010214' 002100 220000 MWORD <CJV,DISA,CCOF,J=22> ; disa/off (21)
6957 010215' 000000 010140
6958 010216' 002200 230000 MWORD <CJV,DISA,CCON,J=23> ; disa/on (22)
6959 010217' 000000 030140
6960 010220' 002307 770000 MWORD <CJV,ENA,CCOF,J=777> ; ena/off (23)
6961 010221' 000400 010140
6962 010222' 002400 250000 MWORD <CJV,ENA,CCON,J=25> ; ena/on (24)
6963 010223' 000400 030140
6964 010224' 002500 260000 MWORD <JRP,DISA,CCOF,J=26> ; disa/off (25)
6965 010225' 000000 010160
6966 010226' 002600 270000 MWORD <JRP,DISA,CCON,J=27> ; disa/on (26)
6967 010227' 000000 030160
6968 010230' 002700 300000 MWORD <JRP,ENA,CCON,J=30> ; ena/on (27)
6969 010231' 000400 030160
6970 010232' 003007 770000 MWORD <CRTN,ENA,CCOF,J=777> ; ena/off (30)
6971 010233' 000400 010240
6972 010234' 003100 320000 MWORD <CJPP,DISA,CCOF,J=32> ; disa/off (31)
6973 010235' 000000 010260
6974 010236' 003200 330000 MWORD <CJPP,DISA,CCON,J=33> ; disa/on (32)
6975 010237' 000000 030260
6976 010240' 003307 770000 MWORD <CJPP,ENA,CCOF,J=777> ; ena/off (33)
6977 010241' 000400 010260
6978 010242' 003400 350000 MWORD <CJPP,ENA,CCON,J=35> ; ena/on (34)
6979 010243' 000400 030260
6980 010244' 003507 770000 MWORD <LOOP,DISA,CCOF,J=777> ; disa/off (35)
6981 010245' 000000 010320
6982 010246' 003607 770000 MWORD <LOOP,DISA,CCON,J=777> ; disa/on (36)
6983 010247' 000000 030320
6984 010250' 003707 770000 MWORD <LOOP,ENA,CCON,J=777> ; ena/on (37)
6985 010251' 000400 030320
6986 010252' 004007 770000 MWORD <CONT,DISA,CCOF,J=777> ; disa/off (40)
6987 010253' 000000 010340
6988 010254' 004107 770000 MWORD <CONT,DISA,CCON,J=777> ; disa/on (41)
6989 010255' 000000 030340
6990 010256' 004207 770000 MWORD <CONT,ENA,CCOF,J=777> ; ena/off (42)
6991 010257' 000400 010340
6992 010260' 004307 770000 MWORD <CONT,ENA,CCON,J=777> ; ena/on (43)
6993 010261' 000400 030340
6994 010262' 004407 770000 MWORD <JRP,ENA,CCOF,J=777> ; disa/off (44)
6995 010263' 000400 010160
6996
6997 010264' 007701 000000 MWORD <ADDR=77,JMAP,J=100> ; done (77)
6998 010265' 000000 000040
6999 010266' 010001 000000 MWORD <JMAP,J=100> ; error if here (100)
7000 010267' 000000 000040
7001 010270' 077707 770000 MWORD <ADDR=777,JMAP,J=777> ; error if here (777)
7002 010271' 000000 000040
7003 010272' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 126
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0849
7004
7005 ;#********************************************************************
7006 ;* TEST 70 - Full Speed Sequencer Test
7007 ;
7008 ; Description: Load entire CRAM with 'CONT,JMAP, and JMAP with
7009 ; bad parity' sequences. Then start it up at full
7010 ; speed and let it run for 2 seconds. Then stop
7011 ; and verify that no CRAM PE occurred.
7012 ;
7013 ; Procedure: Clear Port
7014 ; Load microcode/set start address 1
7015 ; Start microcode (will halt with a parity error at
7016 ; if the test fails).
7017 ;
7018 ; The microcode does a CONT
7019 ; JMAP .+2
7020 ; JMAP . (bad parity)
7021 ; ....
7022 ;
7023 ; All microinstructions that do a jump or continue
7024 ; are used in addition to CONT and JMAP.
7025 ;
7026 ; Failure: ---
7027 ;#********************************************************************
7028
7029 ; Test data
7030
7031 010273' 254 00 0 00 010300' TSTS70: JRST TG70 ; go start test
7032 010274' 240401 000070 SEQ!MPROC!NDMP!ZSEQ!70 ; test mask
7033 010275' 000000 011411' 0,,[ASCIZ ^Full Speed Sequencer Test^]
7034 010276' 010442' 010517' [EXP MLAST!M7],,[EXP M16,M9,M1,MLAST!M8]
7035 010277' 777777 777777 -1 ; failure test table
7036
7037 ; Start test
7038
7039 010300' 201 00 0 00 000000' TG70: MOVEI Z3 ; get address of module start
7040 010301' 260 17 0 00 010123* GO TRACE ; handle trace output
7041
7042 ; Load microcode
7043
7044 010302' 260 17 0 00 010127* GO IPACLR ; issue a port clear
7045 010303' 260 17 0 00 010366' GO T70LOD ; load microcode
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 127
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0850
7046
7047 ; 1st segment of test (Segment A) - Start up port
7048
7049 010304' 400 15 0 00 000000 TA70: SETZ ERFLG, ; clear error flag
7050 010305' 201 00 0 00 000001 MOVEI 1 ; set subtest number
7051 010306' 202 00 0 00 010130* MOVEM TSTSUB ; to 1
7052 010307' 260 17 0 00 010302* GO IPACLR ; issue a port clear
7053 010310' 201 00 0 00 000001 MOVEI 1 ; get a 1
7054 010311' 202 00 0 00 000000* MOVEM SNEXT ; set up start location
7055 010312' 201 00 0 00 000010 MOVEI 10 ; get a 10
7056 010313' 202 00 0 00 000000* MOVEM SDATA ; set up start CSR data
7057 010314' 260 17 0 00 000000* GO IPASRT ; start up the port
7058 010315' 474 15 0 00 000000 SETO ERFLG, ; failed - error reading/writing CSR
7059 010316' 474 15 0 00 000000 SETO ERFLG, ; failed - port already running
7060 010317' 474 15 0 00 000000 SETO ERFLG, ; failed - error bits set in CSR
7061 010320' 027 00 0 00 010340' SCOPER MA70 ; print error message
7062 010321' 254 00 0 00 010304' JRST TA70 ; loop on error
7063 010322' 254 00 0 00 010337' JRST TX70 ; altmode exit
7064 010323' 326 15 0 00 010337' JUMPN ERFLG,TX70 ; error already - exit test
7065
7066 ; 1st segment of test (Segment A) - Check if CRAM PE set after 2 seconds
7067
7068 010324' 350 00 0 00 010306* AOS TSTSUB ; increment subtest number
7069 010325' 201 00 0 00 003720 MOVEI ^D2000 ; wait 2 seconds
7070 010326' 336 00 0 00 000000* SKIPN UDEBUG ; debug mode?
7071 010327' 260 17 0 00 000000* GO ODELAY ; no - do the wait
7072 010330' 260 17 0 00 000000* GO RDCSR ; read CSR
7073 010331' 474 15 0 00 000000 SETO ERFLG, ; failed - couldn't read CSR
7074 010332' 603 01 0 00 004000 TLNE 1,(CRAMPE) ; got a CRAM PE?
7075 010333' 474 15 0 00 000000 SETO ERFLG, ; yes - set error flag
7076 010334' 027 00 0 00 010352' SCOPER MB70 ; print error message
7077 010335' 254 00 0 00 010304' JRST TA70 ; loop on error
7078 010336' 254 00 0 00 010337' JRST TX70 ; altmode exit
7079
7080 ; End of test
7081
7082 010337' 263 17 0 00 000000 TX70: RTN ; return
7083
7084 ; Error message - Microcode did not stop start up correctly
7085
7086 010340' 140000 011417' MA70: MSG!TXNOT![ASCIZ /Couldn't successfully start the port/]
7087 010341' 270000 010342' LAST!CALL!TXALL!MA70P1
7088
7089 010342' 260 17 0 00 010330* MA70P1: GO RDCSR ; get CSR contents
7090 010343' 255 00 0 00 000000 JFCL ; error
7091 010344' 202 01 0 00 012215' MOVEM 1,SAVCSR# ; save it
7092 010345' 200 01 0 00 012215' MOVE 1,SAVCSR ; get CSR data
7093 010346' 201 02 0 00 000023 MOVEI 2,^D19 ; character count so far
7094 010347' 201 03 0 00 000023 MOVEI 3,^D19 ; continuation line column number
7095 010350' 260 17 0 00 000000* GO CSRPNT ; go print in English
7096 010351' 263 17 0 00 000000 RTN ; return
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 128
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0851
7097
7098 ; Error message - CRAM PE set in CSR register
7099
7100 010352' 140000 011427' MB70: MSG!TXNOT![ASCIZ /2910 missed a jump or did a continue incorrectly/]
7101 010353' 260000 010342' CALL!TXALL!MA70P1
7102 010354' 270000 010355' LAST!CALL!TXALL!MA70P2
7103
7104 010355' 260 17 0 00 010307* MA70P2: GO IPACLR ; do a port clear
7105 010356' 260 17 0 00 000000* GO SETLAR ; set 'DIAG Sel LAR/SQR'
7106 010357' 255 00 0 00 000000 JFCL ; error accessing CSR
7107 010360' 260 17 0 00 000000* GO RDLAR ; read LAR
7108 010361' 037 00 0 00 011441' TMSGC <LAR (location with CRAM PE): >
7109 010362' 242 01 0 00 777777 LSH 1,-1
7110 010363' 200 00 0 00 000001 MOVE 1
7111 010364' 037 04 0 00 000000 PNT4
7112 010365' 263 17 0 00 000000 RTN
7113
7114 ; Routine to load CRAM locations
7115
7116 010366' 477 06 0 00 000007 T70LOD: SETOB 6,7 ; initialize CONT,JMAP pointers
7117 010367' 476 00 0 00 000000* SETOM CADDR ; initialize CRAM address
7118 010370' 402 00 0 00 000000* SETZM CWORDL ; initialize left half
7119 010371' 402 00 0 00 000000* SETZM CWORDR ; initialize right half
7120 010372' 350 01 0 00 010367* T70LO1: AOS 1,CADDR ; increment CRAM address
7121 010373' 301 01 0 00 007777 CAIL 1,7777 ; done yet?
7122 010374' 263 17 0 00 000000 RTN ; yes - return
7123 010375' 261 17 0 00 000000* PUT PARFLG ; save state of parity flag
7124 010376' 476 00 0 00 010375* SETOM PARFLG ; calculate good parity
7125 010377' 350 00 0 00 000006 AOS 6 ; increment CONT pointer
7126 010400' 303 06 0 00 000001 CAILE 6,1 ; done with 2 of them?
7127 010401' 400 06 0 00 000000 SETZ 6, ; yes - re-initialize
7128 010402' 350 00 0 00 000007 AOS 7 ; increment JMAP pointer
7129 010403' 303 07 0 00 000006 CAILE 7,6 ; done with 7 of them?
7130 010404' 400 07 0 00 000000 SETZ 7, ; yes - re-initialize
7131
7132 ; First store the CONT instruction
7133
7134 010405' 271 01 0 00 000002 ADDI 1,2 ; point to bad location
7135 010406' 137 01 0 00 011450' DPB 1,[POINT 12,CWORDL,17] ; insert J field
7136 MOVE [4 ; get CONT type instruction
7137 010407' 200 00 0 06 011451' 14](6)
7138 010410' 137 00 0 00 011453' DPB [POINT 4,CWORDR,31] ; insert CTL field
7139 010411' 260 17 0 00 000000* GO DWCRAM ; load it
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page 129
DFPTA3 MAC 23-Apr-83 22:26 MP Control Module: 2910 Basic Instruction Tests SEQ 0852
7140
7141 ; Now the first JMAP
7142
7143 010412' 350 01 0 00 010372* AOS 1,CADDR ; increment CRAM address
7144 010413' 271 01 0 00 000002 ADDI 1,2 ; point to next CONT
7145 010414' 306 01 0 00 007777 CAIN 1,7777 ; at last location?
7146 010415' 400 01 0 00 000000 SETZ 1, ; yes - make jump field point to 0
7147 010416' 137 01 0 00 011450' DPB 1,[POINT 12,CWORDL,17] ; insert J field
7148 MOVE [1 ; get JMAP type instruction
7149 2
7150 3
7151 5
7152 6
7153 7
7154 010417' 200 00 0 07 011454' 11](7)
7155 010420' 137 00 0 00 011453' DPB [POINT 4,CWORDR,31] ; insert CTL field
7156 010421' 260 17 0 00 010411* GO DWCRAM ; load it
7157
7158 ; Now the 2nd JMAP (with bad parity)
7159
7160 010422' 350 01 0 00 010412* AOS 1,CADDR ; increment CRAM address
7161 010423' 137 01 0 00 011450' DPB 1,[POINT 12,CWORDL,17] ; insert J field
7162 010424' 201 00 0 00 000002 MOVEI 2 ; get JMAP instruction
7163 010425' 137 00 0 00 011453' DPB [POINT 4,CWORDR,31] ; insert CTL field
7164 010426' 474 01 0 00 000000 SETO 1, ; set 'force bad parity' flag
7165 010427' 200 02 0 00 010370* MOVE 2,CWORDL ; get left half
7166 010430' 200 03 0 00 010371* MOVE 3,CWORDR ; get right half
7167 010431' 260 17 0 00 000000* GO CALPAR ; insert parity
7168 010432' 402 00 0 00 010376* SETZM PARFLG ; don't calculate parity
7169 010433' 260 17 0 00 010421* GO DWCRAM ; load it
7170 010434' 262 17 0 00 010432* GET PARFLG ; restore state of parity flag
7171 010435' 254 00 0 00 010372' JRST T70LO1 ; do next set of locations
7172
7173
7174 ;#********************************************************************
7175 ; End of MPROC Module Sequencer Tests
7176 ;#********************************************************************
7177
7178 XLIST
7179
NO ERRORS DETECTED
PROGRAM BREAK IS 012216
CPU TIME USED 05:21.025
149P CORE USED
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page S-1
DFPTA3 MAC 23-Apr-83 22:26 SYMBOL TABLE SEQ 0853
CADDR 010422' ext MA47 004747' T11M 001024' T70LOD 010366'
CALL 200000 000000 spd MA5 000501' T12M 001072' T7M 000701'
CALPAR 010431' ext MA50 005037' T13M 001152' TA1 000017'
CRAMPE 004000 000000 spd MA51 005423' T14M 001222' TA10 000733'
CSRPNT 010350' ext MA52 005516' T15M 001326' TA11 001006'
CWORDL 011450' ext MA53 005742' T16M 001520' TA12 001054'
CWORDR 011453' ext MA54 006332' T17M 001712' TA13 001134'
DATPAT 012214' MA55 006434' T1M 000130' TA14 001204'
DWCRAM 010433' ext MA56 006744' T20M 002106' TA15 001310'
E17 000021 spd MA57 007034' T21M 002276' TA16 001502'
ERFLG 000015 MA6 000624' T22M 002472' TA17 001674'
GET 262740 000000 MA60 007106' T23M 002550' TA2 000162'
GO 260740 000000 MA61 007164' T24M 002630' TA20 002070'
IPACLR 010355' ext MA62 007260' T25M 002712' TA21 002260'
IPASRT 010314' ext MA63 007360' T26M 002776' TA22 002454'
LAST 010000 000000 spd MA64 007430' T2M 000203' TA23 002532'
M1 000031 spd MA65 007577' T30M 003071' TA24 002612'
M16 000050 spd MA66 007743' T31M 003161' TA25 002674'
M7 000037 spd MA67 010146' T32M 003275' TA26 002760'
M8 000040 spd MA7 000677' T33M 003353' TA3 000247'
M9 000041 spd MA70 010340' T34M 003417' TA30 003053'
MA1 000126' MA70P1 010342' T35M 003503' TA31 003143'
MA10 000752' MA70P2 010355' T36M 003745' TA32 003257'
MA11 001022' MB70 010352' T37M 004037' TA33 003335'
MA12 001070' MBCN 000016 T3M 000270' TA34 003401'
MA13 001150' MLAST 400000 000000 spd T40M 004135' TA35 003465'
MA14 001220' MPROC 200000 000000 spd T41M 004235' TA36 003727'
MA15 001324' MSG 100000 000000 spd T42M 004320' TA37 004021'
MA16 001516' NDMP 000400 000000 spd T43M 004414' TA4 000350'
MA17 001710' ODELAY 010327' ext T44M 004506' TA40 004117'
MA2 000201' P 000017 T45M 004567' TA41 004217'
MA20 002104' PARFLG 010434' ext T46M 004655' TA42 004277'
MA21 002274' PNT4 037200 000000 T47M 004751' TA43 004376'
MA22 002470' PNTMSG 037000 000000 T4M 000371' TA44 004470'
MA23 002546' PORTCI 000117' ext T50M 005041' TA45 004550'
MA24 002626' PORTNI 000115' ext T51M 005425' TA46 004637'
MA25 002710' PUT 261740 000000 T52M 005520' TA47 004733'
MA26 002774' RDCSR 010342' ext T53LOD 005720' TA5 000451'
MA3 000266' RDLAR 010360' ext T53M 005744' TA50 005023'
MA30 003067' RTN 263740 000000 T53MM 005726' TA51 005407'
MA31 003157' SAVCSR 012215' T54M 006334' TA52 005477'
MA32 003273' SCOPER 027000 000000 T55M 006436' TA53 005675'
MA33 003351' SDATA 010313' ext T56M 006746' TA54 006316'
MA34 003415' SEQ 040000 000000 spd T57M 007036' TA55 006420'
MA35 003501' SETLAR 010356' ext T5M 000503' TA56 006730'
MA36 003743' SEXEC 010133' ext T60M 007110' TA57 007020'
MA37 004035' SNEXT 010311' ext T61M 007166' TA6 000605'
MA4 000367' SSCALL 000003 spd T62M 007262' TA60 007072'
MA40 004133' SSCHK 000004 spd T63M 007362' TA61 007150'
MA41 004233' SSCONT 000002 spd T64M 007432' TA62 007244'
MA42 004316' SSJRST 000005 spd T65M 007601' TA63 007344'
MA43 004412' SSLAST 000000 spd T66M 007745' TA64 007414'
MA44 004504' SSPNT 000000 ext T67M 010150' TA65 007563'
MA45 004565' SSSTRT 000001 spd T6M 000626' TA66 007727'
MA46 004653' T10M 000754' T70LO1 010372' TA67 010132'
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page S-2
DFPTA3 MAC 23-Apr-83 22:26 SYMBOL TABLE SEQ 0854
TA7 000660' TG7 000650' TL7 000655' TS64 007426'
TA70 010304' TG70 010300' TLOAD 010125' ext TS65 007575'
TG1 000011' TL1 000013' TRACE 010301' ext TS66 007741'
TG10 000723' TL10 000730' TS1 000031' TS67 010144'
TG11 000776' TL11 001003' TS10 000745' TS7 000672'
TG12 001044' TL12 001051' TS11 001020' TSLOD1 000116' ext
TG13 001124' TL13 001131' TS12 001066' TSLOD2 000120' ext
TG14 001174' TL14 001201' TS13 001146' TSTS1 000000' ent
TG15 001300' TL15 001305' TS14 001216' TSTS10 000712' ent
TG16 001472' TL16 001477' TS15 001322' TSTS11 000765' ent
TG17 001664' TL17 001671' TS16 001514' TSTS12 001033' ent
TG2 000152' TL2 000157' TS17 001706' TSTS13 001113' ent
TG20 002060' TL20 002065' TS1CHK 000041' TSTS14 001163' ent
TG21 002250' TL21 002255' TS1LOD 000100' TSTS15 001267' ent
TG22 002444' TL22 002451' TS1PAT 000047' TSTS16 001461' ent
TG23 002522' TL23 002527' TS2 000174' TSTS17 001653' ent
TG24 002602' TL24 002607' TS20 002102' TSTS2 000141' ent
TG25 002664' TL25 002671' TS21 002272' TSTS20 002047' ent
TG26 002750' TL26 002755' TS22 002466' TSTS21 002237' ent
TG3 000237' TL3 000244' TS23 002544' TSTS22 002433' ent
TG30 003043' TL30 003050' TS24 002624' TSTS23 002511' ent
TG31 003133' TL31 003140' TS25 002706' TSTS24 002571' ent
TG32 003247' TL32 003254' TS26 002772' TSTS25 002653' ent
TG33 003325' TL33 003332' TS3 000261' TSTS26 002737' ent
TG34 003371' TL34 003376' TS30 003065' TSTS27 003025' ent
TG35 003455' TL35 003462' TS31 003155' TSTS3 000226' ent
TG36 003717' TL36 003724' TS32 003271' TSTS30 003032' ent
TG37 004011' TL37 004016' TS33 003347' TSTS31 003122' ent
TG4 000340' TL4 000345' TS34 003413' TSTS32 003236' ent
TG40 004107' TL40 004114' TS35 003477' TSTS33 003314' ent
TG41 004207' TL41 004214' TS36 003741' TSTS34 003360' ent
TG42 004267' TL42 004274' TS37 004033' TSTS35 003444' ent
TG43 004366' TL43 004373' TS4 000362' TSTS36 003706' ent
TG44 004460' TL44 004465' TS40 004131' TSTS37 004000' ent
TG45 004540' TL45 004545' TS41 004231' TSTS4 000327' ent
TG46 004627' TL46 004634' TS42 004311' TSTS40 004076' ent
TG47 004723' TL47 004730' TS43 004410' TSTS41 004176' ent
TG5 000441' TL5 000446' TS44 004502' TSTS42 004256' ent
TG50 005013' TL50 005020' TS45 004562' TSTS43 004355' ent
TG51 005377' TL51 005404' TS46 004651' TSTS44 004447' ent
TG52 005467' TL52 005474' TS47 004745' TSTS45 004527' ent
TG53 005664' TL53 005671' TS5 000463' TSTS46 004616' ent
TG54 006306' TL54 006313' TS50 005035' TSTS47 004712' ent
TG55 006410' TL55 006415' TS51 005421' TSTS5 000430' ent
TG56 006720' TL56 006725' TS52 005511' TSTS50 005002' ent
TG57 007010' TL57 007015' TS53 005707' TSTS51 005366' ent
TG6 000575' TL6 000602' TS54 006330' TSTS52 005456' ent
TG60 007062' TL60 007067' TS55 006432' TSTS53 005653' ent
TG61 007140' TL61 007145' TS56 006742' TSTS54 006275' ent
TG62 007234' TL62 007241' TS57 007032' TSTS55 006377' ent
TG63 007334' TL63 007341' TS6 000617' TSTS56 006707' ent
TG64 007404' TL64 007411' TS60 007104' TSTS57 006777' ent
TG65 007553' TL65 007560' TS61 007162' TSTS6 000564' ent
TG66 007717' TL66 007724' TS62 007256' TSTS60 007051' ent
TG67 010122' TL67 010127' TS63 007356' TSTS61 007127' ent
.MAIN MACRO %53A(1152) 09:34 16-Oct-84 Page S-3
DFPTA3 MAC 23-Apr-83 22:26 SYMBOL TABLE SEQ 0855
TSTS62 007223' ent TX61 007161' .MJ 007777 spd
TSTS63 007323' ent TX62 007255' .MJMAP 000017 spd
TSTS64 007373' ent TX63 007355' .MJRP 000017 spd
TSTS65 007543' ent TX64 007425' .MJSRP 000017 spd
TSTS66 007710' ent TX65 007574' .MJZ 000017 spd
TSTS67 010114' ent TX66 007740' .MLDCT 000017 spd
TSTS7 000637' ent TX67 010143' .MLOOP 000017 spd
TSTS70 010273' ent TX7 000671' .MPUSH 000017 spd
TSTSUB 010324' ext TX70 010337' .MRFCT 000017 spd
TX1 000030' TXALL 060000 000000 spd .MRPCT 000017 spd
TX10 000744' TXNOT 040000 000000 spd .MTWB 000017 spd
TX11 001017' UDEBUG 010326' ext .RCCOF 010000 spd
TX12 001065' Z3 000000' .RCCON 030000 spd
TX13 001145' ZSEQ 000001 000000 spd .RCENA 000400 000000 spd
TX14 001215' $ARG2 000777 .RCJP 000060 spd
TX15 001321' $B 000052 .RCJPP 000260 spd
TX16 001513' $CHR 000052 .RCJS 000020 spd
TX17 001705' $GARG 000001 .RCJV 000140 spd
TX2 000173' %ADDR 001000 spd .RCONT 000340 spd
TX20 002101' %ML 077707 770000 spd .RCRTN 000240 spd
TX21 002271' %MR 000040 spd .RDISA 000000 spd
TX22 002465' .LADDR 000100 000000 spd .RENA 000400 000000 spd
TX23 002543' .LCCOF 000000 spd .RJ 000000 spd
TX24 002623' .LCCON 000000 spd .RJMAP 000040 spd
TX25 002705' .LCENA 000000 spd .RJRP 000160 spd
TX26 002771' .LCJP 000000 spd .RJSRP 000120 spd
TX3 000260' .LCJPP 000000 spd .RJZ 000000 spd
TX30 003064' .LCJS 000000 spd .RLDCT 000300 spd
TX31 003154' .LCJV 000000 spd .RLOOP 000320 spd
TX32 003270' .LCONT 000000 spd .RPUSH 000100 spd
TX33 003346' .LCRTN 000000 spd .RRFCT 000200 spd
TX34 003412' .LDISA 000000 spd .RRPCT 000220 spd
TX35 003476' .LENA 000000 spd .RTWB 000360 spd
TX36 003740' .LJ 010000 spd
TX37 004032' .LJMAP 000000 spd
TX4 000361' .LJRP 000000 spd
TX40 004130' .LJSRP 000000 spd
TX41 004230' .LJZ 000000 spd
TX42 004310' .LLDCT 000000 spd
TX43 004407' .LLOOP 000000 spd
TX44 004501' .LPUSH 000000 spd
TX45 004561' .LRFCT 000000 spd
TX46 004650' .LRPCT 000000 spd
TX47 004744' .LTWB 000000 spd
TX5 000462' .MCCOF 000037 spd
TX50 005034' .MCCON 000037 spd
TX51 005420' .MCENA 000001 spd
TX52 005510' .MCJP 000017 spd
TX53 005706' .MCJPP 000017 spd
TX54 006327' .MCJS 000017 spd
TX55 006431' .MCJV 000017 spd
TX56 006741' .MCONT 000017 spd
TX57 007031' .MCRTN 000017 spd
TX6 000616' .MDISA 000001 spd
TX60 007103' .MENA 000001 spd
CADDR 20# 7117 7120 7143 7160
CALL 189 293 404 527 660 792 883 974 1062 1144 1235 1322 1434 1599 SEQ 0856
1764 1931 2094 2264 2356 2449 2544 2641 2747 2849 2972 3059 3147 3247
3475 3584 3697 3809 3915 4025 4131 4231 4338 4444 4547 4848 4965 5189
5516 5627 5875 5975 6061 6155 6260 6368 6450 6597 6741 6916 7087 7101
7102
CALPAR 20# 7167
CRAMPE 7074
CSRPNT 19# 7095
CWORDL 20# 7118 7135 7147 7161 7165
CWORDR 20# 7119 7138 7155 7163 7166
DATPAT 128# 128 166
DWCRAM 20# 7139 7156 7169
E17 75 242 353 476
ERFLG 96 100 107 265 269 276 376 380 387 499 503 510 623 627
634 764 768 775 855 859 866 946 950 957 1037 1041 1048 1119
1123 1130 1210 1214 1221 1297 1301 1308 1409 1413 1420 1574 1578 1585
1739 1743 1750 1906 1910 1917 2069 2073 2080 2239 2243 2250 2331 2335
2342 2424 2428 2435 2519 2523 2530 2616 2620 2627 2722 2726 2733 2824
2828 2835 2947 2951 2958 3034 3038 3045 3122 3126 3133 3222 3226 3233
3450 3454 3461 3559 3563 3570 3672 3676 3683 3784 3788 3795 3887 3891
3898 4000 4004 4011 4106 4110 4117 4205 4209 4216 4313 4317 4324 4419
4423 4430 4522 4526 4533 4823 4827 4834 4937 4941 4948 5132 5136 5143
5491 5495 5502 5602 5606 5613 5850 5854 5861 5950 5954 5961 6036 6040
6047 6130 6134 6141 6235 6239 6246 6343 6347 6354 6425 6429 6436 6572
6576 6583 6716 6720 6727 6891 6895 6902 7049 7058 7059 7060 7064 7073
7075
IPACLR 24# 89 259 370 493 617 758 849 940 1031 1113 1204 1291 1403
1568 1733 1900 2063 2233 2325 2418 2513 2610 2716 2818 2941 3028 3116
3216 3444 3553 3666 3778 3881 3994 4100 4199 4307 4413 4516 4817 4931
5125 5485 5596 5844 5944 6030 6124 6229 6337 6419 6566 6710 6885 7044
7052 7104
IPASRT 24# 7057
LAST 189 293 404 527 660 792 883 974 1062 1144 1235 1322 1434 1599
1764 1931 2094 2264 2356 2449 2544 2641 2747 2849 2972 3059 3147 3247
3475 3584 3697 3809 3915 4025 4131 4231 4338 4444 4547 4848 4965 5189
5516 5627 5875 5975 6061 6155 6260 6368 6450 6597 6741 6916 7087 7102
M1 75 242 353 476 600 741 832 923 1014 1096 1187 1274 1386 1551
1716 1883 2046 2216 2308 2401 2496 2593 2699 2801 2924 3011 3099 3199
3427 3536 3649 3761 3864 3977 4083 4182 4290 4396 4499 4800 4914 5108
5468 5579 5827 5927 6013 6107 6212 6320 6402 6550 6695 6871 7034
M16 75 242 353 476 600 741 832 923 1014 1096 1187 1274 1386 1551
1716 1883 2046 2216 2308 2401 2496 2593 2699 2801 2924 3011 3099 3199
3427 3536 3649 3761 3864 3977 4083 4182 4290 4396 4499 4800 4914 5108
5468 5579 5827 5927 6013 6107 6212 6320 6402 6550 6695 6871 7034
M7 75 242 353 476 600 741 832 923 1014 1096 1187 1274 1386 1551
1716 1883 2046 2216 2308 2401 2496 2593 2699 2801 2924 3011 3099 3199
3427 3536 3649 3761 3864 3977 4083 4182 4290 4396 4499 4800 4914 5108
5468 5579 5827 5927 6013 6107 6212 6320 6402 6550 6695 6871 7034
M8 75 242 353 476 600 741 832 923 1014 1096 1187 1274 1386 1551
1716 1883 2046 2216 2308 2401 2496 2593 2699 2801 2924 3011 3099 3199
3427 3536 3649 3761 3864 3977 4083 4182 4290 4396 4499 4800 4914 5108
5468 5579 5827 5927 6013 6107 6212 6320 6402 6550 6695 6871 7034
M9 75 242 353 476 600 741 832 923 1014 1096 1187 1274 1386 1551
1716 1883 2046 2216 2308 2401 2496 2593 2699 2801 2924 3011 3099 3199 SEQ 0857
3427 3536 3649 3761 3864 3977 4083 4182 4290 4396 4499 4800 4914 5108
5468 5579 5827 5927 6013 6107 6212 6320 6402 6550 6695 6871 7034
MA1 104 188#
MA10 954 973#
MA11 1045 1061#
MA12 1127 1143#
MA13 1218 1234#
MA14 1305 1321#
MA15 1417 1433#
MA16 1582 1598#
MA17 1747 1763#
MA2 273 292#
MA20 1914 1930#
MA21 2077 2093#
MA22 2247 2263#
MA23 2339 2355#
MA24 2432 2448#
MA25 2527 2543#
MA26 2624 2640#
MA3 384 403#
MA30 2730 2746#
MA31 2832 2848#
MA32 2955 2971#
MA33 3042 3058#
MA34 3130 3146#
MA35 3230 3246#
MA36 3458 3474#
MA37 3567 3583#
MA4 507 526#
MA40 3680 3696#
MA41 3792 3808#
MA42 3895 3914#
MA43 4008 4024#
MA44 4114 4130#
MA45 4213 4230#
MA46 4321 4337#
MA47 4427 4443#
MA5 631 659#
MA50 4530 4546#
MA51 4831 4847#
MA52 4945 4964#
MA53 5140 5188#
MA54 5499 5515#
MA55 5610 5626#
MA56 5858 5874#
MA57 5958 5974#
MA6 772 791#
MA60 6044 6060#
MA61 6138 6154#
MA62 6243 6259#
MA63 6351 6367#
MA64 6433 6449#
MA65 6580 6596# SEQ 0858
MA66 6724 6740#
MA67 6899 6915#
MA7 863 882#
MA70 7061 7086#
MA70P1 7087 7089# 7101
MA70P2 7102 7104#
MB70 7076 7100#
MBCN 176 178
MLAST 75 242 353 476 600 741 832 923 1014 1096 1187 1274 1386 1551
1716 1883 2046 2216 2308 2401 2496 2593 2699 2801 2924 3011 3099 3199
3427 3536 3649 3761 3864 3977 4083 4182 4290 4396 4499 4800 4914 5108
5468 5579 5827 5927 6013 6107 6212 6320 6402 6550 6695 6871 7034
MPROC 73 240 351 474 598 739 830 921 1012 1094 1185 1272 1384 1549
1714 1881 2044 2214 2306 2399 2494 2591 2697 2799 2922 3009 3097 3197
3425 3534 3647 3759 3862 3975 4081 4180 4288 4394 4497 4798 4912 5106
5466 5577 5825 5925 6011 6105 6210 6318 6400 6548 6693 6869 7032
MSG 188 292 403 526 659 791 882 973 1061 1143 1234 1321 1433 1598
1763 1930 2093 2263 2355 2448 2543 2640 2746 2848 2971 3058 3146 3246
3474 3583 3696 3808 3914 4024 4130 4230 4337 4443 4546 4847 4964 5188
5515 5626 5874 5974 6060 6154 6259 6367 6449 6596 6740 6915 7086 7100
NDMP 73 240 351 474 598 739 830 921 1012 1094 1185 1272 1384 1549
1714 1881 2044 2214 2306 2399 2494 2591 2697 2799 2922 3009 3097 3197
3425 3534 3647 3759 3862 3975 4081 4180 4288 4394 4497 4798 4912 5106
5466 5577 5825 5925 6011 6105 6210 6318 6400 6548 6693 6869 7032
ODELAY 19# 7071
P 130 183
PARFLG 20# 7123 7124 7168 7170
PORTCI 20# 178
PORTNI 20# 176
RDCSR 24# 7072 7089
RDLAR 24# 7107
SAVCSR 7091# 7091 7092
SDATA 24# 7056
SEQ 73 240 351 474 598 739 830 921 1012 1094 1185 1272 1384 1549
1714 1881 2044 2214 2306 2399 2494 2591 2697 2799 2922 3009 3097 3197
3425 3534 3647 3759 3862 3975 4081 4180 4288 4394 4497 4798 4912 5106
5466 5577 5825 5925 6011 6105 6210 6318 6400 6548 6693 6869 7032
SETLAR 24# 7105
SEXEC 19# 97 266 377 500 624 765 856 947 1038 1120 1211 1298 1410
1575 1740 1907 2070 2240 2332 2425 2520 2617 2723 2825 2948 3035 3123
3223 3451 3560 3673 3785 3888 4001 4107 4206 4314 4420 4523 4824 4938
5133 5492 5603 5851 5951 6037 6131 6236 6344 6426 6573 6717 6892
SNEXT 24# 7054
SSCALL 5151 5152 5153 5154 5155 5156 5157 5158
SSCHK 115 116 117
SSCONT 643 644 645 646 784 785 786 787 875 876 877 878 966 967
968 969
SSJRST 121
SSLAST 122 123 288 289 399 400 522 523 655 656 787 788 878 879
969 970 1057 1058 1139 1140 1230 1231 1317 1318 1429 1430 1594 1595
1759 1760 1926 1927 2089 2090 2259 2260 2351 2352 2444 2445 2539 2540
2636 2637 2742 2743 2844 2845 2967 2968 3054 3055 3142 3143 3242 3243
3470 3471 3579 3580 3692 3693 3804 3805 3910 3911 4020 4021 4126 4127 SEQ 0859
4226 4227 4333 4334 4439 4440 4542 4543 4843 4844 4960 4961 5159 5160
5511 5512 5622 5623 5870 5871 5970 5971 6056 6057 6150 6151 6255 6256
6363 6364 6445 6446 6592 6593 6736 6737 6911 6912
SSPNT 19# 189 293 404 527 660 792 883 974 1062 1144 1235 1322 1434
1599 1764 1931 2094 2264 2356 2449 2544 2641 2747 2849 2972 3059 3147
3247 3475 3584 3697 3809 3915 4025 4131 4231 4338 4444 4547 4848 4965
5189 5516 5627 5875 5975 6061 6155 6260 6368 6450 6597 6741 6916
SSSTRT 117 118 119 120 121 284 285 286 287 288 395 396 397 398
399 518 519 520 521 522 642 643 646 647 648 649 650 651
652 653 654 655 783 784 874 875 965 966 1056 1057 1138 1139
1229 1230 1316 1317 1428 1429 1593 1594 1758 1759 1925 1926 2088 2089
2258 2259 2350 2351 2443 2444 2538 2539 2635 2636 2741 2742 2843 2844
2966 2967 3053 3054 3141 3142 3241 3242 3469 3470 3578 3579 3691 3692
3803 3804 3906 3907 3908 3909 3910 4019 4020 4125 4126 4224 4225 4226
4332 4333 4438 4439 4541 4542 4842 4843 4956 4957 4958 4959 4960 5152
5153 5154 5155 5156 5157 5158 5159 5510 5511 5621 5622 5869 5870 5969
5970 6055 6056 6149 6150 6254 6255 6362 6363 6444 6445 6591 6592 6735
6736 6910 6911
T10M 922 934 978#
T11M 1013 1025 1066#
T12M 1095 1107 1148#
T13M 1186 1198 1239#
T14M 1273 1285 1326#
T15M 1385 1397 1438#
T16M 1550 1562 1603#
T17M 1715 1727 1768#
T1M 74 164 172 180 193#
T20M 1882 1894 1935#
T21M 2045 2057 2098#
T22M 2215 2227 2268#
T23M 2307 2319 2360#
T24M 2400 2412 2453#
T25M 2495 2507 2548#
T26M 2592 2604 2645#
T2M 241 253 297#
T30M 2698 2710 2751#
T31M 2800 2812 2853#
T32M 2923 2935 2976#
T33M 3010 3022 3063#
T34M 3098 3110 3151#
T35M 3198 3210 3251#
T36M 3426 3438 3479#
T37M 3535 3547 3588#
T3M 352 364 408#
T40M 3648 3660 3701#
T41M 3760 3772 3813#
T42M 3863 3875 3919#
T43M 3976 3988 4029#
T44M 4082 4094 4135#
T45M 4181 4193 4237#
T46M 4289 4301 4342#
T47M 4395 4407 4448#
T4M 475 487 531# SEQ 0860
T50M 4498 4510 4551#
T51M 4799 4811 4852#
T52M 4913 4925 4969#
T53LOD 5151 5153 5155 5157 5164#
T53M 5107 5119 5193#
T53MM 5166 5173#
T54M 5467 5479 5520#
T55M 5578 5590 5633#
T56M 5826 5838 5879#
T57M 5926 5938 5979#
T5M 599 611 664#
T60M 6012 6024 6065#
T61M 6106 6118 6159#
T62M 6211 6223 6264#
T63M 6319 6331 6372#
T64M 6401 6413 6454#
T65M 6549 6560 6601#
T66M 6694 6704 6745#
T67M 6870 6879 6920#
T6M 740 752 796#
T70LO1 7120# 7171
T70LOD 7045 7116#
T7M 831 843 887#
TA1 96# 99 107
TA10 946# 949 957
TA11 1037# 1040 1048
TA12 1119# 1122 1130
TA13 1210# 1213 1221
TA14 1297# 1300 1308
TA15 1409# 1412 1420
TA16 1574# 1577 1585
TA17 1739# 1742 1750
TA2 265# 268 276
TA20 1906# 1909 1917
TA21 2069# 2072 2080
TA22 2239# 2242 2250
TA23 2331# 2334 2342
TA24 2424# 2427 2435
TA25 2519# 2522 2530
TA26 2616# 2619 2627
TA3 376# 379 387
TA30 2722# 2725 2733
TA31 2824# 2827 2835
TA32 2947# 2950 2958
TA33 3034# 3037 3045
TA34 3122# 3125 3133
TA35 3222# 3225 3233
TA36 3450# 3453 3461
TA37 3559# 3562 3570
TA4 499# 502 510
TA40 3672# 3675 3683
TA41 3784# 3787 3795
TA42 3887# 3890 3898 SEQ 0861
TA43 4000# 4003 4011
TA44 4106# 4109 4117
TA45 4205# 4208 4216
TA46 4313# 4316 4324
TA47 4419# 4422 4430
TA5 623# 626 634
TA50 4522# 4525 4533
TA51 4823# 4826 4834
TA52 4937# 4940 4948
TA53 5132# 5135 5143
TA54 5491# 5494 5502
TA55 5602# 5605 5613
TA56 5850# 5853 5861
TA57 5950# 5953 5961
TA6 764# 767 775
TA60 6036# 6039 6047
TA61 6130# 6133 6141
TA62 6235# 6238 6246
TA63 6343# 6346 6354
TA64 6425# 6428 6436
TA65 6572# 6575 6583
TA66 6716# 6719 6727
TA67 6891# 6894 6902
TA7 855# 858 866
TA70 7049# 7062 7077
TG1 72 84#
TG10 920 932#
TG11 1011 1023#
TG12 1093 1105#
TG13 1184 1196#
TG14 1271 1283#
TG15 1383 1395#
TG16 1548 1560#
TG17 1713 1725#
TG2 239 251#
TG20 1880 1892#
TG21 2043 2055#
TG22 2213 2225#
TG23 2305 2317#
TG24 2398 2410#
TG25 2493 2505#
TG26 2590 2602#
TG3 350 362#
TG30 2696 2708#
TG31 2798 2810#
TG32 2921 2933#
TG33 3008 3020#
TG34 3096 3108#
TG35 3196 3208#
TG36 3424 3436#
TG37 3533 3545#
TG4 473 485#
TG40 3646 3658# SEQ 0862
TG41 3758 3770#
TG42 3861 3873#
TG43 3974 3986#
TG44 4080 4092#
TG45 4179 4191#
TG46 4287 4299#
TG47 4393 4405#
TG5 597 609#
TG50 4496 4508#
TG51 4797 4809#
TG52 4911 4923#
TG53 5105 5117#
TG54 5465 5477#
TG55 5576 5588#
TG56 5824 5836#
TG57 5924 5936#
TG6 738 750#
TG60 6010 6022#
TG61 6104 6116#
TG62 6209 6221#
TG63 6317 6329#
TG64 6399 6411#
TG65 6547 6558#
TG66 6692 6702#
TG67 6868 6877#
TG7 829 841#
TG70 7031 7039#
TL1 89# 105
TL10 940# 955
TL11 1031# 1046
TL12 1113# 1128
TL13 1204# 1219
TL14 1291# 1306
TL15 1403# 1418
TL16 1568# 1583
TL17 1733# 1748
TL2 259# 274
TL20 1900# 1915
TL21 2063# 2078
TL22 2233# 2248
TL23 2325# 2340
TL24 2418# 2433
TL25 2513# 2528
TL26 2610# 2625
TL3 370# 385
TL30 2716# 2731
TL31 2818# 2833
TL32 2941# 2956
TL33 3028# 3043
TL34 3116# 3131
TL35 3216# 3231
TL36 3444# 3459
TL37 3553# 3568 SEQ 0863
TL4 493# 508
TL40 3666# 3681
TL41 3778# 3793
TL42 3881# 3896
TL43 3994# 4009
TL44 4100# 4115
TL45 4199# 4214
TL46 4307# 4322
TL47 4413# 4428
TL5 617# 632
TL50 4516# 4531
TL51 4817# 4832
TL52 4931# 4946
TL53 5125# 5141
TL54 5485# 5500
TL55 5596# 5611
TL56 5844# 5859
TL57 5944# 5959
TL6 758# 773
TL60 6030# 6045
TL61 6124# 6139
TL62 6229# 6244
TL63 6337# 6352
TL64 6419# 6434
TL65 6566# 6581
TL66 6710# 6725
TL67 6885# 6900
TL7 849# 864
TLOAD 19# 181 254 365 488 612 753 844 935 1026 1108 1199 1286 1398
1563 1728 1895 2058 2228 2320 2413 2508 2605 2711 2813 2936 3023 3111
3211 3439 3548 3661 3773 3876 3989 4095 4194 4302 4408 4511 4812 4926
5120 5167 5480 5591 5839 5939 6025 6119 6224 6332 6414 6561 6705 6880
TRACE 19# 85 252 363 486 610 751 842 933 1024 1106 1197 1284 1396
1561 1726 1893 2056 2226 2318 2411 2506 2603 2709 2811 2934 3021 3109
3209 3437 3546 3659 3771 3874 3987 4093 4192 4300 4406 4509 4810 4924
5118 5478 5589 5837 5937 6023 6117 6222 6330 6412 6559 6703 6878 7040
TS1 91 115# 121 168 169 170 171
TS10 942 965#
TS11 1033 1056#
TS12 1115 1138#
TS13 1206 1229#
TS14 1293 1316#
TS15 1405 1428#
TS16 1570 1593#
TS17 1735 1758#
TS1CHK 115 126#
TS1LOD 116 163# 175
TS1PAT 92 135#
TS2 261 284#
TS20 1902 1925#
TS21 2065 2088#
TS22 2235 2258#
TS23 2327 2350# SEQ 0864
TS24 2420 2443#
TS25 2515 2538#
TS26 2612 2635#
TS3 372 395#
TS30 2718 2741#
TS31 2820 2843#
TS32 2943 2966#
TS33 3030 3053#
TS34 3118 3141#
TS35 3218 3241#
TS36 3446 3469#
TS37 3555 3578#
TS4 495 518#
TS40 3668 3691#
TS41 3780 3803#
TS42 3883 3906#
TS43 3996 4019#
TS44 4102 4125#
TS45 4201 4224#
TS46 4309 4332#
TS47 4415 4438#
TS5 619 642#
TS50 4518 4541#
TS51 4819 4842#
TS52 4933 4956#
TS53 5127 5151#
TS54 5487 5510#
TS55 5598 5621#
TS56 5846 5869#
TS57 5946 5969#
TS6 760 783#
TS60 6032 6055#
TS61 6126 6149#
TS62 6231 6254#
TS63 6339 6362#
TS64 6421 6444#
TS65 6568 6591#
TS66 6712 6735#
TS67 6887 6910#
TS7 851 874#
TSLOD1 19# 177
TSLOD2 19# 179
TSTS1 9 72#
TSTS10 9 480 603 743 833 920#
TSTS11 10 604 744 834 924 1011#
TSTS12 10 745 835 925 1015 1093#
TSTS13 10 836 926 1016 1097 1184#
TSTS14 10 927 1017 1098 1188 1271#
TSTS15 10 1018 1099 1189 1275 1383#
TSTS16 10 1100 1190 1276 1387 1548#
TSTS17 10 1191 1277 1388 1552 1713#
TSTS2 9 76 239#
TSTS20 10 1278 1389 1553 1717 1880# SEQ 0865
TSTS21 11 1390 1554 1718 1884 2043#
TSTS22 11 1555 1719 1885 2047 2213#
TSTS23 11 1720 1886 2048 2217 2305#
TSTS24 11 1887 2049 2218 2309 2398#
TSTS25 11 2050 2219 2310 2402 2493#
TSTS26 11 2220 2311 2403 2497 2590#
TSTS27 11 2673#
TSTS3 9 77 243 350#
TSTS30 11 2312 2404 2498 2594 2696#
TSTS31 12 2405 2499 2595 2700 2798#
TSTS32 12 2500 2596 2701 2802 2921#
TSTS33 12 2597 2702 2803 2925 3008#
TSTS34 12 2703 2804 2926 3012 3096#
TSTS35 12 2805 2927 3013 3100 3196#
TSTS36 12 2928 3014 3101 3200 3424#
TSTS37 12 3015 3102 3201 3428 3533#
TSTS4 9 78 244 354 473#
TSTS40 12 3103 3202 3429 3537 3646#
TSTS41 13 3203 3430 3538 3650 3758#
TSTS42 13 3431 3539 3651 3762 3861#
TSTS43 13 3540 3652 3763 3865 3974#
TSTS44 13 3653 3764 3866 3978 4080#
TSTS45 13 3765 3867 3979 4084 4179#
TSTS46 13 3868 3980 4085 4183 4287#
TSTS47 13 3981 4086 4184 4291 4393#
TSTS5 9 79 245 355 477 597#
TSTS50 13 4087 4185 4292 4397 4496#
TSTS51 14 4186 4293 4398 4500 4797#
TSTS52 14 4294 4399 4501 4801 4911#
TSTS53 14 4400 4502 4802 4915 5105#
TSTS54 14 4503 4803 4916 5109 5465#
TSTS55 14 4804 4917 5110 5469 5576#
TSTS56 14 4918 5111 5470 5580 5824#
TSTS57 14 5112 5471 5581 5828 5924#
TSTS6 9 246 356 478 601 738#
TSTS60 14 5472 5582 5829 5928 6010#
TSTS61 15 5583 5830 5929 6014 6104#
TSTS62 15 5831 5930 6015 6108 6209#
TSTS63 15 5931 6016 6109 6213 6317#
TSTS64 15 6017 6110 6214 6321 6399#
TSTS65 15 6111 6215 6322 6403 6547#
TSTS66 15 6216 6323 6404 6551 6692#
TSTS67 15 6324 6405 6552 6696 6868#
TSTS7 9 357 479 602 742 829#
TSTS70 15 6406 6553 6697 6872 7031#
TSTSUB 19# 90 260 371 494 618 759 850 941 1032 1114 1205 1292 1404
1569 1734 1901 2064 2234 2326 2419 2514 2611 2717 2819 2942 3029 3117
3217 3445 3554 3667 3779 3882 3995 4101 4200 4308 4414 4517 4818 4932
5126 5486 5597 5845 5945 6031 6125 6230 6338 6420 6567 6711 6886 7051
7068
TX1 98 106 111#
TX10 948 956 961#
TX11 1039 1047 1052# SEQ 0866
TX12 1121 1129 1134#
TX13 1212 1220 1225#
TX14 1299 1307 1312#
TX15 1411 1419 1424#
TX16 1576 1584 1589#
TX17 1741 1749 1754#
TX2 267 275 280#
TX20 1908 1916 1921#
TX21 2071 2079 2084#
TX22 2241 2249 2254#
TX23 2333 2341 2346#
TX24 2426 2434 2439#
TX25 2521 2529 2534#
TX26 2618 2626 2631#
TX3 378 386 391#
TX30 2724 2732 2737#
TX31 2826 2834 2839#
TX32 2949 2957 2962#
TX33 3036 3044 3049#
TX34 3124 3132 3137#
TX35 3224 3232 3237#
TX36 3452 3460 3465#
TX37 3561 3569 3574#
TX4 501 509 514#
TX40 3674 3682 3687#
TX41 3786 3794 3799#
TX42 3889 3897 3902#
TX43 4002 4010 4015#
TX44 4108 4116 4121#
TX45 4207 4215 4220#
TX46 4315 4323 4328#
TX47 4421 4429 4434#
TX5 625 633 638#
TX50 4524 4532 4537#
TX51 4825 4833 4838#
TX52 4939 4947 4952#
TX53 5134 5142 5147#
TX54 5493 5501 5506#
TX55 5604 5612 5617#
TX56 5852 5860 5865#
TX57 5952 5960 5965#
TX6 766 774 779#
TX60 6038 6046 6051#
TX61 6132 6140 6145#
TX62 6237 6245 6250#
TX63 6345 6353 6358#
TX64 6427 6435 6440#
TX65 6574 6582 6587#
TX66 6718 6726 6731#
TX67 6893 6901 6906#
TX7 857 865 870#
TX70 7063 7064 7078 7082#
TXALL 189 293 404 527 660 792 883 974 1062 1144 1235 1322 1434 1599 SEQ 0867
1764 1931 2094 2264 2356 2449 2544 2641 2747 2849 2972 3059 3147 3247
3475 3584 3697 3809 3915 4025 4131 4231 4338 4444 4547 4848 4965 5189
5516 5627 5875 5975 6061 6155 6260 6368 6450 6597 6741 6916 7087 7101
7102
TXNOT 188 292 403 526 659 791 882 973 1061 1143 1234 1321 1433 1598
1763 1930 2093 2263 2355 2448 2543 2640 2746 2848 2971 3058 3146 3246
3474 3583 3696 3808 3914 4024 4130 4230 4337 4443 4546 4847 4964 5188
5515 5626 5874 5974 6060 6154 6259 6367 6449 6596 6740 6915 7086 7100
UDEBUG 20# 7070
Z3 31# 84 251 362 485 609 750 841 932 1023 1105 1196 1283 1395
1560 1725 1892 2055 2225 2317 2410 2505 2602 2708 2810 2933 3020 3108
3208 3436 3545 3658 3770 3873 3986 4092 4191 4299 4405 4508 4809 4923
5117 5477 5588 5836 5936 6022 6116 6221 6329 6411 6558 6702 6877 7039
ZSEQ 73 240 351 474 598 739 830 921 1012 1094 1185 1272 1384 1549
1714 1881 2044 2214 2306 2399 2494 2591 2674 2697 2799 2922 3009 3097
3197 3425 3534 3647 3759 3862 3975 4081 4180 4288 4394 4497 4798 4912
5106 5466 5577 5825 5925 6011 6105 6210 6318 6400 6548 6693 6869 7032
$ARG2 193# 193 195# 195 197# 197 199# 199 297# 297 299# 299 301# 301
303# 303 305# 305 308# 308 310# 310 312# 312 314# 314 408# 408
410# 410 412# 412 414# 414 416# 416 418# 418 420# 420 422# 422
424# 424 426# 426 428# 428 430# 430 432# 432 435# 435 437# 437
531# 531 533# 533 535# 535 537# 537 539# 539 541# 541 543# 543
545# 545 547# 547 549# 549 551# 551 553# 553 555# 555 558# 558
560# 560 664# 664 666# 666 668# 668 670# 670 672# 672 674# 674
676# 676 678# 678 680# 680 682# 682 684# 684 686# 686 688# 688
690# 690 692# 692 694# 694 696# 696 698# 698 700# 700 702# 702
704# 704 706# 706 708# 708 710# 710 796# 796 798# 798 800# 800
802# 802 887# 887 889# 889 891# 891 893# 893 978# 978 980# 980
982# 982 984# 984 1066# 1066 1068# 1068 1070# 1070 1148# 1148 1150# 1150
1152# 1152 1154# 1154 1156# 1156 1158# 1158 1160# 1160 1163# 1163 1239# 1239
1241# 1241 1243# 1243 1245# 1245 1326# 1326 1328# 1328 1330# 1330 1332# 1332
1334# 1334 1336# 1336 1338# 1338 1340# 1340 1342# 1342 1344# 1344 1346# 1346
1348# 1348 1350# 1350 1352# 1352 1355# 1355 1357# 1357 1359# 1359 1362# 1362
1438# 1438 1440# 1440 1442# 1442 1444# 1444 1446# 1446 1448# 1448 1450# 1450
1452# 1452 1454# 1454 1456# 1456 1458# 1458 1460# 1460 1462# 1462 1464# 1464
1466# 1466 1468# 1468 1470# 1470 1472# 1472 1474# 1474 1476# 1476 1478# 1478
1480# 1480 1482# 1482 1484# 1484 1486# 1486 1488# 1488 1490# 1490 1492# 1492
1494# 1494 1496# 1496 1498# 1498 1500# 1500 1502# 1502 1504# 1504 1506# 1506
1508# 1508 1510# 1510 1512# 1512 1514# 1514 1516# 1516 1518# 1518 1520# 1520
1522# 1522 1525# 1525 1527# 1527 1603# 1603 1605# 1605 1607# 1607 1609# 1609
1611# 1611 1613# 1613 1615# 1615 1617# 1617 1619# 1619 1621# 1621 1623# 1623
1625# 1625 1627# 1627 1629# 1629 1631# 1631 1633# 1633 1635# 1635 1637# 1637
1639# 1639 1641# 1641 1643# 1643 1645# 1645 1647# 1647 1649# 1649 1651# 1651
1653# 1653 1655# 1655 1657# 1657 1659# 1659 1661# 1661 1663# 1663 1665# 1665
1667# 1667 1669# 1669 1671# 1671 1673# 1673 1675# 1675 1677# 1677 1679# 1679
1681# 1681 1683# 1683 1685# 1685 1687# 1687 1690# 1690 1692# 1692 1768# 1768
1770# 1770 1772# 1772 1774# 1774 1776# 1776 1778# 1778 1780# 1780 1782# 1782
1784# 1784 1786# 1786 1788# 1788 1790# 1790 1792# 1792 1794# 1794 1796# 1796
1798# 1798 1800# 1800 1802# 1802 1804# 1804 1806# 1806 1808# 1808 1810# 1810
1812# 1812 1814# 1814 1816# 1816 1818# 1818 1820# 1820 1822# 1822 1824# 1824
1826# 1826 1828# 1828 1830# 1830 1832# 1832 1834# 1834 1836# 1836 1838# 1838
1840# 1840 1842# 1842 1844# 1844 1846# 1846 1848# 1848 1850# 1850 1852# 1852
1854# 1854 1857# 1857 1859# 1859 1935# 1935 1937# 1937 1939# 1939 1941# 1941 SEQ 0868
1943# 1943 1945# 1945 1947# 1947 1949# 1949 1951# 1951 1953# 1953 1955# 1955
1957# 1957 1959# 1959 1961# 1961 1963# 1963 1965# 1965 1967# 1967 1969# 1969
1971# 1971 1973# 1973 1975# 1975 1977# 1977 1979# 1979 1981# 1981 1983# 1983
1985# 1985 1987# 1987 1989# 1989 1991# 1991 1993# 1993 1995# 1995 1997# 1997
1999# 1999 2001# 2001 2003# 2003 2005# 2005 2007# 2007 2009# 2009 2011# 2011
2013# 2013 2015# 2015 2017# 2017 2020# 2020 2022# 2022 2098# 2098 2100# 2100
2102# 2102 2104# 2104 2106# 2106 2108# 2108 2110# 2110 2112# 2112 2114# 2114
2116# 2116 2118# 2118 2120# 2120 2122# 2122 2124# 2124 2126# 2126 2128# 2128
2130# 2130 2132# 2132 2134# 2134 2136# 2136 2138# 2138 2140# 2140 2142# 2142
2144# 2144 2146# 2146 2148# 2148 2150# 2150 2152# 2152 2154# 2154 2156# 2156
2158# 2158 2160# 2160 2162# 2162 2164# 2164 2166# 2166 2168# 2168 2170# 2170
2172# 2172 2174# 2174 2176# 2176 2178# 2178 2180# 2180 2182# 2182 2184# 2184
2187# 2187 2189# 2189 2268# 2268 2270# 2270 2272# 2272 2274# 2274 2276# 2276
2278# 2278 2280# 2280 2360# 2360 2362# 2362 2364# 2364 2366# 2366 2368# 2368
2370# 2370 2372# 2372 2374# 2374 2453# 2453 2455# 2455 2457# 2457 2459# 2459
2461# 2461 2463# 2463 2465# 2465 2467# 2467 2469# 2469 2548# 2548 2550# 2550
2552# 2552 2554# 2554 2556# 2556 2558# 2558 2560# 2560 2562# 2562 2564# 2564
2566# 2566 2645# 2645 2647# 2647 2649# 2649 2651# 2651 2653# 2653 2655# 2655
2657# 2657 2659# 2659 2661# 2661 2663# 2663 2665# 2665 2751# 2751 2753# 2753
2755# 2755 2757# 2757 2759# 2759 2761# 2761 2763# 2763 2765# 2765 2768# 2768
2770# 2770 2772# 2772 2774# 2774 2853# 2853 2855# 2855 2857# 2857 2859# 2859
2861# 2861 2863# 2863 2865# 2865 2868# 2868 2870# 2870 2872# 2872 2874# 2874
2876# 2876 2878# 2878 2880# 2880 2883# 2883 2885# 2885 2887# 2887 2889# 2889
2891# 2891 2893# 2893 2895# 2895 2898# 2898 2976# 2976 2978# 2978 2980# 2980
2982# 2982 2984# 2984 2986# 2986 2988# 2988 3063# 3063 3065# 3065 3151# 3151
3153# 3153 3155# 3155 3157# 3157 3159# 3159 3161# 3161 3163# 3163 3165# 3165
3167# 3167 3169# 3169 3251# 3251 3253# 3253 3255# 3255 3257# 3257 3259# 3259
3262# 3262 3264# 3264 3266# 3266 3268# 3268 3271# 3271 3273# 3273 3275# 3275
3278# 3278 3280# 3280 3282# 3282 3285# 3285 3287# 3287 3289# 3289 3292# 3292
3294# 3294 3296# 3296 3299# 3299 3301# 3301 3303# 3303 3306# 3306 3308# 3308
3310# 3310 3313# 3313 3315# 3315 3317# 3317 3320# 3320 3322# 3322 3324# 3324
3327# 3327 3329# 3329 3331# 3331 3334# 3334 3336# 3336 3338# 3338 3341# 3341
3343# 3343 3345# 3345 3348# 3348 3350# 3350 3352# 3352 3355# 3355 3357# 3357
3359# 3359 3362# 3362 3364# 3364 3366# 3366 3369# 3369 3371# 3371 3373# 3373
3376# 3376 3378# 3378 3380# 3380 3383# 3383 3385# 3385 3387# 3387 3390# 3390
3392# 3392 3394# 3394 3397# 3397 3399# 3399 3479# 3479 3481# 3481 3483# 3483
3485# 3485 3487# 3487 3489# 3489 3491# 3491 3493# 3493 3495# 3495 3497# 3497
3499# 3499 3502# 3502 3504# 3504 3588# 3588 3590# 3590 3592# 3592 3594# 3594
3597# 3597 3599# 3599 3601# 3601 3604# 3604 3606# 3606 3608# 3608 3611# 3611
3613# 3613 3615# 3615 3618# 3618 3620# 3620 3701# 3701 3704# 3704 3706# 3706
3708# 3708 3711# 3711 3713# 3713 3715# 3715 3718# 3718 3720# 3720 3722# 3722
3725# 3725 3727# 3727 3729# 3729 3732# 3732 3734# 3734 3737# 3737 3813# 3813
3815# 3815 3817# 3817 3819# 3819 3821# 3821 3823# 3823 3825# 3825 3827# 3827
3919# 3919 3921# 3921 3923# 3923 3925# 3925 3927# 3927 3930# 3930 3932# 3932
3934# 3934 3936# 3936 3938# 3938 3940# 3940 3942# 3942 3944# 3944 3947# 3947
4029# 4029 4031# 4031 4033# 4033 4035# 4035 4037# 4037 4039# 4039 4041# 4041
4043# 4043 4045# 4045 4047# 4047 4049# 4049 4051# 4051 4054# 4054 4135# 4135
4137# 4137 4139# 4139 4141# 4141 4143# 4143 4146# 4146 4148# 4148 4150# 4150
4237# 4237 4239# 4239 4241# 4241 4243# 4243 4245# 4245 4250# 4250 4252# 4252
4254# 4254 4256# 4256 4258# 4258 4261# 4261 4342# 4342 4344# 4344 4346# 4346
4348# 4348 4350# 4350 4352# 4352 4354# 4354 4356# 4356 4358# 4358 4360# 4360
4362# 4362 4365# 4365 4367# 4367 4369# 4369 4448# 4448 4450# 4450 4452# 4452
4454# 4454 4456# 4456 4458# 4458 4460# 4460 4462# 4462 4464# 4464 4466# 4466 SEQ 0869
4469# 4469 4472# 4472 4551# 4551 4554# 4554 4556# 4556 4558# 4558 4560# 4560
4562# 4562 4564# 4564 4566# 4566 4568# 4568 4571# 4571 4573# 4573 4575# 4575
4577# 4577 4579# 4579 4581# 4581 4583# 4583 4585# 4585 4588# 4588 4590# 4590
4592# 4592 4594# 4594 4596# 4596 4598# 4598 4600# 4600 4602# 4602 4605# 4605
4607# 4607 4609# 4609 4611# 4611 4613# 4613 4615# 4615 4617# 4617 4619# 4619
4622# 4622 4624# 4624 4626# 4626 4628# 4628 4630# 4630 4632# 4632 4634# 4634
4636# 4636 4639# 4639 4641# 4641 4643# 4643 4645# 4645 4647# 4647 4649# 4649
4651# 4651 4653# 4653 4656# 4656 4658# 4658 4660# 4660 4662# 4662 4664# 4664
4666# 4666 4668# 4668 4670# 4670 4673# 4673 4675# 4675 4677# 4677 4679# 4679
4681# 4681 4683# 4683 4685# 4685 4687# 4687 4690# 4690 4692# 4692 4694# 4694
4696# 4696 4698# 4698 4700# 4700 4702# 4702 4704# 4704 4707# 4707 4709# 4709
4711# 4711 4713# 4713 4715# 4715 4717# 4717 4719# 4719 4721# 4721 4724# 4724
4726# 4726 4728# 4728 4730# 4730 4732# 4732 4734# 4734 4736# 4736 4738# 4738
4741# 4741 4743# 4743 4745# 4745 4747# 4747 4749# 4749 4751# 4751 4753# 4753
4755# 4755 4758# 4758 4760# 4760 4762# 4762 4764# 4764 4766# 4766 4768# 4768
4770# 4770 4772# 4772 4774# 4774 4852# 4852 4854# 4854 4856# 4856 4858# 4858
4860# 4860 4862# 4862 4864# 4864 4866# 4866 4868# 4868 4870# 4870 4872# 4872
4874# 4874 4969# 4969 4971# 4971 4973# 4973 4975# 4975 4977# 4977 4979# 4979
4981# 4981 4983# 4983 4985# 4985 4988# 4988 4990# 4990 4992# 4992 4994# 4994
4996# 4996 4998# 4998 5000# 5000 5002# 5002 5004# 5004 5007# 5007 5009# 5009
5011# 5011 5013# 5013 5015# 5015 5017# 5017 5019# 5019 5021# 5021 5023# 5023
5026# 5026 5028# 5028 5030# 5030 5032# 5032 5034# 5034 5036# 5036 5038# 5038
5040# 5040 5042# 5042 5045# 5045 5047# 5047 5049# 5049 5051# 5051 5053# 5053
5055# 5055 5057# 5057 5059# 5059 5062# 5062 5173# 5173 5176# 5176 5179# 5179
5182# 5182 5193# 5193 5195# 5195 5198# 5198 5200# 5200 5202# 5202 5205# 5205
5207# 5207 5209# 5209 5212# 5212 5214# 5214 5216# 5216 5219# 5219 5221# 5221
5223# 5223 5226# 5226 5228# 5228 5230# 5230 5233# 5233 5235# 5235 5237# 5237
5240# 5240 5242# 5242 5244# 5244 5247# 5247 5249# 5249 5251# 5251 5254# 5254
5256# 5256 5258# 5258 5261# 5261 5263# 5263 5265# 5265 5268# 5268 5270# 5270
5272# 5272 5275# 5275 5277# 5277 5279# 5279 5282# 5282 5284# 5284 5286# 5286
5289# 5289 5291# 5291 5293# 5293 5296# 5296 5298# 5298 5300# 5300 5303# 5303
5305# 5305 5307# 5307 5310# 5310 5312# 5312 5314# 5314 5317# 5317 5319# 5319
5321# 5321 5324# 5324 5326# 5326 5328# 5328 5331# 5331 5333# 5333 5335# 5335
5338# 5338 5340# 5340 5342# 5342 5345# 5345 5347# 5347 5349# 5349 5352# 5352
5354# 5354 5356# 5356 5359# 5359 5361# 5361 5363# 5363 5366# 5366 5368# 5368
5370# 5370 5373# 5373 5375# 5375 5377# 5377 5380# 5380 5382# 5382 5385# 5385
5387# 5387 5389# 5389 5391# 5391 5393# 5393 5395# 5395 5397# 5397 5399# 5399
5401# 5401 5403# 5403 5405# 5405 5407# 5407 5409# 5409 5411# 5411 5413# 5413
5415# 5415 5417# 5417 5419# 5419 5421# 5421 5423# 5423 5425# 5425 5427# 5427
5429# 5429 5431# 5431 5433# 5433 5435# 5435 5520# 5520 5522# 5522 5524# 5524
5526# 5526 5528# 5528 5530# 5530 5532# 5532 5534# 5534 5536# 5536 5538# 5538
5541# 5541 5543# 5543 5545# 5545 5547# 5547 5549# 5549 5551# 5551 5553# 5553
5633# 5633 5635# 5635 5637# 5637 5639# 5639 5641# 5641 5643# 5643 5645# 5645
5647# 5647 5649# 5649 5651# 5651 5654# 5654 5656# 5656 5658# 5658 5660# 5660
5662# 5662 5664# 5664 5666# 5666 5668# 5668 5670# 5670 5672# 5672 5674# 5674
5676# 5676 5678# 5678 5680# 5680 5682# 5682 5684# 5684 5686# 5686 5688# 5688
5690# 5690 5692# 5692 5694# 5694 5696# 5696 5698# 5698 5700# 5700 5702# 5702
5704# 5704 5706# 5706 5708# 5708 5710# 5710 5712# 5712 5714# 5714 5716# 5716
5718# 5718 5720# 5720 5722# 5722 5724# 5724 5726# 5726 5728# 5728 5730# 5730
5732# 5732 5734# 5734 5736# 5736 5738# 5738 5740# 5740 5742# 5742 5744# 5744
5746# 5746 5748# 5748 5751# 5751 5753# 5753 5756# 5756 5758# 5758 5760# 5760
5762# 5762 5764# 5764 5766# 5766 5768# 5768 5770# 5770 5772# 5772 5774# 5774
5776# 5776 5778# 5778 5780# 5780 5782# 5782 5784# 5784 5786# 5786 5788# 5788 SEQ 0870
5790# 5790 5792# 5792 5794# 5794 5796# 5796 5798# 5798 5800# 5800 5802# 5802
5879# 5879 5881# 5881 5883# 5883 5885# 5885 5887# 5887 5889# 5889 5891# 5891
5893# 5893 5895# 5895 5897# 5897 5900# 5900 5902# 5902 5979# 5979 5981# 5981
5983# 5983 5985# 5985 5987# 5987 6065# 6065 6067# 6067 6069# 6069 6071# 6071
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6182# 6182 6184# 6184 6187# 6187 6264# 6264 6266# 6266 6268# 6268 6270# 6270
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6376# 6376 6378# 6378 6454# 6454 6456# 6456 6458# 6458 6460# 6460 6462# 6462
6464# 6464 6466# 6466 6468# 6468 6470# 6470 6472# 6472 6474# 6474 6476# 6476
6478# 6478 6480# 6480 6482# 6482 6484# 6484 6486# 6486 6488# 6488 6490# 6490
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6506# 6506 6508# 6508 6510# 6510 6512# 6512 6514# 6514 6516# 6516 6518# 6518
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6753# 6753 6755# 6755 6757# 6757 6759# 6759 6761# 6761 6763# 6763 6765# 6765
6767# 6767 6769# 6769 6771# 6771 6773# 6773 6775# 6775 6777# 6777 6779# 6779
6781# 6781 6783# 6783 6785# 6785 6787# 6787 6789# 6789 6791# 6791 6793# 6793
6795# 6795 6797# 6797 6799# 6799 6801# 6801 6803# 6803 6805# 6805 6807# 6807
6809# 6809 6811# 6811 6813# 6813 6815# 6815 6817# 6817 6819# 6819 6821# 6821
6823# 6823 6825# 6825 6827# 6827 6829# 6829 6831# 6831 6833# 6833 6835# 6835
6837# 6837 6839# 6839 6841# 6841 6844# 6844 6847# 6847 6920# 6920 6922# 6922
6924# 6924 6926# 6926 6928# 6928 6930# 6930 6932# 6932 6934# 6934 6936# 6936
6938# 6938 6940# 6940 6942# 6942 6944# 6944 6946# 6946 6948# 6948 6950# 6950
6952# 6952 6954# 6954 6956# 6956 6958# 6958 6960# 6960 6962# 6962 6964# 6964
6966# 6966 6968# 6968 6970# 6970 6972# 6972 6974# 6974 6976# 6976 6978# 6978
6980# 6980 6982# 6982 6984# 6984 6986# 6986 6988# 6988 6990# 6990 6992# 6992
6994# 6994 6997# 6997 6999# 6999 7001# 7001
$B 193# 193 195# 195 197# 197 199# 199 297# 297 299# 299 301# 301
303# 303 305# 305 308# 308 310# 310 312# 312 314# 314 408# 408
410# 410 412# 412 414# 414 416# 416 418# 418 420# 420 422# 422
424# 424 426# 426 428# 428 430# 430 432# 432 435# 435 437# 437
531# 531 533# 533 535# 535 537# 537 539# 539 541# 541 543# 543
545# 545 547# 547 549# 549 551# 551 553# 553 555# 555 558# 558
560# 560 664# 664 666# 666 668# 668 670# 670 672# 672 674# 674
676# 676 678# 678 680# 680 682# 682 684# 684 686# 686 688# 688
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704# 704 706# 706 708# 708 710# 710 796# 796 798# 798 800# 800
802# 802 887# 887 889# 889 891# 891 893# 893 978# 978 980# 980
982# 982 984# 984 1066# 1066 1068# 1068 1070# 1070 1148# 1148 1150# 1150
1152# 1152 1154# 1154 1156# 1156 1158# 1158 1160# 1160 1163# 1163 1239# 1239
1241# 1241 1243# 1243 1245# 1245 1326# 1326 1328# 1328 1330# 1330 1332# 1332
1334# 1334 1336# 1336 1338# 1338 1340# 1340 1342# 1342 1344# 1344 1346# 1346
1348# 1348 1350# 1350 1352# 1352 1355# 1355 1357# 1357 1359# 1359 1362# 1362
1438# 1438 1440# 1440 1442# 1442 1444# 1444 1446# 1446 1448# 1448 1450# 1450
1452# 1452 1454# 1454 1456# 1456 1458# 1458 1460# 1460 1462# 1462 1464# 1464
1466# 1466 1468# 1468 1470# 1470 1472# 1472 1474# 1474 1476# 1476 1478# 1478
1480# 1480 1482# 1482 1484# 1484 1486# 1486 1488# 1488 1490# 1490 1492# 1492 SEQ 0871
1494# 1494 1496# 1496 1498# 1498 1500# 1500 1502# 1502 1504# 1504 1506# 1506
1508# 1508 1510# 1510 1512# 1512 1514# 1514 1516# 1516 1518# 1518 1520# 1520
1522# 1522 1525# 1525 1527# 1527 1603# 1603 1605# 1605 1607# 1607 1609# 1609
1611# 1611 1613# 1613 1615# 1615 1617# 1617 1619# 1619 1621# 1621 1623# 1623
1625# 1625 1627# 1627 1629# 1629 1631# 1631 1633# 1633 1635# 1635 1637# 1637
1639# 1639 1641# 1641 1643# 1643 1645# 1645 1647# 1647 1649# 1649 1651# 1651
1653# 1653 1655# 1655 1657# 1657 1659# 1659 1661# 1661 1663# 1663 1665# 1665
1667# 1667 1669# 1669 1671# 1671 1673# 1673 1675# 1675 1677# 1677 1679# 1679
1681# 1681 1683# 1683 1685# 1685 1687# 1687 1690# 1690 1692# 1692 1768# 1768
1770# 1770 1772# 1772 1774# 1774 1776# 1776 1778# 1778 1780# 1780 1782# 1782
1784# 1784 1786# 1786 1788# 1788 1790# 1790 1792# 1792 1794# 1794 1796# 1796
1798# 1798 1800# 1800 1802# 1802 1804# 1804 1806# 1806 1808# 1808 1810# 1810
1812# 1812 1814# 1814 1816# 1816 1818# 1818 1820# 1820 1822# 1822 1824# 1824
1826# 1826 1828# 1828 1830# 1830 1832# 1832 1834# 1834 1836# 1836 1838# 1838
1840# 1840 1842# 1842 1844# 1844 1846# 1846 1848# 1848 1850# 1850 1852# 1852
1854# 1854 1857# 1857 1859# 1859 1935# 1935 1937# 1937 1939# 1939 1941# 1941
1943# 1943 1945# 1945 1947# 1947 1949# 1949 1951# 1951 1953# 1953 1955# 1955
1957# 1957 1959# 1959 1961# 1961 1963# 1963 1965# 1965 1967# 1967 1969# 1969
1971# 1971 1973# 1973 1975# 1975 1977# 1977 1979# 1979 1981# 1981 1983# 1983
1985# 1985 1987# 1987 1989# 1989 1991# 1991 1993# 1993 1995# 1995 1997# 1997
1999# 1999 2001# 2001 2003# 2003 2005# 2005 2007# 2007 2009# 2009 2011# 2011
2013# 2013 2015# 2015 2017# 2017 2020# 2020 2022# 2022 2098# 2098 2100# 2100
2102# 2102 2104# 2104 2106# 2106 2108# 2108 2110# 2110 2112# 2112 2114# 2114
2116# 2116 2118# 2118 2120# 2120 2122# 2122 2124# 2124 2126# 2126 2128# 2128
2130# 2130 2132# 2132 2134# 2134 2136# 2136 2138# 2138 2140# 2140 2142# 2142
2144# 2144 2146# 2146 2148# 2148 2150# 2150 2152# 2152 2154# 2154 2156# 2156
2158# 2158 2160# 2160 2162# 2162 2164# 2164 2166# 2166 2168# 2168 2170# 2170
2172# 2172 2174# 2174 2176# 2176 2178# 2178 2180# 2180 2182# 2182 2184# 2184
2187# 2187 2189# 2189 2268# 2268 2270# 2270 2272# 2272 2274# 2274 2276# 2276
2278# 2278 2280# 2280 2360# 2360 2362# 2362 2364# 2364 2366# 2366 2368# 2368
2370# 2370 2372# 2372 2374# 2374 2453# 2453 2455# 2455 2457# 2457 2459# 2459
2461# 2461 2463# 2463 2465# 2465 2467# 2467 2469# 2469 2548# 2548 2550# 2550
2552# 2552 2554# 2554 2556# 2556 2558# 2558 2560# 2560 2562# 2562 2564# 2564
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2657# 2657 2659# 2659 2661# 2661 2663# 2663 2665# 2665 2751# 2751 2753# 2753
2755# 2755 2757# 2757 2759# 2759 2761# 2761 2763# 2763 2765# 2765 2768# 2768
2770# 2770 2772# 2772 2774# 2774 2853# 2853 2855# 2855 2857# 2857 2859# 2859
2861# 2861 2863# 2863 2865# 2865 2868# 2868 2870# 2870 2872# 2872 2874# 2874
2876# 2876 2878# 2878 2880# 2880 2883# 2883 2885# 2885 2887# 2887 2889# 2889
2891# 2891 2893# 2893 2895# 2895 2898# 2898 2976# 2976 2978# 2978 2980# 2980
2982# 2982 2984# 2984 2986# 2986 2988# 2988 3063# 3063 3065# 3065 3151# 3151
3153# 3153 3155# 3155 3157# 3157 3159# 3159 3161# 3161 3163# 3163 3165# 3165
3167# 3167 3169# 3169 3251# 3251 3253# 3253 3255# 3255 3257# 3257 3259# 3259
3262# 3262 3264# 3264 3266# 3266 3268# 3268 3271# 3271 3273# 3273 3275# 3275
3278# 3278 3280# 3280 3282# 3282 3285# 3285 3287# 3287 3289# 3289 3292# 3292
3294# 3294 3296# 3296 3299# 3299 3301# 3301 3303# 3303 3306# 3306 3308# 3308
3310# 3310 3313# 3313 3315# 3315 3317# 3317 3320# 3320 3322# 3322 3324# 3324
3327# 3327 3329# 3329 3331# 3331 3334# 3334 3336# 3336 3338# 3338 3341# 3341
3343# 3343 3345# 3345 3348# 3348 3350# 3350 3352# 3352 3355# 3355 3357# 3357
3359# 3359 3362# 3362 3364# 3364 3366# 3366 3369# 3369 3371# 3371 3373# 3373
3376# 3376 3378# 3378 3380# 3380 3383# 3383 3385# 3385 3387# 3387 3390# 3390
3392# 3392 3394# 3394 3397# 3397 3399# 3399 3479# 3479 3481# 3481 3483# 3483
3485# 3485 3487# 3487 3489# 3489 3491# 3491 3493# 3493 3495# 3495 3497# 3497 SEQ 0872
3499# 3499 3502# 3502 3504# 3504 3588# 3588 3590# 3590 3592# 3592 3594# 3594
3597# 3597 3599# 3599 3601# 3601 3604# 3604 3606# 3606 3608# 3608 3611# 3611
3613# 3613 3615# 3615 3618# 3618 3620# 3620 3701# 3701 3704# 3704 3706# 3706
3708# 3708 3711# 3711 3713# 3713 3715# 3715 3718# 3718 3720# 3720 3722# 3722
3725# 3725 3727# 3727 3729# 3729 3732# 3732 3734# 3734 3737# 3737 3813# 3813
3815# 3815 3817# 3817 3819# 3819 3821# 3821 3823# 3823 3825# 3825 3827# 3827
3919# 3919 3921# 3921 3923# 3923 3925# 3925 3927# 3927 3930# 3930 3932# 3932
3934# 3934 3936# 3936 3938# 3938 3940# 3940 3942# 3942 3944# 3944 3947# 3947
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4577# 4577 4579# 4579 4581# 4581 4583# 4583 4585# 4585 4588# 4588 4590# 4590
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424# 424 426# 426 428# 428 430# 430 432# 432 435# 435 437# 437 SEQ 0874
531# 531 533# 533 535# 535 537# 537 539# 539 541# 541 543# 543
545# 545 547# 547 549# 549 551# 551 553# 553 555# 555 558# 558
560# 560 664# 664 666# 666 668# 668 670# 670 672# 672 674# 674
676# 676 678# 678 680# 680 682# 682 684# 684 686# 686 688# 688
690# 690 692# 692 694# 694 696# 696 698# 698 700# 700 702# 702
704# 704 706# 706 708# 708 710# 710 796# 796 798# 798 800# 800
802# 802 887# 887 889# 889 891# 891 893# 893 978# 978 980# 980
982# 982 984# 984 1066# 1066 1068# 1068 1070# 1070 1148# 1148 1150# 1150
1152# 1152 1154# 1154 1156# 1156 1158# 1158 1160# 1160 1163# 1163 1239# 1239
1241# 1241 1243# 1243 1245# 1245 1326# 1326 1328# 1328 1330# 1330 1332# 1332
1334# 1334 1336# 1336 1338# 1338 1340# 1340 1342# 1342 1344# 1344 1346# 1346
1348# 1348 1350# 1350 1352# 1352 1355# 1355 1357# 1357 1359# 1359 1362# 1362
1438# 1438 1440# 1440 1442# 1442 1444# 1444 1446# 1446 1448# 1448 1450# 1450
1452# 1452 1454# 1454 1456# 1456 1458# 1458 1460# 1460 1462# 1462 1464# 1464
1466# 1466 1468# 1468 1470# 1470 1472# 1472 1474# 1474 1476# 1476 1478# 1478
1480# 1480 1482# 1482 1484# 1484 1486# 1486 1488# 1488 1490# 1490 1492# 1492
1494# 1494 1496# 1496 1498# 1498 1500# 1500 1502# 1502 1504# 1504 1506# 1506
1508# 1508 1510# 1510 1512# 1512 1514# 1514 1516# 1516 1518# 1518 1520# 1520
1522# 1522 1525# 1525 1527# 1527 1603# 1603 1605# 1605 1607# 1607 1609# 1609
1611# 1611 1613# 1613 1615# 1615 1617# 1617 1619# 1619 1621# 1621 1623# 1623
1625# 1625 1627# 1627 1629# 1629 1631# 1631 1633# 1633 1635# 1635 1637# 1637
1639# 1639 1641# 1641 1643# 1643 1645# 1645 1647# 1647 1649# 1649 1651# 1651
1653# 1653 1655# 1655 1657# 1657 1659# 1659 1661# 1661 1663# 1663 1665# 1665
1667# 1667 1669# 1669 1671# 1671 1673# 1673 1675# 1675 1677# 1677 1679# 1679
1681# 1681 1683# 1683 1685# 1685 1687# 1687 1690# 1690 1692# 1692 1768# 1768
1770# 1770 1772# 1772 1774# 1774 1776# 1776 1778# 1778 1780# 1780 1782# 1782
1784# 1784 1786# 1786 1788# 1788 1790# 1790 1792# 1792 1794# 1794 1796# 1796
1798# 1798 1800# 1800 1802# 1802 1804# 1804 1806# 1806 1808# 1808 1810# 1810
1812# 1812 1814# 1814 1816# 1816 1818# 1818 1820# 1820 1822# 1822 1824# 1824
1826# 1826 1828# 1828 1830# 1830 1832# 1832 1834# 1834 1836# 1836 1838# 1838
1840# 1840 1842# 1842 1844# 1844 1846# 1846 1848# 1848 1850# 1850 1852# 1852
1854# 1854 1857# 1857 1859# 1859 1935# 1935 1937# 1937 1939# 1939 1941# 1941
1943# 1943 1945# 1945 1947# 1947 1949# 1949 1951# 1951 1953# 1953 1955# 1955
1957# 1957 1959# 1959 1961# 1961 1963# 1963 1965# 1965 1967# 1967 1969# 1969
1971# 1971 1973# 1973 1975# 1975 1977# 1977 1979# 1979 1981# 1981 1983# 1983
1985# 1985 1987# 1987 1989# 1989 1991# 1991 1993# 1993 1995# 1995 1997# 1997
1999# 1999 2001# 2001 2003# 2003 2005# 2005 2007# 2007 2009# 2009 2011# 2011
2013# 2013 2015# 2015 2017# 2017 2020# 2020 2022# 2022 2098# 2098 2100# 2100
2102# 2102 2104# 2104 2106# 2106 2108# 2108 2110# 2110 2112# 2112 2114# 2114
2116# 2116 2118# 2118 2120# 2120 2122# 2122 2124# 2124 2126# 2126 2128# 2128
2130# 2130 2132# 2132 2134# 2134 2136# 2136 2138# 2138 2140# 2140 2142# 2142
2144# 2144 2146# 2146 2148# 2148 2150# 2150 2152# 2152 2154# 2154 2156# 2156
2158# 2158 2160# 2160 2162# 2162 2164# 2164 2166# 2166 2168# 2168 2170# 2170
2172# 2172 2174# 2174 2176# 2176 2178# 2178 2180# 2180 2182# 2182 2184# 2184
2187# 2187 2189# 2189 2268# 2268 2270# 2270 2272# 2272 2274# 2274 2276# 2276
2278# 2278 2280# 2280 2360# 2360 2362# 2362 2364# 2364 2366# 2366 2368# 2368
2370# 2370 2372# 2372 2374# 2374 2453# 2453 2455# 2455 2457# 2457 2459# 2459
2461# 2461 2463# 2463 2465# 2465 2467# 2467 2469# 2469 2548# 2548 2550# 2550
2552# 2552 2554# 2554 2556# 2556 2558# 2558 2560# 2560 2562# 2562 2564# 2564
2566# 2566 2645# 2645 2647# 2647 2649# 2649 2651# 2651 2653# 2653 2655# 2655
2657# 2657 2659# 2659 2661# 2661 2663# 2663 2665# 2665 2751# 2751 2753# 2753
2755# 2755 2757# 2757 2759# 2759 2761# 2761 2763# 2763 2765# 2765 2768# 2768
2770# 2770 2772# 2772 2774# 2774 2853# 2853 2855# 2855 2857# 2857 2859# 2859 SEQ 0875
2861# 2861 2863# 2863 2865# 2865 2868# 2868 2870# 2870 2872# 2872 2874# 2874
2876# 2876 2878# 2878 2880# 2880 2883# 2883 2885# 2885 2887# 2887 2889# 2889
2891# 2891 2893# 2893 2895# 2895 2898# 2898 2976# 2976 2978# 2978 2980# 2980
2982# 2982 2984# 2984 2986# 2986 2988# 2988 3063# 3063 3065# 3065 3151# 3151
3153# 3153 3155# 3155 3157# 3157 3159# 3159 3161# 3161 3163# 3163 3165# 3165
3167# 3167 3169# 3169 3251# 3251 3253# 3253 3255# 3255 3257# 3257 3259# 3259
3262# 3262 3264# 3264 3266# 3266 3268# 3268 3271# 3271 3273# 3273 3275# 3275
3278# 3278 3280# 3280 3282# 3282 3285# 3285 3287# 3287 3289# 3289 3292# 3292
3294# 3294 3296# 3296 3299# 3299 3301# 3301 3303# 3303 3306# 3306 3308# 3308
3310# 3310 3313# 3313 3315# 3315 3317# 3317 3320# 3320 3322# 3322 3324# 3324
3327# 3327 3329# 3329 3331# 3331 3334# 3334 3336# 3336 3338# 3338 3341# 3341
3343# 3343 3345# 3345 3348# 3348 3350# 3350 3352# 3352 3355# 3355 3357# 3357
3359# 3359 3362# 3362 3364# 3364 3366# 3366 3369# 3369 3371# 3371 3373# 3373
3376# 3376 3378# 3378 3380# 3380 3383# 3383 3385# 3385 3387# 3387 3390# 3390
3392# 3392 3394# 3394 3397# 3397 3399# 3399 3479# 3479 3481# 3481 3483# 3483
3485# 3485 3487# 3487 3489# 3489 3491# 3491 3493# 3493 3495# 3495 3497# 3497
3499# 3499 3502# 3502 3504# 3504 3588# 3588 3590# 3590 3592# 3592 3594# 3594
3597# 3597 3599# 3599 3601# 3601 3604# 3604 3606# 3606 3608# 3608 3611# 3611
3613# 3613 3615# 3615 3618# 3618 3620# 3620 3701# 3701 3704# 3704 3706# 3706
3708# 3708 3711# 3711 3713# 3713 3715# 3715 3718# 3718 3720# 3720 3722# 3722
3725# 3725 3727# 3727 3729# 3729 3732# 3732 3734# 3734 3737# 3737 3813# 3813
3815# 3815 3817# 3817 3819# 3819 3821# 3821 3823# 3823 3825# 3825 3827# 3827
3919# 3919 3921# 3921 3923# 3923 3925# 3925 3927# 3927 3930# 3930 3932# 3932
3934# 3934 3936# 3936 3938# 3938 3940# 3940 3942# 3942 3944# 3944 3947# 3947
4029# 4029 4031# 4031 4033# 4033 4035# 4035 4037# 4037 4039# 4039 4041# 4041
4043# 4043 4045# 4045 4047# 4047 4049# 4049 4051# 4051 4054# 4054 4135# 4135
4137# 4137 4139# 4139 4141# 4141 4143# 4143 4146# 4146 4148# 4148 4150# 4150
4237# 4237 4239# 4239 4241# 4241 4243# 4243 4245# 4245 4250# 4250 4252# 4252
4254# 4254 4256# 4256 4258# 4258 4261# 4261 4342# 4342 4344# 4344 4346# 4346
4348# 4348 4350# 4350 4352# 4352 4354# 4354 4356# 4356 4358# 4358 4360# 4360
4362# 4362 4365# 4365 4367# 4367 4369# 4369 4448# 4448 4450# 4450 4452# 4452
4454# 4454 4456# 4456 4458# 4458 4460# 4460 4462# 4462 4464# 4464 4466# 4466
4469# 4469 4472# 4472 4551# 4551 4554# 4554 4556# 4556 4558# 4558 4560# 4560
4562# 4562 4564# 4564 4566# 4566 4568# 4568 4571# 4571 4573# 4573 4575# 4575
4577# 4577 4579# 4579 4581# 4581 4583# 4583 4585# 4585 4588# 4588 4590# 4590
4592# 4592 4594# 4594 4596# 4596 4598# 4598 4600# 4600 4602# 4602 4605# 4605
4607# 4607 4609# 4609 4611# 4611 4613# 4613 4615# 4615 4617# 4617 4619# 4619
4622# 4622 4624# 4624 4626# 4626 4628# 4628 4630# 4630 4632# 4632 4634# 4634
4636# 4636 4639# 4639 4641# 4641 4643# 4643 4645# 4645 4647# 4647 4649# 4649
4651# 4651 4653# 4653 4656# 4656 4658# 4658 4660# 4660 4662# 4662 4664# 4664
4666# 4666 4668# 4668 4670# 4670 4673# 4673 4675# 4675 4677# 4677 4679# 4679
4681# 4681 4683# 4683 4685# 4685 4687# 4687 4690# 4690 4692# 4692 4694# 4694
4696# 4696 4698# 4698 4700# 4700 4702# 4702 4704# 4704 4707# 4707 4709# 4709
4711# 4711 4713# 4713 4715# 4715 4717# 4717 4719# 4719 4721# 4721 4724# 4724
4726# 4726 4728# 4728 4730# 4730 4732# 4732 4734# 4734 4736# 4736 4738# 4738
4741# 4741 4743# 4743 4745# 4745 4747# 4747 4749# 4749 4751# 4751 4753# 4753
4755# 4755 4758# 4758 4760# 4760 4762# 4762 4764# 4764 4766# 4766 4768# 4768
4770# 4770 4772# 4772 4774# 4774 4852# 4852 4854# 4854 4856# 4856 4858# 4858
4860# 4860 4862# 4862 4864# 4864 4866# 4866 4868# 4868 4870# 4870 4872# 4872
4874# 4874 4969# 4969 4971# 4971 4973# 4973 4975# 4975 4977# 4977 4979# 4979
4981# 4981 4983# 4983 4985# 4985 4988# 4988 4990# 4990 4992# 4992 4994# 4994
4996# 4996 4998# 4998 5000# 5000 5002# 5002 5004# 5004 5007# 5007 5009# 5009
5011# 5011 5013# 5013 5015# 5015 5017# 5017 5019# 5019 5021# 5021 5023# 5023 SEQ 0876
5026# 5026 5028# 5028 5030# 5030 5032# 5032 5034# 5034 5036# 5036 5038# 5038
5040# 5040 5042# 5042 5045# 5045 5047# 5047 5049# 5049 5051# 5051 5053# 5053
5055# 5055 5057# 5057 5059# 5059 5062# 5062 5173# 5173 5176# 5176 5179# 5179
5182# 5182 5193# 5193 5195# 5195 5198# 5198 5200# 5200 5202# 5202 5205# 5205
5207# 5207 5209# 5209 5212# 5212 5214# 5214 5216# 5216 5219# 5219 5221# 5221
5223# 5223 5226# 5226 5228# 5228 5230# 5230 5233# 5233 5235# 5235 5237# 5237
5240# 5240 5242# 5242 5244# 5244 5247# 5247 5249# 5249 5251# 5251 5254# 5254
5256# 5256 5258# 5258 5261# 5261 5263# 5263 5265# 5265 5268# 5268 5270# 5270
5272# 5272 5275# 5275 5277# 5277 5279# 5279 5282# 5282 5284# 5284 5286# 5286
5289# 5289 5291# 5291 5293# 5293 5296# 5296 5298# 5298 5300# 5300 5303# 5303
5305# 5305 5307# 5307 5310# 5310 5312# 5312 5314# 5314 5317# 5317 5319# 5319
5321# 5321 5324# 5324 5326# 5326 5328# 5328 5331# 5331 5333# 5333 5335# 5335
5338# 5338 5340# 5340 5342# 5342 5345# 5345 5347# 5347 5349# 5349 5352# 5352
5354# 5354 5356# 5356 5359# 5359 5361# 5361 5363# 5363 5366# 5366 5368# 5368
5370# 5370 5373# 5373 5375# 5375 5377# 5377 5380# 5380 5382# 5382 5385# 5385
5387# 5387 5389# 5389 5391# 5391 5393# 5393 5395# 5395 5397# 5397 5399# 5399
5401# 5401 5403# 5403 5405# 5405 5407# 5407 5409# 5409 5411# 5411 5413# 5413
5415# 5415 5417# 5417 5419# 5419 5421# 5421 5423# 5423 5425# 5425 5427# 5427
5429# 5429 5431# 5431 5433# 5433 5435# 5435 5520# 5520 5522# 5522 5524# 5524
5526# 5526 5528# 5528 5530# 5530 5532# 5532 5534# 5534 5536# 5536 5538# 5538
5541# 5541 5543# 5543 5545# 5545 5547# 5547 5549# 5549 5551# 5551 5553# 5553
5633# 5633 5635# 5635 5637# 5637 5639# 5639 5641# 5641 5643# 5643 5645# 5645
5647# 5647 5649# 5649 5651# 5651 5654# 5654 5656# 5656 5658# 5658 5660# 5660
5662# 5662 5664# 5664 5666# 5666 5668# 5668 5670# 5670 5672# 5672 5674# 5674
5676# 5676 5678# 5678 5680# 5680 5682# 5682 5684# 5684 5686# 5686 5688# 5688
5690# 5690 5692# 5692 5694# 5694 5696# 5696 5698# 5698 5700# 5700 5702# 5702
5704# 5704 5706# 5706 5708# 5708 5710# 5710 5712# 5712 5714# 5714 5716# 5716
5718# 5718 5720# 5720 5722# 5722 5724# 5724 5726# 5726 5728# 5728 5730# 5730
5732# 5732 5734# 5734 5736# 5736 5738# 5738 5740# 5740 5742# 5742 5744# 5744
5746# 5746 5748# 5748 5751# 5751 5753# 5753 5756# 5756 5758# 5758 5760# 5760
5762# 5762 5764# 5764 5766# 5766 5768# 5768 5770# 5770 5772# 5772 5774# 5774
5776# 5776 5778# 5778 5780# 5780 5782# 5782 5784# 5784 5786# 5786 5788# 5788
5790# 5790 5792# 5792 5794# 5794 5796# 5796 5798# 5798 5800# 5800 5802# 5802
5879# 5879 5881# 5881 5883# 5883 5885# 5885 5887# 5887 5889# 5889 5891# 5891
5893# 5893 5895# 5895 5897# 5897 5900# 5900 5902# 5902 5979# 5979 5981# 5981
5983# 5983 5985# 5985 5987# 5987 6065# 6065 6067# 6067 6069# 6069 6071# 6071
6073# 6073 6075# 6075 6078# 6078 6159# 6159 6161# 6161 6163# 6163 6165# 6165
6167# 6167 6169# 6169 6171# 6171 6173# 6173 6175# 6175 6178# 6178 6180# 6180
6182# 6182 6184# 6184 6187# 6187 6264# 6264 6266# 6266 6268# 6268 6270# 6270
6272# 6272 6274# 6274 6276# 6276 6278# 6278 6280# 6280 6282# 6282 6284# 6284
6286# 6286 6288# 6288 6290# 6290 6292# 6292 6294# 6294 6372# 6372 6374# 6374
6376# 6376 6378# 6378 6454# 6454 6456# 6456 6458# 6458 6460# 6460 6462# 6462
6464# 6464 6466# 6466 6468# 6468 6470# 6470 6472# 6472 6474# 6474 6476# 6476
6478# 6478 6480# 6480 6482# 6482 6484# 6484 6486# 6486 6488# 6488 6490# 6490
6492# 6492 6494# 6494 6496# 6496 6498# 6498 6500# 6500 6502# 6502 6504# 6504
6506# 6506 6508# 6508 6510# 6510 6512# 6512 6514# 6514 6516# 6516 6518# 6518
6520# 6520 6523# 6523 6526# 6526 6601# 6601 6603# 6603 6605# 6605 6607# 6607
6609# 6609 6611# 6611 6613# 6613 6615# 6615 6617# 6617 6619# 6619 6621# 6621
6623# 6623 6625# 6625 6627# 6627 6629# 6629 6631# 6631 6633# 6633 6635# 6635
6637# 6637 6639# 6639 6641# 6641 6643# 6643 6645# 6645 6647# 6647 6649# 6649
6651# 6651 6653# 6653 6655# 6655 6657# 6657 6659# 6659 6661# 6661 6663# 6663
6665# 6665 6668# 6668 6671# 6671 6745# 6745 6747# 6747 6749# 6749 6751# 6751
6753# 6753 6755# 6755 6757# 6757 6759# 6759 6761# 6761 6763# 6763 6765# 6765 SEQ 0877
6767# 6767 6769# 6769 6771# 6771 6773# 6773 6775# 6775 6777# 6777 6779# 6779
6781# 6781 6783# 6783 6785# 6785 6787# 6787 6789# 6789 6791# 6791 6793# 6793
6795# 6795 6797# 6797 6799# 6799 6801# 6801 6803# 6803 6805# 6805 6807# 6807
6809# 6809 6811# 6811 6813# 6813 6815# 6815 6817# 6817 6819# 6819 6821# 6821
6823# 6823 6825# 6825 6827# 6827 6829# 6829 6831# 6831 6833# 6833 6835# 6835
6837# 6837 6839# 6839 6841# 6841 6844# 6844 6847# 6847 6920# 6920 6922# 6922
6924# 6924 6926# 6926 6928# 6928 6930# 6930 6932# 6932 6934# 6934 6936# 6936
6938# 6938 6940# 6940 6942# 6942 6944# 6944 6946# 6946 6948# 6948 6950# 6950
6952# 6952 6954# 6954 6956# 6956 6958# 6958 6960# 6960 6962# 6962 6964# 6964
6966# 6966 6968# 6968 6970# 6970 6972# 6972 6974# 6974 6976# 6976 6978# 6978
6980# 6980 6982# 6982 6984# 6984 6986# 6986 6988# 6988 6990# 6990 6992# 6992
6994# 6994 6997# 6997 6999# 6999 7001# 7001
$GARG 193# 193 195# 195 197# 197 199# 199 297# 297 299# 299 301# 301
303# 303 305# 305 308# 308 310# 310 312# 312 314# 314 408# 408
410# 410 412# 412 414# 414 416# 416 418# 418 420# 420 422# 422
424# 424 426# 426 428# 428 430# 430 432# 432 435# 435 437# 437
531# 531 533# 533 535# 535 537# 537 539# 539 541# 541 543# 543
545# 545 547# 547 549# 549 551# 551 553# 553 555# 555 558# 558
560# 560 664# 664 666# 666 668# 668 670# 670 672# 672 674# 674
676# 676 678# 678 680# 680 682# 682 684# 684 686# 686 688# 688
690# 690 692# 692 694# 694 696# 696 698# 698 700# 700 702# 702
704# 704 706# 706 708# 708 710# 710 796# 796 798# 798 800# 800
802# 802 887# 887 889# 889 891# 891 893# 893 978# 978 980# 980
982# 982 984# 984 1066# 1066 1068# 1068 1070# 1070 1148# 1148 1150# 1150
1152# 1152 1154# 1154 1156# 1156 1158# 1158 1160# 1160 1163# 1163 1239# 1239
1241# 1241 1243# 1243 1245# 1245 1326# 1326 1328# 1328 1330# 1330 1332# 1332
1334# 1334 1336# 1336 1338# 1338 1340# 1340 1342# 1342 1344# 1344 1346# 1346
1348# 1348 1350# 1350 1352# 1352 1355# 1355 1357# 1357 1359# 1359 1362# 1362
1438# 1438 1440# 1440 1442# 1442 1444# 1444 1446# 1446 1448# 1448 1450# 1450
1452# 1452 1454# 1454 1456# 1456 1458# 1458 1460# 1460 1462# 1462 1464# 1464
1466# 1466 1468# 1468 1470# 1470 1472# 1472 1474# 1474 1476# 1476 1478# 1478
1480# 1480 1482# 1482 1484# 1484 1486# 1486 1488# 1488 1490# 1490 1492# 1492
1494# 1494 1496# 1496 1498# 1498 1500# 1500 1502# 1502 1504# 1504 1506# 1506
1508# 1508 1510# 1510 1512# 1512 1514# 1514 1516# 1516 1518# 1518 1520# 1520
1522# 1522 1525# 1525 1527# 1527 1603# 1603 1605# 1605 1607# 1607 1609# 1609
1611# 1611 1613# 1613 1615# 1615 1617# 1617 1619# 1619 1621# 1621 1623# 1623
1625# 1625 1627# 1627 1629# 1629 1631# 1631 1633# 1633 1635# 1635 1637# 1637
1639# 1639 1641# 1641 1643# 1643 1645# 1645 1647# 1647 1649# 1649 1651# 1651
1653# 1653 1655# 1655 1657# 1657 1659# 1659 1661# 1661 1663# 1663 1665# 1665
1667# 1667 1669# 1669 1671# 1671 1673# 1673 1675# 1675 1677# 1677 1679# 1679
1681# 1681 1683# 1683 1685# 1685 1687# 1687 1690# 1690 1692# 1692 1768# 1768
1770# 1770 1772# 1772 1774# 1774 1776# 1776 1778# 1778 1780# 1780 1782# 1782
1784# 1784 1786# 1786 1788# 1788 1790# 1790 1792# 1792 1794# 1794 1796# 1796
1798# 1798 1800# 1800 1802# 1802 1804# 1804 1806# 1806 1808# 1808 1810# 1810
1812# 1812 1814# 1814 1816# 1816 1818# 1818 1820# 1820 1822# 1822 1824# 1824
1826# 1826 1828# 1828 1830# 1830 1832# 1832 1834# 1834 1836# 1836 1838# 1838
1840# 1840 1842# 1842 1844# 1844 1846# 1846 1848# 1848 1850# 1850 1852# 1852
1854# 1854 1857# 1857 1859# 1859 1935# 1935 1937# 1937 1939# 1939 1941# 1941
1943# 1943 1945# 1945 1947# 1947 1949# 1949 1951# 1951 1953# 1953 1955# 1955
1957# 1957 1959# 1959 1961# 1961 1963# 1963 1965# 1965 1967# 1967 1969# 1969
1971# 1971 1973# 1973 1975# 1975 1977# 1977 1979# 1979 1981# 1981 1983# 1983
1985# 1985 1987# 1987 1989# 1989 1991# 1991 1993# 1993 1995# 1995 1997# 1997
1999# 1999 2001# 2001 2003# 2003 2005# 2005 2007# 2007 2009# 2009 2011# 2011 SEQ 0878
2013# 2013 2015# 2015 2017# 2017 2020# 2020 2022# 2022 2098# 2098 2100# 2100
2102# 2102 2104# 2104 2106# 2106 2108# 2108 2110# 2110 2112# 2112 2114# 2114
2116# 2116 2118# 2118 2120# 2120 2122# 2122 2124# 2124 2126# 2126 2128# 2128
2130# 2130 2132# 2132 2134# 2134 2136# 2136 2138# 2138 2140# 2140 2142# 2142
2144# 2144 2146# 2146 2148# 2148 2150# 2150 2152# 2152 2154# 2154 2156# 2156
2158# 2158 2160# 2160 2162# 2162 2164# 2164 2166# 2166 2168# 2168 2170# 2170
2172# 2172 2174# 2174 2176# 2176 2178# 2178 2180# 2180 2182# 2182 2184# 2184
2187# 2187 2189# 2189 2268# 2268 2270# 2270 2272# 2272 2274# 2274 2276# 2276
2278# 2278 2280# 2280 2360# 2360 2362# 2362 2364# 2364 2366# 2366 2368# 2368
2370# 2370 2372# 2372 2374# 2374 2453# 2453 2455# 2455 2457# 2457 2459# 2459
2461# 2461 2463# 2463 2465# 2465 2467# 2467 2469# 2469 2548# 2548 2550# 2550
2552# 2552 2554# 2554 2556# 2556 2558# 2558 2560# 2560 2562# 2562 2564# 2564
2566# 2566 2645# 2645 2647# 2647 2649# 2649 2651# 2651 2653# 2653 2655# 2655
2657# 2657 2659# 2659 2661# 2661 2663# 2663 2665# 2665 2751# 2751 2753# 2753
2755# 2755 2757# 2757 2759# 2759 2761# 2761 2763# 2763 2765# 2765 2768# 2768
2770# 2770 2772# 2772 2774# 2774 2853# 2853 2855# 2855 2857# 2857 2859# 2859
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2876# 2876 2878# 2878 2880# 2880 2883# 2883 2885# 2885 2887# 2887 2889# 2889
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6623# 6623 6625# 6625 6627# 6627 6629# 6629 6631# 6631 6633# 6633 6635# 6635
6637# 6637 6639# 6639 6641# 6641 6643# 6643 6645# 6645 6647# 6647 6649# 6649
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6753# 6753 6755# 6755 6757# 6757 6759# 6759 6761# 6761 6763# 6763 6765# 6765
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6823# 6823 6825# 6825 6827# 6827 6829# 6829 6831# 6831 6833# 6833 6835# 6835 SEQ 0887
6837# 6837 6839# 6839 6841# 6841 6844# 6844 6847# 6847 6920# 6920 6922# 6922
6924# 6924 6926# 6926 6928# 6928 6930# 6930 6932# 6932 6934# 6934 6936# 6936
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6980# 6980 6982# 6982 6984# 6984 6986# 6986 6988# 6988 6990# 6990 6992# 6992
6994# 6994 6997# 6997 6999# 6999 7001# 7001
%MR 193# 193 195# 195 197# 197 199# 199 297# 297 299# 299 301# 301
303# 303 305# 305 308# 308 310# 310 312# 312 314# 314 408# 408
410# 410 412# 412 414# 414 416# 416 418# 418 420# 420 422# 422
424# 424 426# 426 428# 428 430# 430 432# 432 435# 435 437# 437
531# 531 533# 533 535# 535 537# 537 539# 539 541# 541 543# 543
545# 545 547# 547 549# 549 551# 551 553# 553 555# 555 558# 558
560# 560 664# 664 666# 666 668# 668 670# 670 672# 672 674# 674
676# 676 678# 678 680# 680 682# 682 684# 684 686# 686 688# 688
690# 690 692# 692 694# 694 696# 696 698# 698 700# 700 702# 702
704# 704 706# 706 708# 708 710# 710 796# 796 798# 798 800# 800
802# 802 887# 887 889# 889 891# 891 893# 893 978# 978 980# 980
982# 982 984# 984 1066# 1066 1068# 1068 1070# 1070 1148# 1148 1150# 1150
1152# 1152 1154# 1154 1156# 1156 1158# 1158 1160# 1160 1163# 1163 1239# 1239
1241# 1241 1243# 1243 1245# 1245 1326# 1326 1328# 1328 1330# 1330 1332# 1332
1334# 1334 1336# 1336 1338# 1338 1340# 1340 1342# 1342 1344# 1344 1346# 1346
1348# 1348 1350# 1350 1352# 1352 1355# 1355 1357# 1357 1359# 1359 1362# 1362
1438# 1438 1440# 1440 1442# 1442 1444# 1444 1446# 1446 1448# 1448 1450# 1450
1452# 1452 1454# 1454 1456# 1456 1458# 1458 1460# 1460 1462# 1462 1464# 1464
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1494# 1494 1496# 1496 1498# 1498 1500# 1500 1502# 1502 1504# 1504 1506# 1506
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1639# 1639 1641# 1641 1643# 1643 1645# 1645 1647# 1647 1649# 1649 1651# 1651
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1798# 1798 1800# 1800 1802# 1802 1804# 1804 1806# 1806 1808# 1808 1810# 1810
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1826# 1826 1828# 1828 1830# 1830 1832# 1832 1834# 1834 1836# 1836 1838# 1838
1840# 1840 1842# 1842 1844# 1844 1846# 1846 1848# 1848 1850# 1850 1852# 1852
1854# 1854 1857# 1857 1859# 1859 1935# 1935 1937# 1937 1939# 1939 1941# 1941
1943# 1943 1945# 1945 1947# 1947 1949# 1949 1951# 1951 1953# 1953 1955# 1955
1957# 1957 1959# 1959 1961# 1961 1963# 1963 1965# 1965 1967# 1967 1969# 1969
1971# 1971 1973# 1973 1975# 1975 1977# 1977 1979# 1979 1981# 1981 1983# 1983
1985# 1985 1987# 1987 1989# 1989 1991# 1991 1993# 1993 1995# 1995 1997# 1997
1999# 1999 2001# 2001 2003# 2003 2005# 2005 2007# 2007 2009# 2009 2011# 2011
2013# 2013 2015# 2015 2017# 2017 2020# 2020 2022# 2022 2098# 2098 2100# 2100
2102# 2102 2104# 2104 2106# 2106 2108# 2108 2110# 2110 2112# 2112 2114# 2114
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2144# 2144 2146# 2146 2148# 2148 2150# 2150 2152# 2152 2154# 2154 2156# 2156 SEQ 0888
2158# 2158 2160# 2160 2162# 2162 2164# 2164 2166# 2166 2168# 2168 2170# 2170
2172# 2172 2174# 2174 2176# 2176 2178# 2178 2180# 2180 2182# 2182 2184# 2184
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4681# 4681 4683# 4683 4685# 4685 4687# 4687 4690# 4690 4692# 4692 4694# 4694 SEQ 0889
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4711# 4711 4713# 4713 4715# 4715 4717# 4717 4719# 4719 4721# 4721 4724# 4724
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5401# 5401 5403# 5403 5405# 5405 5407# 5407 5409# 5409 5411# 5411 5413# 5413
5415# 5415 5417# 5417 5419# 5419 5421# 5421 5423# 5423 5425# 5425 5427# 5427
5429# 5429 5431# 5431 5433# 5433 5435# 5435 5520# 5520 5522# 5522 5524# 5524
5526# 5526 5528# 5528 5530# 5530 5532# 5532 5534# 5534 5536# 5536 5538# 5538
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5718# 5718 5720# 5720 5722# 5722 5724# 5724 5726# 5726 5728# 5728 5730# 5730
5732# 5732 5734# 5734 5736# 5736 5738# 5738 5740# 5740 5742# 5742 5744# 5744
5746# 5746 5748# 5748 5751# 5751 5753# 5753 5756# 5756 5758# 5758 5760# 5760
5762# 5762 5764# 5764 5766# 5766 5768# 5768 5770# 5770 5772# 5772 5774# 5774
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5790# 5790 5792# 5792 5794# 5794 5796# 5796 5798# 5798 5800# 5800 5802# 5802
5879# 5879 5881# 5881 5883# 5883 5885# 5885 5887# 5887 5889# 5889 5891# 5891
5893# 5893 5895# 5895 5897# 5897 5900# 5900 5902# 5902 5979# 5979 5981# 5981
5983# 5983 5985# 5985 5987# 5987 6065# 6065 6067# 6067 6069# 6069 6071# 6071
6073# 6073 6075# 6075 6078# 6078 6159# 6159 6161# 6161 6163# 6163 6165# 6165
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6376# 6376 6378# 6378 6454# 6454 6456# 6456 6458# 6458 6460# 6460 6462# 6462 SEQ 0890
6464# 6464 6466# 6466 6468# 6468 6470# 6470 6472# 6472 6474# 6474 6476# 6476
6478# 6478 6480# 6480 6482# 6482 6484# 6484 6486# 6486 6488# 6488 6490# 6490
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6506# 6506 6508# 6508 6510# 6510 6512# 6512 6514# 6514 6516# 6516 6518# 6518
6520# 6520 6523# 6523 6526# 6526 6601# 6601 6603# 6603 6605# 6605 6607# 6607
6609# 6609 6611# 6611 6613# 6613 6615# 6615 6617# 6617 6619# 6619 6621# 6621
6623# 6623 6625# 6625 6627# 6627 6629# 6629 6631# 6631 6633# 6633 6635# 6635
6637# 6637 6639# 6639 6641# 6641 6643# 6643 6645# 6645 6647# 6647 6649# 6649
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6809# 6809 6811# 6811 6813# 6813 6815# 6815 6817# 6817 6819# 6819 6821# 6821
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6837# 6837 6839# 6839 6841# 6841 6844# 6844 6847# 6847 6920# 6920 6922# 6922
6924# 6924 6926# 6926 6928# 6928 6930# 6930 6932# 6932 6934# 6934 6936# 6936
6938# 6938 6940# 6940 6942# 6942 6944# 6944 6946# 6946 6948# 6948 6950# 6950
6952# 6952 6954# 6954 6956# 6956 6958# 6958 6960# 6960 6962# 6962 6964# 6964
6966# 6966 6968# 6968 6970# 6970 6972# 6972 6974# 6974 6976# 6976 6978# 6978
6980# 6980 6982# 6982 6984# 6984 6986# 6986 6988# 6988 6990# 6990 6992# 6992
6994# 6994 6997# 6997 6999# 6999 7001# 7001
.LADDR 193 297 308 310 312 314 408 410 435 437 531 533 558 560
664 674 678 682 686 690 694 698 702 706 710 796 798 800
802 887 889 891 893 978 980 982 984 1066 1068 1070 1148 1163
1239 1245 1326 1355 1362 1438 1448 1450 1452 1454 1456 1458 1460 1462
1464 1466 1468 1470 1472 1474 1476 1478 1480 1482 1484 1486 1488 1490
1492 1494 1496 1498 1500 1502 1504 1506 1508 1510 1512 1514 1516 1518
1520 1522 1525 1527 1603 1613 1615 1617 1619 1621 1623 1625 1627 1629
1631 1633 1635 1637 1639 1641 1643 1645 1647 1649 1651 1653 1655 1657
1659 1661 1663 1665 1667 1669 1671 1673 1675 1677 1679 1681 1683 1685
1687 1690 1692 1768 1780 1782 1784 1786 1788 1790 1792 1794 1796 1798
1800 1802 1804 1806 1808 1810 1812 1814 1816 1818 1820 1822 1824 1826
1828 1830 1832 1834 1836 1838 1840 1842 1844 1846 1848 1850 1852 1854
1857 1859 1935 1947 1949 1951 1953 1955 1957 1959 1961 1963 1965 1967
1969 1971 1973 1975 1977 1979 1981 1983 1985 1987 1989 1991 1993 1995
1997 1999 2001 2003 2005 2007 2009 2011 2013 2015 2017 2020 2022 2098
2110 2112 2114 2116 2118 2120 2122 2124 2126 2128 2130 2132 2134 2136
2138 2140 2142 2144 2146 2148 2150 2152 2154 2156 2158 2160 2162 2164
2166 2168 2170 2172 2174 2176 2178 2180 2182 2184 2187 2189 2268 2272
2274 2276 2278 2280 2360 2364 2366 2368 2370 2372 2374 2453 2457 2459
2461 2463 2465 2467 2469 2548 2552 2554 2556 2558 2560 2562 2564 2566
2645 2649 2651 2653 2655 2657 2659 2661 2663 2665 2751 2768 2770 2772
2774 2853 2855 2857 2859 2861 2863 2865 2868 2870 2872 2874 2876 2878
2880 2883 2885 2887 2889 2891 2893 2895 2898 2976 2978 2980 2982 2984
2986 2988 3063 3151 3153 3159 3165 3251 3253 3259 3262 3268 3271 3278
3285 3292 3299 3306 3313 3320 3327 3334 3341 3348 3355 3362 3369 3376
3383 3390 3479 3502 3504 3588 3590 3701 3734 3737 3813 3815 3919 3947
4029 4031 4054 4135 4137 4237 4239 4250 4252 4342 4365 4448 4469 4472
4551 4554 4758 4760 4852 4872 4969 4988 5007 5026 5045 5062 5173 5176
5179 5182 5193 5195 5198 5385 5387 5389 5391 5393 5395 5397 5399 5401
5403 5405 5407 5409 5411 5413 5415 5417 5419 5421 5423 5425 5427 5429 SEQ 0891
5431 5433 5435 5520 5522 5553 5633 5635 5654 5756 5758 5760 5762 5764
5766 5768 5770 5772 5774 5776 5778 5780 5782 5784 5786 5788 5790 5792
5794 5796 5798 5800 5802 5879 5881 5900 5902 5979 5981 6065 6071 6078
6159 6187 6264 6294 6372 6378 6454 6456 6526 6601 6603 6671 6745 6747
6847 6920 6922 6997 7001
.LCCOF 193 197 308 310 408 414 426 531 537 549 796 802 887 893
978 984 1158 1245 1355 2751 2763 2859 2984 3155 3161 3167 3255 3264
3273 3280 3287 3294 3301 3308 3315 3322 3329 3336 3343 3350 3357 3364
3371 3378 3385 3392 3481 3493 3497 3592 3613 3706 3727 3817 3823 3930
3938 4033 4035 4039 4041 4045 4047 4139 4141 4148 4150 4241 4243 4245
4254 4256 4258 4354 4360 4458 4464 4760 4768 4862 4866 5045 5053 5173
5179 5202 5209 5216 5223 5230 5237 5244 5251 5258 5265 5272 5279 5286
5293 5300 5307 5314 5321 5328 5335 5342 5349 5356 5363 5370 5377 5524
5532 5543 5545 5547 5549 5551 5635 5643 5651 5883 5891 5897 5983 6069
6073 6163 6178 6276 6280 6376 6458 6460 6464 6468 6472 6476 6480 6484
6488 6492 6496 6500 6504 6508 6510 6516 6518 6520 6605 6607 6611 6615
6619 6623 6627 6631 6635 6639 6643 6647 6651 6655 6661 6663 6665 6749
6753 6757 6761 6765 6769 6773 6775 6781 6785 6789 6795 6799 6803 6807
6811 6813 6817 6821 6827 6831 6835 6839 6844 6924 6928 6932 6936 6940
6944 6948 6950 6956 6960 6964 6970 6972 6976 6980 6986 6990 6994
.LCCON 195 199 312 314 420 432 543 555 798 800 889 891 980 982
1357 1359 2755 2759 2874 2889 3485 3489 3599 3606 3713 3720 3819 3821
3934 3942 4356 4358 4764 4772 4864 4868 5049 5057 5176 5182 5528 5536
5639 5647 5885 5887 5893 5895 6180 6182 6274 6282 6456 6462 6466 6470
6474 6478 6482 6486 6490 6494 6498 6502 6506 6512 6514 6523 6603 6609
6613 6617 6621 6625 6629 6633 6637 6641 6645 6649 6653 6657 6659 6668
6751 6755 6759 6763 6767 6771 6777 6779 6783 6787 6791 6793 6797 6801
6805 6809 6815 6819 6823 6825 6829 6833 6837 6841 6926 6930 6934 6938
6942 6946 6952 6954 6958 6962 6966 6968 6974 6978 6982 6984 6988 6992
.LCENA 800 802 891 893 982 984
.LCJP 796 798 800 802 6468 6470 6472 6474 6615 6617 6619 6621 6765 6767
6769 6771 6940 6942 6944 6946
.LCJPP 2751 2755 2759 2763 2859 2874 2889 2984 4969 4971 4973 4975 4977 4988
4990 4992 4994 4996 5007 5009 5011 5013 5015 5026 5028 5030 5032 5034
6520 6665 6813 6815 6817 6819 6972 6974 6976 6978
.LCJS 978 980 982 984 1066 1154 1158 1239 1328 1332 1336 1340 1344 1348
1438 1440 1442 1444 1448 1452 1456 1460 1464 1468 1472 1476 1480 1484
1488 1492 1496 1500 1504 1508 1512 1514 1516 1518 1603 1607 1609 1613
1617 1621 1625 1629 1633 1637 1641 1645 1649 1653 1657 1661 1665 1669
1673 1677 1679 1681 1683 1768 1772 1776 1780 1784 1788 1792 1796 1800
1804 1808 1812 1816 1820 1824 1828 1832 1836 1840 1844 1846 1848 1850
1935 1939 1943 1947 1951 1955 1959 1963 1967 1971 1975 1979 1983 1987
1991 1995 1999 2003 2007 2011 2013 2015 2017 2098 2102 2106 2110 2114
2118 2122 2126 2130 2134 2138 2142 2146 2150 2154 2158 2162 2166 2170
2174 2176 2178 2180 2268 2272 2274 2276 2278 2360 2364 2366 2368 2370
2453 2457 2459 2461 2463 2548 2552 2554 2556 2558 2645 2649 2651 2653
2655 2853 2855 2868 2870 2883 2885 2976 2980 3919 3921 3923 3925 4556
4560 4564 4568 4573 4577 4581 4585 4590 4594 4598 4602 4607 4611 4615
4619 4624 4628 4632 4636 4641 4645 4649 4653 4658 4662 4666 4670 4675
4679 4683 4687 4692 4696 4700 4704 4709 4713 4717 4721 4726 4730 4734
4738 4743 4747 4751 4755 4983 5002 5021 5040 5200 5207 5214 5221 5228
5235 5242 5249 5256 5263 5270 5277 5284 5291 5298 5305 5312 5319 5326
5333 5340 5347 5354 5361 5368 5375 6067 6161 6165 6169 6173 6516 6661 SEQ 0892
6757 6759 6761 6763 6932 6934 6936 6938
.LCJV 887 889 891 893 6476 6478 6480 6482 6623 6625 6627 6629 6781 6783
6785 6787 6956 6958 6960 6962
.LCONT 666 668 670 672 676 680 684 688 692 696 700 704 708 1148
1150 1152 3397 3618 4051 6492 6494 6496 6498 6639 6641 6643 6645 6827
6829 6831 6833 6986 6988 6990 6992
.LCRTN 1070 1160 1245 1355 1357 1359 1527 1692 1859 2022 2189 2280 2372 2374
2465 2467 2469 2560 2562 2564 2566 2657 2659 2661 2663 2665 2863 2878
2893 2986 3708 3715 3722 3729 3732 3932 3936 3940 3944 4369 4469 4870
4985 5004 5023 5042 6071 6184 6284 6518 6523 6663 6668 6811 6970
.LDISA 193 195 308 312 414 420 537 543 796 798 887 889 978 980
1355 1357 2751 2755 2859 2874 3481 3485 3592 3599 3706 3713 3817 3819
3930 3934 4033 4039 4045 4354 4356 4760 4764 4862 4864 5045 5049 5173
5176 5524 5528 5543 5545 5547 5549 5635 5639 5883 5885 5891 5893 6178
6180 6280 6282 6460 6462 6468 6470 6476 6478 6484 6486 6492 6494 6500
6502 6510 6512 6607 6609 6615 6617 6623 6625 6631 6633 6639 6641 6647
6649 6655 6657 6749 6751 6757 6759 6765 6767 6775 6777 6781 6783 6789
6791 6795 6797 6803 6805 6813 6815 6821 6823 6827 6829 6835 6837 6924
6926 6932 6934 6940 6942 6950 6952 6956 6958 6964 6966 6972 6974 6980
6982 6986 6988
.LENA 197 199 310 314 408 426 432 531 549 555 1158 1245 1359 2759
2763 2889 2984 3155 3161 3167 3255 3264 3273 3280 3287 3294 3301 3308
3315 3322 3329 3336 3343 3350 3357 3364 3371 3378 3385 3392 3489 3493
3497 3606 3613 3720 3727 3821 3823 3938 3942 4035 4041 4047 4139 4141
4148 4150 4241 4243 4245 4254 4256 4258 4358 4360 4458 4464 4768 4772
4866 4868 5053 5057 5179 5182 5202 5209 5216 5223 5230 5237 5244 5251
5258 5265 5272 5279 5286 5293 5300 5307 5314 5321 5328 5335 5342 5349
5356 5363 5370 5377 5532 5536 5551 5643 5647 5651 5887 5895 5897 5983
6069 6073 6163 6182 6274 6276 6376 6456 6458 6464 6466 6472 6474 6480
6482 6488 6490 6496 6498 6504 6506 6508 6514 6516 6518 6520 6523 6603
6605 6611 6613 6619 6621 6627 6629 6635 6637 6643 6645 6651 6653 6659
6661 6663 6665 6668 6753 6755 6761 6763 6769 6771 6773 6779 6785 6787
6793 6799 6801 6807 6809 6811 6817 6819 6825 6831 6833 6839 6841 6844
6928 6930 6936 6938 6944 6946 6948 6954 6960 6962 6968 6970 6976 6978
6984 6990 6992 6994
.LJ 193 195 197 199 299 301 303 305 308 310 312 314 408 410
412 414 416 418 420 422 424 426 428 430 432 435 437 531
533 535 537 539 541 543 545 547 549 551 553 555 558 560
664 666 668 670 672 674 676 678 680 682 684 686 688 690
692 694 696 698 700 702 704 706 708 710 796 798 800 802
887 889 891 893 978 980 982 984 1066 1154 1158 1163 1239 1241
1326 1328 1330 1332 1334 1336 1338 1340 1342 1344 1346 1348 1350 1362
1438 1440 1442 1444 1446 1448 1450 1452 1454 1456 1458 1460 1462 1464
1466 1468 1470 1472 1474 1476 1478 1480 1482 1484 1486 1488 1490 1492
1494 1496 1498 1500 1502 1504 1506 1508 1510 1512 1514 1516 1518 1520
1522 1603 1605 1607 1609 1611 1613 1615 1617 1619 1621 1623 1625 1627
1629 1631 1633 1635 1637 1639 1641 1643 1645 1647 1649 1651 1653 1655
1657 1659 1661 1663 1665 1667 1669 1671 1673 1675 1677 1679 1681 1683
1685 1687 1768 1770 1772 1774 1776 1778 1780 1782 1784 1786 1788 1790
1792 1794 1796 1798 1800 1802 1804 1806 1808 1810 1812 1814 1816 1818
1820 1822 1824 1826 1828 1830 1832 1834 1836 1838 1840 1842 1844 1846
1848 1850 1852 1854 1935 1937 1939 1941 1943 1945 1947 1949 1951 1953
1955 1957 1959 1961 1963 1965 1967 1969 1971 1973 1975 1977 1979 1981 SEQ 0893
1983 1985 1987 1989 1991 1993 1995 1997 1999 2001 2003 2005 2007 2009
2011 2013 2015 2017 2098 2100 2102 2104 2106 2108 2110 2112 2114 2116
2118 2120 2122 2124 2126 2128 2130 2132 2134 2136 2138 2140 2142 2144
2146 2148 2150 2152 2154 2156 2158 2160 2162 2164 2166 2168 2170 2172
2174 2176 2178 2180 2182 2184 2268 2272 2274 2276 2278 2360 2364 2366
2368 2370 2453 2457 2459 2461 2463 2548 2552 2554 2556 2558 2645 2649
2651 2653 2655 2751 2753 2755 2757 2759 2761 2763 2765 2768 2770 2772
2774 2853 2855 2857 2859 2861 2865 2868 2870 2872 2874 2876 2880 2883
2885 2887 2889 2891 2895 2976 2980 2984 2988 3063 3065 3153 3155 3157
3159 3161 3163 3165 3167 3169 3251 3253 3255 3257 3259 3262 3264 3266
3268 3271 3273 3275 3278 3280 3282 3285 3287 3289 3292 3294 3296 3299
3301 3303 3306 3308 3310 3313 3315 3317 3320 3322 3324 3327 3329 3331
3334 3336 3338 3341 3343 3345 3348 3350 3352 3355 3357 3359 3362 3364
3366 3369 3371 3373 3376 3378 3380 3383 3385 3387 3390 3392 3394 3399
3479 3481 3483 3485 3487 3489 3491 3493 3495 3497 3499 3502 3590 3592
3594 3597 3599 3601 3604 3606 3608 3611 3613 3615 3620 3704 3706 3711
3713 3718 3720 3725 3727 3734 3815 3817 3819 3821 3823 3825 3827 3919
3921 3923 3925 3930 3934 3938 3942 3947 4031 4033 4035 4037 4039 4041
4043 4045 4047 4049 4054 4137 4139 4141 4143 4146 4148 4150 4237 4239
4241 4243 4245 4250 4252 4254 4256 4258 4261 4352 4354 4356 4358 4360
4362 4365 4456 4460 4462 4464 4466 4554 4556 4558 4560 4562 4564 4566
4568 4571 4573 4575 4577 4579 4581 4583 4585 4588 4590 4592 4594 4596
4598 4600 4602 4605 4607 4609 4611 4613 4615 4617 4619 4622 4624 4626
4628 4630 4632 4634 4636 4639 4641 4643 4645 4647 4649 4651 4653 4656
4658 4660 4662 4664 4666 4668 4670 4673 4675 4677 4679 4681 4683 4685
4687 4690 4692 4694 4696 4698 4700 4702 4704 4707 4709 4711 4713 4715
4717 4719 4721 4724 4726 4728 4730 4732 4734 4736 4738 4741 4743 4745
4747 4749 4751 4753 4755 4758 4760 4762 4764 4766 4768 4770 4772 4774
4860 4862 4864 4866 4868 4872 4969 4971 4973 4975 4977 4979 4981 4983
4988 4990 4992 4994 4996 4998 5000 5002 5007 5009 5011 5013 5015 5017
5019 5021 5026 5028 5030 5032 5034 5036 5038 5040 5045 5047 5049 5051
5053 5055 5057 5059 5062 5173 5176 5179 5182 5193 5195 5198 5200 5202
5205 5207 5209 5212 5214 5216 5219 5221 5223 5226 5228 5230 5233 5235
5237 5240 5242 5244 5247 5249 5251 5254 5256 5258 5261 5263 5265 5268
5270 5272 5275 5277 5279 5282 5284 5286 5289 5291 5293 5296 5298 5300
5303 5305 5307 5310 5312 5314 5317 5319 5321 5324 5326 5328 5331 5333
5335 5338 5340 5342 5345 5347 5349 5352 5354 5356 5359 5361 5363 5366
5368 5370 5373 5375 5377 5380 5382 5385 5387 5389 5391 5393 5395 5397
5399 5401 5403 5405 5407 5409 5411 5413 5415 5417 5419 5421 5423 5425
5427 5429 5431 5433 5435 5522 5524 5526 5528 5530 5532 5534 5536 5538
5541 5543 5545 5547 5549 5551 5553 5633 5635 5637 5639 5641 5643 5645
5647 5649 5651 5654 5656 5658 5660 5662 5664 5666 5668 5670 5672 5674
5676 5678 5680 5682 5684 5686 5688 5690 5692 5694 5696 5698 5700 5702
5704 5706 5708 5710 5712 5714 5716 5718 5720 5722 5724 5726 5728 5730
5732 5734 5736 5738 5740 5742 5744 5746 5748 5751 5753 5756 5758 5760
5762 5764 5766 5768 5770 5772 5774 5776 5778 5780 5782 5784 5786 5788
5790 5792 5794 5796 5798 5800 5802 5881 5883 5885 5887 5889 5891 5893
5895 5900 5902 5981 5983 5985 5987 6065 6067 6073 6075 6159 6161 6165
6167 6169 6171 6173 6175 6178 6180 6182 6264 6266 6268 6270 6272 6274
6276 6278 6280 6282 6286 6288 6290 6292 6372 6374 6376 6456 6460 6462
6464 6466 6468 6470 6472 6474 6476 6478 6480 6482 6484 6486 6488 6490
6492 6494 6496 6498 6500 6502 6504 6506 6508 6510 6512 6514 6516 6518
6520 6526 6603 6607 6609 6611 6613 6615 6617 6619 6621 6623 6625 6627 SEQ 0894
6629 6631 6633 6635 6637 6639 6641 6643 6645 6647 6649 6651 6653 6655
6657 6659 6661 6663 6665 6671 6747 6749 6751 6753 6755 6757 6759 6761
6763 6765 6767 6769 6771 6773 6775 6777 6779 6781 6783 6785 6787 6789
6791 6793 6795 6797 6799 6801 6803 6805 6807 6809 6811 6813 6815 6817
6819 6821 6823 6825 6827 6829 6831 6833 6835 6837 6839 6841 6844 6847
6922 6924 6926 6928 6930 6932 6934 6936 6938 6940 6942 6944 6946 6948
6950 6952 6954 6956 6958 6960 6962 6964 6966 6968 6970 6972 6974 6976
6978 6980 6982 6984 6986 6988 6990 6992 6994 6997 6999 7001
.LJMAP 193 195 197 199 299 301 303 305 410 416 422 428 435 437
533 539 545 551 558 560 664 674 678 682 686 690 694 698
702 706 710 1163 1241 1350 1362 1446 1450 1454 1458 1462 1466 1470
1474 1478 1482 1486 1490 1494 1498 1502 1506 1510 1520 1522 1605 1611
1615 1619 1623 1627 1631 1635 1639 1643 1647 1651 1655 1659 1663 1667
1671 1675 1685 1687 1770 1774 1778 1782 1786 1790 1794 1798 1802 1806
1810 1814 1818 1822 1826 1830 1834 1838 1842 1852 1854 1937 1941 1945
1949 1953 1957 1961 1965 1969 1973 1977 1981 1985 1989 1993 1997 2001
2005 2009 2100 2104 2108 2112 2116 2120 2124 2128 2132 2136 2140 2144
2148 2152 2156 2160 2164 2168 2172 2182 2184 2753 2757 2761 2765 2768
2770 2772 2774 2857 2861 2865 2872 2876 2880 2887 2891 2895 2988 3063
3157 3163 3169 3251 3257 3259 3266 3268 3275 3282 3289 3296 3303 3310
3317 3324 3331 3338 3345 3352 3359 3366 3373 3380 3387 3394 3399 3483
3487 3491 3495 3499 3502 3594 3601 3608 3615 3620 3734 3825 3827 3947
4037 4043 4049 4054 4143 4237 4250 4261 4362 4365 4462 4466 4758 4762
4766 4770 4774 4872 5047 5051 5055 5059 5062 5193 5195 5380 5382 5385
5387 5389 5391 5393 5395 5397 5399 5401 5403 5405 5407 5409 5411 5413
5415 5417 5419 5421 5423 5425 5427 5429 5431 5433 5435 5526 5530 5534
5538 5553 5633 5637 5641 5645 5649 5656 5660 5664 5668 5672 5676 5680
5684 5688 5692 5696 5700 5704 5708 5712 5716 5720 5724 5728 5732 5736
5740 5744 5748 5751 5753 5756 5758 5760 5762 5764 5766 5768 5770 5772
5774 5776 5778 5780 5782 5784 5786 5788 5790 5792 5794 5796 5798 5800
5802 5900 5902 5985 5987 6075 6167 6171 6175 6278 6286 6288 6290 6292
6460 6462 6464 6466 6526 6607 6609 6611 6613 6671 6749 6751 6753 6755
6847 6924 6926 6928 6930 6997 6999 7001
.LJRP 408 531 3155 3161 3167 3255 3264 3273 3280 3287 3294 3301 3308 3315
3322 3329 3336 3343 3350 3357 3364 3371 3378 3385 3392 3481 3485 3489
3493 3497 4035 4041 4047 4141 4150 4360 5202 5209 5216 5223 5230 5237
5244 5251 5258 5265 5272 5279 5286 5293 5300 5307 5314 5321 5328 5335
5342 5349 5356 5363 5370 5377 5551 5651 5897 6069 6163 6508 6510 6512
6514 6655 6657 6659 6789 6791 6793 6844 6964 6966 6968 6994
.LJSRP 3592 3599 3606 3613 3706 3713 3720 3727 3817 3819 3821 3823 6775 6777
6779 6950 6952 6954
.LJZ 297 308 310 312 314 414 420 426 432 537 543 549 555 1068
1156 1243 1352 1525 1690 1857 2020 2187 2270 2362 2455 2550 2647 2898
2978 2982 3151 3504 3588 3737 3813 3927 4029 4135 4367 4472 4551 4874
5520 5879 5979 6078 6187 6294 6378 6454 6601 6745 6920
.LLDCT 412 418 424 430 535 541 547 553 1326 1330 1334 1338 1342 1346
3065 3153 3159 3165 3253 3262 3271 3278 3285 3292 3299 3306 3313 3320
3327 3334 3341 3348 3355 3362 3369 3376 3383 3390 3479 3590 3597 3604
3611 3704 3711 3718 3725 3815 4031 4137 4146 4352 4456 4554 4558 4562
4566 4571 4575 4579 4583 4588 4592 4596 4600 4605 4609 4613 4617 4622
4626 4630 4634 4639 4643 4647 4651 4656 4660 4664 4668 4673 4677 4681
4685 4690 4694 4698 4702 4707 4711 4715 4719 4724 4728 4732 4736 4741
4745 4749 4753 5198 5205 5212 5219 5226 5233 5240 5247 5254 5261 5268 SEQ 0895
5275 5282 5289 5296 5303 5310 5317 5324 5331 5338 5345 5352 5359 5366
5373 5522 5541 5654 5658 5662 5666 5670 5674 5678 5682 5686 5690 5694
5698 5702 5706 5710 5714 5718 5722 5726 5730 5734 5738 5742 5746 6500
6502 6504 6506 6647 6649 6651 6653 6747 6922
.LLOOP 4245 4258 4354 4356 4358 4464 6821 6823 6825 6980 6982 6984
.LPUSH 3701 3930 3934 3938 3942 4033 4039 4045 4139 4148 4239 4241 4243 4252
4254 4256 4342 4344 4346 4348 4350 4448 4450 4452 4454 4458 4852 4854
4856 4858 4860 4979 4981 4998 5000 5017 5019 5036 5038 5881 5889 5981
6065 6159 6264 6266 6268 6270 6272 6372 6374 6456 6458 6603 6605 6773
6948
.LRFCT 4760 4764 4768 4772 4862 4864 4866 4868 5045 5049 5053 5057 5173 5176
5179 5182 6795 6797 6799 6801
.LRPCT 4460 5524 5528 5532 5536 5543 5545 5547 5549 5635 5639 5643 5647 6484
6486 6488 6490 6631 6633 6635 6637 6803 6805 6807 6809
.LTWB 5883 5885 5887 5891 5893 5895 5983 6073 6178 6180 6182 6274 6276 6280
6282 6376 6835 6837 6839 6841
.MCCOF 193 197 308 310 408 414 426 531 537 549 796 802 887 893
978 984 1158 1245 1355 2751 2763 2859 2984 3155 3161 3167 3255 3264
3273 3280 3287 3294 3301 3308 3315 3322 3329 3336 3343 3350 3357 3364
3371 3378 3385 3392 3481 3493 3497 3592 3613 3706 3727 3817 3823 3930
3938 4033 4035 4039 4041 4045 4047 4139 4141 4148 4150 4241 4243 4245
4254 4256 4258 4354 4360 4458 4464 4760 4768 4862 4866 5045 5053 5173
5179 5202 5209 5216 5223 5230 5237 5244 5251 5258 5265 5272 5279 5286
5293 5300 5307 5314 5321 5328 5335 5342 5349 5356 5363 5370 5377 5524
5532 5543 5545 5547 5549 5551 5635 5643 5651 5883 5891 5897 5983 6069
6073 6163 6178 6276 6280 6376 6458 6460 6464 6468 6472 6476 6480 6484
6488 6492 6496 6500 6504 6508 6510 6516 6518 6520 6605 6607 6611 6615
6619 6623 6627 6631 6635 6639 6643 6647 6651 6655 6661 6663 6665 6749
6753 6757 6761 6765 6769 6773 6775 6781 6785 6789 6795 6799 6803 6807
6811 6813 6817 6821 6827 6831 6835 6839 6844 6924 6928 6932 6936 6940
6944 6948 6950 6956 6960 6964 6970 6972 6976 6980 6986 6990 6994
.MCCON 195 199 312 314 420 432 543 555 798 800 889 891 980 982
1357 1359 2755 2759 2874 2889 3485 3489 3599 3606 3713 3720 3819 3821
3934 3942 4356 4358 4764 4772 4864 4868 5049 5057 5176 5182 5528 5536
5639 5647 5885 5887 5893 5895 6180 6182 6274 6282 6456 6462 6466 6470
6474 6478 6482 6486 6490 6494 6498 6502 6506 6512 6514 6523 6603 6609
6613 6617 6621 6625 6629 6633 6637 6641 6645 6649 6653 6657 6659 6668
6751 6755 6759 6763 6767 6771 6777 6779 6783 6787 6791 6793 6797 6801
6805 6809 6815 6819 6823 6825 6829 6833 6837 6841 6926 6930 6934 6938
6942 6946 6952 6954 6958 6962 6966 6968 6974 6978 6982 6984 6988 6992
.MCENA 800 802 891 893 982 984
.MCJP 796 798 800 802 6468 6470 6472 6474 6615 6617 6619 6621 6765 6767
6769 6771 6940 6942 6944 6946
.MCJPP 2751 2755 2759 2763 2859 2874 2889 2984 4969 4971 4973 4975 4977 4988
4990 4992 4994 4996 5007 5009 5011 5013 5015 5026 5028 5030 5032 5034
6520 6665 6813 6815 6817 6819 6972 6974 6976 6978
.MCJS 978 980 982 984 1066 1154 1158 1239 1328 1332 1336 1340 1344 1348
1438 1440 1442 1444 1448 1452 1456 1460 1464 1468 1472 1476 1480 1484
1488 1492 1496 1500 1504 1508 1512 1514 1516 1518 1603 1607 1609 1613
1617 1621 1625 1629 1633 1637 1641 1645 1649 1653 1657 1661 1665 1669
1673 1677 1679 1681 1683 1768 1772 1776 1780 1784 1788 1792 1796 1800
1804 1808 1812 1816 1820 1824 1828 1832 1836 1840 1844 1846 1848 1850
1935 1939 1943 1947 1951 1955 1959 1963 1967 1971 1975 1979 1983 1987 SEQ 0896
1991 1995 1999 2003 2007 2011 2013 2015 2017 2098 2102 2106 2110 2114
2118 2122 2126 2130 2134 2138 2142 2146 2150 2154 2158 2162 2166 2170
2174 2176 2178 2180 2268 2272 2274 2276 2278 2360 2364 2366 2368 2370
2453 2457 2459 2461 2463 2548 2552 2554 2556 2558 2645 2649 2651 2653
2655 2853 2855 2868 2870 2883 2885 2976 2980 3919 3921 3923 3925 4556
4560 4564 4568 4573 4577 4581 4585 4590 4594 4598 4602 4607 4611 4615
4619 4624 4628 4632 4636 4641 4645 4649 4653 4658 4662 4666 4670 4675
4679 4683 4687 4692 4696 4700 4704 4709 4713 4717 4721 4726 4730 4734
4738 4743 4747 4751 4755 4983 5002 5021 5040 5200 5207 5214 5221 5228
5235 5242 5249 5256 5263 5270 5277 5284 5291 5298 5305 5312 5319 5326
5333 5340 5347 5354 5361 5368 5375 6067 6161 6165 6169 6173 6516 6661
6757 6759 6761 6763 6932 6934 6936 6938
.MCJV 887 889 891 893 6476 6478 6480 6482 6623 6625 6627 6629 6781 6783
6785 6787 6956 6958 6960 6962
.MCONT 666 668 670 672 676 680 684 688 692 696 700 704 708 1148
1150 1152 3397 3618 4051 6492 6494 6496 6498 6639 6641 6643 6645 6827
6829 6831 6833 6986 6988 6990 6992
.MCRTN 1070 1160 1245 1355 1357 1359 1527 1692 1859 2022 2189 2280 2372 2374
2465 2467 2469 2560 2562 2564 2566 2657 2659 2661 2663 2665 2863 2878
2893 2986 3708 3715 3722 3729 3732 3932 3936 3940 3944 4369 4469 4870
4985 5004 5023 5042 6071 6184 6284 6518 6523 6663 6668 6811 6970
.MDISA 193 195 308 312 414 420 537 543 796 798 887 889 978 980
1355 1357 2751 2755 2859 2874 3481 3485 3592 3599 3706 3713 3817 3819
3930 3934 4033 4039 4045 4354 4356 4760 4764 4862 4864 5045 5049 5173
5176 5524 5528 5543 5545 5547 5549 5635 5639 5883 5885 5891 5893 6178
6180 6280 6282 6460 6462 6468 6470 6476 6478 6484 6486 6492 6494 6500
6502 6510 6512 6607 6609 6615 6617 6623 6625 6631 6633 6639 6641 6647
6649 6655 6657 6749 6751 6757 6759 6765 6767 6775 6777 6781 6783 6789
6791 6795 6797 6803 6805 6813 6815 6821 6823 6827 6829 6835 6837 6924
6926 6932 6934 6940 6942 6950 6952 6956 6958 6964 6966 6972 6974 6980
6982 6986 6988
.MENA 197 199 310 314 408 426 432 531 549 555 1158 1245 1359 2759
2763 2889 2984 3155 3161 3167 3255 3264 3273 3280 3287 3294 3301 3308
3315 3322 3329 3336 3343 3350 3357 3364 3371 3378 3385 3392 3489 3493
3497 3606 3613 3720 3727 3821 3823 3938 3942 4035 4041 4047 4139 4141
4148 4150 4241 4243 4245 4254 4256 4258 4358 4360 4458 4464 4768 4772
4866 4868 5053 5057 5179 5182 5202 5209 5216 5223 5230 5237 5244 5251
5258 5265 5272 5279 5286 5293 5300 5307 5314 5321 5328 5335 5342 5349
5356 5363 5370 5377 5532 5536 5551 5643 5647 5651 5887 5895 5897 5983
6069 6073 6163 6182 6274 6276 6376 6456 6458 6464 6466 6472 6474 6480
6482 6488 6490 6496 6498 6504 6506 6508 6514 6516 6518 6520 6523 6603
6605 6611 6613 6619 6621 6627 6629 6635 6637 6643 6645 6651 6653 6659
6661 6663 6665 6668 6753 6755 6761 6763 6769 6771 6773 6779 6785 6787
6793 6799 6801 6807 6809 6811 6817 6819 6825 6831 6833 6839 6841 6844
6928 6930 6936 6938 6944 6946 6948 6954 6960 6962 6968 6970 6976 6978
6984 6990 6992 6994
.MJ 193 195 197 199 299 301 303 305 308 310 312 314 408 410
412 414 416 418 420 422 424 426 428 430 432 435 437 531
533 535 537 539 541 543 545 547 549 551 553 555 558 560
664 666 668 670 672 674 676 678 680 682 684 686 688 690
692 694 696 698 700 702 704 706 708 710 796 798 800 802
887 889 891 893 978 980 982 984 1066 1154 1158 1163 1239 1241
1326 1328 1330 1332 1334 1336 1338 1340 1342 1344 1346 1348 1350 1362 SEQ 0897
1438 1440 1442 1444 1446 1448 1450 1452 1454 1456 1458 1460 1462 1464
1466 1468 1470 1472 1474 1476 1478 1480 1482 1484 1486 1488 1490 1492
1494 1496 1498 1500 1502 1504 1506 1508 1510 1512 1514 1516 1518 1520
1522 1603 1605 1607 1609 1611 1613 1615 1617 1619 1621 1623 1625 1627
1629 1631 1633 1635 1637 1639 1641 1643 1645 1647 1649 1651 1653 1655
1657 1659 1661 1663 1665 1667 1669 1671 1673 1675 1677 1679 1681 1683
1685 1687 1768 1770 1772 1774 1776 1778 1780 1782 1784 1786 1788 1790
1792 1794 1796 1798 1800 1802 1804 1806 1808 1810 1812 1814 1816 1818
1820 1822 1824 1826 1828 1830 1832 1834 1836 1838 1840 1842 1844 1846
1848 1850 1852 1854 1935 1937 1939 1941 1943 1945 1947 1949 1951 1953
1955 1957 1959 1961 1963 1965 1967 1969 1971 1973 1975 1977 1979 1981
1983 1985 1987 1989 1991 1993 1995 1997 1999 2001 2003 2005 2007 2009
2011 2013 2015 2017 2098 2100 2102 2104 2106 2108 2110 2112 2114 2116
2118 2120 2122 2124 2126 2128 2130 2132 2134 2136 2138 2140 2142 2144
2146 2148 2150 2152 2154 2156 2158 2160 2162 2164 2166 2168 2170 2172
2174 2176 2178 2180 2182 2184 2268 2272 2274 2276 2278 2360 2364 2366
2368 2370 2453 2457 2459 2461 2463 2548 2552 2554 2556 2558 2645 2649
2651 2653 2655 2751 2753 2755 2757 2759 2761 2763 2765 2768 2770 2772
2774 2853 2855 2857 2859 2861 2865 2868 2870 2872 2874 2876 2880 2883
2885 2887 2889 2891 2895 2976 2980 2984 2988 3063 3065 3153 3155 3157
3159 3161 3163 3165 3167 3169 3251 3253 3255 3257 3259 3262 3264 3266
3268 3271 3273 3275 3278 3280 3282 3285 3287 3289 3292 3294 3296 3299
3301 3303 3306 3308 3310 3313 3315 3317 3320 3322 3324 3327 3329 3331
3334 3336 3338 3341 3343 3345 3348 3350 3352 3355 3357 3359 3362 3364
3366 3369 3371 3373 3376 3378 3380 3383 3385 3387 3390 3392 3394 3399
3479 3481 3483 3485 3487 3489 3491 3493 3495 3497 3499 3502 3590 3592
3594 3597 3599 3601 3604 3606 3608 3611 3613 3615 3620 3704 3706 3711
3713 3718 3720 3725 3727 3734 3815 3817 3819 3821 3823 3825 3827 3919
3921 3923 3925 3930 3934 3938 3942 3947 4031 4033 4035 4037 4039 4041
4043 4045 4047 4049 4054 4137 4139 4141 4143 4146 4148 4150 4237 4239
4241 4243 4245 4250 4252 4254 4256 4258 4261 4352 4354 4356 4358 4360
4362 4365 4456 4460 4462 4464 4466 4554 4556 4558 4560 4562 4564 4566
4568 4571 4573 4575 4577 4579 4581 4583 4585 4588 4590 4592 4594 4596
4598 4600 4602 4605 4607 4609 4611 4613 4615 4617 4619 4622 4624 4626
4628 4630 4632 4634 4636 4639 4641 4643 4645 4647 4649 4651 4653 4656
4658 4660 4662 4664 4666 4668 4670 4673 4675 4677 4679 4681 4683 4685
4687 4690 4692 4694 4696 4698 4700 4702 4704 4707 4709 4711 4713 4715
4717 4719 4721 4724 4726 4728 4730 4732 4734 4736 4738 4741 4743 4745
4747 4749 4751 4753 4755 4758 4760 4762 4764 4766 4768 4770 4772 4774
4860 4862 4864 4866 4868 4872 4969 4971 4973 4975 4977 4979 4981 4983
4988 4990 4992 4994 4996 4998 5000 5002 5007 5009 5011 5013 5015 5017
5019 5021 5026 5028 5030 5032 5034 5036 5038 5040 5045 5047 5049 5051
5053 5055 5057 5059 5062 5173 5176 5179 5182 5193 5195 5198 5200 5202
5205 5207 5209 5212 5214 5216 5219 5221 5223 5226 5228 5230 5233 5235
5237 5240 5242 5244 5247 5249 5251 5254 5256 5258 5261 5263 5265 5268
5270 5272 5275 5277 5279 5282 5284 5286 5289 5291 5293 5296 5298 5300
5303 5305 5307 5310 5312 5314 5317 5319 5321 5324 5326 5328 5331 5333
5335 5338 5340 5342 5345 5347 5349 5352 5354 5356 5359 5361 5363 5366
5368 5370 5373 5375 5377 5380 5382 5385 5387 5389 5391 5393 5395 5397
5399 5401 5403 5405 5407 5409 5411 5413 5415 5417 5419 5421 5423 5425
5427 5429 5431 5433 5435 5522 5524 5526 5528 5530 5532 5534 5536 5538
5541 5543 5545 5547 5549 5551 5553 5633 5635 5637 5639 5641 5643 5645
5647 5649 5651 5654 5656 5658 5660 5662 5664 5666 5668 5670 5672 5674 SEQ 0898
5676 5678 5680 5682 5684 5686 5688 5690 5692 5694 5696 5698 5700 5702
5704 5706 5708 5710 5712 5714 5716 5718 5720 5722 5724 5726 5728 5730
5732 5734 5736 5738 5740 5742 5744 5746 5748 5751 5753 5756 5758 5760
5762 5764 5766 5768 5770 5772 5774 5776 5778 5780 5782 5784 5786 5788
5790 5792 5794 5796 5798 5800 5802 5881 5883 5885 5887 5889 5891 5893
5895 5900 5902 5981 5983 5985 5987 6065 6067 6073 6075 6159 6161 6165
6167 6169 6171 6173 6175 6178 6180 6182 6264 6266 6268 6270 6272 6274
6276 6278 6280 6282 6286 6288 6290 6292 6372 6374 6376 6456 6460 6462
6464 6466 6468 6470 6472 6474 6476 6478 6480 6482 6484 6486 6488 6490
6492 6494 6496 6498 6500 6502 6504 6506 6508 6510 6512 6514 6516 6518
6520 6526 6603 6607 6609 6611 6613 6615 6617 6619 6621 6623 6625 6627
6629 6631 6633 6635 6637 6639 6641 6643 6645 6647 6649 6651 6653 6655
6657 6659 6661 6663 6665 6671 6747 6749 6751 6753 6755 6757 6759 6761
6763 6765 6767 6769 6771 6773 6775 6777 6779 6781 6783 6785 6787 6789
6791 6793 6795 6797 6799 6801 6803 6805 6807 6809 6811 6813 6815 6817
6819 6821 6823 6825 6827 6829 6831 6833 6835 6837 6839 6841 6844 6847
6922 6924 6926 6928 6930 6932 6934 6936 6938 6940 6942 6944 6946 6948
6950 6952 6954 6956 6958 6960 6962 6964 6966 6968 6970 6972 6974 6976
6978 6980 6982 6984 6986 6988 6990 6992 6994 6997 6999 7001
.MJMAP 193 195 197 199 299 301 303 305 410 416 422 428 435 437
533 539 545 551 558 560 664 674 678 682 686 690 694 698
702 706 710 1163 1241 1350 1362 1446 1450 1454 1458 1462 1466 1470
1474 1478 1482 1486 1490 1494 1498 1502 1506 1510 1520 1522 1605 1611
1615 1619 1623 1627 1631 1635 1639 1643 1647 1651 1655 1659 1663 1667
1671 1675 1685 1687 1770 1774 1778 1782 1786 1790 1794 1798 1802 1806
1810 1814 1818 1822 1826 1830 1834 1838 1842 1852 1854 1937 1941 1945
1949 1953 1957 1961 1965 1969 1973 1977 1981 1985 1989 1993 1997 2001
2005 2009 2100 2104 2108 2112 2116 2120 2124 2128 2132 2136 2140 2144
2148 2152 2156 2160 2164 2168 2172 2182 2184 2753 2757 2761 2765 2768
2770 2772 2774 2857 2861 2865 2872 2876 2880 2887 2891 2895 2988 3063
3157 3163 3169 3251 3257 3259 3266 3268 3275 3282 3289 3296 3303 3310
3317 3324 3331 3338 3345 3352 3359 3366 3373 3380 3387 3394 3399 3483
3487 3491 3495 3499 3502 3594 3601 3608 3615 3620 3734 3825 3827 3947
4037 4043 4049 4054 4143 4237 4250 4261 4362 4365 4462 4466 4758 4762
4766 4770 4774 4872 5047 5051 5055 5059 5062 5193 5195 5380 5382 5385
5387 5389 5391 5393 5395 5397 5399 5401 5403 5405 5407 5409 5411 5413
5415 5417 5419 5421 5423 5425 5427 5429 5431 5433 5435 5526 5530 5534
5538 5553 5633 5637 5641 5645 5649 5656 5660 5664 5668 5672 5676 5680
5684 5688 5692 5696 5700 5704 5708 5712 5716 5720 5724 5728 5732 5736
5740 5744 5748 5751 5753 5756 5758 5760 5762 5764 5766 5768 5770 5772
5774 5776 5778 5780 5782 5784 5786 5788 5790 5792 5794 5796 5798 5800
5802 5900 5902 5985 5987 6075 6167 6171 6175 6278 6286 6288 6290 6292
6460 6462 6464 6466 6526 6607 6609 6611 6613 6671 6749 6751 6753 6755
6847 6924 6926 6928 6930 6997 6999 7001
.MJRP 408 531 3155 3161 3167 3255 3264 3273 3280 3287 3294 3301 3308 3315
3322 3329 3336 3343 3350 3357 3364 3371 3378 3385 3392 3481 3485 3489
3493 3497 4035 4041 4047 4141 4150 4360 5202 5209 5216 5223 5230 5237
5244 5251 5258 5265 5272 5279 5286 5293 5300 5307 5314 5321 5328 5335
5342 5349 5356 5363 5370 5377 5551 5651 5897 6069 6163 6508 6510 6512
6514 6655 6657 6659 6789 6791 6793 6844 6964 6966 6968 6994
.MJSRP 3592 3599 3606 3613 3706 3713 3720 3727 3817 3819 3821 3823 6775 6777
6779 6950 6952 6954
.MJZ 297 308 310 312 314 414 420 426 432 537 543 549 555 1068 SEQ 0899
1156 1243 1352 1525 1690 1857 2020 2187 2270 2362 2455 2550 2647 2898
2978 2982 3151 3504 3588 3737 3813 3927 4029 4135 4367 4472 4551 4874
5520 5879 5979 6078 6187 6294 6378 6454 6601 6745 6920
.MLDCT 412 418 424 430 535 541 547 553 1326 1330 1334 1338 1342 1346
3065 3153 3159 3165 3253 3262 3271 3278 3285 3292 3299 3306 3313 3320
3327 3334 3341 3348 3355 3362 3369 3376 3383 3390 3479 3590 3597 3604
3611 3704 3711 3718 3725 3815 4031 4137 4146 4352 4456 4554 4558 4562
4566 4571 4575 4579 4583 4588 4592 4596 4600 4605 4609 4613 4617 4622
4626 4630 4634 4639 4643 4647 4651 4656 4660 4664 4668 4673 4677 4681
4685 4690 4694 4698 4702 4707 4711 4715 4719 4724 4728 4732 4736 4741
4745 4749 4753 5198 5205 5212 5219 5226 5233 5240 5247 5254 5261 5268
5275 5282 5289 5296 5303 5310 5317 5324 5331 5338 5345 5352 5359 5366
5373 5522 5541 5654 5658 5662 5666 5670 5674 5678 5682 5686 5690 5694
5698 5702 5706 5710 5714 5718 5722 5726 5730 5734 5738 5742 5746 6500
6502 6504 6506 6647 6649 6651 6653 6747 6922
.MLOOP 4245 4258 4354 4356 4358 4464 6821 6823 6825 6980 6982 6984
.MPUSH 3701 3930 3934 3938 3942 4033 4039 4045 4139 4148 4239 4241 4243 4252
4254 4256 4342 4344 4346 4348 4350 4448 4450 4452 4454 4458 4852 4854
4856 4858 4860 4979 4981 4998 5000 5017 5019 5036 5038 5881 5889 5981
6065 6159 6264 6266 6268 6270 6272 6372 6374 6456 6458 6603 6605 6773
6948
.MRFCT 4760 4764 4768 4772 4862 4864 4866 4868 5045 5049 5053 5057 5173 5176
5179 5182 6795 6797 6799 6801
.MRPCT 4460 5524 5528 5532 5536 5543 5545 5547 5549 5635 5639 5643 5647 6484
6486 6488 6490 6631 6633 6635 6637 6803 6805 6807 6809
.MTWB 5883 5885 5887 5891 5893 5895 5983 6073 6178 6180 6182 6274 6276 6280
6282 6376 6835 6837 6839 6841
.RCCOF 193 197 308 310 408 414 426 531 537 549 796 802 887 893
978 984 1158 1245 1355 2751 2763 2859 2984 3155 3161 3167 3255 3264
3273 3280 3287 3294 3301 3308 3315 3322 3329 3336 3343 3350 3357 3364
3371 3378 3385 3392 3481 3493 3497 3592 3613 3706 3727 3817 3823 3930
3938 4033 4035 4039 4041 4045 4047 4139 4141 4148 4150 4241 4243 4245
4254 4256 4258 4354 4360 4458 4464 4760 4768 4862 4866 5045 5053 5173
5179 5202 5209 5216 5223 5230 5237 5244 5251 5258 5265 5272 5279 5286
5293 5300 5307 5314 5321 5328 5335 5342 5349 5356 5363 5370 5377 5524
5532 5543 5545 5547 5549 5551 5635 5643 5651 5883 5891 5897 5983 6069
6073 6163 6178 6276 6280 6376 6458 6460 6464 6468 6472 6476 6480 6484
6488 6492 6496 6500 6504 6508 6510 6516 6518 6520 6605 6607 6611 6615
6619 6623 6627 6631 6635 6639 6643 6647 6651 6655 6661 6663 6665 6749
6753 6757 6761 6765 6769 6773 6775 6781 6785 6789 6795 6799 6803 6807
6811 6813 6817 6821 6827 6831 6835 6839 6844 6924 6928 6932 6936 6940
6944 6948 6950 6956 6960 6964 6970 6972 6976 6980 6986 6990 6994
.RCCON 195 199 312 314 420 432 543 555 798 800 889 891 980 982
1357 1359 2755 2759 2874 2889 3485 3489 3599 3606 3713 3720 3819 3821
3934 3942 4356 4358 4764 4772 4864 4868 5049 5057 5176 5182 5528 5536
5639 5647 5885 5887 5893 5895 6180 6182 6274 6282 6456 6462 6466 6470
6474 6478 6482 6486 6490 6494 6498 6502 6506 6512 6514 6523 6603 6609
6613 6617 6621 6625 6629 6633 6637 6641 6645 6649 6653 6657 6659 6668
6751 6755 6759 6763 6767 6771 6777 6779 6783 6787 6791 6793 6797 6801
6805 6809 6815 6819 6823 6825 6829 6833 6837 6841 6926 6930 6934 6938
6942 6946 6952 6954 6958 6962 6966 6968 6974 6978 6982 6984 6988 6992
.RCENA 800 802 891 893 982 984
.RCJP 796 798 800 802 6468 6470 6472 6474 6615 6617 6619 6621 6765 6767 SEQ 0900
6769 6771 6940 6942 6944 6946
.RCJPP 2751 2755 2759 2763 2859 2874 2889 2984 4969 4971 4973 4975 4977 4988
4990 4992 4994 4996 5007 5009 5011 5013 5015 5026 5028 5030 5032 5034
6520 6665 6813 6815 6817 6819 6972 6974 6976 6978
.RCJS 978 980 982 984 1066 1154 1158 1239 1328 1332 1336 1340 1344 1348
1438 1440 1442 1444 1448 1452 1456 1460 1464 1468 1472 1476 1480 1484
1488 1492 1496 1500 1504 1508 1512 1514 1516 1518 1603 1607 1609 1613
1617 1621 1625 1629 1633 1637 1641 1645 1649 1653 1657 1661 1665 1669
1673 1677 1679 1681 1683 1768 1772 1776 1780 1784 1788 1792 1796 1800
1804 1808 1812 1816 1820 1824 1828 1832 1836 1840 1844 1846 1848 1850
1935 1939 1943 1947 1951 1955 1959 1963 1967 1971 1975 1979 1983 1987
1991 1995 1999 2003 2007 2011 2013 2015 2017 2098 2102 2106 2110 2114
2118 2122 2126 2130 2134 2138 2142 2146 2150 2154 2158 2162 2166 2170
2174 2176 2178 2180 2268 2272 2274 2276 2278 2360 2364 2366 2368 2370
2453 2457 2459 2461 2463 2548 2552 2554 2556 2558 2645 2649 2651 2653
2655 2853 2855 2868 2870 2883 2885 2976 2980 3919 3921 3923 3925 4556
4560 4564 4568 4573 4577 4581 4585 4590 4594 4598 4602 4607 4611 4615
4619 4624 4628 4632 4636 4641 4645 4649 4653 4658 4662 4666 4670 4675
4679 4683 4687 4692 4696 4700 4704 4709 4713 4717 4721 4726 4730 4734
4738 4743 4747 4751 4755 4983 5002 5021 5040 5200 5207 5214 5221 5228
5235 5242 5249 5256 5263 5270 5277 5284 5291 5298 5305 5312 5319 5326
5333 5340 5347 5354 5361 5368 5375 6067 6161 6165 6169 6173 6516 6661
6757 6759 6761 6763 6932 6934 6936 6938
.RCJV 887 889 891 893 6476 6478 6480 6482 6623 6625 6627 6629 6781 6783
6785 6787 6956 6958 6960 6962
.RCONT 666 668 670 672 676 680 684 688 692 696 700 704 708 1148
1150 1152 3397 3618 4051 6492 6494 6496 6498 6639 6641 6643 6645 6827
6829 6831 6833 6986 6988 6990 6992
.RCRTN 1070 1160 1245 1355 1357 1359 1527 1692 1859 2022 2189 2280 2372 2374
2465 2467 2469 2560 2562 2564 2566 2657 2659 2661 2663 2665 2863 2878
2893 2986 3708 3715 3722 3729 3732 3932 3936 3940 3944 4369 4469 4870
4985 5004 5023 5042 6071 6184 6284 6518 6523 6663 6668 6811 6970
.RDISA 193 195 308 312 414 420 537 543 796 798 887 889 978 980
1355 1357 2751 2755 2859 2874 3481 3485 3592 3599 3706 3713 3817 3819
3930 3934 4033 4039 4045 4354 4356 4760 4764 4862 4864 5045 5049 5173
5176 5524 5528 5543 5545 5547 5549 5635 5639 5883 5885 5891 5893 6178
6180 6280 6282 6460 6462 6468 6470 6476 6478 6484 6486 6492 6494 6500
6502 6510 6512 6607 6609 6615 6617 6623 6625 6631 6633 6639 6641 6647
6649 6655 6657 6749 6751 6757 6759 6765 6767 6775 6777 6781 6783 6789
6791 6795 6797 6803 6805 6813 6815 6821 6823 6827 6829 6835 6837 6924
6926 6932 6934 6940 6942 6950 6952 6956 6958 6964 6966 6972 6974 6980
6982 6986 6988
.RENA 197 199 310 314 408 426 432 531 549 555 1158 1245 1359 2759
2763 2889 2984 3155 3161 3167 3255 3264 3273 3280 3287 3294 3301 3308
3315 3322 3329 3336 3343 3350 3357 3364 3371 3378 3385 3392 3489 3493
3497 3606 3613 3720 3727 3821 3823 3938 3942 4035 4041 4047 4139 4141
4148 4150 4241 4243 4245 4254 4256 4258 4358 4360 4458 4464 4768 4772
4866 4868 5053 5057 5179 5182 5202 5209 5216 5223 5230 5237 5244 5251
5258 5265 5272 5279 5286 5293 5300 5307 5314 5321 5328 5335 5342 5349
5356 5363 5370 5377 5532 5536 5551 5643 5647 5651 5887 5895 5897 5983
6069 6073 6163 6182 6274 6276 6376 6456 6458 6464 6466 6472 6474 6480
6482 6488 6490 6496 6498 6504 6506 6508 6514 6516 6518 6520 6523 6603
6605 6611 6613 6619 6621 6627 6629 6635 6637 6643 6645 6651 6653 6659 SEQ 0901
6661 6663 6665 6668 6753 6755 6761 6763 6769 6771 6773 6779 6785 6787
6793 6799 6801 6807 6809 6811 6817 6819 6825 6831 6833 6839 6841 6844
6928 6930 6936 6938 6944 6946 6948 6954 6960 6962 6968 6970 6976 6978
6984 6990 6992 6994
.RJ 193 195 197 199 299 301 303 305 308 310 312 314 408 410
412 414 416 418 420 422 424 426 428 430 432 435 437 531
533 535 537 539 541 543 545 547 549 551 553 555 558 560
664 666 668 670 672 674 676 678 680 682 684 686 688 690
692 694 696 698 700 702 704 706 708 710 796 798 800 802
887 889 891 893 978 980 982 984 1066 1154 1158 1163 1239 1241
1326 1328 1330 1332 1334 1336 1338 1340 1342 1344 1346 1348 1350 1362
1438 1440 1442 1444 1446 1448 1450 1452 1454 1456 1458 1460 1462 1464
1466 1468 1470 1472 1474 1476 1478 1480 1482 1484 1486 1488 1490 1492
1494 1496 1498 1500 1502 1504 1506 1508 1510 1512 1514 1516 1518 1520
1522 1603 1605 1607 1609 1611 1613 1615 1617 1619 1621 1623 1625 1627
1629 1631 1633 1635 1637 1639 1641 1643 1645 1647 1649 1651 1653 1655
1657 1659 1661 1663 1665 1667 1669 1671 1673 1675 1677 1679 1681 1683
1685 1687 1768 1770 1772 1774 1776 1778 1780 1782 1784 1786 1788 1790
1792 1794 1796 1798 1800 1802 1804 1806 1808 1810 1812 1814 1816 1818
1820 1822 1824 1826 1828 1830 1832 1834 1836 1838 1840 1842 1844 1846
1848 1850 1852 1854 1935 1937 1939 1941 1943 1945 1947 1949 1951 1953
1955 1957 1959 1961 1963 1965 1967 1969 1971 1973 1975 1977 1979 1981
1983 1985 1987 1989 1991 1993 1995 1997 1999 2001 2003 2005 2007 2009
2011 2013 2015 2017 2098 2100 2102 2104 2106 2108 2110 2112 2114 2116
2118 2120 2122 2124 2126 2128 2130 2132 2134 2136 2138 2140 2142 2144
2146 2148 2150 2152 2154 2156 2158 2160 2162 2164 2166 2168 2170 2172
2174 2176 2178 2180 2182 2184 2268 2272 2274 2276 2278 2360 2364 2366
2368 2370 2453 2457 2459 2461 2463 2548 2552 2554 2556 2558 2645 2649
2651 2653 2655 2751 2753 2755 2757 2759 2761 2763 2765 2768 2770 2772
2774 2853 2855 2857 2859 2861 2865 2868 2870 2872 2874 2876 2880 2883
2885 2887 2889 2891 2895 2976 2980 2984 2988 3063 3065 3153 3155 3157
3159 3161 3163 3165 3167 3169 3251 3253 3255 3257 3259 3262 3264 3266
3268 3271 3273 3275 3278 3280 3282 3285 3287 3289 3292 3294 3296 3299
3301 3303 3306 3308 3310 3313 3315 3317 3320 3322 3324 3327 3329 3331
3334 3336 3338 3341 3343 3345 3348 3350 3352 3355 3357 3359 3362 3364
3366 3369 3371 3373 3376 3378 3380 3383 3385 3387 3390 3392 3394 3399
3479 3481 3483 3485 3487 3489 3491 3493 3495 3497 3499 3502 3590 3592
3594 3597 3599 3601 3604 3606 3608 3611 3613 3615 3620 3704 3706 3711
3713 3718 3720 3725 3727 3734 3815 3817 3819 3821 3823 3825 3827 3919
3921 3923 3925 3930 3934 3938 3942 3947 4031 4033 4035 4037 4039 4041
4043 4045 4047 4049 4054 4137 4139 4141 4143 4146 4148 4150 4237 4239
4241 4243 4245 4250 4252 4254 4256 4258 4261 4352 4354 4356 4358 4360
4362 4365 4456 4460 4462 4464 4466 4554 4556 4558 4560 4562 4564 4566
4568 4571 4573 4575 4577 4579 4581 4583 4585 4588 4590 4592 4594 4596
4598 4600 4602 4605 4607 4609 4611 4613 4615 4617 4619 4622 4624 4626
4628 4630 4632 4634 4636 4639 4641 4643 4645 4647 4649 4651 4653 4656
4658 4660 4662 4664 4666 4668 4670 4673 4675 4677 4679 4681 4683 4685
4687 4690 4692 4694 4696 4698 4700 4702 4704 4707 4709 4711 4713 4715
4717 4719 4721 4724 4726 4728 4730 4732 4734 4736 4738 4741 4743 4745
4747 4749 4751 4753 4755 4758 4760 4762 4764 4766 4768 4770 4772 4774
4860 4862 4864 4866 4868 4872 4969 4971 4973 4975 4977 4979 4981 4983
4988 4990 4992 4994 4996 4998 5000 5002 5007 5009 5011 5013 5015 5017
5019 5021 5026 5028 5030 5032 5034 5036 5038 5040 5045 5047 5049 5051 SEQ 0902
5053 5055 5057 5059 5062 5173 5176 5179 5182 5193 5195 5198 5200 5202
5205 5207 5209 5212 5214 5216 5219 5221 5223 5226 5228 5230 5233 5235
5237 5240 5242 5244 5247 5249 5251 5254 5256 5258 5261 5263 5265 5268
5270 5272 5275 5277 5279 5282 5284 5286 5289 5291 5293 5296 5298 5300
5303 5305 5307 5310 5312 5314 5317 5319 5321 5324 5326 5328 5331 5333
5335 5338 5340 5342 5345 5347 5349 5352 5354 5356 5359 5361 5363 5366
5368 5370 5373 5375 5377 5380 5382 5385 5387 5389 5391 5393 5395 5397
5399 5401 5403 5405 5407 5409 5411 5413 5415 5417 5419 5421 5423 5425
5427 5429 5431 5433 5435 5522 5524 5526 5528 5530 5532 5534 5536 5538
5541 5543 5545 5547 5549 5551 5553 5633 5635 5637 5639 5641 5643 5645
5647 5649 5651 5654 5656 5658 5660 5662 5664 5666 5668 5670 5672 5674
5676 5678 5680 5682 5684 5686 5688 5690 5692 5694 5696 5698 5700 5702
5704 5706 5708 5710 5712 5714 5716 5718 5720 5722 5724 5726 5728 5730
5732 5734 5736 5738 5740 5742 5744 5746 5748 5751 5753 5756 5758 5760
5762 5764 5766 5768 5770 5772 5774 5776 5778 5780 5782 5784 5786 5788
5790 5792 5794 5796 5798 5800 5802 5881 5883 5885 5887 5889 5891 5893
5895 5900 5902 5981 5983 5985 5987 6065 6067 6073 6075 6159 6161 6165
6167 6169 6171 6173 6175 6178 6180 6182 6264 6266 6268 6270 6272 6274
6276 6278 6280 6282 6286 6288 6290 6292 6372 6374 6376 6456 6460 6462
6464 6466 6468 6470 6472 6474 6476 6478 6480 6482 6484 6486 6488 6490
6492 6494 6496 6498 6500 6502 6504 6506 6508 6510 6512 6514 6516 6518
6520 6526 6603 6607 6609 6611 6613 6615 6617 6619 6621 6623 6625 6627
6629 6631 6633 6635 6637 6639 6641 6643 6645 6647 6649 6651 6653 6655
6657 6659 6661 6663 6665 6671 6747 6749 6751 6753 6755 6757 6759 6761
6763 6765 6767 6769 6771 6773 6775 6777 6779 6781 6783 6785 6787 6789
6791 6793 6795 6797 6799 6801 6803 6805 6807 6809 6811 6813 6815 6817
6819 6821 6823 6825 6827 6829 6831 6833 6835 6837 6839 6841 6844 6847
6922 6924 6926 6928 6930 6932 6934 6936 6938 6940 6942 6944 6946 6948
6950 6952 6954 6956 6958 6960 6962 6964 6966 6968 6970 6972 6974 6976
6978 6980 6982 6984 6986 6988 6990 6992 6994 6997 6999 7001
.RJMAP 193 195 197 199 299 301 303 305 410 416 422 428 435 437
533 539 545 551 558 560 664 674 678 682 686 690 694 698
702 706 710 1163 1241 1350 1362 1446 1450 1454 1458 1462 1466 1470
1474 1478 1482 1486 1490 1494 1498 1502 1506 1510 1520 1522 1605 1611
1615 1619 1623 1627 1631 1635 1639 1643 1647 1651 1655 1659 1663 1667
1671 1675 1685 1687 1770 1774 1778 1782 1786 1790 1794 1798 1802 1806
1810 1814 1818 1822 1826 1830 1834 1838 1842 1852 1854 1937 1941 1945
1949 1953 1957 1961 1965 1969 1973 1977 1981 1985 1989 1993 1997 2001
2005 2009 2100 2104 2108 2112 2116 2120 2124 2128 2132 2136 2140 2144
2148 2152 2156 2160 2164 2168 2172 2182 2184 2753 2757 2761 2765 2768
2770 2772 2774 2857 2861 2865 2872 2876 2880 2887 2891 2895 2988 3063
3157 3163 3169 3251 3257 3259 3266 3268 3275 3282 3289 3296 3303 3310
3317 3324 3331 3338 3345 3352 3359 3366 3373 3380 3387 3394 3399 3483
3487 3491 3495 3499 3502 3594 3601 3608 3615 3620 3734 3825 3827 3947
4037 4043 4049 4054 4143 4237 4250 4261 4362 4365 4462 4466 4758 4762
4766 4770 4774 4872 5047 5051 5055 5059 5062 5193 5195 5380 5382 5385
5387 5389 5391 5393 5395 5397 5399 5401 5403 5405 5407 5409 5411 5413
5415 5417 5419 5421 5423 5425 5427 5429 5431 5433 5435 5526 5530 5534
5538 5553 5633 5637 5641 5645 5649 5656 5660 5664 5668 5672 5676 5680
5684 5688 5692 5696 5700 5704 5708 5712 5716 5720 5724 5728 5732 5736
5740 5744 5748 5751 5753 5756 5758 5760 5762 5764 5766 5768 5770 5772
5774 5776 5778 5780 5782 5784 5786 5788 5790 5792 5794 5796 5798 5800
5802 5900 5902 5985 5987 6075 6167 6171 6175 6278 6286 6288 6290 6292 SEQ 0903
6460 6462 6464 6466 6526 6607 6609 6611 6613 6671 6749 6751 6753 6755
6847 6924 6926 6928 6930 6997 6999 7001
.RJRP 408 531 3155 3161 3167 3255 3264 3273 3280 3287 3294 3301 3308 3315
3322 3329 3336 3343 3350 3357 3364 3371 3378 3385 3392 3481 3485 3489
3493 3497 4035 4041 4047 4141 4150 4360 5202 5209 5216 5223 5230 5237
5244 5251 5258 5265 5272 5279 5286 5293 5300 5307 5314 5321 5328 5335
5342 5349 5356 5363 5370 5377 5551 5651 5897 6069 6163 6508 6510 6512
6514 6655 6657 6659 6789 6791 6793 6844 6964 6966 6968 6994
.RJSRP 3592 3599 3606 3613 3706 3713 3720 3727 3817 3819 3821 3823 6775 6777
6779 6950 6952 6954
.RJZ 297 308 310 312 314 414 420 426 432 537 543 549 555 1068
1156 1243 1352 1525 1690 1857 2020 2187 2270 2362 2455 2550 2647 2898
2978 2982 3151 3504 3588 3737 3813 3927 4029 4135 4367 4472 4551 4874
5520 5879 5979 6078 6187 6294 6378 6454 6601 6745 6920
.RLDCT 412 418 424 430 535 541 547 553 1326 1330 1334 1338 1342 1346
3065 3153 3159 3165 3253 3262 3271 3278 3285 3292 3299 3306 3313 3320
3327 3334 3341 3348 3355 3362 3369 3376 3383 3390 3479 3590 3597 3604
3611 3704 3711 3718 3725 3815 4031 4137 4146 4352 4456 4554 4558 4562
4566 4571 4575 4579 4583 4588 4592 4596 4600 4605 4609 4613 4617 4622
4626 4630 4634 4639 4643 4647 4651 4656 4660 4664 4668 4673 4677 4681
4685 4690 4694 4698 4702 4707 4711 4715 4719 4724 4728 4732 4736 4741
4745 4749 4753 5198 5205 5212 5219 5226 5233 5240 5247 5254 5261 5268
5275 5282 5289 5296 5303 5310 5317 5324 5331 5338 5345 5352 5359 5366
5373 5522 5541 5654 5658 5662 5666 5670 5674 5678 5682 5686 5690 5694
5698 5702 5706 5710 5714 5718 5722 5726 5730 5734 5738 5742 5746 6500
6502 6504 6506 6647 6649 6651 6653 6747 6922
.RLOOP 4245 4258 4354 4356 4358 4464 6821 6823 6825 6980 6982 6984
.RPUSH 3701 3930 3934 3938 3942 4033 4039 4045 4139 4148 4239 4241 4243 4252
4254 4256 4342 4344 4346 4348 4350 4448 4450 4452 4454 4458 4852 4854
4856 4858 4860 4979 4981 4998 5000 5017 5019 5036 5038 5881 5889 5981
6065 6159 6264 6266 6268 6270 6272 6372 6374 6456 6458 6603 6605 6773
6948
.RRFCT 4760 4764 4768 4772 4862 4864 4866 4868 5045 5049 5053 5057 5173 5176
5179 5182 6795 6797 6799 6801
.RRPCT 4460 5524 5528 5532 5536 5543 5545 5547 5549 5635 5639 5643 5647 6484
6486 6488 6490 6631 6633 6635 6637 6803 6805 6807 6809
.RTWB 5883 5885 5887 5891 5893 5895 5983 6073 6178 6180 6182 6274 6276 6280
6282 6376 6835 6837 6839 6841
CALC 193 195 197 199 297 299 301 303 305 308 310 312 314 408
410 412 414 416 418 420 422 424 426 428 430 432 435 437 SEQ 0904
531 533 535 537 539 541 543 545 547 549 551 553 555 558
560 664 666 668 670 672 674 676 678 680 682 684 686 688
690 692 694 696 698 700 702 704 706 708 710 796 798 800
802 887 889 891 893 978 980 982 984 1066 1068 1070 1148 1150
1152 1154 1156 1158 1160 1163 1239 1241 1243 1245 1326 1328 1330 1332
1334 1336 1338 1340 1342 1344 1346 1348 1350 1352 1355 1357 1359 1362
1438 1440 1442 1444 1446 1448 1450 1452 1454 1456 1458 1460 1462 1464
1466 1468 1470 1472 1474 1476 1478 1480 1482 1484 1486 1488 1490 1492
1494 1496 1498 1500 1502 1504 1506 1508 1510 1512 1514 1516 1518 1520
1522 1525 1527 1603 1605 1607 1609 1611 1613 1615 1617 1619 1621 1623
1625 1627 1629 1631 1633 1635 1637 1639 1641 1643 1645 1647 1649 1651
1653 1655 1657 1659 1661 1663 1665 1667 1669 1671 1673 1675 1677 1679
1681 1683 1685 1687 1690 1692 1768 1770 1772 1774 1776 1778 1780 1782
1784 1786 1788 1790 1792 1794 1796 1798 1800 1802 1804 1806 1808 1810
1812 1814 1816 1818 1820 1822 1824 1826 1828 1830 1832 1834 1836 1838
1840 1842 1844 1846 1848 1850 1852 1854 1857 1859 1935 1937 1939 1941
1943 1945 1947 1949 1951 1953 1955 1957 1959 1961 1963 1965 1967 1969
1971 1973 1975 1977 1979 1981 1983 1985 1987 1989 1991 1993 1995 1997
1999 2001 2003 2005 2007 2009 2011 2013 2015 2017 2020 2022 2098 2100
2102 2104 2106 2108 2110 2112 2114 2116 2118 2120 2122 2124 2126 2128
2130 2132 2134 2136 2138 2140 2142 2144 2146 2148 2150 2152 2154 2156
2158 2160 2162 2164 2166 2168 2170 2172 2174 2176 2178 2180 2182 2184
2187 2189 2268 2270 2272 2274 2276 2278 2280 2360 2362 2364 2366 2368
2370 2372 2374 2453 2455 2457 2459 2461 2463 2465 2467 2469 2548 2550
2552 2554 2556 2558 2560 2562 2564 2566 2645 2647 2649 2651 2653 2655
2657 2659 2661 2663 2665 2751 2753 2755 2757 2759 2761 2763 2765 2768
2770 2772 2774 2853 2855 2857 2859 2861 2863 2865 2868 2870 2872 2874
2876 2878 2880 2883 2885 2887 2889 2891 2893 2895 2898 2976 2978 2980
2982 2984 2986 2988 3063 3065 3151 3153 3155 3157 3159 3161 3163 3165
3167 3169 3251 3253 3255 3257 3259 3262 3264 3266 3268 3271 3273 3275
3278 3280 3282 3285 3287 3289 3292 3294 3296 3299 3301 3303 3306 3308
3310 3313 3315 3317 3320 3322 3324 3327 3329 3331 3334 3336 3338 3341
3343 3345 3348 3350 3352 3355 3357 3359 3362 3364 3366 3369 3371 3373
3376 3378 3380 3383 3385 3387 3390 3392 3394 3397 3399 3479 3481 3483
3485 3487 3489 3491 3493 3495 3497 3499 3502 3504 3588 3590 3592 3594
3597 3599 3601 3604 3606 3608 3611 3613 3615 3618 3620 3701 3704 3706
3708 3711 3713 3715 3718 3720 3722 3725 3727 3729 3732 3734 3737 3813
3815 3817 3819 3821 3823 3825 3827 3919 3921 3923 3925 3927 3930 3932
3934 3936 3938 3940 3942 3944 3947 4029 4031 4033 4035 4037 4039 4041
4043 4045 4047 4049 4051 4054 4135 4137 4139 4141 4143 4146 4148 4150
4237 4239 4241 4243 4245 4250 4252 4254 4256 4258 4261 4342 4344 4346
4348 4350 4352 4354 4356 4358 4360 4362 4365 4367 4369 4448 4450 4452
4454 4456 4458 4460 4462 4464 4466 4469 4472 4551 4554 4556 4558 4560
4562 4564 4566 4568 4571 4573 4575 4577 4579 4581 4583 4585 4588 4590
4592 4594 4596 4598 4600 4602 4605 4607 4609 4611 4613 4615 4617 4619
4622 4624 4626 4628 4630 4632 4634 4636 4639 4641 4643 4645 4647 4649
4651 4653 4656 4658 4660 4662 4664 4666 4668 4670 4673 4675 4677 4679
4681 4683 4685 4687 4690 4692 4694 4696 4698 4700 4702 4704 4707 4709
4711 4713 4715 4717 4719 4721 4724 4726 4728 4730 4732 4734 4736 4738
4741 4743 4745 4747 4749 4751 4753 4755 4758 4760 4762 4764 4766 4768
4770 4772 4774 4852 4854 4856 4858 4860 4862 4864 4866 4868 4870 4872
4874 4969 4971 4973 4975 4977 4979 4981 4983 4985 4988 4990 4992 4994
4996 4998 5000 5002 5004 5007 5009 5011 5013 5015 5017 5019 5021 5023 SEQ 0905
5026 5028 5030 5032 5034 5036 5038 5040 5042 5045 5047 5049 5051 5053
5055 5057 5059 5062 5173 5176 5179 5182 5193 5195 5198 5200 5202 5205
5207 5209 5212 5214 5216 5219 5221 5223 5226 5228 5230 5233 5235 5237
5240 5242 5244 5247 5249 5251 5254 5256 5258 5261 5263 5265 5268 5270
5272 5275 5277 5279 5282 5284 5286 5289 5291 5293 5296 5298 5300 5303
5305 5307 5310 5312 5314 5317 5319 5321 5324 5326 5328 5331 5333 5335
5338 5340 5342 5345 5347 5349 5352 5354 5356 5359 5361 5363 5366 5368
5370 5373 5375 5377 5380 5382 5385 5387 5389 5391 5393 5395 5397 5399
5401 5403 5405 5407 5409 5411 5413 5415 5417 5419 5421 5423 5425 5427
5429 5431 5433 5435 5520 5522 5524 5526 5528 5530 5532 5534 5536 5538
5541 5543 5545 5547 5549 5551 5553 5633 5635 5637 5639 5641 5643 5645
5647 5649 5651 5654 5656 5658 5660 5662 5664 5666 5668 5670 5672 5674
5676 5678 5680 5682 5684 5686 5688 5690 5692 5694 5696 5698 5700 5702
5704 5706 5708 5710 5712 5714 5716 5718 5720 5722 5724 5726 5728 5730
5732 5734 5736 5738 5740 5742 5744 5746 5748 5751 5753 5756 5758 5760
5762 5764 5766 5768 5770 5772 5774 5776 5778 5780 5782 5784 5786 5788
5790 5792 5794 5796 5798 5800 5802 5879 5881 5883 5885 5887 5889 5891
5893 5895 5897 5900 5902 5979 5981 5983 5985 5987 6065 6067 6069 6071
6073 6075 6078 6159 6161 6163 6165 6167 6169 6171 6173 6175 6178 6180
6182 6184 6187 6264 6266 6268 6270 6272 6274 6276 6278 6280 6282 6284
6286 6288 6290 6292 6294 6372 6374 6376 6378 6454 6456 6458 6460 6462
6464 6466 6468 6470 6472 6474 6476 6478 6480 6482 6484 6486 6488 6490
6492 6494 6496 6498 6500 6502 6504 6506 6508 6510 6512 6514 6516 6518
6520 6523 6526 6601 6603 6605 6607 6609 6611 6613 6615 6617 6619 6621
6623 6625 6627 6629 6631 6633 6635 6637 6639 6641 6643 6645 6647 6649
6651 6653 6655 6657 6659 6661 6663 6665 6668 6671 6745 6747 6749 6751
6753 6755 6757 6759 6761 6763 6765 6767 6769 6771 6773 6775 6777 6779
6781 6783 6785 6787 6789 6791 6793 6795 6797 6799 6801 6803 6805 6807
6809 6811 6813 6815 6817 6819 6821 6823 6825 6827 6829 6831 6833 6835
6837 6839 6841 6844 6847 6920 6922 6924 6926 6928 6930 6932 6934 6936
6938 6940 6942 6944 6946 6948 6950 6952 6954 6956 6958 6960 6962 6964
6966 6968 6970 6972 6974 6976 6978 6980 6982 6984 6986 6988 6990 6992
6994 6997 6999 7001
CONCAT 193 195 197 199 297 299 301 303 305 308 310 312 314 408
410 412 414 416 418 420 422 424 426 428 430 432 435 437
531 533 535 537 539 541 543 545 547 549 551 553 555 558
560 664 666 668 670 672 674 676 678 680 682 684 686 688
690 692 694 696 698 700 702 704 706 708 710 796 798 800
802 887 889 891 893 978 980 982 984 1066 1068 1070 1148 1150
1152 1154 1156 1158 1160 1163 1239 1241 1243 1245 1326 1328 1330 1332
1334 1336 1338 1340 1342 1344 1346 1348 1350 1352 1355 1357 1359 1362
1438 1440 1442 1444 1446 1448 1450 1452 1454 1456 1458 1460 1462 1464
1466 1468 1470 1472 1474 1476 1478 1480 1482 1484 1486 1488 1490 1492
1494 1496 1498 1500 1502 1504 1506 1508 1510 1512 1514 1516 1518 1520
1522 1525 1527 1603 1605 1607 1609 1611 1613 1615 1617 1619 1621 1623
1625 1627 1629 1631 1633 1635 1637 1639 1641 1643 1645 1647 1649 1651
1653 1655 1657 1659 1661 1663 1665 1667 1669 1671 1673 1675 1677 1679
1681 1683 1685 1687 1690 1692 1768 1770 1772 1774 1776 1778 1780 1782
1784 1786 1788 1790 1792 1794 1796 1798 1800 1802 1804 1806 1808 1810
1812 1814 1816 1818 1820 1822 1824 1826 1828 1830 1832 1834 1836 1838
1840 1842 1844 1846 1848 1850 1852 1854 1857 1859 1935 1937 1939 1941
1943 1945 1947 1949 1951 1953 1955 1957 1959 1961 1963 1965 1967 1969
1971 1973 1975 1977 1979 1981 1983 1985 1987 1989 1991 1993 1995 1997 SEQ 0906
1999 2001 2003 2005 2007 2009 2011 2013 2015 2017 2020 2022 2098 2100
2102 2104 2106 2108 2110 2112 2114 2116 2118 2120 2122 2124 2126 2128
2130 2132 2134 2136 2138 2140 2142 2144 2146 2148 2150 2152 2154 2156
2158 2160 2162 2164 2166 2168 2170 2172 2174 2176 2178 2180 2182 2184
2187 2189 2268 2270 2272 2274 2276 2278 2280 2360 2362 2364 2366 2368
2370 2372 2374 2453 2455 2457 2459 2461 2463 2465 2467 2469 2548 2550
2552 2554 2556 2558 2560 2562 2564 2566 2645 2647 2649 2651 2653 2655
2657 2659 2661 2663 2665 2751 2753 2755 2757 2759 2761 2763 2765 2768
2770 2772 2774 2853 2855 2857 2859 2861 2863 2865 2868 2870 2872 2874
2876 2878 2880 2883 2885 2887 2889 2891 2893 2895 2898 2976 2978 2980
2982 2984 2986 2988 3063 3065 3151 3153 3155 3157 3159 3161 3163 3165
3167 3169 3251 3253 3255 3257 3259 3262 3264 3266 3268 3271 3273 3275
3278 3280 3282 3285 3287 3289 3292 3294 3296 3299 3301 3303 3306 3308
3310 3313 3315 3317 3320 3322 3324 3327 3329 3331 3334 3336 3338 3341
3343 3345 3348 3350 3352 3355 3357 3359 3362 3364 3366 3369 3371 3373
3376 3378 3380 3383 3385 3387 3390 3392 3394 3397 3399 3479 3481 3483
3485 3487 3489 3491 3493 3495 3497 3499 3502 3504 3588 3590 3592 3594
3597 3599 3601 3604 3606 3608 3611 3613 3615 3618 3620 3701 3704 3706
3708 3711 3713 3715 3718 3720 3722 3725 3727 3729 3732 3734 3737 3813
3815 3817 3819 3821 3823 3825 3827 3919 3921 3923 3925 3927 3930 3932
3934 3936 3938 3940 3942 3944 3947 4029 4031 4033 4035 4037 4039 4041
4043 4045 4047 4049 4051 4054 4135 4137 4139 4141 4143 4146 4148 4150
4237 4239 4241 4243 4245 4250 4252 4254 4256 4258 4261 4342 4344 4346
4348 4350 4352 4354 4356 4358 4360 4362 4365 4367 4369 4448 4450 4452
4454 4456 4458 4460 4462 4464 4466 4469 4472 4551 4554 4556 4558 4560
4562 4564 4566 4568 4571 4573 4575 4577 4579 4581 4583 4585 4588 4590
4592 4594 4596 4598 4600 4602 4605 4607 4609 4611 4613 4615 4617 4619
4622 4624 4626 4628 4630 4632 4634 4636 4639 4641 4643 4645 4647 4649
4651 4653 4656 4658 4660 4662 4664 4666 4668 4670 4673 4675 4677 4679
4681 4683 4685 4687 4690 4692 4694 4696 4698 4700 4702 4704 4707 4709
4711 4713 4715 4717 4719 4721 4724 4726 4728 4730 4732 4734 4736 4738
4741 4743 4745 4747 4749 4751 4753 4755 4758 4760 4762 4764 4766 4768
4770 4772 4774 4852 4854 4856 4858 4860 4862 4864 4866 4868 4870 4872
4874 4969 4971 4973 4975 4977 4979 4981 4983 4985 4988 4990 4992 4994
4996 4998 5000 5002 5004 5007 5009 5011 5013 5015 5017 5019 5021 5023
5026 5028 5030 5032 5034 5036 5038 5040 5042 5045 5047 5049 5051 5053
5055 5057 5059 5062 5173 5176 5179 5182 5193 5195 5198 5200 5202 5205
5207 5209 5212 5214 5216 5219 5221 5223 5226 5228 5230 5233 5235 5237
5240 5242 5244 5247 5249 5251 5254 5256 5258 5261 5263 5265 5268 5270
5272 5275 5277 5279 5282 5284 5286 5289 5291 5293 5296 5298 5300 5303
5305 5307 5310 5312 5314 5317 5319 5321 5324 5326 5328 5331 5333 5335
5338 5340 5342 5345 5347 5349 5352 5354 5356 5359 5361 5363 5366 5368
5370 5373 5375 5377 5380 5382 5385 5387 5389 5391 5393 5395 5397 5399
5401 5403 5405 5407 5409 5411 5413 5415 5417 5419 5421 5423 5425 5427
5429 5431 5433 5435 5520 5522 5524 5526 5528 5530 5532 5534 5536 5538
5541 5543 5545 5547 5549 5551 5553 5633 5635 5637 5639 5641 5643 5645
5647 5649 5651 5654 5656 5658 5660 5662 5664 5666 5668 5670 5672 5674
5676 5678 5680 5682 5684 5686 5688 5690 5692 5694 5696 5698 5700 5702
5704 5706 5708 5710 5712 5714 5716 5718 5720 5722 5724 5726 5728 5730
5732 5734 5736 5738 5740 5742 5744 5746 5748 5751 5753 5756 5758 5760
5762 5764 5766 5768 5770 5772 5774 5776 5778 5780 5782 5784 5786 5788
5790 5792 5794 5796 5798 5800 5802 5879 5881 5883 5885 5887 5889 5891
5893 5895 5897 5900 5902 5979 5981 5983 5985 5987 6065 6067 6069 6071 SEQ 0907
6073 6075 6078 6159 6161 6163 6165 6167 6169 6171 6173 6175 6178 6180
6182 6184 6187 6264 6266 6268 6270 6272 6274 6276 6278 6280 6282 6284
6286 6288 6290 6292 6294 6372 6374 6376 6378 6454 6456 6458 6460 6462
6464 6466 6468 6470 6472 6474 6476 6478 6480 6482 6484 6486 6488 6490
6492 6494 6496 6498 6500 6502 6504 6506 6508 6510 6512 6514 6516 6518
6520 6523 6526 6601 6603 6605 6607 6609 6611 6613 6615 6617 6619 6621
6623 6625 6627 6629 6631 6633 6635 6637 6639 6641 6643 6645 6647 6649
6651 6653 6655 6657 6659 6661 6663 6665 6668 6671 6745 6747 6749 6751
6753 6755 6757 6759 6761 6763 6765 6767 6769 6771 6773 6775 6777 6779
6781 6783 6785 6787 6789 6791 6793 6795 6797 6799 6801 6803 6805 6807
6809 6811 6813 6815 6817 6819 6821 6823 6825 6827 6829 6831 6833 6835
6837 6839 6841 6844 6847 6920 6922 6924 6926 6928 6930 6932 6934 6936
6938 6940 6942 6944 6946 6948 6950 6952 6954 6956 6958 6960 6962 6964
6966 6968 6970 6972 6974 6976 6978 6980 6982 6984 6986 6988 6990 6992
6994 6997 6999 7001
FIELD 193 195 197 199 297 299 301 303 305 308 310 312 314 408
410 412 414 416 418 420 422 424 426 428 430 432 435 437
531 533 535 537 539 541 543 545 547 549 551 553 555 558
560 664 666 668 670 672 674 676 678 680 682 684 686 688
690 692 694 696 698 700 702 704 706 708 710 796 798 800
802 887 889 891 893 978 980 982 984 1066 1068 1070 1148 1150
1152 1154 1156 1158 1160 1163 1239 1241 1243 1245 1326 1328 1330 1332
1334 1336 1338 1340 1342 1344 1346 1348 1350 1352 1355 1357 1359 1362
1438 1440 1442 1444 1446 1448 1450 1452 1454 1456 1458 1460 1462 1464
1466 1468 1470 1472 1474 1476 1478 1480 1482 1484 1486 1488 1490 1492
1494 1496 1498 1500 1502 1504 1506 1508 1510 1512 1514 1516 1518 1520
1522 1525 1527 1603 1605 1607 1609 1611 1613 1615 1617 1619 1621 1623
1625 1627 1629 1631 1633 1635 1637 1639 1641 1643 1645 1647 1649 1651
1653 1655 1657 1659 1661 1663 1665 1667 1669 1671 1673 1675 1677 1679
1681 1683 1685 1687 1690 1692 1768 1770 1772 1774 1776 1778 1780 1782
1784 1786 1788 1790 1792 1794 1796 1798 1800 1802 1804 1806 1808 1810
1812 1814 1816 1818 1820 1822 1824 1826 1828 1830 1832 1834 1836 1838
1840 1842 1844 1846 1848 1850 1852 1854 1857 1859 1935 1937 1939 1941
1943 1945 1947 1949 1951 1953 1955 1957 1959 1961 1963 1965 1967 1969
1971 1973 1975 1977 1979 1981 1983 1985 1987 1989 1991 1993 1995 1997
1999 2001 2003 2005 2007 2009 2011 2013 2015 2017 2020 2022 2098 2100
2102 2104 2106 2108 2110 2112 2114 2116 2118 2120 2122 2124 2126 2128
2130 2132 2134 2136 2138 2140 2142 2144 2146 2148 2150 2152 2154 2156
2158 2160 2162 2164 2166 2168 2170 2172 2174 2176 2178 2180 2182 2184
2187 2189 2268 2270 2272 2274 2276 2278 2280 2360 2362 2364 2366 2368
2370 2372 2374 2453 2455 2457 2459 2461 2463 2465 2467 2469 2548 2550
2552 2554 2556 2558 2560 2562 2564 2566 2645 2647 2649 2651 2653 2655
2657 2659 2661 2663 2665 2751 2753 2755 2757 2759 2761 2763 2765 2768
2770 2772 2774 2853 2855 2857 2859 2861 2863 2865 2868 2870 2872 2874
2876 2878 2880 2883 2885 2887 2889 2891 2893 2895 2898 2976 2978 2980
2982 2984 2986 2988 3063 3065 3151 3153 3155 3157 3159 3161 3163 3165
3167 3169 3251 3253 3255 3257 3259 3262 3264 3266 3268 3271 3273 3275
3278 3280 3282 3285 3287 3289 3292 3294 3296 3299 3301 3303 3306 3308
3310 3313 3315 3317 3320 3322 3324 3327 3329 3331 3334 3336 3338 3341
3343 3345 3348 3350 3352 3355 3357 3359 3362 3364 3366 3369 3371 3373
3376 3378 3380 3383 3385 3387 3390 3392 3394 3397 3399 3479 3481 3483
3485 3487 3489 3491 3493 3495 3497 3499 3502 3504 3588 3590 3592 3594
3597 3599 3601 3604 3606 3608 3611 3613 3615 3618 3620 3701 3704 3706 SEQ 0908
3708 3711 3713 3715 3718 3720 3722 3725 3727 3729 3732 3734 3737 3813
3815 3817 3819 3821 3823 3825 3827 3919 3921 3923 3925 3927 3930 3932
3934 3936 3938 3940 3942 3944 3947 4029 4031 4033 4035 4037 4039 4041
4043 4045 4047 4049 4051 4054 4135 4137 4139 4141 4143 4146 4148 4150
4237 4239 4241 4243 4245 4250 4252 4254 4256 4258 4261 4342 4344 4346
4348 4350 4352 4354 4356 4358 4360 4362 4365 4367 4369 4448 4450 4452
4454 4456 4458 4460 4462 4464 4466 4469 4472 4551 4554 4556 4558 4560
4562 4564 4566 4568 4571 4573 4575 4577 4579 4581 4583 4585 4588 4590
4592 4594 4596 4598 4600 4602 4605 4607 4609 4611 4613 4615 4617 4619
4622 4624 4626 4628 4630 4632 4634 4636 4639 4641 4643 4645 4647 4649
4651 4653 4656 4658 4660 4662 4664 4666 4668 4670 4673 4675 4677 4679
4681 4683 4685 4687 4690 4692 4694 4696 4698 4700 4702 4704 4707 4709
4711 4713 4715 4717 4719 4721 4724 4726 4728 4730 4732 4734 4736 4738
4741 4743 4745 4747 4749 4751 4753 4755 4758 4760 4762 4764 4766 4768
4770 4772 4774 4852 4854 4856 4858 4860 4862 4864 4866 4868 4870 4872
4874 4969 4971 4973 4975 4977 4979 4981 4983 4985 4988 4990 4992 4994
4996 4998 5000 5002 5004 5007 5009 5011 5013 5015 5017 5019 5021 5023
5026 5028 5030 5032 5034 5036 5038 5040 5042 5045 5047 5049 5051 5053
5055 5057 5059 5062 5173 5176 5179 5182 5193 5195 5198 5200 5202 5205
5207 5209 5212 5214 5216 5219 5221 5223 5226 5228 5230 5233 5235 5237
5240 5242 5244 5247 5249 5251 5254 5256 5258 5261 5263 5265 5268 5270
5272 5275 5277 5279 5282 5284 5286 5289 5291 5293 5296 5298 5300 5303
5305 5307 5310 5312 5314 5317 5319 5321 5324 5326 5328 5331 5333 5335
5338 5340 5342 5345 5347 5349 5352 5354 5356 5359 5361 5363 5366 5368
5370 5373 5375 5377 5380 5382 5385 5387 5389 5391 5393 5395 5397 5399
5401 5403 5405 5407 5409 5411 5413 5415 5417 5419 5421 5423 5425 5427
5429 5431 5433 5435 5520 5522 5524 5526 5528 5530 5532 5534 5536 5538
5541 5543 5545 5547 5549 5551 5553 5633 5635 5637 5639 5641 5643 5645
5647 5649 5651 5654 5656 5658 5660 5662 5664 5666 5668 5670 5672 5674
5676 5678 5680 5682 5684 5686 5688 5690 5692 5694 5696 5698 5700 5702
5704 5706 5708 5710 5712 5714 5716 5718 5720 5722 5724 5726 5728 5730
5732 5734 5736 5738 5740 5742 5744 5746 5748 5751 5753 5756 5758 5760
5762 5764 5766 5768 5770 5772 5774 5776 5778 5780 5782 5784 5786 5788
5790 5792 5794 5796 5798 5800 5802 5879 5881 5883 5885 5887 5889 5891
5893 5895 5897 5900 5902 5979 5981 5983 5985 5987 6065 6067 6069 6071
6073 6075 6078 6159 6161 6163 6165 6167 6169 6171 6173 6175 6178 6180
6182 6184 6187 6264 6266 6268 6270 6272 6274 6276 6278 6280 6282 6284
6286 6288 6290 6292 6294 6372 6374 6376 6378 6454 6456 6458 6460 6462
6464 6466 6468 6470 6472 6474 6476 6478 6480 6482 6484 6486 6488 6490
6492 6494 6496 6498 6500 6502 6504 6506 6508 6510 6512 6514 6516 6518
6520 6523 6526 6601 6603 6605 6607 6609 6611 6613 6615 6617 6619 6621
6623 6625 6627 6629 6631 6633 6635 6637 6639 6641 6643 6645 6647 6649
6651 6653 6655 6657 6659 6661 6663 6665 6668 6671 6745 6747 6749 6751
6753 6755 6757 6759 6761 6763 6765 6767 6769 6771 6773 6775 6777 6779
6781 6783 6785 6787 6789 6791 6793 6795 6797 6799 6801 6803 6805 6807
6809 6811 6813 6815 6817 6819 6821 6823 6825 6827 6829 6831 6833 6835
6837 6839 6841 6844 6847 6920 6922 6924 6926 6928 6930 6932 6934 6936
6938 6940 6942 6944 6946 6948 6950 6952 6954 6956 6958 6960 6962 6964
6966 6968 6970 6972 6974 6976 6978 6980 6982 6984 6986 6988 6990 6992
6994 6997 6999 7001
GET 7170
GO 85 89 97 181 252 254 259 266 363 365 370 377 486 488
493 500 610 612 617 624 751 753 758 765 842 844 849 856 SEQ 0909
933 935 940 947 1024 1026 1031 1038 1106 1108 1113 1120 1197 1199
1204 1211 1284 1286 1291 1298 1396 1398 1403 1410 1561 1563 1568 1575
1726 1728 1733 1740 1893 1895 1900 1907 2056 2058 2063 2070 2226 2228
2233 2240 2318 2320 2325 2332 2411 2413 2418 2425 2506 2508 2513 2520
2603 2605 2610 2617 2709 2711 2716 2723 2811 2813 2818 2825 2934 2936
2941 2948 3021 3023 3028 3035 3109 3111 3116 3123 3209 3211 3216 3223
3437 3439 3444 3451 3546 3548 3553 3560 3659 3661 3666 3673 3771 3773
3778 3785 3874 3876 3881 3888 3987 3989 3994 4001 4093 4095 4100 4107
4192 4194 4199 4206 4300 4302 4307 4314 4406 4408 4413 4420 4509 4511
4516 4523 4810 4812 4817 4824 4924 4926 4931 4938 5118 5120 5125 5133
5167 5478 5480 5485 5492 5589 5591 5596 5603 5837 5839 5844 5851 5937
5939 5944 5951 6023 6025 6030 6037 6117 6119 6124 6131 6222 6224 6229
6236 6330 6332 6337 6344 6412 6414 6419 6426 6559 6561 6566 6573 6703
6705 6710 6717 6878 6880 6885 6892 7040 7044 7045 7052 7057 7071 7072
7089 7095 7104 7105 7107 7139 7156 7167 7169
MFLD 193# 193 195# 195 197# 197 199# 199 297# 297 299# 299 301# 301
303# 303 305# 305 308# 308 310# 310 312# 312 314# 314 408# 408
410# 410 412# 412 414# 414 416# 416 418# 418 420# 420 422# 422
424# 424 426# 426 428# 428 430# 430 432# 432 435# 435 437# 437
531# 531 533# 533 535# 535 537# 537 539# 539 541# 541 543# 543
545# 545 547# 547 549# 549 551# 551 553# 553 555# 555 558# 558
560# 560 664# 664 666# 666 668# 668 670# 670 672# 672 674# 674
676# 676 678# 678 680# 680 682# 682 684# 684 686# 686 688# 688
690# 690 692# 692 694# 694 696# 696 698# 698 700# 700 702# 702
704# 704 706# 706 708# 708 710# 710 796# 796 798# 798 800# 800
802# 802 887# 887 889# 889 891# 891 893# 893 978# 978 980# 980
982# 982 984# 984 1066# 1066 1068# 1068 1070# 1070 1148# 1148 1150# 1150
1152# 1152 1154# 1154 1156# 1156 1158# 1158 1160# 1160 1163# 1163 1239# 1239
1241# 1241 1243# 1243 1245# 1245 1326# 1326 1328# 1328 1330# 1330 1332# 1332
1334# 1334 1336# 1336 1338# 1338 1340# 1340 1342# 1342 1344# 1344 1346# 1346
1348# 1348 1350# 1350 1352# 1352 1355# 1355 1357# 1357 1359# 1359 1362# 1362
1438# 1438 1440# 1440 1442# 1442 1444# 1444 1446# 1446 1448# 1448 1450# 1450
1452# 1452 1454# 1454 1456# 1456 1458# 1458 1460# 1460 1462# 1462 1464# 1464
1466# 1466 1468# 1468 1470# 1470 1472# 1472 1474# 1474 1476# 1476 1478# 1478
1480# 1480 1482# 1482 1484# 1484 1486# 1486 1488# 1488 1490# 1490 1492# 1492
1494# 1494 1496# 1496 1498# 1498 1500# 1500 1502# 1502 1504# 1504 1506# 1506
1508# 1508 1510# 1510 1512# 1512 1514# 1514 1516# 1516 1518# 1518 1520# 1520
1522# 1522 1525# 1525 1527# 1527 1603# 1603 1605# 1605 1607# 1607 1609# 1609
1611# 1611 1613# 1613 1615# 1615 1617# 1617 1619# 1619 1621# 1621 1623# 1623
1625# 1625 1627# 1627 1629# 1629 1631# 1631 1633# 1633 1635# 1635 1637# 1637
1639# 1639 1641# 1641 1643# 1643 1645# 1645 1647# 1647 1649# 1649 1651# 1651
1653# 1653 1655# 1655 1657# 1657 1659# 1659 1661# 1661 1663# 1663 1665# 1665
1667# 1667 1669# 1669 1671# 1671 1673# 1673 1675# 1675 1677# 1677 1679# 1679
1681# 1681 1683# 1683 1685# 1685 1687# 1687 1690# 1690 1692# 1692 1768# 1768
1770# 1770 1772# 1772 1774# 1774 1776# 1776 1778# 1778 1780# 1780 1782# 1782
1784# 1784 1786# 1786 1788# 1788 1790# 1790 1792# 1792 1794# 1794 1796# 1796
1798# 1798 1800# 1800 1802# 1802 1804# 1804 1806# 1806 1808# 1808 1810# 1810
1812# 1812 1814# 1814 1816# 1816 1818# 1818 1820# 1820 1822# 1822 1824# 1824
1826# 1826 1828# 1828 1830# 1830 1832# 1832 1834# 1834 1836# 1836 1838# 1838
1840# 1840 1842# 1842 1844# 1844 1846# 1846 1848# 1848 1850# 1850 1852# 1852
1854# 1854 1857# 1857 1859# 1859 1935# 1935 1937# 1937 1939# 1939 1941# 1941
1943# 1943 1945# 1945 1947# 1947 1949# 1949 1951# 1951 1953# 1953 1955# 1955
1957# 1957 1959# 1959 1961# 1961 1963# 1963 1965# 1965 1967# 1967 1969# 1969 SEQ 0910
1971# 1971 1973# 1973 1975# 1975 1977# 1977 1979# 1979 1981# 1981 1983# 1983
1985# 1985 1987# 1987 1989# 1989 1991# 1991 1993# 1993 1995# 1995 1997# 1997
1999# 1999 2001# 2001 2003# 2003 2005# 2005 2007# 2007 2009# 2009 2011# 2011
2013# 2013 2015# 2015 2017# 2017 2020# 2020 2022# 2022 2098# 2098 2100# 2100
2102# 2102 2104# 2104 2106# 2106 2108# 2108 2110# 2110 2112# 2112 2114# 2114
2116# 2116 2118# 2118 2120# 2120 2122# 2122 2124# 2124 2126# 2126 2128# 2128
2130# 2130 2132# 2132 2134# 2134 2136# 2136 2138# 2138 2140# 2140 2142# 2142
2144# 2144 2146# 2146 2148# 2148 2150# 2150 2152# 2152 2154# 2154 2156# 2156
2158# 2158 2160# 2160 2162# 2162 2164# 2164 2166# 2166 2168# 2168 2170# 2170
2172# 2172 2174# 2174 2176# 2176 2178# 2178 2180# 2180 2182# 2182 2184# 2184
2187# 2187 2189# 2189 2268# 2268 2270# 2270 2272# 2272 2274# 2274 2276# 2276
2278# 2278 2280# 2280 2360# 2360 2362# 2362 2364# 2364 2366# 2366 2368# 2368
2370# 2370 2372# 2372 2374# 2374 2453# 2453 2455# 2455 2457# 2457 2459# 2459
2461# 2461 2463# 2463 2465# 2465 2467# 2467 2469# 2469 2548# 2548 2550# 2550
2552# 2552 2554# 2554 2556# 2556 2558# 2558 2560# 2560 2562# 2562 2564# 2564
2566# 2566 2645# 2645 2647# 2647 2649# 2649 2651# 2651 2653# 2653 2655# 2655
2657# 2657 2659# 2659 2661# 2661 2663# 2663 2665# 2665 2751# 2751 2753# 2753
2755# 2755 2757# 2757 2759# 2759 2761# 2761 2763# 2763 2765# 2765 2768# 2768
2770# 2770 2772# 2772 2774# 2774 2853# 2853 2855# 2855 2857# 2857 2859# 2859
2861# 2861 2863# 2863 2865# 2865 2868# 2868 2870# 2870 2872# 2872 2874# 2874
2876# 2876 2878# 2878 2880# 2880 2883# 2883 2885# 2885 2887# 2887 2889# 2889
2891# 2891 2893# 2893 2895# 2895 2898# 2898 2976# 2976 2978# 2978 2980# 2980
2982# 2982 2984# 2984 2986# 2986 2988# 2988 3063# 3063 3065# 3065 3151# 3151
3153# 3153 3155# 3155 3157# 3157 3159# 3159 3161# 3161 3163# 3163 3165# 3165
3167# 3167 3169# 3169 3251# 3251 3253# 3253 3255# 3255 3257# 3257 3259# 3259
3262# 3262 3264# 3264 3266# 3266 3268# 3268 3271# 3271 3273# 3273 3275# 3275
3278# 3278 3280# 3280 3282# 3282 3285# 3285 3287# 3287 3289# 3289 3292# 3292
3294# 3294 3296# 3296 3299# 3299 3301# 3301 3303# 3303 3306# 3306 3308# 3308
3310# 3310 3313# 3313 3315# 3315 3317# 3317 3320# 3320 3322# 3322 3324# 3324
3327# 3327 3329# 3329 3331# 3331 3334# 3334 3336# 3336 3338# 3338 3341# 3341
3343# 3343 3345# 3345 3348# 3348 3350# 3350 3352# 3352 3355# 3355 3357# 3357
3359# 3359 3362# 3362 3364# 3364 3366# 3366 3369# 3369 3371# 3371 3373# 3373
3376# 3376 3378# 3378 3380# 3380 3383# 3383 3385# 3385 3387# 3387 3390# 3390
3392# 3392 3394# 3394 3397# 3397 3399# 3399 3479# 3479 3481# 3481 3483# 3483
3485# 3485 3487# 3487 3489# 3489 3491# 3491 3493# 3493 3495# 3495 3497# 3497
3499# 3499 3502# 3502 3504# 3504 3588# 3588 3590# 3590 3592# 3592 3594# 3594
3597# 3597 3599# 3599 3601# 3601 3604# 3604 3606# 3606 3608# 3608 3611# 3611
3613# 3613 3615# 3615 3618# 3618 3620# 3620 3701# 3701 3704# 3704 3706# 3706
3708# 3708 3711# 3711 3713# 3713 3715# 3715 3718# 3718 3720# 3720 3722# 3722
3725# 3725 3727# 3727 3729# 3729 3732# 3732 3734# 3734 3737# 3737 3813# 3813
3815# 3815 3817# 3817 3819# 3819 3821# 3821 3823# 3823 3825# 3825 3827# 3827
3919# 3919 3921# 3921 3923# 3923 3925# 3925 3927# 3927 3930# 3930 3932# 3932
3934# 3934 3936# 3936 3938# 3938 3940# 3940 3942# 3942 3944# 3944 3947# 3947
4029# 4029 4031# 4031 4033# 4033 4035# 4035 4037# 4037 4039# 4039 4041# 4041
4043# 4043 4045# 4045 4047# 4047 4049# 4049 4051# 4051 4054# 4054 4135# 4135
4137# 4137 4139# 4139 4141# 4141 4143# 4143 4146# 4146 4148# 4148 4150# 4150
4237# 4237 4239# 4239 4241# 4241 4243# 4243 4245# 4245 4250# 4250 4252# 4252
4254# 4254 4256# 4256 4258# 4258 4261# 4261 4342# 4342 4344# 4344 4346# 4346
4348# 4348 4350# 4350 4352# 4352 4354# 4354 4356# 4356 4358# 4358 4360# 4360
4362# 4362 4365# 4365 4367# 4367 4369# 4369 4448# 4448 4450# 4450 4452# 4452
4454# 4454 4456# 4456 4458# 4458 4460# 4460 4462# 4462 4464# 4464 4466# 4466
4469# 4469 4472# 4472 4551# 4551 4554# 4554 4556# 4556 4558# 4558 4560# 4560
4562# 4562 4564# 4564 4566# 4566 4568# 4568 4571# 4571 4573# 4573 4575# 4575 SEQ 0911
4577# 4577 4579# 4579 4581# 4581 4583# 4583 4585# 4585 4588# 4588 4590# 4590
4592# 4592 4594# 4594 4596# 4596 4598# 4598 4600# 4600 4602# 4602 4605# 4605
4607# 4607 4609# 4609 4611# 4611 4613# 4613 4615# 4615 4617# 4617 4619# 4619
4622# 4622 4624# 4624 4626# 4626 4628# 4628 4630# 4630 4632# 4632 4634# 4634
4636# 4636 4639# 4639 4641# 4641 4643# 4643 4645# 4645 4647# 4647 4649# 4649
4651# 4651 4653# 4653 4656# 4656 4658# 4658 4660# 4660 4662# 4662 4664# 4664
4666# 4666 4668# 4668 4670# 4670 4673# 4673 4675# 4675 4677# 4677 4679# 4679
4681# 4681 4683# 4683 4685# 4685 4687# 4687 4690# 4690 4692# 4692 4694# 4694
4696# 4696 4698# 4698 4700# 4700 4702# 4702 4704# 4704 4707# 4707 4709# 4709
4711# 4711 4713# 4713 4715# 4715 4717# 4717 4719# 4719 4721# 4721 4724# 4724
4726# 4726 4728# 4728 4730# 4730 4732# 4732 4734# 4734 4736# 4736 4738# 4738
4741# 4741 4743# 4743 4745# 4745 4747# 4747 4749# 4749 4751# 4751 4753# 4753
4755# 4755 4758# 4758 4760# 4760 4762# 4762 4764# 4764 4766# 4766 4768# 4768
4770# 4770 4772# 4772 4774# 4774 4852# 4852 4854# 4854 4856# 4856 4858# 4858
4860# 4860 4862# 4862 4864# 4864 4866# 4866 4868# 4868 4870# 4870 4872# 4872
4874# 4874 4969# 4969 4971# 4971 4973# 4973 4975# 4975 4977# 4977 4979# 4979
4981# 4981 4983# 4983 4985# 4985 4988# 4988 4990# 4990 4992# 4992 4994# 4994
4996# 4996 4998# 4998 5000# 5000 5002# 5002 5004# 5004 5007# 5007 5009# 5009
5011# 5011 5013# 5013 5015# 5015 5017# 5017 5019# 5019 5021# 5021 5023# 5023
5026# 5026 5028# 5028 5030# 5030 5032# 5032 5034# 5034 5036# 5036 5038# 5038
5040# 5040 5042# 5042 5045# 5045 5047# 5047 5049# 5049 5051# 5051 5053# 5053
5055# 5055 5057# 5057 5059# 5059 5062# 5062 5173# 5173 5176# 5176 5179# 5179
5182# 5182 5193# 5193 5195# 5195 5198# 5198 5200# 5200 5202# 5202 5205# 5205
5207# 5207 5209# 5209 5212# 5212 5214# 5214 5216# 5216 5219# 5219 5221# 5221
5223# 5223 5226# 5226 5228# 5228 5230# 5230 5233# 5233 5235# 5235 5237# 5237
5240# 5240 5242# 5242 5244# 5244 5247# 5247 5249# 5249 5251# 5251 5254# 5254
5256# 5256 5258# 5258 5261# 5261 5263# 5263 5265# 5265 5268# 5268 5270# 5270
5272# 5272 5275# 5275 5277# 5277 5279# 5279 5282# 5282 5284# 5284 5286# 5286
5289# 5289 5291# 5291 5293# 5293 5296# 5296 5298# 5298 5300# 5300 5303# 5303
5305# 5305 5307# 5307 5310# 5310 5312# 5312 5314# 5314 5317# 5317 5319# 5319
5321# 5321 5324# 5324 5326# 5326 5328# 5328 5331# 5331 5333# 5333 5335# 5335
5338# 5338 5340# 5340 5342# 5342 5345# 5345 5347# 5347 5349# 5349 5352# 5352
5354# 5354 5356# 5356 5359# 5359 5361# 5361 5363# 5363 5366# 5366 5368# 5368
5370# 5370 5373# 5373 5375# 5375 5377# 5377 5380# 5380 5382# 5382 5385# 5385
5387# 5387 5389# 5389 5391# 5391 5393# 5393 5395# 5395 5397# 5397 5399# 5399
5401# 5401 5403# 5403 5405# 5405 5407# 5407 5409# 5409 5411# 5411 5413# 5413
5415# 5415 5417# 5417 5419# 5419 5421# 5421 5423# 5423 5425# 5425 5427# 5427
5429# 5429 5431# 5431 5433# 5433 5435# 5435 5520# 5520 5522# 5522 5524# 5524
5526# 5526 5528# 5528 5530# 5530 5532# 5532 5534# 5534 5536# 5536 5538# 5538
5541# 5541 5543# 5543 5545# 5545 5547# 5547 5549# 5549 5551# 5551 5553# 5553
5633# 5633 5635# 5635 5637# 5637 5639# 5639 5641# 5641 5643# 5643 5645# 5645
5647# 5647 5649# 5649 5651# 5651 5654# 5654 5656# 5656 5658# 5658 5660# 5660
5662# 5662 5664# 5664 5666# 5666 5668# 5668 5670# 5670 5672# 5672 5674# 5674
5676# 5676 5678# 5678 5680# 5680 5682# 5682 5684# 5684 5686# 5686 5688# 5688
5690# 5690 5692# 5692 5694# 5694 5696# 5696 5698# 5698 5700# 5700 5702# 5702
5704# 5704 5706# 5706 5708# 5708 5710# 5710 5712# 5712 5714# 5714 5716# 5716
5718# 5718 5720# 5720 5722# 5722 5724# 5724 5726# 5726 5728# 5728 5730# 5730
5732# 5732 5734# 5734 5736# 5736 5738# 5738 5740# 5740 5742# 5742 5744# 5744
5746# 5746 5748# 5748 5751# 5751 5753# 5753 5756# 5756 5758# 5758 5760# 5760
5762# 5762 5764# 5764 5766# 5766 5768# 5768 5770# 5770 5772# 5772 5774# 5774
5776# 5776 5778# 5778 5780# 5780 5782# 5782 5784# 5784 5786# 5786 5788# 5788
5790# 5790 5792# 5792 5794# 5794 5796# 5796 5798# 5798 5800# 5800 5802# 5802
5879# 5879 5881# 5881 5883# 5883 5885# 5885 5887# 5887 5889# 5889 5891# 5891 SEQ 0912
5893# 5893 5895# 5895 5897# 5897 5900# 5900 5902# 5902 5979# 5979 5981# 5981
5983# 5983 5985# 5985 5987# 5987 6065# 6065 6067# 6067 6069# 6069 6071# 6071
6073# 6073 6075# 6075 6078# 6078 6159# 6159 6161# 6161 6163# 6163 6165# 6165
6167# 6167 6169# 6169 6171# 6171 6173# 6173 6175# 6175 6178# 6178 6180# 6180
6182# 6182 6184# 6184 6187# 6187 6264# 6264 6266# 6266 6268# 6268 6270# 6270
6272# 6272 6274# 6274 6276# 6276 6278# 6278 6280# 6280 6282# 6282 6284# 6284
6286# 6286 6288# 6288 6290# 6290 6292# 6292 6294# 6294 6372# 6372 6374# 6374
6376# 6376 6378# 6378 6454# 6454 6456# 6456 6458# 6458 6460# 6460 6462# 6462
6464# 6464 6466# 6466 6468# 6468 6470# 6470 6472# 6472 6474# 6474 6476# 6476
6478# 6478 6480# 6480 6482# 6482 6484# 6484 6486# 6486 6488# 6488 6490# 6490
6492# 6492 6494# 6494 6496# 6496 6498# 6498 6500# 6500 6502# 6502 6504# 6504
6506# 6506 6508# 6508 6510# 6510 6512# 6512 6514# 6514 6516# 6516 6518# 6518
6520# 6520 6523# 6523 6526# 6526 6601# 6601 6603# 6603 6605# 6605 6607# 6607
6609# 6609 6611# 6611 6613# 6613 6615# 6615 6617# 6617 6619# 6619 6621# 6621
6623# 6623 6625# 6625 6627# 6627 6629# 6629 6631# 6631 6633# 6633 6635# 6635
6637# 6637 6639# 6639 6641# 6641 6643# 6643 6645# 6645 6647# 6647 6649# 6649
6651# 6651 6653# 6653 6655# 6655 6657# 6657 6659# 6659 6661# 6661 6663# 6663
6665# 6665 6668# 6668 6671# 6671 6745# 6745 6747# 6747 6749# 6749 6751# 6751
6753# 6753 6755# 6755 6757# 6757 6759# 6759 6761# 6761 6763# 6763 6765# 6765
6767# 6767 6769# 6769 6771# 6771 6773# 6773 6775# 6775 6777# 6777 6779# 6779
6781# 6781 6783# 6783 6785# 6785 6787# 6787 6789# 6789 6791# 6791 6793# 6793
6795# 6795 6797# 6797 6799# 6799 6801# 6801 6803# 6803 6805# 6805 6807# 6807
6809# 6809 6811# 6811 6813# 6813 6815# 6815 6817# 6817 6819# 6819 6821# 6821
6823# 6823 6825# 6825 6827# 6827 6829# 6829 6831# 6831 6833# 6833 6835# 6835
6837# 6837 6839# 6839 6841# 6841 6844# 6844 6847# 6847 6920# 6920 6922# 6922
6924# 6924 6926# 6926 6928# 6928 6930# 6930 6932# 6932 6934# 6934 6936# 6936
6938# 6938 6940# 6940 6942# 6942 6944# 6944 6946# 6946 6948# 6948 6950# 6950
6952# 6952 6954# 6954 6956# 6956 6958# 6958 6960# 6960 6962# 6962 6964# 6964
6966# 6966 6968# 6968 6970# 6970 6972# 6972 6974# 6974 6976# 6976 6978# 6978
6980# 6980 6982# 6982 6984# 6984 6986# 6986 6988# 6988 6990# 6990 6992# 6992
6994# 6994 6997# 6997 6999# 6999 7001# 7001
MWORD 193 195 197 199 297 299 301 303 305 308 310 312 314 408
410 412 414 416 418 420 422 424 426 428 430 432 435 437
531 533 535 537 539 541 543 545 547 549 551 553 555 558
560 664 666 668 670 672 674 676 678 680 682 684 686 688
690 692 694 696 698 700 702 704 706 708 710 796 798 800
802 887 889 891 893 978 980 982 984 1066 1068 1070 1148 1150
1152 1154 1156 1158 1160 1163 1239 1241 1243 1245 1326 1328 1330 1332
1334 1336 1338 1340 1342 1344 1346 1348 1350 1352 1355 1357 1359 1362
1438 1440 1442 1444 1446 1448 1450 1452 1454 1456 1458 1460 1462 1464
1466 1468 1470 1472 1474 1476 1478 1480 1482 1484 1486 1488 1490 1492
1494 1496 1498 1500 1502 1504 1506 1508 1510 1512 1514 1516 1518 1520
1522 1525 1527 1603 1605 1607 1609 1611 1613 1615 1617 1619 1621 1623
1625 1627 1629 1631 1633 1635 1637 1639 1641 1643 1645 1647 1649 1651
1653 1655 1657 1659 1661 1663 1665 1667 1669 1671 1673 1675 1677 1679
1681 1683 1685 1687 1690 1692 1768 1770 1772 1774 1776 1778 1780 1782
1784 1786 1788 1790 1792 1794 1796 1798 1800 1802 1804 1806 1808 1810
1812 1814 1816 1818 1820 1822 1824 1826 1828 1830 1832 1834 1836 1838
1840 1842 1844 1846 1848 1850 1852 1854 1857 1859 1935 1937 1939 1941
1943 1945 1947 1949 1951 1953 1955 1957 1959 1961 1963 1965 1967 1969
1971 1973 1975 1977 1979 1981 1983 1985 1987 1989 1991 1993 1995 1997
1999 2001 2003 2005 2007 2009 2011 2013 2015 2017 2020 2022 2098 2100
2102 2104 2106 2108 2110 2112 2114 2116 2118 2120 2122 2124 2126 2128 SEQ 0913
2130 2132 2134 2136 2138 2140 2142 2144 2146 2148 2150 2152 2154 2156
2158 2160 2162 2164 2166 2168 2170 2172 2174 2176 2178 2180 2182 2184
2187 2189 2268 2270 2272 2274 2276 2278 2280 2360 2362 2364 2366 2368
2370 2372 2374 2453 2455 2457 2459 2461 2463 2465 2467 2469 2548 2550
2552 2554 2556 2558 2560 2562 2564 2566 2645 2647 2649 2651 2653 2655
2657 2659 2661 2663 2665 2751 2753 2755 2757 2759 2761 2763 2765 2768
2770 2772 2774 2853 2855 2857 2859 2861 2863 2865 2868 2870 2872 2874
2876 2878 2880 2883 2885 2887 2889 2891 2893 2895 2898 2976 2978 2980
2982 2984 2986 2988 3063 3065 3151 3153 3155 3157 3159 3161 3163 3165
3167 3169 3251 3253 3255 3257 3259 3262 3264 3266 3268 3271 3273 3275
3278 3280 3282 3285 3287 3289 3292 3294 3296 3299 3301 3303 3306 3308
3310 3313 3315 3317 3320 3322 3324 3327 3329 3331 3334 3336 3338 3341
3343 3345 3348 3350 3352 3355 3357 3359 3362 3364 3366 3369 3371 3373
3376 3378 3380 3383 3385 3387 3390 3392 3394 3397 3399 3479 3481 3483
3485 3487 3489 3491 3493 3495 3497 3499 3502 3504 3588 3590 3592 3594
3597 3599 3601 3604 3606 3608 3611 3613 3615 3618 3620 3701 3704 3706
3708 3711 3713 3715 3718 3720 3722 3725 3727 3729 3732 3734 3737 3813
3815 3817 3819 3821 3823 3825 3827 3919 3921 3923 3925 3927 3930 3932
3934 3936 3938 3940 3942 3944 3947 4029 4031 4033 4035 4037 4039 4041
4043 4045 4047 4049 4051 4054 4135 4137 4139 4141 4143 4146 4148 4150
4237 4239 4241 4243 4245 4250 4252 4254 4256 4258 4261 4342 4344 4346
4348 4350 4352 4354 4356 4358 4360 4362 4365 4367 4369 4448 4450 4452
4454 4456 4458 4460 4462 4464 4466 4469 4472 4551 4554 4556 4558 4560
4562 4564 4566 4568 4571 4573 4575 4577 4579 4581 4583 4585 4588 4590
4592 4594 4596 4598 4600 4602 4605 4607 4609 4611 4613 4615 4617 4619
4622 4624 4626 4628 4630 4632 4634 4636 4639 4641 4643 4645 4647 4649
4651 4653 4656 4658 4660 4662 4664 4666 4668 4670 4673 4675 4677 4679
4681 4683 4685 4687 4690 4692 4694 4696 4698 4700 4702 4704 4707 4709
4711 4713 4715 4717 4719 4721 4724 4726 4728 4730 4732 4734 4736 4738
4741 4743 4745 4747 4749 4751 4753 4755 4758 4760 4762 4764 4766 4768
4770 4772 4774 4852 4854 4856 4858 4860 4862 4864 4866 4868 4870 4872
4874 4969 4971 4973 4975 4977 4979 4981 4983 4985 4988 4990 4992 4994
4996 4998 5000 5002 5004 5007 5009 5011 5013 5015 5017 5019 5021 5023
5026 5028 5030 5032 5034 5036 5038 5040 5042 5045 5047 5049 5051 5053
5055 5057 5059 5062 5173 5176 5179 5182 5193 5195 5198 5200 5202 5205
5207 5209 5212 5214 5216 5219 5221 5223 5226 5228 5230 5233 5235 5237
5240 5242 5244 5247 5249 5251 5254 5256 5258 5261 5263 5265 5268 5270
5272 5275 5277 5279 5282 5284 5286 5289 5291 5293 5296 5298 5300 5303
5305 5307 5310 5312 5314 5317 5319 5321 5324 5326 5328 5331 5333 5335
5338 5340 5342 5345 5347 5349 5352 5354 5356 5359 5361 5363 5366 5368
5370 5373 5375 5377 5380 5382 5385 5387 5389 5391 5393 5395 5397 5399
5401 5403 5405 5407 5409 5411 5413 5415 5417 5419 5421 5423 5425 5427
5429 5431 5433 5435 5520 5522 5524 5526 5528 5530 5532 5534 5536 5538
5541 5543 5545 5547 5549 5551 5553 5633 5635 5637 5639 5641 5643 5645
5647 5649 5651 5654 5656 5658 5660 5662 5664 5666 5668 5670 5672 5674
5676 5678 5680 5682 5684 5686 5688 5690 5692 5694 5696 5698 5700 5702
5704 5706 5708 5710 5712 5714 5716 5718 5720 5722 5724 5726 5728 5730
5732 5734 5736 5738 5740 5742 5744 5746 5748 5751 5753 5756 5758 5760
5762 5764 5766 5768 5770 5772 5774 5776 5778 5780 5782 5784 5786 5788
5790 5792 5794 5796 5798 5800 5802 5879 5881 5883 5885 5887 5889 5891
5893 5895 5897 5900 5902 5979 5981 5983 5985 5987 6065 6067 6069 6071
6073 6075 6078 6159 6161 6163 6165 6167 6169 6171 6173 6175 6178 6180
6182 6184 6187 6264 6266 6268 6270 6272 6274 6276 6278 6280 6282 6284 SEQ 0914
6286 6288 6290 6292 6294 6372 6374 6376 6378 6454 6456 6458 6460 6462
6464 6466 6468 6470 6472 6474 6476 6478 6480 6482 6484 6486 6488 6490
6492 6494 6496 6498 6500 6502 6504 6506 6508 6510 6512 6514 6516 6518
6520 6523 6526 6601 6603 6605 6607 6609 6611 6613 6615 6617 6619 6621
6623 6625 6627 6629 6631 6633 6635 6637 6639 6641 6643 6645 6647 6649
6651 6653 6655 6657 6659 6661 6663 6665 6668 6671 6745 6747 6749 6751
6753 6755 6757 6759 6761 6763 6765 6767 6769 6771 6773 6775 6777 6779
6781 6783 6785 6787 6789 6791 6793 6795 6797 6799 6801 6803 6805 6807
6809 6811 6813 6815 6817 6819 6821 6823 6825 6827 6829 6831 6833 6835
6837 6839 6841 6844 6847 6920 6922 6924 6926 6928 6930 6932 6934 6936
6938 6940 6942 6944 6946 6948 6950 6952 6954 6956 6958 6960 6962 6964
6966 6968 6970 6972 6974 6976 6978 6980 6982 6984 6986 6988 6990 6992
6994 6997 6999 7001
PNT4 7111
PNTMSG 7108
PUT 7123
RTN 111 131 184 255 280 366 391 489 514 613 638 754 779 845
870 936 961 1027 1052 1109 1134 1200 1225 1287 1312 1399 1424 1564
1589 1729 1754 1896 1921 2059 2084 2229 2254 2321 2346 2414 2439 2509
2534 2606 2631 2673 2712 2737 2814 2839 2937 2962 3024 3049 3112 3137
3212 3237 3440 3465 3549 3574 3662 3687 3774 3799 3877 3902 3990 4015
4096 4121 4195 4220 4303 4328 4409 4434 4512 4537 4813 4838 4927 4952
5121 5147 5169 5481 5506 5592 5617 5840 5865 5940 5965 6026 6051 6120
6145 6225 6250 6333 6358 6415 6440 6562 6587 6706 6731 6881 6906 7082
7096 7112 7122
SCOPER 104 273 384 507 631 772 863 954 1045 1127 1218 1305 1417 1582
1747 1914 2077 2247 2339 2432 2527 2624 2730 2832 2955 3042 3130 3230
3458 3567 3680 3792 3895 4008 4114 4213 4321 4427 4530 4831 4945 5140
5499 5610 5858 5958 6044 6138 6243 6351 6433 6580 6724 6899 7061 7076
STABLE 115 116 117 118 119 120 121 122 284 285 286 287 288 395
396 397 398 399 518 519 520 521 522 642 643 644 645 646
647 648 649 650 651 652 653 654 655 783 784 785 786 787
874 875 876 877 878 965 966 967 968 969 1056 1057 1138 1139
1229 1230 1316 1317 1428 1429 1593 1594 1758 1759 1925 1926 2088 2089
2258 2259 2350 2351 2443 2444 2538 2539 2635 2636 2741 2742 2843 2844
2966 2967 3053 3054 3141 3142 3241 3242 3469 3470 3578 3579 3691 3692
3803 3804 3906 3907 3908 3909 3910 4019 4020 4125 4126 4224 4225 4226
4332 4333 4438 4439 4541 4542 4842 4843 4956 4957 4958 4959 4960 5151
5152 5153 5154 5155 5156 5157 5158 5159 5510 5511 5621 5622 5869 5870
5969 5970 6055 6056 6149 6150 6254 6255 6362 6363 6444 6445 6591 6592
6735 6736 6910 6911
TMSGC 7108
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 1
DFPTA4 MAC 19-Jan-83 11:21 EBUS/MPROC 2901 Tests (Part 1) SEQ 0915
1 SUBTTL EBUS/MPROC 2901 Tests (Part 1)
2
3 SALL
4
5 SEARCH DFPTA,MONSYM
6
7 ; INTERN's
8
9 ENTRY TSTA1,TSTA2,TSTA3,TSTA4,TSTA5,TSTA6,TSTA7,TSTA10
10 ENTRY TSTA11,TSTA12,TSTA13,TSTA14,TSTA15,TSTA16,TSTA17,TSTA20
11 ENTRY TSTA21,TSTA22,TSTA23,TSTA24,TSTA25,TSTA26,TSTA27,TSTA30
12
13 ; EXTERN's
14
15 EXTERN TSTA31,TSTA32,TSTA33,TSTA34
16
17 ; EXTERN's located in DFPTA1.MAC (Mainline code..)
18
19 EXTERN TLOAD,TRACE,TSTSUB,BEXEC,BBPNT,CEBUF,AEBUF,SSPNT,SCOSW
20
21 ; EXTERN's located in DFPTAI.MAC (Port Device Handling Routines module)
22
23 EXTERN IPACLR
24
25 ; EXTERN's located in DFPTAU.MAC (Utility Routines module)
26
27 EXTERN SCOSW
28
29
30 ;#********************************************************************
31 ; Z4 - Address for use in DDT
32 ;#********************************************************************
33
34 000000' Z4: ; address of 00000'
35
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 2
DFPTA4 MAC 19-Jan-83 11:21 2901 Tests SEQ 0916
36 SUBTTL 2901 Tests
37
38 ;#********************************************************************
39 ; These tests do arithmetic and logical operations using the 2901's
40 ; exclusively, not using the D inputs or relying on any logic to gate
41 ; data onto the MBus and then into the 2901's. These tests move data
42 ; around in the internal registers of the 2901's to accomplish their
43 ; testing, and data is gated into the EBUF for verification.
44 ;#********************************************************************
45
46 ;#********************************************************************
47 ;* Test 1 - 2901 0's Test
48 ;
49 ; Description: Verify that xx AND 0's ==> 0's. The source inputs
50 ; specified are any in the form xx and 0. The
51 ; destinations are any specifying that the Y output
52 ; is put on the MBUS which is then gated into the
53 ; EBUF and verified. The function used is AND
54 ; except for one combination using NAND which is
55 ; equivalent.
56 ;
57 ; Procedure: Clear Port
58 ; Load microcode
59 ;
60 ; Repeat for locations 0-42:
61 ;
62 ; Execute a microinstruction (JMAP)
63 ; Read EBUF
64 ; Verify data is correct (0's)
65 ;
66 ; Failure: ---
67 ;#********************************************************************
68
69 ; Test data
70
71 000000' 254 00 0 00 000011' TSTA1: JRST TG1 ; go start test
72 000001' 420402 000001 EBUS!ALU!NDMP!ZALU!1 ; test mask
73 000002' 000144' 006615' T1M,,[ASCIZ ^2901 0's Test^]
74 000003' 006620' 000000 [EXP MLAST!E23],,0
75 000004' 000000 000253' TSTA2 ; failure test table
76 000005' 000000 000636' TSTA3 ; ...
77 000006' 000000 000720' TSTA4
78 000007' 000000 000773' TSTA5
79 000010' 777777 777777 -1
80
81 ; Start test
82
83 000011' 201 00 0 00 000000' TG1: MOVEI Z4 ; get address of module start
84 000012' 260 17 0 00 000000* GO TRACE ; handle trace output
85 000013' 201 01 0 00 000144' MOVEI 1,T1M ; set up microcode address
86 000014' 260 17 0 00 000000* GO TLOAD ; load/verify it
87 000015' 263 17 0 00 000000 RTN ; failed - exit test
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 3
DFPTA4 MAC 19-Jan-83 11:21 2901 Tests SEQ 0917
88
89 ; Initialization
90
91 000016' 400 15 0 00 000000 TL1: SETZ ERFLG, ; clear error flag
92 000017' 260 17 0 00 000000* GO IPACLR ; clear port
93 000020' 402 00 0 00 000000* SETZM TSTSUB ; initialize subtest number
94 000021' 201 06 0 00 000033' MOVEI 6,TS1 ; get sstep table address
95
96 ; Loop on single step table entries
97
98 000022' 260 17 0 00 000000* TA1: GO BEXEC ; execute table entry
99 000023' 254 00 0 00 000032' JRST TX1 ; end of sstep table
100 000024' 254 00 0 00 000022' JRST TA1 ; keep looping after call
101 000025' 474 15 0 00 000000 SETO ERFLG, ; error - EBUF contents incorrect
102
103 ; Handle error printouts and scope looping
104
105 000026' 027 00 0 00 000142' SCOPER MA1 ; print error message
106 000027' 254 00 0 00 000016' JRST TL1 ; loop on error
107 000030' 254 00 0 00 000032' JRST TX1 ; altmode exit
108 000031' 322 15 0 00 000022' JUMPE ERFLG,TA1 ; do next sstep table entry
109
110 ; End of test
111
112 000032' 263 17 0 00 000000 TX1: RTN ; return
113
114 ; Sstep table, with EBUF data, as: (CMD,#Steps,Start addr,End Addr,EBUF data)
115
116 000033' 100100 000000 TS1: ATABLE (SSSTRT,1,0,0,0)
117 000034' 000000 000000
118 000035' 100100 010001 ATABLE (SSSTRT,1,1,1,0)
119 000036' 000000 000000
120 000037' 100100 020002 ATABLE (SSSTRT,1,2,2,0)
121 000040' 000000 000000
122 000041' 100100 030003 ATABLE (SSSTRT,1,3,3,0)
123 000042' 000000 000000
124 000043' 100100 040004 ATABLE (SSSTRT,1,4,4,0)
125 000044' 000000 000000
126 000045' 100100 050005 ATABLE (SSSTRT,1,5,5,0)
127 000046' 000000 000000
128 000047' 100100 060006 ATABLE (SSSTRT,1,6,6,0)
129 000050' 000000 000000
130 000051' 100100 070007 ATABLE (SSSTRT,1,7,7,0)
131 000052' 000000 000000
132 000053' 100100 100010 ATABLE (SSSTRT,1,10,10,0)
133 000054' 000000 000000
134 000055' 100100 110011 ATABLE (SSSTRT,1,11,11,0)
135 000056' 000000 000000
136 000057' 100100 120012 ATABLE (SSSTRT,1,12,12,0)
137 000060' 000000 000000
138 000061' 100100 130013 ATABLE (SSSTRT,1,13,13,0)
139 000062' 000000 000000
140 000063' 100100 140014 ATABLE (SSSTRT,1,14,14,0)
141 000064' 000000 000000
142 000065' 100100 150015 ATABLE (SSSTRT,1,15,15,0)
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 3-1
DFPTA4 MAC 19-Jan-83 11:21 2901 Tests SEQ 0918
143 000066' 000000 000000
144 000067' 100100 160016 ATABLE (SSSTRT,1,16,16,0)
145 000070' 000000 000000
146 000071' 100100 170017 ATABLE (SSSTRT,1,17,17,0)
147 000072' 000000 000000
148 000073' 100100 200020 ATABLE (SSSTRT,1,20,20,0)
149 000074' 000000 000000
150 000075' 100100 210021 ATABLE (SSSTRT,1,21,21,0)
151 000076' 000000 000000
152 000077' 100100 220022 ATABLE (SSSTRT,1,22,22,0)
153 000100' 000000 000000
154 000101' 100100 230023 ATABLE (SSSTRT,1,23,23,0)
155 000102' 000000 000000
156 000103' 100100 240024 ATABLE (SSSTRT,1,24,24,0)
157 000104' 000000 000000
158 000105' 100100 250025 ATABLE (SSSTRT,1,25,25,0)
159 000106' 000000 000000
160 000107' 100100 260026 ATABLE (SSSTRT,1,26,26,0)
161 000110' 000000 000000
162 000111' 100100 270027 ATABLE (SSSTRT,1,27,27,0)
163 000112' 000000 000000
164 000113' 100100 300030 ATABLE (SSSTRT,1,30,30,0)
165 000114' 000000 000000
166 000115' 100100 310031 ATABLE (SSSTRT,1,31,31,0)
167 000116' 000000 000000
168 000117' 100100 320032 ATABLE (SSSTRT,1,32,32,0)
169 000120' 000000 000000
170 000121' 100100 330033 ATABLE (SSSTRT,1,33,33,0)
171 000122' 000000 000000
172 000123' 100100 340034 ATABLE (SSSTRT,1,34,34,0)
173 000124' 000000 000000
174 000125' 100100 350035 ATABLE (SSSTRT,1,35,35,0)
175 000126' 000000 000000
176 000127' 100100 360036 ATABLE (SSSTRT,1,36,36,0)
177 000130' 000000 000000
178 000131' 100100 370037 ATABLE (SSSTRT,1,37,37,0)
179 000132' 000000 000000
180 000133' 100100 400040 ATABLE (SSSTRT,1,40,40,0)
181 000134' 000000 000000
182 000135' 100100 410041 ATABLE (SSSTRT,1,41,41,0)
183 000136' 000000 000000
184 000137' 100100 420042 ATABLE (SSSTRT,1,42,42,0)
185 000140' 000000 000000
186 000141' 000000 000000 ATABLE (SSLAST)
187
188 ; Error messages
189
190 000142' 140000 006621' MA1: MSG!TXNOT![ASCIZ /Can't generate 0's out of the 2901's (result in EBUF)/]
191 000143' 000000000000# LAST!CALL!TXALL!BBPNT ; print sequencer data
192
193 ; Microcode:
194
195 ; AND with Destination 0
196
197 000144' 000000 002004 T1M: MWORD <ADDR=0,JMAP,J=0,SD0,AND,D=0,OENA,SELE,MGC=4> ; 0
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 3-2
DFPTA4 MAC 19-Jan-83 11:21 2901 Tests SEQ 0919
198 000145' 740000 005040
199 000146' 000100 012004 MWORD <JMAP,J=1,S0Q,AND,D=0,OENA,SELE,MGC=4> ; 1
200 000147' 240000 005040
201 000150' 000200 022004 MWORD <JMAP,J=2,S0B,AND,D=0,OENA,SELE,MGC=4> ; 2
202 000151' 340000 005040
203 000152' 000300 032004 MWORD <JMAP,J=3,S0A,AND,D=0,OENA,SELE,MGC=4> ; 3
204 000153' 440000 005040
205
206 ; AND with Destination 1
207
208 000154' 000400 042004 MWORD <JMAP,J=4,SD0,AND,D=1,OENA,SELE,MGC=4> ; 4
209 000155' 741000 005040
210 000156' 000500 052004 MWORD <JMAP,J=5,S0Q,AND,D=1,OENA,SELE,MGC=4> ; 5
211 000157' 241000 005040
212 000160' 000600 062004 MWORD <JMAP,J=6,S0B,AND,D=1,OENA,SELE,MGC=4> ; 6
213 000161' 341000 005040
214 000162' 000700 072004 MWORD <JMAP,J=7,S0A,AND,D=1,OENA,SELE,MGC=4> ; 7
215 000163' 441000 005040
216
217 ; AND with Destination 3
218
219 000164' 001000 102004 MWORD <JMAP,J=10,SD0,AND,D=3,OENA,SELE,MGC=4> ; 10
220 000165' 743000 005040
221 000166' 001100 112004 MWORD <JMAP,J=11,S0Q,AND,D=3,OENA,SELE,MGC=4> ; 11
222 000167' 243000 005040
223 000170' 001200 122004 MWORD <JMAP,J=12,S0B,AND,D=3,OENA,SELE,MGC=4> ; 12
224 000171' 343000 005040
225 000172' 001300 132004 MWORD <JMAP,J=13,S0A,AND,D=3,OENA,SELE,MGC=4> ; 13
226 000173' 443000 005040
227
228 ; AND with Destination 4
229
230 000174' 001400 142004 MWORD <JMAP,J=14,SD0,AND,D=4,OENA,SELE,MGC=4> ; 14
231 000175' 744000 005040
232 000176' 001500 152004 MWORD <JMAP,J=15,S0Q,AND,D=4,OENA,SELE,MGC=4> ; 15
233 000177' 244000 005040
234 000200' 001600 162004 MWORD <JMAP,J=16,S0B,AND,D=4,OENA,SELE,MGC=4> ; 16
235 000201' 344000 005040
236 000202' 001700 172004 MWORD <JMAP,J=17,S0A,AND,D=4,OENA,SELE,MGC=4> ; 17
237 000203' 444000 005040
238
239 ; AND with Destination 5
240
241 000204' 002000 202004 MWORD <JMAP,J=20,SD0,AND,D=5,OENA,SELE,MGC=4> ; 20
242 000205' 745000 005040
243 000206' 002100 212004 MWORD <JMAP,J=21,S0Q,AND,D=5,OENA,SELE,MGC=4> ; 21
244 000207' 245000 005040
245 000210' 002200 222004 MWORD <JMAP,J=22,S0B,AND,D=5,OENA,SELE,MGC=4> ; 22
246 000211' 345000 005040
247 000212' 002300 232004 MWORD <JMAP,J=23,S0A,AND,D=5,OENA,SELE,MGC=4> ; 23
248 000213' 445000 005040
249
250 ; AND with Destination 6
251
252 000214' 002400 242004 MWORD <JMAP,J=24,SD0,AND,D=6,OENA,SELE,MGC=4> ; 24
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 3-3
DFPTA4 MAC 19-Jan-83 11:21 2901 Tests SEQ 0920
253 000215' 746000 005040
254 000216' 002500 252004 MWORD <JMAP,J=25,S0Q,AND,D=6,OENA,SELE,MGC=4> ; 25
255 000217' 246000 005040
256 000220' 002600 262004 MWORD <JMAP,J=26,S0B,AND,D=6,OENA,SELE,MGC=4> ; 26
257 000221' 346000 005040
258 000222' 002700 272004 MWORD <JMAP,J=27,S0A,AND,D=6,OENA,SELE,MGC=4> ; 27
259 000223' 446000 005040
260
261 ; AND with Destination 7
262
263 000224' 003000 302004 MWORD <JMAP,J=30,SD0,AND,D=7,OENA,SELE,MGC=4> ; 30
264 000225' 747000 005040
265 000226' 003100 312004 MWORD <JMAP,J=31,S0Q,AND,D=7,OENA,SELE,MGC=4> ; 31
266 000227' 247000 005040
267 000230' 003200 322004 MWORD <JMAP,J=32,S0B,AND,D=7,OENA,SELE,MGC=4> ; 32
268 000231' 347000 005040
269 000232' 003300 332004 MWORD <JMAP,J=33,S0A,AND,D=7,OENA,SELE,MGC=4> ; 33
270 000233' 447000 005040
271
272 ; NAND with Destination 0,1,3,4,5,6,7
273
274 000234' 003400 342004 MWORD <JMAP,J=34,SD0,NAND,D=0,OENA,SELE,MGC=4> ; 34
275 000235' 750000 005040
276 000236' 003500 352004 MWORD <JMAP,J=35,SD0,NAND,D=1,OENA,SELE,MGC=4> ; 35
277 000237' 751000 005040
278 000240' 003600 362004 MWORD <JMAP,J=36,SD0,NAND,D=3,OENA,SELE,MGC=4> ; 36
279 000241' 753000 005040
280 000242' 003700 372004 MWORD <JMAP,J=37,SD0,NAND,D=4,OENA,SELE,MGC=4> ; 37
281 000243' 754000 005040
282 000244' 004000 402004 MWORD <JMAP,J=40,SD0,NAND,D=5,OENA,SELE,MGC=4> ; 40
283 000245' 755000 005040
284 000246' 004100 412004 MWORD <JMAP,J=41,SD0,NAND,D=6,OENA,SELE,MGC=4> ; 41
285 000247' 756000 005040
286 000250' 004200 422004 MWORD <JMAP,J=42,SD0,NAND,D=7,OENA,SELE,MGC=4> ; 42
287 000251' 757000 005040
288 000252' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 4
DFPTA4 MAC 19-Jan-83 11:21 2901 Tests SEQ 0921
289
290 ;#********************************************************************
291 ;* Test 2 - 2901 1's Test
292 ;
293 ; Description: Verify that 1's can be gated out of the 2901s.
294 ; The 1's are produced by executing pairs of micro-
295 ; instructions. The destinations are any specifying
296 ; that the Y output is put on the MBUS which is
297 ; then gated into the EBUF and verified. The
298 ; functions used are XNOR, R-S, S-R, and OR.
299 ;
300 ; Procedure: Clear Port
301 ; Load microcode
302 ;
303 ; Repeat for locations 0-157 step 2:
304 ;
305 ; Execute 2 microinstructions (JMAP,JMAP)
306 ; Read EBUF
307 ; Verify data is correct (1's)
308 ;
309 ; Failure: ---
310 ;#********************************************************************
311
312 ; Test data
313
314 000253' 254 00 0 00 000264' TSTA2: JRST TG2 ; go start test
315 000254' 420402 000002 EBUS!ALU!NDMP!ZALU!2 ; test mask
316 000255' 000331' 006634' T2M,,[ASCIZ ^2901 1's Test^]
317 000256' 006620' 000000 [EXP MLAST!E23],,0
318 000257' 000000 000636' TSTA3 ; failure test table
319 000260' 000000 000720' TSTA4 ; ...
320 000261' 000000 000773' TSTA5
321 000262' 000000 001046' TSTA6
322 000263' 777777 777777 -1
323
324 ; Start test
325
326 000264' 201 00 0 00 000000' TG2: MOVEI Z4 ; get address of module start
327 000265' 260 17 0 00 000012* GO TRACE ; handle trace output
328 000266' 201 01 0 00 000331' MOVEI 1,T2M ; set up microcode address
329 000267' 260 17 0 00 000014* GO TLOAD ; load/verify it
330 000270' 263 17 0 00 000000 RTN ; failed - exit test
331
332 ; Initialization
333
334 000271' 400 15 0 00 000000 TL2: SETZ ERFLG, ; clear error flag
335 000272' 260 17 0 00 000017* GO IPACLR ; clear port
336 000273' 402 00 0 00 000020* SETZM TSTSUB ; initialize subtest number
337 000274' 201 06 0 00 000306' MOVEI 6,TS2 ; get sstep table address
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 5
DFPTA4 MAC 19-Jan-83 11:21 2901 Tests SEQ 0922
338
339 ; Loop on single step table entries
340
341 000275' 260 17 0 00 000022* TA2: GO BEXEC ; execute table entry
342 000276' 254 00 0 00 000305' JRST TX2 ; end of sstep table
343 000277' 254 00 0 00 000275' JRST TA2 ; keep looping after call
344 000300' 474 15 0 00 000000 SETO ERFLG, ; error - EBUF data incorrect
345
346 ; Handle error printouts and scope looping
347
348 000301' 027 00 0 00 000327' SCOPER MA2 ; print error message
349 000302' 254 00 0 00 000271' JRST TL2 ; loop on error
350 000303' 254 00 0 00 000305' JRST TX2 ; altmode exit
351 000304' 322 15 0 00 000275' JUMPE ERFLG,TA2 ; do next sstep table entry
352
353 ; End of test
354
355 000305' 263 17 0 00 000000 TX2: RTN ; return
356
357 ; Sstep table, with EBUF data, as: (CMD,#Steps,Start addr,End Addr,EBUF data)
358
359 000306' 300000 000314' TS2: ATABLE (SSCALL,TS2INI) ; initialize test parameters
360 000307' 400000 000316' TS2L: ATABLE (SSCHK,TS2SET) ; set up single step parameters
361 000310' 100200 000000 ATABLE (SSSTRT,2,0,0,-1) ; do 2 single steps/check results
362 000311' 777777 777777
363 000312' 500000 000307' ATABLE (SSJRST,TS2L) ; do next address
364 000313' 000000 000000 ATABLE (SSLAST) ; end of table
365
366 ; Special routines
367
368 000314' 474 07 0 00 777777 TS2INI: SETO 7,-1 ; initialize address
369 000315' 263 17 0 00 000000 RTN ; return
370
371 000316' 350 00 0 00 000007 TS2SET: AOS 7 ; point to initial address
372 000317' 307 07 0 00 000141 CAIG 7,141 ; done yet?
373 000320' 350 00 0 17 000000 AOS (P) ; no - set up RTN+2
374 000321' 200 01 0 06 000000 MOVE 1,(6) ; get table entry
375 000322' 137 07 0 00 006637' DPB 7,[POINT 12,1,23] ; save initial address
376 000323' 350 00 0 00 000007 AOS 7 ; point to final address
377 000324' 137 07 0 00 006640' DPB 7,[POINT 12,1,35] ; save final address
378 000325' 202 01 0 06 000000 MOVEM 1,(6) ; save it
379 000326' 263 17 0 00 000000 RTN ; return
380
381 ; Error messages
382
383 000327' 140000 006641' MA2: MSG!TXNOT![ASCIZ /Can't generate 1's out of the 2901's (result in EBUF)/]
384 000330' 000000000000# LAST!CALL!TXALL!BBPNT ; print sequencer data
385
386 ; Microcode:
387
388 ; Source 0Q / XNOR / Destination 0
389
390 000331' 000000 010000 T2M: MWORD <ADDR=0,JMAP,J=1,S0Q,XNOR,D=2> ; 0
391 000332' 272000 000040
392 000333' 000100 012004 MWORD <JMAP,J=1,SAQ,OR,D=0,OENA,SELE,MGC=4> ; 1
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 5-1
DFPTA4 MAC 19-Jan-83 11:21 2901 Tests SEQ 0923
393 000334' 030000 005040
394 000335' 000200 030000 MWORD <JMAP,J=3,S0Q,XNOR,D=3> ; 2
395 000336' 273000 000040
396 000337' 000300 032004 MWORD <JMAP,J=3,SAQ,OR,D=0,OENA,SELE,MGC=4> ; 3
397 000340' 030000 005040
398
399 ; Source 0Q / XNOR / Destination 1
400
401 000341' 000400 050000 MWORD <JMAP,J=5,S0Q,XNOR,D=2> ; 4
402 000342' 272000 000040
403 000343' 000500 052004 MWORD <JMAP,J=5,SAQ,OR,D=1,OENA,SELE,MGC=4> ; 5
404 000344' 031000 005040
405 000345' 000600 070000 MWORD <JMAP,J=7,S0Q,XNOR,D=3> ; 6
406 000346' 273000 000040
407 000347' 000700 072004 MWORD <JMAP,J=7,SAQ,OR,D=1,OENA,SELE,MGC=4> ; 7
408 000350' 031000 005040
409
410 ; Source 0Q / XNOR / Destination 2
411
412 000351' 001000 110000 MWORD <JMAP,J=11,S0Q,XNOR,D=2> ; 10
413 000352' 272000 000040
414 000353' 001100 112004 MWORD <JMAP,J=11,SAQ,OR,D=3,OENA,SELE,MGC=4> ; 11
415 000354' 033000 005040
416 000355' 001200 130000 MWORD <JMAP,J=13,S0Q,XNOR,D=3> ; 12
417 000356' 273000 000040
418 000357' 001300 132004 MWORD <JMAP,J=13,SAQ,OR,D=3,OENA,SELE,MGC=4> ; 13
419 000360' 033000 005040
420
421 ; Source 0Q / XNOR / Destination 4
422
423 000361' 001400 150000 MWORD <JMAP,J=15,S0Q,XNOR,D=2> ; 14
424 000362' 272000 000040
425 000363' 001500 152004 MWORD <JMAP,J=15,SAQ,OR,D=4,OENA,SELE,MGC=4> ; 15
426 000364' 034000 005040
427 000365' 001600 170000 MWORD <JMAP,J=17,S0Q,XNOR,D=3> ; 16
428 000366' 273000 000040
429 000367' 001700 172004 MWORD <JMAP,J=17,SAQ,OR,D=4,OENA,SELE,MGC=4> ; 17
430 000370' 034000 005040
431
432 ; Source 0Q / XNOR / Destination 5
433
434 000371' 002000 210000 MWORD <JMAP,J=21,S0Q,XNOR,D=2> ; 20
435 000372' 272000 000040
436 000373' 002100 212004 MWORD <JMAP,J=21,SAQ,OR,D=5,OENA,SELE,MGC=4> ; 21
437 000374' 035000 005040
438 000375' 002200 230000 MWORD <JMAP,J=23,S0Q,XNOR,D=3> ; 22
439 000376' 273000 000040
440 000377' 002300 232004 MWORD <JMAP,J=23,SAQ,OR,D=5,OENA,SELE,MGC=4> ; 23
441 000400' 035000 005040
442
443 ; Source 0Q / XNOR / Destination 6
444
445 000401' 002400 250000 MWORD <JMAP,J=25,S0Q,XNOR,D=2> ; 24
446 000402' 272000 000040
447 000403' 002500 252004 MWORD <JMAP,J=25,SAQ,OR,D=6,OENA,SELE,MGC=4> ; 25
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 5-2
DFPTA4 MAC 19-Jan-83 11:21 2901 Tests SEQ 0924
448 000404' 036000 005040
449 000405' 002600 270000 MWORD <JMAP,J=27,S0Q,XNOR,D=3> ; 26
450 000406' 273000 000040
451 000407' 002700 272004 MWORD <JMAP,J=27,SAQ,OR,D=6,OENA,SELE,MGC=4> ; 27
452 000410' 036000 005040
453
454 ; Source 0Q / XNOR / Destination 7
455
456 000411' 003000 310000 MWORD <JMAP,J=31,S0Q,XNOR,D=2> ; 30
457 000412' 272000 000040
458 000413' 003100 312004 MWORD <JMAP,J=31,SAQ,OR,D=7,OENA,SELE,MGC=4> ; 31
459 000414' 037000 005040
460 000415' 003200 330000 MWORD <JMAP,J=33,S0Q,XNOR,D=3> ; 32
461 000416' 273000 000040
462 000417' 003300 332004 MWORD <JMAP,J=33,SAQ,OR,D=7,OENA,SELE,MGC=4> ; 33
463 000420' 037000 005040
464
465 ; Source 0A / XNOR / Destination 0,1,3,4,5,6,7
466
467 000421' 003400 350000 MWORD <JMAP,J=35,S0A,XNOR,D=0> ; 34
468 000422' 470000 000040
469 000423' 003500 352004 MWORD <JMAP,J=35,SAQ,OR,D=0,OENA,SELE,MGC=4> ; 35
470 000424' 030000 005040
471 000425' 003600 370000 MWORD <JMAP,J=37,S0A,XNOR,D=0> ; 36
472 000426' 470000 000040
473 000427' 003700 372004 MWORD <JMAP,J=37,SAQ,OR,D=1,OENA,SELE,MGC=4> ; 37
474 000430' 031000 005040
475 000431' 004000 410000 MWORD <JMAP,J=41,S0A,XNOR,D=0> ; 40
476 000432' 470000 000040
477 000433' 004100 412004 MWORD <JMAP,J=41,SAQ,OR,D=3,OENA,SELE,MGC=4> ; 41
478 000434' 033000 005040
479 000435' 004200 430000 MWORD <JMAP,J=43,S0A,XNOR,D=0> ; 42
480 000436' 470000 000040
481 000437' 004300 432004 MWORD <JMAP,J=43,SAQ,OR,D=4,OENA,SELE,MGC=4> ; 43
482 000440' 034000 005040
483 000441' 004400 450000 MWORD <JMAP,J=45,S0A,XNOR,D=0> ; 44
484 000442' 470000 000040
485 000443' 004500 452004 MWORD <JMAP,J=45,SAQ,OR,D=5,OENA,SELE,MGC=4> ; 45
486 000444' 035000 005040
487 000445' 004600 470000 MWORD <JMAP,J=47,S0A,XNOR,D=0> ; 46
488 000446' 470000 000040
489 000447' 004700 472004 MWORD <JMAP,J=47,SAQ,OR,D=6,OENA,SELE,MGC=4> ; 47
490 000450' 036000 005040
491 000451' 005000 510000 MWORD <JMAP,J=51,S0A,XNOR,D=0> ; 50
492 000452' 470000 000040
493 000453' 005100 512004 MWORD <JMAP,J=51,SAQ,OR,D=7,OENA,SELE,MGC=4> ; 51
494 000454' 037000 005040
495
496 ; Source 0Q / RMIN / Destination 0
497
498 000455' 005200 530000 MWORD <JMAP,J=53,S0Q,RMIN,D=2> ; 52
499 000456' 222000 000040
500 000457' 005300 532004 MWORD <JMAP,J=53,SAQ,OR,D=0,OENA,SELE,MGC=4> ; 53
501 000460' 030000 005040
502 000461' 005400 550000 MWORD <JMAP,J=55,S0Q,RMIN,D=3> ; 54
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 5-3
DFPTA4 MAC 19-Jan-83 11:21 2901 Tests SEQ 0925
503 000462' 223000 000040
504 000463' 005500 552004 MWORD <JMAP,J=55,SAQ,OR,D=0,OENA,SELE,MGC=4> ; 55
505 000464' 030000 005040
506
507 ; Source 0Q / RMIN / Destination 2
508
509 000465' 005600 570000 MWORD <JMAP,J=57,S0Q,RMIN,D=2> ; 56
510 000466' 222000 000040
511 000467' 005700 572004 MWORD <JMAP,J=57,SAQ,OR,D=1,OENA,SELE,MGC=4> ; 57
512 000470' 031000 005040
513 000471' 006000 610000 MWORD <JMAP,J=61,S0Q,RMIN,D=3> ; 60
514 000472' 223000 000040
515 000473' 006100 612004 MWORD <JMAP,J=61,SAQ,OR,D=1,OENA,SELE,MGC=4> ; 61
516 000474' 031000 005040
517
518 ; Source 0Q / RMIN / Destination 3
519
520 000475' 006200 630000 MWORD <JMAP,J=63,S0Q,RMIN,D=2> ; 62
521 000476' 222000 000040
522 000477' 006300 632004 MWORD <JMAP,J=63,SAQ,OR,D=3,OENA,SELE,MGC=4> ; 63
523 000500' 033000 005040
524 000501' 006400 650000 MWORD <JMAP,J=65,S0Q,RMIN,D=3> ; 64
525 000502' 223000 000040
526 000503' 006500 652004 MWORD <JMAP,J=65,SAQ,OR,D=3,OENA,SELE,MGC=4> ; 65
527 000504' 033000 005040
528
529 ; Source 0Q / RMIN / Destination 4
530
531 000505' 006600 670000 MWORD <JMAP,J=67,S0Q,RMIN,D=2> ; 66
532 000506' 222000 000040
533 000507' 006700 672004 MWORD <JMAP,J=67,SAQ,OR,D=4,OENA,SELE,MGC=4> ; 67
534 000510' 034000 005040
535 000511' 007000 710000 MWORD <JMAP,J=71,S0Q,RMIN,D=3> ; 70
536 000512' 223000 000040
537 000513' 007100 712004 MWORD <JMAP,J=71,SAQ,OR,D=4,OENA,SELE,MGC=4> ; 71
538 000514' 034000 005040
539
540 ; Source 0Q / RMIN / Destination 5
541
542 000515' 007200 730000 MWORD <JMAP,J=73,S0Q,RMIN,D=2> ; 72
543 000516' 222000 000040
544 000517' 007300 732004 MWORD <JMAP,J=73,SAQ,OR,D=5,OENA,SELE,MGC=4> ; 73
545 000520' 035000 005040
546 000521' 007400 750000 MWORD <JMAP,J=75,S0Q,RMIN,D=3> ; 74
547 000522' 223000 000040
548 000523' 007500 752004 MWORD <JMAP,J=75,SAQ,OR,D=5,OENA,SELE,MGC=4> ; 75
549 000524' 035000 005040
550
551 ; Source 0Q / RMIN / Destination 6
552
553 000525' 007600 770000 MWORD <JMAP,J=77,S0Q,RMIN,D=2> ; 76
554 000526' 222000 000040
555 000527' 007700 772004 MWORD <JMAP,J=77,SAQ,OR,D=6,OENA,SELE,MGC=4> ; 77
556 000530' 036000 005040
557 000531' 010001 010000 MWORD <JMAP,J=101,S0Q,RMIN,D=3> ; 100
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 5-4
DFPTA4 MAC 19-Jan-83 11:21 2901 Tests SEQ 0926
558 000532' 223000 000040
559 000533' 010101 012004 MWORD <JMAP,J=101,SAQ,OR,D=6,OENA,SELE,MGC=4> ; 101
560 000534' 036000 005040
561
562 ; Source 0Q / RMIN / Destination 7
563
564 000535' 010201 030000 MWORD <JMAP,J=103,S0Q,RMIN,D=2> ; 102
565 000536' 222000 000040
566 000537' 010301 032004 MWORD <JMAP,J=103,SAQ,OR,D=7,OENA,SELE,MGC=4> ; 103
567 000540' 037000 005040
568 000541' 010401 050000 MWORD <JMAP,J=105,S0Q,RMIN,D=3> ; 104
569 000542' 223000 000040
570 000543' 010501 052004 MWORD <JMAP,J=105,SAQ,OR,D=7,OENA,SELE,MGC=4> ; 105
571 000544' 037000 005040
572
573 ; Source 0A / RMIN / Destination 0,1,3,4,5,6,7
574
575 000545' 010601 070000 MWORD <JMAP,J=107,S0A,RMIN,D=0> ; 106
576 000546' 420000 000040
577 000547' 010701 072004 MWORD <JMAP,J=107,SAQ,OR,D=0,OENA,SELE,MGC=4> ; 107
578 000550' 030000 005040
579 000551' 011001 110000 MWORD <JMAP,J=111,S0A,RMIN,D=0> ; 110
580 000552' 420000 000040
581 000553' 011101 112004 MWORD <JMAP,J=111,SAQ,OR,D=1,OENA,SELE,MGC=4> ; 111
582 000554' 031000 005040
583 000555' 011201 130000 MWORD <JMAP,J=113,S0A,RMIN,D=0> ; 112
584 000556' 420000 000040
585 000557' 011301 132004 MWORD <JMAP,J=113,SAQ,OR,D=3,OENA,SELE,MGC=4> ; 113
586 000560' 033000 005040
587 000561' 011401 150000 MWORD <JMAP,J=115,S0A,RMIN,D=0> ; 114
588 000562' 420000 000040
589 000563' 011501 152004 MWORD <JMAP,J=115,SAQ,OR,D=4,OENA,SELE,MGC=4> ; 115
590 000564' 034000 005040
591 000565' 011601 170000 MWORD <JMAP,J=117,S0A,RMIN,D=0> ; 116
592 000566' 420000 000040
593 000567' 011701 172004 MWORD <JMAP,J=117,SAQ,OR,D=5,OENA,SELE,MGC=4> ; 117
594 000570' 035000 005040
595 000571' 012001 210000 MWORD <JMAP,J=121,S0A,RMIN,D=0> ; 120
596 000572' 420000 000040
597 000573' 012101 212004 MWORD <JMAP,J=121,SAQ,OR,D=6,OENA,SELE,MGC=4> ; 121
598 000574' 036000 005040
599 000575' 012201 230000 MWORD <JMAP,J=123,S0A,RMIN,D=0> ; 122
600 000576' 420000 000040
601 000577' 012301 232004 MWORD <JMAP,J=123,SAQ,OR,D=7,OENA,SELE,MGC=4> ; 123
602 000600' 037000 005040
603
604 ; Source 0B / RMIN / Destination 0,1,3,4,5,6,7
605
606 000601' 012401 250000 MWORD <JMAP,J=125,S0B,RMIN,D=0> ; 124
607 000602' 320000 000040
608 000603' 012501 252004 MWORD <JMAP,J=125,SAQ,OR,D=0,OENA,SELE,MGC=4> ; 125
609 000604' 030000 005040
610 000605' 012601 270000 MWORD <JMAP,J=127,S0B,RMIN,D=0> ; 126
611 000606' 320000 000040
612 000607' 012701 272004 MWORD <JMAP,J=127,SAQ,OR,D=1,OENA,SELE,MGC=4> ; 127
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 5-5
DFPTA4 MAC 19-Jan-83 11:21 2901 Tests SEQ 0927
613 000610' 031000 005040
614 000611' 013001 310000 MWORD <JMAP,J=131,S0B,RMIN,D=0> ; 130
615 000612' 320000 000040
616 000613' 013101 312004 MWORD <JMAP,J=131,SAQ,OR,D=3,OENA,SELE,MGC=4> ; 131
617 000614' 033000 005040
618 000615' 013201 330000 MWORD <JMAP,J=133,S0B,RMIN,D=0> ; 132
619 000616' 320000 000040
620 000617' 013301 332004 MWORD <JMAP,J=133,SAQ,OR,D=4,OENA,SELE,MGC=4> ; 133
621 000620' 034000 005040
622 000621' 013401 350000 MWORD <JMAP,J=135,S0B,RMIN,D=0> ; 134
623 000622' 320000 000040
624 000623' 013501 352004 MWORD <JMAP,J=135,SAQ,OR,D=5,OENA,SELE,MGC=4> ; 135
625 000624' 035000 005040
626 000625' 013601 370000 MWORD <JMAP,J=137,S0B,RMIN,D=0> ; 136
627 000626' 320000 000040
628 000627' 013701 372004 MWORD <JMAP,J=137,SAQ,OR,D=6,OENA,SELE,MGC=4> ; 137
629 000630' 036000 005040
630 000631' 014001 410000 MWORD <JMAP,J=141,S0B,RMIN,D=0> ; 140
631 000632' 320000 000040
632 000633' 014101 412004 MWORD <JMAP,J=141,SAQ,OR,D=7,OENA,SELE,MGC=4> ; 141
633 000634' 037000 005040
634 000635' 777777 777777 -1
635
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 6
DFPTA4 MAC 19-Jan-83 11:21 2901 Boolean Tests (Direct Input/0) SEQ 0928
636 SUBTTL 2901 Boolean Tests (Direct Input/0)
637
638 ;#********************************************************************
639 ; These tests do the most basic testing of the 2901's. Data is gated
640 ; from the D inputs into the ALU. An operation is then performed on the
641 ; data and zero, and the result put on the Y outputs. If these tests
642 ; work there is some confidence in the data path of the direct input and
643 ; output. Further tests can then test the 16 RAM locations and ALU and
644 ; destination control. And further tests can then verify the Q register
645 ; and data shifting.
646 ;#********************************************************************
647
648 ;#********************************************************************
649 ;* Test 3 - 2901 OR Test - D OR 0
650 ;
651 ; Description: Verify that 1's OR 0's ==> 1's
652 ; Verify that 0's OR 0's ==> 0's
653 ;
654 ; Procedure: Clear Port
655 ; Load microcode
656 ;
657 ; Set RAR to 0
658 ; Execute JMAP,JMAP
659 ; Read EBUF, verify data is 777400,,001777
660 ; (middle 16 bits are indeterminate)
661 ;
662 ; Set RAR to 2
663 ; Execute JMAP,JMAP
664 ; Read EBUF, verify data is 000000,,000000
665 ; (middle 16 bits are indeterminate)
666 ;
667 ; Failure: ---
668 ;#********************************************************************
669
670 ; Test data
671
672 000636' 254 00 0 00 000647' TSTA3: JRST TG3 ; go start test
673 000637' 420402 000003 EBUS!ALU!NDMP!ZALU!3 ; test mask
674 000640' 000707' 006654' T3M,,[ASCIZ ^2901 OR Test - D OR 0^]
675 000641' 006620' 006661' [EXP MLAST!E23],,[EXP MLAST!E24]
676 000642' 000000 000720' TSTA4 ; failure test table
677 000643' 000000 000773' TSTA5 ; ...
678 000644' 000000 001046' TSTA6
679 000645' 000000 001130' TSTA7
680 000646' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 7
DFPTA4 MAC 19-Jan-83 11:21 2901 Boolean Tests (Direct Input/0) SEQ 0929
681
682 ; Start test
683
684 000647' 201 00 0 00 000000' TG3: MOVEI Z4 ; get address of module start
685 000650' 260 17 0 00 000265* GO TRACE ; handle trace output
686 000651' 201 01 0 00 000707' MOVEI 1,T3M ; set up microcode address
687 000652' 260 17 0 00 000267* GO TLOAD ; load/verify it
688 000653' 263 17 0 00 000000 RTN ; failed - exit test
689
690 ; Initialization
691
692 000654' 400 15 0 00 000000 TL3: SETZ ERFLG, ; clear error flag
693 000655' 260 17 0 00 000272* GO IPACLR ; clear port
694 000656' 402 00 0 00 000273* SETZM TSTSUB ; initialize subtest number
695 000657' 201 06 0 00 000677' MOVEI 6,TS3 ; get sstep table address
696
697 ; Loop on single step table entries
698
699 000660' 260 17 0 00 000275* TA3: GO BEXEC ; execute table entry
700 000661' 254 00 0 00 000676' JRST TX3 ; end of sstep table
701 000662' 254 00 0 00 000660' JRST TA3 ; keep looping after call
702 000663' 255 00 0 00 000000 JFCL ; error - EBUF data incorrect
703 000664' 200 01 0 00 000000* MOVE 1,CEBUF ; get correct data
704 000665' 404 01 0 00 006662' AND 1,[777400,,1777] ; mask out indeterminate bits
705 000666' 200 02 0 00 000000* MOVE 2,AEBUF ; get actual data
706 000667' 404 02 0 00 006662' AND 2,[777400,,1777] ; mask out indeterminate bits
707 000670' 312 01 0 00 000002 CAME 1,2 ; result correct?
708 000671' 474 15 0 00 000000 SETO ERFLG, ; no - set error flag
709
710 ; Handle error printouts and scope looping
711
712 000672' 027 00 0 00 000704' SCOPER MA3 ; print error message
713 000673' 254 00 0 00 000654' JRST TL3 ; loop on error
714 000674' 254 00 0 00 000676' JRST TX3 ; altmode exit
715 000675' 322 15 0 00 000660' JUMPE ERFLG,TA3 ; do next sstep table entry
716
717 ; End of test
718
719 000676' 263 17 0 00 000000 TX3: RTN ; return
720
721 ; Sstep table, with EBUF data, as: (CMD,#Steps,Start addr,End Addr,EBUF data)
722
723 000677' 100200 000001 TS3: ATABLE (SSSTRT,2,0,1,-1)
724 000700' 777777 777777
725 000701' 100200 020003 ATABLE (SSSTRT,2,2,3,0)
726 000702' 000000 000000
727 000703' 000000 000000 ATABLE (SSLAST)
728
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 8
DFPTA4 MAC 19-Jan-83 11:21 2901 Boolean Tests (Direct Input/0) SEQ 0930
729
730 ; Error messages
731
732 000704' 140000 006663' MA3: MSG!TXNOT![ASCIZ /OR of Magic # and 0 failed/]
733 000705' 140000 006671' MSG!TXNOT![ASCIZ /(Result in EBUF - middle 16 bits indeterminate)/]
734 000706' 000000000000# LAST!CALL!TXALL!BBPNT ; print sequencer data
735
736 ; Microcode:
737
738 000707' 000000 011777 T3M: MWORD <ADDR=0,JMAP,J=1,SD0,OR,D=0,SKCN,MGC=1777> ; 0
739 000710' 730000 240040
740 000711' 000100 012004 MWORD <JMAP,J=1,S0Q,OR,D=1,SELE,MGC=4,OENA> ; 1
741 000712' 231000 005040
742 000713' 000200 030000 MWORD <JMAP,J=3,SD0,OR,D=0,SKCN,MGC=0> ; 2
743 000714' 730000 240040
744 000715' 000300 032004 MWORD <JMAP,J=3,S0Q,OR,D=1,SELE,MGC=4,OENA> ; 3
745 000716' 231000 005040
746 000717' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 9
DFPTA4 MAC 19-Jan-83 11:21 2901 Boolean Tests (Direct Input/0) SEQ 0931
747
748 ;#********************************************************************
749 ;* Test 4 - 2901 AND Test - D AND 0
750 ;
751 ; Description: Verify that 1's AND 0's ==> 0's
752 ; Verify that 0's AND 0's ==> 0's
753 ;
754 ; Procedure: Clear Port
755 ; Load microcode
756 ;
757 ; Set RAR to 0
758 ; Execute JMAP,JMAP
759 ; Read EBUF, verify data is 000000,,000000
760 ;
761 ; Set RAR to 2
762 ; Execute JMAP,JMAP
763 ; Read EBUF, verify data is 000000,,000000
764 ;
765 ; Failure: ---
766 ;#********************************************************************
767
768 ; Test data
769
770 000720' 254 00 0 00 000731' TSTA4: JRST TG4 ; go start test
771 000721' 420402 000004 EBUS!ALU!NDMP!ZALU!4 ; test mask
772 000722' 000762' 006703' T4M,,[ASCIZ ^2901 AND Test - D AND 0^]
773 000723' 006620' 006661' [EXP MLAST!E23],,[EXP MLAST!E24]
774 000724' 000000 000773' TSTA5 ; failure test table
775 000725' 000000 001046' TSTA6 ; ...
776 000726' 000000 001130' TSTA7
777 000727' 000000 001212' TSTA10
778 000730' 777777 777777 -1
779
780 ; Start test
781
782 000731' 201 00 0 00 000000' TG4: MOVEI Z4 ; get address of module start
783 000732' 260 17 0 00 000650* GO TRACE ; handle trace output
784 000733' 201 01 0 00 000762' MOVEI 1,T4M ; set up microcode address
785 000734' 260 17 0 00 000652* GO TLOAD ; load/verify it
786 000735' 263 17 0 00 000000 RTN ; failed - exit test
787
788 ; Initialization
789
790 000736' 400 15 0 00 000000 TL4: SETZ ERFLG, ; clear error flag
791 000737' 260 17 0 00 000655* GO IPACLR ; clear port
792 000740' 402 00 0 00 000656* SETZM TSTSUB ; initialize subtest number
793 000741' 201 06 0 00 000753' MOVEI 6,TS4 ; get sstep table address
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 10
DFPTA4 MAC 19-Jan-83 11:21 2901 Boolean Tests (Direct Input/0) SEQ 0932
794
795 ; Loop on single step table entries
796
797 000742' 260 17 0 00 000660* TA4: GO BEXEC ; execute table entry
798 000743' 254 00 0 00 000752' JRST TX4 ; end of sstep table
799 000744' 254 00 0 00 000742' JRST TA4 ; keep looping after call
800 000745' 474 15 0 00 000000 SETO ERFLG, ; error - EBUF data incorrect
801
802 ; Handle error printouts and scope looping
803
804 000746' 027 00 0 00 000760' SCOPER MA4 ; print error message
805 000747' 254 00 0 00 000736' JRST TL4 ; loop on error
806 000750' 254 00 0 00 000752' JRST TX4 ; altmode exit
807 000751' 322 15 0 00 000742' JUMPE ERFLG,TA4 ; do next sstep table entry
808
809 ; End of test
810
811 000752' 263 17 0 00 000000 TX4: RTN ; return
812
813 ; Sstep table, with EBUF data, as: (CMD,#Steps,Start addr,End Addr,EBUF data)
814
815 000753' 100200 000001 TS4: ATABLE (SSSTRT,2,0,1,0)
816 000754' 000000 000000
817 000755' 100200 020003 ATABLE (SSSTRT,2,2,3,0)
818 000756' 000000 000000
819 000757' 000000 000000 ATABLE (SSLAST)
820
821 ; Error messages
822
823 000760' 140000 006710' MA4: MSG!TXNOT![ASCIZ /AND of Magic # and 0 failed (result in EBUF)/]
824 000761' 000000000000# LAST!CALL!TXALL!BBPNT ; print sequencer data
825
826 ; Microcode:
827
828 000762' 000000 011777 T4M: MWORD <ADDR=0,JMAP,J=1,SD0,AND,D=0,SKCN,MGC=1777> ; 0
829 000763' 740000 240040
830 000764' 000100 012004 MWORD <JMAP,J=1,S0Q,OR,D=1,SELE,MGC=4,OENA> ; 1
831 000765' 231000 005040
832 000766' 000200 030000 MWORD <JMAP,J=3,SD0,AND,D=0,SKCN,MGC=0> ; 2
833 000767' 740000 240040
834 000770' 000300 032004 MWORD <JMAP,J=3,S0Q,OR,D=1,SELE,MGC=4,OENA> ; 3
835 000771' 231000 005040
836 000772' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 11
DFPTA4 MAC 19-Jan-83 11:21 2901 Boolean Tests (Direct Input/0) SEQ 0933
837
838 ;#********************************************************************
839 ;* Test 5 - 2901 NOT_R_AND_S Test - D NOT_RS 0
840 ;
841 ; Description: Verify that 1's NOT_R_AND_S 0's ==> 0's
842 ; Verify that 0's NOT_R_AND_S 0's ==> 0's
843 ;
844 ; Procedure: Clear Port
845 ; Load microcode
846 ;
847 ; Set RAR to 0
848 ; Execute JMAP,JMAP
849 ; Read EBUF, verify data is 000000,,000000
850 ;
851 ; Set RAR to 2
852 ; Execute JMAP,JMAP
853 ; Read EBUF, verify data is 000000,,000000
854 ;
855 ; Failure: ---
856 ;#********************************************************************
857
858 ; Test data
859
860 000773' 254 00 0 00 001004' TSTA5: JRST TG5 ; go start test
861 000774' 420402 000005 EBUS!ALU!NDMP!ZALU!5 ; test mask
862 000775' 001035' 006721' T5M,,[ASCIZ ^2901 NOT_R_AND_S Test - D NOT_RS 0^]
863 000776' 006620' 006661' [EXP MLAST!E23],,[EXP MLAST!E24]
864 000777' 000000 001046' TSTA6 ; failure test table
865 001000' 000000 001130' TSTA7 ; ...
866 001001' 000000 001212' TSTA10
867 001002' 000000 001274' TSTA11
868 001003' 777777 777777 -1
869
870 ; Start test
871
872 001004' 201 00 0 00 000000' TG5: MOVEI Z4 ; get address of module start
873 001005' 260 17 0 00 000732* GO TRACE ; handle trace output
874 001006' 201 01 0 00 001035' MOVEI 1,T5M ; set up microcode address
875 001007' 260 17 0 00 000734* GO TLOAD ; load/verify it
876 001010' 263 17 0 00 000000 RTN ; failed - exit test
877
878 ; Initialization
879
880 001011' 400 15 0 00 000000 TL5: SETZ ERFLG, ; clear error flag
881 001012' 260 17 0 00 000737* GO IPACLR ; clear port
882 001013' 402 00 0 00 000740* SETZM TSTSUB ; initialize subtest number
883 001014' 201 06 0 00 001026' MOVEI 6,TS5 ; get sstep table address
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 12
DFPTA4 MAC 19-Jan-83 11:21 2901 Boolean Tests (Direct Input/0) SEQ 0934
884
885 ; Loop on single step table entries
886
887 001015' 260 17 0 00 000742* TA5: GO BEXEC ; execute table entry
888 001016' 254 00 0 00 001025' JRST TX5 ; end of sstep table
889 001017' 254 00 0 00 001015' JRST TA5 ; keep looping after call
890 001020' 474 15 0 00 000000 SETO ERFLG, ; error - EBUF data incorrect
891
892 ; Handle error printouts and scope looping
893
894 001021' 027 00 0 00 001033' SCOPER MA5 ; print error message
895 001022' 254 00 0 00 001011' JRST TL5 ; loop on error
896 001023' 254 00 0 00 001025' JRST TX5 ; altmode exit
897 001024' 322 15 0 00 001015' JUMPE ERFLG,TA5 ; do next sstep table entry
898
899 ; End of test
900
901 001025' 263 17 0 00 000000 TX5: RTN ; return
902
903 ; Sstep table, with EBUF data, as: (CMD,#Steps,Start addr,End Addr,EBUF data)
904
905 001026' 100200 000001 TS5: ATABLE (SSSTRT,2,0,1,0)
906 001027' 000000 000000
907 001030' 100200 020003 ATABLE (SSSTRT,2,2,3,0)
908 001031' 000000 000000
909 001032' 000000 000000 ATABLE (SSLAST)
910
911 ; Error messages
912
913 001033' 140000 006621' MA5: MSG!TXNOT![ASCIZ /Can't generate 0's out of the 2901's (result in EBUF)/]
914 001034' 000000000000# LAST!CALL!TXALL!BBPNT ; print sequencer data
915
916 ; Microcode:
917
918 001035' 000000 011777 T5M: MWORD <ADDR=0,JMAP,J=1,SD0,NAND,D=0,SKCN,MGC=1777> ; 0
919 001036' 750000 240040
920 001037' 000100 012004 MWORD <JMAP,J=1,S0Q,OR,D=1,SELE,MGC=4,OENA> ; 1
921 001040' 231000 005040
922 001041' 000200 030000 MWORD <JMAP,J=3,SD0,NAND,D=0,SKCN,MGC=0> ; 2
923 001042' 750000 240040
924 001043' 000300 032004 MWORD <JMAP,J=3,S0Q,OR,D=1,SELE,MGC=4,OENA> ; 3
925 001044' 231000 005040
926 001045' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 13
DFPTA4 MAC 19-Jan-83 11:21 2901 Boolean Tests (Direct Input/0) SEQ 0935
927
928 ;#********************************************************************
929 ;* Test 6 - 2901 XOR Test - D XOR 0
930 ;
931 ; Description: Verify that 1's XOR 0's ==> 1's
932 ; Verify that 0's XOR 0's ==> 0's
933 ;
934 ; Procedure: Clear Port
935 ; Load microcode
936 ;
937 ; Set RAR to 0
938 ; Execute JMAP,JMAP
939 ; Read EBUF, verify data is 777400,,001777
940 ; (middle 16 bits are indeterminate)
941 ;
942 ; Set RAR to 2
943 ; Execute JMAP,JMAP
944 ; Read EBUF, verify data is 000000,,000000
945 ; (middle 16 bits are indeterminate)
946 ;
947 ; Failure: ---
948 ;#********************************************************************
949
950 ; Test data
951
952 001046' 254 00 0 00 001057' TSTA6: JRST TG6 ; go start test
953 001047' 420402 000006 EBUS!ALU!NDMP!ZALU!6 ; test mask
954 001050' 001117' 006730' T6M,,[ASCIZ ^2901 XOR Test - D XOR 0^]
955 001051' 006620' 006661' [EXP MLAST!E23],,[EXP MLAST!E24]
956 001052' 000000 001130' TSTA7 ; failure test table
957 001053' 000000 001212' TSTA10 ; ...
958 001054' 000000 001274' TSTA11
959 001055' 000000 001356' TSTA12
960 001056' 777777 777777 -1
961
962 ; Start test
963
964 001057' 201 00 0 00 000000' TG6: MOVEI Z4 ; get address of module start
965 001060' 260 17 0 00 001005* GO TRACE ; handle trace output
966 001061' 201 01 0 00 001117' MOVEI 1,T6M ; set up microcode address
967 001062' 260 17 0 00 001007* GO TLOAD ; load/verify it
968 001063' 263 17 0 00 000000 RTN ; failed - exit test
969
970 ; Initialization
971
972 001064' 400 15 0 00 000000 TL6: SETZ ERFLG, ; clear error flag
973 001065' 260 17 0 00 001012* GO IPACLR ; clear port
974 001066' 402 00 0 00 001013* SETZM TSTSUB ; initialize subtest number
975 001067' 201 06 0 00 001107' MOVEI 6,TS6 ; get sstep table address
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 14
DFPTA4 MAC 19-Jan-83 11:21 2901 Boolean Tests (Direct Input/0) SEQ 0936
976
977 ; Loop on single step table entries
978
979 001070' 260 17 0 00 001015* TA6: GO BEXEC ; execute table entry
980 001071' 254 00 0 00 001106' JRST TX6 ; end of sstep table
981 001072' 254 00 0 00 001070' JRST TA6 ; keep looping after call
982 001073' 255 00 0 00 000000 JFCL ; error - EBUF data incorrect
983 001074' 200 01 0 00 000664* MOVE 1,CEBUF ; get correct data
984 001075' 404 01 0 00 006662' AND 1,[777400,,1777] ; mask out indeterminate bits
985 001076' 200 02 0 00 000666* MOVE 2,AEBUF ; get actual data
986 001077' 404 02 0 00 006662' AND 2,[777400,,1777] ; mask out indeterminate bits
987 001100' 312 01 0 00 000002 CAME 1,2 ; result correct?
988 001101' 474 15 0 00 000000 SETO ERFLG, ; no - set error flag
989
990 ; Handle error printouts and scope looping
991
992 001102' 027 00 0 00 001114' SCOPER MA6 ; print error message
993 001103' 254 00 0 00 001064' JRST TL6 ; loop on error
994 001104' 254 00 0 00 001106' JRST TX6 ; altmode exit
995 001105' 322 15 0 00 001070' JUMPE ERFLG,TA6 ; do next sstep table entry
996
997 ; End of test
998
999 001106' 263 17 0 00 000000 TX6: RTN ; return
1000
1001 ; Sstep table, with EBUF data, as: (CMD,#Steps,Start addr,End Addr,EBUF data)
1002
1003 001107' 100200 000001 TS6: ATABLE (SSSTRT,2,0,1,-1)
1004 001110' 777777 777777
1005 001111' 100200 020003 ATABLE (SSSTRT,2,2,3,0)
1006 001112' 000000 000000
1007 001113' 000000 000000 ATABLE (SSLAST)
1008
1009 ; Error messages
1010
1011 001114' 140000 006735' MA6: MSG!TXNOT![ASCIZ /XOR does not yield proper result/]
1012 001115' 140000 006671' MSG!TXNOT![ASCIZ /(Result in EBUF - middle 16 bits indeterminate)/]
1013 001116' 000000000000# LAST!CALL!TXALL!BBPNT ; print sequencer data
1014
1015 ; Microcode:
1016
1017 001117' 000000 011777 T6M: MWORD <ADDR=0,JMAP,J=1,SD0,XOR,D=0,SKCN,MGC=1777> ; 0
1018 001120' 760000 240040
1019 001121' 000100 012004 MWORD <JMAP,J=1,S0Q,OR,D=1,SELE,MGC=4,OENA> ; 1
1020 001122' 231000 005040
1021 001123' 000200 030000 MWORD <JMAP,J=3,SD0,XOR,D=0,SKCN,MGC=0> ; 2
1022 001124' 760000 240040
1023 001125' 000300 032004 MWORD <JMAP,J=3,S0Q,OR,D=1,SELE,MGC=4,OENA> ; 3
1024 001126' 231000 005040
1025 001127' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 15
DFPTA4 MAC 19-Jan-83 11:21 2901 Boolean Tests (Direct Input/0) SEQ 0937
1026
1027 ;#********************************************************************
1028 ;* Test 7 - 2901 XNOR Test - D XNOR 0
1029 ;
1030 ; Description: Verify that 1's XNOR 0's ==> 0's
1031 ; Verify that 0's XNOR 0's ==> 1's
1032 ;
1033 ; Procedure: Clear Port
1034 ; Load microcode
1035 ;
1036 ; Set RAR to 0
1037 ; Execute JMAP,JMAP
1038 ; Read EBUF, verify data is 000000,,000000
1039 ; (middle 16 bits are indeterminate)
1040 ;
1041 ; Set RAR to 2
1042 ; Execute JMAP,JMAP
1043 ; Read EBUF, verify data is 777400,,001777
1044 ; (middle 16 bits are indeterminate)
1045 ;
1046 ; Failure: ---
1047 ;#********************************************************************
1048
1049 ; Test data
1050
1051 001130' 254 00 0 00 001141' TSTA7: JRST TG7 ; go start test
1052 001131' 420402 000007 EBUS!ALU!NDMP!ZALU!7 ; test mask
1053 001132' 001201' 006744' T7M,,[ASCIZ ^2901 XNOR Test - D XNOR 0^]
1054 001133' 006620' 006661' [EXP MLAST!E23],,[EXP MLAST!E24]
1055 001134' 000000 001212' TSTA10 ; failure test table
1056 001135' 000000 001274' TSTA11 ; ...
1057 001136' 000000 001356' TSTA12
1058 001137' 000000 001440' TSTA13
1059 001140' 777777 777777 -1
1060
1061 ; Start test
1062
1063 001141' 201 00 0 00 000000' TG7: MOVEI Z4 ; get address of module start
1064 001142' 260 17 0 00 001060* GO TRACE ; handle trace output
1065 001143' 201 01 0 00 001201' MOVEI 1,T7M ; set up microcode address
1066 001144' 260 17 0 00 001062* GO TLOAD ; load/verify it
1067 001145' 263 17 0 00 000000 RTN ; failed - exit test
1068
1069 ; Initialization
1070
1071 001146' 400 15 0 00 000000 TL7: SETZ ERFLG, ; clear error flag
1072 001147' 260 17 0 00 001065* GO IPACLR ; clear port
1073 001150' 402 00 0 00 001066* SETZM TSTSUB ; initialize subtest number
1074 001151' 201 06 0 00 001171' MOVEI 6,TS7 ; get sstep table address
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 16
DFPTA4 MAC 19-Jan-83 11:21 2901 Boolean Tests (Direct Input/0) SEQ 0938
1075
1076 ; Loop on single step table entries
1077
1078 001152' 260 17 0 00 001070* TA7: GO BEXEC ; execute table entry
1079 001153' 254 00 0 00 001170' JRST TX7 ; end of sstep table
1080 001154' 254 00 0 00 001152' JRST TA7 ; keep looping after call
1081 001155' 255 00 0 00 000000 JFCL ; error - EBUF data incorrect
1082 001156' 200 01 0 00 001074* MOVE 1,CEBUF ; get correct data
1083 001157' 404 01 0 00 006662' AND 1,[777400,,1777] ; mask out indeterminate bits
1084 001160' 200 02 0 00 001076* MOVE 2,AEBUF ; get actual data
1085 001161' 404 02 0 00 006662' AND 2,[777400,,1777] ; mask out indeterminate bits
1086 001162' 312 01 0 00 000002 CAME 1,2 ; result correct?
1087 001163' 474 15 0 00 000000 SETO ERFLG, ; no - set error flag
1088
1089 ; Handle error printouts and scope looping
1090
1091 001164' 027 00 0 00 001176' SCOPER MA7 ; print error message
1092 001165' 254 00 0 00 001146' JRST TL7 ; loop on error
1093 001166' 254 00 0 00 001170' JRST TX7 ; altmode exit
1094 001167' 322 15 0 00 001152' JUMPE ERFLG,TA7 ; do next sstep table entry
1095
1096 ; End of test
1097
1098 001170' 263 17 0 00 000000 TX7: RTN ; return
1099
1100 ; Sstep table, with EBUF data, as: (CMD,#Steps,Start addr,End Addr,EBUF data)
1101
1102 001171' 100200 000001 TS7: ATABLE (SSSTRT,2,0,1,0)
1103 001172' 000000 000000
1104 001173' 100200 020003 ATABLE (SSSTRT,2,2,3,-1)
1105 001174' 777777 777777
1106 001175' 000000 000000 ATABLE (SSLAST)
1107
1108 ; Error messages
1109
1110 001176' 140000 006752' MA7: MSG!TXNOT![ASCIZ /XNOR does not yield proper result/]
1111 001177' 140000 006671' MSG!TXNOT![ASCIZ /(Result in EBUF - middle 16 bits indeterminate)/]
1112 001200' 000000000000# LAST!CALL!TXALL!BBPNT ; print sequencer data
1113
1114 ; Microcode:
1115
1116 001201' 000000 011777 T7M: MWORD <ADDR=0,JMAP,J=1,SD0,XNOR,D=0,SKCN,MGC=1777> ; 0
1117 001202' 770000 240040
1118 001203' 000100 012004 MWORD <JMAP,J=1,S0Q,OR,D=1,SELE,MGC=4,OENA> ; 1
1119 001204' 231000 005040
1120 001205' 000200 030000 MWORD <JMAP,J=3,SD0,XNOR,D=0,SKCN,MGC=0> ; 2
1121 001206' 770000 240040
1122 001207' 000300 032004 MWORD <JMAP,J=3,S0Q,OR,D=1,SELE,MGC=4,OENA> ; 3
1123 001210' 231000 005040
1124 001211' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 17
DFPTA4 MAC 19-Jan-83 11:21 2901 Boolean Tests (Direct Input/0) SEQ 0939
1125
1126 ;#********************************************************************
1127 ;* Test 10 - 2901 R+S Test - D + 0
1128 ;
1129 ; Description: Verify that 1's + 0's ==> 1's
1130 ; Verify that 0's + 0's ==> 0's
1131 ;
1132 ; Procedure: Clear Port
1133 ; Load microcode
1134 ;
1135 ; Set RAR to 0
1136 ; Execute JMAP,JMAP
1137 ; Read EBUF, verify data is 777400,,001777
1138 ; (middle 16 bits are indeterminate)
1139 ;
1140 ; Set RAR to 2
1141 ; Execute JMAP,JMAP
1142 ; Read EBUF, verify data is 000000,,000000
1143 ; (middle 16 bits are indeterminate)
1144 ;
1145 ; Failure: ---
1146 ;#********************************************************************
1147
1148 ; Test data
1149
1150 001212' 254 00 0 00 001223' TSTA10: JRST TG10 ; go start test
1151 001213' 420402 000010 EBUS!ALU!NDMP!ZALU!10 ; test mask
1152 001214' 001263' 006761' T10M,,[ASCIZ ^2901 R+S Test - D + 0^]
1153 001215' 006620' 006661' [EXP MLAST!E23],,[EXP MLAST!E24]
1154 001216' 000000 001274' TSTA11 ; failure test table
1155 001217' 000000 001356' TSTA12 ; ...
1156 001220' 000000 001440' TSTA13
1157 001221' 000000 002077' TSTA14
1158 001222' 777777 777777 -1
1159
1160 ; Start test
1161
1162 001223' 201 00 0 00 000000' TG10: MOVEI Z4 ; get address of module start
1163 001224' 260 17 0 00 001142* GO TRACE ; handle trace output
1164 001225' 201 01 0 00 001263' MOVEI 1,T10M ; set up microcode address
1165 001226' 260 17 0 00 001144* GO TLOAD ; load/verify it
1166 001227' 263 17 0 00 000000 RTN ; failed - exit test
1167
1168 ; Initialization
1169
1170 001230' 400 15 0 00 000000 TL10: SETZ ERFLG, ; clear error flag
1171 001231' 260 17 0 00 001147* GO IPACLR ; clear port
1172 001232' 402 00 0 00 001150* SETZM TSTSUB ; initialize subtest number
1173 001233' 201 06 0 00 001253' MOVEI 6,TS10 ; get sstep table address
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 18
DFPTA4 MAC 19-Jan-83 11:21 2901 Boolean Tests (Direct Input/0) SEQ 0940
1174
1175 ; Loop on single step table entries
1176
1177 001234' 260 17 0 00 001152* TA10: GO BEXEC ; execute table entry
1178 001235' 254 00 0 00 001252' JRST TX10 ; end of sstep table
1179 001236' 254 00 0 00 001234' JRST TA10 ; keep looping after call
1180 001237' 255 00 0 00 000000 JFCL ; error - EBUF data incorrect
1181 001240' 200 01 0 00 001156* MOVE 1,CEBUF ; get correct data
1182 001241' 404 01 0 00 006662' AND 1,[777400,,1777] ; mask out indeterminate bits
1183 001242' 200 02 0 00 001160* MOVE 2,AEBUF ; get actual data
1184 001243' 404 02 0 00 006662' AND 2,[777400,,1777] ; mask out indeterminate bits
1185 001244' 312 01 0 00 000002 CAME 1,2 ; result correct?
1186 001245' 474 15 0 00 000000 SETO ERFLG, ; no - set error flag
1187
1188 ; Handle error printouts and scope looping
1189
1190 001246' 027 00 0 00 001260' SCOPER MA10 ; print error message
1191 001247' 254 00 0 00 001230' JRST TL10 ; loop on error
1192 001250' 254 00 0 00 001252' JRST TX10 ; altmode exit
1193 001251' 322 15 0 00 001234' JUMPE ERFLG,TA10 ; do next sstep table entry
1194
1195 ; End of test
1196
1197 001252' 263 17 0 00 000000 TX10: RTN ; return
1198
1199 ; Sstep table, with EBUF data, as: (CMD,#Steps,Start addr,End Addr,EBUF data)
1200
1201 001253' 100200 000001 TS10: ATABLE (SSSTRT,2,0,1,-1)
1202 001254' 777777 777777
1203 001255' 100200 020003 ATABLE (SSSTRT,2,2,3,0)
1204 001256' 000000 000000
1205 001257' 000000 000000 ATABLE (SSLAST)
1206
1207 ; Error messages
1208
1209 001260' 140000 006766' MA10: MSG!TXNOT![ASCIZ /R+S does not yield proper result/]
1210 001261' 140000 006671' MSG!TXNOT![ASCIZ /(Result in EBUF - middle 16 bits indeterminate)/]
1211 001262' 000000000000# LAST!CALL!TXALL!BBPNT ; print sequencer data
1212
1213 ; Microcode:
1214
1215 001263' 000000 011777 T10M: MWORD <ADDR=0,JMAP,J=1,SD0,PLUS,D=0,SKCN,MGC=1777> ; 0
1216 001264' 700000 240040
1217 001265' 000100 012004 MWORD <JMAP,J=1,S0Q,OR,D=1,SELE,MGC=4,OENA> ; 1
1218 001266' 231000 005040
1219 001267' 000200 030000 MWORD <JMAP,J=3,SD0,PLUS,D=0,SKCN,MGC=0> ; 2
1220 001270' 700000 240040
1221 001271' 000300 032004 MWORD <JMAP,J=3,S0Q,OR,D=1,SELE,MGC=4,OENA> ; 3
1222 001272' 231000 005040
1223 001273' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 19
DFPTA4 MAC 19-Jan-83 11:21 2901 Boolean Tests (Direct Input/0) SEQ 0941
1224
1225 ;#********************************************************************
1226 ;* Test 11 - 2901 R-S Test - D - 0
1227 ;
1228 ; Description: Verify that 1's - 0's ==> 1's (CRY enabled)
1229 ; Verify that 0's - 0's ==> 0's (CRY enabled)
1230 ;
1231 ; Procedure: Clear Port
1232 ; Load microcode
1233 ;
1234 ; Set RAR to 0
1235 ; Execute JMAP,JMAP
1236 ; Read EBUF, verify data is 777400,,001777
1237 ; (middle 16 bits are indeterminate)
1238 ;
1239 ; Set RAR to 2
1240 ; Execute JMAP,JMAP
1241 ; Read EBUF, verify data is 000000,,000000
1242 ; (middle 16 bits are indeterminate)
1243 ;
1244 ; Failure: ---
1245 ;#********************************************************************
1246
1247 ; Test data
1248
1249 001274' 254 00 0 00 001305' TSTA11: JRST TG11 ; go start test
1250 001275' 420402 000011 EBUS!ALU!NDMP!ZALU!11 ; test mask
1251 001276' 001345' 006775' T11M,,[ASCIZ ^2901 R-S Test - D - 0^]
1252 001277' 006620' 006661' [EXP MLAST!E23],,[EXP MLAST!E24]
1253 001300' 000000 001356' TSTA12 ; failure test table
1254 001301' 000000 001440' TSTA13 ; ...
1255 001302' 000000 002077' TSTA14
1256 001303' 000000 002160' TSTA15
1257 001304' 777777 777777 -1
1258
1259 ; Start test
1260
1261 001305' 201 00 0 00 000000' TG11: MOVEI Z4 ; get address of module start
1262 001306' 260 17 0 00 001224* GO TRACE ; handle trace output
1263 001307' 201 01 0 00 001345' MOVEI 1,T11M ; set up microcode address
1264 001310' 260 17 0 00 001226* GO TLOAD ; load/verify it
1265 001311' 263 17 0 00 000000 RTN ; failed - exit test
1266
1267 ; Initialization
1268
1269 001312' 400 15 0 00 000000 TL11: SETZ ERFLG, ; clear error flag
1270 001313' 260 17 0 00 001231* GO IPACLR ; clear port
1271 001314' 402 00 0 00 001232* SETZM TSTSUB ; initialize subtest number
1272 001315' 201 06 0 00 001335' MOVEI 6,TS11 ; get sstep table address
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 20
DFPTA4 MAC 19-Jan-83 11:21 2901 Boolean Tests (Direct Input/0) SEQ 0942
1273
1274 ; Loop on single step table entries
1275
1276 001316' 260 17 0 00 001234* TA11: GO BEXEC ; execute table entry
1277 001317' 254 00 0 00 001334' JRST TX11 ; end of sstep table
1278 001320' 254 00 0 00 001316' JRST TA11 ; keep looping after call
1279 001321' 255 00 0 00 000000 JFCL ; error - EBUF data incorrect
1280 001322' 200 01 0 00 001240* MOVE 1,CEBUF ; get correct data
1281 001323' 404 01 0 00 006662' AND 1,[777400,,1777] ; mask out indeterminate bits
1282 001324' 200 02 0 00 001242* MOVE 2,AEBUF ; get actual data
1283 001325' 404 02 0 00 006662' AND 2,[777400,,1777] ; mask out indeterminate bits
1284 001326' 312 01 0 00 000002 CAME 1,2 ; result correct?
1285 001327' 474 15 0 00 000000 SETO ERFLG, ; no - set error flag
1286
1287 ; Handle error printouts and scope looping
1288
1289 001330' 027 00 0 00 001342' SCOPER MA11 ; print error message
1290 001331' 254 00 0 00 001312' JRST TL11 ; loop on error
1291 001332' 254 00 0 00 001334' JRST TX11 ; altmode exit
1292 001333' 322 15 0 00 001316' JUMPE ERFLG,TA11 ; do next sstep table entry
1293
1294 ; End of test
1295
1296 001334' 263 17 0 00 000000 TX11: RTN ; return
1297
1298 ; Sstep table, with EBUF data, as: (CMD,#Steps,Start addr,End Addr,EBUF data)
1299
1300 001335' 100200 000001 TS11: ATABLE (SSSTRT,2,0,1,-1)
1301 001336' 777777 777777
1302 001337' 100200 020003 ATABLE (SSSTRT,2,2,3,0)
1303 001340' 000000 000000
1304 001341' 000000 000000 ATABLE (SSLAST)
1305
1306 ; Error messages
1307
1308 001342' 140000 007002' MA11: MSG!TXNOT![ASCIZ /R-S does not yield proper result/]
1309 001343' 140000 006671' MSG!TXNOT![ASCIZ /(Result in EBUF - middle 16 bits indeterminate)/]
1310 001344' 000000000000# LAST!CALL!TXALL!BBPNT ; print sequencer data
1311
1312 ; Microcode:
1313
1314 001345' 000000 011777 T11M: MWORD <ADDR=0,JMAP,J=1,SD0,RMIN,D=0,CRY,SKCN,MGC=1777>; 0
1315 001346' 720000 240440
1316 001347' 000100 012004 MWORD <JMAP,J=1,S0Q,OR,D=1,SELE,MGC=4,OENA> ; 1
1317 001350' 231000 005040
1318 001351' 000200 030000 MWORD <JMAP,J=3,SD0,RMIN,D=0,CRY,SKCN,MGC=0> ; 2
1319 001352' 720000 240440
1320 001353' 000300 032004 MWORD <JMAP,J=3,S0Q,OR,D=1,SELE,MGC=4,OENA> ; 3
1321 001354' 231000 005040
1322 001355' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 21
DFPTA4 MAC 19-Jan-83 11:21 2901 Boolean Tests (Direct Input/0) SEQ 0943
1323
1324 ;#********************************************************************
1325 ;* Test 12 - 2901 S-R Test - 0 - D
1326 ;
1327 ; Description: Verify that 0's - 1's ==> xxx
1328 ; Verify that 0's - 0's ==> xxx
1329 ;
1330 ; Where xxx is the ones complement of the D input.
1331 ;
1332 ; Procedure: Clear Port
1333 ; Load microcode
1334 ;
1335 ; Set RAR to 0
1336 ; Execute JMAP,JMAP
1337 ; Read EBUF, verify data is 000000,,000000
1338 ; (middle 16 bits are indeterminate)
1339 ;
1340 ; Set RAR to 2
1341 ; Execute JMAP,JMAP
1342 ; Read EBUF, verify data is 777400,,001777
1343 ; (middle 16 bits are indeterminate)
1344 ;
1345 ; Failure: ---
1346 ;#********************************************************************
1347
1348 ; Test data
1349
1350 001356' 254 00 0 00 001367' TSTA12: JRST TG12 ; go start test
1351 001357' 420402 000012 EBUS!ALU!NDMP!ZALU!12 ; test mask
1352 001360' 001427' 007011' T12M,,[ASCIZ ^2901 S-R Test - 0 - D^]
1353 001361' 006620' 006661' [EXP MLAST!E23],,[EXP MLAST!E24]
1354 001362' 000000 001440' TSTA13 ; failure test table
1355 001363' 000000 002077' TSTA14 ; ...
1356 001364' 000000 002160' TSTA15
1357 001365' 000000 002374' TSTA16
1358 001366' 777777 777777 -1
1359
1360 ; Start test
1361
1362 001367' 201 00 0 00 000000' TG12: MOVEI Z4 ; get address of module start
1363 001370' 260 17 0 00 001306* GO TRACE ; handle trace output
1364 001371' 201 01 0 00 001427' MOVEI 1,T12M ; set up microcode address
1365 001372' 260 17 0 00 001310* GO TLOAD ; load/verify it
1366 001373' 263 17 0 00 000000 RTN ; failed - exit test
1367
1368 ; Initialization
1369
1370 001374' 400 15 0 00 000000 TL12: SETZ ERFLG, ; clear error flag
1371 001375' 260 17 0 00 001313* GO IPACLR ; clear port
1372 001376' 402 00 0 00 001314* SETZM TSTSUB ; initialize subtest number
1373 001377' 201 06 0 00 001417' MOVEI 6,TS12 ; get sstep table address
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 22
DFPTA4 MAC 19-Jan-83 11:21 2901 Boolean Tests (Direct Input/0) SEQ 0944
1374
1375 ; Loop on single step table entries
1376
1377 001400' 260 17 0 00 001316* TA12: GO BEXEC ; execute table entry
1378 001401' 254 00 0 00 001416' JRST TX12 ; end of sstep table
1379 001402' 254 00 0 00 001400' JRST TA12 ; keep looping after call
1380 001403' 255 00 0 00 000000 JFCL ; error - EBUF data incorrect
1381 001404' 200 01 0 00 001322* MOVE 1,CEBUF ; get correct data
1382 001405' 404 01 0 00 006662' AND 1,[777400,,1777] ; mask out indeterminate bits
1383 001406' 200 02 0 00 001324* MOVE 2,AEBUF ; get actual data
1384 001407' 404 02 0 00 006662' AND 2,[777400,,1777] ; mask out indeterminate bits
1385 001410' 312 01 0 00 000002 CAME 1,2 ; result correct?
1386 001411' 474 15 0 00 000000 SETO ERFLG, ; no - set error flag
1387
1388 ; Handle error printouts and scope looping
1389
1390 001412' 027 00 0 00 001424' SCOPER MA12 ; print error message
1391 001413' 254 00 0 00 001374' JRST TL12 ; loop on error
1392 001414' 254 00 0 00 001416' JRST TX12 ; altmode exit
1393 001415' 322 15 0 00 001400' JUMPE ERFLG,TA12 ; do next sstep table entry
1394
1395 ; End of test
1396
1397 001416' 263 17 0 00 000000 TX12: RTN ; return
1398
1399 ; Sstep table, with EBUF data, as: (CMD,#Steps,Start addr,End Addr,EBUF data)
1400
1401 001417' 100200 000001 TS12: ATABLE (SSSTRT,2,0,1,0)
1402 001420' 000000 000000
1403 001421' 100200 020003 ATABLE (SSSTRT,2,2,3,-1)
1404 001422' 777777 777777
1405 001423' 000000 000000 ATABLE (SSLAST)
1406
1407 ; Error messages
1408
1409 001424' 140000 007016' MA12: MSG!TXNOT![ASCIZ /S-R does not yield proper result/]
1410 001425' 140000 006671' MSG!TXNOT![ASCIZ /(Result in EBUF - middle 16 bits indeterminate)/]
1411 001426' 000000000000# LAST!CALL!TXALL!BBPNT ; print sequencer data
1412
1413 ; Microcode:
1414
1415 001427' 000000 011777 T12M: MWORD <ADDR=0,JMAP,J=1,SD0,SMIN,D=0,SKCN,MGC=1777> ; 0
1416 001430' 710000 240040
1417 001431' 000100 012004 MWORD <JMAP,J=1,S0Q,OR,D=1,SELE,MGC=4,OENA> ; 1
1418 001432' 231000 005040
1419 001433' 000200 030000 MWORD <JMAP,J=3,SD0,SMIN,D=0,SKCN,MGC=0> ; 2
1420 001434' 710000 240040
1421 001435' 000300 032004 MWORD <JMAP,J=3,S0Q,OR,D=1,SELE,MGC=4,OENA> ; 3
1422 001436' 231000 005040
1423 001437' 777777 777777 -1
1424
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 23
DFPTA4 MAC 19-Jan-83 11:21 2901 Register File Tests SEQ 0945
1425 SUBTTL 2901 Register File Tests
1426
1427 ;#********************************************************************
1428 ;* Test 13 - 2901 Writing/Reading Registers
1429 ;
1430 ; Description: Verify that a data pattern can be written to
1431 ; Register 0, then different data placed on the
1432 ; direct inputs, then Register 0 read correctly by
1433 ; specifying ALU destination code 2 (A==>Y Output).
1434 ; The ALU should not be involved during the read,
1435 ; only during the write.
1436 ;
1437 ; Repeat for Registers 1-15.
1438 ;
1439 ; Procedure: Clear Port
1440 ; Load microcode
1441 ;
1442 ; Set RAR to 0 (R0)
1443 ; Execute JMAP,JMAP,JMAP
1444 ; Read EBUF, verify data is 000000,,000000
1445 ;
1446 ; Set RAR to 3 (R1)
1447 ; Execute JMAP,JMAP,JMAP
1448 ; Read EBUF, verify data is 777777,,777777
1449 ;
1450 ; Repeat for registers 1-17 at start addresses
1451 ; 6,11 to 133,136
1452 ;
1453 ; Failure: ---
1454 ;#********************************************************************
1455
1456 ; Test data
1457
1458 001440' 254 00 0 00 001451' TSTA13: JRST TG13 ; go start test
1459 001441' 420402 000013 EBUS!ALU!NDMP!ZALU!13 ; test mask
1460 001442' 001576' 007025' T13M,,[ASCIZ ^2901 Writing/Reading Registers^]
1461 001443' 006620' 000000 [EXP MLAST!E23],,0
1462 001444' 000000 002077' TSTA14 ; failure test table
1463 001445' 000000 002160' TSTA15 ; ...
1464 001446' 000000 002374' TSTA16
1465 001447' 000000 002653' TSTA17
1466 001450' 777777 777777 -1
1467
1468 ; Start test
1469
1470 001451' 201 00 0 00 000000' TG13: MOVEI Z4 ; get address of module start
1471 001452' 260 17 0 00 001370* GO TRACE ; handle trace output
1472 001453' 201 01 0 00 001576' MOVEI 1,T13M ; set up microcode address
1473 001454' 260 17 0 00 001372* GO TLOAD ; load/verify it
1474 001455' 263 17 0 00 000000 RTN ; failed - exit test
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 24
DFPTA4 MAC 19-Jan-83 11:21 2901 Register File Tests SEQ 0946
1475
1476 ; Initialization
1477
1478 001456' 400 15 0 00 000000 TL13: SETZ ERFLG, ; clear error flag
1479 001457' 260 17 0 00 001375* GO IPACLR ; clear port
1480 001460' 402 00 0 00 001376* SETZM TSTSUB ; initialize subtest number
1481 001461' 201 06 0 00 001473' MOVEI 6,TS13 ; get sstep table address
1482
1483 ; Loop on single step table entries
1484
1485 001462' 260 17 0 00 001400* TA13: GO BEXEC ; execute table entry
1486 001463' 254 00 0 00 001472' JRST TX13 ; end of sstep table
1487 001464' 254 00 0 00 001462' JRST TA13 ; keep looping after call
1488 001465' 474 15 0 00 000000 SETO ERFLG, ; error - EBUF data incorrect
1489
1490 ; Handle error printouts and scope looping
1491
1492 001466' 027 00 0 00 001574' SCOPER MA13 ; print error message
1493 001467' 254 00 0 00 001456' JRST TL13 ; loop on error
1494 001470' 254 00 0 00 001472' JRST TX13 ; altmode exit
1495 001471' 322 15 0 00 001462' JUMPE ERFLG,TA13 ; do next sstep table entry
1496
1497 ; End of test
1498
1499 001472' 263 17 0 00 000000 TX13: RTN ; return
1500
1501 ; Sstep table, with EBUF data, as: (CMD,#Steps,Start addr,End Addr,EBUF data)
1502
1503 001473' 100300 000002 TS13: ATABLE (SSSTRT,3,0,2,0) ; Register 0
1504 001474' 000000 000000
1505 001475' 100300 030005 ATABLE (SSSTRT,3,3,5,-1)
1506 001476' 777777 777777
1507 001477' 100300 060010 ATABLE (SSSTRT,3,6,10,0) ; Register 1
1508 001500' 000000 000000
1509 001501' 100300 110013 ATABLE (SSSTRT,3,11,13,-1)
1510 001502' 777777 777777
1511 001503' 100300 140016 ATABLE (SSSTRT,3,14,16,0) ; Register 2
1512 001504' 000000 000000
1513 001505' 100300 170021 ATABLE (SSSTRT,3,17,21,-1)
1514 001506' 777777 777777
1515 001507' 100300 220024 ATABLE (SSSTRT,3,22,24,0) ; Register 3
1516 001510' 000000 000000
1517 001511' 100300 250027 ATABLE (SSSTRT,3,25,27,-1)
1518 001512' 777777 777777
1519 001513' 100300 300032 ATABLE (SSSTRT,3,30,32,0) ; Register 4
1520 001514' 000000 000000
1521 001515' 100300 330035 ATABLE (SSSTRT,3,33,35,-1)
1522 001516' 777777 777777
1523 001517' 100300 360040 ATABLE (SSSTRT,3,36,40,0) ; Register 5
1524 001520' 000000 000000
1525 001521' 100300 410043 ATABLE (SSSTRT,3,41,43,-1)
1526 001522' 777777 777777
1527 001523' 100300 440046 ATABLE (SSSTRT,3,44,46,0) ; Register 6
1528 001524' 000000 000000
1529 001525' 100300 470051 ATABLE (SSSTRT,3,47,51,-1)
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 24-1
DFPTA4 MAC 19-Jan-83 11:21 2901 Register File Tests SEQ 0947
1530 001526' 777777 777777
1531 001527' 100300 520054 ATABLE (SSSTRT,3,52,54,0) ; Register 7
1532 001530' 000000 000000
1533 001531' 100300 550057 ATABLE (SSSTRT,3,55,57,-1)
1534 001532' 777777 777777
1535 001533' 100300 600062 ATABLE (SSSTRT,3,60,62,0) ; Register 10
1536 001534' 000000 000000
1537 001535' 100300 630065 ATABLE (SSSTRT,3,63,65,-1)
1538 001536' 777777 777777
1539 001537' 100300 660070 ATABLE (SSSTRT,3,66,70,0) ; Register 11
1540 001540' 000000 000000
1541 001541' 100300 710073 ATABLE (SSSTRT,3,71,73,-1)
1542 001542' 777777 777777
1543 001543' 100300 740076 ATABLE (SSSTRT,3,74,76,0) ; Register 12
1544 001544' 000000 000000
1545 001545' 100300 770101 ATABLE (SSSTRT,3,77,101,-1)
1546 001546' 777777 777777
1547 001547' 100301 020104 ATABLE (SSSTRT,3,102,104,0) ; Register 13
1548 001550' 000000 000000
1549 001551' 100301 050107 ATABLE (SSSTRT,3,105,107,-1)
1550 001552' 777777 777777
1551 001553' 100301 100112 ATABLE (SSSTRT,3,110,112,0) ; Register 14
1552 001554' 000000 000000
1553 001555' 100301 130115 ATABLE (SSSTRT,3,113,115,-1)
1554 001556' 777777 777777
1555 001557' 100301 160120 ATABLE (SSSTRT,3,116,120,0) ; Register 15
1556 001560' 000000 000000
1557 001561' 100301 210123 ATABLE (SSSTRT,3,121,123,-1)
1558 001562' 777777 777777
1559 001563' 100301 240126 ATABLE (SSSTRT,3,124,126,0) ; Register 16
1560 001564' 000000 000000
1561 001565' 100301 270131 ATABLE (SSSTRT,3,127,131,-1)
1562 001566' 777777 777777
1563 001567' 100301 320134 ATABLE (SSSTRT,3,132,134,0) ; Register 17
1564 001570' 000000 000000
1565 001571' 100301 350137 ATABLE (SSSTRT,3,135,137,-1)
1566 001572' 777777 777777
1567 001573' 000000 000000 ATABLE (SSLAST)
1568
1569 ; Error messages
1570
1571 001574' 140000 007034' MA13: MSG!TXNOT![ASCIZ ^Could not write/read 2901 register correctly (result in EBUF)^]
1572 001575' 000000000000# LAST!CALL!TXALL!BBPNT ; print sequencer data
1573
1574 ; Microcode: Register 0
1575
1576 001576' 000000 010000 T13M: MWORD <ADDR=0,JMAP,J=1,A=0,B=0,SD0,AND,D=3> ; 0
1577 001577' 743000 000040
1578 001600' 000100 000153 MWORD <CONT,A=0,B=0,SAB,OR,D=3,SKCN,MGC=153> ; 1
1579 001601' 133000 240340
1580 001602' 000200 022004 MWORD <JMAP,J=2,A=0,S0A,OR,D=1,SELE,MGC=4,OENA> ; 2
1581 001603' 431000 005040
1582
1583 001604' 000300 040000 MWORD <JMAP,J=4,A=0,B=0,S0A,XNOR,D=3> ; 3
1584 001605' 473000 000040
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 24-2
DFPTA4 MAC 19-Jan-83 11:21 2901 Register File Tests SEQ 0948
1585 001606' 000400 000153 MWORD <CONT,A=0,B=0,SAB,OR,D=3,SKCN,MGC=153> ; 4
1586 001607' 133000 240340
1587 001610' 000500 052004 MWORD <JMAP,J=5,A=0,S0A,OR,D=1,SELE,MGC=4,OENA> ; 5
1588 001611' 431000 005040
1589
1590 ; Register 1
1591
1592 001612' 000600 070000 MWORD <JMAP,J=7,A=1,B=1,SD0,AND,D=3> ; 6
1593 001613' 743010 400040
1594 001614' 000700 000153 MWORD <CONT,A=1,B=1,SAB,OR,D=3,SKCN,MGC=153> ; 7
1595 001615' 133010 640340
1596 001616' 001000 102004 MWORD <JMAP,J=10,A=1,S0A,OR,D=1,SELE,MGC=4,OENA> ; 10
1597 001617' 431010 005040
1598
1599 001620' 001100 120000 MWORD <JMAP,J=12,A=1,B=1,S0A,XNOR,D=3> ; 11
1600 001621' 473010 400040
1601 001622' 001200 000153 MWORD <CONT,A=1,B=1,SAB,OR,D=3,SKCN,MGC=153> ; 12
1602 001623' 133010 640340
1603 001624' 001300 132004 MWORD <JMAP,J=13,A=1,S0A,OR,D=1,SELE,MGC=4,OENA> ; 13
1604 001625' 431010 005040
1605
1606 ; Register 2
1607
1608 001626' 001400 150000 MWORD <JMAP,J=15,A=2,B=2,SD0,AND,D=3> ; 14
1609 001627' 743021 000040
1610 001630' 001500 000153 MWORD <CONT,A=2,B=2,SAB,OR,D=3,SKCN,MGC=153> ; 15
1611 001631' 133021 240340
1612 001632' 001600 162004 MWORD <JMAP,J=16,A=2,S0A,OR,D=1,SELE,MGC=4,OENA> ; 16
1613 001633' 431020 005040
1614
1615 001634' 001700 200000 MWORD <JMAP,J=20,A=2,B=2,S0A,XNOR,D=3> ; 17
1616 001635' 473021 000040
1617 001636' 002000 000153 MWORD <CONT,A=2,B=2,SAB,OR,D=3,SKCN,MGC=153> ; 20
1618 001637' 133021 240340
1619 001640' 002100 212004 MWORD <JMAP,J=21,A=2,S0A,OR,D=1,SELE,MGC=4,OENA> ; 21
1620 001641' 431020 005040
1621
1622 ; Register 3
1623
1624 001642' 002200 230000 MWORD <JMAP,J=23,A=3,B=3,SD0,AND,D=3> ; 22
1625 001643' 743031 400040
1626 001644' 002300 000153 MWORD <CONT,A=3,B=3,SAB,OR,D=3,SKCN,MGC=153> ; 23
1627 001645' 133031 640340
1628 001646' 002400 242004 MWORD <JMAP,J=24,A=3,S0A,OR,D=1,SELE,MGC=4,OENA> ; 24
1629 001647' 431030 005040
1630
1631 001650' 002500 260000 MWORD <JMAP,J=26,A=3,B=3,S0A,XNOR,D=3> ; 25
1632 001651' 473031 400040
1633 001652' 002600 000153 MWORD <CONT,A=3,B=3,SAB,OR,D=3,SKCN,MGC=153> ; 26
1634 001653' 133031 640340
1635 001654' 002700 272004 MWORD <JMAP,J=27,A=3,S0A,OR,D=1,SELE,MGC=4,OENA> ; 27
1636 001655' 431030 005040
1637
1638 ; Register 4
1639
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 24-3
DFPTA4 MAC 19-Jan-83 11:21 2901 Register File Tests SEQ 0949
1640 001656' 003000 310000 MWORD <JMAP,J=31,A=4,B=4,SD0,AND,D=3> ; 30
1641 001657' 743042 000040
1642 001660' 003100 000153 MWORD <CONT,A=4,B=4,SAB,OR,D=3,SKCN,MGC=153> ; 31
1643 001661' 133042 240340
1644 001662' 003200 322004 MWORD <JMAP,J=32,A=4,S0A,OR,D=1,SELE,MGC=4,OENA> ; 32
1645 001663' 431040 005040
1646
1647 001664' 003300 340000 MWORD <JMAP,J=34,A=4,B=4,S0A,XNOR,D=3> ; 33
1648 001665' 473042 000040
1649 001666' 003400 000153 MWORD <CONT,A=4,B=4,SAB,OR,D=3,SKCN,MGC=153> ; 34
1650 001667' 133042 240340
1651 001670' 003500 352004 MWORD <JMAP,J=35,A=4,S0A,OR,D=1,SELE,MGC=4,OENA> ; 35
1652 001671' 431040 005040
1653
1654 ; Register 5
1655
1656 001672' 003600 370000 MWORD <JMAP,J=37,A=5,B=5,SD0,AND,D=3> ; 36
1657 001673' 743052 400040
1658 001674' 003700 000153 MWORD <CONT,A=5,B=5,SAB,OR,D=3,SKCN,MGC=153> ; 37
1659 001675' 133052 640340
1660 001676' 004000 402004 MWORD <JMAP,J=40,A=5,S0A,OR,D=1,SELE,MGC=4,OENA> ; 40
1661 001677' 431050 005040
1662
1663 001700' 004100 420000 MWORD <JMAP,J=42,A=5,B=5,S0A,XNOR,D=3> ; 41
1664 001701' 473052 400040
1665 001702' 004200 000153 MWORD <CONT,A=5,B=5,SAB,OR,D=3,SKCN,MGC=153> ; 42
1666 001703' 133052 640340
1667 001704' 004300 432004 MWORD <JMAP,J=43,A=5,S0A,OR,D=1,SELE,MGC=4,OENA> ; 43
1668 001705' 431050 005040
1669
1670 ; Register 6
1671
1672 001706' 004400 450000 MWORD <JMAP,J=45,A=6,B=6,SD0,AND,D=3> ; 44
1673 001707' 743063 000040
1674 001710' 004500 000153 MWORD <CONT,A=6,B=6,SAB,OR,D=3,SKCN,MGC=153> ; 45
1675 001711' 133063 240340
1676 001712' 004600 462004 MWORD <JMAP,J=46,A=6,S0A,OR,D=1,SELE,MGC=4,OENA> ; 46
1677 001713' 431060 005040
1678
1679 001714' 004700 500000 MWORD <JMAP,J=50,A=6,B=6,S0A,XNOR,D=3> ; 47
1680 001715' 473063 000040
1681 001716' 005000 000153 MWORD <CONT,A=6,B=6,SAB,OR,D=3,SKCN,MGC=153> ; 50
1682 001717' 133063 240340
1683 001720' 005100 512004 MWORD <JMAP,J=51,A=6,S0A,OR,D=1,SELE,MGC=4,OENA> ; 51
1684 001721' 431060 005040
1685
1686 ; Register 7
1687
1688 001722' 005200 530000 MWORD <JMAP,J=53,A=7,B=7,SD0,AND,D=3> ; 52
1689 001723' 743073 400040
1690 001724' 005300 000153 MWORD <CONT,A=7,B=7,SAB,OR,D=3,SKCN,MGC=153> ; 53
1691 001725' 133073 640340
1692 001726' 005400 542004 MWORD <JMAP,J=54,A=7,S0A,OR,D=1,SELE,MGC=4,OENA> ; 54
1693 001727' 431070 005040
1694
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 24-4
DFPTA4 MAC 19-Jan-83 11:21 2901 Register File Tests SEQ 0950
1695 001730' 005500 560000 MWORD <JMAP,J=56,A=7,B=7,S0A,XNOR,D=3> ; 55
1696 001731' 473073 400040
1697 001732' 005600 000153 MWORD <CONT,A=7,B=7,SAB,OR,D=3,SKCN,MGC=153> ; 56
1698 001733' 133073 640340
1699 001734' 005700 572004 MWORD <JMAP,J=57,A=7,S0A,OR,D=1,SELE,MGC=4,OENA> ; 57
1700 001735' 431070 005040
1701
1702 ; Register 10
1703
1704 001736' 006000 610000 MWORD <JMAP,J=61,A=10,B=10,SD0,AND,D=3> ; 60
1705 001737' 743104 000040
1706 001740' 006100 000153 MWORD <CONT,A=10,B=10,SAB,OR,D=3,SKCN,MGC=153> ; 61
1707 001741' 133104 240340
1708 001742' 006200 622004 MWORD <JMAP,J=62,A=10,S0A,OR,D=1,SELE,MGC=4,OENA> ; 62
1709 001743' 431100 005040
1710
1711 001744' 006300 640000 MWORD <JMAP,J=64,A=10,B=10,S0A,XNOR,D=3> ; 63
1712 001745' 473104 000040
1713 001746' 006400 000153 MWORD <CONT,A=10,B=10,SAB,OR,D=3,SKCN,MGC=153> ; 64
1714 001747' 133104 240340
1715 001750' 006500 652004 MWORD <JMAP,J=65,A=10,S0A,OR,D=1,SELE,MGC=4,OENA> ; 65
1716 001751' 431100 005040
1717
1718 ; Register 11
1719
1720 001752' 006600 670000 MWORD <JMAP,J=67,A=11,B=11,SD0,AND,D=3> ; 66
1721 001753' 743114 400040
1722 001754' 006700 000153 MWORD <CONT,A=11,B=11,SAB,OR,D=3,SKCN,MGC=153> ; 67
1723 001755' 133114 640340
1724 001756' 007000 702004 MWORD <JMAP,J=70,A=11,S0A,OR,D=1,SELE,MGC=4,OENA> ; 70
1725 001757' 431110 005040
1726
1727 001760' 007100 720000 MWORD <JMAP,J=72,A=11,B=11,S0A,XNOR,D=3> ; 71
1728 001761' 473114 400040
1729 001762' 007200 000153 MWORD <CONT,A=11,B=11,SAB,OR,D=3,SKCN,MGC=153> ; 72
1730 001763' 133114 640340
1731 001764' 007300 732004 MWORD <JMAP,J=73,A=11,S0A,OR,D=1,SELE,MGC=4,OENA> ; 73
1732 001765' 431110 005040
1733
1734 ; Register 12
1735
1736 001766' 007400 750000 MWORD <JMAP,J=75,A=12,B=12,SD0,AND,D=3> ; 74
1737 001767' 743125 000040
1738 001770' 007500 000153 MWORD <CONT,A=12,B=12,SAB,OR,D=3,SKCN,MGC=153> ; 75
1739 001771' 133125 240340
1740 001772' 007600 762004 MWORD <JMAP,J=76,A=12,S0A,OR,D=1,SELE,MGC=4,OENA> ; 76
1741 001773' 431120 005040
1742
1743 001774' 007701 000000 MWORD <JMAP,J=100,A=12,B=12,S0A,XNOR,D=3> ; 77
1744 001775' 473125 000040
1745 001776' 010000 000153 MWORD <CONT,A=12,B=12,SAB,OR,D=3,SKCN,MGC=153> ; 100
1746 001777' 133125 240340
1747 002000' 010101 012004 MWORD <JMAP,J=101,A=12,S0A,OR,D=1,SELE,MGC=4,OENA> ; 101
1748 002001' 431120 005040
1749
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 24-5
DFPTA4 MAC 19-Jan-83 11:21 2901 Register File Tests SEQ 0951
1750 ; Register 13
1751
1752 002002' 010201 030000 MWORD <JMAP,J=103,A=13,B=13,SD0,AND,D=3> ; 102
1753 002003' 743135 400040
1754 002004' 010300 000153 MWORD <CONT,A=13,B=13,SAB,OR,D=3,SKCN,MGC=153> ; 103
1755 002005' 133135 640340
1756 002006' 010401 042004 MWORD <JMAP,J=104,A=13,S0A,OR,D=1,SELE,MGC=4,OENA> ; 104
1757 002007' 431130 005040
1758
1759 002010' 010501 060000 MWORD <JMAP,J=106,A=13,B=13,S0A,XNOR,D=3> ; 105
1760 002011' 473135 400040
1761 002012' 010600 000153 MWORD <CONT,A=13,B=13,SAB,OR,D=3,SKCN,MGC=153> ; 106
1762 002013' 133135 640340
1763 002014' 010701 072004 MWORD <JMAP,J=107,A=13,S0A,OR,D=1,SELE,MGC=4,OENA> ; 107
1764 002015' 431130 005040
1765
1766 ; Register 14
1767
1768 002016' 011001 110000 MWORD <JMAP,J=111,A=14,B=14,SD0,AND,D=3> ; 110
1769 002017' 743146 000040
1770 002020' 011100 000153 MWORD <CONT,A=14,B=14,SAB,OR,D=3,SKCN,MGC=153> ; 111
1771 002021' 133146 240340
1772 002022' 011201 122004 MWORD <JMAP,J=112,A=14,S0A,OR,D=1,SELE,MGC=4,OENA> ; 112
1773 002023' 431140 005040
1774
1775 002024' 011301 140000 MWORD <JMAP,J=114,A=14,B=14,S0A,XNOR,D=3> ; 113
1776 002025' 473146 000040
1777 002026' 011400 000153 MWORD <CONT,A=14,B=14,SAB,OR,D=3,SKCN,MGC=153> ; 114
1778 002027' 133146 240340
1779 002030' 011501 152004 MWORD <JMAP,J=115,A=14,S0A,OR,D=1,SELE,MGC=4,OENA> ; 115
1780 002031' 431140 005040
1781
1782 ; Register 15
1783
1784 002032' 011601 170000 MWORD <JMAP,J=117,A=15,B=15,SD0,AND,D=3> ; 116
1785 002033' 743156 400040
1786 002034' 011700 000153 MWORD <CONT,A=15,B=15,SAB,OR,D=3,SKCN,MGC=153> ; 117
1787 002035' 133156 640340
1788 002036' 012001 202004 MWORD <JMAP,J=120,A=15,S0A,OR,D=1,SELE,MGC=4,OENA> ; 120
1789 002037' 431150 005040
1790
1791 002040' 012101 220000 MWORD <JMAP,J=122,A=15,B=15,S0A,XNOR,D=3> ; 121
1792 002041' 473156 400040
1793 002042' 012200 000153 MWORD <CONT,A=15,B=15,SAB,OR,D=3,SKCN,MGC=153> ; 122
1794 002043' 133156 640340
1795 002044' 012301 232004 MWORD <JMAP,J=123,A=15,S0A,OR,D=1,SELE,MGC=4,OENA> ; 123
1796 002045' 431150 005040
1797
1798 ; Register 16
1799
1800 002046' 012401 250000 MWORD <JMAP,J=125,A=16,B=16,SD0,AND,D=3> ; 124
1801 002047' 743167 000040
1802 002050' 012500 000153 MWORD <CONT,A=16,B=16,SAB,OR,D=3,SKCN,MGC=153> ; 125
1803 002051' 133167 240340
1804 002052' 012601 262004 MWORD <JMAP,J=126,A=16,S0A,OR,D=1,SELE,MGC=4,OENA> ; 126
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 24-6
DFPTA4 MAC 19-Jan-83 11:21 2901 Register File Tests SEQ 0952
1805 002053' 431160 005040
1806
1807 002054' 012701 300000 MWORD <JMAP,J=130,A=16,B=16,S0A,XNOR,D=3> ; 127
1808 002055' 473167 000040
1809 002056' 013000 000153 MWORD <CONT,A=16,B=16,SAB,OR,D=3,SKCN,MGC=153> ; 130
1810 002057' 133167 240340
1811 002060' 013101 312004 MWORD <JMAP,J=131,A=16,S0A,OR,D=1,SELE,MGC=4,OENA> ; 131
1812 002061' 431160 005040
1813
1814 ; Register 17
1815
1816 002062' 013201 330000 MWORD <JMAP,J=133,A=17,B=17,SD0,AND,D=3> ; 132
1817 002063' 743177 400040
1818 002064' 013300 000153 MWORD <CONT,A=17,B=17,SAB,OR,D=3,SKCN,MGC=153> ; 133
1819 002065' 133177 640340
1820 002066' 013401 342004 MWORD <JMAP,J=134,A=17,S0A,OR,D=1,SELE,MGC=4,OENA> ; 134
1821 002067' 431170 005040
1822
1823 002070' 013501 360000 MWORD <JMAP,J=136,A=17,B=17,S0A,XNOR,D=3> ; 135
1824 002071' 473177 400040
1825 002072' 013600 000153 MWORD <CONT,A=17,B=17,SAB,OR,D=3,SKCN,MGC=153> ; 136
1826 002073' 133177 640340
1827 002074' 013701 372004 MWORD <JMAP,J=137,A=17,S0A,OR,D=1,SELE,MGC=4,OENA> ; 137
1828 002075' 431170 005040
1829 002076' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 25
DFPTA4 MAC 19-Jan-83 11:21 2901 Register File Tests SEQ 0953
1830
1831 ;#********************************************************************
1832 ;* Test 14 - 2901 Q-Register Test
1833 ;
1834 ; Description: Verify that the Q-Register can be loaded with
1835 ; various data patterns and read back properly.
1836 ;
1837 ; Procedure: Clear Port
1838 ; Load microcode
1839 ;
1840 ; Set RAR to 0 (R0)
1841 ; Execute JMAP,JMAP,JMAP
1842 ; Read EBUF, verify data is 000000,,000000
1843 ;
1844 ; Set RAR to 3 (R1)
1845 ; Execute JMAP,JMAP,JMAP
1846 ; Read EBUF, verify data is 777777,,777777
1847 ;
1848 ; Failure: ---
1849 ;#********************************************************************
1850
1851 ; Test data
1852
1853 002077' 254 00 0 00 002110' TSTA14: JRST TG14 ; go start test
1854 002100' 420402 000014 EBUS!ALU!NDMP!ZALU!14 ; test mask
1855 002101' 002141' 007051' T14M,,[ASCIZ ^2901 Q-Register Test^]
1856 002102' 006620' 000000 [EXP MLAST!E23],,0
1857 002103' 000000 002160' TSTA15 ; failure test table
1858 002104' 000000 002374' TSTA16 ; ...
1859 002105' 000000 002653' TSTA17
1860 002106' 000000 003130' TSTA20
1861 002107' 777777 777777 -1
1862
1863 ; Start test
1864
1865 002110' 201 00 0 00 000000' TG14: MOVEI Z4 ; get address of module start
1866 002111' 260 17 0 00 001452* GO TRACE ; handle trace output
1867 002112' 201 01 0 00 002141' MOVEI 1,T14M ; set up microcode address
1868 002113' 260 17 0 00 001454* GO TLOAD ; load/verify it
1869 002114' 263 17 0 00 000000 RTN ; failed - exit test
1870
1871 ; Initialization
1872
1873 002115' 400 15 0 00 000000 TL14: SETZ ERFLG, ; clear error flag
1874 002116' 260 17 0 00 001457* GO IPACLR ; clear port
1875 002117' 402 00 0 00 001460* SETZM TSTSUB ; initialize subtest number
1876 002120' 201 06 0 00 002132' MOVEI 6,TS14 ; get sstep table address
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 26
DFPTA4 MAC 19-Jan-83 11:21 2901 Register File Tests SEQ 0954
1877
1878 ; Loop on single step table entries
1879
1880 002121' 260 17 0 00 001462* TA14: GO BEXEC ; execute table entry
1881 002122' 254 00 0 00 002131' JRST TX14 ; end of sstep table
1882 002123' 254 00 0 00 002121' JRST TA14 ; keep looping after call
1883 002124' 474 15 0 00 000000 SETO ERFLG, ; error - EBUF data incorrect
1884
1885 ; Handle error printouts and scope looping
1886
1887 002125' 027 00 0 00 002137' SCOPER MA14 ; print error message
1888 002126' 254 00 0 00 002115' JRST TL14 ; loop on error
1889 002127' 254 00 0 00 002131' JRST TX14 ; altmode exit
1890 002130' 322 15 0 00 002121' JUMPE ERFLG,TA14 ; do next sstep table entry
1891
1892 ; End of test
1893
1894 002131' 263 17 0 00 000000 TX14: RTN ; return
1895
1896 ; Sstep table, with EBUF data, as: (CMD,#Steps,Start addr,End Addr,EBUF data)
1897
1898 002132' 100300 000002 TS14: ATABLE (SSSTRT,3,0,2,0)
1899 002133' 000000 000000
1900 002134' 100400 030006 ATABLE (SSSTRT,4,3,6,-1)
1901 002135' 777777 777777
1902 002136' 000000 000000 ATABLE (SSLAST)
1903
1904 ; Error messages
1905
1906 002137' 140000 007056' MA14: MSG!TXNOT![ASCIZ ^Could not write/read 2901 Q-Register correctly (result in EBUF)^]
1907 002140' 000000000000# LAST!CALL!TXALL!BBPNT ; print sequencer data
1908
1909 ; Microcode:
1910
1911 002141' 000000 010000 T14M: MWORD <ADDR=0,JMAP,J=1,SD0,AND,D=0> ; 0
1912 002142' 740000 000040
1913 002143' 000100 000153 MWORD <CONT,S0Q,OR,D=0,SKCN,MGC=153> ; 1
1914 002144' 230000 240340
1915 002145' 000200 022004 MWORD <JMAP,J=2,S0Q,OR,D=1,SELE,MGC=4,OENA> ; 2
1916 002146' 231000 005040
1917
1918 002147' 000300 040000 MWORD <JMAP,J=4,S0A,AND,D=2> ; 3
1919 002150' 442000 000040
1920 002151' 000400 000000 MWORD <CONT,S0A,XNOR,D=0> ; 4
1921 002152' 470000 000340
1922 002153' 000500 000153 MWORD <CONT,S0Q,OR,D=0,SKCN,MGC=153> ; 5
1923 002154' 230000 240340
1924 002155' 000600 062004 MWORD <JMAP,J=6,S0Q,OR,D=1,SELE,MGC=4,OENA> ; 6
1925 002156' 231000 005040
1926 002157' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 27
DFPTA4 MAC 19-Jan-83 11:21 2901 Register File Tests SEQ 0955
1927
1928 ;#********************************************************************
1929 ;* Test 15 - 2901 Register Interference Test
1930 ;
1931 ; Description: Write address patterns to Registers 0-17 and Q,
1932 ; then read the registers and verify that correct
1933 ; data is read. Any error indicates that it was
1934 ; not possible to address the registers correctly.
1935 ;
1936 ; Procedure: Clear Port
1937 ; Load microcode
1938 ;
1939 ; Set RAR to 0
1940 ; Execute 16 (decimal) JMAP's times (to load 2901
1941 ; registers with address patterns)
1942 ;
1943 ; Set RAR to 21
1944 ; Execute JMAP
1945 ; Read EBUF, verify data (register address 0-20)
1946 ; (middle 16 bits are indeterminate)
1947 ;
1948 ; Do last 3 steps for registers 0-17,Q
1949 ;
1950 ; Failure: ---
1951 ;#********************************************************************
1952
1953 ; Test data
1954
1955 002160' 254 00 0 00 002171' TSTA15: JRST TG15 ; go start test
1956 002161' 420402 000015 EBUS!ALU!NDMP!ZALU!15 ; test mask
1957 002162' 002267' 007073' T15M,,[ASCIZ ^2901 Register Interference Test^]
1958 002163' 006620' 000000 [EXP MLAST!E23],,0
1959 002164' 000000 002374' TSTA16 ; failure test table
1960 002165' 000000 002653' TSTA17 ; ...
1961 002166' 000000 003130' TSTA20
1962 002167' 000000 003421' TSTA21
1963 002170' 777777 777777 -1
1964
1965 ; Start test
1966
1967 002171' 201 00 0 00 000000' TG15: MOVEI Z4 ; get address of module start
1968 002172' 260 17 0 00 002111* GO TRACE ; handle trace output
1969 002173' 201 01 0 00 002267' MOVEI 1,T15M ; set up microcode address
1970 002174' 260 17 0 00 002113* GO TLOAD ; load/verify it
1971 002175' 263 17 0 00 000000 RTN ; failed - exit test
1972
1973 ; Initialization
1974
1975 002176' 400 15 0 00 000000 TL15: SETZ ERFLG, ; clear error flag
1976 002177' 260 17 0 00 002116* GO IPACLR ; clear port
1977 002200' 402 00 0 00 002117* SETZM TSTSUB ; initialize subtest number
1978 002201' 201 06 0 00 002221' MOVEI 6,TS15 ; get sstep table address
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 28
DFPTA4 MAC 19-Jan-83 11:21 2901 Register File Tests SEQ 0956
1979
1980 ; Loop on single step table entries
1981
1982 002202' 260 17 0 00 002121* TA15: GO BEXEC ; execute table entry
1983 002203' 254 00 0 00 002220' JRST TX15 ; end of sstep table
1984 002204' 254 00 0 00 002202' JRST TA15 ; keep looping after call
1985 002205' 255 00 0 00 000000 JFCL ; error - EBUF data incorrect
1986 002206' 200 01 0 00 001404* MOVE 1,CEBUF ; get correct data
1987 002207' 404 01 0 00 006662' AND 1,[777400,,1777] ; mask out indeterminate bits
1988 002210' 200 02 0 00 001406* MOVE 2,AEBUF ; get actual data
1989 002211' 404 02 0 00 006662' AND 2,[777400,,1777] ; mask out indeterminate bits
1990 002212' 312 01 0 00 000002 CAME 1,2 ; result correct?
1991 002213' 474 15 0 00 000000 SETO ERFLG, ; no - set error flag
1992
1993 ; Handle error printouts and scope looping
1994
1995 002214' 027 00 0 00 002264' SCOPER MA15 ; print error message
1996 002215' 254 00 0 00 002176' JRST TL15 ; loop on error
1997 002216' 254 00 0 00 002220' JRST TX15 ; altmode exit
1998 002217' 322 15 0 00 002202' JUMPE ERFLG,TA15 ; do next sstep table entry
1999
2000 ; End of test
2001
2002 002220' 263 17 0 00 000000 TX15: RTN ; return
2003
2004 ; Sstep table, with EBUF data, as: (CMD,#Steps,Start addr,End Addr,EBUF data)
2005
2006 002221' 102200 000021 TS15: ATABLE (SSSTRT,^D18,0,21,0B9!0)
2007 002222' 000000 000000
2008 002223' 100100 220022 ATABLE (SSSTRT,1,22,22,1B9!1)
2009 002224' 000400 000001
2010 002225' 100100 230023 ATABLE (SSSTRT,1,23,23,2B9!2)
2011 002226' 001000 000002
2012 002227' 100100 240024 ATABLE (SSSTRT,1,24,24,3B9!3)
2013 002230' 001400 000003
2014 002231' 100100 250025 ATABLE (SSSTRT,1,25,25,4B9!4)
2015 002232' 002000 000004
2016 002233' 100100 260026 ATABLE (SSSTRT,1,26,26,5B9!5)
2017 002234' 002400 000005
2018 002235' 100100 270027 ATABLE (SSSTRT,1,27,27,6B9!6)
2019 002236' 003000 000006
2020 002237' 100100 300030 ATABLE (SSSTRT,1,30,30,7B9!7)
2021 002240' 003400 000007
2022 002241' 100100 310031 ATABLE (SSSTRT,1,31,31,10B9!10)
2023 002242' 004000 000010
2024 002243' 100100 320032 ATABLE (SSSTRT,1,32,32,11B9!11)
2025 002244' 004400 000011
2026 002245' 100100 330033 ATABLE (SSSTRT,1,33,33,12B9!12)
2027 002246' 005000 000012
2028 002247' 100100 340034 ATABLE (SSSTRT,1,34,34,13B9!13)
2029 002250' 005400 000013
2030 002251' 100100 350035 ATABLE (SSSTRT,1,35,35,14B9!14)
2031 002252' 006000 000014
2032 002253' 100100 360036 ATABLE (SSSTRT,1,36,36,15B9!15)
2033 002254' 006400 000015
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 28-1
DFPTA4 MAC 19-Jan-83 11:21 2901 Register File Tests SEQ 0957
2034 002255' 100100 370037 ATABLE (SSSTRT,1,37,37,16B9!16)
2035 002256' 007000 000016
2036 002257' 100100 400040 ATABLE (SSSTRT,1,40,40,17B9!17)
2037 002260' 007400 000017
2038 002261' 100100 410041 ATABLE (SSSTRT,1,41,41,20B9!20)
2039 002262' 010000 000020
2040 002263' 000000 000000 ATABLE (SSLAST)
2041
2042 ; Error messages
2043
2044 002264' 140000 007102' MA15: MSG!TXNOT![ASCIZ /Register conflict seen/]
2045 002265' 140000 006671' MSG!TXNOT![ASCIZ /(Result in EBUF - middle 16 bits indeterminate)/]
2046 002266' 000000000000# LAST!CALL!TXALL!BBPNT ; print sequencer data
2047
2048 ; Microcode: Write the registers
2049
2050 002267' 000000 010000 T15M: MWORD <ADDR=0,JMAP,J=1,A=17,B=0,SD0,OR,D=3,SKCN,MGC=0>
2051 002270' 733170 240040
2052 002271' 000100 000001 MWORD <CONT,A=16,B=1,SD0,OR,D=3,SKCN,MGC=1> ; 1
2053 002272' 733160 640340
2054 002273' 000200 000002 MWORD <CONT,A=15,B=2,SD0,OR,D=3,SKCN,MGC=2> ; 2
2055 002274' 733151 240340
2056 002275' 000300 000003 MWORD <CONT,A=14,B=3,SD0,OR,D=3,SKCN,MGC=3> ; 3
2057 002276' 733141 640340
2058 002277' 000400 000004 MWORD <CONT,A=13,B=4,SD0,OR,D=3,SKCN,MGC=4> ; 4
2059 002300' 733132 240340
2060 002301' 000500 000005 MWORD <CONT,A=12,B=5,SD0,OR,D=3,SKCN,MGC=5> ; 5
2061 002302' 733122 640340
2062 002303' 000600 000006 MWORD <CONT,A=11,B=6,SD0,OR,D=3,SKCN,MGC=6> ; 6
2063 002304' 733113 240340
2064 002305' 000700 000007 MWORD <CONT,A=10,B=7,SD0,OR,D=3,SKCN,MGC=7> ; 7
2065 002306' 733103 640340
2066 002307' 001000 000010 MWORD <CONT,A=7,B=10,SD0,OR,D=3,SKCN,MGC=10> ; 10
2067 002310' 733074 240340
2068 002311' 001100 000011 MWORD <CONT,A=6,B=11,SD0,OR,D=3,SKCN,MGC=11> ; 11
2069 002312' 733064 640340
2070 002313' 001200 000012 MWORD <CONT,A=5,B=12,SD0,OR,D=3,SKCN,MGC=12> ; 12
2071 002314' 733055 240340
2072 002315' 001300 000013 MWORD <CONT,A=4,B=13,SD0,OR,D=3,SKCN,MGC=13> ; 13
2073 002316' 733045 640340
2074 002317' 001400 000014 MWORD <CONT,A=3,B=14,SD0,OR,D=3,SKCN,MGC=14> ; 14
2075 002320' 733036 240340
2076 002321' 001500 000015 MWORD <CONT,A=2,B=15,SD0,OR,D=3,SKCN,MGC=15> ; 15
2077 002322' 733026 640340
2078 002323' 001600 000016 MWORD <CONT,A=1,B=16,SD0,OR,D=3,SKCN,MGC=16> ; 16
2079 002324' 733017 240340
2080 002325' 001700 000017 MWORD <CONT,A=0,B=17,SD0,OR,D=3,SKCN,MGC=17> ; 17
2081 002326' 733007 640340
2082 002327' 002000 000020 MWORD <CONT,A=0,B=0,SD0,OR,D=0,SKCN,MGC=20> ; 20
2083 002330' 730000 240340
2084
2085 ; Read them back and verify contents
2086
2087 002331' 002100 212004 MWORD <JMAP,J=21,A=0,S0A,OR,D=1,SELE,MGC=4,OENA> ; 21
2088 002332' 431000 005040
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 28-2
DFPTA4 MAC 19-Jan-83 11:21 2901 Register File Tests SEQ 0958
2089 002333' 002200 222004 MWORD <JMAP,J=22,A=1,S0A,OR,D=1,SELE,MGC=4,OENA> ; 22
2090 002334' 431010 005040
2091 002335' 002300 232004 MWORD <JMAP,J=23,A=2,S0A,OR,D=1,SELE,MGC=4,OENA> ; 23
2092 002336' 431020 005040
2093 002337' 002400 242004 MWORD <JMAP,J=24,A=3,S0A,OR,D=1,SELE,MGC=4,OENA> ; 24
2094 002340' 431030 005040
2095 002341' 002500 252004 MWORD <JMAP,J=25,A=4,S0A,OR,D=1,SELE,MGC=4,OENA> ; 25
2096 002342' 431040 005040
2097 002343' 002600 262004 MWORD <JMAP,J=26,A=5,S0A,OR,D=1,SELE,MGC=4,OENA> ; 26
2098 002344' 431050 005040
2099 002345' 002700 272004 MWORD <JMAP,J=27,A=6,S0A,OR,D=1,SELE,MGC=4,OENA> ; 27
2100 002346' 431060 005040
2101 002347' 003000 302004 MWORD <JMAP,J=30,A=7,S0A,OR,D=1,SELE,MGC=4,OENA> ; 30
2102 002350' 431070 005040
2103 002351' 003100 312004 MWORD <JMAP,J=31,A=10,S0A,OR,D=1,SELE,MGC=4,OENA> ; 31
2104 002352' 431100 005040
2105 002353' 003200 322004 MWORD <JMAP,J=32,A=11,S0A,OR,D=1,SELE,MGC=4,OENA> ; 32
2106 002354' 431110 005040
2107 002355' 003300 332004 MWORD <JMAP,J=33,A=12,S0A,OR,D=1,SELE,MGC=4,OENA> ; 33
2108 002356' 431120 005040
2109 002357' 003400 342004 MWORD <JMAP,J=34,A=13,S0A,OR,D=1,SELE,MGC=4,OENA> ; 34
2110 002360' 431130 005040
2111 002361' 003500 352004 MWORD <JMAP,J=35,A=14,S0A,OR,D=1,SELE,MGC=4,OENA> ; 35
2112 002362' 431140 005040
2113 002363' 003600 362004 MWORD <JMAP,J=36,A=15,S0A,OR,D=1,SELE,MGC=4,OENA> ; 36
2114 002364' 431150 005040
2115 002365' 003700 372004 MWORD <JMAP,J=37,A=16,S0A,OR,D=1,SELE,MGC=4,OENA> ; 37
2116 002366' 431160 005040
2117 002367' 004000 402004 MWORD <JMAP,J=40,A=17,S0A,OR,D=1,SELE,MGC=4,OENA> ; 40
2118 002370' 431170 005040
2119 002371' 004100 412004 MWORD <JMAP,J=41,A=0,S0Q,OR,D=1,SELE,MGC=4,OENA> ; 41
2120 002372' 231000 005040
2121 002373' 777777 777777 -1
2122
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 29
DFPTA4 MAC 19-Jan-83 11:21 2901 ALU Function Tests SEQ 0959
2123 SUBTTL 2901 ALU Function Tests
2124
2125 ;#********************************************************************
2126 ; This section consists of more complete ALU testing using all
2127 ; combinations of source operands and doing all ALU functions
2128 ; on them. For the logical operations tests, the state of the
2129 ; carry in bit should have no effect - it is randomly sprinkled
2130 ; through the tests.
2131 ;#********************************************************************
2132
2133 ;#********************************************************************
2134 ;* Test 16 - 2901 OR Test
2135 ;
2136 ; Description: Verify that 0's OR 0's ==> 0's
2137 ; Verify that 0's OR 1's ==> 1's
2138 ; Verify that 1's OR 1's ==> 1's
2139 ;
2140 ; Procedure: Clear Port
2141 ; Load microcode
2142 ;
2143 ; Set RAR to 0
2144 ; Execute 34. JMAP's
2145 ; Read EBUF (Contains contents of Reg 0)
2146 ; Verify data is correct (0's)
2147 ;
2148 ; Set RAR to 42
2149 ; Execute JMAP
2150 ; Read EBUF (Contains contents of Q-Reg)
2151 ; Verify data is correct (0's)
2152 ;
2153 ; Set RAR to 43
2154 ; Execute 17. JMAP's
2155 ; Read EBUF (Contains contents of Reg 0)
2156 ; Verify data is correct (1's)
2157 ;
2158 ; Set RAR to 64
2159 ; Execute JMAP
2160 ; Read EBUF (Contains contents of Q-Reg)
2161 ; Verify data is correct (1's)
2162 ;
2163 ; Set RAR to 65
2164 ; Execute 12. JMAP's
2165 ; Read EBUF (Contains contents of Reg 0)
2166 ; Verify data is correct (1's)
2167 ;
2168 ; Set RAR to 101
2169 ; Execute JMAP
2170 ; Read EBUF (Contains contents of Q-Reg)
2171 ; Verify data is correct (1's)
2172 ;
2173 ; Failure: ---
2174 ;#********************************************************************
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 30
DFPTA4 MAC 19-Jan-83 11:21 2901 ALU Function Tests SEQ 0960
2175
2176 ; Test data
2177
2178 002374' 254 00 0 00 002405' TSTA16: JRST TG16 ; go start test
2179 002375' 420402 000016 EBUS!ALU!NDMP!ZALU!16 ; test mask
2180 002376' 002446' 007107' T16M,,[ASCIZ ^2901 OR Test^]
2181 002377' 006620' 000000 [EXP MLAST!E23],,0
2182 002400' 000000 002653' TSTA17 ; failure test table
2183 002401' 000000 003130' TSTA20 ; ...
2184 002402' 000000 003421' TSTA21
2185 002403' 000000 003764' TSTA22
2186 002404' 777777 777777 -1
2187
2188 ; Start test
2189
2190 002405' 201 00 0 00 000000' TG16: MOVEI Z4 ; get address of module start
2191 002406' 260 17 0 00 002172* GO TRACE ; handle trace output
2192 002407' 201 01 0 00 002446' MOVEI 1,T16M ; set up microcode address
2193 002410' 260 17 0 00 002174* GO TLOAD ; load/verify it
2194 002411' 263 17 0 00 000000 RTN ; failed - exit test
2195
2196 ; Initialization
2197
2198 002412' 400 15 0 00 000000 TL16: SETZ ERFLG, ; clear error flag
2199 002413' 260 17 0 00 002177* GO IPACLR ; clear port
2200 002414' 402 00 0 00 002200* SETZM TSTSUB ; initialize subtest number
2201 002415' 201 06 0 00 002427' MOVEI 6,TS16 ; get sstep table address
2202
2203 ; Loop on single step table entries
2204
2205 002416' 260 17 0 00 002202* TA16: GO BEXEC ; execute table entry
2206 002417' 254 00 0 00 002426' JRST TX16 ; end of sstep table
2207 002420' 254 00 0 00 002416' JRST TA16 ; keep looping after call
2208 002421' 474 15 0 00 000000 SETO ERFLG, ; error - EBUF data incorrect
2209
2210 ; Handle error printouts and scope looping
2211
2212 002422' 027 00 0 00 002444' SCOPER MA16 ; print error message
2213 002423' 254 00 0 00 002412' JRST TL16 ; loop on error
2214 002424' 254 00 0 00 002426' JRST TX16 ; altmode exit
2215 002425' 322 15 0 00 002416' JUMPE ERFLG,TA16 ; do next sstep table entry
2216
2217 ; End of test
2218
2219 002426' 263 17 0 00 000000 TX16: RTN ; return
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 31
DFPTA4 MAC 19-Jan-83 11:21 2901 ALU Function Tests SEQ 0961
2220
2221 ; Sstep table, with EBUF data, as: (CMD,#Steps,Start addr,End Addr,EBUF data)
2222
2223 002427' 104200 000041 TS16: ATABLE (SSSTRT,^D34,0,41,0)
2224 002430' 000000 000000
2225 002431' 100100 420042 ATABLE (SSSTRT,1,42,42,0)
2226 002432' 000000 000000
2227 002433' 102100 430063 ATABLE (SSSTRT,^D17,43,63,-1)
2228 002434' 777777 777777
2229 002435' 100100 640064 ATABLE (SSSTRT,1,64,64,-1)
2230 002436' 777777 777777
2231 002437' 101400 650100 ATABLE (SSSTRT,^D12,65,100,-1)
2232 002440' 777777 777777
2233 002441' 100101 010101 ATABLE (SSSTRT,1,101,101,-1)
2234 002442' 777777 777777
2235 002443' 000000 000000 ATABLE (SSLAST)
2236
2237 ; Error messages
2238
2239 002444' 140000 007112' MA16: MSG!TXNOT![ASCIZ /2901 not doing an OR function properly (result in EBUF)/]
2240 002445' 000000000000# LAST!CALL!TXALL!BBPNT ; print sequencer data
2241
2242 ; Microcode: Verify that 0's OR 0's ==> 0's
2243
2244 002446' 000000 010000 T16M: MWORD <ADDR=0,JMAP,J=1,SD0,AND,D=3> ; 0
2245 002447' 743000 000040
2246 002450' 000100 000000 MWORD <CONT,S0A,OR,D=0> ; 1
2247 002451' 430000 000340
2248 002452' 000200 000000 MWORD <CONT,S0A,OR,D=1> ; 2
2249 002453' 431000 000340
2250 002454' 000300 000000 MWORD <CONT,S0A,OR,D=2> ; 3
2251 002455' 432000 000340
2252 002456' 000400 000000 MWORD <CONT,S0A,OR,D=3> ; 4
2253 002457' 433000 000340
2254 002460' 000500 000000 MWORD <CONT,S0A,OR,D=4> ; 5
2255 002461' 434000 000340
2256 002462' 000600 000000 MWORD <CONT,S0A,OR,D=5> ; 6
2257 002463' 435000 000340
2258 002464' 000700 000000 MWORD <CONT,S0A,OR,D=6> ; 7
2259 002465' 436000 000340
2260 002466' 001000 000000 MWORD <CONT,S0A,OR,D=7> ; 10
2261 002467' 437000 000340
2262 002470' 001100 000000 MWORD <CONT,SAQ,OR,D=0,CRY> ; 11
2263 002471' 030000 000740
2264 002472' 001200 000000 MWORD <CONT,SAQ,OR,D=1,CRY> ; 12
2265 002473' 031000 000740
2266 002474' 001300 000000 MWORD <CONT,SAQ,OR,D=2,CRY> ; 13
2267 002475' 032000 000740
2268 002476' 001400 000000 MWORD <CONT,SAQ,OR,D=3,CRY> ; 14
2269 002477' 033000 000740
2270 002500' 001500 000000 MWORD <CONT,SAQ,OR,D=4,CRY> ; 15
2271 002501' 034000 000740
2272 002502' 001600 000000 MWORD <CONT,SAQ,OR,D=5,CRY> ; 16
2273 002503' 035000 000740
2274 002504' 001700 000000 MWORD <CONT,SAQ,OR,D=6,CRY> ; 17
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 31-1
DFPTA4 MAC 19-Jan-83 11:21 2901 ALU Function Tests SEQ 0962
2275 002505' 036000 000740
2276 002506' 002000 000000 MWORD <CONT,SAQ,OR,D=7,CRY> ; 20
2277 002507' 037000 000740
2278 002510' 002100 000000 MWORD <CONT,S0Q,OR,D=0> ; 21
2279 002511' 230000 000340
2280 002512' 002200 000000 MWORD <CONT,S0Q,OR,D=1> ; 22
2281 002513' 231000 000340
2282 002514' 002300 000000 MWORD <CONT,S0Q,OR,D=2> ; 23
2283 002515' 232000 000340
2284 002516' 002400 000000 MWORD <CONT,S0Q,OR,D=3> ; 24
2285 002517' 233000 000340
2286 002520' 002500 000000 MWORD <CONT,S0Q,OR,D=4> ; 25
2287 002521' 234000 000340
2288 002522' 002600 000000 MWORD <CONT,S0Q,OR,D=5> ; 26
2289 002523' 235000 000340
2290 002524' 002700 000000 MWORD <CONT,S0Q,OR,D=6,CRY> ; 27
2291 002525' 236000 000740
2292 002526' 003000 000000 MWORD <CONT,S0Q,OR,D=7> ; 30
2293 002527' 237000 000340
2294 002530' 003100 000000 MWORD <CONT,S0B,OR,D=0> ; 31
2295 002531' 330000 000340
2296 002532' 003200 000000 MWORD <CONT,S0B,OR,D=1> ; 32
2297 002533' 331000 000340
2298 002534' 003300 000000 MWORD <CONT,S0B,OR,D=2> ; 33
2299 002535' 332000 000340
2300 002536' 003400 000000 MWORD <CONT,S0B,OR,D=3> ; 34
2301 002537' 333000 000340
2302 002540' 003500 000000 MWORD <CONT,S0B,OR,D=4,CRY> ; 35
2303 002541' 334000 000740
2304 002542' 003600 000000 MWORD <CONT,S0B,OR,D=5> ; 36
2305 002543' 335000 000340
2306 002544' 003700 000000 MWORD <CONT,S0B,OR,D=6> ; 37
2307 002545' 336000 000340
2308 002546' 004000 000000 MWORD <CONT,S0B,OR,D=7> ; 40
2309 002547' 337000 000340
2310 002550' 004100 412004 MWORD <JMAP,J=41,S0A,OR,D=1,SELE,MGC=4,OENA> ; 41
2311 002551' 431000 005040
2312 002552' 004200 422004 MWORD <JMAP,J=42,S0Q,OR,D=1,SELE,MGC=4,OENA> ; 42
2313 002553' 231000 005040
2314
2315 ; Verify that 0's OR 1's ==> 1's
2316
2317 002554' 004300 440000 MWORD <JMAP,J=44,SD0,AND,D=3> ; 43
2318 002555' 743000 000040
2319 002556' 004400 000000 MWORD <CONT,S0A,XNOR,D=0> ; 44
2320 002557' 470000 000340
2321 002560' 004500 000000 MWORD <CONT,S0Q,OR,D=0> ; 45
2322 002561' 230000 000340
2323 002562' 004600 000000 MWORD <CONT,S0Q,OR,D=1> ; 46
2324 002563' 231000 000340
2325 002564' 004700 000000 MWORD <CONT,S0Q,OR,D=3> ; 47
2326 002565' 233000 000340
2327 002566' 005000 000000 MWORD <CONT,S0Q,OR,D=5> ; 50
2328 002567' 235000 000340
2329 002570' 005100 000000 MWORD <CONT,S0Q,OR,D=7,CRY> ; 51
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 31-2
DFPTA4 MAC 19-Jan-83 11:21 2901 ALU Function Tests SEQ 0963
2330 002571' 237000 000740
2331 002572' 005200 000000 MWORD <CONT,S0Q,OR,D=2> ; 52
2332 002573' 232000 000340
2333 002574' 005300 000000 MWORD <CONT,S0A,OR,D=0,CRY> ; 53
2334 002575' 430000 000740
2335 002576' 005400 000000 MWORD <CONT,S0A,OR,D=1,CRY> ; 54
2336 002577' 431000 000740
2337 002600' 005500 000000 MWORD <CONT,S0A,OR,D=2> ; 55
2338 002601' 432000 000340
2339 002602' 005600 000000 MWORD <CONT,S0A,OR,D=3,CRY> ; 56
2340 002603' 433000 000740
2341 002604' 005700 000000 MWORD <CONT,S0B,OR,D=0,CRY> ; 57
2342 002605' 330000 000740
2343 002606' 006000 000000 MWORD <CONT,S0B,OR,D=1> ; 60
2344 002607' 331000 000340
2345 002610' 006100 000000 MWORD <CONT,S0B,OR,D=2> ; 61
2346 002611' 332000 000340
2347 002612' 006200 000000 MWORD <CONT,S0B,OR,D=3> ; 62
2348 002613' 333000 000340
2349 002614' 006300 632004 MWORD <JMAP,J=63,S0A,OR,D=1,SELE,MGC=4,OENA> ; 63
2350 002615' 431000 005040
2351 002616' 006400 642004 MWORD <JMAP,J=64,S0Q,OR,D=1,SELE,MGC=4,OENA> ; 64
2352 002617' 231000 005040
2353
2354 ; Verify that 1's OR 1's ==> 1's
2355
2356 002620' 006500 660000 MWORD <JMAP,J=66,SD0,AND,D=3> ; 65
2357 002621' 743000 000040
2358 002622' 006600 000000 MWORD <CONT,S0A,XNOR,D=0> ; 66
2359 002623' 470000 000340
2360 002624' 006700 000000 MWORD <CONT,S0Q,OR,D=2> ; 67
2361 002625' 232000 000340
2362 002626' 007000 000000 MWORD <CONT,SAQ,OR,D=0,CRY> ; 70
2363 002627' 030000 000740
2364 002630' 007100 000000 MWORD <CONT,SAQ,OR,D=1> ; 71
2365 002631' 031000 000340
2366 002632' 007200 000000 MWORD <CONT,SAQ,OR,D=2,CRY> ; 72
2367 002633' 032000 000740
2368 002634' 007300 000000 MWORD <CONT,SAQ,OR,D=3> ; 73
2369 002635' 033000 000340
2370 002636' 007400 000000 MWORD <CONT,SAB,OR,D=0> ; 74
2371 002637' 130000 000340
2372 002640' 007500 000000 MWORD <CONT,SAB,OR,D=1,CRY> ; 75
2373 002641' 131000 000740
2374 002642' 007600 000000 MWORD <CONT,SAB,OR,D=2> ; 76
2375 002643' 132000 000340
2376 002644' 007700 000000 MWORD <CONT,SAB,OR,D=3> ; 77
2377 002645' 133000 000340
2378 002646' 010001 002004 MWORD <JMAP,J=100,S0A,OR,D=1,SELE,MGC=4,OENA> ; 100
2379 002647' 431000 005040
2380 002650' 010101 012004 MWORD <JMAP,J=101,S0Q,OR,D=1,SELE,MGC=4,OENA> ; 101
2381 002651' 231000 005040
2382 002652' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 32
DFPTA4 MAC 19-Jan-83 11:21 2901 ALU Function Tests SEQ 0964
2383
2384 ;#********************************************************************
2385 ;* Test 17 - 2901 AND Test
2386 ;
2387 ; Description: Verify that 0's AND 0's ==> 0's
2388 ; Verify that 0's AND 1's ==> 0's
2389 ; Verify that 1's AND 1's ==> 1's
2390 ;
2391 ; Procedure: Clear Port
2392 ; Load microcode
2393 ;
2394 ; Set RAR to 0
2395 ; Execute 36. JMAP's
2396 ; Read EBUF (Contains contents of Reg 0)
2397 ; Verify data is correct (0's)
2398 ;
2399 ; Set RAR to 44
2400 ; Execute 20. JMAP's
2401 ; Read EBUF (Contains contents of Reg 0)
2402 ; Verify data is correct (0's)
2403 ;
2404 ; Set RAR to 70
2405 ; Execute 12. JMAP's
2406 ; Read EBUF (Contains contents of Reg 0)
2407 ; Verify data is correct (1's)
2408 ;
2409 ; Failure: ---
2410 ;#********************************************************************
2411
2412 ; Test data
2413
2414 002653' 254 00 0 00 002664' TSTA17: JRST TG17 ; go start test
2415 002654' 420402 000017 EBUS!ALU!NDMP!ZALU!17 ; test mask
2416 002655' 002717' 007126' T17M,,[ASCIZ ^2901 AND Test^]
2417 002656' 006620' 000000 [EXP MLAST!E23],,0
2418 002657' 000000 003130' TSTA20 ; failure test table
2419 002660' 000000 003421' TSTA21 ; ...
2420 002661' 000000 003764' TSTA22
2421 002662' 000000 004445' TSTA23
2422 002663' 777777 777777 -1
2423
2424 ; Start test
2425
2426 002664' 201 00 0 00 000000' TG17: MOVEI Z4 ; get address of module start
2427 002665' 260 17 0 00 002406* GO TRACE ; handle trace output
2428 002666' 201 01 0 00 002717' MOVEI 1,T17M ; set up microcode address
2429 002667' 260 17 0 00 002410* GO TLOAD ; load/verify it
2430 002670' 263 17 0 00 000000 RTN ; failed - exit test
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 33
DFPTA4 MAC 19-Jan-83 11:21 2901 ALU Function Tests SEQ 0965
2431
2432 ; Initialization
2433
2434 002671' 400 15 0 00 000000 TL17: SETZ ERFLG, ; clear error flag
2435 002672' 260 17 0 00 002413* GO IPACLR ; clear port
2436 002673' 402 00 0 00 002414* SETZM TSTSUB ; initialize subtest number
2437 002674' 201 06 0 00 002706' MOVEI 6,TS17 ; get sstep table address
2438
2439 ; Loop on single step table entries
2440
2441 002675' 260 17 0 00 002416* TA17: GO BEXEC ; execute table entry
2442 002676' 254 00 0 00 002705' JRST TX17 ; end of sstep table
2443 002677' 254 00 0 00 002675' JRST TA17 ; keep looping after call
2444 002700' 474 15 0 00 000000 SETO ERFLG, ; error - EBUF data incorrect
2445
2446 ; Handle error printouts and scope looping
2447
2448 002701' 027 00 0 00 002715' SCOPER MA17 ; print error message
2449 002702' 254 00 0 00 002671' JRST TL17 ; loop on error
2450 002703' 254 00 0 00 002705' JRST TX17 ; altmode exit
2451 002704' 322 15 0 00 002675' JUMPE ERFLG,TA17 ; do next sstep table entry
2452
2453 ; End of test
2454
2455 002705' 263 17 0 00 000000 TX17: RTN ; return
2456
2457 ; Sstep table, with EBUF data, as: (CMD,#Steps,Start addr,End Addr,EBUF data)
2458
2459 002706' 104400 000043 TS17: ATABLE (SSSTRT,^D36,0,43,0)
2460 002707' 000000 000000
2461 002710' 102400 440067 ATABLE (SSSTRT,^D20,44,67,0)
2462 002711' 000000 000000
2463 002712' 101400 700103 ATABLE (SSSTRT,^D12,70,103,-1)
2464 002713' 777777 777777
2465 002714' 000000 000000 ATABLE (SSLAST)
2466
2467 ; Error messages
2468
2469 002715' 140000 007131' MA17: MSG!TXNOT![ASCIZ /2901 not doing an AND function properly (result in EBUF)/]
2470 002716' 000000000000# LAST!CALL!TXALL!BBPNT ; print sequencer data
2471
2472 ; Microcode: Verify that 0's AND 0's ==> 0's
2473
2474 002717' 000000 010000 T17M: MWORD <ADDR=0,JMAP,J=1,B=1,SD0,AND,D=2>
2475 002720' 742000 400040
2476 002721' 000100 000000 MWORD <CONT,S0A,AND,D=0> ; 1
2477 002722' 440000 000340
2478 002723' 000200 000000 MWORD <CONT,A=1,SAQ,OR,D=0> ; 2
2479 002724' 030010 000340
2480 002725' 000300 000000 MWORD <CONT,B=1,S0A,AND,D=2> ; 3
2481 002726' 442000 400340
2482 002727' 000400 000000 MWORD <CONT,A=1,SAQ,OR,D=0> ; 4
2483 002730' 030010 000340
2484 002731' 000500 000000 MWORD <CONT,B=1,S0A,AND,D=3> ; 5
2485 002732' 443000 400340
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 33-1
DFPTA4 MAC 19-Jan-83 11:21 2901 ALU Function Tests SEQ 0966
2486 002733' 000600 000000 MWORD <CONT,A=1,SAQ,OR,D=0> ; 6
2487 002734' 030010 000340
2488 002735' 000700 000000 MWORD <CONT,B=1,S0A,AND,D=5,CRY> ; 7
2489 002736' 445000 400740
2490 002737' 001000 000000 MWORD <CONT,A=1,SAQ,OR,D=0> ; 10
2491 002740' 030010 000340
2492 002741' 001100 000000 MWORD <CONT,B=1,S0A,AND,D=7,CRY> ; 11
2493 002742' 447000 400740
2494 002743' 001200 000000 MWORD <CONT,A=1,SAQ,OR,D=0> ; 12
2495 002744' 030010 000340
2496 002745' 001300 000000 MWORD <CONT,B=1,SAQ,AND,D=2,CRY> ; 13
2497 002746' 042000 400740
2498 002747' 001400 000000 MWORD <CONT,A=1,SAQ,OR,D=0> ; 14
2499 002750' 030010 000340
2500 002751' 001500 000000 MWORD <CONT,B=1,SAQ,AND,D=3,CRY> ; 15
2501 002752' 043000 400740
2502 002753' 001600 000000 MWORD <CONT,A=1,SAQ,OR,D=0> ; 16
2503 002754' 030010 000340
2504 002755' 001700 000000 MWORD <CONT,B=1,SAQ,AND,D=5> ; 17
2505 002756' 045000 400340
2506 002757' 002000 000000 MWORD <CONT,A=1,SAQ,OR,D=0> ; 20
2507 002760' 030010 000340
2508 002761' 002100 000000 MWORD <CONT,B=1,SAQ,AND,D=7> ; 21
2509 002762' 047000 400340
2510 002763' 002200 000000 MWORD <CONT,A=1,SAQ,OR,D=0> ; 22
2511 002764' 030010 000340
2512 002765' 002300 000000 MWORD <CONT,B=1,S0Q,AND,D=2> ; 23
2513 002766' 242000 400340
2514 002767' 002400 000000 MWORD <CONT,A=1,SAQ,OR,D=0> ; 24
2515 002770' 030010 000340
2516 002771' 002500 000000 MWORD <CONT,B=1,S0Q,AND,D=3,CRY> ; 25
2517 002772' 243000 400740
2518 002773' 002600 000000 MWORD <CONT,A=1,SAQ,OR,D=0> ; 26
2519 002774' 030010 000340
2520 002775' 002700 000000 MWORD <CONT,B=1,S0Q,AND,D=5,CRY> ; 27
2521 002776' 245000 400740
2522 002777' 003000 000000 MWORD <CONT,A=1,SAQ,OR,D=0> ; 30
2523 003000' 030010 000340
2524 003001' 003100 000000 MWORD <CONT,B=1,S0Q,AND,D=7> ; 31
2525 003002' 247000 400340
2526 003003' 003200 000000 MWORD <CONT,A=1,SAQ,OR,D=0> ; 32
2527 003004' 030010 000340
2528 003005' 003300 000000 MWORD <CONT,S0B,AND,D=2> ; 33
2529 003006' 342000 000340
2530 003007' 003400 000000 MWORD <CONT,A=1,SAQ,OR,D=0> ; 34
2531 003010' 030010 000340
2532 003011' 003500 000000 MWORD <CONT,S0B,AND,D=3,CRY> ; 35
2533 003012' 343000 000740
2534 003013' 003600 000000 MWORD <CONT,A=1,SAQ,OR,D=0> ; 36
2535 003014' 030010 000340
2536 003015' 003700 000000 MWORD <CONT,S0B,AND,D=5> ; 37
2537 003016' 345000 000340
2538 003017' 004000 000000 MWORD <CONT,A=1,SAQ,OR,D=0> ; 40
2539 003020' 030010 000340
2540 003021' 004100 000000 MWORD <CONT,S0B,AND,D=7,CRY> ; 41
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 33-2
DFPTA4 MAC 19-Jan-83 11:21 2901 ALU Function Tests SEQ 0967
2541 003022' 347000 000740
2542 003023' 004200 000000 MWORD <CONT,A=1,SAQ,OR,D=0> ; 42
2543 003024' 030010 000340
2544 003025' 004300 432004 MWORD <JMAP,J=43,S0Q,OR,D=1,SELE,MGC=4,OENA> ; 43
2545 003026' 231000 005040
2546
2547 ; Verify that 0's AND 1's ==> 0's
2548
2549 003027' 004400 450000 MWORD <JMAP,J=45,SD0,AND,B=17,D=2> ; 44
2550 003030' 742007 400040
2551 003031' 004500 000000 MWORD <CONT,S0A,A=17,XNOR,D=0> ; 45
2552 003032' 470170 000340
2553 003033' 004600 000000 MWORD <CONT,S0A,A=17,XNOR,D=2> ; 46
2554 003034' 472170 000340
2555 003035' 004700 000000 MWORD <CONT,B=1,S0Q,AND,D=2,CRY> ; 47
2556 003036' 242000 400740
2557 003037' 005000 000000 MWORD <CONT,A=1,B=17,SAB,OR,D=2> ; 50
2558 003040' 132017 400340
2559 003041' 005100 000000 MWORD <CONT,B=1,S0Q,AND,D=3,CRY> ; 51
2560 003042' 243000 400740
2561 003043' 005200 000000 MWORD <CONT,A=1,B=17,SAB,OR,D=2> ; 52
2562 003044' 132017 400340
2563 003045' 005300 000000 MWORD <CONT,B=1,S0Q,AND,D=5,CRY> ; 53
2564 003046' 245000 400740
2565 003047' 005400 000000 MWORD <CONT,A=1,B=17,SAB,OR,D=2> ; 54
2566 003050' 132017 400340
2567 003051' 005500 000000 MWORD <CONT,B=1,S0Q,AND,D=7,CRY> ; 55
2568 003052' 247000 400740
2569 003053' 005600 000000 MWORD <CONT,A=1,B=17,SAB,OR,D=2> ; 56
2570 003054' 132017 400340
2571 003055' 005700 000000 MWORD <CONT,B=1,S0A,AND,D=2> ; 57
2572 003056' 442000 400340
2573 003057' 006000 000000 MWORD <CONT,A=1,B=17,SAB,OR,D=2> ; 60
2574 003060' 132017 400340
2575 003061' 006100 000000 MWORD <CONT,B=1,S0A,AND,D=3> ; 61
2576 003062' 443000 400340
2577 003063' 006200 000000 MWORD <CONT,A=1,B=17,SAB,OR,D=2> ; 62
2578 003064' 132017 400340
2579 003065' 006300 000000 MWORD <CONT,B=1,S0A,AND,D=5,CRY> ; 63
2580 003066' 445000 400740
2581 003067' 006400 000000 MWORD <CONT,A=1,B=17,SAB,OR,D=2> ; 64
2582 003070' 132017 400340
2583 003071' 006500 000000 MWORD <CONT,B=1,S0A,AND,D=7,CRY> ; 65
2584 003072' 447000 400740
2585 003073' 006600 000000 MWORD <CONT,A=1,B=17,SAB,OR,D=2> ; 66
2586 003074' 132017 400340
2587 003075' 006700 672004 MWORD <JMAP,J=67,A=17,S0A,OR,D=1,SELE,MGC=4,OENA> ; 67
2588 003076' 431170 005040
2589
2590 ; Verify that 1's AND 1's ==> 1's
2591
2592 003077' 007000 710000 MWORD <JMAP,J=71,SD0,AND,D=3> ; 70
2593 003100' 743000 000040
2594 003101' 007100 000000 MWORD <CONT,S0A,XNOR,D=0> ; 71
2595 003102' 470000 000340
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 33-3
DFPTA4 MAC 19-Jan-83 11:21 2901 ALU Function Tests SEQ 0968
2596 003103' 007200 000000 MWORD <CONT,S0A,XNOR,D=2> ; 72
2597 003104' 472000 000340
2598 003105' 007300 000000 MWORD <CONT,SAQ,AND,D=0> ; 73
2599 003106' 040000 000340
2600 003107' 007400 000000 MWORD <CONT,SAQ,AND,D=1,CRY> ; 74
2601 003110' 041000 000740
2602 003111' 007500 000000 MWORD <CONT,SAQ,AND,D=2,CRY> ; 75
2603 003112' 042000 000740
2604 003113' 007600 000000 MWORD <CONT,SAQ,AND,D=3,CRY> ; 76
2605 003114' 043000 000740
2606 003115' 007700 000000 MWORD <CONT,SAB,AND,D=0,CRY> ; 77
2607 003116' 140000 000740
2608 003117' 010000 000000 MWORD <CONT,SAB,AND,D=1> ; 100
2609 003120' 141000 000340
2610 003121' 010100 000000 MWORD <CONT,SAB,AND,D=2> ; 101
2611 003122' 142000 000340
2612 003123' 010200 000000 MWORD <CONT,SAB,AND,D=3> ; 102
2613 003124' 143000 000340
2614 003125' 010301 032004 MWORD <JMAP,J=103,SAQ,AND,D=1,SELE,MGC=4,OENA> ; 103
2615 003126' 041000 005040
2616 003127' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 34
DFPTA4 MAC 19-Jan-83 11:21 2901 ALU Function Tests SEQ 0969
2617
2618 ;#********************************************************************
2619 ;* Test 20 - 2901 NOT_R_AND_S Test
2620 ;
2621 ; Description: Verify that 0's NOT_R_AND_S 0's ==> 0's
2622 ; Verify that 1's NOT_R_AND_S 1's ==> 0's
2623 ; Verify that 0's NOT_R_AND_S 1's ==> 1's
2624 ;
2625 ; Procedure: Clear Port
2626 ; Load microcode
2627 ;
2628 ; Set RAR to 0
2629 ; Execute 36. JMAP's
2630 ; Read EBUF (Contains contents of Reg 17)
2631 ; Verify data is correct (0's)
2632 ;
2633 ; Set RAR to 44
2634 ; Execute 24. JMAP's
2635 ; Read EBUF (Contains contents of Reg 17)
2636 ; Verify data is correct (0's)
2637 ;
2638 ; Set RAR to 73
2639 ; Execute 14. JMAP's
2640 ; Read EBUF (Contains contents of Reg 0 and Q)
2641 ; Verify data is correct (1's)
2642 ;
2643 ; Failure: ---
2644 ;#********************************************************************
2645
2646 ; Test data
2647
2648 003130' 254 00 0 00 003141' TSTA20: JRST TG20 ; go start test
2649 003131' 420402 000020 EBUS!ALU!NDMP!ZALU!20 ; test mask
2650 003132' 003174' 007145' T20M,,[ASCIZ ^2901 NOT_R_AND_S Test^]
2651 003133' 006620' 000000 [EXP MLAST!E23],,0
2652 003134' 000000 003421' TSTA21 ; failure test table
2653 003135' 000000 003764' TSTA22 ; ...
2654 003136' 000000 004445' TSTA23
2655 003137' 000000 004752' TSTA24
2656 003140' 777777 777777 -1
2657
2658 ; Start test
2659
2660 003141' 201 00 0 00 000000' TG20: MOVEI Z4 ; get address of module start
2661 003142' 260 17 0 00 002665* GO TRACE ; handle trace output
2662 003143' 201 01 0 00 003174' MOVEI 1,T20M ; set up microcode address
2663 003144' 260 17 0 00 002667* GO TLOAD ; load/verify it
2664 003145' 263 17 0 00 000000 RTN ; failed - exit test
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 35
DFPTA4 MAC 19-Jan-83 11:21 2901 ALU Function Tests SEQ 0970
2665
2666 ; Initialization
2667
2668 003146' 400 15 0 00 000000 TL20: SETZ ERFLG, ; clear error flag
2669 003147' 260 17 0 00 002672* GO IPACLR ; clear port
2670 003150' 402 00 0 00 002673* SETZM TSTSUB ; initialize subtest number
2671 003151' 201 06 0 00 003163' MOVEI 6,TS20 ; get sstep table address
2672
2673 ; Loop on single step table entries
2674
2675 003152' 260 17 0 00 002675* TA20: GO BEXEC ; execute table entry
2676 003153' 254 00 0 00 003162' JRST TX20 ; end of sstep table
2677 003154' 254 00 0 00 003152' JRST TA20 ; keep looping after call
2678 003155' 474 15 0 00 000000 SETO ERFLG, ; error - EBUF data incorrect
2679
2680 ; Handle error printouts and scope looping
2681
2682 003156' 027 00 0 00 003172' SCOPER MA20 ; print error message
2683 003157' 254 00 0 00 003146' JRST TL20 ; loop on error
2684 003160' 254 00 0 00 003162' JRST TX20 ; altmode exit
2685 003161' 322 15 0 00 003152' JUMPE ERFLG,TA20 ; do next sstep table entry
2686
2687 ; End of test
2688
2689 003162' 263 17 0 00 000000 TX20: RTN ; return
2690
2691 ; Sstep table, with EBUF data, as: (CMD,#Steps,Start addr,End Addr,EBUF data)
2692
2693 003163' 104400 000043 TS20: ATABLE (SSSTRT,^D36,0,43,0)
2694 003164' 000000 000000
2695 003165' 103000 440073 ATABLE (SSSTRT,^D24,44,73,0)
2696 003166' 000000 000000
2697 003167' 101600 740111 ATABLE (SSSTRT,^D14,74,111,-1)
2698 003170' 777777 777777
2699 003171' 000000 000000 ATABLE (SSLAST)
2700
2701 ; Error messages
2702
2703 003172' 140000 007152' MA20: MSG!TXNOT![ASCIZ /2901 not doing an NAND function properly (result in EBUF)/]
2704 003173' 000000000000# LAST!CALL!TXALL!BBPNT ; print sequencer data
2705
2706 ; Microcode: Verify that 0's NOT_R_AND_S 0's ==> 0's
2707
2708 003174' 000000 010000 T20M: MWORD <ADDR=0,JMAP,J=1,SD0,AND,D=3> ; 0
2709 003175' 743000 000040
2710 003176' 000100 000000 MWORD <CONT,B=17,SD0,AND,D=3> ; 1
2711 003177' 743007 400340
2712 003200' 000200 000000 MWORD <CONT,SD0,AND,D=0> ; 2
2713 003201' 740000 000340
2714 003202' 000300 000000 MWORD <CONT,B=1,SAQ,NAND,D=2,CRY> ; 3
2715 003203' 052000 400740
2716 003204' 000400 000000 MWORD <CONT,A=1,B=17,SAB,OR,D=2> ; 4
2717 003205' 132017 400340
2718 003206' 000500 000000 MWORD <CONT,B=1,SAQ,NAND,D=3,CRY> ; 5
2719 003207' 053000 400740
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 35-1
DFPTA4 MAC 19-Jan-83 11:21 2901 ALU Function Tests SEQ 0971
2720 003210' 000600 000000 MWORD <CONT,A=1,B=17,SAB,OR,D=2> ; 6
2721 003211' 132017 400340
2722 003212' 000700 000000 MWORD <CONT,B=1,SAQ,NAND,D=5,CRY> ; 7
2723 003213' 055000 400740
2724 003214' 001000 000000 MWORD <CONT,A=1,B=17,SAB,OR,D=2> ; 10
2725 003215' 132017 400340
2726 003216' 001100 000000 MWORD <CONT,B=1,SAQ,NAND,D=7,CRY> ; 11
2727 003217' 057000 400740
2728 003220' 001200 000000 MWORD <CONT,A=1,B=17,SAB,OR,D=2> ; 12
2729 003221' 132017 400340
2730 003222' 001300 000000 MWORD <CONT,B=1,SAB,NAND,D=2> ; 13
2731 003223' 152000 400340
2732 003224' 001400 000000 MWORD <CONT,A=1,B=17,SAB,OR,D=2> ; 14
2733 003225' 132017 400340
2734 003226' 001500 000000 MWORD <CONT,B=1,SAB,NAND,D=3> ; 15
2735 003227' 153000 400340
2736 003230' 001600 000000 MWORD <CONT,A=1,B=17,SAB,OR,D=2> ; 16
2737 003231' 132017 400340
2738 003232' 001700 000000 MWORD <CONT,B=1,SAB,NAND,D=5,CRY> ; 17
2739 003233' 155000 400740
2740 003234' 002000 000000 MWORD <CONT,A=1,B=17,SAB,OR,D=2> ; 20
2741 003235' 132017 400340
2742 003236' 002100 000000 MWORD <CONT,B=1,SAB,NAND,D=7> ; 21
2743 003237' 157000 400340
2744 003240' 002200 000000 MWORD <CONT,A=1,B=17,SAB,OR,D=2> ; 22
2745 003241' 132017 400340
2746 003242' 002300 000000 MWORD <CONT,B=1,S0Q,NAND,D=2,CRY> ; 23
2747 003243' 252000 400740
2748 003244' 002400 000000 MWORD <CONT,A=1,B=17,SAB,OR,D=2> ; 24
2749 003245' 132017 400340
2750 003246' 002500 000000 MWORD <CONT,B=1,S0Q,NAND,D=3> ; 25
2751 003247' 253000 400340
2752 003250' 002600 000000 MWORD <CONT,A=1,B=17,SAB,OR,D=2> ; 25
2753 003251' 132017 400340
2754 003252' 002700 000000 MWORD <CONT,B=1,S0Q,NAND,D=5> ; 27
2755 003253' 255000 400340
2756 003254' 003000 000000 MWORD <CONT,A=1,B=17,SAB,OR,D=2> ; 30
2757 003255' 132017 400340
2758 003256' 003100 000000 MWORD <CONT,B=1,S0Q,NAND,D=7,CRY> ; 31
2759 003257' 257000 400740
2760 003260' 003200 000000 MWORD <CONT,A=1,B=17,SAB,OR,D=2> ; 32
2761 003261' 132017 400340
2762 003262' 003300 000000 MWORD <CONT,B=1,S0A,NAND,D=2> ; 33
2763 003263' 452000 400340
2764 003264' 003400 000000 MWORD <CONT,A=1,B=17,SAB,OR,D=2> ; 34
2765 003265' 132017 400340
2766 003266' 003500 000000 MWORD <CONT,B=1,S0A,NAND,D=3,CRY> ; 35
2767 003267' 453000 400740
2768 003270' 003600 000000 MWORD <CONT,A=1,B=17,SAB,OR,D=2> ; 36
2769 003271' 132017 400340
2770 003272' 003700 000000 MWORD <CONT,B=1,S0A,NAND,D=5> ; 37
2771 003273' 455000 400340
2772 003274' 004000 000000 MWORD <CONT,A=1,B=17,SAB,OR,D=2> ; 40
2773 003275' 132017 400340
2774 003276' 004100 000000 MWORD <CONT,B=1,S0A,NAND,D=7> ; 41
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 35-2
DFPTA4 MAC 19-Jan-83 11:21 2901 ALU Function Tests SEQ 0972
2775 003277' 457000 400340
2776 003300' 004200 000000 MWORD <CONT,A=1,B=17,SAB,OR,D=2> ; 42
2777 003301' 132017 400340
2778 003302' 004300 432004 MWORD <JMAP,J=43,A=17,S0A,OR,D=1,SELE,MGC=4,OENA> ; 43
2779 003303' 431170 005040
2780
2781 ; Verify that 1's NOT_R_AND_S 1's ==> 0's
2782
2783 003304' 004400 450000 MWORD <JMAP,J=45,SD0,AND,D=3> ; 44
2784 003305' 743000 000040
2785 003306' 004500 000000 MWORD <CONT,S0A,XNOR,D=0> ; 45
2786 003307' 470000 000340
2787 003310' 004600 000000 MWORD <CONT,S0A,XNOR,D=2> ; 46
2788 003311' 472000 000340
2789 003312' 004700 000000 MWORD <CONT,B=1,SAQ,NAND,D=2> ; 47
2790 003313' 052000 400340
2791 003314' 005000 000000 MWORD <CONT,A=1,B=17,SAB,OR,D=2> ; 50
2792 003315' 132017 400340
2793 003316' 005100 000000 MWORD <CONT,B=1,SAQ,NAND,D=3> ; 51
2794 003317' 053000 400340
2795 003320' 005200 000000 MWORD <CONT,A=1,B=17,SAB,OR,D=2> ; 52
2796 003321' 132017 400340
2797 003322' 005300 000000 MWORD <CONT,B=1,SAQ,NAND,D=5> ; 53
2798 003323' 055000 400340
2799 003324' 005400 000000 MWORD <CONT,A=1,B=17,SAB,OR,D=2> ; 54
2800 003325' 132017 400340
2801 003326' 005500 000000 MWORD <CONT,B=1,SAQ,NAND,D=7,CRY> ; 55
2802 003327' 057000 400740
2803 003330' 005600 000000 MWORD <CONT,A=1,B=17,SAB,OR,D=2> ; 56
2804 003331' 132017 400340
2805 003332' 005700 000000 MWORD <CONT,B=1,S0A,OR,D=2> ; 57
2806 003333' 432000 400340
2807 003334' 006000 000000 MWORD <CONT,B=1,SAB,NAND,D=2,CRY> ; 60
2808 003335' 152000 400740
2809 003336' 006100 000000 MWORD <CONT,A=1,B=17,SAB,OR,D=2> ; 61
2810 003337' 132017 400340
2811 003340' 006200 000000 MWORD <CONT,B=1,S0A,OR,D=2> ; 62
2812 003341' 432000 400340
2813 003342' 006300 000000 MWORD <CONT,B=1,SAB,NAND,D=3> ; 63
2814 003343' 153000 400340
2815 003344' 006400 000000 MWORD <CONT,A=1,B=17,SAB,OR,D=2> ; 64
2816 003345' 132017 400340
2817 003346' 006500 000000 MWORD <CONT,B=1,S0A,OR,D=2> ; 65
2818 003347' 432000 400340
2819 003350' 006600 000000 MWORD <CONT,B=1,SAB,NAND,D=5> ; 66
2820 003351' 155000 400340
2821 003352' 006700 000000 MWORD <CONT,A=1,B=17,SAB,OR,D=2> ; 67
2822 003353' 132017 400340
2823 003354' 007000 000000 MWORD <CONT,B=1,S0A,OR,D=2> ; 70
2824 003355' 432000 400340
2825 003356' 007100 000000 MWORD <CONT,B=1,SAB,NAND,D=7,CRY> ; 71
2826 003357' 157000 400740
2827 003360' 007200 000000 MWORD <CONT,A=1,B=17,SAB,OR,D=2> ; 72
2828 003361' 132017 400340
2829 003362' 007300 732004 MWORD <JMAP,J=73,A=17,S0A,OR,D=1,SELE,MGC=4,OENA> ; 73
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 35-3
DFPTA4 MAC 19-Jan-83 11:21 2901 ALU Function Tests SEQ 0973
2830 003363' 431170 005040
2831
2832 ; Verify that 0's NOT_R_AND_S 1's ==> 1's
2833
2834 003364' 007400 750000 MWORD <JMAP,J=75,SD0,AND,D=3> ; 74
2835 003365' 743000 000040
2836 003366' 007500 000000 MWORD <CONT,S0A,XNOR,D=0> ; 75
2837 003367' 470000 000340
2838 003370' 007600 000000 MWORD <CONT,B=1,S0A,XNOR,D=2> ; 76
2839 003371' 472000 400340
2840 003372' 007700 000000 MWORD <CONT,SAQ,NAND,D=0> ; 77
2841 003373' 050000 000340
2842 003374' 010000 000000 MWORD <CONT,SAQ,NAND,D=1,CRY> ; 100
2843 003375' 051000 000740
2844 003376' 010100 000000 MWORD <CONT,SAQ,NAND,D=2,CRY> ; 101
2845 003377' 052000 000740
2846 003400' 010200 000000 MWORD <CONT,B=1,SAB,NAND,D=2,CRY> ; 102
2847 003401' 152000 400740
2848 003402' 010300 000000 MWORD <CONT,B=1,SAB,NAND,D=3,CRY> ; 103
2849 003403' 153000 400740
2850 003404' 010400 000000 MWORD <CONT,S0Q,NAND,D=0> ; 104
2851 003405' 250000 000340
2852 003406' 010500 000000 MWORD <CONT,B=1,S0B,NAND,D=2> ; 105
2853 003407' 352000 400340
2854 003410' 010600 000000 MWORD <CONT,B=1,S0B,NAND,D=3> ; 106
2855 003411' 353000 400340
2856 003412' 010700 000000 MWORD <CONT,A=1,B=1,S0A,NAND,D=2> ; 107
2857 003413' 452010 400340
2858 003414' 011000 000000 MWORD <CONT,A=1,B=1,S0A,NAND,D=3> ; 110
2859 003415' 453010 400340
2860 003416' 011101 112004 MWORD <JMAP,J=111,SAQ,AND,D=1,SELE,MGC=4,OENA>; 111
2861 003417' 041000 005040
2862 003420' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 36
DFPTA4 MAC 19-Jan-83 11:21 2901 ALU Function Tests SEQ 0974
2863
2864 ;#********************************************************************
2865 ;* Test 21 - 2901 XOR Test
2866 ;
2867 ; Description: Verify that 1's XOR 1's ==> 0's
2868 ; Verify that 0's XOR 0's ==> 0's
2869 ; Verify that 0's XOR 1's ==> 1's
2870 ;
2871 ; Procedure: Clear Port
2872 ; Load microcode
2873 ;
2874 ; Set RAR to 0
2875 ; Execute 25. JMAP's
2876 ; Read EBUF (Contains contents of Reg 17)
2877 ; Verify data is correct (0's)
2878 ;
2879 ; Set RAR to 33
2880 ; Execute 30. JMAP's
2881 ; Read EBUF (Contains contents of Reg 17)
2882 ; Verify data is correct (0's)
2883 ;
2884 ; Set RAR to 67
2885 ; Execute 40. JMAP's
2886 ; Read EBUF (Contains contents of Reg 17)
2887 ; Verify data is correct (1's)
2888 ;
2889 ; Failure: ---
2890 ;#********************************************************************
2891
2892 ; Test data
2893
2894 003421' 254 00 0 00 003432' TSTA21: JRST TG21 ; go start test
2895 003422' 420402 000021 EBUS!ALU!NDMP!ZALU!21 ; test mask
2896 003423' 003465' 007166' T21M,,[ASCIZ ^2901 XOR Test^]
2897 003424' 006620' 000000 [EXP MLAST!E23],,0
2898 003425' 000000 003764' TSTA22 ; failure test table
2899 003426' 000000 004445' TSTA23 ; ...
2900 003427' 000000 004752' TSTA24
2901 003430' 000000 005261' TSTA25
2902 003431' 777777 777777 -1
2903
2904 ; Start test
2905
2906 003432' 201 00 0 00 000000' TG21: MOVEI Z4 ; get address of module start
2907 003433' 260 17 0 00 003142* GO TRACE ; handle trace output
2908 003434' 201 01 0 00 003465' MOVEI 1,T21M ; set up microcode address
2909 003435' 260 17 0 00 003144* GO TLOAD ; load/verify it
2910 003436' 263 17 0 00 000000 RTN ; failed - exit test
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 37
DFPTA4 MAC 19-Jan-83 11:21 2901 ALU Function Tests SEQ 0975
2911
2912 ; Initialization
2913
2914 003437' 400 15 0 00 000000 TL21: SETZ ERFLG, ; clear error flag
2915 003440' 260 17 0 00 003147* GO IPACLR ; clear port
2916 003441' 402 00 0 00 003150* SETZM TSTSUB ; initialize subtest number
2917 003442' 201 06 0 00 003454' MOVEI 6,TS21 ; get sstep table address
2918
2919 ; Loop on single step table entries
2920
2921 003443' 260 17 0 00 003152* TA21: GO BEXEC ; execute table entry
2922 003444' 254 00 0 00 003453' JRST TX21 ; end of sstep table
2923 003445' 254 00 0 00 003443' JRST TA21 ; keep looping after call
2924 003446' 474 15 0 00 000000 SETO ERFLG, ; error - EBUF data incorrect
2925
2926 ; Handle error printouts and scope looping
2927
2928 003447' 027 00 0 00 003463' SCOPER MA21 ; print error message
2929 003450' 254 00 0 00 003437' JRST TL21 ; loop on error
2930 003451' 254 00 0 00 003453' JRST TX21 ; altmode exit
2931 003452' 322 15 0 00 003443' JUMPE ERFLG,TA21 ; do next sstep table entry
2932
2933 ; End of test
2934
2935 003453' 263 17 0 00 000000 TX21: RTN ; return
2936
2937 ; Sstep table, with EBUF data, as: (CMD,#Steps,Start addr,End Addr,EBUF data)
2938
2939 003454' 103100 000030 TS21: ATABLE (SSSTRT,^D25,0,30,0)
2940 003455' 000000 000000
2941 003456' 103600 310066 ATABLE (SSSTRT,^D30,31,66,0)
2942 003457' 000000 000000
2943 003460' 105000 670136 ATABLE (SSSTRT,^D40,67,136,-1)
2944 003461' 777777 777777
2945 003462' 000000 000000 ATABLE (SSLAST)
2946
2947 ; Error messages
2948
2949 003463' 140000 007171' MA21: MSG!TXNOT![ASCIZ /2901 not doing an XOR function properly (result in EBUF)/]
2950 003464' 000000000000# LAST!CALL!TXALL!BBPNT ; print sequencer data
2951
2952 ; Microcode: Verify that 1's XOR 1's ==> 0's
2953
2954 003465' 000000 010000 T21M: MWORD <ADDR=0,JMAP,J=1,SD0,AND,D=3> ; 0
2955 003466' 743000 000040
2956 003467' 000100 000000 MWORD <CONT,B=17,SD0,AND,D=3> ; 1
2957 003470' 743007 400340
2958 003471' 000200 000000 MWORD <CONT,S0A,XNOR,D=0> ; 2
2959 003472' 470000 000340
2960 003473' 000300 000000 MWORD <CONT,S0A,XNOR,D=2> ; 3
2961 003474' 472000 000340
2962 003475' 000400 000000 MWORD <CONT,B=1,SAQ,XOR,D=2> ; 4
2963 003476' 062000 400340
2964 003477' 000500 000000 MWORD <CONT,A=1,B=17,SAB,OR,D=2> ; 5
2965 003500' 132017 400340
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 37-1
DFPTA4 MAC 19-Jan-83 11:21 2901 ALU Function Tests SEQ 0976
2966 003501' 000600 000000 MWORD <CONT,B=1,SAQ,XOR,D=3,CRY> ; 6
2967 003502' 063000 400740
2968 003503' 000700 000000 MWORD <CONT,A=1,B=17,SAB,OR,D=2> ; 7
2969 003504' 132017 400340
2970 003505' 001000 000000 MWORD <CONT,B=1,SAQ,XOR,D=5,CRY> ; 10
2971 003506' 065000 400740
2972 003507' 001100 000000 MWORD <CONT,A=1,B=17,SAB,OR,D=2> ; 11
2973 003510' 132017 400340
2974 003511' 001200 000000 MWORD <CONT,B=1,SAQ,XOR,D=7,CRY> ; 12
2975 003512' 067000 400740
2976 003513' 001300 000000 MWORD <CONT,A=1,B=17,SAB,OR,D=2> ; 13
2977 003514' 132017 400340
2978 003515' 001400 000000 MWORD <CONT,B=1,S0A,OR,D=2> ; 14
2979 003516' 432000 400340
2980 003517' 001500 000000 MWORD <CONT,B=1,SAB,XOR,D=2,CRY> ; 15
2981 003520' 162000 400740
2982 003521' 001600 000000 MWORD <CONT,A=1,B=17,SAB,OR,D=2> ; 16
2983 003522' 132017 400340
2984 003523' 001700 000000 MWORD <CONT,B=1,S0A,OR,D=2> ; 17
2985 003524' 432000 400340
2986 003525' 002000 000000 MWORD <CONT,B=1,SAB,XOR,D=3> ; 20
2987 003526' 163000 400340
2988 003527' 002100 000000 MWORD <CONT,A=1,B=17,SAB,OR,D=2> ; 21
2989 003530' 132017 400340
2990 003531' 002200 000000 MWORD <CONT,B=1,S0A,OR,D=2> ; 22
2991 003532' 432000 400340
2992 003533' 002300 000000 MWORD <CONT,B=1,SAB,XOR,D=5> ; 23
2993 003534' 165000 400340
2994 003535' 002400 000000 MWORD <CONT,A=1,B=17,SAB,OR,D=2> ; 24
2995 003536' 132017 400340
2996 003537' 002500 000000 MWORD <CONT,B=1,S0A,OR,D=2> ; 25
2997 003540' 432000 400340
2998 003541' 002600 000000 MWORD <CONT,B=1,SAB,XOR,D=7> ; 26
2999 003542' 167000 400340
3000 003543' 002700 000000 MWORD <CONT,A=1,B=17,SAB,OR,D=2> ; 27
3001 003544' 132017 400340
3002 003545' 003000 302004 MWORD <JMAP,J=30,A=17,S0A,OR,D=1,SELE,MGC=4,OENA> ; 30
3003 003546' 431170 005040
3004
3005 ; Verify that 0's XOR 0's ==> 0's
3006
3007 003547' 003100 320000 MWORD <JMAP,J=32,SD0,AND,D=3> ; 31
3008 003550' 743000 000040
3009 003551' 003200 000000 MWORD <CONT,SD0,AND,D=0> ; 32
3010 003552' 740000 000340
3011 003553' 003300 000000 MWORD <CONT,SAQ,XOR,D=0> ; 33
3012 003554' 060000 000340
3013 003555' 003400 000000 MWORD <CONT,SAQ,XOR,D=1,CRY> ; 34
3014 003556' 061000 000740
3015 003557' 003500 000000 MWORD <CONT,SAQ,XOR,D=2,CRY> ; 35
3016 003560' 062000 000740
3017 003561' 003600 000000 MWORD <CONT,SAQ,XOR,D=3,CRY> ; 36
3018 003562' 063000 000740
3019 003563' 003700 000000 MWORD <CONT,SAQ,XOR,D=4> ; 37
3020 003564' 064000 000340
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 37-2
DFPTA4 MAC 19-Jan-83 11:21 2901 ALU Function Tests SEQ 0977
3021 003565' 004000 000000 MWORD <CONT,SAQ,XOR,D=5,CRY> ; 40
3022 003566' 065000 000740
3023 003567' 004100 000000 MWORD <CONT,SAQ,XOR,D=6> ; 41
3024 003570' 066000 000340
3025 003571' 004200 000000 MWORD <CONT,SAQ,XOR,D=7> ; 42
3026 003572' 067000 000340
3027 003573' 004300 000000 MWORD <CONT,SAB,XOR,D=1> ; 43
3028 003574' 161000 000340
3029 003575' 004400 000000 MWORD <CONT,SAB,XOR,D=2> ; 44
3030 003576' 162000 000340
3031 003577' 004500 000000 MWORD <CONT,SAB,XOR,D=3,CRY> ; 45
3032 003600' 163000 000740
3033 003601' 004600 000000 MWORD <CONT,SAB,XOR,D=5> ; 46
3034 003602' 165000 000340
3035 003603' 004700 000000 MWORD <CONT,SAB,XOR,D=7> ; 47
3036 003604' 167000 000340
3037 003605' 005000 000000 MWORD <CONT,B=1,S0Q,XOR,D=0> ; 50
3038 003606' 260000 400340
3039 003607' 005100 000000 MWORD <CONT,B=1,S0Q,XOR,D=1> ; 51
3040 003610' 261000 400340
3041 003611' 005200 000000 MWORD <CONT,B=1,S0Q,XOR,D=4,CRY> ; 52
3042 003612' 264000 400740
3043 003613' 005300 000000 MWORD <CONT,B=1,S0Q,XOR,D=6> ; 53
3044 003614' 266000 400340
3045 003615' 005400 000000 MWORD <CONT,S0A,XOR,D=1> ; 54
3046 003616' 461000 000340
3047 003617' 005500 000000 MWORD <CONT,S0A,XOR,D=2> ; 55
3048 003620' 462000 000340
3049 003621' 005600 000000 MWORD <CONT,S0A,XOR,D=3,CRY> ; 56
3050 003622' 463000 000740
3051 003623' 005700 000000 MWORD <CONT,S0A,XOR,D=5,CRY> ; 57
3052 003624' 465000 000740
3053 003625' 006000 000000 MWORD <CONT,S0A,XOR,D=7> ; 60
3054 003626' 467000 000340
3055 003627' 006100 000000 MWORD <CONT,S0B,XOR,D=1> ; 61
3056 003630' 361000 000340
3057 003631' 006200 000000 MWORD <CONT,S0B,XOR,D=2> ; 62
3058 003632' 362000 000340
3059 003633' 006300 000000 MWORD <CONT,S0B,XOR,D=3> ; 63
3060 003634' 363000 000340
3061 003635' 006400 000000 MWORD <CONT,S0B,XOR,D=5,CRY> ; 64
3062 003636' 365000 000740
3063 003637' 006500 000000 MWORD <CONT,S0B,XOR,D=7> ; 65
3064 003640' 367000 000340
3065 003641' 006600 662004 MWORD <JMAP,J=66,SAQ,OR,D=1,SELE,MGC=4,OENA> ; 66
3066 003642' 031000 005040
3067
3068 ; Verify that 0's XOR 1's ==> 1's
3069
3070 003643' 006700 700000 MWORD <JMAP,J=70,SD0,AND,D=3> ; 67
3071 003644' 743000 000040
3072 003645' 007000 000000 MWORD <CONT,B=1,SD0,AND,D=3> ; 70
3073 003646' 743000 400340
3074 003647' 007100 000000 MWORD <CONT,S0A,XNOR,D=0> ; 71
3075 003650' 470000 000340
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 37-3
DFPTA4 MAC 19-Jan-83 11:21 2901 ALU Function Tests SEQ 0978
3076 003651' 007200 000000 MWORD <CONT,B=2,S0A,XNOR,D=2> ; 72
3077 003652' 472001 000340
3078 003653' 007300 000000 MWORD <CONT,B=17,S0A,XNOR,D=2> ; 73
3079 003654' 472007 400340
3080 003655' 007400 000000 MWORD <CONT,B=3,S0Q,XOR,D=2,CRY> ; 74
3081 003656' 262001 400740
3082 003657' 007500 000000 MWORD <CONT,A=3,B=17,SAB,AND,D=2> ; 75
3083 003660' 142037 400340
3084 003661' 007600 000000 MWORD <CONT,B=3,S0Q,XOR,D=3,CRY> ; 76
3085 003662' 263001 400740
3086 003663' 007700 000000 MWORD <CONT,A=3,B=17,SAB,AND,D=2> ; 77
3087 003664' 142037 400340
3088 003665' 010000 000000 MWORD <CONT,A=2,B=3,S0A,XOR,D=2,CRY> ; 100
3089 003666' 462021 400740
3090 003667' 010100 000000 MWORD <CONT,A=3,B=17,SAB,AND,D=2> ; 101
3091 003670' 142037 400340
3092 003671' 010200 000000 MWORD <CONT,A=2,B=3,S0A,XOR,D=3,CRY> ; 102
3093 003672' 463021 400740
3094 003673' 010300 000000 MWORD <CONT,A=3,B=17,SAB,AND,D=2> ; 103
3095 003674' 142037 400340
3096 003675' 010400 000000 MWORD <CONT,A=2,B=3,S0A,OR,D=2> ; 104
3097 003676' 432021 400340
3098 003677' 010500 000000 MWORD <CONT,B=3,S0B,XOR,D=2> ; 105
3099 003700' 362001 400340
3100 003701' 010600 000000 MWORD <CONT,A=3,B=17,SAB,AND,D=2> ; 106
3101 003702' 142037 400340
3102 003703' 010700 000000 MWORD <CONT,A=2,B=3,S0A,OR,D=2> ; 107
3103 003704' 432021 400340
3104 003705' 011000 000000 MWORD <CONT,B=3,S0B,XOR,D=3,CRY> ; 110
3105 003706' 363001 400740
3106 003707' 011100 000000 MWORD <CONT,A=3,B=17,SAB,AND,D=2> ; 111
3107 003710' 142037 400340
3108 003711' 011200 000000 MWORD <CONT,A=1,B=3,SAQ,XOR,D=2> ; 112
3109 003712' 062011 400340
3110 003713' 011300 000000 MWORD <CONT,A=3,B=17,SAB,AND,D=2> ; 113
3111 003714' 142037 400340
3112 003715' 011400 000000 MWORD <CONT,A=1,B=3,SAQ,XOR,D=3> ; 114
3113 003716' 063011 400340
3114 003717' 011500 000000 MWORD <CONT,A=3,B=17,SAB,AND,D=2> ; 115
3115 003720' 142037 400340
3116 003721' 011600 000000 MWORD <CONT,A=1,B=3,SAQ,XOR,D=5,CRY> ; 116
3117 003722' 065011 400740
3118 003723' 011700 000000 MWORD <CONT,A=3,B=17,SAB,AND,D=2> ; 117
3119 003724' 142037 400340
3120 003725' 012000 000000 MWORD <CONT,A=1,B=3,SAQ,XOR,D=7,CRY> ; 120
3121 003726' 067011 400740
3122 003727' 012100 000000 MWORD <CONT,A=3,B=17,SAB,AND,D=2> ; 121
3123 003730' 142037 400340
3124 003731' 012200 000000 MWORD <CONT,A=2,B=3,S0A,OR,D=2> ; 122
3125 003732' 432021 400340
3126 003733' 012300 000000 MWORD <CONT,B=3,SAB,XOR,D=2> ; 123
3127 003734' 162001 400340
3128 003735' 012400 000000 MWORD <CONT,A=3,B=17,SAB,AND,D=2> ; 124
3129 003736' 142037 400340
3130 003737' 012500 000000 MWORD <CONT,A=2,B=3,S0A,OR,D=2> ; 125
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 37-4
DFPTA4 MAC 19-Jan-83 11:21 2901 ALU Function Tests SEQ 0979
3131 003740' 432021 400340
3132 003741' 012600 000000 MWORD <CONT,B=3,SAB,XOR,D=3,CRY> ; 126
3133 003742' 163001 400740
3134 003743' 012700 000000 MWORD <CONT,A=3,B=17,SAB,AND,D=2> ; 127
3135 003744' 142037 400340
3136 003745' 013000 000000 MWORD <CONT,A=2,B=3,S0A,OR,D=2> ; 130
3137 003746' 432021 400340
3138 003747' 013100 000000 MWORD <CONT,B=3,SAB,XOR,D=5,CRY> ; 131
3139 003750' 165001 400740
3140 003751' 013200 000000 MWORD <CONT,A=3,B=17,SAB,AND,D=2> ; 132
3141 003752' 142037 400340
3142 003753' 013300 000000 MWORD <CONT,A=2,B=3,S0A,OR,D=2> ; 133
3143 003754' 432021 400340
3144 003755' 013400 000000 MWORD <CONT,B=3,SAB,XOR,D=7> ; 134
3145 003756' 167001 400340
3146 003757' 013500 000000 MWORD <CONT,A=3,B=17,SAB,AND,D=2> ; 135
3147 003760' 142037 400340
3148 003761' 013601 362004 MWORD <JMAP,J=136,S0Q,OR,D=1,SELE,MGC=4,OENA> ; 136
3149 003762' 231000 005040
3150 003763' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 38
DFPTA4 MAC 19-Jan-83 11:21 2901 ALU Function Tests SEQ 0980
3151
3152 ;#********************************************************************
3153 ;* Test 22 - 2901 XNOR Test
3154 ;
3155 ; Description: Verify that 0's XNOR 1's ==> 0's
3156 ; Verify that 0's XNOR 0's ==> 1's
3157 ; Verify that 1's XNOR 1's ==> 1's
3158 ;
3159 ; Procedure: Clear Port
3160 ; Load microcode/set start address 0
3161 ;
3162 ; Set RAR to 0
3163 ; Execute 49. JMAP's
3164 ; Read EBUF (Contains contents of Reg 17)
3165 ; Verify data is correct (0's)
3166 ;
3167 ; Set RAR to 47
3168 ; Execute 28. JMAP's
3169 ; Read EBUF (Contains contents of Reg 17)
3170 ; Verify data is correct (1's)
3171 ;
3172 ; Set RAR to 103
3173 ; Execute 67. JMAP's
3174 ; Read EBUF (Contains contents of Reg 17)
3175 ; Verify data is correct (1's)
3176 ;
3177 ; Failure: ---
3178 ;#********************************************************************
3179
3180 ; Test data
3181
3182 003764' 254 00 0 00 003775' TSTA22: JRST TG22 ; go start test
3183 003765' 420402 000022 EBUS!ALU!NDMP!ZALU!22 ; test mask
3184 003766' 004030' 007205' T22M,,[ASCIZ ^2901 XNOR Test^]
3185 003767' 006620' 000000 [EXP MLAST!E23],,0
3186 003770' 000000 004445' TSTA23 ; failure test table
3187 003771' 000000 004752' TSTA24 ; ...
3188 003772' 000000 005261' TSTA25
3189 003773' 000000 005552' TSTA26
3190 003774' 777777 777777 -1
3191
3192 ; Start test
3193
3194 003775' 201 00 0 00 000000' TG22: MOVEI Z4 ; get address of module start
3195 003776' 260 17 0 00 003433* GO TRACE ; handle trace output
3196 003777' 201 01 0 00 004030' MOVEI 1,T22M ; set up microcode address
3197 004000' 260 17 0 00 003435* GO TLOAD ; load/verify it
3198 004001' 263 17 0 00 000000 RTN ; failed - exit test
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 39
DFPTA4 MAC 19-Jan-83 11:21 2901 ALU Function Tests SEQ 0981
3199
3200 ; Initialization
3201
3202 004002' 400 15 0 00 000000 TL22: SETZ ERFLG, ; clear error flag
3203 004003' 260 17 0 00 003440* GO IPACLR ; clear port
3204 004004' 402 00 0 00 003441* SETZM TSTSUB ; initialize subtest number
3205 004005' 201 06 0 00 004017' MOVEI 6,TS22 ; get sstep table address
3206
3207 ; Loop on single step table entries
3208
3209 004006' 260 17 0 00 003443* TA22: GO BEXEC ; execute table entry
3210 004007' 254 00 0 00 004016' JRST TX22 ; end of sstep table
3211 004010' 254 00 0 00 004006' JRST TA22 ; keep looping after call
3212 004011' 474 15 0 00 000000 SETO ERFLG, ; error - EBUF data incorrect
3213
3214 ; Handle error printouts and scope looping
3215
3216 004012' 027 00 0 00 004026' SCOPER MA22 ; print error message
3217 004013' 254 00 0 00 004002' JRST TL22 ; loop on error
3218 004014' 254 00 0 00 004016' JRST TX22 ; altmode exit
3219 004015' 322 15 0 00 004006' JUMPE ERFLG,TA22 ; do next sstep table entry
3220
3221 ; End of test
3222
3223 004016' 263 17 0 00 000000 TX22: RTN ; return
3224
3225 ; Sstep table, with EBUF data, as: (CMD,#Steps,Start addr,End Addr,EBUF data)
3226
3227 004017' 104700 000046 TS22: ATABLE (SSSTRT,^D39,0,46,0)
3228 004020' 000000 000000
3229 004021' 103400 470102 ATABLE (SSSTRT,^D28,47,102,-1)
3230 004022' 777777 777777
3231 004023' 110301 030205 ATABLE (SSSTRT,^D67,103,205,-1)
3232 004024' 777777 777777
3233 004025' 000000 000000 ATABLE (SSLAST)
3234
3235 ; Error messages
3236
3237 004026' 140000 007210' MA22: MSG!TXNOT![ASCIZ /2901 not doing an XNOR function properly (result in EBUF)/]
3238 004027' 000000000000# LAST!CALL!TXALL!BBPNT ; print sequencer data
3239
3240 ; Microcode: Verify that 0's XNOR 1's ==> 0's
3241
3242 004030' 000000 010000 T22M: MWORD <ADDR=0,JMAP,J=1,SD0,AND,D=3> ; 0 R0 <== 0's
3243 004031' 743000 000040
3244 004032' 000100 000000 MWORD <CONT,B=1,S0A,XNOR,D=2> ; 1 R1 <== 1's
3245 004033' 472000 400340
3246 004034' 000200 000000 MWORD <CONT,S0A,XNOR,D=0> ; 2 RQ <== 1's
3247 004035' 470000 000340
3248
3249 004036' 000300 000000 MWORD <CONT,SAQ,XNOR,D=1,CRY> ; 3
3250 004037' 071000 000740
3251 004040' 000400 000000 MWORD <CONT,SAQ,XNOR,D=2,CRY> ; 4
3252 004041' 072000 000740
3253 004042' 000500 000000 MWORD <CONT,SAQ,XNOR,D=3,CRY> ; 5
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 39-1
DFPTA4 MAC 19-Jan-83 11:21 2901 ALU Function Tests SEQ 0982
3254 004043' 073000 000740
3255 004044' 000600 000000 MWORD <CONT,SAQ,XNOR,D=5,CRY> ; 6
3256 004045' 075000 000740
3257 004046' 000700 000000 MWORD <CONT,SAQ,XNOR,D=7,CRY> ; 7
3258 004047' 077000 000740
3259 004050' 001000 000000 MWORD <CONT,A=1,SAB,XNOR,D=1> ; 10
3260 004051' 171010 000340
3261 004052' 001100 000000 MWORD <CONT,A=1,SAB,XNOR,D=2> ; 11
3262 004053' 172010 000340
3263 004054' 001200 000000 MWORD <CONT,A=1,SAB,XNOR,D=3> ; 12
3264 004055' 173010 000340
3265 004056' 001300 000000 MWORD <CONT,A=1,SAB,XNOR,D=5> ; 13
3266 004057' 175010 000340
3267 004060' 001400 000000 MWORD <CONT,A=1,SAB,XNOR,D=7> ; 14
3268 004061' 177010 000340
3269 004062' 001500 000000 MWORD <CONT,B=2,S0Q,XNOR,D=2> ; 15
3270 004063' 272001 000340
3271 004064' 001600 000000 MWORD <CONT,A=2,SAB,OR,D=2> ; 16
3272 004065' 132020 000340
3273 004066' 001700 000000 MWORD <CONT,B=2,S0Q,XNOR,D=3> ; 17
3274 004067' 273001 000340
3275 004070' 002000 000000 MWORD <CONT,A=2,SAB,OR,D=2> ; 20
3276 004071' 132020 000340
3277 004072' 002100 000000 MWORD <CONT,B=2,S0Q,XNOR,D=5> ; 21
3278 004073' 275001 000340
3279 004074' 002200 000000 MWORD <CONT,A=2,SAB,OR,D=2> ; 22
3280 004075' 132020 000340
3281 004076' 002300 000000 MWORD <CONT,B=2,S0Q,XNOR,D=7> ; 23
3282 004077' 277001 000340
3283 004100' 002400 000000 MWORD <CONT,A=2,SAB,OR,D=2> ; 24
3284 004101' 132020 000340
3285 004102' 002500 000000 MWORD <CONT,A=1,S0A,XNOR,D=1> ; 25
3286 004103' 471010 000340
3287 004104' 002600 000000 MWORD <CONT,A=1,S0A,XNOR,D=2,CRY> ; 26
3288 004105' 472010 000740
3289 004106' 002700 000000 MWORD <CONT,A=1,S0A,XNOR,D=3,CRY> ; 27
3290 004107' 473010 000740
3291 004110' 003000 000000 MWORD <CONT,A=1,S0A,XNOR,D=5> ; 30
3292 004111' 475010 000340
3293 004112' 003100 000000 MWORD <CONT,A=1,S0A,XNOR,D=7> ; 31
3294 004113' 477010 000340
3295 004114' 003200 000000 MWORD <CONT,A=1,B=2,S0A,OR,D=2> ; 32
3296 004115' 432011 000340
3297 004116' 003300 000000 MWORD <CONT,B=2,S0B,XNOR,D=2> ; 33
3298 004117' 372001 000340
3299 004120' 003400 000000 MWORD <CONT,A=2,SAB,OR,D=2> ; 34
3300 004121' 132020 000340
3301 004122' 003500 000000 MWORD <CONT,A=1,B=2,S0A,OR,D=2> ; 35
3302 004123' 432011 000340
3303 004124' 003600 000000 MWORD <CONT,B=2,S0B,XNOR,D=3> ; 36
3304 004125' 373001 000340
3305 004126' 003700 000000 MWORD <CONT,A=2,SAB,OR,D=2> ; 37
3306 004127' 132020 000340
3307 004130' 004000 000000 MWORD <CONT,A=1,B=2,S0A,OR,D=2> ; 40
3308 004131' 432011 000340
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 39-2
DFPTA4 MAC 19-Jan-83 11:21 2901 ALU Function Tests SEQ 0983
3309 004132' 004100 000000 MWORD <CONT,B=2,S0B,XNOR,D=5> ; 41
3310 004133' 375001 000340
3311 004134' 004200 000000 MWORD <CONT,A=2,SAB,OR,D=2> ; 42
3312 004135' 132020 000340
3313 004136' 004300 000000 MWORD <CONT,A=1,B=2,S0A,OR,D=2> ; 43
3314 004137' 432011 000340
3315 004140' 004400 000000 MWORD <CONT,B=2,S0B,XNOR,D=7,CRY> ; 44
3316 004141' 377001 000740
3317 004142' 004500 000000 MWORD <CONT,A=2,SAB,OR,D=2> ; 45
3318 004143' 132020 000340
3319 004144' 004600 462004 MWORD <JMAP,J=46,S0A,OR,D=1,SELE,MGC=4,OENA> ; 46
3320 004145' 431000 005040
3321
3322 ; Verify that 0's XNOR 0's ==> 1's
3323
3324 004146' 004700 500000 MWORD <JMAP,J=50,SD0,AND,D=3> ; 47 zero R0
3325 004147' 743000 000040
3326 004150' 005000 000000 MWORD <CONT,SD0,AND,D=0> ; 50 zero Q
3327 004151' 740000 000340
3328 004152' 005100 000000 MWORD <CONT,B=17,S0A,XNOR,D=2> ; 51 one's to R17
3329 004153' 472007 400340
3330 004154' 005200 000000 MWORD <CONT,B=1,SAQ,XNOR,D=2> ; 52
3331 004155' 072000 400340
3332 004156' 005300 000000 MWORD <CONT,A=1,B=17,SAB,AND,D=2> ; 53
3333 004157' 142017 400340
3334 004160' 005400 000000 MWORD <CONT,B=1,SAQ,XNOR,D=3,CRY> ; 54
3335 004161' 073000 400740
3336 004162' 005500 000000 MWORD <CONT,A=1,B=17,SAB,AND,D=2,CRY> ; 55
3337 004163' 142017 400740
3338 004164' 005600 000000 MWORD <CONT,B=1,S0B,AND,D=2,CRY> ; 56
3339 004165' 342000 400740
3340 004166' 005700 000000 MWORD <CONT,B=1,SAB,XNOR,D=2,CRY> ; 57
3341 004167' 172000 400740
3342 004170' 006000 000000 MWORD <CONT,A=1,B=17,SAB,AND,D=2,CRY> ; 60
3343 004171' 142017 400740
3344 004172' 006100 000000 MWORD <CONT,B=1,S0B,AND,D=2,CRY> ; 61
3345 004173' 342000 400740
3346 004174' 006200 000000 MWORD <CONT,B=1,SAB,XNOR,D=3,CRY> ; 62
3347 004175' 173000 400740
3348 004176' 006300 000000 MWORD <CONT,A=1,B=17,SAB,AND,D=2> ; 63
3349 004177' 142017 400340
3350 004200' 006400 000000 MWORD <CONT,B=1,S0Q,XNOR,D=2> ; 64
3351 004201' 272000 400340
3352 004202' 006500 000000 MWORD <CONT,A=1,B=17,SAB,AND,D=2> ; 65
3353 004203' 142017 400340
3354 004204' 006600 000000 MWORD <CONT,B=1,S0Q,XNOR,D=3> ; 66
3355 004205' 273000 400340
3356 004206' 006700 000000 MWORD <CONT,A=1,B=17,SAB,AND,D=2> ; 67
3357 004207' 142017 400340
3358 004210' 007000 000000 MWORD <CONT,B=1,S0B,AND,D=2> ; 70
3359 004211' 342000 400340
3360 004212' 007100 000000 MWORD <CONT,B=1,S0B,XNOR,D=2> ; 71
3361 004213' 372000 400340
3362 004214' 007200 000000 MWORD <CONT,A=1,B=17,SAB,AND,D=2> ; 72
3363 004215' 142017 400340
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 39-3
DFPTA4 MAC 19-Jan-83 11:21 2901 ALU Function Tests SEQ 0984
3364 004216' 007300 000000 MWORD <CONT,B=1,S0B,AND,D=2> ; 73
3365 004217' 342000 400340
3366 004220' 007400 000000 MWORD <CONT,B=1,S0B,XNOR,D=3> ; 74
3367 004221' 373000 400340
3368 004222' 007500 000000 MWORD <CONT,A=1,B=17,SAB,AND,D=2> ; 75
3369 004223' 142017 400340
3370 004224' 007600 000000 MWORD <CONT,B=1,S0A,XNOR,D=2> ; 76
3371 004225' 472000 400340
3372 004226' 007700 000000 MWORD <CONT,A=1,B=17,SAB,AND,D=2> ; 77
3373 004227' 142017 400340
3374 004230' 010000 000000 MWORD <CONT,B=1,S0A,XNOR,D=3> ; 100
3375 004231' 473000 400340
3376 004232' 010100 000000 MWORD <CONT,A=1,B=17,SAB,AND,D=2> ; 101
3377 004233' 142017 400340
3378 004234' 010201 032004 MWORD <JMAP,J=103,A=17,S0A,OR,D=1,SELE,MGC=4,OENA> ; 102
3379 004235' 431170 005040
3380
3381 ; Verify that 1's XNOR 1's ==> 1's
3382
3383 004236' 010301 040000 MWORD <JMAP,J=104,SD0,AND,D=3> ; 103
3384 004237' 743000 000040
3385 004240' 010400 000000 MWORD <CONT,SAB,XNOR,D=2> ; 104
3386 004241' 172000 000340
3387 004242' 010500 000000 MWORD <CONT,S0A,OR,B=1,D=2> ; 105
3388 004243' 432000 400340
3389 004244' 010600 000000 MWORD <CONT,S0A,OR,B=2,D=2> ; 106
3390 004245' 432001 000340
3391 004246' 010700 000000 MWORD <CONT,S0A,OR,B=3,D=2> ; 107
3392 004247' 432001 400340
3393 004250' 011000 000000 MWORD <CONT,S0A,OR,B=4,D=2> ; 110
3394 004251' 432002 000340
3395 004252' 011100 000000 MWORD <CONT,S0A,OR,B=5,D=2> ; 111
3396 004253' 432002 400340
3397 004254' 011200 000000 MWORD <CONT,S0A,OR,B=6,D=2> ; 112
3398 004255' 432003 000340
3399 004256' 011300 000000 MWORD <CONT,S0A,OR,B=7,D=2> ; 113
3400 004257' 432003 400340
3401 004260' 011400 000000 MWORD <CONT,S0A,OR,B=10,D=2> ; 114
3402 004261' 432004 000340
3403 004262' 011500 000000 MWORD <CONT,S0A,OR,B=11,D=2> ; 115
3404 004263' 432004 400340
3405 004264' 011600 000000 MWORD <CONT,S0A,OR,B=12,D=2> ; 116
3406 004265' 432005 000340
3407 004266' 011700 000000 MWORD <CONT,S0A,OR,B=13,D=2> ; 117
3408 004267' 432005 400340
3409 004270' 012000 000000 MWORD <CONT,S0A,OR,B=14,D=2> ; 120
3410 004271' 432006 000340
3411 004272' 012100 000000 MWORD <CONT,S0A,OR,B=15,D=2> ; 121
3412 004273' 432006 400340
3413 004274' 012200 000000 MWORD <CONT,S0A,OR,B=16,D=2> ; 122
3414 004275' 432007 000340
3415 004276' 012300 000000 MWORD <CONT,S0A,OR,B=17,D=2> ; 123
3416 004277' 432007 400340
3417 004300' 012400 000000 MWORD <CONT,S0A,OR,D=0> ; 124
3418 004301' 430000 000340
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 39-4
DFPTA4 MAC 19-Jan-83 11:21 2901 ALU Function Tests SEQ 0985
3419 004302' 012500 000000 MWORD <CONT,SAQ,XNOR,A=0,B=1,D=2> ; 125
3420 004303' 072000 400340
3421 004304' 012600 000000 MWORD <CONT,SAQ,XNOR,A=1,B=2,D=3> ; 126
3422 004305' 073011 000340
3423 004306' 012700 000000 MWORD <CONT,SAQ,XNOR,A=2,D=0> ; 127
3424 004307' 070020 000340
3425 004310' 013000 000000 MWORD <CONT,SAQ,XNOR,A=3,B=4,D=2> ; 130
3426 004311' 072032 000340
3427 004312' 013100 000000 MWORD <CONT,SAQ,XNOR,A=4,B=5,D=3> ; 131
3428 004313' 073042 400340
3429 004314' 013200 000000 MWORD <CONT,SAQ,XNOR,A=5,D=0> ; 132
3430 004315' 070050 000340
3431 004316' 013300 000000 MWORD <CONT,SAQ,XNOR,A=6,B=7,D=2> ; 133
3432 004317' 072063 400340
3433 004320' 013400 000000 MWORD <CONT,SAQ,XNOR,A=7,B=10,D=3> ; 134
3434 004321' 073074 000340
3435 004322' 013500 000000 MWORD <CONT,SAQ,XNOR,A=10,D=0> ; 135
3436 004323' 070100 000340
3437 004324' 013600 000000 MWORD <CONT,SAQ,XNOR,A=11,B=12,D=2> ; 136
3438 004325' 072115 000340
3439 004326' 013700 000000 MWORD <CONT,SAQ,XNOR,A=12,B=13,D=3> ; 137
3440 004327' 073125 400340
3441 004330' 014000 000000 MWORD <CONT,SAQ,XNOR,A=13,D=0> ; 140
3442 004331' 070130 000340
3443 004332' 014100 000000 MWORD <CONT,SAQ,XNOR,A=14,B=15,D=2> ; 141
3444 004333' 072146 400340
3445 004334' 014200 000000 MWORD <CONT,SAQ,XNOR,A=15,B=16,D=3> ; 142
3446 004335' 073157 000340
3447 004336' 014300 000000 MWORD <CONT,SAQ,XNOR,A=16,D=0> ; 143
3448 004337' 070160 000340
3449 004340' 014400 000000 MWORD <CONT,SAQ,XNOR,A=17,D=0> ; 144
3450 004341' 070170 000340
3451 004342' 014500 000000 MWORD <CONT,SAB,XNOR,A=0,B=1,D=2> ; 145
3452 004343' 172000 400340
3453 004344' 014600 000000 MWORD <CONT,SAB,XNOR,A=1,B=2,D=3> ; 146
3454 004345' 173011 000340
3455 004346' 014700 000000 MWORD <CONT,SAB,XNOR,A=2,B=3,D=2> ; 147
3456 004347' 172021 400340
3457 004350' 015000 000000 MWORD <CONT,SAB,XNOR,A=3,B=4,D=3> ; 150
3458 004351' 173032 000340
3459 004352' 015100 000000 MWORD <CONT,SAB,XNOR,A=4,B=5,D=2> ; 151
3460 004353' 172042 400340
3461 004354' 015200 000000 MWORD <CONT,SAB,XNOR,A=5,B=6,D=3> ; 152
3462 004355' 173053 000340
3463 004356' 015300 000000 MWORD <CONT,SAB,XNOR,A=6,B=7,D=2> ; 153
3464 004357' 172063 400340
3465 004360' 015400 000000 MWORD <CONT,SAB,XNOR,A=7,B=10,D=3> ; 154
3466 004361' 173074 000340
3467 004362' 015500 000000 MWORD <CONT,SAB,XNOR,A=10,B=11,D=2> ; 155
3468 004363' 172104 400340
3469 004364' 015600 000000 MWORD <CONT,SAB,XNOR,A=11,B=12,D=3> ; 156
3470 004365' 173115 000340
3471 004366' 015700 000000 MWORD <CONT,SAB,XNOR,A=12,B=13,D=2> ; 157
3472 004367' 172125 400340
3473 004370' 016000 000000 MWORD <CONT,SAB,XNOR,A=13,B=14,D=3> ; 160
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 39-5
DFPTA4 MAC 19-Jan-83 11:21 2901 ALU Function Tests SEQ 0986
3474 004371' 173136 000340
3475 004372' 016100 000000 MWORD <CONT,SAB,XNOR,A=14,B=15,D=2> ; 161
3476 004373' 172146 400340
3477 004374' 016200 000000 MWORD <CONT,SAB,XNOR,A=15,B=16,D=3> ; 162
3478 004375' 173157 000340
3479 004376' 016300 000000 MWORD <CONT,SAB,XNOR,A=16,B=17,D=2> ; 163
3480 004377' 172167 400340
3481 004400' 016400 000000 MWORD <CONT,SAB,XNOR,A=17,B=0,D=3> ; 164
3482 004401' 173170 000340
3483 004402' 016500 000000 MWORD <CONT,SAQ,AND,A=0,D=0> ; 165
3484 004403' 040000 000340
3485 004404' 016600 000000 MWORD <CONT,SAQ,AND,A=1,D=0> ; 166
3486 004405' 040010 000340
3487 004406' 016700 000000 MWORD <CONT,SAQ,AND,A=2,D=0> ; 167
3488 004407' 040020 000340
3489 004410' 017000 000000 MWORD <CONT,SAQ,AND,A=3,D=0> ; 170
3490 004411' 040030 000340
3491 004412' 017100 000000 MWORD <CONT,SAQ,AND,A=4,D=0> ; 171
3492 004413' 040040 000340
3493 004414' 017200 000000 MWORD <CONT,SAQ,AND,A=5,D=0> ; 172
3494 004415' 040050 000340
3495 004416' 017300 000000 MWORD <CONT,SAQ,AND,A=6,D=0> ; 173
3496 004417' 040060 000340
3497 004420' 017400 000000 MWORD <CONT,SAQ,AND,A=7,D=0> ; 174
3498 004421' 040070 000340
3499 004422' 017500 000000 MWORD <CONT,SAQ,AND,A=10,D=0> ; 175
3500 004423' 040100 000340
3501 004424' 017600 000000 MWORD <CONT,SAQ,AND,A=11,D=0> ; 176
3502 004425' 040110 000340
3503 004426' 017700 000000 MWORD <CONT,SAQ,AND,A=12,D=0> ; 177
3504 004427' 040120 000340
3505 004430' 020000 000000 MWORD <CONT,SAQ,AND,A=13,D=0> ; 200
3506 004431' 040130 000340
3507 004432' 020100 000000 MWORD <CONT,SAQ,AND,A=14,D=0> ; 201
3508 004433' 040140 000340
3509 004434' 020200 000000 MWORD <CONT,SAQ,AND,A=15,D=0> ; 202
3510 004435' 040150 000340
3511 004436' 020300 000000 MWORD <CONT,SAQ,AND,A=16,D=0> ; 203
3512 004437' 040160 000340
3513 004440' 020400 000000 MWORD <CONT,SAQ,AND,A=17,D=0> ; 204
3514 004441' 040170 000340
3515 004442' 020502 052004 MWORD <JMAP,J=205,S0A,OR,D=1,SELE,MGC=4,OENA> ; 205
3516 004443' 431000 005040
3517 004444' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 40
DFPTA4 MAC 19-Jan-83 11:21 2901 ALU Function Tests SEQ 0987
3518
3519 ;#********************************************************************
3520 ;* Test 23 - 2901 R + S Test, No Carry
3521 ;
3522 ; Description: Verify 0 + 0 => 0
3523 ; Verify -1 + -1 => -2
3524 ; Verify 0 + floating 1's ==> floating 1's
3525 ; Verify 0 + floating 0's ==> floating 0's
3526 ; Verify 1 + floating 0's ==> 11..11..00..00
3527 ; Verify that float 1's + float 1's ==> float 1's
3528 ; (shifted left one bit)
3529 ; Verify that float 1's + float 0's ==> -1
3530 ;
3531 ; Procedure: Clear Port
3532 ; Load microcode/set start address 0
3533 ;
3534 ; Add 0 + 0, verify that this works
3535 ; Add -1 + -1, verify that this works
3536 ;
3537 ; Build a data pattern (floating 1)
3538 ; Add 0 + data pattern (floating 1)
3539 ; Add 0 + data pattern inverted (floating 0)
3540 ; Add 1 + data pattern inverted (floating 0)
3541 ; Add f1 + f1
3542 ; Add f1 + f0
3543 ; Verify that each works
3544 ; Repeat with data patterns - floating 1's
3545 ;
3546 ; Failure: ---
3547 ;#********************************************************************
3548
3549 ; Test data
3550
3551 004445' 254 00 0 00 004456' TSTA23: JRST TG23 ; go start test
3552 004446' 420402 000023 EBUS!ALU!NDMP!ZALU!23 ; test mask
3553 004447' 004605' 007224' T23M,,[ASCIZ ^2901 R + S Test - No Carry^]
3554 004450' 006620' 000000 [EXP MLAST!E23],,0
3555 004451' 000000 004752' TSTA24 ; failure test table
3556 004452' 000000 005261' TSTA25 ; ...
3557 004453' 000000 005552' TSTA26
3558 004454' 000000 006015' TSTA27
3559 004455' 777777 777777 -1
3560
3561 ; Start test
3562
3563 004456' 201 00 0 00 000000' TG23: MOVEI Z4 ; get address of module start
3564 004457' 260 17 0 00 003776* GO TRACE ; handle trace output
3565 004460' 201 01 0 00 004605' MOVEI 1,T23M ; set up microcode address
3566 004461' 260 17 0 00 004000* GO TLOAD ; load/verify it
3567 004462' 263 17 0 00 000000 RTN ; failed - exit test
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 41
DFPTA4 MAC 19-Jan-83 11:21 2901 ALU Function Tests SEQ 0988
3568
3569 ; Initialization
3570
3571 004463' 400 15 0 00 000000 TL23: SETZ ERFLG, ; clear error flag
3572 004464' 260 17 0 00 004003* GO IPACLR ; clear port
3573 004465' 402 00 0 00 004004* SETZM TSTSUB ; initialize subtest number
3574 004466' 201 06 0 00 004500' MOVEI 6,TS23 ; get sstep table address
3575
3576 ; Loop on single step table entries
3577
3578 004467' 260 17 0 00 004006* TA23: GO BEXEC ; execute table entry
3579 004470' 254 00 0 00 004477' JRST TX23 ; end of sstep table
3580 004471' 254 00 0 00 004467' JRST TA23 ; keep looping after call
3581 004472' 474 15 0 00 000000 SETO ERFLG, ; error - EBUF data incorrect
3582
3583 ; Handle error printouts and scope looping
3584
3585 004473' 027 00 0 00 004602' SCOPER MA23 ; print error message
3586 004474' 254 00 0 00 004463' JRST TL23 ; loop on error
3587 004475' 254 00 0 00 004477' JRST TX23 ; altmode exit
3588 004476' 322 15 0 00 004467' JUMPE ERFLG,TA23 ; do next sstep table entry
3589
3590 ; End of test
3591
3592 004477' 263 17 0 00 000000 TX23: RTN ; return
3593
3594 ; Sstep table, with EBUF data, as: (CMD,#Steps,Start addr,End Addr,EBUF data)
3595
3596 004500' 300000 004522' TS23: ATABLE (SSCALL,TS23A0)
3597 004501' 101200 000011 ATABLE (SSSTRT,^D10,0,11,0)
3598 004502' 000000 000000
3599 004503' 300000 004526' ATABLE (SSCALL,TS23A1)
3600 004504' 101000 120021 ATABLE (SSSTRT,^D8,12,21,-2)
3601 004505' 777777 777776
3602 004506' 300000 004514' ATABLE (SSCALL,TS23IN)
3603 004507' 400000 004532' TS23L: ATABLE (SSCHK,TS23NX)
3604 004510' 100000 000000 ATABLE (SSSTRT,0,0,0,0)
3605 004511' 000000 000000
3606 004512' 500000 004507' ATABLE (SSJRST,TS23L)
3607 004513' 000000 000000 ATABLE (SSLAST)
3608
3609 ; Initialize single step data
3610
3611 004514' 201 00 0 00 000001 TS23IN: MOVEI 1 ; start with data pattern 1
3612 004515' 202 00 0 00 010010' MOVEM TS23PA# ; save it
3613 004516' 476 00 0 00 010011' SETOM TS23SG# ; initialize segment number
3614 004517' 201 00 0 00 000022 MOVEI 22 ; get initial start address
3615 004520' 202 00 0 00 004563' MOVEM TS23T2 ; for 1st subsection
3616 004521' 263 17 0 00 000000 RTN ; return
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 42
DFPTA4 MAC 19-Jan-83 11:21 2901 ALU Function Tests SEQ 0989
3617
3618 004522' 402 00 0 00 010005' TS23A0: SETZM TDATR ; 0+0
3619 004523' 402 00 0 00 010007' SETZM TDATS
3620 004524' 402 00 0 00 010006' SETZM TDATRS
3621 004525' 263 17 0 00 000000 RTN
3622
3623 004526' 476 00 0 00 010005' TS23A1: SETOM TDATR ; -1+-1
3624 004527' 476 00 0 00 010007' SETOM TDATS
3625 004530' 402 00 0 00 010006' SETZM TDATRS
3626 004531' 263 17 0 00 000000 RTN
3627
3628 ; Handle single step data
3629
3630 004532' 336 00 0 00 010010' TS23NX: SKIPN TS23PA ; done with data patterns?
3631 004533' 263 17 0 00 000000 RTN ; yes - return +1
3632 004534' 350 01 0 00 010011' AOS 1,TS23SG ; point to proper segment
3633 004535' 303 01 0 00 000004 CAILE 1,4 ; done with this data pattern?
3634 JRST [MOVE 1,TS23PA ; yes - make up next one and go
3635 LSH 1,1 ; handle that one
3636 MOVEM 1,TS23PA
3637 SETOM TS23SG
3638 MOVEI 24 ; set up subsequent start address
3639 MOVEM TS23T2 ; for 1st subsection
3640 004536' 254 00 0 00 007232' JRST TS23NX]
3641 004537' 200 02 0 06 000000 MOVE 2,(6) ; get table entry
3642 004540' 200 00 0 01 004556' MOVE TS23T1(1) ; get number of single steps
3643 004541' 137 00 0 00 007241' DPB [POINT 9,2,11] ; insert into table entry
3644 004542' 200 00 0 01 004563' MOVE TS23T2(1) ; get starting address
3645 004543' 137 00 0 00 007242' DPB [POINT 12,2,23] ; insert into table entry
3646 004544' 200 00 0 01 004570' MOVE TS23T3(1) ; get ending address
3647 004545' 137 00 0 00 007243' DPB [POINT 12,2,35] ; insert into table entry
3648 004546' 202 02 0 06 000000 MOVEM 2,(6) ; save table entry
3649 004547' 402 00 0 00 010005' SETZM TDATR# ; clear initial data
3650 004550' 402 00 0 00 010007' SETZM TDATS# ; clear initial data
3651 004551' 256 00 0 01 004575' XCT TS23EB(1) ; get resulting data pattern
3652 004552' 202 00 0 06 000001 MOVEM 1(6) ; save EBUF data
3653 004553' 202 00 0 00 010006' MOVEM TDATRS# ; save result data
3654 004554' 350 00 0 17 000000 AOS (P) ; set up proper return
3655 004555' 263 17 0 00 000000 RTN ; return
3656
3657 ; Number of single steps
3658
3659 004556' 000000 000012 TS23T1: ^D10
3660 004557' 000000 000011 9
3661 004560' 000000 000005 5
3662 004561' 000000 000003 3
3663 004562' 000000 000003 3
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 43
DFPTA4 MAC 19-Jan-83 11:21 2901 ALU Function Tests SEQ 0990
3664
3665 ; Starting address
3666
3667 004563' 000000 000022 TS23T2: 22
3668 004564' 000000 000036 36
3669 004565' 000000 000047 47
3670 004566' 000000 000062 62
3671 004567' 000000 000065 65
3672
3673 ; Ending address
3674
3675 004570' 000000 000035 TS23T3: 35
3676 004571' 000000 000046 46
3677 004572' 000000 000053 53
3678 004573' 000000 000064 64
3679 004574' 000000 000067 67
3680
3681 ; Table which calculates the result
3682
3683 TS23EB: GO [MOVE TS23PA ; 0 + f1
3684 MOVEM TDATS
3685 004575' 260 17 0 00 007244' RTN]
3686 GO [MOVE TS23PA ; 0 + f0
3687 SETCA 0,
3688 MOVEM TDATS
3689 004576' 260 17 0 00 007247' RTN]
3690 GO [MOVE TS23PA ; 1 + f0
3691 SETCA 0,
3692 AOS TDATR
3693 MOVEM TDATS
3694 TLNE 400000
3695 JRST [TLZ 400000
3696 AOS
3697 TLO 400000
3698 RTN]
3699 HRLZI 400000
3700 004577' 260 17 0 00 007257' RTN]
3701 GO [MOVE TS23PA ; f1 + f1
3702 MOVEM TDATR
3703 MOVEM TDATS
3704 LSH 1
3705 004600' 260 17 0 00 007267' RTN]
3706 GO [MOVE TS23PA ; f1 + f0
3707 MOVEM TDATR
3708 SETCA 0,
3709 MOVEM TDATS
3710 SETO 0,
3711 004601' 260 17 0 00 007274' RTN]
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 44
DFPTA4 MAC 19-Jan-83 11:21 2901 ALU Function Tests SEQ 0991
3712
3713 ; Error messages
3714
3715 004602' 140000 007302' MA23: MSG!TXNOT![ASCIZ /2901's not doing an R+S function properly/]
3716 004603' 260000 006547' CALL!TXALL!RESPNT ; print R+S data
3717 004604' 000000000000# LAST!CALL!TXALL!SSPNT ; print sequencer data
3718
3719 ; Microcode:
3720
3721 ; Add 0 + 0, verify that this works
3722
3723 004605' 000000 010000 T23M: MWORD <ADDR=0,JMAP,J=1,S0A,AND,D=2> ; 0
3724 004606' 442000 000040
3725 004607' 000100 000000 MWORD <CONT,S0A,AND,D=2,B=17> ; 1
3726 004610' 442007 400340
3727 004611' 000200 000000 MWORD <CONT,SAB,PLUS,D=2,B=17> ; 2
3728 004612' 102007 400340
3729 004613' 000300 000000 MWORD <CONT,S0A,PLUS,D=2,B=16> ; 3
3730 004614' 402007 000340
3731 004615' 000400 000000 MWORD <CONT,SAB,OR,A=16,B=17,D=2> ; 4
3732 004616' 132167 400340
3733 004617' 000500 000000 MWORD <CONT,S0A,AND,D=0> ; 5
3734 004620' 440000 000340
3735 004621' 000600 000000 MWORD <CONT,S0Q,PLUS,D=2,B=16> ; 6
3736 004622' 202007 000340
3737 004623' 000700 000000 MWORD <CONT,SAB,OR,A=16,B=17,D=2> ; 7
3738 004624' 132167 400340
3739 004625' 001000 000000 MWORD <CONT,S0B,PLUS,D=2,B=17> ; 10
3740 004626' 302007 400340
3741 004627' 001100 112004 MWORD <JMAP,J=11,S0A,A=17,OR,D=1,OENA,SELE,MGC=4> ; 11
3742 004630' 431170 005040
3743
3744 ; Add -1 + -1, verify that this works
3745
3746 004631' 001200 130000 MWORD <JMAP,J=13,S0A,AND,D=2> ; 12
3747 004632' 442000 000040
3748 004633' 001300 000000 MWORD <CONT,S0A,XNOR,B=1,D=2> ; 13
3749 004634' 472000 400340
3750 004635' 001400 000000 MWORD <CONT,S0A,XNOR,B=17,D=2> ; 14
3751 004636' 472007 400340
3752 004637' 001500 000000 MWORD <CONT,S0A,XNOR,D=0> ; 15
3753 004640' 470000 000340
3754 004641' 001600 000000 MWORD <CONT,SAB,PLUS,D=2,A=1,B=17> ; 16
3755 004642' 102017 400340
3756 004643' 001700 000000 MWORD <CONT,SAQ,PLUS,D=2,A=1,B=16> ; 17
3757 004644' 002017 000340
3758 004645' 002000 000000 MWORD <CONT,SAB,AND,D=2,A=16,B=17> ; 20
3759 004646' 142167 400340
3760 004647' 002100 212004 MWORD <JMAP,J=21,S0A,A=17,OR,D=1,OENA,SELE,MGC=4> ; 21
3761 004650' 431170 005040
3762
3763 ; Build a data pattern 0000..001 / Left shift it once
3764
3765 004651' 002200 230000 MWORD <JMAP,J=23,S0A,AND,D=2> ; 22 init
3766 004652' 442000 000040
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 44-1
DFPTA4 MAC 19-Jan-83 11:21 2901 ALU Function Tests SEQ 0992
3767 004653' 002300 260000 MWORD <JMAP,J=26,S0A,PLUS,D=2,CRY> ; 23
3768 004654' 402000 000440
3769 004655' 002400 250000 MWORD <JMAP,J=25,S0A,OR,D=1> ; 24 left shift
3770 004656' 431000 000040
3771 004657' 002500 000000 MWORD <CONT,S0A,OR,D=7> ; 25
3772 004660' 437000 000340
3773
3774 ;; Add 0 + data pattern (floating 1)
3775
3776 004661' 002600 000000 MWORD <CONT,S0A,PLUS,B=1,D=2> ; 26
3777 004662' 402000 400340
3778 004663' 002700 000000 MWORD <CONT,S0A,PLUS,A=1,B=2,D=3> ; 27
3779 004664' 403011 000340
3780 004665' 003000 000000 MWORD <CONT,S0A,PLUS,A=2,B=3,D=2> ; 30
3781 004666' 402021 400340
3782 004667' 003100 000000 MWORD <CONT,S0B,PLUS,A=3,B=3,D=3> ; 31
3783 004670' 303031 400340
3784 004671' 003200 000000 MWORD <CONT,S0B,PLUS,A=3,B=3,D=2> ; 32
3785 004672' 302031 400340
3786 004673' 003300 000000 MWORD <CONT,S0B,PLUS,A=3,B=3,D=0> ; 33
3787 004674' 300031 400340
3788 004675' 003400 000000 MWORD <CONT,S0Q,PLUS,D=0> ; 34
3789 004676' 200000 000340
3790 004677' 003500 352004 MWORD <JMAP,J=35,S0Q,OR,D=1,OENA,SELE,MGC=4> ; 35
3791 004700' 231000 005040
3792
3793 ;; Add 0 + data pattern inverted (floating 0)
3794
3795 004701' 003600 370000 MWORD <JMAP,J=37,S0A,XNOR,B=1,D=2> ; 36
3796 004702' 472000 400040
3797 004703' 003700 000000 MWORD <CONT,S0A,PLUS,A=1,B=2,D=2> ; 37
3798 004704' 402011 000340
3799 004705' 004000 000000 MWORD <CONT,S0A,PLUS,A=2,B=3,D=3> ; 40
3800 004706' 403021 400340
3801 004707' 004100 000000 MWORD <CONT,S0A,PLUS,A=3,B=4,D=2> ; 41
3802 004710' 402032 000340
3803 004711' 004200 000000 MWORD <CONT,S0B,PLUS,A=4,B=4,D=3> ; 42
3804 004712' 303042 000340
3805 004713' 004300 000000 MWORD <CONT,S0B,PLUS,A=4,B=4,D=2> ; 43
3806 004714' 302042 000340
3807 004715' 004400 000000 MWORD <CONT,S0B,PLUS,A=4,B=4,D=0> ; 44
3808 004716' 300042 000340
3809 004717' 004500 000000 MWORD <CONT,S0Q,PLUS,D=0> ; 45
3810 004720' 200000 000340
3811 004721' 004600 462004 MWORD <JMAP,J=46,S0Q,OR,D=1,OENA,SELE,MGC=4> ; 46
3812 004722' 231000 005040
3813
3814 ;; Add 1 + data pattern inverted (floating 0)
3815
3816 004723' 004700 500000 MWORD <JMAP,J=50,S0A,XNOR,B=1,D=2> ; 47
3817 004724' 472000 400040
3818 004725' 005000 000000 MWORD <CONT,S0A,AND,D=0> ; 50
3819 004726' 440000 000340
3820 004727' 005100 000000 MWORD <CONT,S0Q,PLUS,D=0,CRY> ; 51
3821 004730' 200000 000740
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 44-2
DFPTA4 MAC 19-Jan-83 11:21 2901 ALU Function Tests SEQ 0993
3822 004731' 005200 000000 MWORD <CONT,SAQ,PLUS,A=1,B=2,D=2> ; 52
3823 004732' 002011 000340
3824 004733' 005300 532004 MWORD <JMAP,J=53,S0A,OR,A=2,D=1,OENA,SELE,MGC=4> ; 53
3825 004734' 431020 005040
3826
3827 ;; Add f1 + f1
3828
3829 004735' 006200 630000 MWORD <ADDR=62,JMAP,J=63,S0A,OR,B=1,D=2> ; 62
3830 004736' 432000 400040
3831 004737' 006300 000000 MWORD <CONT,SAB,PLUS,B=1,D=2> ; 63
3832 004740' 102000 400340
3833 004741' 006400 642004 MWORD <JMAP,J=64,S0A,OR,A=1,D=1,OENA,SELE,MGC=4> ; 64
3834 004742' 431010 005040
3835
3836 ;; Add f1 + f0
3837
3838 004743' 006500 660000 MWORD <JMAP,J=66,S0A,XNOR,B=1,D=2> ; 65
3839 004744' 472000 400040
3840 004745' 006600 000000 MWORD <CONT,SAB,PLUS,B=1,D=2> ; 66
3841 004746' 102000 400340
3842 004747' 006700 672004 MWORD <JMAP,J=67,S0A,OR,A=1,D=1,OENA,SELE,MGC=4> ; 67
3843 004750' 431010 005040
3844 004751' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 45
DFPTA4 MAC 19-Jan-83 11:21 2901 ALU Function Tests SEQ 0994
3845
3846 ;#********************************************************************
3847 ;* Test 24 - 2901 R + S Test, With Carry
3848 ;
3849 ; Description: Verify 0 + 0 + cry => 1
3850 ; Verify -1 + -1 + cry => -1
3851 ; Verify 0 + floating 1's + cry ==> floating 1's + 1
3852 ; Verify 0 + floating 0's + cry ==> 11..11..00..00
3853 ; Verify 1 + floating 0's + cry ==> 11..11..00..01
3854 ; Verify that float 1's + float 1's + cry ==> 10..00..01
3855 ; Verify that float 1's + float 0's + cry ==> 0
3856 ;
3857 ; Procedure: Clear Port
3858 ; Load microcode/set start address 0
3859 ;
3860 ; Add 0 + 0, verify that this works
3861 ; Add -1 + -1, verify that this works
3862 ;
3863 ; Build a data pattern (floating 1)
3864 ; Add 0 + data pattern (floating 1)
3865 ; Add 0 + data pattern inverted (floating 0)
3866 ; Add 1 + data pattern inverted (floating 0)
3867 ; Add f1 + f1
3868 ; Add f1 + f0
3869 ; Verify that each works
3870 ; Repeat with data patterns - floating 1's
3871 ;
3872 ; Failure: ---
3873 ;#********************************************************************
3874
3875 ; Test data
3876
3877 004752' 254 00 0 00 004763' TSTA24: JRST TG24 ; go start test
3878 004753' 420402 000024 EBUS!ALU!NDMP!ZALU!24 ; test mask
3879 004754' 005114' 007313' T24M,,[ASCIZ ^2901 R + S Test - With Carry^]
3880 004755' 006620' 000000 [EXP MLAST!E23],,0
3881 004756' 000000 005261' TSTA25 ; failure test table
3882 004757' 000000 005552' TSTA26 ; ...
3883 004760' 000000 006015' TSTA27
3884 004761' 000000 006306' TSTA30
3885 004762' 777777 777777 -1
3886
3887 ; Start test
3888
3889 004763' 201 00 0 00 000000' TG24: MOVEI Z4 ; get address of module start
3890 004764' 260 17 0 00 004457* GO TRACE ; handle trace output
3891 004765' 201 01 0 00 005114' MOVEI 1,T24M ; set up microcode address
3892 004766' 260 17 0 00 004461* GO TLOAD ; load/verify it
3893 004767' 263 17 0 00 000000 RTN ; failed - exit test
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 46
DFPTA4 MAC 19-Jan-83 11:21 2901 ALU Function Tests SEQ 0995
3894
3895 ; Initialization
3896
3897 004770' 400 15 0 00 000000 TL24: SETZ ERFLG, ; clear error flag
3898 004771' 260 17 0 00 004464* GO IPACLR ; clear port
3899 004772' 402 00 0 00 004465* SETZM TSTSUB ; initialize subtest number
3900 004773' 201 06 0 00 005005' MOVEI 6,TS24 ; get sstep table address
3901
3902 ; Loop on single step table entries
3903
3904 004774' 260 17 0 00 004467* TA24: GO BEXEC ; execute table entry
3905 004775' 254 00 0 00 005004' JRST TX24 ; end of sstep table
3906 004776' 254 00 0 00 004774' JRST TA24 ; keep looping after call
3907 004777' 474 15 0 00 000000 SETO ERFLG, ; error - EBUF data incorrect
3908
3909 ; Handle error printouts and scope looping
3910
3911 005000' 027 00 0 00 005111' SCOPER MA24 ; print error message
3912 005001' 254 00 0 00 004770' JRST TL24 ; loop on error
3913 005002' 254 00 0 00 005004' JRST TX24 ; altmode exit
3914 005003' 322 15 0 00 004774' JUMPE ERFLG,TA24 ; do next sstep table entry
3915
3916 ; End of test
3917
3918 005004' 263 17 0 00 000000 TX24: RTN ; return
3919
3920 ; Sstep table, with EBUF data, as: (CMD,#Steps,Start addr,End Addr,EBUF data)
3921
3922 005005' 300000 005027' TS24: ATABLE (SSCALL,TS24A0)
3923 005006' 101200 000011 ATABLE (SSSTRT,^D10,0,11,4)
3924 005007' 000000 000004
3925 005010' 300000 005034' ATABLE (SSCALL,TS24A1)
3926 005011' 101000 120021 ATABLE (SSSTRT,^D8,12,21,-1)
3927 005012' 777777 777777
3928 005013' 300000 005021' ATABLE (SSCALL,TS24IN)
3929 005014' 400000 005041' TS24L: ATABLE (SSCHK,TS24NX)
3930 005015' 100000 000000 ATABLE (SSSTRT,0,0,0,0)
3931 005016' 000000 000000
3932 005017' 500000 005014' ATABLE (SSJRST,TS24L)
3933 005020' 000000 000000 ATABLE (SSLAST)
3934
3935 ; Initialize single step data
3936
3937 005021' 201 00 0 00 000001 TS24IN: MOVEI 1 ; start with data pattern 1
3938 005022' 202 00 0 00 010012' MOVEM TS24PA# ; save it
3939 005023' 476 00 0 00 010013' SETOM TS24SG# ; initialize segment number
3940 005024' 201 00 0 00 000022 MOVEI 22 ; get initial start address
3941 005025' 202 00 0 00 005072' MOVEM TS24T2 ; for 1st subsection
3942 005026' 263 17 0 00 000000 RTN ; return
3943
3944 005027' 402 00 0 00 010005' TS24A0: SETZM TDATR ; 0+0+cry
3945 005030' 402 00 0 00 010007' SETZM TDATS
3946 005031' 402 00 0 00 010006' SETZM TDATRS
3947 005032' 350 00 0 00 010006' AOS TDATRS
3948 005033' 263 17 0 00 000000 RTN
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 47
DFPTA4 MAC 19-Jan-83 11:21 2901 ALU Function Tests SEQ 0996
3949
3950 005034' 476 00 0 00 010005' TS24A1: SETOM TDATR ; -1+-1+cry
3951 005035' 476 00 0 00 010007' SETOM TDATS
3952 005036' 402 00 0 00 010006' SETZM TDATRS
3953 005037' 350 00 0 00 010006' AOS TDATRS
3954 005040' 263 17 0 00 000000 RTN
3955
3956 ; Handle single step data
3957
3958 005041' 336 00 0 00 010012' TS24NX: SKIPN TS24PA ; done with data patterns?
3959 005042' 263 17 0 00 000000 RTN ; yes - return +1
3960 005043' 350 01 0 00 010013' AOS 1,TS24SG ; point to proper segment
3961 005044' 303 01 0 00 000004 CAILE 1,4 ; done with this data pattern?
3962 JRST [MOVE 1,TS24PA ; yes - make up next one and go
3963 LSH 1,1 ; handle that one
3964 MOVEM 1,TS24PA
3965 SETOM TS24SG
3966 MOVEI 24 ; set up subsequent start address
3967 MOVEM TS24T2 ; for 1st subsection
3968 005045' 254 00 0 00 007321' JRST TS24NX]
3969 005046' 200 02 0 06 000000 MOVE 2,(6) ; get table entry
3970 005047' 200 00 0 01 005065' MOVE TS24T1(1) ; get number of single steps
3971 005050' 137 00 0 00 007241' DPB [POINT 9,2,11] ; insert into table entry
3972 005051' 200 00 0 01 005072' MOVE TS24T2(1) ; get starting address
3973 005052' 137 00 0 00 007242' DPB [POINT 12,2,23] ; insert into table entry
3974 005053' 200 00 0 01 005077' MOVE TS24T3(1) ; get ending address
3975 005054' 137 00 0 00 007243' DPB [POINT 12,2,35] ; insert into table entry
3976 005055' 202 02 0 06 000000 MOVEM 2,(6) ; save table entry
3977 005056' 402 00 0 00 010005' SETZM TDATR ; clear initial data
3978 005057' 402 00 0 00 010007' SETZM TDATS ; clear initial data
3979 005060' 256 00 0 01 005104' XCT TS24EB(1) ; get resulting data pattern
3980 005061' 202 00 0 06 000001 MOVEM 1(6) ; save EBUF data
3981 005062' 202 00 0 00 010006' MOVEM TDATRS ; save result data
3982 005063' 350 00 0 17 000000 AOS (P) ; set up proper return
3983 005064' 263 17 0 00 000000 RTN ; return
3984
3985 ; Number of single steps
3986
3987 005065' 000000 000012 TS24T1: ^D10
3988 005066' 000000 000011 9
3989 005067' 000000 000005 5
3990 005070' 000000 000003 3
3991 005071' 000000 000003 3
3992
3993 ; Starting address
3994
3995 005072' 000000 000022 TS24T2: 22
3996 005073' 000000 000036 36
3997 005074' 000000 000047 47
3998 005075' 000000 000062 62
3999 005076' 000000 000065 65
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 48
DFPTA4 MAC 19-Jan-83 11:21 2901 ALU Function Tests SEQ 0997
4000
4001 ; Ending address
4002
4003 005077' 000000 000035 TS24T3: 35
4004 005100' 000000 000046 46
4005 005101' 000000 000053 53
4006 005102' 000000 000064 64
4007 005103' 000000 000067 67
4008
4009 ; Table which calculates the result
4010
4011 TS24EB: GO [MOVE TS24PA ; 0 + f1 + cry
4012 MOVEM TDATS
4013 TLNN 400000
4014 ADDI 7
4015 TLNE 400000
4016 TRO 7
4017 005104' 260 17 0 00 007330' RTN]
4018 GO [MOVE 1,TS24PA ; 0 + f0 + cry
4019 SETCA 1,
4020 MOVEI 7
4021 MOVEM 1,TDATS
4022 GO ADDLOG
4023 005105' 260 17 0 00 007337' RTN]
4024 GO [MOVE 1,TS24PA ; 1 + f0 + cry
4025 SETCA 1,
4026 AOS TDATR
4027 MOVEM 1,TDATS
4028 MOVEI 2
4029 GO ADDLOG
4030 005106' 260 17 0 00 007345' RTN]
4031 GO [MOVE TS24PA ; f1 + f1 + cry
4032 MOVEM TDATR
4033 MOVEM TDATS
4034 LSH 1
4035 TRO 1
4036 005107' 260 17 0 00 007354' RTN]
4037 GO [MOVE TS24PA ; f1 + f0 + cry
4038 MOVEM TDATR
4039 SETCA 0,
4040 MOVEM TDATS
4041 SETZ
4042 005110' 260 17 0 00 007362' RTN]
4043
4044 ; Error messages
4045
4046 005111' 140000 007370' MA24: MSG!TXNOT![ASCIZ /2901's not doing several R+S+CRY functions properly/]
4047 005112' 260000 006547' CALL!TXALL!RESPNT ; print R+S data
4048 005113' 000000000000# LAST!CALL!TXALL!SSPNT ; print sequencer data
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 49
DFPTA4 MAC 19-Jan-83 11:21 2901 ALU Function Tests SEQ 0998
4049
4050 ; Microcode:
4051
4052 ; Add 0 + 0 + cry, verify that this works
4053
4054 005114' 000000 010000 T24M: MWORD <ADDR=0,JMAP,J=1,S0A,AND,D=2> ; 0
4055 005115' 442000 000040
4056 005116' 000100 000000 MWORD <CONT,S0A,AND,D=2,B=17> ; 1
4057 005117' 442007 400340
4058 005120' 000200 000000 MWORD <CONT,SAB,PLUS,CRY,D=2,B=17> ; 2
4059 005121' 102007 400740
4060 005122' 000300 000000 MWORD <CONT,S0A,PLUS,CRY,D=2,B=16> ; 3
4061 005123' 402007 000740
4062 005124' 000400 000000 MWORD <CONT,SAB,PLUS,A=16,B=17,D=2> ; 4
4063 005125' 102167 400340
4064 005126' 000500 000000 MWORD <CONT,S0A,AND,D=0> ; 5
4065 005127' 440000 000340
4066 005130' 000600 000000 MWORD <CONT,S0Q,PLUS,CRY,D=2,B=16> ; 6
4067 005131' 202007 000740
4068 005132' 000700 000000 MWORD <CONT,SAB,PLUS,A=16,B=17,D=2> ; 7
4069 005133' 102167 400340
4070 005134' 001000 000000 MWORD <CONT,S0B,PLUS,CRY,D=2,B=17> ; 10
4071 005135' 302007 400740
4072 005136' 001100 112004 MWORD <JMAP,J=11,S0A,A=17,OR,D=1,OENA,SELE,MGC=4> ; 11
4073 005137' 431170 005040
4074
4075 ; Add -1 + -1 + cry, verify that this works
4076
4077 005140' 001200 130000 MWORD <JMAP,J=13,S0A,AND,D=2> ; 12
4078 005141' 442000 000040
4079 005142' 001300 000000 MWORD <CONT,S0A,XNOR,B=1,D=2> ; 13
4080 005143' 472000 400340
4081 005144' 001400 000000 MWORD <CONT,S0A,XNOR,B=17,D=2> ; 14
4082 005145' 472007 400340
4083 005146' 001500 000000 MWORD <CONT,S0A,XNOR,D=0> ; 15
4084 005147' 470000 000340
4085 005150' 001600 000000 MWORD <CONT,SAB,PLUS,CRY,D=2,A=1,B=17> ; 16
4086 005151' 102017 400740
4087 005152' 001700 000000 MWORD <CONT,SAQ,PLUS,CRY,D=2,A=1,B=16> ; 17
4088 005153' 002017 000740
4089 005154' 002000 000000 MWORD <CONT,SAB,AND,D=2,A=16,B=17> ; 20
4090 005155' 142167 400340
4091 005156' 002100 212004 MWORD <JMAP,J=21,S0A,A=17,OR,D=1,OENA,SELE,MGC=4> ; 21
4092 005157' 431170 005040
4093
4094 ; Build a data pattern 0000..001 / Left shift it once
4095
4096 005160' 002200 230000 MWORD <JMAP,J=23,S0A,AND,D=2> ; 22 init
4097 005161' 442000 000040
4098 005162' 002300 260000 MWORD <JMAP,J=26,S0A,PLUS,D=2,CRY> ; 23
4099 005163' 402000 000440
4100 005164' 002400 250000 MWORD <JMAP,J=25,S0A,OR,D=1> ; 24 left shift
4101 005165' 431000 000040
4102 005166' 002500 000000 MWORD <CONT,S0A,OR,D=7> ; 25
4103 005167' 437000 000340
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 49-1
DFPTA4 MAC 19-Jan-83 11:21 2901 ALU Function Tests SEQ 0999
4104
4105 ;; Add 0 + data pattern (floating 1) + cry
4106
4107 005170' 002600 000000 MWORD <CONT,S0A,PLUS,CRY,B=1,D=2> ; 26
4108 005171' 402000 400740
4109 005172' 002700 000000 MWORD <CONT,S0A,PLUS,CRY,A=1,B=2,D=3> ; 27
4110 005173' 403011 000740
4111 005174' 003000 000000 MWORD <CONT,S0A,PLUS,CRY,A=2,B=3,D=2> ; 30
4112 005175' 402021 400740
4113 005176' 003100 000000 MWORD <CONT,S0B,PLUS,CRY,A=3,B=3,D=3> ; 31
4114 005177' 303031 400740
4115 005200' 003200 000000 MWORD <CONT,S0B,PLUS,CRY,A=3,B=3,D=2> ; 32
4116 005201' 302031 400740
4117 005202' 003300 000000 MWORD <CONT,S0B,PLUS,CRY,A=3,B=3,D=0> ; 33
4118 005203' 300031 400740
4119 005204' 003400 000000 MWORD <CONT,S0Q,PLUS,CRY,D=0> ; 34
4120 005205' 200000 000740
4121 005206' 003500 352004 MWORD <JMAP,J=35,S0Q,OR,D=1,OENA,SELE,MGC=4> ; 35
4122 005207' 231000 005040
4123
4124 ;; Add 0 + data pattern inverted (floating 0) + cry
4125
4126 005210' 003600 370000 MWORD <JMAP,J=37,S0A,XNOR,B=1,D=2> ; 36
4127 005211' 472000 400040
4128 005212' 003700 000000 MWORD <CONT,S0A,PLUS,CRY,A=1,B=2,D=2> ; 37
4129 005213' 402011 000740
4130 005214' 004000 000000 MWORD <CONT,S0A,PLUS,CRY,A=2,B=3,D=3> ; 40
4131 005215' 403021 400740
4132 005216' 004100 000000 MWORD <CONT,S0A,PLUS,CRY,A=3,B=4,D=2> ; 41
4133 005217' 402032 000740
4134 005220' 004200 000000 MWORD <CONT,S0B,PLUS,CRY,A=4,B=4,D=3> ; 42
4135 005221' 303042 000740
4136 005222' 004300 000000 MWORD <CONT,S0B,PLUS,CRY,A=4,B=4,D=2> ; 43
4137 005223' 302042 000740
4138 005224' 004400 000000 MWORD <CONT,S0B,PLUS,CRY,A=4,B=4,D=0> ; 44
4139 005225' 300042 000740
4140 005226' 004500 000000 MWORD <CONT,S0Q,PLUS,CRY,D=0> ; 45
4141 005227' 200000 000740
4142 005230' 004600 462004 MWORD <JMAP,J=46,S0Q,OR,D=1,OENA,SELE,MGC=4> ; 46
4143 005231' 231000 005040
4144
4145 ;; Add 1 + data pattern inverted (floating 0) + cry
4146
4147 005232' 004700 500000 MWORD <JMAP,J=50,S0A,XNOR,B=1,D=2> ; 47
4148 005233' 472000 400040
4149 005234' 005000 000000 MWORD <CONT,S0A,AND,D=0> ; 50
4150 005235' 440000 000340
4151 005236' 005100 000000 MWORD <CONT,S0Q,PLUS,D=0,CRY> ; 51
4152 005237' 200000 000740
4153 005240' 005200 000000 MWORD <CONT,SAQ,PLUS,CRY,A=1,B=2,D=2> ; 52
4154 005241' 002011 000740
4155 005242' 005300 532004 MWORD <JMAP,J=53,S0A,OR,A=2,D=1,OENA,SELE,MGC=4> ; 53
4156 005243' 431020 005040
4157
4158 ;; Add f1 + f1 + cry
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 49-2
DFPTA4 MAC 19-Jan-83 11:21 2901 ALU Function Tests SEQ 1000
4159
4160 005244' 006200 630000 MWORD <ADDR=62,JMAP,J=63,S0A,OR,B=1,D=2> ; 62
4161 005245' 432000 400040
4162 005246' 006300 000000 MWORD <CONT,SAB,PLUS,CRY,B=1,D=2> ; 63
4163 005247' 102000 400740
4164 005250' 006400 642004 MWORD <JMAP,J=64,S0A,OR,A=1,D=1,OENA,SELE,MGC=4> ; 64
4165 005251' 431010 005040
4166
4167 ;; Add f1 + f0 + cry
4168
4169 005252' 006500 660000 MWORD <JMAP,J=66,S0A,XNOR,B=1,D=2> ; 65
4170 005253' 472000 400040
4171 005254' 006600 000000 MWORD <CONT,SAB,PLUS,CRY,B=1,D=2> ; 66
4172 005255' 102000 400740
4173 005256' 006700 672004 MWORD <JMAP,J=67,S0A,OR,A=1,D=1,OENA,SELE,MGC=4> ; 67
4174 005257' 431010 005040
4175 005260' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 50
DFPTA4 MAC 19-Jan-83 11:21 2901 ALU Function Tests SEQ 1001
4176
4177 ;#********************************************************************
4178 ;* Test 25 - 2901 R - S Test - Without Carry
4179 ;
4180 ; Description: Verify 0 - 0 ==> -1
4181 ; Verify -1 - -1 ==> -1
4182 ; Verify 0 - floating 1's ==> floating 0's
4183 ; Verify 0 - floating 0's ==> floating 1's
4184 ; Verify 1 - floating 0's ==> floating 1's + 1
4185 ; Verify that float 1's - float 1's ==> -1
4186 ; Verify that float 1's - float 0's ==> floating 1's
4187 ;
4188 ; Procedure: Clear Port
4189 ; Load microcode/set start address 0
4190 ;
4191 ; Add 0 - 0, verify that this works
4192 ; Add -1 - -1, verify that this works
4193 ;
4194 ; Build a data pattern (floating 1)
4195 ; Add 0 - data pattern (floating 1)
4196 ; Add 0 - data pattern inverted (floating 0)
4197 ; Add 1 - data pattern inverted (floating 0)
4198 ; Add f1 - f1
4199 ; Add f1 - f0
4200 ; Verify that each works
4201 ; Repeat with data patterns - floating 1's
4202 ;
4203 ; Failure: ---
4204 ;#********************************************************************
4205
4206 ; Test data
4207
4208 005261' 254 00 0 00 005272' TSTA25: JRST TG25 ; go start test
4209 005262' 420402 000025 EBUS!ALU!NDMP!ZALU!25 ; test mask
4210 005263' 005421' 007403' T25M,,[ASCIZ ^2901 R - S Test - No Carry^]
4211 005264' 006620' 000000 [EXP MLAST!E23],,0
4212 005265' 000000 005552' TSTA26 ; failure test table
4213 005266' 000000 006015' TSTA27 ; ...
4214 005267' 000000 006306' TSTA30
4215 005270' 000000000000# TSTA31
4216 005271' 777777 777777 -1
4217
4218 ; Start test
4219
4220 005272' 201 00 0 00 000000' TG25: MOVEI Z4 ; get address of module start
4221 005273' 260 17 0 00 004764* GO TRACE ; handle trace output
4222 005274' 201 01 0 00 005421' MOVEI 1,T25M ; set up microcode address
4223 005275' 260 17 0 00 004766* GO TLOAD ; load/verify it
4224 005276' 263 17 0 00 000000 RTN ; failed - exit test
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 51
DFPTA4 MAC 19-Jan-83 11:21 2901 ALU Function Tests SEQ 1002
4225
4226 ; Initialization
4227
4228 005277' 400 15 0 00 000000 TL25: SETZ ERFLG, ; clear error flag
4229 005300' 260 17 0 00 004771* GO IPACLR ; clear port
4230 005301' 402 00 0 00 004772* SETZM TSTSUB ; initialize subtest number
4231 005302' 201 06 0 00 005314' MOVEI 6,TS25 ; get sstep table address
4232
4233 ; Loop on single step table entries
4234
4235 005303' 260 17 0 00 004774* TA25: GO BEXEC ; execute table entry
4236 005304' 254 00 0 00 005313' JRST TX25 ; end of sstep table
4237 005305' 254 00 0 00 005303' JRST TA25 ; keep looping after call
4238 005306' 474 15 0 00 000000 SETO ERFLG, ; error - EBUF data incorrect
4239
4240 ; Handle error printouts and scope looping
4241
4242 005307' 027 00 0 00 005416' SCOPER MA25 ; print error message
4243 005310' 254 00 0 00 005277' JRST TL25 ; loop on error
4244 005311' 254 00 0 00 005313' JRST TX25 ; altmode exit
4245 005312' 322 15 0 00 005303' JUMPE ERFLG,TA25 ; do next sstep table entry
4246
4247 ; End of test
4248
4249 005313' 263 17 0 00 000000 TX25: RTN ; return
4250
4251 ; Sstep table, with EBUF data, as: (CMD,#Steps,Start addr,End Addr,EBUF data)
4252
4253 005314' 300000 005336' TS25: ATABLE (SSCALL,TS25A0)
4254 005315' 100700 000006 ATABLE (SSSTRT,7,0,6,-1)
4255 005316' 777777 777777
4256 005317' 300000 005342' ATABLE (SSCALL,TS25A1)
4257 005320' 100700 070015 ATABLE (SSSTRT,7,7,15,-1)
4258 005321' 777777 777777
4259 005322' 300000 005330' ATABLE (SSCALL,TS25IN)
4260 005323' 400000 005346' TS25L: ATABLE (SSCHK,TS25NX)
4261 005324' 100000 000000 ATABLE (SSSTRT,0,0,0,0)
4262 005325' 000000 000000
4263 005326' 500000 005323' ATABLE (SSJRST,TS25L)
4264 005327' 000000 000000 ATABLE (SSLAST)
4265
4266 ; Initialize single step data
4267
4268 005330' 201 00 0 00 000001 TS25IN: MOVEI 1 ; start with data pattern 1
4269 005331' 202 00 0 00 010014' MOVEM TS25PA# ; save it
4270 005332' 476 00 0 00 010015' SETOM TS25SG# ; initialize segment number
4271 005333' 201 00 0 00 000016 MOVEI 16 ; get initial start address
4272 005334' 202 00 0 00 005377' MOVEM TS25T2 ; for 1st subsection
4273 005335' 263 17 0 00 000000 RTN ; return
4274
4275 005336' 402 00 0 00 010005' TS25A0: SETZM TDATR ; 0 - 0
4276 005337' 402 00 0 00 010007' SETZM TDATS
4277 005340' 476 00 0 00 010006' SETOM TDATRS
4278 005341' 263 17 0 00 000000 RTN
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 52
DFPTA4 MAC 19-Jan-83 11:21 2901 ALU Function Tests SEQ 1003
4279
4280 005342' 476 00 0 00 010005' TS25A1: SETOM TDATR ; -1 - -1
4281 005343' 476 00 0 00 010007' SETOM TDATS
4282 005344' 476 00 0 00 010006' SETOM TDATRS
4283 005345' 263 17 0 00 000000 RTN
4284
4285 ; Handle single step data
4286
4287 005346' 336 00 0 00 010014' TS25NX: SKIPN TS25PA ; done with data patterns?
4288 005347' 263 17 0 00 000000 RTN ; yes - return +1
4289 005350' 350 01 0 00 010015' AOS 1,TS25SG ; point to proper segment
4290 005351' 303 01 0 00 000004 CAILE 1,4 ; done with this data pattern?
4291 JRST [MOVE 1,TS25PA ; yes - make up next one and go
4292 LSH 1,1 ; handle that one
4293 MOVEM 1,TS25PA
4294 SETOM TS25SG
4295 MOVEI 20 ; set up subsequent start address
4296 MOVEM TS25T2 ; for 1st subsection
4297 005352' 254 00 0 00 007411' JRST TS25NX]
4298 005353' 200 02 0 06 000000 MOVE 2,(6) ; get table entry
4299 005354' 200 00 0 01 005372' MOVE TS25T1(1) ; get number of single steps
4300 005355' 137 00 0 00 007241' DPB [POINT 9,2,11] ; insert into table entry
4301 005356' 200 00 0 01 005377' MOVE TS25T2(1) ; get starting address
4302 005357' 137 00 0 00 007242' DPB [POINT 12,2,23] ; insert into table entry
4303 005360' 200 00 0 01 005404' MOVE TS25T3(1) ; get ending address
4304 005361' 137 00 0 00 007243' DPB [POINT 12,2,35] ; insert into table entry
4305 005362' 202 02 0 06 000000 MOVEM 2,(6) ; save table entry
4306 005363' 402 00 0 00 010005' SETZM TDATR ; clear initial data
4307 005364' 402 00 0 00 010007' SETZM TDATS ; clear initial data
4308 005365' 256 00 0 01 005411' XCT TS25EB(1) ; get resulting data pattern
4309 005366' 202 00 0 06 000001 MOVEM 1(6) ; save EBUF data
4310 005367' 202 00 0 00 010006' MOVEM TDATRS ; save result data
4311 005370' 350 00 0 17 000000 AOS (P) ; set up proper return
4312 005371' 263 17 0 00 000000 RTN ; return
4313
4314 ; Number of single steps
4315
4316 005372' 000000 000011 TS25T1: 9
4317 005373' 000000 000010 8
4318 005374' 000000 000005 5
4319 005375' 000000 000003 3
4320 005376' 000000 000003 3
4321
4322 ; Starting address
4323
4324 005377' 000000 000016 TS25T2: 16
4325 005400' 000000 000031 31
4326 005401' 000000 000041 41
4327 005402' 000000 000053 53
4328 005403' 000000 000056 56
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 53
DFPTA4 MAC 19-Jan-83 11:21 2901 ALU Function Tests SEQ 1004
4329
4330 ; Ending address
4331
4332 005404' 000000 000030 TS25T3: 30
4333 005405' 000000 000040 40
4334 005406' 000000 000045 45
4335 005407' 000000 000055 55
4336 005410' 000000 000060 60
4337
4338 ; Table which calculates the result
4339
4340 TS25EB: GO [MOVE TS25PA ; 0 - f1 ==> f0
4341 MOVEM TDATS
4342 SETCA 0,
4343 005411' 260 17 0 00 007420' RTN]
4344 GO [SETZ 0, ; 0 - f0 ==> f1
4345 MOVE 1,TS25PA
4346 SETCA 1,
4347 MOVEM 1,TDATS
4348 MOVE TS25PA
4349 005412' 260 17 0 00 007424' RTN]
4350 GO [MOVEI 1 ; 1 - f0 ==> f1 + 1
4351 AOS TDATR
4352 MOVE 1,TS25PA
4353 SETCA 1,
4354 MOVEM 1,TDATS
4355 MOVE TS25PA
4356 TLNN 400000
4357 AOS
4358 TLNE 400000
4359 TRO 1
4360 005413' 260 17 0 00 007432' RTN]
4361 GO [MOVE TS25PA ; f1 - f1 ==> -1
4362 MOVEM TDATR
4363 MOVEM TDATS
4364 SETO 0,
4365 005414' 260 17 0 00 007445' RTN]
4366 GO [MOVE 1,TS25PA ; f1 - f0 ==> f1 shifted
4367 MOVEM 1,TDATR
4368 SETCA 1,
4369 MOVEM 1,TDATS
4370 MOVE TS25PA
4371 LSH 1
4372 005415' 260 17 0 00 007452' RTN]
4373
4374 ; Error messages
4375
4376 005416' 140000 007461' MA25: MSG!TXNOT![ASCIZ /2901 not doing an R-S function properly/]
4377 005417' 260000 006547' CALL!TXALL!RESPNT ; print R-S data
4378 005420' 000000000000# LAST!CALL!TXALL!SSPNT ; print sequencer data
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 54
DFPTA4 MAC 19-Jan-83 11:21 2901 ALU Function Tests SEQ 1005
4379
4380 ; Microcode:
4381
4382 ; Do 0 - 0, verify that this works
4383
4384 005421' 000000 010000 T25M: MWORD <ADDR=0,JMAP,J=1,S0A,AND,D=2> ; 0
4385 005422' 442000 000040
4386 005423' 000100 000000 MWORD <CONT,S0A,RMIN,D=2,B=17> ; 1
4387 005424' 422007 400340
4388 005425' 000200 000000 MWORD <CONT,S0B,RMIN,D=2,B=17> ; 2
4389 005426' 322007 400340
4390 005427' 000300 000000 MWORD <CONT,SAB,RMIN,D=2,B=17> ; 3
4391 005430' 122007 400340
4392 005431' 000400 000000 MWORD <CONT,S0A,AND,D=0> ; 4
4393 005432' 440000 000340
4394 005433' 000500 000000 MWORD <CONT,S0Q,RMIN,D=2,B=16> ; 5
4395 005434' 222007 000340
4396 005435' 000600 062004 MWORD <JMAP,J=6,SAB,OR,A=16,B=17,D=3,OENA,SELE,MGC=4> ; 6
4397 005436' 133167 405040
4398
4399 ; Do -1 - -1, verify that this works
4400
4401 005437' 000700 100000 MWORD <JMAP,J=10,S0A,AND,D=2> ; 7
4402 005440' 442000 000040
4403 005441' 001000 000000 MWORD <CONT,S0A,XNOR,B=1,D=2> ; 10
4404 005442' 472000 400340
4405 005443' 001100 000000 MWORD <CONT,S0A,XNOR,B=17,D=2> ; 11
4406 005444' 472007 400340
4407 005445' 001200 000000 MWORD <CONT,S0A,XNOR,D=0> ; 12
4408 005446' 470000 000340
4409 005447' 001300 000000 MWORD <CONT,SAB,RMIN,D=2,A=1,B=17> ; 13
4410 005450' 122017 400340
4411 005451' 001400 000000 MWORD <CONT,SAQ,RMIN,D=2,A=1,B=16> ; 14
4412 005452' 022017 000340
4413 005453' 001500 152004 MWORD <JMAP,J=15,SAB,OR,D=3,A=16,B=17,OENA,SELE,MGC=4>; 15
4414 005454' 133167 405040
4415
4416 ; Build a data pattern 0000..001 / Left shift it once
4417
4418 005455' 001600 170000 MWORD <JMAP,J=17,S0A,AND,D=2> ; 16 init
4419 005456' 442000 000040
4420 005457' 001700 220000 MWORD <JMAP,J=22,S0A,PLUS,D=2,CRY> ; 17
4421 005460' 402000 000440
4422 005461' 002000 210000 MWORD <JMAP,J=21,S0A,OR,D=1> ; 20 left shift
4423 005462' 431000 000040
4424 005463' 002100 000000 MWORD <CONT,S0A,OR,D=7> ; 21
4425 005464' 437000 000340
4426
4427 ;; Do 0 - data pattern (floating 1)
4428
4429 005465' 002200 000000 MWORD <CONT,S0A,RMIN,B=17,D=2> ; 22
4430 005466' 422007 400340
4431 005467' 002300 000000 MWORD <CONT,S0A,OR,B=16,D=2> ; 23
4432 005470' 432007 000340
4433 005471' 002400 000000 MWORD <CONT,S0A,OR,D=0> ; 24
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 54-1
DFPTA4 MAC 19-Jan-83 11:21 2901 ALU Function Tests SEQ 1006
4434 005472' 430000 000340
4435 005473' 002500 000000 MWORD <CONT,S0B,RMIN,B=16,D=2> ; 25
4436 005474' 322007 000340
4437 005475' 002600 000000 MWORD <CONT,SAB,OR,A=16,B=17,D=2> ; 26
4438 005476' 132167 400340
4439 005477' 002700 000000 MWORD <CONT,S0Q,RMIN,B=16,D=2> ; 27
4440 005500' 222007 000340
4441 005501' 003000 302004 MWORD <JMAP,J=30,SAB,OR,A=16,B=17,D=3,OENA,SELE,MGC=4>; 30
4442 005502' 133167 405040
4443
4444 ;; Do 0 - data pattern inverted (floating 0)
4445
4446 005503' 003100 320000 MWORD <JMAP,J=32,S0A,XNOR,B=1,D=2> ; 31
4447 005504' 472000 400040
4448 005505' 003200 000000 MWORD <CONT,S0A,XNOR,D=0> ; 32
4449 005506' 470000 000340
4450 005507' 003300 000000 MWORD <CONT,S0A,RMIN,A=1,B=17,D=2> ; 33
4451 005510' 422017 400340
4452 005511' 003400 000000 MWORD <CONT,S0A,OR,A=1,B=16,D=2> ; 34
4453 005512' 432017 000340
4454 005513' 003500 000000 MWORD <CONT,S0B,RMIN,B=16,D=2> ; 35
4455 005514' 322007 000340
4456 005515' 003600 000000 MWORD <CONT,SAB,OR,A=16,B=17,D=2> ; 36
4457 005516' 132167 400340
4458 005517' 003700 000000 MWORD <CONT,S0Q,RMIN,B=16,D=2> ; 37
4459 005520' 222007 000340
4460 005521' 004000 402004 MWORD <JMAP,J=40,SAB,OR,A=16,B=17,D=3,OENA,SELE,MGC=4>; 40
4461 005522' 133167 405040
4462
4463 ;; Do 1 - data pattern inverted (floating 0)
4464
4465 005523' 004100 420000 MWORD <JMAP,J=42,S0A,XNOR,D=0> ; 41
4466 005524' 470000 000040
4467 005525' 004200 000000 MWORD <CONT,S0B,AND,B=1,D=2> ; 42
4468 005526' 342000 400340
4469 005527' 004300 000000 MWORD <CONT,S0B,PLUS,B=1,D=2,CRY> ; 43
4470 005530' 302000 400740
4471 005531' 004400 000000 MWORD <CONT,SAQ,RMIN,A=1,B=2,D=2> ; 44
4472 005532' 022011 000340
4473 005533' 004500 452004 MWORD <JMAP,J=45,S0A,OR,A=2,D=1,OENA,SELE,MGC=4> ; 45
4474 005534' 431020 005040
4475
4476 ;; Do f1 - f1
4477
4478 005535' 005300 540000 MWORD <ADDR=53,JMAP,J=54,S0A,OR,B=1,D=2> ; 53
4479 005536' 432000 400040
4480 005537' 005400 000000 MWORD <CONT,SAB,RMIN,B=1,D=2> ; 54
4481 005540' 122000 400340
4482 005541' 005500 552004 MWORD <JMAP,J=55,S0A,OR,A=1,D=1,OENA,SELE,MGC=4> ; 55
4483 005542' 431010 005040
4484
4485 ;; Do f1 - f0
4486
4487 005543' 005600 570000 MWORD <JMAP,J=57,S0A,XNOR,D=0> ; 56
4488 005544' 470000 000040
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 54-2
DFPTA4 MAC 19-Jan-83 11:21 2901 ALU Function Tests SEQ 1007
4489 005545' 005700 000000 MWORD <CONT,SAQ,RMIN,B=1,D=2> ; 57
4490 005546' 022000 400340
4491 005547' 006000 602004 MWORD <JMAP,J=60,S0A,OR,A=1,D=1,OENA,SELE,MGC=4> ; 60
4492 005550' 431010 005040
4493 005551' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 55
DFPTA4 MAC 19-Jan-83 11:21 2901 ALU Function Tests SEQ 1008
4494
4495 ;#********************************************************************
4496 ;* Test 26 - 2901 R - S Test - With Carry
4497 ;
4498 ; Description: Verify 0 - 0 + cry ==> 0
4499 ; Verify -1 - -1 + cry ==> 0
4500 ; Verify 0 - floating 1's + cry ==> 1100...00
4501 ; Verify 0 - floating 0's + cry ==> floating 1's + 1
4502 ; Verify 1 - floating 0's + cry ==> floating 1's + 2
4503 ; Verify float 1's - float 1's + cry ==> 0
4504 ; Verify float 1's - float 0's + cry ==> floating 1's + 1
4505 ;
4506 ; Procedure: Clear Port
4507 ; Load microcode/set start address 0
4508 ;
4509 ; Add 0 - 0, verify that this works
4510 ; Add -1 - -1, verify that this works
4511 ;
4512 ; Build a data pattern (floating 1)
4513 ; Add 0 - data pattern (floating 1)
4514 ; Add 0 - data pattern inverted (floating 0)
4515 ; Add 1 - data pattern inverted (floating 0)
4516 ; Add f1 - f1
4517 ; Add f1 - f0
4518 ; Verify that each works
4519 ; Repeat with data patterns - floating 1's
4520 ;
4521 ; Failure: ---
4522 ;#********************************************************************
4523
4524 ; Test data
4525
4526 005552' 254 00 0 00 005563' TSTA26: JRST TG26 ; go start test
4527 005553' 420402 000026 EBUS!ALU!NDMP!ZALU!26 ; test mask
4528 005554' 005714' 007471' T26M,,[ASCIZ ^2901 R - S Test - With Carry^]
4529 005555' 006620' 000000 [EXP MLAST!E23],,0
4530 005556' 000000 006015' TSTA27 ; failure test table
4531 005557' 000000 006306' TSTA30 ; ...
4532 005560' 000000000000# TSTA31
4533 005561' 000000000000# TSTA32
4534 005562' 777777 777777 -1
4535
4536 ; Start test
4537
4538 005563' 201 00 0 00 000000' TG26: MOVEI Z4 ; get address of module start
4539 005564' 260 17 0 00 005273* GO TRACE ; handle trace output
4540 005565' 201 01 0 00 005714' MOVEI 1,T26M ; set up microcode address
4541 005566' 260 17 0 00 005275* GO TLOAD ; load/verify it
4542 005567' 263 17 0 00 000000 RTN ; failed - exit test
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 56
DFPTA4 MAC 19-Jan-83 11:21 2901 ALU Function Tests SEQ 1009
4543
4544 ; Initialization
4545
4546 005570' 400 15 0 00 000000 TL26: SETZ ERFLG, ; clear error flag
4547 005571' 260 17 0 00 005300* GO IPACLR ; clear port
4548 005572' 402 00 0 00 005301* SETZM TSTSUB ; initialize subtest number
4549 005573' 201 06 0 00 005605' MOVEI 6,TS26 ; get sstep table address
4550
4551 ; Loop on single step table entries
4552
4553 005574' 260 17 0 00 005303* TA26: GO BEXEC ; execute table entry
4554 005575' 254 00 0 00 005604' JRST TX26 ; end of sstep table
4555 005576' 254 00 0 00 005574' JRST TA26 ; keep looping after call
4556 005577' 474 15 0 00 000000 SETO ERFLG, ; error - EBUF data incorrect
4557
4558 ; Handle error printouts and scope looping
4559
4560 005600' 027 00 0 00 005711' SCOPER MA26 ; print error message
4561 005601' 254 00 0 00 005570' JRST TL26 ; loop on error
4562 005602' 254 00 0 00 005604' JRST TX26 ; altmode exit
4563 005603' 322 15 0 00 005574' JUMPE ERFLG,TA26 ; do next sstep table entry
4564
4565 ; End of test
4566
4567 005604' 263 17 0 00 000000 TX26: RTN ; return
4568
4569 ; Sstep table, with EBUF data, as: (CMD,#Steps,Start addr,End Addr,EBUF data)
4570
4571 005605' 300000 005627' TS26: ATABLE (SSCALL,TS26A0)
4572 005606' 100500 000004 ATABLE (SSSTRT,5,0,4,0)
4573 005607' 000000 000000
4574 005610' 300000 005634' ATABLE (SSCALL,TS26A1)
4575 005611' 100700 050013 ATABLE (SSSTRT,7,5,13,0)
4576 005612' 000000 000000
4577 005613' 300000 005621' ATABLE (SSCALL,TS26IN)
4578 005614' 400000 005641' TS26L: ATABLE (SSCHK,TS26NX)
4579 005615' 100000 000000 ATABLE (SSSTRT,0,0,0,0)
4580 005616' 000000 000000
4581 005617' 500000 005614' ATABLE (SSJRST,TS26L)
4582 005620' 000000 000000 ATABLE (SSLAST)
4583
4584 ; Initialize single step data
4585
4586 005621' 201 00 0 00 000001 TS26IN: MOVEI 1 ; start with data pattern 1
4587 005622' 202 00 0 00 010016' MOVEM TS26PA# ; save it
4588 005623' 476 00 0 00 010017' SETOM TS26SG# ; initialize segment number
4589 005624' 201 00 0 00 000016 MOVEI 16 ; get initial start address
4590 005625' 202 00 0 00 005672' MOVEM TS26T2 ; for 1st subsection
4591 005626' 263 17 0 00 000000 RTN ; return
4592
4593 005627' 402 00 0 00 010005' TS26A0: SETZM TDATR ; 0 - 0 + cry
4594 005630' 402 00 0 00 010007' SETZM TDATS
4595 005631' 402 00 0 00 010006' SETZM TDATRS
4596 005632' 350 00 0 00 010006' AOS TDATRS
4597 005633' 263 17 0 00 000000 RTN
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 57
DFPTA4 MAC 19-Jan-83 11:21 2901 ALU Function Tests SEQ 1010
4598
4599 005634' 476 00 0 00 010005' TS26A1: SETOM TDATR ; -1 - -1 + cry
4600 005635' 476 00 0 00 010007' SETOM TDATS
4601 005636' 402 00 0 00 010006' SETZM TDATRS
4602 005637' 350 00 0 00 010006' AOS TDATRS
4603 005640' 263 17 0 00 000000 RTN
4604
4605 ; Handle single step data
4606
4607 005641' 336 00 0 00 010016' TS26NX: SKIPN TS26PA ; done with data patterns?
4608 005642' 263 17 0 00 000000 RTN ; yes - return +1
4609 005643' 350 01 0 00 010017' AOS 1,TS26SG ; point to proper segment
4610 005644' 303 01 0 00 000004 CAILE 1,4 ; done with this data pattern?
4611 JRST [MOVE 1,TS26PA ; yes - make up next one and go
4612 LSH 1,1 ; handle that one
4613 MOVEM 1,TS26PA
4614 SETOM TS26SG
4615 MOVEI 20 ; set up subsequent start address
4616 MOVEM TS26T2 ; for 1st subsection
4617 005645' 254 00 0 00 007477' JRST TS26NX]
4618 005646' 200 02 0 06 000000 MOVE 2,(6) ; get table entry
4619 005647' 200 00 0 01 005665' MOVE TS26T1(1) ; get number of single steps
4620 005650' 137 00 0 00 007241' DPB [POINT 9,2,11] ; insert into table entry
4621 005651' 200 00 0 01 005672' MOVE TS26T2(1) ; get starting address
4622 005652' 137 00 0 00 007242' DPB [POINT 12,2,23] ; insert into table entry
4623 005653' 200 00 0 01 005677' MOVE TS26T3(1) ; get ending address
4624 005654' 137 00 0 00 007243' DPB [POINT 12,2,35] ; insert into table entry
4625 005655' 202 02 0 06 000000 MOVEM 2,(6) ; save table entry
4626 005656' 402 00 0 00 010005' SETZM TDATR ; clear initial data
4627 005657' 402 00 0 00 010007' SETZM TDATS ; clear initial data
4628 005660' 256 00 0 01 005704' XCT TS26EB(1) ; get resulting data pattern
4629 005661' 202 00 0 06 000001 MOVEM 1(6) ; save EBUF data
4630 005662' 202 00 0 00 010006' MOVEM TDATRS ; save result data
4631 005663' 350 00 0 17 000000 AOS (P) ; set up proper return
4632 005664' 263 17 0 00 000000 RTN ; return
4633
4634 ; Number of single steps
4635
4636 005665' 000000 000004 TS26T1: 4
4637 005666' 000000 000004 4
4638 005667' 000000 000005 5
4639 005670' 000000 000003 3
4640 005671' 000000 000003 3
4641
4642 ; Starting address
4643
4644 005672' 000000 000016 TS26T2: 16
4645 005673' 000000 000024 24
4646 005674' 000000 000041 41
4647 005675' 000000 000053 53
4648 005676' 000000 000056 56
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 58
DFPTA4 MAC 19-Jan-83 11:21 2901 ALU Function Tests SEQ 1011
4649
4650 ; Ending address
4651
4652 005677' 000000 000023 TS26T3: 23
4653 005700' 000000 000026 26
4654 005701' 000000 000045 45
4655 005702' 000000 000055 55
4656 005703' 000000 000060 60
4657
4658 ; Table which calculates the result
4659
4660 TS26EB: GO [MOVE TS26PA ; 0 - f1 + cry ==> 1100..00
4661 MOVEM TDATS
4662 SETCA
4663 TLNE 400000
4664 JRST [TLZ 400000
4665 AOS
4666 TLO 400000
4667 RTN]
4668 HRLZI 400000
4669 005704' 260 17 0 00 007506' RTN]
4670 GO [MOVE TS26PA ; 0 - f0 + cry ==> f1 + 1
4671 SETCA
4672 MOVEM TDATS
4673 MOVE TS26PA
4674 TLNN 400000
4675 AOS
4676 TLNE 400000
4677 TRO 1
4678 005705' 260 17 0 00 007515' RTN]
4679 GO [MOVE TS26PA ; 1 - f0 + cry ==> f1 + 2
4680 SETCA
4681 MOVEM TDATS
4682 AOS TDATR
4683 MOVE TS26PA
4684 TLNN 400000
4685 ADDI 2
4686 TLNE 400000
4687 TRO 2
4688 005706' 260 17 0 00 007526' RTN]
4689 GO [MOVE TS26PA ; f1 - f1 + cry ==> 0
4690 MOVEM TDATR
4691 MOVEM TDATS
4692 SETZ
4693 005707' 260 17 0 00 007540' RTN]
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 59
DFPTA4 MAC 19-Jan-83 11:21 2901 ALU Function Tests SEQ 1012
4694 GO [MOVE TS26PA ; f1 - f0 + cry ==> f1 shifted + 1
4695 MOVEM TDATR
4696 SETCA
4697 MOVEM TDATS
4698 MOVE TS26PA
4699 LSH 1
4700 TLNN 400000
4701 AOS
4702 TLNE 400000
4703 TRO 1
4704 005710' 260 17 0 00 007545' RTN]
4705
4706 ; Error messages
4707
4708 005711' 140000 007560' MA26: MSG!TXNOT![ASCIZ /2901 not doing an R-S+CRY function properly/]
4709 005712' 260000 006547' CALL!TXALL!RESPNT ; print R-S data
4710 005713' 000000000000# LAST!CALL!TXALL!SSPNT ; print sequencer data
4711
4712 ; Microcode:
4713
4714 ; Do 0 - 0 + cry, verify that this works
4715
4716 005714' 000000 010000 T26M: MWORD <ADDR=0,JMAP,J=1,S0A,AND,D=2> ; 0
4717 005715' 442000 000040
4718 005716' 000100 000000 MWORD <CONT,S0A,RMIN,CRY,D=2,B=17> ; 1
4719 005717' 422007 400740
4720 005720' 000200 000000 MWORD <CONT,S0A,AND,D=0> ; 2
4721 005721' 440000 000340
4722 005722' 000300 000000 MWORD <CONT,S0Q,RMIN,CRY,D=2,B=16> ; 3
4723 005723' 222007 000740
4724 005724' 000400 042004 MWORD <JMAP,J=4,SAB,PLUS,A=16,B=17,D=1,OENA,SELE,MGC=4> ; 4
4725 005725' 101167 405040
4726
4727 ; Do -1 - -1 + cry, verify that this works
4728
4729 005726' 000500 060000 MWORD <JMAP,J=6,S0A,AND,D=2> ; 5
4730 005727' 442000 000040
4731 005730' 000600 000000 MWORD <CONT,S0A,XNOR,B=1,D=2> ; 6
4732 005731' 472000 400340
4733 005732' 000700 000000 MWORD <CONT,S0A,XNOR,B=17,D=2> ; 7
4734 005733' 472007 400340
4735 005734' 001000 000000 MWORD <CONT,S0A,XNOR,D=0> ; 10
4736 005735' 470000 000340
4737 005736' 001100 000000 MWORD <CONT,SAB,RMIN,CRY,D=2,A=1,B=17> ; 11
4738 005737' 122017 400740
4739 005740' 001200 000000 MWORD <CONT,SAQ,RMIN,CRY,D=2,A=1,B=16> ; 12
4740 005741' 022017 000740
4741 005742' 001300 132004 MWORD <JMAP,J=13,SAB,PLUS,D=1,A=16,B=17,OENA,SELE,MGC=4> ; 13
4742 005743' 101167 405040
4743
4744 ; Build a data pattern 0000..001 / Left shift it once
4745
4746 005744' 001600 170000 MWORD <ADDR=16,JMAP,J=17,S0A,AND,D=2> ; 16 init
4747 005745' 442000 000040
4748 005746' 001700 220000 MWORD <JMAP,J=22,S0A,PLUS,D=2,CRY> ; 17
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 59-1
DFPTA4 MAC 19-Jan-83 11:21 2901 ALU Function Tests SEQ 1013
4749 005747' 402000 000440
4750 005750' 002000 210000 MWORD <JMAP,J=21,S0A,OR,D=1> ; 20 left shift
4751 005751' 431000 000040
4752 005752' 002100 000000 MWORD <CONT,S0A,OR,D=7> ; 21
4753 005753' 437000 000340
4754
4755 ;; Do 0 - data pattern (floating 1) + cry
4756
4757 005754' 002200 000000 MWORD <CONT,S0A,RMIN,CRY,B=17,D=2> ; 22
4758 005755' 422007 400740
4759 005756' 002300 232004 MWORD <JMAP,J=23,S0A,OR,A=17,D=1,OENA,SELE,MGC=4> ; 23
4760 005757' 431170 005040
4761
4762 ;; Do 0 - data pattern inverted (floating 0) + cry
4763
4764 005760' 002400 250000 MWORD <JMAP,J=25,S0A,XNOR,B=1,D=2> ; 24
4765 005761' 472000 400040
4766 005762' 002500 000000 MWORD <CONT,S0A,RMIN,CRY,A=1,B=17,D=2> ; 25
4767 005763' 422017 400740
4768 005764' 002600 262004 MWORD <JMAP,J=26,S0A,OR,A=17,D=1,OENA,SELE,MGC=4> ; 26
4769 005765' 431170 005040
4770
4771 ;; Do 1 - data pattern inverted (floating 0) + cry
4772
4773 005766' 004100 420000 MWORD <ADDR=41,JMAP,J=42,S0A,XNOR,D=0> ; 41
4774 005767' 470000 000040
4775 005770' 004200 000000 MWORD <CONT,S0B,AND,B=1,D=2> ; 42
4776 005771' 342000 400340
4777 005772' 004300 000000 MWORD <CONT,S0B,PLUS,B=1,D=2,CRY> ; 43
4778 005773' 302000 400740
4779 005774' 004400 000000 MWORD <CONT,SAQ,RMIN,CRY,A=1,B=2,D=2> ; 44
4780 005775' 022011 000740
4781 005776' 004500 452004 MWORD <JMAP,J=45,S0A,OR,A=2,D=1,OENA,SELE,MGC=4> ; 45
4782 005777' 431020 005040
4783
4784 ;; Do f1 - f1 + cry
4785
4786 006000' 005300 540000 MWORD <ADDR=53,JMAP,J=54,S0A,OR,B=1,D=2> ; 53
4787 006001' 432000 400040
4788 006002' 005400 000000 MWORD <CONT,SAB,RMIN,CRY,B=1,D=2> ; 54
4789 006003' 122000 400740
4790 006004' 005500 552004 MWORD <JMAP,J=55,S0A,OR,A=1,D=1,OENA,SELE,MGC=4> ; 55
4791 006005' 431010 005040
4792
4793 ;; Do f1 - f0 + cry
4794
4795 006006' 005600 570000 MWORD <JMAP,J=57,S0A,XNOR,D=0> ; 56
4796 006007' 470000 000040
4797 006010' 005700 000000 MWORD <CONT,SAQ,RMIN,CRY,B=1,D=2> ; 57
4798 006011' 022000 400740
4799 006012' 006000 602004 MWORD <JMAP,J=60,S0A,OR,A=1,D=1,OENA,SELE,MGC=4> ; 60
4800 006013' 431010 005040
4801 006014' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 60
DFPTA4 MAC 19-Jan-83 11:21 2901 ALU Function Tests SEQ 1014
4802
4803 ;#********************************************************************
4804 ;* Test 27 - 2901 S - R Test - Without Carry
4805 ;
4806 ; Description: Verify 0 - 0 ==> -1
4807 ; Verify -1 - -1 ==> -1
4808 ; Verify floating 1's - 0 ==> 00..0077..77
4809 ; Verify floating 0's - 0 ==> 77..7377..76
4810 ; Verify floating 0's - 1 ==> 77..7377..75
4811 ; Verify that float 1's - float 1's ==> -1
4812 ; Verify that float 0's - float 1's ==> -2
4813 ;
4814 ; Procedure: Clear Port
4815 ; Load microcode/set start address 0
4816 ;
4817 ; Add 0 - 0, verify that this works
4818 ; Add -1 - -1, verify that this works
4819 ;
4820 ; Build a data pattern (floating 1)
4821 ; Do data pattern (floating 1) - 0
4822 ; Do data pattern inverted (floating 0) - 0
4823 ; Do data pattern inverted (floating 0) - 1
4824 ; Do f1 - f1
4825 ; Do f0 - f1
4826 ; Verify that each works
4827 ; Repeat with data patterns - floating 1's
4828 ;
4829 ; Failure: ---
4830 ;#********************************************************************
4831
4832 ; Test data
4833
4834 006015' 254 00 0 00 006026' TSTA27: JRST TG27 ; go start test
4835 006016' 420402 000027 EBUS!ALU!NDMP!ZALU!27 ; test mask
4836 006017' 006155' 007571' T27M,,[ASCIZ ^2901 S - R Test - No Carry^]
4837 006020' 006620' 000000 [EXP MLAST!E23],,0
4838 006021' 000000 006306' TSTA30 ; failure test table
4839 006022' 000000000000# TSTA31 ; ...
4840 006023' 000000000000# TSTA32
4841 006024' 000000000000# TSTA33
4842 006025' 777777 777777 -1
4843
4844 ; Start test
4845
4846 006026' 201 00 0 00 000000' TG27: MOVEI Z4 ; get address of module start
4847 006027' 260 17 0 00 005564* GO TRACE ; handle trace output
4848 006030' 201 01 0 00 006155' MOVEI 1,T27M ; set up microcode address
4849 006031' 260 17 0 00 005566* GO TLOAD ; load/verify it
4850 006032' 263 17 0 00 000000 RTN ; failed - exit test
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 61
DFPTA4 MAC 19-Jan-83 11:21 2901 ALU Function Tests SEQ 1015
4851
4852 ; Initialization
4853
4854 006033' 400 15 0 00 000000 TL27: SETZ ERFLG, ; clear error flag
4855 006034' 260 17 0 00 005571* GO IPACLR ; clear port
4856 006035' 402 00 0 00 005572* SETZM TSTSUB ; initialize subtest number
4857 006036' 201 06 0 00 006050' MOVEI 6,TS27 ; get sstep table address
4858
4859 ; Loop on single step table entries
4860
4861 006037' 260 17 0 00 005574* TA27: GO BEXEC ; execute table entry
4862 006040' 254 00 0 00 006047' JRST TX27 ; end of sstep table
4863 006041' 254 00 0 00 006037' JRST TA27 ; keep looping after call
4864 006042' 474 15 0 00 000000 SETO ERFLG, ; error - EBUF data incorrect
4865
4866 ; Handle error printouts and scope looping
4867
4868 006043' 027 00 0 00 006152' SCOPER MA27 ; print error message
4869 006044' 254 00 0 00 006033' JRST TL27 ; loop on error
4870 006045' 254 00 0 00 006047' JRST TX27 ; altmode exit
4871 006046' 322 15 0 00 006037' JUMPE ERFLG,TA27 ; do next sstep table entry
4872
4873 ; End of test
4874
4875 006047' 263 17 0 00 000000 TX27: RTN ; return
4876
4877 ; Sstep table, with EBUF data, as: (CMD,#Steps,Start addr,End Addr,EBUF data)
4878
4879 006050' 300000 006072' TS27: ATABLE (SSCALL,TS27A0)
4880 006051' 100700 000006 ATABLE (SSSTRT,7,0,6,-1)
4881 006052' 777777 777777
4882 006053' 300000 006076' ATABLE (SSCALL,TS27A1)
4883 006054' 100700 070015 ATABLE (SSSTRT,7,7,15,-1)
4884 006055' 777777 777777
4885 006056' 300000 006064' ATABLE (SSCALL,TS27IN)
4886 006057' 400000 006102' TS27L: ATABLE (SSCHK,TS27NX)
4887 006060' 100000 000000 ATABLE (SSSTRT,0,0,0,0)
4888 006061' 000000 000000
4889 006062' 500000 006057' ATABLE (SSJRST,TS27L)
4890 006063' 000000 000000 ATABLE (SSLAST)
4891
4892 ; Initialize single step data
4893
4894 006064' 201 00 0 00 000001 TS27IN: MOVEI 1 ; start with data pattern 1
4895 006065' 202 00 0 00 010020' MOVEM TS27PA# ; save it
4896 006066' 476 00 0 00 010021' SETOM TS27SG# ; initialize segment number
4897 006067' 201 00 0 00 000016 MOVEI 16 ; get initial start address
4898 006070' 202 00 0 00 006133' MOVEM TS27T2 ; for 1st subsection
4899 006071' 263 17 0 00 000000 RTN ; return
4900
4901 006072' 402 00 0 00 010005' TS27A0: SETZM TDATR ; 0 - 0
4902 006073' 402 00 0 00 010007' SETZM TDATS
4903 006074' 402 00 0 00 010006' SETZM TDATRS
4904 006075' 263 17 0 00 000000 RTN
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 62
DFPTA4 MAC 19-Jan-83 11:21 2901 ALU Function Tests SEQ 1016
4905
4906 006076' 476 00 0 00 010005' TS27A1: SETOM TDATR ; -1 - -1
4907 006077' 476 00 0 00 010007' SETOM TDATS
4908 006100' 402 00 0 00 010006' SETZM TDATRS
4909 006101' 263 17 0 00 000000 RTN
4910
4911 ; Handle single step data
4912
4913 006102' 336 00 0 00 010020' TS27NX: SKIPN TS27PA ; done with data patterns?
4914 006103' 263 17 0 00 000000 RTN ; yes - return +1
4915 006104' 350 01 0 00 010021' AOS 1,TS27SG ; point to proper segment
4916 006105' 303 01 0 00 000004 CAILE 1,4 ; done with this data pattern?
4917 JRST [MOVE 1,TS27PA ; yes - make up next one and go
4918 LSH 1,1 ; handle that one
4919 MOVEM 1,TS27PA
4920 SETOM TS27SG
4921 MOVEI 20 ; set up subsequent start address
4922 MOVEM TS27T2 ; for 1st subsection
4923 006106' 254 00 0 00 007577' JRST TS27NX]
4924 006107' 200 02 0 06 000000 MOVE 2,(6) ; get table entry
4925 006110' 200 00 0 01 006126' MOVE TS27T1(1) ; get number of single steps
4926 006111' 137 00 0 00 007241' DPB [POINT 9,2,11] ; insert into table entry
4927 006112' 200 00 0 01 006133' MOVE TS27T2(1) ; get starting address
4928 006113' 137 00 0 00 007242' DPB [POINT 12,2,23] ; insert into table entry
4929 006114' 200 00 0 01 006140' MOVE TS27T3(1) ; get ending address
4930 006115' 137 00 0 00 007243' DPB [POINT 12,2,35] ; insert into table entry
4931 006116' 202 02 0 06 000000 MOVEM 2,(6) ; save table entry
4932 006117' 402 00 0 00 010005' SETZM TDATR ; clear initial data
4933 006120' 402 00 0 00 010007' SETZM TDATS ; clear initial data
4934 006121' 256 00 0 01 006145' XCT TS27EB(1) ; get resulting data pattern
4935 006122' 202 00 0 06 000001 MOVEM 1(6) ; save EBUF data
4936 006123' 202 00 0 00 010006' MOVEM TDATRS ; save result data
4937 006124' 350 00 0 17 000000 AOS (P) ; set up proper return
4938 006125' 263 17 0 00 000000 RTN ; return
4939
4940 ; Number of single steps
4941
4942 006126' 000000 000011 TS27T1: 9
4943 006127' 000000 000010 8
4944 006130' 000000 000005 5
4945 006131' 000000 000003 3
4946 006132' 000000 000003 3
4947
4948 ; Starting address
4949
4950 006133' 000000 000016 TS27T2: 16
4951 006134' 000000 000031 31
4952 006135' 000000 000041 41
4953 006136' 000000 000053 53
4954 006137' 000000 000056 56
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 63
DFPTA4 MAC 19-Jan-83 11:21 2901 ALU Function Tests SEQ 1017
4955
4956 ; Ending address
4957
4958 006140' 000000 000030 TS27T3: 30
4959 006141' 000000 000040 40
4960 006142' 000000 000045 45
4961 006143' 000000 000055 55
4962 006144' 000000 000060 60
4963
4964 ; Table which calculates the result
4965
4966 TS27EB: GO [MOVE 1,TS27PA ; f1 - 0 ==> 00..0077..77
4967 MOVEM 1,TDATS
4968 SETO 0,
4969 GO ADDLOG
4970 006145' 260 17 0 00 007606' RTN]
4971 GO [SETO 0, ; f0 - 0 ==> 77..7377..76
4972 MOVE 1,TS27PA
4973 SETCA 1,
4974 MOVEM 1,TDATS
4975 GO ADDLOG
4976 006146' 260 17 0 00 007613' RTN]
4977 GO [MOVEI 1 ; f0 - 1 ==> 77..7377..75
4978 MOVEM TDATR
4979 MOVE 1,TS27PA
4980 SETCA 1,
4981 MOVEM 1,TDATS
4982 MOVE [-2]
4983 GO ADDLOG
4984 006147' 260 17 0 00 007622' RTN]
4985 GO [MOVE TS27PA ; f1 - f1 ==> -1
4986 MOVEM TDATR
4987 MOVEM TDATS
4988 SETO
4989 006150' 260 17 0 00 007632' RTN]
4990 GO [MOVE 1,TS27PA ; f0 - f1 ==> -2
4991 MOVEM 1,TDATR
4992 SETCA 1,
4993 MOVEM 1,TDATS
4994 MOVE 1
4995 GO ADDLOG
4996 006151' 260 17 0 00 007637' RTN]
4997
4998 ; Error messages
4999
5000 006152' 140000 007646' MA27: MSG!TXNOT![ASCIZ /2901 not doing an S-R function properly/]
5001 006153' 260000 006547' CALL!TXALL!RESPNT ; print S-R data
5002 006154' 000000000000# LAST!CALL!TXALL!SSPNT ; print sequencer data
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 64
DFPTA4 MAC 19-Jan-83 11:21 2901 ALU Function Tests SEQ 1018
5003
5004 ; Microcode:
5005
5006 ; Do 0 - 0, verify that this works
5007
5008 006155' 000000 010000 T27M: MWORD <ADDR=0,JMAP,J=1,S0A,AND,D=2> ; 0
5009 006156' 442000 000040
5010 006157' 000100 000000 MWORD <CONT,S0A,SMIN,D=2,B=17> ; 1
5011 006160' 412007 400340
5012 006161' 000200 000000 MWORD <CONT,S0B,SMIN,D=2,B=17> ; 2
5013 006162' 312007 400340
5014 006163' 000300 000000 MWORD <CONT,SAB,SMIN,D=2,B=17> ; 3
5015 006164' 112007 400340
5016 006165' 000400 000000 MWORD <CONT,S0A,AND,D=0> ; 4
5017 006166' 440000 000340
5018 006167' 000500 000000 MWORD <CONT,S0Q,SMIN,D=2,B=16> ; 5
5019 006170' 212007 000340
5020 006171' 000600 062004 MWORD <JMAP,J=6,SAB,OR,A=16,B=17,D=1,OENA,SELE,MGC=4> ; 6
5021 006172' 131167 405040
5022
5023 ; Do -1 - -1, verify that this works
5024
5025 006173' 000700 100000 MWORD <JMAP,J=10,S0A,AND,D=2> ; 7
5026 006174' 442000 000040
5027 006175' 001000 000000 MWORD <CONT,S0A,XNOR,B=1,D=2> ; 10
5028 006176' 472000 400340
5029 006177' 001100 000000 MWORD <CONT,S0A,XNOR,B=17,D=2> ; 11
5030 006200' 472007 400340
5031 006201' 001200 000000 MWORD <CONT,S0A,XNOR,D=0> ; 12
5032 006202' 470000 000340
5033 006203' 001300 000000 MWORD <CONT,SAB,SMIN,D=2,A=1,B=17> ; 13
5034 006204' 112017 400340
5035 006205' 001400 000000 MWORD <CONT,SAQ,SMIN,D=2,A=1,B=16> ; 14
5036 006206' 012017 000340
5037 006207' 001500 152004 MWORD <JMAP,J=15,SAB,OR,D=1,A=16,B=17,OENA,SELE,MGC=4>; 15
5038 006210' 131167 405040
5039
5040 ; Build a data pattern 0000..001 / Left shift it once
5041
5042 006211' 001600 170000 MWORD <JMAP,J=17,S0A,AND,D=2> ; 16 init
5043 006212' 442000 000040
5044 006213' 001700 220000 MWORD <JMAP,J=22,S0A,PLUS,D=2,CRY> ; 17
5045 006214' 402000 000440
5046 006215' 002000 210000 MWORD <JMAP,J=21,S0A,OR,D=1> ; 20 left shift
5047 006216' 431000 000040
5048 006217' 002100 000000 MWORD <CONT,S0A,OR,D=7> ; 21
5049 006220' 437000 000340
5050
5051 ;; Do data pattern (floating 1) - 0
5052
5053 006221' 002200 000000 MWORD <CONT,S0A,SMIN,B=17,D=2> ; 22
5054 006222' 412007 400340
5055 006223' 002300 000000 MWORD <CONT,S0A,OR,B=16,D=2> ; 23
5056 006224' 432007 000340
5057 006225' 002400 000000 MWORD <CONT,S0A,OR,D=0> ; 24
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 64-1
DFPTA4 MAC 19-Jan-83 11:21 2901 ALU Function Tests SEQ 1019
5058 006226' 430000 000340
5059 006227' 002500 000000 MWORD <CONT,S0B,SMIN,B=16,D=2> ; 25
5060 006230' 312007 000340
5061 006231' 002600 000000 MWORD <CONT,SAB,OR,A=16,B=17,D=2> ; 26
5062 006232' 132167 400340
5063 006233' 002700 000000 MWORD <CONT,S0Q,SMIN,B=16,D=2> ; 27
5064 006234' 212007 000340
5065 006235' 003000 302004 MWORD <JMAP,J=30,SAB,OR,A=16,B=17,D=1,OENA,SELE,MGC=4>; 30
5066 006236' 131167 405040
5067
5068 ;; Do data pattern inverted (floating 0) - 0
5069
5070 006237' 003100 320000 MWORD <JMAP,J=32,S0A,XNOR,B=1,D=2> ; 31
5071 006240' 472000 400040
5072 006241' 003200 000000 MWORD <CONT,S0A,XNOR,D=0> ; 32
5073 006242' 470000 000340
5074 006243' 003300 000000 MWORD <CONT,S0A,A=1,SMIN,B=17,D=2> ; 33
5075 006244' 412017 400340
5076 006245' 003400 000000 MWORD <CONT,S0A,A=1,OR,B=16,D=2> ; 34
5077 006246' 432017 000340
5078 006247' 003500 000000 MWORD <CONT,S0B,SMIN,B=16,D=2> ; 35
5079 006250' 312007 000340
5080 006251' 003600 000000 MWORD <CONT,SAB,OR,A=16,B=17,D=2> ; 36
5081 006252' 132167 400340
5082 006253' 003700 000000 MWORD <CONT,S0Q,SMIN,B=16,D=2> ; 37
5083 006254' 212007 000340
5084 006255' 004000 402004 MWORD <JMAP,J=40,SAB,OR,A=16,B=17,D=1,OENA,SELE,MGC=4>; 40
5085 006256' 131167 405040
5086
5087 ;; Do data pattern inverted (floating 0) - 1
5088
5089 006257' 004100 420000 MWORD <JMAP,J=42,S0A,XNOR,D=0> ; 41
5090 006260' 470000 000040
5091 006261' 004200 000000 MWORD <CONT,S0B,AND,B=1,D=2> ; 42
5092 006262' 342000 400340
5093 006263' 004300 000000 MWORD <CONT,S0B,PLUS,B=1,D=2,CRY> ; 43
5094 006264' 302000 400740
5095 006265' 004400 000000 MWORD <CONT,SAQ,SMIN,A=1,B=2,D=2> ; 44
5096 006266' 012011 000340
5097 006267' 004500 452004 MWORD <JMAP,J=45,S0A,OR,A=2,D=1,OENA,SELE,MGC=4> ; 45
5098 006270' 431020 005040
5099
5100 ;; Do f1 - f1
5101
5102 006271' 005300 540000 MWORD <ADDR=53,JMAP,J=54,S0A,OR,B=1,D=2> ; 53
5103 006272' 432000 400040
5104 006273' 005400 000000 MWORD <CONT,SAB,SMIN,B=1,D=2> ; 54
5105 006274' 112000 400340
5106 006275' 005500 552004 MWORD <JMAP,J=55,S0A,OR,A=1,D=1,OENA,SELE,MGC=4> ; 55
5107 006276' 431010 005040
5108
5109 ;; Do f0 - f1
5110
5111 006277' 005600 570000 MWORD <JMAP,J=57,S0A,XNOR,D=0> ; 56
5112 006300' 470000 000040
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 64-2
DFPTA4 MAC 19-Jan-83 11:21 2901 ALU Function Tests SEQ 1020
5113 006301' 005700 000000 MWORD <CONT,SAQ,SMIN,B=1,D=2> ; 57
5114 006302' 012000 400340
5115 006303' 006000 602004 MWORD <JMAP,J=60,S0A,OR,A=1,D=1,OENA,SELE,MGC=4> ; 60
5116 006304' 431010 005040
5117 006305' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 65
DFPTA4 MAC 19-Jan-83 11:21 2901 ALU Function Tests SEQ 1021
5118
5119 ;#********************************************************************
5120 ;* Test 30 - 2901 S - R Test - With Carry
5121 ;
5122 ; Description: Verify 0 - 0 + cry ==> 0
5123 ; Verify -1 - -1 + cry ==> 0
5124 ; Verify floating 1's - 0 + cry ==> 00..0100..00
5125 ; Verify floating 0's - 0 + cry ==> 77..7377..77
5126 ; Verify floating 0's - 1 + cry ==> 77..7377..76
5127 ; Verify that float 1's - float 1's + cry ==> 0
5128 ; Verify that float 0's - float 1's + cry ==> -1
5129 ;
5130 ; Procedure: Clear Port
5131 ; Load microcode/set start address 0
5132 ;
5133 ; Add 0 - 0, verify that this works
5134 ; Add -1 - -1, verify that this works
5135 ;
5136 ; Build a data pattern (floating 1)
5137 ; Do data pattern (floating 1) - 0
5138 ; Do data pattern inverted (floating 0) - 0
5139 ; Do data pattern inverted (floating 0) - 1
5140 ; Do f1 - f1
5141 ; Do f0 - f1
5142 ; Verify that each works
5143 ; Repeat with data patterns - floating 1's
5144 ;
5145 ; Failure: ---
5146 ;#********************************************************************
5147
5148 ; Test data
5149
5150 006306' 254 00 0 00 006317' TSTA30: JRST TG30 ; go start test
5151 006307' 420402 000030 EBUS!ALU!NDMP!ZALU!30 ; test mask
5152 006310' 006446' 007656' T30M,,[ASCIZ ^2901 S - R Test - With Carry^]
5153 006311' 006620' 000000 [EXP MLAST!E23],,0
5154 006312' 000000000000# TSTA31 ; failure test table
5155 006313' 000000000000# TSTA32 ; ...
5156 006314' 000000000000# TSTA33
5157 006315' 000000000000# TSTA34
5158 006316' 777777 777777 -1
5159
5160 ; Start test
5161
5162 006317' 201 00 0 00 000000' TG30: MOVEI Z4 ; get address of module start
5163 006320' 260 17 0 00 006027* GO TRACE ; handle trace output
5164 006321' 201 01 0 00 006446' MOVEI 1,T30M ; set up microcode address
5165 006322' 260 17 0 00 006031* GO TLOAD ; load/verify it
5166 006323' 263 17 0 00 000000 RTN ; failed - exit test
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 66
DFPTA4 MAC 19-Jan-83 11:21 2901 ALU Function Tests SEQ 1022
5167
5168 ; Initialization
5169
5170 006324' 400 15 0 00 000000 TL30: SETZ ERFLG, ; clear error flag
5171 006325' 260 17 0 00 006034* GO IPACLR ; clear port
5172 006326' 402 00 0 00 006035* SETZM TSTSUB ; initialize subtest number
5173 006327' 201 06 0 00 006341' MOVEI 6,TS30 ; get sstep table address
5174
5175 ; Loop on single step table entries
5176
5177 006330' 260 17 0 00 006037* TA30: GO BEXEC ; execute table entry
5178 006331' 254 00 0 00 006340' JRST TX30 ; end of sstep table
5179 006332' 254 00 0 00 006330' JRST TA30 ; keep looping after call
5180 006333' 474 15 0 00 000000 SETO ERFLG, ; error - EBUF data incorrect
5181
5182 ; Handle error printouts and scope looping
5183
5184 006334' 027 00 0 00 006443' SCOPER MA30 ; print error message
5185 006335' 254 00 0 00 006324' JRST TL30 ; loop on error
5186 006336' 254 00 0 00 006340' JRST TX30 ; altmode exit
5187 006337' 322 15 0 00 006330' JUMPE ERFLG,TA30 ; do next sstep table entry
5188
5189 ; End of test
5190
5191 006340' 263 17 0 00 000000 TX30: RTN ; return
5192
5193 ; Sstep table, with EBUF data, as: (CMD,#Steps,Start addr,End Addr,EBUF data)
5194
5195 006341' 300000 006363' TS30: ATABLE (SSCALL,TS30A0)
5196 006342' 100500 000004 ATABLE (SSSTRT,5,0,4,0)
5197 006343' 000000 000000
5198 006344' 300000 006367' ATABLE (SSCALL,TS30A1)
5199 006345' 100700 050013 ATABLE (SSSTRT,7,5,13,0)
5200 006346' 000000 000000
5201 006347' 300000 006355' ATABLE (SSCALL,TS30IN)
5202 006350' 400000 006373' TS30L: ATABLE (SSCHK,TS30NX)
5203 006351' 100000 000000 ATABLE (SSSTRT,0,0,0,0)
5204 006352' 000000 000000
5205 006353' 500000 006350' ATABLE (SSJRST,TS30L)
5206 006354' 000000 000000 ATABLE (SSLAST)
5207
5208 ; Initialize single step data
5209
5210 006355' 201 00 0 00 000001 TS30IN: MOVEI 1 ; start with data pattern 1
5211 006356' 202 00 0 00 010022' MOVEM TS30PA# ; save it
5212 006357' 476 00 0 00 010023' SETOM TS30SG# ; initialize segment number
5213 006360' 201 00 0 00 000016 MOVEI 16 ; get initial start address
5214 006361' 202 00 0 00 006424' MOVEM TS30T2 ; for 1st subsection
5215 006362' 263 17 0 00 000000 RTN ; return
5216
5217 006363' 402 00 0 00 010005' TS30A0: SETZM TDATR ; 0 - 0 + cry
5218 006364' 402 00 0 00 010007' SETZM TDATS
5219 006365' 402 00 0 00 010006' SETZM TDATRS
5220 006366' 263 17 0 00 000000 RTN
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 67
DFPTA4 MAC 19-Jan-83 11:21 2901 ALU Function Tests SEQ 1023
5221
5222 006367' 476 00 0 00 010005' TS30A1: SETOM TDATR ; -1 - -1 + cry
5223 006370' 476 00 0 00 010007' SETOM TDATS
5224 006371' 402 00 0 00 010006' SETZM TDATRS
5225 006372' 263 17 0 00 000000 RTN
5226
5227 ; Handle single step data
5228
5229 006373' 336 00 0 00 010022' TS30NX: SKIPN TS30PA ; done with data patterns?
5230 006374' 263 17 0 00 000000 RTN ; yes - return +1
5231 006375' 350 01 0 00 010023' AOS 1,TS30SG ; point to proper segment
5232 006376' 303 01 0 00 000004 CAILE 1,4 ; done with this data pattern?
5233 JRST [MOVE 1,TS30PA ; yes - make up next one and go
5234 LSH 1,1 ; handle that one
5235 MOVEM 1,TS30PA
5236 SETOM TS30SG
5237 MOVEI 20 ; set up subsequent start address
5238 MOVEM TS30T2 ; for 1st subsection
5239 006377' 254 00 0 00 007664' JRST TS30NX]
5240 006400' 200 02 0 06 000000 MOVE 2,(6) ; get table entry
5241 006401' 200 00 0 01 006417' MOVE TS30T1(1) ; get number of single steps
5242 006402' 137 00 0 00 007241' DPB [POINT 9,2,11] ; insert into table entry
5243 006403' 200 00 0 01 006424' MOVE TS30T2(1) ; get starting address
5244 006404' 137 00 0 00 007242' DPB [POINT 12,2,23] ; insert into table entry
5245 006405' 200 00 0 01 006431' MOVE TS30T3(1) ; get ending address
5246 006406' 137 00 0 00 007243' DPB [POINT 12,2,35] ; insert into table entry
5247 006407' 202 02 0 06 000000 MOVEM 2,(6) ; save table entry
5248 006410' 402 00 0 00 010005' SETZM TDATR ; clear initial data
5249 006411' 402 00 0 00 010007' SETZM TDATS ; clear initial data
5250 006412' 256 00 0 01 006436' XCT TS30EB(1) ; get resulting data pattern
5251 006413' 202 00 0 06 000001 MOVEM 1(6) ; save EBUF data
5252 006414' 202 00 0 00 010006' MOVEM TDATRS ; save result data
5253 006415' 350 00 0 17 000000 AOS (P) ; set up proper return
5254 006416' 263 17 0 00 000000 RTN ; return
5255
5256 ; Number of single steps
5257
5258 006417' 000000 000004 TS30T1: 4
5259 006420' 000000 000003 3
5260 006421' 000000 000005 5
5261 006422' 000000 000003 3
5262 006423' 000000 000003 3
5263
5264 ; Starting address
5265
5266 006424' 000000 000016 TS30T2: 16
5267 006425' 000000 000024 24
5268 006426' 000000 000041 41
5269 006427' 000000 000053 53
5270 006430' 000000 000056 56
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 68
DFPTA4 MAC 19-Jan-83 11:21 2901 ALU Function Tests SEQ 1024
5271
5272 ; Ending address
5273
5274 006431' 000000 000023 TS30T3: 23
5275 006432' 000000 000026 26
5276 006433' 000000 000045 45
5277 006434' 000000 000055 55
5278 006435' 000000 000060 60
5279
5280 ; Table which calculates the result
5281
5282 TS30EB: GO [MOVE 1,TS30PA ; f1 - 0 + cry ==> f1
5283 MOVEM 1,TDATS
5284 MOVE 1
5285 006436' 260 17 0 00 007673' RTN]
5286 GO [SETO 0, ; f0 - 0 + cry ==> 77..7377..77
5287 MOVE 1,TS30PA
5288 SETCA 1,
5289 MOVEM 1,TDATS
5290 GO ADDLOG
5291 MOVEI 1,1
5292 GO ADDLOG
5293 006437' 260 17 0 00 007677' RTN]
5294 GO [MOVEI 1 ; f0 - 1 + cry ==> 77..7377..76
5295 MOVEM TDATR
5296 MOVE 1,TS30PA
5297 SETCA 1,
5298 MOVEM 1,TDATS
5299 MOVE [-2]
5300 GO ADDLOG
5301 MOVEI 1,1
5302 GO ADDLOG
5303 006440' 260 17 0 00 007707' RTN]
5304 GO [MOVE TS30PA ; f1 - f1 + cry ==> 0
5305 MOVEM TDATR
5306 MOVEM TDATS
5307 SETZ
5308 006441' 260 17 0 00 007721' RTN]
5309 GO [MOVE 1,TS30PA ; f0 - f1 + cry ==> f0 left shifted one
5310 MOVEM 1,TDATR
5311 SETCA 1,
5312 MOVEM 1,TDATS
5313 MOVE 1
5314 GO ADDLOG
5315 MOVEI 1,1
5316 GO ADDLOG
5317 006442' 260 17 0 00 007726' RTN]
5318
5319 ; Error messages
5320
5321 006443' 140000 007737' MA30: MSG!TXNOT![ASCIZ /2901 not doing an S-R+CRY function properly/]
5322 006444' 260000 006547' CALL!TXALL!RESPNT ; print S-R data
5323 006445' 000000000000# LAST!CALL!TXALL!SSPNT ; print sequencer data
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 69
DFPTA4 MAC 19-Jan-83 11:21 2901 ALU Function Tests SEQ 1025
5324
5325 ; Do 0 - 0 + cry, verify that this works
5326
5327 006446' 000000 010000 T30M: MWORD <ADDR=0,JMAP,J=1,S0A,AND,D=2> ; 0
5328 006447' 442000 000040
5329 006450' 000100 000000 MWORD <CONT,S0A,SMIN,CRY,D=2,B=17> ; 1
5330 006451' 412007 400740
5331 006452' 000200 000000 MWORD <CONT,S0A,AND,D=0> ; 2
5332 006453' 440000 000340
5333 006454' 000300 000000 MWORD <CONT,S0Q,SMIN,CRY,D=2,B=16> ; 3
5334 006455' 212007 000740
5335 006456' 000400 042004 MWORD <JMAP,J=4,SAB,PLUS,A=16,B=17,D=1,OENA,SELE,MGC=4> ; 4
5336 006457' 101167 405040
5337
5338 ; Do -1 - -1 + cry, verify that this works
5339
5340 006460' 000500 060000 MWORD <JMAP,J=6,S0A,AND,D=2> ; 5
5341 006461' 442000 000040
5342 006462' 000600 000000 MWORD <CONT,S0A,XNOR,B=1,D=2> ; 6
5343 006463' 472000 400340
5344 006464' 000700 000000 MWORD <CONT,S0A,XNOR,B=17,D=2> ; 7
5345 006465' 472007 400340
5346 006466' 001000 000000 MWORD <CONT,S0A,XNOR,D=0> ; 10
5347 006467' 470000 000340
5348 006470' 001100 000000 MWORD <CONT,SAB,SMIN,CRY,D=2,A=1,B=17> ; 11
5349 006471' 112017 400740
5350 006472' 001200 000000 MWORD <CONT,SAQ,SMIN,CRY,D=2,A=1,B=16> ; 12
5351 006473' 012017 000740
5352 006474' 001300 132004 MWORD <JMAP,J=13,SAB,PLUS,D=1,A=16,B=17,OENA,SELE,MGC=4> ; 13
5353 006475' 101167 405040
5354
5355 ; Build a data pattern 0000..001 / Left shift it once
5356
5357 006476' 001600 170000 MWORD <ADDR=16,JMAP,J=17,S0A,AND,D=2> ; 16 init
5358 006477' 442000 000040
5359 006500' 001700 220000 MWORD <JMAP,J=22,S0A,PLUS,D=2,CRY> ; 17
5360 006501' 402000 000440
5361 006502' 002000 210000 MWORD <JMAP,J=21,S0A,OR,D=1> ; 20 left shift
5362 006503' 431000 000040
5363 006504' 002100 000000 MWORD <CONT,S0A,OR,D=7> ; 21
5364 006505' 437000 000340
5365
5366 ;; Do data pattern (floating 1) - 0 + cry
5367
5368 006506' 002200 000000 MWORD <CONT,S0A,SMIN,CRY,B=17,D=2> ; 22
5369 006507' 412007 400740
5370 006510' 002300 232004 MWORD <JMAP,J=23,S0A,OR,A=17,D=1,OENA,SELE,MGC=4> ; 23
5371 006511' 431170 005040
5372
5373 ;; Do data pattern inverted (floating 0) - 0 + cry
5374
5375 006512' 002400 250000 MWORD <JMAP,J=25,S0A,XNOR,B=1,D=2> ; 24
5376 006513' 472000 400040
5377 006514' 002500 000000 MWORD <CONT,S0A,SMIN,CRY,A=1,B=17,D=2> ; 25
5378 006515' 412017 400740
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 69-1
DFPTA4 MAC 19-Jan-83 11:21 2901 ALU Function Tests SEQ 1026
5379 006516' 002600 262004 MWORD <JMAP,J=26,S0A,OR,A=17,D=1,OENA,SELE,MGC=4> ; 26
5380 006517' 431170 005040
5381
5382 ;; Do data pattern inverted (floating 0) - 1 + cry
5383
5384 006520' 004100 420000 MWORD <ADDR=41,JMAP,J=42,S0A,XNOR,D=0> ; 41
5385 006521' 470000 000040
5386 006522' 004200 000000 MWORD <CONT,S0B,AND,B=1,D=2> ; 42
5387 006523' 342000 400340
5388 006524' 004300 000000 MWORD <CONT,S0B,PLUS,B=1,D=2,CRY> ; 43
5389 006525' 302000 400740
5390 006526' 004400 000000 MWORD <CONT,SAQ,SMIN,CRY,A=1,B=2,D=2> ; 44
5391 006527' 012011 000740
5392 006530' 004500 452004 MWORD <JMAP,J=45,S0A,OR,A=2,D=1,OENA,SELE,MGC=4> ; 45
5393 006531' 431020 005040
5394
5395 ;; Do f1 - f1 + cry
5396
5397 006532' 005300 540000 MWORD <ADDR=53,JMAP,J=54,S0A,OR,B=1,D=2> ; 53
5398 006533' 432000 400040
5399 006534' 005400 000000 MWORD <CONT,SAB,SMIN,CRY,B=1,D=2> ; 54
5400 006535' 112000 400740
5401 006536' 005500 552004 MWORD <JMAP,J=55,S0A,OR,A=1,D=1,OENA,SELE,MGC=4> ; 55
5402 006537' 431010 005040
5403
5404 ;; Do f0 - f1 + cry
5405
5406 006540' 005600 570000 MWORD <JMAP,J=57,S0A,XNOR,D=0> ; 56
5407 006541' 470000 000040
5408 006542' 005700 000000 MWORD <CONT,SAQ,SMIN,CRY,B=1,D=2> ; 57
5409 006543' 012000 400740
5410 006544' 006000 602004 MWORD <JMAP,J=60,S0A,OR,A=1,D=1,OENA,SELE,MGC=4> ; 60
5411 006545' 431010 005040
5412 006546' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 70
DFPTA4 MAC 19-Jan-83 11:21 2901 ALU Function Tests SEQ 1027
5413
5414 ;#********************************************************************
5415 ; Miscellaneous Print Routines
5416 ;#********************************************************************
5417
5418 006547' 037 00 0 00 007750' RESPNT: TMSGC <R: >
5419 006550' 200 00 0 00 010005' MOVE TDATR
5420 006551' 037 13 0 00 000000 PNTHW
5421 006552' 037 00 0 00 007752' TMSG < S: >
5422 006553' 200 00 0 00 010007' MOVE TDATS
5423 006554' 037 13 0 00 000000 PNTHW
5424 006555' 200 01 0 00 000000* MOVE 1,SCOSW ; get switches
5425 006556' 603 01 0 00 000200 TLNE 1,TXTINH ; full printout?
5426 006557' 037 00 0 00 007754' TMSGC <Result (C): > ; no
5427 006560' 607 01 0 00 000200 TLNN 1,TXTINH ; full printout?
5428 006561' 037 00 0 00 007760' TMSGC <Result (Correct): > ; yes
5429 006562' 200 00 0 00 010006' MOVE TDATRS
5430 006563' 037 13 0 00 000000 PNTHW
5431 006564' 603 01 0 00 000200 TLNE 1,TXTINH ; full printout?
5432 006565' 037 00 0 00 007765' TMSGC < (A): > ; no
5433 006566' 607 01 0 00 000200 TLNN 1,TXTINH ; full printout?
5434 006567' 037 00 0 00 007771' TMSGC < (Actual): >
5435 006570' 200 00 0 00 002210* MOVE AEBUF
5436 006571' 037 13 0 00 000000 PNTHW
5437 006572' 263 17 0 00 000000 RTN
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 71
DFPTA4 MAC 19-Jan-83 11:21 2901 ALU Function Tests SEQ 1028
5438
5439 ;#********************************************************************
5440 ;* ADDLOG - Routine to logically add 2 numbers
5441 ;
5442 ; This routine gets around the fact that the DADD instruction uses only
5443 ; 35 bits in each word for the magnitude.
5444 ;
5445 ; Arguments: AC0 - Number A
5446 ; AC1 - Number B
5447 ;
5448 ; Returns: AC0 - Result
5449 ;#********************************************************************
5450
5451 006573' 261 17 0 00 000002 ADDLOG: RPUT (2,3,4) ; save AC's
5452
5453 006576' 200 04 0 00 000000 MOVE 4,0 ; free up AC0
5454 006577' 550 02 0 00 000004 HRRZ 2,4 ; get right half of A
5455 006600' 550 03 0 00 000001 HRRZ 3,1 ; get right half of B
5456 006601' 270 02 0 00 000003 ADD 2,3 ; add right halves
5457 006602' 200 00 0 00 000002 MOVE 0,2 ; save result
5458 006603' 554 02 0 00 000004 HLRZ 2,4 ; get left half of A
5459 006604' 554 03 0 00 000001 HLRZ 3,1 ; get left half of B
5460 006605' 270 02 0 00 000003 ADD 2,3 ; add right halves
5461 006606' 554 03 0 00 000000 HLRZ 3,0 ; get carry from right half
5462 006607' 270 02 0 00 000003 ADD 2,3 ; add in carry
5463 006610' 504 00 0 00 000002 HRL 2 ; save left half
5464 006611' 262 17 0 00 000004 RGET (4,3,2) ; restore AC's
5465
5466 006614' 263 17 0 00 000000 RTN ; return
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page 72
DFPTA4 MAC 19-Jan-83 11:21 2901 ALU Function Tests SEQ 1029
5467
5468 ;#********************************************************************
5469 ; End of 2901 Tests (Part 1)
5470 ;#********************************************************************
5471
5472 XLIST
5473
NO ERRORS DETECTED
PROGRAM BREAK IS 010024
CPU TIME USED 08:01.030
203P CORE USED
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page S-1
DFPTA4 MAC 19-Jan-83 11:21 SYMBOL TABLE SEQ 1030
ADDLOG 006573' SSSTRT 000001 spd TG12 001367' TS17 002706'
AEBUF 006570' ext T10M 001263' TG13 001451' TS2 000306'
ALU 020000 000000 spd T11M 001345' TG14 002110' TS20 003163'
BBPNT 000000 ext T12M 001427' TG15 002171' TS21 003454'
BEXEC 006330' ext T13M 001576' TG16 002405' TS22 004017'
CALL 200000 000000 spd T14M 002141' TG17 002664' TS23 004500'
CEBUF 002206' ext T15M 002267' TG2 000264' TS23A0 004522'
E23 000027 spd T16M 002446' TG20 003141' TS23A1 004526'
E24 000030 spd T17M 002717' TG21 003432' TS23EB 004575'
EBUS 400000 000000 spd T1M 000144' TG22 003775' TS23IN 004514'
ERFLG 000015 T20M 003174' TG23 004456' TS23L 004507'
GET 262740 000000 T21M 003465' TG24 004763' TS23NX 004532'
GO 260740 000000 T22M 004030' TG25 005272' TS23PA 010010'
IPACLR 006325' ext T23M 004605' TG26 005563' TS23SG 010011'
LAST 010000 000000 spd T24M 005114' TG27 006026' TS23T1 004556'
MA1 000142' T25M 005421' TG3 000647' TS23T2 004563'
MA10 001260' T26M 005714' TG30 006317' TS23T3 004570'
MA11 001342' T27M 006155' TG4 000731' TS24 005005'
MA12 001424' T2M 000331' TG5 001004' TS24A0 005027'
MA13 001574' T30M 006446' TG6 001057' TS24A1 005034'
MA14 002137' T3M 000707' TG7 001141' TS24EB 005104'
MA15 002264' T4M 000762' TL1 000016' TS24IN 005021'
MA16 002444' T5M 001035' TL10 001230' TS24L 005014'
MA17 002715' T6M 001117' TL11 001312' TS24NX 005041'
MA2 000327' T7M 001201' TL12 001374' TS24PA 010012'
MA20 003172' TA1 000022' TL13 001456' TS24SG 010013'
MA21 003463' TA10 001234' TL14 002115' TS24T1 005065'
MA22 004026' TA11 001316' TL15 002176' TS24T2 005072'
MA23 004602' TA12 001400' TL16 002412' TS24T3 005077'
MA24 005111' TA13 001462' TL17 002671' TS25 005314'
MA25 005416' TA14 002121' TL2 000271' TS25A0 005336'
MA26 005711' TA15 002202' TL20 003146' TS25A1 005342'
MA27 006152' TA16 002416' TL21 003437' TS25EB 005411'
MA3 000704' TA17 002675' TL22 004002' TS25IN 005330'
MA30 006443' TA2 000275' TL23 004463' TS25L 005323'
MA4 000760' TA20 003152' TL24 004770' TS25NX 005346'
MA5 001033' TA21 003443' TL25 005277' TS25PA 010014'
MA6 001114' TA22 004006' TL26 005570' TS25SG 010015'
MA7 001176' TA23 004467' TL27 006033' TS25T1 005372'
MLAST 400000 000000 spd TA24 004774' TL3 000654' TS25T2 005377'
MSG 100000 000000 spd TA25 005303' TL30 006324' TS25T3 005404'
NDMP 000400 000000 spd TA26 005574' TL4 000736' TS26 005605'
P 000017 TA27 006037' TL5 001011' TS26A0 005627'
PNTHW 037540 000000 TA3 000660' TL6 001064' TS26A1 005634'
PNTMSG 037000 000000 TA30 006330' TL7 001146' TS26EB 005704'
PUT 261740 000000 TA4 000742' TLOAD 006322' ext TS26IN 005621'
RESPNT 006547' TA5 001015' TRACE 006320' ext TS26L 005614'
RTN 263740 000000 TA6 001070' TS1 000033' TS26NX 005641'
SCOPER 027000 000000 TA7 001152' TS10 001253' TS26PA 010016'
SCOSW 006555' ext TDATR 010005' TS11 001335' TS26SG 010017'
SSCALL 000003 spd TDATRS 010006' TS12 001417' TS26T1 005665'
SSCHK 000004 spd TDATS 010007' TS13 001473' TS26T2 005672'
SSJRST 000005 spd TG1 000011' TS14 002132' TS26T3 005677'
SSLAST 000000 spd TG10 001223' TS15 002221' TS27 006050'
SSPNT 000000 ext TG11 001305' TS16 002427' TS27A0 006072'
.MAIN MACRO %53A(1152) 09:42 16-Oct-84 Page S-2
DFPTA4 MAC 19-Jan-83 11:21 SYMBOL TABLE SEQ 1031
TS27A1 006076' TSTA5 000773' ent .LS0A 000000 spd .RSD0 700000 000000 spd
TS27EB 006145' TSTA6 001046' ent .LS0B 000000 spd .RSELE 005000 spd
TS27IN 006064' TSTA7 001130' ent .LS0Q 000000 spd .RSKCN 240000 spd
TS27L 006057' TSTSUB 006326' ext .LSAB 000000 spd .RSMIN 010000 000000 spd
TS27NX 006102' TX1 000032' .LSAQ 000000 spd .RXNOR 070000 000000 spd
TS27PA 010020' TX10 001252' .LSD0 000000 spd .RXOR 060000 000000 spd
TS27SG 010021' TX11 001334' .LSELE 000000 spd
TS27T1 006126' TX12 001416' .LSKCN 000000 spd
TS27T2 006133' TX13 001472' .LSMIN 000000 spd
TS27T3 006140' TX14 002131' .LXNOR 000000 spd
TS2INI 000314' TX15 002220' .LXOR 000000 spd
TS2L 000307' TX16 002426' .MA 000017 spd
TS2SET 000316' TX17 002705' .MAND 000007 spd
TS3 000677' TX2 000305' .MB 000017 spd
TS30 006341' TX20 003162' .MCONT 000017 spd
TS30A0 006363' TX21 003453' .MCRY 000001 spd
TS30A1 006367' TX22 004016' .MD 000007 spd
TS30EB 006436' TX23 004477' .MJ 007777 spd
TS30IN 006355' TX24 005004' .MJMAP 000017 spd
TS30L 006350' TX25 005313' .MMGC 001777 spd
TS30NX 006373' TX26 005604' .MNAND 000007 spd
TS30PA 010022' TX27 006047' .MOENA 000001 spd
TS30SG 010023' TX3 000676' .MOR 000007 spd
TS30T1 006417' TX30 006340' .MPLUS 000007 spd
TS30T2 006424' TX4 000752' .MRMIN 000007 spd
TS30T3 006431' TX5 001025' .MS0A 000007 spd
TS4 000753' TX6 001106' .MS0B 000007 spd
TS5 001026' TX7 001170' .MS0Q 000007 spd
TS6 001107' TXALL 060000 000000 spd .MSAB 000007 spd
TS7 001171' TXNOT 040000 000000 spd .MSAQ 000007 spd
TSTA1 000000' ent TXTINH 000200 spd .MSD0 000007 spd
TSTA10 001212' ent Z4 000000' .MSELE 000007 spd
TSTA11 001274' ent ZALU 000002 000000 spd .MSKCN 000037 spd
TSTA12 001356' ent $ARG2 000004 .MSMIN 000007 spd
TSTA13 001440' ent $B 000043 .MXNOR 000007 spd
TSTA14 002077' ent $CHR 554743 .MXOR 000007 spd
TSTA15 002160' ent $GARG 000001 .RA 000010 000000 spd
TSTA16 002374' ent %ADDR 000061 spd .RAND 040000 000000 spd
TSTA17 002653' ent %ML 006000 602004 spd .RB 400000 spd
TSTA2 000253' ent %MR 431010 005040 spd .RCONT 000340 spd
TSTA20 003130' ent .LA 000000 spd .RCRY 000400 spd
TSTA21 003421' ent .LADDR 000100 000000 spd .RD 001000 000000 spd
TSTA22 003764' ent .LAND 000000 spd .RJ 000000 spd
TSTA23 004445' ent .LB 000000 spd .RJMAP 000040 spd
TSTA24 004752' ent .LCONT 000000 spd .RMGC 000000 spd
TSTA25 005261' ent .LCRY 000000 spd .RNAND 050000 000000 spd
TSTA26 005552' ent .LD 000000 spd .ROENA 000000 spd
TSTA27 006015' ent .LJ 010000 spd .ROR 030000 000000 spd
TSTA3 000636' ent .LJMAP 000000 spd .RPLUS 000000 spd
TSTA30 006306' ent .LMGC 000001 spd .RRMIN 020000 000000 spd
TSTA31 000000 ext .LNAND 000000 spd .RS0A 400000 000000 spd
TSTA32 000000 ext .LOENA 002000 spd .RS0B 300000 000000 spd
TSTA33 000000 ext .LOR 000000 spd .RS0Q 200000 000000 spd
TSTA34 000000 ext .LPLUS 000000 spd .RSAB 100000 000000 spd
TSTA4 000720' ent .LRMIN 000000 spd .RSAQ 000000 spd
ADDLOG 4022 4029 4969 4975 4983 4995 5290 5292 5300 5302 5314 5316 5451#
AEBUF 19# 705 985 1084 1183 1282 1383 1988 5435 SEQ 1032
ALU 72 315 673 771 861 953 1052 1151 1250 1351 1459 1854 1956 2179
2415 2649 2895 3183 3552 3878 4209 4527 4835 5151
BBPNT 19# 191 384 734 824 914 1013 1112 1211 1310 1411 1572 1907 2046
2240 2470 2704 2950 3238
BEXEC 19# 98 341 699 797 887 979 1078 1177 1276 1377 1485 1880 1982
2205 2441 2675 2921 3209 3578 3904 4235 4553 4861 5177
CALL 191 384 734 824 914 1013 1112 1211 1310 1411 1572 1907 2046 2240
2470 2704 2950 3238 3716 3717 4047 4048 4377 4378 4709 4710 5001 5002
5322 5323
CEBUF 19# 703 983 1082 1181 1280 1381 1986
E23 74 317 675 773 863 955 1054 1153 1252 1353 1461 1856 1958 2181
2417 2651 2897 3185 3554 3880 4211 4529 4837 5153
E24 675 773 863 955 1054 1153 1252 1353
EBUS 72 315 673 771 861 953 1052 1151 1250 1351 1459 1854 1956 2179
2415 2649 2895 3183 3552 3878 4209 4527 4835 5151
ERFLG 91 101 108 334 344 351 692 708 715 790 800 807 880 890
897 972 988 995 1071 1087 1094 1170 1186 1193 1269 1285 1292 1370
1386 1393 1478 1488 1495 1873 1883 1890 1975 1991 1998 2198 2208 2215
2434 2444 2451 2668 2678 2685 2914 2924 2931 3202 3212 3219 3571 3581
3588 3897 3907 3914 4228 4238 4245 4546 4556 4563 4854 4864 4871 5170
5180 5187
IPACLR 23# 92 335 693 791 881 973 1072 1171 1270 1371 1479 1874 1976
2199 2435 2669 2915 3203 3572 3898 4229 4547 4855 5171
LAST 191 384 734 824 914 1013 1112 1211 1310 1411 1572 1907 2046 2240
2470 2704 2950 3238 3717 4048 4378 4710 5002 5323
MA1 105 190#
MA10 1190 1209#
MA11 1289 1308#
MA12 1390 1409#
MA13 1492 1571#
MA14 1887 1906#
MA15 1995 2044#
MA16 2212 2239#
MA17 2448 2469#
MA2 348 383#
MA20 2682 2703#
MA21 2928 2949#
MA22 3216 3237#
MA23 3585 3715#
MA24 3911 4046#
MA25 4242 4376#
MA26 4560 4708#
MA27 4868 5000#
MA3 712 732#
MA30 5184 5321#
MA4 804 823#
MA5 894 913#
MA6 992 1011#
MA7 1091 1110#
MLAST 74 317 675 773 863 955 1054 1153 1252 1353 1461 1856 1958 2181
2417 2651 2897 3185 3554 3880 4211 4529 4837 5153
MSG 190 383 732 733 823 913 1011 1012 1110 1111 1209 1210 1308 1309
1409 1410 1571 1906 2044 2045 2239 2469 2703 2949 3237 3715 4046 4376 SEQ 1033
4708 5000 5321
NDMP 72 315 673 771 861 953 1052 1151 1250 1351 1459 1854 1956 2179
2415 2649 2895 3183 3552 3878 4209 4527 4835 5151
P 373 3654 3982 4311 4631 4937 5253
RESPNT 3716 4047 4377 4709 5001 5322 5418#
SCOSW 19# 27# 5424
SSCALL 359 360 3596 3597 3599 3600 3602 3603 3922 3923 3925 3926 3928 3929
4253 4254 4256 4257 4259 4260 4571 4572 4574 4575 4577 4578 4879 4880
4882 4883 4885 4886 5195 5196 5198 5199 5201 5202
SSCHK 360 361 3603 3604 3929 3930 4260 4261 4578 4579 4886 4887 5202 5203
SSJRST 363 364 3606 3607 3932 3933 4263 4264 4581 4582 4889 4890 5205 5206
SSLAST 186 187 364 365 727 728 819 820 909 910 1007 1008 1106 1107
1205 1206 1304 1305 1405 1406 1567 1568 1902 1903 2040 2041 2235 2236
2465 2466 2699 2700 2945 2946 3233 3234 3607 3608 3933 3934 4264 4265
4582 4583 4890 4891 5206 5207
SSPNT 19# 3717 4048 4378 4710 5002 5323
SSSTRT 116 117 118 119 120 121 122 123 124 125 126 127 128 129
130 131 132 133 134 135 136 137 138 139 140 141 142 143
144 145 146 147 148 149 150 151 152 153 154 155 156 157
158 159 160 161 162 163 164 165 166 167 168 169 170 171
172 173 174 175 176 177 178 179 180 181 182 183 184 185
186 361 362 363 723 724 725 726 727 815 816 817 818 819
905 906 907 908 909 1003 1004 1005 1006 1007 1102 1103 1104 1105
1106 1201 1202 1203 1204 1205 1300 1301 1302 1303 1304 1401 1402 1403
1404 1405 1503 1504 1505 1506 1507 1508 1509 1510 1511 1512 1513 1514
1515 1516 1517 1518 1519 1520 1521 1522 1523 1524 1525 1526 1527 1528
1529 1530 1531 1532 1533 1534 1535 1536 1537 1538 1539 1540 1541 1542
1543 1544 1545 1546 1547 1548 1549 1550 1551 1552 1553 1554 1555 1556
1557 1558 1559 1560 1561 1562 1563 1564 1565 1566 1567 1898 1899 1900
1901 1902 2006 2007 2008 2009 2010 2011 2012 2013 2014 2015 2016 2017
2018 2019 2020 2021 2022 2023 2024 2025 2026 2027 2028 2029 2030 2031
2032 2033 2034 2035 2036 2037 2038 2039 2040 2223 2224 2225 2226 2227
2228 2229 2230 2231 2232 2233 2234 2235 2459 2460 2461 2462 2463 2464
2465 2693 2694 2695 2696 2697 2698 2699 2939 2940 2941 2942 2943 2944
2945 3227 3228 3229 3230 3231 3232 3233 3597 3598 3599 3600 3601 3602
3604 3605 3606 3923 3924 3925 3926 3927 3928 3930 3931 3932 4254 4255
4256 4257 4258 4259 4261 4262 4263 4572 4573 4574 4575 4576 4577 4579
4580 4581 4880 4881 4882 4883 4884 4885 4887 4888 4889 5196 5197 5198
5199 5200 5201 5203 5204 5205
T10M 1152 1164 1215#
T11M 1251 1263 1314#
T12M 1352 1364 1415#
T13M 1460 1472 1576#
T14M 1855 1867 1911#
T15M 1957 1969 2050#
T16M 2180 2192 2244#
T17M 2416 2428 2474#
T1M 73 85 197#
T20M 2650 2662 2708#
T21M 2896 2908 2954#
T22M 3184 3196 3242#
T23M 3553 3565 3723#
T24M 3879 3891 4054# SEQ 1034
T25M 4210 4222 4384#
T26M 4528 4540 4716#
T27M 4836 4848 5008#
T2M 316 328 390#
T30M 5152 5164 5327#
T3M 674 686 738#
T4M 772 784 828#
T5M 862 874 918#
T6M 954 966 1017#
T7M 1053 1065 1116#
TA1 98# 100 108
TA10 1177# 1179 1193
TA11 1276# 1278 1292
TA12 1377# 1379 1393
TA13 1485# 1487 1495
TA14 1880# 1882 1890
TA15 1982# 1984 1998
TA16 2205# 2207 2215
TA17 2441# 2443 2451
TA2 341# 343 351
TA20 2675# 2677 2685
TA21 2921# 2923 2931
TA22 3209# 3211 3219
TA23 3578# 3580 3588
TA24 3904# 3906 3914
TA25 4235# 4237 4245
TA26 4553# 4555 4563
TA27 4861# 4863 4871
TA3 699# 701 715
TA30 5177# 5179 5187
TA4 797# 799 807
TA5 887# 889 897
TA6 979# 981 995
TA7 1078# 1080 1094
TDATR 3618 3623 3649# 3649 3692 3702 3707 3944 3950 3977 4026 4032 4038 4275
4280 4306 4351 4362 4367 4593 4599 4626 4682 4690 4695 4901 4906 4932
4978 4986 4991 5217 5222 5248 5295 5305 5310 5419
TDATRS 3620 3625 3653# 3653 3946 3947 3952 3953 3981 4277 4282 4310 4595 4596
4601 4602 4630 4903 4908 4936 5219 5224 5252 5429
TDATS 3619 3624 3650# 3650 3684 3688 3693 3703 3709 3945 3951 3978 4012 4021
4027 4033 4040 4276 4281 4307 4341 4347 4354 4363 4369 4594 4600 4627
4661 4672 4681 4691 4697 4902 4907 4933 4967 4974 4981 4987 4993 5218
5223 5249 5283 5289 5298 5306 5312 5422
TG1 71 83#
TG10 1150 1162#
TG11 1249 1261#
TG12 1350 1362#
TG13 1458 1470#
TG14 1853 1865#
TG15 1955 1967#
TG16 2178 2190#
TG17 2414 2426#
TG2 314 326# SEQ 1035
TG20 2648 2660#
TG21 2894 2906#
TG22 3182 3194#
TG23 3551 3563#
TG24 3877 3889#
TG25 4208 4220#
TG26 4526 4538#
TG27 4834 4846#
TG3 672 684#
TG30 5150 5162#
TG4 770 782#
TG5 860 872#
TG6 952 964#
TG7 1051 1063#
TL1 91# 106
TL10 1170# 1191
TL11 1269# 1290
TL12 1370# 1391
TL13 1478# 1493
TL14 1873# 1888
TL15 1975# 1996
TL16 2198# 2213
TL17 2434# 2449
TL2 334# 349
TL20 2668# 2683
TL21 2914# 2929
TL22 3202# 3217
TL23 3571# 3586
TL24 3897# 3912
TL25 4228# 4243
TL26 4546# 4561
TL27 4854# 4869
TL3 692# 713
TL30 5170# 5185
TL4 790# 805
TL5 880# 895
TL6 972# 993
TL7 1071# 1092
TLOAD 19# 86 329 687 785 875 967 1066 1165 1264 1365 1473 1868 1970
2193 2429 2663 2909 3197 3566 3892 4223 4541 4849 5165
TRACE 19# 84 327 685 783 873 965 1064 1163 1262 1363 1471 1866 1968
2191 2427 2661 2907 3195 3564 3890 4221 4539 4847 5163
TS1 94 116#
TS10 1173 1201#
TS11 1272 1300#
TS12 1373 1401#
TS13 1481 1503#
TS14 1876 1898#
TS15 1978 2006#
TS16 2201 2223#
TS17 2437 2459#
TS2 337 359#
TS20 2671 2693# SEQ 1036
TS21 2917 2939#
TS22 3205 3227#
TS23 3574 3596#
TS23A0 3596 3618#
TS23A1 3599 3623#
TS23EB 3651 3683#
TS23IN 3602 3611#
TS23L 3603# 3606
TS23NX 3603 3630# 3640
TS23PA 3612# 3612 3630 3634 3636 3683 3686 3690 3701 3706
TS23SG 3613# 3613 3632 3637
TS23T1 3642 3659#
TS23T2 3615 3639 3644 3667#
TS23T3 3646 3675#
TS24 3900 3922#
TS24A0 3922 3944#
TS24A1 3925 3950#
TS24EB 3979 4011#
TS24IN 3928 3937#
TS24L 3929# 3932
TS24NX 3929 3958# 3968
TS24PA 3938# 3938 3958 3962 3964 4011 4018 4024 4031 4037
TS24SG 3939# 3939 3960 3965
TS24T1 3970 3987#
TS24T2 3941 3967 3972 3995#
TS24T3 3974 4003#
TS25 4231 4253#
TS25A0 4253 4275#
TS25A1 4256 4280#
TS25EB 4308 4340#
TS25IN 4259 4268#
TS25L 4260# 4263
TS25NX 4260 4287# 4297
TS25PA 4269# 4269 4287 4291 4293 4340 4345 4348 4352 4355 4361 4366 4370
TS25SG 4270# 4270 4289 4294
TS25T1 4299 4316#
TS25T2 4272 4296 4301 4324#
TS25T3 4303 4332#
TS26 4549 4571#
TS26A0 4571 4593#
TS26A1 4574 4599#
TS26EB 4628 4660#
TS26IN 4577 4586#
TS26L 4578# 4581
TS26NX 4578 4607# 4617
TS26PA 4587# 4587 4607 4611 4613 4660 4670 4673 4679 4683 4689 4694 4698
TS26SG 4588# 4588 4609 4614
TS26T1 4619 4636#
TS26T2 4590 4616 4621 4644#
TS26T3 4623 4652#
TS27 4857 4879#
TS27A0 4879 4901#
TS27A1 4882 4906# SEQ 1037
TS27EB 4934 4966#
TS27IN 4885 4894#
TS27L 4886# 4889
TS27NX 4886 4913# 4923
TS27PA 4895# 4895 4913 4917 4919 4966 4972 4979 4985 4990
TS27SG 4896# 4896 4915 4920
TS27T1 4925 4942#
TS27T2 4898 4922 4927 4950#
TS27T3 4929 4958#
TS2INI 359 368#
TS2L 360# 363
TS2SET 360 371#
TS3 695 723#
TS30 5173 5195#
TS30A0 5195 5217#
TS30A1 5198 5222#
TS30EB 5250 5282#
TS30IN 5201 5210#
TS30L 5202# 5205
TS30NX 5202 5229# 5239
TS30PA 5211# 5211 5229 5233 5235 5282 5287 5296 5304 5309
TS30SG 5212# 5212 5231 5236
TS30T1 5241 5258#
TS30T2 5214 5238 5243 5266#
TS30T3 5245 5274#
TS4 793 815#
TS5 883 905#
TS6 975 1003#
TS7 1074 1102#
TSTA1 9 71#
TSTA10 9 777 866 957 1055 1150#
TSTA11 10 867 958 1056 1154 1249#
TSTA12 10 959 1057 1155 1253 1350#
TSTA13 10 1058 1156 1254 1354 1458#
TSTA14 10 1157 1255 1355 1462 1853#
TSTA15 10 1256 1356 1463 1857 1955#
TSTA16 10 1357 1464 1858 1959 2178#
TSTA17 10 1465 1859 1960 2182 2414#
TSTA2 9 75 314#
TSTA20 10 1860 1961 2183 2418 2648#
TSTA21 11 1962 2184 2419 2652 2894#
TSTA22 11 2185 2420 2653 2898 3182#
TSTA23 11 2421 2654 2899 3186 3551#
TSTA24 11 2655 2900 3187 3555 3877#
TSTA25 11 2901 3188 3556 3881 4208#
TSTA26 11 3189 3557 3882 4212 4526#
TSTA27 11 3558 3883 4213 4530 4834#
TSTA3 9 76 318 672#
TSTA30 11 3884 4214 4531 4838 5150#
TSTA31 15# 4215 4532 4839 5154
TSTA32 15# 4533 4840 5155
TSTA33 15# 4841 5156
TSTA34 15# 5157 SEQ 1038
TSTA4 9 77 319 676 770#
TSTA5 9 78 320 677 774 860#
TSTA6 9 321 678 775 864 952#
TSTA7 9 679 776 865 956 1051#
TSTSUB 19# 93 336 694 792 882 974 1073 1172 1271 1372 1480 1875 1977
2200 2436 2670 2916 3204 3573 3899 4230 4548 4856 5172
TX1 99 107 112#
TX10 1178 1192 1197#
TX11 1277 1291 1296#
TX12 1378 1392 1397#
TX13 1486 1494 1499#
TX14 1881 1889 1894#
TX15 1983 1997 2002#
TX16 2206 2214 2219#
TX17 2442 2450 2455#
TX2 342 350 355#
TX20 2676 2684 2689#
TX21 2922 2930 2935#
TX22 3210 3218 3223#
TX23 3579 3587 3592#
TX24 3905 3913 3918#
TX25 4236 4244 4249#
TX26 4554 4562 4567#
TX27 4862 4870 4875#
TX3 700 714 719#
TX30 5178 5186 5191#
TX4 798 806 811#
TX5 888 896 901#
TX6 980 994 999#
TX7 1079 1093 1098#
TXALL 191 384 734 824 914 1013 1112 1211 1310 1411 1572 1907 2046 2240
2470 2704 2950 3238 3716 3717 4047 4048 4377 4378 4709 4710 5001 5002
5322 5323
TXNOT 190 383 732 733 823 913 1011 1012 1110 1111 1209 1210 1308 1309
1409 1410 1571 1906 2044 2045 2239 2469 2703 2949 3237 3715 4046 4376
4708 5000 5321
TXTINH 5425 5427 5431 5433
Z4 34# 83 326 684 782 872 964 1063 1162 1261 1362 1470 1865 1967
2190 2426 2660 2906 3194 3563 3889 4220 4538 4846 5162
ZALU 72 315 673 771 861 953 1052 1151 1250 1351 1459 1854 1956 2179
2415 2649 2895 3183 3552 3878 4209 4527 4835 5151
$ARG2 197# 197 199# 199 201# 201 203# 203 208# 208 210# 210 212# 212
214# 214 219# 219 221# 221 223# 223 225# 225 230# 230 232# 232
234# 234 236# 236 241# 241 243# 243 245# 245 247# 247 252# 252
254# 254 256# 256 258# 258 263# 263 265# 265 267# 267 269# 269
274# 274 276# 276 278# 278 280# 280 282# 282 284# 284 286# 286
390# 390 392# 392 394# 394 396# 396 401# 401 403# 403 405# 405
407# 407 412# 412 414# 414 416# 416 418# 418 423# 423 425# 425
427# 427 429# 429 434# 434 436# 436 438# 438 440# 440 445# 445
447# 447 449# 449 451# 451 456# 456 458# 458 460# 460 462# 462
467# 467 469# 469 471# 471 473# 473 475# 475 477# 477 479# 479
481# 481 483# 483 485# 485 487# 487 489# 489 491# 491 493# 493
498# 498 500# 500 502# 502 504# 504 509# 509 511# 511 513# 513 SEQ 1039
515# 515 520# 520 522# 522 524# 524 526# 526 531# 531 533# 533
535# 535 537# 537 542# 542 544# 544 546# 546 548# 548 553# 553
555# 555 557# 557 559# 559 564# 564 566# 566 568# 568 570# 570
575# 575 577# 577 579# 579 581# 581 583# 583 585# 585 587# 587
589# 589 591# 591 593# 593 595# 595 597# 597 599# 599 601# 601
606# 606 608# 608 610# 610 612# 612 614# 614 616# 616 618# 618
620# 620 622# 622 624# 624 626# 626 628# 628 630# 630 632# 632
738# 738 740# 740 742# 742 744# 744 828# 828 830# 830 832# 832
834# 834 918# 918 920# 920 922# 922 924# 924 1017# 1017 1019# 1019
1021# 1021 1023# 1023 1116# 1116 1118# 1118 1120# 1120 1122# 1122 1215# 1215
1217# 1217 1219# 1219 1221# 1221 1314# 1314 1316# 1316 1318# 1318 1320# 1320
1415# 1415 1417# 1417 1419# 1419 1421# 1421 1576# 1576 1578# 1578 1580# 1580
1583# 1583 1585# 1585 1587# 1587 1592# 1592 1594# 1594 1596# 1596 1599# 1599
1601# 1601 1603# 1603 1608# 1608 1610# 1610 1612# 1612 1615# 1615 1617# 1617
1619# 1619 1624# 1624 1626# 1626 1628# 1628 1631# 1631 1633# 1633 1635# 1635
1640# 1640 1642# 1642 1644# 1644 1647# 1647 1649# 1649 1651# 1651 1656# 1656
1658# 1658 1660# 1660 1663# 1663 1665# 1665 1667# 1667 1672# 1672 1674# 1674
1676# 1676 1679# 1679 1681# 1681 1683# 1683 1688# 1688 1690# 1690 1692# 1692
1695# 1695 1697# 1697 1699# 1699 1704# 1704 1706# 1706 1708# 1708 1711# 1711
1713# 1713 1715# 1715 1720# 1720 1722# 1722 1724# 1724 1727# 1727 1729# 1729
1731# 1731 1736# 1736 1738# 1738 1740# 1740 1743# 1743 1745# 1745 1747# 1747
1752# 1752 1754# 1754 1756# 1756 1759# 1759 1761# 1761 1763# 1763 1768# 1768
1770# 1770 1772# 1772 1775# 1775 1777# 1777 1779# 1779 1784# 1784 1786# 1786
1788# 1788 1791# 1791 1793# 1793 1795# 1795 1800# 1800 1802# 1802 1804# 1804
1807# 1807 1809# 1809 1811# 1811 1816# 1816 1818# 1818 1820# 1820 1823# 1823
1825# 1825 1827# 1827 1911# 1911 1913# 1913 1915# 1915 1918# 1918 1920# 1920
1922# 1922 1924# 1924 2050# 2050 2052# 2052 2054# 2054 2056# 2056 2058# 2058
2060# 2060 2062# 2062 2064# 2064 2066# 2066 2068# 2068 2070# 2070 2072# 2072
2074# 2074 2076# 2076 2078# 2078 2080# 2080 2082# 2082 2087# 2087 2089# 2089
2091# 2091 2093# 2093 2095# 2095 2097# 2097 2099# 2099 2101# 2101 2103# 2103
2105# 2105 2107# 2107 2109# 2109 2111# 2111 2113# 2113 2115# 2115 2117# 2117
2119# 2119 2244# 2244 2246# 2246 2248# 2248 2250# 2250 2252# 2252 2254# 2254
2256# 2256 2258# 2258 2260# 2260 2262# 2262 2264# 2264 2266# 2266 2268# 2268
2270# 2270 2272# 2272 2274# 2274 2276# 2276 2278# 2278 2280# 2280 2282# 2282
2284# 2284 2286# 2286 2288# 2288 2290# 2290 2292# 2292 2294# 2294 2296# 2296
2298# 2298 2300# 2300 2302# 2302 2304# 2304 2306# 2306 2308# 2308 2310# 2310
2312# 2312 2317# 2317 2319# 2319 2321# 2321 2323# 2323 2325# 2325 2327# 2327
2329# 2329 2331# 2331 2333# 2333 2335# 2335 2337# 2337 2339# 2339 2341# 2341
2343# 2343 2345# 2345 2347# 2347 2349# 2349 2351# 2351 2356# 2356 2358# 2358
2360# 2360 2362# 2362 2364# 2364 2366# 2366 2368# 2368 2370# 2370 2372# 2372
2374# 2374 2376# 2376 2378# 2378 2380# 2380 2474# 2474 2476# 2476 2478# 2478
2480# 2480 2482# 2482 2484# 2484 2486# 2486 2488# 2488 2490# 2490 2492# 2492
2494# 2494 2496# 2496 2498# 2498 2500# 2500 2502# 2502 2504# 2504 2506# 2506
2508# 2508 2510# 2510 2512# 2512 2514# 2514 2516# 2516 2518# 2518 2520# 2520
2522# 2522 2524# 2524 2526# 2526 2528# 2528 2530# 2530 2532# 2532 2534# 2534
2536# 2536 2538# 2538 2540# 2540 2542# 2542 2544# 2544 2549# 2549 2551# 2551
2553# 2553 2555# 2555 2557# 2557 2559# 2559 2561# 2561 2563# 2563 2565# 2565
2567# 2567 2569# 2569 2571# 2571 2573# 2573 2575# 2575 2577# 2577 2579# 2579
2581# 2581 2583# 2583 2585# 2585 2587# 2587 2592# 2592 2594# 2594 2596# 2596
2598# 2598 2600# 2600 2602# 2602 2604# 2604 2606# 2606 2608# 2608 2610# 2610
2612# 2612 2614# 2614 2708# 2708 2710# 2710 2712# 2712 2714# 2714 2716# 2716
2718# 2718 2720# 2720 2722# 2722 2724# 2724 2726# 2726 2728# 2728 2730# 2730
2732# 2732 2734# 2734 2736# 2736 2738# 2738 2740# 2740 2742# 2742 2744# 2744 SEQ 1040
2746# 2746 2748# 2748 2750# 2750 2752# 2752 2754# 2754 2756# 2756 2758# 2758
2760# 2760 2762# 2762 2764# 2764 2766# 2766 2768# 2768 2770# 2770 2772# 2772
2774# 2774 2776# 2776 2778# 2778 2783# 2783 2785# 2785 2787# 2787 2789# 2789
2791# 2791 2793# 2793 2795# 2795 2797# 2797 2799# 2799 2801# 2801 2803# 2803
2805# 2805 2807# 2807 2809# 2809 2811# 2811 2813# 2813 2815# 2815 2817# 2817
2819# 2819 2821# 2821 2823# 2823 2825# 2825 2827# 2827 2829# 2829 2834# 2834
2836# 2836 2838# 2838 2840# 2840 2842# 2842 2844# 2844 2846# 2846 2848# 2848
2850# 2850 2852# 2852 2854# 2854 2856# 2856 2858# 2858 2860# 2860 2954# 2954
2956# 2956 2958# 2958 2960# 2960 2962# 2962 2964# 2964 2966# 2966 2968# 2968
2970# 2970 2972# 2972 2974# 2974 2976# 2976 2978# 2978 2980# 2980 2982# 2982
2984# 2984 2986# 2986 2988# 2988 2990# 2990 2992# 2992 2994# 2994 2996# 2996
2998# 2998 3000# 3000 3002# 3002 3007# 3007 3009# 3009 3011# 3011 3013# 3013
3015# 3015 3017# 3017 3019# 3019 3021# 3021 3023# 3023 3025# 3025 3027# 3027
3029# 3029 3031# 3031 3033# 3033 3035# 3035 3037# 3037 3039# 3039 3041# 3041
3043# 3043 3045# 3045 3047# 3047 3049# 3049 3051# 3051 3053# 3053 3055# 3055
3057# 3057 3059# 3059 3061# 3061 3063# 3063 3065# 3065 3070# 3070 3072# 3072
3074# 3074 3076# 3076 3078# 3078 3080# 3080 3082# 3082 3084# 3084 3086# 3086
3088# 3088 3090# 3090 3092# 3092 3094# 3094 3096# 3096 3098# 3098 3100# 3100
3102# 3102 3104# 3104 3106# 3106 3108# 3108 3110# 3110 3112# 3112 3114# 3114
3116# 3116 3118# 3118 3120# 3120 3122# 3122 3124# 3124 3126# 3126 3128# 3128
3130# 3130 3132# 3132 3134# 3134 3136# 3136 3138# 3138 3140# 3140 3142# 3142
3144# 3144 3146# 3146 3148# 3148 3242# 3242 3244# 3244 3246# 3246 3249# 3249
3251# 3251 3253# 3253 3255# 3255 3257# 3257 3259# 3259 3261# 3261 3263# 3263
3265# 3265 3267# 3267 3269# 3269 3271# 3271 3273# 3273 3275# 3275 3277# 3277
3279# 3279 3281# 3281 3283# 3283 3285# 3285 3287# 3287 3289# 3289 3291# 3291
3293# 3293 3295# 3295 3297# 3297 3299# 3299 3301# 3301 3303# 3303 3305# 3305
3307# 3307 3309# 3309 3311# 3311 3313# 3313 3315# 3315 3317# 3317 3319# 3319
3324# 3324 3326# 3326 3328# 3328 3330# 3330 3332# 3332 3334# 3334 3336# 3336
3338# 3338 3340# 3340 3342# 3342 3344# 3344 3346# 3346 3348# 3348 3350# 3350
3352# 3352 3354# 3354 3356# 3356 3358# 3358 3360# 3360 3362# 3362 3364# 3364
3366# 3366 3368# 3368 3370# 3370 3372# 3372 3374# 3374 3376# 3376 3378# 3378
3383# 3383 3385# 3385 3387# 3387 3389# 3389 3391# 3391 3393# 3393 3395# 3395
3397# 3397 3399# 3399 3401# 3401 3403# 3403 3405# 3405 3407# 3407 3409# 3409
3411# 3411 3413# 3413 3415# 3415 3417# 3417 3419# 3419 3421# 3421 3423# 3423
3425# 3425 3427# 3427 3429# 3429 3431# 3431 3433# 3433 3435# 3435 3437# 3437
3439# 3439 3441# 3441 3443# 3443 3445# 3445 3447# 3447 3449# 3449 3451# 3451
3453# 3453 3455# 3455 3457# 3457 3459# 3459 3461# 3461 3463# 3463 3465# 3465
3467# 3467 3469# 3469 3471# 3471 3473# 3473 3475# 3475 3477# 3477 3479# 3479
3481# 3481 3483# 3483 3485# 3485 3487# 3487 3489# 3489 3491# 3491 3493# 3493
3495# 3495 3497# 3497 3499# 3499 3501# 3501 3503# 3503 3505# 3505 3507# 3507
3509# 3509 3511# 3511 3513# 3513 3515# 3515 3723# 3723 3725# 3725 3727# 3727
3729# 3729 3731# 3731 3733# 3733 3735# 3735 3737# 3737 3739# 3739 3741# 3741
3746# 3746 3748# 3748 3750# 3750 3752# 3752 3754# 3754 3756# 3756 3758# 3758
3760# 3760 3765# 3765 3767# 3767 3769# 3769 3771# 3771 3776# 3776 3778# 3778
3780# 3780 3782# 3782 3784# 3784 3786# 3786 3788# 3788 3790# 3790 3795# 3795
3797# 3797 3799# 3799 3801# 3801 3803# 3803 3805# 3805 3807# 3807 3809# 3809
3811# 3811 3816# 3816 3818# 3818 3820# 3820 3822# 3822 3824# 3824 3829# 3829
3831# 3831 3833# 3833 3838# 3838 3840# 3840 3842# 3842 4054# 4054 4056# 4056
4058# 4058 4060# 4060 4062# 4062 4064# 4064 4066# 4066 4068# 4068 4070# 4070
4072# 4072 4077# 4077 4079# 4079 4081# 4081 4083# 4083 4085# 4085 4087# 4087
4089# 4089 4091# 4091 4096# 4096 4098# 4098 4100# 4100 4102# 4102 4107# 4107
4109# 4109 4111# 4111 4113# 4113 4115# 4115 4117# 4117 4119# 4119 4121# 4121
4126# 4126 4128# 4128 4130# 4130 4132# 4132 4134# 4134 4136# 4136 4138# 4138 SEQ 1041
4140# 4140 4142# 4142 4147# 4147 4149# 4149 4151# 4151 4153# 4153 4155# 4155
4160# 4160 4162# 4162 4164# 4164 4169# 4169 4171# 4171 4173# 4173 4384# 4384
4386# 4386 4388# 4388 4390# 4390 4392# 4392 4394# 4394 4396# 4396 4401# 4401
4403# 4403 4405# 4405 4407# 4407 4409# 4409 4411# 4411 4413# 4413 4418# 4418
4420# 4420 4422# 4422 4424# 4424 4429# 4429 4431# 4431 4433# 4433 4435# 4435
4437# 4437 4439# 4439 4441# 4441 4446# 4446 4448# 4448 4450# 4450 4452# 4452
4454# 4454 4456# 4456 4458# 4458 4460# 4460 4465# 4465 4467# 4467 4469# 4469
4471# 4471 4473# 4473 4478# 4478 4480# 4480 4482# 4482 4487# 4487 4489# 4489
4491# 4491 4716# 4716 4718# 4718 4720# 4720 4722# 4722 4724# 4724 4729# 4729
4731# 4731 4733# 4733 4735# 4735 4737# 4737 4739# 4739 4741# 4741 4746# 4746
4748# 4748 4750# 4750 4752# 4752 4757# 4757 4759# 4759 4764# 4764 4766# 4766
4768# 4768 4773# 4773 4775# 4775 4777# 4777 4779# 4779 4781# 4781 4786# 4786
4788# 4788 4790# 4790 4795# 4795 4797# 4797 4799# 4799 5008# 5008 5010# 5010
5012# 5012 5014# 5014 5016# 5016 5018# 5018 5020# 5020 5025# 5025 5027# 5027
5029# 5029 5031# 5031 5033# 5033 5035# 5035 5037# 5037 5042# 5042 5044# 5044
5046# 5046 5048# 5048 5053# 5053 5055# 5055 5057# 5057 5059# 5059 5061# 5061
5063# 5063 5065# 5065 5070# 5070 5072# 5072 5074# 5074 5076# 5076 5078# 5078
5080# 5080 5082# 5082 5084# 5084 5089# 5089 5091# 5091 5093# 5093 5095# 5095
5097# 5097 5102# 5102 5104# 5104 5106# 5106 5111# 5111 5113# 5113 5115# 5115
5327# 5327 5329# 5329 5331# 5331 5333# 5333 5335# 5335 5340# 5340 5342# 5342
5344# 5344 5346# 5346 5348# 5348 5350# 5350 5352# 5352 5357# 5357 5359# 5359
5361# 5361 5363# 5363 5368# 5368 5370# 5370 5375# 5375 5377# 5377 5379# 5379
5384# 5384 5386# 5386 5388# 5388 5390# 5390 5392# 5392 5397# 5397 5399# 5399
5401# 5401 5406# 5406 5408# 5408 5410# 5410
$B 197# 197 199# 199 201# 201 203# 203 208# 208 210# 210 212# 212
214# 214 219# 219 221# 221 223# 223 225# 225 230# 230 232# 232
234# 234 236# 236 241# 241 243# 243 245# 245 247# 247 252# 252
254# 254 256# 256 258# 258 263# 263 265# 265 267# 267 269# 269
274# 274 276# 276 278# 278 280# 280 282# 282 284# 284 286# 286
390# 390 392# 392 394# 394 396# 396 401# 401 403# 403 405# 405
407# 407 412# 412 414# 414 416# 416 418# 418 423# 423 425# 425
427# 427 429# 429 434# 434 436# 436 438# 438 440# 440 445# 445
447# 447 449# 449 451# 451 456# 456 458# 458 460# 460 462# 462
467# 467 469# 469 471# 471 473# 473 475# 475 477# 477 479# 479
481# 481 483# 483 485# 485 487# 487 489# 489 491# 491 493# 493
498# 498 500# 500 502# 502 504# 504 509# 509 511# 511 513# 513
515# 515 520# 520 522# 522 524# 524 526# 526 531# 531 533# 533
535# 535 537# 537 542# 542 544# 544 546# 546 548# 548 553# 553
555# 555 557# 557 559# 559 564# 564 566# 566 568# 568 570# 570
575# 575 577# 577 579# 579 581# 581 583# 583 585# 585 587# 587
589# 589 591# 591 593# 593 595# 595 597# 597 599# 599 601# 601
606# 606 608# 608 610# 610 612# 612 614# 614 616# 616 618# 618
620# 620 622# 622 624# 624 626# 626 628# 628 630# 630 632# 632
738# 738 740# 740 742# 742 744# 744 828# 828 830# 830 832# 832
834# 834 918# 918 920# 920 922# 922 924# 924 1017# 1017 1019# 1019
1021# 1021 1023# 1023 1116# 1116 1118# 1118 1120# 1120 1122# 1122 1215# 1215
1217# 1217 1219# 1219 1221# 1221 1314# 1314 1316# 1316 1318# 1318 1320# 1320
1415# 1415 1417# 1417 1419# 1419 1421# 1421 1576# 1576 1578# 1578 1580# 1580
1583# 1583 1585# 1585 1587# 1587 1592# 1592 1594# 1594 1596# 1596 1599# 1599
1601# 1601 1603# 1603 1608# 1608 1610# 1610 1612# 1612 1615# 1615 1617# 1617
1619# 1619 1624# 1624 1626# 1626 1628# 1628 1631# 1631 1633# 1633 1635# 1635
1640# 1640 1642# 1642 1644# 1644 1647# 1647 1649# 1649 1651# 1651 1656# 1656
1658# 1658 1660# 1660 1663# 1663 1665# 1665 1667# 1667 1672# 1672 1674# 1674 SEQ 1042
1676# 1676 1679# 1679 1681# 1681 1683# 1683 1688# 1688 1690# 1690 1692# 1692
1695# 1695 1697# 1697 1699# 1699 1704# 1704 1706# 1706 1708# 1708 1711# 1711
1713# 1713 1715# 1715 1720# 1720 1722# 1722 1724# 1724 1727# 1727 1729# 1729
1731# 1731 1736# 1736 1738# 1738 1740# 1740 1743# 1743 1745# 1745 1747# 1747
1752# 1752 1754# 1754 1756# 1756 1759# 1759 1761# 1761 1763# 1763 1768# 1768
1770# 1770 1772# 1772 1775# 1775 1777# 1777 1779# 1779 1784# 1784 1786# 1786
1788# 1788 1791# 1791 1793# 1793 1795# 1795 1800# 1800 1802# 1802 1804# 1804
1807# 1807 1809# 1809 1811# 1811 1816# 1816 1818# 1818 1820# 1820 1823# 1823
1825# 1825 1827# 1827 1911# 1911 1913# 1913 1915# 1915 1918# 1918 1920# 1920
1922# 1922 1924# 1924 2050# 2050 2052# 2052 2054# 2054 2056# 2056 2058# 2058
2060# 2060 2062# 2062 2064# 2064 2066# 2066 2068# 2068 2070# 2070 2072# 2072
2074# 2074 2076# 2076 2078# 2078 2080# 2080 2082# 2082 2087# 2087 2089# 2089
2091# 2091 2093# 2093 2095# 2095 2097# 2097 2099# 2099 2101# 2101 2103# 2103
2105# 2105 2107# 2107 2109# 2109 2111# 2111 2113# 2113 2115# 2115 2117# 2117
2119# 2119 2244# 2244 2246# 2246 2248# 2248 2250# 2250 2252# 2252 2254# 2254
2256# 2256 2258# 2258 2260# 2260 2262# 2262 2264# 2264 2266# 2266 2268# 2268
2270# 2270 2272# 2272 2274# 2274 2276# 2276 2278# 2278 2280# 2280 2282# 2282
2284# 2284 2286# 2286 2288# 2288 2290# 2290 2292# 2292 2294# 2294 2296# 2296
2298# 2298 2300# 2300 2302# 2302 2304# 2304 2306# 2306 2308# 2308 2310# 2310
2312# 2312 2317# 2317 2319# 2319 2321# 2321 2323# 2323 2325# 2325 2327# 2327
2329# 2329 2331# 2331 2333# 2333 2335# 2335 2337# 2337 2339# 2339 2341# 2341
2343# 2343 2345# 2345 2347# 2347 2349# 2349 2351# 2351 2356# 2356 2358# 2358
2360# 2360 2362# 2362 2364# 2364 2366# 2366 2368# 2368 2370# 2370 2372# 2372
2374# 2374 2376# 2376 2378# 2378 2380# 2380 2474# 2474 2476# 2476 2478# 2478
2480# 2480 2482# 2482 2484# 2484 2486# 2486 2488# 2488 2490# 2490 2492# 2492
2494# 2494 2496# 2496 2498# 2498 2500# 2500 2502# 2502 2504# 2504 2506# 2506
2508# 2508 2510# 2510 2512# 2512 2514# 2514 2516# 2516 2518# 2518 2520# 2520
2522# 2522 2524# 2524 2526# 2526 2528# 2528 2530# 2530 2532# 2532 2534# 2534
2536# 2536 2538# 2538 2540# 2540 2542# 2542 2544# 2544 2549# 2549 2551# 2551
2553# 2553 2555# 2555 2557# 2557 2559# 2559 2561# 2561 2563# 2563 2565# 2565
2567# 2567 2569# 2569 2571# 2571 2573# 2573 2575# 2575 2577# 2577 2579# 2579
2581# 2581 2583# 2583 2585# 2585 2587# 2587 2592# 2592 2594# 2594 2596# 2596
2598# 2598 2600# 2600 2602# 2602 2604# 2604 2606# 2606 2608# 2608 2610# 2610
2612# 2612 2614# 2614 2708# 2708 2710# 2710 2712# 2712 2714# 2714 2716# 2716
2718# 2718 2720# 2720 2722# 2722 2724# 2724 2726# 2726 2728# 2728 2730# 2730
2732# 2732 2734# 2734 2736# 2736 2738# 2738 2740# 2740 2742# 2742 2744# 2744
2746# 2746 2748# 2748 2750# 2750 2752# 2752 2754# 2754 2756# 2756 2758# 2758
2760# 2760 2762# 2762 2764# 2764 2766# 2766 2768# 2768 2770# 2770 2772# 2772
2774# 2774 2776# 2776 2778# 2778 2783# 2783 2785# 2785 2787# 2787 2789# 2789
2791# 2791 2793# 2793 2795# 2795 2797# 2797 2799# 2799 2801# 2801 2803# 2803
2805# 2805 2807# 2807 2809# 2809 2811# 2811 2813# 2813 2815# 2815 2817# 2817
2819# 2819 2821# 2821 2823# 2823 2825# 2825 2827# 2827 2829# 2829 2834# 2834
2836# 2836 2838# 2838 2840# 2840 2842# 2842 2844# 2844 2846# 2846 2848# 2848
2850# 2850 2852# 2852 2854# 2854 2856# 2856 2858# 2858 2860# 2860 2954# 2954
2956# 2956 2958# 2958 2960# 2960 2962# 2962 2964# 2964 2966# 2966 2968# 2968
2970# 2970 2972# 2972 2974# 2974 2976# 2976 2978# 2978 2980# 2980 2982# 2982
2984# 2984 2986# 2986 2988# 2988 2990# 2990 2992# 2992 2994# 2994 2996# 2996
2998# 2998 3000# 3000 3002# 3002 3007# 3007 3009# 3009 3011# 3011 3013# 3013
3015# 3015 3017# 3017 3019# 3019 3021# 3021 3023# 3023 3025# 3025 3027# 3027
3029# 3029 3031# 3031 3033# 3033 3035# 3035 3037# 3037 3039# 3039 3041# 3041
3043# 3043 3045# 3045 3047# 3047 3049# 3049 3051# 3051 3053# 3053 3055# 3055
3057# 3057 3059# 3059 3061# 3061 3063# 3063 3065# 3065 3070# 3070 3072# 3072
3074# 3074 3076# 3076 3078# 3078 3080# 3080 3082# 3082 3084# 3084 3086# 3086 SEQ 1043
3088# 3088 3090# 3090 3092# 3092 3094# 3094 3096# 3096 3098# 3098 3100# 3100
3102# 3102 3104# 3104 3106# 3106 3108# 3108 3110# 3110 3112# 3112 3114# 3114
3116# 3116 3118# 3118 3120# 3120 3122# 3122 3124# 3124 3126# 3126 3128# 3128
3130# 3130 3132# 3132 3134# 3134 3136# 3136 3138# 3138 3140# 3140 3142# 3142
3144# 3144 3146# 3146 3148# 3148 3242# 3242 3244# 3244 3246# 3246 3249# 3249
3251# 3251 3253# 3253 3255# 3255 3257# 3257 3259# 3259 3261# 3261 3263# 3263
3265# 3265 3267# 3267 3269# 3269 3271# 3271 3273# 3273 3275# 3275 3277# 3277
3279# 3279 3281# 3281 3283# 3283 3285# 3285 3287# 3287 3289# 3289 3291# 3291
3293# 3293 3295# 3295 3297# 3297 3299# 3299 3301# 3301 3303# 3303 3305# 3305
3307# 3307 3309# 3309 3311# 3311 3313# 3313 3315# 3315 3317# 3317 3319# 3319
3324# 3324 3326# 3326 3328# 3328 3330# 3330 3332# 3332 3334# 3334 3336# 3336
3338# 3338 3340# 3340 3342# 3342 3344# 3344 3346# 3346 3348# 3348 3350# 3350
3352# 3352 3354# 3354 3356# 3356 3358# 3358 3360# 3360 3362# 3362 3364# 3364
3366# 3366 3368# 3368 3370# 3370 3372# 3372 3374# 3374 3376# 3376 3378# 3378
3383# 3383 3385# 3385 3387# 3387 3389# 3389 3391# 3391 3393# 3393 3395# 3395
3397# 3397 3399# 3399 3401# 3401 3403# 3403 3405# 3405 3407# 3407 3409# 3409
3411# 3411 3413# 3413 3415# 3415 3417# 3417 3419# 3419 3421# 3421 3423# 3423
3425# 3425 3427# 3427 3429# 3429 3431# 3431 3433# 3433 3435# 3435 3437# 3437
3439# 3439 3441# 3441 3443# 3443 3445# 3445 3447# 3447 3449# 3449 3451# 3451
3453# 3453 3455# 3455 3457# 3457 3459# 3459 3461# 3461 3463# 3463 3465# 3465
3467# 3467 3469# 3469 3471# 3471 3473# 3473 3475# 3475 3477# 3477 3479# 3479
3481# 3481 3483# 3483 3485# 3485 3487# 3487 3489# 3489 3491# 3491 3493# 3493
3495# 3495 3497# 3497 3499# 3499 3501# 3501 3503# 3503 3505# 3505 3507# 3507
3509# 3509 3511# 3511 3513# 3513 3515# 3515 3723# 3723 3725# 3725 3727# 3727
3729# 3729 3731# 3731 3733# 3733 3735# 3735 3737# 3737 3739# 3739 3741# 3741
3746# 3746 3748# 3748 3750# 3750 3752# 3752 3754# 3754 3756# 3756 3758# 3758
3760# 3760 3765# 3765 3767# 3767 3769# 3769 3771# 3771 3776# 3776 3778# 3778
3780# 3780 3782# 3782 3784# 3784 3786# 3786 3788# 3788 3790# 3790 3795# 3795
3797# 3797 3799# 3799 3801# 3801 3803# 3803 3805# 3805 3807# 3807 3809# 3809
3811# 3811 3816# 3816 3818# 3818 3820# 3820 3822# 3822 3824# 3824 3829# 3829
3831# 3831 3833# 3833 3838# 3838 3840# 3840 3842# 3842 4054# 4054 4056# 4056
4058# 4058 4060# 4060 4062# 4062 4064# 4064 4066# 4066 4068# 4068 4070# 4070
4072# 4072 4077# 4077 4079# 4079 4081# 4081 4083# 4083 4085# 4085 4087# 4087
4089# 4089 4091# 4091 4096# 4096 4098# 4098 4100# 4100 4102# 4102 4107# 4107
4109# 4109 4111# 4111 4113# 4113 4115# 4115 4117# 4117 4119# 4119 4121# 4121
4126# 4126 4128# 4128 4130# 4130 4132# 4132 4134# 4134 4136# 4136 4138# 4138
4140# 4140 4142# 4142 4147# 4147 4149# 4149 4151# 4151 4153# 4153 4155# 4155
4160# 4160 4162# 4162 4164# 4164 4169# 4169 4171# 4171 4173# 4173 4384# 4384
4386# 4386 4388# 4388 4390# 4390 4392# 4392 4394# 4394 4396# 4396 4401# 4401
4403# 4403 4405# 4405 4407# 4407 4409# 4409 4411# 4411 4413# 4413 4418# 4418
4420# 4420 4422# 4422 4424# 4424 4429# 4429 4431# 4431 4433# 4433 4435# 4435
4437# 4437 4439# 4439 4441# 4441 4446# 4446 4448# 4448 4450# 4450 4452# 4452
4454# 4454 4456# 4456 4458# 4458 4460# 4460 4465# 4465 4467# 4467 4469# 4469
4471# 4471 4473# 4473 4478# 4478 4480# 4480 4482# 4482 4487# 4487 4489# 4489
4491# 4491 4716# 4716 4718# 4718 4720# 4720 4722# 4722 4724# 4724 4729# 4729
4731# 4731 4733# 4733 4735# 4735 4737# 4737 4739# 4739 4741# 4741 4746# 4746
4748# 4748 4750# 4750 4752# 4752 4757# 4757 4759# 4759 4764# 4764 4766# 4766
4768# 4768 4773# 4773 4775# 4775 4777# 4777 4779# 4779 4781# 4781 4786# 4786
4788# 4788 4790# 4790 4795# 4795 4797# 4797 4799# 4799 5008# 5008 5010# 5010
5012# 5012 5014# 5014 5016# 5016 5018# 5018 5020# 5020 5025# 5025 5027# 5027
5029# 5029 5031# 5031 5033# 5033 5035# 5035 5037# 5037 5042# 5042 5044# 5044
5046# 5046 5048# 5048 5053# 5053 5055# 5055 5057# 5057 5059# 5059 5061# 5061
5063# 5063 5065# 5065 5070# 5070 5072# 5072 5074# 5074 5076# 5076 5078# 5078 SEQ 1044
5080# 5080 5082# 5082 5084# 5084 5089# 5089 5091# 5091 5093# 5093 5095# 5095
5097# 5097 5102# 5102 5104# 5104 5106# 5106 5111# 5111 5113# 5113 5115# 5115
5327# 5327 5329# 5329 5331# 5331 5333# 5333 5335# 5335 5340# 5340 5342# 5342
5344# 5344 5346# 5346 5348# 5348 5350# 5350 5352# 5352 5357# 5357 5359# 5359
5361# 5361 5363# 5363 5368# 5368 5370# 5370 5375# 5375 5377# 5377 5379# 5379
5384# 5384 5386# 5386 5388# 5388 5390# 5390 5392# 5392 5397# 5397 5399# 5399
5401# 5401 5406# 5406 5408# 5408 5410# 5410
$CHR 197# 197 199# 199 201# 201 203# 203 208# 208 210# 210 212# 212
214# 214 219# 219 221# 221 223# 223 225# 225 230# 230 232# 232
234# 234 236# 236 241# 241 243# 243 245# 245 247# 247 252# 252
254# 254 256# 256 258# 258 263# 263 265# 265 267# 267 269# 269
274# 274 276# 276 278# 278 280# 280 282# 282 284# 284 286# 286
390# 390 392# 392 394# 394 396# 396 401# 401 403# 403 405# 405
407# 407 412# 412 414# 414 416# 416 418# 418 423# 423 425# 425
427# 427 429# 429 434# 434 436# 436 438# 438 440# 440 445# 445
447# 447 449# 449 451# 451 456# 456 458# 458 460# 460 462# 462
467# 467 469# 469 471# 471 473# 473 475# 475 477# 477 479# 479
481# 481 483# 483 485# 485 487# 487 489# 489 491# 491 493# 493
498# 498 500# 500 502# 502 504# 504 509# 509 511# 511 513# 513
515# 515 520# 520 522# 522 524# 524 526# 526 531# 531 533# 533
535# 535 537# 537 542# 542 544# 544 546# 546 548# 548 553# 553
555# 555 557# 557 559# 559 564# 564 566# 566 568# 568 570# 570
575# 575 577# 577 579# 579 581# 581 583# 583 585# 585 587# 587
589# 589 591# 591 593# 593 595# 595 597# 597 599# 599 601# 601
606# 606 608# 608 610# 610 612# 612 614# 614 616# 616 618# 618
620# 620 622# 622 624# 624 626# 626 628# 628 630# 630 632# 632
738# 738 740# 740 742# 742 744# 744 828# 828 830# 830 832# 832
834# 834 918# 918 920# 920 922# 922 924# 924 1017# 1017 1019# 1019
1021# 1021 1023# 1023 1116# 1116 1118# 1118 1120# 1120 1122# 1122 1215# 1215
1217# 1217 1219# 1219 1221# 1221 1314# 1314 1316# 1316 1318# 1318 1320# 1320
1415# 1415 1417# 1417 1419# 1419 1421# 1421 1576# 1576 1578# 1578 1580# 1580
1583# 1583 1585# 1585 1587# 1587 1592# 1592 1594# 1594 1596# 1596 1599# 1599
1601# 1601 1603# 1603 1608# 1608 1610# 1610 1612# 1612 1615# 1615 1617# 1617
1619# 1619 1624# 1624 1626# 1626 1628# 1628 1631# 1631 1633# 1633 1635# 1635
1640# 1640 1642# 1642 1644# 1644 1647# 1647 1649# 1649 1651# 1651 1656# 1656
1658# 1658 1660# 1660 1663# 1663 1665# 1665 1667# 1667 1672# 1672 1674# 1674
1676# 1676 1679# 1679 1681# 1681 1683# 1683 1688# 1688 1690# 1690 1692# 1692
1695# 1695 1697# 1697 1699# 1699 1704# 1704 1706# 1706 1708# 1708 1711# 1711
1713# 1713 1715# 1715 1720# 1720 1722# 1722 1724# 1724 1727# 1727 1729# 1729
1731# 1731 1736# 1736 1738# 1738 1740# 1740 1743# 1743 1745# 1745 1747# 1747
1752# 1752 1754# 1754 1756# 1756 1759# 1759 1761# 1761 1763# 1763 1768# 1768
1770# 1770 1772# 1772 1775# 1775 1777# 1777 1779# 1779 1784# 1784 1786# 1786
1788# 1788 1791# 1791 1793# 1793 1795# 1795 1800# 1800 1802# 1802 1804# 1804
1807# 1807 1809# 1809 1811# 1811 1816# 1816 1818# 1818 1820# 1820 1823# 1823
1825# 1825 1827# 1827 1911# 1911 1913# 1913 1915# 1915 1918# 1918 1920# 1920
1922# 1922 1924# 1924 2050# 2050 2052# 2052 2054# 2054 2056# 2056 2058# 2058
2060# 2060 2062# 2062 2064# 2064 2066# 2066 2068# 2068 2070# 2070 2072# 2072
2074# 2074 2076# 2076 2078# 2078 2080# 2080 2082# 2082 2087# 2087 2089# 2089
2091# 2091 2093# 2093 2095# 2095 2097# 2097 2099# 2099 2101# 2101 2103# 2103
2105# 2105 2107# 2107 2109# 2109 2111# 2111 2113# 2113 2115# 2115 2117# 2117
2119# 2119 2244# 2244 2246# 2246 2248# 2248 2250# 2250 2252# 2252 2254# 2254
2256# 2256 2258# 2258 2260# 2260 2262# 2262 2264# 2264 2266# 2266 2268# 2268
2270# 2270 2272# 2272 2274# 2274 2276# 2276 2278# 2278 2280# 2280 2282# 2282 SEQ 1045
2284# 2284 2286# 2286 2288# 2288 2290# 2290 2292# 2292 2294# 2294 2296# 2296
2298# 2298 2300# 2300 2302# 2302 2304# 2304 2306# 2306 2308# 2308 2310# 2310
2312# 2312 2317# 2317 2319# 2319 2321# 2321 2323# 2323 2325# 2325 2327# 2327
2329# 2329 2331# 2331 2333# 2333 2335# 2335 2337# 2337 2339# 2339 2341# 2341
2343# 2343 2345# 2345 2347# 2347 2349# 2349 2351# 2351 2356# 2356 2358# 2358
2360# 2360 2362# 2362 2364# 2364 2366# 2366 2368# 2368 2370# 2370 2372# 2372
2374# 2374 2376# 2376 2378# 2378 2380# 2380 2474# 2474 2476# 2476 2478# 2478
2480# 2480 2482# 2482 2484# 2484 2486# 2486 2488# 2488 2490# 2490 2492# 2492
2494# 2494 2496# 2496 2498# 2498 2500# 2500 2502# 2502 2504# 2504 2506# 2506
2508# 2508 2510# 2510 2512# 2512 2514# 2514 2516# 2516 2518# 2518 2520# 2520
2522# 2522 2524# 2524 2526# 2526 2528# 2528 2530# 2530 2532# 2532 2534# 2534
2536# 2536 2538# 2538 2540# 2540 2542# 2542 2544# 2544 2549# 2549 2551# 2551
2553# 2553 2555# 2555 2557# 2557 2559# 2559 2561# 2561 2563# 2563 2565# 2565
2567# 2567 2569# 2569 2571# 2571 2573# 2573 2575# 2575 2577# 2577 2579# 2579
2581# 2581 2583# 2583 2585# 2585 2587# 2587 2592# 2592 2594# 2594 2596# 2596
2598# 2598 2600# 2600 2602# 2602 2604# 2604 2606# 2606 2608# 2608 2610# 2610
2612# 2612 2614# 2614 2708# 2708 2710# 2710 2712# 2712 2714# 2714 2716# 2716
2718# 2718 2720# 2720 2722# 2722 2724# 2724 2726# 2726 2728# 2728 2730# 2730
2732# 2732 2734# 2734 2736# 2736 2738# 2738 2740# 2740 2742# 2742 2744# 2744
2746# 2746 2748# 2748 2750# 2750 2752# 2752 2754# 2754 2756# 2756 2758# 2758
2760# 2760 2762# 2762 2764# 2764 2766# 2766 2768# 2768 2770# 2770 2772# 2772
2774# 2774 2776# 2776 2778# 2778 2783# 2783 2785# 2785 2787# 2787 2789# 2789
2791# 2791 2793# 2793 2795# 2795 2797# 2797 2799# 2799 2801# 2801 2803# 2803
2805# 2805 2807# 2807 2809# 2809 2811# 2811 2813# 2813 2815# 2815 2817# 2817
2819# 2819 2821# 2821 2823# 2823 2825# 2825 2827# 2827 2829# 2829 2834# 2834
2836# 2836 2838# 2838 2840# 2840 2842# 2842 2844# 2844 2846# 2846 2848# 2848
2850# 2850 2852# 2852 2854# 2854 2856# 2856 2858# 2858 2860# 2860 2954# 2954
2956# 2956 2958# 2958 2960# 2960 2962# 2962 2964# 2964 2966# 2966 2968# 2968
2970# 2970 2972# 2972 2974# 2974 2976# 2976 2978# 2978 2980# 2980 2982# 2982
2984# 2984 2986# 2986 2988# 2988 2990# 2990 2992# 2992 2994# 2994 2996# 2996
2998# 2998 3000# 3000 3002# 3002 3007# 3007 3009# 3009 3011# 3011 3013# 3013
3015# 3015 3017# 3017 3019# 3019 3021# 3021 3023# 3023 3025# 3025 3027# 3027
3029# 3029 3031# 3031 3033# 3033 3035# 3035 3037# 3037 3039# 3039 3041# 3041
3043# 3043 3045# 3045 3047# 3047 3049# 3049 3051# 3051 3053# 3053 3055# 3055
3057# 3057 3059# 3059 3061# 3061 3063# 3063 3065# 3065 3070# 3070 3072# 3072
3074# 3074 3076# 3076 3078# 3078 3080# 3080 3082# 3082 3084# 3084 3086# 3086
3088# 3088 3090# 3090 3092# 3092 3094# 3094 3096# 3096 3098# 3098 3100# 3100
3102# 3102 3104# 3104 3106# 3106 3108# 3108 3110# 3110 3112# 3112 3114# 3114
3116# 3116 3118# 3118 3120# 3120 3122# 3122 3124# 3124 3126# 3126 3128# 3128
3130# 3130 3132# 3132 3134# 3134 3136# 3136 3138# 3138 3140# 3140 3142# 3142
3144# 3144 3146# 3146 3148# 3148 3242# 3242 3244# 3244 3246# 3246 3249# 3249
3251# 3251 3253# 3253 3255# 3255 3257# 3257 3259# 3259 3261# 3261 3263# 3263
3265# 3265 3267# 3267 3269# 3269 3271# 3271 3273# 3273 3275# 3275 3277# 3277
3279# 3279 3281# 3281 3283# 3283 3285# 3285 3287# 3287 3289# 3289 3291# 3291
3293# 3293 3295# 3295 3297# 3297 3299# 3299 3301# 3301 3303# 3303 3305# 3305
3307# 3307 3309# 3309 3311# 3311 3313# 3313 3315# 3315 3317# 3317 3319# 3319
3324# 3324 3326# 3326 3328# 3328 3330# 3330 3332# 3332 3334# 3334 3336# 3336
3338# 3338 3340# 3340 3342# 3342 3344# 3344 3346# 3346 3348# 3348 3350# 3350
3352# 3352 3354# 3354 3356# 3356 3358# 3358 3360# 3360 3362# 3362 3364# 3364
3366# 3366 3368# 3368 3370# 3370 3372# 3372 3374# 3374 3376# 3376 3378# 3378
3383# 3383 3385# 3385 3387# 3387 3389# 3389 3391# 3391 3393# 3393 3395# 3395
3397# 3397 3399# 3399 3401# 3401 3403# 3403 3405# 3405 3407# 3407 3409# 3409
3411# 3411 3413# 3413 3415# 3415 3417# 3417 3419# 3419 3421# 3421 3423# 3423 SEQ 1046
3425# 3425 3427# 3427 3429# 3429 3431# 3431 3433# 3433 3435# 3435 3437# 3437
3439# 3439 3441# 3441 3443# 3443 3445# 3445 3447# 3447 3449# 3449 3451# 3451
3453# 3453 3455# 3455 3457# 3457 3459# 3459 3461# 3461 3463# 3463 3465# 3465
3467# 3467 3469# 3469 3471# 3471 3473# 3473 3475# 3475 3477# 3477 3479# 3479
3481# 3481 3483# 3483 3485# 3485 3487# 3487 3489# 3489 3491# 3491 3493# 3493
3495# 3495 3497# 3497 3499# 3499 3501# 3501 3503# 3503 3505# 3505 3507# 3507
3509# 3509 3511# 3511 3513# 3513 3515# 3515 3723# 3723 3725# 3725 3727# 3727
3729# 3729 3731# 3731 3733# 3733 3735# 3735 3737# 3737 3739# 3739 3741# 3741
3746# 3746 3748# 3748 3750# 3750 3752# 3752 3754# 3754 3756# 3756 3758# 3758
3760# 3760 3765# 3765 3767# 3767 3769# 3769 3771# 3771 3776# 3776 3778# 3778
3780# 3780 3782# 3782 3784# 3784 3786# 3786 3788# 3788 3790# 3790 3795# 3795
3797# 3797 3799# 3799 3801# 3801 3803# 3803 3805# 3805 3807# 3807 3809# 3809
3811# 3811 3816# 3816 3818# 3818 3820# 3820 3822# 3822 3824# 3824 3829# 3829
3831# 3831 3833# 3833 3838# 3838 3840# 3840 3842# 3842 4054# 4054 4056# 4056
4058# 4058 4060# 4060 4062# 4062 4064# 4064 4066# 4066 4068# 4068 4070# 4070
4072# 4072 4077# 4077 4079# 4079 4081# 4081 4083# 4083 4085# 4085 4087# 4087
4089# 4089 4091# 4091 4096# 4096 4098# 4098 4100# 4100 4102# 4102 4107# 4107
4109# 4109 4111# 4111 4113# 4113 4115# 4115 4117# 4117 4119# 4119 4121# 4121
4126# 4126 4128# 4128 4130# 4130 4132# 4132 4134# 4134 4136# 4136 4138# 4138
4140# 4140 4142# 4142 4147# 4147 4149# 4149 4151# 4151 4153# 4153 4155# 4155
4160# 4160 4162# 4162 4164# 4164 4169# 4169 4171# 4171 4173# 4173 4384# 4384
4386# 4386 4388# 4388 4390# 4390 4392# 4392 4394# 4394 4396# 4396 4401# 4401
4403# 4403 4405# 4405 4407# 4407 4409# 4409 4411# 4411 4413# 4413 4418# 4418
4420# 4420 4422# 4422 4424# 4424 4429# 4429 4431# 4431 4433# 4433 4435# 4435
4437# 4437 4439# 4439 4441# 4441 4446# 4446 4448# 4448 4450# 4450 4452# 4452
4454# 4454 4456# 4456 4458# 4458 4460# 4460 4465# 4465 4467# 4467 4469# 4469
4471# 4471 4473# 4473 4478# 4478 4480# 4480 4482# 4482 4487# 4487 4489# 4489
4491# 4491 4716# 4716 4718# 4718 4720# 4720 4722# 4722 4724# 4724 4729# 4729
4731# 4731 4733# 4733 4735# 4735 4737# 4737 4739# 4739 4741# 4741 4746# 4746
4748# 4748 4750# 4750 4752# 4752 4757# 4757 4759# 4759 4764# 4764 4766# 4766
4768# 4768 4773# 4773 4775# 4775 4777# 4777 4779# 4779 4781# 4781 4786# 4786
4788# 4788 4790# 4790 4795# 4795 4797# 4797 4799# 4799 5008# 5008 5010# 5010
5012# 5012 5014# 5014 5016# 5016 5018# 5018 5020# 5020 5025# 5025 5027# 5027
5029# 5029 5031# 5031 5033# 5033 5035# 5035 5037# 5037 5042# 5042 5044# 5044
5046# 5046 5048# 5048 5053# 5053 5055# 5055 5057# 5057 5059# 5059 5061# 5061
5063# 5063 5065# 5065 5070# 5070 5072# 5072 5074# 5074 5076# 5076 5078# 5078
5080# 5080 5082# 5082 5084# 5084 5089# 5089 5091# 5091 5093# 5093 5095# 5095
5097# 5097 5102# 5102 5104# 5104 5106# 5106 5111# 5111 5113# 5113 5115# 5115
5327# 5327 5329# 5329 5331# 5331 5333# 5333 5335# 5335 5340# 5340 5342# 5342
5344# 5344 5346# 5346 5348# 5348 5350# 5350 5352# 5352 5357# 5357 5359# 5359
5361# 5361 5363# 5363 5368# 5368 5370# 5370 5375# 5375 5377# 5377 5379# 5379
5384# 5384 5386# 5386 5388# 5388 5390# 5390 5392# 5392 5397# 5397 5399# 5399
5401# 5401 5406# 5406 5408# 5408 5410# 5410
$GARG 197# 197 199# 199 201# 201 203# 203 208# 208 210# 210 212# 212
214# 214 219# 219 221# 221 223# 223 225# 225 230# 230 232# 232
234# 234 236# 236 241# 241 243# 243 245# 245 247# 247 252# 252
254# 254 256# 256 258# 258 263# 263 265# 265 267# 267 269# 269
274# 274 276# 276 278# 278 280# 280 282# 282 284# 284 286# 286
390# 390 392# 392 394# 394 396# 396 401# 401 403# 403 405# 405
407# 407 412# 412 414# 414 416# 416 418# 418 423# 423 425# 425
427# 427 429# 429 434# 434 436# 436 438# 438 440# 440 445# 445
447# 447 449# 449 451# 451 456# 456 458# 458 460# 460 462# 462
467# 467 469# 469 471# 471 473# 473 475# 475 477# 477 479# 479 SEQ 1047
481# 481 483# 483 485# 485 487# 487 489# 489 491# 491 493# 493
498# 498 500# 500 502# 502 504# 504 509# 509 511# 511 513# 513
515# 515 520# 520 522# 522 524# 524 526# 526 531# 531 533# 533
535# 535 537# 537 542# 542 544# 544 546# 546 548# 548 553# 553
555# 555 557# 557 559# 559 564# 564 566# 566 568# 568 570# 570
575# 575 577# 577 579# 579 581# 581 583# 583 585# 585 587# 587
589# 589 591# 591 593# 593 595# 595 597# 597 599# 599 601# 601
606# 606 608# 608 610# 610 612# 612 614# 614 616# 616 618# 618
620# 620 622# 622 624# 624 626# 626 628# 628 630# 630 632# 632
738# 738 740# 740 742# 742 744# 744 828# 828 830# 830 832# 832
834# 834 918# 918 920# 920 922# 922 924# 924 1017# 1017 1019# 1019
1021# 1021 1023# 1023 1116# 1116 1118# 1118 1120# 1120 1122# 1122 1215# 1215
1217# 1217 1219# 1219 1221# 1221 1314# 1314 1316# 1316 1318# 1318 1320# 1320
1415# 1415 1417# 1417 1419# 1419 1421# 1421 1576# 1576 1578# 1578 1580# 1580
1583# 1583 1585# 1585 1587# 1587 1592# 1592 1594# 1594 1596# 1596 1599# 1599
1601# 1601 1603# 1603 1608# 1608 1610# 1610 1612# 1612 1615# 1615 1617# 1617
1619# 1619 1624# 1624 1626# 1626 1628# 1628 1631# 1631 1633# 1633 1635# 1635
1640# 1640 1642# 1642 1644# 1644 1647# 1647 1649# 1649 1651# 1651 1656# 1656
1658# 1658 1660# 1660 1663# 1663 1665# 1665 1667# 1667 1672# 1672 1674# 1674
1676# 1676 1679# 1679 1681# 1681 1683# 1683 1688# 1688 1690# 1690 1692# 1692
1695# 1695 1697# 1697 1699# 1699 1704# 1704 1706# 1706 1708# 1708 1711# 1711
1713# 1713 1715# 1715 1720# 1720 1722# 1722 1724# 1724 1727# 1727 1729# 1729
1731# 1731 1736# 1736 1738# 1738 1740# 1740 1743# 1743 1745# 1745 1747# 1747
1752# 1752 1754# 1754 1756# 1756 1759# 1759 1761# 1761 1763# 1763 1768# 1768
1770# 1770 1772# 1772 1775# 1775 1777# 1777 1779# 1779 1784# 1784 1786# 1786
1788# 1788 1791# 1791 1793# 1793 1795# 1795 1800# 1800 1802# 1802 1804# 1804
1807# 1807 1809# 1809 1811# 1811 1816# 1816 1818# 1818 1820# 1820 1823# 1823
1825# 1825 1827# 1827 1911# 1911 1913# 1913 1915# 1915 1918# 1918 1920# 1920
1922# 1922 1924# 1924 2050# 2050 2052# 2052 2054# 2054 2056# 2056 2058# 2058
2060# 2060 2062# 2062 2064# 2064 2066# 2066 2068# 2068 2070# 2070 2072# 2072
2074# 2074 2076# 2076 2078# 2078 2080# 2080 2082# 2082 2087# 2087 2089# 2089
2091# 2091 2093# 2093 2095# 2095 2097# 2097 2099# 2099 2101# 2101 2103# 2103
2105# 2105 2107# 2107 2109# 2109 2111# 2111 2113# 2113 2115# 2115 2117# 2117
2119# 2119 2244# 2244 2246# 2246 2248# 2248 2250# 2250 2252# 2252 2254# 2254
2256# 2256 2258# 2258 2260# 2260 2262# 2262 2264# 2264 2266# 2266 2268# 2268
2270# 2270 2272# 2272 2274# 2274 2276# 2276 2278# 2278 2280# 2280 2282# 2282
2284# 2284 2286# 2286 2288# 2288 2290# 2290 2292# 2292 2294# 2294 2296# 2296
2298# 2298 2300# 2300 2302# 2302 2304# 2304 2306# 2306 2308# 2308 2310# 2310
2312# 2312 2317# 2317 2319# 2319 2321# 2321 2323# 2323 2325# 2325 2327# 2327
2329# 2329 2331# 2331 2333# 2333 2335# 2335 2337# 2337 2339# 2339 2341# 2341
2343# 2343 2345# 2345 2347# 2347 2349# 2349 2351# 2351 2356# 2356 2358# 2358
2360# 2360 2362# 2362 2364# 2364 2366# 2366 2368# 2368 2370# 2370 2372# 2372
2374# 2374 2376# 2376 2378# 2378 2380# 2380 2474# 2474 2476# 2476 2478# 2478
2480# 2480 2482# 2482 2484# 2484 2486# 2486 2488# 2488 2490# 2490 2492# 2492
2494# 2494 2496# 2496 2498# 2498 2500# 2500 2502# 2502 2504# 2504 2506# 2506
2508# 2508 2510# 2510 2512# 2512 2514# 2514 2516# 2516 2518# 2518 2520# 2520
2522# 2522 2524# 2524 2526# 2526 2528# 2528 2530# 2530 2532# 2532 2534# 2534
2536# 2536 2538# 2538 2540# 2540 2542# 2542 2544# 2544 2549# 2549 2551# 2551
2553# 2553 2555# 2555 2557# 2557 2559# 2559 2561# 2561 2563# 2563 2565# 2565
2567# 2567 2569# 2569 2571# 2571 2573# 2573 2575# 2575 2577# 2577 2579# 2579
2581# 2581 2583# 2583 2585# 2585 2587# 2587 2592# 2592 2594# 2594 2596# 2596
2598# 2598 2600# 2600 2602# 2602 2604# 2604 2606# 2606 2608# 2608 2610# 2610
2612# 2612 2614# 2614 2708# 2708 2710# 2710 2712# 2712 2714# 2714 2716# 2716 SEQ 1048
2718# 2718 2720# 2720 2722# 2722 2724# 2724 2726# 2726 2728# 2728 2730# 2730
2732# 2732 2734# 2734 2736# 2736 2738# 2738 2740# 2740 2742# 2742 2744# 2744
2746# 2746 2748# 2748 2750# 2750 2752# 2752 2754# 2754 2756# 2756 2758# 2758
2760# 2760 2762# 2762 2764# 2764 2766# 2766 2768# 2768 2770# 2770 2772# 2772
2774# 2774 2776# 2776 2778# 2778 2783# 2783 2785# 2785 2787# 2787 2789# 2789
2791# 2791 2793# 2793 2795# 2795 2797# 2797 2799# 2799 2801# 2801 2803# 2803
2805# 2805 2807# 2807 2809# 2809 2811# 2811 2813# 2813 2815# 2815 2817# 2817
2819# 2819 2821# 2821 2823# 2823 2825# 2825 2827# 2827 2829# 2829 2834# 2834
2836# 2836 2838# 2838 2840# 2840 2842# 2842 2844# 2844 2846# 2846 2848# 2848
2850# 2850 2852# 2852 2854# 2854 2856# 2856 2858# 2858 2860# 2860 2954# 2954
2956# 2956 2958# 2958 2960# 2960 2962# 2962 2964# 2964 2966# 2966 2968# 2968
2970# 2970 2972# 2972 2974# 2974 2976# 2976 2978# 2978 2980# 2980 2982# 2982
2984# 2984 2986# 2986 2988# 2988 2990# 2990 2992# 2992 2994# 2994 2996# 2996
2998# 2998 3000# 3000 3002# 3002 3007# 3007 3009# 3009 3011# 3011 3013# 3013
3015# 3015 3017# 3017 3019# 3019 3021# 3021 3023# 3023 3025# 3025 3027# 3027
3029# 3029 3031# 3031 3033# 3033 3035# 3035 3037# 3037 3039# 3039 3041# 3041
3043# 3043 3045# 3045 3047# 3047 3049# 3049 3051# 3051 3053# 3053 3055# 3055
3057# 3057 3059# 3059 3061# 3061 3063# 3063 3065# 3065 3070# 3070 3072# 3072
3074# 3074 3076# 3076 3078# 3078 3080# 3080 3082# 3082 3084# 3084 3086# 3086
3088# 3088 3090# 3090 3092# 3092 3094# 3094 3096# 3096 3098# 3098 3100# 3100
3102# 3102 3104# 3104 3106# 3106 3108# 3108 3110# 3110 3112# 3112 3114# 3114
3116# 3116 3118# 3118 3120# 3120 3122# 3122 3124# 3124 3126# 3126 3128# 3128
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3144# 3144 3146# 3146 3148# 3148 3242# 3242 3244# 3244 3246# 3246 3249# 3249
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1770# 1770 1772# 1772 1775# 1775 1777# 1777 1779# 1779 1784# 1784 1786# 1786
1788# 1788 1791# 1791 1793# 1793 1795# 1795 1800# 1800 1802# 1802 1804# 1804
1807# 1807 1809# 1809 1811# 1811 1816# 1816 1818# 1818 1820# 1820 1823# 1823
1825# 1825 1827# 1827 1911# 1911 1913# 1913 1915# 1915 1918# 1918 1920# 1920
1922# 1922 1924# 1924 2050# 2050 2052# 2052 2054# 2054 2056# 2056 2058# 2058
2060# 2060 2062# 2062 2064# 2064 2066# 2066 2068# 2068 2070# 2070 2072# 2072
2074# 2074 2076# 2076 2078# 2078 2080# 2080 2082# 2082 2087# 2087 2089# 2089
2091# 2091 2093# 2093 2095# 2095 2097# 2097 2099# 2099 2101# 2101 2103# 2103
2105# 2105 2107# 2107 2109# 2109 2111# 2111 2113# 2113 2115# 2115 2117# 2117
2119# 2119 2244# 2244 2246# 2246 2248# 2248 2250# 2250 2252# 2252 2254# 2254 SEQ 1053
2256# 2256 2258# 2258 2260# 2260 2262# 2262 2264# 2264 2266# 2266 2268# 2268
2270# 2270 2272# 2272 2274# 2274 2276# 2276 2278# 2278 2280# 2280 2282# 2282
2284# 2284 2286# 2286 2288# 2288 2290# 2290 2292# 2292 2294# 2294 2296# 2296
2298# 2298 2300# 2300 2302# 2302 2304# 2304 2306# 2306 2308# 2308 2310# 2310
2312# 2312 2317# 2317 2319# 2319 2321# 2321 2323# 2323 2325# 2325 2327# 2327
2329# 2329 2331# 2331 2333# 2333 2335# 2335 2337# 2337 2339# 2339 2341# 2341
2343# 2343 2345# 2345 2347# 2347 2349# 2349 2351# 2351 2356# 2356 2358# 2358
2360# 2360 2362# 2362 2364# 2364 2366# 2366 2368# 2368 2370# 2370 2372# 2372
2374# 2374 2376# 2376 2378# 2378 2380# 2380 2474# 2474 2476# 2476 2478# 2478
2480# 2480 2482# 2482 2484# 2484 2486# 2486 2488# 2488 2490# 2490 2492# 2492
2494# 2494 2496# 2496 2498# 2498 2500# 2500 2502# 2502 2504# 2504 2506# 2506
2508# 2508 2510# 2510 2512# 2512 2514# 2514 2516# 2516 2518# 2518 2520# 2520
2522# 2522 2524# 2524 2526# 2526 2528# 2528 2530# 2530 2532# 2532 2534# 2534
2536# 2536 2538# 2538 2540# 2540 2542# 2542 2544# 2544 2549# 2549 2551# 2551
2553# 2553 2555# 2555 2557# 2557 2559# 2559 2561# 2561 2563# 2563 2565# 2565
2567# 2567 2569# 2569 2571# 2571 2573# 2573 2575# 2575 2577# 2577 2579# 2579
2581# 2581 2583# 2583 2585# 2585 2587# 2587 2592# 2592 2594# 2594 2596# 2596
2598# 2598 2600# 2600 2602# 2602 2604# 2604 2606# 2606 2608# 2608 2610# 2610
2612# 2612 2614# 2614 2708# 2708 2710# 2710 2712# 2712 2714# 2714 2716# 2716
2718# 2718 2720# 2720 2722# 2722 2724# 2724 2726# 2726 2728# 2728 2730# 2730
2732# 2732 2734# 2734 2736# 2736 2738# 2738 2740# 2740 2742# 2742 2744# 2744
2746# 2746 2748# 2748 2750# 2750 2752# 2752 2754# 2754 2756# 2756 2758# 2758
2760# 2760 2762# 2762 2764# 2764 2766# 2766 2768# 2768 2770# 2770 2772# 2772
2774# 2774 2776# 2776 2778# 2778 2783# 2783 2785# 2785 2787# 2787 2789# 2789
2791# 2791 2793# 2793 2795# 2795 2797# 2797 2799# 2799 2801# 2801 2803# 2803
2805# 2805 2807# 2807 2809# 2809 2811# 2811 2813# 2813 2815# 2815 2817# 2817
2819# 2819 2821# 2821 2823# 2823 2825# 2825 2827# 2827 2829# 2829 2834# 2834
2836# 2836 2838# 2838 2840# 2840 2842# 2842 2844# 2844 2846# 2846 2848# 2848
2850# 2850 2852# 2852 2854# 2854 2856# 2856 2858# 2858 2860# 2860 2954# 2954
2956# 2956 2958# 2958 2960# 2960 2962# 2962 2964# 2964 2966# 2966 2968# 2968
2970# 2970 2972# 2972 2974# 2974 2976# 2976 2978# 2978 2980# 2980 2982# 2982
2984# 2984 2986# 2986 2988# 2988 2990# 2990 2992# 2992 2994# 2994 2996# 2996
2998# 2998 3000# 3000 3002# 3002 3007# 3007 3009# 3009 3011# 3011 3013# 3013
3015# 3015 3017# 3017 3019# 3019 3021# 3021 3023# 3023 3025# 3025 3027# 3027
3029# 3029 3031# 3031 3033# 3033 3035# 3035 3037# 3037 3039# 3039 3041# 3041
3043# 3043 3045# 3045 3047# 3047 3049# 3049 3051# 3051 3053# 3053 3055# 3055
3057# 3057 3059# 3059 3061# 3061 3063# 3063 3065# 3065 3070# 3070 3072# 3072
3074# 3074 3076# 3076 3078# 3078 3080# 3080 3082# 3082 3084# 3084 3086# 3086
3088# 3088 3090# 3090 3092# 3092 3094# 3094 3096# 3096 3098# 3098 3100# 3100
3102# 3102 3104# 3104 3106# 3106 3108# 3108 3110# 3110 3112# 3112 3114# 3114
3116# 3116 3118# 3118 3120# 3120 3122# 3122 3124# 3124 3126# 3126 3128# 3128
3130# 3130 3132# 3132 3134# 3134 3136# 3136 3138# 3138 3140# 3140 3142# 3142
3144# 3144 3146# 3146 3148# 3148 3242# 3242 3244# 3244 3246# 3246 3249# 3249
3251# 3251 3253# 3253 3255# 3255 3257# 3257 3259# 3259 3261# 3261 3263# 3263
3265# 3265 3267# 3267 3269# 3269 3271# 3271 3273# 3273 3275# 3275 3277# 3277
3279# 3279 3281# 3281 3283# 3283 3285# 3285 3287# 3287 3289# 3289 3291# 3291
3293# 3293 3295# 3295 3297# 3297 3299# 3299 3301# 3301 3303# 3303 3305# 3305
3307# 3307 3309# 3309 3311# 3311 3313# 3313 3315# 3315 3317# 3317 3319# 3319
3324# 3324 3326# 3326 3328# 3328 3330# 3330 3332# 3332 3334# 3334 3336# 3336
3338# 3338 3340# 3340 3342# 3342 3344# 3344 3346# 3346 3348# 3348 3350# 3350
3352# 3352 3354# 3354 3356# 3356 3358# 3358 3360# 3360 3362# 3362 3364# 3364
3366# 3366 3368# 3368 3370# 3370 3372# 3372 3374# 3374 3376# 3376 3378# 3378
3383# 3383 3385# 3385 3387# 3387 3389# 3389 3391# 3391 3393# 3393 3395# 3395 SEQ 1054
3397# 3397 3399# 3399 3401# 3401 3403# 3403 3405# 3405 3407# 3407 3409# 3409
3411# 3411 3413# 3413 3415# 3415 3417# 3417 3419# 3419 3421# 3421 3423# 3423
3425# 3425 3427# 3427 3429# 3429 3431# 3431 3433# 3433 3435# 3435 3437# 3437
3439# 3439 3441# 3441 3443# 3443 3445# 3445 3447# 3447 3449# 3449 3451# 3451
3453# 3453 3455# 3455 3457# 3457 3459# 3459 3461# 3461 3463# 3463 3465# 3465
3467# 3467 3469# 3469 3471# 3471 3473# 3473 3475# 3475 3477# 3477 3479# 3479
3481# 3481 3483# 3483 3485# 3485 3487# 3487 3489# 3489 3491# 3491 3493# 3493
3495# 3495 3497# 3497 3499# 3499 3501# 3501 3503# 3503 3505# 3505 3507# 3507
3509# 3509 3511# 3511 3513# 3513 3515# 3515 3723# 3723 3725# 3725 3727# 3727
3729# 3729 3731# 3731 3733# 3733 3735# 3735 3737# 3737 3739# 3739 3741# 3741
3746# 3746 3748# 3748 3750# 3750 3752# 3752 3754# 3754 3756# 3756 3758# 3758
3760# 3760 3765# 3765 3767# 3767 3769# 3769 3771# 3771 3776# 3776 3778# 3778
3780# 3780 3782# 3782 3784# 3784 3786# 3786 3788# 3788 3790# 3790 3795# 3795
3797# 3797 3799# 3799 3801# 3801 3803# 3803 3805# 3805 3807# 3807 3809# 3809
3811# 3811 3816# 3816 3818# 3818 3820# 3820 3822# 3822 3824# 3824 3829# 3829
3831# 3831 3833# 3833 3838# 3838 3840# 3840 3842# 3842 4054# 4054 4056# 4056
4058# 4058 4060# 4060 4062# 4062 4064# 4064 4066# 4066 4068# 4068 4070# 4070
4072# 4072 4077# 4077 4079# 4079 4081# 4081 4083# 4083 4085# 4085 4087# 4087
4089# 4089 4091# 4091 4096# 4096 4098# 4098 4100# 4100 4102# 4102 4107# 4107
4109# 4109 4111# 4111 4113# 4113 4115# 4115 4117# 4117 4119# 4119 4121# 4121
4126# 4126 4128# 4128 4130# 4130 4132# 4132 4134# 4134 4136# 4136 4138# 4138
4140# 4140 4142# 4142 4147# 4147 4149# 4149 4151# 4151 4153# 4153 4155# 4155
4160# 4160 4162# 4162 4164# 4164 4169# 4169 4171# 4171 4173# 4173 4384# 4384
4386# 4386 4388# 4388 4390# 4390 4392# 4392 4394# 4394 4396# 4396 4401# 4401
4403# 4403 4405# 4405 4407# 4407 4409# 4409 4411# 4411 4413# 4413 4418# 4418
4420# 4420 4422# 4422 4424# 4424 4429# 4429 4431# 4431 4433# 4433 4435# 4435
4437# 4437 4439# 4439 4441# 4441 4446# 4446 4448# 4448 4450# 4450 4452# 4452
4454# 4454 4456# 4456 4458# 4458 4460# 4460 4465# 4465 4467# 4467 4469# 4469
4471# 4471 4473# 4473 4478# 4478 4480# 4480 4482# 4482 4487# 4487 4489# 4489
4491# 4491 4716# 4716 4718# 4718 4720# 4720 4722# 4722 4724# 4724 4729# 4729
4731# 4731 4733# 4733 4735# 4735 4737# 4737 4739# 4739 4741# 4741 4746# 4746
4748# 4748 4750# 4750 4752# 4752 4757# 4757 4759# 4759 4764# 4764 4766# 4766
4768# 4768 4773# 4773 4775# 4775 4777# 4777 4779# 4779 4781# 4781 4786# 4786
4788# 4788 4790# 4790 4795# 4795 4797# 4797 4799# 4799 5008# 5008 5010# 5010
5012# 5012 5014# 5014 5016# 5016 5018# 5018 5020# 5020 5025# 5025 5027# 5027
5029# 5029 5031# 5031 5033# 5033 5035# 5035 5037# 5037 5042# 5042 5044# 5044
5046# 5046 5048# 5048 5053# 5053 5055# 5055 5057# 5057 5059# 5059 5061# 5061
5063# 5063 5065# 5065 5070# 5070 5072# 5072 5074# 5074 5076# 5076 5078# 5078
5080# 5080 5082# 5082 5084# 5084 5089# 5089 5091# 5091 5093# 5093 5095# 5095
5097# 5097 5102# 5102 5104# 5104 5106# 5106 5111# 5111 5113# 5113 5115# 5115
5327# 5327 5329# 5329 5331# 5331 5333# 5333 5335# 5335 5340# 5340 5342# 5342
5344# 5344 5346# 5346 5348# 5348 5350# 5350 5352# 5352 5357# 5357 5359# 5359
5361# 5361 5363# 5363 5368# 5368 5370# 5370 5375# 5375 5377# 5377 5379# 5379
5384# 5384 5386# 5386 5388# 5388 5390# 5390 5392# 5392 5397# 5397 5399# 5399
5401# 5401 5406# 5406 5408# 5408 5410# 5410
%MR 197# 197 199# 199 201# 201 203# 203 208# 208 210# 210 212# 212
214# 214 219# 219 221# 221 223# 223 225# 225 230# 230 232# 232
234# 234 236# 236 241# 241 243# 243 245# 245 247# 247 252# 252
254# 254 256# 256 258# 258 263# 263 265# 265 267# 267 269# 269
274# 274 276# 276 278# 278 280# 280 282# 282 284# 284 286# 286
390# 390 392# 392 394# 394 396# 396 401# 401 403# 403 405# 405
407# 407 412# 412 414# 414 416# 416 418# 418 423# 423 425# 425
427# 427 429# 429 434# 434 436# 436 438# 438 440# 440 445# 445 SEQ 1055
447# 447 449# 449 451# 451 456# 456 458# 458 460# 460 462# 462
467# 467 469# 469 471# 471 473# 473 475# 475 477# 477 479# 479
481# 481 483# 483 485# 485 487# 487 489# 489 491# 491 493# 493
498# 498 500# 500 502# 502 504# 504 509# 509 511# 511 513# 513
515# 515 520# 520 522# 522 524# 524 526# 526 531# 531 533# 533
535# 535 537# 537 542# 542 544# 544 546# 546 548# 548 553# 553
555# 555 557# 557 559# 559 564# 564 566# 566 568# 568 570# 570
575# 575 577# 577 579# 579 581# 581 583# 583 585# 585 587# 587
589# 589 591# 591 593# 593 595# 595 597# 597 599# 599 601# 601
606# 606 608# 608 610# 610 612# 612 614# 614 616# 616 618# 618
620# 620 622# 622 624# 624 626# 626 628# 628 630# 630 632# 632
738# 738 740# 740 742# 742 744# 744 828# 828 830# 830 832# 832
834# 834 918# 918 920# 920 922# 922 924# 924 1017# 1017 1019# 1019
1021# 1021 1023# 1023 1116# 1116 1118# 1118 1120# 1120 1122# 1122 1215# 1215
1217# 1217 1219# 1219 1221# 1221 1314# 1314 1316# 1316 1318# 1318 1320# 1320
1415# 1415 1417# 1417 1419# 1419 1421# 1421 1576# 1576 1578# 1578 1580# 1580
1583# 1583 1585# 1585 1587# 1587 1592# 1592 1594# 1594 1596# 1596 1599# 1599
1601# 1601 1603# 1603 1608# 1608 1610# 1610 1612# 1612 1615# 1615 1617# 1617
1619# 1619 1624# 1624 1626# 1626 1628# 1628 1631# 1631 1633# 1633 1635# 1635
1640# 1640 1642# 1642 1644# 1644 1647# 1647 1649# 1649 1651# 1651 1656# 1656
1658# 1658 1660# 1660 1663# 1663 1665# 1665 1667# 1667 1672# 1672 1674# 1674
1676# 1676 1679# 1679 1681# 1681 1683# 1683 1688# 1688 1690# 1690 1692# 1692
1695# 1695 1697# 1697 1699# 1699 1704# 1704 1706# 1706 1708# 1708 1711# 1711
1713# 1713 1715# 1715 1720# 1720 1722# 1722 1724# 1724 1727# 1727 1729# 1729
1731# 1731 1736# 1736 1738# 1738 1740# 1740 1743# 1743 1745# 1745 1747# 1747
1752# 1752 1754# 1754 1756# 1756 1759# 1759 1761# 1761 1763# 1763 1768# 1768
1770# 1770 1772# 1772 1775# 1775 1777# 1777 1779# 1779 1784# 1784 1786# 1786
1788# 1788 1791# 1791 1793# 1793 1795# 1795 1800# 1800 1802# 1802 1804# 1804
1807# 1807 1809# 1809 1811# 1811 1816# 1816 1818# 1818 1820# 1820 1823# 1823
1825# 1825 1827# 1827 1911# 1911 1913# 1913 1915# 1915 1918# 1918 1920# 1920
1922# 1922 1924# 1924 2050# 2050 2052# 2052 2054# 2054 2056# 2056 2058# 2058
2060# 2060 2062# 2062 2064# 2064 2066# 2066 2068# 2068 2070# 2070 2072# 2072
2074# 2074 2076# 2076 2078# 2078 2080# 2080 2082# 2082 2087# 2087 2089# 2089
2091# 2091 2093# 2093 2095# 2095 2097# 2097 2099# 2099 2101# 2101 2103# 2103
2105# 2105 2107# 2107 2109# 2109 2111# 2111 2113# 2113 2115# 2115 2117# 2117
2119# 2119 2244# 2244 2246# 2246 2248# 2248 2250# 2250 2252# 2252 2254# 2254
2256# 2256 2258# 2258 2260# 2260 2262# 2262 2264# 2264 2266# 2266 2268# 2268
2270# 2270 2272# 2272 2274# 2274 2276# 2276 2278# 2278 2280# 2280 2282# 2282
2284# 2284 2286# 2286 2288# 2288 2290# 2290 2292# 2292 2294# 2294 2296# 2296
2298# 2298 2300# 2300 2302# 2302 2304# 2304 2306# 2306 2308# 2308 2310# 2310
2312# 2312 2317# 2317 2319# 2319 2321# 2321 2323# 2323 2325# 2325 2327# 2327
2329# 2329 2331# 2331 2333# 2333 2335# 2335 2337# 2337 2339# 2339 2341# 2341
2343# 2343 2345# 2345 2347# 2347 2349# 2349 2351# 2351 2356# 2356 2358# 2358
2360# 2360 2362# 2362 2364# 2364 2366# 2366 2368# 2368 2370# 2370 2372# 2372
2374# 2374 2376# 2376 2378# 2378 2380# 2380 2474# 2474 2476# 2476 2478# 2478
2480# 2480 2482# 2482 2484# 2484 2486# 2486 2488# 2488 2490# 2490 2492# 2492
2494# 2494 2496# 2496 2498# 2498 2500# 2500 2502# 2502 2504# 2504 2506# 2506
2508# 2508 2510# 2510 2512# 2512 2514# 2514 2516# 2516 2518# 2518 2520# 2520
2522# 2522 2524# 2524 2526# 2526 2528# 2528 2530# 2530 2532# 2532 2534# 2534
2536# 2536 2538# 2538 2540# 2540 2542# 2542 2544# 2544 2549# 2549 2551# 2551
2553# 2553 2555# 2555 2557# 2557 2559# 2559 2561# 2561 2563# 2563 2565# 2565
2567# 2567 2569# 2569 2571# 2571 2573# 2573 2575# 2575 2577# 2577 2579# 2579
2581# 2581 2583# 2583 2585# 2585 2587# 2587 2592# 2592 2594# 2594 2596# 2596 SEQ 1056
2598# 2598 2600# 2600 2602# 2602 2604# 2604 2606# 2606 2608# 2608 2610# 2610
2612# 2612 2614# 2614 2708# 2708 2710# 2710 2712# 2712 2714# 2714 2716# 2716
2718# 2718 2720# 2720 2722# 2722 2724# 2724 2726# 2726 2728# 2728 2730# 2730
2732# 2732 2734# 2734 2736# 2736 2738# 2738 2740# 2740 2742# 2742 2744# 2744
2746# 2746 2748# 2748 2750# 2750 2752# 2752 2754# 2754 2756# 2756 2758# 2758
2760# 2760 2762# 2762 2764# 2764 2766# 2766 2768# 2768 2770# 2770 2772# 2772
2774# 2774 2776# 2776 2778# 2778 2783# 2783 2785# 2785 2787# 2787 2789# 2789
2791# 2791 2793# 2793 2795# 2795 2797# 2797 2799# 2799 2801# 2801 2803# 2803
2805# 2805 2807# 2807 2809# 2809 2811# 2811 2813# 2813 2815# 2815 2817# 2817
2819# 2819 2821# 2821 2823# 2823 2825# 2825 2827# 2827 2829# 2829 2834# 2834
2836# 2836 2838# 2838 2840# 2840 2842# 2842 2844# 2844 2846# 2846 2848# 2848
2850# 2850 2852# 2852 2854# 2854 2856# 2856 2858# 2858 2860# 2860 2954# 2954
2956# 2956 2958# 2958 2960# 2960 2962# 2962 2964# 2964 2966# 2966 2968# 2968
2970# 2970 2972# 2972 2974# 2974 2976# 2976 2978# 2978 2980# 2980 2982# 2982
2984# 2984 2986# 2986 2988# 2988 2990# 2990 2992# 2992 2994# 2994 2996# 2996
2998# 2998 3000# 3000 3002# 3002 3007# 3007 3009# 3009 3011# 3011 3013# 3013
3015# 3015 3017# 3017 3019# 3019 3021# 3021 3023# 3023 3025# 3025 3027# 3027
3029# 3029 3031# 3031 3033# 3033 3035# 3035 3037# 3037 3039# 3039 3041# 3041
3043# 3043 3045# 3045 3047# 3047 3049# 3049 3051# 3051 3053# 3053 3055# 3055
3057# 3057 3059# 3059 3061# 3061 3063# 3063 3065# 3065 3070# 3070 3072# 3072
3074# 3074 3076# 3076 3078# 3078 3080# 3080 3082# 3082 3084# 3084 3086# 3086
3088# 3088 3090# 3090 3092# 3092 3094# 3094 3096# 3096 3098# 3098 3100# 3100
3102# 3102 3104# 3104 3106# 3106 3108# 3108 3110# 3110 3112# 3112 3114# 3114
3116# 3116 3118# 3118 3120# 3120 3122# 3122 3124# 3124 3126# 3126 3128# 3128
3130# 3130 3132# 3132 3134# 3134 3136# 3136 3138# 3138 3140# 3140 3142# 3142
3144# 3144 3146# 3146 3148# 3148 3242# 3242 3244# 3244 3246# 3246 3249# 3249
3251# 3251 3253# 3253 3255# 3255 3257# 3257 3259# 3259 3261# 3261 3263# 3263
3265# 3265 3267# 3267 3269# 3269 3271# 3271 3273# 3273 3275# 3275 3277# 3277
3279# 3279 3281# 3281 3283# 3283 3285# 3285 3287# 3287 3289# 3289 3291# 3291
3293# 3293 3295# 3295 3297# 3297 3299# 3299 3301# 3301 3303# 3303 3305# 3305
3307# 3307 3309# 3309 3311# 3311 3313# 3313 3315# 3315 3317# 3317 3319# 3319
3324# 3324 3326# 3326 3328# 3328 3330# 3330 3332# 3332 3334# 3334 3336# 3336
3338# 3338 3340# 3340 3342# 3342 3344# 3344 3346# 3346 3348# 3348 3350# 3350
3352# 3352 3354# 3354 3356# 3356 3358# 3358 3360# 3360 3362# 3362 3364# 3364
3366# 3366 3368# 3368 3370# 3370 3372# 3372 3374# 3374 3376# 3376 3378# 3378
3383# 3383 3385# 3385 3387# 3387 3389# 3389 3391# 3391 3393# 3393 3395# 3395
3397# 3397 3399# 3399 3401# 3401 3403# 3403 3405# 3405 3407# 3407 3409# 3409
3411# 3411 3413# 3413 3415# 3415 3417# 3417 3419# 3419 3421# 3421 3423# 3423
3425# 3425 3427# 3427 3429# 3429 3431# 3431 3433# 3433 3435# 3435 3437# 3437
3439# 3439 3441# 3441 3443# 3443 3445# 3445 3447# 3447 3449# 3449 3451# 3451
3453# 3453 3455# 3455 3457# 3457 3459# 3459 3461# 3461 3463# 3463 3465# 3465
3467# 3467 3469# 3469 3471# 3471 3473# 3473 3475# 3475 3477# 3477 3479# 3479
3481# 3481 3483# 3483 3485# 3485 3487# 3487 3489# 3489 3491# 3491 3493# 3493
3495# 3495 3497# 3497 3499# 3499 3501# 3501 3503# 3503 3505# 3505 3507# 3507
3509# 3509 3511# 3511 3513# 3513 3515# 3515 3723# 3723 3725# 3725 3727# 3727
3729# 3729 3731# 3731 3733# 3733 3735# 3735 3737# 3737 3739# 3739 3741# 3741
3746# 3746 3748# 3748 3750# 3750 3752# 3752 3754# 3754 3756# 3756 3758# 3758
3760# 3760 3765# 3765 3767# 3767 3769# 3769 3771# 3771 3776# 3776 3778# 3778
3780# 3780 3782# 3782 3784# 3784 3786# 3786 3788# 3788 3790# 3790 3795# 3795
3797# 3797 3799# 3799 3801# 3801 3803# 3803 3805# 3805 3807# 3807 3809# 3809
3811# 3811 3816# 3816 3818# 3818 3820# 3820 3822# 3822 3824# 3824 3829# 3829
3831# 3831 3833# 3833 3838# 3838 3840# 3840 3842# 3842 4054# 4054 4056# 4056
4058# 4058 4060# 4060 4062# 4062 4064# 4064 4066# 4066 4068# 4068 4070# 4070 SEQ 1057
4072# 4072 4077# 4077 4079# 4079 4081# 4081 4083# 4083 4085# 4085 4087# 4087
4089# 4089 4091# 4091 4096# 4096 4098# 4098 4100# 4100 4102# 4102 4107# 4107
4109# 4109 4111# 4111 4113# 4113 4115# 4115 4117# 4117 4119# 4119 4121# 4121
4126# 4126 4128# 4128 4130# 4130 4132# 4132 4134# 4134 4136# 4136 4138# 4138
4140# 4140 4142# 4142 4147# 4147 4149# 4149 4151# 4151 4153# 4153 4155# 4155
4160# 4160 4162# 4162 4164# 4164 4169# 4169 4171# 4171 4173# 4173 4384# 4384
4386# 4386 4388# 4388 4390# 4390 4392# 4392 4394# 4394 4396# 4396 4401# 4401
4403# 4403 4405# 4405 4407# 4407 4409# 4409 4411# 4411 4413# 4413 4418# 4418
4420# 4420 4422# 4422 4424# 4424 4429# 4429 4431# 4431 4433# 4433 4435# 4435
4437# 4437 4439# 4439 4441# 4441 4446# 4446 4448# 4448 4450# 4450 4452# 4452
4454# 4454 4456# 4456 4458# 4458 4460# 4460 4465# 4465 4467# 4467 4469# 4469
4471# 4471 4473# 4473 4478# 4478 4480# 4480 4482# 4482 4487# 4487 4489# 4489
4491# 4491 4716# 4716 4718# 4718 4720# 4720 4722# 4722 4724# 4724 4729# 4729
4731# 4731 4733# 4733 4735# 4735 4737# 4737 4739# 4739 4741# 4741 4746# 4746
4748# 4748 4750# 4750 4752# 4752 4757# 4757 4759# 4759 4764# 4764 4766# 4766
4768# 4768 4773# 4773 4775# 4775 4777# 4777 4779# 4779 4781# 4781 4786# 4786
4788# 4788 4790# 4790 4795# 4795 4797# 4797 4799# 4799 5008# 5008 5010# 5010
5012# 5012 5014# 5014 5016# 5016 5018# 5018 5020# 5020 5025# 5025 5027# 5027
5029# 5029 5031# 5031 5033# 5033 5035# 5035 5037# 5037 5042# 5042 5044# 5044
5046# 5046 5048# 5048 5053# 5053 5055# 5055 5057# 5057 5059# 5059 5061# 5061
5063# 5063 5065# 5065 5070# 5070 5072# 5072 5074# 5074 5076# 5076 5078# 5078
5080# 5080 5082# 5082 5084# 5084 5089# 5089 5091# 5091 5093# 5093 5095# 5095
5097# 5097 5102# 5102 5104# 5104 5106# 5106 5111# 5111 5113# 5113 5115# 5115
5327# 5327 5329# 5329 5331# 5331 5333# 5333 5335# 5335 5340# 5340 5342# 5342
5344# 5344 5346# 5346 5348# 5348 5350# 5350 5352# 5352 5357# 5357 5359# 5359
5361# 5361 5363# 5363 5368# 5368 5370# 5370 5375# 5375 5377# 5377 5379# 5379
5384# 5384 5386# 5386 5388# 5388 5390# 5390 5392# 5392 5397# 5397 5399# 5399
5401# 5401 5406# 5406 5408# 5408 5410# 5410
.LA 1576 1578 1580 1583 1585 1587 1592 1594 1596 1599 1601 1603 1608 1610
1612 1615 1617 1619 1624 1626 1628 1631 1633 1635 1640 1642 1644 1647
1649 1651 1656 1658 1660 1663 1665 1667 1672 1674 1676 1679 1681 1683
1688 1690 1692 1695 1697 1699 1704 1706 1708 1711 1713 1715 1720 1722
1724 1727 1729 1731 1736 1738 1740 1743 1745 1747 1752 1754 1756 1759
1761 1763 1768 1770 1772 1775 1777 1779 1784 1786 1788 1791 1793 1795
1800 1802 1804 1807 1809 1811 1816 1818 1820 1823 1825 1827 2050 2052
2054 2056 2058 2060 2062 2064 2066 2068 2070 2072 2074 2076 2078 2080
2082 2087 2089 2091 2093 2095 2097 2099 2101 2103 2105 2107 2109 2111
2113 2115 2117 2119 2478 2482 2486 2490 2494 2498 2502 2506 2510 2514
2518 2522 2526 2530 2534 2538 2542 2551 2553 2557 2561 2565 2569 2573
2577 2581 2585 2587 2716 2720 2724 2728 2732 2736 2740 2744 2748 2752
2756 2760 2764 2768 2772 2776 2778 2791 2795 2799 2803 2809 2815 2821
2827 2829 2856 2858 2964 2968 2972 2976 2982 2988 2994 3000 3002 3082
3086 3088 3090 3092 3094 3096 3100 3102 3106 3108 3110 3112 3114 3116
3118 3120 3122 3124 3128 3130 3134 3136 3140 3142 3146 3259 3261 3263
3265 3267 3271 3275 3279 3283 3285 3287 3289 3291 3293 3295 3299 3301
3305 3307 3311 3313 3317 3332 3336 3342 3348 3352 3356 3362 3368 3372
3376 3378 3419 3421 3423 3425 3427 3429 3431 3433 3435 3437 3439 3441
3443 3445 3447 3449 3451 3453 3455 3457 3459 3461 3463 3465 3467 3469
3471 3473 3475 3477 3479 3481 3483 3485 3487 3489 3491 3493 3495 3497
3499 3501 3503 3505 3507 3509 3511 3513 3731 3737 3741 3754 3756 3758
3760 3778 3780 3782 3784 3786 3797 3799 3801 3803 3805 3807 3822 3824
3833 3842 4062 4068 4072 4085 4087 4089 4091 4109 4111 4113 4115 4117
4128 4130 4132 4134 4136 4138 4153 4155 4164 4173 4396 4409 4411 4413 SEQ 1058
4437 4441 4450 4452 4456 4460 4471 4473 4482 4491 4724 4737 4739 4741
4759 4766 4768 4779 4781 4790 4799 5020 5033 5035 5037 5061 5065 5074
5076 5080 5084 5095 5097 5106 5115 5335 5348 5350 5352 5370 5377 5379
5390 5392 5401 5410
.LADDR 197 390 738 828 918 1017 1116 1215 1314 1415 1576 1911 2050 2244
2474 2708 2954 3242 3723 3829 4054 4160 4384 4478 4716 4746 4773 4786
5008 5102 5327 5357 5384 5397
.LAND 197 199 201 203 208 210 212 214 219 221 223 225 230 232
234 236 241 243 245 247 252 254 256 258 263 265 267 269
828 832 1576 1592 1608 1624 1640 1656 1672 1688 1704 1720 1736 1752
1768 1784 1800 1816 1911 1918 2244 2317 2356 2474 2476 2480 2484 2488
2492 2496 2500 2504 2508 2512 2516 2520 2524 2528 2532 2536 2540 2549
2555 2559 2563 2567 2571 2575 2579 2583 2592 2598 2600 2602 2604 2606
2608 2610 2612 2614 2708 2710 2712 2783 2834 2860 2954 2956 3007 3009
3070 3072 3082 3086 3090 3094 3100 3106 3110 3114 3118 3122 3128 3134
3140 3146 3242 3324 3326 3332 3336 3338 3342 3344 3348 3352 3356 3358
3362 3364 3368 3372 3376 3383 3483 3485 3487 3489 3491 3493 3495 3497
3499 3501 3503 3505 3507 3509 3511 3513 3723 3725 3733 3746 3758 3765
3818 4054 4056 4064 4077 4089 4096 4149 4384 4392 4401 4418 4467 4716
4720 4729 4746 4775 5008 5016 5025 5042 5091 5327 5331 5340 5357 5386
.LB 1576 1578 1583 1585 1592 1594 1599 1601 1608 1610 1615 1617 1624 1626
1631 1633 1640 1642 1647 1649 1656 1658 1663 1665 1672 1674 1679 1681
1688 1690 1695 1697 1704 1706 1711 1713 1720 1722 1727 1729 1736 1738
1743 1745 1752 1754 1759 1761 1768 1770 1775 1777 1784 1786 1791 1793
1800 1802 1807 1809 1816 1818 1823 1825 2050 2052 2054 2056 2058 2060
2062 2064 2066 2068 2070 2072 2074 2076 2078 2080 2082 2474 2480 2484
2488 2492 2496 2500 2504 2508 2512 2516 2520 2524 2549 2555 2557 2559
2561 2563 2565 2567 2569 2571 2573 2575 2577 2579 2581 2583 2585 2710
2714 2716 2718 2720 2722 2724 2726 2728 2730 2732 2734 2736 2738 2740
2742 2744 2746 2748 2750 2752 2754 2756 2758 2760 2762 2764 2766 2768
2770 2772 2774 2776 2789 2791 2793 2795 2797 2799 2801 2803 2805 2807
2809 2811 2813 2815 2817 2819 2821 2823 2825 2827 2838 2846 2848 2852
2854 2856 2858 2956 2962 2964 2966 2968 2970 2972 2974 2976 2978 2980
2982 2984 2986 2988 2990 2992 2994 2996 2998 3000 3037 3039 3041 3043
3072 3076 3078 3080 3082 3084 3086 3088 3090 3092 3094 3096 3098 3100
3102 3104 3106 3108 3110 3112 3114 3116 3118 3120 3122 3124 3126 3128
3130 3132 3134 3136 3138 3140 3142 3144 3146 3244 3269 3273 3277 3281
3295 3297 3301 3303 3307 3309 3313 3315 3328 3330 3332 3334 3336 3338
3340 3342 3344 3346 3348 3350 3352 3354 3356 3358 3360 3362 3364 3366
3368 3370 3372 3374 3376 3387 3389 3391 3393 3395 3397 3399 3401 3403
3405 3407 3409 3411 3413 3415 3419 3421 3425 3427 3431 3433 3437 3439
3443 3445 3451 3453 3455 3457 3459 3461 3463 3465 3467 3469 3471 3473
3475 3477 3479 3481 3725 3727 3729 3731 3735 3737 3739 3748 3750 3754
3756 3758 3776 3778 3780 3782 3784 3786 3795 3797 3799 3801 3803 3805
3807 3816 3822 3829 3831 3838 3840 4056 4058 4060 4062 4066 4068 4070
4079 4081 4085 4087 4089 4107 4109 4111 4113 4115 4117 4126 4128 4130
4132 4134 4136 4138 4147 4153 4160 4162 4169 4171 4386 4388 4390 4394
4396 4403 4405 4409 4411 4413 4429 4431 4435 4437 4439 4441 4446 4450
4452 4454 4456 4458 4460 4467 4469 4471 4478 4480 4489 4718 4722 4724
4731 4733 4737 4739 4741 4757 4764 4766 4775 4777 4779 4786 4788 4797
5010 5012 5014 5018 5020 5027 5029 5033 5035 5037 5053 5055 5059 5061
5063 5065 5070 5074 5076 5078 5080 5082 5084 5091 5093 5095 5102 5104
5113 5329 5333 5335 5342 5344 5348 5350 5352 5368 5375 5377 5386 5388 SEQ 1059
5390 5397 5399 5408
.LCONT 1578 1585 1594 1601 1610 1617 1626 1633 1642 1649 1658 1665 1674 1681
1690 1697 1706 1713 1722 1729 1738 1745 1754 1761 1770 1777 1786 1793
1802 1809 1818 1825 1913 1920 1922 2052 2054 2056 2058 2060 2062 2064
2066 2068 2070 2072 2074 2076 2078 2080 2082 2246 2248 2250 2252 2254
2256 2258 2260 2262 2264 2266 2268 2270 2272 2274 2276 2278 2280 2282
2284 2286 2288 2290 2292 2294 2296 2298 2300 2302 2304 2306 2308 2319
2321 2323 2325 2327 2329 2331 2333 2335 2337 2339 2341 2343 2345 2347
2358 2360 2362 2364 2366 2368 2370 2372 2374 2376 2476 2478 2480 2482
2484 2486 2488 2490 2492 2494 2496 2498 2500 2502 2504 2506 2508 2510
2512 2514 2516 2518 2520 2522 2524 2526 2528 2530 2532 2534 2536 2538
2540 2542 2551 2553 2555 2557 2559 2561 2563 2565 2567 2569 2571 2573
2575 2577 2579 2581 2583 2585 2594 2596 2598 2600 2602 2604 2606 2608
2610 2612 2710 2712 2714 2716 2718 2720 2722 2724 2726 2728 2730 2732
2734 2736 2738 2740 2742 2744 2746 2748 2750 2752 2754 2756 2758 2760
2762 2764 2766 2768 2770 2772 2774 2776 2785 2787 2789 2791 2793 2795
2797 2799 2801 2803 2805 2807 2809 2811 2813 2815 2817 2819 2821 2823
2825 2827 2836 2838 2840 2842 2844 2846 2848 2850 2852 2854 2856 2858
2956 2958 2960 2962 2964 2966 2968 2970 2972 2974 2976 2978 2980 2982
2984 2986 2988 2990 2992 2994 2996 2998 3000 3009 3011 3013 3015 3017
3019 3021 3023 3025 3027 3029 3031 3033 3035 3037 3039 3041 3043 3045
3047 3049 3051 3053 3055 3057 3059 3061 3063 3072 3074 3076 3078 3080
3082 3084 3086 3088 3090 3092 3094 3096 3098 3100 3102 3104 3106 3108
3110 3112 3114 3116 3118 3120 3122 3124 3126 3128 3130 3132 3134 3136
3138 3140 3142 3144 3146 3244 3246 3249 3251 3253 3255 3257 3259 3261
3263 3265 3267 3269 3271 3273 3275 3277 3279 3281 3283 3285 3287 3289
3291 3293 3295 3297 3299 3301 3303 3305 3307 3309 3311 3313 3315 3317
3326 3328 3330 3332 3334 3336 3338 3340 3342 3344 3346 3348 3350 3352
3354 3356 3358 3360 3362 3364 3366 3368 3370 3372 3374 3376 3385 3387
3389 3391 3393 3395 3397 3399 3401 3403 3405 3407 3409 3411 3413 3415
3417 3419 3421 3423 3425 3427 3429 3431 3433 3435 3437 3439 3441 3443
3445 3447 3449 3451 3453 3455 3457 3459 3461 3463 3465 3467 3469 3471
3473 3475 3477 3479 3481 3483 3485 3487 3489 3491 3493 3495 3497 3499
3501 3503 3505 3507 3509 3511 3513 3725 3727 3729 3731 3733 3735 3737
3739 3748 3750 3752 3754 3756 3758 3771 3776 3778 3780 3782 3784 3786
3788 3797 3799 3801 3803 3805 3807 3809 3818 3820 3822 3831 3840 4056
4058 4060 4062 4064 4066 4068 4070 4079 4081 4083 4085 4087 4089 4102
4107 4109 4111 4113 4115 4117 4119 4128 4130 4132 4134 4136 4138 4140
4149 4151 4153 4162 4171 4386 4388 4390 4392 4394 4403 4405 4407 4409
4411 4424 4429 4431 4433 4435 4437 4439 4448 4450 4452 4454 4456 4458
4467 4469 4471 4480 4489 4718 4720 4722 4731 4733 4735 4737 4739 4752
4757 4766 4775 4777 4779 4788 4797 5010 5012 5014 5016 5018 5027 5029
5031 5033 5035 5048 5053 5055 5057 5059 5061 5063 5072 5074 5076 5078
5080 5082 5091 5093 5095 5104 5113 5329 5331 5333 5342 5344 5346 5348
5350 5363 5368 5377 5386 5388 5390 5399 5408
.LCRY 1314 1318 2262 2264 2266 2268 2270 2272 2274 2276 2290 2302 2329 2333
2335 2339 2341 2362 2366 2372 2488 2492 2496 2500 2516 2520 2532 2540
2555 2559 2563 2567 2579 2583 2600 2602 2604 2606 2714 2718 2722 2726
2738 2746 2758 2766 2801 2807 2825 2842 2844 2846 2848 2966 2970 2974
2980 3013 3015 3017 3021 3031 3041 3049 3051 3061 3080 3084 3088 3092
3104 3116 3120 3132 3138 3249 3251 3253 3255 3257 3287 3289 3315 3334
3336 3338 3340 3342 3344 3346 3767 3820 4058 4060 4066 4070 4085 4087
4098 4107 4109 4111 4113 4115 4117 4119 4128 4130 4132 4134 4136 4138 SEQ 1060
4140 4151 4153 4162 4171 4420 4469 4718 4722 4737 4739 4748 4757 4766
4777 4779 4788 4797 5044 5093 5329 5333 5348 5350 5359 5368 5377 5388
5390 5399 5408
.LD 197 199 201 203 208 210 212 214 219 221 223 225 230 232
234 236 241 243 245 247 252 254 256 258 263 265 267 269
274 276 278 280 282 284 286 390 392 394 396 401 403 405
407 412 414 416 418 423 425 427 429 434 436 438 440 445
447 449 451 456 458 460 462 467 469 471 473 475 477 479
481 483 485 487 489 491 493 498 500 502 504 509 511 513
515 520 522 524 526 531 533 535 537 542 544 546 548 553
555 557 559 564 566 568 570 575 577 579 581 583 585 587
589 591 593 595 597 599 601 606 608 610 612 614 616 618
620 622 624 626 628 630 632 738 740 742 744 828 830 832
834 918 920 922 924 1017 1019 1021 1023 1116 1118 1120 1122 1215
1217 1219 1221 1314 1316 1318 1320 1415 1417 1419 1421 1576 1578 1580
1583 1585 1587 1592 1594 1596 1599 1601 1603 1608 1610 1612 1615 1617
1619 1624 1626 1628 1631 1633 1635 1640 1642 1644 1647 1649 1651 1656
1658 1660 1663 1665 1667 1672 1674 1676 1679 1681 1683 1688 1690 1692
1695 1697 1699 1704 1706 1708 1711 1713 1715 1720 1722 1724 1727 1729
1731 1736 1738 1740 1743 1745 1747 1752 1754 1756 1759 1761 1763 1768
1770 1772 1775 1777 1779 1784 1786 1788 1791 1793 1795 1800 1802 1804
1807 1809 1811 1816 1818 1820 1823 1825 1827 1911 1913 1915 1918 1920
1922 1924 2050 2052 2054 2056 2058 2060 2062 2064 2066 2068 2070 2072
2074 2076 2078 2080 2082 2087 2089 2091 2093 2095 2097 2099 2101 2103
2105 2107 2109 2111 2113 2115 2117 2119 2244 2246 2248 2250 2252 2254
2256 2258 2260 2262 2264 2266 2268 2270 2272 2274 2276 2278 2280 2282
2284 2286 2288 2290 2292 2294 2296 2298 2300 2302 2304 2306 2308 2310
2312 2317 2319 2321 2323 2325 2327 2329 2331 2333 2335 2337 2339 2341
2343 2345 2347 2349 2351 2356 2358 2360 2362 2364 2366 2368 2370 2372
2374 2376 2378 2380 2474 2476 2478 2480 2482 2484 2486 2488 2490 2492
2494 2496 2498 2500 2502 2504 2506 2508 2510 2512 2514 2516 2518 2520
2522 2524 2526 2528 2530 2532 2534 2536 2538 2540 2542 2544 2549 2551
2553 2555 2557 2559 2561 2563 2565 2567 2569 2571 2573 2575 2577 2579
2581 2583 2585 2587 2592 2594 2596 2598 2600 2602 2604 2606 2608 2610
2612 2614 2708 2710 2712 2714 2716 2718 2720 2722 2724 2726 2728 2730
2732 2734 2736 2738 2740 2742 2744 2746 2748 2750 2752 2754 2756 2758
2760 2762 2764 2766 2768 2770 2772 2774 2776 2778 2783 2785 2787 2789
2791 2793 2795 2797 2799 2801 2803 2805 2807 2809 2811 2813 2815 2817
2819 2821 2823 2825 2827 2829 2834 2836 2838 2840 2842 2844 2846 2848
2850 2852 2854 2856 2858 2860 2954 2956 2958 2960 2962 2964 2966 2968
2970 2972 2974 2976 2978 2980 2982 2984 2986 2988 2990 2992 2994 2996
2998 3000 3002 3007 3009 3011 3013 3015 3017 3019 3021 3023 3025 3027
3029 3031 3033 3035 3037 3039 3041 3043 3045 3047 3049 3051 3053 3055
3057 3059 3061 3063 3065 3070 3072 3074 3076 3078 3080 3082 3084 3086
3088 3090 3092 3094 3096 3098 3100 3102 3104 3106 3108 3110 3112 3114
3116 3118 3120 3122 3124 3126 3128 3130 3132 3134 3136 3138 3140 3142
3144 3146 3148 3242 3244 3246 3249 3251 3253 3255 3257 3259 3261 3263
3265 3267 3269 3271 3273 3275 3277 3279 3281 3283 3285 3287 3289 3291
3293 3295 3297 3299 3301 3303 3305 3307 3309 3311 3313 3315 3317 3319
3324 3326 3328 3330 3332 3334 3336 3338 3340 3342 3344 3346 3348 3350
3352 3354 3356 3358 3360 3362 3364 3366 3368 3370 3372 3374 3376 3378
3383 3385 3387 3389 3391 3393 3395 3397 3399 3401 3403 3405 3407 3409
3411 3413 3415 3417 3419 3421 3423 3425 3427 3429 3431 3433 3435 3437 SEQ 1061
3439 3441 3443 3445 3447 3449 3451 3453 3455 3457 3459 3461 3463 3465
3467 3469 3471 3473 3475 3477 3479 3481 3483 3485 3487 3489 3491 3493
3495 3497 3499 3501 3503 3505 3507 3509 3511 3513 3515 3723 3725 3727
3729 3731 3733 3735 3737 3739 3741 3746 3748 3750 3752 3754 3756 3758
3760 3765 3767 3769 3771 3776 3778 3780 3782 3784 3786 3788 3790 3795
3797 3799 3801 3803 3805 3807 3809 3811 3816 3818 3820 3822 3824 3829
3831 3833 3838 3840 3842 4054 4056 4058 4060 4062 4064 4066 4068 4070
4072 4077 4079 4081 4083 4085 4087 4089 4091 4096 4098 4100 4102 4107
4109 4111 4113 4115 4117 4119 4121 4126 4128 4130 4132 4134 4136 4138
4140 4142 4147 4149 4151 4153 4155 4160 4162 4164 4169 4171 4173 4384
4386 4388 4390 4392 4394 4396 4401 4403 4405 4407 4409 4411 4413 4418
4420 4422 4424 4429 4431 4433 4435 4437 4439 4441 4446 4448 4450 4452
4454 4456 4458 4460 4465 4467 4469 4471 4473 4478 4480 4482 4487 4489
4491 4716 4718 4720 4722 4724 4729 4731 4733 4735 4737 4739 4741 4746
4748 4750 4752 4757 4759 4764 4766 4768 4773 4775 4777 4779 4781 4786
4788 4790 4795 4797 4799 5008 5010 5012 5014 5016 5018 5020 5025 5027
5029 5031 5033 5035 5037 5042 5044 5046 5048 5053 5055 5057 5059 5061
5063 5065 5070 5072 5074 5076 5078 5080 5082 5084 5089 5091 5093 5095
5097 5102 5104 5106 5111 5113 5115 5327 5329 5331 5333 5335 5340 5342
5344 5346 5348 5350 5352 5357 5359 5361 5363 5368 5370 5375 5377 5379
5384 5386 5388 5390 5392 5397 5399 5401 5406 5408 5410
.LJ 197 199 201 203 208 210 212 214 219 221 223 225 230 232
234 236 241 243 245 247 252 254 256 258 263 265 267 269
274 276 278 280 282 284 286 390 392 394 396 401 403 405
407 412 414 416 418 423 425 427 429 434 436 438 440 445
447 449 451 456 458 460 462 467 469 471 473 475 477 479
481 483 485 487 489 491 493 498 500 502 504 509 511 513
515 520 522 524 526 531 533 535 537 542 544 546 548 553
555 557 559 564 566 568 570 575 577 579 581 583 585 587
589 591 593 595 597 599 601 606 608 610 612 614 616 618
620 622 624 626 628 630 632 738 740 742 744 828 830 832
834 918 920 922 924 1017 1019 1021 1023 1116 1118 1120 1122 1215
1217 1219 1221 1314 1316 1318 1320 1415 1417 1419 1421 1576 1580 1583
1587 1592 1596 1599 1603 1608 1612 1615 1619 1624 1628 1631 1635 1640
1644 1647 1651 1656 1660 1663 1667 1672 1676 1679 1683 1688 1692 1695
1699 1704 1708 1711 1715 1720 1724 1727 1731 1736 1740 1743 1747 1752
1756 1759 1763 1768 1772 1775 1779 1784 1788 1791 1795 1800 1804 1807
1811 1816 1820 1823 1827 1911 1915 1918 1924 2050 2087 2089 2091 2093
2095 2097 2099 2101 2103 2105 2107 2109 2111 2113 2115 2117 2119 2244
2310 2312 2317 2349 2351 2356 2378 2380 2474 2544 2549 2587 2592 2614
2708 2778 2783 2829 2834 2860 2954 3002 3007 3065 3070 3148 3242 3319
3324 3378 3383 3515 3723 3741 3746 3760 3765 3767 3769 3790 3795 3811
3816 3824 3829 3833 3838 3842 4054 4072 4077 4091 4096 4098 4100 4121
4126 4142 4147 4155 4160 4164 4169 4173 4384 4396 4401 4413 4418 4420
4422 4441 4446 4460 4465 4473 4478 4482 4487 4491 4716 4724 4729 4741
4746 4748 4750 4759 4764 4768 4773 4781 4786 4790 4795 4799 5008 5020
5025 5037 5042 5044 5046 5065 5070 5084 5089 5097 5102 5106 5111 5115
5327 5335 5340 5352 5357 5359 5361 5370 5375 5379 5384 5392 5397 5401
5406 5410
.LJMAP 197 199 201 203 208 210 212 214 219 221 223 225 230 232
234 236 241 243 245 247 252 254 256 258 263 265 267 269
274 276 278 280 282 284 286 390 392 394 396 401 403 405
407 412 414 416 418 423 425 427 429 434 436 438 440 445 SEQ 1062
447 449 451 456 458 460 462 467 469 471 473 475 477 479
481 483 485 487 489 491 493 498 500 502 504 509 511 513
515 520 522 524 526 531 533 535 537 542 544 546 548 553
555 557 559 564 566 568 570 575 577 579 581 583 585 587
589 591 593 595 597 599 601 606 608 610 612 614 616 618
620 622 624 626 628 630 632 738 740 742 744 828 830 832
834 918 920 922 924 1017 1019 1021 1023 1116 1118 1120 1122 1215
1217 1219 1221 1314 1316 1318 1320 1415 1417 1419 1421 1576 1580 1583
1587 1592 1596 1599 1603 1608 1612 1615 1619 1624 1628 1631 1635 1640
1644 1647 1651 1656 1660 1663 1667 1672 1676 1679 1683 1688 1692 1695
1699 1704 1708 1711 1715 1720 1724 1727 1731 1736 1740 1743 1747 1752
1756 1759 1763 1768 1772 1775 1779 1784 1788 1791 1795 1800 1804 1807
1811 1816 1820 1823 1827 1911 1915 1918 1924 2050 2087 2089 2091 2093
2095 2097 2099 2101 2103 2105 2107 2109 2111 2113 2115 2117 2119 2244
2310 2312 2317 2349 2351 2356 2378 2380 2474 2544 2549 2587 2592 2614
2708 2778 2783 2829 2834 2860 2954 3002 3007 3065 3070 3148 3242 3319
3324 3378 3383 3515 3723 3741 3746 3760 3765 3767 3769 3790 3795 3811
3816 3824 3829 3833 3838 3842 4054 4072 4077 4091 4096 4098 4100 4121
4126 4142 4147 4155 4160 4164 4169 4173 4384 4396 4401 4413 4418 4420
4422 4441 4446 4460 4465 4473 4478 4482 4487 4491 4716 4724 4729 4741
4746 4748 4750 4759 4764 4768 4773 4781 4786 4790 4795 4799 5008 5020
5025 5037 5042 5044 5046 5065 5070 5084 5089 5097 5102 5106 5111 5115
5327 5335 5340 5352 5357 5359 5361 5370 5375 5379 5384 5392 5397 5401
5406 5410
.LMGC 197 199 201 203 208 210 212 214 219 221 223 225 230 232
234 236 241 243 245 247 252 254 256 258 263 265 267 269
274 276 278 280 282 284 286 392 396 403 407 414 418 425
429 436 440 447 451 458 462 469 473 477 481 485 489 493
500 504 511 515 522 526 533 537 544 548 555 559 566 570
577 581 585 589 593 597 601 608 612 616 620 624 628 632
738 740 742 744 828 830 832 834 918 920 922 924 1017 1019
1021 1023 1116 1118 1120 1122 1215 1217 1219 1221 1314 1316 1318 1320
1415 1417 1419 1421 1578 1580 1585 1587 1594 1596 1601 1603 1610 1612
1617 1619 1626 1628 1633 1635 1642 1644 1649 1651 1658 1660 1665 1667
1674 1676 1681 1683 1690 1692 1697 1699 1706 1708 1713 1715 1722 1724
1729 1731 1738 1740 1745 1747 1754 1756 1761 1763 1770 1772 1777 1779
1786 1788 1793 1795 1802 1804 1809 1811 1818 1820 1825 1827 1913 1915
1922 1924 2050 2052 2054 2056 2058 2060 2062 2064 2066 2068 2070 2072
2074 2076 2078 2080 2082 2087 2089 2091 2093 2095 2097 2099 2101 2103
2105 2107 2109 2111 2113 2115 2117 2119 2310 2312 2349 2351 2378 2380
2544 2587 2614 2778 2829 2860 3002 3065 3148 3319 3378 3515 3741 3760
3790 3811 3824 3833 3842 4072 4091 4121 4142 4155 4164 4173 4396 4413
4441 4460 4473 4482 4491 4724 4741 4759 4768 4781 4790 4799 5020 5037
5065 5084 5097 5106 5115 5335 5352 5370 5379 5392 5401 5410
.LNAND 274 276 278 280 282 284 286 918 922 2714 2718 2722 2726 2730
2734 2738 2742 2746 2750 2754 2758 2762 2766 2770 2774 2789 2793 2797
2801 2807 2813 2819 2825 2840 2842 2844 2846 2848 2850 2852 2854 2856
2858
.LOENA 197 199 201 203 208 210 212 214 219 221 223 225 230 232
234 236 241 243 245 247 252 254 256 258 263 265 267 269
274 276 278 280 282 284 286 392 396 403 407 414 418 425
429 436 440 447 451 458 462 469 473 477 481 485 489 493
500 504 511 515 522 526 533 537 544 548 555 559 566 570 SEQ 1063
577 581 585 589 593 597 601 608 612 616 620 624 628 632
740 744 830 834 920 924 1019 1023 1118 1122 1217 1221 1316 1320
1417 1421 1580 1587 1596 1603 1612 1619 1628 1635 1644 1651 1660 1667
1676 1683 1692 1699 1708 1715 1724 1731 1740 1747 1756 1763 1772 1779
1788 1795 1804 1811 1820 1827 1915 1924 2087 2089 2091 2093 2095 2097
2099 2101 2103 2105 2107 2109 2111 2113 2115 2117 2119 2310 2312 2349
2351 2378 2380 2544 2587 2614 2778 2829 2860 3002 3065 3148 3319 3378
3515 3741 3760 3790 3811 3824 3833 3842 4072 4091 4121 4142 4155 4164
4173 4396 4413 4441 4460 4473 4482 4491 4724 4741 4759 4768 4781 4790
4799 5020 5037 5065 5084 5097 5106 5115 5335 5352 5370 5379 5392 5401
5410
.LOR 392 396 403 407 414 418 425 429 436 440 447 451 458 462
469 473 477 481 485 489 493 500 504 511 515 522 526 533
537 544 548 555 559 566 570 577 581 585 589 593 597 601
608 612 616 620 624 628 632 738 740 742 744 830 834 920
924 1019 1023 1118 1122 1217 1221 1316 1320 1417 1421 1578 1580 1585
1587 1594 1596 1601 1603 1610 1612 1617 1619 1626 1628 1633 1635 1642
1644 1649 1651 1658 1660 1665 1667 1674 1676 1681 1683 1690 1692 1697
1699 1706 1708 1713 1715 1722 1724 1729 1731 1738 1740 1745 1747 1754
1756 1761 1763 1770 1772 1777 1779 1786 1788 1793 1795 1802 1804 1809
1811 1818 1820 1825 1827 1913 1915 1922 1924 2050 2052 2054 2056 2058
2060 2062 2064 2066 2068 2070 2072 2074 2076 2078 2080 2082 2087 2089
2091 2093 2095 2097 2099 2101 2103 2105 2107 2109 2111 2113 2115 2117
2119 2246 2248 2250 2252 2254 2256 2258 2260 2262 2264 2266 2268 2270
2272 2274 2276 2278 2280 2282 2284 2286 2288 2290 2292 2294 2296 2298
2300 2302 2304 2306 2308 2310 2312 2321 2323 2325 2327 2329 2331 2333
2335 2337 2339 2341 2343 2345 2347 2349 2351 2360 2362 2364 2366 2368
2370 2372 2374 2376 2378 2380 2478 2482 2486 2490 2494 2498 2502 2506
2510 2514 2518 2522 2526 2530 2534 2538 2542 2544 2557 2561 2565 2569
2573 2577 2581 2585 2587 2716 2720 2724 2728 2732 2736 2740 2744 2748
2752 2756 2760 2764 2768 2772 2776 2778 2791 2795 2799 2803 2805 2809
2811 2815 2817 2821 2823 2827 2829 2964 2968 2972 2976 2978 2982 2984
2988 2990 2994 2996 3000 3002 3065 3096 3102 3124 3130 3136 3142 3148
3271 3275 3279 3283 3295 3299 3301 3305 3307 3311 3313 3317 3319 3378
3387 3389 3391 3393 3395 3397 3399 3401 3403 3405 3407 3409 3411 3413
3415 3417 3515 3731 3737 3741 3760 3769 3771 3790 3811 3824 3829 3833
3842 4072 4091 4100 4102 4121 4142 4155 4160 4164 4173 4396 4413 4422
4424 4431 4433 4437 4441 4452 4456 4460 4473 4478 4482 4491 4750 4752
4759 4768 4781 4786 4790 4799 5020 5037 5046 5048 5055 5057 5061 5065
5076 5080 5084 5097 5102 5106 5115 5361 5363 5370 5379 5392 5397 5401
5410
.LPLUS 1215 1219 3727 3729 3735 3739 3754 3756 3767 3776 3778 3780 3782 3784
3786 3788 3797 3799 3801 3803 3805 3807 3809 3820 3822 3831 3840 4058
4060 4062 4066 4068 4070 4085 4087 4098 4107 4109 4111 4113 4115 4117
4119 4128 4130 4132 4134 4136 4138 4140 4151 4153 4162 4171 4420 4469
4724 4741 4748 4777 5044 5093 5335 5352 5359 5388
.LRMIN 498 502 509 513 520 524 531 535 542 546 553 557 564 568
575 579 583 587 591 595 599 606 610 614 618 622 626 630
1314 1318 4386 4388 4390 4394 4409 4411 4429 4435 4439 4450 4454 4458
4471 4480 4489 4718 4722 4737 4739 4757 4766 4779 4788 4797
.LS0A 203 214 225 236 247 258 269 467 471 475 479 483 487 491
575 579 583 587 591 595 599 1580 1583 1587 1596 1599 1603 1612
1615 1619 1628 1631 1635 1644 1647 1651 1660 1663 1667 1676 1679 1683 SEQ 1064
1692 1695 1699 1708 1711 1715 1724 1727 1731 1740 1743 1747 1756 1759
1763 1772 1775 1779 1788 1791 1795 1804 1807 1811 1820 1823 1827 1918
1920 2087 2089 2091 2093 2095 2097 2099 2101 2103 2105 2107 2109 2111
2113 2115 2117 2246 2248 2250 2252 2254 2256 2258 2260 2310 2319 2333
2335 2337 2339 2349 2358 2378 2476 2480 2484 2488 2492 2551 2553 2571
2575 2579 2583 2587 2594 2596 2762 2766 2770 2774 2778 2785 2787 2805
2811 2817 2823 2829 2836 2838 2856 2858 2958 2960 2978 2984 2990 2996
3002 3045 3047 3049 3051 3053 3074 3076 3078 3088 3092 3096 3102 3124
3130 3136 3142 3244 3246 3285 3287 3289 3291 3293 3295 3301 3307 3313
3319 3328 3370 3374 3378 3387 3389 3391 3393 3395 3397 3399 3401 3403
3405 3407 3409 3411 3413 3415 3417 3515 3723 3725 3729 3733 3741 3746
3748 3750 3752 3760 3765 3767 3769 3771 3776 3778 3780 3795 3797 3799
3801 3816 3818 3824 3829 3833 3838 3842 4054 4056 4060 4064 4072 4077
4079 4081 4083 4091 4096 4098 4100 4102 4107 4109 4111 4126 4128 4130
4132 4147 4149 4155 4160 4164 4169 4173 4384 4386 4392 4401 4403 4405
4407 4418 4420 4422 4424 4429 4431 4433 4446 4448 4450 4452 4465 4473
4478 4482 4487 4491 4716 4718 4720 4729 4731 4733 4735 4746 4748 4750
4752 4757 4759 4764 4766 4768 4773 4781 4786 4790 4795 4799 5008 5010
5016 5025 5027 5029 5031 5042 5044 5046 5048 5053 5055 5057 5070 5072
5074 5076 5089 5097 5102 5106 5111 5115 5327 5329 5331 5340 5342 5344
5346 5357 5359 5361 5363 5368 5370 5375 5377 5379 5384 5392 5397 5401
5406 5410
.LS0B 201 212 223 234 245 256 267 606 610 614 618 622 626 630
2294 2296 2298 2300 2302 2304 2306 2308 2341 2343 2345 2347 2528 2532
2536 2540 2852 2854 3055 3057 3059 3061 3063 3098 3104 3297 3303 3309
3315 3338 3344 3358 3360 3364 3366 3739 3782 3784 3786 3803 3805 3807
4070 4113 4115 4117 4134 4136 4138 4388 4435 4454 4467 4469 4775 4777
5012 5059 5078 5091 5093 5386 5388
.LS0Q 199 210 221 232 243 254 265 390 394 401 405 412 416 423
427 434 438 445 449 456 460 498 502 509 513 520 524 531
535 542 546 553 557 564 568 740 744 830 834 920 924 1019
1023 1118 1122 1217 1221 1316 1320 1417 1421 1913 1915 1922 1924 2119
2278 2280 2282 2284 2286 2288 2290 2292 2312 2321 2323 2325 2327 2329
2331 2351 2360 2380 2512 2516 2520 2524 2544 2555 2559 2563 2567 2746
2750 2754 2758 2850 3037 3039 3041 3043 3080 3084 3148 3269 3273 3277
3281 3350 3354 3735 3788 3790 3809 3811 3820 4066 4119 4121 4140 4142
4151 4394 4439 4458 4722 5018 5063 5082 5333
.LSAB 1578 1585 1594 1601 1610 1617 1626 1633 1642 1649 1658 1665 1674 1681
1690 1697 1706 1713 1722 1729 1738 1745 1754 1761 1770 1777 1786 1793
1802 1809 1818 1825 2370 2372 2374 2376 2557 2561 2565 2569 2573 2577
2581 2585 2606 2608 2610 2612 2716 2720 2724 2728 2730 2732 2734 2736
2738 2740 2742 2744 2748 2752 2756 2760 2764 2768 2772 2776 2791 2795
2799 2803 2807 2809 2813 2815 2819 2821 2825 2827 2846 2848 2964 2968
2972 2976 2980 2982 2986 2988 2992 2994 2998 3000 3027 3029 3031 3033
3035 3082 3086 3090 3094 3100 3106 3110 3114 3118 3122 3126 3128 3132
3134 3138 3140 3144 3146 3259 3261 3263 3265 3267 3271 3275 3279 3283
3299 3305 3311 3317 3332 3336 3340 3342 3346 3348 3352 3356 3362 3368
3372 3376 3385 3451 3453 3455 3457 3459 3461 3463 3465 3467 3469 3471
3473 3475 3477 3479 3481 3727 3731 3737 3754 3758 3831 3840 4058 4062
4068 4085 4089 4162 4171 4390 4396 4409 4413 4437 4441 4456 4460 4480
4724 4737 4741 4788 5014 5020 5033 5037 5061 5065 5080 5084 5104 5335
5348 5352 5399
.LSAQ 392 396 403 407 414 418 425 429 436 440 447 451 458 462 SEQ 1065
469 473 477 481 485 489 493 500 504 511 515 522 526 533
537 544 548 555 559 566 570 577 581 585 589 593 597 601
608 612 616 620 624 628 632 2262 2264 2266 2268 2270 2272 2274
2276 2362 2364 2366 2368 2478 2482 2486 2490 2494 2496 2498 2500 2502
2504 2506 2508 2510 2514 2518 2522 2526 2530 2534 2538 2542 2598 2600
2602 2604 2614 2714 2718 2722 2726 2789 2793 2797 2801 2840 2842 2844
2860 2962 2966 2970 2974 3011 3013 3015 3017 3019 3021 3023 3025 3065
3108 3112 3116 3120 3249 3251 3253 3255 3257 3330 3334 3419 3421 3423
3425 3427 3429 3431 3433 3435 3437 3439 3441 3443 3445 3447 3449 3483
3485 3487 3489 3491 3493 3495 3497 3499 3501 3503 3505 3507 3509 3511
3513 3756 3822 4087 4153 4411 4471 4489 4739 4779 4797 5035 5095 5113
5350 5390 5408
.LSD0 197 208 219 230 241 252 263 274 276 278 280 282 284 286
738 742 828 832 918 922 1017 1021 1116 1120 1215 1219 1314 1318
1415 1419 1576 1592 1608 1624 1640 1656 1672 1688 1704 1720 1736 1752
1768 1784 1800 1816 1911 2050 2052 2054 2056 2058 2060 2062 2064 2066
2068 2070 2072 2074 2076 2078 2080 2082 2244 2317 2356 2474 2549 2592
2708 2710 2712 2783 2834 2954 2956 3007 3009 3070 3072 3242 3324 3326
3383
.LSELE 197 199 201 203 208 210 212 214 219 221 223 225 230 232
234 236 241 243 245 247 252 254 256 258 263 265 267 269
274 276 278 280 282 284 286 392 396 403 407 414 418 425
429 436 440 447 451 458 462 469 473 477 481 485 489 493
500 504 511 515 522 526 533 537 544 548 555 559 566 570
577 581 585 589 593 597 601 608 612 616 620 624 628 632
740 744 830 834 920 924 1019 1023 1118 1122 1217 1221 1316 1320
1417 1421 1580 1587 1596 1603 1612 1619 1628 1635 1644 1651 1660 1667
1676 1683 1692 1699 1708 1715 1724 1731 1740 1747 1756 1763 1772 1779
1788 1795 1804 1811 1820 1827 1915 1924 2087 2089 2091 2093 2095 2097
2099 2101 2103 2105 2107 2109 2111 2113 2115 2117 2119 2310 2312 2349
2351 2378 2380 2544 2587 2614 2778 2829 2860 3002 3065 3148 3319 3378
3515 3741 3760 3790 3811 3824 3833 3842 4072 4091 4121 4142 4155 4164
4173 4396 4413 4441 4460 4473 4482 4491 4724 4741 4759 4768 4781 4790
4799 5020 5037 5065 5084 5097 5106 5115 5335 5352 5370 5379 5392 5401
5410
.LSKCN 738 742 828 832 918 922 1017 1021 1116 1120 1215 1219 1314 1318
1415 1419 1578 1585 1594 1601 1610 1617 1626 1633 1642 1649 1658 1665
1674 1681 1690 1697 1706 1713 1722 1729 1738 1745 1754 1761 1770 1777
1786 1793 1802 1809 1818 1825 1913 1922 2050 2052 2054 2056 2058 2060
2062 2064 2066 2068 2070 2072 2074 2076 2078 2080 2082
.LSMIN 1415 1419 5010 5012 5014 5018 5033 5035 5053 5059 5063 5074 5078 5082
5095 5104 5113 5329 5333 5348 5350 5368 5377 5390 5399 5408
.LXNOR 390 394 401 405 412 416 423 427 434 438 445 449 456 460
467 471 475 479 483 487 491 1116 1120 1583 1599 1615 1631 1647
1663 1679 1695 1711 1727 1743 1759 1775 1791 1807 1823 1920 2319 2358
2551 2553 2594 2596 2785 2787 2836 2838 2958 2960 3074 3076 3078 3244
3246 3249 3251 3253 3255 3257 3259 3261 3263 3265 3267 3269 3273 3277
3281 3285 3287 3289 3291 3293 3297 3303 3309 3315 3328 3330 3334 3340
3346 3350 3354 3360 3366 3370 3374 3385 3419 3421 3423 3425 3427 3429
3431 3433 3435 3437 3439 3441 3443 3445 3447 3449 3451 3453 3455 3457
3459 3461 3463 3465 3467 3469 3471 3473 3475 3477 3479 3481 3748 3750
3752 3795 3816 3838 4079 4081 4083 4126 4147 4169 4403 4405 4407 4446
4448 4465 4487 4731 4733 4735 4764 4773 4795 5027 5029 5031 5070 5072 SEQ 1066
5089 5111 5342 5344 5346 5375 5384 5406
.LXOR 1017 1021 2962 2966 2970 2974 2980 2986 2992 2998 3011 3013 3015 3017
3019 3021 3023 3025 3027 3029 3031 3033 3035 3037 3039 3041 3043 3045
3047 3049 3051 3053 3055 3057 3059 3061 3063 3080 3084 3088 3092 3098
3104 3108 3112 3116 3120 3126 3132 3138 3144
.MA 1576 1578 1580 1583 1585 1587 1592 1594 1596 1599 1601 1603 1608 1610
1612 1615 1617 1619 1624 1626 1628 1631 1633 1635 1640 1642 1644 1647
1649 1651 1656 1658 1660 1663 1665 1667 1672 1674 1676 1679 1681 1683
1688 1690 1692 1695 1697 1699 1704 1706 1708 1711 1713 1715 1720 1722
1724 1727 1729 1731 1736 1738 1740 1743 1745 1747 1752 1754 1756 1759
1761 1763 1768 1770 1772 1775 1777 1779 1784 1786 1788 1791 1793 1795
1800 1802 1804 1807 1809 1811 1816 1818 1820 1823 1825 1827 2050 2052
2054 2056 2058 2060 2062 2064 2066 2068 2070 2072 2074 2076 2078 2080
2082 2087 2089 2091 2093 2095 2097 2099 2101 2103 2105 2107 2109 2111
2113 2115 2117 2119 2478 2482 2486 2490 2494 2498 2502 2506 2510 2514
2518 2522 2526 2530 2534 2538 2542 2551 2553 2557 2561 2565 2569 2573
2577 2581 2585 2587 2716 2720 2724 2728 2732 2736 2740 2744 2748 2752
2756 2760 2764 2768 2772 2776 2778 2791 2795 2799 2803 2809 2815 2821
2827 2829 2856 2858 2964 2968 2972 2976 2982 2988 2994 3000 3002 3082
3086 3088 3090 3092 3094 3096 3100 3102 3106 3108 3110 3112 3114 3116
3118 3120 3122 3124 3128 3130 3134 3136 3140 3142 3146 3259 3261 3263
3265 3267 3271 3275 3279 3283 3285 3287 3289 3291 3293 3295 3299 3301
3305 3307 3311 3313 3317 3332 3336 3342 3348 3352 3356 3362 3368 3372
3376 3378 3419 3421 3423 3425 3427 3429 3431 3433 3435 3437 3439 3441
3443 3445 3447 3449 3451 3453 3455 3457 3459 3461 3463 3465 3467 3469
3471 3473 3475 3477 3479 3481 3483 3485 3487 3489 3491 3493 3495 3497
3499 3501 3503 3505 3507 3509 3511 3513 3731 3737 3741 3754 3756 3758
3760 3778 3780 3782 3784 3786 3797 3799 3801 3803 3805 3807 3822 3824
3833 3842 4062 4068 4072 4085 4087 4089 4091 4109 4111 4113 4115 4117
4128 4130 4132 4134 4136 4138 4153 4155 4164 4173 4396 4409 4411 4413
4437 4441 4450 4452 4456 4460 4471 4473 4482 4491 4724 4737 4739 4741
4759 4766 4768 4779 4781 4790 4799 5020 5033 5035 5037 5061 5065 5074
5076 5080 5084 5095 5097 5106 5115 5335 5348 5350 5352 5370 5377 5379
5390 5392 5401 5410
.MAND 197 199 201 203 208 210 212 214 219 221 223 225 230 232
234 236 241 243 245 247 252 254 256 258 263 265 267 269
828 832 1576 1592 1608 1624 1640 1656 1672 1688 1704 1720 1736 1752
1768 1784 1800 1816 1911 1918 2244 2317 2356 2474 2476 2480 2484 2488
2492 2496 2500 2504 2508 2512 2516 2520 2524 2528 2532 2536 2540 2549
2555 2559 2563 2567 2571 2575 2579 2583 2592 2598 2600 2602 2604 2606
2608 2610 2612 2614 2708 2710 2712 2783 2834 2860 2954 2956 3007 3009
3070 3072 3082 3086 3090 3094 3100 3106 3110 3114 3118 3122 3128 3134
3140 3146 3242 3324 3326 3332 3336 3338 3342 3344 3348 3352 3356 3358
3362 3364 3368 3372 3376 3383 3483 3485 3487 3489 3491 3493 3495 3497
3499 3501 3503 3505 3507 3509 3511 3513 3723 3725 3733 3746 3758 3765
3818 4054 4056 4064 4077 4089 4096 4149 4384 4392 4401 4418 4467 4716
4720 4729 4746 4775 5008 5016 5025 5042 5091 5327 5331 5340 5357 5386
.MB 1576 1578 1583 1585 1592 1594 1599 1601 1608 1610 1615 1617 1624 1626
1631 1633 1640 1642 1647 1649 1656 1658 1663 1665 1672 1674 1679 1681
1688 1690 1695 1697 1704 1706 1711 1713 1720 1722 1727 1729 1736 1738
1743 1745 1752 1754 1759 1761 1768 1770 1775 1777 1784 1786 1791 1793
1800 1802 1807 1809 1816 1818 1823 1825 2050 2052 2054 2056 2058 2060
2062 2064 2066 2068 2070 2072 2074 2076 2078 2080 2082 2474 2480 2484 SEQ 1067
2488 2492 2496 2500 2504 2508 2512 2516 2520 2524 2549 2555 2557 2559
2561 2563 2565 2567 2569 2571 2573 2575 2577 2579 2581 2583 2585 2710
2714 2716 2718 2720 2722 2724 2726 2728 2730 2732 2734 2736 2738 2740
2742 2744 2746 2748 2750 2752 2754 2756 2758 2760 2762 2764 2766 2768
2770 2772 2774 2776 2789 2791 2793 2795 2797 2799 2801 2803 2805 2807
2809 2811 2813 2815 2817 2819 2821 2823 2825 2827 2838 2846 2848 2852
2854 2856 2858 2956 2962 2964 2966 2968 2970 2972 2974 2976 2978 2980
2982 2984 2986 2988 2990 2992 2994 2996 2998 3000 3037 3039 3041 3043
3072 3076 3078 3080 3082 3084 3086 3088 3090 3092 3094 3096 3098 3100
3102 3104 3106 3108 3110 3112 3114 3116 3118 3120 3122 3124 3126 3128
3130 3132 3134 3136 3138 3140 3142 3144 3146 3244 3269 3273 3277 3281
3295 3297 3301 3303 3307 3309 3313 3315 3328 3330 3332 3334 3336 3338
3340 3342 3344 3346 3348 3350 3352 3354 3356 3358 3360 3362 3364 3366
3368 3370 3372 3374 3376 3387 3389 3391 3393 3395 3397 3399 3401 3403
3405 3407 3409 3411 3413 3415 3419 3421 3425 3427 3431 3433 3437 3439
3443 3445 3451 3453 3455 3457 3459 3461 3463 3465 3467 3469 3471 3473
3475 3477 3479 3481 3725 3727 3729 3731 3735 3737 3739 3748 3750 3754
3756 3758 3776 3778 3780 3782 3784 3786 3795 3797 3799 3801 3803 3805
3807 3816 3822 3829 3831 3838 3840 4056 4058 4060 4062 4066 4068 4070
4079 4081 4085 4087 4089 4107 4109 4111 4113 4115 4117 4126 4128 4130
4132 4134 4136 4138 4147 4153 4160 4162 4169 4171 4386 4388 4390 4394
4396 4403 4405 4409 4411 4413 4429 4431 4435 4437 4439 4441 4446 4450
4452 4454 4456 4458 4460 4467 4469 4471 4478 4480 4489 4718 4722 4724
4731 4733 4737 4739 4741 4757 4764 4766 4775 4777 4779 4786 4788 4797
5010 5012 5014 5018 5020 5027 5029 5033 5035 5037 5053 5055 5059 5061
5063 5065 5070 5074 5076 5078 5080 5082 5084 5091 5093 5095 5102 5104
5113 5329 5333 5335 5342 5344 5348 5350 5352 5368 5375 5377 5386 5388
5390 5397 5399 5408
.MCONT 1578 1585 1594 1601 1610 1617 1626 1633 1642 1649 1658 1665 1674 1681
1690 1697 1706 1713 1722 1729 1738 1745 1754 1761 1770 1777 1786 1793
1802 1809 1818 1825 1913 1920 1922 2052 2054 2056 2058 2060 2062 2064
2066 2068 2070 2072 2074 2076 2078 2080 2082 2246 2248 2250 2252 2254
2256 2258 2260 2262 2264 2266 2268 2270 2272 2274 2276 2278 2280 2282
2284 2286 2288 2290 2292 2294 2296 2298 2300 2302 2304 2306 2308 2319
2321 2323 2325 2327 2329 2331 2333 2335 2337 2339 2341 2343 2345 2347
2358 2360 2362 2364 2366 2368 2370 2372 2374 2376 2476 2478 2480 2482
2484 2486 2488 2490 2492 2494 2496 2498 2500 2502 2504 2506 2508 2510
2512 2514 2516 2518 2520 2522 2524 2526 2528 2530 2532 2534 2536 2538
2540 2542 2551 2553 2555 2557 2559 2561 2563 2565 2567 2569 2571 2573
2575 2577 2579 2581 2583 2585 2594 2596 2598 2600 2602 2604 2606 2608
2610 2612 2710 2712 2714 2716 2718 2720 2722 2724 2726 2728 2730 2732
2734 2736 2738 2740 2742 2744 2746 2748 2750 2752 2754 2756 2758 2760
2762 2764 2766 2768 2770 2772 2774 2776 2785 2787 2789 2791 2793 2795
2797 2799 2801 2803 2805 2807 2809 2811 2813 2815 2817 2819 2821 2823
2825 2827 2836 2838 2840 2842 2844 2846 2848 2850 2852 2854 2856 2858
2956 2958 2960 2962 2964 2966 2968 2970 2972 2974 2976 2978 2980 2982
2984 2986 2988 2990 2992 2994 2996 2998 3000 3009 3011 3013 3015 3017
3019 3021 3023 3025 3027 3029 3031 3033 3035 3037 3039 3041 3043 3045
3047 3049 3051 3053 3055 3057 3059 3061 3063 3072 3074 3076 3078 3080
3082 3084 3086 3088 3090 3092 3094 3096 3098 3100 3102 3104 3106 3108
3110 3112 3114 3116 3118 3120 3122 3124 3126 3128 3130 3132 3134 3136
3138 3140 3142 3144 3146 3244 3246 3249 3251 3253 3255 3257 3259 3261
3263 3265 3267 3269 3271 3273 3275 3277 3279 3281 3283 3285 3287 3289 SEQ 1068
3291 3293 3295 3297 3299 3301 3303 3305 3307 3309 3311 3313 3315 3317
3326 3328 3330 3332 3334 3336 3338 3340 3342 3344 3346 3348 3350 3352
3354 3356 3358 3360 3362 3364 3366 3368 3370 3372 3374 3376 3385 3387
3389 3391 3393 3395 3397 3399 3401 3403 3405 3407 3409 3411 3413 3415
3417 3419 3421 3423 3425 3427 3429 3431 3433 3435 3437 3439 3441 3443
3445 3447 3449 3451 3453 3455 3457 3459 3461 3463 3465 3467 3469 3471
3473 3475 3477 3479 3481 3483 3485 3487 3489 3491 3493 3495 3497 3499
3501 3503 3505 3507 3509 3511 3513 3725 3727 3729 3731 3733 3735 3737
3739 3748 3750 3752 3754 3756 3758 3771 3776 3778 3780 3782 3784 3786
3788 3797 3799 3801 3803 3805 3807 3809 3818 3820 3822 3831 3840 4056
4058 4060 4062 4064 4066 4068 4070 4079 4081 4083 4085 4087 4089 4102
4107 4109 4111 4113 4115 4117 4119 4128 4130 4132 4134 4136 4138 4140
4149 4151 4153 4162 4171 4386 4388 4390 4392 4394 4403 4405 4407 4409
4411 4424 4429 4431 4433 4435 4437 4439 4448 4450 4452 4454 4456 4458
4467 4469 4471 4480 4489 4718 4720 4722 4731 4733 4735 4737 4739 4752
4757 4766 4775 4777 4779 4788 4797 5010 5012 5014 5016 5018 5027 5029
5031 5033 5035 5048 5053 5055 5057 5059 5061 5063 5072 5074 5076 5078
5080 5082 5091 5093 5095 5104 5113 5329 5331 5333 5342 5344 5346 5348
5350 5363 5368 5377 5386 5388 5390 5399 5408
.MCRY 1314 1318 2262 2264 2266 2268 2270 2272 2274 2276 2290 2302 2329 2333
2335 2339 2341 2362 2366 2372 2488 2492 2496 2500 2516 2520 2532 2540
2555 2559 2563 2567 2579 2583 2600 2602 2604 2606 2714 2718 2722 2726
2738 2746 2758 2766 2801 2807 2825 2842 2844 2846 2848 2966 2970 2974
2980 3013 3015 3017 3021 3031 3041 3049 3051 3061 3080 3084 3088 3092
3104 3116 3120 3132 3138 3249 3251 3253 3255 3257 3287 3289 3315 3334
3336 3338 3340 3342 3344 3346 3767 3820 4058 4060 4066 4070 4085 4087
4098 4107 4109 4111 4113 4115 4117 4119 4128 4130 4132 4134 4136 4138
4140 4151 4153 4162 4171 4420 4469 4718 4722 4737 4739 4748 4757 4766
4777 4779 4788 4797 5044 5093 5329 5333 5348 5350 5359 5368 5377 5388
5390 5399 5408
.MD 197 199 201 203 208 210 212 214 219 221 223 225 230 232
234 236 241 243 245 247 252 254 256 258 263 265 267 269
274 276 278 280 282 284 286 390 392 394 396 401 403 405
407 412 414 416 418 423 425 427 429 434 436 438 440 445
447 449 451 456 458 460 462 467 469 471 473 475 477 479
481 483 485 487 489 491 493 498 500 502 504 509 511 513
515 520 522 524 526 531 533 535 537 542 544 546 548 553
555 557 559 564 566 568 570 575 577 579 581 583 585 587
589 591 593 595 597 599 601 606 608 610 612 614 616 618
620 622 624 626 628 630 632 738 740 742 744 828 830 832
834 918 920 922 924 1017 1019 1021 1023 1116 1118 1120 1122 1215
1217 1219 1221 1314 1316 1318 1320 1415 1417 1419 1421 1576 1578 1580
1583 1585 1587 1592 1594 1596 1599 1601 1603 1608 1610 1612 1615 1617
1619 1624 1626 1628 1631 1633 1635 1640 1642 1644 1647 1649 1651 1656
1658 1660 1663 1665 1667 1672 1674 1676 1679 1681 1683 1688 1690 1692
1695 1697 1699 1704 1706 1708 1711 1713 1715 1720 1722 1724 1727 1729
1731 1736 1738 1740 1743 1745 1747 1752 1754 1756 1759 1761 1763 1768
1770 1772 1775 1777 1779 1784 1786 1788 1791 1793 1795 1800 1802 1804
1807 1809 1811 1816 1818 1820 1823 1825 1827 1911 1913 1915 1918 1920
1922 1924 2050 2052 2054 2056 2058 2060 2062 2064 2066 2068 2070 2072
2074 2076 2078 2080 2082 2087 2089 2091 2093 2095 2097 2099 2101 2103
2105 2107 2109 2111 2113 2115 2117 2119 2244 2246 2248 2250 2252 2254
2256 2258 2260 2262 2264 2266 2268 2270 2272 2274 2276 2278 2280 2282 SEQ 1069
2284 2286 2288 2290 2292 2294 2296 2298 2300 2302 2304 2306 2308 2310
2312 2317 2319 2321 2323 2325 2327 2329 2331 2333 2335 2337 2339 2341
2343 2345 2347 2349 2351 2356 2358 2360 2362 2364 2366 2368 2370 2372
2374 2376 2378 2380 2474 2476 2478 2480 2482 2484 2486 2488 2490 2492
2494 2496 2498 2500 2502 2504 2506 2508 2510 2512 2514 2516 2518 2520
2522 2524 2526 2528 2530 2532 2534 2536 2538 2540 2542 2544 2549 2551
2553 2555 2557 2559 2561 2563 2565 2567 2569 2571 2573 2575 2577 2579
2581 2583 2585 2587 2592 2594 2596 2598 2600 2602 2604 2606 2608 2610
2612 2614 2708 2710 2712 2714 2716 2718 2720 2722 2724 2726 2728 2730
2732 2734 2736 2738 2740 2742 2744 2746 2748 2750 2752 2754 2756 2758
2760 2762 2764 2766 2768 2770 2772 2774 2776 2778 2783 2785 2787 2789
2791 2793 2795 2797 2799 2801 2803 2805 2807 2809 2811 2813 2815 2817
2819 2821 2823 2825 2827 2829 2834 2836 2838 2840 2842 2844 2846 2848
2850 2852 2854 2856 2858 2860 2954 2956 2958 2960 2962 2964 2966 2968
2970 2972 2974 2976 2978 2980 2982 2984 2986 2988 2990 2992 2994 2996
2998 3000 3002 3007 3009 3011 3013 3015 3017 3019 3021 3023 3025 3027
3029 3031 3033 3035 3037 3039 3041 3043 3045 3047 3049 3051 3053 3055
3057 3059 3061 3063 3065 3070 3072 3074 3076 3078 3080 3082 3084 3086
3088 3090 3092 3094 3096 3098 3100 3102 3104 3106 3108 3110 3112 3114
3116 3118 3120 3122 3124 3126 3128 3130 3132 3134 3136 3138 3140 3142
3144 3146 3148 3242 3244 3246 3249 3251 3253 3255 3257 3259 3261 3263
3265 3267 3269 3271 3273 3275 3277 3279 3281 3283 3285 3287 3289 3291
3293 3295 3297 3299 3301 3303 3305 3307 3309 3311 3313 3315 3317 3319
3324 3326 3328 3330 3332 3334 3336 3338 3340 3342 3344 3346 3348 3350
3352 3354 3356 3358 3360 3362 3364 3366 3368 3370 3372 3374 3376 3378
3383 3385 3387 3389 3391 3393 3395 3397 3399 3401 3403 3405 3407 3409
3411 3413 3415 3417 3419 3421 3423 3425 3427 3429 3431 3433 3435 3437
3439 3441 3443 3445 3447 3449 3451 3453 3455 3457 3459 3461 3463 3465
3467 3469 3471 3473 3475 3477 3479 3481 3483 3485 3487 3489 3491 3493
3495 3497 3499 3501 3503 3505 3507 3509 3511 3513 3515 3723 3725 3727
3729 3731 3733 3735 3737 3739 3741 3746 3748 3750 3752 3754 3756 3758
3760 3765 3767 3769 3771 3776 3778 3780 3782 3784 3786 3788 3790 3795
3797 3799 3801 3803 3805 3807 3809 3811 3816 3818 3820 3822 3824 3829
3831 3833 3838 3840 3842 4054 4056 4058 4060 4062 4064 4066 4068 4070
4072 4077 4079 4081 4083 4085 4087 4089 4091 4096 4098 4100 4102 4107
4109 4111 4113 4115 4117 4119 4121 4126 4128 4130 4132 4134 4136 4138
4140 4142 4147 4149 4151 4153 4155 4160 4162 4164 4169 4171 4173 4384
4386 4388 4390 4392 4394 4396 4401 4403 4405 4407 4409 4411 4413 4418
4420 4422 4424 4429 4431 4433 4435 4437 4439 4441 4446 4448 4450 4452
4454 4456 4458 4460 4465 4467 4469 4471 4473 4478 4480 4482 4487 4489
4491 4716 4718 4720 4722 4724 4729 4731 4733 4735 4737 4739 4741 4746
4748 4750 4752 4757 4759 4764 4766 4768 4773 4775 4777 4779 4781 4786
4788 4790 4795 4797 4799 5008 5010 5012 5014 5016 5018 5020 5025 5027
5029 5031 5033 5035 5037 5042 5044 5046 5048 5053 5055 5057 5059 5061
5063 5065 5070 5072 5074 5076 5078 5080 5082 5084 5089 5091 5093 5095
5097 5102 5104 5106 5111 5113 5115 5327 5329 5331 5333 5335 5340 5342
5344 5346 5348 5350 5352 5357 5359 5361 5363 5368 5370 5375 5377 5379
5384 5386 5388 5390 5392 5397 5399 5401 5406 5408 5410
.MJ 197 199 201 203 208 210 212 214 219 221 223 225 230 232
234 236 241 243 245 247 252 254 256 258 263 265 267 269
274 276 278 280 282 284 286 390 392 394 396 401 403 405
407 412 414 416 418 423 425 427 429 434 436 438 440 445
447 449 451 456 458 460 462 467 469 471 473 475 477 479 SEQ 1070
481 483 485 487 489 491 493 498 500 502 504 509 511 513
515 520 522 524 526 531 533 535 537 542 544 546 548 553
555 557 559 564 566 568 570 575 577 579 581 583 585 587
589 591 593 595 597 599 601 606 608 610 612 614 616 618
620 622 624 626 628 630 632 738 740 742 744 828 830 832
834 918 920 922 924 1017 1019 1021 1023 1116 1118 1120 1122 1215
1217 1219 1221 1314 1316 1318 1320 1415 1417 1419 1421 1576 1580 1583
1587 1592 1596 1599 1603 1608 1612 1615 1619 1624 1628 1631 1635 1640
1644 1647 1651 1656 1660 1663 1667 1672 1676 1679 1683 1688 1692 1695
1699 1704 1708 1711 1715 1720 1724 1727 1731 1736 1740 1743 1747 1752
1756 1759 1763 1768 1772 1775 1779 1784 1788 1791 1795 1800 1804 1807
1811 1816 1820 1823 1827 1911 1915 1918 1924 2050 2087 2089 2091 2093
2095 2097 2099 2101 2103 2105 2107 2109 2111 2113 2115 2117 2119 2244
2310 2312 2317 2349 2351 2356 2378 2380 2474 2544 2549 2587 2592 2614
2708 2778 2783 2829 2834 2860 2954 3002 3007 3065 3070 3148 3242 3319
3324 3378 3383 3515 3723 3741 3746 3760 3765 3767 3769 3790 3795 3811
3816 3824 3829 3833 3838 3842 4054 4072 4077 4091 4096 4098 4100 4121
4126 4142 4147 4155 4160 4164 4169 4173 4384 4396 4401 4413 4418 4420
4422 4441 4446 4460 4465 4473 4478 4482 4487 4491 4716 4724 4729 4741
4746 4748 4750 4759 4764 4768 4773 4781 4786 4790 4795 4799 5008 5020
5025 5037 5042 5044 5046 5065 5070 5084 5089 5097 5102 5106 5111 5115
5327 5335 5340 5352 5357 5359 5361 5370 5375 5379 5384 5392 5397 5401
5406 5410
.MJMAP 197 199 201 203 208 210 212 214 219 221 223 225 230 232
234 236 241 243 245 247 252 254 256 258 263 265 267 269
274 276 278 280 282 284 286 390 392 394 396 401 403 405
407 412 414 416 418 423 425 427 429 434 436 438 440 445
447 449 451 456 458 460 462 467 469 471 473 475 477 479
481 483 485 487 489 491 493 498 500 502 504 509 511 513
515 520 522 524 526 531 533 535 537 542 544 546 548 553
555 557 559 564 566 568 570 575 577 579 581 583 585 587
589 591 593 595 597 599 601 606 608 610 612 614 616 618
620 622 624 626 628 630 632 738 740 742 744 828 830 832
834 918 920 922 924 1017 1019 1021 1023 1116 1118 1120 1122 1215
1217 1219 1221 1314 1316 1318 1320 1415 1417 1419 1421 1576 1580 1583
1587 1592 1596 1599 1603 1608 1612 1615 1619 1624 1628 1631 1635 1640
1644 1647 1651 1656 1660 1663 1667 1672 1676 1679 1683 1688 1692 1695
1699 1704 1708 1711 1715 1720 1724 1727 1731 1736 1740 1743 1747 1752
1756 1759 1763 1768 1772 1775 1779 1784 1788 1791 1795 1800 1804 1807
1811 1816 1820 1823 1827 1911 1915 1918 1924 2050 2087 2089 2091 2093
2095 2097 2099 2101 2103 2105 2107 2109 2111 2113 2115 2117 2119 2244
2310 2312 2317 2349 2351 2356 2378 2380 2474 2544 2549 2587 2592 2614
2708 2778 2783 2829 2834 2860 2954 3002 3007 3065 3070 3148 3242 3319
3324 3378 3383 3515 3723 3741 3746 3760 3765 3767 3769 3790 3795 3811
3816 3824 3829 3833 3838 3842 4054 4072 4077 4091 4096 4098 4100 4121
4126 4142 4147 4155 4160 4164 4169 4173 4384 4396 4401 4413 4418 4420
4422 4441 4446 4460 4465 4473 4478 4482 4487 4491 4716 4724 4729 4741
4746 4748 4750 4759 4764 4768 4773 4781 4786 4790 4795 4799 5008 5020
5025 5037 5042 5044 5046 5065 5070 5084 5089 5097 5102 5106 5111 5115
5327 5335 5340 5352 5357 5359 5361 5370 5375 5379 5384 5392 5397 5401
5406 5410
.MMGC 197 199 201 203 208 210 212 214 219 221 223 225 230 232
234 236 241 243 245 247 252 254 256 258 263 265 267 269 SEQ 1071
274 276 278 280 282 284 286 392 396 403 407 414 418 425
429 436 440 447 451 458 462 469 473 477 481 485 489 493
500 504 511 515 522 526 533 537 544 548 555 559 566 570
577 581 585 589 593 597 601 608 612 616 620 624 628 632
738 740 742 744 828 830 832 834 918 920 922 924 1017 1019
1021 1023 1116 1118 1120 1122 1215 1217 1219 1221 1314 1316 1318 1320
1415 1417 1419 1421 1578 1580 1585 1587 1594 1596 1601 1603 1610 1612
1617 1619 1626 1628 1633 1635 1642 1644 1649 1651 1658 1660 1665 1667
1674 1676 1681 1683 1690 1692 1697 1699 1706 1708 1713 1715 1722 1724
1729 1731 1738 1740 1745 1747 1754 1756 1761 1763 1770 1772 1777 1779
1786 1788 1793 1795 1802 1804 1809 1811 1818 1820 1825 1827 1913 1915
1922 1924 2050 2052 2054 2056 2058 2060 2062 2064 2066 2068 2070 2072
2074 2076 2078 2080 2082 2087 2089 2091 2093 2095 2097 2099 2101 2103
2105 2107 2109 2111 2113 2115 2117 2119 2310 2312 2349 2351 2378 2380
2544 2587 2614 2778 2829 2860 3002 3065 3148 3319 3378 3515 3741 3760
3790 3811 3824 3833 3842 4072 4091 4121 4142 4155 4164 4173 4396 4413
4441 4460 4473 4482 4491 4724 4741 4759 4768 4781 4790 4799 5020 5037
5065 5084 5097 5106 5115 5335 5352 5370 5379 5392 5401 5410
.MNAND 274 276 278 280 282 284 286 918 922 2714 2718 2722 2726 2730
2734 2738 2742 2746 2750 2754 2758 2762 2766 2770 2774 2789 2793 2797
2801 2807 2813 2819 2825 2840 2842 2844 2846 2848 2850 2852 2854 2856
2858
.MOENA 197 199 201 203 208 210 212 214 219 221 223 225 230 232
234 236 241 243 245 247 252 254 256 258 263 265 267 269
274 276 278 280 282 284 286 392 396 403 407 414 418 425
429 436 440 447 451 458 462 469 473 477 481 485 489 493
500 504 511 515 522 526 533 537 544 548 555 559 566 570
577 581 585 589 593 597 601 608 612 616 620 624 628 632
740 744 830 834 920 924 1019 1023 1118 1122 1217 1221 1316 1320
1417 1421 1580 1587 1596 1603 1612 1619 1628 1635 1644 1651 1660 1667
1676 1683 1692 1699 1708 1715 1724 1731 1740 1747 1756 1763 1772 1779
1788 1795 1804 1811 1820 1827 1915 1924 2087 2089 2091 2093 2095 2097
2099 2101 2103 2105 2107 2109 2111 2113 2115 2117 2119 2310 2312 2349
2351 2378 2380 2544 2587 2614 2778 2829 2860 3002 3065 3148 3319 3378
3515 3741 3760 3790 3811 3824 3833 3842 4072 4091 4121 4142 4155 4164
4173 4396 4413 4441 4460 4473 4482 4491 4724 4741 4759 4768 4781 4790
4799 5020 5037 5065 5084 5097 5106 5115 5335 5352 5370 5379 5392 5401
5410
.MOR 392 396 403 407 414 418 425 429 436 440 447 451 458 462
469 473 477 481 485 489 493 500 504 511 515 522 526 533
537 544 548 555 559 566 570 577 581 585 589 593 597 601
608 612 616 620 624 628 632 738 740 742 744 830 834 920
924 1019 1023 1118 1122 1217 1221 1316 1320 1417 1421 1578 1580 1585
1587 1594 1596 1601 1603 1610 1612 1617 1619 1626 1628 1633 1635 1642
1644 1649 1651 1658 1660 1665 1667 1674 1676 1681 1683 1690 1692 1697
1699 1706 1708 1713 1715 1722 1724 1729 1731 1738 1740 1745 1747 1754
1756 1761 1763 1770 1772 1777 1779 1786 1788 1793 1795 1802 1804 1809
1811 1818 1820 1825 1827 1913 1915 1922 1924 2050 2052 2054 2056 2058
2060 2062 2064 2066 2068 2070 2072 2074 2076 2078 2080 2082 2087 2089
2091 2093 2095 2097 2099 2101 2103 2105 2107 2109 2111 2113 2115 2117
2119 2246 2248 2250 2252 2254 2256 2258 2260 2262 2264 2266 2268 2270
2272 2274 2276 2278 2280 2282 2284 2286 2288 2290 2292 2294 2296 2298
2300 2302 2304 2306 2308 2310 2312 2321 2323 2325 2327 2329 2331 2333 SEQ 1072
2335 2337 2339 2341 2343 2345 2347 2349 2351 2360 2362 2364 2366 2368
2370 2372 2374 2376 2378 2380 2478 2482 2486 2490 2494 2498 2502 2506
2510 2514 2518 2522 2526 2530 2534 2538 2542 2544 2557 2561 2565 2569
2573 2577 2581 2585 2587 2716 2720 2724 2728 2732 2736 2740 2744 2748
2752 2756 2760 2764 2768 2772 2776 2778 2791 2795 2799 2803 2805 2809
2811 2815 2817 2821 2823 2827 2829 2964 2968 2972 2976 2978 2982 2984
2988 2990 2994 2996 3000 3002 3065 3096 3102 3124 3130 3136 3142 3148
3271 3275 3279 3283 3295 3299 3301 3305 3307 3311 3313 3317 3319 3378
3387 3389 3391 3393 3395 3397 3399 3401 3403 3405 3407 3409 3411 3413
3415 3417 3515 3731 3737 3741 3760 3769 3771 3790 3811 3824 3829 3833
3842 4072 4091 4100 4102 4121 4142 4155 4160 4164 4173 4396 4413 4422
4424 4431 4433 4437 4441 4452 4456 4460 4473 4478 4482 4491 4750 4752
4759 4768 4781 4786 4790 4799 5020 5037 5046 5048 5055 5057 5061 5065
5076 5080 5084 5097 5102 5106 5115 5361 5363 5370 5379 5392 5397 5401
5410
.MPLUS 1215 1219 3727 3729 3735 3739 3754 3756 3767 3776 3778 3780 3782 3784
3786 3788 3797 3799 3801 3803 3805 3807 3809 3820 3822 3831 3840 4058
4060 4062 4066 4068 4070 4085 4087 4098 4107 4109 4111 4113 4115 4117
4119 4128 4130 4132 4134 4136 4138 4140 4151 4153 4162 4171 4420 4469
4724 4741 4748 4777 5044 5093 5335 5352 5359 5388
.MRMIN 498 502 509 513 520 524 531 535 542 546 553 557 564 568
575 579 583 587 591 595 599 606 610 614 618 622 626 630
1314 1318 4386 4388 4390 4394 4409 4411 4429 4435 4439 4450 4454 4458
4471 4480 4489 4718 4722 4737 4739 4757 4766 4779 4788 4797
.MS0A 203 214 225 236 247 258 269 467 471 475 479 483 487 491
575 579 583 587 591 595 599 1580 1583 1587 1596 1599 1603 1612
1615 1619 1628 1631 1635 1644 1647 1651 1660 1663 1667 1676 1679 1683
1692 1695 1699 1708 1711 1715 1724 1727 1731 1740 1743 1747 1756 1759
1763 1772 1775 1779 1788 1791 1795 1804 1807 1811 1820 1823 1827 1918
1920 2087 2089 2091 2093 2095 2097 2099 2101 2103 2105 2107 2109 2111
2113 2115 2117 2246 2248 2250 2252 2254 2256 2258 2260 2310 2319 2333
2335 2337 2339 2349 2358 2378 2476 2480 2484 2488 2492 2551 2553 2571
2575 2579 2583 2587 2594 2596 2762 2766 2770 2774 2778 2785 2787 2805
2811 2817 2823 2829 2836 2838 2856 2858 2958 2960 2978 2984 2990 2996
3002 3045 3047 3049 3051 3053 3074 3076 3078 3088 3092 3096 3102 3124
3130 3136 3142 3244 3246 3285 3287 3289 3291 3293 3295 3301 3307 3313
3319 3328 3370 3374 3378 3387 3389 3391 3393 3395 3397 3399 3401 3403
3405 3407 3409 3411 3413 3415 3417 3515 3723 3725 3729 3733 3741 3746
3748 3750 3752 3760 3765 3767 3769 3771 3776 3778 3780 3795 3797 3799
3801 3816 3818 3824 3829 3833 3838 3842 4054 4056 4060 4064 4072 4077
4079 4081 4083 4091 4096 4098 4100 4102 4107 4109 4111 4126 4128 4130
4132 4147 4149 4155 4160 4164 4169 4173 4384 4386 4392 4401 4403 4405
4407 4418 4420 4422 4424 4429 4431 4433 4446 4448 4450 4452 4465 4473
4478 4482 4487 4491 4716 4718 4720 4729 4731 4733 4735 4746 4748 4750
4752 4757 4759 4764 4766 4768 4773 4781 4786 4790 4795 4799 5008 5010
5016 5025 5027 5029 5031 5042 5044 5046 5048 5053 5055 5057 5070 5072
5074 5076 5089 5097 5102 5106 5111 5115 5327 5329 5331 5340 5342 5344
5346 5357 5359 5361 5363 5368 5370 5375 5377 5379 5384 5392 5397 5401
5406 5410
.MS0B 201 212 223 234 245 256 267 606 610 614 618 622 626 630
2294 2296 2298 2300 2302 2304 2306 2308 2341 2343 2345 2347 2528 2532
2536 2540 2852 2854 3055 3057 3059 3061 3063 3098 3104 3297 3303 3309
3315 3338 3344 3358 3360 3364 3366 3739 3782 3784 3786 3803 3805 3807 SEQ 1073
4070 4113 4115 4117 4134 4136 4138 4388 4435 4454 4467 4469 4775 4777
5012 5059 5078 5091 5093 5386 5388
.MS0Q 199 210 221 232 243 254 265 390 394 401 405 412 416 423
427 434 438 445 449 456 460 498 502 509 513 520 524 531
535 542 546 553 557 564 568 740 744 830 834 920 924 1019
1023 1118 1122 1217 1221 1316 1320 1417 1421 1913 1915 1922 1924 2119
2278 2280 2282 2284 2286 2288 2290 2292 2312 2321 2323 2325 2327 2329
2331 2351 2360 2380 2512 2516 2520 2524 2544 2555 2559 2563 2567 2746
2750 2754 2758 2850 3037 3039 3041 3043 3080 3084 3148 3269 3273 3277
3281 3350 3354 3735 3788 3790 3809 3811 3820 4066 4119 4121 4140 4142
4151 4394 4439 4458 4722 5018 5063 5082 5333
.MSAB 1578 1585 1594 1601 1610 1617 1626 1633 1642 1649 1658 1665 1674 1681
1690 1697 1706 1713 1722 1729 1738 1745 1754 1761 1770 1777 1786 1793
1802 1809 1818 1825 2370 2372 2374 2376 2557 2561 2565 2569 2573 2577
2581 2585 2606 2608 2610 2612 2716 2720 2724 2728 2730 2732 2734 2736
2738 2740 2742 2744 2748 2752 2756 2760 2764 2768 2772 2776 2791 2795
2799 2803 2807 2809 2813 2815 2819 2821 2825 2827 2846 2848 2964 2968
2972 2976 2980 2982 2986 2988 2992 2994 2998 3000 3027 3029 3031 3033
3035 3082 3086 3090 3094 3100 3106 3110 3114 3118 3122 3126 3128 3132
3134 3138 3140 3144 3146 3259 3261 3263 3265 3267 3271 3275 3279 3283
3299 3305 3311 3317 3332 3336 3340 3342 3346 3348 3352 3356 3362 3368
3372 3376 3385 3451 3453 3455 3457 3459 3461 3463 3465 3467 3469 3471
3473 3475 3477 3479 3481 3727 3731 3737 3754 3758 3831 3840 4058 4062
4068 4085 4089 4162 4171 4390 4396 4409 4413 4437 4441 4456 4460 4480
4724 4737 4741 4788 5014 5020 5033 5037 5061 5065 5080 5084 5104 5335
5348 5352 5399
.MSAQ 392 396 403 407 414 418 425 429 436 440 447 451 458 462
469 473 477 481 485 489 493 500 504 511 515 522 526 533
537 544 548 555 559 566 570 577 581 585 589 593 597 601
608 612 616 620 624 628 632 2262 2264 2266 2268 2270 2272 2274
2276 2362 2364 2366 2368 2478 2482 2486 2490 2494 2496 2498 2500 2502
2504 2506 2508 2510 2514 2518 2522 2526 2530 2534 2538 2542 2598 2600
2602 2604 2614 2714 2718 2722 2726 2789 2793 2797 2801 2840 2842 2844
2860 2962 2966 2970 2974 3011 3013 3015 3017 3019 3021 3023 3025 3065
3108 3112 3116 3120 3249 3251 3253 3255 3257 3330 3334 3419 3421 3423
3425 3427 3429 3431 3433 3435 3437 3439 3441 3443 3445 3447 3449 3483
3485 3487 3489 3491 3493 3495 3497 3499 3501 3503 3505 3507 3509 3511
3513 3756 3822 4087 4153 4411 4471 4489 4739 4779 4797 5035 5095 5113
5350 5390 5408
.MSD0 197 208 219 230 241 252 263 274 276 278 280 282 284 286
738 742 828 832 918 922 1017 1021 1116 1120 1215 1219 1314 1318
1415 1419 1576 1592 1608 1624 1640 1656 1672 1688 1704 1720 1736 1752
1768 1784 1800 1816 1911 2050 2052 2054 2056 2058 2060 2062 2064 2066
2068 2070 2072 2074 2076 2078 2080 2082 2244 2317 2356 2474 2549 2592
2708 2710 2712 2783 2834 2954 2956 3007 3009 3070 3072 3242 3324 3326
3383
.MSELE 197 199 201 203 208 210 212 214 219 221 223 225 230 232
234 236 241 243 245 247 252 254 256 258 263 265 267 269
274 276 278 280 282 284 286 392 396 403 407 414 418 425
429 436 440 447 451 458 462 469 473 477 481 485 489 493
500 504 511 515 522 526 533 537 544 548 555 559 566 570
577 581 585 589 593 597 601 608 612 616 620 624 628 632
740 744 830 834 920 924 1019 1023 1118 1122 1217 1221 1316 1320 SEQ 1074
1417 1421 1580 1587 1596 1603 1612 1619 1628 1635 1644 1651 1660 1667
1676 1683 1692 1699 1708 1715 1724 1731 1740 1747 1756 1763 1772 1779
1788 1795 1804 1811 1820 1827 1915 1924 2087 2089 2091 2093 2095 2097
2099 2101 2103 2105 2107 2109 2111 2113 2115 2117 2119 2310 2312 2349
2351 2378 2380 2544 2587 2614 2778 2829 2860 3002 3065 3148 3319 3378
3515 3741 3760 3790 3811 3824 3833 3842 4072 4091 4121 4142 4155 4164
4173 4396 4413 4441 4460 4473 4482 4491 4724 4741 4759 4768 4781 4790
4799 5020 5037 5065 5084 5097 5106 5115 5335 5352 5370 5379 5392 5401
5410
.MSKCN 738 742 828 832 918 922 1017 1021 1116 1120 1215 1219 1314 1318
1415 1419 1578 1585 1594 1601 1610 1617 1626 1633 1642 1649 1658 1665
1674 1681 1690 1697 1706 1713 1722 1729 1738 1745 1754 1761 1770 1777
1786 1793 1802 1809 1818 1825 1913 1922 2050 2052 2054 2056 2058 2060
2062 2064 2066 2068 2070 2072 2074 2076 2078 2080 2082
.MSMIN 1415 1419 5010 5012 5014 5018 5033 5035 5053 5059 5063 5074 5078 5082
5095 5104 5113 5329 5333 5348 5350 5368 5377 5390 5399 5408
.MXNOR 390 394 401 405 412 416 423 427 434 438 445 449 456 460
467 471 475 479 483 487 491 1116 1120 1583 1599 1615 1631 1647
1663 1679 1695 1711 1727 1743 1759 1775 1791 1807 1823 1920 2319 2358
2551 2553 2594 2596 2785 2787 2836 2838 2958 2960 3074 3076 3078 3244
3246 3249 3251 3253 3255 3257 3259 3261 3263 3265 3267 3269 3273 3277
3281 3285 3287 3289 3291 3293 3297 3303 3309 3315 3328 3330 3334 3340
3346 3350 3354 3360 3366 3370 3374 3385 3419 3421 3423 3425 3427 3429
3431 3433 3435 3437 3439 3441 3443 3445 3447 3449 3451 3453 3455 3457
3459 3461 3463 3465 3467 3469 3471 3473 3475 3477 3479 3481 3748 3750
3752 3795 3816 3838 4079 4081 4083 4126 4147 4169 4403 4405 4407 4446
4448 4465 4487 4731 4733 4735 4764 4773 4795 5027 5029 5031 5070 5072
5089 5111 5342 5344 5346 5375 5384 5406
.MXOR 1017 1021 2962 2966 2970 2974 2980 2986 2992 2998 3011 3013 3015 3017
3019 3021 3023 3025 3027 3029 3031 3033 3035 3037 3039 3041 3043 3045
3047 3049 3051 3053 3055 3057 3059 3061 3063 3080 3084 3088 3092 3098
3104 3108 3112 3116 3120 3126 3132 3138 3144
.RA 1576 1578 1580 1583 1585 1587 1592 1594 1596 1599 1601 1603 1608 1610
1612 1615 1617 1619 1624 1626 1628 1631 1633 1635 1640 1642 1644 1647
1649 1651 1656 1658 1660 1663 1665 1667 1672 1674 1676 1679 1681 1683
1688 1690 1692 1695 1697 1699 1704 1706 1708 1711 1713 1715 1720 1722
1724 1727 1729 1731 1736 1738 1740 1743 1745 1747 1752 1754 1756 1759
1761 1763 1768 1770 1772 1775 1777 1779 1784 1786 1788 1791 1793 1795
1800 1802 1804 1807 1809 1811 1816 1818 1820 1823 1825 1827 2050 2052
2054 2056 2058 2060 2062 2064 2066 2068 2070 2072 2074 2076 2078 2080
2082 2087 2089 2091 2093 2095 2097 2099 2101 2103 2105 2107 2109 2111
2113 2115 2117 2119 2478 2482 2486 2490 2494 2498 2502 2506 2510 2514
2518 2522 2526 2530 2534 2538 2542 2551 2553 2557 2561 2565 2569 2573
2577 2581 2585 2587 2716 2720 2724 2728 2732 2736 2740 2744 2748 2752
2756 2760 2764 2768 2772 2776 2778 2791 2795 2799 2803 2809 2815 2821
2827 2829 2856 2858 2964 2968 2972 2976 2982 2988 2994 3000 3002 3082
3086 3088 3090 3092 3094 3096 3100 3102 3106 3108 3110 3112 3114 3116
3118 3120 3122 3124 3128 3130 3134 3136 3140 3142 3146 3259 3261 3263
3265 3267 3271 3275 3279 3283 3285 3287 3289 3291 3293 3295 3299 3301
3305 3307 3311 3313 3317 3332 3336 3342 3348 3352 3356 3362 3368 3372
3376 3378 3419 3421 3423 3425 3427 3429 3431 3433 3435 3437 3439 3441
3443 3445 3447 3449 3451 3453 3455 3457 3459 3461 3463 3465 3467 3469
3471 3473 3475 3477 3479 3481 3483 3485 3487 3489 3491 3493 3495 3497 SEQ 1075
3499 3501 3503 3505 3507 3509 3511 3513 3731 3737 3741 3754 3756 3758
3760 3778 3780 3782 3784 3786 3797 3799 3801 3803 3805 3807 3822 3824
3833 3842 4062 4068 4072 4085 4087 4089 4091 4109 4111 4113 4115 4117
4128 4130 4132 4134 4136 4138 4153 4155 4164 4173 4396 4409 4411 4413
4437 4441 4450 4452 4456 4460 4471 4473 4482 4491 4724 4737 4739 4741
4759 4766 4768 4779 4781 4790 4799 5020 5033 5035 5037 5061 5065 5074
5076 5080 5084 5095 5097 5106 5115 5335 5348 5350 5352 5370 5377 5379
5390 5392 5401 5410
.RAND 197 199 201 203 208 210 212 214 219 221 223 225 230 232
234 236 241 243 245 247 252 254 256 258 263 265 267 269
828 832 1576 1592 1608 1624 1640 1656 1672 1688 1704 1720 1736 1752
1768 1784 1800 1816 1911 1918 2244 2317 2356 2474 2476 2480 2484 2488
2492 2496 2500 2504 2508 2512 2516 2520 2524 2528 2532 2536 2540 2549
2555 2559 2563 2567 2571 2575 2579 2583 2592 2598 2600 2602 2604 2606
2608 2610 2612 2614 2708 2710 2712 2783 2834 2860 2954 2956 3007 3009
3070 3072 3082 3086 3090 3094 3100 3106 3110 3114 3118 3122 3128 3134
3140 3146 3242 3324 3326 3332 3336 3338 3342 3344 3348 3352 3356 3358
3362 3364 3368 3372 3376 3383 3483 3485 3487 3489 3491 3493 3495 3497
3499 3501 3503 3505 3507 3509 3511 3513 3723 3725 3733 3746 3758 3765
3818 4054 4056 4064 4077 4089 4096 4149 4384 4392 4401 4418 4467 4716
4720 4729 4746 4775 5008 5016 5025 5042 5091 5327 5331 5340 5357 5386
.RB 1576 1578 1583 1585 1592 1594 1599 1601 1608 1610 1615 1617 1624 1626
1631 1633 1640 1642 1647 1649 1656 1658 1663 1665 1672 1674 1679 1681
1688 1690 1695 1697 1704 1706 1711 1713 1720 1722 1727 1729 1736 1738
1743 1745 1752 1754 1759 1761 1768 1770 1775 1777 1784 1786 1791 1793
1800 1802 1807 1809 1816 1818 1823 1825 2050 2052 2054 2056 2058 2060
2062 2064 2066 2068 2070 2072 2074 2076 2078 2080 2082 2474 2480 2484
2488 2492 2496 2500 2504 2508 2512 2516 2520 2524 2549 2555 2557 2559
2561 2563 2565 2567 2569 2571 2573 2575 2577 2579 2581 2583 2585 2710
2714 2716 2718 2720 2722 2724 2726 2728 2730 2732 2734 2736 2738 2740
2742 2744 2746 2748 2750 2752 2754 2756 2758 2760 2762 2764 2766 2768
2770 2772 2774 2776 2789 2791 2793 2795 2797 2799 2801 2803 2805 2807
2809 2811 2813 2815 2817 2819 2821 2823 2825 2827 2838 2846 2848 2852
2854 2856 2858 2956 2962 2964 2966 2968 2970 2972 2974 2976 2978 2980
2982 2984 2986 2988 2990 2992 2994 2996 2998 3000 3037 3039 3041 3043
3072 3076 3078 3080 3082 3084 3086 3088 3090 3092 3094 3096 3098 3100
3102 3104 3106 3108 3110 3112 3114 3116 3118 3120 3122 3124 3126 3128
3130 3132 3134 3136 3138 3140 3142 3144 3146 3244 3269 3273 3277 3281
3295 3297 3301 3303 3307 3309 3313 3315 3328 3330 3332 3334 3336 3338
3340 3342 3344 3346 3348 3350 3352 3354 3356 3358 3360 3362 3364 3366
3368 3370 3372 3374 3376 3387 3389 3391 3393 3395 3397 3399 3401 3403
3405 3407 3409 3411 3413 3415 3419 3421 3425 3427 3431 3433 3437 3439
3443 3445 3451 3453 3455 3457 3459 3461 3463 3465 3467 3469 3471 3473
3475 3477 3479 3481 3725 3727 3729 3731 3735 3737 3739 3748 3750 3754
3756 3758 3776 3778 3780 3782 3784 3786 3795 3797 3799 3801 3803 3805
3807 3816 3822 3829 3831 3838 3840 4056 4058 4060 4062 4066 4068 4070
4079 4081 4085 4087 4089 4107 4109 4111 4113 4115 4117 4126 4128 4130
4132 4134 4136 4138 4147 4153 4160 4162 4169 4171 4386 4388 4390 4394
4396 4403 4405 4409 4411 4413 4429 4431 4435 4437 4439 4441 4446 4450
4452 4454 4456 4458 4460 4467 4469 4471 4478 4480 4489 4718 4722 4724
4731 4733 4737 4739 4741 4757 4764 4766 4775 4777 4779 4786 4788 4797
5010 5012 5014 5018 5020 5027 5029 5033 5035 5037 5053 5055 5059 5061
5063 5065 5070 5074 5076 5078 5080 5082 5084 5091 5093 5095 5102 5104 SEQ 1076
5113 5329 5333 5335 5342 5344 5348 5350 5352 5368 5375 5377 5386 5388
5390 5397 5399 5408
.RCONT 1578 1585 1594 1601 1610 1617 1626 1633 1642 1649 1658 1665 1674 1681
1690 1697 1706 1713 1722 1729 1738 1745 1754 1761 1770 1777 1786 1793
1802 1809 1818 1825 1913 1920 1922 2052 2054 2056 2058 2060 2062 2064
2066 2068 2070 2072 2074 2076 2078 2080 2082 2246 2248 2250 2252 2254
2256 2258 2260 2262 2264 2266 2268 2270 2272 2274 2276 2278 2280 2282
2284 2286 2288 2290 2292 2294 2296 2298 2300 2302 2304 2306 2308 2319
2321 2323 2325 2327 2329 2331 2333 2335 2337 2339 2341 2343 2345 2347
2358 2360 2362 2364 2366 2368 2370 2372 2374 2376 2476 2478 2480 2482
2484 2486 2488 2490 2492 2494 2496 2498 2500 2502 2504 2506 2508 2510
2512 2514 2516 2518 2520 2522 2524 2526 2528 2530 2532 2534 2536 2538
2540 2542 2551 2553 2555 2557 2559 2561 2563 2565 2567 2569 2571 2573
2575 2577 2579 2581 2583 2585 2594 2596 2598 2600 2602 2604 2606 2608
2610 2612 2710 2712 2714 2716 2718 2720 2722 2724 2726 2728 2730 2732
2734 2736 2738 2740 2742 2744 2746 2748 2750 2752 2754 2756 2758 2760
2762 2764 2766 2768 2770 2772 2774 2776 2785 2787 2789 2791 2793 2795
2797 2799 2801 2803 2805 2807 2809 2811 2813 2815 2817 2819 2821 2823
2825 2827 2836 2838 2840 2842 2844 2846 2848 2850 2852 2854 2856 2858
2956 2958 2960 2962 2964 2966 2968 2970 2972 2974 2976 2978 2980 2982
2984 2986 2988 2990 2992 2994 2996 2998 3000 3009 3011 3013 3015 3017
3019 3021 3023 3025 3027 3029 3031 3033 3035 3037 3039 3041 3043 3045
3047 3049 3051 3053 3055 3057 3059 3061 3063 3072 3074 3076 3078 3080
3082 3084 3086 3088 3090 3092 3094 3096 3098 3100 3102 3104 3106 3108
3110 3112 3114 3116 3118 3120 3122 3124 3126 3128 3130 3132 3134 3136
3138 3140 3142 3144 3146 3244 3246 3249 3251 3253 3255 3257 3259 3261
3263 3265 3267 3269 3271 3273 3275 3277 3279 3281 3283 3285 3287 3289
3291 3293 3295 3297 3299 3301 3303 3305 3307 3309 3311 3313 3315 3317
3326 3328 3330 3332 3334 3336 3338 3340 3342 3344 3346 3348 3350 3352
3354 3356 3358 3360 3362 3364 3366 3368 3370 3372 3374 3376 3385 3387
3389 3391 3393 3395 3397 3399 3401 3403 3405 3407 3409 3411 3413 3415
3417 3419 3421 3423 3425 3427 3429 3431 3433 3435 3437 3439 3441 3443
3445 3447 3449 3451 3453 3455 3457 3459 3461 3463 3465 3467 3469 3471
3473 3475 3477 3479 3481 3483 3485 3487 3489 3491 3493 3495 3497 3499
3501 3503 3505 3507 3509 3511 3513 3725 3727 3729 3731 3733 3735 3737
3739 3748 3750 3752 3754 3756 3758 3771 3776 3778 3780 3782 3784 3786
3788 3797 3799 3801 3803 3805 3807 3809 3818 3820 3822 3831 3840 4056
4058 4060 4062 4064 4066 4068 4070 4079 4081 4083 4085 4087 4089 4102
4107 4109 4111 4113 4115 4117 4119 4128 4130 4132 4134 4136 4138 4140
4149 4151 4153 4162 4171 4386 4388 4390 4392 4394 4403 4405 4407 4409
4411 4424 4429 4431 4433 4435 4437 4439 4448 4450 4452 4454 4456 4458
4467 4469 4471 4480 4489 4718 4720 4722 4731 4733 4735 4737 4739 4752
4757 4766 4775 4777 4779 4788 4797 5010 5012 5014 5016 5018 5027 5029
5031 5033 5035 5048 5053 5055 5057 5059 5061 5063 5072 5074 5076 5078
5080 5082 5091 5093 5095 5104 5113 5329 5331 5333 5342 5344 5346 5348
5350 5363 5368 5377 5386 5388 5390 5399 5408
.RCRY 1314 1318 2262 2264 2266 2268 2270 2272 2274 2276 2290 2302 2329 2333
2335 2339 2341 2362 2366 2372 2488 2492 2496 2500 2516 2520 2532 2540
2555 2559 2563 2567 2579 2583 2600 2602 2604 2606 2714 2718 2722 2726
2738 2746 2758 2766 2801 2807 2825 2842 2844 2846 2848 2966 2970 2974
2980 3013 3015 3017 3021 3031 3041 3049 3051 3061 3080 3084 3088 3092
3104 3116 3120 3132 3138 3249 3251 3253 3255 3257 3287 3289 3315 3334
3336 3338 3340 3342 3344 3346 3767 3820 4058 4060 4066 4070 4085 4087 SEQ 1077
4098 4107 4109 4111 4113 4115 4117 4119 4128 4130 4132 4134 4136 4138
4140 4151 4153 4162 4171 4420 4469 4718 4722 4737 4739 4748 4757 4766
4777 4779 4788 4797 5044 5093 5329 5333 5348 5350 5359 5368 5377 5388
5390 5399 5408
.RD 197 199 201 203 208 210 212 214 219 221 223 225 230 232
234 236 241 243 245 247 252 254 256 258 263 265 267 269
274 276 278 280 282 284 286 390 392 394 396 401 403 405
407 412 414 416 418 423 425 427 429 434 436 438 440 445
447 449 451 456 458 460 462 467 469 471 473 475 477 479
481 483 485 487 489 491 493 498 500 502 504 509 511 513
515 520 522 524 526 531 533 535 537 542 544 546 548 553
555 557 559 564 566 568 570 575 577 579 581 583 585 587
589 591 593 595 597 599 601 606 608 610 612 614 616 618
620 622 624 626 628 630 632 738 740 742 744 828 830 832
834 918 920 922 924 1017 1019 1021 1023 1116 1118 1120 1122 1215
1217 1219 1221 1314 1316 1318 1320 1415 1417 1419 1421 1576 1578 1580
1583 1585 1587 1592 1594 1596 1599 1601 1603 1608 1610 1612 1615 1617
1619 1624 1626 1628 1631 1633 1635 1640 1642 1644 1647 1649 1651 1656
1658 1660 1663 1665 1667 1672 1674 1676 1679 1681 1683 1688 1690 1692
1695 1697 1699 1704 1706 1708 1711 1713 1715 1720 1722 1724 1727 1729
1731 1736 1738 1740 1743 1745 1747 1752 1754 1756 1759 1761 1763 1768
1770 1772 1775 1777 1779 1784 1786 1788 1791 1793 1795 1800 1802 1804
1807 1809 1811 1816 1818 1820 1823 1825 1827 1911 1913 1915 1918 1920
1922 1924 2050 2052 2054 2056 2058 2060 2062 2064 2066 2068 2070 2072
2074 2076 2078 2080 2082 2087 2089 2091 2093 2095 2097 2099 2101 2103
2105 2107 2109 2111 2113 2115 2117 2119 2244 2246 2248 2250 2252 2254
2256 2258 2260 2262 2264 2266 2268 2270 2272 2274 2276 2278 2280 2282
2284 2286 2288 2290 2292 2294 2296 2298 2300 2302 2304 2306 2308 2310
2312 2317 2319 2321 2323 2325 2327 2329 2331 2333 2335 2337 2339 2341
2343 2345 2347 2349 2351 2356 2358 2360 2362 2364 2366 2368 2370 2372
2374 2376 2378 2380 2474 2476 2478 2480 2482 2484 2486 2488 2490 2492
2494 2496 2498 2500 2502 2504 2506 2508 2510 2512 2514 2516 2518 2520
2522 2524 2526 2528 2530 2532 2534 2536 2538 2540 2542 2544 2549 2551
2553 2555 2557 2559 2561 2563 2565 2567 2569 2571 2573 2575 2577 2579
2581 2583 2585 2587 2592 2594 2596 2598 2600 2602 2604 2606 2608 2610
2612 2614 2708 2710 2712 2714 2716 2718 2720 2722 2724 2726 2728 2730
2732 2734 2736 2738 2740 2742 2744 2746 2748 2750 2752 2754 2756 2758
2760 2762 2764 2766 2768 2770 2772 2774 2776 2778 2783 2785 2787 2789
2791 2793 2795 2797 2799 2801 2803 2805 2807 2809 2811 2813 2815 2817
2819 2821 2823 2825 2827 2829 2834 2836 2838 2840 2842 2844 2846 2848
2850 2852 2854 2856 2858 2860 2954 2956 2958 2960 2962 2964 2966 2968
2970 2972 2974 2976 2978 2980 2982 2984 2986 2988 2990 2992 2994 2996
2998 3000 3002 3007 3009 3011 3013 3015 3017 3019 3021 3023 3025 3027
3029 3031 3033 3035 3037 3039 3041 3043 3045 3047 3049 3051 3053 3055
3057 3059 3061 3063 3065 3070 3072 3074 3076 3078 3080 3082 3084 3086
3088 3090 3092 3094 3096 3098 3100 3102 3104 3106 3108 3110 3112 3114
3116 3118 3120 3122 3124 3126 3128 3130 3132 3134 3136 3138 3140 3142
3144 3146 3148 3242 3244 3246 3249 3251 3253 3255 3257 3259 3261 3263
3265 3267 3269 3271 3273 3275 3277 3279 3281 3283 3285 3287 3289 3291
3293 3295 3297 3299 3301 3303 3305 3307 3309 3311 3313 3315 3317 3319
3324 3326 3328 3330 3332 3334 3336 3338 3340 3342 3344 3346 3348 3350
3352 3354 3356 3358 3360 3362 3364 3366 3368 3370 3372 3374 3376 3378
3383 3385 3387 3389 3391 3393 3395 3397 3399 3401 3403 3405 3407 3409 SEQ 1078
3411 3413 3415 3417 3419 3421 3423 3425 3427 3429 3431 3433 3435 3437
3439 3441 3443 3445 3447 3449 3451 3453 3455 3457 3459 3461 3463 3465
3467 3469 3471 3473 3475 3477 3479 3481 3483 3485 3487 3489 3491 3493
3495 3497 3499 3501 3503 3505 3507 3509 3511 3513 3515 3723 3725 3727
3729 3731 3733 3735 3737 3739 3741 3746 3748 3750 3752 3754 3756 3758
3760 3765 3767 3769 3771 3776 3778 3780 3782 3784 3786 3788 3790 3795
3797 3799 3801 3803 3805 3807 3809 3811 3816 3818 3820 3822 3824 3829
3831 3833 3838 3840 3842 4054 4056 4058 4060 4062 4064 4066 4068 4070
4072 4077 4079 4081 4083 4085 4087 4089 4091 4096 4098 4100 4102 4107
4109 4111 4113 4115 4117 4119 4121 4126 4128 4130 4132 4134 4136 4138
4140 4142 4147 4149 4151 4153 4155 4160 4162 4164 4169 4171 4173 4384
4386 4388 4390 4392 4394 4396 4401 4403 4405 4407 4409 4411 4413 4418
4420 4422 4424 4429 4431 4433 4435 4437 4439 4441 4446 4448 4450 4452
4454 4456 4458 4460 4465 4467 4469 4471 4473 4478 4480 4482 4487 4489
4491 4716 4718 4720 4722 4724 4729 4731 4733 4735 4737 4739 4741 4746
4748 4750 4752 4757 4759 4764 4766 4768 4773 4775 4777 4779 4781 4786
4788 4790 4795 4797 4799 5008 5010 5012 5014 5016 5018 5020 5025 5027
5029 5031 5033 5035 5037 5042 5044 5046 5048 5053 5055 5057 5059 5061
5063 5065 5070 5072 5074 5076 5078 5080 5082 5084 5089 5091 5093 5095
5097 5102 5104 5106 5111 5113 5115 5327 5329 5331 5333 5335 5340 5342
5344 5346 5348 5350 5352 5357 5359 5361 5363 5368 5370 5375 5377 5379
5384 5386 5388 5390 5392 5397 5399 5401 5406 5408 5410
.RJ 197 199 201 203 208 210 212 214 219 221 223 225 230 232
234 236 241 243 245 247 252 254 256 258 263 265 267 269
274 276 278 280 282 284 286 390 392 394 396 401 403 405
407 412 414 416 418 423 425 427 429 434 436 438 440 445
447 449 451 456 458 460 462 467 469 471 473 475 477 479
481 483 485 487 489 491 493 498 500 502 504 509 511 513
515 520 522 524 526 531 533 535 537 542 544 546 548 553
555 557 559 564 566 568 570 575 577 579 581 583 585 587
589 591 593 595 597 599 601 606 608 610 612 614 616 618
620 622 624 626 628 630 632 738 740 742 744 828 830 832
834 918 920 922 924 1017 1019 1021 1023 1116 1118 1120 1122 1215
1217 1219 1221 1314 1316 1318 1320 1415 1417 1419 1421 1576 1580 1583
1587 1592 1596 1599 1603 1608 1612 1615 1619 1624 1628 1631 1635 1640
1644 1647 1651 1656 1660 1663 1667 1672 1676 1679 1683 1688 1692 1695
1699 1704 1708 1711 1715 1720 1724 1727 1731 1736 1740 1743 1747 1752
1756 1759 1763 1768 1772 1775 1779 1784 1788 1791 1795 1800 1804 1807
1811 1816 1820 1823 1827 1911 1915 1918 1924 2050 2087 2089 2091 2093
2095 2097 2099 2101 2103 2105 2107 2109 2111 2113 2115 2117 2119 2244
2310 2312 2317 2349 2351 2356 2378 2380 2474 2544 2549 2587 2592 2614
2708 2778 2783 2829 2834 2860 2954 3002 3007 3065 3070 3148 3242 3319
3324 3378 3383 3515 3723 3741 3746 3760 3765 3767 3769 3790 3795 3811
3816 3824 3829 3833 3838 3842 4054 4072 4077 4091 4096 4098 4100 4121
4126 4142 4147 4155 4160 4164 4169 4173 4384 4396 4401 4413 4418 4420
4422 4441 4446 4460 4465 4473 4478 4482 4487 4491 4716 4724 4729 4741
4746 4748 4750 4759 4764 4768 4773 4781 4786 4790 4795 4799 5008 5020
5025 5037 5042 5044 5046 5065 5070 5084 5089 5097 5102 5106 5111 5115
5327 5335 5340 5352 5357 5359 5361 5370 5375 5379 5384 5392 5397 5401
5406 5410
.RJMAP 197 199 201 203 208 210 212 214 219 221 223 225 230 232
234 236 241 243 245 247 252 254 256 258 263 265 267 269
274 276 278 280 282 284 286 390 392 394 396 401 403 405 SEQ 1079
407 412 414 416 418 423 425 427 429 434 436 438 440 445
447 449 451 456 458 460 462 467 469 471 473 475 477 479
481 483 485 487 489 491 493 498 500 502 504 509 511 513
515 520 522 524 526 531 533 535 537 542 544 546 548 553
555 557 559 564 566 568 570 575 577 579 581 583 585 587
589 591 593 595 597 599 601 606 608 610 612 614 616 618
620 622 624 626 628 630 632 738 740 742 744 828 830 832
834 918 920 922 924 1017 1019 1021 1023 1116 1118 1120 1122 1215
1217 1219 1221 1314 1316 1318 1320 1415 1417 1419 1421 1576 1580 1583
1587 1592 1596 1599 1603 1608 1612 1615 1619 1624 1628 1631 1635 1640
1644 1647 1651 1656 1660 1663 1667 1672 1676 1679 1683 1688 1692 1695
1699 1704 1708 1711 1715 1720 1724 1727 1731 1736 1740 1743 1747 1752
1756 1759 1763 1768 1772 1775 1779 1784 1788 1791 1795 1800 1804 1807
1811 1816 1820 1823 1827 1911 1915 1918 1924 2050 2087 2089 2091 2093
2095 2097 2099 2101 2103 2105 2107 2109 2111 2113 2115 2117 2119 2244
2310 2312 2317 2349 2351 2356 2378 2380 2474 2544 2549 2587 2592 2614
2708 2778 2783 2829 2834 2860 2954 3002 3007 3065 3070 3148 3242 3319
3324 3378 3383 3515 3723 3741 3746 3760 3765 3767 3769 3790 3795 3811
3816 3824 3829 3833 3838 3842 4054 4072 4077 4091 4096 4098 4100 4121
4126 4142 4147 4155 4160 4164 4169 4173 4384 4396 4401 4413 4418 4420
4422 4441 4446 4460 4465 4473 4478 4482 4487 4491 4716 4724 4729 4741
4746 4748 4750 4759 4764 4768 4773 4781 4786 4790 4795 4799 5008 5020
5025 5037 5042 5044 5046 5065 5070 5084 5089 5097 5102 5106 5111 5115
5327 5335 5340 5352 5357 5359 5361 5370 5375 5379 5384 5392 5397 5401
5406 5410
.RMGC 197 199 201 203 208 210 212 214 219 221 223 225 230 232
234 236 241 243 245 247 252 254 256 258 263 265 267 269
274 276 278 280 282 284 286 392 396 403 407 414 418 425
429 436 440 447 451 458 462 469 473 477 481 485 489 493
500 504 511 515 522 526 533 537 544 548 555 559 566 570
577 581 585 589 593 597 601 608 612 616 620 624 628 632
738 740 742 744 828 830 832 834 918 920 922 924 1017 1019
1021 1023 1116 1118 1120 1122 1215 1217 1219 1221 1314 1316 1318 1320
1415 1417 1419 1421 1578 1580 1585 1587 1594 1596 1601 1603 1610 1612
1617 1619 1626 1628 1633 1635 1642 1644 1649 1651 1658 1660 1665 1667
1674 1676 1681 1683 1690 1692 1697 1699 1706 1708 1713 1715 1722 1724
1729 1731 1738 1740 1745 1747 1754 1756 1761 1763 1770 1772 1777 1779
1786 1788 1793 1795 1802 1804 1809 1811 1818 1820 1825 1827 1913 1915
1922 1924 2050 2052 2054 2056 2058 2060 2062 2064 2066 2068 2070 2072
2074 2076 2078 2080 2082 2087 2089 2091 2093 2095 2097 2099 2101 2103
2105 2107 2109 2111 2113 2115 2117 2119 2310 2312 2349 2351 2378 2380
2544 2587 2614 2778 2829 2860 3002 3065 3148 3319 3378 3515 3741 3760
3790 3811 3824 3833 3842 4072 4091 4121 4142 4155 4164 4173 4396 4413
4441 4460 4473 4482 4491 4724 4741 4759 4768 4781 4790 4799 5020 5037
5065 5084 5097 5106 5115 5335 5352 5370 5379 5392 5401 5410
.RNAND 274 276 278 280 282 284 286 918 922 2714 2718 2722 2726 2730
2734 2738 2742 2746 2750 2754 2758 2762 2766 2770 2774 2789 2793 2797
2801 2807 2813 2819 2825 2840 2842 2844 2846 2848 2850 2852 2854 2856
2858
.ROENA 197 199 201 203 208 210 212 214 219 221 223 225 230 232
234 236 241 243 245 247 252 254 256 258 263 265 267 269
274 276 278 280 282 284 286 392 396 403 407 414 418 425
429 436 440 447 451 458 462 469 473 477 481 485 489 493 SEQ 1080
500 504 511 515 522 526 533 537 544 548 555 559 566 570
577 581 585 589 593 597 601 608 612 616 620 624 628 632
740 744 830 834 920 924 1019 1023 1118 1122 1217 1221 1316 1320
1417 1421 1580 1587 1596 1603 1612 1619 1628 1635 1644 1651 1660 1667
1676 1683 1692 1699 1708 1715 1724 1731 1740 1747 1756 1763 1772 1779
1788 1795 1804 1811 1820 1827 1915 1924 2087 2089 2091 2093 2095 2097
2099 2101 2103 2105 2107 2109 2111 2113 2115 2117 2119 2310 2312 2349
2351 2378 2380 2544 2587 2614 2778 2829 2860 3002 3065 3148 3319 3378
3515 3741 3760 3790 3811 3824 3833 3842 4072 4091 4121 4142 4155 4164
4173 4396 4413 4441 4460 4473 4482 4491 4724 4741 4759 4768 4781 4790
4799 5020 5037 5065 5084 5097 5106 5115 5335 5352 5370 5379 5392 5401
5410
.ROR 392 396 403 407 414 418 425 429 436 440 447 451 458 462
469 473 477 481 485 489 493 500 504 511 515 522 526 533
537 544 548 555 559 566 570 577 581 585 589 593 597 601
608 612 616 620 624 628 632 738 740 742 744 830 834 920
924 1019 1023 1118 1122 1217 1221 1316 1320 1417 1421 1578 1580 1585
1587 1594 1596 1601 1603 1610 1612 1617 1619 1626 1628 1633 1635 1642
1644 1649 1651 1658 1660 1665 1667 1674 1676 1681 1683 1690 1692 1697
1699 1706 1708 1713 1715 1722 1724 1729 1731 1738 1740 1745 1747 1754
1756 1761 1763 1770 1772 1777 1779 1786 1788 1793 1795 1802 1804 1809
1811 1818 1820 1825 1827 1913 1915 1922 1924 2050 2052 2054 2056 2058
2060 2062 2064 2066 2068 2070 2072 2074 2076 2078 2080 2082 2087 2089
2091 2093 2095 2097 2099 2101 2103 2105 2107 2109 2111 2113 2115 2117
2119 2246 2248 2250 2252 2254 2256 2258 2260 2262 2264 2266 2268 2270
2272 2274 2276 2278 2280 2282 2284 2286 2288 2290 2292 2294 2296 2298
2300 2302 2304 2306 2308 2310 2312 2321 2323 2325 2327 2329 2331 2333
2335 2337 2339 2341 2343 2345 2347 2349 2351 2360 2362 2364 2366 2368
2370 2372 2374 2376 2378 2380 2478 2482 2486 2490 2494 2498 2502 2506
2510 2514 2518 2522 2526 2530 2534 2538 2542 2544 2557 2561 2565 2569
2573 2577 2581 2585 2587 2716 2720 2724 2728 2732 2736 2740 2744 2748
2752 2756 2760 2764 2768 2772 2776 2778 2791 2795 2799 2803 2805 2809
2811 2815 2817 2821 2823 2827 2829 2964 2968 2972 2976 2978 2982 2984
2988 2990 2994 2996 3000 3002 3065 3096 3102 3124 3130 3136 3142 3148
3271 3275 3279 3283 3295 3299 3301 3305 3307 3311 3313 3317 3319 3378
3387 3389 3391 3393 3395 3397 3399 3401 3403 3405 3407 3409 3411 3413
3415 3417 3515 3731 3737 3741 3760 3769 3771 3790 3811 3824 3829 3833
3842 4072 4091 4100 4102 4121 4142 4155 4160 4164 4173 4396 4413 4422
4424 4431 4433 4437 4441 4452 4456 4460 4473 4478 4482 4491 4750 4752
4759 4768 4781 4786 4790 4799 5020 5037 5046 5048 5055 5057 5061 5065
5076 5080 5084 5097 5102 5106 5115 5361 5363 5370 5379 5392 5397 5401
5410
.RPLUS 1215 1219 3727 3729 3735 3739 3754 3756 3767 3776 3778 3780 3782 3784
3786 3788 3797 3799 3801 3803 3805 3807 3809 3820 3822 3831 3840 4058
4060 4062 4066 4068 4070 4085 4087 4098 4107 4109 4111 4113 4115 4117
4119 4128 4130 4132 4134 4136 4138 4140 4151 4153 4162 4171 4420 4469
4724 4741 4748 4777 5044 5093 5335 5352 5359 5388
.RRMIN 498 502 509 513 520 524 531 535 542 546 553 557 564 568
575 579 583 587 591 595 599 606 610 614 618 622 626 630
1314 1318 4386 4388 4390 4394 4409 4411 4429 4435 4439 4450 4454 4458
4471 4480 4489 4718 4722 4737 4739 4757 4766 4779 4788 4797
.RS0A 203 214 225 236 247 258 269 467 471 475 479 483 487 491
575 579 583 587 591 595 599 1580 1583 1587 1596 1599 1603 1612 SEQ 1081
1615 1619 1628 1631 1635 1644 1647 1651 1660 1663 1667 1676 1679 1683
1692 1695 1699 1708 1711 1715 1724 1727 1731 1740 1743 1747 1756 1759
1763 1772 1775 1779 1788 1791 1795 1804 1807 1811 1820 1823 1827 1918
1920 2087 2089 2091 2093 2095 2097 2099 2101 2103 2105 2107 2109 2111
2113 2115 2117 2246 2248 2250 2252 2254 2256 2258 2260 2310 2319 2333
2335 2337 2339 2349 2358 2378 2476 2480 2484 2488 2492 2551 2553 2571
2575 2579 2583 2587 2594 2596 2762 2766 2770 2774 2778 2785 2787 2805
2811 2817 2823 2829 2836 2838 2856 2858 2958 2960 2978 2984 2990 2996
3002 3045 3047 3049 3051 3053 3074 3076 3078 3088 3092 3096 3102 3124
3130 3136 3142 3244 3246 3285 3287 3289 3291 3293 3295 3301 3307 3313
3319 3328 3370 3374 3378 3387 3389 3391 3393 3395 3397 3399 3401 3403
3405 3407 3409 3411 3413 3415 3417 3515 3723 3725 3729 3733 3741 3746
3748 3750 3752 3760 3765 3767 3769 3771 3776 3778 3780 3795 3797 3799
3801 3816 3818 3824 3829 3833 3838 3842 4054 4056 4060 4064 4072 4077
4079 4081 4083 4091 4096 4098 4100 4102 4107 4109 4111 4126 4128 4130
4132 4147 4149 4155 4160 4164 4169 4173 4384 4386 4392 4401 4403 4405
4407 4418 4420 4422 4424 4429 4431 4433 4446 4448 4450 4452 4465 4473
4478 4482 4487 4491 4716 4718 4720 4729 4731 4733 4735 4746 4748 4750
4752 4757 4759 4764 4766 4768 4773 4781 4786 4790 4795 4799 5008 5010
5016 5025 5027 5029 5031 5042 5044 5046 5048 5053 5055 5057 5070 5072
5074 5076 5089 5097 5102 5106 5111 5115 5327 5329 5331 5340 5342 5344
5346 5357 5359 5361 5363 5368 5370 5375 5377 5379 5384 5392 5397 5401
5406 5410
.RS0B 201 212 223 234 245 256 267 606 610 614 618 622 626 630
2294 2296 2298 2300 2302 2304 2306 2308 2341 2343 2345 2347 2528 2532
2536 2540 2852 2854 3055 3057 3059 3061 3063 3098 3104 3297 3303 3309
3315 3338 3344 3358 3360 3364 3366 3739 3782 3784 3786 3803 3805 3807
4070 4113 4115 4117 4134 4136 4138 4388 4435 4454 4467 4469 4775 4777
5012 5059 5078 5091 5093 5386 5388
.RS0Q 199 210 221 232 243 254 265 390 394 401 405 412 416 423
427 434 438 445 449 456 460 498 502 509 513 520 524 531
535 542 546 553 557 564 568 740 744 830 834 920 924 1019
1023 1118 1122 1217 1221 1316 1320 1417 1421 1913 1915 1922 1924 2119
2278 2280 2282 2284 2286 2288 2290 2292 2312 2321 2323 2325 2327 2329
2331 2351 2360 2380 2512 2516 2520 2524 2544 2555 2559 2563 2567 2746
2750 2754 2758 2850 3037 3039 3041 3043 3080 3084 3148 3269 3273 3277
3281 3350 3354 3735 3788 3790 3809 3811 3820 4066 4119 4121 4140 4142
4151 4394 4439 4458 4722 5018 5063 5082 5333
.RSAB 1578 1585 1594 1601 1610 1617 1626 1633 1642 1649 1658 1665 1674 1681
1690 1697 1706 1713 1722 1729 1738 1745 1754 1761 1770 1777 1786 1793
1802 1809 1818 1825 2370 2372 2374 2376 2557 2561 2565 2569 2573 2577
2581 2585 2606 2608 2610 2612 2716 2720 2724 2728 2730 2732 2734 2736
2738 2740 2742 2744 2748 2752 2756 2760 2764 2768 2772 2776 2791 2795
2799 2803 2807 2809 2813 2815 2819 2821 2825 2827 2846 2848 2964 2968
2972 2976 2980 2982 2986 2988 2992 2994 2998 3000 3027 3029 3031 3033
3035 3082 3086 3090 3094 3100 3106 3110 3114 3118 3122 3126 3128 3132
3134 3138 3140 3144 3146 3259 3261 3263 3265 3267 3271 3275 3279 3283
3299 3305 3311 3317 3332 3336 3340 3342 3346 3348 3352 3356 3362 3368
3372 3376 3385 3451 3453 3455 3457 3459 3461 3463 3465 3467 3469 3471
3473 3475 3477 3479 3481 3727 3731 3737 3754 3758 3831 3840 4058 4062
4068 4085 4089 4162 4171 4390 4396 4409 4413 4437 4441 4456 4460 4480
4724 4737 4741 4788 5014 5020 5033 5037 5061 5065 5080 5084 5104 5335
5348 5352 5399 SEQ 1082
.RSAQ 392 396 403 407 414 418 425 429 436 440 447 451 458 462
469 473 477 481 485 489 493 500 504 511 515 522 526 533
537 544 548 555 559 566 570 577 581 585 589 593 597 601
608 612 616 620 624 628 632 2262 2264 2266 2268 2270 2272 2274
2276 2362 2364 2366 2368 2478 2482 2486 2490 2494 2496 2498 2500 2502
2504 2506 2508 2510 2514 2518 2522 2526 2530 2534 2538 2542 2598 2600
2602 2604 2614 2714 2718 2722 2726 2789 2793 2797 2801 2840 2842 2844
2860 2962 2966 2970 2974 3011 3013 3015 3017 3019 3021 3023 3025 3065
3108 3112 3116 3120 3249 3251 3253 3255 3257 3330 3334 3419 3421 3423
3425 3427 3429 3431 3433 3435 3437 3439 3441 3443 3445 3447 3449 3483
3485 3487 3489 3491 3493 3495 3497 3499 3501 3503 3505 3507 3509 3511
3513 3756 3822 4087 4153 4411 4471 4489 4739 4779 4797 5035 5095 5113
5350 5390 5408
.RSD0 197 208 219 230 241 252 263 274 276 278 280 282 284 286
738 742 828 832 918 922 1017 1021 1116 1120 1215 1219 1314 1318
1415 1419 1576 1592 1608 1624 1640 1656 1672 1688 1704 1720 1736 1752
1768 1784 1800 1816 1911 2050 2052 2054 2056 2058 2060 2062 2064 2066
2068 2070 2072 2074 2076 2078 2080 2082 2244 2317 2356 2474 2549 2592
2708 2710 2712 2783 2834 2954 2956 3007 3009 3070 3072 3242 3324 3326
3383
.RSELE 197 199 201 203 208 210 212 214 219 221 223 225 230 232
234 236 241 243 245 247 252 254 256 258 263 265 267 269
274 276 278 280 282 284 286 392 396 403 407 414 418 425
429 436 440 447 451 458 462 469 473 477 481 485 489 493
500 504 511 515 522 526 533 537 544 548 555 559 566 570
577 581 585 589 593 597 601 608 612 616 620 624 628 632
740 744 830 834 920 924 1019 1023 1118 1122 1217 1221 1316 1320
1417 1421 1580 1587 1596 1603 1612 1619 1628 1635 1644 1651 1660 1667
1676 1683 1692 1699 1708 1715 1724 1731 1740 1747 1756 1763 1772 1779
1788 1795 1804 1811 1820 1827 1915 1924 2087 2089 2091 2093 2095 2097
2099 2101 2103 2105 2107 2109 2111 2113 2115 2117 2119 2310 2312 2349
2351 2378 2380 2544 2587 2614 2778 2829 2860 3002 3065 3148 3319 3378
3515 3741 3760 3790 3811 3824 3833 3842 4072 4091 4121 4142 4155 4164
4173 4396 4413 4441 4460 4473 4482 4491 4724 4741 4759 4768 4781 4790
4799 5020 5037 5065 5084 5097 5106 5115 5335 5352 5370 5379 5392 5401
5410
.RSKCN 738 742 828 832 918 922 1017 1021 1116 1120 1215 1219 1314 1318
1415 1419 1578 1585 1594 1601 1610 1617 1626 1633 1642 1649 1658 1665
1674 1681 1690 1697 1706 1713 1722 1729 1738 1745 1754 1761 1770 1777
1786 1793 1802 1809 1818 1825 1913 1922 2050 2052 2054 2056 2058 2060
2062 2064 2066 2068 2070 2072 2074 2076 2078 2080 2082
.RSMIN 1415 1419 5010 5012 5014 5018 5033 5035 5053 5059 5063 5074 5078 5082
5095 5104 5113 5329 5333 5348 5350 5368 5377 5390 5399 5408
.RXNOR 390 394 401 405 412 416 423 427 434 438 445 449 456 460
467 471 475 479 483 487 491 1116 1120 1583 1599 1615 1631 1647
1663 1679 1695 1711 1727 1743 1759 1775 1791 1807 1823 1920 2319 2358
2551 2553 2594 2596 2785 2787 2836 2838 2958 2960 3074 3076 3078 3244
3246 3249 3251 3253 3255 3257 3259 3261 3263 3265 3267 3269 3273 3277
3281 3285 3287 3289 3291 3293 3297 3303 3309 3315 3328 3330 3334 3340
3346 3350 3354 3360 3366 3370 3374 3385 3419 3421 3423 3425 3427 3429
3431 3433 3435 3437 3439 3441 3443 3445 3447 3449 3451 3453 3455 3457
3459 3461 3463 3465 3467 3469 3471 3473 3475 3477 3479 3481 3748 3750
3752 3795 3816 3838 4079 4081 4083 4126 4147 4169 4403 4405 4407 4446 SEQ 1083
4448 4465 4487 4731 4733 4735 4764 4773 4795 5027 5029 5031 5070 5072
5089 5111 5342 5344 5346 5375 5384 5406
.RXOR 1017 1021 2962 2966 2970 2974 2980 2986 2992 2998 3011 3013 3015 3017
3019 3021 3023 3025 3027 3029 3031 3033 3035 3037 3039 3041 3043 3045
3047 3049 3051 3053 3055 3057 3059 3061 3063 3080 3084 3088 3092 3098
3104 3108 3112 3116 3120 3126 3132 3138 3144
ATABLE 116 118 120 122 124 126 128 130 132 134 136 138 140 142
144 146 148 150 152 154 156 158 160 162 164 166 168 170 SEQ 1084
172 174 176 178 180 182 184 186 359 360 361 363 364 723
725 727 815 817 819 905 907 909 1003 1005 1007 1102 1104 1106
1201 1203 1205 1300 1302 1304 1401 1403 1405 1503 1505 1507 1509 1511
1513 1515 1517 1519 1521 1523 1525 1527 1529 1531 1533 1535 1537 1539
1541 1543 1545 1547 1549 1551 1553 1555 1557 1559 1561 1563 1565 1567
1898 1900 1902 2006 2008 2010 2012 2014 2016 2018 2020 2022 2024 2026
2028 2030 2032 2034 2036 2038 2040 2223 2225 2227 2229 2231 2233 2235
2459 2461 2463 2465 2693 2695 2697 2699 2939 2941 2943 2945 3227 3229
3231 3233 3596 3597 3599 3600 3602 3603 3604 3606 3607 3922 3923 3925
3926 3928 3929 3930 3932 3933 4253 4254 4256 4257 4259 4260 4261 4263
4264 4571 4572 4574 4575 4577 4578 4579 4581 4582 4879 4880 4882 4883
4885 4886 4887 4889 4890 5195 5196 5198 5199 5201 5202 5203 5205 5206
CALC 197 199 201 203 208 210 212 214 219 221 223 225 230 232
234 236 241 243 245 247 252 254 256 258 263 265 267 269
274 276 278 280 282 284 286 390 392 394 396 401 403 405
407 412 414 416 418 423 425 427 429 434 436 438 440 445
447 449 451 456 458 460 462 467 469 471 473 475 477 479
481 483 485 487 489 491 493 498 500 502 504 509 511 513
515 520 522 524 526 531 533 535 537 542 544 546 548 553
555 557 559 564 566 568 570 575 577 579 581 583 585 587
589 591 593 595 597 599 601 606 608 610 612 614 616 618
620 622 624 626 628 630 632 738 740 742 744 828 830 832
834 918 920 922 924 1017 1019 1021 1023 1116 1118 1120 1122 1215
1217 1219 1221 1314 1316 1318 1320 1415 1417 1419 1421 1576 1578 1580
1583 1585 1587 1592 1594 1596 1599 1601 1603 1608 1610 1612 1615 1617
1619 1624 1626 1628 1631 1633 1635 1640 1642 1644 1647 1649 1651 1656
1658 1660 1663 1665 1667 1672 1674 1676 1679 1681 1683 1688 1690 1692
1695 1697 1699 1704 1706 1708 1711 1713 1715 1720 1722 1724 1727 1729
1731 1736 1738 1740 1743 1745 1747 1752 1754 1756 1759 1761 1763 1768
1770 1772 1775 1777 1779 1784 1786 1788 1791 1793 1795 1800 1802 1804
1807 1809 1811 1816 1818 1820 1823 1825 1827 1911 1913 1915 1918 1920
1922 1924 2050 2052 2054 2056 2058 2060 2062 2064 2066 2068 2070 2072
2074 2076 2078 2080 2082 2087 2089 2091 2093 2095 2097 2099 2101 2103
2105 2107 2109 2111 2113 2115 2117 2119 2244 2246 2248 2250 2252 2254
2256 2258 2260 2262 2264 2266 2268 2270 2272 2274 2276 2278 2280 2282
2284 2286 2288 2290 2292 2294 2296 2298 2300 2302 2304 2306 2308 2310
2312 2317 2319 2321 2323 2325 2327 2329 2331 2333 2335 2337 2339 2341
2343 2345 2347 2349 2351 2356 2358 2360 2362 2364 2366 2368 2370 2372
2374 2376 2378 2380 2474 2476 2478 2480 2482 2484 2486 2488 2490 2492
2494 2496 2498 2500 2502 2504 2506 2508 2510 2512 2514 2516 2518 2520
2522 2524 2526 2528 2530 2532 2534 2536 2538 2540 2542 2544 2549 2551
2553 2555 2557 2559 2561 2563 2565 2567 2569 2571 2573 2575 2577 2579
2581 2583 2585 2587 2592 2594 2596 2598 2600 2602 2604 2606 2608 2610
2612 2614 2708 2710 2712 2714 2716 2718 2720 2722 2724 2726 2728 2730
2732 2734 2736 2738 2740 2742 2744 2746 2748 2750 2752 2754 2756 2758
2760 2762 2764 2766 2768 2770 2772 2774 2776 2778 2783 2785 2787 2789
2791 2793 2795 2797 2799 2801 2803 2805 2807 2809 2811 2813 2815 2817
2819 2821 2823 2825 2827 2829 2834 2836 2838 2840 2842 2844 2846 2848
2850 2852 2854 2856 2858 2860 2954 2956 2958 2960 2962 2964 2966 2968
2970 2972 2974 2976 2978 2980 2982 2984 2986 2988 2990 2992 2994 2996
2998 3000 3002 3007 3009 3011 3013 3015 3017 3019 3021 3023 3025 3027
3029 3031 3033 3035 3037 3039 3041 3043 3045 3047 3049 3051 3053 3055
3057 3059 3061 3063 3065 3070 3072 3074 3076 3078 3080 3082 3084 3086 SEQ 1085
3088 3090 3092 3094 3096 3098 3100 3102 3104 3106 3108 3110 3112 3114
3116 3118 3120 3122 3124 3126 3128 3130 3132 3134 3136 3138 3140 3142
3144 3146 3148 3242 3244 3246 3249 3251 3253 3255 3257 3259 3261 3263
3265 3267 3269 3271 3273 3275 3277 3279 3281 3283 3285 3287 3289 3291
3293 3295 3297 3299 3301 3303 3305 3307 3309 3311 3313 3315 3317 3319
3324 3326 3328 3330 3332 3334 3336 3338 3340 3342 3344 3346 3348 3350
3352 3354 3356 3358 3360 3362 3364 3366 3368 3370 3372 3374 3376 3378
3383 3385 3387 3389 3391 3393 3395 3397 3399 3401 3403 3405 3407 3409
3411 3413 3415 3417 3419 3421 3423 3425 3427 3429 3431 3433 3435 3437
3439 3441 3443 3445 3447 3449 3451 3453 3455 3457 3459 3461 3463 3465
3467 3469 3471 3473 3475 3477 3479 3481 3483 3485 3487 3489 3491 3493
3495 3497 3499 3501 3503 3505 3507 3509 3511 3513 3515 3723 3725 3727
3729 3731 3733 3735 3737 3739 3741 3746 3748 3750 3752 3754 3756 3758
3760 3765 3767 3769 3771 3776 3778 3780 3782 3784 3786 3788 3790 3795
3797 3799 3801 3803 3805 3807 3809 3811 3816 3818 3820 3822 3824 3829
3831 3833 3838 3840 3842 4054 4056 4058 4060 4062 4064 4066 4068 4070
4072 4077 4079 4081 4083 4085 4087 4089 4091 4096 4098 4100 4102 4107
4109 4111 4113 4115 4117 4119 4121 4126 4128 4130 4132 4134 4136 4138
4140 4142 4147 4149 4151 4153 4155 4160 4162 4164 4169 4171 4173 4384
4386 4388 4390 4392 4394 4396 4401 4403 4405 4407 4409 4411 4413 4418
4420 4422 4424 4429 4431 4433 4435 4437 4439 4441 4446 4448 4450 4452
4454 4456 4458 4460 4465 4467 4469 4471 4473 4478 4480 4482 4487 4489
4491 4716 4718 4720 4722 4724 4729 4731 4733 4735 4737 4739 4741 4746
4748 4750 4752 4757 4759 4764 4766 4768 4773 4775 4777 4779 4781 4786
4788 4790 4795 4797 4799 5008 5010 5012 5014 5016 5018 5020 5025 5027
5029 5031 5033 5035 5037 5042 5044 5046 5048 5053 5055 5057 5059 5061
5063 5065 5070 5072 5074 5076 5078 5080 5082 5084 5089 5091 5093 5095
5097 5102 5104 5106 5111 5113 5115 5327 5329 5331 5333 5335 5340 5342
5344 5346 5348 5350 5352 5357 5359 5361 5363 5368 5370 5375 5377 5379
5384 5386 5388 5390 5392 5397 5399 5401 5406 5408 5410
CONCAT 197 199 201 203 208 210 212 214 219 221 223 225 230 232
234 236 241 243 245 247 252 254 256 258 263 265 267 269
274 276 278 280 282 284 286 390 392 394 396 401 403 405
407 412 414 416 418 423 425 427 429 434 436 438 440 445
447 449 451 456 458 460 462 467 469 471 473 475 477 479
481 483 485 487 489 491 493 498 500 502 504 509 511 513
515 520 522 524 526 531 533 535 537 542 544 546 548 553
555 557 559 564 566 568 570 575 577 579 581 583 585 587
589 591 593 595 597 599 601 606 608 610 612 614 616 618
620 622 624 626 628 630 632 738 740 742 744 828 830 832
834 918 920 922 924 1017 1019 1021 1023 1116 1118 1120 1122 1215
1217 1219 1221 1314 1316 1318 1320 1415 1417 1419 1421 1576 1578 1580
1583 1585 1587 1592 1594 1596 1599 1601 1603 1608 1610 1612 1615 1617
1619 1624 1626 1628 1631 1633 1635 1640 1642 1644 1647 1649 1651 1656
1658 1660 1663 1665 1667 1672 1674 1676 1679 1681 1683 1688 1690 1692
1695 1697 1699 1704 1706 1708 1711 1713 1715 1720 1722 1724 1727 1729
1731 1736 1738 1740 1743 1745 1747 1752 1754 1756 1759 1761 1763 1768
1770 1772 1775 1777 1779 1784 1786 1788 1791 1793 1795 1800 1802 1804
1807 1809 1811 1816 1818 1820 1823 1825 1827 1911 1913 1915 1918 1920
1922 1924 2050 2052 2054 2056 2058 2060 2062 2064 2066 2068 2070 2072
2074 2076 2078 2080 2082 2087 2089 2091 2093 2095 2097 2099 2101 2103
2105 2107 2109 2111 2113 2115 2117 2119 2244 2246 2248 2250 2252 2254
2256 2258 2260 2262 2264 2266 2268 2270 2272 2274 2276 2278 2280 2282 SEQ 1086
2284 2286 2288 2290 2292 2294 2296 2298 2300 2302 2304 2306 2308 2310
2312 2317 2319 2321 2323 2325 2327 2329 2331 2333 2335 2337 2339 2341
2343 2345 2347 2349 2351 2356 2358 2360 2362 2364 2366 2368 2370 2372
2374 2376 2378 2380 2474 2476 2478 2480 2482 2484 2486 2488 2490 2492
2494 2496 2498 2500 2502 2504 2506 2508 2510 2512 2514 2516 2518 2520
2522 2524 2526 2528 2530 2532 2534 2536 2538 2540 2542 2544 2549 2551
2553 2555 2557 2559 2561 2563 2565 2567 2569 2571 2573 2575 2577 2579
2581 2583 2585 2587 2592 2594 2596 2598 2600 2602 2604 2606 2608 2610
2612 2614 2708 2710 2712 2714 2716 2718 2720 2722 2724 2726 2728 2730
2732 2734 2736 2738 2740 2742 2744 2746 2748 2750 2752 2754 2756 2758
2760 2762 2764 2766 2768 2770 2772 2774 2776 2778 2783 2785 2787 2789
2791 2793 2795 2797 2799 2801 2803 2805 2807 2809 2811 2813 2815 2817
2819 2821 2823 2825 2827 2829 2834 2836 2838 2840 2842 2844 2846 2848
2850 2852 2854 2856 2858 2860 2954 2956 2958 2960 2962 2964 2966 2968
2970 2972 2974 2976 2978 2980 2982 2984 2986 2988 2990 2992 2994 2996
2998 3000 3002 3007 3009 3011 3013 3015 3017 3019 3021 3023 3025 3027
3029 3031 3033 3035 3037 3039 3041 3043 3045 3047 3049 3051 3053 3055
3057 3059 3061 3063 3065 3070 3072 3074 3076 3078 3080 3082 3084 3086
3088 3090 3092 3094 3096 3098 3100 3102 3104 3106 3108 3110 3112 3114
3116 3118 3120 3122 3124 3126 3128 3130 3132 3134 3136 3138 3140 3142
3144 3146 3148 3242 3244 3246 3249 3251 3253 3255 3257 3259 3261 3263
3265 3267 3269 3271 3273 3275 3277 3279 3281 3283 3285 3287 3289 3291
3293 3295 3297 3299 3301 3303 3305 3307 3309 3311 3313 3315 3317 3319
3324 3326 3328 3330 3332 3334 3336 3338 3340 3342 3344 3346 3348 3350
3352 3354 3356 3358 3360 3362 3364 3366 3368 3370 3372 3374 3376 3378
3383 3385 3387 3389 3391 3393 3395 3397 3399 3401 3403 3405 3407 3409
3411 3413 3415 3417 3419 3421 3423 3425 3427 3429 3431 3433 3435 3437
3439 3441 3443 3445 3447 3449 3451 3453 3455 3457 3459 3461 3463 3465
3467 3469 3471 3473 3475 3477 3479 3481 3483 3485 3487 3489 3491 3493
3495 3497 3499 3501 3503 3505 3507 3509 3511 3513 3515 3723 3725 3727
3729 3731 3733 3735 3737 3739 3741 3746 3748 3750 3752 3754 3756 3758
3760 3765 3767 3769 3771 3776 3778 3780 3782 3784 3786 3788 3790 3795
3797 3799 3801 3803 3805 3807 3809 3811 3816 3818 3820 3822 3824 3829
3831 3833 3838 3840 3842 4054 4056 4058 4060 4062 4064 4066 4068 4070
4072 4077 4079 4081 4083 4085 4087 4089 4091 4096 4098 4100 4102 4107
4109 4111 4113 4115 4117 4119 4121 4126 4128 4130 4132 4134 4136 4138
4140 4142 4147 4149 4151 4153 4155 4160 4162 4164 4169 4171 4173 4384
4386 4388 4390 4392 4394 4396 4401 4403 4405 4407 4409 4411 4413 4418
4420 4422 4424 4429 4431 4433 4435 4437 4439 4441 4446 4448 4450 4452
4454 4456 4458 4460 4465 4467 4469 4471 4473 4478 4480 4482 4487 4489
4491 4716 4718 4720 4722 4724 4729 4731 4733 4735 4737 4739 4741 4746
4748 4750 4752 4757 4759 4764 4766 4768 4773 4775 4777 4779 4781 4786
4788 4790 4795 4797 4799 5008 5010 5012 5014 5016 5018 5020 5025 5027
5029 5031 5033 5035 5037 5042 5044 5046 5048 5053 5055 5057 5059 5061
5063 5065 5070 5072 5074 5076 5078 5080 5082 5084 5089 5091 5093 5095
5097 5102 5104 5106 5111 5113 5115 5327 5329 5331 5333 5335 5340 5342
5344 5346 5348 5350 5352 5357 5359 5361 5363 5368 5370 5375 5377 5379
5384 5386 5388 5390 5392 5397 5399 5401 5406 5408 5410
FIELD 197 199 201 203 208 210 212 214 219 221 223 225 230 232
234 236 241 243 245 247 252 254 256 258 263 265 267 269
274 276 278 280 282 284 286 390 392 394 396 401 403 405
407 412 414 416 418 423 425 427 429 434 436 438 440 445
447 449 451 456 458 460 462 467 469 471 473 475 477 479 SEQ 1087
481 483 485 487 489 491 493 498 500 502 504 509 511 513
515 520 522 524 526 531 533 535 537 542 544 546 548 553
555 557 559 564 566 568 570 575 577 579 581 583 585 587
589 591 593 595 597 599 601 606 608 610 612 614 616 618
620 622 624 626 628 630 632 738 740 742 744 828 830 832
834 918 920 922 924 1017 1019 1021 1023 1116 1118 1120 1122 1215
1217 1219 1221 1314 1316 1318 1320 1415 1417 1419 1421 1576 1578 1580
1583 1585 1587 1592 1594 1596 1599 1601 1603 1608 1610 1612 1615 1617
1619 1624 1626 1628 1631 1633 1635 1640 1642 1644 1647 1649 1651 1656
1658 1660 1663 1665 1667 1672 1674 1676 1679 1681 1683 1688 1690 1692
1695 1697 1699 1704 1706 1708 1711 1713 1715 1720 1722 1724 1727 1729
1731 1736 1738 1740 1743 1745 1747 1752 1754 1756 1759 1761 1763 1768
1770 1772 1775 1777 1779 1784 1786 1788 1791 1793 1795 1800 1802 1804
1807 1809 1811 1816 1818 1820 1823 1825 1827 1911 1913 1915 1918 1920
1922 1924 2050 2052 2054 2056 2058 2060 2062 2064 2066 2068 2070 2072
2074 2076 2078 2080 2082 2087 2089 2091 2093 2095 2097 2099 2101 2103
2105 2107 2109 2111 2113 2115 2117 2119 2244 2246 2248 2250 2252 2254
2256 2258 2260 2262 2264 2266 2268 2270 2272 2274 2276 2278 2280 2282
2284 2286 2288 2290 2292 2294 2296 2298 2300 2302 2304 2306 2308 2310
2312 2317 2319 2321 2323 2325 2327 2329 2331 2333 2335 2337 2339 2341
2343 2345 2347 2349 2351 2356 2358 2360 2362 2364 2366 2368 2370 2372
2374 2376 2378 2380 2474 2476 2478 2480 2482 2484 2486 2488 2490 2492
2494 2496 2498 2500 2502 2504 2506 2508 2510 2512 2514 2516 2518 2520
2522 2524 2526 2528 2530 2532 2534 2536 2538 2540 2542 2544 2549 2551
2553 2555 2557 2559 2561 2563 2565 2567 2569 2571 2573 2575 2577 2579
2581 2583 2585 2587 2592 2594 2596 2598 2600 2602 2604 2606 2608 2610
2612 2614 2708 2710 2712 2714 2716 2718 2720 2722 2724 2726 2728 2730
2732 2734 2736 2738 2740 2742 2744 2746 2748 2750 2752 2754 2756 2758
2760 2762 2764 2766 2768 2770 2772 2774 2776 2778 2783 2785 2787 2789
2791 2793 2795 2797 2799 2801 2803 2805 2807 2809 2811 2813 2815 2817
2819 2821 2823 2825 2827 2829 2834 2836 2838 2840 2842 2844 2846 2848
2850 2852 2854 2856 2858 2860 2954 2956 2958 2960 2962 2964 2966 2968
2970 2972 2974 2976 2978 2980 2982 2984 2986 2988 2990 2992 2994 2996
2998 3000 3002 3007 3009 3011 3013 3015 3017 3019 3021 3023 3025 3027
3029 3031 3033 3035 3037 3039 3041 3043 3045 3047 3049 3051 3053 3055
3057 3059 3061 3063 3065 3070 3072 3074 3076 3078 3080 3082 3084 3086
3088 3090 3092 3094 3096 3098 3100 3102 3104 3106 3108 3110 3112 3114
3116 3118 3120 3122 3124 3126 3128 3130 3132 3134 3136 3138 3140 3142
3144 3146 3148 3242 3244 3246 3249 3251 3253 3255 3257 3259 3261 3263
3265 3267 3269 3271 3273 3275 3277 3279 3281 3283 3285 3287 3289 3291
3293 3295 3297 3299 3301 3303 3305 3307 3309 3311 3313 3315 3317 3319
3324 3326 3328 3330 3332 3334 3336 3338 3340 3342 3344 3346 3348 3350
3352 3354 3356 3358 3360 3362 3364 3366 3368 3370 3372 3374 3376 3378
3383 3385 3387 3389 3391 3393 3395 3397 3399 3401 3403 3405 3407 3409
3411 3413 3415 3417 3419 3421 3423 3425 3427 3429 3431 3433 3435 3437
3439 3441 3443 3445 3447 3449 3451 3453 3455 3457 3459 3461 3463 3465
3467 3469 3471 3473 3475 3477 3479 3481 3483 3485 3487 3489 3491 3493
3495 3497 3499 3501 3503 3505 3507 3509 3511 3513 3515 3723 3725 3727
3729 3731 3733 3735 3737 3739 3741 3746 3748 3750 3752 3754 3756 3758
3760 3765 3767 3769 3771 3776 3778 3780 3782 3784 3786 3788 3790 3795
3797 3799 3801 3803 3805 3807 3809 3811 3816 3818 3820 3822 3824 3829
3831 3833 3838 3840 3842 4054 4056 4058 4060 4062 4064 4066 4068 4070
4072 4077 4079 4081 4083 4085 4087 4089 4091 4096 4098 4100 4102 4107 SEQ 1088
4109 4111 4113 4115 4117 4119 4121 4126 4128 4130 4132 4134 4136 4138
4140 4142 4147 4149 4151 4153 4155 4160 4162 4164 4169 4171 4173 4384
4386 4388 4390 4392 4394 4396 4401 4403 4405 4407 4409 4411 4413 4418
4420 4422 4424 4429 4431 4433 4435 4437 4439 4441 4446 4448 4450 4452
4454 4456 4458 4460 4465 4467 4469 4471 4473 4478 4480 4482 4487 4489
4491 4716 4718 4720 4722 4724 4729 4731 4733 4735 4737 4739 4741 4746
4748 4750 4752 4757 4759 4764 4766 4768 4773 4775 4777 4779 4781 4786
4788 4790 4795 4797 4799 5008 5010 5012 5014 5016 5018 5020 5025 5027
5029 5031 5033 5035 5037 5042 5044 5046 5048 5053 5055 5057 5059 5061
5063 5065 5070 5072 5074 5076 5078 5080 5082 5084 5089 5091 5093 5095
5097 5102 5104 5106 5111 5113 5115 5327 5329 5331 5333 5335 5340 5342
5344 5346 5348 5350 5352 5357 5359 5361 5363 5368 5370 5375 5377 5379
5384 5386 5388 5390 5392 5397 5399 5401 5406 5408 5410
GET 5464 5466
GO 84 86 92 98 327 329 335 341 685 687 693 699 783 785
791 797 873 875 881 887 965 967 973 979 1064 1066 1072 1078
1163 1165 1171 1177 1262 1264 1270 1276 1363 1365 1371 1377 1471 1473
1479 1485 1866 1868 1874 1880 1968 1970 1976 1982 2191 2193 2199 2205
2427 2429 2435 2441 2661 2663 2669 2675 2907 2909 2915 2921 3195 3197
3203 3209 3564 3566 3572 3578 3683 3686 3690 3701 3706 3890 3892 3898
3904 4011 4018 4022 4024 4029 4031 4037 4221 4223 4229 4235 4340 4344
4350 4361 4366 4539 4541 4547 4553 4660 4670 4679 4689 4694 4847 4849
4855 4861 4966 4969 4971 4975 4977 4983 4985 4990 4995 5163 5165 5171
5177 5282 5286 5290 5292 5294 5300 5302 5304 5309 5314 5316
MFLD 197# 197 199# 199 201# 201 203# 203 208# 208 210# 210 212# 212
214# 214 219# 219 221# 221 223# 223 225# 225 230# 230 232# 232
234# 234 236# 236 241# 241 243# 243 245# 245 247# 247 252# 252
254# 254 256# 256 258# 258 263# 263 265# 265 267# 267 269# 269
274# 274 276# 276 278# 278 280# 280 282# 282 284# 284 286# 286
390# 390 392# 392 394# 394 396# 396 401# 401 403# 403 405# 405
407# 407 412# 412 414# 414 416# 416 418# 418 423# 423 425# 425
427# 427 429# 429 434# 434 436# 436 438# 438 440# 440 445# 445
447# 447 449# 449 451# 451 456# 456 458# 458 460# 460 462# 462
467# 467 469# 469 471# 471 473# 473 475# 475 477# 477 479# 479
481# 481 483# 483 485# 485 487# 487 489# 489 491# 491 493# 493
498# 498 500# 500 502# 502 504# 504 509# 509 511# 511 513# 513
515# 515 520# 520 522# 522 524# 524 526# 526 531# 531 533# 533
535# 535 537# 537 542# 542 544# 544 546# 546 548# 548 553# 553
555# 555 557# 557 559# 559 564# 564 566# 566 568# 568 570# 570
575# 575 577# 577 579# 579 581# 581 583# 583 585# 585 587# 587
589# 589 591# 591 593# 593 595# 595 597# 597 599# 599 601# 601
606# 606 608# 608 610# 610 612# 612 614# 614 616# 616 618# 618
620# 620 622# 622 624# 624 626# 626 628# 628 630# 630 632# 632
738# 738 740# 740 742# 742 744# 744 828# 828 830# 830 832# 832
834# 834 918# 918 920# 920 922# 922 924# 924 1017# 1017 1019# 1019
1021# 1021 1023# 1023 1116# 1116 1118# 1118 1120# 1120 1122# 1122 1215# 1215
1217# 1217 1219# 1219 1221# 1221 1314# 1314 1316# 1316 1318# 1318 1320# 1320
1415# 1415 1417# 1417 1419# 1419 1421# 1421 1576# 1576 1578# 1578 1580# 1580
1583# 1583 1585# 1585 1587# 1587 1592# 1592 1594# 1594 1596# 1596 1599# 1599
1601# 1601 1603# 1603 1608# 1608 1610# 1610 1612# 1612 1615# 1615 1617# 1617
1619# 1619 1624# 1624 1626# 1626 1628# 1628 1631# 1631 1633# 1633 1635# 1635
1640# 1640 1642# 1642 1644# 1644 1647# 1647 1649# 1649 1651# 1651 1656# 1656
1658# 1658 1660# 1660 1663# 1663 1665# 1665 1667# 1667 1672# 1672 1674# 1674 SEQ 1089
1676# 1676 1679# 1679 1681# 1681 1683# 1683 1688# 1688 1690# 1690 1692# 1692
1695# 1695 1697# 1697 1699# 1699 1704# 1704 1706# 1706 1708# 1708 1711# 1711
1713# 1713 1715# 1715 1720# 1720 1722# 1722 1724# 1724 1727# 1727 1729# 1729
1731# 1731 1736# 1736 1738# 1738 1740# 1740 1743# 1743 1745# 1745 1747# 1747
1752# 1752 1754# 1754 1756# 1756 1759# 1759 1761# 1761 1763# 1763 1768# 1768
1770# 1770 1772# 1772 1775# 1775 1777# 1777 1779# 1779 1784# 1784 1786# 1786
1788# 1788 1791# 1791 1793# 1793 1795# 1795 1800# 1800 1802# 1802 1804# 1804
1807# 1807 1809# 1809 1811# 1811 1816# 1816 1818# 1818 1820# 1820 1823# 1823
1825# 1825 1827# 1827 1911# 1911 1913# 1913 1915# 1915 1918# 1918 1920# 1920
1922# 1922 1924# 1924 2050# 2050 2052# 2052 2054# 2054 2056# 2056 2058# 2058
2060# 2060 2062# 2062 2064# 2064 2066# 2066 2068# 2068 2070# 2070 2072# 2072
2074# 2074 2076# 2076 2078# 2078 2080# 2080 2082# 2082 2087# 2087 2089# 2089
2091# 2091 2093# 2093 2095# 2095 2097# 2097 2099# 2099 2101# 2101 2103# 2103
2105# 2105 2107# 2107 2109# 2109 2111# 2111 2113# 2113 2115# 2115 2117# 2117
2119# 2119 2244# 2244 2246# 2246 2248# 2248 2250# 2250 2252# 2252 2254# 2254
2256# 2256 2258# 2258 2260# 2260 2262# 2262 2264# 2264 2266# 2266 2268# 2268
2270# 2270 2272# 2272 2274# 2274 2276# 2276 2278# 2278 2280# 2280 2282# 2282
2284# 2284 2286# 2286 2288# 2288 2290# 2290 2292# 2292 2294# 2294 2296# 2296
2298# 2298 2300# 2300 2302# 2302 2304# 2304 2306# 2306 2308# 2308 2310# 2310
2312# 2312 2317# 2317 2319# 2319 2321# 2321 2323# 2323 2325# 2325 2327# 2327
2329# 2329 2331# 2331 2333# 2333 2335# 2335 2337# 2337 2339# 2339 2341# 2341
2343# 2343 2345# 2345 2347# 2347 2349# 2349 2351# 2351 2356# 2356 2358# 2358
2360# 2360 2362# 2362 2364# 2364 2366# 2366 2368# 2368 2370# 2370 2372# 2372
2374# 2374 2376# 2376 2378# 2378 2380# 2380 2474# 2474 2476# 2476 2478# 2478
2480# 2480 2482# 2482 2484# 2484 2486# 2486 2488# 2488 2490# 2490 2492# 2492
2494# 2494 2496# 2496 2498# 2498 2500# 2500 2502# 2502 2504# 2504 2506# 2506
2508# 2508 2510# 2510 2512# 2512 2514# 2514 2516# 2516 2518# 2518 2520# 2520
2522# 2522 2524# 2524 2526# 2526 2528# 2528 2530# 2530 2532# 2532 2534# 2534
2536# 2536 2538# 2538 2540# 2540 2542# 2542 2544# 2544 2549# 2549 2551# 2551
2553# 2553 2555# 2555 2557# 2557 2559# 2559 2561# 2561 2563# 2563 2565# 2565
2567# 2567 2569# 2569 2571# 2571 2573# 2573 2575# 2575 2577# 2577 2579# 2579
2581# 2581 2583# 2583 2585# 2585 2587# 2587 2592# 2592 2594# 2594 2596# 2596
2598# 2598 2600# 2600 2602# 2602 2604# 2604 2606# 2606 2608# 2608 2610# 2610
2612# 2612 2614# 2614 2708# 2708 2710# 2710 2712# 2712 2714# 2714 2716# 2716
2718# 2718 2720# 2720 2722# 2722 2724# 2724 2726# 2726 2728# 2728 2730# 2730
2732# 2732 2734# 2734 2736# 2736 2738# 2738 2740# 2740 2742# 2742 2744# 2744
2746# 2746 2748# 2748 2750# 2750 2752# 2752 2754# 2754 2756# 2756 2758# 2758
2760# 2760 2762# 2762 2764# 2764 2766# 2766 2768# 2768 2770# 2770 2772# 2772
2774# 2774 2776# 2776 2778# 2778 2783# 2783 2785# 2785 2787# 2787 2789# 2789
2791# 2791 2793# 2793 2795# 2795 2797# 2797 2799# 2799 2801# 2801 2803# 2803
2805# 2805 2807# 2807 2809# 2809 2811# 2811 2813# 2813 2815# 2815 2817# 2817
2819# 2819 2821# 2821 2823# 2823 2825# 2825 2827# 2827 2829# 2829 2834# 2834
2836# 2836 2838# 2838 2840# 2840 2842# 2842 2844# 2844 2846# 2846 2848# 2848
2850# 2850 2852# 2852 2854# 2854 2856# 2856 2858# 2858 2860# 2860 2954# 2954
2956# 2956 2958# 2958 2960# 2960 2962# 2962 2964# 2964 2966# 2966 2968# 2968
2970# 2970 2972# 2972 2974# 2974 2976# 2976 2978# 2978 2980# 2980 2982# 2982
2984# 2984 2986# 2986 2988# 2988 2990# 2990 2992# 2992 2994# 2994 2996# 2996
2998# 2998 3000# 3000 3002# 3002 3007# 3007 3009# 3009 3011# 3011 3013# 3013
3015# 3015 3017# 3017 3019# 3019 3021# 3021 3023# 3023 3025# 3025 3027# 3027
3029# 3029 3031# 3031 3033# 3033 3035# 3035 3037# 3037 3039# 3039 3041# 3041
3043# 3043 3045# 3045 3047# 3047 3049# 3049 3051# 3051 3053# 3053 3055# 3055
3057# 3057 3059# 3059 3061# 3061 3063# 3063 3065# 3065 3070# 3070 3072# 3072
3074# 3074 3076# 3076 3078# 3078 3080# 3080 3082# 3082 3084# 3084 3086# 3086 SEQ 1090
3088# 3088 3090# 3090 3092# 3092 3094# 3094 3096# 3096 3098# 3098 3100# 3100
3102# 3102 3104# 3104 3106# 3106 3108# 3108 3110# 3110 3112# 3112 3114# 3114
3116# 3116 3118# 3118 3120# 3120 3122# 3122 3124# 3124 3126# 3126 3128# 3128
3130# 3130 3132# 3132 3134# 3134 3136# 3136 3138# 3138 3140# 3140 3142# 3142
3144# 3144 3146# 3146 3148# 3148 3242# 3242 3244# 3244 3246# 3246 3249# 3249
3251# 3251 3253# 3253 3255# 3255 3257# 3257 3259# 3259 3261# 3261 3263# 3263
3265# 3265 3267# 3267 3269# 3269 3271# 3271 3273# 3273 3275# 3275 3277# 3277
3279# 3279 3281# 3281 3283# 3283 3285# 3285 3287# 3287 3289# 3289 3291# 3291
3293# 3293 3295# 3295 3297# 3297 3299# 3299 3301# 3301 3303# 3303 3305# 3305
3307# 3307 3309# 3309 3311# 3311 3313# 3313 3315# 3315 3317# 3317 3319# 3319
3324# 3324 3326# 3326 3328# 3328 3330# 3330 3332# 3332 3334# 3334 3336# 3336
3338# 3338 3340# 3340 3342# 3342 3344# 3344 3346# 3346 3348# 3348 3350# 3350
3352# 3352 3354# 3354 3356# 3356 3358# 3358 3360# 3360 3362# 3362 3364# 3364
3366# 3366 3368# 3368 3370# 3370 3372# 3372 3374# 3374 3376# 3376 3378# 3378
3383# 3383 3385# 3385 3387# 3387 3389# 3389 3391# 3391 3393# 3393 3395# 3395
3397# 3397 3399# 3399 3401# 3401 3403# 3403 3405# 3405 3407# 3407 3409# 3409
3411# 3411 3413# 3413 3415# 3415 3417# 3417 3419# 3419 3421# 3421 3423# 3423
3425# 3425 3427# 3427 3429# 3429 3431# 3431 3433# 3433 3435# 3435 3437# 3437
3439# 3439 3441# 3441 3443# 3443 3445# 3445 3447# 3447 3449# 3449 3451# 3451
3453# 3453 3455# 3455 3457# 3457 3459# 3459 3461# 3461 3463# 3463 3465# 3465
3467# 3467 3469# 3469 3471# 3471 3473# 3473 3475# 3475 3477# 3477 3479# 3479
3481# 3481 3483# 3483 3485# 3485 3487# 3487 3489# 3489 3491# 3491 3493# 3493
3495# 3495 3497# 3497 3499# 3499 3501# 3501 3503# 3503 3505# 3505 3507# 3507
3509# 3509 3511# 3511 3513# 3513 3515# 3515 3723# 3723 3725# 3725 3727# 3727
3729# 3729 3731# 3731 3733# 3733 3735# 3735 3737# 3737 3739# 3739 3741# 3741
3746# 3746 3748# 3748 3750# 3750 3752# 3752 3754# 3754 3756# 3756 3758# 3758
3760# 3760 3765# 3765 3767# 3767 3769# 3769 3771# 3771 3776# 3776 3778# 3778
3780# 3780 3782# 3782 3784# 3784 3786# 3786 3788# 3788 3790# 3790 3795# 3795
3797# 3797 3799# 3799 3801# 3801 3803# 3803 3805# 3805 3807# 3807 3809# 3809
3811# 3811 3816# 3816 3818# 3818 3820# 3820 3822# 3822 3824# 3824 3829# 3829
3831# 3831 3833# 3833 3838# 3838 3840# 3840 3842# 3842 4054# 4054 4056# 4056
4058# 4058 4060# 4060 4062# 4062 4064# 4064 4066# 4066 4068# 4068 4070# 4070
4072# 4072 4077# 4077 4079# 4079 4081# 4081 4083# 4083 4085# 4085 4087# 4087
4089# 4089 4091# 4091 4096# 4096 4098# 4098 4100# 4100 4102# 4102 4107# 4107
4109# 4109 4111# 4111 4113# 4113 4115# 4115 4117# 4117 4119# 4119 4121# 4121
4126# 4126 4128# 4128 4130# 4130 4132# 4132 4134# 4134 4136# 4136 4138# 4138
4140# 4140 4142# 4142 4147# 4147 4149# 4149 4151# 4151 4153# 4153 4155# 4155
4160# 4160 4162# 4162 4164# 4164 4169# 4169 4171# 4171 4173# 4173 4384# 4384
4386# 4386 4388# 4388 4390# 4390 4392# 4392 4394# 4394 4396# 4396 4401# 4401
4403# 4403 4405# 4405 4407# 4407 4409# 4409 4411# 4411 4413# 4413 4418# 4418
4420# 4420 4422# 4422 4424# 4424 4429# 4429 4431# 4431 4433# 4433 4435# 4435
4437# 4437 4439# 4439 4441# 4441 4446# 4446 4448# 4448 4450# 4450 4452# 4452
4454# 4454 4456# 4456 4458# 4458 4460# 4460 4465# 4465 4467# 4467 4469# 4469
4471# 4471 4473# 4473 4478# 4478 4480# 4480 4482# 4482 4487# 4487 4489# 4489
4491# 4491 4716# 4716 4718# 4718 4720# 4720 4722# 4722 4724# 4724 4729# 4729
4731# 4731 4733# 4733 4735# 4735 4737# 4737 4739# 4739 4741# 4741 4746# 4746
4748# 4748 4750# 4750 4752# 4752 4757# 4757 4759# 4759 4764# 4764 4766# 4766
4768# 4768 4773# 4773 4775# 4775 4777# 4777 4779# 4779 4781# 4781 4786# 4786
4788# 4788 4790# 4790 4795# 4795 4797# 4797 4799# 4799 5008# 5008 5010# 5010
5012# 5012 5014# 5014 5016# 5016 5018# 5018 5020# 5020 5025# 5025 5027# 5027
5029# 5029 5031# 5031 5033# 5033 5035# 5035 5037# 5037 5042# 5042 5044# 5044
5046# 5046 5048# 5048 5053# 5053 5055# 5055 5057# 5057 5059# 5059 5061# 5061
5063# 5063 5065# 5065 5070# 5070 5072# 5072 5074# 5074 5076# 5076 5078# 5078 SEQ 1091
5080# 5080 5082# 5082 5084# 5084 5089# 5089 5091# 5091 5093# 5093 5095# 5095
5097# 5097 5102# 5102 5104# 5104 5106# 5106 5111# 5111 5113# 5113 5115# 5115
5327# 5327 5329# 5329 5331# 5331 5333# 5333 5335# 5335 5340# 5340 5342# 5342
5344# 5344 5346# 5346 5348# 5348 5350# 5350 5352# 5352 5357# 5357 5359# 5359
5361# 5361 5363# 5363 5368# 5368 5370# 5370 5375# 5375 5377# 5377 5379# 5379
5384# 5384 5386# 5386 5388# 5388 5390# 5390 5392# 5392 5397# 5397 5399# 5399
5401# 5401 5406# 5406 5408# 5408 5410# 5410
MWORD 197 199 201 203 208 210 212 214 219 221 223 225 230 232
234 236 241 243 245 247 252 254 256 258 263 265 267 269
274 276 278 280 282 284 286 390 392 394 396 401 403 405
407 412 414 416 418 423 425 427 429 434 436 438 440 445
447 449 451 456 458 460 462 467 469 471 473 475 477 479
481 483 485 487 489 491 493 498 500 502 504 509 511 513
515 520 522 524 526 531 533 535 537 542 544 546 548 553
555 557 559 564 566 568 570 575 577 579 581 583 585 587
589 591 593 595 597 599 601 606 608 610 612 614 616 618
620 622 624 626 628 630 632 738 740 742 744 828 830 832
834 918 920 922 924 1017 1019 1021 1023 1116 1118 1120 1122 1215
1217 1219 1221 1314 1316 1318 1320 1415 1417 1419 1421 1576 1578 1580
1583 1585 1587 1592 1594 1596 1599 1601 1603 1608 1610 1612 1615 1617
1619 1624 1626 1628 1631 1633 1635 1640 1642 1644 1647 1649 1651 1656
1658 1660 1663 1665 1667 1672 1674 1676 1679 1681 1683 1688 1690 1692
1695 1697 1699 1704 1706 1708 1711 1713 1715 1720 1722 1724 1727 1729
1731 1736 1738 1740 1743 1745 1747 1752 1754 1756 1759 1761 1763 1768
1770 1772 1775 1777 1779 1784 1786 1788 1791 1793 1795 1800 1802 1804
1807 1809 1811 1816 1818 1820 1823 1825 1827 1911 1913 1915 1918 1920
1922 1924 2050 2052 2054 2056 2058 2060 2062 2064 2066 2068 2070 2072
2074 2076 2078 2080 2082 2087 2089 2091 2093 2095 2097 2099 2101 2103
2105 2107 2109 2111 2113 2115 2117 2119 2244 2246 2248 2250 2252 2254
2256 2258 2260 2262 2264 2266 2268 2270 2272 2274 2276 2278 2280 2282
2284 2286 2288 2290 2292 2294 2296 2298 2300 2302 2304 2306 2308 2310
2312 2317 2319 2321 2323 2325 2327 2329 2331 2333 2335 2337 2339 2341
2343 2345 2347 2349 2351 2356 2358 2360 2362 2364 2366 2368 2370 2372
2374 2376 2378 2380 2474 2476 2478 2480 2482 2484 2486 2488 2490 2492
2494 2496 2498 2500 2502 2504 2506 2508 2510 2512 2514 2516 2518 2520
2522 2524 2526 2528 2530 2532 2534 2536 2538 2540 2542 2544 2549 2551
2553 2555 2557 2559 2561 2563 2565 2567 2569 2571 2573 2575 2577 2579
2581 2583 2585 2587 2592 2594 2596 2598 2600 2602 2604 2606 2608 2610
2612 2614 2708 2710 2712 2714 2716 2718 2720 2722 2724 2726 2728 2730
2732 2734 2736 2738 2740 2742 2744 2746 2748 2750 2752 2754 2756 2758
2760 2762 2764 2766 2768 2770 2772 2774 2776 2778 2783 2785 2787 2789
2791 2793 2795 2797 2799 2801 2803 2805 2807 2809 2811 2813 2815 2817
2819 2821 2823 2825 2827 2829 2834 2836 2838 2840 2842 2844 2846 2848
2850 2852 2854 2856 2858 2860 2954 2956 2958 2960 2962 2964 2966 2968
2970 2972 2974 2976 2978 2980 2982 2984 2986 2988 2990 2992 2994 2996
2998 3000 3002 3007 3009 3011 3013 3015 3017 3019 3021 3023 3025 3027
3029 3031 3033 3035 3037 3039 3041 3043 3045 3047 3049 3051 3053 3055
3057 3059 3061 3063 3065 3070 3072 3074 3076 3078 3080 3082 3084 3086
3088 3090 3092 3094 3096 3098 3100 3102 3104 3106 3108 3110 3112 3114
3116 3118 3120 3122 3124 3126 3128 3130 3132 3134 3136 3138 3140 3142
3144 3146 3148 3242 3244 3246 3249 3251 3253 3255 3257 3259 3261 3263
3265 3267 3269 3271 3273 3275 3277 3279 3281 3283 3285 3287 3289 3291
3293 3295 3297 3299 3301 3303 3305 3307 3309 3311 3313 3315 3317 3319 SEQ 1092
3324 3326 3328 3330 3332 3334 3336 3338 3340 3342 3344 3346 3348 3350
3352 3354 3356 3358 3360 3362 3364 3366 3368 3370 3372 3374 3376 3378
3383 3385 3387 3389 3391 3393 3395 3397 3399 3401 3403 3405 3407 3409
3411 3413 3415 3417 3419 3421 3423 3425 3427 3429 3431 3433 3435 3437
3439 3441 3443 3445 3447 3449 3451 3453 3455 3457 3459 3461 3463 3465
3467 3469 3471 3473 3475 3477 3479 3481 3483 3485 3487 3489 3491 3493
3495 3497 3499 3501 3503 3505 3507 3509 3511 3513 3515 3723 3725 3727
3729 3731 3733 3735 3737 3739 3741 3746 3748 3750 3752 3754 3756 3758
3760 3765 3767 3769 3771 3776 3778 3780 3782 3784 3786 3788 3790 3795
3797 3799 3801 3803 3805 3807 3809 3811 3816 3818 3820 3822 3824 3829
3831 3833 3838 3840 3842 4054 4056 4058 4060 4062 4064 4066 4068 4070
4072 4077 4079 4081 4083 4085 4087 4089 4091 4096 4098 4100 4102 4107
4109 4111 4113 4115 4117 4119 4121 4126 4128 4130 4132 4134 4136 4138
4140 4142 4147 4149 4151 4153 4155 4160 4162 4164 4169 4171 4173 4384
4386 4388 4390 4392 4394 4396 4401 4403 4405 4407 4409 4411 4413 4418
4420 4422 4424 4429 4431 4433 4435 4437 4439 4441 4446 4448 4450 4452
4454 4456 4458 4460 4465 4467 4469 4471 4473 4478 4480 4482 4487 4489
4491 4716 4718 4720 4722 4724 4729 4731 4733 4735 4737 4739 4741 4746
4748 4750 4752 4757 4759 4764 4766 4768 4773 4775 4777 4779 4781 4786
4788 4790 4795 4797 4799 5008 5010 5012 5014 5016 5018 5020 5025 5027
5029 5031 5033 5035 5037 5042 5044 5046 5048 5053 5055 5057 5059 5061
5063 5065 5070 5072 5074 5076 5078 5080 5082 5084 5089 5091 5093 5095
5097 5102 5104 5106 5111 5113 5115 5327 5329 5331 5333 5335 5340 5342
5344 5346 5348 5350 5352 5357 5359 5361 5363 5368 5370 5375 5377 5379
5384 5386 5388 5390 5392 5397 5399 5401 5406 5408 5410
PNTHW 5420 5423 5430 5436
PNTMSG 5418 5421 5426 5428 5432 5434
PUT 5451 5453
RGET 5464
RPUT 5451
RTN 87 112 330 355 369 379 688 719 786 811 876 901 968 999
1067 1098 1166 1197 1265 1296 1366 1397 1474 1499 1869 1894 1971 2002
2194 2219 2430 2455 2664 2689 2910 2935 3198 3223 3567 3592 3616 3621
3626 3631 3655 3685 3689 3698 3700 3705 3711 3893 3918 3942 3948 3954
3959 3983 4017 4023 4030 4036 4042 4224 4249 4273 4278 4283 4288 4312
4343 4349 4360 4365 4372 4542 4567 4591 4597 4603 4608 4632 4667 4669
4678 4688 4693 4704 4850 4875 4899 4904 4909 4914 4938 4970 4976 4984
4989 4996 5166 5191 5215 5220 5225 5230 5254 5285 5293 5303 5308 5317
5437 5466
SCOPER 105 348 712 804 894 992 1091 1190 1289 1390 1492 1887 1995 2212
2448 2682 2928 3216 3585 3911 4242 4560 4868 5184
TMSG 5421
TMSGC 5418 5426 5428 5432 5434
.MAIN MACRO %53A(1152) 09:55 16-Oct-84 Page 1
DFPTA5 MAC 19-Jan-83 11:21 EBUS/MPROC 2901 Tests (Part 2) SEQ 1093
1 SUBTTL EBUS/MPROC 2901 Tests (Part 2)
2
3 SALL
4
5 SEARCH DFPTA,MONSYM
6
7 ; INTERN's
8
9 ENTRY TSTA31
10
11 ; EXTERN's
12
13 EXTERN TSTA32,TSTA36,TSTA37,TSTA40,TSTA41
14
15 ; EXTERN's located in DFPTA1.MAC (Mainline code..)
16
17 EXTERN TLOAD,TRACE,TSTSUB,AEXEC,AAPNT
18
19 ; EXTERN's located in DFPTAI.MAC (Port Device Handling Routines module)
20
21 EXTERN IPACLR
22
23
24 ;#********************************************************************
25 ; Z5 - Address for use in DDT
26 ;#********************************************************************
27
28 000000' Z5: ; address of 00000'
29
.MAIN MACRO %53A(1152) 09:55 16-Oct-84 Page 2
DFPTA5 MAC 19-Jan-83 11:21 Register Interference Tests SEQ 1094
30 SUBTTL Register Interference Tests
31
32 ;#********************************************************************
33 ;* Test 31 - 2901 Q-Register Interference Test
34 ;
35 ; Description: Verify that the Q-Register is not loaded by any
36 ; destination functions other than 0, 4, and 6. And
37 ; that the contents of the Q-Register is unaffected
38 ; by any combination of source field, ALU function
39 ; field, or destination field (except 0, 4, 6).
40 ;
41 ; This includes testing when the Q-Register is
42 ; being shifted left or right.
43 ;
44 ; Procedure: Clear Port
45 ; Load microcode/set start address 0
46 ; Start microcode (will halt with a parity error at
47 ; completion of test).
48 ;
49 ; Execute first block of microinstructions to set
50 ; up non-zero register contents in Registers 0-17.
51 ; This also sets up a error call subroutine.
52 ;
53 ; Execute the next 640 microinstructions - if the
54 ; contents of the Q-Register ever goes non-zero,
55 ; the microsequencer goes to the error subroutine.
56 ;
57 ; When done, read the LAR and verify that microcode
58 ; stopped in the right place (location 2677), with
59 ; a cram parity error.
60 ;
61 ; If an error occurred, the microcode goes to 4000
62 ; and halts with a cram parity error.
63 ;
64 ; Failure: ---
65 ;#********************************************************************
66
67 ; Test data
68
69 000000' 254 00 0 00 000012' TSTA31: JRST TG31 ; go start test
70 000001' 420402 000031 EBUS!ALU!NDMP!ZALU!31 ; test mask
71 000002' 000033' 003702' T31M,,[ASCIZ ^2901 Q-Register Interference Test^]
72 000003' 003711' 000000 [EXP MLAST!E23],,0
73 000004' 000000000000# TSTA32 ; failure test table
74 000005' 000000000000# TSTA36 ; ...
75 000006' 000000000000# TSTA37
76 000007' 000000000000# TSTA40
77 000010' 000000000000# TSTA41
78 000011' 777777 777777 -1
.MAIN MACRO %53A(1152) 09:55 16-Oct-84 Page 3
DFPTA5 MAC 19-Jan-83 11:21 Register Interference Tests SEQ 1095
79
80 ; Start test
81
82 000012' 201 00 0 00 000000' TG31: MOVEI Z5 ; get address of module start
83 000013' 260 17 0 00 000000* GO TRACE ; handle trace output
84 000014' 201 01 0 00 000033' MOVEI 1,T31M ; set up microcode address
85 000015' 260 17 0 00 000000* GO TLOAD ; load/verify it
86 000016' 263 17 0 00 000000 RTN ; failed - exit test
87
88 ; 1st segment of test (Segment A) - Start up port and wait till it stops
89
90 000017' 400 15 0 00 000000 TA31: SETZ ERFLG, ; clear error flag
91 000020' 201 01 0 00 000012 MOVEI 1,^D10 ; maximum delay before timeout (msec)
92 000021' 201 02 0 00 004000 MOVEI 2,4000 ; error address
93 000022' 201 03 0 00 002677 MOVEI 3,2677 ; correct address
94 000023' 400 04 0 00 000000 SETZ 4, ; starting address
95 000024' 260 17 0 00 000000* GO AEXEC ; execute ALU type test
96 000025' 474 15 0 00 000000 SETO ERFLG, ; error occurred
97 000026' 027 00 0 00 000032' SCOPER MA31 ; print error message
98 000027' 254 00 0 00 000017' JRST TA31 ; loop on error
99 000030' 254 00 0 00 000031' JRST TX31 ; altmode exit
100
101 ; End of test
102
103 000031' 263 17 0 00 000000 TX31: RTN ; return
104
105 ; Error message - Microcode did not stop in the right place
106
107 000032' 000000000000# MA31: LAST!CALL!TXALL!AAPNT ; print results of ALU type test
.MAIN MACRO %53A(1152) 09:55 16-Oct-84 Page 4
DFPTA5 MAC 19-Jan-83 11:21 Register Interference Tests SEQ 1096
108
109 ; Microcode (979 words are loaded, 658 executed if the test passes)
110
111 000033' T31M:
112
113 ; Clear Q Register
114
115 000033' 000000 010000 MWORD <ADDR=0,JMAP,J=1,B=0,SD0,AND,D=0> ; 0
116 000034' 740000 000040
117
118 ; Initialize Registers 0-17 non-zero.
119
120 000035' 000100 000003 MWORD <CONT,B=1,SD0,OR,D=2,SKCN,MGC=3> ; 1
121 000036' 732000 640340
122 000037' 000200 000004 MWORD <CONT,B=2,SD0,OR,D=2,SKCN,MGC=4> ; 2
123 000040' 732001 240340
124 000041' 000300 000005 MWORD <CONT,B=3,SD0,OR,D=2,SKCN,MGC=5> ; 3
125 000042' 732001 640340
126 000043' 000400 000006 MWORD <CONT,B=4,SD0,OR,D=2,SKCN,MGC=6> ; 4
127 000044' 732002 240340
128 000045' 000500 000007 MWORD <CONT,B=5,SD0,OR,D=2,SKCN,MGC=7> ; 5
129 000046' 732002 640340
130 000047' 000600 000010 MWORD <CONT,B=6,SD0,OR,D=2,SKCN,MGC=10> ; 6
131 000050' 732003 240340
132 000051' 000700 000011 MWORD <CONT,B=7,SD0,OR,D=2,SKCN,MGC=11> ; 7
133 000052' 732003 640340
134 000053' 001000 000012 MWORD <CONT,B=10,SD0,OR,D=2,SKCN,MGC=12> ; 10
135 000054' 732004 240340
136 000055' 001100 000013 MWORD <CONT,B=11,SD0,OR,D=2,SKCN,MGC=13> ; 11
137 000056' 732004 640340
138 000057' 001200 000014 MWORD <CONT,B=12,SD0,OR,D=2,SKCN,MGC=14> ; 12
139 000060' 732005 240340
140 000061' 001300 000015 MWORD <CONT,B=13,SD0,OR,D=2,SKCN,MGC=15> ; 13
141 000062' 732005 640340
142 000063' 001400 000016 MWORD <CONT,B=14,SD0,OR,D=2,SKCN,MGC=16> ; 14
143 000064' 732006 240340
144 000065' 001500 000017 MWORD <CONT,B=15,SD0,OR,D=2,SKCN,MGC=17> ; 15
145 000066' 732006 640340
146 000067' 001600 000020 MWORD <CONT,B=16,SD0,OR,D=2,SKCN,MGC=20> ; 16
147 000070' 732007 240340
148 000071' 001700 000021 MWORD <CONT,B=17,SD0,OR,D=2,SKCN,MGC=21> ; 17
149 000072' 732007 640340
150 000073' 002000 000022 MWORD <CONT,B=0,SD0,OR,D=2,SKCN,MGC=22> ; 20
151 000074' 732000 240340
152 000075' 002110 000000 MWORD <JMAP,J=1000,D=1> ; 21 go test
153 000076' 001000 000040
154
155 ; Do the testing - do something that should not
156 ; affect the Q-Register, then verify the Q-Register
157 ; is still zero. If not go to 4000 which halts with
158 ; a parity error.
159
160 000077' 100000 000000 MWORD <ADDR=1000,CONT,B=5,SAQ,PLUS,D=1> ; 1000
161 000100' 001002 400340
162 000101' 100110 030000 MWORD <CJV,J=1003,S0Q,OR,D=1,CENA,CCFZ> ; 1001
.MAIN MACRO %53A(1152) 09:55 16-Oct-84 Page 4-1
DFPTA5 MAC 19-Jan-83 11:21 Register Interference Tests SEQ 1097
163 000102' 231400 020140
164 000103' 100240 000000 MWORD <JMAP,J=4000> ; 1002 error
165 000104' 000000 000040
166 000105' 100300 000000 MWORD <CONT,A=1,B=6,SAQ,PLUS,D=2> ; 1003
167 000106' 002013 000340
168 000107' 100410 060000 MWORD <CJV,J=1006,S0Q,OR,D=1,CENA,CCFZ> ; 1004
169 000110' 231400 020140
170 000111' 100540 000000 MWORD <JMAP,J=4000> ; 1005 error
171 000112' 000000 000040
172 000113' 100600 000000 MWORD <CONT,A=2,B=7,SAQ,PLUS,D=3> ; 1006
173 000114' 003023 400340
174 000115' 100710 110000 MWORD <CJV,J=1011,S0Q,OR,D=1,CENA,CCFZ> ; 1007
175 000116' 231400 020140
176 000117' 101040 000000 MWORD <JMAP,J=4000> ; 1010 error
177 000120' 000000 000040
178 000121' 101100 000000 MWORD <CONT,A=3,B=10,SAQ,PLUS,D=5> ; 1011
179 000122' 005034 000340
180 000123' 101210 140000 MWORD <CJV,J=1014,S0Q,OR,D=1,CENA,CCFZ> ; 1012
181 000124' 231400 020140
182 000125' 101340 000000 MWORD <JMAP,J=4000> ; 1013 error
183 000126' 000000 000040
184 000127' 101400 000000 MWORD <CONT,A=4,B=11,SAQ,PLUS,D=7> ; 1014
185 000130' 007044 400340
186 000131' 101510 170000 MWORD <CJV,J=1017,S0Q,OR,D=1,CENA,CCFZ> ; 1015
187 000132' 231400 020140
188 000133' 101640 000000 MWORD <JMAP,J=4000> ; 1016 error
189 000134' 000000 000040
190 000135' 101700 000000 MWORD <CONT,A=12,B=17,SAB,PLUS,D=1> ; 1017
191 000136' 101127 400340
192 000137' 102010 220000 MWORD <CJV,J=1022,S0Q,OR,D=1,CENA,CCFZ> ; 1020
193 000140' 231400 020140
194 000141' 102140 000000 MWORD <JMAP,J=4000> ; 1021 error
195 000142' 000000 000040
196 000143' 102200 000000 MWORD <CONT,A=13,B=0,SAB,PLUS,D=2> ; 1022
197 000144' 102130 000340
198 000145' 102310 250000 MWORD <CJV,J=1025,S0Q,OR,D=1,CENA,CCFZ> ; 1023
199 000146' 231400 020140
200 000147' 102440 000000 MWORD <JMAP,J=4000> ; 1024 error
201 000150' 000000 000040
202 000151' 102500 000000 MWORD <CONT,A=14,B=1,SAB,PLUS,D=3> ; 1025
203 000152' 103140 400340
204 000153' 102610 300000 MWORD <CJV,J=1030,S0Q,OR,D=1,CENA,CCFZ> ; 1026
205 000154' 231400 020140
206 000155' 102740 000000 MWORD <JMAP,J=4000> ; 1027 error
207 000156' 000000 000040
208 000157' 103000 000000 MWORD <CONT,A=15,B=2,SAB,PLUS,D=5> ; 1030
209 000160' 105151 000340
210 000161' 103110 330000 MWORD <CJV,J=1033,S0Q,OR,D=1,CENA,CCFZ> ; 1031
211 000162' 231400 020140
212 000163' 103240 000000 MWORD <JMAP,J=4000> ; 1032 error
213 000164' 000000 000040
214 000165' 103300 000000 MWORD <CONT,A=16,B=3,SAB,PLUS,D=7> ; 1033
215 000166' 107161 400340
216 000167' 103410 360000 MWORD <CJV,J=1036,S0Q,OR,D=1,CENA,CCFZ> ; 1034
217 000170' 231400 020140
.MAIN MACRO %53A(1152) 09:55 16-Oct-84 Page 4-2
DFPTA5 MAC 19-Jan-83 11:21 Register Interference Tests SEQ 1098
218 000171' 103540 000000 MWORD <JMAP,J=4000> ; 1035 error
219 000172' 000000 000040
220 000173' 103600 000000 MWORD <CONT,A=4,B=11,S0Q,PLUS,D=1> ; 1036
221 000174' 201044 400340
222 000175' 103710 410000 MWORD <CJV,J=1041,S0Q,OR,D=1,CENA,CCFZ> ; 1037
223 000176' 231400 020140
224 000177' 104040 000000 MWORD <JMAP,J=4000> ; 1040 error
225 000200' 000000 000040
226 000201' 104100 000000 MWORD <CONT,A=5,B=12,S0Q,PLUS,D=2> ; 1041
227 000202' 202055 000340
228 000203' 104210 440000 MWORD <CJV,J=1044,S0Q,OR,D=1,CENA,CCFZ> ; 1042
229 000204' 231400 020140
230 000205' 104340 000000 MWORD <JMAP,J=4000> ; 1043 error
231 000206' 000000 000040
232 000207' 104400 000000 MWORD <CONT,A=6,B=13,S0Q,PLUS,D=3> ; 1044
233 000210' 203065 400340
234 000211' 104510 470000 MWORD <CJV,J=1047,S0Q,OR,D=1,CENA,CCFZ> ; 1045
235 000212' 231400 020140
236 000213' 104640 000000 MWORD <JMAP,J=4000> ; 1046 error
237 000214' 000000 000040
238 000215' 104700 000000 MWORD <CONT,A=7,B=14,S0Q,PLUS,D=5> ; 1047
239 000216' 205076 000340
240 000217' 105010 520000 MWORD <CJV,J=1052,S0Q,OR,D=1,CENA,CCFZ> ; 1050
241 000220' 231400 020140
242 000221' 105140 000000 MWORD <JMAP,J=4000> ; 1051 error
243 000222' 000000 000040
244 000223' 105200 000000 MWORD <CONT,A=10,B=15,S0Q,PLUS,D=7> ; 1052
245 000224' 207106 400340
246 000225' 105310 550000 MWORD <CJV,J=1055,S0Q,OR,D=1,CENA,CCFZ> ; 1053
247 000226' 231400 020140
248 000227' 105440 000000 MWORD <JMAP,J=4000> ; 1054 error
249 000230' 000000 000040
250 000231' 105500 000000 MWORD <CONT,A=16,B=3,S0B,PLUS,D=1> ; 1055
251 000232' 301161 400340
252 000233' 105610 600000 MWORD <CJV,J=1060,S0Q,OR,D=1,CENA,CCFZ> ; 1056
253 000234' 231400 020140
254 000235' 105740 000000 MWORD <JMAP,J=4000> ; 1057 error
255 000236' 000000 000040
256 000237' 106000 000000 MWORD <CONT,A=17,B=4,S0B,PLUS,D=2> ; 1060
257 000240' 302172 000340
258 000241' 106110 630000 MWORD <CJV,J=1063,S0Q,OR,D=1,CENA,CCFZ> ; 1061
259 000242' 231400 020140
260 000243' 106240 000000 MWORD <JMAP,J=4000> ; 1062 error
261 000244' 000000 000040
262 000245' 106300 000000 MWORD <CONT,A=0,B=5,S0B,PLUS,D=3> ; 1063
263 000246' 303002 400340
264 000247' 106410 660000 MWORD <CJV,J=1066,S0Q,OR,D=1,CENA,CCFZ> ; 1064
265 000250' 231400 020140
266 000251' 106540 000000 MWORD <JMAP,J=4000> ; 1065 error
267 000252' 000000 000040
268 000253' 106600 000000 MWORD <CONT,A=1,B=6,S0B,PLUS,D=5> ; 1066
269 000254' 305013 000340
270 000255' 106710 710000 MWORD <CJV,J=1071,S0Q,OR,D=1,CENA,CCFZ> ; 1067
271 000256' 231400 020140
272 000257' 107040 000000 MWORD <JMAP,J=4000> ; 1070 error
.MAIN MACRO %53A(1152) 09:55 16-Oct-84 Page 4-3
DFPTA5 MAC 19-Jan-83 11:21 Register Interference Tests SEQ 1099
273 000260' 000000 000040
274 000261' 107100 000000 MWORD <CONT,A=2,B=7,S0B,PLUS,D=7> ; 1071
275 000262' 307023 400340
276 000263' 107210 740000 MWORD <CJV,J=1074,S0Q,OR,D=1,CENA,CCFZ> ; 1072
277 000264' 231400 020140
278 000265' 107340 000000 MWORD <JMAP,J=4000> ; 1073 error
279 000266' 000000 000040
280 000267' 107400 000000 MWORD <CONT,A=10,B=15,S0A,PLUS,D=1> ; 1074
281 000270' 401106 400340
282 000271' 107510 770000 MWORD <CJV,J=1077,S0Q,OR,D=1,CENA,CCFZ> ; 1075
283 000272' 231400 020140
284 000273' 107640 000000 MWORD <JMAP,J=4000> ; 1076 error
285 000274' 000000 000040
286 000275' 107700 000000 MWORD <CONT,A=11,B=16,S0A,PLUS,D=2> ; 1077
287 000276' 402117 000340
288 000277' 110011 020000 MWORD <CJV,J=1102,S0Q,OR,D=1,CENA,CCFZ> ; 1100
289 000300' 231400 020140
290 000301' 110140 000000 MWORD <JMAP,J=4000> ; 1101 error
291 000302' 000000 000040
292 000303' 110200 000000 MWORD <CONT,A=12,B=17,S0A,PLUS,D=3> ; 1102
293 000304' 403127 400340
294 000305' 110311 050000 MWORD <CJV,J=1105,S0Q,OR,D=1,CENA,CCFZ> ; 1103
295 000306' 231400 020140
296 000307' 110440 000000 MWORD <JMAP,J=4000> ; 1104 error
297 000310' 000000 000040
298 000311' 110500 000000 MWORD <CONT,A=13,B=0,S0A,PLUS,D=5> ; 1105
299 000312' 405130 000340
300 000313' 110611 100000 MWORD <CJV,J=1110,S0Q,OR,D=1,CENA,CCFZ> ; 1106
301 000314' 231400 020140
302 000315' 110740 000000 MWORD <JMAP,J=4000> ; 1107 error
303 000316' 000000 000040
304 000317' 111000 000000 MWORD <CONT,A=14,B=1,S0A,PLUS,D=7> ; 1110
305 000320' 407140 400340
306 000321' 111111 130000 MWORD <CJV,J=1113,S0Q,OR,D=1,CENA,CCFZ> ; 1111
307 000322' 231400 020140
308 000323' 111240 000000 MWORD <JMAP,J=4000> ; 1112 error
309 000324' 000000 000040
310 000325' 111300 000000 MWORD <CONT,A=2,B=7,SDA,PLUS,D=1> ; 1113
311 000326' 501023 400340
312 000327' 111411 160000 MWORD <CJV,J=1116,S0Q,OR,D=1,CENA,CCFZ> ; 1114
313 000330' 231400 020140
314 000331' 111540 000000 MWORD <JMAP,J=4000> ; 1115 error
315 000332' 000000 000040
316 000333' 111600 000000 MWORD <CONT,A=3,B=10,SDA,PLUS,D=2> ; 1116
317 000334' 502034 000340
318 000335' 111711 210000 MWORD <CJV,J=1121,S0Q,OR,D=1,CENA,CCFZ> ; 1117
319 000336' 231400 020140
320 000337' 112040 000000 MWORD <JMAP,J=4000> ; 1120 error
321 000340' 000000 000040
322 000341' 112100 000000 MWORD <CONT,A=4,B=11,SDA,PLUS,D=3> ; 1121
323 000342' 503044 400340
324 000343' 112211 240000 MWORD <CJV,J=1124,S0Q,OR,D=1,CENA,CCFZ> ; 1122
325 000344' 231400 020140
326 000345' 112340 000000 MWORD <JMAP,J=4000> ; 1123 error
327 000346' 000000 000040
.MAIN MACRO %53A(1152) 09:55 16-Oct-84 Page 4-4
DFPTA5 MAC 19-Jan-83 11:21 Register Interference Tests SEQ 1100
328 000347' 112400 000000 MWORD <CONT,A=5,B=12,SDA,PLUS,D=5> ; 1124
329 000350' 505055 000340
330 000351' 112511 270000 MWORD <CJV,J=1127,S0Q,OR,D=1,CENA,CCFZ> ; 1125
331 000352' 231400 020140
332 000353' 112640 000000 MWORD <JMAP,J=4000> ; 1126 error
333 000354' 000000 000040
334 000355' 112700 000000 MWORD <CONT,A=6,B=13,SDA,PLUS,D=7> ; 1127
335 000356' 507065 400340
336 000357' 113011 320000 MWORD <CJV,J=1132,S0Q,OR,D=1,CENA,CCFZ> ; 1130
337 000360' 231400 020140
338 000361' 113140 000000 MWORD <JMAP,J=4000> ; 1131 error
339 000362' 000000 000040
340 000363' 113200 000000 MWORD <CONT,A=14,B=1,SDQ,PLUS,D=1> ; 1132
341 000364' 601140 400340
342 000365' 113311 350000 MWORD <CJV,J=1135,S0Q,OR,D=1,CENA,CCFZ> ; 1133
343 000366' 231400 020140
344 000367' 113440 000000 MWORD <JMAP,J=4000> ; 1134 error
345 000370' 000000 000040
346 000371' 113500 000000 MWORD <CONT,A=15,B=2,SDQ,PLUS,D=2> ; 1135
347 000372' 602151 000340
348 000373' 113611 400000 MWORD <CJV,J=1140,S0Q,OR,D=1,CENA,CCFZ> ; 1136
349 000374' 231400 020140
350 000375' 113740 000000 MWORD <JMAP,J=4000> ; 1137 error
351 000376' 000000 000040
352 000377' 114000 000000 MWORD <CONT,A=16,B=3,SDQ,PLUS,D=3> ; 1140
353 000400' 603161 400340
354 000401' 114111 430000 MWORD <CJV,J=1143,S0Q,OR,D=1,CENA,CCFZ> ; 1141
355 000402' 231400 020140
356 000403' 114240 000000 MWORD <JMAP,J=4000> ; 1142 error
357 000404' 000000 000040
358 000405' 114300 000000 MWORD <CONT,A=17,B=4,SDQ,PLUS,D=5> ; 1143
359 000406' 605172 000340
360 000407' 114411 460000 MWORD <CJV,J=1146,S0Q,OR,D=1,CENA,CCFZ> ; 1144
361 000410' 231400 020140
362 000411' 114540 000000 MWORD <JMAP,J=4000> ; 1145 error
363 000412' 000000 000040
364 000413' 114600 000000 MWORD <CONT,A=0,B=5,SDQ,PLUS,D=7> ; 1146
365 000414' 607002 400340
366 000415' 114711 510000 MWORD <CJV,J=1151,S0Q,OR,D=1,CENA,CCFZ> ; 1147
367 000416' 231400 020140
368 000417' 115040 000000 MWORD <JMAP,J=4000> ; 1150 error
369 000420' 000000 000040
370 000421' 115100 000000 MWORD <CONT,A=6,B=13,SD0,PLUS,D=1> ; 1151
371 000422' 701065 400340
372 000423' 115211 540000 MWORD <CJV,J=1154,S0Q,OR,D=1,CENA,CCFZ> ; 1152
373 000424' 231400 020140
374 000425' 115340 000000 MWORD <JMAP,J=4000> ; 1153 error
375 000426' 000000 000040
376 000427' 115400 000000 MWORD <CONT,A=7,B=14,SD0,PLUS,D=2> ; 1154
377 000430' 702076 000340
378 000431' 115511 570000 MWORD <CJV,J=1157,S0Q,OR,D=1,CENA,CCFZ> ; 1155
379 000432' 231400 020140
380 000433' 115640 000000 MWORD <JMAP,J=4000> ; 1156 error
381 000434' 000000 000040
382 000435' 115700 000000 MWORD <CONT,A=10,B=15,SD0,PLUS,D=3> ; 1157
.MAIN MACRO %53A(1152) 09:55 16-Oct-84 Page 4-5
DFPTA5 MAC 19-Jan-83 11:21 Register Interference Tests SEQ 1101
383 000436' 703106 400340
384 000437' 116011 620000 MWORD <CJV,J=1162,S0Q,OR,D=1,CENA,CCFZ> ; 1160
385 000440' 231400 020140
386 000441' 116140 000000 MWORD <JMAP,J=4000> ; 1161 error
387 000442' 000000 000040
388 000443' 116200 000000 MWORD <CONT,A=11,B=16,SD0,PLUS,D=5> ; 1162
389 000444' 705117 000340
390 000445' 116311 650000 MWORD <CJV,J=1165,S0Q,OR,D=1,CENA,CCFZ> ; 1163
391 000446' 231400 020140
392 000447' 116440 000000 MWORD <JMAP,J=4000> ; 1164 error
393 000450' 000000 000040
394 000451' 116500 000000 MWORD <CONT,A=12,B=17,SD0,PLUS,D=7> ; 1165
395 000452' 707127 400340
396 000453' 116611 700000 MWORD <CJV,J=1170,S0Q,OR,D=1,CENA,CCFZ> ; 1166
397 000454' 231400 020140
398 000455' 116740 000000 MWORD <JMAP,J=4000> ; 1167 error
399 000456' 000000 000040
400 000457' 117000 000000 MWORD <CONT,A=0,B=5,SAQ,SMIN,D=1> ; 1170
401 000460' 011002 400340
402 000461' 117111 730000 MWORD <CJV,J=1173,S0Q,OR,D=1,CENA,CCFZ> ; 1171
403 000462' 231400 020140
404 000463' 117240 000000 MWORD <JMAP,J=4000> ; 1172 error
405 000464' 000000 000040
406 000465' 117300 000000 MWORD <CONT,A=1,B=6,SAQ,SMIN,D=2> ; 1173
407 000466' 012013 000340
408 000467' 117411 760000 MWORD <CJV,J=1176,S0Q,OR,D=1,CENA,CCFZ> ; 1174
409 000470' 231400 020140
410 000471' 117540 000000 MWORD <JMAP,J=4000> ; 1175 error
411 000472' 000000 000040
412 000473' 117600 000000 MWORD <CONT,A=2,B=7,SAQ,SMIN,D=3> ; 1176
413 000474' 013023 400340
414 000475' 117712 010000 MWORD <CJV,J=1201,S0Q,OR,D=1,CENA,CCFZ> ; 1177
415 000476' 231400 020140
416 000477' 120040 000000 MWORD <JMAP,J=4000> ; 1200 error
417 000500' 000000 000040
418 000501' 120100 000000 MWORD <CONT,A=3,B=10,SAQ,SMIN,D=5> ; 1201
419 000502' 015034 000340
420 000503' 120212 040000 MWORD <CJV,J=1204,S0Q,OR,D=1,CENA,CCFZ> ; 1202
421 000504' 231400 020140
422 000505' 120340 000000 MWORD <JMAP,J=4000> ; 1203 error
423 000506' 000000 000040
424 000507' 120400 000000 MWORD <CONT,A=4,B=11,SAQ,SMIN,D=7> ; 1204
425 000510' 017044 400340
426 000511' 120512 070000 MWORD <CJV,J=1207,S0Q,OR,D=1,CENA,CCFZ> ; 1205
427 000512' 231400 020140
428 000513' 120640 000000 MWORD <JMAP,J=4000> ; 1206 error
429 000514' 000000 000040
430 000515' 120700 000000 MWORD <CONT,A=12,B=17,SAB,SMIN,D=1> ; 1207
431 000516' 111127 400340
432 000517' 121012 120000 MWORD <CJV,J=1212,S0Q,OR,D=1,CENA,CCFZ> ; 1210
433 000520' 231400 020140
434 000521' 121140 000000 MWORD <JMAP,J=4000> ; 1211 error
435 000522' 000000 000040
436 000523' 121200 000000 MWORD <CONT,A=13,B=0,SAB,SMIN,D=2> ; 1212
437 000524' 112130 000340
.MAIN MACRO %53A(1152) 09:55 16-Oct-84 Page 4-6
DFPTA5 MAC 19-Jan-83 11:21 Register Interference Tests SEQ 1102
438 000525' 121312 150000 MWORD <CJV,J=1215,S0Q,OR,D=1,CENA,CCFZ> ; 1213
439 000526' 231400 020140
440 000527' 121440 000000 MWORD <JMAP,J=4000> ; 1214 error
441 000530' 000000 000040
442 000531' 121500 000000 MWORD <CONT,A=14,B=1,SAB,SMIN,D=3> ; 1215
443 000532' 113140 400340
444 000533' 121612 200000 MWORD <CJV,J=1220,S0Q,OR,D=1,CENA,CCFZ> ; 1216
445 000534' 231400 020140
446 000535' 121740 000000 MWORD <JMAP,J=4000> ; 1217 error
447 000536' 000000 000040
448 000537' 122000 000000 MWORD <CONT,A=15,B=2,SAB,SMIN,D=5> ; 1220
449 000540' 115151 000340
450 000541' 122112 230000 MWORD <CJV,J=1223,S0Q,OR,D=1,CENA,CCFZ> ; 1221
451 000542' 231400 020140
452 000543' 122240 000000 MWORD <JMAP,J=4000> ; 1222 error
453 000544' 000000 000040
454 000545' 122300 000000 MWORD <CONT,A=16,B=3,SAB,SMIN,D=7> ; 1223
455 000546' 117161 400340
456 000547' 122412 260000 MWORD <CJV,J=1226,S0Q,OR,D=1,CENA,CCFZ> ; 1224
457 000550' 231400 020140
458 000551' 122540 000000 MWORD <JMAP,J=4000> ; 1225 error
459 000552' 000000 000040
460 000553' 122600 000000 MWORD <CONT,A=4,B=11,S0Q,SMIN,D=1> ; 1226
461 000554' 211044 400340
462 000555' 122712 310000 MWORD <CJV,J=1231,S0Q,OR,D=1,CENA,CCFZ> ; 1227
463 000556' 231400 020140
464 000557' 123040 000000 MWORD <JMAP,J=4000> ; 1230 error
465 000560' 000000 000040
466 000561' 123100 000000 MWORD <CONT,A=5,B=12,S0Q,SMIN,D=2> ; 1231
467 000562' 212055 000340
468 000563' 123212 340000 MWORD <CJV,J=1234,S0Q,OR,D=1,CENA,CCFZ> ; 1232
469 000564' 231400 020140
470 000565' 123340 000000 MWORD <JMAP,J=4000> ; 1233 error
471 000566' 000000 000040
472 000567' 123400 000000 MWORD <CONT,A=6,B=13,S0Q,SMIN,D=3> ; 1234
473 000570' 213065 400340
474 000571' 123512 370000 MWORD <CJV,J=1237,S0Q,OR,D=1,CENA,CCFZ> ; 1235
475 000572' 231400 020140
476 000573' 123640 000000 MWORD <JMAP,J=4000> ; 1236 error
477 000574' 000000 000040
478 000575' 123700 000000 MWORD <CONT,A=7,B=14,S0Q,SMIN,D=5> ; 1237
479 000576' 215076 000340
480 000577' 124012 420000 MWORD <CJV,J=1242,S0Q,OR,D=1,CENA,CCFZ> ; 1240
481 000600' 231400 020140
482 000601' 124140 000000 MWORD <JMAP,J=4000> ; 1241 error
483 000602' 000000 000040
484 000603' 124200 000000 MWORD <CONT,A=10,B=15,S0Q,SMIN,D=7> ; 1242
485 000604' 217106 400340
486 000605' 124312 450000 MWORD <CJV,J=1245,S0Q,OR,D=1,CENA,CCFZ> ; 1243
487 000606' 231400 020140
488 000607' 124440 000000 MWORD <JMAP,J=4000> ; 1244 error
489 000610' 000000 000040
490 000611' 124500 000000 MWORD <CONT,A=16,B=3,S0B,SMIN,D=1> ; 1245
491 000612' 311161 400340
492 000613' 124612 500000 MWORD <CJV,J=1250,S0Q,OR,D=1,CENA,CCFZ> ; 1246
.MAIN MACRO %53A(1152) 09:55 16-Oct-84 Page 4-7
DFPTA5 MAC 19-Jan-83 11:21 Register Interference Tests SEQ 1103
493 000614' 231400 020140
494 000615' 124740 000000 MWORD <JMAP,J=4000> ; 1247 error
495 000616' 000000 000040
496 000617' 125000 000000 MWORD <CONT,A=17,B=4,S0B,SMIN,D=2> ; 1250
497 000620' 312172 000340
498 000621' 125112 530000 MWORD <CJV,J=1253,S0Q,OR,D=1,CENA,CCFZ> ; 1251
499 000622' 231400 020140
500 000623' 125240 000000 MWORD <JMAP,J=4000> ; 1252 error
501 000624' 000000 000040
502 000625' 125300 000000 MWORD <CONT,A=0,B=5,S0B,SMIN,D=3> ; 1253
503 000626' 313002 400340
504 000627' 125412 560000 MWORD <CJV,J=1256,S0Q,OR,D=1,CENA,CCFZ> ; 1254
505 000630' 231400 020140
506 000631' 125540 000000 MWORD <JMAP,J=4000> ; 1255 error
507 000632' 000000 000040
508 000633' 125600 000000 MWORD <CONT,A=1,B=6,S0B,SMIN,D=5> ; 1256
509 000634' 315013 000340
510 000635' 125712 610000 MWORD <CJV,J=1261,S0Q,OR,D=1,CENA,CCFZ> ; 1257
511 000636' 231400 020140
512 000637' 126040 000000 MWORD <JMAP,J=4000> ; 1260 error
513 000640' 000000 000040
514 000641' 126100 000000 MWORD <CONT,A=2,B=7,S0B,SMIN,D=7> ; 1261
515 000642' 317023 400340
516 000643' 126212 640000 MWORD <CJV,J=1264,S0Q,OR,D=1,CENA,CCFZ> ; 1262
517 000644' 231400 020140
518 000645' 126340 000000 MWORD <JMAP,J=4000> ; 1263 error
519 000646' 000000 000040
520 000647' 126400 000000 MWORD <CONT,A=10,B=15,S0A,SMIN,D=1> ; 1264
521 000650' 411106 400340
522 000651' 126512 670000 MWORD <CJV,J=1267,S0Q,OR,D=1,CENA,CCFZ> ; 1265
523 000652' 231400 020140
524 000653' 126640 000000 MWORD <JMAP,J=4000> ; 1266 error
525 000654' 000000 000040
526 000655' 126700 000000 MWORD <CONT,A=11,B=16,S0A,SMIN,D=2> ; 1267
527 000656' 412117 000340
528 000657' 127012 720000 MWORD <CJV,J=1272,S0Q,OR,D=1,CENA,CCFZ> ; 1270
529 000660' 231400 020140
530 000661' 127140 000000 MWORD <JMAP,J=4000> ; 1271 error
531 000662' 000000 000040
532 000663' 127200 000000 MWORD <CONT,A=12,B=17,S0A,SMIN,D=3> ; 1272
533 000664' 413127 400340
534 000665' 127312 750000 MWORD <CJV,J=1275,S0Q,OR,D=1,CENA,CCFZ> ; 1273
535 000666' 231400 020140
536 000667' 127440 000000 MWORD <JMAP,J=4000> ; 1274 error
537 000670' 000000 000040
538 000671' 127500 000000 MWORD <CONT,A=13,B=0,S0A,SMIN,D=5> ; 1275
539 000672' 415130 000340
540 000673' 127613 000000 MWORD <CJV,J=1300,S0Q,OR,D=1,CENA,CCFZ> ; 1276
541 000674' 231400 020140
542 000675' 127740 000000 MWORD <JMAP,J=4000> ; 1277 error
543 000676' 000000 000040
544 000677' 130000 000000 MWORD <CONT,A=14,B=1,S0A,SMIN,D=7> ; 1300
545 000700' 417140 400340
546 000701' 130113 030000 MWORD <CJV,J=1303,S0Q,OR,D=1,CENA,CCFZ> ; 1301
547 000702' 231400 020140
.MAIN MACRO %53A(1152) 09:55 16-Oct-84 Page 4-8
DFPTA5 MAC 19-Jan-83 11:21 Register Interference Tests SEQ 1104
548 000703' 130240 000000 MWORD <JMAP,J=4000> ; 1302 error
549 000704' 000000 000040
550 000705' 130300 000000 MWORD <CONT,A=2,B=7,SDA,SMIN,D=1> ; 1303
551 000706' 511023 400340
552 000707' 130413 060000 MWORD <CJV,J=1306,S0Q,OR,D=1,CENA,CCFZ> ; 1304
553 000710' 231400 020140
554 000711' 130540 000000 MWORD <JMAP,J=4000> ; 1305 error
555 000712' 000000 000040
556 000713' 130600 000000 MWORD <CONT,A=3,B=10,SDA,SMIN,D=2> ; 1306
557 000714' 512034 000340
558 000715' 130713 110000 MWORD <CJV,J=1311,S0Q,OR,D=1,CENA,CCFZ> ; 1307
559 000716' 231400 020140
560 000717' 131040 000000 MWORD <JMAP,J=4000> ; 1310 error
561 000720' 000000 000040
562 000721' 131100 000000 MWORD <CONT,A=4,B=11,SDA,SMIN,D=3> ; 1311
563 000722' 513044 400340
564 000723' 131213 140000 MWORD <CJV,J=1314,S0Q,OR,D=1,CENA,CCFZ> ; 1312
565 000724' 231400 020140
566 000725' 131340 000000 MWORD <JMAP,J=4000> ; 1313 error
567 000726' 000000 000040
568 000727' 131400 000000 MWORD <CONT,A=5,B=12,SDA,SMIN,D=5> ; 1314
569 000730' 515055 000340
570 000731' 131513 170000 MWORD <CJV,J=1317,S0Q,OR,D=1,CENA,CCFZ> ; 1315
571 000732' 231400 020140
572 000733' 131640 000000 MWORD <JMAP,J=4000> ; 1316 error
573 000734' 000000 000040
574 000735' 131700 000000 MWORD <CONT,A=6,B=13,SDA,SMIN,D=7> ; 1317
575 000736' 517065 400340
576 000737' 132013 220000 MWORD <CJV,J=1322,S0Q,OR,D=1,CENA,CCFZ> ; 1320
577 000740' 231400 020140
578 000741' 132140 000000 MWORD <JMAP,J=4000> ; 1321 error
579 000742' 000000 000040
580 000743' 132200 000000 MWORD <CONT,A=14,B=1,SDQ,SMIN,D=1> ; 1322
581 000744' 611140 400340
582 000745' 132313 250000 MWORD <CJV,J=1325,S0Q,OR,D=1,CENA,CCFZ> ; 1323
583 000746' 231400 020140
584 000747' 132440 000000 MWORD <JMAP,J=4000> ; 1324 error
585 000750' 000000 000040
586 000751' 132500 000000 MWORD <CONT,A=15,B=2,SDQ,SMIN,D=2> ; 1325
587 000752' 612151 000340
588 000753' 132613 300000 MWORD <CJV,J=1330,S0Q,OR,D=1,CENA,CCFZ> ; 1326
589 000754' 231400 020140
590 000755' 132740 000000 MWORD <JMAP,J=4000> ; 1327 error
591 000756' 000000 000040
592 000757' 133000 000000 MWORD <CONT,A=16,B=3,SDQ,SMIN,D=3> ; 1330
593 000760' 613161 400340
594 000761' 133113 330000 MWORD <CJV,J=1333,S0Q,OR,D=1,CENA,CCFZ> ; 1331
595 000762' 231400 020140
596 000763' 133240 000000 MWORD <JMAP,J=4000> ; 1332 error
597 000764' 000000 000040
598 000765' 133300 000000 MWORD <CONT,A=17,B=4,SDQ,SMIN,D=5> ; 1333
599 000766' 615172 000340
600 000767' 133413 360000 MWORD <CJV,J=1336,S0Q,OR,D=1,CENA,CCFZ> ; 1334
601 000770' 231400 020140
602 000771' 133540 000000 MWORD <JMAP,J=4000> ; 1335 error
.MAIN MACRO %53A(1152) 09:55 16-Oct-84 Page 4-9
DFPTA5 MAC 19-Jan-83 11:21 Register Interference Tests SEQ 1105
603 000772' 000000 000040
604 000773' 133600 000000 MWORD <CONT,A=0,B=5,SDQ,SMIN,D=7> ; 1336
605 000774' 617002 400340
606 000775' 133713 410000 MWORD <CJV,J=1341,S0Q,OR,D=1,CENA,CCFZ> ; 1337
607 000776' 231400 020140
608 000777' 134040 000000 MWORD <JMAP,J=4000> ; 1340 error
609 001000' 000000 000040
610 001001' 134100 000000 MWORD <CONT,A=6,B=13,SD0,SMIN,D=1> ; 1341
611 001002' 711065 400340
612 001003' 134213 440000 MWORD <CJV,J=1344,S0Q,OR,D=1,CENA,CCFZ> ; 1342
613 001004' 231400 020140
614 001005' 134340 000000 MWORD <JMAP,J=4000> ; 1343 error
615 001006' 000000 000040
616 001007' 134400 000000 MWORD <CONT,A=7,B=14,SD0,SMIN,D=2> ; 1344
617 001010' 712076 000340
618 001011' 134513 470000 MWORD <CJV,J=1347,S0Q,OR,D=1,CENA,CCFZ> ; 1345
619 001012' 231400 020140
620 001013' 134640 000000 MWORD <JMAP,J=4000> ; 1346 error
621 001014' 000000 000040
622 001015' 134700 000000 MWORD <CONT,A=10,B=15,SD0,SMIN,D=3> ; 1347
623 001016' 713106 400340
624 001017' 135013 520000 MWORD <CJV,J=1352,S0Q,OR,D=1,CENA,CCFZ> ; 1350
625 001020' 231400 020140
626 001021' 135140 000000 MWORD <JMAP,J=4000> ; 1351 error
627 001022' 000000 000040
628 001023' 135200 000000 MWORD <CONT,A=11,B=16,SD0,SMIN,D=5> ; 1352
629 001024' 715117 000340
630 001025' 135313 550000 MWORD <CJV,J=1355,S0Q,OR,D=1,CENA,CCFZ> ; 1353
631 001026' 231400 020140
632 001027' 135440 000000 MWORD <JMAP,J=4000> ; 1354 error
633 001030' 000000 000040
634 001031' 135500 000000 MWORD <CONT,A=12,B=17,SD0,SMIN,D=7> ; 1355
635 001032' 717127 400340
636 001033' 135613 600000 MWORD <CJV,J=1360,S0Q,OR,D=1,CENA,CCFZ> ; 1356
637 001034' 231400 020140
638 001035' 135740 000000 MWORD <JMAP,J=4000> ; 1357 error
639 001036' 000000 000040
640 001037' 136000 000000 MWORD <CONT,A=0,B=5,SAQ,RMIN,D=1> ; 1360
641 001040' 021002 400340
642 001041' 136113 630000 MWORD <CJV,J=1363,S0Q,OR,D=1,CENA,CCFZ> ; 1361
643 001042' 231400 020140
644 001043' 136240 000000 MWORD <JMAP,J=4000> ; 1362 error
645 001044' 000000 000040
646 001045' 136300 000000 MWORD <CONT,A=1,B=6,SAQ,RMIN,D=2> ; 1363
647 001046' 022013 000340
648 001047' 136413 660000 MWORD <CJV,J=1366,S0Q,OR,D=1,CENA,CCFZ> ; 1364
649 001050' 231400 020140
650 001051' 136540 000000 MWORD <JMAP,J=4000> ; 1365 error
651 001052' 000000 000040
652 001053' 136600 000000 MWORD <CONT,A=2,B=7,SAQ,RMIN,D=3> ; 1366
653 001054' 023023 400340
654 001055' 136713 710000 MWORD <CJV,J=1371,S0Q,OR,D=1,CENA,CCFZ> ; 1367
655 001056' 231400 020140
656 001057' 137040 000000 MWORD <JMAP,J=4000> ; 1370 error
657 001060' 000000 000040
.MAIN MACRO %53A(1152) 09:55 16-Oct-84 Page 4-10
DFPTA5 MAC 19-Jan-83 11:21 Register Interference Tests SEQ 1106
658 001061' 137100 000000 MWORD <CONT,A=3,B=10,SAQ,RMIN,D=5> ; 1371
659 001062' 025034 000340
660 001063' 137213 740000 MWORD <CJV,J=1374,S0Q,OR,D=1,CENA,CCFZ> ; 1372
661 001064' 231400 020140
662 001065' 137340 000000 MWORD <JMAP,J=4000> ; 1373 error
663 001066' 000000 000040
664 001067' 137400 000000 MWORD <CONT,A=4,B=11,SAQ,RMIN,D=7> ; 1374
665 001070' 027044 400340
666 001071' 137513 770000 MWORD <CJV,J=1377,S0Q,OR,D=1,CENA,CCFZ> ; 1375
667 001072' 231400 020140
668 001073' 137640 000000 MWORD <JMAP,J=4000> ; 1376 error
669 001074' 000000 000040
670 001075' 137700 000000 MWORD <CONT,A=12,B=17,SAB,RMIN,D=1> ; 1377
671 001076' 121127 400340
672 001077' 140014 020000 MWORD <CJV,J=1402,S0Q,OR,D=1,CENA,CCFZ> ; 1400
673 001100' 231400 020140
674 001101' 140140 000000 MWORD <JMAP,J=4000> ; 1401 error
675 001102' 000000 000040
676 001103' 140200 000000 MWORD <CONT,A=13,B=0,SAB,RMIN,D=2> ; 1402
677 001104' 122130 000340
678 001105' 140314 050000 MWORD <CJV,J=1405,S0Q,OR,D=1,CENA,CCFZ> ; 1403
679 001106' 231400 020140
680 001107' 140440 000000 MWORD <JMAP,J=4000> ; 1404 error
681 001110' 000000 000040
682 001111' 140500 000000 MWORD <CONT,A=14,B=1,SAB,RMIN,D=3> ; 1405
683 001112' 123140 400340
684 001113' 140614 100000 MWORD <CJV,J=1410,S0Q,OR,D=1,CENA,CCFZ> ; 1406
685 001114' 231400 020140
686 001115' 140740 000000 MWORD <JMAP,J=4000> ; 1407 error
687 001116' 000000 000040
688 001117' 141000 000000 MWORD <CONT,A=15,B=2,SAB,RMIN,D=5> ; 1410
689 001120' 125151 000340
690 001121' 141114 130000 MWORD <CJV,J=1413,S0Q,OR,D=1,CENA,CCFZ> ; 1411
691 001122' 231400 020140
692 001123' 141240 000000 MWORD <JMAP,J=4000> ; 1412 error
693 001124' 000000 000040
694 001125' 141300 000000 MWORD <CONT,A=16,B=3,SAB,RMIN,D=7> ; 1413
695 001126' 127161 400340
696 001127' 141414 160000 MWORD <CJV,J=1416,S0Q,OR,D=1,CENA,CCFZ> ; 1414
697 001130' 231400 020140
698 001131' 141540 000000 MWORD <JMAP,J=4000> ; 1415 error
699 001132' 000000 000040
700 001133' 141600 000000 MWORD <CONT,A=4,B=11,S0Q,RMIN,D=1> ; 1416
701 001134' 221044 400340
702 001135' 141714 210000 MWORD <CJV,J=1421,S0Q,OR,D=1,CENA,CCFZ> ; 1417
703 001136' 231400 020140
704 001137' 142040 000000 MWORD <JMAP,J=4000> ; 1420 error
705 001140' 000000 000040
706 001141' 142100 000000 MWORD <CONT,A=5,B=12,S0Q,RMIN,D=2> ; 1421
707 001142' 222055 000340
708 001143' 142214 240000 MWORD <CJV,J=1424,S0Q,OR,D=1,CENA,CCFZ> ; 1422
709 001144' 231400 020140
710 001145' 142340 000000 MWORD <JMAP,J=4000> ; 1423 error
711 001146' 000000 000040
712 001147' 142400 000000 MWORD <CONT,A=6,B=13,S0Q,RMIN,D=3> ; 1424
.MAIN MACRO %53A(1152) 09:55 16-Oct-84 Page 4-11
DFPTA5 MAC 19-Jan-83 11:21 Register Interference Tests SEQ 1107
713 001150' 223065 400340
714 001151' 142514 270000 MWORD <CJV,J=1427,S0Q,OR,D=1,CENA,CCFZ> ; 1425
715 001152' 231400 020140
716 001153' 142640 000000 MWORD <JMAP,J=4000> ; 1426 error
717 001154' 000000 000040
718 001155' 142700 000000 MWORD <CONT,A=7,B=14,S0Q,RMIN,D=5> ; 1427
719 001156' 225076 000340
720 001157' 143014 320000 MWORD <CJV,J=1432,S0Q,OR,D=1,CENA,CCFZ> ; 1430
721 001160' 231400 020140
722 001161' 143140 000000 MWORD <JMAP,J=4000> ; 1431 error
723 001162' 000000 000040
724 001163' 143200 000000 MWORD <CONT,A=10,B=15,S0Q,RMIN,D=7> ; 1432
725 001164' 227106 400340
726 001165' 143314 350000 MWORD <CJV,J=1435,S0Q,OR,D=1,CENA,CCFZ> ; 1433
727 001166' 231400 020140
728 001167' 143440 000000 MWORD <JMAP,J=4000> ; 1434 error
729 001170' 000000 000040
730 001171' 143500 000000 MWORD <CONT,A=16,B=3,S0B,RMIN,D=1> ; 1435
731 001172' 321161 400340
732 001173' 143614 400000 MWORD <CJV,J=1440,S0Q,OR,D=1,CENA,CCFZ> ; 1436
733 001174' 231400 020140
734 001175' 143740 000000 MWORD <JMAP,J=4000> ; 1437 error
735 001176' 000000 000040
736 001177' 144000 000000 MWORD <CONT,A=17,B=4,S0B,RMIN,D=2> ; 1440
737 001200' 322172 000340
738 001201' 144114 430000 MWORD <CJV,J=1443,S0Q,OR,D=1,CENA,CCFZ> ; 1441
739 001202' 231400 020140
740 001203' 144240 000000 MWORD <JMAP,J=4000> ; 1442 error
741 001204' 000000 000040
742 001205' 144300 000000 MWORD <CONT,A=0,B=5,S0B,RMIN,D=3> ; 1443
743 001206' 323002 400340
744 001207' 144414 460000 MWORD <CJV,J=1446,S0Q,OR,D=1,CENA,CCFZ> ; 1444
745 001210' 231400 020140
746 001211' 144540 000000 MWORD <JMAP,J=4000> ; 1445 error
747 001212' 000000 000040
748 001213' 144600 000000 MWORD <CONT,A=1,B=6,S0B,RMIN,D=5> ; 1446
749 001214' 325013 000340
750 001215' 144714 510000 MWORD <CJV,J=1451,S0Q,OR,D=1,CENA,CCFZ> ; 1447
751 001216' 231400 020140
752 001217' 145040 000000 MWORD <JMAP,J=4000> ; 1450 error
753 001220' 000000 000040
754 001221' 145100 000000 MWORD <CONT,A=2,B=7,S0B,RMIN,D=7> ; 1451
755 001222' 327023 400340
756 001223' 145214 540000 MWORD <CJV,J=1454,S0Q,OR,D=1,CENA,CCFZ> ; 1452
757 001224' 231400 020140
758 001225' 145340 000000 MWORD <JMAP,J=4000> ; 1453 error
759 001226' 000000 000040
760 001227' 145400 000000 MWORD <CONT,A=10,B=15,S0A,RMIN,D=1> ; 1454
761 001230' 421106 400340
762 001231' 145514 570000 MWORD <CJV,J=1457,S0Q,OR,D=1,CENA,CCFZ> ; 1455
763 001232' 231400 020140
764 001233' 145640 000000 MWORD <JMAP,J=4000> ; 1456 error
765 001234' 000000 000040
766 001235' 145700 000000 MWORD <CONT,A=11,B=16,S0A,RMIN,D=2> ; 1457
767 001236' 422117 000340
.MAIN MACRO %53A(1152) 09:55 16-Oct-84 Page 4-12
DFPTA5 MAC 19-Jan-83 11:21 Register Interference Tests SEQ 1108
768 001237' 146014 620000 MWORD <CJV,J=1462,S0Q,OR,D=1,CENA,CCFZ> ; 1460
769 001240' 231400 020140
770 001241' 146140 000000 MWORD <JMAP,J=4000> ; 1461 error
771 001242' 000000 000040
772 001243' 146200 000000 MWORD <CONT,A=12,B=17,S0A,RMIN,D=3> ; 1462
773 001244' 423127 400340
774 001245' 146314 650000 MWORD <CJV,J=1465,S0Q,OR,D=1,CENA,CCFZ> ; 1463
775 001246' 231400 020140
776 001247' 146440 000000 MWORD <JMAP,J=4000> ; 1464 error
777 001250' 000000 000040
778 001251' 146500 000000 MWORD <CONT,A=13,B=0,S0A,RMIN,D=5> ; 1465
779 001252' 425130 000340
780 001253' 146614 700000 MWORD <CJV,J=1470,S0Q,OR,D=1,CENA,CCFZ> ; 1466
781 001254' 231400 020140
782 001255' 146740 000000 MWORD <JMAP,J=4000> ; 1467 error
783 001256' 000000 000040
784 001257' 147000 000000 MWORD <CONT,A=14,B=1,S0A,RMIN,D=7> ; 1470
785 001260' 427140 400340
786 001261' 147114 730000 MWORD <CJV,J=1473,S0Q,OR,D=1,CENA,CCFZ> ; 1471
787 001262' 231400 020140
788 001263' 147240 000000 MWORD <JMAP,J=4000> ; 1472 error
789 001264' 000000 000040
790 001265' 147300 000000 MWORD <CONT,A=2,B=7,SDA,RMIN,D=1> ; 1473
791 001266' 521023 400340
792 001267' 147414 760000 MWORD <CJV,J=1476,S0Q,OR,D=1,CENA,CCFZ> ; 1474
793 001270' 231400 020140
794 001271' 147540 000000 MWORD <JMAP,J=4000> ; 1475 error
795 001272' 000000 000040
796 001273' 147600 000000 MWORD <CONT,A=3,B=10,SDA,RMIN,D=2> ; 1476
797 001274' 522034 000340
798 001275' 147715 010000 MWORD <CJV,J=1501,S0Q,OR,D=1,CENA,CCFZ> ; 1477
799 001276' 231400 020140
800 001277' 150040 000000 MWORD <JMAP,J=4000> ; 1500 error
801 001300' 000000 000040
802 001301' 150100 000000 MWORD <CONT,A=4,B=11,SDA,RMIN,D=3> ; 1501
803 001302' 523044 400340
804 001303' 150215 040000 MWORD <CJV,J=1504,S0Q,OR,D=1,CENA,CCFZ> ; 1502
805 001304' 231400 020140
806 001305' 150340 000000 MWORD <JMAP,J=4000> ; 1503 error
807 001306' 000000 000040
808 001307' 150400 000000 MWORD <CONT,A=5,B=12,SDA,RMIN,D=5> ; 1504
809 001310' 525055 000340
810 001311' 150515 070000 MWORD <CJV,J=1507,S0Q,OR,D=1,CENA,CCFZ> ; 1505
811 001312' 231400 020140
812 001313' 150640 000000 MWORD <JMAP,J=4000> ; 1506 error
813 001314' 000000 000040
814 001315' 150700 000000 MWORD <CONT,A=6,B=13,SDA,RMIN,D=7> ; 1507
815 001316' 527065 400340
816 001317' 151015 120000 MWORD <CJV,J=1512,S0Q,OR,D=1,CENA,CCFZ> ; 1510
817 001320' 231400 020140
818 001321' 151140 000000 MWORD <JMAP,J=4000> ; 1511 error
819 001322' 000000 000040
820 001323' 151200 000000 MWORD <CONT,A=14,B=1,SDQ,RMIN,D=1> ; 1512
821 001324' 621140 400340
822 001325' 151315 150000 MWORD <CJV,J=1515,S0Q,OR,D=1,CENA,CCFZ> ; 1513
.MAIN MACRO %53A(1152) 09:55 16-Oct-84 Page 4-13
DFPTA5 MAC 19-Jan-83 11:21 Register Interference Tests SEQ 1109
823 001326' 231400 020140
824 001327' 151440 000000 MWORD <JMAP,J=4000> ; 1514 error
825 001330' 000000 000040
826 001331' 151500 000000 MWORD <CONT,A=15,B=2,SDQ,RMIN,D=2> ; 1515
827 001332' 622151 000340
828 001333' 151615 200000 MWORD <CJV,J=1520,S0Q,OR,D=1,CENA,CCFZ> ; 1516
829 001334' 231400 020140
830 001335' 151740 000000 MWORD <JMAP,J=4000> ; 1517 error
831 001336' 000000 000040
832 001337' 152000 000000 MWORD <CONT,A=16,B=3,SDQ,RMIN,D=3> ; 1520
833 001340' 623161 400340
834 001341' 152115 230000 MWORD <CJV,J=1523,S0Q,OR,D=1,CENA,CCFZ> ; 1521
835 001342' 231400 020140
836 001343' 152240 000000 MWORD <JMAP,J=4000> ; 1522 error
837 001344' 000000 000040
838 001345' 152300 000000 MWORD <CONT,A=17,B=4,SDQ,RMIN,D=5> ; 1523
839 001346' 625172 000340
840 001347' 152415 260000 MWORD <CJV,J=1526,S0Q,OR,D=1,CENA,CCFZ> ; 1524
841 001350' 231400 020140
842 001351' 152540 000000 MWORD <JMAP,J=4000> ; 1525 error
843 001352' 000000 000040
844 001353' 152600 000000 MWORD <CONT,A=0,B=5,SDQ,RMIN,D=7> ; 1526
845 001354' 627002 400340
846 001355' 152715 310000 MWORD <CJV,J=1531,S0Q,OR,D=1,CENA,CCFZ> ; 1527
847 001356' 231400 020140
848 001357' 153040 000000 MWORD <JMAP,J=4000> ; 1530 error
849 001360' 000000 000040
850 001361' 153100 000000 MWORD <CONT,A=6,B=13,SD0,RMIN,D=1> ; 1531
851 001362' 721065 400340
852 001363' 153215 340000 MWORD <CJV,J=1534,S0Q,OR,D=1,CENA,CCFZ> ; 1532
853 001364' 231400 020140
854 001365' 153340 000000 MWORD <JMAP,J=4000> ; 1533 error
855 001366' 000000 000040
856 001367' 153400 000000 MWORD <CONT,A=7,B=14,SD0,RMIN,D=2> ; 1534
857 001370' 722076 000340
858 001371' 153515 370000 MWORD <CJV,J=1537,S0Q,OR,D=1,CENA,CCFZ> ; 1535
859 001372' 231400 020140
860 001373' 153640 000000 MWORD <JMAP,J=4000> ; 1536 error
861 001374' 000000 000040
862 001375' 153700 000000 MWORD <CONT,A=10,B=15,SD0,RMIN,D=3> ; 1537
863 001376' 723106 400340
864 001377' 154015 420000 MWORD <CJV,J=1542,S0Q,OR,D=1,CENA,CCFZ> ; 1540
865 001400' 231400 020140
866 001401' 154140 000000 MWORD <JMAP,J=4000> ; 1541 error
867 001402' 000000 000040
868 001403' 154200 000000 MWORD <CONT,A=11,B=16,SD0,RMIN,D=5> ; 1542
869 001404' 725117 000340
870 001405' 154315 450000 MWORD <CJV,J=1545,S0Q,OR,D=1,CENA,CCFZ> ; 1543
871 001406' 231400 020140
872 001407' 154440 000000 MWORD <JMAP,J=4000> ; 1544 error
873 001410' 000000 000040
874 001411' 154500 000000 MWORD <CONT,A=12,B=17,SD0,RMIN,D=7> ; 1545
875 001412' 727127 400340
876 001413' 154615 500000 MWORD <CJV,J=1550,S0Q,OR,D=1,CENA,CCFZ> ; 1546
877 001414' 231400 020140
.MAIN MACRO %53A(1152) 09:55 16-Oct-84 Page 4-14
DFPTA5 MAC 19-Jan-83 11:21 Register Interference Tests SEQ 1110
878 001415' 154740 000000 MWORD <JMAP,J=4000> ; 1547 error
879 001416' 000000 000040
880 001417' 155000 000000 MWORD <CONT,A=0,B=5,SAQ,OR,D=1> ; 1550
881 001420' 031002 400340
882 001421' 155115 530000 MWORD <CJV,J=1553,S0Q,OR,D=1,CENA,CCFZ> ; 1551
883 001422' 231400 020140
884 001423' 155240 000000 MWORD <JMAP,J=4000> ; 1552 error
885 001424' 000000 000040
886 001425' 155300 000000 MWORD <CONT,A=1,B=6,SAQ,OR,D=2> ; 1553
887 001426' 032013 000340
888 001427' 155415 560000 MWORD <CJV,J=1556,S0Q,OR,D=1,CENA,CCFZ> ; 1554
889 001430' 231400 020140
890 001431' 155540 000000 MWORD <JMAP,J=4000> ; 1555 error
891 001432' 000000 000040
892 001433' 155600 000000 MWORD <CONT,A=2,B=7,SAQ,OR,D=3> ; 1556
893 001434' 033023 400340
894 001435' 155715 610000 MWORD <CJV,J=1561,S0Q,OR,D=1,CENA,CCFZ> ; 1557
895 001436' 231400 020140
896 001437' 156040 000000 MWORD <JMAP,J=4000> ; 1560 error
897 001440' 000000 000040
898 001441' 156100 000000 MWORD <CONT,A=3,B=10,SAQ,OR,D=5> ; 1561
899 001442' 035034 000340
900 001443' 156215 640000 MWORD <CJV,J=1564,S0Q,OR,D=1,CENA,CCFZ> ; 1562
901 001444' 231400 020140
902 001445' 156340 000000 MWORD <JMAP,J=4000> ; 1563 error
903 001446' 000000 000040
904 001447' 156400 000000 MWORD <CONT,A=4,B=11,SAQ,OR,D=7> ; 1564
905 001450' 037044 400340
906 001451' 156515 670000 MWORD <CJV,J=1567,S0Q,OR,D=1,CENA,CCFZ> ; 1565
907 001452' 231400 020140
908 001453' 156640 000000 MWORD <JMAP,J=4000> ; 1566 error
909 001454' 000000 000040
910 001455' 156700 000000 MWORD <CONT,A=12,B=17,SAB,OR,D=1> ; 1567
911 001456' 131127 400340
912 001457' 157015 720000 MWORD <CJV,J=1572,S0Q,OR,D=1,CENA,CCFZ> ; 1570
913 001460' 231400 020140
914 001461' 157140 000000 MWORD <JMAP,J=4000> ; 1571 error
915 001462' 000000 000040
916 001463' 157200 000000 MWORD <CONT,A=13,B=0,SAB,OR,D=2> ; 1572
917 001464' 132130 000340
918 001465' 157315 750000 MWORD <CJV,J=1575,S0Q,OR,D=1,CENA,CCFZ> ; 1573
919 001466' 231400 020140
920 001467' 157440 000000 MWORD <JMAP,J=4000> ; 1574 error
921 001470' 000000 000040
922 001471' 157500 000000 MWORD <CONT,A=14,B=1,SAB,OR,D=3> ; 1575
923 001472' 133140 400340
924 001473' 157616 000000 MWORD <CJV,J=1600,S0Q,OR,D=1,CENA,CCFZ> ; 1576
925 001474' 231400 020140
926 001475' 157740 000000 MWORD <JMAP,J=4000> ; 1577 error
927 001476' 000000 000040
928 001477' 160000 000000 MWORD <CONT,A=15,B=2,SAB,OR,D=5> ; 1600
929 001500' 135151 000340
930 001501' 160116 030000 MWORD <CJV,J=1603,S0Q,OR,D=1,CENA,CCFZ> ; 1601
931 001502' 231400 020140
932 001503' 160240 000000 MWORD <JMAP,J=4000> ; 1602 error
.MAIN MACRO %53A(1152) 09:55 16-Oct-84 Page 4-15
DFPTA5 MAC 19-Jan-83 11:21 Register Interference Tests SEQ 1111
933 001504' 000000 000040
934 001505' 160300 000000 MWORD <CONT,A=16,B=3,SAB,OR,D=7> ; 1603
935 001506' 137161 400340
936 001507' 160416 060000 MWORD <CJV,J=1606,S0Q,OR,D=1,CENA,CCFZ> ; 1604
937 001510' 231400 020140
938 001511' 160540 000000 MWORD <JMAP,J=4000> ; 1605 error
939 001512' 000000 000040
940 001513' 160600 000000 MWORD <CONT,A=4,B=11,S0Q,OR,D=1> ; 1606
941 001514' 231044 400340
942 001515' 160716 110000 MWORD <CJV,J=1611,S0Q,OR,D=1,CENA,CCFZ> ; 1607
943 001516' 231400 020140
944 001517' 161040 000000 MWORD <JMAP,J=4000> ; 1610 error
945 001520' 000000 000040
946 001521' 161100 000000 MWORD <CONT,A=5,B=12,S0Q,OR,D=2> ; 1611
947 001522' 232055 000340
948 001523' 161216 140000 MWORD <CJV,J=1614,S0Q,OR,D=1,CENA,CCFZ> ; 1612
949 001524' 231400 020140
950 001525' 161340 000000 MWORD <JMAP,J=4000> ; 1613 error
951 001526' 000000 000040
952 001527' 161400 000000 MWORD <CONT,A=6,B=13,S0Q,OR,D=3> ; 1614
953 001530' 233065 400340
954 001531' 161516 170000 MWORD <CJV,J=1617,S0Q,OR,D=1,CENA,CCFZ> ; 1615
955 001532' 231400 020140
956 001533' 161640 000000 MWORD <JMAP,J=4000> ; 1616 error
957 001534' 000000 000040
958 001535' 161700 000000 MWORD <CONT,A=7,B=14,S0Q,OR,D=5> ; 1617
959 001536' 235076 000340
960 001537' 162016 220000 MWORD <CJV,J=1622,S0Q,OR,D=1,CENA,CCFZ> ; 1620
961 001540' 231400 020140
962 001541' 162140 000000 MWORD <JMAP,J=4000> ; 1621 error
963 001542' 000000 000040
964 001543' 162200 000000 MWORD <CONT,A=10,B=15,S0Q,OR,D=7> ; 1622
965 001544' 237106 400340
966 001545' 162316 250000 MWORD <CJV,J=1625,S0Q,OR,D=1,CENA,CCFZ> ; 1623
967 001546' 231400 020140
968 001547' 162440 000000 MWORD <JMAP,J=4000> ; 1624 error
969 001550' 000000 000040
970 001551' 162500 000000 MWORD <CONT,A=16,B=3,S0B,OR,D=1> ; 1625
971 001552' 331161 400340
972 001553' 162616 300000 MWORD <CJV,J=1630,S0Q,OR,D=1,CENA,CCFZ> ; 1626
973 001554' 231400 020140
974 001555' 162740 000000 MWORD <JMAP,J=4000> ; 1627 error
975 001556' 000000 000040
976 001557' 163000 000000 MWORD <CONT,A=17,B=4,S0B,OR,D=2> ; 1630
977 001560' 332172 000340
978 001561' 163116 330000 MWORD <CJV,J=1633,S0Q,OR,D=1,CENA,CCFZ> ; 1631
979 001562' 231400 020140
980 001563' 163240 000000 MWORD <JMAP,J=4000> ; 1632 error
981 001564' 000000 000040
982 001565' 163300 000000 MWORD <CONT,A=0,B=5,S0B,OR,D=3> ; 1633
983 001566' 333002 400340
984 001567' 163416 360000 MWORD <CJV,J=1636,S0Q,OR,D=1,CENA,CCFZ> ; 1634
985 001570' 231400 020140
986 001571' 163540 000000 MWORD <JMAP,J=4000> ; 1635 error
987 001572' 000000 000040
.MAIN MACRO %53A(1152) 09:55 16-Oct-84 Page 4-16
DFPTA5 MAC 19-Jan-83 11:21 Register Interference Tests SEQ 1112
988 001573' 163600 000000 MWORD <CONT,A=1,B=6,S0B,OR,D=5> ; 1636
989 001574' 335013 000340
990 001575' 163716 410000 MWORD <CJV,J=1641,S0Q,OR,D=1,CENA,CCFZ> ; 1637
991 001576' 231400 020140
992 001577' 164040 000000 MWORD <JMAP,J=4000> ; 1640 error
993 001600' 000000 000040
994 001601' 164100 000000 MWORD <CONT,A=2,B=7,S0B,OR,D=7> ; 1641
995 001602' 337023 400340
996 001603' 164216 440000 MWORD <CJV,J=1644,S0Q,OR,D=1,CENA,CCFZ> ; 1642
997 001604' 231400 020140
998 001605' 164340 000000 MWORD <JMAP,J=4000> ; 1643 error
999 001606' 000000 000040
1000 001607' 164400 000000 MWORD <CONT,A=10,B=15,S0A,OR,D=1> ; 1644
1001 001610' 431106 400340
1002 001611' 164516 470000 MWORD <CJV,J=1647,S0Q,OR,D=1,CENA,CCFZ> ; 1645
1003 001612' 231400 020140
1004 001613' 164640 000000 MWORD <JMAP,J=4000> ; 1646 error
1005 001614' 000000 000040
1006 001615' 164700 000000 MWORD <CONT,A=11,B=16,S0A,OR,D=2> ; 1647
1007 001616' 432117 000340
1008 001617' 165016 520000 MWORD <CJV,J=1652,S0Q,OR,D=1,CENA,CCFZ> ; 1650
1009 001620' 231400 020140
1010 001621' 165140 000000 MWORD <JMAP,J=4000> ; 1651 error
1011 001622' 000000 000040
1012 001623' 165200 000000 MWORD <CONT,A=12,B=17,S0A,OR,D=3> ; 1652
1013 001624' 433127 400340
1014 001625' 165316 550000 MWORD <CJV,J=1655,S0Q,OR,D=1,CENA,CCFZ> ; 1653
1015 001626' 231400 020140
1016 001627' 165440 000000 MWORD <JMAP,J=4000> ; 1654 error
1017 001630' 000000 000040
1018 001631' 165500 000000 MWORD <CONT,A=13,B=0,S0A,OR,D=5> ; 1655
1019 001632' 435130 000340
1020 001633' 165616 600000 MWORD <CJV,J=1660,S0Q,OR,D=1,CENA,CCFZ> ; 1656
1021 001634' 231400 020140
1022 001635' 165740 000000 MWORD <JMAP,J=4000> ; 1657 error
1023 001636' 000000 000040
1024 001637' 166000 000000 MWORD <CONT,A=14,B=1,S0A,OR,D=7> ; 1660
1025 001640' 437140 400340
1026 001641' 166116 630000 MWORD <CJV,J=1663,S0Q,OR,D=1,CENA,CCFZ> ; 1661
1027 001642' 231400 020140
1028 001643' 166240 000000 MWORD <JMAP,J=4000> ; 1662 error
1029 001644' 000000 000040
1030 001645' 166300 000000 MWORD <CONT,A=2,B=7,SDA,OR,D=1> ; 1663
1031 001646' 531023 400340
1032 001647' 166416 660000 MWORD <CJV,J=1666,S0Q,OR,D=1,CENA,CCFZ> ; 1664
1033 001650' 231400 020140
1034 001651' 166540 000000 MWORD <JMAP,J=4000> ; 1665 error
1035 001652' 000000 000040
1036 001653' 166600 000000 MWORD <CONT,A=3,B=10,SDA,OR,D=2> ; 1666
1037 001654' 532034 000340
1038 001655' 166716 710000 MWORD <CJV,J=1671,S0Q,OR,D=1,CENA,CCFZ> ; 1667
1039 001656' 231400 020140
1040 001657' 167040 000000 MWORD <JMAP,J=4000> ; 1670 error
1041 001660' 000000 000040
1042 001661' 167100 000000 MWORD <CONT,A=4,B=11,SDA,OR,D=3> ; 1671
.MAIN MACRO %53A(1152) 09:55 16-Oct-84 Page 4-17
DFPTA5 MAC 19-Jan-83 11:21 Register Interference Tests SEQ 1113
1043 001662' 533044 400340
1044 001663' 167216 740000 MWORD <CJV,J=1674,S0Q,OR,D=1,CENA,CCFZ> ; 1672
1045 001664' 231400 020140
1046 001665' 167340 000000 MWORD <JMAP,J=4000> ; 1673 error
1047 001666' 000000 000040
1048 001667' 167400 000000 MWORD <CONT,A=5,B=12,SDA,OR,D=5> ; 1674
1049 001670' 535055 000340
1050 001671' 167516 770000 MWORD <CJV,J=1677,S0Q,OR,D=1,CENA,CCFZ> ; 1675
1051 001672' 231400 020140
1052 001673' 167640 000000 MWORD <JMAP,J=4000> ; 1676 error
1053 001674' 000000 000040
1054 001675' 167700 000000 MWORD <CONT,A=6,B=13,SDA,OR,D=7> ; 1677
1055 001676' 537065 400340
1056 001677' 170017 020000 MWORD <CJV,J=1702,S0Q,OR,D=1,CENA,CCFZ> ; 1700
1057 001700' 231400 020140
1058 001701' 170140 000000 MWORD <JMAP,J=4000> ; 1701 error
1059 001702' 000000 000040
1060 001703' 170200 000000 MWORD <CONT,A=14,B=1,SDQ,OR,D=1> ; 1702
1061 001704' 631140 400340
1062 001705' 170317 050000 MWORD <CJV,J=1705,S0Q,OR,D=1,CENA,CCFZ> ; 1703
1063 001706' 231400 020140
1064 001707' 170440 000000 MWORD <JMAP,J=4000> ; 1704 error
1065 001710' 000000 000040
1066 001711' 170500 000000 MWORD <CONT,A=15,B=2,SDQ,OR,D=2> ; 1705
1067 001712' 632151 000340
1068 001713' 170617 100000 MWORD <CJV,J=1710,S0Q,OR,D=1,CENA,CCFZ> ; 1706
1069 001714' 231400 020140
1070 001715' 170740 000000 MWORD <JMAP,J=4000> ; 1707 error
1071 001716' 000000 000040
1072 001717' 171000 000000 MWORD <CONT,A=16,B=3,SDQ,OR,D=3> ; 1710
1073 001720' 633161 400340
1074 001721' 171117 130000 MWORD <CJV,J=1713,S0Q,OR,D=1,CENA,CCFZ> ; 1711
1075 001722' 231400 020140
1076 001723' 171240 000000 MWORD <JMAP,J=4000> ; 1712 error
1077 001724' 000000 000040
1078 001725' 171300 000000 MWORD <CONT,A=17,B=4,SDQ,OR,D=5> ; 1713
1079 001726' 635172 000340
1080 001727' 171417 160000 MWORD <CJV,J=1716,S0Q,OR,D=1,CENA,CCFZ> ; 1714
1081 001730' 231400 020140
1082 001731' 171500 000000 MWORD <CONT,A=0,B=5,SDQ,OR,D=7> ; 1715
1083 001732' 637002 400340
1084 001733' 171617 200000 MWORD <CJV,J=1720,S0Q,OR,D=1,CENA,CCFZ> ; 1716
1085 001734' 231400 020140
1086 001735' 171740 000000 MWORD <JMAP,J=4000> ; 1717 error
1087 001736' 000000 000040
1088 001737' 172000 000000 MWORD <CONT,A=6,B=13,SD0,OR,D=1> ; 1720
1089 001740' 731065 400340
1090 001741' 172117 230000 MWORD <CJV,J=1723,S0Q,OR,D=1,CENA,CCFZ> ; 1721
1091 001742' 231400 020140
1092 001743' 172240 000000 MWORD <JMAP,J=4000> ; 1722 error
1093 001744' 000000 000040
1094 001745' 172300 000000 MWORD <CONT,A=7,B=14,SD0,OR,D=2> ; 1723
1095 001746' 732076 000340
1096 001747' 172417 260000 MWORD <CJV,J=1726,S0Q,OR,D=1,CENA,CCFZ> ; 1724
1097 001750' 231400 020140
.MAIN MACRO %53A(1152) 09:55 16-Oct-84 Page 4-18
DFPTA5 MAC 19-Jan-83 11:21 Register Interference Tests SEQ 1114
1098 001751' 172540 000000 MWORD <JMAP,J=4000> ; 1725 error
1099 001752' 000000 000040
1100 001753' 172600 000000 MWORD <CONT,A=10,B=15,SD0,OR,D=3> ; 1726
1101 001754' 733106 400340
1102 001755' 172717 310000 MWORD <CJV,J=1731,S0Q,OR,D=1,CENA,CCFZ> ; 1727
1103 001756' 231400 020140
1104 001757' 173040 000000 MWORD <JMAP,J=4000> ; 1730 error
1105 001760' 000000 000040
1106 001761' 173100 000000 MWORD <CONT,A=11,B=16,SD0,OR,D=5> ; 1731
1107 001762' 735117 000340
1108 001763' 173217 340000 MWORD <CJV,J=1734,S0Q,OR,D=1,CENA,CCFZ> ; 1732
1109 001764' 231400 020140
1110 001765' 173340 000000 MWORD <JMAP,J=4000> ; 1733 error
1111 001766' 000000 000040
1112 001767' 173400 000000 MWORD <CONT,A=12,B=17,SD0,OR,D=7> ; 1734
1113 001770' 737127 400340
1114 001771' 173517 370000 MWORD <CJV,J=1737,S0Q,OR,D=1,CENA,CCFZ> ; 1735
1115 001772' 231400 020140
1116 001773' 173640 000000 MWORD <JMAP,J=4000> ; 1736 error
1117 001774' 000000 000040
1118 001775' 173700 000000 MWORD <CONT,A=0,B=5,SAQ,AND,D=1> ; 1737
1119 001776' 041002 400340
1120 001777' 174017 420000 MWORD <CJV,J=1742,S0Q,OR,D=1,CENA,CCFZ> ; 1740
1121 002000' 231400 020140
1122 002001' 174140 000000 MWORD <JMAP,J=4000> ; 1741 error
1123 002002' 000000 000040
1124 002003' 174200 000000 MWORD <CONT,A=1,B=6,SAQ,AND,D=2> ; 1742
1125 002004' 042013 000340
1126 002005' 174317 450000 MWORD <CJV,J=1745,S0Q,OR,D=1,CENA,CCFZ> ; 1743
1127 002006' 231400 020140
1128 002007' 174440 000000 MWORD <JMAP,J=4000> ; 1744 error
1129 002010' 000000 000040
1130 002011' 174500 000000 MWORD <CONT,A=2,B=7,SAQ,AND,D=3> ; 1745
1131 002012' 043023 400340
1132 002013' 174617 500000 MWORD <CJV,J=1750,S0Q,OR,D=1,CENA,CCFZ> ; 1746
1133 002014' 231400 020140
1134 002015' 174740 000000 MWORD <JMAP,J=4000> ; 1747 error
1135 002016' 000000 000040
1136 002017' 175000 000000 MWORD <CONT,A=3,B=10,SAQ,AND,D=5> ; 1750
1137 002020' 045034 000340
1138 002021' 175117 530000 MWORD <CJV,J=1753,S0Q,OR,D=1,CENA,CCFZ> ; 1751
1139 002022' 231400 020140
1140 002023' 175240 000000 MWORD <JMAP,J=4000> ; 1752 error
1141 002024' 000000 000040
1142 002025' 175300 000000 MWORD <CONT,A=4,B=11,SAQ,AND,D=7> ; 1753
1143 002026' 047044 400340
1144 002027' 175417 560000 MWORD <CJV,J=1756,S0Q,OR,D=1,CENA,CCFZ> ; 1754
1145 002030' 231400 020140
1146 002031' 175540 000000 MWORD <JMAP,J=4000> ; 1755 error
1147 002032' 000000 000040
1148 002033' 175600 000000 MWORD <CONT,A=12,B=17,SAB,AND,D=1> ; 1756
1149 002034' 141127 400340
1150 002035' 175717 610000 MWORD <CJV,J=1761,S0Q,OR,D=1,CENA,CCFZ> ; 1757
1151 002036' 231400 020140
1152 002037' 176040 000000 MWORD <JMAP,J=4000> ; 1760 error
.MAIN MACRO %53A(1152) 09:55 16-Oct-84 Page 4-19
DFPTA5 MAC 19-Jan-83 11:21 Register Interference Tests SEQ 1115
1153 002040' 000000 000040
1154 002041' 176100 000000 MWORD <CONT,A=13,B=0,SAB,AND,D=2> ; 1761
1155 002042' 142130 000340
1156 002043' 176217 640000 MWORD <CJV,J=1764,S0Q,OR,D=1,CENA,CCFZ> ; 1762
1157 002044' 231400 020140
1158 002045' 176340 000000 MWORD <JMAP,J=4000> ; 1763 error
1159 002046' 000000 000040
1160 002047' 176400 000000 MWORD <CONT,A=14,B=1,SAB,AND,D=3> ; 1764
1161 002050' 143140 400340
1162 002051' 176517 670000 MWORD <CJV,J=1767,S0Q,OR,D=1,CENA,CCFZ> ; 1765
1163 002052' 231400 020140
1164 002053' 176640 000000 MWORD <JMAP,J=4000> ; 1766 error
1165 002054' 000000 000040
1166 002055' 176700 000000 MWORD <CONT,A=15,B=2,SAB,AND,D=5> ; 1767
1167 002056' 145151 000340
1168 002057' 177017 720000 MWORD <CJV,J=1772,S0Q,OR,D=1,CENA,CCFZ> ; 1770
1169 002060' 231400 020140
1170 002061' 177140 000000 MWORD <JMAP,J=4000> ; 1771 error
1171 002062' 000000 000040
1172 002063' 177200 000000 MWORD <CONT,A=16,B=3,SAB,AND,D=7> ; 1772
1173 002064' 147161 400340
1174 002065' 177317 750000 MWORD <CJV,J=1775,S0Q,OR,D=1,CENA,CCFZ> ; 1773
1175 002066' 231400 020140
1176 002067' 177440 000000 MWORD <JMAP,J=4000> ; 1774 error
1177 002070' 000000 000040
1178 002071' 177500 000000 MWORD <CONT,A=4,B=11,S0Q,AND,D=1> ; 1775
1179 002072' 241044 400340
1180 002073' 177620 000000 MWORD <CJV,J=2000,S0Q,OR,D=1,CENA,CCFZ> ; 1776
1181 002074' 231400 020140
1182 002075' 177740 000000 MWORD <JMAP,J=4000> ; 1777 error
1183 002076' 000000 000040
1184 002077' 200000 000000 MWORD <CONT,A=5,B=12,S0Q,AND,D=2> ; 2000
1185 002100' 242055 000340
1186 002101' 200120 030000 MWORD <CJV,J=2003,S0Q,OR,D=1,CENA,CCFZ> ; 2001
1187 002102' 231400 020140
1188 002103' 200240 000000 MWORD <JMAP,J=4000> ; 2002 error
1189 002104' 000000 000040
1190 002105' 200300 000000 MWORD <CONT,A=6,B=13,S0Q,AND,D=3> ; 2003
1191 002106' 243065 400340
1192 002107' 200420 060000 MWORD <CJV,J=2006,S0Q,OR,D=1,CENA,CCFZ> ; 2004
1193 002110' 231400 020140
1194 002111' 200540 000000 MWORD <JMAP,J=4000> ; 2005 error
1195 002112' 000000 000040
1196 002113' 200600 000000 MWORD <CONT,A=7,B=14,S0Q,AND,D=5> ; 2006
1197 002114' 245076 000340
1198 002115' 200720 110000 MWORD <CJV,J=2011,S0Q,OR,D=1,CENA,CCFZ> ; 2007
1199 002116' 231400 020140
1200 002117' 201040 000000 MWORD <JMAP,J=4000> ; 2010 error
1201 002120' 000000 000040
1202 002121' 201100 000000 MWORD <CONT,A=10,B=15,S0Q,AND,D=7> ; 2011
1203 002122' 247106 400340
1204 002123' 201220 140000 MWORD <CJV,J=2014,S0Q,OR,D=1,CENA,CCFZ> ; 2012
1205 002124' 231400 020140
1206 002125' 201340 000000 MWORD <JMAP,J=4000> ; 2013 error
1207 002126' 000000 000040
.MAIN MACRO %53A(1152) 09:55 16-Oct-84 Page 4-20
DFPTA5 MAC 19-Jan-83 11:21 Register Interference Tests SEQ 1116
1208 002127' 201400 000000 MWORD <CONT,A=16,B=3,S0B,AND,D=1> ; 2014
1209 002130' 341161 400340
1210 002131' 201520 170000 MWORD <CJV,J=2017,S0Q,OR,D=1,CENA,CCFZ> ; 2015
1211 002132' 231400 020140
1212 002133' 201640 000000 MWORD <JMAP,J=4000> ; 2016 error
1213 002134' 000000 000040
1214 002135' 201700 000000 MWORD <CONT,A=17,B=4,S0B,AND,D=2> ; 2017
1215 002136' 342172 000340
1216 002137' 202020 220000 MWORD <CJV,J=2022,S0Q,OR,D=1,CENA,CCFZ> ; 2020
1217 002140' 231400 020140
1218 002141' 202140 000000 MWORD <JMAP,J=4000> ; 2021 error
1219 002142' 000000 000040
1220 002143' 202200 000000 MWORD <CONT,A=0,B=5,S0B,AND,D=3> ; 2022
1221 002144' 343002 400340
1222 002145' 202320 250000 MWORD <CJV,J=2025,S0Q,OR,D=1,CENA,CCFZ> ; 2023
1223 002146' 231400 020140
1224 002147' 202440 000000 MWORD <JMAP,J=4000> ; 2024 error
1225 002150' 000000 000040
1226 002151' 202500 000000 MWORD <CONT,A=1,B=6,S0B,AND,D=5> ; 2025
1227 002152' 345013 000340
1228 002153' 202620 300000 MWORD <CJV,J=2030,S0Q,OR,D=1,CENA,CCFZ> ; 2026
1229 002154' 231400 020140
1230 002155' 202740 000000 MWORD <JMAP,J=4000> ; 2027 error
1231 002156' 000000 000040
1232 002157' 203000 000000 MWORD <CONT,A=2,B=7,S0B,AND,D=7> ; 2030
1233 002160' 347023 400340
1234 002161' 203120 330000 MWORD <CJV,J=2033,S0Q,OR,D=1,CENA,CCFZ> ; 2031
1235 002162' 231400 020140
1236 002163' 203240 000000 MWORD <JMAP,J=4000> ; 2032 error
1237 002164' 000000 000040
1238 002165' 203300 000000 MWORD <CONT,A=10,B=15,S0A,AND,D=1> ; 2033
1239 002166' 441106 400340
1240 002167' 203420 360000 MWORD <CJV,J=2036,S0Q,OR,D=1,CENA,CCFZ> ; 2034
1241 002170' 231400 020140
1242 002171' 203540 000000 MWORD <JMAP,J=4000> ; 2035 error
1243 002172' 000000 000040
1244 002173' 203600 000000 MWORD <CONT,A=11,B=16,S0A,AND,D=2> ; 2036
1245 002174' 442117 000340
1246 002175' 203720 410000 MWORD <CJV,J=2041,S0Q,OR,D=1,CENA,CCFZ> ; 2037
1247 002176' 231400 020140
1248 002177' 204040 000000 MWORD <JMAP,J=4000> ; 2040 error
1249 002200' 000000 000040
1250 002201' 204100 000000 MWORD <CONT,A=12,B=17,S0A,AND,D=3> ; 2041
1251 002202' 443127 400340
1252 002203' 204220 440000 MWORD <CJV,J=2044,S0Q,OR,D=1,CENA,CCFZ> ; 2042
1253 002204' 231400 020140
1254 002205' 204340 000000 MWORD <JMAP,J=4000> ; 2043 error
1255 002206' 000000 000040
1256 002207' 204400 000000 MWORD <CONT,A=13,B=0,S0A,AND,D=5> ; 2044
1257 002210' 445130 000340
1258 002211' 204520 470000 MWORD <CJV,J=2047,S0Q,OR,D=1,CENA,CCFZ> ; 2045
1259 002212' 231400 020140
1260 002213' 204640 000000 MWORD <JMAP,J=4000> ; 2046 error
1261 002214' 000000 000040
1262 002215' 204700 000000 MWORD <CONT,A=14,B=1,S0A,AND,D=7> ; 2047
.MAIN MACRO %53A(1152) 09:55 16-Oct-84 Page 4-21
DFPTA5 MAC 19-Jan-83 11:21 Register Interference Tests SEQ 1117
1263 002216' 447140 400340
1264 002217' 205020 520000 MWORD <CJV,J=2052,S0Q,OR,D=1,CENA,CCFZ> ; 2050
1265 002220' 231400 020140
1266 002221' 205140 000000 MWORD <JMAP,J=4000> ; 2051 error
1267 002222' 000000 000040
1268 002223' 205200 000000 MWORD <CONT,A=2,B=7,SDA,AND,D=1> ; 2052
1269 002224' 541023 400340
1270 002225' 205320 550000 MWORD <CJV,J=2055,S0Q,OR,D=1,CENA,CCFZ> ; 2053
1271 002226' 231400 020140
1272 002227' 205440 000000 MWORD <JMAP,J=4000> ; 2054 error
1273 002230' 000000 000040
1274 002231' 205500 000000 MWORD <CONT,A=3,B=10,SDA,AND,D=2> ; 2055
1275 002232' 542034 000340
1276 002233' 205620 600000 MWORD <CJV,J=2060,S0Q,OR,D=1,CENA,CCFZ> ; 2056
1277 002234' 231400 020140
1278 002235' 205740 000000 MWORD <JMAP,J=4000> ; 2057 error
1279 002236' 000000 000040
1280 002237' 206000 000000 MWORD <CONT,A=4,B=11,SDA,AND,D=3> ; 2060
1281 002240' 543044 400340
1282 002241' 206120 630000 MWORD <CJV,J=2063,S0Q,OR,D=1,CENA,CCFZ> ; 2061
1283 002242' 231400 020140
1284 002243' 206240 000000 MWORD <JMAP,J=4000> ; 2062 error
1285 002244' 000000 000040
1286 002245' 206300 000000 MWORD <CONT,A=5,B=12,SDA,AND,D=5> ; 2063
1287 002246' 545055 000340
1288 002247' 206420 660000 MWORD <CJV,J=2066,S0Q,OR,D=1,CENA,CCFZ> ; 2064
1289 002250' 231400 020140
1290 002251' 206540 000000 MWORD <JMAP,J=4000> ; 2065 error
1291 002252' 000000 000040
1292 002253' 206600 000000 MWORD <CONT,A=6,B=13,SDA,AND,D=7> ; 2066
1293 002254' 547065 400340
1294 002255' 206720 710000 MWORD <CJV,J=2071,S0Q,OR,D=1,CENA,CCFZ> ; 2067
1295 002256' 231400 020140
1296 002257' 207040 000000 MWORD <JMAP,J=4000> ; 2070 error
1297 002260' 000000 000040
1298 002261' 207100 000000 MWORD <CONT,A=14,B=1,SDQ,AND,D=1> ; 2071
1299 002262' 641140 400340
1300 002263' 207220 740000 MWORD <CJV,J=2074,S0Q,OR,D=1,CENA,CCFZ> ; 2072
1301 002264' 231400 020140
1302 002265' 207340 000000 MWORD <JMAP,J=4000> ; 2073 error
1303 002266' 000000 000040
1304 002267' 207400 000000 MWORD <CONT,A=15,B=2,SDQ,AND,D=2> ; 2074
1305 002270' 642151 000340
1306 002271' 207520 770000 MWORD <CJV,J=2077,S0Q,OR,D=1,CENA,CCFZ> ; 2075
1307 002272' 231400 020140
1308 002273' 207640 000000 MWORD <JMAP,J=4000> ; 2076 error
1309 002274' 000000 000040
1310 002275' 207700 000000 MWORD <CONT,A=16,B=3,SDQ,AND,D=3> ; 2077
1311 002276' 643161 400340
1312 002277' 210021 020000 MWORD <CJV,J=2102,S0Q,OR,D=1,CENA,CCFZ> ; 2100
1313 002300' 231400 020140
1314 002301' 210140 000000 MWORD <JMAP,J=4000> ; 2101 error
1315 002302' 000000 000040
1316 002303' 210200 000000 MWORD <CONT,A=17,B=4,SDQ,AND,D=5> ; 2102
1317 002304' 645172 000340
.MAIN MACRO %53A(1152) 09:55 16-Oct-84 Page 4-22
DFPTA5 MAC 19-Jan-83 11:21 Register Interference Tests SEQ 1118
1318 002305' 210321 050000 MWORD <CJV,J=2105,S0Q,OR,D=1,CENA,CCFZ> ; 2103
1319 002306' 231400 020140
1320 002307' 210440 000000 MWORD <JMAP,J=4000> ; 2104 error
1321 002310' 000000 000040
1322 002311' 210500 000000 MWORD <CONT,A=0,B=5,SDQ,AND,D=7> ; 2105
1323 002312' 647002 400340
1324 002313' 210621 100000 MWORD <CJV,J=2110,S0Q,OR,D=1,CENA,CCFZ> ; 2106
1325 002314' 231400 020140
1326 002315' 210740 000000 MWORD <JMAP,J=4000> ; 2107 error
1327 002316' 000000 000040
1328 002317' 211000 000000 MWORD <CONT,A=6,B=13,SD0,AND,D=1> ; 2110
1329 002320' 741065 400340
1330 002321' 211121 130000 MWORD <CJV,J=2113,S0Q,OR,D=1,CENA,CCFZ> ; 2111
1331 002322' 231400 020140
1332 002323' 211240 000000 MWORD <JMAP,J=4000> ; 2112 error
1333 002324' 000000 000040
1334 002325' 211300 000000 MWORD <CONT,A=7,B=14,SD0,AND,D=2> ; 2113
1335 002326' 742076 000340
1336 002327' 211421 160000 MWORD <CJV,J=2116,S0Q,OR,D=1,CENA,CCFZ> ; 2114
1337 002330' 231400 020140
1338 002331' 211540 000000 MWORD <JMAP,J=4000> ; 2115 error
1339 002332' 000000 000040
1340 002333' 211600 000000 MWORD <CONT,A=10,B=15,SD0,AND,D=3> ; 2116
1341 002334' 743106 400340
1342 002335' 211721 210000 MWORD <CJV,J=2121,S0Q,OR,D=1,CENA,CCFZ> ; 2117
1343 002336' 231400 020140
1344 002337' 212040 000000 MWORD <JMAP,J=4000> ; 2120 error
1345 002340' 000000 000040
1346 002341' 212100 000000 MWORD <CONT,A=11,B=16,SD0,AND,D=5> ; 2121
1347 002342' 745117 000340
1348 002343' 212221 240000 MWORD <CJV,J=2124,S0Q,OR,D=1,CENA,CCFZ> ; 2122
1349 002344' 231400 020140
1350 002345' 212340 000000 MWORD <JMAP,J=4000> ; 2123 error
1351 002346' 000000 000040
1352 002347' 212400 000000 MWORD <CONT,A=12,B=17,SD0,AND,D=7> ; 2124
1353 002350' 747127 400340
1354 002351' 212521 270000 MWORD <CJV,J=2127,S0Q,OR,D=1,CENA,CCFZ> ; 2125
1355 002352' 231400 020140
1356 002353' 212640 000000 MWORD <JMAP,J=4000> ; 2126 error
1357 002354' 000000 000040
1358 002355' 212700 000000 MWORD <CONT,A=0,B=5,SAQ,NAND,D=1> ; 2127
1359 002356' 051002 400340
1360 002357' 213021 320000 MWORD <CJV,J=2132,S0Q,OR,D=1,CENA,CCFZ> ; 2130
1361 002360' 231400 020140
1362 002361' 213140 000000 MWORD <JMAP,J=4000> ; 2131 error
1363 002362' 000000 000040
1364 002363' 213200 000000 MWORD <CONT,A=1,B=6,SAQ,NAND,D=2> ; 2132
1365 002364' 052013 000340
1366 002365' 213321 350000 MWORD <CJV,J=2135,S0Q,OR,D=1,CENA,CCFZ> ; 2133
1367 002366' 231400 020140
1368 002367' 213440 000000 MWORD <JMAP,J=4000> ; 2134 error
1369 002370' 000000 000040
1370 002371' 213500 000000 MWORD <CONT,A=2,B=7,SAQ,NAND,D=3> ; 2135
1371 002372' 053023 400340
1372 002373' 213621 400000 MWORD <CJV,J=2140,S0Q,OR,D=1,CENA,CCFZ> ; 2136
.MAIN MACRO %53A(1152) 09:55 16-Oct-84 Page 4-23
DFPTA5 MAC 19-Jan-83 11:21 Register Interference Tests SEQ 1119
1373 002374' 231400 020140
1374 002375' 213740 000000 MWORD <JMAP,J=4000> ; 2137 error
1375 002376' 000000 000040
1376 002377' 214000 000000 MWORD <CONT,A=3,B=10,SAQ,NAND,D=5> ; 2140
1377 002400' 055034 000340
1378 002401' 214121 430000 MWORD <CJV,J=2143,S0Q,OR,D=1,CENA,CCFZ> ; 2141
1379 002402' 231400 020140
1380 002403' 214240 000000 MWORD <JMAP,J=4000> ; 2142 error
1381 002404' 000000 000040
1382 002405' 214300 000000 MWORD <CONT,A=4,B=11,SAQ,NAND,D=7> ; 2143
1383 002406' 057044 400340
1384 002407' 214421 460000 MWORD <CJV,J=2146,S0Q,OR,D=1,CENA,CCFZ> ; 2144
1385 002410' 231400 020140
1386 002411' 214540 000000 MWORD <JMAP,J=4000> ; 2145 error
1387 002412' 000000 000040
1388 002413' 214600 000000 MWORD <CONT,A=12,B=17,SAB,NAND,D=1> ; 2146
1389 002414' 151127 400340
1390 002415' 214721 510000 MWORD <CJV,J=2151,S0Q,OR,D=1,CENA,CCFZ> ; 2147
1391 002416' 231400 020140
1392 002417' 215040 000000 MWORD <JMAP,J=4000> ; 2150 error
1393 002420' 000000 000040
1394 002421' 215100 000000 MWORD <CONT,A=13,B=0,SAB,NAND,D=2> ; 2151
1395 002422' 152130 000340
1396 002423' 215221 540000 MWORD <CJV,J=2154,S0Q,OR,D=1,CENA,CCFZ> ; 2152
1397 002424' 231400 020140
1398 002425' 215340 000000 MWORD <JMAP,J=4000> ; 2153 error
1399 002426' 000000 000040
1400 002427' 215400 000000 MWORD <CONT,A=14,B=1,SAB,NAND,D=3> ; 2154
1401 002430' 153140 400340
1402 002431' 215521 570000 MWORD <CJV,J=2157,S0Q,OR,D=1,CENA,CCFZ> ; 2155
1403 002432' 231400 020140
1404 002433' 215640 000000 MWORD <JMAP,J=4000> ; 2156 error
1405 002434' 000000 000040
1406 002435' 215700 000000 MWORD <CONT,A=15,B=2,SAB,NAND,D=5> ; 2157
1407 002436' 155151 000340
1408 002437' 216021 620000 MWORD <CJV,J=2162,S0Q,OR,D=1,CENA,CCFZ> ; 2160
1409 002440' 231400 020140
1410 002441' 216140 000000 MWORD <JMAP,J=4000> ; 2161 error
1411 002442' 000000 000040
1412 002443' 216200 000000 MWORD <CONT,A=16,B=3,SAB,NAND,D=7> ; 2162
1413 002444' 157161 400340
1414 002445' 216321 650000 MWORD <CJV,J=2165,S0Q,OR,D=1,CENA,CCFZ> ; 2163
1415 002446' 231400 020140
1416 002447' 216440 000000 MWORD <JMAP,J=4000> ; 2164 error
1417 002450' 000000 000040
1418 002451' 216500 000000 MWORD <CONT,A=4,B=11,S0Q,NAND,D=1> ; 2165
1419 002452' 251044 400340
1420 002453' 216621 700000 MWORD <CJV,J=2170,S0Q,OR,D=1,CENA,CCFZ> ; 2166
1421 002454' 231400 020140
1422 002455' 216740 000000 MWORD <JMAP,J=4000> ; 2167 error
1423 002456' 000000 000040
1424 002457' 217000 000000 MWORD <CONT,A=5,B=12,S0Q,NAND,D=2> ; 2170
1425 002460' 252055 000340
1426 002461' 217121 730000 MWORD <CJV,J=2173,S0Q,OR,D=1,CENA,CCFZ> ; 2171
1427 002462' 231400 020140
.MAIN MACRO %53A(1152) 09:55 16-Oct-84 Page 4-24
DFPTA5 MAC 19-Jan-83 11:21 Register Interference Tests SEQ 1120
1428 002463' 217240 000000 MWORD <JMAP,J=4000> ; 2172 error
1429 002464' 000000 000040
1430 002465' 217300 000000 MWORD <CONT,A=6,B=13,S0Q,NAND,D=3> ; 2173
1431 002466' 253065 400340
1432 002467' 217421 760000 MWORD <CJV,J=2176,S0Q,OR,D=1,CENA,CCFZ> ; 2174
1433 002470' 231400 020140
1434 002471' 217540 000000 MWORD <JMAP,J=4000> ; 2175 error
1435 002472' 000000 000040
1436 002473' 217600 000000 MWORD <CONT,A=7,B=14,S0Q,NAND,D=5> ; 2176
1437 002474' 255076 000340
1438 002475' 217722 010000 MWORD <CJV,J=2201,S0Q,OR,D=1,CENA,CCFZ> ; 2177
1439 002476' 231400 020140
1440 002477' 220040 000000 MWORD <JMAP,J=4000> ; 2200 error
1441 002500' 000000 000040
1442 002501' 220100 000000 MWORD <CONT,A=10,B=15,S0Q,NAND,D=7> ; 2201
1443 002502' 257106 400340
1444 002503' 220222 040000 MWORD <CJV,J=2204,S0Q,OR,D=1,CENA,CCFZ> ; 2202
1445 002504' 231400 020140
1446 002505' 220340 000000 MWORD <JMAP,J=4000> ; 2203 error
1447 002506' 000000 000040
1448 002507' 220400 000000 MWORD <CONT,A=16,B=3,S0B,NAND,D=1> ; 2204
1449 002510' 351161 400340
1450 002511' 220522 070000 MWORD <CJV,J=2207,S0Q,OR,D=1,CENA,CCFZ> ; 2205
1451 002512' 231400 020140
1452 002513' 220640 000000 MWORD <JMAP,J=4000> ; 2206 error
1453 002514' 000000 000040
1454 002515' 220700 000000 MWORD <CONT,A=17,B=4,S0B,NAND,D=2> ; 2207
1455 002516' 352172 000340
1456 002517' 221022 120000 MWORD <CJV,J=2212,S0Q,OR,D=1,CENA,CCFZ> ; 2210
1457 002520' 231400 020140
1458 002521' 221140 000000 MWORD <JMAP,J=4000> ; 2211 error
1459 002522' 000000 000040
1460 002523' 221200 000000 MWORD <CONT,A=0,B=5,S0B,NAND,D=3> ; 2212
1461 002524' 353002 400340
1462 002525' 221322 150000 MWORD <CJV,J=2215,S0Q,OR,D=1,CENA,CCFZ> ; 2213
1463 002526' 231400 020140
1464 002527' 221440 000000 MWORD <JMAP,J=4000> ; 2214 error
1465 002530' 000000 000040
1466 002531' 221500 000000 MWORD <CONT,A=1,B=6,S0B,NAND,D=5> ; 2215
1467 002532' 355013 000340
1468 002533' 221622 200000 MWORD <CJV,J=2220,S0Q,OR,D=1,CENA,CCFZ> ; 2216
1469 002534' 231400 020140
1470 002535' 221740 000000 MWORD <JMAP,J=4000> ; 2217 error
1471 002536' 000000 000040
1472 002537' 222000 000000 MWORD <CONT,A=2,B=7,S0B,NAND,D=7> ; 2220
1473 002540' 357023 400340
1474 002541' 222122 230000 MWORD <CJV,J=2223,S0Q,OR,D=1,CENA,CCFZ> ; 2221
1475 002542' 231400 020140
1476 002543' 222240 000000 MWORD <JMAP,J=4000> ; 2222 error
1477 002544' 000000 000040
1478 002545' 222300 000000 MWORD <CONT,A=10,B=15,S0A,NAND,D=1> ; 2223
1479 002546' 451106 400340
1480 002547' 222422 260000 MWORD <CJV,J=2226,S0Q,OR,D=1,CENA,CCFZ> ; 2224
1481 002550' 231400 020140
1482 002551' 222540 000000 MWORD <JMAP,J=4000> ; 2225 error
.MAIN MACRO %53A(1152) 09:55 16-Oct-84 Page 4-25
DFPTA5 MAC 19-Jan-83 11:21 Register Interference Tests SEQ 1121
1483 002552' 000000 000040
1484 002553' 222600 000000 MWORD <CONT,A=11,B=16,S0A,NAND,D=2> ; 2226
1485 002554' 452117 000340
1486 002555' 222722 310000 MWORD <CJV,J=2231,S0Q,OR,D=1,CENA,CCFZ> ; 2227
1487 002556' 231400 020140
1488 002557' 223040 000000 MWORD <JMAP,J=4000> ; 2230 error
1489 002560' 000000 000040
1490 002561' 223100 000000 MWORD <CONT,A=12,B=17,S0A,NAND,D=3> ; 2231
1491 002562' 453127 400340
1492 002563' 223222 340000 MWORD <CJV,J=2234,S0Q,OR,D=1,CENA,CCFZ> ; 2232
1493 002564' 231400 020140
1494 002565' 223340 000000 MWORD <JMAP,J=4000> ; 2233 error
1495 002566' 000000 000040
1496 002567' 223400 000000 MWORD <CONT,A=13,B=0,S0A,NAND,D=5> ; 2234
1497 002570' 455130 000340
1498 002571' 223522 370000 MWORD <CJV,J=2237,S0Q,OR,D=1,CENA,CCFZ> ; 2235
1499 002572' 231400 020140
1500 002573' 223640 000000 MWORD <JMAP,J=4000> ; 2236 error
1501 002574' 000000 000040
1502 002575' 223700 000000 MWORD <CONT,A=14,B=1,S0A,NAND,D=7> ; 2237
1503 002576' 457140 400340
1504 002577' 224022 420000 MWORD <CJV,J=2242,S0Q,OR,D=1,CENA,CCFZ> ; 2240
1505 002600' 231400 020140
1506 002601' 224140 000000 MWORD <JMAP,J=4000> ; 2241 error
1507 002602' 000000 000040
1508 002603' 224200 000000 MWORD <CONT,A=2,B=7,SDA,NAND,D=1> ; 2242
1509 002604' 551023 400340
1510 002605' 224322 450000 MWORD <CJV,J=2245,S0Q,OR,D=1,CENA,CCFZ> ; 2243
1511 002606' 231400 020140
1512 002607' 224440 000000 MWORD <JMAP,J=4000> ; 2244 error
1513 002610' 000000 000040
1514 002611' 224500 000000 MWORD <CONT,A=3,B=10,SDA,NAND,D=2> ; 2245
1515 002612' 552034 000340
1516 002613' 224622 500000 MWORD <CJV,J=2250,S0Q,OR,D=1,CENA,CCFZ> ; 2246
1517 002614' 231400 020140
1518 002615' 224740 000000 MWORD <JMAP,J=4000> ; 2247 error
1519 002616' 000000 000040
1520 002617' 225000 000000 MWORD <CONT,A=4,B=11,SDA,NAND,D=3> ; 2250
1521 002620' 553044 400340
1522 002621' 225122 530000 MWORD <CJV,J=2253,S0Q,OR,D=1,CENA,CCFZ> ; 2251
1523 002622' 231400 020140
1524 002623' 225240 000000 MWORD <JMAP,J=4000> ; 2252 error
1525 002624' 000000 000040
1526 002625' 225300 000000 MWORD <CONT,A=5,B=12,SDA,NAND,D=5> ; 2253
1527 002626' 555055 000340
1528 002627' 225422 560000 MWORD <CJV,J=2256,S0Q,OR,D=1,CENA,CCFZ> ; 2254
1529 002630' 231400 020140
1530 002631' 225540 000000 MWORD <JMAP,J=4000> ; 2255 error
1531 002632' 000000 000040
1532 002633' 225600 000000 MWORD <CONT,A=6,B=13,SDA,NAND,D=7> ; 2256
1533 002634' 557065 400340
1534 002635' 225722 610000 MWORD <CJV,J=2261,S0Q,OR,D=1,CENA,CCFZ> ; 2257
1535 002636' 231400 020140
1536 002637' 226040 000000 MWORD <JMAP,J=4000> ; 2260 error
1537 002640' 000000 000040
.MAIN MACRO %53A(1152) 09:55 16-Oct-84 Page 4-26
DFPTA5 MAC 19-Jan-83 11:21 Register Interference Tests SEQ 1122
1538 002641' 226100 000000 MWORD <CONT,A=14,B=1,SDQ,NAND,D=1> ; 2261
1539 002642' 651140 400340
1540 002643' 226222 640000 MWORD <CJV,J=2264,S0Q,OR,D=1,CENA,CCFZ> ; 2262
1541 002644' 231400 020140
1542 002645' 226340 000000 MWORD <JMAP,J=4000> ; 2263 error
1543 002646' 000000 000040
1544 002647' 226400 000000 MWORD <CONT,A=15,B=2,SDQ,NAND,D=2> ; 2264
1545 002650' 652151 000340
1546 002651' 226522 670000 MWORD <CJV,J=2267,S0Q,OR,D=1,CENA,CCFZ> ; 2265
1547 002652' 231400 020140
1548 002653' 226640 000000 MWORD <JMAP,J=4000> ; 2266 error
1549 002654' 000000 000040
1550 002655' 226700 000000 MWORD <CONT,A=16,B=3,SDQ,NAND,D=3> ; 2267
1551 002656' 653161 400340
1552 002657' 227022 720000 MWORD <CJV,J=2272,S0Q,OR,D=1,CENA,CCFZ> ; 2270
1553 002660' 231400 020140
1554 002661' 227140 000000 MWORD <JMAP,J=4000> ; 2271 error
1555 002662' 000000 000040
1556 002663' 227200 000000 MWORD <CONT,A=17,B=4,SDQ,NAND,D=5> ; 2272
1557 002664' 655172 000340
1558 002665' 227322 750000 MWORD <CJV,J=2275,S0Q,OR,D=1,CENA,CCFZ> ; 2273
1559 002666' 231400 020140
1560 002667' 227440 000000 MWORD <JMAP,J=4000> ; 2274 error
1561 002670' 000000 000040
1562 002671' 227500 000000 MWORD <CONT,A=0,B=5,SDQ,NAND,D=7> ; 2275
1563 002672' 657002 400340
1564 002673' 227623 000000 MWORD <CJV,J=2300,S0Q,OR,D=1,CENA,CCFZ> ; 2276
1565 002674' 231400 020140
1566 002675' 227740 000000 MWORD <JMAP,J=4000> ; 2277 error
1567 002676' 000000 000040
1568 002677' 230000 000000 MWORD <CONT,A=6,B=13,SD0,NAND,D=1> ; 2300
1569 002700' 751065 400340
1570 002701' 230123 030000 MWORD <CJV,J=2303,S0Q,OR,D=1,CENA,CCFZ> ; 2301
1571 002702' 231400 020140
1572 002703' 230240 000000 MWORD <JMAP,J=4000> ; 2302 error
1573 002704' 000000 000040
1574 002705' 230300 000000 MWORD <CONT,A=7,B=14,SD0,NAND,D=2> ; 2303
1575 002706' 752076 000340
1576 002707' 230423 060000 MWORD <CJV,J=2306,S0Q,OR,D=1,CENA,CCFZ> ; 2304
1577 002710' 231400 020140
1578 002711' 230540 000000 MWORD <JMAP,J=4000> ; 2305 error
1579 002712' 000000 000040
1580 002713' 230600 000000 MWORD <CONT,A=10,B=15,SD0,NAND,D=3> ; 2306
1581 002714' 753106 400340
1582 002715' 230723 110000 MWORD <CJV,J=2311,S0Q,OR,D=1,CENA,CCFZ> ; 2307
1583 002716' 231400 020140
1584 002717' 231040 000000 MWORD <JMAP,J=4000> ; 2310 error
1585 002720' 000000 000040
1586 002721' 231100 000000 MWORD <CONT,A=11,B=16,SD0,NAND,D=5> ; 2311
1587 002722' 755117 000340
1588 002723' 231223 140000 MWORD <CJV,J=2314,S0Q,OR,D=1,CENA,CCFZ> ; 2312
1589 002724' 231400 020140
1590 002725' 231340 000000 MWORD <JMAP,J=4000> ; 2313 error
1591 002726' 000000 000040
1592 002727' 231400 000000 MWORD <CONT,A=12,B=17,SD0,NAND,D=7> ; 2314
.MAIN MACRO %53A(1152) 09:55 16-Oct-84 Page 4-27
DFPTA5 MAC 19-Jan-83 11:21 Register Interference Tests SEQ 1123
1593 002730' 757127 400340
1594 002731' 231523 170000 MWORD <CJV,J=2317,S0Q,OR,D=1,CENA,CCFZ> ; 2315
1595 002732' 231400 020140
1596 002733' 231640 000000 MWORD <JMAP,J=4000> ; 2316 error
1597 002734' 000000 000040
1598 002735' 231700 000000 MWORD <CONT,A=0,B=5,SAQ,XOR,D=1> ; 2317
1599 002736' 061002 400340
1600 002737' 232023 220000 MWORD <CJV,J=2322,S0Q,OR,D=1,CENA,CCFZ> ; 2320
1601 002740' 231400 020140
1602 002741' 232140 000000 MWORD <JMAP,J=4000> ; 2321 error
1603 002742' 000000 000040
1604 002743' 232200 000000 MWORD <CONT,A=1,B=6,SAQ,XOR,D=2> ; 2322
1605 002744' 062013 000340
1606 002745' 232323 250000 MWORD <CJV,J=2325,S0Q,OR,D=1,CENA,CCFZ> ; 2323
1607 002746' 231400 020140
1608 002747' 232440 000000 MWORD <JMAP,J=4000> ; 2324 error
1609 002750' 000000 000040
1610 002751' 232500 000000 MWORD <CONT,A=2,B=7,SAQ,XOR,D=3> ; 2325
1611 002752' 063023 400340
1612 002753' 232623 300000 MWORD <CJV,J=2330,S0Q,OR,D=1,CENA,CCFZ> ; 2326
1613 002754' 231400 020140
1614 002755' 232740 000000 MWORD <JMAP,J=4000> ; 2327 error
1615 002756' 000000 000040
1616 002757' 233000 000000 MWORD <CONT,A=3,B=10,SAQ,XOR,D=5> ; 2330
1617 002760' 065034 000340
1618 002761' 233123 330000 MWORD <CJV,J=2333,S0Q,OR,D=1,CENA,CCFZ> ; 2331
1619 002762' 231400 020140
1620 002763' 233240 000000 MWORD <JMAP,J=4000> ; 2332 error
1621 002764' 000000 000040
1622 002765' 233300 000000 MWORD <CONT,A=4,B=11,SAQ,XOR,D=7> ; 2333
1623 002766' 067044 400340
1624 002767' 233423 360000 MWORD <CJV,J=2336,S0Q,OR,D=1,CENA,CCFZ> ; 2334
1625 002770' 231400 020140
1626 002771' 233540 000000 MWORD <JMAP,J=4000> ; 2335 error
1627 002772' 000000 000040
1628 002773' 233600 000000 MWORD <CONT,A=12,B=17,SAB,XOR,D=1> ; 2336
1629 002774' 161127 400340
1630 002775' 233723 410000 MWORD <CJV,J=2341,S0Q,OR,D=1,CENA,CCFZ> ; 2337
1631 002776' 231400 020140
1632 002777' 234040 000000 MWORD <JMAP,J=4000> ; 2340 error
1633 003000' 000000 000040
1634 003001' 234100 000000 MWORD <CONT,A=13,B=0,SAB,XOR,D=2> ; 2341
1635 003002' 162130 000340
1636 003003' 234223 440000 MWORD <CJV,J=2344,S0Q,OR,D=1,CENA,CCFZ> ; 2342
1637 003004' 231400 020140
1638 003005' 234340 000000 MWORD <JMAP,J=4000> ; 2343 error
1639 003006' 000000 000040
1640 003007' 234400 000000 MWORD <CONT,A=14,B=1,SAB,XOR,D=3> ; 2344
1641 003010' 163140 400340
1642 003011' 234523 470000 MWORD <CJV,J=2347,S0Q,OR,D=1,CENA,CCFZ> ; 2345
1643 003012' 231400 020140
1644 003013' 234640 000000 MWORD <JMAP,J=4000> ; 2346 error
1645 003014' 000000 000040
1646 003015' 234700 000000 MWORD <CONT,A=15,B=2,SAB,XOR,D=5> ; 2347
1647 003016' 165151 000340
.MAIN MACRO %53A(1152) 09:55 16-Oct-84 Page 4-28
DFPTA5 MAC 19-Jan-83 11:21 Register Interference Tests SEQ 1124
1648 003017' 235023 520000 MWORD <CJV,J=2352,S0Q,OR,D=1,CENA,CCFZ> ; 2350
1649 003020' 231400 020140
1650 003021' 235140 000000 MWORD <JMAP,J=4000> ; 2351 error
1651 003022' 000000 000040
1652 003023' 235200 000000 MWORD <CONT,A=16,B=3,SAB,XOR,D=7> ; 2352
1653 003024' 167161 400340
1654 003025' 235323 550000 MWORD <CJV,J=2355,S0Q,OR,D=1,CENA,CCFZ> ; 2353
1655 003026' 231400 020140
1656 003027' 235440 000000 MWORD <JMAP,J=4000> ; 2354 error
1657 003030' 000000 000040
1658 003031' 235500 000000 MWORD <CONT,A=4,B=11,S0Q,XOR,D=1> ; 2355
1659 003032' 261044 400340
1660 003033' 235623 600000 MWORD <CJV,J=2360,S0Q,OR,D=1,CENA,CCFZ> ; 2356
1661 003034' 231400 020140
1662 003035' 235740 000000 MWORD <JMAP,J=4000> ; 2357 error
1663 003036' 000000 000040
1664 003037' 236000 000000 MWORD <CONT,A=5,B=12,S0Q,XOR,D=2> ; 2360
1665 003040' 262055 000340
1666 003041' 236123 630000 MWORD <CJV,J=2363,S0Q,OR,D=1,CENA,CCFZ> ; 2361
1667 003042' 231400 020140
1668 003043' 236240 000000 MWORD <JMAP,J=4000> ; 2362 error
1669 003044' 000000 000040
1670 003045' 236300 000000 MWORD <CONT,A=6,B=13,S0Q,XOR,D=3> ; 2363
1671 003046' 263065 400340
1672 003047' 236423 660000 MWORD <CJV,J=2366,S0Q,OR,D=1,CENA,CCFZ> ; 2364
1673 003050' 231400 020140
1674 003051' 236540 000000 MWORD <JMAP,J=4000> ; 2365 error
1675 003052' 000000 000040
1676 003053' 236600 000000 MWORD <CONT,A=7,B=14,S0Q,XOR,D=5> ; 2366
1677 003054' 265076 000340
1678 003055' 236723 710000 MWORD <CJV,J=2371,S0Q,OR,D=1,CENA,CCFZ> ; 2367
1679 003056' 231400 020140
1680 003057' 237040 000000 MWORD <JMAP,J=4000> ; 2370 error
1681 003060' 000000 000040
1682 003061' 237100 000000 MWORD <CONT,A=10,B=15,S0Q,XOR,D=7> ; 2371
1683 003062' 267106 400340
1684 003063' 237223 740000 MWORD <CJV,J=2374,S0Q,OR,D=1,CENA,CCFZ> ; 2372
1685 003064' 231400 020140
1686 003065' 237340 000000 MWORD <JMAP,J=4000> ; 2373 error
1687 003066' 000000 000040
1688 003067' 237400 000000 MWORD <CONT,A=16,B=3,S0B,XOR,D=1> ; 2374
1689 003070' 361161 400340
1690 003071' 237523 770000 MWORD <CJV,J=2377,S0Q,OR,D=1,CENA,CCFZ> ; 2375
1691 003072' 231400 020140
1692 003073' 237640 000000 MWORD <JMAP,J=4000> ; 2376 error
1693 003074' 000000 000040
1694 003075' 237700 000000 MWORD <CONT,A=17,B=4,S0B,XOR,D=2> ; 2377
1695 003076' 362172 000340
1696 003077' 240024 020000 MWORD <CJV,J=2402,S0Q,OR,D=1,CENA,CCFZ> ; 2400
1697 003100' 231400 020140
1698 003101' 240140 000000 MWORD <JMAP,J=4000> ; 2401 error
1699 003102' 000000 000040
1700 003103' 240200 000000 MWORD <CONT,A=0,B=5,S0B,XOR,D=3> ; 2402
1701 003104' 363002 400340
1702 003105' 240324 050000 MWORD <CJV,J=2405,S0Q,OR,D=1,CENA,CCFZ> ; 2403
.MAIN MACRO %53A(1152) 09:55 16-Oct-84 Page 4-29
DFPTA5 MAC 19-Jan-83 11:21 Register Interference Tests SEQ 1125
1703 003106' 231400 020140
1704 003107' 240440 000000 MWORD <JMAP,J=4000> ; 2404 error
1705 003110' 000000 000040
1706 003111' 240500 000000 MWORD <CONT,A=1,B=6,S0B,XOR,D=5> ; 2405
1707 003112' 365013 000340
1708 003113' 240624 100000 MWORD <CJV,J=2410,S0Q,OR,D=1,CENA,CCFZ> ; 2406
1709 003114' 231400 020140
1710 003115' 240740 000000 MWORD <JMAP,J=4000> ; 2407 error
1711 003116' 000000 000040
1712 003117' 241000 000000 MWORD <CONT,A=2,B=7,S0B,XOR,D=7> ; 2410
1713 003120' 367023 400340
1714 003121' 241124 130000 MWORD <CJV,J=2413,S0Q,OR,D=1,CENA,CCFZ> ; 2411
1715 003122' 231400 020140
1716 003123' 241240 000000 MWORD <JMAP,J=4000> ; 2412 error
1717 003124' 000000 000040
1718 003125' 241300 000000 MWORD <CONT,A=10,B=15,S0A,XOR,D=1> ; 2413
1719 003126' 461106 400340
1720 003127' 241424 160000 MWORD <CJV,J=2416,S0Q,OR,D=1,CENA,CCFZ> ; 2414
1721 003130' 231400 020140
1722 003131' 241540 000000 MWORD <JMAP,J=4000> ; 2415 error
1723 003132' 000000 000040
1724 003133' 241600 000000 MWORD <CONT,A=11,B=16,S0A,XOR,D=2> ; 2416
1725 003134' 462117 000340
1726 003135' 241724 210000 MWORD <CJV,J=2421,S0Q,OR,D=1,CENA,CCFZ> ; 2417
1727 003136' 231400 020140
1728 003137' 242040 000000 MWORD <JMAP,J=4000> ; 2420 error
1729 003140' 000000 000040
1730 003141' 242100 000000 MWORD <CONT,A=12,B=17,S0A,XOR,D=3> ; 2421
1731 003142' 463127 400340
1732 003143' 242224 240000 MWORD <CJV,J=2424,S0Q,OR,D=1,CENA,CCFZ> ; 2422
1733 003144' 231400 020140
1734 003145' 242340 000000 MWORD <JMAP,J=4000> ; 2423 error
1735 003146' 000000 000040
1736 003147' 242400 000000 MWORD <CONT,A=13,B=0,S0A,XOR,D=5> ; 2424
1737 003150' 465130 000340
1738 003151' 242524 270000 MWORD <CJV,J=2427,S0Q,OR,D=1,CENA,CCFZ> ; 2425
1739 003152' 231400 020140
1740 003153' 242640 000000 MWORD <JMAP,J=4000> ; 2426 error
1741 003154' 000000 000040
1742 003155' 242700 000000 MWORD <CONT,A=14,B=1,S0A,XOR,D=7> ; 2427
1743 003156' 467140 400340
1744 003157' 243024 320000 MWORD <CJV,J=2432,S0Q,OR,D=1,CENA,CCFZ> ; 2430
1745 003160' 231400 020140
1746 003161' 243140 000000 MWORD <JMAP,J=4000> ; 2431 error
1747 003162' 000000 000040
1748 003163' 243200 000000 MWORD <CONT,A=2,B=7,SDA,XOR,D=1> ; 2432
1749 003164' 561023 400340
1750 003165' 243324 350000 MWORD <CJV,J=2435,S0Q,OR,D=1,CENA,CCFZ> ; 2433
1751 003166' 231400 020140
1752 003167' 243440 000000 MWORD <JMAP,J=4000> ; 2434 error
1753 003170' 000000 000040
1754 003171' 243500 000000 MWORD <CONT,A=3,B=10,SDA,XOR,D=2> ; 2435
1755 003172' 562034 000340
1756 003173' 243624 400000 MWORD <CJV,J=2440,S0Q,OR,D=1,CENA,CCFZ> ; 2436
1757 003174' 231400 020140
.MAIN MACRO %53A(1152) 09:55 16-Oct-84 Page 4-30
DFPTA5 MAC 19-Jan-83 11:21 Register Interference Tests SEQ 1126
1758 003175' 243740 000000 MWORD <JMAP,J=4000> ; 2437 error
1759 003176' 000000 000040
1760 003177' 244000 000000 MWORD <CONT,A=4,B=11,SDA,XOR,D=3> ; 2440
1761 003200' 563044 400340
1762 003201' 244124 430000 MWORD <CJV,J=2443,S0Q,OR,D=1,CENA,CCFZ> ; 2441
1763 003202' 231400 020140
1764 003203' 244240 000000 MWORD <JMAP,J=4000> ; 2442 error
1765 003204' 000000 000040
1766 003205' 244300 000000 MWORD <CONT,A=5,B=12,SDA,XOR,D=5> ; 2443
1767 003206' 565055 000340
1768 003207' 244424 460000 MWORD <CJV,J=2446,S0Q,OR,D=1,CENA,CCFZ> ; 2444
1769 003210' 231400 020140
1770 003211' 244540 000000 MWORD <JMAP,J=4000> ; 2445 error
1771 003212' 000000 000040
1772 003213' 244600 000000 MWORD <CONT,A=6,B=13,SDA,XOR,D=7> ; 2446
1773 003214' 567065 400340
1774 003215' 244724 510000 MWORD <CJV,J=2451,S0Q,OR,D=1,CENA,CCFZ> ; 2447
1775 003216' 231400 020140
1776 003217' 245040 000000 MWORD <JMAP,J=4000> ; 2450 error
1777 003220' 000000 000040
1778 003221' 245100 000000 MWORD <CONT,A=14,B=1,SDQ,XOR,D=1> ; 2451
1779 003222' 661140 400340
1780 003223' 245224 540000 MWORD <CJV,J=2454,S0Q,OR,D=1,CENA,CCFZ> ; 2452
1781 003224' 231400 020140
1782 003225' 245340 000000 MWORD <JMAP,J=4000> ; 2453 error
1783 003226' 000000 000040
1784 003227' 245400 000000 MWORD <CONT,A=15,B=2,SDQ,XOR,D=2> ; 2454
1785 003230' 662151 000340
1786 003231' 245524 570000 MWORD <CJV,J=2457,S0Q,OR,D=1,CENA,CCFZ> ; 2455
1787 003232' 231400 020140
1788 003233' 245640 000000 MWORD <JMAP,J=4000> ; 2456 error
1789 003234' 000000 000040
1790 003235' 245700 000000 MWORD <CONT,A=16,B=3,SDQ,XOR,D=3> ; 2457
1791 003236' 663161 400340
1792 003237' 246024 620000 MWORD <CJV,J=2462,S0Q,OR,D=1,CENA,CCFZ> ; 2460
1793 003240' 231400 020140
1794 003241' 246140 000000 MWORD <JMAP,J=4000> ; 2461 error
1795 003242' 000000 000040
1796 003243' 246200 000000 MWORD <CONT,A=17,B=4,SDQ,XOR,D=5> ; 2462
1797 003244' 665172 000340
1798 003245' 246324 650000 MWORD <CJV,J=2465,S0Q,OR,D=1,CENA,CCFZ> ; 2463
1799 003246' 231400 020140
1800 003247' 246440 000000 MWORD <JMAP,J=4000> ; 2464 error
1801 003250' 000000 000040
1802 003251' 246500 000000 MWORD <CONT,A=0,B=5,SDQ,XOR,D=7> ; 2465
1803 003252' 667002 400340
1804 003253' 246624 700000 MWORD <CJV,J=2470,S0Q,OR,D=1,CENA,CCFZ> ; 2466
1805 003254' 231400 020140
1806 003255' 246740 000000 MWORD <JMAP,J=4000> ; 2467 error
1807 003256' 000000 000040
1808 003257' 247000 000000 MWORD <CONT,A=6,B=13,SD0,XOR,D=1> ; 2470
1809 003260' 761065 400340
1810 003261' 247124 730000 MWORD <CJV,J=2473,S0Q,OR,D=1,CENA,CCFZ> ; 2471
1811 003262' 231400 020140
1812 003263' 247240 000000 MWORD <JMAP,J=4000> ; 2472 error
.MAIN MACRO %53A(1152) 09:55 16-Oct-84 Page 4-31
DFPTA5 MAC 19-Jan-83 11:21 Register Interference Tests SEQ 1127
1813 003264' 000000 000040
1814 003265' 247300 000000 MWORD <CONT,A=7,B=14,SD0,XOR,D=2> ; 2473
1815 003266' 762076 000340
1816 003267' 247424 760000 MWORD <CJV,J=2476,S0Q,OR,D=1,CENA,CCFZ> ; 2474
1817 003270' 231400 020140
1818 003271' 247540 000000 MWORD <JMAP,J=4000> ; 2475 error
1819 003272' 000000 000040
1820 003273' 247600 000000 MWORD <CONT,A=10,B=15,SD0,XOR,D=3> ; 2476
1821 003274' 763106 400340
1822 003275' 247725 010000 MWORD <CJV,J=2501,S0Q,OR,D=1,CENA,CCFZ> ; 2477
1823 003276' 231400 020140
1824 003277' 250040 000000 MWORD <JMAP,J=4000> ; 2500 error
1825 003300' 000000 000040
1826 003301' 250100 000000 MWORD <CONT,A=11,B=16,SD0,XOR,D=5> ; 2501
1827 003302' 765117 000340
1828 003303' 250225 040000 MWORD <CJV,J=2504,S0Q,OR,D=1,CENA,CCFZ> ; 2502
1829 003304' 231400 020140
1830 003305' 250340 000000 MWORD <JMAP,J=4000> ; 2503 error
1831 003306' 000000 000040
1832 003307' 250400 000000 MWORD <CONT,A=12,B=17,SD0,XOR,D=7> ; 2504
1833 003310' 767127 400340
1834 003311' 250525 070000 MWORD <CJV,J=2507,S0Q,OR,D=1,CENA,CCFZ> ; 2505
1835 003312' 231400 020140
1836 003313' 250640 000000 MWORD <JMAP,J=4000> ; 2506 error
1837 003314' 000000 000040
1838 003315' 250700 000000 MWORD <CONT,A=0,B=5,SAQ,XNOR,D=1> ; 2507
1839 003316' 071002 400340
1840 003317' 251025 120000 MWORD <CJV,J=2512,S0Q,OR,D=1,CENA,CCFZ> ; 2510
1841 003320' 231400 020140
1842 003321' 251140 000000 MWORD <JMAP,J=4000> ; 2511 error
1843 003322' 000000 000040
1844 003323' 251200 000000 MWORD <CONT,A=1,B=6,SAQ,XNOR,D=2> ; 2512
1845 003324' 072013 000340
1846 003325' 251325 150000 MWORD <CJV,J=2515,S0Q,OR,D=1,CENA,CCFZ> ; 2513
1847 003326' 231400 020140
1848 003327' 251440 000000 MWORD <JMAP,J=4000> ; 2514 error
1849 003330' 000000 000040
1850 003331' 251500 000000 MWORD <CONT,A=2,B=7,SAQ,XNOR,D=3> ; 2515
1851 003332' 073023 400340
1852 003333' 251625 200000 MWORD <CJV,J=2520,S0Q,OR,D=1,CENA,CCFZ> ; 2516
1853 003334' 231400 020140
1854 003335' 251740 000000 MWORD <JMAP,J=4000> ; 2517 error
1855 003336' 000000 000040
1856 003337' 252000 000000 MWORD <CONT,A=3,B=10,SAQ,XNOR,D=5> ; 2520
1857 003340' 075034 000340
1858 003341' 252125 230000 MWORD <CJV,J=2523,S0Q,OR,D=1,CENA,CCFZ> ; 2521
1859 003342' 231400 020140
1860 003343' 252240 000000 MWORD <JMAP,J=4000> ; 2522 error
1861 003344' 000000 000040
1862 003345' 252300 000000 MWORD <CONT,A=4,B=11,SAQ,XNOR,D=7> ; 2523
1863 003346' 077044 400340
1864 003347' 252425 260000 MWORD <CJV,J=2526,S0Q,OR,D=1,CENA,CCFZ> ; 2524
1865 003350' 231400 020140
1866 003351' 252540 000000 MWORD <JMAP,J=4000> ; 2525 error
1867 003352' 000000 000040
.MAIN MACRO %53A(1152) 09:55 16-Oct-84 Page 4-32
DFPTA5 MAC 19-Jan-83 11:21 Register Interference Tests SEQ 1128
1868 003353' 252600 000000 MWORD <CONT,A=12,B=17,SAB,XNOR,D=1> ; 2526
1869 003354' 171127 400340
1870 003355' 252725 310000 MWORD <CJV,J=2531,S0Q,OR,D=1,CENA,CCFZ> ; 2527
1871 003356' 231400 020140
1872 003357' 253040 000000 MWORD <JMAP,J=4000> ; 2530 error
1873 003360' 000000 000040
1874 003361' 253100 000000 MWORD <CONT,A=13,B=0,SAB,XNOR,D=2> ; 2531
1875 003362' 172130 000340
1876 003363' 253225 340000 MWORD <CJV,J=2534,S0Q,OR,D=1,CENA,CCFZ> ; 2532
1877 003364' 231400 020140
1878 003365' 253340 000000 MWORD <JMAP,J=4000> ; 2533 error
1879 003366' 000000 000040
1880 003367' 253400 000000 MWORD <CONT,A=14,B=1,SAB,XNOR,D=3> ; 2534
1881 003370' 173140 400340
1882 003371' 253525 370000 MWORD <CJV,J=2537,S0Q,OR,D=1,CENA,CCFZ> ; 2535
1883 003372' 231400 020140
1884 003373' 253640 000000 MWORD <JMAP,J=4000> ; 2536 error
1885 003374' 000000 000040
1886 003375' 253700 000000 MWORD <CONT,A=15,B=2,SAB,XNOR,D=5> ; 2537
1887 003376' 175151 000340
1888 003377' 254025 420000 MWORD <CJV,J=2542,S0Q,OR,D=1,CENA,CCFZ> ; 2540
1889 003400' 231400 020140
1890 003401' 254140 000000 MWORD <JMAP,J=4000> ; 2541 error
1891 003402' 000000 000040
1892 003403' 254200 000000 MWORD <CONT,A=16,B=3,SAB,XNOR,D=7> ; 2542
1893 003404' 177161 400340
1894 003405' 254325 450000 MWORD <CJV,J=2545,S0Q,OR,D=1,CENA,CCFZ> ; 2543
1895 003406' 231400 020140
1896 003407' 254440 000000 MWORD <JMAP,J=4000> ; 2544 error
1897 003410' 000000 000040
1898 003411' 254500 000000 MWORD <CONT,A=4,B=11,S0Q,XNOR,D=1> ; 2545
1899 003412' 271044 400340
1900 003413' 254625 500000 MWORD <CJV,J=2550,S0Q,OR,D=1,CENA,CCFZ> ; 2546
1901 003414' 231400 020140
1902 003415' 254740 000000 MWORD <JMAP,J=4000> ; 2547 error
1903 003416' 000000 000040
1904 003417' 255000 000000 MWORD <CONT,A=5,B=12,S0Q,XNOR,D=2> ; 2550
1905 003420' 272055 000340
1906 003421' 255125 530000 MWORD <CJV,J=2553,S0Q,OR,D=1,CENA,CCFZ> ; 2551
1907 003422' 231400 020140
1908 003423' 255240 000000 MWORD <JMAP,J=4000> ; 2552 error
1909 003424' 000000 000040
1910 003425' 255300 000000 MWORD <CONT,A=6,B=13,S0Q,XNOR,D=3> ; 2553
1911 003426' 273065 400340
1912 003427' 255425 560000 MWORD <CJV,J=2556,S0Q,OR,D=1,CENA,CCFZ> ; 2554
1913 003430' 231400 020140
1914 003431' 255540 000000 MWORD <JMAP,J=4000> ; 2555 error
1915 003432' 000000 000040
1916 003433' 255600 000000 MWORD <CONT,A=7,B=14,S0Q,XNOR,D=5> ; 2556
1917 003434' 275076 000340
1918 003435' 255725 610000 MWORD <CJV,J=2561,S0Q,OR,D=1,CENA,CCFZ> ; 2557
1919 003436' 231400 020140
1920 003437' 256040 000000 MWORD <JMAP,J=4000> ; 2560 error
1921 003440' 000000 000040
1922 003441' 256100 000000 MWORD <CONT,A=10,B=15,S0Q,XNOR,D=7> ; 2561
.MAIN MACRO %53A(1152) 09:55 16-Oct-84 Page 4-33
DFPTA5 MAC 19-Jan-83 11:21 Register Interference Tests SEQ 1129
1923 003442' 277106 400340
1924 003443' 256225 640000 MWORD <CJV,J=2564,S0Q,OR,D=1,CENA,CCFZ> ; 2562
1925 003444' 231400 020140
1926 003445' 256340 000000 MWORD <JMAP,J=4000> ; 2563 error
1927 003446' 000000 000040
1928 003447' 256400 000000 MWORD <CONT,A=16,B=3,S0B,XNOR,D=1> ; 2564
1929 003450' 371161 400340
1930 003451' 256525 670000 MWORD <CJV,J=2567,S0Q,OR,D=1,CENA,CCFZ> ; 2565
1931 003452' 231400 020140
1932 003453' 256640 000000 MWORD <JMAP,J=4000> ; 2566 error
1933 003454' 000000 000040
1934 003455' 256700 000000 MWORD <CONT,A=17,B=4,S0B,XNOR,D=2> ; 2567
1935 003456' 372172 000340
1936 003457' 257025 720000 MWORD <CJV,J=2572,S0Q,OR,D=1,CENA,CCFZ> ; 2570
1937 003460' 231400 020140
1938 003461' 257140 000000 MWORD <JMAP,J=4000> ; 2571 error
1939 003462' 000000 000040
1940 003463' 257200 000000 MWORD <CONT,A=0,B=5,S0B,XNOR,D=3> ; 2572
1941 003464' 373002 400340
1942 003465' 257325 750000 MWORD <CJV,J=2575,S0Q,OR,D=1,CENA,CCFZ> ; 2573
1943 003466' 231400 020140
1944 003467' 257440 000000 MWORD <JMAP,J=4000> ; 2574 error
1945 003470' 000000 000040
1946 003471' 257500 000000 MWORD <CONT,A=1,B=6,S0B,XNOR,D=5> ; 2575
1947 003472' 375013 000340
1948 003473' 257626 000000 MWORD <CJV,J=2600,S0Q,OR,D=1,CENA,CCFZ> ; 2576
1949 003474' 231400 020140
1950 003475' 257740 000000 MWORD <JMAP,J=4000> ; 2577 error
1951 003476' 000000 000040
1952 003477' 260000 000000 MWORD <CONT,A=2,B=7,S0B,XNOR,D=7> ; 2600
1953 003500' 377023 400340
1954 003501' 260126 030000 MWORD <CJV,J=2603,S0Q,OR,D=1,CENA,CCFZ> ; 2601
1955 003502' 231400 020140
1956 003503' 260240 000000 MWORD <JMAP,J=4000> ; 2602 error
1957 003504' 000000 000040
1958 003505' 260300 000000 MWORD <CONT,A=10,B=15,S0A,XNOR,D=1> ; 2603
1959 003506' 471106 400340
1960 003507' 260426 060000 MWORD <CJV,J=2606,S0Q,OR,D=1,CENA,CCFZ> ; 2604
1961 003510' 231400 020140
1962 003511' 260540 000000 MWORD <JMAP,J=4000> ; 2605 error
1963 003512' 000000 000040
1964 003513' 260600 000000 MWORD <CONT,A=11,B=16,S0A,XNOR,D=2> ; 2606
1965 003514' 472117 000340
1966 003515' 260726 110000 MWORD <CJV,J=2611,S0Q,OR,D=1,CENA,CCFZ> ; 2607
1967 003516' 231400 020140
1968 003517' 261040 000000 MWORD <JMAP,J=4000> ; 2610 error
1969 003520' 000000 000040
1970 003521' 261100 000000 MWORD <CONT,A=12,B=17,S0A,XNOR,D=3> ; 2611
1971 003522' 473127 400340
1972 003523' 261226 140000 MWORD <CJV,J=2614,S0Q,OR,D=1,CENA,CCFZ> ; 2612
1973 003524' 231400 020140
1974 003525' 261340 000000 MWORD <JMAP,J=4000> ; 2613 error
1975 003526' 000000 000040
1976 003527' 261400 000000 MWORD <CONT,A=13,B=0,S0A,XNOR,D=5> ; 2614
1977 003530' 475130 000340
.MAIN MACRO %53A(1152) 09:55 16-Oct-84 Page 4-34
DFPTA5 MAC 19-Jan-83 11:21 Register Interference Tests SEQ 1130
1978 003531' 261526 170000 MWORD <CJV,J=2617,S0Q,OR,D=1,CENA,CCFZ> ; 2615
1979 003532' 231400 020140
1980 003533' 261640 000000 MWORD <JMAP,J=4000> ; 2616 error
1981 003534' 000000 000040
1982 003535' 261700 000000 MWORD <CONT,A=14,B=1,S0A,XNOR,D=7> ; 2617
1983 003536' 477140 400340
1984 003537' 262026 220000 MWORD <CJV,J=2622,S0Q,OR,D=1,CENA,CCFZ> ; 2620
1985 003540' 231400 020140
1986 003541' 262140 000000 MWORD <JMAP,J=4000> ; 2621 error
1987 003542' 000000 000040
1988 003543' 262200 000000 MWORD <CONT,A=2,B=7,SDA,XNOR,D=1> ; 2622
1989 003544' 571023 400340
1990 003545' 262326 250000 MWORD <CJV,J=2625,S0Q,OR,D=1,CENA,CCFZ> ; 2623
1991 003546' 231400 020140
1992 003547' 262440 000000 MWORD <JMAP,J=4000> ; 2624 error
1993 003550' 000000 000040
1994 003551' 262500 000000 MWORD <CONT,A=3,B=10,SDA,XNOR,D=2> ; 2625
1995 003552' 572034 000340
1996 003553' 262626 300000 MWORD <CJV,J=2630,S0Q,OR,D=1,CENA,CCFZ> ; 2626
1997 003554' 231400 020140
1998 003555' 262740 000000 MWORD <JMAP,J=4000> ; 2627 error
1999 003556' 000000 000040
2000 003557' 263000 000000 MWORD <CONT,A=4,B=11,SDA,XNOR,D=3> ; 2630
2001 003560' 573044 400340
2002 003561' 263126 330000 MWORD <CJV,J=2633,S0Q,OR,D=1,CENA,CCFZ> ; 2631
2003 003562' 231400 020140
2004 003563' 263240 000000 MWORD <JMAP,J=4000> ; 2632 error
2005 003564' 000000 000040
2006 003565' 263300 000000 MWORD <CONT,A=5,B=12,SDA,XNOR,D=5> ; 2633
2007 003566' 575055 000340
2008 003567' 263426 360000 MWORD <CJV,J=2636,S0Q,OR,D=1,CENA,CCFZ> ; 2634
2009 003570' 231400 020140
2010 003571' 263540 000000 MWORD <JMAP,J=4000> ; 2635 error
2011 003572' 000000 000040
2012 003573' 263600 000000 MWORD <CONT,A=6,B=13,SDA,XNOR,D=7> ; 2636
2013 003574' 577065 400340
2014 003575' 263726 410000 MWORD <CJV,J=2641,S0Q,OR,D=1,CENA,CCFZ> ; 2637
2015 003576' 231400 020140
2016 003577' 264040 000000 MWORD <JMAP,J=4000> ; 2640 error
2017 003600' 000000 000040
2018 003601' 264100 000000 MWORD <CONT,A=14,B=1,SDQ,XNOR,D=1> ; 2641
2019 003602' 671140 400340
2020 003603' 264226 440000 MWORD <CJV,J=2644,S0Q,OR,D=1,CENA,CCFZ> ; 2642
2021 003604' 231400 020140
2022 003605' 264340 000000 MWORD <JMAP,J=4000> ; 2643 error
2023 003606' 000000 000040
2024 003607' 264400 000000 MWORD <CONT,A=15,B=2,SDQ,XNOR,D=2> ; 2644
2025 003610' 672151 000340
2026 003611' 264526 470000 MWORD <CJV,J=2647,S0Q,OR,D=1,CENA,CCFZ> ; 2645
2027 003612' 231400 020140
2028 003613' 264640 000000 MWORD <JMAP,J=4000> ; 2646 error
2029 003614' 000000 000040
2030 003615' 264700 000000 MWORD <CONT,A=16,B=3,SDQ,XNOR,D=3> ; 2647
2031 003616' 673161 400340
2032 003617' 265026 520000 MWORD <CJV,J=2652,S0Q,OR,D=1,CENA,CCFZ> ; 2650
.MAIN MACRO %53A(1152) 09:55 16-Oct-84 Page 4-35
DFPTA5 MAC 19-Jan-83 11:21 Register Interference Tests SEQ 1131
2033 003620' 231400 020140
2034 003621' 265140 000000 MWORD <JMAP,J=4000> ; 2651 error
2035 003622' 000000 000040
2036 003623' 265200 000000 MWORD <CONT,A=17,B=4,SDQ,XNOR,D=5> ; 2652
2037 003624' 675172 000340
2038 003625' 265326 550000 MWORD <CJV,J=2655,S0Q,OR,D=1,CENA,CCFZ> ; 2653
2039 003626' 231400 020140
2040 003627' 265440 000000 MWORD <JMAP,J=4000> ; 2654 error
2041 003630' 000000 000040
2042 003631' 265500 000000 MWORD <CONT,A=0,B=5,SDQ,XNOR,D=7> ; 2655
2043 003632' 677002 400340
2044 003633' 265626 600000 MWORD <CJV,J=2660,S0Q,OR,D=1,CENA,CCFZ> ; 2656
2045 003634' 231400 020140
2046 003635' 265740 000000 MWORD <JMAP,J=4000> ; 2657 error
2047 003636' 000000 000040
2048 003637' 266000 000000 MWORD <CONT,A=6,B=13,SD0,XNOR,D=1> ; 2660
2049 003640' 771065 400340
2050 003641' 266126 630000 MWORD <CJV,J=2663,S0Q,OR,D=1,CENA,CCFZ> ; 2661
2051 003642' 231400 020140
2052 003643' 266240 000000 MWORD <JMAP,J=4000> ; 2662 error
2053 003644' 000000 000040
2054 003645' 266300 000000 MWORD <CONT,A=7,B=14,SD0,XNOR,D=2> ; 2663
2055 003646' 772076 000340
2056 003647' 266426 660000 MWORD <CJV,J=2666,S0Q,OR,D=1,CENA,CCFZ> ; 2664
2057 003650' 231400 020140
2058 003651' 266540 000000 MWORD <JMAP,J=4000> ; 2665 error
2059 003652' 000000 000040
2060 003653' 266600 000000 MWORD <CONT,A=10,B=15,SD0,XNOR,D=3> ; 2666
2061 003654' 773106 400340
2062 003655' 266726 710000 MWORD <CJV,J=2671,S0Q,OR,D=1,CENA,CCFZ> ; 2667
2063 003656' 231400 020140
2064 003657' 267040 000000 MWORD <JMAP,J=4000> ; 2670 error
2065 003660' 000000 000040
2066 003661' 267100 000000 MWORD <CONT,A=11,B=16,SD0,XNOR,D=5> ; 2671
2067 003662' 775117 000340
2068 003663' 267226 740000 MWORD <CJV,J=2674,S0Q,OR,D=1,CENA,CCFZ> ; 2672
2069 003664' 231400 020140
2070 003665' 267340 000000 MWORD <JMAP,J=4000> ; 2673 error
2071 003666' 000000 000040
2072 003667' 267400 000000 MWORD <CONT,A=12,B=17,SD0,XNOR,D=7> ; 2674
2073 003670' 777127 400340
2074 003671' 267526 770000 MWORD <CJV,J=2677,S0Q,OR,D=1,CENA,CCFZ> ; 2675
2075 003672' 231400 020140
2076 003673' 267640 000000 MWORD <JMAP,J=4000> ; 2676 error
2077 003674' 000000 000040
2078
2079 ; Done
2080
2081 003675' 267726 770000 MWORD <JMAP,J=2677,BAD> ; 2677 done
2082 003676' 000000 000041
2083
2084 ; Error
2085
2086 003677' 400040 000000 MWORD <ADDR=4000,JMAP,J=4000,BAD> ; 4000 error
2087 003700' 000000 000041
.MAIN MACRO %53A(1152) 09:55 16-Oct-84 Page 4-36
DFPTA5 MAC 19-Jan-83 11:21 Register Interference Tests SEQ 1132
2088 003701' 777777 777777 -1
2089
2090
2091 ;#********************************************************************
2092 ; End of 2901 Tests (Part 2)
2093 ;#********************************************************************
2094
2095 XLIST
2096
NO ERRORS DETECTED
PROGRAM BREAK IS 003712
CPU TIME USED 06:21.272
179P CORE USED
.MAIN MACRO %53A(1152) 09:55 16-Oct-84 Page S-1
DFPTA5 MAC 19-Jan-83 11:21 SYMBOL TABLE SEQ 1133
AAPNT 000000 ext .LS0A 000000 spd .RRMIN 020000 000000 spd
AEXEC 000024' ext .LS0B 000000 spd .RS0A 400000 000000 spd
ALU 020000 000000 spd .LS0Q 000000 spd .RS0B 300000 000000 spd
CALL 200000 000000 spd .LSAB 000000 spd .RS0Q 200000 000000 spd
E23 000027 spd .LSAQ 000000 spd .RSAB 100000 000000 spd
EBUS 400000 000000 spd .LSD0 000000 spd .RSAQ 000000 spd
ERFLG 000015 .LSDA 000000 spd .RSD0 700000 000000 spd
GO 260740 000000 .LSDQ 000000 spd .RSDA 500000 000000 spd
IPACLR 000000 ext .LSKCN 000000 spd .RSDQ 600000 000000 spd
LAST 010000 000000 spd .LSMIN 000000 spd .RSKCN 240000 spd
MA31 000032' .LXNOR 000000 spd .RSMIN 010000 000000 spd
MLAST 400000 000000 spd .LXOR 000000 spd .RXNOR 070000 000000 spd
NDMP 000400 000000 spd .MA 000017 spd .RXOR 060000 000000 spd
RTN 263740 000000 .MAND 000007 spd
SCOPER 027000 000000 .MB 000017 spd
T31M 000033' .MBAD 000001 spd
TA31 000017' .MCCFZ 000037 spd
TG31 000012' .MCENA 000001 spd
TLOAD 000015' ext .MCJV 000017 spd
TRACE 000013' ext .MCONT 000017 spd
TSTA31 000000' ent .MD 000007 spd
TSTA32 000000 ext .MJ 007777 spd
TSTA36 000000 ext .MJMAP 000017 spd
TSTA37 000000 ext .MMGC 001777 spd
TSTA40 000000 ext .MNAND 000007 spd
TSTA41 000000 ext .MOR 000007 spd
TSTSUB 000000 ext .MPLUS 000007 spd
TX31 000031' .MRMIN 000007 spd
TXALL 060000 000000 spd .MS0A 000007 spd
Z5 000000' .MS0B 000007 spd
ZALU 000002 000000 spd .MS0Q 000007 spd
$ARG2 000001 .MSAB 000007 spd
$B 000044 .MSAQ 000007 spd
$CHR 424144 .MSD0 000007 spd
$GARG 000000 .MSDA 000007 spd
%ADDR 004001 spd .MSDQ 000007 spd
%ML 400040 000000 spd .MSKCN 000037 spd
%MR 000041 spd .MSMIN 000007 spd
.LA 000000 spd .MXNOR 000007 spd
.LADDR 000100 000000 spd .MXOR 000007 spd
.LAND 000000 spd .RA 000010 000000 spd
.LB 000000 spd .RAND 040000 000000 spd
.LBAD 000000 spd .RB 400000 spd
.LCCFZ 000000 spd .RBAD 000001 spd
.LCENA 000000 spd .RCCFZ 020000 spd
.LCJV 000000 spd .RCENA 000400 000000 spd
.LCONT 000000 spd .RCJV 000140 spd
.LD 000000 spd .RCONT 000340 spd
.LJ 010000 spd .RD 001000 000000 spd
.LJMAP 000000 spd .RJ 000000 spd
.LMGC 000001 spd .RJMAP 000040 spd
.LNAND 000000 spd .RMGC 000000 spd
.LOR 000000 spd .RNAND 050000 000000 spd
.LPLUS 000000 spd .ROR 030000 000000 spd
.LRMIN 000000 spd .RPLUS 000000 spd
AAPNT 17# 107
AEXEC 17# 95 SEQ 1134
ALU 70
CALL 107
E23 72
EBUS 70
ERFLG 90 96
IPACLR 21#
LAST 107
MA31 97 107#
MLAST 72
NDMP 70
T31M 71 84 111#
TA31 90# 98
TG31 69 82#
TLOAD 17# 85
TRACE 17# 83
TSTA31 9 69#
TSTA32 13# 73
TSTA36 13# 74
TSTA37 13# 75
TSTA40 13# 76
TSTA41 13# 77
TSTSUB 17#
TX31 99 103#
TXALL 107
Z5 28# 82
ZALU 70
$ARG2 115# 115 120# 120 122# 122 124# 124 126# 126 128# 128 130# 130
132# 132 134# 134 136# 136 138# 138 140# 140 142# 142 144# 144
146# 146 148# 148 150# 150 152# 152 160# 160 162# 162 164# 164
166# 166 168# 168 170# 170 172# 172 174# 174 176# 176 178# 178
180# 180 182# 182 184# 184 186# 186 188# 188 190# 190 192# 192
194# 194 196# 196 198# 198 200# 200 202# 202 204# 204 206# 206
208# 208 210# 210 212# 212 214# 214 216# 216 218# 218 220# 220
222# 222 224# 224 226# 226 228# 228 230# 230 232# 232 234# 234
236# 236 238# 238 240# 240 242# 242 244# 244 246# 246 248# 248
250# 250 252# 252 254# 254 256# 256 258# 258 260# 260 262# 262
264# 264 266# 266 268# 268 270# 270 272# 272 274# 274 276# 276
278# 278 280# 280 282# 282 284# 284 286# 286 288# 288 290# 290
292# 292 294# 294 296# 296 298# 298 300# 300 302# 302 304# 304
306# 306 308# 308 310# 310 312# 312 314# 314 316# 316 318# 318
320# 320 322# 322 324# 324 326# 326 328# 328 330# 330 332# 332
334# 334 336# 336 338# 338 340# 340 342# 342 344# 344 346# 346
348# 348 350# 350 352# 352 354# 354 356# 356 358# 358 360# 360
362# 362 364# 364 366# 366 368# 368 370# 370 372# 372 374# 374
376# 376 378# 378 380# 380 382# 382 384# 384 386# 386 388# 388
390# 390 392# 392 394# 394 396# 396 398# 398 400# 400 402# 402
404# 404 406# 406 408# 408 410# 410 412# 412 414# 414 416# 416
418# 418 420# 420 422# 422 424# 424 426# 426 428# 428 430# 430
432# 432 434# 434 436# 436 438# 438 440# 440 442# 442 444# 444
446# 446 448# 448 450# 450 452# 452 454# 454 456# 456 458# 458
460# 460 462# 462 464# 464 466# 466 468# 468 470# 470 472# 472
474# 474 476# 476 478# 478 480# 480 482# 482 484# 484 486# 486
488# 488 490# 490 492# 492 494# 494 496# 496 498# 498 500# 500 SEQ 1135
502# 502 504# 504 506# 506 508# 508 510# 510 512# 512 514# 514
516# 516 518# 518 520# 520 522# 522 524# 524 526# 526 528# 528
530# 530 532# 532 534# 534 536# 536 538# 538 540# 540 542# 542
544# 544 546# 546 548# 548 550# 550 552# 552 554# 554 556# 556
558# 558 560# 560 562# 562 564# 564 566# 566 568# 568 570# 570
572# 572 574# 574 576# 576 578# 578 580# 580 582# 582 584# 584
586# 586 588# 588 590# 590 592# 592 594# 594 596# 596 598# 598
600# 600 602# 602 604# 604 606# 606 608# 608 610# 610 612# 612
614# 614 616# 616 618# 618 620# 620 622# 622 624# 624 626# 626
628# 628 630# 630 632# 632 634# 634 636# 636 638# 638 640# 640
642# 642 644# 644 646# 646 648# 648 650# 650 652# 652 654# 654
656# 656 658# 658 660# 660 662# 662 664# 664 666# 666 668# 668
670# 670 672# 672 674# 674 676# 676 678# 678 680# 680 682# 682
684# 684 686# 686 688# 688 690# 690 692# 692 694# 694 696# 696
698# 698 700# 700 702# 702 704# 704 706# 706 708# 708 710# 710
712# 712 714# 714 716# 716 718# 718 720# 720 722# 722 724# 724
726# 726 728# 728 730# 730 732# 732 734# 734 736# 736 738# 738
740# 740 742# 742 744# 744 746# 746 748# 748 750# 750 752# 752
754# 754 756# 756 758# 758 760# 760 762# 762 764# 764 766# 766
768# 768 770# 770 772# 772 774# 774 776# 776 778# 778 780# 780
782# 782 784# 784 786# 786 788# 788 790# 790 792# 792 794# 794
796# 796 798# 798 800# 800 802# 802 804# 804 806# 806 808# 808
810# 810 812# 812 814# 814 816# 816 818# 818 820# 820 822# 822
824# 824 826# 826 828# 828 830# 830 832# 832 834# 834 836# 836
838# 838 840# 840 842# 842 844# 844 846# 846 848# 848 850# 850
852# 852 854# 854 856# 856 858# 858 860# 860 862# 862 864# 864
866# 866 868# 868 870# 870 872# 872 874# 874 876# 876 878# 878
880# 880 882# 882 884# 884 886# 886 888# 888 890# 890 892# 892
894# 894 896# 896 898# 898 900# 900 902# 902 904# 904 906# 906
908# 908 910# 910 912# 912 914# 914 916# 916 918# 918 920# 920
922# 922 924# 924 926# 926 928# 928 930# 930 932# 932 934# 934
936# 936 938# 938 940# 940 942# 942 944# 944 946# 946 948# 948
950# 950 952# 952 954# 954 956# 956 958# 958 960# 960 962# 962
964# 964 966# 966 968# 968 970# 970 972# 972 974# 974 976# 976
978# 978 980# 980 982# 982 984# 984 986# 986 988# 988 990# 990
992# 992 994# 994 996# 996 998# 998 1000# 1000 1002# 1002 1004# 1004
1006# 1006 1008# 1008 1010# 1010 1012# 1012 1014# 1014 1016# 1016 1018# 1018
1020# 1020 1022# 1022 1024# 1024 1026# 1026 1028# 1028 1030# 1030 1032# 1032
1034# 1034 1036# 1036 1038# 1038 1040# 1040 1042# 1042 1044# 1044 1046# 1046
1048# 1048 1050# 1050 1052# 1052 1054# 1054 1056# 1056 1058# 1058 1060# 1060
1062# 1062 1064# 1064 1066# 1066 1068# 1068 1070# 1070 1072# 1072 1074# 1074
1076# 1076 1078# 1078 1080# 1080 1082# 1082 1084# 1084 1086# 1086 1088# 1088
1090# 1090 1092# 1092 1094# 1094 1096# 1096 1098# 1098 1100# 1100 1102# 1102
1104# 1104 1106# 1106 1108# 1108 1110# 1110 1112# 1112 1114# 1114 1116# 1116
1118# 1118 1120# 1120 1122# 1122 1124# 1124 1126# 1126 1128# 1128 1130# 1130
1132# 1132 1134# 1134 1136# 1136 1138# 1138 1140# 1140 1142# 1142 1144# 1144
1146# 1146 1148# 1148 1150# 1150 1152# 1152 1154# 1154 1156# 1156 1158# 1158
1160# 1160 1162# 1162 1164# 1164 1166# 1166 1168# 1168 1170# 1170 1172# 1172
1174# 1174 1176# 1176 1178# 1178 1180# 1180 1182# 1182 1184# 1184 1186# 1186
1188# 1188 1190# 1190 1192# 1192 1194# 1194 1196# 1196 1198# 1198 1200# 1200
1202# 1202 1204# 1204 1206# 1206 1208# 1208 1210# 1210 1212# 1212 1214# 1214
1216# 1216 1218# 1218 1220# 1220 1222# 1222 1224# 1224 1226# 1226 1228# 1228
1230# 1230 1232# 1232 1234# 1234 1236# 1236 1238# 1238 1240# 1240 1242# 1242 SEQ 1136
1244# 1244 1246# 1246 1248# 1248 1250# 1250 1252# 1252 1254# 1254 1256# 1256
1258# 1258 1260# 1260 1262# 1262 1264# 1264 1266# 1266 1268# 1268 1270# 1270
1272# 1272 1274# 1274 1276# 1276 1278# 1278 1280# 1280 1282# 1282 1284# 1284
1286# 1286 1288# 1288 1290# 1290 1292# 1292 1294# 1294 1296# 1296 1298# 1298
1300# 1300 1302# 1302 1304# 1304 1306# 1306 1308# 1308 1310# 1310 1312# 1312
1314# 1314 1316# 1316 1318# 1318 1320# 1320 1322# 1322 1324# 1324 1326# 1326
1328# 1328 1330# 1330 1332# 1332 1334# 1334 1336# 1336 1338# 1338 1340# 1340
1342# 1342 1344# 1344 1346# 1346 1348# 1348 1350# 1350 1352# 1352 1354# 1354
1356# 1356 1358# 1358 1360# 1360 1362# 1362 1364# 1364 1366# 1366 1368# 1368
1370# 1370 1372# 1372 1374# 1374 1376# 1376 1378# 1378 1380# 1380 1382# 1382
1384# 1384 1386# 1386 1388# 1388 1390# 1390 1392# 1392 1394# 1394 1396# 1396
1398# 1398 1400# 1400 1402# 1402 1404# 1404 1406# 1406 1408# 1408 1410# 1410
1412# 1412 1414# 1414 1416# 1416 1418# 1418 1420# 1420 1422# 1422 1424# 1424
1426# 1426 1428# 1428 1430# 1430 1432# 1432 1434# 1434 1436# 1436 1438# 1438
1440# 1440 1442# 1442 1444# 1444 1446# 1446 1448# 1448 1450# 1450 1452# 1452
1454# 1454 1456# 1456 1458# 1458 1460# 1460 1462# 1462 1464# 1464 1466# 1466
1468# 1468 1470# 1470 1472# 1472 1474# 1474 1476# 1476 1478# 1478 1480# 1480
1482# 1482 1484# 1484 1486# 1486 1488# 1488 1490# 1490 1492# 1492 1494# 1494
1496# 1496 1498# 1498 1500# 1500 1502# 1502 1504# 1504 1506# 1506 1508# 1508
1510# 1510 1512# 1512 1514# 1514 1516# 1516 1518# 1518 1520# 1520 1522# 1522
1524# 1524 1526# 1526 1528# 1528 1530# 1530 1532# 1532 1534# 1534 1536# 1536
1538# 1538 1540# 1540 1542# 1542 1544# 1544 1546# 1546 1548# 1548 1550# 1550
1552# 1552 1554# 1554 1556# 1556 1558# 1558 1560# 1560 1562# 1562 1564# 1564
1566# 1566 1568# 1568 1570# 1570 1572# 1572 1574# 1574 1576# 1576 1578# 1578
1580# 1580 1582# 1582 1584# 1584 1586# 1586 1588# 1588 1590# 1590 1592# 1592
1594# 1594 1596# 1596 1598# 1598 1600# 1600 1602# 1602 1604# 1604 1606# 1606
1608# 1608 1610# 1610 1612# 1612 1614# 1614 1616# 1616 1618# 1618 1620# 1620
1622# 1622 1624# 1624 1626# 1626 1628# 1628 1630# 1630 1632# 1632 1634# 1634
1636# 1636 1638# 1638 1640# 1640 1642# 1642 1644# 1644 1646# 1646 1648# 1648
1650# 1650 1652# 1652 1654# 1654 1656# 1656 1658# 1658 1660# 1660 1662# 1662
1664# 1664 1666# 1666 1668# 1668 1670# 1670 1672# 1672 1674# 1674 1676# 1676
1678# 1678 1680# 1680 1682# 1682 1684# 1684 1686# 1686 1688# 1688 1690# 1690
1692# 1692 1694# 1694 1696# 1696 1698# 1698 1700# 1700 1702# 1702 1704# 1704
1706# 1706 1708# 1708 1710# 1710 1712# 1712 1714# 1714 1716# 1716 1718# 1718
1720# 1720 1722# 1722 1724# 1724 1726# 1726 1728# 1728 1730# 1730 1732# 1732
1734# 1734 1736# 1736 1738# 1738 1740# 1740 1742# 1742 1744# 1744 1746# 1746
1748# 1748 1750# 1750 1752# 1752 1754# 1754 1756# 1756 1758# 1758 1760# 1760
1762# 1762 1764# 1764 1766# 1766 1768# 1768 1770# 1770 1772# 1772 1774# 1774
1776# 1776 1778# 1778 1780# 1780 1782# 1782 1784# 1784 1786# 1786 1788# 1788
1790# 1790 1792# 1792 1794# 1794 1796# 1796 1798# 1798 1800# 1800 1802# 1802
1804# 1804 1806# 1806 1808# 1808 1810# 1810 1812# 1812 1814# 1814 1816# 1816
1818# 1818 1820# 1820 1822# 1822 1824# 1824 1826# 1826 1828# 1828 1830# 1830
1832# 1832 1834# 1834 1836# 1836 1838# 1838 1840# 1840 1842# 1842 1844# 1844
1846# 1846 1848# 1848 1850# 1850 1852# 1852 1854# 1854 1856# 1856 1858# 1858
1860# 1860 1862# 1862 1864# 1864 1866# 1866 1868# 1868 1870# 1870 1872# 1872
1874# 1874 1876# 1876 1878# 1878 1880# 1880 1882# 1882 1884# 1884 1886# 1886
1888# 1888 1890# 1890 1892# 1892 1894# 1894 1896# 1896 1898# 1898 1900# 1900
1902# 1902 1904# 1904 1906# 1906 1908# 1908 1910# 1910 1912# 1912 1914# 1914
1916# 1916 1918# 1918 1920# 1920 1922# 1922 1924# 1924 1926# 1926 1928# 1928
1930# 1930 1932# 1932 1934# 1934 1936# 1936 1938# 1938 1940# 1940 1942# 1942
1944# 1944 1946# 1946 1948# 1948 1950# 1950 1952# 1952 1954# 1954 1956# 1956
1958# 1958 1960# 1960 1962# 1962 1964# 1964 1966# 1966 1968# 1968 1970# 1970
1972# 1972 1974# 1974 1976# 1976 1978# 1978 1980# 1980 1982# 1982 1984# 1984 SEQ 1137
1986# 1986 1988# 1988 1990# 1990 1992# 1992 1994# 1994 1996# 1996 1998# 1998
2000# 2000 2002# 2002 2004# 2004 2006# 2006 2008# 2008 2010# 2010 2012# 2012
2014# 2014 2016# 2016 2018# 2018 2020# 2020 2022# 2022 2024# 2024 2026# 2026
2028# 2028 2030# 2030 2032# 2032 2034# 2034 2036# 2036 2038# 2038 2040# 2040
2042# 2042 2044# 2044 2046# 2046 2048# 2048 2050# 2050 2052# 2052 2054# 2054
2056# 2056 2058# 2058 2060# 2060 2062# 2062 2064# 2064 2066# 2066 2068# 2068
2070# 2070 2072# 2072 2074# 2074 2076# 2076 2081# 2081 2086# 2086
$B 115# 115 120# 120 122# 122 124# 124 126# 126 128# 128 130# 130
132# 132 134# 134 136# 136 138# 138 140# 140 142# 142 144# 144
146# 146 148# 148 150# 150 152# 152 160# 160 162# 162 164# 164
166# 166 168# 168 170# 170 172# 172 174# 174 176# 176 178# 178
180# 180 182# 182 184# 184 186# 186 188# 188 190# 190 192# 192
194# 194 196# 196 198# 198 200# 200 202# 202 204# 204 206# 206
208# 208 210# 210 212# 212 214# 214 216# 216 218# 218 220# 220
222# 222 224# 224 226# 226 228# 228 230# 230 232# 232 234# 234
236# 236 238# 238 240# 240 242# 242 244# 244 246# 246 248# 248
250# 250 252# 252 254# 254 256# 256 258# 258 260# 260 262# 262
264# 264 266# 266 268# 268 270# 270 272# 272 274# 274 276# 276
278# 278 280# 280 282# 282 284# 284 286# 286 288# 288 290# 290
292# 292 294# 294 296# 296 298# 298 300# 300 302# 302 304# 304
306# 306 308# 308 310# 310 312# 312 314# 314 316# 316 318# 318
320# 320 322# 322 324# 324 326# 326 328# 328 330# 330 332# 332
334# 334 336# 336 338# 338 340# 340 342# 342 344# 344 346# 346
348# 348 350# 350 352# 352 354# 354 356# 356 358# 358 360# 360
362# 362 364# 364 366# 366 368# 368 370# 370 372# 372 374# 374
376# 376 378# 378 380# 380 382# 382 384# 384 386# 386 388# 388
390# 390 392# 392 394# 394 396# 396 398# 398 400# 400 402# 402
404# 404 406# 406 408# 408 410# 410 412# 412 414# 414 416# 416
418# 418 420# 420 422# 422 424# 424 426# 426 428# 428 430# 430
432# 432 434# 434 436# 436 438# 438 440# 440 442# 442 444# 444
446# 446 448# 448 450# 450 452# 452 454# 454 456# 456 458# 458
460# 460 462# 462 464# 464 466# 466 468# 468 470# 470 472# 472
474# 474 476# 476 478# 478 480# 480 482# 482 484# 484 486# 486
488# 488 490# 490 492# 492 494# 494 496# 496 498# 498 500# 500
502# 502 504# 504 506# 506 508# 508 510# 510 512# 512 514# 514
516# 516 518# 518 520# 520 522# 522 524# 524 526# 526 528# 528
530# 530 532# 532 534# 534 536# 536 538# 538 540# 540 542# 542
544# 544 546# 546 548# 548 550# 550 552# 552 554# 554 556# 556
558# 558 560# 560 562# 562 564# 564 566# 566 568# 568 570# 570
572# 572 574# 574 576# 576 578# 578 580# 580 582# 582 584# 584
586# 586 588# 588 590# 590 592# 592 594# 594 596# 596 598# 598
600# 600 602# 602 604# 604 606# 606 608# 608 610# 610 612# 612
614# 614 616# 616 618# 618 620# 620 622# 622 624# 624 626# 626
628# 628 630# 630 632# 632 634# 634 636# 636 638# 638 640# 640
642# 642 644# 644 646# 646 648# 648 650# 650 652# 652 654# 654
656# 656 658# 658 660# 660 662# 662 664# 664 666# 666 668# 668
670# 670 672# 672 674# 674 676# 676 678# 678 680# 680 682# 682
684# 684 686# 686 688# 688 690# 690 692# 692 694# 694 696# 696
698# 698 700# 700 702# 702 704# 704 706# 706 708# 708 710# 710
712# 712 714# 714 716# 716 718# 718 720# 720 722# 722 724# 724
726# 726 728# 728 730# 730 732# 732 734# 734 736# 736 738# 738
740# 740 742# 742 744# 744 746# 746 748# 748 750# 750 752# 752
754# 754 756# 756 758# 758 760# 760 762# 762 764# 764 766# 766 SEQ 1138
768# 768 770# 770 772# 772 774# 774 776# 776 778# 778 780# 780
782# 782 784# 784 786# 786 788# 788 790# 790 792# 792 794# 794
796# 796 798# 798 800# 800 802# 802 804# 804 806# 806 808# 808
810# 810 812# 812 814# 814 816# 816 818# 818 820# 820 822# 822
824# 824 826# 826 828# 828 830# 830 832# 832 834# 834 836# 836
838# 838 840# 840 842# 842 844# 844 846# 846 848# 848 850# 850
852# 852 854# 854 856# 856 858# 858 860# 860 862# 862 864# 864
866# 866 868# 868 870# 870 872# 872 874# 874 876# 876 878# 878
880# 880 882# 882 884# 884 886# 886 888# 888 890# 890 892# 892
894# 894 896# 896 898# 898 900# 900 902# 902 904# 904 906# 906
908# 908 910# 910 912# 912 914# 914 916# 916 918# 918 920# 920
922# 922 924# 924 926# 926 928# 928 930# 930 932# 932 934# 934
936# 936 938# 938 940# 940 942# 942 944# 944 946# 946 948# 948
950# 950 952# 952 954# 954 956# 956 958# 958 960# 960 962# 962
964# 964 966# 966 968# 968 970# 970 972# 972 974# 974 976# 976
978# 978 980# 980 982# 982 984# 984 986# 986 988# 988 990# 990
992# 992 994# 994 996# 996 998# 998 1000# 1000 1002# 1002 1004# 1004
1006# 1006 1008# 1008 1010# 1010 1012# 1012 1014# 1014 1016# 1016 1018# 1018
1020# 1020 1022# 1022 1024# 1024 1026# 1026 1028# 1028 1030# 1030 1032# 1032
1034# 1034 1036# 1036 1038# 1038 1040# 1040 1042# 1042 1044# 1044 1046# 1046
1048# 1048 1050# 1050 1052# 1052 1054# 1054 1056# 1056 1058# 1058 1060# 1060
1062# 1062 1064# 1064 1066# 1066 1068# 1068 1070# 1070 1072# 1072 1074# 1074
1076# 1076 1078# 1078 1080# 1080 1082# 1082 1084# 1084 1086# 1086 1088# 1088
1090# 1090 1092# 1092 1094# 1094 1096# 1096 1098# 1098 1100# 1100 1102# 1102
1104# 1104 1106# 1106 1108# 1108 1110# 1110 1112# 1112 1114# 1114 1116# 1116
1118# 1118 1120# 1120 1122# 1122 1124# 1124 1126# 1126 1128# 1128 1130# 1130
1132# 1132 1134# 1134 1136# 1136 1138# 1138 1140# 1140 1142# 1142 1144# 1144
1146# 1146 1148# 1148 1150# 1150 1152# 1152 1154# 1154 1156# 1156 1158# 1158
1160# 1160 1162# 1162 1164# 1164 1166# 1166 1168# 1168 1170# 1170 1172# 1172
1174# 1174 1176# 1176 1178# 1178 1180# 1180 1182# 1182 1184# 1184 1186# 1186
1188# 1188 1190# 1190 1192# 1192 1194# 1194 1196# 1196 1198# 1198 1200# 1200
1202# 1202 1204# 1204 1206# 1206 1208# 1208 1210# 1210 1212# 1212 1214# 1214
1216# 1216 1218# 1218 1220# 1220 1222# 1222 1224# 1224 1226# 1226 1228# 1228
1230# 1230 1232# 1232 1234# 1234 1236# 1236 1238# 1238 1240# 1240 1242# 1242
1244# 1244 1246# 1246 1248# 1248 1250# 1250 1252# 1252 1254# 1254 1256# 1256
1258# 1258 1260# 1260 1262# 1262 1264# 1264 1266# 1266 1268# 1268 1270# 1270
1272# 1272 1274# 1274 1276# 1276 1278# 1278 1280# 1280 1282# 1282 1284# 1284
1286# 1286 1288# 1288 1290# 1290 1292# 1292 1294# 1294 1296# 1296 1298# 1298
1300# 1300 1302# 1302 1304# 1304 1306# 1306 1308# 1308 1310# 1310 1312# 1312
1314# 1314 1316# 1316 1318# 1318 1320# 1320 1322# 1322 1324# 1324 1326# 1326
1328# 1328 1330# 1330 1332# 1332 1334# 1334 1336# 1336 1338# 1338 1340# 1340
1342# 1342 1344# 1344 1346# 1346 1348# 1348 1350# 1350 1352# 1352 1354# 1354
1356# 1356 1358# 1358 1360# 1360 1362# 1362 1364# 1364 1366# 1366 1368# 1368
1370# 1370 1372# 1372 1374# 1374 1376# 1376 1378# 1378 1380# 1380 1382# 1382
1384# 1384 1386# 1386 1388# 1388 1390# 1390 1392# 1392 1394# 1394 1396# 1396
1398# 1398 1400# 1400 1402# 1402 1404# 1404 1406# 1406 1408# 1408 1410# 1410
1412# 1412 1414# 1414 1416# 1416 1418# 1418 1420# 1420 1422# 1422 1424# 1424
1426# 1426 1428# 1428 1430# 1430 1432# 1432 1434# 1434 1436# 1436 1438# 1438
1440# 1440 1442# 1442 1444# 1444 1446# 1446 1448# 1448 1450# 1450 1452# 1452
1454# 1454 1456# 1456 1458# 1458 1460# 1460 1462# 1462 1464# 1464 1466# 1466
1468# 1468 1470# 1470 1472# 1472 1474# 1474 1476# 1476 1478# 1478 1480# 1480
1482# 1482 1484# 1484 1486# 1486 1488# 1488 1490# 1490 1492# 1492 1494# 1494
1496# 1496 1498# 1498 1500# 1500 1502# 1502 1504# 1504 1506# 1506 1508# 1508 SEQ 1139
1510# 1510 1512# 1512 1514# 1514 1516# 1516 1518# 1518 1520# 1520 1522# 1522
1524# 1524 1526# 1526 1528# 1528 1530# 1530 1532# 1532 1534# 1534 1536# 1536
1538# 1538 1540# 1540 1542# 1542 1544# 1544 1546# 1546 1548# 1548 1550# 1550
1552# 1552 1554# 1554 1556# 1556 1558# 1558 1560# 1560 1562# 1562 1564# 1564
1566# 1566 1568# 1568 1570# 1570 1572# 1572 1574# 1574 1576# 1576 1578# 1578
1580# 1580 1582# 1582 1584# 1584 1586# 1586 1588# 1588 1590# 1590 1592# 1592
1594# 1594 1596# 1596 1598# 1598 1600# 1600 1602# 1602 1604# 1604 1606# 1606
1608# 1608 1610# 1610 1612# 1612 1614# 1614 1616# 1616 1618# 1618 1620# 1620
1622# 1622 1624# 1624 1626# 1626 1628# 1628 1630# 1630 1632# 1632 1634# 1634
1636# 1636 1638# 1638 1640# 1640 1642# 1642 1644# 1644 1646# 1646 1648# 1648
1650# 1650 1652# 1652 1654# 1654 1656# 1656 1658# 1658 1660# 1660 1662# 1662
1664# 1664 1666# 1666 1668# 1668 1670# 1670 1672# 1672 1674# 1674 1676# 1676
1678# 1678 1680# 1680 1682# 1682 1684# 1684 1686# 1686 1688# 1688 1690# 1690
1692# 1692 1694# 1694 1696# 1696 1698# 1698 1700# 1700 1702# 1702 1704# 1704
1706# 1706 1708# 1708 1710# 1710 1712# 1712 1714# 1714 1716# 1716 1718# 1718
1720# 1720 1722# 1722 1724# 1724 1726# 1726 1728# 1728 1730# 1730 1732# 1732
1734# 1734 1736# 1736 1738# 1738 1740# 1740 1742# 1742 1744# 1744 1746# 1746
1748# 1748 1750# 1750 1752# 1752 1754# 1754 1756# 1756 1758# 1758 1760# 1760
1762# 1762 1764# 1764 1766# 1766 1768# 1768 1770# 1770 1772# 1772 1774# 1774
1776# 1776 1778# 1778 1780# 1780 1782# 1782 1784# 1784 1786# 1786 1788# 1788
1790# 1790 1792# 1792 1794# 1794 1796# 1796 1798# 1798 1800# 1800 1802# 1802
1804# 1804 1806# 1806 1808# 1808 1810# 1810 1812# 1812 1814# 1814 1816# 1816
1818# 1818 1820# 1820 1822# 1822 1824# 1824 1826# 1826 1828# 1828 1830# 1830
1832# 1832 1834# 1834 1836# 1836 1838# 1838 1840# 1840 1842# 1842 1844# 1844
1846# 1846 1848# 1848 1850# 1850 1852# 1852 1854# 1854 1856# 1856 1858# 1858
1860# 1860 1862# 1862 1864# 1864 1866# 1866 1868# 1868 1870# 1870 1872# 1872
1874# 1874 1876# 1876 1878# 1878 1880# 1880 1882# 1882 1884# 1884 1886# 1886
1888# 1888 1890# 1890 1892# 1892 1894# 1894 1896# 1896 1898# 1898 1900# 1900
1902# 1902 1904# 1904 1906# 1906 1908# 1908 1910# 1910 1912# 1912 1914# 1914
1916# 1916 1918# 1918 1920# 1920 1922# 1922 1924# 1924 1926# 1926 1928# 1928
1930# 1930 1932# 1932 1934# 1934 1936# 1936 1938# 1938 1940# 1940 1942# 1942
1944# 1944 1946# 1946 1948# 1948 1950# 1950 1952# 1952 1954# 1954 1956# 1956
1958# 1958 1960# 1960 1962# 1962 1964# 1964 1966# 1966 1968# 1968 1970# 1970
1972# 1972 1974# 1974 1976# 1976 1978# 1978 1980# 1980 1982# 1982 1984# 1984
1986# 1986 1988# 1988 1990# 1990 1992# 1992 1994# 1994 1996# 1996 1998# 1998
2000# 2000 2002# 2002 2004# 2004 2006# 2006 2008# 2008 2010# 2010 2012# 2012
2014# 2014 2016# 2016 2018# 2018 2020# 2020 2022# 2022 2024# 2024 2026# 2026
2028# 2028 2030# 2030 2032# 2032 2034# 2034 2036# 2036 2038# 2038 2040# 2040
2042# 2042 2044# 2044 2046# 2046 2048# 2048 2050# 2050 2052# 2052 2054# 2054
2056# 2056 2058# 2058 2060# 2060 2062# 2062 2064# 2064 2066# 2066 2068# 2068
2070# 2070 2072# 2072 2074# 2074 2076# 2076 2081# 2081 2086# 2086
$CHR 115# 115 120# 120 122# 122 124# 124 126# 126 128# 128 130# 130
132# 132 134# 134 136# 136 138# 138 140# 140 142# 142 144# 144
146# 146 148# 148 150# 150 152# 152 160# 160 162# 162 164# 164
166# 166 168# 168 170# 170 172# 172 174# 174 176# 176 178# 178
180# 180 182# 182 184# 184 186# 186 188# 188 190# 190 192# 192
194# 194 196# 196 198# 198 200# 200 202# 202 204# 204 206# 206
208# 208 210# 210 212# 212 214# 214 216# 216 218# 218 220# 220
222# 222 224# 224 226# 226 228# 228 230# 230 232# 232 234# 234
236# 236 238# 238 240# 240 242# 242 244# 244 246# 246 248# 248
250# 250 252# 252 254# 254 256# 256 258# 258 260# 260 262# 262
264# 264 266# 266 268# 268 270# 270 272# 272 274# 274 276# 276
278# 278 280# 280 282# 282 284# 284 286# 286 288# 288 290# 290 SEQ 1140
292# 292 294# 294 296# 296 298# 298 300# 300 302# 302 304# 304
306# 306 308# 308 310# 310 312# 312 314# 314 316# 316 318# 318
320# 320 322# 322 324# 324 326# 326 328# 328 330# 330 332# 332
334# 334 336# 336 338# 338 340# 340 342# 342 344# 344 346# 346
348# 348 350# 350 352# 352 354# 354 356# 356 358# 358 360# 360
362# 362 364# 364 366# 366 368# 368 370# 370 372# 372 374# 374
376# 376 378# 378 380# 380 382# 382 384# 384 386# 386 388# 388
390# 390 392# 392 394# 394 396# 396 398# 398 400# 400 402# 402
404# 404 406# 406 408# 408 410# 410 412# 412 414# 414 416# 416
418# 418 420# 420 422# 422 424# 424 426# 426 428# 428 430# 430
432# 432 434# 434 436# 436 438# 438 440# 440 442# 442 444# 444
446# 446 448# 448 450# 450 452# 452 454# 454 456# 456 458# 458
460# 460 462# 462 464# 464 466# 466 468# 468 470# 470 472# 472
474# 474 476# 476 478# 478 480# 480 482# 482 484# 484 486# 486
488# 488 490# 490 492# 492 494# 494 496# 496 498# 498 500# 500
502# 502 504# 504 506# 506 508# 508 510# 510 512# 512 514# 514
516# 516 518# 518 520# 520 522# 522 524# 524 526# 526 528# 528
530# 530 532# 532 534# 534 536# 536 538# 538 540# 540 542# 542
544# 544 546# 546 548# 548 550# 550 552# 552 554# 554 556# 556
558# 558 560# 560 562# 562 564# 564 566# 566 568# 568 570# 570
572# 572 574# 574 576# 576 578# 578 580# 580 582# 582 584# 584
586# 586 588# 588 590# 590 592# 592 594# 594 596# 596 598# 598
600# 600 602# 602 604# 604 606# 606 608# 608 610# 610 612# 612
614# 614 616# 616 618# 618 620# 620 622# 622 624# 624 626# 626
628# 628 630# 630 632# 632 634# 634 636# 636 638# 638 640# 640
642# 642 644# 644 646# 646 648# 648 650# 650 652# 652 654# 654
656# 656 658# 658 660# 660 662# 662 664# 664 666# 666 668# 668
670# 670 672# 672 674# 674 676# 676 678# 678 680# 680 682# 682
684# 684 686# 686 688# 688 690# 690 692# 692 694# 694 696# 696
698# 698 700# 700 702# 702 704# 704 706# 706 708# 708 710# 710
712# 712 714# 714 716# 716 718# 718 720# 720 722# 722 724# 724
726# 726 728# 728 730# 730 732# 732 734# 734 736# 736 738# 738
740# 740 742# 742 744# 744 746# 746 748# 748 750# 750 752# 752
754# 754 756# 756 758# 758 760# 760 762# 762 764# 764 766# 766
768# 768 770# 770 772# 772 774# 774 776# 776 778# 778 780# 780
782# 782 784# 784 786# 786 788# 788 790# 790 792# 792 794# 794
796# 796 798# 798 800# 800 802# 802 804# 804 806# 806 808# 808
810# 810 812# 812 814# 814 816# 816 818# 818 820# 820 822# 822
824# 824 826# 826 828# 828 830# 830 832# 832 834# 834 836# 836
838# 838 840# 840 842# 842 844# 844 846# 846 848# 848 850# 850
852# 852 854# 854 856# 856 858# 858 860# 860 862# 862 864# 864
866# 866 868# 868 870# 870 872# 872 874# 874 876# 876 878# 878
880# 880 882# 882 884# 884 886# 886 888# 888 890# 890 892# 892
894# 894 896# 896 898# 898 900# 900 902# 902 904# 904 906# 906
908# 908 910# 910 912# 912 914# 914 916# 916 918# 918 920# 920
922# 922 924# 924 926# 926 928# 928 930# 930 932# 932 934# 934
936# 936 938# 938 940# 940 942# 942 944# 944 946# 946 948# 948
950# 950 952# 952 954# 954 956# 956 958# 958 960# 960 962# 962
964# 964 966# 966 968# 968 970# 970 972# 972 974# 974 976# 976
978# 978 980# 980 982# 982 984# 984 986# 986 988# 988 990# 990
992# 992 994# 994 996# 996 998# 998 1000# 1000 1002# 1002 1004# 1004
1006# 1006 1008# 1008 1010# 1010 1012# 1012 1014# 1014 1016# 1016 1018# 1018
1020# 1020 1022# 1022 1024# 1024 1026# 1026 1028# 1028 1030# 1030 1032# 1032 SEQ 1141
1034# 1034 1036# 1036 1038# 1038 1040# 1040 1042# 1042 1044# 1044 1046# 1046
1048# 1048 1050# 1050 1052# 1052 1054# 1054 1056# 1056 1058# 1058 1060# 1060
1062# 1062 1064# 1064 1066# 1066 1068# 1068 1070# 1070 1072# 1072 1074# 1074
1076# 1076 1078# 1078 1080# 1080 1082# 1082 1084# 1084 1086# 1086 1088# 1088
1090# 1090 1092# 1092 1094# 1094 1096# 1096 1098# 1098 1100# 1100 1102# 1102
1104# 1104 1106# 1106 1108# 1108 1110# 1110 1112# 1112 1114# 1114 1116# 1116
1118# 1118 1120# 1120 1122# 1122 1124# 1124 1126# 1126 1128# 1128 1130# 1130
1132# 1132 1134# 1134 1136# 1136 1138# 1138 1140# 1140 1142# 1142 1144# 1144
1146# 1146 1148# 1148 1150# 1150 1152# 1152 1154# 1154 1156# 1156 1158# 1158
1160# 1160 1162# 1162 1164# 1164 1166# 1166 1168# 1168 1170# 1170 1172# 1172
1174# 1174 1176# 1176 1178# 1178 1180# 1180 1182# 1182 1184# 1184 1186# 1186
1188# 1188 1190# 1190 1192# 1192 1194# 1194 1196# 1196 1198# 1198 1200# 1200
1202# 1202 1204# 1204 1206# 1206 1208# 1208 1210# 1210 1212# 1212 1214# 1214
1216# 1216 1218# 1218 1220# 1220 1222# 1222 1224# 1224 1226# 1226 1228# 1228
1230# 1230 1232# 1232 1234# 1234 1236# 1236 1238# 1238 1240# 1240 1242# 1242
1244# 1244 1246# 1246 1248# 1248 1250# 1250 1252# 1252 1254# 1254 1256# 1256
1258# 1258 1260# 1260 1262# 1262 1264# 1264 1266# 1266 1268# 1268 1270# 1270
1272# 1272 1274# 1274 1276# 1276 1278# 1278 1280# 1280 1282# 1282 1284# 1284
1286# 1286 1288# 1288 1290# 1290 1292# 1292 1294# 1294 1296# 1296 1298# 1298
1300# 1300 1302# 1302 1304# 1304 1306# 1306 1308# 1308 1310# 1310 1312# 1312
1314# 1314 1316# 1316 1318# 1318 1320# 1320 1322# 1322 1324# 1324 1326# 1326
1328# 1328 1330# 1330 1332# 1332 1334# 1334 1336# 1336 1338# 1338 1340# 1340
1342# 1342 1344# 1344 1346# 1346 1348# 1348 1350# 1350 1352# 1352 1354# 1354
1356# 1356 1358# 1358 1360# 1360 1362# 1362 1364# 1364 1366# 1366 1368# 1368
1370# 1370 1372# 1372 1374# 1374 1376# 1376 1378# 1378 1380# 1380 1382# 1382
1384# 1384 1386# 1386 1388# 1388 1390# 1390 1392# 1392 1394# 1394 1396# 1396
1398# 1398 1400# 1400 1402# 1402 1404# 1404 1406# 1406 1408# 1408 1410# 1410
1412# 1412 1414# 1414 1416# 1416 1418# 1418 1420# 1420 1422# 1422 1424# 1424
1426# 1426 1428# 1428 1430# 1430 1432# 1432 1434# 1434 1436# 1436 1438# 1438
1440# 1440 1442# 1442 1444# 1444 1446# 1446 1448# 1448 1450# 1450 1452# 1452
1454# 1454 1456# 1456 1458# 1458 1460# 1460 1462# 1462 1464# 1464 1466# 1466
1468# 1468 1470# 1470 1472# 1472 1474# 1474 1476# 1476 1478# 1478 1480# 1480
1482# 1482 1484# 1484 1486# 1486 1488# 1488 1490# 1490 1492# 1492 1494# 1494
1496# 1496 1498# 1498 1500# 1500 1502# 1502 1504# 1504 1506# 1506 1508# 1508
1510# 1510 1512# 1512 1514# 1514 1516# 1516 1518# 1518 1520# 1520 1522# 1522
1524# 1524 1526# 1526 1528# 1528 1530# 1530 1532# 1532 1534# 1534 1536# 1536
1538# 1538 1540# 1540 1542# 1542 1544# 1544 1546# 1546 1548# 1548 1550# 1550
1552# 1552 1554# 1554 1556# 1556 1558# 1558 1560# 1560 1562# 1562 1564# 1564
1566# 1566 1568# 1568 1570# 1570 1572# 1572 1574# 1574 1576# 1576 1578# 1578
1580# 1580 1582# 1582 1584# 1584 1586# 1586 1588# 1588 1590# 1590 1592# 1592
1594# 1594 1596# 1596 1598# 1598 1600# 1600 1602# 1602 1604# 1604 1606# 1606
1608# 1608 1610# 1610 1612# 1612 1614# 1614 1616# 1616 1618# 1618 1620# 1620
1622# 1622 1624# 1624 1626# 1626 1628# 1628 1630# 1630 1632# 1632 1634# 1634
1636# 1636 1638# 1638 1640# 1640 1642# 1642 1644# 1644 1646# 1646 1648# 1648
1650# 1650 1652# 1652 1654# 1654 1656# 1656 1658# 1658 1660# 1660 1662# 1662
1664# 1664 1666# 1666 1668# 1668 1670# 1670 1672# 1672 1674# 1674 1676# 1676
1678# 1678 1680# 1680 1682# 1682 1684# 1684 1686# 1686 1688# 1688 1690# 1690
1692# 1692 1694# 1694 1696# 1696 1698# 1698 1700# 1700 1702# 1702 1704# 1704
1706# 1706 1708# 1708 1710# 1710 1712# 1712 1714# 1714 1716# 1716 1718# 1718
1720# 1720 1722# 1722 1724# 1724 1726# 1726 1728# 1728 1730# 1730 1732# 1732
1734# 1734 1736# 1736 1738# 1738 1740# 1740 1742# 1742 1744# 1744 1746# 1746
1748# 1748 1750# 1750 1752# 1752 1754# 1754 1756# 1756 1758# 1758 1760# 1760
1762# 1762 1764# 1764 1766# 1766 1768# 1768 1770# 1770 1772# 1772 1774# 1774 SEQ 1142
1776# 1776 1778# 1778 1780# 1780 1782# 1782 1784# 1784 1786# 1786 1788# 1788
1790# 1790 1792# 1792 1794# 1794 1796# 1796 1798# 1798 1800# 1800 1802# 1802
1804# 1804 1806# 1806 1808# 1808 1810# 1810 1812# 1812 1814# 1814 1816# 1816
1818# 1818 1820# 1820 1822# 1822 1824# 1824 1826# 1826 1828# 1828 1830# 1830
1832# 1832 1834# 1834 1836# 1836 1838# 1838 1840# 1840 1842# 1842 1844# 1844
1846# 1846 1848# 1848 1850# 1850 1852# 1852 1854# 1854 1856# 1856 1858# 1858
1860# 1860 1862# 1862 1864# 1864 1866# 1866 1868# 1868 1870# 1870 1872# 1872
1874# 1874 1876# 1876 1878# 1878 1880# 1880 1882# 1882 1884# 1884 1886# 1886
1888# 1888 1890# 1890 1892# 1892 1894# 1894 1896# 1896 1898# 1898 1900# 1900
1902# 1902 1904# 1904 1906# 1906 1908# 1908 1910# 1910 1912# 1912 1914# 1914
1916# 1916 1918# 1918 1920# 1920 1922# 1922 1924# 1924 1926# 1926 1928# 1928
1930# 1930 1932# 1932 1934# 1934 1936# 1936 1938# 1938 1940# 1940 1942# 1942
1944# 1944 1946# 1946 1948# 1948 1950# 1950 1952# 1952 1954# 1954 1956# 1956
1958# 1958 1960# 1960 1962# 1962 1964# 1964 1966# 1966 1968# 1968 1970# 1970
1972# 1972 1974# 1974 1976# 1976 1978# 1978 1980# 1980 1982# 1982 1984# 1984
1986# 1986 1988# 1988 1990# 1990 1992# 1992 1994# 1994 1996# 1996 1998# 1998
2000# 2000 2002# 2002 2004# 2004 2006# 2006 2008# 2008 2010# 2010 2012# 2012
2014# 2014 2016# 2016 2018# 2018 2020# 2020 2022# 2022 2024# 2024 2026# 2026
2028# 2028 2030# 2030 2032# 2032 2034# 2034 2036# 2036 2038# 2038 2040# 2040
2042# 2042 2044# 2044 2046# 2046 2048# 2048 2050# 2050 2052# 2052 2054# 2054
2056# 2056 2058# 2058 2060# 2060 2062# 2062 2064# 2064 2066# 2066 2068# 2068
2070# 2070 2072# 2072 2074# 2074 2076# 2076 2081# 2081 2086# 2086
$GARG 115# 115 120# 120 122# 122 124# 124 126# 126 128# 128 130# 130
132# 132 134# 134 136# 136 138# 138 140# 140 142# 142 144# 144
146# 146 148# 148 150# 150 152# 152 160# 160 162# 162 164# 164
166# 166 168# 168 170# 170 172# 172 174# 174 176# 176 178# 178
180# 180 182# 182 184# 184 186# 186 188# 188 190# 190 192# 192
194# 194 196# 196 198# 198 200# 200 202# 202 204# 204 206# 206
208# 208 210# 210 212# 212 214# 214 216# 216 218# 218 220# 220
222# 222 224# 224 226# 226 228# 228 230# 230 232# 232 234# 234
236# 236 238# 238 240# 240 242# 242 244# 244 246# 246 248# 248
250# 250 252# 252 254# 254 256# 256 258# 258 260# 260 262# 262
264# 264 266# 266 268# 268 270# 270 272# 272 274# 274 276# 276
278# 278 280# 280 282# 282 284# 284 286# 286 288# 288 290# 290
292# 292 294# 294 296# 296 298# 298 300# 300 302# 302 304# 304
306# 306 308# 308 310# 310 312# 312 314# 314 316# 316 318# 318
320# 320 322# 322 324# 324 326# 326 328# 328 330# 330 332# 332
334# 334 336# 336 338# 338 340# 340 342# 342 344# 344 346# 346
348# 348 350# 350 352# 352 354# 354 356# 356 358# 358 360# 360
362# 362 364# 364 366# 366 368# 368 370# 370 372# 372 374# 374
376# 376 378# 378 380# 380 382# 382 384# 384 386# 386 388# 388
390# 390 392# 392 394# 394 396# 396 398# 398 400# 400 402# 402
404# 404 406# 406 408# 408 410# 410 412# 412 414# 414 416# 416
418# 418 420# 420 422# 422 424# 424 426# 426 428# 428 430# 430
432# 432 434# 434 436# 436 438# 438 440# 440 442# 442 444# 444
446# 446 448# 448 450# 450 452# 452 454# 454 456# 456 458# 458
460# 460 462# 462 464# 464 466# 466 468# 468 470# 470 472# 472
474# 474 476# 476 478# 478 480# 480 482# 482 484# 484 486# 486
488# 488 490# 490 492# 492 494# 494 496# 496 498# 498 500# 500
502# 502 504# 504 506# 506 508# 508 510# 510 512# 512 514# 514
516# 516 518# 518 520# 520 522# 522 524# 524 526# 526 528# 528
530# 530 532# 532 534# 534 536# 536 538# 538 540# 540 542# 542
544# 544 546# 546 548# 548 550# 550 552# 552 554# 554 556# 556 SEQ 1143
558# 558 560# 560 562# 562 564# 564 566# 566 568# 568 570# 570
572# 572 574# 574 576# 576 578# 578 580# 580 582# 582 584# 584
586# 586 588# 588 590# 590 592# 592 594# 594 596# 596 598# 598
600# 600 602# 602 604# 604 606# 606 608# 608 610# 610 612# 612
614# 614 616# 616 618# 618 620# 620 622# 622 624# 624 626# 626
628# 628 630# 630 632# 632 634# 634 636# 636 638# 638 640# 640
642# 642 644# 644 646# 646 648# 648 650# 650 652# 652 654# 654
656# 656 658# 658 660# 660 662# 662 664# 664 666# 666 668# 668
670# 670 672# 672 674# 674 676# 676 678# 678 680# 680 682# 682
684# 684 686# 686 688# 688 690# 690 692# 692 694# 694 696# 696
698# 698 700# 700 702# 702 704# 704 706# 706 708# 708 710# 710
712# 712 714# 714 716# 716 718# 718 720# 720 722# 722 724# 724
726# 726 728# 728 730# 730 732# 732 734# 734 736# 736 738# 738
740# 740 742# 742 744# 744 746# 746 748# 748 750# 750 752# 752
754# 754 756# 756 758# 758 760# 760 762# 762 764# 764 766# 766
768# 768 770# 770 772# 772 774# 774 776# 776 778# 778 780# 780
782# 782 784# 784 786# 786 788# 788 790# 790 792# 792 794# 794
796# 796 798# 798 800# 800 802# 802 804# 804 806# 806 808# 808
810# 810 812# 812 814# 814 816# 816 818# 818 820# 820 822# 822
824# 824 826# 826 828# 828 830# 830 832# 832 834# 834 836# 836
838# 838 840# 840 842# 842 844# 844 846# 846 848# 848 850# 850
852# 852 854# 854 856# 856 858# 858 860# 860 862# 862 864# 864
866# 866 868# 868 870# 870 872# 872 874# 874 876# 876 878# 878
880# 880 882# 882 884# 884 886# 886 888# 888 890# 890 892# 892
894# 894 896# 896 898# 898 900# 900 902# 902 904# 904 906# 906
908# 908 910# 910 912# 912 914# 914 916# 916 918# 918 920# 920
922# 922 924# 924 926# 926 928# 928 930# 930 932# 932 934# 934
936# 936 938# 938 940# 940 942# 942 944# 944 946# 946 948# 948
950# 950 952# 952 954# 954 956# 956 958# 958 960# 960 962# 962
964# 964 966# 966 968# 968 970# 970 972# 972 974# 974 976# 976
978# 978 980# 980 982# 982 984# 984 986# 986 988# 988 990# 990
992# 992 994# 994 996# 996 998# 998 1000# 1000 1002# 1002 1004# 1004
1006# 1006 1008# 1008 1010# 1010 1012# 1012 1014# 1014 1016# 1016 1018# 1018
1020# 1020 1022# 1022 1024# 1024 1026# 1026 1028# 1028 1030# 1030 1032# 1032
1034# 1034 1036# 1036 1038# 1038 1040# 1040 1042# 1042 1044# 1044 1046# 1046
1048# 1048 1050# 1050 1052# 1052 1054# 1054 1056# 1056 1058# 1058 1060# 1060
1062# 1062 1064# 1064 1066# 1066 1068# 1068 1070# 1070 1072# 1072 1074# 1074
1076# 1076 1078# 1078 1080# 1080 1082# 1082 1084# 1084 1086# 1086 1088# 1088
1090# 1090 1092# 1092 1094# 1094 1096# 1096 1098# 1098 1100# 1100 1102# 1102
1104# 1104 1106# 1106 1108# 1108 1110# 1110 1112# 1112 1114# 1114 1116# 1116
1118# 1118 1120# 1120 1122# 1122 1124# 1124 1126# 1126 1128# 1128 1130# 1130
1132# 1132 1134# 1134 1136# 1136 1138# 1138 1140# 1140 1142# 1142 1144# 1144
1146# 1146 1148# 1148 1150# 1150 1152# 1152 1154# 1154 1156# 1156 1158# 1158
1160# 1160 1162# 1162 1164# 1164 1166# 1166 1168# 1168 1170# 1170 1172# 1172
1174# 1174 1176# 1176 1178# 1178 1180# 1180 1182# 1182 1184# 1184 1186# 1186
1188# 1188 1190# 1190 1192# 1192 1194# 1194 1196# 1196 1198# 1198 1200# 1200
1202# 1202 1204# 1204 1206# 1206 1208# 1208 1210# 1210 1212# 1212 1214# 1214
1216# 1216 1218# 1218 1220# 1220 1222# 1222 1224# 1224 1226# 1226 1228# 1228
1230# 1230 1232# 1232 1234# 1234 1236# 1236 1238# 1238 1240# 1240 1242# 1242
1244# 1244 1246# 1246 1248# 1248 1250# 1250 1252# 1252 1254# 1254 1256# 1256
1258# 1258 1260# 1260 1262# 1262 1264# 1264 1266# 1266 1268# 1268 1270# 1270
1272# 1272 1274# 1274 1276# 1276 1278# 1278 1280# 1280 1282# 1282 1284# 1284
1286# 1286 1288# 1288 1290# 1290 1292# 1292 1294# 1294 1296# 1296 1298# 1298 SEQ 1144
1300# 1300 1302# 1302 1304# 1304 1306# 1306 1308# 1308 1310# 1310 1312# 1312
1314# 1314 1316# 1316 1318# 1318 1320# 1320 1322# 1322 1324# 1324 1326# 1326
1328# 1328 1330# 1330 1332# 1332 1334# 1334 1336# 1336 1338# 1338 1340# 1340
1342# 1342 1344# 1344 1346# 1346 1348# 1348 1350# 1350 1352# 1352 1354# 1354
1356# 1356 1358# 1358 1360# 1360 1362# 1362 1364# 1364 1366# 1366 1368# 1368
1370# 1370 1372# 1372 1374# 1374 1376# 1376 1378# 1378 1380# 1380 1382# 1382
1384# 1384 1386# 1386 1388# 1388 1390# 1390 1392# 1392 1394# 1394 1396# 1396
1398# 1398 1400# 1400 1402# 1402 1404# 1404 1406# 1406 1408# 1408 1410# 1410
1412# 1412 1414# 1414 1416# 1416 1418# 1418 1420# 1420 1422# 1422 1424# 1424
1426# 1426 1428# 1428 1430# 1430 1432# 1432 1434# 1434 1436# 1436 1438# 1438
1440# 1440 1442# 1442 1444# 1444 1446# 1446 1448# 1448 1450# 1450 1452# 1452
1454# 1454 1456# 1456 1458# 1458 1460# 1460 1462# 1462 1464# 1464 1466# 1466
1468# 1468 1470# 1470 1472# 1472 1474# 1474 1476# 1476 1478# 1478 1480# 1480
1482# 1482 1484# 1484 1486# 1486 1488# 1488 1490# 1490 1492# 1492 1494# 1494
1496# 1496 1498# 1498 1500# 1500 1502# 1502 1504# 1504 1506# 1506 1508# 1508
1510# 1510 1512# 1512 1514# 1514 1516# 1516 1518# 1518 1520# 1520 1522# 1522
1524# 1524 1526# 1526 1528# 1528 1530# 1530 1532# 1532 1534# 1534 1536# 1536
1538# 1538 1540# 1540 1542# 1542 1544# 1544 1546# 1546 1548# 1548 1550# 1550
1552# 1552 1554# 1554 1556# 1556 1558# 1558 1560# 1560 1562# 1562 1564# 1564
1566# 1566 1568# 1568 1570# 1570 1572# 1572 1574# 1574 1576# 1576 1578# 1578
1580# 1580 1582# 1582 1584# 1584 1586# 1586 1588# 1588 1590# 1590 1592# 1592
1594# 1594 1596# 1596 1598# 1598 1600# 1600 1602# 1602 1604# 1604 1606# 1606
1608# 1608 1610# 1610 1612# 1612 1614# 1614 1616# 1616 1618# 1618 1620# 1620
1622# 1622 1624# 1624 1626# 1626 1628# 1628 1630# 1630 1632# 1632 1634# 1634
1636# 1636 1638# 1638 1640# 1640 1642# 1642 1644# 1644 1646# 1646 1648# 1648
1650# 1650 1652# 1652 1654# 1654 1656# 1656 1658# 1658 1660# 1660 1662# 1662
1664# 1664 1666# 1666 1668# 1668 1670# 1670 1672# 1672 1674# 1674 1676# 1676
1678# 1678 1680# 1680 1682# 1682 1684# 1684 1686# 1686 1688# 1688 1690# 1690
1692# 1692 1694# 1694 1696# 1696 1698# 1698 1700# 1700 1702# 1702 1704# 1704
1706# 1706 1708# 1708 1710# 1710 1712# 1712 1714# 1714 1716# 1716 1718# 1718
1720# 1720 1722# 1722 1724# 1724 1726# 1726 1728# 1728 1730# 1730 1732# 1732
1734# 1734 1736# 1736 1738# 1738 1740# 1740 1742# 1742 1744# 1744 1746# 1746
1748# 1748 1750# 1750 1752# 1752 1754# 1754 1756# 1756 1758# 1758 1760# 1760
1762# 1762 1764# 1764 1766# 1766 1768# 1768 1770# 1770 1772# 1772 1774# 1774
1776# 1776 1778# 1778 1780# 1780 1782# 1782 1784# 1784 1786# 1786 1788# 1788
1790# 1790 1792# 1792 1794# 1794 1796# 1796 1798# 1798 1800# 1800 1802# 1802
1804# 1804 1806# 1806 1808# 1808 1810# 1810 1812# 1812 1814# 1814 1816# 1816
1818# 1818 1820# 1820 1822# 1822 1824# 1824 1826# 1826 1828# 1828 1830# 1830
1832# 1832 1834# 1834 1836# 1836 1838# 1838 1840# 1840 1842# 1842 1844# 1844
1846# 1846 1848# 1848 1850# 1850 1852# 1852 1854# 1854 1856# 1856 1858# 1858
1860# 1860 1862# 1862 1864# 1864 1866# 1866 1868# 1868 1870# 1870 1872# 1872
1874# 1874 1876# 1876 1878# 1878 1880# 1880 1882# 1882 1884# 1884 1886# 1886
1888# 1888 1890# 1890 1892# 1892 1894# 1894 1896# 1896 1898# 1898 1900# 1900
1902# 1902 1904# 1904 1906# 1906 1908# 1908 1910# 1910 1912# 1912 1914# 1914
1916# 1916 1918# 1918 1920# 1920 1922# 1922 1924# 1924 1926# 1926 1928# 1928
1930# 1930 1932# 1932 1934# 1934 1936# 1936 1938# 1938 1940# 1940 1942# 1942
1944# 1944 1946# 1946 1948# 1948 1950# 1950 1952# 1952 1954# 1954 1956# 1956
1958# 1958 1960# 1960 1962# 1962 1964# 1964 1966# 1966 1968# 1968 1970# 1970
1972# 1972 1974# 1974 1976# 1976 1978# 1978 1980# 1980 1982# 1982 1984# 1984
1986# 1986 1988# 1988 1990# 1990 1992# 1992 1994# 1994 1996# 1996 1998# 1998
2000# 2000 2002# 2002 2004# 2004 2006# 2006 2008# 2008 2010# 2010 2012# 2012
2014# 2014 2016# 2016 2018# 2018 2020# 2020 2022# 2022 2024# 2024 2026# 2026
2028# 2028 2030# 2030 2032# 2032 2034# 2034 2036# 2036 2038# 2038 2040# 2040 SEQ 1145
2042# 2042 2044# 2044 2046# 2046 2048# 2048 2050# 2050 2052# 2052 2054# 2054
2056# 2056 2058# 2058 2060# 2060 2062# 2062 2064# 2064 2066# 2066 2068# 2068
2070# 2070 2072# 2072 2074# 2074 2076# 2076 2081# 2081 2086# 2086
%ADDR 115# 115 120 120# 122 122# 124 124# 126 126# 128 128# 130 130#
132 132# 134 134# 136 136# 138 138# 140 140# 142 142# 144 144#
146 146# 148 148# 150 150# 152 152# 160# 160 162 162# 164 164#
166 166# 168 168# 170 170# 172 172# 174 174# 176 176# 178 178#
180 180# 182 182# 184 184# 186 186# 188 188# 190 190# 192 192#
194 194# 196 196# 198 198# 200 200# 202 202# 204 204# 206 206#
208 208# 210 210# 212 212# 214 214# 216 216# 218 218# 220 220#
222 222# 224 224# 226 226# 228 228# 230 230# 232 232# 234 234#
236 236# 238 238# 240 240# 242 242# 244 244# 246 246# 248 248#
250 250# 252 252# 254 254# 256 256# 258 258# 260 260# 262 262#
264 264# 266 266# 268 268# 270 270# 272 272# 274 274# 276 276#
278 278# 280 280# 282 282# 284 284# 286 286# 288 288# 290 290#
292 292# 294 294# 296 296# 298 298# 300 300# 302 302# 304 304#
306 306# 308 308# 310 310# 312 312# 314 314# 316 316# 318 318#
320 320# 322 322# 324 324# 326 326# 328 328# 330 330# 332 332#
334 334# 336 336# 338 338# 340 340# 342 342# 344 344# 346 346#
348 348# 350 350# 352 352# 354 354# 356 356# 358 358# 360 360#
362 362# 364 364# 366 366# 368 368# 370 370# 372 372# 374 374#
376 376# 378 378# 380 380# 382 382# 384 384# 386 386# 388 388#
390 390# 392 392# 394 394# 396 396# 398 398# 400 400# 402 402#
404 404# 406 406# 408 408# 410 410# 412 412# 414 414# 416 416#
418 418# 420 420# 422 422# 424 424# 426 426# 428 428# 430 430#
432 432# 434 434# 436 436# 438 438# 440 440# 442 442# 444 444#
446 446# 448 448# 450 450# 452 452# 454 454# 456 456# 458 458#
460 460# 462 462# 464 464# 466 466# 468 468# 470 470# 472 472#
474 474# 476 476# 478 478# 480 480# 482 482# 484 484# 486 486#
488 488# 490 490# 492 492# 494 494# 496 496# 498 498# 500 500#
502 502# 504 504# 506 506# 508 508# 510 510# 512 512# 514 514#
516 516# 518 518# 520 520# 522 522# 524 524# 526 526# 528 528#
530 530# 532 532# 534 534# 536 536# 538 538# 540 540# 542 542#
544 544# 546 546# 548 548# 550 550# 552 552# 554 554# 556 556#
558 558# 560 560# 562 562# 564 564# 566 566# 568 568# 570 570#
572 572# 574 574# 576 576# 578 578# 580 580# 582 582# 584 584#
586 586# 588 588# 590 590# 592 592# 594 594# 596 596# 598 598#
600 600# 602 602# 604 604# 606 606# 608 608# 610 610# 612 612#
614 614# 616 616# 618 618# 620 620# 622 622# 624 624# 626 626#
628 628# 630 630# 632 632# 634 634# 636 636# 638 638# 640 640#
642 642# 644 644# 646 646# 648 648# 650 650# 652 652# 654 654#
656 656# 658 658# 660 660# 662 662# 664 664# 666 666# 668 668#
670 670# 672 672# 674 674# 676 676# 678 678# 680 680# 682 682#
684 684# 686 686# 688 688# 690 690# 692 692# 694 694# 696 696#
698 698# 700 700# 702 702# 704 704# 706 706# 708 708# 710 710#
712 712# 714 714# 716 716# 718 718# 720 720# 722 722# 724 724#
726 726# 728 728# 730 730# 732 732# 734 734# 736 736# 738 738#
740 740# 742 742# 744 744# 746 746# 748 748# 750 750# 752 752#
754 754# 756 756# 758 758# 760 760# 762 762# 764 764# 766 766#
768 768# 770 770# 772 772# 774 774# 776 776# 778 778# 780 780#
782 782# 784 784# 786 786# 788 788# 790 790# 792 792# 794 794#
796 796# 798 798# 800 800# 802 802# 804 804# 806 806# 808 808#
810 810# 812 812# 814 814# 816 816# 818 818# 820 820# 822 822# SEQ 1146
824 824# 826 826# 828 828# 830 830# 832 832# 834 834# 836 836#
838 838# 840 840# 842 842# 844 844# 846 846# 848 848# 850 850#
852 852# 854 854# 856 856# 858 858# 860 860# 862 862# 864 864#
866 866# 868 868# 870 870# 872 872# 874 874# 876 876# 878 878#
880 880# 882 882# 884 884# 886 886# 888 888# 890 890# 892 892#
894 894# 896 896# 898 898# 900 900# 902 902# 904 904# 906 906#
908 908# 910 910# 912 912# 914 914# 916 916# 918 918# 920 920#
922 922# 924 924# 926 926# 928 928# 930 930# 932 932# 934 934#
936 936# 938 938# 940 940# 942 942# 944 944# 946 946# 948 948#
950 950# 952 952# 954 954# 956 956# 958 958# 960 960# 962 962#
964 964# 966 966# 968 968# 970 970# 972 972# 974 974# 976 976#
978 978# 980 980# 982 982# 984 984# 986 986# 988 988# 990 990#
992 992# 994 994# 996 996# 998 998# 1000 1000# 1002 1002# 1004 1004#
1006 1006# 1008 1008# 1010 1010# 1012 1012# 1014 1014# 1016 1016# 1018 1018#
1020 1020# 1022 1022# 1024 1024# 1026 1026# 1028 1028# 1030 1030# 1032 1032#
1034 1034# 1036 1036# 1038 1038# 1040 1040# 1042 1042# 1044 1044# 1046 1046#
1048 1048# 1050 1050# 1052 1052# 1054 1054# 1056 1056# 1058 1058# 1060 1060#
1062 1062# 1064 1064# 1066 1066# 1068 1068# 1070 1070# 1072 1072# 1074 1074#
1076 1076# 1078 1078# 1080 1080# 1082 1082# 1084 1084# 1086 1086# 1088 1088#
1090 1090# 1092 1092# 1094 1094# 1096 1096# 1098 1098# 1100 1100# 1102 1102#
1104 1104# 1106 1106# 1108 1108# 1110 1110# 1112 1112# 1114 1114# 1116 1116#
1118 1118# 1120 1120# 1122 1122# 1124 1124# 1126 1126# 1128 1128# 1130 1130#
1132 1132# 1134 1134# 1136 1136# 1138 1138# 1140 1140# 1142 1142# 1144 1144#
1146 1146# 1148 1148# 1150 1150# 1152 1152# 1154 1154# 1156 1156# 1158 1158#
1160 1160# 1162 1162# 1164 1164# 1166 1166# 1168 1168# 1170 1170# 1172 1172#
1174 1174# 1176 1176# 1178 1178# 1180 1180# 1182 1182# 1184 1184# 1186 1186#
1188 1188# 1190 1190# 1192 1192# 1194 1194# 1196 1196# 1198 1198# 1200 1200#
1202 1202# 1204 1204# 1206 1206# 1208 1208# 1210 1210# 1212 1212# 1214 1214#
1216 1216# 1218 1218# 1220 1220# 1222 1222# 1224 1224# 1226 1226# 1228 1228#
1230 1230# 1232 1232# 1234 1234# 1236 1236# 1238 1238# 1240 1240# 1242 1242#
1244 1244# 1246 1246# 1248 1248# 1250 1250# 1252 1252# 1254 1254# 1256 1256#
1258 1258# 1260 1260# 1262 1262# 1264 1264# 1266 1266# 1268 1268# 1270 1270#
1272 1272# 1274 1274# 1276 1276# 1278 1278# 1280 1280# 1282 1282# 1284 1284#
1286 1286# 1288 1288# 1290 1290# 1292 1292# 1294 1294# 1296 1296# 1298 1298#
1300 1300# 1302 1302# 1304 1304# 1306 1306# 1308 1308# 1310 1310# 1312 1312#
1314 1314# 1316 1316# 1318 1318# 1320 1320# 1322 1322# 1324 1324# 1326 1326#
1328 1328# 1330 1330# 1332 1332# 1334 1334# 1336 1336# 1338 1338# 1340 1340#
1342 1342# 1344 1344# 1346 1346# 1348 1348# 1350 1350# 1352 1352# 1354 1354#
1356 1356# 1358 1358# 1360 1360# 1362 1362# 1364 1364# 1366 1366# 1368 1368#
1370 1370# 1372 1372# 1374 1374# 1376 1376# 1378 1378# 1380 1380# 1382 1382#
1384 1384# 1386 1386# 1388 1388# 1390 1390# 1392 1392# 1394 1394# 1396 1396#
1398 1398# 1400 1400# 1402 1402# 1404 1404# 1406 1406# 1408 1408# 1410 1410#
1412 1412# 1414 1414# 1416 1416# 1418 1418# 1420 1420# 1422 1422# 1424 1424#
1426 1426# 1428 1428# 1430 1430# 1432 1432# 1434 1434# 1436 1436# 1438 1438#
1440 1440# 1442 1442# 1444 1444# 1446 1446# 1448 1448# 1450 1450# 1452 1452#
1454 1454# 1456 1456# 1458 1458# 1460 1460# 1462 1462# 1464 1464# 1466 1466#
1468 1468# 1470 1470# 1472 1472# 1474 1474# 1476 1476# 1478 1478# 1480 1480#
1482 1482# 1484 1484# 1486 1486# 1488 1488# 1490 1490# 1492 1492# 1494 1494#
1496 1496# 1498 1498# 1500 1500# 1502 1502# 1504 1504# 1506 1506# 1508 1508#
1510 1510# 1512 1512# 1514 1514# 1516 1516# 1518 1518# 1520 1520# 1522 1522#
1524 1524# 1526 1526# 1528 1528# 1530 1530# 1532 1532# 1534 1534# 1536 1536#
1538 1538# 1540 1540# 1542 1542# 1544 1544# 1546 1546# 1548 1548# 1550 1550#
1552 1552# 1554 1554# 1556 1556# 1558 1558# 1560 1560# 1562 1562# 1564 1564# SEQ 1147
1566 1566# 1568 1568# 1570 1570# 1572 1572# 1574 1574# 1576 1576# 1578 1578#
1580 1580# 1582 1582# 1584 1584# 1586 1586# 1588 1588# 1590 1590# 1592 1592#
1594 1594# 1596 1596# 1598 1598# 1600 1600# 1602 1602# 1604 1604# 1606 1606#
1608 1608# 1610 1610# 1612 1612# 1614 1614# 1616 1616# 1618 1618# 1620 1620#
1622 1622# 1624 1624# 1626 1626# 1628 1628# 1630 1630# 1632 1632# 1634 1634#
1636 1636# 1638 1638# 1640 1640# 1642 1642# 1644 1644# 1646 1646# 1648 1648#
1650 1650# 1652 1652# 1654 1654# 1656 1656# 1658 1658# 1660 1660# 1662 1662#
1664 1664# 1666 1666# 1668 1668# 1670 1670# 1672 1672# 1674 1674# 1676 1676#
1678 1678# 1680 1680# 1682 1682# 1684 1684# 1686 1686# 1688 1688# 1690 1690#
1692 1692# 1694 1694# 1696 1696# 1698 1698# 1700 1700# 1702 1702# 1704 1704#
1706 1706# 1708 1708# 1710 1710# 1712 1712# 1714 1714# 1716 1716# 1718 1718#
1720 1720# 1722 1722# 1724 1724# 1726 1726# 1728 1728# 1730 1730# 1732 1732#
1734 1734# 1736 1736# 1738 1738# 1740 1740# 1742 1742# 1744 1744# 1746 1746#
1748 1748# 1750 1750# 1752 1752# 1754 1754# 1756 1756# 1758 1758# 1760 1760#
1762 1762# 1764 1764# 1766 1766# 1768 1768# 1770 1770# 1772 1772# 1774 1774#
1776 1776# 1778 1778# 1780 1780# 1782 1782# 1784 1784# 1786 1786# 1788 1788#
1790 1790# 1792 1792# 1794 1794# 1796 1796# 1798 1798# 1800 1800# 1802 1802#
1804 1804# 1806 1806# 1808 1808# 1810 1810# 1812 1812# 1814 1814# 1816 1816#
1818 1818# 1820 1820# 1822 1822# 1824 1824# 1826 1826# 1828 1828# 1830 1830#
1832 1832# 1834 1834# 1836 1836# 1838 1838# 1840 1840# 1842 1842# 1844 1844#
1846 1846# 1848 1848# 1850 1850# 1852 1852# 1854 1854# 1856 1856# 1858 1858#
1860 1860# 1862 1862# 1864 1864# 1866 1866# 1868 1868# 1870 1870# 1872 1872#
1874 1874# 1876 1876# 1878 1878# 1880 1880# 1882 1882# 1884 1884# 1886 1886#
1888 1888# 1890 1890# 1892 1892# 1894 1894# 1896 1896# 1898 1898# 1900 1900#
1902 1902# 1904 1904# 1906 1906# 1908 1908# 1910 1910# 1912 1912# 1914 1914#
1916 1916# 1918 1918# 1920 1920# 1922 1922# 1924 1924# 1926 1926# 1928 1928#
1930 1930# 1932 1932# 1934 1934# 1936 1936# 1938 1938# 1940 1940# 1942 1942#
1944 1944# 1946 1946# 1948 1948# 1950 1950# 1952 1952# 1954 1954# 1956 1956#
1958 1958# 1960 1960# 1962 1962# 1964 1964# 1966 1966# 1968 1968# 1970 1970#
1972 1972# 1974 1974# 1976 1976# 1978 1978# 1980 1980# 1982 1982# 1984 1984#
1986 1986# 1988 1988# 1990 1990# 1992 1992# 1994 1994# 1996 1996# 1998 1998#
2000 2000# 2002 2002# 2004 2004# 2006 2006# 2008 2008# 2010 2010# 2012 2012#
2014 2014# 2016 2016# 2018 2018# 2020 2020# 2022 2022# 2024 2024# 2026 2026#
2028 2028# 2030 2030# 2032 2032# 2034 2034# 2036 2036# 2038 2038# 2040 2040#
2042 2042# 2044 2044# 2046 2046# 2048 2048# 2050 2050# 2052 2052# 2054 2054#
2056 2056# 2058 2058# 2060 2060# 2062 2062# 2064 2064# 2066 2066# 2068 2068#
2070 2070# 2072 2072# 2074 2074# 2076 2076# 2081 2081# 2086# 2086
%ML 115# 115 120# 120 122# 122 124# 124 126# 126 128# 128 130# 130
132# 132 134# 134 136# 136 138# 138 140# 140 142# 142 144# 144
146# 146 148# 148 150# 150 152# 152 160# 160 162# 162 164# 164
166# 166 168# 168 170# 170 172# 172 174# 174 176# 176 178# 178
180# 180 182# 182 184# 184 186# 186 188# 188 190# 190 192# 192
194# 194 196# 196 198# 198 200# 200 202# 202 204# 204 206# 206
208# 208 210# 210 212# 212 214# 214 216# 216 218# 218 220# 220
222# 222 224# 224 226# 226 228# 228 230# 230 232# 232 234# 234
236# 236 238# 238 240# 240 242# 242 244# 244 246# 246 248# 248
250# 250 252# 252 254# 254 256# 256 258# 258 260# 260 262# 262
264# 264 266# 266 268# 268 270# 270 272# 272 274# 274 276# 276
278# 278 280# 280 282# 282 284# 284 286# 286 288# 288 290# 290
292# 292 294# 294 296# 296 298# 298 300# 300 302# 302 304# 304
306# 306 308# 308 310# 310 312# 312 314# 314 316# 316 318# 318
320# 320 322# 322 324# 324 326# 326 328# 328 330# 330 332# 332
334# 334 336# 336 338# 338 340# 340 342# 342 344# 344 346# 346 SEQ 1148
348# 348 350# 350 352# 352 354# 354 356# 356 358# 358 360# 360
362# 362 364# 364 366# 366 368# 368 370# 370 372# 372 374# 374
376# 376 378# 378 380# 380 382# 382 384# 384 386# 386 388# 388
390# 390 392# 392 394# 394 396# 396 398# 398 400# 400 402# 402
404# 404 406# 406 408# 408 410# 410 412# 412 414# 414 416# 416
418# 418 420# 420 422# 422 424# 424 426# 426 428# 428 430# 430
432# 432 434# 434 436# 436 438# 438 440# 440 442# 442 444# 444
446# 446 448# 448 450# 450 452# 452 454# 454 456# 456 458# 458
460# 460 462# 462 464# 464 466# 466 468# 468 470# 470 472# 472
474# 474 476# 476 478# 478 480# 480 482# 482 484# 484 486# 486
488# 488 490# 490 492# 492 494# 494 496# 496 498# 498 500# 500
502# 502 504# 504 506# 506 508# 508 510# 510 512# 512 514# 514
516# 516 518# 518 520# 520 522# 522 524# 524 526# 526 528# 528
530# 530 532# 532 534# 534 536# 536 538# 538 540# 540 542# 542
544# 544 546# 546 548# 548 550# 550 552# 552 554# 554 556# 556
558# 558 560# 560 562# 562 564# 564 566# 566 568# 568 570# 570
572# 572 574# 574 576# 576 578# 578 580# 580 582# 582 584# 584
586# 586 588# 588 590# 590 592# 592 594# 594 596# 596 598# 598
600# 600 602# 602 604# 604 606# 606 608# 608 610# 610 612# 612
614# 614 616# 616 618# 618 620# 620 622# 622 624# 624 626# 626
628# 628 630# 630 632# 632 634# 634 636# 636 638# 638 640# 640
642# 642 644# 644 646# 646 648# 648 650# 650 652# 652 654# 654
656# 656 658# 658 660# 660 662# 662 664# 664 666# 666 668# 668
670# 670 672# 672 674# 674 676# 676 678# 678 680# 680 682# 682
684# 684 686# 686 688# 688 690# 690 692# 692 694# 694 696# 696
698# 698 700# 700 702# 702 704# 704 706# 706 708# 708 710# 710
712# 712 714# 714 716# 716 718# 718 720# 720 722# 722 724# 724
726# 726 728# 728 730# 730 732# 732 734# 734 736# 736 738# 738
740# 740 742# 742 744# 744 746# 746 748# 748 750# 750 752# 752
754# 754 756# 756 758# 758 760# 760 762# 762 764# 764 766# 766
768# 768 770# 770 772# 772 774# 774 776# 776 778# 778 780# 780
782# 782 784# 784 786# 786 788# 788 790# 790 792# 792 794# 794
796# 796 798# 798 800# 800 802# 802 804# 804 806# 806 808# 808
810# 810 812# 812 814# 814 816# 816 818# 818 820# 820 822# 822
824# 824 826# 826 828# 828 830# 830 832# 832 834# 834 836# 836
838# 838 840# 840 842# 842 844# 844 846# 846 848# 848 850# 850
852# 852 854# 854 856# 856 858# 858 860# 860 862# 862 864# 864
866# 866 868# 868 870# 870 872# 872 874# 874 876# 876 878# 878
880# 880 882# 882 884# 884 886# 886 888# 888 890# 890 892# 892
894# 894 896# 896 898# 898 900# 900 902# 902 904# 904 906# 906
908# 908 910# 910 912# 912 914# 914 916# 916 918# 918 920# 920
922# 922 924# 924 926# 926 928# 928 930# 930 932# 932 934# 934
936# 936 938# 938 940# 940 942# 942 944# 944 946# 946 948# 948
950# 950 952# 952 954# 954 956# 956 958# 958 960# 960 962# 962
964# 964 966# 966 968# 968 970# 970 972# 972 974# 974 976# 976
978# 978 980# 980 982# 982 984# 984 986# 986 988# 988 990# 990
992# 992 994# 994 996# 996 998# 998 1000# 1000 1002# 1002 1004# 1004
1006# 1006 1008# 1008 1010# 1010 1012# 1012 1014# 1014 1016# 1016 1018# 1018
1020# 1020 1022# 1022 1024# 1024 1026# 1026 1028# 1028 1030# 1030 1032# 1032
1034# 1034 1036# 1036 1038# 1038 1040# 1040 1042# 1042 1044# 1044 1046# 1046
1048# 1048 1050# 1050 1052# 1052 1054# 1054 1056# 1056 1058# 1058 1060# 1060
1062# 1062 1064# 1064 1066# 1066 1068# 1068 1070# 1070 1072# 1072 1074# 1074
1076# 1076 1078# 1078 1080# 1080 1082# 1082 1084# 1084 1086# 1086 1088# 1088 SEQ 1149
1090# 1090 1092# 1092 1094# 1094 1096# 1096 1098# 1098 1100# 1100 1102# 1102
1104# 1104 1106# 1106 1108# 1108 1110# 1110 1112# 1112 1114# 1114 1116# 1116
1118# 1118 1120# 1120 1122# 1122 1124# 1124 1126# 1126 1128# 1128 1130# 1130
1132# 1132 1134# 1134 1136# 1136 1138# 1138 1140# 1140 1142# 1142 1144# 1144
1146# 1146 1148# 1148 1150# 1150 1152# 1152 1154# 1154 1156# 1156 1158# 1158
1160# 1160 1162# 1162 1164# 1164 1166# 1166 1168# 1168 1170# 1170 1172# 1172
1174# 1174 1176# 1176 1178# 1178 1180# 1180 1182# 1182 1184# 1184 1186# 1186
1188# 1188 1190# 1190 1192# 1192 1194# 1194 1196# 1196 1198# 1198 1200# 1200
1202# 1202 1204# 1204 1206# 1206 1208# 1208 1210# 1210 1212# 1212 1214# 1214
1216# 1216 1218# 1218 1220# 1220 1222# 1222 1224# 1224 1226# 1226 1228# 1228
1230# 1230 1232# 1232 1234# 1234 1236# 1236 1238# 1238 1240# 1240 1242# 1242
1244# 1244 1246# 1246 1248# 1248 1250# 1250 1252# 1252 1254# 1254 1256# 1256
1258# 1258 1260# 1260 1262# 1262 1264# 1264 1266# 1266 1268# 1268 1270# 1270
1272# 1272 1274# 1274 1276# 1276 1278# 1278 1280# 1280 1282# 1282 1284# 1284
1286# 1286 1288# 1288 1290# 1290 1292# 1292 1294# 1294 1296# 1296 1298# 1298
1300# 1300 1302# 1302 1304# 1304 1306# 1306 1308# 1308 1310# 1310 1312# 1312
1314# 1314 1316# 1316 1318# 1318 1320# 1320 1322# 1322 1324# 1324 1326# 1326
1328# 1328 1330# 1330 1332# 1332 1334# 1334 1336# 1336 1338# 1338 1340# 1340
1342# 1342 1344# 1344 1346# 1346 1348# 1348 1350# 1350 1352# 1352 1354# 1354
1356# 1356 1358# 1358 1360# 1360 1362# 1362 1364# 1364 1366# 1366 1368# 1368
1370# 1370 1372# 1372 1374# 1374 1376# 1376 1378# 1378 1380# 1380 1382# 1382
1384# 1384 1386# 1386 1388# 1388 1390# 1390 1392# 1392 1394# 1394 1396# 1396
1398# 1398 1400# 1400 1402# 1402 1404# 1404 1406# 1406 1408# 1408 1410# 1410
1412# 1412 1414# 1414 1416# 1416 1418# 1418 1420# 1420 1422# 1422 1424# 1424
1426# 1426 1428# 1428 1430# 1430 1432# 1432 1434# 1434 1436# 1436 1438# 1438
1440# 1440 1442# 1442 1444# 1444 1446# 1446 1448# 1448 1450# 1450 1452# 1452
1454# 1454 1456# 1456 1458# 1458 1460# 1460 1462# 1462 1464# 1464 1466# 1466
1468# 1468 1470# 1470 1472# 1472 1474# 1474 1476# 1476 1478# 1478 1480# 1480
1482# 1482 1484# 1484 1486# 1486 1488# 1488 1490# 1490 1492# 1492 1494# 1494
1496# 1496 1498# 1498 1500# 1500 1502# 1502 1504# 1504 1506# 1506 1508# 1508
1510# 1510 1512# 1512 1514# 1514 1516# 1516 1518# 1518 1520# 1520 1522# 1522
1524# 1524 1526# 1526 1528# 1528 1530# 1530 1532# 1532 1534# 1534 1536# 1536
1538# 1538 1540# 1540 1542# 1542 1544# 1544 1546# 1546 1548# 1548 1550# 1550
1552# 1552 1554# 1554 1556# 1556 1558# 1558 1560# 1560 1562# 1562 1564# 1564
1566# 1566 1568# 1568 1570# 1570 1572# 1572 1574# 1574 1576# 1576 1578# 1578
1580# 1580 1582# 1582 1584# 1584 1586# 1586 1588# 1588 1590# 1590 1592# 1592
1594# 1594 1596# 1596 1598# 1598 1600# 1600 1602# 1602 1604# 1604 1606# 1606
1608# 1608 1610# 1610 1612# 1612 1614# 1614 1616# 1616 1618# 1618 1620# 1620
1622# 1622 1624# 1624 1626# 1626 1628# 1628 1630# 1630 1632# 1632 1634# 1634
1636# 1636 1638# 1638 1640# 1640 1642# 1642 1644# 1644 1646# 1646 1648# 1648
1650# 1650 1652# 1652 1654# 1654 1656# 1656 1658# 1658 1660# 1660 1662# 1662
1664# 1664 1666# 1666 1668# 1668 1670# 1670 1672# 1672 1674# 1674 1676# 1676
1678# 1678 1680# 1680 1682# 1682 1684# 1684 1686# 1686 1688# 1688 1690# 1690
1692# 1692 1694# 1694 1696# 1696 1698# 1698 1700# 1700 1702# 1702 1704# 1704
1706# 1706 1708# 1708 1710# 1710 1712# 1712 1714# 1714 1716# 1716 1718# 1718
1720# 1720 1722# 1722 1724# 1724 1726# 1726 1728# 1728 1730# 1730 1732# 1732
1734# 1734 1736# 1736 1738# 1738 1740# 1740 1742# 1742 1744# 1744 1746# 1746
1748# 1748 1750# 1750 1752# 1752 1754# 1754 1756# 1756 1758# 1758 1760# 1760
1762# 1762 1764# 1764 1766# 1766 1768# 1768 1770# 1770 1772# 1772 1774# 1774
1776# 1776 1778# 1778 1780# 1780 1782# 1782 1784# 1784 1786# 1786 1788# 1788
1790# 1790 1792# 1792 1794# 1794 1796# 1796 1798# 1798 1800# 1800 1802# 1802
1804# 1804 1806# 1806 1808# 1808 1810# 1810 1812# 1812 1814# 1814 1816# 1816
1818# 1818 1820# 1820 1822# 1822 1824# 1824 1826# 1826 1828# 1828 1830# 1830 SEQ 1150
1832# 1832 1834# 1834 1836# 1836 1838# 1838 1840# 1840 1842# 1842 1844# 1844
1846# 1846 1848# 1848 1850# 1850 1852# 1852 1854# 1854 1856# 1856 1858# 1858
1860# 1860 1862# 1862 1864# 1864 1866# 1866 1868# 1868 1870# 1870 1872# 1872
1874# 1874 1876# 1876 1878# 1878 1880# 1880 1882# 1882 1884# 1884 1886# 1886
1888# 1888 1890# 1890 1892# 1892 1894# 1894 1896# 1896 1898# 1898 1900# 1900
1902# 1902 1904# 1904 1906# 1906 1908# 1908 1910# 1910 1912# 1912 1914# 1914
1916# 1916 1918# 1918 1920# 1920 1922# 1922 1924# 1924 1926# 1926 1928# 1928
1930# 1930 1932# 1932 1934# 1934 1936# 1936 1938# 1938 1940# 1940 1942# 1942
1944# 1944 1946# 1946 1948# 1948 1950# 1950 1952# 1952 1954# 1954 1956# 1956
1958# 1958 1960# 1960 1962# 1962 1964# 1964 1966# 1966 1968# 1968 1970# 1970
1972# 1972 1974# 1974 1976# 1976 1978# 1978 1980# 1980 1982# 1982 1984# 1984
1986# 1986 1988# 1988 1990# 1990 1992# 1992 1994# 1994 1996# 1996 1998# 1998
2000# 2000 2002# 2002 2004# 2004 2006# 2006 2008# 2008 2010# 2010 2012# 2012
2014# 2014 2016# 2016 2018# 2018 2020# 2020 2022# 2022 2024# 2024 2026# 2026
2028# 2028 2030# 2030 2032# 2032 2034# 2034 2036# 2036 2038# 2038 2040# 2040
2042# 2042 2044# 2044 2046# 2046 2048# 2048 2050# 2050 2052# 2052 2054# 2054
2056# 2056 2058# 2058 2060# 2060 2062# 2062 2064# 2064 2066# 2066 2068# 2068
2070# 2070 2072# 2072 2074# 2074 2076# 2076 2081# 2081 2086# 2086
%MR 115# 115 120# 120 122# 122 124# 124 126# 126 128# 128 130# 130
132# 132 134# 134 136# 136 138# 138 140# 140 142# 142 144# 144
146# 146 148# 148 150# 150 152# 152 160# 160 162# 162 164# 164
166# 166 168# 168 170# 170 172# 172 174# 174 176# 176 178# 178
180# 180 182# 182 184# 184 186# 186 188# 188 190# 190 192# 192
194# 194 196# 196 198# 198 200# 200 202# 202 204# 204 206# 206
208# 208 210# 210 212# 212 214# 214 216# 216 218# 218 220# 220
222# 222 224# 224 226# 226 228# 228 230# 230 232# 232 234# 234
236# 236 238# 238 240# 240 242# 242 244# 244 246# 246 248# 248
250# 250 252# 252 254# 254 256# 256 258# 258 260# 260 262# 262
264# 264 266# 266 268# 268 270# 270 272# 272 274# 274 276# 276
278# 278 280# 280 282# 282 284# 284 286# 286 288# 288 290# 290
292# 292 294# 294 296# 296 298# 298 300# 300 302# 302 304# 304
306# 306 308# 308 310# 310 312# 312 314# 314 316# 316 318# 318
320# 320 322# 322 324# 324 326# 326 328# 328 330# 330 332# 332
334# 334 336# 336 338# 338 340# 340 342# 342 344# 344 346# 346
348# 348 350# 350 352# 352 354# 354 356# 356 358# 358 360# 360
362# 362 364# 364 366# 366 368# 368 370# 370 372# 372 374# 374
376# 376 378# 378 380# 380 382# 382 384# 384 386# 386 388# 388
390# 390 392# 392 394# 394 396# 396 398# 398 400# 400 402# 402
404# 404 406# 406 408# 408 410# 410 412# 412 414# 414 416# 416
418# 418 420# 420 422# 422 424# 424 426# 426 428# 428 430# 430
432# 432 434# 434 436# 436 438# 438 440# 440 442# 442 444# 444
446# 446 448# 448 450# 450 452# 452 454# 454 456# 456 458# 458
460# 460 462# 462 464# 464 466# 466 468# 468 470# 470 472# 472
474# 474 476# 476 478# 478 480# 480 482# 482 484# 484 486# 486
488# 488 490# 490 492# 492 494# 494 496# 496 498# 498 500# 500
502# 502 504# 504 506# 506 508# 508 510# 510 512# 512 514# 514
516# 516 518# 518 520# 520 522# 522 524# 524 526# 526 528# 528
530# 530 532# 532 534# 534 536# 536 538# 538 540# 540 542# 542
544# 544 546# 546 548# 548 550# 550 552# 552 554# 554 556# 556
558# 558 560# 560 562# 562 564# 564 566# 566 568# 568 570# 570
572# 572 574# 574 576# 576 578# 578 580# 580 582# 582 584# 584
586# 586 588# 588 590# 590 592# 592 594# 594 596# 596 598# 598
600# 600 602# 602 604# 604 606# 606 608# 608 610# 610 612# 612 SEQ 1151
614# 614 616# 616 618# 618 620# 620 622# 622 624# 624 626# 626
628# 628 630# 630 632# 632 634# 634 636# 636 638# 638 640# 640
642# 642 644# 644 646# 646 648# 648 650# 650 652# 652 654# 654
656# 656 658# 658 660# 660 662# 662 664# 664 666# 666 668# 668
670# 670 672# 672 674# 674 676# 676 678# 678 680# 680 682# 682
684# 684 686# 686 688# 688 690# 690 692# 692 694# 694 696# 696
698# 698 700# 700 702# 702 704# 704 706# 706 708# 708 710# 710
712# 712 714# 714 716# 716 718# 718 720# 720 722# 722 724# 724
726# 726 728# 728 730# 730 732# 732 734# 734 736# 736 738# 738
740# 740 742# 742 744# 744 746# 746 748# 748 750# 750 752# 752
754# 754 756# 756 758# 758 760# 760 762# 762 764# 764 766# 766
768# 768 770# 770 772# 772 774# 774 776# 776 778# 778 780# 780
782# 782 784# 784 786# 786 788# 788 790# 790 792# 792 794# 794
796# 796 798# 798 800# 800 802# 802 804# 804 806# 806 808# 808
810# 810 812# 812 814# 814 816# 816 818# 818 820# 820 822# 822
824# 824 826# 826 828# 828 830# 830 832# 832 834# 834 836# 836
838# 838 840# 840 842# 842 844# 844 846# 846 848# 848 850# 850
852# 852 854# 854 856# 856 858# 858 860# 860 862# 862 864# 864
866# 866 868# 868 870# 870 872# 872 874# 874 876# 876 878# 878
880# 880 882# 882 884# 884 886# 886 888# 888 890# 890 892# 892
894# 894 896# 896 898# 898 900# 900 902# 902 904# 904 906# 906
908# 908 910# 910 912# 912 914# 914 916# 916 918# 918 920# 920
922# 922 924# 924 926# 926 928# 928 930# 930 932# 932 934# 934
936# 936 938# 938 940# 940 942# 942 944# 944 946# 946 948# 948
950# 950 952# 952 954# 954 956# 956 958# 958 960# 960 962# 962
964# 964 966# 966 968# 968 970# 970 972# 972 974# 974 976# 976
978# 978 980# 980 982# 982 984# 984 986# 986 988# 988 990# 990
992# 992 994# 994 996# 996 998# 998 1000# 1000 1002# 1002 1004# 1004
1006# 1006 1008# 1008 1010# 1010 1012# 1012 1014# 1014 1016# 1016 1018# 1018
1020# 1020 1022# 1022 1024# 1024 1026# 1026 1028# 1028 1030# 1030 1032# 1032
1034# 1034 1036# 1036 1038# 1038 1040# 1040 1042# 1042 1044# 1044 1046# 1046
1048# 1048 1050# 1050 1052# 1052 1054# 1054 1056# 1056 1058# 1058 1060# 1060
1062# 1062 1064# 1064 1066# 1066 1068# 1068 1070# 1070 1072# 1072 1074# 1074
1076# 1076 1078# 1078 1080# 1080 1082# 1082 1084# 1084 1086# 1086 1088# 1088
1090# 1090 1092# 1092 1094# 1094 1096# 1096 1098# 1098 1100# 1100 1102# 1102
1104# 1104 1106# 1106 1108# 1108 1110# 1110 1112# 1112 1114# 1114 1116# 1116
1118# 1118 1120# 1120 1122# 1122 1124# 1124 1126# 1126 1128# 1128 1130# 1130
1132# 1132 1134# 1134 1136# 1136 1138# 1138 1140# 1140 1142# 1142 1144# 1144
1146# 1146 1148# 1148 1150# 1150 1152# 1152 1154# 1154 1156# 1156 1158# 1158
1160# 1160 1162# 1162 1164# 1164 1166# 1166 1168# 1168 1170# 1170 1172# 1172
1174# 1174 1176# 1176 1178# 1178 1180# 1180 1182# 1182 1184# 1184 1186# 1186
1188# 1188 1190# 1190 1192# 1192 1194# 1194 1196# 1196 1198# 1198 1200# 1200
1202# 1202 1204# 1204 1206# 1206 1208# 1208 1210# 1210 1212# 1212 1214# 1214
1216# 1216 1218# 1218 1220# 1220 1222# 1222 1224# 1224 1226# 1226 1228# 1228
1230# 1230 1232# 1232 1234# 1234 1236# 1236 1238# 1238 1240# 1240 1242# 1242
1244# 1244 1246# 1246 1248# 1248 1250# 1250 1252# 1252 1254# 1254 1256# 1256
1258# 1258 1260# 1260 1262# 1262 1264# 1264 1266# 1266 1268# 1268 1270# 1270
1272# 1272 1274# 1274 1276# 1276 1278# 1278 1280# 1280 1282# 1282 1284# 1284
1286# 1286 1288# 1288 1290# 1290 1292# 1292 1294# 1294 1296# 1296 1298# 1298
1300# 1300 1302# 1302 1304# 1304 1306# 1306 1308# 1308 1310# 1310 1312# 1312
1314# 1314 1316# 1316 1318# 1318 1320# 1320 1322# 1322 1324# 1324 1326# 1326
1328# 1328 1330# 1330 1332# 1332 1334# 1334 1336# 1336 1338# 1338 1340# 1340
1342# 1342 1344# 1344 1346# 1346 1348# 1348 1350# 1350 1352# 1352 1354# 1354 SEQ 1152
1356# 1356 1358# 1358 1360# 1360 1362# 1362 1364# 1364 1366# 1366 1368# 1368
1370# 1370 1372# 1372 1374# 1374 1376# 1376 1378# 1378 1380# 1380 1382# 1382
1384# 1384 1386# 1386 1388# 1388 1390# 1390 1392# 1392 1394# 1394 1396# 1396
1398# 1398 1400# 1400 1402# 1402 1404# 1404 1406# 1406 1408# 1408 1410# 1410
1412# 1412 1414# 1414 1416# 1416 1418# 1418 1420# 1420 1422# 1422 1424# 1424
1426# 1426 1428# 1428 1430# 1430 1432# 1432 1434# 1434 1436# 1436 1438# 1438
1440# 1440 1442# 1442 1444# 1444 1446# 1446 1448# 1448 1450# 1450 1452# 1452
1454# 1454 1456# 1456 1458# 1458 1460# 1460 1462# 1462 1464# 1464 1466# 1466
1468# 1468 1470# 1470 1472# 1472 1474# 1474 1476# 1476 1478# 1478 1480# 1480
1482# 1482 1484# 1484 1486# 1486 1488# 1488 1490# 1490 1492# 1492 1494# 1494
1496# 1496 1498# 1498 1500# 1500 1502# 1502 1504# 1504 1506# 1506 1508# 1508
1510# 1510 1512# 1512 1514# 1514 1516# 1516 1518# 1518 1520# 1520 1522# 1522
1524# 1524 1526# 1526 1528# 1528 1530# 1530 1532# 1532 1534# 1534 1536# 1536
1538# 1538 1540# 1540 1542# 1542 1544# 1544 1546# 1546 1548# 1548 1550# 1550
1552# 1552 1554# 1554 1556# 1556 1558# 1558 1560# 1560 1562# 1562 1564# 1564
1566# 1566 1568# 1568 1570# 1570 1572# 1572 1574# 1574 1576# 1576 1578# 1578
1580# 1580 1582# 1582 1584# 1584 1586# 1586 1588# 1588 1590# 1590 1592# 1592
1594# 1594 1596# 1596 1598# 1598 1600# 1600 1602# 1602 1604# 1604 1606# 1606
1608# 1608 1610# 1610 1612# 1612 1614# 1614 1616# 1616 1618# 1618 1620# 1620
1622# 1622 1624# 1624 1626# 1626 1628# 1628 1630# 1630 1632# 1632 1634# 1634
1636# 1636 1638# 1638 1640# 1640 1642# 1642 1644# 1644 1646# 1646 1648# 1648
1650# 1650 1652# 1652 1654# 1654 1656# 1656 1658# 1658 1660# 1660 1662# 1662
1664# 1664 1666# 1666 1668# 1668 1670# 1670 1672# 1672 1674# 1674 1676# 1676
1678# 1678 1680# 1680 1682# 1682 1684# 1684 1686# 1686 1688# 1688 1690# 1690
1692# 1692 1694# 1694 1696# 1696 1698# 1698 1700# 1700 1702# 1702 1704# 1704
1706# 1706 1708# 1708 1710# 1710 1712# 1712 1714# 1714 1716# 1716 1718# 1718
1720# 1720 1722# 1722 1724# 1724 1726# 1726 1728# 1728 1730# 1730 1732# 1732
1734# 1734 1736# 1736 1738# 1738 1740# 1740 1742# 1742 1744# 1744 1746# 1746
1748# 1748 1750# 1750 1752# 1752 1754# 1754 1756# 1756 1758# 1758 1760# 1760
1762# 1762 1764# 1764 1766# 1766 1768# 1768 1770# 1770 1772# 1772 1774# 1774
1776# 1776 1778# 1778 1780# 1780 1782# 1782 1784# 1784 1786# 1786 1788# 1788
1790# 1790 1792# 1792 1794# 1794 1796# 1796 1798# 1798 1800# 1800 1802# 1802
1804# 1804 1806# 1806 1808# 1808 1810# 1810 1812# 1812 1814# 1814 1816# 1816
1818# 1818 1820# 1820 1822# 1822 1824# 1824 1826# 1826 1828# 1828 1830# 1830
1832# 1832 1834# 1834 1836# 1836 1838# 1838 1840# 1840 1842# 1842 1844# 1844
1846# 1846 1848# 1848 1850# 1850 1852# 1852 1854# 1854 1856# 1856 1858# 1858
1860# 1860 1862# 1862 1864# 1864 1866# 1866 1868# 1868 1870# 1870 1872# 1872
1874# 1874 1876# 1876 1878# 1878 1880# 1880 1882# 1882 1884# 1884 1886# 1886
1888# 1888 1890# 1890 1892# 1892 1894# 1894 1896# 1896 1898# 1898 1900# 1900
1902# 1902 1904# 1904 1906# 1906 1908# 1908 1910# 1910 1912# 1912 1914# 1914
1916# 1916 1918# 1918 1920# 1920 1922# 1922 1924# 1924 1926# 1926 1928# 1928
1930# 1930 1932# 1932 1934# 1934 1936# 1936 1938# 1938 1940# 1940 1942# 1942
1944# 1944 1946# 1946 1948# 1948 1950# 1950 1952# 1952 1954# 1954 1956# 1956
1958# 1958 1960# 1960 1962# 1962 1964# 1964 1966# 1966 1968# 1968 1970# 1970
1972# 1972 1974# 1974 1976# 1976 1978# 1978 1980# 1980 1982# 1982 1984# 1984
1986# 1986 1988# 1988 1990# 1990 1992# 1992 1994# 1994 1996# 1996 1998# 1998
2000# 2000 2002# 2002 2004# 2004 2006# 2006 2008# 2008 2010# 2010 2012# 2012
2014# 2014 2016# 2016 2018# 2018 2020# 2020 2022# 2022 2024# 2024 2026# 2026
2028# 2028 2030# 2030 2032# 2032 2034# 2034 2036# 2036 2038# 2038 2040# 2040
2042# 2042 2044# 2044 2046# 2046 2048# 2048 2050# 2050 2052# 2052 2054# 2054
2056# 2056 2058# 2058 2060# 2060 2062# 2062 2064# 2064 2066# 2066 2068# 2068
2070# 2070 2072# 2072 2074# 2074 2076# 2076 2081# 2081 2086# 2086
.LA 166 172 178 184 190 196 202 208 214 220 226 232 238 244 SEQ 1153
250 256 262 268 274 280 286 292 298 304 310 316 322 328
334 340 346 352 358 364 370 376 382 388 394 400 406 412
418 424 430 436 442 448 454 460 466 472 478 484 490 496
502 508 514 520 526 532 538 544 550 556 562 568 574 580
586 592 598 604 610 616 622 628 634 640 646 652 658 664
670 676 682 688 694 700 706 712 718 724 730 736 742 748
754 760 766 772 778 784 790 796 802 808 814 820 826 832
838 844 850 856 862 868 874 880 886 892 898 904 910 916
922 928 934 940 946 952 958 964 970 976 982 988 994 1000
1006 1012 1018 1024 1030 1036 1042 1048 1054 1060 1066 1072 1078 1082
1088 1094 1100 1106 1112 1118 1124 1130 1136 1142 1148 1154 1160 1166
1172 1178 1184 1190 1196 1202 1208 1214 1220 1226 1232 1238 1244 1250
1256 1262 1268 1274 1280 1286 1292 1298 1304 1310 1316 1322 1328 1334
1340 1346 1352 1358 1364 1370 1376 1382 1388 1394 1400 1406 1412 1418
1424 1430 1436 1442 1448 1454 1460 1466 1472 1478 1484 1490 1496 1502
1508 1514 1520 1526 1532 1538 1544 1550 1556 1562 1568 1574 1580 1586
1592 1598 1604 1610 1616 1622 1628 1634 1640 1646 1652 1658 1664 1670
1676 1682 1688 1694 1700 1706 1712 1718 1724 1730 1736 1742 1748 1754
1760 1766 1772 1778 1784 1790 1796 1802 1808 1814 1820 1826 1832 1838
1844 1850 1856 1862 1868 1874 1880 1886 1892 1898 1904 1910 1916 1922
1928 1934 1940 1946 1952 1958 1964 1970 1976 1982 1988 1994 2000 2006
2012 2018 2024 2030 2036 2042 2048 2054 2060 2066 2072
.LADDR 115 160 2086
.LAND 115 1118 1124 1130 1136 1142 1148 1154 1160 1166 1172 1178 1184 1190
1196 1202 1208 1214 1220 1226 1232 1238 1244 1250 1256 1262 1268 1274
1280 1286 1292 1298 1304 1310 1316 1322 1328 1334 1340 1346 1352
.LB 115 120 122 124 126 128 130 132 134 136 138 140 142 144
146 148 150 160 166 172 178 184 190 196 202 208 214 220
226 232 238 244 250 256 262 268 274 280 286 292 298 304
310 316 322 328 334 340 346 352 358 364 370 376 382 388
394 400 406 412 418 424 430 436 442 448 454 460 466 472
478 484 490 496 502 508 514 520 526 532 538 544 550 556
562 568 574 580 586 592 598 604 610 616 622 628 634 640
646 652 658 664 670 676 682 688 694 700 706 712 718 724
730 736 742 748 754 760 766 772 778 784 790 796 802 808
814 820 826 832 838 844 850 856 862 868 874 880 886 892
898 904 910 916 922 928 934 940 946 952 958 964 970 976
982 988 994 1000 1006 1012 1018 1024 1030 1036 1042 1048 1054 1060
1066 1072 1078 1082 1088 1094 1100 1106 1112 1118 1124 1130 1136 1142
1148 1154 1160 1166 1172 1178 1184 1190 1196 1202 1208 1214 1220 1226
1232 1238 1244 1250 1256 1262 1268 1274 1280 1286 1292 1298 1304 1310
1316 1322 1328 1334 1340 1346 1352 1358 1364 1370 1376 1382 1388 1394
1400 1406 1412 1418 1424 1430 1436 1442 1448 1454 1460 1466 1472 1478
1484 1490 1496 1502 1508 1514 1520 1526 1532 1538 1544 1550 1556 1562
1568 1574 1580 1586 1592 1598 1604 1610 1616 1622 1628 1634 1640 1646
1652 1658 1664 1670 1676 1682 1688 1694 1700 1706 1712 1718 1724 1730
1736 1742 1748 1754 1760 1766 1772 1778 1784 1790 1796 1802 1808 1814
1820 1826 1832 1838 1844 1850 1856 1862 1868 1874 1880 1886 1892 1898
1904 1910 1916 1922 1928 1934 1940 1946 1952 1958 1964 1970 1976 1982
1988 1994 2000 2006 2012 2018 2024 2030 2036 2042 2048 2054 2060 2066
2072
.LBAD 2081 2086
.LCCFZ 162 168 174 180 186 192 198 204 210 216 222 228 234 240 SEQ 1154
246 252 258 264 270 276 282 288 294 300 306 312 318 324
330 336 342 348 354 360 366 372 378 384 390 396 402 408
414 420 426 432 438 444 450 456 462 468 474 480 486 492
498 504 510 516 522 528 534 540 546 552 558 564 570 576
582 588 594 600 606 612 618 624 630 636 642 648 654 660
666 672 678 684 690 696 702 708 714 720 726 732 738 744
750 756 762 768 774 780 786 792 798 804 810 816 822 828
834 840 846 852 858 864 870 876 882 888 894 900 906 912
918 924 930 936 942 948 954 960 966 972 978 984 990 996
1002 1008 1014 1020 1026 1032 1038 1044 1050 1056 1062 1068 1074 1080
1084 1090 1096 1102 1108 1114 1120 1126 1132 1138 1144 1150 1156 1162
1168 1174 1180 1186 1192 1198 1204 1210 1216 1222 1228 1234 1240 1246
1252 1258 1264 1270 1276 1282 1288 1294 1300 1306 1312 1318 1324 1330
1336 1342 1348 1354 1360 1366 1372 1378 1384 1390 1396 1402 1408 1414
1420 1426 1432 1438 1444 1450 1456 1462 1468 1474 1480 1486 1492 1498
1504 1510 1516 1522 1528 1534 1540 1546 1552 1558 1564 1570 1576 1582
1588 1594 1600 1606 1612 1618 1624 1630 1636 1642 1648 1654 1660 1666
1672 1678 1684 1690 1696 1702 1708 1714 1720 1726 1732 1738 1744 1750
1756 1762 1768 1774 1780 1786 1792 1798 1804 1810 1816 1822 1828 1834
1840 1846 1852 1858 1864 1870 1876 1882 1888 1894 1900 1906 1912 1918
1924 1930 1936 1942 1948 1954 1960 1966 1972 1978 1984 1990 1996 2002
2008 2014 2020 2026 2032 2038 2044 2050 2056 2062 2068 2074
.LCENA 162 168 174 180 186 192 198 204 210 216 222 228 234 240
246 252 258 264 270 276 282 288 294 300 306 312 318 324
330 336 342 348 354 360 366 372 378 384 390 396 402 408
414 420 426 432 438 444 450 456 462 468 474 480 486 492
498 504 510 516 522 528 534 540 546 552 558 564 570 576
582 588 594 600 606 612 618 624 630 636 642 648 654 660
666 672 678 684 690 696 702 708 714 720 726 732 738 744
750 756 762 768 774 780 786 792 798 804 810 816 822 828
834 840 846 852 858 864 870 876 882 888 894 900 906 912
918 924 930 936 942 948 954 960 966 972 978 984 990 996
1002 1008 1014 1020 1026 1032 1038 1044 1050 1056 1062 1068 1074 1080
1084 1090 1096 1102 1108 1114 1120 1126 1132 1138 1144 1150 1156 1162
1168 1174 1180 1186 1192 1198 1204 1210 1216 1222 1228 1234 1240 1246
1252 1258 1264 1270 1276 1282 1288 1294 1300 1306 1312 1318 1324 1330
1336 1342 1348 1354 1360 1366 1372 1378 1384 1390 1396 1402 1408 1414
1420 1426 1432 1438 1444 1450 1456 1462 1468 1474 1480 1486 1492 1498
1504 1510 1516 1522 1528 1534 1540 1546 1552 1558 1564 1570 1576 1582
1588 1594 1600 1606 1612 1618 1624 1630 1636 1642 1648 1654 1660 1666
1672 1678 1684 1690 1696 1702 1708 1714 1720 1726 1732 1738 1744 1750
1756 1762 1768 1774 1780 1786 1792 1798 1804 1810 1816 1822 1828 1834
1840 1846 1852 1858 1864 1870 1876 1882 1888 1894 1900 1906 1912 1918
1924 1930 1936 1942 1948 1954 1960 1966 1972 1978 1984 1990 1996 2002
2008 2014 2020 2026 2032 2038 2044 2050 2056 2062 2068 2074
.LCJV 162 168 174 180 186 192 198 204 210 216 222 228 234 240
246 252 258 264 270 276 282 288 294 300 306 312 318 324
330 336 342 348 354 360 366 372 378 384 390 396 402 408
414 420 426 432 438 444 450 456 462 468 474 480 486 492
498 504 510 516 522 528 534 540 546 552 558 564 570 576
582 588 594 600 606 612 618 624 630 636 642 648 654 660
666 672 678 684 690 696 702 708 714 720 726 732 738 744
750 756 762 768 774 780 786 792 798 804 810 816 822 828 SEQ 1155
834 840 846 852 858 864 870 876 882 888 894 900 906 912
918 924 930 936 942 948 954 960 966 972 978 984 990 996
1002 1008 1014 1020 1026 1032 1038 1044 1050 1056 1062 1068 1074 1080
1084 1090 1096 1102 1108 1114 1120 1126 1132 1138 1144 1150 1156 1162
1168 1174 1180 1186 1192 1198 1204 1210 1216 1222 1228 1234 1240 1246
1252 1258 1264 1270 1276 1282 1288 1294 1300 1306 1312 1318 1324 1330
1336 1342 1348 1354 1360 1366 1372 1378 1384 1390 1396 1402 1408 1414
1420 1426 1432 1438 1444 1450 1456 1462 1468 1474 1480 1486 1492 1498
1504 1510 1516 1522 1528 1534 1540 1546 1552 1558 1564 1570 1576 1582
1588 1594 1600 1606 1612 1618 1624 1630 1636 1642 1648 1654 1660 1666
1672 1678 1684 1690 1696 1702 1708 1714 1720 1726 1732 1738 1744 1750
1756 1762 1768 1774 1780 1786 1792 1798 1804 1810 1816 1822 1828 1834
1840 1846 1852 1858 1864 1870 1876 1882 1888 1894 1900 1906 1912 1918
1924 1930 1936 1942 1948 1954 1960 1966 1972 1978 1984 1990 1996 2002
2008 2014 2020 2026 2032 2038 2044 2050 2056 2062 2068 2074
.LCONT 120 122 124 126 128 130 132 134 136 138 140 142 144 146
148 150 160 166 172 178 184 190 196 202 208 214 220 226
232 238 244 250 256 262 268 274 280 286 292 298 304 310
316 322 328 334 340 346 352 358 364 370 376 382 388 394
400 406 412 418 424 430 436 442 448 454 460 466 472 478
484 490 496 502 508 514 520 526 532 538 544 550 556 562
568 574 580 586 592 598 604 610 616 622 628 634 640 646
652 658 664 670 676 682 688 694 700 706 712 718 724 730
736 742 748 754 760 766 772 778 784 790 796 802 808 814
820 826 832 838 844 850 856 862 868 874 880 886 892 898
904 910 916 922 928 934 940 946 952 958 964 970 976 982
988 994 1000 1006 1012 1018 1024 1030 1036 1042 1048 1054 1060 1066
1072 1078 1082 1088 1094 1100 1106 1112 1118 1124 1130 1136 1142 1148
1154 1160 1166 1172 1178 1184 1190 1196 1202 1208 1214 1220 1226 1232
1238 1244 1250 1256 1262 1268 1274 1280 1286 1292 1298 1304 1310 1316
1322 1328 1334 1340 1346 1352 1358 1364 1370 1376 1382 1388 1394 1400
1406 1412 1418 1424 1430 1436 1442 1448 1454 1460 1466 1472 1478 1484
1490 1496 1502 1508 1514 1520 1526 1532 1538 1544 1550 1556 1562 1568
1574 1580 1586 1592 1598 1604 1610 1616 1622 1628 1634 1640 1646 1652
1658 1664 1670 1676 1682 1688 1694 1700 1706 1712 1718 1724 1730 1736
1742 1748 1754 1760 1766 1772 1778 1784 1790 1796 1802 1808 1814 1820
1826 1832 1838 1844 1850 1856 1862 1868 1874 1880 1886 1892 1898 1904
1910 1916 1922 1928 1934 1940 1946 1952 1958 1964 1970 1976 1982 1988
1994 2000 2006 2012 2018 2024 2030 2036 2042 2048 2054 2060 2066 2072
.LD 115 120 122 124 126 128 130 132 134 136 138 140 142 144
146 148 150 152 160 162 166 168 172 174 178 180 184 186
190 192 196 198 202 204 208 210 214 216 220 222 226 228
232 234 238 240 244 246 250 252 256 258 262 264 268 270
274 276 280 282 286 288 292 294 298 300 304 306 310 312
316 318 322 324 328 330 334 336 340 342 346 348 352 354
358 360 364 366 370 372 376 378 382 384 388 390 394 396
400 402 406 408 412 414 418 420 424 426 430 432 436 438
442 444 448 450 454 456 460 462 466 468 472 474 478 480
484 486 490 492 496 498 502 504 508 510 514 516 520 522
526 528 532 534 538 540 544 546 550 552 556 558 562 564
568 570 574 576 580 582 586 588 592 594 598 600 604 606
610 612 616 618 622 624 628 630 634 636 640 642 646 648
652 654 658 660 664 666 670 672 676 678 682 684 688 690 SEQ 1156
694 696 700 702 706 708 712 714 718 720 724 726 730 732
736 738 742 744 748 750 754 756 760 762 766 768 772 774
778 780 784 786 790 792 796 798 802 804 808 810 814 816
820 822 826 828 832 834 838 840 844 846 850 852 856 858
862 864 868 870 874 876 880 882 886 888 892 894 898 900
904 906 910 912 916 918 922 924 928 930 934 936 940 942
946 948 952 954 958 960 964 966 970 972 976 978 982 984
988 990 994 996 1000 1002 1006 1008 1012 1014 1018 1020 1024 1026
1030 1032 1036 1038 1042 1044 1048 1050 1054 1056 1060 1062 1066 1068
1072 1074 1078 1080 1082 1084 1088 1090 1094 1096 1100 1102 1106 1108
1112 1114 1118 1120 1124 1126 1130 1132 1136 1138 1142 1144 1148 1150
1154 1156 1160 1162 1166 1168 1172 1174 1178 1180 1184 1186 1190 1192
1196 1198 1202 1204 1208 1210 1214 1216 1220 1222 1226 1228 1232 1234
1238 1240 1244 1246 1250 1252 1256 1258 1262 1264 1268 1270 1274 1276
1280 1282 1286 1288 1292 1294 1298 1300 1304 1306 1310 1312 1316 1318
1322 1324 1328 1330 1334 1336 1340 1342 1346 1348 1352 1354 1358 1360
1364 1366 1370 1372 1376 1378 1382 1384 1388 1390 1394 1396 1400 1402
1406 1408 1412 1414 1418 1420 1424 1426 1430 1432 1436 1438 1442 1444
1448 1450 1454 1456 1460 1462 1466 1468 1472 1474 1478 1480 1484 1486
1490 1492 1496 1498 1502 1504 1508 1510 1514 1516 1520 1522 1526 1528
1532 1534 1538 1540 1544 1546 1550 1552 1556 1558 1562 1564 1568 1570
1574 1576 1580 1582 1586 1588 1592 1594 1598 1600 1604 1606 1610 1612
1616 1618 1622 1624 1628 1630 1634 1636 1640 1642 1646 1648 1652 1654
1658 1660 1664 1666 1670 1672 1676 1678 1682 1684 1688 1690 1694 1696
1700 1702 1706 1708 1712 1714 1718 1720 1724 1726 1730 1732 1736 1738
1742 1744 1748 1750 1754 1756 1760 1762 1766 1768 1772 1774 1778 1780
1784 1786 1790 1792 1796 1798 1802 1804 1808 1810 1814 1816 1820 1822
1826 1828 1832 1834 1838 1840 1844 1846 1850 1852 1856 1858 1862 1864
1868 1870 1874 1876 1880 1882 1886 1888 1892 1894 1898 1900 1904 1906
1910 1912 1916 1918 1922 1924 1928 1930 1934 1936 1940 1942 1946 1948
1952 1954 1958 1960 1964 1966 1970 1972 1976 1978 1982 1984 1988 1990
1994 1996 2000 2002 2006 2008 2012 2014 2018 2020 2024 2026 2030 2032
2036 2038 2042 2044 2048 2050 2054 2056 2060 2062 2066 2068 2072 2074
.LJ 115 152 162 164 168 170 174 176 180 182 186 188 192 194
198 200 204 206 210 212 216 218 222 224 228 230 234 236
240 242 246 248 252 254 258 260 264 266 270 272 276 278
282 284 288 290 294 296 300 302 306 308 312 314 318 320
324 326 330 332 336 338 342 344 348 350 354 356 360 362
366 368 372 374 378 380 384 386 390 392 396 398 402 404
408 410 414 416 420 422 426 428 432 434 438 440 444 446
450 452 456 458 462 464 468 470 474 476 480 482 486 488
492 494 498 500 504 506 510 512 516 518 522 524 528 530
534 536 540 542 546 548 552 554 558 560 564 566 570 572
576 578 582 584 588 590 594 596 600 602 606 608 612 614
618 620 624 626 630 632 636 638 642 644 648 650 654 656
660 662 666 668 672 674 678 680 684 686 690 692 696 698
702 704 708 710 714 716 720 722 726 728 732 734 738 740
744 746 750 752 756 758 762 764 768 770 774 776 780 782
786 788 792 794 798 800 804 806 810 812 816 818 822 824
828 830 834 836 840 842 846 848 852 854 858 860 864 866
870 872 876 878 882 884 888 890 894 896 900 902 906 908
912 914 918 920 924 926 930 932 936 938 942 944 948 950
954 956 960 962 966 968 972 974 978 980 984 986 990 992 SEQ 1157
996 998 1002 1004 1008 1010 1014 1016 1020 1022 1026 1028 1032 1034
1038 1040 1044 1046 1050 1052 1056 1058 1062 1064 1068 1070 1074 1076
1080 1084 1086 1090 1092 1096 1098 1102 1104 1108 1110 1114 1116 1120
1122 1126 1128 1132 1134 1138 1140 1144 1146 1150 1152 1156 1158 1162
1164 1168 1170 1174 1176 1180 1182 1186 1188 1192 1194 1198 1200 1204
1206 1210 1212 1216 1218 1222 1224 1228 1230 1234 1236 1240 1242 1246
1248 1252 1254 1258 1260 1264 1266 1270 1272 1276 1278 1282 1284 1288
1290 1294 1296 1300 1302 1306 1308 1312 1314 1318 1320 1324 1326 1330
1332 1336 1338 1342 1344 1348 1350 1354 1356 1360 1362 1366 1368 1372
1374 1378 1380 1384 1386 1390 1392 1396 1398 1402 1404 1408 1410 1414
1416 1420 1422 1426 1428 1432 1434 1438 1440 1444 1446 1450 1452 1456
1458 1462 1464 1468 1470 1474 1476 1480 1482 1486 1488 1492 1494 1498
1500 1504 1506 1510 1512 1516 1518 1522 1524 1528 1530 1534 1536 1540
1542 1546 1548 1552 1554 1558 1560 1564 1566 1570 1572 1576 1578 1582
1584 1588 1590 1594 1596 1600 1602 1606 1608 1612 1614 1618 1620 1624
1626 1630 1632 1636 1638 1642 1644 1648 1650 1654 1656 1660 1662 1666
1668 1672 1674 1678 1680 1684 1686 1690 1692 1696 1698 1702 1704 1708
1710 1714 1716 1720 1722 1726 1728 1732 1734 1738 1740 1744 1746 1750
1752 1756 1758 1762 1764 1768 1770 1774 1776 1780 1782 1786 1788 1792
1794 1798 1800 1804 1806 1810 1812 1816 1818 1822 1824 1828 1830 1834
1836 1840 1842 1846 1848 1852 1854 1858 1860 1864 1866 1870 1872 1876
1878 1882 1884 1888 1890 1894 1896 1900 1902 1906 1908 1912 1914 1918
1920 1924 1926 1930 1932 1936 1938 1942 1944 1948 1950 1954 1956 1960
1962 1966 1968 1972 1974 1978 1980 1984 1986 1990 1992 1996 1998 2002
2004 2008 2010 2014 2016 2020 2022 2026 2028 2032 2034 2038 2040 2044
2046 2050 2052 2056 2058 2062 2064 2068 2070 2074 2076 2081 2086
.LJMAP 115 152 164 170 176 182 188 194 200 206 212 218 224 230
236 242 248 254 260 266 272 278 284 290 296 302 308 314
320 326 332 338 344 350 356 362 368 374 380 386 392 398
404 410 416 422 428 434 440 446 452 458 464 470 476 482
488 494 500 506 512 518 524 530 536 542 548 554 560 566
572 578 584 590 596 602 608 614 620 626 632 638 644 650
656 662 668 674 680 686 692 698 704 710 716 722 728 734
740 746 752 758 764 770 776 782 788 794 800 806 812 818
824 830 836 842 848 854 860 866 872 878 884 890 896 902
908 914 920 926 932 938 944 950 956 962 968 974 980 986
992 998 1004 1010 1016 1022 1028 1034 1040 1046 1052 1058 1064 1070
1076 1086 1092 1098 1104 1110 1116 1122 1128 1134 1140 1146 1152 1158
1164 1170 1176 1182 1188 1194 1200 1206 1212 1218 1224 1230 1236 1242
1248 1254 1260 1266 1272 1278 1284 1290 1296 1302 1308 1314 1320 1326
1332 1338 1344 1350 1356 1362 1368 1374 1380 1386 1392 1398 1404 1410
1416 1422 1428 1434 1440 1446 1452 1458 1464 1470 1476 1482 1488 1494
1500 1506 1512 1518 1524 1530 1536 1542 1548 1554 1560 1566 1572 1578
1584 1590 1596 1602 1608 1614 1620 1626 1632 1638 1644 1650 1656 1662
1668 1674 1680 1686 1692 1698 1704 1710 1716 1722 1728 1734 1740 1746
1752 1758 1764 1770 1776 1782 1788 1794 1800 1806 1812 1818 1824 1830
1836 1842 1848 1854 1860 1866 1872 1878 1884 1890 1896 1902 1908 1914
1920 1926 1932 1938 1944 1950 1956 1962 1968 1974 1980 1986 1992 1998
2004 2010 2016 2022 2028 2034 2040 2046 2052 2058 2064 2070 2076 2081
2086
.LMGC 120 122 124 126 128 130 132 134 136 138 140 142 144 146
148 150
.LNAND 1358 1364 1370 1376 1382 1388 1394 1400 1406 1412 1418 1424 1430 1436 SEQ 1158
1442 1448 1454 1460 1466 1472 1478 1484 1490 1496 1502 1508 1514 1520
1526 1532 1538 1544 1550 1556 1562 1568 1574 1580 1586 1592
.LOR 120 122 124 126 128 130 132 134 136 138 140 142 144 146
148 150 162 168 174 180 186 192 198 204 210 216 222 228
234 240 246 252 258 264 270 276 282 288 294 300 306 312
318 324 330 336 342 348 354 360 366 372 378 384 390 396
402 408 414 420 426 432 438 444 450 456 462 468 474 480
486 492 498 504 510 516 522 528 534 540 546 552 558 564
570 576 582 588 594 600 606 612 618 624 630 636 642 648
654 660 666 672 678 684 690 696 702 708 714 720 726 732
738 744 750 756 762 768 774 780 786 792 798 804 810 816
822 828 834 840 846 852 858 864 870 876 880 882 886 888
892 894 898 900 904 906 910 912 916 918 922 924 928 930
934 936 940 942 946 948 952 954 958 960 964 966 970 972
976 978 982 984 988 990 994 996 1000 1002 1006 1008 1012 1014
1018 1020 1024 1026 1030 1032 1036 1038 1042 1044 1048 1050 1054 1056
1060 1062 1066 1068 1072 1074 1078 1080 1082 1084 1088 1090 1094 1096
1100 1102 1106 1108 1112 1114 1120 1126 1132 1138 1144 1150 1156 1162
1168 1174 1180 1186 1192 1198 1204 1210 1216 1222 1228 1234 1240 1246
1252 1258 1264 1270 1276 1282 1288 1294 1300 1306 1312 1318 1324 1330
1336 1342 1348 1354 1360 1366 1372 1378 1384 1390 1396 1402 1408 1414
1420 1426 1432 1438 1444 1450 1456 1462 1468 1474 1480 1486 1492 1498
1504 1510 1516 1522 1528 1534 1540 1546 1552 1558 1564 1570 1576 1582
1588 1594 1600 1606 1612 1618 1624 1630 1636 1642 1648 1654 1660 1666
1672 1678 1684 1690 1696 1702 1708 1714 1720 1726 1732 1738 1744 1750
1756 1762 1768 1774 1780 1786 1792 1798 1804 1810 1816 1822 1828 1834
1840 1846 1852 1858 1864 1870 1876 1882 1888 1894 1900 1906 1912 1918
1924 1930 1936 1942 1948 1954 1960 1966 1972 1978 1984 1990 1996 2002
2008 2014 2020 2026 2032 2038 2044 2050 2056 2062 2068 2074
.LPLUS 160 166 172 178 184 190 196 202 208 214 220 226 232 238
244 250 256 262 268 274 280 286 292 298 304 310 316 322
328 334 340 346 352 358 364 370 376 382 388 394
.LRMIN 640 646 652 658 664 670 676 682 688 694 700 706 712 718
724 730 736 742 748 754 760 766 772 778 784 790 796 802
808 814 820 826 832 838 844 850 856 862 868 874
.LS0A 280 286 292 298 304 520 526 532 538 544 760 766 772 778
784 1000 1006 1012 1018 1024 1238 1244 1250 1256 1262 1478 1484 1490
1496 1502 1718 1724 1730 1736 1742 1958 1964 1970 1976 1982
.LS0B 250 256 262 268 274 490 496 502 508 514 730 736 742 748
754 970 976 982 988 994 1208 1214 1220 1226 1232 1448 1454 1460
1466 1472 1688 1694 1700 1706 1712 1928 1934 1940 1946 1952
.LS0Q 162 168 174 180 186 192 198 204 210 216 220 222 226 228
232 234 238 240 244 246 252 258 264 270 276 282 288 294
300 306 312 318 324 330 336 342 348 354 360 366 372 378
384 390 396 402 408 414 420 426 432 438 444 450 456 460
462 466 468 472 474 478 480 484 486 492 498 504 510 516
522 528 534 540 546 552 558 564 570 576 582 588 594 600
606 612 618 624 630 636 642 648 654 660 666 672 678 684
690 696 700 702 706 708 712 714 718 720 724 726 732 738
744 750 756 762 768 774 780 786 792 798 804 810 816 822
828 834 840 846 852 858 864 870 876 882 888 894 900 906
912 918 924 930 936 940 942 946 948 952 954 958 960 964
966 972 978 984 990 996 1002 1008 1014 1020 1026 1032 1038 1044 SEQ 1159
1050 1056 1062 1068 1074 1080 1084 1090 1096 1102 1108 1114 1120 1126
1132 1138 1144 1150 1156 1162 1168 1174 1178 1180 1184 1186 1190 1192
1196 1198 1202 1204 1210 1216 1222 1228 1234 1240 1246 1252 1258 1264
1270 1276 1282 1288 1294 1300 1306 1312 1318 1324 1330 1336 1342 1348
1354 1360 1366 1372 1378 1384 1390 1396 1402 1408 1414 1418 1420 1424
1426 1430 1432 1436 1438 1442 1444 1450 1456 1462 1468 1474 1480 1486
1492 1498 1504 1510 1516 1522 1528 1534 1540 1546 1552 1558 1564 1570
1576 1582 1588 1594 1600 1606 1612 1618 1624 1630 1636 1642 1648 1654
1658 1660 1664 1666 1670 1672 1676 1678 1682 1684 1690 1696 1702 1708
1714 1720 1726 1732 1738 1744 1750 1756 1762 1768 1774 1780 1786 1792
1798 1804 1810 1816 1822 1828 1834 1840 1846 1852 1858 1864 1870 1876
1882 1888 1894 1898 1900 1904 1906 1910 1912 1916 1918 1922 1924 1930
1936 1942 1948 1954 1960 1966 1972 1978 1984 1990 1996 2002 2008 2014
2020 2026 2032 2038 2044 2050 2056 2062 2068 2074
.LSAB 190 196 202 208 214 430 436 442 448 454 670 676 682 688
694 910 916 922 928 934 1148 1154 1160 1166 1172 1388 1394 1400
1406 1412 1628 1634 1640 1646 1652 1868 1874 1880 1886 1892
.LSAQ 160 166 172 178 184 400 406 412 418 424 640 646 652 658
664 880 886 892 898 904 1118 1124 1130 1136 1142 1358 1364 1370
1376 1382 1598 1604 1610 1616 1622 1838 1844 1850 1856 1862
.LSD0 115 120 122 124 126 128 130 132 134 136 138 140 142 144
146 148 150 370 376 382 388 394 610 616 622 628 634 850
856 862 868 874 1088 1094 1100 1106 1112 1328 1334 1340 1346 1352
1568 1574 1580 1586 1592 1808 1814 1820 1826 1832 2048 2054 2060 2066
2072
.LSDA 310 316 322 328 334 550 556 562 568 574 790 796 802 808
814 1030 1036 1042 1048 1054 1268 1274 1280 1286 1292 1508 1514 1520
1526 1532 1748 1754 1760 1766 1772 1988 1994 2000 2006 2012
.LSDQ 340 346 352 358 364 580 586 592 598 604 820 826 832 838
844 1060 1066 1072 1078 1082 1298 1304 1310 1316 1322 1538 1544 1550
1556 1562 1778 1784 1790 1796 1802 2018 2024 2030 2036 2042
.LSKCN 120 122 124 126 128 130 132 134 136 138 140 142 144 146
148 150
.LSMIN 400 406 412 418 424 430 436 442 448 454 460 466 472 478
484 490 496 502 508 514 520 526 532 538 544 550 556 562
568 574 580 586 592 598 604 610 616 622 628 634
.LXNOR 1838 1844 1850 1856 1862 1868 1874 1880 1886 1892 1898 1904 1910 1916
1922 1928 1934 1940 1946 1952 1958 1964 1970 1976 1982 1988 1994 2000
2006 2012 2018 2024 2030 2036 2042 2048 2054 2060 2066 2072
.LXOR 1598 1604 1610 1616 1622 1628 1634 1640 1646 1652 1658 1664 1670 1676
1682 1688 1694 1700 1706 1712 1718 1724 1730 1736 1742 1748 1754 1760
1766 1772 1778 1784 1790 1796 1802 1808 1814 1820 1826 1832
.MA 166 172 178 184 190 196 202 208 214 220 226 232 238 244
250 256 262 268 274 280 286 292 298 304 310 316 322 328
334 340 346 352 358 364 370 376 382 388 394 400 406 412
418 424 430 436 442 448 454 460 466 472 478 484 490 496
502 508 514 520 526 532 538 544 550 556 562 568 574 580
586 592 598 604 610 616 622 628 634 640 646 652 658 664
670 676 682 688 694 700 706 712 718 724 730 736 742 748
754 760 766 772 778 784 790 796 802 808 814 820 826 832
838 844 850 856 862 868 874 880 886 892 898 904 910 916
922 928 934 940 946 952 958 964 970 976 982 988 994 1000
1006 1012 1018 1024 1030 1036 1042 1048 1054 1060 1066 1072 1078 1082 SEQ 1160
1088 1094 1100 1106 1112 1118 1124 1130 1136 1142 1148 1154 1160 1166
1172 1178 1184 1190 1196 1202 1208 1214 1220 1226 1232 1238 1244 1250
1256 1262 1268 1274 1280 1286 1292 1298 1304 1310 1316 1322 1328 1334
1340 1346 1352 1358 1364 1370 1376 1382 1388 1394 1400 1406 1412 1418
1424 1430 1436 1442 1448 1454 1460 1466 1472 1478 1484 1490 1496 1502
1508 1514 1520 1526 1532 1538 1544 1550 1556 1562 1568 1574 1580 1586
1592 1598 1604 1610 1616 1622 1628 1634 1640 1646 1652 1658 1664 1670
1676 1682 1688 1694 1700 1706 1712 1718 1724 1730 1736 1742 1748 1754
1760 1766 1772 1778 1784 1790 1796 1802 1808 1814 1820 1826 1832 1838
1844 1850 1856 1862 1868 1874 1880 1886 1892 1898 1904 1910 1916 1922
1928 1934 1940 1946 1952 1958 1964 1970 1976 1982 1988 1994 2000 2006
2012 2018 2024 2030 2036 2042 2048 2054 2060 2066 2072
.MAND 115 1118 1124 1130 1136 1142 1148 1154 1160 1166 1172 1178 1184 1190
1196 1202 1208 1214 1220 1226 1232 1238 1244 1250 1256 1262 1268 1274
1280 1286 1292 1298 1304 1310 1316 1322 1328 1334 1340 1346 1352
.MB 115 120 122 124 126 128 130 132 134 136 138 140 142 144
146 148 150 160 166 172 178 184 190 196 202 208 214 220
226 232 238 244 250 256 262 268 274 280 286 292 298 304
310 316 322 328 334 340 346 352 358 364 370 376 382 388
394 400 406 412 418 424 430 436 442 448 454 460 466 472
478 484 490 496 502 508 514 520 526 532 538 544 550 556
562 568 574 580 586 592 598 604 610 616 622 628 634 640
646 652 658 664 670 676 682 688 694 700 706 712 718 724
730 736 742 748 754 760 766 772 778 784 790 796 802 808
814 820 826 832 838 844 850 856 862 868 874 880 886 892
898 904 910 916 922 928 934 940 946 952 958 964 970 976
982 988 994 1000 1006 1012 1018 1024 1030 1036 1042 1048 1054 1060
1066 1072 1078 1082 1088 1094 1100 1106 1112 1118 1124 1130 1136 1142
1148 1154 1160 1166 1172 1178 1184 1190 1196 1202 1208 1214 1220 1226
1232 1238 1244 1250 1256 1262 1268 1274 1280 1286 1292 1298 1304 1310
1316 1322 1328 1334 1340 1346 1352 1358 1364 1370 1376 1382 1388 1394
1400 1406 1412 1418 1424 1430 1436 1442 1448 1454 1460 1466 1472 1478
1484 1490 1496 1502 1508 1514 1520 1526 1532 1538 1544 1550 1556 1562
1568 1574 1580 1586 1592 1598 1604 1610 1616 1622 1628 1634 1640 1646
1652 1658 1664 1670 1676 1682 1688 1694 1700 1706 1712 1718 1724 1730
1736 1742 1748 1754 1760 1766 1772 1778 1784 1790 1796 1802 1808 1814
1820 1826 1832 1838 1844 1850 1856 1862 1868 1874 1880 1886 1892 1898
1904 1910 1916 1922 1928 1934 1940 1946 1952 1958 1964 1970 1976 1982
1988 1994 2000 2006 2012 2018 2024 2030 2036 2042 2048 2054 2060 2066
2072
.MBAD 2081 2086
.MCCFZ 162 168 174 180 186 192 198 204 210 216 222 228 234 240
246 252 258 264 270 276 282 288 294 300 306 312 318 324
330 336 342 348 354 360 366 372 378 384 390 396 402 408
414 420 426 432 438 444 450 456 462 468 474 480 486 492
498 504 510 516 522 528 534 540 546 552 558 564 570 576
582 588 594 600 606 612 618 624 630 636 642 648 654 660
666 672 678 684 690 696 702 708 714 720 726 732 738 744
750 756 762 768 774 780 786 792 798 804 810 816 822 828
834 840 846 852 858 864 870 876 882 888 894 900 906 912
918 924 930 936 942 948 954 960 966 972 978 984 990 996
1002 1008 1014 1020 1026 1032 1038 1044 1050 1056 1062 1068 1074 1080
1084 1090 1096 1102 1108 1114 1120 1126 1132 1138 1144 1150 1156 1162 SEQ 1161
1168 1174 1180 1186 1192 1198 1204 1210 1216 1222 1228 1234 1240 1246
1252 1258 1264 1270 1276 1282 1288 1294 1300 1306 1312 1318 1324 1330
1336 1342 1348 1354 1360 1366 1372 1378 1384 1390 1396 1402 1408 1414
1420 1426 1432 1438 1444 1450 1456 1462 1468 1474 1480 1486 1492 1498
1504 1510 1516 1522 1528 1534 1540 1546 1552 1558 1564 1570 1576 1582
1588 1594 1600 1606 1612 1618 1624 1630 1636 1642 1648 1654 1660 1666
1672 1678 1684 1690 1696 1702 1708 1714 1720 1726 1732 1738 1744 1750
1756 1762 1768 1774 1780 1786 1792 1798 1804 1810 1816 1822 1828 1834
1840 1846 1852 1858 1864 1870 1876 1882 1888 1894 1900 1906 1912 1918
1924 1930 1936 1942 1948 1954 1960 1966 1972 1978 1984 1990 1996 2002
2008 2014 2020 2026 2032 2038 2044 2050 2056 2062 2068 2074
.MCENA 162 168 174 180 186 192 198 204 210 216 222 228 234 240
246 252 258 264 270 276 282 288 294 300 306 312 318 324
330 336 342 348 354 360 366 372 378 384 390 396 402 408
414 420 426 432 438 444 450 456 462 468 474 480 486 492
498 504 510 516 522 528 534 540 546 552 558 564 570 576
582 588 594 600 606 612 618 624 630 636 642 648 654 660
666 672 678 684 690 696 702 708 714 720 726 732 738 744
750 756 762 768 774 780 786 792 798 804 810 816 822 828
834 840 846 852 858 864 870 876 882 888 894 900 906 912
918 924 930 936 942 948 954 960 966 972 978 984 990 996
1002 1008 1014 1020 1026 1032 1038 1044 1050 1056 1062 1068 1074 1080
1084 1090 1096 1102 1108 1114 1120 1126 1132 1138 1144 1150 1156 1162
1168 1174 1180 1186 1192 1198 1204 1210 1216 1222 1228 1234 1240 1246
1252 1258 1264 1270 1276 1282 1288 1294 1300 1306 1312 1318 1324 1330
1336 1342 1348 1354 1360 1366 1372 1378 1384 1390 1396 1402 1408 1414
1420 1426 1432 1438 1444 1450 1456 1462 1468 1474 1480 1486 1492 1498
1504 1510 1516 1522 1528 1534 1540 1546 1552 1558 1564 1570 1576 1582
1588 1594 1600 1606 1612 1618 1624 1630 1636 1642 1648 1654 1660 1666
1672 1678 1684 1690 1696 1702 1708 1714 1720 1726 1732 1738 1744 1750
1756 1762 1768 1774 1780 1786 1792 1798 1804 1810 1816 1822 1828 1834
1840 1846 1852 1858 1864 1870 1876 1882 1888 1894 1900 1906 1912 1918
1924 1930 1936 1942 1948 1954 1960 1966 1972 1978 1984 1990 1996 2002
2008 2014 2020 2026 2032 2038 2044 2050 2056 2062 2068 2074
.MCJV 162 168 174 180 186 192 198 204 210 216 222 228 234 240
246 252 258 264 270 276 282 288 294 300 306 312 318 324
330 336 342 348 354 360 366 372 378 384 390 396 402 408
414 420 426 432 438 444 450 456 462 468 474 480 486 492
498 504 510 516 522 528 534 540 546 552 558 564 570 576
582 588 594 600 606 612 618 624 630 636 642 648 654 660
666 672 678 684 690 696 702 708 714 720 726 732 738 744
750 756 762 768 774 780 786 792 798 804 810 816 822 828
834 840 846 852 858 864 870 876 882 888 894 900 906 912
918 924 930 936 942 948 954 960 966 972 978 984 990 996
1002 1008 1014 1020 1026 1032 1038 1044 1050 1056 1062 1068 1074 1080
1084 1090 1096 1102 1108 1114 1120 1126 1132 1138 1144 1150 1156 1162
1168 1174 1180 1186 1192 1198 1204 1210 1216 1222 1228 1234 1240 1246
1252 1258 1264 1270 1276 1282 1288 1294 1300 1306 1312 1318 1324 1330
1336 1342 1348 1354 1360 1366 1372 1378 1384 1390 1396 1402 1408 1414
1420 1426 1432 1438 1444 1450 1456 1462 1468 1474 1480 1486 1492 1498
1504 1510 1516 1522 1528 1534 1540 1546 1552 1558 1564 1570 1576 1582
1588 1594 1600 1606 1612 1618 1624 1630 1636 1642 1648 1654 1660 1666
1672 1678 1684 1690 1696 1702 1708 1714 1720 1726 1732 1738 1744 1750 SEQ 1162
1756 1762 1768 1774 1780 1786 1792 1798 1804 1810 1816 1822 1828 1834
1840 1846 1852 1858 1864 1870 1876 1882 1888 1894 1900 1906 1912 1918
1924 1930 1936 1942 1948 1954 1960 1966 1972 1978 1984 1990 1996 2002
2008 2014 2020 2026 2032 2038 2044 2050 2056 2062 2068 2074
.MCONT 120 122 124 126 128 130 132 134 136 138 140 142 144 146
148 150 160 166 172 178 184 190 196 202 208 214 220 226
232 238 244 250 256 262 268 274 280 286 292 298 304 310
316 322 328 334 340 346 352 358 364 370 376 382 388 394
400 406 412 418 424 430 436 442 448 454 460 466 472 478
484 490 496 502 508 514 520 526 532 538 544 550 556 562
568 574 580 586 592 598 604 610 616 622 628 634 640 646
652 658 664 670 676 682 688 694 700 706 712 718 724 730
736 742 748 754 760 766 772 778 784 790 796 802 808 814
820 826 832 838 844 850 856 862 868 874 880 886 892 898
904 910 916 922 928 934 940 946 952 958 964 970 976 982
988 994 1000 1006 1012 1018 1024 1030 1036 1042 1048 1054 1060 1066
1072 1078 1082 1088 1094 1100 1106 1112 1118 1124 1130 1136 1142 1148
1154 1160 1166 1172 1178 1184 1190 1196 1202 1208 1214 1220 1226 1232
1238 1244 1250 1256 1262 1268 1274 1280 1286 1292 1298 1304 1310 1316
1322 1328 1334 1340 1346 1352 1358 1364 1370 1376 1382 1388 1394 1400
1406 1412 1418 1424 1430 1436 1442 1448 1454 1460 1466 1472 1478 1484
1490 1496 1502 1508 1514 1520 1526 1532 1538 1544 1550 1556 1562 1568
1574 1580 1586 1592 1598 1604 1610 1616 1622 1628 1634 1640 1646 1652
1658 1664 1670 1676 1682 1688 1694 1700 1706 1712 1718 1724 1730 1736
1742 1748 1754 1760 1766 1772 1778 1784 1790 1796 1802 1808 1814 1820
1826 1832 1838 1844 1850 1856 1862 1868 1874 1880 1886 1892 1898 1904
1910 1916 1922 1928 1934 1940 1946 1952 1958 1964 1970 1976 1982 1988
1994 2000 2006 2012 2018 2024 2030 2036 2042 2048 2054 2060 2066 2072
.MD 115 120 122 124 126 128 130 132 134 136 138 140 142 144
146 148 150 152 160 162 166 168 172 174 178 180 184 186
190 192 196 198 202 204 208 210 214 216 220 222 226 228
232 234 238 240 244 246 250 252 256 258 262 264 268 270
274 276 280 282 286 288 292 294 298 300 304 306 310 312
316 318 322 324 328 330 334 336 340 342 346 348 352 354
358 360 364 366 370 372 376 378 382 384 388 390 394 396
400 402 406 408 412 414 418 420 424 426 430 432 436 438
442 444 448 450 454 456 460 462 466 468 472 474 478 480
484 486 490 492 496 498 502 504 508 510 514 516 520 522
526 528 532 534 538 540 544 546 550 552 556 558 562 564
568 570 574 576 580 582 586 588 592 594 598 600 604 606
610 612 616 618 622 624 628 630 634 636 640 642 646 648
652 654 658 660 664 666 670 672 676 678 682 684 688 690
694 696 700 702 706 708 712 714 718 720 724 726 730 732
736 738 742 744 748 750 754 756 760 762 766 768 772 774
778 780 784 786 790 792 796 798 802 804 808 810 814 816
820 822 826 828 832 834 838 840 844 846 850 852 856 858
862 864 868 870 874 876 880 882 886 888 892 894 898 900
904 906 910 912 916 918 922 924 928 930 934 936 940 942
946 948 952 954 958 960 964 966 970 972 976 978 982 984
988 990 994 996 1000 1002 1006 1008 1012 1014 1018 1020 1024 1026
1030 1032 1036 1038 1042 1044 1048 1050 1054 1056 1060 1062 1066 1068
1072 1074 1078 1080 1082 1084 1088 1090 1094 1096 1100 1102 1106 1108
1112 1114 1118 1120 1124 1126 1130 1132 1136 1138 1142 1144 1148 1150 SEQ 1163
1154 1156 1160 1162 1166 1168 1172 1174 1178 1180 1184 1186 1190 1192
1196 1198 1202 1204 1208 1210 1214 1216 1220 1222 1226 1228 1232 1234
1238 1240 1244 1246 1250 1252 1256 1258 1262 1264 1268 1270 1274 1276
1280 1282 1286 1288 1292 1294 1298 1300 1304 1306 1310 1312 1316 1318
1322 1324 1328 1330 1334 1336 1340 1342 1346 1348 1352 1354 1358 1360
1364 1366 1370 1372 1376 1378 1382 1384 1388 1390 1394 1396 1400 1402
1406 1408 1412 1414 1418 1420 1424 1426 1430 1432 1436 1438 1442 1444
1448 1450 1454 1456 1460 1462 1466 1468 1472 1474 1478 1480 1484 1486
1490 1492 1496 1498 1502 1504 1508 1510 1514 1516 1520 1522 1526 1528
1532 1534 1538 1540 1544 1546 1550 1552 1556 1558 1562 1564 1568 1570
1574 1576 1580 1582 1586 1588 1592 1594 1598 1600 1604 1606 1610 1612
1616 1618 1622 1624 1628 1630 1634 1636 1640 1642 1646 1648 1652 1654
1658 1660 1664 1666 1670 1672 1676 1678 1682 1684 1688 1690 1694 1696
1700 1702 1706 1708 1712 1714 1718 1720 1724 1726 1730 1732 1736 1738
1742 1744 1748 1750 1754 1756 1760 1762 1766 1768 1772 1774 1778 1780
1784 1786 1790 1792 1796 1798 1802 1804 1808 1810 1814 1816 1820 1822
1826 1828 1832 1834 1838 1840 1844 1846 1850 1852 1856 1858 1862 1864
1868 1870 1874 1876 1880 1882 1886 1888 1892 1894 1898 1900 1904 1906
1910 1912 1916 1918 1922 1924 1928 1930 1934 1936 1940 1942 1946 1948
1952 1954 1958 1960 1964 1966 1970 1972 1976 1978 1982 1984 1988 1990
1994 1996 2000 2002 2006 2008 2012 2014 2018 2020 2024 2026 2030 2032
2036 2038 2042 2044 2048 2050 2054 2056 2060 2062 2066 2068 2072 2074
.MJ 115 152 162 164 168 170 174 176 180 182 186 188 192 194
198 200 204 206 210 212 216 218 222 224 228 230 234 236
240 242 246 248 252 254 258 260 264 266 270 272 276 278
282 284 288 290 294 296 300 302 306 308 312 314 318 320
324 326 330 332 336 338 342 344 348 350 354 356 360 362
366 368 372 374 378 380 384 386 390 392 396 398 402 404
408 410 414 416 420 422 426 428 432 434 438 440 444 446
450 452 456 458 462 464 468 470 474 476 480 482 486 488
492 494 498 500 504 506 510 512 516 518 522 524 528 530
534 536 540 542 546 548 552 554 558 560 564 566 570 572
576 578 582 584 588 590 594 596 600 602 606 608 612 614
618 620 624 626 630 632 636 638 642 644 648 650 654 656
660 662 666 668 672 674 678 680 684 686 690 692 696 698
702 704 708 710 714 716 720 722 726 728 732 734 738 740
744 746 750 752 756 758 762 764 768 770 774 776 780 782
786 788 792 794 798 800 804 806 810 812 816 818 822 824
828 830 834 836 840 842 846 848 852 854 858 860 864 866
870 872 876 878 882 884 888 890 894 896 900 902 906 908
912 914 918 920 924 926 930 932 936 938 942 944 948 950
954 956 960 962 966 968 972 974 978 980 984 986 990 992
996 998 1002 1004 1008 1010 1014 1016 1020 1022 1026 1028 1032 1034
1038 1040 1044 1046 1050 1052 1056 1058 1062 1064 1068 1070 1074 1076
1080 1084 1086 1090 1092 1096 1098 1102 1104 1108 1110 1114 1116 1120
1122 1126 1128 1132 1134 1138 1140 1144 1146 1150 1152 1156 1158 1162
1164 1168 1170 1174 1176 1180 1182 1186 1188 1192 1194 1198 1200 1204
1206 1210 1212 1216 1218 1222 1224 1228 1230 1234 1236 1240 1242 1246
1248 1252 1254 1258 1260 1264 1266 1270 1272 1276 1278 1282 1284 1288
1290 1294 1296 1300 1302 1306 1308 1312 1314 1318 1320 1324 1326 1330
1332 1336 1338 1342 1344 1348 1350 1354 1356 1360 1362 1366 1368 1372
1374 1378 1380 1384 1386 1390 1392 1396 1398 1402 1404 1408 1410 1414
1416 1420 1422 1426 1428 1432 1434 1438 1440 1444 1446 1450 1452 1456 SEQ 1164
1458 1462 1464 1468 1470 1474 1476 1480 1482 1486 1488 1492 1494 1498
1500 1504 1506 1510 1512 1516 1518 1522 1524 1528 1530 1534 1536 1540
1542 1546 1548 1552 1554 1558 1560 1564 1566 1570 1572 1576 1578 1582
1584 1588 1590 1594 1596 1600 1602 1606 1608 1612 1614 1618 1620 1624
1626 1630 1632 1636 1638 1642 1644 1648 1650 1654 1656 1660 1662 1666
1668 1672 1674 1678 1680 1684 1686 1690 1692 1696 1698 1702 1704 1708
1710 1714 1716 1720 1722 1726 1728 1732 1734 1738 1740 1744 1746 1750
1752 1756 1758 1762 1764 1768 1770 1774 1776 1780 1782 1786 1788 1792
1794 1798 1800 1804 1806 1810 1812 1816 1818 1822 1824 1828 1830 1834
1836 1840 1842 1846 1848 1852 1854 1858 1860 1864 1866 1870 1872 1876
1878 1882 1884 1888 1890 1894 1896 1900 1902 1906 1908 1912 1914 1918
1920 1924 1926 1930 1932 1936 1938 1942 1944 1948 1950 1954 1956 1960
1962 1966 1968 1972 1974 1978 1980 1984 1986 1990 1992 1996 1998 2002
2004 2008 2010 2014 2016 2020 2022 2026 2028 2032 2034 2038 2040 2044
2046 2050 2052 2056 2058 2062 2064 2068 2070 2074 2076 2081 2086
.MJMAP 115 152 164 170 176 182 188 194 200 206 212 218 224 230
236 242 248 254 260 266 272 278 284 290 296 302 308 314
320 326 332 338 344 350 356 362 368 374 380 386 392 398
404 410 416 422 428 434 440 446 452 458 464 470 476 482
488 494 500 506 512 518 524 530 536 542 548 554 560 566
572 578 584 590 596 602 608 614 620 626 632 638 644 650
656 662 668 674 680 686 692 698 704 710 716 722 728 734
740 746 752 758 764 770 776 782 788 794 800 806 812 818
824 830 836 842 848 854 860 866 872 878 884 890 896 902
908 914 920 926 932 938 944 950 956 962 968 974 980 986
992 998 1004 1010 1016 1022 1028 1034 1040 1046 1052 1058 1064 1070
1076 1086 1092 1098 1104 1110 1116 1122 1128 1134 1140 1146 1152 1158
1164 1170 1176 1182 1188 1194 1200 1206 1212 1218 1224 1230 1236 1242
1248 1254 1260 1266 1272 1278 1284 1290 1296 1302 1308 1314 1320 1326
1332 1338 1344 1350 1356 1362 1368 1374 1380 1386 1392 1398 1404 1410
1416 1422 1428 1434 1440 1446 1452 1458 1464 1470 1476 1482 1488 1494
1500 1506 1512 1518 1524 1530 1536 1542 1548 1554 1560 1566 1572 1578
1584 1590 1596 1602 1608 1614 1620 1626 1632 1638 1644 1650 1656 1662
1668 1674 1680 1686 1692 1698 1704 1710 1716 1722 1728 1734 1740 1746
1752 1758 1764 1770 1776 1782 1788 1794 1800 1806 1812 1818 1824 1830
1836 1842 1848 1854 1860 1866 1872 1878 1884 1890 1896 1902 1908 1914
1920 1926 1932 1938 1944 1950 1956 1962 1968 1974 1980 1986 1992 1998
2004 2010 2016 2022 2028 2034 2040 2046 2052 2058 2064 2070 2076 2081
2086
.MMGC 120 122 124 126 128 130 132 134 136 138 140 142 144 146
148 150
.MNAND 1358 1364 1370 1376 1382 1388 1394 1400 1406 1412 1418 1424 1430 1436
1442 1448 1454 1460 1466 1472 1478 1484 1490 1496 1502 1508 1514 1520
1526 1532 1538 1544 1550 1556 1562 1568 1574 1580 1586 1592
.MOR 120 122 124 126 128 130 132 134 136 138 140 142 144 146
148 150 162 168 174 180 186 192 198 204 210 216 222 228
234 240 246 252 258 264 270 276 282 288 294 300 306 312
318 324 330 336 342 348 354 360 366 372 378 384 390 396
402 408 414 420 426 432 438 444 450 456 462 468 474 480
486 492 498 504 510 516 522 528 534 540 546 552 558 564
570 576 582 588 594 600 606 612 618 624 630 636 642 648
654 660 666 672 678 684 690 696 702 708 714 720 726 732
738 744 750 756 762 768 774 780 786 792 798 804 810 816 SEQ 1165
822 828 834 840 846 852 858 864 870 876 880 882 886 888
892 894 898 900 904 906 910 912 916 918 922 924 928 930
934 936 940 942 946 948 952 954 958 960 964 966 970 972
976 978 982 984 988 990 994 996 1000 1002 1006 1008 1012 1014
1018 1020 1024 1026 1030 1032 1036 1038 1042 1044 1048 1050 1054 1056
1060 1062 1066 1068 1072 1074 1078 1080 1082 1084 1088 1090 1094 1096
1100 1102 1106 1108 1112 1114 1120 1126 1132 1138 1144 1150 1156 1162
1168 1174 1180 1186 1192 1198 1204 1210 1216 1222 1228 1234 1240 1246
1252 1258 1264 1270 1276 1282 1288 1294 1300 1306 1312 1318 1324 1330
1336 1342 1348 1354 1360 1366 1372 1378 1384 1390 1396 1402 1408 1414
1420 1426 1432 1438 1444 1450 1456 1462 1468 1474 1480 1486 1492 1498
1504 1510 1516 1522 1528 1534 1540 1546 1552 1558 1564 1570 1576 1582
1588 1594 1600 1606 1612 1618 1624 1630 1636 1642 1648 1654 1660 1666
1672 1678 1684 1690 1696 1702 1708 1714 1720 1726 1732 1738 1744 1750
1756 1762 1768 1774 1780 1786 1792 1798 1804 1810 1816 1822 1828 1834
1840 1846 1852 1858 1864 1870 1876 1882 1888 1894 1900 1906 1912 1918
1924 1930 1936 1942 1948 1954 1960 1966 1972 1978 1984 1990 1996 2002
2008 2014 2020 2026 2032 2038 2044 2050 2056 2062 2068 2074
.MPLUS 160 166 172 178 184 190 196 202 208 214 220 226 232 238
244 250 256 262 268 274 280 286 292 298 304 310 316 322
328 334 340 346 352 358 364 370 376 382 388 394
.MRMIN 640 646 652 658 664 670 676 682 688 694 700 706 712 718
724 730 736 742 748 754 760 766 772 778 784 790 796 802
808 814 820 826 832 838 844 850 856 862 868 874
.MS0A 280 286 292 298 304 520 526 532 538 544 760 766 772 778
784 1000 1006 1012 1018 1024 1238 1244 1250 1256 1262 1478 1484 1490
1496 1502 1718 1724 1730 1736 1742 1958 1964 1970 1976 1982
.MS0B 250 256 262 268 274 490 496 502 508 514 730 736 742 748
754 970 976 982 988 994 1208 1214 1220 1226 1232 1448 1454 1460
1466 1472 1688 1694 1700 1706 1712 1928 1934 1940 1946 1952
.MS0Q 162 168 174 180 186 192 198 204 210 216 220 222 226 228
232 234 238 240 244 246 252 258 264 270 276 282 288 294
300 306 312 318 324 330 336 342 348 354 360 366 372 378
384 390 396 402 408 414 420 426 432 438 444 450 456 460
462 466 468 472 474 478 480 484 486 492 498 504 510 516
522 528 534 540 546 552 558 564 570 576 582 588 594 600
606 612 618 624 630 636 642 648 654 660 666 672 678 684
690 696 700 702 706 708 712 714 718 720 724 726 732 738
744 750 756 762 768 774 780 786 792 798 804 810 816 822
828 834 840 846 852 858 864 870 876 882 888 894 900 906
912 918 924 930 936 940 942 946 948 952 954 958 960 964
966 972 978 984 990 996 1002 1008 1014 1020 1026 1032 1038 1044
1050 1056 1062 1068 1074 1080 1084 1090 1096 1102 1108 1114 1120 1126
1132 1138 1144 1150 1156 1162 1168 1174 1178 1180 1184 1186 1190 1192
1196 1198 1202 1204 1210 1216 1222 1228 1234 1240 1246 1252 1258 1264
1270 1276 1282 1288 1294 1300 1306 1312 1318 1324 1330 1336 1342 1348
1354 1360 1366 1372 1378 1384 1390 1396 1402 1408 1414 1418 1420 1424
1426 1430 1432 1436 1438 1442 1444 1450 1456 1462 1468 1474 1480 1486
1492 1498 1504 1510 1516 1522 1528 1534 1540 1546 1552 1558 1564 1570
1576 1582 1588 1594 1600 1606 1612 1618 1624 1630 1636 1642 1648 1654
1658 1660 1664 1666 1670 1672 1676 1678 1682 1684 1690 1696 1702 1708
1714 1720 1726 1732 1738 1744 1750 1756 1762 1768 1774 1780 1786 1792
1798 1804 1810 1816 1822 1828 1834 1840 1846 1852 1858 1864 1870 1876 SEQ 1166
1882 1888 1894 1898 1900 1904 1906 1910 1912 1916 1918 1922 1924 1930
1936 1942 1948 1954 1960 1966 1972 1978 1984 1990 1996 2002 2008 2014
2020 2026 2032 2038 2044 2050 2056 2062 2068 2074
.MSAB 190 196 202 208 214 430 436 442 448 454 670 676 682 688
694 910 916 922 928 934 1148 1154 1160 1166 1172 1388 1394 1400
1406 1412 1628 1634 1640 1646 1652 1868 1874 1880 1886 1892
.MSAQ 160 166 172 178 184 400 406 412 418 424 640 646 652 658
664 880 886 892 898 904 1118 1124 1130 1136 1142 1358 1364 1370
1376 1382 1598 1604 1610 1616 1622 1838 1844 1850 1856 1862
.MSD0 115 120 122 124 126 128 130 132 134 136 138 140 142 144
146 148 150 370 376 382 388 394 610 616 622 628 634 850
856 862 868 874 1088 1094 1100 1106 1112 1328 1334 1340 1346 1352
1568 1574 1580 1586 1592 1808 1814 1820 1826 1832 2048 2054 2060 2066
2072
.MSDA 310 316 322 328 334 550 556 562 568 574 790 796 802 808
814 1030 1036 1042 1048 1054 1268 1274 1280 1286 1292 1508 1514 1520
1526 1532 1748 1754 1760 1766 1772 1988 1994 2000 2006 2012
.MSDQ 340 346 352 358 364 580 586 592 598 604 820 826 832 838
844 1060 1066 1072 1078 1082 1298 1304 1310 1316 1322 1538 1544 1550
1556 1562 1778 1784 1790 1796 1802 2018 2024 2030 2036 2042
.MSKCN 120 122 124 126 128 130 132 134 136 138 140 142 144 146
148 150
.MSMIN 400 406 412 418 424 430 436 442 448 454 460 466 472 478
484 490 496 502 508 514 520 526 532 538 544 550 556 562
568 574 580 586 592 598 604 610 616 622 628 634
.MXNOR 1838 1844 1850 1856 1862 1868 1874 1880 1886 1892 1898 1904 1910 1916
1922 1928 1934 1940 1946 1952 1958 1964 1970 1976 1982 1988 1994 2000
2006 2012 2018 2024 2030 2036 2042 2048 2054 2060 2066 2072
.MXOR 1598 1604 1610 1616 1622 1628 1634 1640 1646 1652 1658 1664 1670 1676
1682 1688 1694 1700 1706 1712 1718 1724 1730 1736 1742 1748 1754 1760
1766 1772 1778 1784 1790 1796 1802 1808 1814 1820 1826 1832
.RA 166 172 178 184 190 196 202 208 214 220 226 232 238 244
250 256 262 268 274 280 286 292 298 304 310 316 322 328
334 340 346 352 358 364 370 376 382 388 394 400 406 412
418 424 430 436 442 448 454 460 466 472 478 484 490 496
502 508 514 520 526 532 538 544 550 556 562 568 574 580
586 592 598 604 610 616 622 628 634 640 646 652 658 664
670 676 682 688 694 700 706 712 718 724 730 736 742 748
754 760 766 772 778 784 790 796 802 808 814 820 826 832
838 844 850 856 862 868 874 880 886 892 898 904 910 916
922 928 934 940 946 952 958 964 970 976 982 988 994 1000
1006 1012 1018 1024 1030 1036 1042 1048 1054 1060 1066 1072 1078 1082
1088 1094 1100 1106 1112 1118 1124 1130 1136 1142 1148 1154 1160 1166
1172 1178 1184 1190 1196 1202 1208 1214 1220 1226 1232 1238 1244 1250
1256 1262 1268 1274 1280 1286 1292 1298 1304 1310 1316 1322 1328 1334
1340 1346 1352 1358 1364 1370 1376 1382 1388 1394 1400 1406 1412 1418
1424 1430 1436 1442 1448 1454 1460 1466 1472 1478 1484 1490 1496 1502
1508 1514 1520 1526 1532 1538 1544 1550 1556 1562 1568 1574 1580 1586
1592 1598 1604 1610 1616 1622 1628 1634 1640 1646 1652 1658 1664 1670
1676 1682 1688 1694 1700 1706 1712 1718 1724 1730 1736 1742 1748 1754
1760 1766 1772 1778 1784 1790 1796 1802 1808 1814 1820 1826 1832 1838
1844 1850 1856 1862 1868 1874 1880 1886 1892 1898 1904 1910 1916 1922
1928 1934 1940 1946 1952 1958 1964 1970 1976 1982 1988 1994 2000 2006 SEQ 1167
2012 2018 2024 2030 2036 2042 2048 2054 2060 2066 2072
.RAND 115 1118 1124 1130 1136 1142 1148 1154 1160 1166 1172 1178 1184 1190
1196 1202 1208 1214 1220 1226 1232 1238 1244 1250 1256 1262 1268 1274
1280 1286 1292 1298 1304 1310 1316 1322 1328 1334 1340 1346 1352
.RB 115 120 122 124 126 128 130 132 134 136 138 140 142 144
146 148 150 160 166 172 178 184 190 196 202 208 214 220
226 232 238 244 250 256 262 268 274 280 286 292 298 304
310 316 322 328 334 340 346 352 358 364 370 376 382 388
394 400 406 412 418 424 430 436 442 448 454 460 466 472
478 484 490 496 502 508 514 520 526 532 538 544 550 556
562 568 574 580 586 592 598 604 610 616 622 628 634 640
646 652 658 664 670 676 682 688 694 700 706 712 718 724
730 736 742 748 754 760 766 772 778 784 790 796 802 808
814 820 826 832 838 844 850 856 862 868 874 880 886 892
898 904 910 916 922 928 934 940 946 952 958 964 970 976
982 988 994 1000 1006 1012 1018 1024 1030 1036 1042 1048 1054 1060
1066 1072 1078 1082 1088 1094 1100 1106 1112 1118 1124 1130 1136 1142
1148 1154 1160 1166 1172 1178 1184 1190 1196 1202 1208 1214 1220 1226
1232 1238 1244 1250 1256 1262 1268 1274 1280 1286 1292 1298 1304 1310
1316 1322 1328 1334 1340 1346 1352 1358 1364 1370 1376 1382 1388 1394
1400 1406 1412 1418 1424 1430 1436 1442 1448 1454 1460 1466 1472 1478
1484 1490 1496 1502 1508 1514 1520 1526 1532 1538 1544 1550 1556 1562
1568 1574 1580 1586 1592 1598 1604 1610 1616 1622 1628 1634 1640 1646
1652 1658 1664 1670 1676 1682 1688 1694 1700 1706 1712 1718 1724 1730
1736 1742 1748 1754 1760 1766 1772 1778 1784 1790 1796 1802 1808 1814
1820 1826 1832 1838 1844 1850 1856 1862 1868 1874 1880 1886 1892 1898
1904 1910 1916 1922 1928 1934 1940 1946 1952 1958 1964 1970 1976 1982
1988 1994 2000 2006 2012 2018 2024 2030 2036 2042 2048 2054 2060 2066
2072
.RBAD 2081 2086
.RCCFZ 162 168 174 180 186 192 198 204 210 216 222 228 234 240
246 252 258 264 270 276 282 288 294 300 306 312 318 324
330 336 342 348 354 360 366 372 378 384 390 396 402 408
414 420 426 432 438 444 450 456 462 468 474 480 486 492
498 504 510 516 522 528 534 540 546 552 558 564 570 576
582 588 594 600 606 612 618 624 630 636 642 648 654 660
666 672 678 684 690 696 702 708 714 720 726 732 738 744
750 756 762 768 774 780 786 792 798 804 810 816 822 828
834 840 846 852 858 864 870 876 882 888 894 900 906 912
918 924 930 936 942 948 954 960 966 972 978 984 990 996
1002 1008 1014 1020 1026 1032 1038 1044 1050 1056 1062 1068 1074 1080
1084 1090 1096 1102 1108 1114 1120 1126 1132 1138 1144 1150 1156 1162
1168 1174 1180 1186 1192 1198 1204 1210 1216 1222 1228 1234 1240 1246
1252 1258 1264 1270 1276 1282 1288 1294 1300 1306 1312 1318 1324 1330
1336 1342 1348 1354 1360 1366 1372 1378 1384 1390 1396 1402 1408 1414
1420 1426 1432 1438 1444 1450 1456 1462 1468 1474 1480 1486 1492 1498
1504 1510 1516 1522 1528 1534 1540 1546 1552 1558 1564 1570 1576 1582
1588 1594 1600 1606 1612 1618 1624 1630 1636 1642 1648 1654 1660 1666
1672 1678 1684 1690 1696 1702 1708 1714 1720 1726 1732 1738 1744 1750
1756 1762 1768 1774 1780 1786 1792 1798 1804 1810 1816 1822 1828 1834
1840 1846 1852 1858 1864 1870 1876 1882 1888 1894 1900 1906 1912 1918
1924 1930 1936 1942 1948 1954 1960 1966 1972 1978 1984 1990 1996 2002
2008 2014 2020 2026 2032 2038 2044 2050 2056 2062 2068 2074 SEQ 1168
.RCENA 162 168 174 180 186 192 198 204 210 216 222 228 234 240
246 252 258 264 270 276 282 288 294 300 306 312 318 324
330 336 342 348 354 360 366 372 378 384 390 396 402 408
414 420 426 432 438 444 450 456 462 468 474 480 486 492
498 504 510 516 522 528 534 540 546 552 558 564 570 576
582 588 594 600 606 612 618 624 630 636 642 648 654 660
666 672 678 684 690 696 702 708 714 720 726 732 738 744
750 756 762 768 774 780 786 792 798 804 810 816 822 828
834 840 846 852 858 864 870 876 882 888 894 900 906 912
918 924 930 936 942 948 954 960 966 972 978 984 990 996
1002 1008 1014 1020 1026 1032 1038 1044 1050 1056 1062 1068 1074 1080
1084 1090 1096 1102 1108 1114 1120 1126 1132 1138 1144 1150 1156 1162
1168 1174 1180 1186 1192 1198 1204 1210 1216 1222 1228 1234 1240 1246
1252 1258 1264 1270 1276 1282 1288 1294 1300 1306 1312 1318 1324 1330
1336 1342 1348 1354 1360 1366 1372 1378 1384 1390 1396 1402 1408 1414
1420 1426 1432 1438 1444 1450 1456 1462 1468 1474 1480 1486 1492 1498
1504 1510 1516 1522 1528 1534 1540 1546 1552 1558 1564 1570 1576 1582
1588 1594 1600 1606 1612 1618 1624 1630 1636 1642 1648 1654 1660 1666
1672 1678 1684 1690 1696 1702 1708 1714 1720 1726 1732 1738 1744 1750
1756 1762 1768 1774 1780 1786 1792 1798 1804 1810 1816 1822 1828 1834
1840 1846 1852 1858 1864 1870 1876 1882 1888 1894 1900 1906 1912 1918
1924 1930 1936 1942 1948 1954 1960 1966 1972 1978 1984 1990 1996 2002
2008 2014 2020 2026 2032 2038 2044 2050 2056 2062 2068 2074
.RCJV 162 168 174 180 186 192 198 204 210 216 222 228 234 240
246 252 258 264 270 276 282 288 294 300 306 312 318 324
330 336 342 348 354 360 366 372 378 384 390 396 402 408
414 420 426 432 438 444 450 456 462 468 474 480 486 492
498 504 510 516 522 528 534 540 546 552 558 564 570 576
582 588 594 600 606 612 618 624 630 636 642 648 654 660
666 672 678 684 690 696 702 708 714 720 726 732 738 744
750 756 762 768 774 780 786 792 798 804 810 816 822 828
834 840 846 852 858 864 870 876 882 888 894 900 906 912
918 924 930 936 942 948 954 960 966 972 978 984 990 996
1002 1008 1014 1020 1026 1032 1038 1044 1050 1056 1062 1068 1074 1080
1084 1090 1096 1102 1108 1114 1120 1126 1132 1138 1144 1150 1156 1162
1168 1174 1180 1186 1192 1198 1204 1210 1216 1222 1228 1234 1240 1246
1252 1258 1264 1270 1276 1282 1288 1294 1300 1306 1312 1318 1324 1330
1336 1342 1348 1354 1360 1366 1372 1378 1384 1390 1396 1402 1408 1414
1420 1426 1432 1438 1444 1450 1456 1462 1468 1474 1480 1486 1492 1498
1504 1510 1516 1522 1528 1534 1540 1546 1552 1558 1564 1570 1576 1582
1588 1594 1600 1606 1612 1618 1624 1630 1636 1642 1648 1654 1660 1666
1672 1678 1684 1690 1696 1702 1708 1714 1720 1726 1732 1738 1744 1750
1756 1762 1768 1774 1780 1786 1792 1798 1804 1810 1816 1822 1828 1834
1840 1846 1852 1858 1864 1870 1876 1882 1888 1894 1900 1906 1912 1918
1924 1930 1936 1942 1948 1954 1960 1966 1972 1978 1984 1990 1996 2002
2008 2014 2020 2026 2032 2038 2044 2050 2056 2062 2068 2074
.RCONT 120 122 124 126 128 130 132 134 136 138 140 142 144 146
148 150 160 166 172 178 184 190 196 202 208 214 220 226
232 238 244 250 256 262 268 274 280 286 292 298 304 310
316 322 328 334 340 346 352 358 364 370 376 382 388 394
400 406 412 418 424 430 436 442 448 454 460 466 472 478
484 490 496 502 508 514 520 526 532 538 544 550 556 562
568 574 580 586 592 598 604 610 616 622 628 634 640 646 SEQ 1169
652 658 664 670 676 682 688 694 700 706 712 718 724 730
736 742 748 754 760 766 772 778 784 790 796 802 808 814
820 826 832 838 844 850 856 862 868 874 880 886 892 898
904 910 916 922 928 934 940 946 952 958 964 970 976 982
988 994 1000 1006 1012 1018 1024 1030 1036 1042 1048 1054 1060 1066
1072 1078 1082 1088 1094 1100 1106 1112 1118 1124 1130 1136 1142 1148
1154 1160 1166 1172 1178 1184 1190 1196 1202 1208 1214 1220 1226 1232
1238 1244 1250 1256 1262 1268 1274 1280 1286 1292 1298 1304 1310 1316
1322 1328 1334 1340 1346 1352 1358 1364 1370 1376 1382 1388 1394 1400
1406 1412 1418 1424 1430 1436 1442 1448 1454 1460 1466 1472 1478 1484
1490 1496 1502 1508 1514 1520 1526 1532 1538 1544 1550 1556 1562 1568
1574 1580 1586 1592 1598 1604 1610 1616 1622 1628 1634 1640 1646 1652
1658 1664 1670 1676 1682 1688 1694 1700 1706 1712 1718 1724 1730 1736
1742 1748 1754 1760 1766 1772 1778 1784 1790 1796 1802 1808 1814 1820
1826 1832 1838 1844 1850 1856 1862 1868 1874 1880 1886 1892 1898 1904
1910 1916 1922 1928 1934 1940 1946 1952 1958 1964 1970 1976 1982 1988
1994 2000 2006 2012 2018 2024 2030 2036 2042 2048 2054 2060 2066 2072
.RD 115 120 122 124 126 128 130 132 134 136 138 140 142 144
146 148 150 152 160 162 166 168 172 174 178 180 184 186
190 192 196 198 202 204 208 210 214 216 220 222 226 228
232 234 238 240 244 246 250 252 256 258 262 264 268 270
274 276 280 282 286 288 292 294 298 300 304 306 310 312
316 318 322 324 328 330 334 336 340 342 346 348 352 354
358 360 364 366 370 372 376 378 382 384 388 390 394 396
400 402 406 408 412 414 418 420 424 426 430 432 436 438
442 444 448 450 454 456 460 462 466 468 472 474 478 480
484 486 490 492 496 498 502 504 508 510 514 516 520 522
526 528 532 534 538 540 544 546 550 552 556 558 562 564
568 570 574 576 580 582 586 588 592 594 598 600 604 606
610 612 616 618 622 624 628 630 634 636 640 642 646 648
652 654 658 660 664 666 670 672 676 678 682 684 688 690
694 696 700 702 706 708 712 714 718 720 724 726 730 732
736 738 742 744 748 750 754 756 760 762 766 768 772 774
778 780 784 786 790 792 796 798 802 804 808 810 814 816
820 822 826 828 832 834 838 840 844 846 850 852 856 858
862 864 868 870 874 876 880 882 886 888 892 894 898 900
904 906 910 912 916 918 922 924 928 930 934 936 940 942
946 948 952 954 958 960 964 966 970 972 976 978 982 984
988 990 994 996 1000 1002 1006 1008 1012 1014 1018 1020 1024 1026
1030 1032 1036 1038 1042 1044 1048 1050 1054 1056 1060 1062 1066 1068
1072 1074 1078 1080 1082 1084 1088 1090 1094 1096 1100 1102 1106 1108
1112 1114 1118 1120 1124 1126 1130 1132 1136 1138 1142 1144 1148 1150
1154 1156 1160 1162 1166 1168 1172 1174 1178 1180 1184 1186 1190 1192
1196 1198 1202 1204 1208 1210 1214 1216 1220 1222 1226 1228 1232 1234
1238 1240 1244 1246 1250 1252 1256 1258 1262 1264 1268 1270 1274 1276
1280 1282 1286 1288 1292 1294 1298 1300 1304 1306 1310 1312 1316 1318
1322 1324 1328 1330 1334 1336 1340 1342 1346 1348 1352 1354 1358 1360
1364 1366 1370 1372 1376 1378 1382 1384 1388 1390 1394 1396 1400 1402
1406 1408 1412 1414 1418 1420 1424 1426 1430 1432 1436 1438 1442 1444
1448 1450 1454 1456 1460 1462 1466 1468 1472 1474 1478 1480 1484 1486
1490 1492 1496 1498 1502 1504 1508 1510 1514 1516 1520 1522 1526 1528
1532 1534 1538 1540 1544 1546 1550 1552 1556 1558 1562 1564 1568 1570
1574 1576 1580 1582 1586 1588 1592 1594 1598 1600 1604 1606 1610 1612 SEQ 1170
1616 1618 1622 1624 1628 1630 1634 1636 1640 1642 1646 1648 1652 1654
1658 1660 1664 1666 1670 1672 1676 1678 1682 1684 1688 1690 1694 1696
1700 1702 1706 1708 1712 1714 1718 1720 1724 1726 1730 1732 1736 1738
1742 1744 1748 1750 1754 1756 1760 1762 1766 1768 1772 1774 1778 1780
1784 1786 1790 1792 1796 1798 1802 1804 1808 1810 1814 1816 1820 1822
1826 1828 1832 1834 1838 1840 1844 1846 1850 1852 1856 1858 1862 1864
1868 1870 1874 1876 1880 1882 1886 1888 1892 1894 1898 1900 1904 1906
1910 1912 1916 1918 1922 1924 1928 1930 1934 1936 1940 1942 1946 1948
1952 1954 1958 1960 1964 1966 1970 1972 1976 1978 1982 1984 1988 1990
1994 1996 2000 2002 2006 2008 2012 2014 2018 2020 2024 2026 2030 2032
2036 2038 2042 2044 2048 2050 2054 2056 2060 2062 2066 2068 2072 2074
.RJ 115 152 162 164 168 170 174 176 180 182 186 188 192 194
198 200 204 206 210 212 216 218 222 224 228 230 234 236
240 242 246 248 252 254 258 260 264 266 270 272 276 278
282 284 288 290 294 296 300 302 306 308 312 314 318 320
324 326 330 332 336 338 342 344 348 350 354 356 360 362
366 368 372 374 378 380 384 386 390 392 396 398 402 404
408 410 414 416 420 422 426 428 432 434 438 440 444 446
450 452 456 458 462 464 468 470 474 476 480 482 486 488
492 494 498 500 504 506 510 512 516 518 522 524 528 530
534 536 540 542 546 548 552 554 558 560 564 566 570 572
576 578 582 584 588 590 594 596 600 602 606 608 612 614
618 620 624 626 630 632 636 638 642 644 648 650 654 656
660 662 666 668 672 674 678 680 684 686 690 692 696 698
702 704 708 710 714 716 720 722 726 728 732 734 738 740
744 746 750 752 756 758 762 764 768 770 774 776 780 782
786 788 792 794 798 800 804 806 810 812 816 818 822 824
828 830 834 836 840 842 846 848 852 854 858 860 864 866
870 872 876 878 882 884 888 890 894 896 900 902 906 908
912 914 918 920 924 926 930 932 936 938 942 944 948 950
954 956 960 962 966 968 972 974 978 980 984 986 990 992
996 998 1002 1004 1008 1010 1014 1016 1020 1022 1026 1028 1032 1034
1038 1040 1044 1046 1050 1052 1056 1058 1062 1064 1068 1070 1074 1076
1080 1084 1086 1090 1092 1096 1098 1102 1104 1108 1110 1114 1116 1120
1122 1126 1128 1132 1134 1138 1140 1144 1146 1150 1152 1156 1158 1162
1164 1168 1170 1174 1176 1180 1182 1186 1188 1192 1194 1198 1200 1204
1206 1210 1212 1216 1218 1222 1224 1228 1230 1234 1236 1240 1242 1246
1248 1252 1254 1258 1260 1264 1266 1270 1272 1276 1278 1282 1284 1288
1290 1294 1296 1300 1302 1306 1308 1312 1314 1318 1320 1324 1326 1330
1332 1336 1338 1342 1344 1348 1350 1354 1356 1360 1362 1366 1368 1372
1374 1378 1380 1384 1386 1390 1392 1396 1398 1402 1404 1408 1410 1414
1416 1420 1422 1426 1428 1432 1434 1438 1440 1444 1446 1450 1452 1456
1458 1462 1464 1468 1470 1474 1476 1480 1482 1486 1488 1492 1494 1498
1500 1504 1506 1510 1512 1516 1518 1522 1524 1528 1530 1534 1536 1540
1542 1546 1548 1552 1554 1558 1560 1564 1566 1570 1572 1576 1578 1582
1584 1588 1590 1594 1596 1600 1602 1606 1608 1612 1614 1618 1620 1624
1626 1630 1632 1636 1638 1642 1644 1648 1650 1654 1656 1660 1662 1666
1668 1672 1674 1678 1680 1684 1686 1690 1692 1696 1698 1702 1704 1708
1710 1714 1716 1720 1722 1726 1728 1732 1734 1738 1740 1744 1746 1750
1752 1756 1758 1762 1764 1768 1770 1774 1776 1780 1782 1786 1788 1792
1794 1798 1800 1804 1806 1810 1812 1816 1818 1822 1824 1828 1830 1834
1836 1840 1842 1846 1848 1852 1854 1858 1860 1864 1866 1870 1872 1876
1878 1882 1884 1888 1890 1894 1896 1900 1902 1906 1908 1912 1914 1918 SEQ 1171
1920 1924 1926 1930 1932 1936 1938 1942 1944 1948 1950 1954 1956 1960
1962 1966 1968 1972 1974 1978 1980 1984 1986 1990 1992 1996 1998 2002
2004 2008 2010 2014 2016 2020 2022 2026 2028 2032 2034 2038 2040 2044
2046 2050 2052 2056 2058 2062 2064 2068 2070 2074 2076 2081 2086
.RJMAP 115 152 164 170 176 182 188 194 200 206 212 218 224 230
236 242 248 254 260 266 272 278 284 290 296 302 308 314
320 326 332 338 344 350 356 362 368 374 380 386 392 398
404 410 416 422 428 434 440 446 452 458 464 470 476 482
488 494 500 506 512 518 524 530 536 542 548 554 560 566
572 578 584 590 596 602 608 614 620 626 632 638 644 650
656 662 668 674 680 686 692 698 704 710 716 722 728 734
740 746 752 758 764 770 776 782 788 794 800 806 812 818
824 830 836 842 848 854 860 866 872 878 884 890 896 902
908 914 920 926 932 938 944 950 956 962 968 974 980 986
992 998 1004 1010 1016 1022 1028 1034 1040 1046 1052 1058 1064 1070
1076 1086 1092 1098 1104 1110 1116 1122 1128 1134 1140 1146 1152 1158
1164 1170 1176 1182 1188 1194 1200 1206 1212 1218 1224 1230 1236 1242
1248 1254 1260 1266 1272 1278 1284 1290 1296 1302 1308 1314 1320 1326
1332 1338 1344 1350 1356 1362 1368 1374 1380 1386 1392 1398 1404 1410
1416 1422 1428 1434 1440 1446 1452 1458 1464 1470 1476 1482 1488 1494
1500 1506 1512 1518 1524 1530 1536 1542 1548 1554 1560 1566 1572 1578
1584 1590 1596 1602 1608 1614 1620 1626 1632 1638 1644 1650 1656 1662
1668 1674 1680 1686 1692 1698 1704 1710 1716 1722 1728 1734 1740 1746
1752 1758 1764 1770 1776 1782 1788 1794 1800 1806 1812 1818 1824 1830
1836 1842 1848 1854 1860 1866 1872 1878 1884 1890 1896 1902 1908 1914
1920 1926 1932 1938 1944 1950 1956 1962 1968 1974 1980 1986 1992 1998
2004 2010 2016 2022 2028 2034 2040 2046 2052 2058 2064 2070 2076 2081
2086
.RMGC 120 122 124 126 128 130 132 134 136 138 140 142 144 146
148 150
.RNAND 1358 1364 1370 1376 1382 1388 1394 1400 1406 1412 1418 1424 1430 1436
1442 1448 1454 1460 1466 1472 1478 1484 1490 1496 1502 1508 1514 1520
1526 1532 1538 1544 1550 1556 1562 1568 1574 1580 1586 1592
.ROR 120 122 124 126 128 130 132 134 136 138 140 142 144 146
148 150 162 168 174 180 186 192 198 204 210 216 222 228
234 240 246 252 258 264 270 276 282 288 294 300 306 312
318 324 330 336 342 348 354 360 366 372 378 384 390 396
402 408 414 420 426 432 438 444 450 456 462 468 474 480
486 492 498 504 510 516 522 528 534 540 546 552 558 564
570 576 582 588 594 600 606 612 618 624 630 636 642 648
654 660 666 672 678 684 690 696 702 708 714 720 726 732
738 744 750 756 762 768 774 780 786 792 798 804 810 816
822 828 834 840 846 852 858 864 870 876 880 882 886 888
892 894 898 900 904 906 910 912 916 918 922 924 928 930
934 936 940 942 946 948 952 954 958 960 964 966 970 972
976 978 982 984 988 990 994 996 1000 1002 1006 1008 1012 1014
1018 1020 1024 1026 1030 1032 1036 1038 1042 1044 1048 1050 1054 1056
1060 1062 1066 1068 1072 1074 1078 1080 1082 1084 1088 1090 1094 1096
1100 1102 1106 1108 1112 1114 1120 1126 1132 1138 1144 1150 1156 1162
1168 1174 1180 1186 1192 1198 1204 1210 1216 1222 1228 1234 1240 1246
1252 1258 1264 1270 1276 1282 1288 1294 1300 1306 1312 1318 1324 1330
1336 1342 1348 1354 1360 1366 1372 1378 1384 1390 1396 1402 1408 1414
1420 1426 1432 1438 1444 1450 1456 1462 1468 1474 1480 1486 1492 1498 SEQ 1172
1504 1510 1516 1522 1528 1534 1540 1546 1552 1558 1564 1570 1576 1582
1588 1594 1600 1606 1612 1618 1624 1630 1636 1642 1648 1654 1660 1666
1672 1678 1684 1690 1696 1702 1708 1714 1720 1726 1732 1738 1744 1750
1756 1762 1768 1774 1780 1786 1792 1798 1804 1810 1816 1822 1828 1834
1840 1846 1852 1858 1864 1870 1876 1882 1888 1894 1900 1906 1912 1918
1924 1930 1936 1942 1948 1954 1960 1966 1972 1978 1984 1990 1996 2002
2008 2014 2020 2026 2032 2038 2044 2050 2056 2062 2068 2074
.RPLUS 160 166 172 178 184 190 196 202 208 214 220 226 232 238
244 250 256 262 268 274 280 286 292 298 304 310 316 322
328 334 340 346 352 358 364 370 376 382 388 394
.RRMIN 640 646 652 658 664 670 676 682 688 694 700 706 712 718
724 730 736 742 748 754 760 766 772 778 784 790 796 802
808 814 820 826 832 838 844 850 856 862 868 874
.RS0A 280 286 292 298 304 520 526 532 538 544 760 766 772 778
784 1000 1006 1012 1018 1024 1238 1244 1250 1256 1262 1478 1484 1490
1496 1502 1718 1724 1730 1736 1742 1958 1964 1970 1976 1982
.RS0B 250 256 262 268 274 490 496 502 508 514 730 736 742 748
754 970 976 982 988 994 1208 1214 1220 1226 1232 1448 1454 1460
1466 1472 1688 1694 1700 1706 1712 1928 1934 1940 1946 1952
.RS0Q 162 168 174 180 186 192 198 204 210 216 220 222 226 228
232 234 238 240 244 246 252 258 264 270 276 282 288 294
300 306 312 318 324 330 336 342 348 354 360 366 372 378
384 390 396 402 408 414 420 426 432 438 444 450 456 460
462 466 468 472 474 478 480 484 486 492 498 504 510 516
522 528 534 540 546 552 558 564 570 576 582 588 594 600
606 612 618 624 630 636 642 648 654 660 666 672 678 684
690 696 700 702 706 708 712 714 718 720 724 726 732 738
744 750 756 762 768 774 780 786 792 798 804 810 816 822
828 834 840 846 852 858 864 870 876 882 888 894 900 906
912 918 924 930 936 940 942 946 948 952 954 958 960 964
966 972 978 984 990 996 1002 1008 1014 1020 1026 1032 1038 1044
1050 1056 1062 1068 1074 1080 1084 1090 1096 1102 1108 1114 1120 1126
1132 1138 1144 1150 1156 1162 1168 1174 1178 1180 1184 1186 1190 1192
1196 1198 1202 1204 1210 1216 1222 1228 1234 1240 1246 1252 1258 1264
1270 1276 1282 1288 1294 1300 1306 1312 1318 1324 1330 1336 1342 1348
1354 1360 1366 1372 1378 1384 1390 1396 1402 1408 1414 1418 1420 1424
1426 1430 1432 1436 1438 1442 1444 1450 1456 1462 1468 1474 1480 1486
1492 1498 1504 1510 1516 1522 1528 1534 1540 1546 1552 1558 1564 1570
1576 1582 1588 1594 1600 1606 1612 1618 1624 1630 1636 1642 1648 1654
1658 1660 1664 1666 1670 1672 1676 1678 1682 1684 1690 1696 1702 1708
1714 1720 1726 1732 1738 1744 1750 1756 1762 1768 1774 1780 1786 1792
1798 1804 1810 1816 1822 1828 1834 1840 1846 1852 1858 1864 1870 1876
1882 1888 1894 1898 1900 1904 1906 1910 1912 1916 1918 1922 1924 1930
1936 1942 1948 1954 1960 1966 1972 1978 1984 1990 1996 2002 2008 2014
2020 2026 2032 2038 2044 2050 2056 2062 2068 2074
.RSAB 190 196 202 208 214 430 436 442 448 454 670 676 682 688
694 910 916 922 928 934 1148 1154 1160 1166 1172 1388 1394 1400
1406 1412 1628 1634 1640 1646 1652 1868 1874 1880 1886 1892
.RSAQ 160 166 172 178 184 400 406 412 418 424 640 646 652 658
664 880 886 892 898 904 1118 1124 1130 1136 1142 1358 1364 1370
1376 1382 1598 1604 1610 1616 1622 1838 1844 1850 1856 1862
.RSD0 115 120 122 124 126 128 130 132 134 136 138 140 142 144
146 148 150 370 376 382 388 394 610 616 622 628 634 850 SEQ 1173
856 862 868 874 1088 1094 1100 1106 1112 1328 1334 1340 1346 1352
1568 1574 1580 1586 1592 1808 1814 1820 1826 1832 2048 2054 2060 2066
2072
.RSDA 310 316 322 328 334 550 556 562 568 574 790 796 802 808
814 1030 1036 1042 1048 1054 1268 1274 1280 1286 1292 1508 1514 1520
1526 1532 1748 1754 1760 1766 1772 1988 1994 2000 2006 2012
.RSDQ 340 346 352 358 364 580 586 592 598 604 820 826 832 838
844 1060 1066 1072 1078 1082 1298 1304 1310 1316 1322 1538 1544 1550
1556 1562 1778 1784 1790 1796 1802 2018 2024 2030 2036 2042
.RSKCN 120 122 124 126 128 130 132 134 136 138 140 142 144 146
148 150
.RSMIN 400 406 412 418 424 430 436 442 448 454 460 466 472 478
484 490 496 502 508 514 520 526 532 538 544 550 556 562
568 574 580 586 592 598 604 610 616 622 628 634
.RXNOR 1838 1844 1850 1856 1862 1868 1874 1880 1886 1892 1898 1904 1910 1916
1922 1928 1934 1940 1946 1952 1958 1964 1970 1976 1982 1988 1994 2000
2006 2012 2018 2024 2030 2036 2042 2048 2054 2060 2066 2072
.RXOR 1598 1604 1610 1616 1622 1628 1634 1640 1646 1652 1658 1664 1670 1676
1682 1688 1694 1700 1706 1712 1718 1724 1730 1736 1742 1748 1754 1760
1766 1772 1778 1784 1790 1796 1802 1808 1814 1820 1826 1832
CALC 115 120 122 124 126 128 130 132 134 136 138 140 142 144
146 148 150 152 160 162 164 166 168 170 172 174 176 178 SEQ 1174
180 182 184 186 188 190 192 194 196 198 200 202 204 206
208 210 212 214 216 218 220 222 224 226 228 230 232 234
236 238 240 242 244 246 248 250 252 254 256 258 260 262
264 266 268 270 272 274 276 278 280 282 284 286 288 290
292 294 296 298 300 302 304 306 308 310 312 314 316 318
320 322 324 326 328 330 332 334 336 338 340 342 344 346
348 350 352 354 356 358 360 362 364 366 368 370 372 374
376 378 380 382 384 386 388 390 392 394 396 398 400 402
404 406 408 410 412 414 416 418 420 422 424 426 428 430
432 434 436 438 440 442 444 446 448 450 452 454 456 458
460 462 464 466 468 470 472 474 476 478 480 482 484 486
488 490 492 494 496 498 500 502 504 506 508 510 512 514
516 518 520 522 524 526 528 530 532 534 536 538 540 542
544 546 548 550 552 554 556 558 560 562 564 566 568 570
572 574 576 578 580 582 584 586 588 590 592 594 596 598
600 602 604 606 608 610 612 614 616 618 620 622 624 626
628 630 632 634 636 638 640 642 644 646 648 650 652 654
656 658 660 662 664 666 668 670 672 674 676 678 680 682
684 686 688 690 692 694 696 698 700 702 704 706 708 710
712 714 716 718 720 722 724 726 728 730 732 734 736 738
740 742 744 746 748 750 752 754 756 758 760 762 764 766
768 770 772 774 776 778 780 782 784 786 788 790 792 794
796 798 800 802 804 806 808 810 812 814 816 818 820 822
824 826 828 830 832 834 836 838 840 842 844 846 848 850
852 854 856 858 860 862 864 866 868 870 872 874 876 878
880 882 884 886 888 890 892 894 896 898 900 902 904 906
908 910 912 914 916 918 920 922 924 926 928 930 932 934
936 938 940 942 944 946 948 950 952 954 956 958 960 962
964 966 968 970 972 974 976 978 980 982 984 986 988 990
992 994 996 998 1000 1002 1004 1006 1008 1010 1012 1014 1016 1018
1020 1022 1024 1026 1028 1030 1032 1034 1036 1038 1040 1042 1044 1046
1048 1050 1052 1054 1056 1058 1060 1062 1064 1066 1068 1070 1072 1074
1076 1078 1080 1082 1084 1086 1088 1090 1092 1094 1096 1098 1100 1102
1104 1106 1108 1110 1112 1114 1116 1118 1120 1122 1124 1126 1128 1130
1132 1134 1136 1138 1140 1142 1144 1146 1148 1150 1152 1154 1156 1158
1160 1162 1164 1166 1168 1170 1172 1174 1176 1178 1180 1182 1184 1186
1188 1190 1192 1194 1196 1198 1200 1202 1204 1206 1208 1210 1212 1214
1216 1218 1220 1222 1224 1226 1228 1230 1232 1234 1236 1238 1240 1242
1244 1246 1248 1250 1252 1254 1256 1258 1260 1262 1264 1266 1268 1270
1272 1274 1276 1278 1280 1282 1284 1286 1288 1290 1292 1294 1296 1298
1300 1302 1304 1306 1308 1310 1312 1314 1316 1318 1320 1322 1324 1326
1328 1330 1332 1334 1336 1338 1340 1342 1344 1346 1348 1350 1352 1354
1356 1358 1360 1362 1364 1366 1368 1370 1372 1374 1376 1378 1380 1382
1384 1386 1388 1390 1392 1394 1396 1398 1400 1402 1404 1406 1408 1410
1412 1414 1416 1418 1420 1422 1424 1426 1428 1430 1432 1434 1436 1438
1440 1442 1444 1446 1448 1450 1452 1454 1456 1458 1460 1462 1464 1466
1468 1470 1472 1474 1476 1478 1480 1482 1484 1486 1488 1490 1492 1494
1496 1498 1500 1502 1504 1506 1508 1510 1512 1514 1516 1518 1520 1522
1524 1526 1528 1530 1532 1534 1536 1538 1540 1542 1544 1546 1548 1550
1552 1554 1556 1558 1560 1562 1564 1566 1568 1570 1572 1574 1576 1578
1580 1582 1584 1586 1588 1590 1592 1594 1596 1598 1600 1602 1604 1606
1608 1610 1612 1614 1616 1618 1620 1622 1624 1626 1628 1630 1632 1634
1636 1638 1640 1642 1644 1646 1648 1650 1652 1654 1656 1658 1660 1662 SEQ 1175
1664 1666 1668 1670 1672 1674 1676 1678 1680 1682 1684 1686 1688 1690
1692 1694 1696 1698 1700 1702 1704 1706 1708 1710 1712 1714 1716 1718
1720 1722 1724 1726 1728 1730 1732 1734 1736 1738 1740 1742 1744 1746
1748 1750 1752 1754 1756 1758 1760 1762 1764 1766 1768 1770 1772 1774
1776 1778 1780 1782 1784 1786 1788 1790 1792 1794 1796 1798 1800 1802
1804 1806 1808 1810 1812 1814 1816 1818 1820 1822 1824 1826 1828 1830
1832 1834 1836 1838 1840 1842 1844 1846 1848 1850 1852 1854 1856 1858
1860 1862 1864 1866 1868 1870 1872 1874 1876 1878 1880 1882 1884 1886
1888 1890 1892 1894 1896 1898 1900 1902 1904 1906 1908 1910 1912 1914
1916 1918 1920 1922 1924 1926 1928 1930 1932 1934 1936 1938 1940 1942
1944 1946 1948 1950 1952 1954 1956 1958 1960 1962 1964 1966 1968 1970
1972 1974 1976 1978 1980 1982 1984 1986 1988 1990 1992 1994 1996 1998
2000 2002 2004 2006 2008 2010 2012 2014 2016 2018 2020 2022 2024 2026
2028 2030 2032 2034 2036 2038 2040 2042 2044 2046 2048 2050 2052 2054
2056 2058 2060 2062 2064 2066 2068 2070 2072 2074 2076 2081 2086
CONCAT 115 120 122 124 126 128 130 132 134 136 138 140 142 144
146 148 150 152 160 162 164 166 168 170 172 174 176 178
180 182 184 186 188 190 192 194 196 198 200 202 204 206
208 210 212 214 216 218 220 222 224 226 228 230 232 234
236 238 240 242 244 246 248 250 252 254 256 258 260 262
264 266 268 270 272 274 276 278 280 282 284 286 288 290
292 294 296 298 300 302 304 306 308 310 312 314 316 318
320 322 324 326 328 330 332 334 336 338 340 342 344 346
348 350 352 354 356 358 360 362 364 366 368 370 372 374
376 378 380 382 384 386 388 390 392 394 396 398 400 402
404 406 408 410 412 414 416 418 420 422 424 426 428 430
432 434 436 438 440 442 444 446 448 450 452 454 456 458
460 462 464 466 468 470 472 474 476 478 480 482 484 486
488 490 492 494 496 498 500 502 504 506 508 510 512 514
516 518 520 522 524 526 528 530 532 534 536 538 540 542
544 546 548 550 552 554 556 558 560 562 564 566 568 570
572 574 576 578 580 582 584 586 588 590 592 594 596 598
600 602 604 606 608 610 612 614 616 618 620 622 624 626
628 630 632 634 636 638 640 642 644 646 648 650 652 654
656 658 660 662 664 666 668 670 672 674 676 678 680 682
684 686 688 690 692 694 696 698 700 702 704 706 708 710
712 714 716 718 720 722 724 726 728 730 732 734 736 738
740 742 744 746 748 750 752 754 756 758 760 762 764 766
768 770 772 774 776 778 780 782 784 786 788 790 792 794
796 798 800 802 804 806 808 810 812 814 816 818 820 822
824 826 828 830 832 834 836 838 840 842 844 846 848 850
852 854 856 858 860 862 864 866 868 870 872 874 876 878
880 882 884 886 888 890 892 894 896 898 900 902 904 906
908 910 912 914 916 918 920 922 924 926 928 930 932 934
936 938 940 942 944 946 948 950 952 954 956 958 960 962
964 966 968 970 972 974 976 978 980 982 984 986 988 990
992 994 996 998 1000 1002 1004 1006 1008 1010 1012 1014 1016 1018
1020 1022 1024 1026 1028 1030 1032 1034 1036 1038 1040 1042 1044 1046
1048 1050 1052 1054 1056 1058 1060 1062 1064 1066 1068 1070 1072 1074
1076 1078 1080 1082 1084 1086 1088 1090 1092 1094 1096 1098 1100 1102
1104 1106 1108 1110 1112 1114 1116 1118 1120 1122 1124 1126 1128 1130
1132 1134 1136 1138 1140 1142 1144 1146 1148 1150 1152 1154 1156 1158
1160 1162 1164 1166 1168 1170 1172 1174 1176 1178 1180 1182 1184 1186 SEQ 1176
1188 1190 1192 1194 1196 1198 1200 1202 1204 1206 1208 1210 1212 1214
1216 1218 1220 1222 1224 1226 1228 1230 1232 1234 1236 1238 1240 1242
1244 1246 1248 1250 1252 1254 1256 1258 1260 1262 1264 1266 1268 1270
1272 1274 1276 1278 1280 1282 1284 1286 1288 1290 1292 1294 1296 1298
1300 1302 1304 1306 1308 1310 1312 1314 1316 1318 1320 1322 1324 1326
1328 1330 1332 1334 1336 1338 1340 1342 1344 1346 1348 1350 1352 1354
1356 1358 1360 1362 1364 1366 1368 1370 1372 1374 1376 1378 1380 1382
1384 1386 1388 1390 1392 1394 1396 1398 1400 1402 1404 1406 1408 1410
1412 1414 1416 1418 1420 1422 1424 1426 1428 1430 1432 1434 1436 1438
1440 1442 1444 1446 1448 1450 1452 1454 1456 1458 1460 1462 1464 1466
1468 1470 1472 1474 1476 1478 1480 1482 1484 1486 1488 1490 1492 1494
1496 1498 1500 1502 1504 1506 1508 1510 1512 1514 1516 1518 1520 1522
1524 1526 1528 1530 1532 1534 1536 1538 1540 1542 1544 1546 1548 1550
1552 1554 1556 1558 1560 1562 1564 1566 1568 1570 1572 1574 1576 1578
1580 1582 1584 1586 1588 1590 1592 1594 1596 1598 1600 1602 1604 1606
1608 1610 1612 1614 1616 1618 1620 1622 1624 1626 1628 1630 1632 1634
1636 1638 1640 1642 1644 1646 1648 1650 1652 1654 1656 1658 1660 1662
1664 1666 1668 1670 1672 1674 1676 1678 1680 1682 1684 1686 1688 1690
1692 1694 1696 1698 1700 1702 1704 1706 1708 1710 1712 1714 1716 1718
1720 1722 1724 1726 1728 1730 1732 1734 1736 1738 1740 1742 1744 1746
1748 1750 1752 1754 1756 1758 1760 1762 1764 1766 1768 1770 1772 1774
1776 1778 1780 1782 1784 1786 1788 1790 1792 1794 1796 1798 1800 1802
1804 1806 1808 1810 1812 1814 1816 1818 1820 1822 1824 1826 1828 1830
1832 1834 1836 1838 1840 1842 1844 1846 1848 1850 1852 1854 1856 1858
1860 1862 1864 1866 1868 1870 1872 1874 1876 1878 1880 1882 1884 1886
1888 1890 1892 1894 1896 1898 1900 1902 1904 1906 1908 1910 1912 1914
1916 1918 1920 1922 1924 1926 1928 1930 1932 1934 1936 1938 1940 1942
1944 1946 1948 1950 1952 1954 1956 1958 1960 1962 1964 1966 1968 1970
1972 1974 1976 1978 1980 1982 1984 1986 1988 1990 1992 1994 1996 1998
2000 2002 2004 2006 2008 2010 2012 2014 2016 2018 2020 2022 2024 2026
2028 2030 2032 2034 2036 2038 2040 2042 2044 2046 2048 2050 2052 2054
2056 2058 2060 2062 2064 2066 2068 2070 2072 2074 2076 2081 2086
FIELD 115 120 122 124 126 128 130 132 134 136 138 140 142 144
146 148 150 152 160 162 164 166 168 170 172 174 176 178
180 182 184 186 188 190 192 194 196 198 200 202 204 206
208 210 212 214 216 218 220 222 224 226 228 230 232 234
236 238 240 242 244 246 248 250 252 254 256 258 260 262
264 266 268 270 272 274 276 278 280 282 284 286 288 290
292 294 296 298 300 302 304 306 308 310 312 314 316 318
320 322 324 326 328 330 332 334 336 338 340 342 344 346
348 350 352 354 356 358 360 362 364 366 368 370 372 374
376 378 380 382 384 386 388 390 392 394 396 398 400 402
404 406 408 410 412 414 416 418 420 422 424 426 428 430
432 434 436 438 440 442 444 446 448 450 452 454 456 458
460 462 464 466 468 470 472 474 476 478 480 482 484 486
488 490 492 494 496 498 500 502 504 506 508 510 512 514
516 518 520 522 524 526 528 530 532 534 536 538 540 542
544 546 548 550 552 554 556 558 560 562 564 566 568 570
572 574 576 578 580 582 584 586 588 590 592 594 596 598
600 602 604 606 608 610 612 614 616 618 620 622 624 626
628 630 632 634 636 638 640 642 644 646 648 650 652 654
656 658 660 662 664 666 668 670 672 674 676 678 680 682
684 686 688 690 692 694 696 698 700 702 704 706 708 710 SEQ 1177
712 714 716 718 720 722 724 726 728 730 732 734 736 738
740 742 744 746 748 750 752 754 756 758 760 762 764 766
768 770 772 774 776 778 780 782 784 786 788 790 792 794
796 798 800 802 804 806 808 810 812 814 816 818 820 822
824 826 828 830 832 834 836 838 840 842 844 846 848 850
852 854 856 858 860 862 864 866 868 870 872 874 876 878
880 882 884 886 888 890 892 894 896 898 900 902 904 906
908 910 912 914 916 918 920 922 924 926 928 930 932 934
936 938 940 942 944 946 948 950 952 954 956 958 960 962
964 966 968 970 972 974 976 978 980 982 984 986 988 990
992 994 996 998 1000 1002 1004 1006 1008 1010 1012 1014 1016 1018
1020 1022 1024 1026 1028 1030 1032 1034 1036 1038 1040 1042 1044 1046
1048 1050 1052 1054 1056 1058 1060 1062 1064 1066 1068 1070 1072 1074
1076 1078 1080 1082 1084 1086 1088 1090 1092 1094 1096 1098 1100 1102
1104 1106 1108 1110 1112 1114 1116 1118 1120 1122 1124 1126 1128 1130
1132 1134 1136 1138 1140 1142 1144 1146 1148 1150 1152 1154 1156 1158
1160 1162 1164 1166 1168 1170 1172 1174 1176 1178 1180 1182 1184 1186
1188 1190 1192 1194 1196 1198 1200 1202 1204 1206 1208 1210 1212 1214
1216 1218 1220 1222 1224 1226 1228 1230 1232 1234 1236 1238 1240 1242
1244 1246 1248 1250 1252 1254 1256 1258 1260 1262 1264 1266 1268 1270
1272 1274 1276 1278 1280 1282 1284 1286 1288 1290 1292 1294 1296 1298
1300 1302 1304 1306 1308 1310 1312 1314 1316 1318 1320 1322 1324 1326
1328 1330 1332 1334 1336 1338 1340 1342 1344 1346 1348 1350 1352 1354
1356 1358 1360 1362 1364 1366 1368 1370 1372 1374 1376 1378 1380 1382
1384 1386 1388 1390 1392 1394 1396 1398 1400 1402 1404 1406 1408 1410
1412 1414 1416 1418 1420 1422 1424 1426 1428 1430 1432 1434 1436 1438
1440 1442 1444 1446 1448 1450 1452 1454 1456 1458 1460 1462 1464 1466
1468 1470 1472 1474 1476 1478 1480 1482 1484 1486 1488 1490 1492 1494
1496 1498 1500 1502 1504 1506 1508 1510 1512 1514 1516 1518 1520 1522
1524 1526 1528 1530 1532 1534 1536 1538 1540 1542 1544 1546 1548 1550
1552 1554 1556 1558 1560 1562 1564 1566 1568 1570 1572 1574 1576 1578
1580 1582 1584 1586 1588 1590 1592 1594 1596 1598 1600 1602 1604 1606
1608 1610 1612 1614 1616 1618 1620 1622 1624 1626 1628 1630 1632 1634
1636 1638 1640 1642 1644 1646 1648 1650 1652 1654 1656 1658 1660 1662
1664 1666 1668 1670 1672 1674 1676 1678 1680 1682 1684 1686 1688 1690
1692 1694 1696 1698 1700 1702 1704 1706 1708 1710 1712 1714 1716 1718
1720 1722 1724 1726 1728 1730 1732 1734 1736 1738 1740 1742 1744 1746
1748 1750 1752 1754 1756 1758 1760 1762 1764 1766 1768 1770 1772 1774
1776 1778 1780 1782 1784 1786 1788 1790 1792 1794 1796 1798 1800 1802
1804 1806 1808 1810 1812 1814 1816 1818 1820 1822 1824 1826 1828 1830
1832 1834 1836 1838 1840 1842 1844 1846 1848 1850 1852 1854 1856 1858
1860 1862 1864 1866 1868 1870 1872 1874 1876 1878 1880 1882 1884 1886
1888 1890 1892 1894 1896 1898 1900 1902 1904 1906 1908 1910 1912 1914
1916 1918 1920 1922 1924 1926 1928 1930 1932 1934 1936 1938 1940 1942
1944 1946 1948 1950 1952 1954 1956 1958 1960 1962 1964 1966 1968 1970
1972 1974 1976 1978 1980 1982 1984 1986 1988 1990 1992 1994 1996 1998
2000 2002 2004 2006 2008 2010 2012 2014 2016 2018 2020 2022 2024 2026
2028 2030 2032 2034 2036 2038 2040 2042 2044 2046 2048 2050 2052 2054
2056 2058 2060 2062 2064 2066 2068 2070 2072 2074 2076 2081 2086
GO 83 85 95
MFLD 115# 115 120# 120 122# 122 124# 124 126# 126 128# 128 130# 130
132# 132 134# 134 136# 136 138# 138 140# 140 142# 142 144# 144
146# 146 148# 148 150# 150 152# 152 160# 160 162# 162 164# 164 SEQ 1178
166# 166 168# 168 170# 170 172# 172 174# 174 176# 176 178# 178
180# 180 182# 182 184# 184 186# 186 188# 188 190# 190 192# 192
194# 194 196# 196 198# 198 200# 200 202# 202 204# 204 206# 206
208# 208 210# 210 212# 212 214# 214 216# 216 218# 218 220# 220
222# 222 224# 224 226# 226 228# 228 230# 230 232# 232 234# 234
236# 236 238# 238 240# 240 242# 242 244# 244 246# 246 248# 248
250# 250 252# 252 254# 254 256# 256 258# 258 260# 260 262# 262
264# 264 266# 266 268# 268 270# 270 272# 272 274# 274 276# 276
278# 278 280# 280 282# 282 284# 284 286# 286 288# 288 290# 290
292# 292 294# 294 296# 296 298# 298 300# 300 302# 302 304# 304
306# 306 308# 308 310# 310 312# 312 314# 314 316# 316 318# 318
320# 320 322# 322 324# 324 326# 326 328# 328 330# 330 332# 332
334# 334 336# 336 338# 338 340# 340 342# 342 344# 344 346# 346
348# 348 350# 350 352# 352 354# 354 356# 356 358# 358 360# 360
362# 362 364# 364 366# 366 368# 368 370# 370 372# 372 374# 374
376# 376 378# 378 380# 380 382# 382 384# 384 386# 386 388# 388
390# 390 392# 392 394# 394 396# 396 398# 398 400# 400 402# 402
404# 404 406# 406 408# 408 410# 410 412# 412 414# 414 416# 416
418# 418 420# 420 422# 422 424# 424 426# 426 428# 428 430# 430
432# 432 434# 434 436# 436 438# 438 440# 440 442# 442 444# 444
446# 446 448# 448 450# 450 452# 452 454# 454 456# 456 458# 458
460# 460 462# 462 464# 464 466# 466 468# 468 470# 470 472# 472
474# 474 476# 476 478# 478 480# 480 482# 482 484# 484 486# 486
488# 488 490# 490 492# 492 494# 494 496# 496 498# 498 500# 500
502# 502 504# 504 506# 506 508# 508 510# 510 512# 512 514# 514
516# 516 518# 518 520# 520 522# 522 524# 524 526# 526 528# 528
530# 530 532# 532 534# 534 536# 536 538# 538 540# 540 542# 542
544# 544 546# 546 548# 548 550# 550 552# 552 554# 554 556# 556
558# 558 560# 560 562# 562 564# 564 566# 566 568# 568 570# 570
572# 572 574# 574 576# 576 578# 578 580# 580 582# 582 584# 584
586# 586 588# 588 590# 590 592# 592 594# 594 596# 596 598# 598
600# 600 602# 602 604# 604 606# 606 608# 608 610# 610 612# 612
614# 614 616# 616 618# 618 620# 620 622# 622 624# 624 626# 626
628# 628 630# 630 632# 632 634# 634 636# 636 638# 638 640# 640
642# 642 644# 644 646# 646 648# 648 650# 650 652# 652 654# 654
656# 656 658# 658 660# 660 662# 662 664# 664 666# 666 668# 668
670# 670 672# 672 674# 674 676# 676 678# 678 680# 680 682# 682
684# 684 686# 686 688# 688 690# 690 692# 692 694# 694 696# 696
698# 698 700# 700 702# 702 704# 704 706# 706 708# 708 710# 710
712# 712 714# 714 716# 716 718# 718 720# 720 722# 722 724# 724
726# 726 728# 728 730# 730 732# 732 734# 734 736# 736 738# 738
740# 740 742# 742 744# 744 746# 746 748# 748 750# 750 752# 752
754# 754 756# 756 758# 758 760# 760 762# 762 764# 764 766# 766
768# 768 770# 770 772# 772 774# 774 776# 776 778# 778 780# 780
782# 782 784# 784 786# 786 788# 788 790# 790 792# 792 794# 794
796# 796 798# 798 800# 800 802# 802 804# 804 806# 806 808# 808
810# 810 812# 812 814# 814 816# 816 818# 818 820# 820 822# 822
824# 824 826# 826 828# 828 830# 830 832# 832 834# 834 836# 836
838# 838 840# 840 842# 842 844# 844 846# 846 848# 848 850# 850
852# 852 854# 854 856# 856 858# 858 860# 860 862# 862 864# 864
866# 866 868# 868 870# 870 872# 872 874# 874 876# 876 878# 878
880# 880 882# 882 884# 884 886# 886 888# 888 890# 890 892# 892
894# 894 896# 896 898# 898 900# 900 902# 902 904# 904 906# 906 SEQ 1179
908# 908 910# 910 912# 912 914# 914 916# 916 918# 918 920# 920
922# 922 924# 924 926# 926 928# 928 930# 930 932# 932 934# 934
936# 936 938# 938 940# 940 942# 942 944# 944 946# 946 948# 948
950# 950 952# 952 954# 954 956# 956 958# 958 960# 960 962# 962
964# 964 966# 966 968# 968 970# 970 972# 972 974# 974 976# 976
978# 978 980# 980 982# 982 984# 984 986# 986 988# 988 990# 990
992# 992 994# 994 996# 996 998# 998 1000# 1000 1002# 1002 1004# 1004
1006# 1006 1008# 1008 1010# 1010 1012# 1012 1014# 1014 1016# 1016 1018# 1018
1020# 1020 1022# 1022 1024# 1024 1026# 1026 1028# 1028 1030# 1030 1032# 1032
1034# 1034 1036# 1036 1038# 1038 1040# 1040 1042# 1042 1044# 1044 1046# 1046
1048# 1048 1050# 1050 1052# 1052 1054# 1054 1056# 1056 1058# 1058 1060# 1060
1062# 1062 1064# 1064 1066# 1066 1068# 1068 1070# 1070 1072# 1072 1074# 1074
1076# 1076 1078# 1078 1080# 1080 1082# 1082 1084# 1084 1086# 1086 1088# 1088
1090# 1090 1092# 1092 1094# 1094 1096# 1096 1098# 1098 1100# 1100 1102# 1102
1104# 1104 1106# 1106 1108# 1108 1110# 1110 1112# 1112 1114# 1114 1116# 1116
1118# 1118 1120# 1120 1122# 1122 1124# 1124 1126# 1126 1128# 1128 1130# 1130
1132# 1132 1134# 1134 1136# 1136 1138# 1138 1140# 1140 1142# 1142 1144# 1144
1146# 1146 1148# 1148 1150# 1150 1152# 1152 1154# 1154 1156# 1156 1158# 1158
1160# 1160 1162# 1162 1164# 1164 1166# 1166 1168# 1168 1170# 1170 1172# 1172
1174# 1174 1176# 1176 1178# 1178 1180# 1180 1182# 1182 1184# 1184 1186# 1186
1188# 1188 1190# 1190 1192# 1192 1194# 1194 1196# 1196 1198# 1198 1200# 1200
1202# 1202 1204# 1204 1206# 1206 1208# 1208 1210# 1210 1212# 1212 1214# 1214
1216# 1216 1218# 1218 1220# 1220 1222# 1222 1224# 1224 1226# 1226 1228# 1228
1230# 1230 1232# 1232 1234# 1234 1236# 1236 1238# 1238 1240# 1240 1242# 1242
1244# 1244 1246# 1246 1248# 1248 1250# 1250 1252# 1252 1254# 1254 1256# 1256
1258# 1258 1260# 1260 1262# 1262 1264# 1264 1266# 1266 1268# 1268 1270# 1270
1272# 1272 1274# 1274 1276# 1276 1278# 1278 1280# 1280 1282# 1282 1284# 1284
1286# 1286 1288# 1288 1290# 1290 1292# 1292 1294# 1294 1296# 1296 1298# 1298
1300# 1300 1302# 1302 1304# 1304 1306# 1306 1308# 1308 1310# 1310 1312# 1312
1314# 1314 1316# 1316 1318# 1318 1320# 1320 1322# 1322 1324# 1324 1326# 1326
1328# 1328 1330# 1330 1332# 1332 1334# 1334 1336# 1336 1338# 1338 1340# 1340
1342# 1342 1344# 1344 1346# 1346 1348# 1348 1350# 1350 1352# 1352 1354# 1354
1356# 1356 1358# 1358 1360# 1360 1362# 1362 1364# 1364 1366# 1366 1368# 1368
1370# 1370 1372# 1372 1374# 1374 1376# 1376 1378# 1378 1380# 1380 1382# 1382
1384# 1384 1386# 1386 1388# 1388 1390# 1390 1392# 1392 1394# 1394 1396# 1396
1398# 1398 1400# 1400 1402# 1402 1404# 1404 1406# 1406 1408# 1408 1410# 1410
1412# 1412 1414# 1414 1416# 1416 1418# 1418 1420# 1420 1422# 1422 1424# 1424
1426# 1426 1428# 1428 1430# 1430 1432# 1432 1434# 1434 1436# 1436 1438# 1438
1440# 1440 1442# 1442 1444# 1444 1446# 1446 1448# 1448 1450# 1450 1452# 1452
1454# 1454 1456# 1456 1458# 1458 1460# 1460 1462# 1462 1464# 1464 1466# 1466
1468# 1468 1470# 1470 1472# 1472 1474# 1474 1476# 1476 1478# 1478 1480# 1480
1482# 1482 1484# 1484 1486# 1486 1488# 1488 1490# 1490 1492# 1492 1494# 1494
1496# 1496 1498# 1498 1500# 1500 1502# 1502 1504# 1504 1506# 1506 1508# 1508
1510# 1510 1512# 1512 1514# 1514 1516# 1516 1518# 1518 1520# 1520 1522# 1522
1524# 1524 1526# 1526 1528# 1528 1530# 1530 1532# 1532 1534# 1534 1536# 1536
1538# 1538 1540# 1540 1542# 1542 1544# 1544 1546# 1546 1548# 1548 1550# 1550
1552# 1552 1554# 1554 1556# 1556 1558# 1558 1560# 1560 1562# 1562 1564# 1564
1566# 1566 1568# 1568 1570# 1570 1572# 1572 1574# 1574 1576# 1576 1578# 1578
1580# 1580 1582# 1582 1584# 1584 1586# 1586 1588# 1588 1590# 1590 1592# 1592
1594# 1594 1596# 1596 1598# 1598 1600# 1600 1602# 1602 1604# 1604 1606# 1606
1608# 1608 1610# 1610 1612# 1612 1614# 1614 1616# 1616 1618# 1618 1620# 1620
1622# 1622 1624# 1624 1626# 1626 1628# 1628 1630# 1630 1632# 1632 1634# 1634
1636# 1636 1638# 1638 1640# 1640 1642# 1642 1644# 1644 1646# 1646 1648# 1648 SEQ 1180
1650# 1650 1652# 1652 1654# 1654 1656# 1656 1658# 1658 1660# 1660 1662# 1662
1664# 1664 1666# 1666 1668# 1668 1670# 1670 1672# 1672 1674# 1674 1676# 1676
1678# 1678 1680# 1680 1682# 1682 1684# 1684 1686# 1686 1688# 1688 1690# 1690
1692# 1692 1694# 1694 1696# 1696 1698# 1698 1700# 1700 1702# 1702 1704# 1704
1706# 1706 1708# 1708 1710# 1710 1712# 1712 1714# 1714 1716# 1716 1718# 1718
1720# 1720 1722# 1722 1724# 1724 1726# 1726 1728# 1728 1730# 1730 1732# 1732
1734# 1734 1736# 1736 1738# 1738 1740# 1740 1742# 1742 1744# 1744 1746# 1746
1748# 1748 1750# 1750 1752# 1752 1754# 1754 1756# 1756 1758# 1758 1760# 1760
1762# 1762 1764# 1764 1766# 1766 1768# 1768 1770# 1770 1772# 1772 1774# 1774
1776# 1776 1778# 1778 1780# 1780 1782# 1782 1784# 1784 1786# 1786 1788# 1788
1790# 1790 1792# 1792 1794# 1794 1796# 1796 1798# 1798 1800# 1800 1802# 1802
1804# 1804 1806# 1806 1808# 1808 1810# 1810 1812# 1812 1814# 1814 1816# 1816
1818# 1818 1820# 1820 1822# 1822 1824# 1824 1826# 1826 1828# 1828 1830# 1830
1832# 1832 1834# 1834 1836# 1836 1838# 1838 1840# 1840 1842# 1842 1844# 1844
1846# 1846 1848# 1848 1850# 1850 1852# 1852 1854# 1854 1856# 1856 1858# 1858
1860# 1860 1862# 1862 1864# 1864 1866# 1866 1868# 1868 1870# 1870 1872# 1872
1874# 1874 1876# 1876 1878# 1878 1880# 1880 1882# 1882 1884# 1884 1886# 1886
1888# 1888 1890# 1890 1892# 1892 1894# 1894 1896# 1896 1898# 1898 1900# 1900
1902# 1902 1904# 1904 1906# 1906 1908# 1908 1910# 1910 1912# 1912 1914# 1914
1916# 1916 1918# 1918 1920# 1920 1922# 1922 1924# 1924 1926# 1926 1928# 1928
1930# 1930 1932# 1932 1934# 1934 1936# 1936 1938# 1938 1940# 1940 1942# 1942
1944# 1944 1946# 1946 1948# 1948 1950# 1950 1952# 1952 1954# 1954 1956# 1956
1958# 1958 1960# 1960 1962# 1962 1964# 1964 1966# 1966 1968# 1968 1970# 1970
1972# 1972 1974# 1974 1976# 1976 1978# 1978 1980# 1980 1982# 1982 1984# 1984
1986# 1986 1988# 1988 1990# 1990 1992# 1992 1994# 1994 1996# 1996 1998# 1998
2000# 2000 2002# 2002 2004# 2004 2006# 2006 2008# 2008 2010# 2010 2012# 2012
2014# 2014 2016# 2016 2018# 2018 2020# 2020 2022# 2022 2024# 2024 2026# 2026
2028# 2028 2030# 2030 2032# 2032 2034# 2034 2036# 2036 2038# 2038 2040# 2040
2042# 2042 2044# 2044 2046# 2046 2048# 2048 2050# 2050 2052# 2052 2054# 2054
2056# 2056 2058# 2058 2060# 2060 2062# 2062 2064# 2064 2066# 2066 2068# 2068
2070# 2070 2072# 2072 2074# 2074 2076# 2076 2081# 2081 2086# 2086
MWORD 115 120 122 124 126 128 130 132 134 136 138 140 142 144
146 148 150 152 160 162 164 166 168 170 172 174 176 178
180 182 184 186 188 190 192 194 196 198 200 202 204 206
208 210 212 214 216 218 220 222 224 226 228 230 232 234
236 238 240 242 244 246 248 250 252 254 256 258 260 262
264 266 268 270 272 274 276 278 280 282 284 286 288 290
292 294 296 298 300 302 304 306 308 310 312 314 316 318
320 322 324 326 328 330 332 334 336 338 340 342 344 346
348 350 352 354 356 358 360 362 364 366 368 370 372 374
376 378 380 382 384 386 388 390 392 394 396 398 400 402
404 406 408 410 412 414 416 418 420 422 424 426 428 430
432 434 436 438 440 442 444 446 448 450 452 454 456 458
460 462 464 466 468 470 472 474 476 478 480 482 484 486
488 490 492 494 496 498 500 502 504 506 508 510 512 514
516 518 520 522 524 526 528 530 532 534 536 538 540 542
544 546 548 550 552 554 556 558 560 562 564 566 568 570
572 574 576 578 580 582 584 586 588 590 592 594 596 598
600 602 604 606 608 610 612 614 616 618 620 622 624 626
628 630 632 634 636 638 640 642 644 646 648 650 652 654
656 658 660 662 664 666 668 670 672 674 676 678 680 682
684 686 688 690 692 694 696 698 700 702 704 706 708 710
712 714 716 718 720 722 724 726 728 730 732 734 736 738 SEQ 1181
740 742 744 746 748 750 752 754 756 758 760 762 764 766
768 770 772 774 776 778 780 782 784 786 788 790 792 794
796 798 800 802 804 806 808 810 812 814 816 818 820 822
824 826 828 830 832 834 836 838 840 842 844 846 848 850
852 854 856 858 860 862 864 866 868 870 872 874 876 878
880 882 884 886 888 890 892 894 896 898 900 902 904 906
908 910 912 914 916 918 920 922 924 926 928 930 932 934
936 938 940 942 944 946 948 950 952 954 956 958 960 962
964 966 968 970 972 974 976 978 980 982 984 986 988 990
992 994 996 998 1000 1002 1004 1006 1008 1010 1012 1014 1016 1018
1020 1022 1024 1026 1028 1030 1032 1034 1036 1038 1040 1042 1044 1046
1048 1050 1052 1054 1056 1058 1060 1062 1064 1066 1068 1070 1072 1074
1076 1078 1080 1082 1084 1086 1088 1090 1092 1094 1096 1098 1100 1102
1104 1106 1108 1110 1112 1114 1116 1118 1120 1122 1124 1126 1128 1130
1132 1134 1136 1138 1140 1142 1144 1146 1148 1150 1152 1154 1156 1158
1160 1162 1164 1166 1168 1170 1172 1174 1176 1178 1180 1182 1184 1186
1188 1190 1192 1194 1196 1198 1200 1202 1204 1206 1208 1210 1212 1214
1216 1218 1220 1222 1224 1226 1228 1230 1232 1234 1236 1238 1240 1242
1244 1246 1248 1250 1252 1254 1256 1258 1260 1262 1264 1266 1268 1270
1272 1274 1276 1278 1280 1282 1284 1286 1288 1290 1292 1294 1296 1298
1300 1302 1304 1306 1308 1310 1312 1314 1316 1318 1320 1322 1324 1326
1328 1330 1332 1334 1336 1338 1340 1342 1344 1346 1348 1350 1352 1354
1356 1358 1360 1362 1364 1366 1368 1370 1372 1374 1376 1378 1380 1382
1384 1386 1388 1390 1392 1394 1396 1398 1400 1402 1404 1406 1408 1410
1412 1414 1416 1418 1420 1422 1424 1426 1428 1430 1432 1434 1436 1438
1440 1442 1444 1446 1448 1450 1452 1454 1456 1458 1460 1462 1464 1466
1468 1470 1472 1474 1476 1478 1480 1482 1484 1486 1488 1490 1492 1494
1496 1498 1500 1502 1504 1506 1508 1510 1512 1514 1516 1518 1520 1522
1524 1526 1528 1530 1532 1534 1536 1538 1540 1542 1544 1546 1548 1550
1552 1554 1556 1558 1560 1562 1564 1566 1568 1570 1572 1574 1576 1578
1580 1582 1584 1586 1588 1590 1592 1594 1596 1598 1600 1602 1604 1606
1608 1610 1612 1614 1616 1618 1620 1622 1624 1626 1628 1630 1632 1634
1636 1638 1640 1642 1644 1646 1648 1650 1652 1654 1656 1658 1660 1662
1664 1666 1668 1670 1672 1674 1676 1678 1680 1682 1684 1686 1688 1690
1692 1694 1696 1698 1700 1702 1704 1706 1708 1710 1712 1714 1716 1718
1720 1722 1724 1726 1728 1730 1732 1734 1736 1738 1740 1742 1744 1746
1748 1750 1752 1754 1756 1758 1760 1762 1764 1766 1768 1770 1772 1774
1776 1778 1780 1782 1784 1786 1788 1790 1792 1794 1796 1798 1800 1802
1804 1806 1808 1810 1812 1814 1816 1818 1820 1822 1824 1826 1828 1830
1832 1834 1836 1838 1840 1842 1844 1846 1848 1850 1852 1854 1856 1858
1860 1862 1864 1866 1868 1870 1872 1874 1876 1878 1880 1882 1884 1886
1888 1890 1892 1894 1896 1898 1900 1902 1904 1906 1908 1910 1912 1914
1916 1918 1920 1922 1924 1926 1928 1930 1932 1934 1936 1938 1940 1942
1944 1946 1948 1950 1952 1954 1956 1958 1960 1962 1964 1966 1968 1970
1972 1974 1976 1978 1980 1982 1984 1986 1988 1990 1992 1994 1996 1998
2000 2002 2004 2006 2008 2010 2012 2014 2016 2018 2020 2022 2024 2026
2028 2030 2032 2034 2036 2038 2040 2042 2044 2046 2048 2050 2052 2054
2056 2058 2060 2062 2064 2066 2068 2070 2072 2074 2076 2081 2086
RTN 86 103
SCOPER 97
.MAIN MACRO %53A(1152) 10:04 16-Oct-84 Page 1
DFPTA6 MAC 19-Jan-83 11:22 EBUS/MPROC 2901 Tests (Part 3) SEQ 1182
1 SUBTTL EBUS/MPROC 2901 Tests (Part 3)
2
3 SALL
4
5 SEARCH DFPTA,MONSYM
6
7 ; INTERN's
8
9 ENTRY TSTA32
10
11 ; EXTERN's
12
13 EXTERN TSTA36,TSTA37,TSTA40,TSTA41
14
15 ; EXTERN's located in DFPTA1.MAC (Mainline code..)
16
17 EXTERN TLOAD,TRACE,TSTSUB,AEXEC,AAPNT
18
19
20 ;#********************************************************************
21 ; Z6 - Address for use in DDT
22 ;#********************************************************************
23
24 000000' Z6: ; address of 00000'
25
.MAIN MACRO %53A(1152) 10:04 16-Oct-84 Page 2
DFPTA6 MAC 19-Jan-83 11:22 Register Interference Tests SEQ 1183
26 SUBTTL Register Interference Tests
27
28 ;#********************************************************************
29 ;* TEST 32 - 2901 RAM Register Interference Test
30 ;
31 ; Description: Load Register 0 with test data. Then write data
32 ; to Q-Register and Registers 1-15 with all combin-
33 ; ations of source operand, ALU function, and dest-
34 ; ination field (other than RAM function specified
35 ; as loading Register 0) and verify that contents
36 ; of Register 0 did not change.
37 ;
38 ; Repeat with Register 1-15.
39 ;
40 ; Procedure: Clear Port
41 ; Load microcode/set start address 1
42 ; Start microcode (will halt with a parity error at
43 ; completion of test).
44 ;
45 ; For each register 0-15, call subroutine to put
46 ; nonzero data in each RAM and Q registers. Then
47 ; zero the register and execute a block of micro
48 ; instructions. If the register goes non-zero, the
49 ; microsequencer goes to the error routine. When
50 ; done, read the LAR and verify that the microcode
51 ; stopped in the right place.
52 ;
53 ; Address (error occurred): 4100
54 ; Address (done successfully): 5000
55 ;
56 ; Failure: ---
57 ;#********************************************************************
58
59 ; Test data
60
61 000000' 254 00 0 00 000011' TSTA32: JRST TG32 ; go start test
62 000001' 420402 000032 EBUS!ALU!NDMP!ZALU!32 ; test mask
63 000002' 000032' 004351' T32M,,[ASCIZ ^2901 RAM Register Interference Test^]
64 000003' 004361' 000000 [EXP MLAST!E23],,0
65 000004' 000000000000# TSTA36 ; failure test table
66 000005' 000000000000# TSTA37 ; ...
67 000006' 000000000000# TSTA40
68 000007' 000000000000# TSTA41
69 000010' 777777 777777 -1
70
71 ; Start test
72
73 000011' 201 00 0 00 000000' TG32: MOVEI Z6 ; get address of module start
74 000012' 260 17 0 00 000000* GO TRACE ; handle trace output
75 000013' 201 01 0 00 000032' MOVEI 1,T32M ; set up microcode address
76 000014' 260 17 0 00 000000* GO TLOAD ; load/verify it
77 000015' 263 17 0 00 000000 RTN ; failed - exit test
.MAIN MACRO %53A(1152) 10:04 16-Oct-84 Page 3
DFPTA6 MAC 19-Jan-83 11:22 Register Interference Tests SEQ 1184
78
79 ; 1st segment of test (Segment A) - Start up port and wait till it stops
80
81 000016' 400 15 0 00 000000 TA32: SETZ ERFLG, ; clear error flag
82 000017' 201 01 0 00 000040 MOVEI 1,^D32 ; maximum delay before timeout (msec)
83 000020' 201 02 0 00 004100 MOVEI 2,4100 ; error address
84 000021' 201 03 0 00 005000 MOVEI 3,5000 ; correct address
85 000022' 201 04 0 00 000001 MOVEI 4,1 ; starting address
86 000023' 260 17 0 00 000000* GO AEXEC ; execute ALU type test
87 000024' 474 15 0 00 000000 SETO ERFLG, ; error occurred
88 000025' 027 00 0 00 000031' SCOPER MA32 ; print error message
89 000026' 254 00 0 00 000016' JRST TA32 ; loop on error
90 000027' 254 00 0 00 000030' JRST TX32 ; altmode exit
91
92 ; End of test
93
94 000030' 263 17 0 00 000000 TX32: RTN ; return
95
96 ; Error message - Microcode did not stop in the right place
97
98 000031' 000000000000# MA32: LAST!CALL!TXALL!AAPNT ; print results of ALU type test
.MAIN MACRO %53A(1152) 10:04 16-Oct-84 Page 4
DFPTA6 MAC 19-Jan-83 11:22 Register Interference Tests SEQ 1185
99
100 ; Microcode:
101
102 000032' 000010 000000 T32M: MWORD <ADDR=0,JMAP,J=1000> ; 0
103 000033' 000000 000040
104 000034' 000100 000000 MWORD <JZ> ; 1
105 000035' 000000 000000
106
107 ; Subroutine to initialize RAM and Q register
108 ; contents
109
110 000036' 000200 000022 MWORD <CONT,B=0,SD0,OR,D=0,SKCN,MGC=22> ; 2
111 000037' 730000 240340
112 000040' 000300 000023 MWORD <CONT,B=0,SD0,OR,D=2,SKCN,MGC=23> ; 3
113 000041' 732000 240340
114 000042' 000400 000024 MWORD <CONT,B=1,SD0,OR,D=2,SKCN,MGC=24> ; 4
115 000043' 732000 640340
116 000044' 000500 000025 MWORD <CONT,B=2,SD0,OR,D=2,SKCN,MGC=25> ; 5
117 000045' 732001 240340
118 000046' 000600 000026 MWORD <CONT,B=3,SD0,OR,D=2,SKCN,MGC=26> ; 6
119 000047' 732001 640340
120 000050' 000700 000027 MWORD <CONT,B=4,SD0,OR,D=2,SKCN,MGC=27> ; 7
121 000051' 732002 240340
122 000052' 001000 000030 MWORD <CONT,B=5,SD0,OR,D=2,SKCN,MGC=30> ; 10
123 000053' 732002 640340
124 000054' 001100 000031 MWORD <CONT,B=6,SD0,OR,D=2,SKCN,MGC=31> ; 11
125 000055' 732003 240340
126 000056' 001200 000032 MWORD <CONT,B=7,SD0,OR,D=2,SKCN,MGC=32> ; 12
127 000057' 732003 640340
128 000060' 001300 000033 MWORD <CONT,B=10,SD0,OR,D=2,SKCN,MGC=33> ; 13
129 000061' 732004 240340
130 000062' 001400 000034 MWORD <CONT,B=11,SD0,OR,D=2,SKCN,MGC=34> ; 14
131 000063' 732004 640340
132 000064' 001500 000035 MWORD <CONT,B=12,SD0,OR,D=2,SKCN,MGC=35> ; 15
133 000065' 732005 240340
134 000066' 001600 000036 MWORD <CONT,B=13,SD0,OR,D=2,SKCN,MGC=36> ; 16
135 000067' 732005 640340
136 000070' 001700 000037 MWORD <CONT,B=14,SD0,OR,D=2,SKCN,MGC=37> ; 17
137 000071' 732006 240340
138 000072' 002000 000040 MWORD <CONT,B=15,SD0,OR,D=2,SKCN,MGC=40> ; 20
139 000073' 732006 640340
140 000074' 002100 000041 MWORD <CONT,B=16,SD0,OR,D=2,SKCN,MGC=41> ; 21
141 000075' 732007 240340
142 000076' 002200 000042 MWORD <CONT,B=17,SD0,OR,D=2,SKCN,MGC=42> ; 22
143 000077' 732007 640340
144 000100' 002300 000000 MWORD <CRTN,D=1> ; 23
145 000101' 001000 000240
146
147 ; Error checking routine - Register 0
148
149 000102' 400040 020000 MWORD <ADDR=4000,CJV,J=4002,S0A,OR,D=1,CENA,CCFZ> ; 4000
150 000103' 431400 020140
151 000104' 400140 010000 MWORD <JMAP,J=4001,BAD> ; 4001 error
152 000105' 000000 000041
153 000106' 400200 000000 MWORD <CRTN> ; 4002 return
.MAIN MACRO %53A(1152) 10:04 16-Oct-84 Page 4-1
DFPTA6 MAC 19-Jan-83 11:22 Register Interference Tests SEQ 1186
154 000107' 000000 000240
155
156 ; Error checking routine - Register 1
157
158 000110' 400340 050000 MWORD <CJV,J=4005,A=1,S0A,OR,D=1,CENA,CCFZ> ; 4003
159 000111' 431410 020140
160 000112' 400440 040000 MWORD <JMAP,J=4004,BAD> ; 4004 error
161 000113' 000000 000041
162 000114' 400500 000000 MWORD <CRTN> ; 4005 return
163 000115' 000000 000240
164
165 ; Error checking routine - Register 2
166
167 000116' 400640 100000 MWORD <CJV,J=4010,A=2,S0A,OR,D=1,CENA,CCFZ> ; 4006
168 000117' 431420 020140
169 000120' 400740 070000 MWORD <JMAP,J=4007,BAD> ; 4007 error
170 000121' 000000 000041
171 000122' 401000 000000 MWORD <CRTN> ; 4010 return
172 000123' 000000 000240
173
174 ; Error checking routine - Register 3
175
176 000124' 401140 130000 MWORD <CJV,J=4013,A=3,S0A,OR,D=1,CENA,CCFZ> ; 4011
177 000125' 431430 020140
178 000126' 401240 120000 MWORD <JMAP,J=4012,BAD> ; 4012 error
179 000127' 000000 000041
180 000130' 401300 000000 MWORD <CRTN> ; 4013 return
181 000131' 000000 000240
182
183 ; Error checking routine - Register 4
184
185 000132' 401440 160000 MWORD <CJV,J=4016,A=4,S0A,OR,D=1,CENA,CCFZ> ; 4014
186 000133' 431440 020140
187 000134' 401540 150000 MWORD <JMAP,J=4015,BAD> ; 4015 error
188 000135' 000000 000041
189 000136' 401600 000000 MWORD <CRTN> ; 4016 return
190 000137' 000000 000240
191
192 ; Error checking routine - Register 5
193
194 000140' 401740 210000 MWORD <CJV,J=4021,A=5,S0A,OR,D=1,CENA,CCFZ> ; 4017
195 000141' 431450 020140
196 000142' 402040 200000 MWORD <JMAP,J=4020,BAD> ; 4020 error
197 000143' 000000 000041
198 000144' 402100 000000 MWORD <CRTN> ; 4021 return
199 000145' 000000 000240
200
201 ; Error checking routine - Register 6
202
203 000146' 402240 240000 MWORD <CJV,J=4024,A=6,S0A,OR,D=1,CENA,CCFZ> ; 4022
204 000147' 431460 020140
205 000150' 402340 230000 MWORD <JMAP,J=4023,BAD> ; 4023 error
206 000151' 000000 000041
207 000152' 402400 000000 MWORD <CRTN> ; 4024 return
208 000153' 000000 000240
.MAIN MACRO %53A(1152) 10:04 16-Oct-84 Page 4-2
DFPTA6 MAC 19-Jan-83 11:22 Register Interference Tests SEQ 1187
209
210 ; Error checking routine - Register 7
211
212 000154' 402540 270000 MWORD <CJV,J=4027,A=7,S0A,OR,D=1,CENA,CCFZ> ; 4025
213 000155' 431470 020140
214 000156' 402640 260000 MWORD <JMAP,J=4026,BAD> ; 4026 error
215 000157' 000000 000041
216 000160' 402700 000000 MWORD <CRTN> ; 4027 return
217 000161' 000000 000240
218
219 ; Error checking routine - Register 10
220
221 000162' 403040 320000 MWORD <CJV,J=4032,A=10,S0A,OR,D=1,CENA,CCFZ> ; 4030
222 000163' 431500 020140
223 000164' 403140 310000 MWORD <JMAP,J=4031,BAD> ; 4031 error
224 000165' 000000 000041
225 000166' 403200 000000 MWORD <CRTN> ; 4032 return
226 000167' 000000 000240
227
228 ; Error checking routine - Register 11
229
230 000170' 403340 350000 MWORD <CJV,J=4035,A=11,S0A,OR,D=1,CENA,CCFZ> ; 4033
231 000171' 431510 020140
232 000172' 403440 340000 MWORD <JMAP,J=4034,BAD> ; 4034 error
233 000173' 000000 000041
234 000174' 403500 000000 MWORD <CRTN> ; 4035 return
235 000175' 000000 000240
236
237 ; Error checking routine - Register 12
238
239 000176' 403640 400000 MWORD <CJV,J=4040,A=12,S0A,OR,D=1,CENA,CCFZ> ; 4036
240 000177' 431520 020140
241 000200' 403740 370000 MWORD <JMAP,J=4037,BAD> ; 4037 error
242 000201' 000000 000041
243 000202' 404000 000000 MWORD <CRTN> ; 4040 return
244 000203' 000000 000240
245
246 ; Error checking routine - Register 13
247
248 000204' 404140 430000 MWORD <CJV,J=4043,A=13,S0A,OR,D=1,CENA,CCFZ> ; 4041
249 000205' 431530 020140
250 000206' 404240 420000 MWORD <JMAP,J=4042,BAD> ; 4042 error
251 000207' 000000 000041
252 000210' 404300 000000 MWORD <CRTN> ; 4043 return
253 000211' 000000 000240
254
255 ; Error checking routine - Register 14
256
257 000212' 404440 460000 MWORD <CJV,J=4046,A=14,S0A,OR,D=1,CENA,CCFZ> ; 4044
258 000213' 431540 020140
259 000214' 404540 450000 MWORD <JMAP,J=4045,BAD> ; 4045 error
260 000215' 000000 000041
261 000216' 404600 000000 MWORD <CRTN> ; 4046 return
262 000217' 000000 000240
263
.MAIN MACRO %53A(1152) 10:04 16-Oct-84 Page 4-3
DFPTA6 MAC 19-Jan-83 11:22 Register Interference Tests SEQ 1188
264 ; Error checking routine - Register 15
265
266 000220' 404740 510000 MWORD <CJV,J=4051,A=15,S0A,OR,D=1,CENA,CCFZ> ; 4047
267 000221' 431550 020140
268 000222' 405040 500000 MWORD <JMAP,J=4050,BAD> ; 4050 error
269 000223' 000000 000041
270 000224' 405100 000000 MWORD <CRTN> ; 4051 return
271 000225' 000000 000240
272
273 ; Error checking routine - Register 16
274
275 000226' 405240 540000 MWORD <CJV,J=4054,A=16,S0A,OR,D=1,CENA,CCFZ> ; 4052
276 000227' 431560 020140
277 000230' 405340 530000 MWORD <JMAP,J=4053,BAD> ; 4053 error
278 000231' 000000 000041
279 000232' 405400 000000 MWORD <CRTN> ; 4054 return
280 000233' 000000 000240
281
282 ; Error checking routine - Register 17
283
284 000234' 405540 570000 MWORD <CJV,J=4057,A=17,S0A,OR,D=1,CENA,CCFZ> ; 4055
285 000235' 431570 020140
286 000236' 405640 560000 MWORD <JMAP,J=4056,BAD> ; 4056 error
287 000237' 000000 000041
288 000240' 405700 000000 MWORD <CRTN> ; 4057 return
289 000241' 000000 000240
290
291 ; Error/Done locations
292
293 000242' 410041 000000 MWORD <ADDR=4100,JMAP,J=4100,BAD> ; 4100 error
294 000243' 000000 000041
295 000244' 500050 000000 MWORD <ADDR=5000,JMAP,J=5000,BAD> ; 5000 done ok
296 000245' 000000 000041
297
298 ; Register 0
299
300 000246' 100000 020000 MWORD <ADDR=1000,CJS,J=2> ; 1000
301 000247' 000000 000020
302 000250' 100100 000000 MWORD <CONT,A=0,B=0,S0A,AND,D=2> ; 1001
303 000251' 442000 000340
304
305 000252' 100200 001777 MWORD <CONT,A=0,B=10,SAQ,PLUS,D=0,SKCN,MGC=1777> ; 1002
306 000253' 000004 240340
307 000254' 100340 000000 MWORD <CJS,J=4000,A=0,S0A,OR,D=1> ; 1003
308 000255' 431000 000020
309 000256' 100400 001777 MWORD <CONT,A=1,B=11,SAB,SMIN,D=1,SKCN,MGC=1777> ; 1004
310 000257' 111014 640340
311 000260' 100540 000000 MWORD <CJS,J=4000,A=0,S0A,OR,D=1> ; 1005
312 000261' 431000 000020
313 000262' 100600 001777 MWORD <CONT,A=2,B=12,SAQ,RMIN,D=2,SKCN,MGC=1777> ; 1006
314 000263' 022025 240340
315 000264' 100740 000000 MWORD <CJS,J=4000,A=0,S0A,OR,D=1> ; 1007
316 000265' 431000 000020
317 000266' 101000 001777 MWORD <CONT,A=3,B=13,SAB,OR,D=3,SKCN,MGC=1777> ; 1010
318 000267' 133035 640340
.MAIN MACRO %53A(1152) 10:04 16-Oct-84 Page 4-4
DFPTA6 MAC 19-Jan-83 11:22 Register Interference Tests SEQ 1189
319 000270' 101140 000000 MWORD <CJS,J=4000,A=0,S0A,OR,D=1> ; 1011
320 000271' 431000 000020
321 000272' 101200 001777 MWORD <CONT,A=4,B=14,SAQ,AND,D=4,SKCN,MGC=1777> ; 1012
322 000273' 044046 240340
323 000274' 101340 000000 MWORD <CJS,J=4000,A=0,S0A,OR,D=1> ; 1013
324 000275' 431000 000020
325 000276' 101400 001777 MWORD <CONT,A=5,B=15,SAB,NAND,D=5,SKCN,MGC=1777> ; 1014
326 000277' 155056 640340
327 000300' 101540 000000 MWORD <CJS,J=4000,A=0,S0A,OR,D=1> ; 1015
328 000301' 431000 000020
329 000302' 101600 001777 MWORD <CONT,A=6,B=16,SAQ,XOR,D=6,SKCN,MGC=1777> ; 1016
330 000303' 066067 240340
331 000304' 101740 000000 MWORD <CJS,J=4000,A=0,S0A,OR,D=1> ; 1017
332 000305' 431000 000020
333 000306' 102000 001777 MWORD <CONT,A=7,B=17,SAB,XNOR,D=7,SKCN,MGC=1777> ; 1020
334 000307' 177077 640340
335 000310' 102140 000000 MWORD <CJS,J=4000,A=0,S0A,OR,D=1> ; 1021
336 000311' 431000 000020
337
338 000312' 102200 001777 MWORD <CONT,A=0,B=10,S0Q,XNOR,D=0,SKCN,MGC=1777> ; 1022
339 000313' 270004 240340
340 000314' 102340 000000 MWORD <CJS,J=4000,A=0,S0A,OR,D=1> ; 1023
341 000315' 431000 000020
342 000316' 102400 001777 MWORD <CONT,A=1,B=11,S0B,XOR,D=1,SKCN,MGC=1777> ; 1024
343 000317' 361014 640340
344 000320' 102540 000000 MWORD <CJS,J=4000,A=0,S0A,OR,D=1> ; 1025
345 000321' 431000 000020
346 000322' 102600 001777 MWORD <CONT,A=2,B=12,S0Q,NAND,D=2,SKCN,MGC=1777> ; 1026
347 000323' 252025 240340
348 000324' 102740 000000 MWORD <CJS,J=4000,A=0,S0A,OR,D=1> ; 1027
349 000325' 431000 000020
350 000326' 103000 001777 MWORD <CONT,A=3,B=13,S0B,AND,D=3,SKCN,MGC=1777> ; 1030
351 000327' 343035 640340
352 000330' 103140 000000 MWORD <CJS,J=4000,A=0,S0A,OR,D=1> ; 1031
353 000331' 431000 000020
354 000332' 103200 001777 MWORD <CONT,A=4,B=14,S0Q,OR,D=4,SKCN,MGC=1777> ; 1032
355 000333' 234046 240340
356 000334' 103340 000000 MWORD <CJS,J=4000,A=0,S0A,OR,D=1> ; 1033
357 000335' 431000 000020
358 000336' 103400 001777 MWORD <CONT,A=5,B=15,S0B,RMIN,D=5,SKCN,MGC=1777> ; 1034
359 000337' 325056 640340
360 000340' 103540 000000 MWORD <CJS,J=4000,A=0,S0A,OR,D=1> ; 1035
361 000341' 431000 000020
362 000342' 103600 001777 MWORD <CONT,A=6,B=16,S0Q,SMIN,D=6,SKCN,MGC=1777> ; 1036
363 000343' 216067 240340
364 000344' 103740 000000 MWORD <CJS,J=4000,A=0,S0A,OR,D=1> ; 1037
365 000345' 431000 000020
366 000346' 104000 001777 MWORD <CONT,A=7,B=17,S0B,PLUS,D=7,SKCN,MGC=1777> ; 1040
367 000347' 307077 640340
368 000350' 104140 000000 MWORD <CJS,J=4000,A=0,S0A,OR,D=1> ; 1041
369 000351' 431000 000020
370
371 000352' 104200 001777 MWORD <CONT,A=0,B=10,S0A,PLUS,D=0,SKCN,MGC=1777> ; 1042
372 000353' 400004 240340
373 000354' 104340 000000 MWORD <CJS,J=4000,A=0,S0A,OR,D=1> ; 1043
.MAIN MACRO %53A(1152) 10:04 16-Oct-84 Page 4-5
DFPTA6 MAC 19-Jan-83 11:22 Register Interference Tests SEQ 1190
374 000355' 431000 000020
375 000356' 104400 001777 MWORD <CONT,A=1,B=11,SDA,SMIN,D=1,SKCN,MGC=1777> ; 1044
376 000357' 511014 640340
377 000360' 104540 000000 MWORD <CJS,J=4000,A=0,S0A,OR,D=1> ; 1045
378 000361' 431000 000020
379 000362' 104600 001777 MWORD <CONT,A=2,B=12,S0A,RMIN,D=2,SKCN,MGC=1777> ; 1046
380 000363' 422025 240340
381 000364' 104740 000000 MWORD <CJS,J=4000,A=0,S0A,OR,D=1> ; 1047
382 000365' 431000 000020
383 000366' 105000 001777 MWORD <CONT,A=3,B=13,SDA,OR,D=3,SKCN,MGC=1777> ; 1050
384 000367' 533035 640340
385 000370' 105140 000000 MWORD <CJS,J=4000,A=0,S0A,OR,D=1> ; 1051
386 000371' 431000 000020
387 000372' 105200 001777 MWORD <CONT,A=4,B=14,S0A,AND,D=4,SKCN,MGC=1777> ; 1052
388 000373' 444046 240340
389 000374' 105340 000000 MWORD <CJS,J=4000,A=0,S0A,OR,D=1> ; 1053
390 000375' 431000 000020
391 000376' 105400 001777 MWORD <CONT,A=5,B=15,SDA,NAND,D=5,SKCN,MGC=1777> ; 1054
392 000377' 555056 640340
393 000400' 105540 000000 MWORD <CJS,J=4000,A=0,S0A,OR,D=1> ; 1055
394 000401' 431000 000020
395 000402' 105600 001777 MWORD <CONT,A=6,B=16,S0A,XOR,D=6,SKCN,MGC=1777> ; 1056
396 000403' 466067 240340
397 000404' 105740 000000 MWORD <CJS,J=4000,A=0,S0A,OR,D=1> ; 1057
398 000405' 431000 000020
399 000406' 106000 001777 MWORD <CONT,A=7,B=17,SDA,XNOR,D=7,SKCN,MGC=1777> ; 1060
400 000407' 577077 640340
401 000410' 106140 000000 MWORD <CJS,J=4000,A=0,S0A,OR,D=1> ; 1061
402 000411' 431000 000020
403
404 000412' 106200 001777 MWORD <CONT,A=0,B=10,SDQ,XNOR,D=0,SKCN,MGC=1777> ; 1062
405 000413' 670004 240340
406 000414' 106340 000000 MWORD <CJS,J=4000,A=0,S0A,OR,D=1> ; 1063
407 000415' 431000 000020
408 000416' 106400 001777 MWORD <CONT,A=1,B=11,SD0,XOR,D=1,SKCN,MGC=1777> ; 1064
409 000417' 761014 640340
410 000420' 106540 000000 MWORD <CJS,J=4000,A=0,S0A,OR,D=1> ; 1065
411 000421' 431000 000020
412 000422' 106600 001777 MWORD <CONT,A=2,B=12,SDQ,NAND,D=2,SKCN,MGC=1777> ; 1066
413 000423' 652025 240340
414 000424' 106740 000000 MWORD <CJS,J=4000,A=0,S0A,OR,D=1> ; 1067
415 000425' 431000 000020
416 000426' 107000 001777 MWORD <CONT,A=3,B=13,SD0,AND,D=3,SKCN,MGC=1777> ; 1070
417 000427' 743035 640340
418 000430' 107140 000000 MWORD <CJS,J=4000,A=0,S0A,OR,D=1> ; 1071
419 000431' 431000 000020
420 000432' 107200 001777 MWORD <CONT,A=4,B=14,SDQ,OR,D=4,SKCN,MGC=1777> ; 1072
421 000433' 634046 240340
422 000434' 107340 000000 MWORD <CJS,J=4000,A=0,S0A,OR,D=1> ; 1073
423 000435' 431000 000020
424 000436' 107400 001777 MWORD <CONT,A=5,B=15,SD0,RMIN,D=5,SKCN,MGC=1777> ; 1074
425 000437' 725056 640340
426 000440' 107540 000000 MWORD <CJS,J=4000,A=0,S0A,OR,D=1> ; 1075
427 000441' 431000 000020
428 000442' 107600 001777 MWORD <CONT,A=6,B=16,SDQ,SMIN,D=6,SKCN,MGC=1777> ; 1076
.MAIN MACRO %53A(1152) 10:04 16-Oct-84 Page 4-6
DFPTA6 MAC 19-Jan-83 11:22 Register Interference Tests SEQ 1191
429 000443' 616067 240340
430 000444' 107740 000000 MWORD <CJS,J=4000,A=0,S0A,OR,D=1> ; 1077
431 000445' 431000 000020
432 000446' 110000 001777 MWORD <CONT,A=7,B=17,SD0,PLUS,D=7,SKCN,MGC=1777> ; 1100
433 000447' 707077 640340
434 000450' 110140 000000 MWORD <CJS,J=4000,A=0,S0A,OR,D=1> ; 1101
435 000451' 431000 000020
436
437 ; Now do register 1
438
439 000452' 110200 020000 MWORD <CJS,J=2> ; 1102
440 000453' 000000 000020
441 000454' 110300 000000 MWORD <CONT,A=0,B=1,S0A,AND,D=2> ; 1103
442 000455' 442000 400340
443
444 000456' 110400 001777 MWORD <CONT,A=1,B=10,SAQ,PLUS,D=0,SKCN,MGC=1777> ; 1104
445 000457' 000014 240340
446 000460' 110540 030000 MWORD <CJS,J=4003,A=1,S0A,OR,D=1> ; 1105
447 000461' 431010 000020
448 000462' 110600 001777 MWORD <CONT,A=1,B=11,SAB,SMIN,D=1,SKCN,MGC=1777> ; 1106
449 000463' 111014 640340
450 000464' 110740 030000 MWORD <CJS,J=4003,A=1,S0A,OR,D=1> ; 1107
451 000465' 431010 000020
452 000466' 111000 001777 MWORD <CONT,A=2,B=12,SAQ,RMIN,D=2,SKCN,MGC=1777> ; 1110
453 000467' 022025 240340
454 000470' 111140 030000 MWORD <CJS,J=4003,A=1,S0A,OR,D=1> ; 1111
455 000471' 431010 000020
456 000472' 111200 001777 MWORD <CONT,A=3,B=13,SAB,OR,D=3,SKCN,MGC=1777> ; 1112
457 000473' 133035 640340
458 000474' 111340 030000 MWORD <CJS,J=4003,A=1,S0A,OR,D=1> ; 1113
459 000475' 431010 000020
460 000476' 111400 001777 MWORD <CONT,A=4,B=14,SAQ,AND,D=4,SKCN,MGC=1777> ; 1114
461 000477' 044046 240340
462 000500' 111540 030000 MWORD <CJS,J=4003,A=1,S0A,OR,D=1> ; 1115
463 000501' 431010 000020
464 000502' 111600 001777 MWORD <CONT,A=5,B=15,SAB,NAND,D=5,SKCN,MGC=1777> ; 1116
465 000503' 155056 640340
466 000504' 111740 030000 MWORD <CJS,J=4003,A=1,S0A,OR,D=1> ; 1117
467 000505' 431010 000020
468 000506' 112000 001777 MWORD <CONT,A=6,B=16,SAQ,XOR,D=6,SKCN,MGC=1777> ; 1120
469 000507' 066067 240340
470 000510' 112140 030000 MWORD <CJS,J=4003,A=1,S0A,OR,D=1> ; 1121
471 000511' 431010 000020
472 000512' 112200 001777 MWORD <CONT,A=7,B=17,SAB,XNOR,D=7,SKCN,MGC=1777> ; 1122
473 000513' 177077 640340
474 000514' 112340 030000 MWORD <CJS,J=4003,A=1,S0A,OR,D=1> ; 1123
475 000515' 431010 000020
476
477 000516' 112400 001777 MWORD <CONT,A=1,B=10,S0Q,XNOR,D=0,SKCN,MGC=1777> ; 1124
478 000517' 270014 240340
479 000520' 112540 030000 MWORD <CJS,J=4003,A=1,S0A,OR,D=1> ; 1125
480 000521' 431010 000020
481 000522' 112600 001777 MWORD <CONT,A=1,B=11,S0B,XOR,D=1,SKCN,MGC=1777> ; 1126
482 000523' 361014 640340
483 000524' 112740 030000 MWORD <CJS,J=4003,A=1,S0A,OR,D=1> ; 1127
.MAIN MACRO %53A(1152) 10:04 16-Oct-84 Page 4-7
DFPTA6 MAC 19-Jan-83 11:22 Register Interference Tests SEQ 1192
484 000525' 431010 000020
485 000526' 113000 001777 MWORD <CONT,A=2,B=12,S0Q,NAND,D=2,SKCN,MGC=1777> ; 1130
486 000527' 252025 240340
487 000530' 113140 030000 MWORD <CJS,J=4003,A=1,S0A,OR,D=1> ; 1131
488 000531' 431010 000020
489 000532' 113200 001777 MWORD <CONT,A=3,B=13,S0B,AND,D=3,SKCN,MGC=1777> ; 1132
490 000533' 343035 640340
491 000534' 113340 030000 MWORD <CJS,J=4003,A=1,S0A,OR,D=1> ; 1133
492 000535' 431010 000020
493 000536' 113400 001777 MWORD <CONT,A=4,B=14,S0Q,OR,D=4,SKCN,MGC=1777> ; 1134
494 000537' 234046 240340
495 000540' 113540 030000 MWORD <CJS,J=4003,A=1,S0A,OR,D=1> ; 1135
496 000541' 431010 000020
497 000542' 113600 001777 MWORD <CONT,A=5,B=15,S0B,RMIN,D=5,SKCN,MGC=1777> ; 1136
498 000543' 325056 640340
499 000544' 113740 030000 MWORD <CJS,J=4003,A=1,S0A,OR,D=1> ; 1137
500 000545' 431010 000020
501 000546' 114000 001777 MWORD <CONT,A=6,B=16,S0Q,SMIN,D=6,SKCN,MGC=1777> ; 1140
502 000547' 216067 240340
503 000550' 114140 030000 MWORD <CJS,J=4003,A=1,S0A,OR,D=1> ; 1141
504 000551' 431010 000020
505 000552' 114200 001777 MWORD <CONT,A=7,B=17,S0B,PLUS,D=7,SKCN,MGC=1777> ; 1142
506 000553' 307077 640340
507 000554' 114340 030000 MWORD <CJS,J=4003,A=1,S0A,OR,D=1> ; 1143
508 000555' 431010 000020
509
510 000556' 114400 001777 MWORD <CONT,A=1,B=10,S0A,PLUS,D=0,SKCN,MGC=1777> ; 1144
511 000557' 400014 240340
512 000560' 114540 030000 MWORD <CJS,J=4003,A=1,S0A,OR,D=1> ; 1145
513 000561' 431010 000020
514 000562' 114600 001777 MWORD <CONT,A=1,B=11,SDA,SMIN,D=1,SKCN,MGC=1777> ; 1146
515 000563' 511014 640340
516 000564' 114740 030000 MWORD <CJS,J=4003,A=1,S0A,OR,D=1> ; 1147
517 000565' 431010 000020
518 000566' 115000 001777 MWORD <CONT,A=2,B=12,S0A,RMIN,D=2,SKCN,MGC=1777> ; 1150
519 000567' 422025 240340
520 000570' 115140 030000 MWORD <CJS,J=4003,A=1,S0A,OR,D=1> ; 1151
521 000571' 431010 000020
522 000572' 115200 001777 MWORD <CONT,A=3,B=13,SDA,OR,D=3,SKCN,MGC=1777> ; 1152
523 000573' 533035 640340
524 000574' 115340 030000 MWORD <CJS,J=4003,A=1,S0A,OR,D=1> ; 1153
525 000575' 431010 000020
526 000576' 115400 001777 MWORD <CONT,A=4,B=14,S0A,AND,D=4,SKCN,MGC=1777> ; 1154
527 000577' 444046 240340
528 000600' 115540 030000 MWORD <CJS,J=4003,A=1,S0A,OR,D=1> ; 1155
529 000601' 431010 000020
530 000602' 115600 001777 MWORD <CONT,A=5,B=15,SDA,NAND,D=5,SKCN,MGC=1777> ; 1156
531 000603' 555056 640340
532 000604' 115740 030000 MWORD <CJS,J=4003,A=1,S0A,OR,D=1> ; 1157
533 000605' 431010 000020
534 000606' 116000 001777 MWORD <CONT,A=6,B=16,S0A,XOR,D=6,SKCN,MGC=1777> ; 1160
535 000607' 466067 240340
536 000610' 116140 030000 MWORD <CJS,J=4003,A=1,S0A,OR,D=1> ; 1161
537 000611' 431010 000020
538 000612' 116200 001777 MWORD <CONT,A=7,B=17,SDA,XNOR,D=7,SKCN,MGC=1777> ; 1162
.MAIN MACRO %53A(1152) 10:04 16-Oct-84 Page 4-8
DFPTA6 MAC 19-Jan-83 11:22 Register Interference Tests SEQ 1193
539 000613' 577077 640340
540 000614' 116340 030000 MWORD <CJS,J=4003,A=1,S0A,OR,D=1> ; 1163
541 000615' 431010 000020
542
543 000616' 116400 001777 MWORD <CONT,A=1,B=10,SDQ,XNOR,D=0,SKCN,MGC=1777> ; 1164
544 000617' 670014 240340
545 000620' 116540 030000 MWORD <CJS,J=4003,A=1,S0A,OR,D=1> ; 1165
546 000621' 431010 000020
547 000622' 116600 001777 MWORD <CONT,A=1,B=11,SD0,XOR,D=1,SKCN,MGC=1777> ; 1166
548 000623' 761014 640340
549 000624' 116740 030000 MWORD <CJS,J=4003,A=1,S0A,OR,D=1> ; 1167
550 000625' 431010 000020
551 000626' 117000 001777 MWORD <CONT,A=2,B=12,SDQ,NAND,D=2,SKCN,MGC=1777> ; 1170
552 000627' 652025 240340
553 000630' 117140 030000 MWORD <CJS,J=4003,A=1,S0A,OR,D=1> ; 1171
554 000631' 431010 000020
555 000632' 117200 001777 MWORD <CONT,A=3,B=13,SD0,AND,D=3,SKCN,MGC=1777> ; 1172
556 000633' 743035 640340
557 000634' 117340 030000 MWORD <CJS,J=4003,A=1,S0A,OR,D=1> ; 1173
558 000635' 431010 000020
559 000636' 117400 001777 MWORD <CONT,A=4,B=14,SDQ,OR,D=4,SKCN,MGC=1777> ; 1174
560 000637' 634046 240340
561 000640' 117540 030000 MWORD <CJS,J=4003,A=1,S0A,OR,D=1> ; 1175
562 000641' 431010 000020
563 000642' 117600 001777 MWORD <CONT,A=5,B=15,SD0,RMIN,D=5,SKCN,MGC=1777> ; 1176
564 000643' 725056 640340
565 000644' 117740 030000 MWORD <CJS,J=4003,A=1,S0A,OR,D=1> ; 1177
566 000645' 431010 000020
567 000646' 120000 001777 MWORD <CONT,A=6,B=16,SDQ,SMIN,D=6,SKCN,MGC=1777> ; 1200
568 000647' 616067 240340
569 000650' 120140 030000 MWORD <CJS,J=4003,A=1,S0A,OR,D=1> ; 1201
570 000651' 431010 000020
571 000652' 120200 001777 MWORD <CONT,A=7,B=17,SD0,PLUS,D=7,SKCN,MGC=1777> ; 1202
572 000653' 707077 640340
573 000654' 120340 030000 MWORD <CJS,J=4003,A=1,S0A,OR,D=1> ; 1203
574 000655' 431010 000020
575
576 ; Now do register 2
577
578 000656' 120400 020000 MWORD <CJS,J=2> ; 1204
579 000657' 000000 000020
580 000660' 120500 000000 MWORD <CONT,A=0,B=2,S0A,AND,D=2> ; 1205
581 000661' 442001 000340
582
583 000662' 120600 001777 MWORD <CONT,A=2,B=10,SAQ,PLUS,D=0,SKCN,MGC=1777> ; 1206
584 000663' 000024 240340
585 000664' 120740 060000 MWORD <CJS,J=4006,A=2,S0A,OR,D=1> ; 1207
586 000665' 431020 000020
587 000666' 121000 001777 MWORD <CONT,A=1,B=11,SAB,SMIN,D=1,SKCN,MGC=1777> ; 1210
588 000667' 111014 640340
589 000670' 121140 060000 MWORD <CJS,J=4006,A=2,S0A,OR,D=1> ; 1211
590 000671' 431020 000020
591 000672' 121200 001777 MWORD <CONT,A=2,B=12,SAQ,RMIN,D=2,SKCN,MGC=1777> ; 1212
592 000673' 022025 240340
593 000674' 121340 060000 MWORD <CJS,J=4006,A=2,S0A,OR,D=1> ; 1213
.MAIN MACRO %53A(1152) 10:04 16-Oct-84 Page 4-9
DFPTA6 MAC 19-Jan-83 11:22 Register Interference Tests SEQ 1194
594 000675' 431020 000020
595 000676' 121400 001777 MWORD <CONT,A=3,B=13,SAB,OR,D=3,SKCN,MGC=1777> ; 1214
596 000677' 133035 640340
597 000700' 121540 060000 MWORD <CJS,J=4006,A=2,S0A,OR,D=1> ; 1215
598 000701' 431020 000020
599 000702' 121600 001777 MWORD <CONT,A=4,B=14,SAQ,AND,D=4,SKCN,MGC=1777> ; 1216
600 000703' 044046 240340
601 000704' 121740 060000 MWORD <CJS,J=4006,A=2,S0A,OR,D=1> ; 1217
602 000705' 431020 000020
603 000706' 122000 001777 MWORD <CONT,A=5,B=15,SAB,NAND,D=5,SKCN,MGC=1777> ; 1220
604 000707' 155056 640340
605 000710' 122140 060000 MWORD <CJS,J=4006,A=2,S0A,OR,D=1> ; 1221
606 000711' 431020 000020
607 000712' 122200 001777 MWORD <CONT,A=6,B=16,SAQ,XOR,D=6,SKCN,MGC=1777> ; 1222
608 000713' 066067 240340
609 000714' 122340 060000 MWORD <CJS,J=4006,A=2,S0A,OR,D=1> ; 1223
610 000715' 431020 000020
611 000716' 122400 001777 MWORD <CONT,A=7,B=17,SAB,XNOR,D=7,SKCN,MGC=1777> ; 1224
612 000717' 177077 640340
613 000720' 122540 060000 MWORD <CJS,J=4006,A=2,S0A,OR,D=1> ; 1225
614 000721' 431020 000020
615
616 000722' 122600 001777 MWORD <CONT,A=2,B=10,S0Q,XNOR,D=0,SKCN,MGC=1777> ; 1226
617 000723' 270024 240340
618 000724' 122740 060000 MWORD <CJS,J=4006,A=2,S0A,OR,D=1> ; 1227
619 000725' 431020 000020
620 000726' 123000 001777 MWORD <CONT,A=1,B=11,S0B,XOR,D=1,SKCN,MGC=1777> ; 1230
621 000727' 361014 640340
622 000730' 123140 060000 MWORD <CJS,J=4006,A=2,S0A,OR,D=1> ; 1231
623 000731' 431020 000020
624 000732' 123200 001777 MWORD <CONT,A=2,B=12,S0Q,NAND,D=2,SKCN,MGC=1777> ; 1232
625 000733' 252025 240340
626 000734' 123340 060000 MWORD <CJS,J=4006,A=2,S0A,OR,D=1> ; 1233
627 000735' 431020 000020
628 000736' 123400 001777 MWORD <CONT,A=3,B=13,S0B,AND,D=3,SKCN,MGC=1777> ; 1234
629 000737' 343035 640340
630 000740' 123540 060000 MWORD <CJS,J=4006,A=2,S0A,OR,D=1> ; 1235
631 000741' 431020 000020
632 000742' 123600 001777 MWORD <CONT,A=4,B=14,S0Q,OR,D=4,SKCN,MGC=1777> ; 1236
633 000743' 234046 240340
634 000744' 123740 060000 MWORD <CJS,J=4006,A=2,S0A,OR,D=1> ; 1237
635 000745' 431020 000020
636 000746' 124000 001777 MWORD <CONT,A=5,B=15,S0B,RMIN,D=5,SKCN,MGC=1777> ; 1240
637 000747' 325056 640340
638 000750' 124140 060000 MWORD <CJS,J=4006,A=2,S0A,OR,D=1> ; 1241
639 000751' 431020 000020
640 000752' 124200 001777 MWORD <CONT,A=6,B=16,S0Q,SMIN,D=6,SKCN,MGC=1777> ; 1242
641 000753' 216067 240340
642 000754' 124340 060000 MWORD <CJS,J=4006,A=2,S0A,OR,D=1> ; 1243
643 000755' 431020 000020
644 000756' 124400 001777 MWORD <CONT,A=7,B=17,S0B,PLUS,D=7,SKCN,MGC=1777> ; 1244
645 000757' 307077 640340
646 000760' 124540 060000 MWORD <CJS,J=4006,A=2,S0A,OR,D=1> ; 1245
647 000761' 431020 000020
648
.MAIN MACRO %53A(1152) 10:04 16-Oct-84 Page 4-10
DFPTA6 MAC 19-Jan-83 11:22 Register Interference Tests SEQ 1195
649 000762' 124600 001777 MWORD <CONT,A=2,B=10,S0A,PLUS,D=0,SKCN,MGC=1777> ; 1246
650 000763' 400024 240340
651 000764' 124740 060000 MWORD <CJS,J=4006,A=2,S0A,OR,D=1> ; 1247
652 000765' 431020 000020
653 000766' 125000 001777 MWORD <CONT,A=1,B=11,SDA,SMIN,D=1,SKCN,MGC=1777> ; 1250
654 000767' 511014 640340
655 000770' 125140 060000 MWORD <CJS,J=4006,A=2,S0A,OR,D=1> ; 1251
656 000771' 431020 000020
657 000772' 125200 001777 MWORD <CONT,A=2,B=12,S0A,RMIN,D=2,SKCN,MGC=1777> ; 1252
658 000773' 422025 240340
659 000774' 125340 060000 MWORD <CJS,J=4006,A=2,S0A,OR,D=1> ; 1253
660 000775' 431020 000020
661 000776' 125400 001777 MWORD <CONT,A=3,B=13,SDA,OR,D=3,SKCN,MGC=1777> ; 1254
662 000777' 533035 640340
663 001000' 125540 060000 MWORD <CJS,J=4006,A=2,S0A,OR,D=1> ; 1255
664 001001' 431020 000020
665 001002' 125600 001777 MWORD <CONT,A=4,B=14,S0A,AND,D=4,SKCN,MGC=1777> ; 1256
666 001003' 444046 240340
667 001004' 125740 060000 MWORD <CJS,J=4006,A=2,S0A,OR,D=1> ; 1257
668 001005' 431020 000020
669 001006' 126000 001777 MWORD <CONT,A=5,B=15,SDA,NAND,D=5,SKCN,MGC=1777> ; 1260
670 001007' 555056 640340
671 001010' 126140 060000 MWORD <CJS,J=4006,A=2,S0A,OR,D=1> ; 1261
672 001011' 431020 000020
673 001012' 126200 001777 MWORD <CONT,A=6,B=16,S0A,XOR,D=6,SKCN,MGC=1777> ; 1262
674 001013' 466067 240340
675 001014' 126340 060000 MWORD <CJS,J=4006,A=2,S0A,OR,D=1> ; 1263
676 001015' 431020 000020
677 001016' 126400 001777 MWORD <CONT,A=7,B=17,SDA,XNOR,D=7,SKCN,MGC=1777> ; 1264
678 001017' 577077 640340
679 001020' 126540 060000 MWORD <CJS,J=4006,A=2,S0A,OR,D=1> ; 1265
680 001021' 431020 000020
681
682 001022' 126600 001777 MWORD <CONT,A=2,B=10,SDQ,XNOR,D=0,SKCN,MGC=1777> ; 1266
683 001023' 670024 240340
684 001024' 126740 060000 MWORD <CJS,J=4006,A=2,S0A,OR,D=1> ; 1267
685 001025' 431020 000020
686 001026' 127000 001777 MWORD <CONT,A=1,B=11,SD0,XOR,D=1,SKCN,MGC=1777> ; 1270
687 001027' 761014 640340
688 001030' 127140 060000 MWORD <CJS,J=4006,A=2,S0A,OR,D=1> ; 1271
689 001031' 431020 000020
690 001032' 127200 001777 MWORD <CONT,A=2,B=12,SDQ,NAND,D=2,SKCN,MGC=1777> ; 1272
691 001033' 652025 240340
692 001034' 127340 060000 MWORD <CJS,J=4006,A=2,S0A,OR,D=1> ; 1273
693 001035' 431020 000020
694 001036' 127400 001777 MWORD <CONT,A=3,B=13,SD0,AND,D=3,SKCN,MGC=1777> ; 1274
695 001037' 743035 640340
696 001040' 127540 060000 MWORD <CJS,J=4006,A=2,S0A,OR,D=1> ; 1275
697 001041' 431020 000020
698 001042' 127600 001777 MWORD <CONT,A=4,B=14,SDQ,OR,D=4,SKCN,MGC=1777> ; 1276
699 001043' 634046 240340
700 001044' 127740 060000 MWORD <CJS,J=4006,A=2,S0A,OR,D=1> ; 1277
701 001045' 431020 000020
702 001046' 130000 001777 MWORD <CONT,A=5,B=15,SD0,RMIN,D=5,SKCN,MGC=1777> ; 1300
703 001047' 725056 640340
.MAIN MACRO %53A(1152) 10:04 16-Oct-84 Page 4-11
DFPTA6 MAC 19-Jan-83 11:22 Register Interference Tests SEQ 1196
704 001050' 130140 060000 MWORD <CJS,J=4006,A=2,S0A,OR,D=1> ; 1301
705 001051' 431020 000020
706 001052' 130200 001777 MWORD <CONT,A=6,B=16,SDQ,SMIN,D=6,SKCN,MGC=1777> ; 1302
707 001053' 616067 240340
708 001054' 130340 060000 MWORD <CJS,J=4006,A=2,S0A,OR,D=1> ; 1303
709 001055' 431020 000020
710 001056' 130400 001777 MWORD <CONT,A=7,B=17,SD0,PLUS,D=7,SKCN,MGC=1777> ; 1304
711 001057' 707077 640340
712 001060' 130540 060000 MWORD <CJS,J=4006,A=2,S0A,OR,D=1> ; 1305
713 001061' 431020 000020
714
715 ; Now do register 3
716
717 001062' 130600 020000 MWORD <CJS,J=2> ; 1306
718 001063' 000000 000020
719 001064' 130700 000000 MWORD <CONT,A=0,B=3,S0A,AND,D=2> ; 1307
720 001065' 442001 400340
721
722 001066' 131000 001777 MWORD <CONT,A=3,B=10,SAQ,PLUS,D=0,SKCN,MGC=1777> ; 1310
723 001067' 000034 240340
724 001070' 131140 110000 MWORD <CJS,J=4011,A=3,S0A,OR,D=1> ; 1311
725 001071' 431030 000020
726 001072' 131200 001777 MWORD <CONT,A=1,B=11,SAB,SMIN,D=1,SKCN,MGC=1777> ; 1312
727 001073' 111014 640340
728 001074' 131340 110000 MWORD <CJS,J=4011,A=3,S0A,OR,D=1> ; 1313
729 001075' 431030 000020
730 001076' 131400 001777 MWORD <CONT,A=2,B=12,SAQ,RMIN,D=2,SKCN,MGC=1777> ; 1314
731 001077' 022025 240340
732 001100' 131540 110000 MWORD <CJS,J=4011,A=3,S0A,OR,D=1> ; 1315
733 001101' 431030 000020
734 001102' 131600 001777 MWORD <CONT,A=3,B=13,SAB,OR,D=3,SKCN,MGC=1777> ; 1316
735 001103' 133035 640340
736 001104' 131740 110000 MWORD <CJS,J=4011,A=3,S0A,OR,D=1> ; 1317
737 001105' 431030 000020
738 001106' 132000 001777 MWORD <CONT,A=4,B=14,SAQ,AND,D=4,SKCN,MGC=1777> ; 1320
739 001107' 044046 240340
740 001110' 132140 110000 MWORD <CJS,J=4011,A=3,S0A,OR,D=1> ; 1321
741 001111' 431030 000020
742 001112' 132200 001777 MWORD <CONT,A=5,B=15,SAB,NAND,D=5,SKCN,MGC=1777> ; 1322
743 001113' 155056 640340
744 001114' 132340 110000 MWORD <CJS,J=4011,A=3,S0A,OR,D=1> ; 1323
745 001115' 431030 000020
746 001116' 132400 001777 MWORD <CONT,A=6,B=16,SAQ,XOR,D=6,SKCN,MGC=1777> ; 1324
747 001117' 066067 240340
748 001120' 132540 110000 MWORD <CJS,J=4011,A=3,S0A,OR,D=1> ; 1325
749 001121' 431030 000020
750 001122' 132600 001777 MWORD <CONT,A=7,B=17,SAB,XNOR,D=7,SKCN,MGC=1777> ; 1326
751 001123' 177077 640340
752 001124' 132740 110000 MWORD <CJS,J=4011,A=3,S0A,OR,D=1> ; 1327
753 001125' 431030 000020
754
755 001126' 133000 001777 MWORD <CONT,A=3,B=10,S0Q,XNOR,D=0,SKCN,MGC=1777> ; 1330
756 001127' 270034 240340
757 001130' 133140 110000 MWORD <CJS,J=4011,A=3,S0A,OR,D=1> ; 1331
758 001131' 431030 000020
.MAIN MACRO %53A(1152) 10:04 16-Oct-84 Page 4-12
DFPTA6 MAC 19-Jan-83 11:22 Register Interference Tests SEQ 1197
759 001132' 133200 001777 MWORD <CONT,A=1,B=11,S0B,XOR,D=1,SKCN,MGC=1777> ; 1332
760 001133' 361014 640340
761 001134' 133340 110000 MWORD <CJS,J=4011,A=3,S0A,OR,D=1> ; 1333
762 001135' 431030 000020
763 001136' 133400 001777 MWORD <CONT,A=2,B=12,S0Q,NAND,D=2,SKCN,MGC=1777> ; 1334
764 001137' 252025 240340
765 001140' 133540 110000 MWORD <CJS,J=4011,A=3,S0A,OR,D=1> ; 1335
766 001141' 431030 000020
767 001142' 133600 001777 MWORD <CONT,A=3,B=13,S0B,AND,D=3,SKCN,MGC=1777> ; 1336
768 001143' 343035 640340
769 001144' 133740 110000 MWORD <CJS,J=4011,A=3,S0A,OR,D=1> ; 1337
770 001145' 431030 000020
771 001146' 134000 001777 MWORD <CONT,A=4,B=14,S0Q,OR,D=4,SKCN,MGC=1777> ; 1340
772 001147' 234046 240340
773 001150' 134140 110000 MWORD <CJS,J=4011,A=3,S0A,OR,D=1> ; 1341
774 001151' 431030 000020
775 001152' 134200 001777 MWORD <CONT,A=5,B=15,S0B,RMIN,D=5,SKCN,MGC=1777> ; 1342
776 001153' 325056 640340
777 001154' 134340 110000 MWORD <CJS,J=4011,A=3,S0A,OR,D=1> ; 1343
778 001155' 431030 000020
779 001156' 134400 001777 MWORD <CONT,A=6,B=16,S0Q,SMIN,D=6,SKCN,MGC=1777> ; 1344
780 001157' 216067 240340
781 001160' 134540 110000 MWORD <CJS,J=4011,A=3,S0A,OR,D=1> ; 1345
782 001161' 431030 000020
783 001162' 134600 001777 MWORD <CONT,A=7,B=17,S0B,PLUS,D=7,SKCN,MGC=1777> ; 1346
784 001163' 307077 640340
785 001164' 134740 110000 MWORD <CJS,J=4011,A=3,S0A,OR,D=1> ; 1347
786 001165' 431030 000020
787
788 001166' 135000 001777 MWORD <CONT,A=3,B=10,S0A,PLUS,D=0,SKCN,MGC=1777> ; 1350
789 001167' 400034 240340
790 001170' 135140 110000 MWORD <CJS,J=4011,A=3,S0A,OR,D=1> ; 1351
791 001171' 431030 000020
792 001172' 135200 001777 MWORD <CONT,A=1,B=11,SDA,SMIN,D=1,SKCN,MGC=1777> ; 1352
793 001173' 511014 640340
794 001174' 135340 110000 MWORD <CJS,J=4011,A=3,S0A,OR,D=1> ; 1353
795 001175' 431030 000020
796 001176' 135400 001777 MWORD <CONT,A=2,B=12,S0A,RMIN,D=2,SKCN,MGC=1777> ; 1354
797 001177' 422025 240340
798 001200' 135540 110000 MWORD <CJS,J=4011,A=3,S0A,OR,D=1> ; 1355
799 001201' 431030 000020
800 001202' 135600 001777 MWORD <CONT,A=3,B=13,SDA,OR,D=3,SKCN,MGC=1777> ; 1356
801 001203' 533035 640340
802 001204' 135740 110000 MWORD <CJS,J=4011,A=3,S0A,OR,D=1> ; 1357
803 001205' 431030 000020
804 001206' 136000 001777 MWORD <CONT,A=4,B=14,S0A,AND,D=4,SKCN,MGC=1777> ; 1360
805 001207' 444046 240340
806 001210' 136140 110000 MWORD <CJS,J=4011,A=3,S0A,OR,D=1> ; 1361
807 001211' 431030 000020
808 001212' 136200 001777 MWORD <CONT,A=5,B=15,SDA,NAND,D=5,SKCN,MGC=1777> ; 1362
809 001213' 555056 640340
810 001214' 136340 110000 MWORD <CJS,J=4011,A=3,S0A,OR,D=1> ; 1363
811 001215' 431030 000020
812 001216' 136400 001777 MWORD <CONT,A=6,B=16,S0A,XOR,D=6,SKCN,MGC=1777> ; 1364
813 001217' 466067 240340
.MAIN MACRO %53A(1152) 10:04 16-Oct-84 Page 4-13
DFPTA6 MAC 19-Jan-83 11:22 Register Interference Tests SEQ 1198
814 001220' 136540 110000 MWORD <CJS,J=4011,A=3,S0A,OR,D=1> ; 1365
815 001221' 431030 000020
816 001222' 136600 001777 MWORD <CONT,A=7,B=17,SDA,XNOR,D=7,SKCN,MGC=1777> ; 1366
817 001223' 577077 640340
818 001224' 136740 110000 MWORD <CJS,J=4011,A=3,S0A,OR,D=1> ; 1367
819 001225' 431030 000020
820
821 001226' 137000 001777 MWORD <CONT,A=3,B=10,SDQ,XNOR,D=0,SKCN,MGC=1777> ; 1370
822 001227' 670034 240340
823 001230' 137140 110000 MWORD <CJS,J=4011,A=3,S0A,OR,D=1> ; 1371
824 001231' 431030 000020
825 001232' 137200 001777 MWORD <CONT,A=1,B=11,SD0,XOR,D=1,SKCN,MGC=1777> ; 1372
826 001233' 761014 640340
827 001234' 137340 110000 MWORD <CJS,J=4011,A=3,S0A,OR,D=1> ; 1373
828 001235' 431030 000020
829 001236' 137400 001777 MWORD <CONT,A=2,B=12,SDQ,NAND,D=2,SKCN,MGC=1777> ; 1374
830 001237' 652025 240340
831 001240' 137540 110000 MWORD <CJS,J=4011,A=3,S0A,OR,D=1> ; 1375
832 001241' 431030 000020
833 001242' 137600 001777 MWORD <CONT,A=3,B=13,SD0,AND,D=3,SKCN,MGC=1777> ; 1376
834 001243' 743035 640340
835 001244' 137740 110000 MWORD <CJS,J=4011,A=3,S0A,OR,D=1> ; 1377
836 001245' 431030 000020
837 001246' 140000 001777 MWORD <CONT,A=4,B=14,SDQ,OR,D=4,SKCN,MGC=1777> ; 1400
838 001247' 634046 240340
839 001250' 140140 110000 MWORD <CJS,J=4011,A=3,S0A,OR,D=1> ; 1401
840 001251' 431030 000020
841 001252' 140200 001777 MWORD <CONT,A=5,B=15,SD0,RMIN,D=5,SKCN,MGC=1777> ; 1402
842 001253' 725056 640340
843 001254' 140340 110000 MWORD <CJS,J=4011,A=3,S0A,OR,D=1> ; 1403
844 001255' 431030 000020
845 001256' 140400 001777 MWORD <CONT,A=6,B=16,SDQ,SMIN,D=6,SKCN,MGC=1777> ; 1404
846 001257' 616067 240340
847 001260' 140540 110000 MWORD <CJS,J=4011,A=3,S0A,OR,D=1> ; 1405
848 001261' 431030 000020
849 001262' 140600 001777 MWORD <CONT,A=7,B=17,SD0,PLUS,D=7,SKCN,MGC=1777> ; 1406
850 001263' 707077 640340
851 001264' 140740 110000 MWORD <CJS,J=4011,A=3,S0A,OR,D=1> ; 1407
852 001265' 431030 000020
853
854 ; Now do register 4
855
856 001266' 141000 020000 MWORD <CJS,J=2> ; 1410
857 001267' 000000 000020
858 001270' 141100 000000 MWORD <CONT,A=0,B=4,S0A,AND,D=2> ; 1411
859 001271' 442002 000340
860
861 001272' 141200 001777 MWORD <CONT,A=4,B=10,SAQ,PLUS,D=0,SKCN,MGC=1777> ; 1412
862 001273' 000044 240340
863 001274' 141340 140000 MWORD <CJS,J=4014,A=4,S0A,OR,D=1> ; 1413
864 001275' 431040 000020
865 001276' 141400 001777 MWORD <CONT,A=1,B=11,SAB,SMIN,D=1,SKCN,MGC=1777> ; 1414
866 001277' 111014 640340
867 001300' 141540 140000 MWORD <CJS,J=4014,A=4,S0A,OR,D=1> ; 1415
868 001301' 431040 000020
.MAIN MACRO %53A(1152) 10:04 16-Oct-84 Page 4-14
DFPTA6 MAC 19-Jan-83 11:22 Register Interference Tests SEQ 1199
869 001302' 141600 001777 MWORD <CONT,A=2,B=12,SAQ,RMIN,D=2,SKCN,MGC=1777> ; 1416
870 001303' 022025 240340
871 001304' 141740 140000 MWORD <CJS,J=4014,A=4,S0A,OR,D=1> ; 1417
872 001305' 431040 000020
873 001306' 142000 001777 MWORD <CONT,A=3,B=13,SAB,OR,D=3,SKCN,MGC=1777> ; 1420
874 001307' 133035 640340
875 001310' 142140 140000 MWORD <CJS,J=4014,A=4,S0A,OR,D=1> ; 1421
876 001311' 431040 000020
877 001312' 142200 001777 MWORD <CONT,A=4,B=14,SAQ,AND,D=4,SKCN,MGC=1777> ; 1422
878 001313' 044046 240340
879 001314' 142340 140000 MWORD <CJS,J=4014,A=4,S0A,OR,D=1> ; 1423
880 001315' 431040 000020
881 001316' 142400 001777 MWORD <CONT,A=5,B=15,SAB,NAND,D=5,SKCN,MGC=1777> ; 1424
882 001317' 155056 640340
883 001320' 142540 140000 MWORD <CJS,J=4014,A=4,S0A,OR,D=1> ; 1425
884 001321' 431040 000020
885 001322' 142600 001777 MWORD <CONT,A=6,B=16,SAQ,XOR,D=6,SKCN,MGC=1777> ; 1426
886 001323' 066067 240340
887 001324' 142740 140000 MWORD <CJS,J=4014,A=4,S0A,OR,D=1> ; 1427
888 001325' 431040 000020
889 001326' 143000 001777 MWORD <CONT,A=7,B=17,SAB,XNOR,D=7,SKCN,MGC=1777> ; 1430
890 001327' 177077 640340
891 001330' 143140 140000 MWORD <CJS,J=4014,A=4,S0A,OR,D=1> ; 1431
892 001331' 431040 000020
893
894 001332' 143200 001777 MWORD <CONT,A=4,B=10,S0Q,XNOR,D=0,SKCN,MGC=1777> ; 1432
895 001333' 270044 240340
896 001334' 143340 140000 MWORD <CJS,J=4014,A=4,S0A,OR,D=1> ; 1433
897 001335' 431040 000020
898 001336' 143400 001777 MWORD <CONT,A=1,B=11,S0B,XOR,D=1,SKCN,MGC=1777> ; 1434
899 001337' 361014 640340
900 001340' 143540 140000 MWORD <CJS,J=4014,A=4,S0A,OR,D=1> ; 1435
901 001341' 431040 000020
902 001342' 143600 001777 MWORD <CONT,A=2,B=12,S0Q,NAND,D=2,SKCN,MGC=1777> ; 1436
903 001343' 252025 240340
904 001344' 143740 140000 MWORD <CJS,J=4014,A=4,S0A,OR,D=1> ; 1437
905 001345' 431040 000020
906 001346' 144000 001777 MWORD <CONT,A=3,B=13,S0B,AND,D=3,SKCN,MGC=1777> ; 1440
907 001347' 343035 640340
908 001350' 144140 140000 MWORD <CJS,J=4014,A=4,S0A,OR,D=1> ; 1441
909 001351' 431040 000020
910 001352' 144200 001777 MWORD <CONT,A=4,B=14,S0Q,OR,D=4,SKCN,MGC=1777> ; 1442
911 001353' 234046 240340
912 001354' 144340 140000 MWORD <CJS,J=4014,A=4,S0A,OR,D=1> ; 1443
913 001355' 431040 000020
914 001356' 144400 001777 MWORD <CONT,A=5,B=15,S0B,RMIN,D=5,SKCN,MGC=1777> ; 1444
915 001357' 325056 640340
916 001360' 144540 140000 MWORD <CJS,J=4014,A=4,S0A,OR,D=1> ; 1445
917 001361' 431040 000020
918 001362' 144600 001777 MWORD <CONT,A=6,B=16,S0Q,SMIN,D=6,SKCN,MGC=1777> ; 1446
919 001363' 216067 240340
920 001364' 144740 140000 MWORD <CJS,J=4014,A=4,S0A,OR,D=1> ; 1447
921 001365' 431040 000020
922 001366' 145000 001777 MWORD <CONT,A=7,B=17,S0B,PLUS,D=7,SKCN,MGC=1777> ; 1450
923 001367' 307077 640340
.MAIN MACRO %53A(1152) 10:04 16-Oct-84 Page 4-15
DFPTA6 MAC 19-Jan-83 11:22 Register Interference Tests SEQ 1200
924 001370' 145140 140000 MWORD <CJS,J=4014,A=4,S0A,OR,D=1> ; 1451
925 001371' 431040 000020
926
927 001372' 145200 001777 MWORD <CONT,A=4,B=10,S0A,PLUS,D=0,SKCN,MGC=1777> ; 1452
928 001373' 400044 240340
929 001374' 145340 140000 MWORD <CJS,J=4014,A=4,S0A,OR,D=1> ; 1453
930 001375' 431040 000020
931 001376' 145400 001777 MWORD <CONT,A=1,B=11,SDA,SMIN,D=1,SKCN,MGC=1777> ; 1454
932 001377' 511014 640340
933 001400' 145540 140000 MWORD <CJS,J=4014,A=4,S0A,OR,D=1> ; 1455
934 001401' 431040 000020
935 001402' 145600 001777 MWORD <CONT,A=2,B=12,S0A,RMIN,D=2,SKCN,MGC=1777> ; 1456
936 001403' 422025 240340
937 001404' 145740 140000 MWORD <CJS,J=4014,A=4,S0A,OR,D=1> ; 1457
938 001405' 431040 000020
939 001406' 146000 001777 MWORD <CONT,A=3,B=13,SDA,OR,D=3,SKCN,MGC=1777> ; 1460
940 001407' 533035 640340
941 001410' 146140 140000 MWORD <CJS,J=4014,A=4,S0A,OR,D=1> ; 1461
942 001411' 431040 000020
943 001412' 146200 001777 MWORD <CONT,A=4,B=14,S0A,AND,D=4,SKCN,MGC=1777> ; 1462
944 001413' 444046 240340
945 001414' 146340 140000 MWORD <CJS,J=4014,A=4,S0A,OR,D=1> ; 1463
946 001415' 431040 000020
947 001416' 146400 001777 MWORD <CONT,A=5,B=15,SDA,NAND,D=5,SKCN,MGC=1777> ; 1464
948 001417' 555056 640340
949 001420' 146540 140000 MWORD <CJS,J=4014,A=4,S0A,OR,D=1> ; 1465
950 001421' 431040 000020
951 001422' 146600 001777 MWORD <CONT,A=6,B=16,S0A,XOR,D=6,SKCN,MGC=1777> ; 1466
952 001423' 466067 240340
953 001424' 146740 140000 MWORD <CJS,J=4014,A=4,S0A,OR,D=1> ; 1467
954 001425' 431040 000020
955 001426' 147000 001777 MWORD <CONT,A=7,B=17,SDA,XNOR,D=7,SKCN,MGC=1777> ; 1470
956 001427' 577077 640340
957 001430' 147140 140000 MWORD <CJS,J=4014,A=4,S0A,OR,D=1> ; 1471
958 001431' 431040 000020
959
960 001432' 147200 001777 MWORD <CONT,A=4,B=10,SDQ,XNOR,D=0,SKCN,MGC=1777> ; 1472
961 001433' 670044 240340
962 001434' 147340 140000 MWORD <CJS,J=4014,A=4,S0A,OR,D=1> ; 1473
963 001435' 431040 000020
964 001436' 147400 001777 MWORD <CONT,A=1,B=11,SD0,XOR,D=1,SKCN,MGC=1777> ; 1474
965 001437' 761014 640340
966 001440' 147540 140000 MWORD <CJS,J=4014,A=4,S0A,OR,D=1> ; 1475
967 001441' 431040 000020
968 001442' 147600 001777 MWORD <CONT,A=2,B=12,SDQ,NAND,D=2,SKCN,MGC=1777> ; 1476
969 001443' 652025 240340
970 001444' 147740 140000 MWORD <CJS,J=4014,A=4,S0A,OR,D=1> ; 1477
971 001445' 431040 000020
972 001446' 150000 001777 MWORD <CONT,A=3,B=13,SD0,AND,D=3,SKCN,MGC=1777> ; 1500
973 001447' 743035 640340
974 001450' 150140 140000 MWORD <CJS,J=4014,A=4,S0A,OR,D=1> ; 1501
975 001451' 431040 000020
976 001452' 150200 001777 MWORD <CONT,A=4,B=14,SDQ,OR,D=4,SKCN,MGC=1777> ; 1502
977 001453' 634046 240340
978 001454' 150340 140000 MWORD <CJS,J=4014,A=4,S0A,OR,D=1> ; 1503
.MAIN MACRO %53A(1152) 10:04 16-Oct-84 Page 4-16
DFPTA6 MAC 19-Jan-83 11:22 Register Interference Tests SEQ 1201
979 001455' 431040 000020
980 001456' 150400 001777 MWORD <CONT,A=5,B=15,SD0,RMIN,D=5,SKCN,MGC=1777> ; 1504
981 001457' 725056 640340
982 001460' 150540 140000 MWORD <CJS,J=4014,A=4,S0A,OR,D=1> ; 1505
983 001461' 431040 000020
984 001462' 150600 001777 MWORD <CONT,A=6,B=16,SDQ,SMIN,D=6,SKCN,MGC=1777> ; 1506
985 001463' 616067 240340
986 001464' 150740 140000 MWORD <CJS,J=4014,A=4,S0A,OR,D=1> ; 1507
987 001465' 431040 000020
988 001466' 151000 001777 MWORD <CONT,A=7,B=17,SD0,PLUS,D=7,SKCN,MGC=1777> ; 1510
989 001467' 707077 640340
990 001470' 151140 140000 MWORD <CJS,J=4014,A=4,S0A,OR,D=1> ; 1511
991 001471' 431040 000020
992
993 ; Now do register 5
994
995 001472' 151200 020000 MWORD <CJS,J=2> ; 1512
996 001473' 000000 000020
997 001474' 151300 000000 MWORD <CONT,A=0,B=5,S0A,AND,D=2> ; 1513
998 001475' 442002 400340
999
1000 001476' 151400 001777 MWORD <CONT,A=5,B=10,SAQ,PLUS,D=0,SKCN,MGC=1777> ; 1514
1001 001477' 000054 240340
1002 001500' 151540 170000 MWORD <CJS,J=4017,A=5,S0A,OR,D=1> ; 1515
1003 001501' 431050 000020
1004 001502' 151600 001777 MWORD <CONT,A=1,B=11,SAB,SMIN,D=1,SKCN,MGC=1777> ; 1516
1005 001503' 111014 640340
1006 001504' 151740 170000 MWORD <CJS,J=4017,A=5,S0A,OR,D=1> ; 1517
1007 001505' 431050 000020
1008 001506' 152000 001777 MWORD <CONT,A=2,B=12,SAQ,RMIN,D=2,SKCN,MGC=1777> ; 1520
1009 001507' 022025 240340
1010 001510' 152140 170000 MWORD <CJS,J=4017,A=5,S0A,OR,D=1> ; 1521
1011 001511' 431050 000020
1012 001512' 152200 001777 MWORD <CONT,A=3,B=13,SAB,OR,D=3,SKCN,MGC=1777> ; 1522
1013 001513' 133035 640340
1014 001514' 152340 170000 MWORD <CJS,J=4017,A=5,S0A,OR,D=1> ; 1523
1015 001515' 431050 000020
1016 001516' 152400 001777 MWORD <CONT,A=4,B=14,SAQ,AND,D=4,SKCN,MGC=1777> ; 1524
1017 001517' 044046 240340
1018 001520' 152540 170000 MWORD <CJS,J=4017,A=5,S0A,OR,D=1> ; 1525
1019 001521' 431050 000020
1020 001522' 152600 001777 MWORD <CONT,A=5,B=15,SAB,NAND,D=5,SKCN,MGC=1777> ; 1526
1021 001523' 155056 640340
1022 001524' 152740 170000 MWORD <CJS,J=4017,A=5,S0A,OR,D=1> ; 1527
1023 001525' 431050 000020
1024 001526' 153000 001777 MWORD <CONT,A=6,B=16,SAQ,XOR,D=6,SKCN,MGC=1777> ; 1530
1025 001527' 066067 240340
1026 001530' 153140 170000 MWORD <CJS,J=4017,A=5,S0A,OR,D=1> ; 1531
1027 001531' 431050 000020
1028 001532' 153200 001777 MWORD <CONT,A=7,B=17,SAB,XNOR,D=7,SKCN,MGC=1777> ; 1532
1029 001533' 177077 640340
1030 001534' 153340 170000 MWORD <CJS,J=4017,A=5,S0A,OR,D=1> ; 1533
1031 001535' 431050 000020
1032
1033 001536' 153400 001777 MWORD <CONT,A=5,B=10,S0Q,XNOR,D=0,SKCN,MGC=1777> ; 1534
.MAIN MACRO %53A(1152) 10:04 16-Oct-84 Page 4-17
DFPTA6 MAC 19-Jan-83 11:22 Register Interference Tests SEQ 1202
1034 001537' 270054 240340
1035 001540' 153540 170000 MWORD <CJS,J=4017,A=5,S0A,OR,D=1> ; 1535
1036 001541' 431050 000020
1037 001542' 153600 001777 MWORD <CONT,A=1,B=11,S0B,XOR,D=1,SKCN,MGC=1777> ; 1536
1038 001543' 361014 640340
1039 001544' 153740 170000 MWORD <CJS,J=4017,A=5,S0A,OR,D=1> ; 1537
1040 001545' 431050 000020
1041 001546' 154000 001777 MWORD <CONT,A=2,B=12,S0Q,NAND,D=2,SKCN,MGC=1777> ; 1540
1042 001547' 252025 240340
1043 001550' 154140 170000 MWORD <CJS,J=4017,A=5,S0A,OR,D=1> ; 1541
1044 001551' 431050 000020
1045 001552' 154200 001777 MWORD <CONT,A=3,B=13,S0B,AND,D=3,SKCN,MGC=1777> ; 1542
1046 001553' 343035 640340
1047 001554' 154340 170000 MWORD <CJS,J=4017,A=5,S0A,OR,D=1> ; 1543
1048 001555' 431050 000020
1049 001556' 154400 001777 MWORD <CONT,A=4,B=14,S0Q,OR,D=4,SKCN,MGC=1777> ; 1544
1050 001557' 234046 240340
1051 001560' 154540 170000 MWORD <CJS,J=4017,A=5,S0A,OR,D=1> ; 1545
1052 001561' 431050 000020
1053 001562' 154600 001777 MWORD <CONT,A=5,B=15,S0B,RMIN,D=5,SKCN,MGC=1777> ; 1546
1054 001563' 325056 640340
1055 001564' 154740 170000 MWORD <CJS,J=4017,A=5,S0A,OR,D=1> ; 1547
1056 001565' 431050 000020
1057 001566' 155000 001777 MWORD <CONT,A=6,B=16,S0Q,SMIN,D=6,SKCN,MGC=1777> ; 1550
1058 001567' 216067 240340
1059 001570' 155140 170000 MWORD <CJS,J=4017,A=5,S0A,OR,D=1> ; 1551
1060 001571' 431050 000020
1061 001572' 155200 001777 MWORD <CONT,A=7,B=17,S0B,PLUS,D=7,SKCN,MGC=1777> ; 1552
1062 001573' 307077 640340
1063 001574' 155340 170000 MWORD <CJS,J=4017,A=5,S0A,OR,D=1> ; 1553
1064 001575' 431050 000020
1065
1066 001576' 155400 001777 MWORD <CONT,A=5,B=10,S0A,PLUS,D=0,SKCN,MGC=1777> ; 1554
1067 001577' 400054 240340
1068 001600' 155540 170000 MWORD <CJS,J=4017,A=5,S0A,OR,D=1> ; 1555
1069 001601' 431050 000020
1070 001602' 155600 001777 MWORD <CONT,A=1,B=11,SDA,SMIN,D=1,SKCN,MGC=1777> ; 1556
1071 001603' 511014 640340
1072 001604' 155740 170000 MWORD <CJS,J=4017,A=5,S0A,OR,D=1> ; 1557
1073 001605' 431050 000020
1074 001606' 156000 001777 MWORD <CONT,A=2,B=12,S0A,RMIN,D=2,SKCN,MGC=1777> ; 1560
1075 001607' 422025 240340
1076 001610' 156140 170000 MWORD <CJS,J=4017,A=5,S0A,OR,D=1> ; 1561
1077 001611' 431050 000020
1078 001612' 156200 001777 MWORD <CONT,A=3,B=13,SDA,OR,D=3,SKCN,MGC=1777> ; 1562
1079 001613' 533035 640340
1080 001614' 156340 170000 MWORD <CJS,J=4017,A=5,S0A,OR,D=1> ; 1563
1081 001615' 431050 000020
1082 001616' 156400 001777 MWORD <CONT,A=4,B=14,S0A,AND,D=4,SKCN,MGC=1777> ; 1564
1083 001617' 444046 240340
1084 001620' 156540 170000 MWORD <CJS,J=4017,A=5,S0A,OR,D=1> ; 1565
1085 001621' 431050 000020
1086 001622' 156600 001777 MWORD <CONT,A=5,B=15,SDA,NAND,D=5,SKCN,MGC=1777> ; 1566
1087 001623' 555056 640340
1088 001624' 156740 170000 MWORD <CJS,J=4017,A=5,S0A,OR,D=1> ; 1567
.MAIN MACRO %53A(1152) 10:04 16-Oct-84 Page 4-18
DFPTA6 MAC 19-Jan-83 11:22 Register Interference Tests SEQ 1203
1089 001625' 431050 000020
1090 001626' 157000 001777 MWORD <CONT,A=6,B=16,S0A,XOR,D=6,SKCN,MGC=1777> ; 1570
1091 001627' 466067 240340
1092 001630' 157140 170000 MWORD <CJS,J=4017,A=5,S0A,OR,D=1> ; 1571
1093 001631' 431050 000020
1094 001632' 157200 001777 MWORD <CONT,A=7,B=17,SDA,XNOR,D=7,SKCN,MGC=1777> ; 1572
1095 001633' 577077 640340
1096 001634' 157340 170000 MWORD <CJS,J=4017,A=5,S0A,OR,D=1> ; 1573
1097 001635' 431050 000020
1098
1099 001636' 157400 001777 MWORD <CONT,A=5,B=10,SDQ,XNOR,D=0,SKCN,MGC=1777> ; 1574
1100 001637' 670054 240340
1101 001640' 157540 170000 MWORD <CJS,J=4017,A=5,S0A,OR,D=1> ; 1575
1102 001641' 431050 000020
1103 001642' 157600 001777 MWORD <CONT,A=1,B=11,SD0,XOR,D=1,SKCN,MGC=1777> ; 1576
1104 001643' 761014 640340
1105 001644' 157740 170000 MWORD <CJS,J=4017,A=5,S0A,OR,D=1> ; 1577
1106 001645' 431050 000020
1107 001646' 160000 001777 MWORD <CONT,A=2,B=12,SDQ,NAND,D=2,SKCN,MGC=1777> ; 1600
1108 001647' 652025 240340
1109 001650' 160140 170000 MWORD <CJS,J=4017,A=5,S0A,OR,D=1> ; 1601
1110 001651' 431050 000020
1111 001652' 160200 001777 MWORD <CONT,A=3,B=13,SD0,AND,D=3,SKCN,MGC=1777> ; 1602
1112 001653' 743035 640340
1113 001654' 160340 170000 MWORD <CJS,J=4017,A=5,S0A,OR,D=1> ; 1603
1114 001655' 431050 000020
1115 001656' 160400 001777 MWORD <CONT,A=4,B=14,SDQ,OR,D=4,SKCN,MGC=1777> ; 1604
1116 001657' 634046 240340
1117 001660' 160540 170000 MWORD <CJS,J=4017,A=5,S0A,OR,D=1> ; 1605
1118 001661' 431050 000020
1119 001662' 160600 001777 MWORD <CONT,A=5,B=15,SD0,RMIN,D=5,SKCN,MGC=1777> ; 1606
1120 001663' 725056 640340
1121 001664' 160740 170000 MWORD <CJS,J=4017,A=5,S0A,OR,D=1> ; 1607
1122 001665' 431050 000020
1123 001666' 161000 001777 MWORD <CONT,A=6,B=16,SDQ,SMIN,D=6,SKCN,MGC=1777> ; 1610
1124 001667' 616067 240340
1125 001670' 161140 170000 MWORD <CJS,J=4017,A=5,S0A,OR,D=1> ; 1611
1126 001671' 431050 000020
1127 001672' 161200 001777 MWORD <CONT,A=7,B=17,SD0,PLUS,D=7,SKCN,MGC=1777> ; 1612
1128 001673' 707077 640340
1129 001674' 161340 170000 MWORD <CJS,J=4017,A=5,S0A,OR,D=1> ; 1613
1130 001675' 431050 000020
1131
1132 ; Now do register 6
1133
1134 001676' 161400 020000 MWORD <CJS,J=2> ; 1614
1135 001677' 000000 000020
1136 001700' 161500 000000 MWORD <CONT,A=0,B=6,S0A,AND,D=2> ; 1615
1137 001701' 442003 000340
1138
1139 001702' 161600 001777 MWORD <CONT,A=6,B=10,SAQ,PLUS,D=0,SKCN,MGC=1777> ; 1616
1140 001703' 000064 240340
1141 001704' 161740 220000 MWORD <CJS,J=4022,A=6,S0A,OR,D=1> ; 1617
1142 001705' 431060 000020
1143 001706' 162000 001777 MWORD <CONT,A=1,B=11,SAB,SMIN,D=1,SKCN,MGC=1777> ; 1620
.MAIN MACRO %53A(1152) 10:04 16-Oct-84 Page 4-19
DFPTA6 MAC 19-Jan-83 11:22 Register Interference Tests SEQ 1204
1144 001707' 111014 640340
1145 001710' 162140 220000 MWORD <CJS,J=4022,A=6,S0A,OR,D=1> ; 1621
1146 001711' 431060 000020
1147 001712' 162200 001777 MWORD <CONT,A=2,B=12,SAQ,RMIN,D=2,SKCN,MGC=1777> ; 1622
1148 001713' 022025 240340
1149 001714' 162340 220000 MWORD <CJS,J=4022,A=6,S0A,OR,D=1> ; 1623
1150 001715' 431060 000020
1151 001716' 162400 001777 MWORD <CONT,A=3,B=13,SAB,OR,D=3,SKCN,MGC=1777> ; 1624
1152 001717' 133035 640340
1153 001720' 162540 220000 MWORD <CJS,J=4022,A=6,S0A,OR,D=1> ; 1625
1154 001721' 431060 000020
1155 001722' 162600 001777 MWORD <CONT,A=4,B=14,SAQ,AND,D=4,SKCN,MGC=1777> ; 1626
1156 001723' 044046 240340
1157 001724' 162740 220000 MWORD <CJS,J=4022,A=6,S0A,OR,D=1> ; 1627
1158 001725' 431060 000020
1159 001726' 163000 001777 MWORD <CONT,A=5,B=15,SAB,NAND,D=5,SKCN,MGC=1777> ; 1630
1160 001727' 155056 640340
1161 001730' 163140 220000 MWORD <CJS,J=4022,A=6,S0A,OR,D=1> ; 1631
1162 001731' 431060 000020
1163 001732' 163200 001777 MWORD <CONT,A=6,B=16,SAQ,XOR,D=6,SKCN,MGC=1777> ; 1632
1164 001733' 066067 240340
1165 001734' 163340 220000 MWORD <CJS,J=4022,A=6,S0A,OR,D=1> ; 1633
1166 001735' 431060 000020
1167 001736' 163400 001777 MWORD <CONT,A=7,B=17,SAB,XNOR,D=7,SKCN,MGC=1777> ; 1634
1168 001737' 177077 640340
1169 001740' 163540 220000 MWORD <CJS,J=4022,A=6,S0A,OR,D=1> ; 1635
1170 001741' 431060 000020
1171
1172 001742' 163600 001777 MWORD <CONT,A=6,B=10,S0Q,XNOR,D=0,SKCN,MGC=1777> ; 1636
1173 001743' 270064 240340
1174 001744' 163740 220000 MWORD <CJS,J=4022,A=6,S0A,OR,D=1> ; 1637
1175 001745' 431060 000020
1176 001746' 164000 001777 MWORD <CONT,A=1,B=11,S0B,XOR,D=1,SKCN,MGC=1777> ; 1640
1177 001747' 361014 640340
1178 001750' 164140 220000 MWORD <CJS,J=4022,A=6,S0A,OR,D=1> ; 1641
1179 001751' 431060 000020
1180 001752' 164200 001777 MWORD <CONT,A=2,B=12,S0Q,NAND,D=2,SKCN,MGC=1777> ; 1642
1181 001753' 252025 240340
1182 001754' 164340 220000 MWORD <CJS,J=4022,A=6,S0A,OR,D=1> ; 1643
1183 001755' 431060 000020
1184 001756' 164400 001777 MWORD <CONT,A=3,B=13,S0B,AND,D=3,SKCN,MGC=1777> ; 1644
1185 001757' 343035 640340
1186 001760' 164540 220000 MWORD <CJS,J=4022,A=6,S0A,OR,D=1> ; 1645
1187 001761' 431060 000020
1188 001762' 164600 001777 MWORD <CONT,A=4,B=14,S0Q,OR,D=4,SKCN,MGC=1777> ; 1646
1189 001763' 234046 240340
1190 001764' 164740 220000 MWORD <CJS,J=4022,A=6,S0A,OR,D=1> ; 1647
1191 001765' 431060 000020
1192 001766' 165000 001777 MWORD <CONT,A=5,B=15,S0B,RMIN,D=5,SKCN,MGC=1777> ; 1650
1193 001767' 325056 640340
1194 001770' 165140 220000 MWORD <CJS,J=4022,A=6,S0A,OR,D=1> ; 1651
1195 001771' 431060 000020
1196 001772' 165200 001777 MWORD <CONT,A=6,B=16,S0Q,SMIN,D=6,SKCN,MGC=1777> ; 1652
1197 001773' 216067 240340
1198 001774' 165340 220000 MWORD <CJS,J=4022,A=6,S0A,OR,D=1> ; 1653
.MAIN MACRO %53A(1152) 10:04 16-Oct-84 Page 4-20
DFPTA6 MAC 19-Jan-83 11:22 Register Interference Tests SEQ 1205
1199 001775' 431060 000020
1200 001776' 165400 001777 MWORD <CONT,A=7,B=17,S0B,PLUS,D=7,SKCN,MGC=1777> ; 1654
1201 001777' 307077 640340
1202 002000' 165540 220000 MWORD <CJS,J=4022,A=6,S0A,OR,D=1> ; 1655
1203 002001' 431060 000020
1204
1205 002002' 165600 001777 MWORD <CONT,A=6,B=10,S0A,PLUS,D=0,SKCN,MGC=1777> ; 1656
1206 002003' 400064 240340
1207 002004' 165740 220000 MWORD <CJS,J=4022,A=6,S0A,OR,D=1> ; 1657
1208 002005' 431060 000020
1209 002006' 166000 001777 MWORD <CONT,A=1,B=11,SDA,SMIN,D=1,SKCN,MGC=1777> ; 1660
1210 002007' 511014 640340
1211 002010' 166140 220000 MWORD <CJS,J=4022,A=6,S0A,OR,D=1> ; 1661
1212 002011' 431060 000020
1213 002012' 166200 001777 MWORD <CONT,A=2,B=12,S0A,RMIN,D=2,SKCN,MGC=1777> ; 1662
1214 002013' 422025 240340
1215 002014' 166340 220000 MWORD <CJS,J=4022,A=6,S0A,OR,D=1> ; 1663
1216 002015' 431060 000020
1217 002016' 166400 001777 MWORD <CONT,A=3,B=13,SDA,OR,D=3,SKCN,MGC=1777> ; 1664
1218 002017' 533035 640340
1219 002020' 166540 220000 MWORD <CJS,J=4022,A=6,S0A,OR,D=1> ; 1665
1220 002021' 431060 000020
1221 002022' 166600 001777 MWORD <CONT,A=4,B=14,S0A,AND,D=4,SKCN,MGC=1777> ; 1666
1222 002023' 444046 240340
1223 002024' 166740 220000 MWORD <CJS,J=4022,A=6,S0A,OR,D=1> ; 1667
1224 002025' 431060 000020
1225 002026' 167000 001777 MWORD <CONT,A=5,B=15,SDA,NAND,D=5,SKCN,MGC=1777> ; 1670
1226 002027' 555056 640340
1227 002030' 167140 220000 MWORD <CJS,J=4022,A=6,S0A,OR,D=1> ; 1671
1228 002031' 431060 000020
1229 002032' 167200 001777 MWORD <CONT,A=6,B=16,S0A,XOR,D=6,SKCN,MGC=1777> ; 1672
1230 002033' 466067 240340
1231 002034' 167340 220000 MWORD <CJS,J=4022,A=6,S0A,OR,D=1> ; 1673
1232 002035' 431060 000020
1233 002036' 167400 001777 MWORD <CONT,A=7,B=17,SDA,XNOR,D=7,SKCN,MGC=1777> ; 1674
1234 002037' 577077 640340
1235 002040' 167540 220000 MWORD <CJS,J=4022,A=6,S0A,OR,D=1> ; 1675
1236 002041' 431060 000020
1237
1238 002042' 167600 001777 MWORD <CONT,A=6,B=10,SDQ,XNOR,D=0,SKCN,MGC=1777> ; 1676
1239 002043' 670064 240340
1240 002044' 167740 220000 MWORD <CJS,J=4022,A=6,S0A,OR,D=1> ; 1677
1241 002045' 431060 000020
1242 002046' 170000 001777 MWORD <CONT,A=1,B=11,SD0,XOR,D=1,SKCN,MGC=1777> ; 1700
1243 002047' 761014 640340
1244 002050' 170140 220000 MWORD <CJS,J=4022,A=6,S0A,OR,D=1> ; 1701
1245 002051' 431060 000020
1246 002052' 170200 001777 MWORD <CONT,A=2,B=12,SDQ,NAND,D=2,SKCN,MGC=1777> ; 1702
1247 002053' 652025 240340
1248 002054' 170340 220000 MWORD <CJS,J=4022,A=6,S0A,OR,D=1> ; 1703
1249 002055' 431060 000020
1250 002056' 170400 001777 MWORD <CONT,A=3,B=13,SD0,AND,D=3,SKCN,MGC=1777> ; 1704
1251 002057' 743035 640340
1252 002060' 170540 220000 MWORD <CJS,J=4022,A=6,S0A,OR,D=1> ; 1705
1253 002061' 431060 000020
.MAIN MACRO %53A(1152) 10:04 16-Oct-84 Page 4-21
DFPTA6 MAC 19-Jan-83 11:22 Register Interference Tests SEQ 1206
1254 002062' 170600 001777 MWORD <CONT,A=4,B=14,SDQ,OR,D=4,SKCN,MGC=1777> ; 1706
1255 002063' 634046 240340
1256 002064' 170740 220000 MWORD <CJS,J=4022,A=6,S0A,OR,D=1> ; 1707
1257 002065' 431060 000020
1258 002066' 171000 001777 MWORD <CONT,A=5,B=15,SD0,RMIN,D=5,SKCN,MGC=1777> ; 1710
1259 002067' 725056 640340
1260 002070' 171140 220000 MWORD <CJS,J=4022,A=6,S0A,OR,D=1> ; 1711
1261 002071' 431060 000020
1262 002072' 171200 001777 MWORD <CONT,A=6,B=16,SDQ,SMIN,D=6,SKCN,MGC=1777> ; 1712
1263 002073' 616067 240340
1264 002074' 171340 220000 MWORD <CJS,J=4022,A=6,S0A,OR,D=1> ; 1713
1265 002075' 431060 000020
1266 002076' 171400 001777 MWORD <CONT,A=7,B=17,SD0,PLUS,D=7,SKCN,MGC=1777> ; 1714
1267 002077' 707077 640340
1268 002100' 171540 220000 MWORD <CJS,J=4022,A=6,S0A,OR,D=1> ; 1715
1269 002101' 431060 000020
1270
1271 ; Now do register 7
1272
1273 002102' 171600 020000 MWORD <CJS,J=2> ; 1716
1274 002103' 000000 000020
1275 002104' 171700 000000 MWORD <CONT,A=0,B=7,S0A,AND,D=2> ; 1717
1276 002105' 442003 400340
1277
1278 002106' 172000 001777 MWORD <CONT,A=7,B=10,SAQ,PLUS,D=0,SKCN,MGC=1777> ; 1720
1279 002107' 000074 240340
1280 002110' 172140 250000 MWORD <CJS,J=4025,A=7,S0A,OR,D=1> ; 1721
1281 002111' 431070 000020
1282 002112' 172200 001777 MWORD <CONT,A=1,B=11,SAB,SMIN,D=1,SKCN,MGC=1777> ; 1722
1283 002113' 111014 640340
1284 002114' 172340 250000 MWORD <CJS,J=4025,A=7,S0A,OR,D=1> ; 1723
1285 002115' 431070 000020
1286 002116' 172400 001777 MWORD <CONT,A=2,B=12,SAQ,RMIN,D=2,SKCN,MGC=1777> ; 1724
1287 002117' 022025 240340
1288 002120' 172540 250000 MWORD <CJS,J=4025,A=7,S0A,OR,D=1> ; 1725
1289 002121' 431070 000020
1290 002122' 172600 001777 MWORD <CONT,A=3,B=13,SAB,OR,D=3,SKCN,MGC=1777> ; 1726
1291 002123' 133035 640340
1292 002124' 172740 250000 MWORD <CJS,J=4025,A=7,S0A,OR,D=1> ; 1727
1293 002125' 431070 000020
1294 002126' 173000 001777 MWORD <CONT,A=4,B=14,SAQ,AND,D=4,SKCN,MGC=1777> ; 1730
1295 002127' 044046 240340
1296 002130' 173140 250000 MWORD <CJS,J=4025,A=7,S0A,OR,D=1> ; 1731
1297 002131' 431070 000020
1298 002132' 173200 001777 MWORD <CONT,A=5,B=15,SAB,NAND,D=5,SKCN,MGC=1777> ; 1732
1299 002133' 155056 640340
1300 002134' 173340 250000 MWORD <CJS,J=4025,A=7,S0A,OR,D=1> ; 1733
1301 002135' 431070 000020
1302 002136' 173400 001777 MWORD <CONT,A=6,B=16,SAQ,XOR,D=6,SKCN,MGC=1777> ; 1734
1303 002137' 066067 240340
1304 002140' 173540 250000 MWORD <CJS,J=4025,A=7,S0A,OR,D=1> ; 1735
1305 002141' 431070 000020
1306 002142' 173600 001777 MWORD <CONT,A=7,B=17,SAB,XNOR,D=7,SKCN,MGC=1777> ; 1736
1307 002143' 177077 640340
1308 002144' 173740 250000 MWORD <CJS,J=4025,A=7,S0A,OR,D=1> ; 1737
.MAIN MACRO %53A(1152) 10:04 16-Oct-84 Page 4-22
DFPTA6 MAC 19-Jan-83 11:22 Register Interference Tests SEQ 1207
1309 002145' 431070 000020
1310
1311 002146' 174000 001777 MWORD <CONT,A=7,B=10,S0Q,XNOR,D=0,SKCN,MGC=1777> ; 1740
1312 002147' 270074 240340
1313 002150' 174140 250000 MWORD <CJS,J=4025,A=7,S0A,OR,D=1> ; 1741
1314 002151' 431070 000020
1315 002152' 174200 001777 MWORD <CONT,A=1,B=11,S0B,XOR,D=1,SKCN,MGC=1777> ; 1742
1316 002153' 361014 640340
1317 002154' 174340 250000 MWORD <CJS,J=4025,A=7,S0A,OR,D=1> ; 1743
1318 002155' 431070 000020
1319 002156' 174400 001777 MWORD <CONT,A=2,B=12,S0Q,NAND,D=2,SKCN,MGC=1777> ; 1744
1320 002157' 252025 240340
1321 002160' 174540 250000 MWORD <CJS,J=4025,A=7,S0A,OR,D=1> ; 1745
1322 002161' 431070 000020
1323 002162' 174600 001777 MWORD <CONT,A=3,B=13,S0B,AND,D=3,SKCN,MGC=1777> ; 1746
1324 002163' 343035 640340
1325 002164' 174740 250000 MWORD <CJS,J=4025,A=7,S0A,OR,D=1> ; 1747
1326 002165' 431070 000020
1327 002166' 175000 001777 MWORD <CONT,A=4,B=14,S0Q,OR,D=4,SKCN,MGC=1777> ; 1750
1328 002167' 234046 240340
1329 002170' 175140 250000 MWORD <CJS,J=4025,A=7,S0A,OR,D=1> ; 1751
1330 002171' 431070 000020
1331 002172' 175200 001777 MWORD <CONT,A=5,B=15,S0B,RMIN,D=5,SKCN,MGC=1777> ; 1752
1332 002173' 325056 640340
1333 002174' 175340 250000 MWORD <CJS,J=4025,A=7,S0A,OR,D=1> ; 1753
1334 002175' 431070 000020
1335 002176' 175400 001777 MWORD <CONT,A=6,B=16,S0Q,SMIN,D=6,SKCN,MGC=1777> ; 1754
1336 002177' 216067 240340
1337 002200' 175540 250000 MWORD <CJS,J=4025,A=7,S0A,OR,D=1> ; 1755
1338 002201' 431070 000020
1339 002202' 175600 001777 MWORD <CONT,A=7,B=17,S0B,PLUS,D=7,SKCN,MGC=1777> ; 1756
1340 002203' 307077 640340
1341 002204' 175740 250000 MWORD <CJS,J=4025,A=7,S0A,OR,D=1> ; 1757
1342 002205' 431070 000020
1343
1344 002206' 176000 001777 MWORD <CONT,A=7,B=10,S0A,PLUS,D=0,SKCN,MGC=1777> ; 1760
1345 002207' 400074 240340
1346 002210' 176140 250000 MWORD <CJS,J=4025,A=7,S0A,OR,D=1> ; 1761
1347 002211' 431070 000020
1348 002212' 176200 001777 MWORD <CONT,A=1,B=11,SDA,SMIN,D=1,SKCN,MGC=1777> ; 1762
1349 002213' 511014 640340
1350 002214' 176340 250000 MWORD <CJS,J=4025,A=7,S0A,OR,D=1> ; 1763
1351 002215' 431070 000020
1352 002216' 176400 001777 MWORD <CONT,A=2,B=12,S0A,RMIN,D=2,SKCN,MGC=1777> ; 1764
1353 002217' 422025 240340
1354 002220' 176540 250000 MWORD <CJS,J=4025,A=7,S0A,OR,D=1> ; 1765
1355 002221' 431070 000020
1356 002222' 176600 001777 MWORD <CONT,A=3,B=13,SDA,OR,D=3,SKCN,MGC=1777> ; 1766
1357 002223' 533035 640340
1358 002224' 176740 250000 MWORD <CJS,J=4025,A=7,S0A,OR,D=1> ; 1767
1359 002225' 431070 000020
1360 002226' 177000 001777 MWORD <CONT,A=4,B=14,S0A,AND,D=4,SKCN,MGC=1777> ; 1770
1361 002227' 444046 240340
1362 002230' 177140 250000 MWORD <CJS,J=4025,A=7,S0A,OR,D=1> ; 1771
1363 002231' 431070 000020
.MAIN MACRO %53A(1152) 10:04 16-Oct-84 Page 4-23
DFPTA6 MAC 19-Jan-83 11:22 Register Interference Tests SEQ 1208
1364 002232' 177200 001777 MWORD <CONT,A=5,B=15,SDA,NAND,D=5,SKCN,MGC=1777> ; 1772
1365 002233' 555056 640340
1366 002234' 177340 250000 MWORD <CJS,J=4025,A=7,S0A,OR,D=1> ; 1773
1367 002235' 431070 000020
1368 002236' 177400 001777 MWORD <CONT,A=6,B=16,S0A,XOR,D=6,SKCN,MGC=1777> ; 1774
1369 002237' 466067 240340
1370 002240' 177540 250000 MWORD <CJS,J=4025,A=7,S0A,OR,D=1> ; 1775
1371 002241' 431070 000020
1372 002242' 177600 001777 MWORD <CONT,A=7,B=17,SDA,XNOR,D=7,SKCN,MGC=1777> ; 1776
1373 002243' 577077 640340
1374 002244' 177740 250000 MWORD <CJS,J=4025,A=7,S0A,OR,D=1> ; 1777
1375 002245' 431070 000020
1376
1377 002246' 200000 001777 MWORD <CONT,A=7,B=10,SDQ,XNOR,D=0,SKCN,MGC=1777> ; 2000
1378 002247' 670074 240340
1379 002250' 200140 250000 MWORD <CJS,J=4025,A=7,S0A,OR,D=1> ; 2001
1380 002251' 431070 000020
1381 002252' 200200 001777 MWORD <CONT,A=1,B=11,SD0,XOR,D=1,SKCN,MGC=1777> ; 2002
1382 002253' 761014 640340
1383 002254' 200340 250000 MWORD <CJS,J=4025,A=7,S0A,OR,D=1> ; 2003
1384 002255' 431070 000020
1385 002256' 200400 001777 MWORD <CONT,A=2,B=12,SDQ,NAND,D=2,SKCN,MGC=1777> ; 2004
1386 002257' 652025 240340
1387 002260' 200540 250000 MWORD <CJS,J=4025,A=7,S0A,OR,D=1> ; 2005
1388 002261' 431070 000020
1389 002262' 200600 001777 MWORD <CONT,A=3,B=13,SD0,AND,D=3,SKCN,MGC=1777> ; 2006
1390 002263' 743035 640340
1391 002264' 200740 250000 MWORD <CJS,J=4025,A=7,S0A,OR,D=1> ; 2007
1392 002265' 431070 000020
1393 002266' 201000 001777 MWORD <CONT,A=4,B=14,SDQ,OR,D=4,SKCN,MGC=1777> ; 2010
1394 002267' 634046 240340
1395 002270' 201140 250000 MWORD <CJS,J=4025,A=7,S0A,OR,D=1> ; 2011
1396 002271' 431070 000020
1397 002272' 201200 001777 MWORD <CONT,A=5,B=15,SD0,RMIN,D=5,SKCN,MGC=1777> ; 2012
1398 002273' 725056 640340
1399 002274' 201340 250000 MWORD <CJS,J=4025,A=7,S0A,OR,D=1> ; 2013
1400 002275' 431070 000020
1401 002276' 201400 001777 MWORD <CONT,A=6,B=16,SDQ,SMIN,D=6,SKCN,MGC=1777> ; 2014
1402 002277' 616067 240340
1403 002300' 201540 250000 MWORD <CJS,J=4025,A=7,S0A,OR,D=1> ; 2015
1404 002301' 431070 000020
1405 002302' 201600 001777 MWORD <CONT,A=7,B=17,SD0,PLUS,D=7,SKCN,MGC=1777> ; 2016
1406 002303' 707077 640340
1407 002304' 201740 250000 MWORD <CJS,J=4025,A=7,S0A,OR,D=1> ; 2017
1408 002305' 431070 000020
1409
1410 ; Now do register 10
1411
1412 002306' 202000 020000 MWORD <CJS,J=2> ; 2020
1413 002307' 000000 000020
1414 002310' 202100 000000 MWORD <CONT,A=0,B=10,S0A,AND,D=2> ; 2021
1415 002311' 442004 000340
1416
1417 002312' 202200 001777 MWORD <CONT,A=10,B=10,SAQ,PLUS,D=0,SKCN,MGC=1777> ; 2022
1418 002313' 000104 240340
.MAIN MACRO %53A(1152) 10:04 16-Oct-84 Page 4-24
DFPTA6 MAC 19-Jan-83 11:22 Register Interference Tests SEQ 1209
1419 002314' 202340 300000 MWORD <CJS,J=4030,A=10,S0A,OR,D=1> ; 2023
1420 002315' 431100 000020
1421 002316' 202400 001777 MWORD <CONT,A=1,B=11,SAB,SMIN,D=1,SKCN,MGC=1777> ; 2024
1422 002317' 111014 640340
1423 002320' 202540 300000 MWORD <CJS,J=4030,A=10,S0A,OR,D=1> ; 2025
1424 002321' 431100 000020
1425 002322' 202600 001777 MWORD <CONT,A=2,B=12,SAQ,RMIN,D=2,SKCN,MGC=1777> ; 2026
1426 002323' 022025 240340
1427 002324' 202740 300000 MWORD <CJS,J=4030,A=10,S0A,OR,D=1> ; 2027
1428 002325' 431100 000020
1429 002326' 203000 001777 MWORD <CONT,A=3,B=13,SAB,OR,D=3,SKCN,MGC=1777> ; 2030
1430 002327' 133035 640340
1431 002330' 203140 300000 MWORD <CJS,J=4030,A=10,S0A,OR,D=1> ; 2031
1432 002331' 431100 000020
1433 002332' 203200 001777 MWORD <CONT,A=4,B=14,SAQ,AND,D=4,SKCN,MGC=1777> ; 2032
1434 002333' 044046 240340
1435 002334' 203340 300000 MWORD <CJS,J=4030,A=10,S0A,OR,D=1> ; 2033
1436 002335' 431100 000020
1437 002336' 203400 001777 MWORD <CONT,A=5,B=15,SAB,NAND,D=5,SKCN,MGC=1777> ; 2034
1438 002337' 155056 640340
1439 002340' 203540 300000 MWORD <CJS,J=4030,A=10,S0A,OR,D=1> ; 2035
1440 002341' 431100 000020
1441 002342' 203600 001777 MWORD <CONT,A=6,B=16,SAQ,XOR,D=6,SKCN,MGC=1777> ; 2036
1442 002343' 066067 240340
1443 002344' 203740 300000 MWORD <CJS,J=4030,A=10,S0A,OR,D=1> ; 2037
1444 002345' 431100 000020
1445 002346' 204000 001777 MWORD <CONT,A=7,B=17,SAB,XNOR,D=7,SKCN,MGC=1777> ; 2040
1446 002347' 177077 640340
1447 002350' 204140 300000 MWORD <CJS,J=4030,A=10,S0A,OR,D=1> ; 2041
1448 002351' 431100 000020
1449
1450 002352' 204200 001777 MWORD <CONT,A=10,B=10,S0Q,XNOR,D=0,SKCN,MGC=1777> ; 2042
1451 002353' 270104 240340
1452 002354' 204340 300000 MWORD <CJS,J=4030,A=10,S0A,OR,D=1> ; 2043
1453 002355' 431100 000020
1454 002356' 204400 001777 MWORD <CONT,A=1,B=11,S0B,XOR,D=1,SKCN,MGC=1777> ; 2044
1455 002357' 361014 640340
1456 002360' 204540 300000 MWORD <CJS,J=4030,A=10,S0A,OR,D=1> ; 2045
1457 002361' 431100 000020
1458 002362' 204600 001777 MWORD <CONT,A=2,B=12,S0Q,NAND,D=2,SKCN,MGC=1777> ; 2046
1459 002363' 252025 240340
1460 002364' 204740 300000 MWORD <CJS,J=4030,A=10,S0A,OR,D=1> ; 2047
1461 002365' 431100 000020
1462 002366' 205000 001777 MWORD <CONT,A=3,B=13,S0B,AND,D=3,SKCN,MGC=1777> ; 2050
1463 002367' 343035 640340
1464 002370' 205140 300000 MWORD <CJS,J=4030,A=10,S0A,OR,D=1> ; 2051
1465 002371' 431100 000020
1466 002372' 205200 001777 MWORD <CONT,A=4,B=14,S0Q,OR,D=4,SKCN,MGC=1777> ; 2052
1467 002373' 234046 240340
1468 002374' 205340 300000 MWORD <CJS,J=4030,A=10,S0A,OR,D=1> ; 2053
1469 002375' 431100 000020
1470 002376' 205400 001777 MWORD <CONT,A=5,B=15,S0B,RMIN,D=5,SKCN,MGC=1777> ; 2054
1471 002377' 325056 640340
1472 002400' 205540 300000 MWORD <CJS,J=4030,A=10,S0A,OR,D=1> ; 2055
1473 002401' 431100 000020
.MAIN MACRO %53A(1152) 10:04 16-Oct-84 Page 4-25
DFPTA6 MAC 19-Jan-83 11:22 Register Interference Tests SEQ 1210
1474 002402' 205600 001777 MWORD <CONT,A=6,B=16,S0Q,SMIN,D=6,SKCN,MGC=1777> ; 2056
1475 002403' 216067 240340
1476 002404' 205740 300000 MWORD <CJS,J=4030,A=10,S0A,OR,D=1> ; 2057
1477 002405' 431100 000020
1478 002406' 206000 001777 MWORD <CONT,A=7,B=17,S0B,PLUS,D=7,SKCN,MGC=1777> ; 2060
1479 002407' 307077 640340
1480 002410' 206140 300000 MWORD <CJS,J=4030,A=10,S0A,OR,D=1> ; 2061
1481 002411' 431100 000020
1482
1483 002412' 206200 001777 MWORD <CONT,A=10,B=10,S0A,PLUS,D=0,SKCN,MGC=1777> ; 2062
1484 002413' 400104 240340
1485 002414' 206340 300000 MWORD <CJS,J=4030,A=10,S0A,OR,D=1> ; 2063
1486 002415' 431100 000020
1487 002416' 206400 001777 MWORD <CONT,A=1,B=11,SDA,SMIN,D=1,SKCN,MGC=1777> ; 2064
1488 002417' 511014 640340
1489 002420' 206540 300000 MWORD <CJS,J=4030,A=10,S0A,OR,D=1> ; 2065
1490 002421' 431100 000020
1491 002422' 206600 001777 MWORD <CONT,A=2,B=12,S0A,RMIN,D=2,SKCN,MGC=1777> ; 2066
1492 002423' 422025 240340
1493 002424' 206740 300000 MWORD <CJS,J=4030,A=10,S0A,OR,D=1> ; 2067
1494 002425' 431100 000020
1495 002426' 207000 001777 MWORD <CONT,A=3,B=13,SDA,OR,D=3,SKCN,MGC=1777> ; 2070
1496 002427' 533035 640340
1497 002430' 207140 300000 MWORD <CJS,J=4030,A=10,S0A,OR,D=1> ; 2071
1498 002431' 431100 000020
1499 002432' 207200 001777 MWORD <CONT,A=4,B=14,S0A,AND,D=4,SKCN,MGC=1777> ; 2072
1500 002433' 444046 240340
1501 002434' 207340 300000 MWORD <CJS,J=4030,A=10,S0A,OR,D=1> ; 2073
1502 002435' 431100 000020
1503 002436' 207400 001777 MWORD <CONT,A=5,B=15,SDA,NAND,D=5,SKCN,MGC=1777> ; 2074
1504 002437' 555056 640340
1505 002440' 207540 300000 MWORD <CJS,J=4030,A=10,S0A,OR,D=1> ; 2075
1506 002441' 431100 000020
1507 002442' 207600 001777 MWORD <CONT,A=6,B=16,S0A,XOR,D=6,SKCN,MGC=1777> ; 2076
1508 002443' 466067 240340
1509 002444' 207740 300000 MWORD <CJS,J=4030,A=10,S0A,OR,D=1> ; 2077
1510 002445' 431100 000020
1511 002446' 210000 001777 MWORD <CONT,A=7,B=17,SDA,XNOR,D=7,SKCN,MGC=1777> ; 2100
1512 002447' 577077 640340
1513 002450' 210140 300000 MWORD <CJS,J=4030,A=10,S0A,OR,D=1> ; 2101
1514 002451' 431100 000020
1515
1516 002452' 210200 001777 MWORD <CONT,A=10,B=10,SDQ,XNOR,D=0,SKCN,MGC=1777> ; 2102
1517 002453' 670104 240340
1518 002454' 210340 300000 MWORD <CJS,J=4030,A=10,S0A,OR,D=1> ; 2103
1519 002455' 431100 000020
1520 002456' 210400 001777 MWORD <CONT,A=1,B=11,SD0,XOR,D=1,SKCN,MGC=1777> ; 2104
1521 002457' 761014 640340
1522 002460' 210540 300000 MWORD <CJS,J=4030,A=10,S0A,OR,D=1> ; 2105
1523 002461' 431100 000020
1524 002462' 210600 001777 MWORD <CONT,A=2,B=12,SDQ,NAND,D=2,SKCN,MGC=1777> ; 2106
1525 002463' 652025 240340
1526 002464' 210740 300000 MWORD <CJS,J=4030,A=10,S0A,OR,D=1> ; 2107
1527 002465' 431100 000020
1528 002466' 211000 001777 MWORD <CONT,A=3,B=13,SD0,AND,D=3,SKCN,MGC=1777> ; 2110
.MAIN MACRO %53A(1152) 10:04 16-Oct-84 Page 4-26
DFPTA6 MAC 19-Jan-83 11:22 Register Interference Tests SEQ 1211
1529 002467' 743035 640340
1530 002470' 211140 300000 MWORD <CJS,J=4030,A=10,S0A,OR,D=1> ; 2111
1531 002471' 431100 000020
1532 002472' 211200 001777 MWORD <CONT,A=4,B=14,SDQ,OR,D=4,SKCN,MGC=1777> ; 2112
1533 002473' 634046 240340
1534 002474' 211340 300000 MWORD <CJS,J=4030,A=10,S0A,OR,D=1> ; 2113
1535 002475' 431100 000020
1536 002476' 211400 001777 MWORD <CONT,A=5,B=15,SD0,RMIN,D=5,SKCN,MGC=1777> ; 2114
1537 002477' 725056 640340
1538 002500' 211540 300000 MWORD <CJS,J=4030,A=10,S0A,OR,D=1> ; 2115
1539 002501' 431100 000020
1540 002502' 211600 001777 MWORD <CONT,A=6,B=16,SDQ,SMIN,D=6,SKCN,MGC=1777> ; 2116
1541 002503' 616067 240340
1542 002504' 211740 300000 MWORD <CJS,J=4030,A=10,S0A,OR,D=1> ; 2117
1543 002505' 431100 000020
1544 002506' 212000 001777 MWORD <CONT,A=7,B=17,SD0,PLUS,D=7,SKCN,MGC=1777> ; 2120
1545 002507' 707077 640340
1546 002510' 212140 300000 MWORD <CJS,J=4030,A=10,S0A,OR,D=1> ; 2121
1547 002511' 431100 000020
1548
1549 ; Now do register 11
1550
1551 002512' 212200 020000 MWORD <CJS,J=2> ; 2122
1552 002513' 000000 000020
1553 002514' 212300 000000 MWORD <CONT,A=0,B=11,S0A,AND,D=2> ; 2123
1554 002515' 442004 400340
1555
1556 002516' 212400 001777 MWORD <CONT,A=10,B=0,SAQ,PLUS,D=0,SKCN,MGC=1777> ; 2124
1557 002517' 000100 240340
1558 002520' 212540 330000 MWORD <CJS,J=4033,A=11,S0A,OR,D=1> ; 2125
1559 002521' 431110 000020
1560 002522' 212600 001777 MWORD <CONT,A=11,B=1,SAB,SMIN,D=1,SKCN,MGC=1777> ; 2126
1561 002523' 111110 640340
1562 002524' 212740 330000 MWORD <CJS,J=4033,A=11,S0A,OR,D=1> ; 2127
1563 002525' 431110 000020
1564 002526' 213000 001777 MWORD <CONT,A=12,B=2,SAQ,RMIN,D=2,SKCN,MGC=1777> ; 2130
1565 002527' 022121 240340
1566 002530' 213140 330000 MWORD <CJS,J=4033,A=11,S0A,OR,D=1> ; 2131
1567 002531' 431110 000020
1568 002532' 213200 001777 MWORD <CONT,A=13,B=3,SAB,OR,D=3,SKCN,MGC=1777> ; 2132
1569 002533' 133131 640340
1570 002534' 213340 330000 MWORD <CJS,J=4033,A=11,S0A,OR,D=1> ; 2133
1571 002535' 431110 000020
1572 002536' 213400 001777 MWORD <CONT,A=14,B=4,SAQ,AND,D=4,SKCN,MGC=1777> ; 2134
1573 002537' 044142 240340
1574 002540' 213540 330000 MWORD <CJS,J=4033,A=11,S0A,OR,D=1> ; 2135
1575 002541' 431110 000020
1576 002542' 213600 001777 MWORD <CONT,A=15,B=5,SAB,NAND,D=5,SKCN,MGC=1777> ; 2136
1577 002543' 155152 640340
1578 002544' 213740 330000 MWORD <CJS,J=4033,A=11,S0A,OR,D=1> ; 2137
1579 002545' 431110 000020
1580 002546' 214000 001777 MWORD <CONT,A=16,B=6,SAQ,XOR,D=6,SKCN,MGC=1777> ; 2140
1581 002547' 066163 240340
1582 002550' 214140 330000 MWORD <CJS,J=4033,A=11,S0A,OR,D=1> ; 2141
1583 002551' 431110 000020
.MAIN MACRO %53A(1152) 10:04 16-Oct-84 Page 4-27
DFPTA6 MAC 19-Jan-83 11:22 Register Interference Tests SEQ 1212
1584 002552' 214200 001777 MWORD <CONT,A=17,B=7,SAB,XNOR,D=7,SKCN,MGC=1777> ; 2142
1585 002553' 177173 640340
1586 002554' 214340 330000 MWORD <CJS,J=4033,A=11,S0A,OR,D=1> ; 2143
1587 002555' 431110 000020
1588
1589 002556' 214400 001777 MWORD <CONT,A=10,B=0,S0Q,XNOR,D=0,SKCN,MGC=1777> ; 2144
1590 002557' 270100 240340
1591 002560' 214540 330000 MWORD <CJS,J=4033,A=11,S0A,OR,D=1> ; 2145
1592 002561' 431110 000020
1593 002562' 214600 001777 MWORD <CONT,A=11,B=1,S0B,XOR,D=1,SKCN,MGC=1777> ; 2146
1594 002563' 361110 640340
1595 002564' 214740 330000 MWORD <CJS,J=4033,A=11,S0A,OR,D=1> ; 2147
1596 002565' 431110 000020
1597 002566' 215000 001777 MWORD <CONT,A=12,B=2,S0Q,NAND,D=2,SKCN,MGC=1777> ; 2150
1598 002567' 252121 240340
1599 002570' 215140 330000 MWORD <CJS,J=4033,A=11,S0A,OR,D=1> ; 2151
1600 002571' 431110 000020
1601 002572' 215200 001777 MWORD <CONT,A=13,B=3,S0B,AND,D=3,SKCN,MGC=1777> ; 2152
1602 002573' 343131 640340
1603 002574' 215340 330000 MWORD <CJS,J=4033,A=11,S0A,OR,D=1> ; 2153
1604 002575' 431110 000020
1605 002576' 215400 001777 MWORD <CONT,A=14,B=4,S0Q,OR,D=4,SKCN,MGC=1777> ; 2154
1606 002577' 234142 240340
1607 002600' 215540 330000 MWORD <CJS,J=4033,A=11,S0A,OR,D=1> ; 2155
1608 002601' 431110 000020
1609 002602' 215600 001777 MWORD <CONT,A=15,B=5,S0B,RMIN,D=5,SKCN,MGC=1777> ; 2156
1610 002603' 325152 640340
1611 002604' 215740 330000 MWORD <CJS,J=4033,A=11,S0A,OR,D=1> ; 2157
1612 002605' 431110 000020
1613 002606' 216000 001777 MWORD <CONT,A=16,B=6,S0Q,SMIN,D=6,SKCN,MGC=1777> ; 2160
1614 002607' 216163 240340
1615 002610' 216140 330000 MWORD <CJS,J=4033,A=11,S0A,OR,D=1> ; 2161
1616 002611' 431110 000020
1617 002612' 216200 001777 MWORD <CONT,A=17,B=7,S0B,PLUS,D=7,SKCN,MGC=1777> ; 2162
1618 002613' 307173 640340
1619 002614' 216340 330000 MWORD <CJS,J=4033,A=11,S0A,OR,D=1> ; 2163
1620 002615' 431110 000020
1621
1622 002616' 216400 001777 MWORD <CONT,A=10,B=0,S0A,PLUS,D=0,SKCN,MGC=1777> ; 2164
1623 002617' 400100 240340
1624 002620' 216540 330000 MWORD <CJS,J=4033,A=11,S0A,OR,D=1> ; 2165
1625 002621' 431110 000020
1626 002622' 216600 001777 MWORD <CONT,A=11,B=1,SDA,SMIN,D=1,SKCN,MGC=1777> ; 2166
1627 002623' 511110 640340
1628 002624' 216740 330000 MWORD <CJS,J=4033,A=11,S0A,OR,D=1> ; 2167
1629 002625' 431110 000020
1630 002626' 217000 001777 MWORD <CONT,A=12,B=2,S0A,RMIN,D=2,SKCN,MGC=1777> ; 2170
1631 002627' 422121 240340
1632 002630' 217140 330000 MWORD <CJS,J=4033,A=11,S0A,OR,D=1> ; 2171
1633 002631' 431110 000020
1634 002632' 217200 001777 MWORD <CONT,A=13,B=3,SDA,OR,D=3,SKCN,MGC=1777> ; 2172
1635 002633' 533131 640340
1636 002634' 217340 330000 MWORD <CJS,J=4033,A=11,S0A,OR,D=1> ; 2173
1637 002635' 431110 000020
1638 002636' 217400 001777 MWORD <CONT,A=14,B=4,S0A,AND,D=4,SKCN,MGC=1777> ; 2174
.MAIN MACRO %53A(1152) 10:04 16-Oct-84 Page 4-28
DFPTA6 MAC 19-Jan-83 11:22 Register Interference Tests SEQ 1213
1639 002637' 444142 240340
1640 002640' 217540 330000 MWORD <CJS,J=4033,A=11,S0A,OR,D=1> ; 2175
1641 002641' 431110 000020
1642 002642' 217600 001777 MWORD <CONT,A=15,B=5,SDA,NAND,D=5,SKCN,MGC=1777> ; 2176
1643 002643' 555152 640340
1644 002644' 217740 330000 MWORD <CJS,J=4033,A=11,S0A,OR,D=1> ; 2177
1645 002645' 431110 000020
1646 002646' 220000 001777 MWORD <CONT,A=16,B=6,S0A,XOR,D=6,SKCN,MGC=1777> ; 2200
1647 002647' 466163 240340
1648 002650' 220140 330000 MWORD <CJS,J=4033,A=11,S0A,OR,D=1> ; 2201
1649 002651' 431110 000020
1650 002652' 220200 001777 MWORD <CONT,A=17,B=7,SDA,XNOR,D=7,SKCN,MGC=1777> ; 2202
1651 002653' 577173 640340
1652 002654' 220340 330000 MWORD <CJS,J=4033,A=11,S0A,OR,D=1> ; 2203
1653 002655' 431110 000020
1654
1655 002656' 220400 001777 MWORD <CONT,A=10,B=0,SDQ,XNOR,D=0,SKCN,MGC=1777> ; 2204
1656 002657' 670100 240340
1657 002660' 220540 330000 MWORD <CJS,J=4033,A=11,S0A,OR,D=1> ; 2205
1658 002661' 431110 000020
1659 002662' 220600 001777 MWORD <CONT,A=11,B=1,SD0,XOR,D=1,SKCN,MGC=1777> ; 2206
1660 002663' 761110 640340
1661 002664' 220740 330000 MWORD <CJS,J=4033,A=11,S0A,OR,D=1> ; 2207
1662 002665' 431110 000020
1663 002666' 221000 001777 MWORD <CONT,A=12,B=2,SDQ,NAND,D=2,SKCN,MGC=1777> ; 2210
1664 002667' 652121 240340
1665 002670' 221140 330000 MWORD <CJS,J=4033,A=11,S0A,OR,D=1> ; 2211
1666 002671' 431110 000020
1667 002672' 221200 001777 MWORD <CONT,A=13,B=3,SD0,AND,D=3,SKCN,MGC=1777> ; 2212
1668 002673' 743131 640340
1669 002674' 221340 330000 MWORD <CJS,J=4033,A=11,S0A,OR,D=1> ; 2213
1670 002675' 431110 000020
1671 002676' 221400 001777 MWORD <CONT,A=14,B=4,SDQ,OR,D=4,SKCN,MGC=1777> ; 2214
1672 002677' 634142 240340
1673 002700' 221540 330000 MWORD <CJS,J=4033,A=11,S0A,OR,D=1> ; 2215
1674 002701' 431110 000020
1675 002702' 221600 001777 MWORD <CONT,A=15,B=5,SD0,RMIN,D=5,SKCN,MGC=1777> ; 2216
1676 002703' 725152 640340
1677 002704' 221740 330000 MWORD <CJS,J=4033,A=11,S0A,OR,D=1> ; 2217
1678 002705' 431110 000020
1679 002706' 222000 001777 MWORD <CONT,A=16,B=6,SDQ,SMIN,D=6,SKCN,MGC=1777> ; 2220
1680 002707' 616163 240340
1681 002710' 222140 330000 MWORD <CJS,J=4033,A=11,S0A,OR,D=1> ; 2221
1682 002711' 431110 000020
1683 002712' 222200 001777 MWORD <CONT,A=17,B=7,SD0,PLUS,D=7,SKCN,MGC=1777> ; 2222
1684 002713' 707173 640340
1685 002714' 222340 330000 MWORD <CJS,J=4033,A=11,S0A,OR,D=1> ; 2223
1686 002715' 431110 000020
1687
1688 ; Now do register 12
1689
1690 002716' 222400 020000 MWORD <CJS,J=2> ; 2224
1691 002717' 000000 000020
1692 002720' 222500 000000 MWORD <CONT,A=0,B=12,S0A,AND,D=2> ; 2225
1693 002721' 442005 000340
.MAIN MACRO %53A(1152) 10:04 16-Oct-84 Page 4-29
DFPTA6 MAC 19-Jan-83 11:22 Register Interference Tests SEQ 1214
1694
1695 002722' 222600 001777 MWORD <CONT,A=10,B=0,SAQ,PLUS,D=0,SKCN,MGC=1777> ; 2226
1696 002723' 000100 240340
1697 002724' 222740 360000 MWORD <CJS,J=4036,A=12,S0A,OR,D=1> ; 2227
1698 002725' 431120 000020
1699 002726' 223000 001777 MWORD <CONT,A=11,B=1,SAB,SMIN,D=1,SKCN,MGC=1777> ; 2230
1700 002727' 111110 640340
1701 002730' 223140 360000 MWORD <CJS,J=4036,A=12,S0A,OR,D=1> ; 2231
1702 002731' 431120 000020
1703 002732' 223200 001777 MWORD <CONT,A=12,B=2,SAQ,RMIN,D=2,SKCN,MGC=1777> ; 2232
1704 002733' 022121 240340
1705 002734' 223340 360000 MWORD <CJS,J=4036,A=12,S0A,OR,D=1> ; 2233
1706 002735' 431120 000020
1707 002736' 223400 001777 MWORD <CONT,A=13,B=3,SAB,OR,D=3,SKCN,MGC=1777> ; 2234
1708 002737' 133131 640340
1709 002740' 223540 360000 MWORD <CJS,J=4036,A=12,S0A,OR,D=1> ; 2235
1710 002741' 431120 000020
1711 002742' 223600 001777 MWORD <CONT,A=14,B=4,SAQ,AND,D=4,SKCN,MGC=1777> ; 2236
1712 002743' 044142 240340
1713 002744' 223740 360000 MWORD <CJS,J=4036,A=12,S0A,OR,D=1> ; 2237
1714 002745' 431120 000020
1715 002746' 224000 001777 MWORD <CONT,A=15,B=5,SAB,NAND,D=5,SKCN,MGC=1777> ; 2240
1716 002747' 155152 640340
1717 002750' 224140 360000 MWORD <CJS,J=4036,A=12,S0A,OR,D=1> ; 2241
1718 002751' 431120 000020
1719 002752' 224200 001777 MWORD <CONT,A=16,B=6,SAQ,XOR,D=6,SKCN,MGC=1777> ; 2242
1720 002753' 066163 240340
1721 002754' 224340 360000 MWORD <CJS,J=4036,A=12,S0A,OR,D=1> ; 2243
1722 002755' 431120 000020
1723 002756' 224400 001777 MWORD <CONT,A=17,B=7,SAB,XNOR,D=7,SKCN,MGC=1777> ; 2244
1724 002757' 177173 640340
1725 002760' 224540 360000 MWORD <CJS,J=4036,A=12,S0A,OR,D=1> ; 2245
1726 002761' 431120 000020
1727
1728 002762' 224600 001777 MWORD <CONT,A=10,B=0,S0Q,XNOR,D=0,SKCN,MGC=1777> ; 2246
1729 002763' 270100 240340
1730 002764' 224740 360000 MWORD <CJS,J=4036,A=12,S0A,OR,D=1> ; 2247
1731 002765' 431120 000020
1732 002766' 225000 001777 MWORD <CONT,A=11,B=1,S0B,XOR,D=1,SKCN,MGC=1777> ; 2250
1733 002767' 361110 640340
1734 002770' 225140 360000 MWORD <CJS,J=4036,A=12,S0A,OR,D=1> ; 2251
1735 002771' 431120 000020
1736 002772' 225200 001777 MWORD <CONT,A=12,B=2,S0Q,NAND,D=2,SKCN,MGC=1777> ; 2252
1737 002773' 252121 240340
1738 002774' 225340 360000 MWORD <CJS,J=4036,A=12,S0A,OR,D=1> ; 2253
1739 002775' 431120 000020
1740 002776' 225400 001777 MWORD <CONT,A=13,B=3,S0B,AND,D=3,SKCN,MGC=1777> ; 2254
1741 002777' 343131 640340
1742 003000' 225540 360000 MWORD <CJS,J=4036,A=12,S0A,OR,D=1> ; 2255
1743 003001' 431120 000020
1744 003002' 225600 001777 MWORD <CONT,A=14,B=4,S0Q,OR,D=4,SKCN,MGC=1777> ; 2256
1745 003003' 234142 240340
1746 003004' 225740 360000 MWORD <CJS,J=4036,A=12,S0A,OR,D=1> ; 2257
1747 003005' 431120 000020
1748 003006' 226000 001777 MWORD <CONT,A=15,B=5,S0B,RMIN,D=5,SKCN,MGC=1777> ; 2260
.MAIN MACRO %53A(1152) 10:04 16-Oct-84 Page 4-30
DFPTA6 MAC 19-Jan-83 11:22 Register Interference Tests SEQ 1215
1749 003007' 325152 640340
1750 003010' 226140 360000 MWORD <CJS,J=4036,A=12,S0A,OR,D=1> ; 2261
1751 003011' 431120 000020
1752 003012' 226200 001777 MWORD <CONT,A=16,B=6,S0Q,SMIN,D=6,SKCN,MGC=1777> ; 2262
1753 003013' 216163 240340
1754 003014' 226340 360000 MWORD <CJS,J=4036,A=12,S0A,OR,D=1> ; 2263
1755 003015' 431120 000020
1756 003016' 226400 001777 MWORD <CONT,A=17,B=7,S0B,PLUS,D=7,SKCN,MGC=1777> ; 2264
1757 003017' 307173 640340
1758 003020' 226540 360000 MWORD <CJS,J=4036,A=12,S0A,OR,D=1> ; 2265
1759 003021' 431120 000020
1760
1761 003022' 226600 001777 MWORD <CONT,A=10,B=0,S0A,PLUS,D=0,SKCN,MGC=1777> ; 2266
1762 003023' 400100 240340
1763 003024' 226740 360000 MWORD <CJS,J=4036,A=12,S0A,OR,D=1> ; 2267
1764 003025' 431120 000020
1765 003026' 227000 001777 MWORD <CONT,A=11,B=1,SDA,SMIN,D=1,SKCN,MGC=1777> ; 2270
1766 003027' 511110 640340
1767 003030' 227140 360000 MWORD <CJS,J=4036,A=12,S0A,OR,D=1> ; 2271
1768 003031' 431120 000020
1769 003032' 227200 001777 MWORD <CONT,A=12,B=2,S0A,RMIN,D=2,SKCN,MGC=1777> ; 2272
1770 003033' 422121 240340
1771 003034' 227340 360000 MWORD <CJS,J=4036,A=12,S0A,OR,D=1> ; 2273
1772 003035' 431120 000020
1773 003036' 227400 001777 MWORD <CONT,A=13,B=3,SDA,OR,D=3,SKCN,MGC=1777> ; 2274
1774 003037' 533131 640340
1775 003040' 227540 360000 MWORD <CJS,J=4036,A=12,S0A,OR,D=1> ; 2275
1776 003041' 431120 000020
1777 003042' 227600 001777 MWORD <CONT,A=14,B=4,S0A,AND,D=4,SKCN,MGC=1777> ; 2276
1778 003043' 444142 240340
1779 003044' 227740 360000 MWORD <CJS,J=4036,A=12,S0A,OR,D=1> ; 2277
1780 003045' 431120 000020
1781 003046' 230000 001777 MWORD <CONT,A=15,B=5,SDA,NAND,D=5,SKCN,MGC=1777> ; 2300
1782 003047' 555152 640340
1783 003050' 230140 360000 MWORD <CJS,J=4036,A=12,S0A,OR,D=1> ; 2301
1784 003051' 431120 000020
1785 003052' 230200 001777 MWORD <CONT,A=16,B=6,S0A,XOR,D=6,SKCN,MGC=1777> ; 2302
1786 003053' 466163 240340
1787 003054' 230340 360000 MWORD <CJS,J=4036,A=12,S0A,OR,D=1> ; 2303
1788 003055' 431120 000020
1789 003056' 230400 001777 MWORD <CONT,A=17,B=7,SDA,XNOR,D=7,SKCN,MGC=1777> ; 2304
1790 003057' 577173 640340
1791 003060' 230540 360000 MWORD <CJS,J=4036,A=12,S0A,OR,D=1> ; 2305
1792 003061' 431120 000020
1793
1794 003062' 230600 001777 MWORD <CONT,A=10,B=0,SDQ,XNOR,D=0,SKCN,MGC=1777> ; 2306
1795 003063' 670100 240340
1796 003064' 230740 360000 MWORD <CJS,J=4036,A=12,S0A,OR,D=1> ; 2307
1797 003065' 431120 000020
1798 003066' 231000 001777 MWORD <CONT,A=11,B=1,SD0,XOR,D=1,SKCN,MGC=1777> ; 2310
1799 003067' 761110 640340
1800 003070' 231140 360000 MWORD <CJS,J=4036,A=12,S0A,OR,D=1> ; 2311
1801 003071' 431120 000020
1802 003072' 231200 001777 MWORD <CONT,A=12,B=2,SDQ,NAND,D=2,SKCN,MGC=1777> ; 2312
1803 003073' 652121 240340
.MAIN MACRO %53A(1152) 10:04 16-Oct-84 Page 4-31
DFPTA6 MAC 19-Jan-83 11:22 Register Interference Tests SEQ 1216
1804 003074' 231340 360000 MWORD <CJS,J=4036,A=12,S0A,OR,D=1> ; 2313
1805 003075' 431120 000020
1806 003076' 231400 001777 MWORD <CONT,A=13,B=3,SD0,AND,D=3,SKCN,MGC=1777> ; 2314
1807 003077' 743131 640340
1808 003100' 231540 360000 MWORD <CJS,J=4036,A=12,S0A,OR,D=1> ; 2315
1809 003101' 431120 000020
1810 003102' 231600 001777 MWORD <CONT,A=14,B=4,SDQ,OR,D=4,SKCN,MGC=1777> ; 2316
1811 003103' 634142 240340
1812 003104' 231740 360000 MWORD <CJS,J=4036,A=12,S0A,OR,D=1> ; 2317
1813 003105' 431120 000020
1814 003106' 232000 001777 MWORD <CONT,A=15,B=5,SD0,RMIN,D=5,SKCN,MGC=1777> ; 2320
1815 003107' 725152 640340
1816 003110' 232140 360000 MWORD <CJS,J=4036,A=12,S0A,OR,D=1> ; 2321
1817 003111' 431120 000020
1818 003112' 232200 001777 MWORD <CONT,A=16,B=6,SDQ,SMIN,D=6,SKCN,MGC=1777> ; 2322
1819 003113' 616163 240340
1820 003114' 232340 360000 MWORD <CJS,J=4036,A=12,S0A,OR,D=1> ; 2323
1821 003115' 431120 000020
1822 003116' 232400 001777 MWORD <CONT,A=17,B=7,SD0,PLUS,D=7,SKCN,MGC=1777> ; 2324
1823 003117' 707173 640340
1824 003120' 232540 360000 MWORD <CJS,J=4036,A=12,S0A,OR,D=1> ; 2325
1825 003121' 431120 000020
1826
1827 ; Now do register 13
1828
1829 003122' 232600 020000 MWORD <CJS,J=2> ; 2326
1830 003123' 000000 000020
1831 003124' 232700 000000 MWORD <CONT,A=0,B=13,S0A,AND,D=2> ; 2327
1832 003125' 442005 400340
1833
1834 003126' 233000 001777 MWORD <CONT,A=10,B=0,SAQ,PLUS,D=0,SKCN,MGC=1777> ; 2330
1835 003127' 000100 240340
1836 003130' 233140 410000 MWORD <CJS,J=4041,A=13,S0A,OR,D=1> ; 2331
1837 003131' 431130 000020
1838 003132' 233200 001777 MWORD <CONT,A=11,B=1,SAB,SMIN,D=1,SKCN,MGC=1777> ; 2332
1839 003133' 111110 640340
1840 003134' 233340 410000 MWORD <CJS,J=4041,A=13,S0A,OR,D=1> ; 2333
1841 003135' 431130 000020
1842 003136' 233400 001777 MWORD <CONT,A=12,B=2,SAQ,RMIN,D=2,SKCN,MGC=1777> ; 2334
1843 003137' 022121 240340
1844 003140' 233540 410000 MWORD <CJS,J=4041,A=13,S0A,OR,D=1> ; 2335
1845 003141' 431130 000020
1846 003142' 233600 001777 MWORD <CONT,A=13,B=3,SAB,OR,D=3,SKCN,MGC=1777> ; 2336
1847 003143' 133131 640340
1848 003144' 233740 410000 MWORD <CJS,J=4041,A=13,S0A,OR,D=1> ; 2337
1849 003145' 431130 000020
1850 003146' 234000 001777 MWORD <CONT,A=14,B=4,SAQ,AND,D=4,SKCN,MGC=1777> ; 2340
1851 003147' 044142 240340
1852 003150' 234140 410000 MWORD <CJS,J=4041,A=13,S0A,OR,D=1> ; 2341
1853 003151' 431130 000020
1854 003152' 234200 001777 MWORD <CONT,A=15,B=5,SAB,NAND,D=5,SKCN,MGC=1777> ; 2342
1855 003153' 155152 640340
1856 003154' 234340 410000 MWORD <CJS,J=4041,A=13,S0A,OR,D=1> ; 2343
1857 003155' 431130 000020
1858 003156' 234400 001777 MWORD <CONT,A=16,B=6,SAQ,XOR,D=6,SKCN,MGC=1777> ; 2344
.MAIN MACRO %53A(1152) 10:04 16-Oct-84 Page 4-32
DFPTA6 MAC 19-Jan-83 11:22 Register Interference Tests SEQ 1217
1859 003157' 066163 240340
1860 003160' 234540 410000 MWORD <CJS,J=4041,A=13,S0A,OR,D=1> ; 2345
1861 003161' 431130 000020
1862 003162' 234600 001777 MWORD <CONT,A=17,B=7,SAB,XNOR,D=7,SKCN,MGC=1777> ; 2346
1863 003163' 177173 640340
1864 003164' 234740 410000 MWORD <CJS,J=4041,A=13,S0A,OR,D=1> ; 2347
1865 003165' 431130 000020
1866
1867 003166' 235000 001777 MWORD <CONT,A=10,B=0,S0Q,XNOR,D=0,SKCN,MGC=1777> ; 2350
1868 003167' 270100 240340
1869 003170' 235140 410000 MWORD <CJS,J=4041,A=13,S0A,OR,D=1> ; 2351
1870 003171' 431130 000020
1871 003172' 235200 001777 MWORD <CONT,A=11,B=1,S0B,XOR,D=1,SKCN,MGC=1777> ; 2352
1872 003173' 361110 640340
1873 003174' 235340 410000 MWORD <CJS,J=4041,A=13,S0A,OR,D=1> ; 2353
1874 003175' 431130 000020
1875 003176' 235400 001777 MWORD <CONT,A=12,B=2,S0Q,NAND,D=2,SKCN,MGC=1777> ; 2354
1876 003177' 252121 240340
1877 003200' 235540 410000 MWORD <CJS,J=4041,A=13,S0A,OR,D=1> ; 2355
1878 003201' 431130 000020
1879 003202' 235600 001777 MWORD <CONT,A=13,B=3,S0B,AND,D=3,SKCN,MGC=1777> ; 2356
1880 003203' 343131 640340
1881 003204' 235740 410000 MWORD <CJS,J=4041,A=13,S0A,OR,D=1> ; 2357
1882 003205' 431130 000020
1883 003206' 236000 001777 MWORD <CONT,A=14,B=4,S0Q,OR,D=4,SKCN,MGC=1777> ; 2360
1884 003207' 234142 240340
1885 003210' 236140 410000 MWORD <CJS,J=4041,A=13,S0A,OR,D=1> ; 2361
1886 003211' 431130 000020
1887 003212' 236200 001777 MWORD <CONT,A=15,B=5,S0B,RMIN,D=5,SKCN,MGC=1777> ; 2362
1888 003213' 325152 640340
1889 003214' 236340 410000 MWORD <CJS,J=4041,A=13,S0A,OR,D=1> ; 2363
1890 003215' 431130 000020
1891 003216' 236400 001777 MWORD <CONT,A=16,B=6,S0Q,SMIN,D=6,SKCN,MGC=1777> ; 2364
1892 003217' 216163 240340
1893 003220' 236540 410000 MWORD <CJS,J=4041,A=13,S0A,OR,D=1> ; 2365
1894 003221' 431130 000020
1895 003222' 236600 001777 MWORD <CONT,A=17,B=7,S0B,PLUS,D=7,SKCN,MGC=1777> ; 2366
1896 003223' 307173 640340
1897 003224' 236740 410000 MWORD <CJS,J=4041,A=13,S0A,OR,D=1> ; 2367
1898 003225' 431130 000020
1899
1900 003226' 237000 001777 MWORD <CONT,A=10,B=0,S0A,PLUS,D=0,SKCN,MGC=1777> ; 2370
1901 003227' 400100 240340
1902 003230' 237140 410000 MWORD <CJS,J=4041,A=13,S0A,OR,D=1> ; 2371
1903 003231' 431130 000020
1904 003232' 237200 001777 MWORD <CONT,A=11,B=1,SDA,SMIN,D=1,SKCN,MGC=1777> ; 2372
1905 003233' 511110 640340
1906 003234' 237340 410000 MWORD <CJS,J=4041,A=13,S0A,OR,D=1> ; 2373
1907 003235' 431130 000020
1908 003236' 237400 001777 MWORD <CONT,A=12,B=2,S0A,RMIN,D=2,SKCN,MGC=1777> ; 2374
1909 003237' 422121 240340
1910 003240' 237540 410000 MWORD <CJS,J=4041,A=13,S0A,OR,D=1> ; 2375
1911 003241' 431130 000020
1912 003242' 237600 001777 MWORD <CONT,A=13,B=3,SDA,OR,D=3,SKCN,MGC=1777> ; 2376
1913 003243' 533131 640340
.MAIN MACRO %53A(1152) 10:04 16-Oct-84 Page 4-33
DFPTA6 MAC 19-Jan-83 11:22 Register Interference Tests SEQ 1218
1914 003244' 237740 410000 MWORD <CJS,J=4041,A=13,S0A,OR,D=1> ; 2377
1915 003245' 431130 000020
1916 003246' 240000 001777 MWORD <CONT,A=14,B=4,S0A,AND,D=4,SKCN,MGC=1777> ; 2400
1917 003247' 444142 240340
1918 003250' 240140 410000 MWORD <CJS,J=4041,A=13,S0A,OR,D=1> ; 2401
1919 003251' 431130 000020
1920 003252' 240200 001777 MWORD <CONT,A=15,B=5,SDA,NAND,D=5,SKCN,MGC=1777> ; 2402
1921 003253' 555152 640340
1922 003254' 240340 410000 MWORD <CJS,J=4041,A=13,S0A,OR,D=1> ; 2403
1923 003255' 431130 000020
1924 003256' 240400 001777 MWORD <CONT,A=16,B=6,S0A,XOR,D=6,SKCN,MGC=1777> ; 2404
1925 003257' 466163 240340
1926 003260' 240540 410000 MWORD <CJS,J=4041,A=13,S0A,OR,D=1> ; 2405
1927 003261' 431130 000020
1928 003262' 240600 001777 MWORD <CONT,A=17,B=7,SDA,XNOR,D=7,SKCN,MGC=1777> ; 2406
1929 003263' 577173 640340
1930 003264' 240740 410000 MWORD <CJS,J=4041,A=13,S0A,OR,D=1> ; 2407
1931 003265' 431130 000020
1932
1933 003266' 241000 001777 MWORD <CONT,A=10,B=0,SDQ,XNOR,D=0,SKCN,MGC=1777> ; 2410
1934 003267' 670100 240340
1935 003270' 241140 410000 MWORD <CJS,J=4041,A=13,S0A,OR,D=1> ; 2411
1936 003271' 431130 000020
1937 003272' 241200 001777 MWORD <CONT,A=11,B=1,SD0,XOR,D=1,SKCN,MGC=1777> ; 2412
1938 003273' 761110 640340
1939 003274' 241340 410000 MWORD <CJS,J=4041,A=13,S0A,OR,D=1> ; 2413
1940 003275' 431130 000020
1941 003276' 241400 001777 MWORD <CONT,A=12,B=2,SDQ,NAND,D=2,SKCN,MGC=1777> ; 2414
1942 003277' 652121 240340
1943 003300' 241540 410000 MWORD <CJS,J=4041,A=13,S0A,OR,D=1> ; 2415
1944 003301' 431130 000020
1945 003302' 241600 001777 MWORD <CONT,A=13,B=3,SD0,AND,D=3,SKCN,MGC=1777> ; 2416
1946 003303' 743131 640340
1947 003304' 241740 410000 MWORD <CJS,J=4041,A=13,S0A,OR,D=1> ; 2417
1948 003305' 431130 000020
1949 003306' 242000 001777 MWORD <CONT,A=14,B=4,SDQ,OR,D=4,SKCN,MGC=1777> ; 2420
1950 003307' 634142 240340
1951 003310' 242140 410000 MWORD <CJS,J=4041,A=13,S0A,OR,D=1> ; 2421
1952 003311' 431130 000020
1953 003312' 242200 001777 MWORD <CONT,A=15,B=5,SD0,RMIN,D=5,SKCN,MGC=1777> ; 2422
1954 003313' 725152 640340
1955 003314' 242340 410000 MWORD <CJS,J=4041,A=13,S0A,OR,D=1> ; 2423
1956 003315' 431130 000020
1957 003316' 242400 001777 MWORD <CONT,A=16,B=6,SDQ,SMIN,D=6,SKCN,MGC=1777> ; 2424
1958 003317' 616163 240340
1959 003320' 242540 410000 MWORD <CJS,J=4041,A=13,S0A,OR,D=1> ; 2425
1960 003321' 431130 000020
1961 003322' 242600 001777 MWORD <CONT,A=17,B=7,SD0,PLUS,D=7,SKCN,MGC=1777> ; 2426
1962 003323' 707173 640340
1963 003324' 242740 410000 MWORD <CJS,J=4041,A=13,S0A,OR,D=1> ; 2427
1964 003325' 431130 000020
1965
1966 ; Now do register 14
1967
1968 003326' 243000 020000 MWORD <CJS,J=2> ; 2430
.MAIN MACRO %53A(1152) 10:04 16-Oct-84 Page 4-34
DFPTA6 MAC 19-Jan-83 11:22 Register Interference Tests SEQ 1219
1969 003327' 000000 000020
1970 003330' 243100 000000 MWORD <CONT,A=0,B=14,S0A,AND,D=2> ; 2431
1971 003331' 442006 000340
1972
1973 003332' 243200 001777 MWORD <CONT,A=10,B=0,SAQ,PLUS,D=0,SKCN,MGC=1777> ; 2432
1974 003333' 000100 240340
1975 003334' 243340 440000 MWORD <CJS,J=4044,A=14,S0A,OR,D=1> ; 2433
1976 003335' 431140 000020
1977 003336' 243400 001777 MWORD <CONT,A=11,B=1,SAB,SMIN,D=1,SKCN,MGC=1777> ; 2434
1978 003337' 111110 640340
1979 003340' 243540 440000 MWORD <CJS,J=4044,A=14,S0A,OR,D=1> ; 2435
1980 003341' 431140 000020
1981 003342' 243600 001777 MWORD <CONT,A=12,B=2,SAQ,RMIN,D=2,SKCN,MGC=1777> ; 2436
1982 003343' 022121 240340
1983 003344' 243740 440000 MWORD <CJS,J=4044,A=14,S0A,OR,D=1> ; 2437
1984 003345' 431140 000020
1985 003346' 244000 001777 MWORD <CONT,A=13,B=3,SAB,OR,D=3,SKCN,MGC=1777> ; 2440
1986 003347' 133131 640340
1987 003350' 244140 440000 MWORD <CJS,J=4044,A=14,S0A,OR,D=1> ; 2441
1988 003351' 431140 000020
1989 003352' 244200 001777 MWORD <CONT,A=14,B=4,SAQ,AND,D=4,SKCN,MGC=1777> ; 2442
1990 003353' 044142 240340
1991 003354' 244340 440000 MWORD <CJS,J=4044,A=14,S0A,OR,D=1> ; 2443
1992 003355' 431140 000020
1993 003356' 244400 001777 MWORD <CONT,A=15,B=5,SAB,NAND,D=5,SKCN,MGC=1777> ; 2444
1994 003357' 155152 640340
1995 003360' 244540 440000 MWORD <CJS,J=4044,A=14,S0A,OR,D=1> ; 2445
1996 003361' 431140 000020
1997 003362' 244600 001777 MWORD <CONT,A=16,B=6,SAQ,XOR,D=6,SKCN,MGC=1777> ; 2446
1998 003363' 066163 240340
1999 003364' 244740 440000 MWORD <CJS,J=4044,A=14,S0A,OR,D=1> ; 2447
2000 003365' 431140 000020
2001 003366' 245000 001777 MWORD <CONT,A=17,B=7,SAB,XNOR,D=7,SKCN,MGC=1777> ; 2450
2002 003367' 177173 640340
2003 003370' 245140 440000 MWORD <CJS,J=4044,A=14,S0A,OR,D=1> ; 2451
2004 003371' 431140 000020
2005
2006 003372' 245200 001777 MWORD <CONT,A=10,B=0,S0Q,XNOR,D=0,SKCN,MGC=1777> ; 2452
2007 003373' 270100 240340
2008 003374' 245340 440000 MWORD <CJS,J=4044,A=14,S0A,OR,D=1> ; 2453
2009 003375' 431140 000020
2010 003376' 245400 001777 MWORD <CONT,A=11,B=1,S0B,XOR,D=1,SKCN,MGC=1777> ; 2454
2011 003377' 361110 640340
2012 003400' 245540 440000 MWORD <CJS,J=4044,A=14,S0A,OR,D=1> ; 2455
2013 003401' 431140 000020
2014 003402' 245600 001777 MWORD <CONT,A=12,B=2,S0Q,NAND,D=2,SKCN,MGC=1777> ; 2456
2015 003403' 252121 240340
2016 003404' 245740 440000 MWORD <CJS,J=4044,A=14,S0A,OR,D=1> ; 2457
2017 003405' 431140 000020
2018 003406' 246000 001777 MWORD <CONT,A=13,B=3,S0B,AND,D=3,SKCN,MGC=1777> ; 2460
2019 003407' 343131 640340
2020 003410' 246140 440000 MWORD <CJS,J=4044,A=14,S0A,OR,D=1> ; 2461
2021 003411' 431140 000020
2022 003412' 246200 001777 MWORD <CONT,A=14,B=4,S0Q,OR,D=4,SKCN,MGC=1777> ; 2462
2023 003413' 234142 240340
.MAIN MACRO %53A(1152) 10:04 16-Oct-84 Page 4-35
DFPTA6 MAC 19-Jan-83 11:22 Register Interference Tests SEQ 1220
2024 003414' 246340 440000 MWORD <CJS,J=4044,A=14,S0A,OR,D=1> ; 2463
2025 003415' 431140 000020
2026 003416' 246400 001777 MWORD <CONT,A=15,B=5,S0B,RMIN,D=5,SKCN,MGC=1777> ; 2464
2027 003417' 325152 640340
2028 003420' 246540 440000 MWORD <CJS,J=4044,A=14,S0A,OR,D=1> ; 2465
2029 003421' 431140 000020
2030 003422' 246600 001777 MWORD <CONT,A=16,B=6,S0Q,SMIN,D=6,SKCN,MGC=1777> ; 2466
2031 003423' 216163 240340
2032 003424' 246740 440000 MWORD <CJS,J=4044,A=14,S0A,OR,D=1> ; 2467
2033 003425' 431140 000020
2034 003426' 247000 001777 MWORD <CONT,A=17,B=7,S0B,PLUS,D=7,SKCN,MGC=1777> ; 2470
2035 003427' 307173 640340
2036 003430' 247140 440000 MWORD <CJS,J=4044,A=14,S0A,OR,D=1> ; 2471
2037 003431' 431140 000020
2038
2039 003432' 247200 001777 MWORD <CONT,A=10,B=0,S0A,PLUS,D=0,SKCN,MGC=1777> ; 2472
2040 003433' 400100 240340
2041 003434' 247340 440000 MWORD <CJS,J=4044,A=14,S0A,OR,D=1> ; 2473
2042 003435' 431140 000020
2043 003436' 247400 001777 MWORD <CONT,A=11,B=1,SDA,SMIN,D=1,SKCN,MGC=1777> ; 2474
2044 003437' 511110 640340
2045 003440' 247540 440000 MWORD <CJS,J=4044,A=14,S0A,OR,D=1> ; 2475
2046 003441' 431140 000020
2047 003442' 247600 001777 MWORD <CONT,A=12,B=2,S0A,RMIN,D=2,SKCN,MGC=1777> ; 2476
2048 003443' 422121 240340
2049 003444' 247740 440000 MWORD <CJS,J=4044,A=14,S0A,OR,D=1> ; 2477
2050 003445' 431140 000020
2051 003446' 250000 001777 MWORD <CONT,A=13,B=3,SDA,OR,D=3,SKCN,MGC=1777> ; 2500
2052 003447' 533131 640340
2053 003450' 250140 440000 MWORD <CJS,J=4044,A=14,S0A,OR,D=1> ; 2501
2054 003451' 431140 000020
2055 003452' 250200 001777 MWORD <CONT,A=14,B=4,S0A,AND,D=4,SKCN,MGC=1777> ; 2502
2056 003453' 444142 240340
2057 003454' 250340 440000 MWORD <CJS,J=4044,A=14,S0A,OR,D=1> ; 2503
2058 003455' 431140 000020
2059 003456' 250400 001777 MWORD <CONT,A=15,B=5,SDA,NAND,D=5,SKCN,MGC=1777> ; 2504
2060 003457' 555152 640340
2061 003460' 250540 440000 MWORD <CJS,J=4044,A=14,S0A,OR,D=1> ; 2505
2062 003461' 431140 000020
2063 003462' 250600 001777 MWORD <CONT,A=16,B=6,S0A,XOR,D=6,SKCN,MGC=1777> ; 2506
2064 003463' 466163 240340
2065 003464' 250740 440000 MWORD <CJS,J=4044,A=14,S0A,OR,D=1> ; 2507
2066 003465' 431140 000020
2067 003466' 251000 001777 MWORD <CONT,A=17,B=7,SDA,XNOR,D=7,SKCN,MGC=1777> ; 2510
2068 003467' 577173 640340
2069 003470' 251140 440000 MWORD <CJS,J=4044,A=14,S0A,OR,D=1> ; 2511
2070 003471' 431140 000020
2071
2072 003472' 251200 001777 MWORD <CONT,A=10,B=0,SDQ,XNOR,D=0,SKCN,MGC=1777> ; 2512
2073 003473' 670100 240340
2074 003474' 251340 440000 MWORD <CJS,J=4044,A=14,S0A,OR,D=1> ; 2513
2075 003475' 431140 000020
2076 003476' 251400 001777 MWORD <CONT,A=11,B=1,SD0,XOR,D=1,SKCN,MGC=1777> ; 2514
2077 003477' 761110 640340
2078 003500' 251540 440000 MWORD <CJS,J=4044,A=14,S0A,OR,D=1> ; 2515
.MAIN MACRO %53A(1152) 10:04 16-Oct-84 Page 4-36
DFPTA6 MAC 19-Jan-83 11:22 Register Interference Tests SEQ 1221
2079 003501' 431140 000020
2080 003502' 251600 001777 MWORD <CONT,A=12,B=2,SDQ,NAND,D=2,SKCN,MGC=1777> ; 2516
2081 003503' 652121 240340
2082 003504' 251740 440000 MWORD <CJS,J=4044,A=14,S0A,OR,D=1> ; 2517
2083 003505' 431140 000020
2084 003506' 252000 001777 MWORD <CONT,A=13,B=3,SD0,AND,D=3,SKCN,MGC=1777> ; 2520
2085 003507' 743131 640340
2086 003510' 252140 440000 MWORD <CJS,J=4044,A=14,S0A,OR,D=1> ; 2521
2087 003511' 431140 000020
2088 003512' 252200 001777 MWORD <CONT,A=14,B=4,SDQ,OR,D=4,SKCN,MGC=1777> ; 2522
2089 003513' 634142 240340
2090 003514' 252340 440000 MWORD <CJS,J=4044,A=14,S0A,OR,D=1> ; 2523
2091 003515' 431140 000020
2092 003516' 252400 001777 MWORD <CONT,A=15,B=5,SD0,RMIN,D=5,SKCN,MGC=1777> ; 2524
2093 003517' 725152 640340
2094 003520' 252540 440000 MWORD <CJS,J=4044,A=14,S0A,OR,D=1> ; 2525
2095 003521' 431140 000020
2096 003522' 252600 001777 MWORD <CONT,A=16,B=6,SDQ,SMIN,D=6,SKCN,MGC=1777> ; 2526
2097 003523' 616163 240340
2098 003524' 252740 440000 MWORD <CJS,J=4044,A=14,S0A,OR,D=1> ; 2527
2099 003525' 431140 000020
2100 003526' 253000 001777 MWORD <CONT,A=17,B=7,SD0,PLUS,D=7,SKCN,MGC=1777> ; 2530
2101 003527' 707173 640340
2102 003530' 253140 440000 MWORD <CJS,J=4044,A=14,S0A,OR,D=1> ; 2531
2103 003531' 431140 000020
2104
2105 ; Now do register 15
2106
2107 003532' 253200 020000 MWORD <CJS,J=2> ; 2532
2108 003533' 000000 000020
2109 003534' 253300 000000 MWORD <CONT,A=0,B=15,S0A,AND,D=2> ; 2533
2110 003535' 442006 400340
2111
2112 003536' 253400 001777 MWORD <CONT,A=10,B=0,SAQ,PLUS,D=0,SKCN,MGC=1777> ; 2534
2113 003537' 000100 240340
2114 003540' 253540 470000 MWORD <CJS,J=4047,A=15,S0A,OR,D=1> ; 2535
2115 003541' 431150 000020
2116 003542' 253600 001777 MWORD <CONT,A=11,B=1,SAB,SMIN,D=1,SKCN,MGC=1777> ; 2536
2117 003543' 111110 640340
2118 003544' 253740 470000 MWORD <CJS,J=4047,A=15,S0A,OR,D=1> ; 2537
2119 003545' 431150 000020
2120 003546' 254000 001777 MWORD <CONT,A=12,B=2,SAQ,RMIN,D=2,SKCN,MGC=1777> ; 2540
2121 003547' 022121 240340
2122 003550' 254140 470000 MWORD <CJS,J=4047,A=15,S0A,OR,D=1> ; 2541
2123 003551' 431150 000020
2124 003552' 254200 001777 MWORD <CONT,A=13,B=3,SAB,OR,D=3,SKCN,MGC=1777> ; 2542
2125 003553' 133131 640340
2126 003554' 254340 470000 MWORD <CJS,J=4047,A=15,S0A,OR,D=1> ; 2543
2127 003555' 431150 000020
2128 003556' 254400 001777 MWORD <CONT,A=14,B=4,SAQ,AND,D=4,SKCN,MGC=1777> ; 2544
2129 003557' 044142 240340
2130 003560' 254540 470000 MWORD <CJS,J=4047,A=15,S0A,OR,D=1> ; 2545
2131 003561' 431150 000020
2132 003562' 254600 001777 MWORD <CONT,A=15,B=5,SAB,NAND,D=5,SKCN,MGC=1777> ; 2546
2133 003563' 155152 640340
.MAIN MACRO %53A(1152) 10:04 16-Oct-84 Page 4-37
DFPTA6 MAC 19-Jan-83 11:22 Register Interference Tests SEQ 1222
2134 003564' 254740 470000 MWORD <CJS,J=4047,A=15,S0A,OR,D=1> ; 2547
2135 003565' 431150 000020
2136 003566' 255000 001777 MWORD <CONT,A=16,B=6,SAQ,XOR,D=6,SKCN,MGC=1777> ; 2550
2137 003567' 066163 240340
2138 003570' 255140 470000 MWORD <CJS,J=4047,A=15,S0A,OR,D=1> ; 2551
2139 003571' 431150 000020
2140 003572' 255200 001777 MWORD <CONT,A=17,B=7,SAB,XNOR,D=7,SKCN,MGC=1777> ; 2552
2141 003573' 177173 640340
2142 003574' 255340 470000 MWORD <CJS,J=4047,A=15,S0A,OR,D=1> ; 2553
2143 003575' 431150 000020
2144
2145 003576' 255400 001777 MWORD <CONT,A=10,B=0,S0Q,XNOR,D=0,SKCN,MGC=1777> ; 2554
2146 003577' 270100 240340
2147 003600' 255540 470000 MWORD <CJS,J=4047,A=15,S0A,OR,D=1> ; 2555
2148 003601' 431150 000020
2149 003602' 255600 001777 MWORD <CONT,A=11,B=1,S0B,XOR,D=1,SKCN,MGC=1777> ; 2556
2150 003603' 361110 640340
2151 003604' 255740 470000 MWORD <CJS,J=4047,A=15,S0A,OR,D=1> ; 2557
2152 003605' 431150 000020
2153 003606' 256000 001777 MWORD <CONT,A=12,B=2,S0Q,NAND,D=2,SKCN,MGC=1777> ; 2560
2154 003607' 252121 240340
2155 003610' 256140 470000 MWORD <CJS,J=4047,A=15,S0A,OR,D=1> ; 2561
2156 003611' 431150 000020
2157 003612' 256200 001777 MWORD <CONT,A=13,B=3,S0B,AND,D=3,SKCN,MGC=1777> ; 2562
2158 003613' 343131 640340
2159 003614' 256340 470000 MWORD <CJS,J=4047,A=15,S0A,OR,D=1> ; 2563
2160 003615' 431150 000020
2161 003616' 256400 001777 MWORD <CONT,A=14,B=4,S0Q,OR,D=4,SKCN,MGC=1777> ; 2564
2162 003617' 234142 240340
2163 003620' 256540 470000 MWORD <CJS,J=4047,A=15,S0A,OR,D=1> ; 2565
2164 003621' 431150 000020
2165 003622' 256600 001777 MWORD <CONT,A=15,B=5,S0B,RMIN,D=5,SKCN,MGC=1777> ; 2566
2166 003623' 325152 640340
2167 003624' 256740 470000 MWORD <CJS,J=4047,A=15,S0A,OR,D=1> ; 2567
2168 003625' 431150 000020
2169 003626' 257000 001777 MWORD <CONT,A=16,B=6,S0Q,SMIN,D=6,SKCN,MGC=1777> ; 2570
2170 003627' 216163 240340
2171 003630' 257140 470000 MWORD <CJS,J=4047,A=15,S0A,OR,D=1> ; 2571
2172 003631' 431150 000020
2173 003632' 257200 001777 MWORD <CONT,A=17,B=7,S0B,PLUS,D=7,SKCN,MGC=1777> ; 2572
2174 003633' 307173 640340
2175 003634' 257340 470000 MWORD <CJS,J=4047,A=15,S0A,OR,D=1> ; 2573
2176 003635' 431150 000020
2177
2178 003636' 257400 001777 MWORD <CONT,A=10,B=0,S0A,PLUS,D=0,SKCN,MGC=1777> ; 2574
2179 003637' 400100 240340
2180 003640' 257540 470000 MWORD <CJS,J=4047,A=15,S0A,OR,D=1> ; 2575
2181 003641' 431150 000020
2182 003642' 257600 001777 MWORD <CONT,A=11,B=1,SDA,SMIN,D=1,SKCN,MGC=1777> ; 2576
2183 003643' 511110 640340
2184 003644' 257740 470000 MWORD <CJS,J=4047,A=15,S0A,OR,D=1> ; 2577
2185 003645' 431150 000020
2186 003646' 260000 001777 MWORD <CONT,A=12,B=2,S0A,RMIN,D=2,SKCN,MGC=1777> ; 2600
2187 003647' 422121 240340
2188 003650' 260140 470000 MWORD <CJS,J=4047,A=15,S0A,OR,D=1> ; 2601
.MAIN MACRO %53A(1152) 10:04 16-Oct-84 Page 4-38
DFPTA6 MAC 19-Jan-83 11:22 Register Interference Tests SEQ 1223
2189 003651' 431150 000020
2190 003652' 260200 001777 MWORD <CONT,A=13,B=3,SDA,OR,D=3,SKCN,MGC=1777> ; 2602
2191 003653' 533131 640340
2192 003654' 260340 470000 MWORD <CJS,J=4047,A=15,S0A,OR,D=1> ; 2603
2193 003655' 431150 000020
2194 003656' 260400 001777 MWORD <CONT,A=14,B=4,S0A,AND,D=4,SKCN,MGC=1777> ; 2604
2195 003657' 444142 240340
2196 003660' 260540 470000 MWORD <CJS,J=4047,A=15,S0A,OR,D=1> ; 2605
2197 003661' 431150 000020
2198 003662' 260600 001777 MWORD <CONT,A=15,B=5,SDA,NAND,D=5,SKCN,MGC=1777> ; 2606
2199 003663' 555152 640340
2200 003664' 260740 470000 MWORD <CJS,J=4047,A=15,S0A,OR,D=1> ; 2607
2201 003665' 431150 000020
2202 003666' 261000 001777 MWORD <CONT,A=16,B=6,S0A,XOR,D=6,SKCN,MGC=1777> ; 2610
2203 003667' 466163 240340
2204 003670' 261140 470000 MWORD <CJS,J=4047,A=15,S0A,OR,D=1> ; 2611
2205 003671' 431150 000020
2206 003672' 261200 001777 MWORD <CONT,A=17,B=7,SDA,XNOR,D=7,SKCN,MGC=1777> ; 2612
2207 003673' 577173 640340
2208 003674' 261340 470000 MWORD <CJS,J=4047,A=15,S0A,OR,D=1> ; 2613
2209 003675' 431150 000020
2210
2211 003676' 261400 001777 MWORD <CONT,A=10,B=0,SDQ,XNOR,D=0,SKCN,MGC=1777> ; 2614
2212 003677' 670100 240340
2213 003700' 261540 470000 MWORD <CJS,J=4047,A=15,S0A,OR,D=1> ; 2615
2214 003701' 431150 000020
2215 003702' 261600 001777 MWORD <CONT,A=11,B=1,SD0,XOR,D=1,SKCN,MGC=1777> ; 2616
2216 003703' 761110 640340
2217 003704' 261740 470000 MWORD <CJS,J=4047,A=15,S0A,OR,D=1> ; 2617
2218 003705' 431150 000020
2219 003706' 262000 001777 MWORD <CONT,A=12,B=2,SDQ,NAND,D=2,SKCN,MGC=1777> ; 2620
2220 003707' 652121 240340
2221 003710' 262140 470000 MWORD <CJS,J=4047,A=15,S0A,OR,D=1> ; 2621
2222 003711' 431150 000020
2223 003712' 262200 001777 MWORD <CONT,A=13,B=3,SD0,AND,D=3,SKCN,MGC=1777> ; 2622
2224 003713' 743131 640340
2225 003714' 262340 470000 MWORD <CJS,J=4047,A=15,S0A,OR,D=1> ; 2623
2226 003715' 431150 000020
2227 003716' 262400 001777 MWORD <CONT,A=14,B=4,SDQ,OR,D=4,SKCN,MGC=1777> ; 2624
2228 003717' 634142 240340
2229 003720' 262540 470000 MWORD <CJS,J=4047,A=15,S0A,OR,D=1> ; 2625
2230 003721' 431150 000020
2231 003722' 262600 001777 MWORD <CONT,A=15,B=5,SD0,RMIN,D=5,SKCN,MGC=1777> ; 2626
2232 003723' 725152 640340
2233 003724' 262740 470000 MWORD <CJS,J=4047,A=15,S0A,OR,D=1> ; 2627
2234 003725' 431150 000020
2235 003726' 263000 001777 MWORD <CONT,A=16,B=6,SDQ,SMIN,D=6,SKCN,MGC=1777> ; 2630
2236 003727' 616163 240340
2237 003730' 263140 470000 MWORD <CJS,J=4047,A=15,S0A,OR,D=1> ; 2631
2238 003731' 431150 000020
2239 003732' 263200 001777 MWORD <CONT,A=17,B=7,SD0,PLUS,D=7,SKCN,MGC=1777> ; 2632
2240 003733' 707173 640340
2241 003734' 263340 470000 MWORD <CJS,J=4047,A=15,S0A,OR,D=1> ; 2633
2242 003735' 431150 000020
2243
.MAIN MACRO %53A(1152) 10:04 16-Oct-84 Page 4-39
DFPTA6 MAC 19-Jan-83 11:22 Register Interference Tests SEQ 1224
2244 ; Now do register 16
2245
2246 003736' 263400 020000 MWORD <CJS,J=2> ; 2634
2247 003737' 000000 000020
2248 003740' 263500 000000 MWORD <CONT,A=0,B=16,S0A,AND,D=2> ; 2635
2249 003741' 442007 000340
2250
2251 003742' 263600 001777 MWORD <CONT,A=10,B=0,SAQ,PLUS,D=0,SKCN,MGC=1777> ; 2636
2252 003743' 000100 240340
2253 003744' 263740 520000 MWORD <CJS,J=4052,A=16,S0A,OR,D=1> ; 2637
2254 003745' 431160 000020
2255 003746' 264000 001777 MWORD <CONT,A=11,B=1,SAB,SMIN,D=1,SKCN,MGC=1777> ; 2640
2256 003747' 111110 640340
2257 003750' 264140 520000 MWORD <CJS,J=4052,A=16,S0A,OR,D=1> ; 2641
2258 003751' 431160 000020
2259 003752' 264200 001777 MWORD <CONT,A=12,B=2,SAQ,RMIN,D=2,SKCN,MGC=1777> ; 2642
2260 003753' 022121 240340
2261 003754' 264340 520000 MWORD <CJS,J=4052,A=16,S0A,OR,D=1> ; 2643
2262 003755' 431160 000020
2263 003756' 264400 001777 MWORD <CONT,A=13,B=3,SAB,OR,D=3,SKCN,MGC=1777> ; 2644
2264 003757' 133131 640340
2265 003760' 264540 520000 MWORD <CJS,J=4052,A=16,S0A,OR,D=1> ; 2645
2266 003761' 431160 000020
2267 003762' 264600 001777 MWORD <CONT,A=14,B=4,SAQ,AND,D=4,SKCN,MGC=1777> ; 2646
2268 003763' 044142 240340
2269 003764' 264740 520000 MWORD <CJS,J=4052,A=16,S0A,OR,D=1> ; 2647
2270 003765' 431160 000020
2271 003766' 265000 001777 MWORD <CONT,A=15,B=5,SAB,NAND,D=5,SKCN,MGC=1777> ; 2650
2272 003767' 155152 640340
2273 003770' 265140 520000 MWORD <CJS,J=4052,A=16,S0A,OR,D=1> ; 2651
2274 003771' 431160 000020
2275 003772' 265200 001777 MWORD <CONT,A=16,B=6,SAQ,XOR,D=6,SKCN,MGC=1777> ; 2652
2276 003773' 066163 240340
2277 003774' 265340 520000 MWORD <CJS,J=4052,A=16,S0A,OR,D=1> ; 2653
2278 003775' 431160 000020
2279 003776' 265400 001777 MWORD <CONT,A=17,B=7,SAB,XNOR,D=7,SKCN,MGC=1777> ; 2654
2280 003777' 177173 640340
2281 004000' 265540 520000 MWORD <CJS,J=4052,A=16,S0A,OR,D=1> ; 2655
2282 004001' 431160 000020
2283
2284 004002' 265600 001777 MWORD <CONT,A=10,B=0,S0Q,XNOR,D=0,SKCN,MGC=1777> ; 2656
2285 004003' 270100 240340
2286 004004' 265740 520000 MWORD <CJS,J=4052,A=16,S0A,OR,D=1> ; 2657
2287 004005' 431160 000020
2288 004006' 266000 001777 MWORD <CONT,A=11,B=1,S0B,XOR,D=1,SKCN,MGC=1777> ; 2660
2289 004007' 361110 640340
2290 004010' 266140 520000 MWORD <CJS,J=4052,A=16,S0A,OR,D=1> ; 2661
2291 004011' 431160 000020
2292 004012' 266200 001777 MWORD <CONT,A=12,B=2,S0Q,NAND,D=2,SKCN,MGC=1777> ; 2662
2293 004013' 252121 240340
2294 004014' 266340 520000 MWORD <CJS,J=4052,A=16,S0A,OR,D=1> ; 2663
2295 004015' 431160 000020
2296 004016' 266400 001777 MWORD <CONT,A=13,B=3,S0B,AND,D=3,SKCN,MGC=1777> ; 2664
2297 004017' 343131 640340
2298 004020' 266540 520000 MWORD <CJS,J=4052,A=16,S0A,OR,D=1> ; 2665
.MAIN MACRO %53A(1152) 10:04 16-Oct-84 Page 4-40
DFPTA6 MAC 19-Jan-83 11:22 Register Interference Tests SEQ 1225
2299 004021' 431160 000020
2300 004022' 266600 001777 MWORD <CONT,A=14,B=4,S0Q,OR,D=4,SKCN,MGC=1777> ; 2666
2301 004023' 234142 240340
2302 004024' 266740 520000 MWORD <CJS,J=4052,A=16,S0A,OR,D=1> ; 2667
2303 004025' 431160 000020
2304 004026' 267000 001777 MWORD <CONT,A=15,B=5,S0B,RMIN,D=5,SKCN,MGC=1777> ; 2670
2305 004027' 325152 640340
2306 004030' 267140 520000 MWORD <CJS,J=4052,A=16,S0A,OR,D=1> ; 2671
2307 004031' 431160 000020
2308 004032' 267200 001777 MWORD <CONT,A=16,B=6,S0Q,SMIN,D=6,SKCN,MGC=1777> ; 2672
2309 004033' 216163 240340
2310 004034' 267340 520000 MWORD <CJS,J=4052,A=16,S0A,OR,D=1> ; 2673
2311 004035' 431160 000020
2312 004036' 267400 001777 MWORD <CONT,A=17,B=7,S0B,PLUS,D=7,SKCN,MGC=1777> ; 2674
2313 004037' 307173 640340
2314 004040' 267540 520000 MWORD <CJS,J=4052,A=16,S0A,OR,D=1> ; 2675
2315 004041' 431160 000020
2316
2317 004042' 267600 001777 MWORD <CONT,A=10,B=0,S0A,PLUS,D=0,SKCN,MGC=1777> ; 2676
2318 004043' 400100 240340
2319 004044' 267740 520000 MWORD <CJS,J=4052,A=16,S0A,OR,D=1> ; 2677
2320 004045' 431160 000020
2321 004046' 270000 001777 MWORD <CONT,A=11,B=1,SDA,SMIN,D=1,SKCN,MGC=1777> ; 2700
2322 004047' 511110 640340
2323 004050' 270140 520000 MWORD <CJS,J=4052,A=16,S0A,OR,D=1> ; 2701
2324 004051' 431160 000020
2325 004052' 270200 001777 MWORD <CONT,A=12,B=2,S0A,RMIN,D=2,SKCN,MGC=1777> ; 2702
2326 004053' 422121 240340
2327 004054' 270340 520000 MWORD <CJS,J=4052,A=16,S0A,OR,D=1> ; 2703
2328 004055' 431160 000020
2329 004056' 270400 001777 MWORD <CONT,A=13,B=3,SDA,OR,D=3,SKCN,MGC=1777> ; 2704
2330 004057' 533131 640340
2331 004060' 270540 520000 MWORD <CJS,J=4052,A=16,S0A,OR,D=1> ; 2705
2332 004061' 431160 000020
2333 004062' 270600 001777 MWORD <CONT,A=14,B=4,S0A,AND,D=4,SKCN,MGC=1777> ; 2706
2334 004063' 444142 240340
2335 004064' 270740 520000 MWORD <CJS,J=4052,A=16,S0A,OR,D=1> ; 2707
2336 004065' 431160 000020
2337 004066' 271000 001777 MWORD <CONT,A=15,B=5,SDA,NAND,D=5,SKCN,MGC=1777> ; 2710
2338 004067' 555152 640340
2339 004070' 271140 520000 MWORD <CJS,J=4052,A=16,S0A,OR,D=1> ; 2711
2340 004071' 431160 000020
2341 004072' 271200 001777 MWORD <CONT,A=16,B=6,S0A,XOR,D=6,SKCN,MGC=1777> ; 2712
2342 004073' 466163 240340
2343 004074' 271340 520000 MWORD <CJS,J=4052,A=16,S0A,OR,D=1> ; 2713
2344 004075' 431160 000020
2345 004076' 271400 001777 MWORD <CONT,A=17,B=7,SDA,XNOR,D=7,SKCN,MGC=1777> ; 2714
2346 004077' 577173 640340
2347 004100' 271540 520000 MWORD <CJS,J=4052,A=16,S0A,OR,D=1> ; 2715
2348 004101' 431160 000020
2349
2350 004102' 271600 001777 MWORD <CONT,A=10,B=0,SDQ,XNOR,D=0,SKCN,MGC=1777> ; 2716
2351 004103' 670100 240340
2352 004104' 271740 520000 MWORD <CJS,J=4052,A=16,S0A,OR,D=1> ; 2717
2353 004105' 431160 000020
.MAIN MACRO %53A(1152) 10:04 16-Oct-84 Page 4-41
DFPTA6 MAC 19-Jan-83 11:22 Register Interference Tests SEQ 1226
2354 004106' 272000 001777 MWORD <CONT,A=11,B=1,SD0,XOR,D=1,SKCN,MGC=1777> ; 2720
2355 004107' 761110 640340
2356 004110' 272140 520000 MWORD <CJS,J=4052,A=16,S0A,OR,D=1> ; 2721
2357 004111' 431160 000020
2358 004112' 272200 001777 MWORD <CONT,A=12,B=2,SDQ,NAND,D=2,SKCN,MGC=1777> ; 2722
2359 004113' 652121 240340
2360 004114' 272340 520000 MWORD <CJS,J=4052,A=16,S0A,OR,D=1> ; 2723
2361 004115' 431160 000020
2362 004116' 272400 001777 MWORD <CONT,A=13,B=3,SD0,AND,D=3,SKCN,MGC=1777> ; 2724
2363 004117' 743131 640340
2364 004120' 272540 520000 MWORD <CJS,J=4052,A=16,S0A,OR,D=1> ; 2725
2365 004121' 431160 000020
2366 004122' 272600 001777 MWORD <CONT,A=14,B=4,SDQ,OR,D=4,SKCN,MGC=1777> ; 2726
2367 004123' 634142 240340
2368 004124' 272740 520000 MWORD <CJS,J=4052,A=16,S0A,OR,D=1> ; 2727
2369 004125' 431160 000020
2370 004126' 273000 001777 MWORD <CONT,A=15,B=5,SD0,RMIN,D=5,SKCN,MGC=1777> ; 2730
2371 004127' 725152 640340
2372 004130' 273140 520000 MWORD <CJS,J=4052,A=16,S0A,OR,D=1> ; 2731
2373 004131' 431160 000020
2374 004132' 273200 001777 MWORD <CONT,A=16,B=6,SDQ,SMIN,D=6,SKCN,MGC=1777> ; 2732
2375 004133' 616163 240340
2376 004134' 273340 520000 MWORD <CJS,J=4052,A=16,S0A,OR,D=1> ; 2733
2377 004135' 431160 000020
2378 004136' 273400 001777 MWORD <CONT,A=17,B=7,SD0,PLUS,D=7,SKCN,MGC=1777> ; 2734
2379 004137' 707173 640340
2380 004140' 273540 520000 MWORD <CJS,J=4052,A=16,S0A,OR,D=1> ; 2735
2381 004141' 431160 000020
2382
2383 ; Now do register 17
2384
2385 004142' 273600 020000 MWORD <CJS,J=2> ; 2736
2386 004143' 000000 000020
2387 004144' 273700 000000 MWORD <CONT,A=0,B=17,S0A,AND,D=2> ; 2737
2388 004145' 442007 400340
2389
2390 004146' 274000 001777 MWORD <CONT,A=10,B=0,SAQ,PLUS,D=0,SKCN,MGC=1777> ; 2740
2391 004147' 000100 240340
2392 004150' 274140 550000 MWORD <CJS,J=4055,A=17,S0A,OR,D=1> ; 2741
2393 004151' 431170 000020
2394 004152' 274200 001777 MWORD <CONT,A=11,B=1,SAB,SMIN,D=1,SKCN,MGC=1777> ; 2742
2395 004153' 111110 640340
2396 004154' 274340 550000 MWORD <CJS,J=4055,A=17,S0A,OR,D=1> ; 2743
2397 004155' 431170 000020
2398 004156' 274400 001777 MWORD <CONT,A=12,B=2,SAQ,RMIN,D=2,SKCN,MGC=1777> ; 2744
2399 004157' 022121 240340
2400 004160' 274540 550000 MWORD <CJS,J=4055,A=17,S0A,OR,D=1> ; 2745
2401 004161' 431170 000020
2402 004162' 274600 001777 MWORD <CONT,A=13,B=3,SAB,OR,D=3,SKCN,MGC=1777> ; 2746
2403 004163' 133131 640340
2404 004164' 274740 550000 MWORD <CJS,J=4055,A=17,S0A,OR,D=1> ; 2747
2405 004165' 431170 000020
2406 004166' 275000 001777 MWORD <CONT,A=14,B=4,SAQ,AND,D=4,SKCN,MGC=1777> ; 2750
2407 004167' 044142 240340
2408 004170' 275140 550000 MWORD <CJS,J=4055,A=17,S0A,OR,D=1> ; 2751
.MAIN MACRO %53A(1152) 10:04 16-Oct-84 Page 4-42
DFPTA6 MAC 19-Jan-83 11:22 Register Interference Tests SEQ 1227
2409 004171' 431170 000020
2410 004172' 275200 001777 MWORD <CONT,A=15,B=5,SAB,NAND,D=5,SKCN,MGC=1777> ; 2752
2411 004173' 155152 640340
2412 004174' 275340 550000 MWORD <CJS,J=4055,A=17,S0A,OR,D=1> ; 2753
2413 004175' 431170 000020
2414 004176' 275400 001777 MWORD <CONT,A=16,B=6,SAQ,XOR,D=6,SKCN,MGC=1777> ; 2754
2415 004177' 066163 240340
2416 004200' 275540 550000 MWORD <CJS,J=4055,A=17,S0A,OR,D=1> ; 2755
2417 004201' 431170 000020
2418 004202' 275600 001777 MWORD <CONT,A=17,B=7,SAB,XNOR,D=7,SKCN,MGC=1777> ; 2756
2419 004203' 177173 640340
2420 004204' 275740 550000 MWORD <CJS,J=4055,A=17,S0A,OR,D=1> ; 2757
2421 004205' 431170 000020
2422
2423 004206' 276000 001777 MWORD <CONT,A=10,B=0,S0Q,XNOR,D=0,SKCN,MGC=1777> ; 2760
2424 004207' 270100 240340
2425 004210' 276140 550000 MWORD <CJS,J=4055,A=17,S0A,OR,D=1> ; 2761
2426 004211' 431170 000020
2427 004212' 276200 001777 MWORD <CONT,A=11,B=1,S0B,XOR,D=1,SKCN,MGC=1777> ; 2762
2428 004213' 361110 640340
2429 004214' 276340 550000 MWORD <CJS,J=4055,A=17,S0A,OR,D=1> ; 2763
2430 004215' 431170 000020
2431 004216' 276400 001777 MWORD <CONT,A=12,B=2,S0Q,NAND,D=2,SKCN,MGC=1777> ; 2764
2432 004217' 252121 240340
2433 004220' 276540 550000 MWORD <CJS,J=4055,A=17,S0A,OR,D=1> ; 2765
2434 004221' 431170 000020
2435 004222' 276600 001777 MWORD <CONT,A=13,B=3,S0B,AND,D=3,SKCN,MGC=1777> ; 2766
2436 004223' 343131 640340
2437 004224' 276740 550000 MWORD <CJS,J=4055,A=17,S0A,OR,D=1> ; 2767
2438 004225' 431170 000020
2439 004226' 277000 001777 MWORD <CONT,A=14,B=4,S0Q,OR,D=4,SKCN,MGC=1777> ; 2770
2440 004227' 234142 240340
2441 004230' 277140 550000 MWORD <CJS,J=4055,A=17,S0A,OR,D=1> ; 2771
2442 004231' 431170 000020
2443 004232' 277200 001777 MWORD <CONT,A=15,B=5,S0B,RMIN,D=5,SKCN,MGC=1777> ; 2772
2444 004233' 325152 640340
2445 004234' 277340 550000 MWORD <CJS,J=4055,A=17,S0A,OR,D=1> ; 2773
2446 004235' 431170 000020
2447 004236' 277400 001777 MWORD <CONT,A=16,B=6,S0Q,SMIN,D=6,SKCN,MGC=1777> ; 2774
2448 004237' 216163 240340
2449 004240' 277540 550000 MWORD <CJS,J=4055,A=17,S0A,OR,D=1> ; 2775
2450 004241' 431170 000020
2451 004242' 277600 001777 MWORD <CONT,A=17,B=7,S0B,PLUS,D=7,SKCN,MGC=1777> ; 2776
2452 004243' 307173 640340
2453 004244' 277740 550000 MWORD <CJS,J=4055,A=17,S0A,OR,D=1> ; 2777
2454 004245' 431170 000020
2455
2456 004246' 300000 001777 MWORD <CONT,A=10,B=0,S0A,PLUS,D=0,SKCN,MGC=1777> ; 3000
2457 004247' 400100 240340
2458 004250' 300140 550000 MWORD <CJS,J=4055,A=17,S0A,OR,D=1> ; 3001
2459 004251' 431170 000020
2460 004252' 300200 001777 MWORD <CONT,A=11,B=1,SDA,SMIN,D=1,SKCN,MGC=1777> ; 3002
2461 004253' 511110 640340
2462 004254' 300340 550000 MWORD <CJS,J=4055,A=17,S0A,OR,D=1> ; 3003
2463 004255' 431170 000020
.MAIN MACRO %53A(1152) 10:04 16-Oct-84 Page 4-43
DFPTA6 MAC 19-Jan-83 11:22 Register Interference Tests SEQ 1228
2464 004256' 300400 001777 MWORD <CONT,A=12,B=2,S0A,RMIN,D=2,SKCN,MGC=1777> ; 3004
2465 004257' 422121 240340
2466 004260' 300540 550000 MWORD <CJS,J=4055,A=17,S0A,OR,D=1> ; 3005
2467 004261' 431170 000020
2468 004262' 300600 001777 MWORD <CONT,A=13,B=3,SDA,OR,D=3,SKCN,MGC=1777> ; 3006
2469 004263' 533131 640340
2470 004264' 300740 550000 MWORD <CJS,J=4055,A=17,S0A,OR,D=1> ; 3007
2471 004265' 431170 000020
2472 004266' 301000 001777 MWORD <CONT,A=14,B=4,S0A,AND,D=4,SKCN,MGC=1777> ; 3010
2473 004267' 444142 240340
2474 004270' 301140 550000 MWORD <CJS,J=4055,A=17,S0A,OR,D=1> ; 3011
2475 004271' 431170 000020
2476 004272' 301200 001777 MWORD <CONT,A=15,B=5,SDA,NAND,D=5,SKCN,MGC=1777> ; 3012
2477 004273' 555152 640340
2478 004274' 301340 550000 MWORD <CJS,J=4055,A=17,S0A,OR,D=1> ; 3013
2479 004275' 431170 000020
2480 004276' 301400 001777 MWORD <CONT,A=16,B=6,S0A,XOR,D=6,SKCN,MGC=1777> ; 3014
2481 004277' 466163 240340
2482 004300' 301540 550000 MWORD <CJS,J=4055,A=17,S0A,OR,D=1> ; 3015
2483 004301' 431170 000020
2484 004302' 301600 001777 MWORD <CONT,A=17,B=7,SDA,XNOR,D=7,SKCN,MGC=1777> ; 3016
2485 004303' 577173 640340
2486 004304' 301740 550000 MWORD <CJS,J=4055,A=17,S0A,OR,D=1> ; 3017
2487 004305' 431170 000020
2488
2489 004306' 302000 001777 MWORD <CONT,A=10,B=0,SDQ,XNOR,D=0,SKCN,MGC=1777> ; 3020
2490 004307' 670100 240340
2491 004310' 302140 550000 MWORD <CJS,J=4055,A=17,S0A,OR,D=1> ; 3021
2492 004311' 431170 000020
2493 004312' 302200 001777 MWORD <CONT,A=11,B=1,SD0,XOR,D=1,SKCN,MGC=1777> ; 3022
2494 004313' 761110 640340
2495 004314' 302340 550000 MWORD <CJS,J=4055,A=17,S0A,OR,D=1> ; 3023
2496 004315' 431170 000020
2497 004316' 302400 001777 MWORD <CONT,A=12,B=2,SDQ,NAND,D=2,SKCN,MGC=1777> ; 3024
2498 004317' 652121 240340
2499 004320' 302540 550000 MWORD <CJS,J=4055,A=17,S0A,OR,D=1> ; 3025
2500 004321' 431170 000020
2501 004322' 302600 001777 MWORD <CONT,A=13,B=3,SD0,AND,D=3,SKCN,MGC=1777> ; 3026
2502 004323' 743131 640340
2503 004324' 302740 550000 MWORD <CJS,J=4055,A=17,S0A,OR,D=1> ; 3027
2504 004325' 431170 000020
2505 004326' 303000 001777 MWORD <CONT,A=14,B=4,SDQ,OR,D=4,SKCN,MGC=1777> ; 3030
2506 004327' 634142 240340
2507 004330' 303140 550000 MWORD <CJS,J=4055,A=17,S0A,OR,D=1> ; 3031
2508 004331' 431170 000020
2509 004332' 303200 001777 MWORD <CONT,A=15,B=5,SD0,RMIN,D=5,SKCN,MGC=1777> ; 3032
2510 004333' 725152 640340
2511 004334' 303340 550000 MWORD <CJS,J=4055,A=17,S0A,OR,D=1> ; 3033
2512 004335' 431170 000020
2513 004336' 303400 001777 MWORD <CONT,A=16,B=6,SDQ,SMIN,D=6,SKCN,MGC=1777> ; 3034
2514 004337' 616163 240340
2515 004340' 303540 550000 MWORD <CJS,J=4055,A=17,S0A,OR,D=1> ; 3035
2516 004341' 431170 000020
2517 004342' 303600 001777 MWORD <CONT,A=17,B=7,SD0,PLUS,D=7,SKCN,MGC=1777> ; 3036
2518 004343' 707173 640340
.MAIN MACRO %53A(1152) 10:04 16-Oct-84 Page 4-44
DFPTA6 MAC 19-Jan-83 11:22 Register Interference Tests SEQ 1229
2519 004344' 303740 550000 MWORD <CJS,J=4055,A=17,S0A,OR,D=1> ; 3037
2520 004345' 431170 000020
2521 004346' 304050 000000 MWORD <JMAP,J=5000> ; 3040 done
2522 004347' 000000 000040
2523 004350' 777777 777777 -1
2524
2525
2526 ;#********************************************************************
2527 ; End of 2901 Tests (Part 3)
2528 ;#********************************************************************
2529
2530 XLIST
2531
NO ERRORS DETECTED
PROGRAM BREAK IS 004362
CPU TIME USED 09:50.314
233P CORE USED
.MAIN MACRO %53A(1152) 10:04 16-Oct-84 Page S-1
DFPTA6 MAC 19-Jan-83 11:22 SYMBOL TABLE SEQ 1230
AAPNT 000000 ext .LRMIN 000000 spd .RJ 000000 spd
AEXEC 000023' ext .LS0A 000000 spd .RJMAP 000040 spd
ALU 020000 000000 spd .LS0B 000000 spd .RJZ 000000 spd
CALL 200000 000000 spd .LS0Q 000000 spd .RMGC 000000 spd
E23 000027 spd .LSAB 000000 spd .RNAND 050000 000000 spd
EBUS 400000 000000 spd .LSAQ 000000 spd .ROR 030000 000000 spd
ERFLG 000015 .LSD0 000000 spd .RPLUS 000000 spd
GO 260740 000000 .LSDA 000000 spd .RRMIN 020000 000000 spd
LAST 010000 000000 spd .LSDQ 000000 spd .RS0A 400000 000000 spd
MA32 000031' .LSKCN 000000 spd .RS0B 300000 000000 spd
MLAST 400000 000000 spd .LSMIN 000000 spd .RS0Q 200000 000000 spd
NDMP 000400 000000 spd .LXNOR 000000 spd .RSAB 100000 000000 spd
RTN 263740 000000 .LXOR 000000 spd .RSAQ 000000 spd
SCOPER 027000 000000 .MA 000017 spd .RSD0 700000 000000 spd
T32M 000032' .MAND 000007 spd .RSDA 500000 000000 spd
TA32 000016' .MB 000017 spd .RSDQ 600000 000000 spd
TG32 000011' .MBAD 000001 spd .RSKCN 240000 spd
TLOAD 000014' ext .MCCFZ 000037 spd .RSMIN 010000 000000 spd
TRACE 000012' ext .MCENA 000001 spd .RXNOR 070000 000000 spd
TSTA32 000000' ent .MCJS 000017 spd .RXOR 060000 000000 spd
TSTA36 000000 ext .MCJV 000017 spd
TSTA37 000000 ext .MCONT 000017 spd
TSTA40 000000 ext .MCRTN 000017 spd
TSTA41 000000 ext .MD 000007 spd
TSTSUB 000000 ext .MJ 007777 spd
TX32 000030' .MJMAP 000017 spd
TXALL 060000 000000 spd .MJZ 000017 spd
Z6 000000' .MMGC 001777 spd
ZALU 000002 000000 spd .MNAND 000007 spd
$ARG2 005000 .MOR 000007 spd
$B 000052 .MPLUS 000007 spd
$CHR 000052 .MRMIN 000007 spd
$GARG 000001 .MS0A 000007 spd
%ADDR 003041 spd .MS0B 000007 spd
%ML 304050 000000 spd .MS0Q 000007 spd
%MR 000040 spd .MSAB 000007 spd
.LA 000000 spd .MSAQ 000007 spd
.LADDR 000100 000000 spd .MSD0 000007 spd
.LAND 000000 spd .MSDA 000007 spd
.LB 000000 spd .MSDQ 000007 spd
.LBAD 000000 spd .MSKCN 000037 spd
.LCCFZ 000000 spd .MSMIN 000007 spd
.LCENA 000000 spd .MXNOR 000007 spd
.LCJS 000000 spd .MXOR 000007 spd
.LCJV 000000 spd .RA 000010 000000 spd
.LCONT 000000 spd .RAND 040000 000000 spd
.LCRTN 000000 spd .RB 400000 spd
.LD 000000 spd .RBAD 000001 spd
.LJ 010000 spd .RCCFZ 020000 spd
.LJMAP 000000 spd .RCENA 000400 000000 spd
.LJZ 000000 spd .RCJS 000020 spd
.LMGC 000001 spd .RCJV 000140 spd
.LNAND 000000 spd .RCONT 000340 spd
.LOR 000000 spd .RCRTN 000240 spd
.LPLUS 000000 spd .RD 001000 000000 spd
AAPNT 17# 98
AEXEC 17# 86 SEQ 1231
ALU 62
CALL 98
E23 64
EBUS 62
ERFLG 81 87
LAST 98
MA32 88 98#
MLAST 64
NDMP 62
T32M 63 75 102#
TA32 81# 89
TG32 61 73#
TLOAD 17# 76
TRACE 17# 74
TSTA32 9 61#
TSTA36 13# 65
TSTA37 13# 66
TSTA40 13# 67
TSTA41 13# 68
TSTSUB 17#
TX32 90 94#
TXALL 98
Z6 24# 73
ZALU 62
$ARG2 102# 102 104# 104 110# 110 112# 112 114# 114 116# 116 118# 118
120# 120 122# 122 124# 124 126# 126 128# 128 130# 130 132# 132
134# 134 136# 136 138# 138 140# 140 142# 142 144# 144 149# 149
151# 151 153# 153 158# 158 160# 160 162# 162 167# 167 169# 169
171# 171 176# 176 178# 178 180# 180 185# 185 187# 187 189# 189
194# 194 196# 196 198# 198 203# 203 205# 205 207# 207 212# 212
214# 214 216# 216 221# 221 223# 223 225# 225 230# 230 232# 232
234# 234 239# 239 241# 241 243# 243 248# 248 250# 250 252# 252
257# 257 259# 259 261# 261 266# 266 268# 268 270# 270 275# 275
277# 277 279# 279 284# 284 286# 286 288# 288 293# 293 295# 295
300# 300 302# 302 305# 305 307# 307 309# 309 311# 311 313# 313
315# 315 317# 317 319# 319 321# 321 323# 323 325# 325 327# 327
329# 329 331# 331 333# 333 335# 335 338# 338 340# 340 342# 342
344# 344 346# 346 348# 348 350# 350 352# 352 354# 354 356# 356
358# 358 360# 360 362# 362 364# 364 366# 366 368# 368 371# 371
373# 373 375# 375 377# 377 379# 379 381# 381 383# 383 385# 385
387# 387 389# 389 391# 391 393# 393 395# 395 397# 397 399# 399
401# 401 404# 404 406# 406 408# 408 410# 410 412# 412 414# 414
416# 416 418# 418 420# 420 422# 422 424# 424 426# 426 428# 428
430# 430 432# 432 434# 434 439# 439 441# 441 444# 444 446# 446
448# 448 450# 450 452# 452 454# 454 456# 456 458# 458 460# 460
462# 462 464# 464 466# 466 468# 468 470# 470 472# 472 474# 474
477# 477 479# 479 481# 481 483# 483 485# 485 487# 487 489# 489
491# 491 493# 493 495# 495 497# 497 499# 499 501# 501 503# 503
505# 505 507# 507 510# 510 512# 512 514# 514 516# 516 518# 518
520# 520 522# 522 524# 524 526# 526 528# 528 530# 530 532# 532
534# 534 536# 536 538# 538 540# 540 543# 543 545# 545 547# 547
549# 549 551# 551 553# 553 555# 555 557# 557 559# 559 561# 561
563# 563 565# 565 567# 567 569# 569 571# 571 573# 573 578# 578 SEQ 1232
580# 580 583# 583 585# 585 587# 587 589# 589 591# 591 593# 593
595# 595 597# 597 599# 599 601# 601 603# 603 605# 605 607# 607
609# 609 611# 611 613# 613 616# 616 618# 618 620# 620 622# 622
624# 624 626# 626 628# 628 630# 630 632# 632 634# 634 636# 636
638# 638 640# 640 642# 642 644# 644 646# 646 649# 649 651# 651
653# 653 655# 655 657# 657 659# 659 661# 661 663# 663 665# 665
667# 667 669# 669 671# 671 673# 673 675# 675 677# 677 679# 679
682# 682 684# 684 686# 686 688# 688 690# 690 692# 692 694# 694
696# 696 698# 698 700# 700 702# 702 704# 704 706# 706 708# 708
710# 710 712# 712 717# 717 719# 719 722# 722 724# 724 726# 726
728# 728 730# 730 732# 732 734# 734 736# 736 738# 738 740# 740
742# 742 744# 744 746# 746 748# 748 750# 750 752# 752 755# 755
757# 757 759# 759 761# 761 763# 763 765# 765 767# 767 769# 769
771# 771 773# 773 775# 775 777# 777 779# 779 781# 781 783# 783
785# 785 788# 788 790# 790 792# 792 794# 794 796# 796 798# 798
800# 800 802# 802 804# 804 806# 806 808# 808 810# 810 812# 812
814# 814 816# 816 818# 818 821# 821 823# 823 825# 825 827# 827
829# 829 831# 831 833# 833 835# 835 837# 837 839# 839 841# 841
843# 843 845# 845 847# 847 849# 849 851# 851 856# 856 858# 858
861# 861 863# 863 865# 865 867# 867 869# 869 871# 871 873# 873
875# 875 877# 877 879# 879 881# 881 883# 883 885# 885 887# 887
889# 889 891# 891 894# 894 896# 896 898# 898 900# 900 902# 902
904# 904 906# 906 908# 908 910# 910 912# 912 914# 914 916# 916
918# 918 920# 920 922# 922 924# 924 927# 927 929# 929 931# 931
933# 933 935# 935 937# 937 939# 939 941# 941 943# 943 945# 945
947# 947 949# 949 951# 951 953# 953 955# 955 957# 957 960# 960
962# 962 964# 964 966# 966 968# 968 970# 970 972# 972 974# 974
976# 976 978# 978 980# 980 982# 982 984# 984 986# 986 988# 988
990# 990 995# 995 997# 997 1000# 1000 1002# 1002 1004# 1004 1006# 1006
1008# 1008 1010# 1010 1012# 1012 1014# 1014 1016# 1016 1018# 1018 1020# 1020
1022# 1022 1024# 1024 1026# 1026 1028# 1028 1030# 1030 1033# 1033 1035# 1035
1037# 1037 1039# 1039 1041# 1041 1043# 1043 1045# 1045 1047# 1047 1049# 1049
1051# 1051 1053# 1053 1055# 1055 1057# 1057 1059# 1059 1061# 1061 1063# 1063
1066# 1066 1068# 1068 1070# 1070 1072# 1072 1074# 1074 1076# 1076 1078# 1078
1080# 1080 1082# 1082 1084# 1084 1086# 1086 1088# 1088 1090# 1090 1092# 1092
1094# 1094 1096# 1096 1099# 1099 1101# 1101 1103# 1103 1105# 1105 1107# 1107
1109# 1109 1111# 1111 1113# 1113 1115# 1115 1117# 1117 1119# 1119 1121# 1121
1123# 1123 1125# 1125 1127# 1127 1129# 1129 1134# 1134 1136# 1136 1139# 1139
1141# 1141 1143# 1143 1145# 1145 1147# 1147 1149# 1149 1151# 1151 1153# 1153
1155# 1155 1157# 1157 1159# 1159 1161# 1161 1163# 1163 1165# 1165 1167# 1167
1169# 1169 1172# 1172 1174# 1174 1176# 1176 1178# 1178 1180# 1180 1182# 1182
1184# 1184 1186# 1186 1188# 1188 1190# 1190 1192# 1192 1194# 1194 1196# 1196
1198# 1198 1200# 1200 1202# 1202 1205# 1205 1207# 1207 1209# 1209 1211# 1211
1213# 1213 1215# 1215 1217# 1217 1219# 1219 1221# 1221 1223# 1223 1225# 1225
1227# 1227 1229# 1229 1231# 1231 1233# 1233 1235# 1235 1238# 1238 1240# 1240
1242# 1242 1244# 1244 1246# 1246 1248# 1248 1250# 1250 1252# 1252 1254# 1254
1256# 1256 1258# 1258 1260# 1260 1262# 1262 1264# 1264 1266# 1266 1268# 1268
1273# 1273 1275# 1275 1278# 1278 1280# 1280 1282# 1282 1284# 1284 1286# 1286
1288# 1288 1290# 1290 1292# 1292 1294# 1294 1296# 1296 1298# 1298 1300# 1300
1302# 1302 1304# 1304 1306# 1306 1308# 1308 1311# 1311 1313# 1313 1315# 1315
1317# 1317 1319# 1319 1321# 1321 1323# 1323 1325# 1325 1327# 1327 1329# 1329
1331# 1331 1333# 1333 1335# 1335 1337# 1337 1339# 1339 1341# 1341 1344# 1344
1346# 1346 1348# 1348 1350# 1350 1352# 1352 1354# 1354 1356# 1356 1358# 1358 SEQ 1233
1360# 1360 1362# 1362 1364# 1364 1366# 1366 1368# 1368 1370# 1370 1372# 1372
1374# 1374 1377# 1377 1379# 1379 1381# 1381 1383# 1383 1385# 1385 1387# 1387
1389# 1389 1391# 1391 1393# 1393 1395# 1395 1397# 1397 1399# 1399 1401# 1401
1403# 1403 1405# 1405 1407# 1407 1412# 1412 1414# 1414 1417# 1417 1419# 1419
1421# 1421 1423# 1423 1425# 1425 1427# 1427 1429# 1429 1431# 1431 1433# 1433
1435# 1435 1437# 1437 1439# 1439 1441# 1441 1443# 1443 1445# 1445 1447# 1447
1450# 1450 1452# 1452 1454# 1454 1456# 1456 1458# 1458 1460# 1460 1462# 1462
1464# 1464 1466# 1466 1468# 1468 1470# 1470 1472# 1472 1474# 1474 1476# 1476
1478# 1478 1480# 1480 1483# 1483 1485# 1485 1487# 1487 1489# 1489 1491# 1491
1493# 1493 1495# 1495 1497# 1497 1499# 1499 1501# 1501 1503# 1503 1505# 1505
1507# 1507 1509# 1509 1511# 1511 1513# 1513 1516# 1516 1518# 1518 1520# 1520
1522# 1522 1524# 1524 1526# 1526 1528# 1528 1530# 1530 1532# 1532 1534# 1534
1536# 1536 1538# 1538 1540# 1540 1542# 1542 1544# 1544 1546# 1546 1551# 1551
1553# 1553 1556# 1556 1558# 1558 1560# 1560 1562# 1562 1564# 1564 1566# 1566
1568# 1568 1570# 1570 1572# 1572 1574# 1574 1576# 1576 1578# 1578 1580# 1580
1582# 1582 1584# 1584 1586# 1586 1589# 1589 1591# 1591 1593# 1593 1595# 1595
1597# 1597 1599# 1599 1601# 1601 1603# 1603 1605# 1605 1607# 1607 1609# 1609
1611# 1611 1613# 1613 1615# 1615 1617# 1617 1619# 1619 1622# 1622 1624# 1624
1626# 1626 1628# 1628 1630# 1630 1632# 1632 1634# 1634 1636# 1636 1638# 1638
1640# 1640 1642# 1642 1644# 1644 1646# 1646 1648# 1648 1650# 1650 1652# 1652
1655# 1655 1657# 1657 1659# 1659 1661# 1661 1663# 1663 1665# 1665 1667# 1667
1669# 1669 1671# 1671 1673# 1673 1675# 1675 1677# 1677 1679# 1679 1681# 1681
1683# 1683 1685# 1685 1690# 1690 1692# 1692 1695# 1695 1697# 1697 1699# 1699
1701# 1701 1703# 1703 1705# 1705 1707# 1707 1709# 1709 1711# 1711 1713# 1713
1715# 1715 1717# 1717 1719# 1719 1721# 1721 1723# 1723 1725# 1725 1728# 1728
1730# 1730 1732# 1732 1734# 1734 1736# 1736 1738# 1738 1740# 1740 1742# 1742
1744# 1744 1746# 1746 1748# 1748 1750# 1750 1752# 1752 1754# 1754 1756# 1756
1758# 1758 1761# 1761 1763# 1763 1765# 1765 1767# 1767 1769# 1769 1771# 1771
1773# 1773 1775# 1775 1777# 1777 1779# 1779 1781# 1781 1783# 1783 1785# 1785
1787# 1787 1789# 1789 1791# 1791 1794# 1794 1796# 1796 1798# 1798 1800# 1800
1802# 1802 1804# 1804 1806# 1806 1808# 1808 1810# 1810 1812# 1812 1814# 1814
1816# 1816 1818# 1818 1820# 1820 1822# 1822 1824# 1824 1829# 1829 1831# 1831
1834# 1834 1836# 1836 1838# 1838 1840# 1840 1842# 1842 1844# 1844 1846# 1846
1848# 1848 1850# 1850 1852# 1852 1854# 1854 1856# 1856 1858# 1858 1860# 1860
1862# 1862 1864# 1864 1867# 1867 1869# 1869 1871# 1871 1873# 1873 1875# 1875
1877# 1877 1879# 1879 1881# 1881 1883# 1883 1885# 1885 1887# 1887 1889# 1889
1891# 1891 1893# 1893 1895# 1895 1897# 1897 1900# 1900 1902# 1902 1904# 1904
1906# 1906 1908# 1908 1910# 1910 1912# 1912 1914# 1914 1916# 1916 1918# 1918
1920# 1920 1922# 1922 1924# 1924 1926# 1926 1928# 1928 1930# 1930 1933# 1933
1935# 1935 1937# 1937 1939# 1939 1941# 1941 1943# 1943 1945# 1945 1947# 1947
1949# 1949 1951# 1951 1953# 1953 1955# 1955 1957# 1957 1959# 1959 1961# 1961
1963# 1963 1968# 1968 1970# 1970 1973# 1973 1975# 1975 1977# 1977 1979# 1979
1981# 1981 1983# 1983 1985# 1985 1987# 1987 1989# 1989 1991# 1991 1993# 1993
1995# 1995 1997# 1997 1999# 1999 2001# 2001 2003# 2003 2006# 2006 2008# 2008
2010# 2010 2012# 2012 2014# 2014 2016# 2016 2018# 2018 2020# 2020 2022# 2022
2024# 2024 2026# 2026 2028# 2028 2030# 2030 2032# 2032 2034# 2034 2036# 2036
2039# 2039 2041# 2041 2043# 2043 2045# 2045 2047# 2047 2049# 2049 2051# 2051
2053# 2053 2055# 2055 2057# 2057 2059# 2059 2061# 2061 2063# 2063 2065# 2065
2067# 2067 2069# 2069 2072# 2072 2074# 2074 2076# 2076 2078# 2078 2080# 2080
2082# 2082 2084# 2084 2086# 2086 2088# 2088 2090# 2090 2092# 2092 2094# 2094
2096# 2096 2098# 2098 2100# 2100 2102# 2102 2107# 2107 2109# 2109 2112# 2112
2114# 2114 2116# 2116 2118# 2118 2120# 2120 2122# 2122 2124# 2124 2126# 2126
2128# 2128 2130# 2130 2132# 2132 2134# 2134 2136# 2136 2138# 2138 2140# 2140 SEQ 1234
2142# 2142 2145# 2145 2147# 2147 2149# 2149 2151# 2151 2153# 2153 2155# 2155
2157# 2157 2159# 2159 2161# 2161 2163# 2163 2165# 2165 2167# 2167 2169# 2169
2171# 2171 2173# 2173 2175# 2175 2178# 2178 2180# 2180 2182# 2182 2184# 2184
2186# 2186 2188# 2188 2190# 2190 2192# 2192 2194# 2194 2196# 2196 2198# 2198
2200# 2200 2202# 2202 2204# 2204 2206# 2206 2208# 2208 2211# 2211 2213# 2213
2215# 2215 2217# 2217 2219# 2219 2221# 2221 2223# 2223 2225# 2225 2227# 2227
2229# 2229 2231# 2231 2233# 2233 2235# 2235 2237# 2237 2239# 2239 2241# 2241
2246# 2246 2248# 2248 2251# 2251 2253# 2253 2255# 2255 2257# 2257 2259# 2259
2261# 2261 2263# 2263 2265# 2265 2267# 2267 2269# 2269 2271# 2271 2273# 2273
2275# 2275 2277# 2277 2279# 2279 2281# 2281 2284# 2284 2286# 2286 2288# 2288
2290# 2290 2292# 2292 2294# 2294 2296# 2296 2298# 2298 2300# 2300 2302# 2302
2304# 2304 2306# 2306 2308# 2308 2310# 2310 2312# 2312 2314# 2314 2317# 2317
2319# 2319 2321# 2321 2323# 2323 2325# 2325 2327# 2327 2329# 2329 2331# 2331
2333# 2333 2335# 2335 2337# 2337 2339# 2339 2341# 2341 2343# 2343 2345# 2345
2347# 2347 2350# 2350 2352# 2352 2354# 2354 2356# 2356 2358# 2358 2360# 2360
2362# 2362 2364# 2364 2366# 2366 2368# 2368 2370# 2370 2372# 2372 2374# 2374
2376# 2376 2378# 2378 2380# 2380 2385# 2385 2387# 2387 2390# 2390 2392# 2392
2394# 2394 2396# 2396 2398# 2398 2400# 2400 2402# 2402 2404# 2404 2406# 2406
2408# 2408 2410# 2410 2412# 2412 2414# 2414 2416# 2416 2418# 2418 2420# 2420
2423# 2423 2425# 2425 2427# 2427 2429# 2429 2431# 2431 2433# 2433 2435# 2435
2437# 2437 2439# 2439 2441# 2441 2443# 2443 2445# 2445 2447# 2447 2449# 2449
2451# 2451 2453# 2453 2456# 2456 2458# 2458 2460# 2460 2462# 2462 2464# 2464
2466# 2466 2468# 2468 2470# 2470 2472# 2472 2474# 2474 2476# 2476 2478# 2478
2480# 2480 2482# 2482 2484# 2484 2486# 2486 2489# 2489 2491# 2491 2493# 2493
2495# 2495 2497# 2497 2499# 2499 2501# 2501 2503# 2503 2505# 2505 2507# 2507
2509# 2509 2511# 2511 2513# 2513 2515# 2515 2517# 2517 2519# 2519 2521# 2521
$B 102# 102 104# 104 110# 110 112# 112 114# 114 116# 116 118# 118
120# 120 122# 122 124# 124 126# 126 128# 128 130# 130 132# 132
134# 134 136# 136 138# 138 140# 140 142# 142 144# 144 149# 149
151# 151 153# 153 158# 158 160# 160 162# 162 167# 167 169# 169
171# 171 176# 176 178# 178 180# 180 185# 185 187# 187 189# 189
194# 194 196# 196 198# 198 203# 203 205# 205 207# 207 212# 212
214# 214 216# 216 221# 221 223# 223 225# 225 230# 230 232# 232
234# 234 239# 239 241# 241 243# 243 248# 248 250# 250 252# 252
257# 257 259# 259 261# 261 266# 266 268# 268 270# 270 275# 275
277# 277 279# 279 284# 284 286# 286 288# 288 293# 293 295# 295
300# 300 302# 302 305# 305 307# 307 309# 309 311# 311 313# 313
315# 315 317# 317 319# 319 321# 321 323# 323 325# 325 327# 327
329# 329 331# 331 333# 333 335# 335 338# 338 340# 340 342# 342
344# 344 346# 346 348# 348 350# 350 352# 352 354# 354 356# 356
358# 358 360# 360 362# 362 364# 364 366# 366 368# 368 371# 371
373# 373 375# 375 377# 377 379# 379 381# 381 383# 383 385# 385
387# 387 389# 389 391# 391 393# 393 395# 395 397# 397 399# 399
401# 401 404# 404 406# 406 408# 408 410# 410 412# 412 414# 414
416# 416 418# 418 420# 420 422# 422 424# 424 426# 426 428# 428
430# 430 432# 432 434# 434 439# 439 441# 441 444# 444 446# 446
448# 448 450# 450 452# 452 454# 454 456# 456 458# 458 460# 460
462# 462 464# 464 466# 466 468# 468 470# 470 472# 472 474# 474
477# 477 479# 479 481# 481 483# 483 485# 485 487# 487 489# 489
491# 491 493# 493 495# 495 497# 497 499# 499 501# 501 503# 503
505# 505 507# 507 510# 510 512# 512 514# 514 516# 516 518# 518
520# 520 522# 522 524# 524 526# 526 528# 528 530# 530 532# 532
534# 534 536# 536 538# 538 540# 540 543# 543 545# 545 547# 547 SEQ 1235
549# 549 551# 551 553# 553 555# 555 557# 557 559# 559 561# 561
563# 563 565# 565 567# 567 569# 569 571# 571 573# 573 578# 578
580# 580 583# 583 585# 585 587# 587 589# 589 591# 591 593# 593
595# 595 597# 597 599# 599 601# 601 603# 603 605# 605 607# 607
609# 609 611# 611 613# 613 616# 616 618# 618 620# 620 622# 622
624# 624 626# 626 628# 628 630# 630 632# 632 634# 634 636# 636
638# 638 640# 640 642# 642 644# 644 646# 646 649# 649 651# 651
653# 653 655# 655 657# 657 659# 659 661# 661 663# 663 665# 665
667# 667 669# 669 671# 671 673# 673 675# 675 677# 677 679# 679
682# 682 684# 684 686# 686 688# 688 690# 690 692# 692 694# 694
696# 696 698# 698 700# 700 702# 702 704# 704 706# 706 708# 708
710# 710 712# 712 717# 717 719# 719 722# 722 724# 724 726# 726
728# 728 730# 730 732# 732 734# 734 736# 736 738# 738 740# 740
742# 742 744# 744 746# 746 748# 748 750# 750 752# 752 755# 755
757# 757 759# 759 761# 761 763# 763 765# 765 767# 767 769# 769
771# 771 773# 773 775# 775 777# 777 779# 779 781# 781 783# 783
785# 785 788# 788 790# 790 792# 792 794# 794 796# 796 798# 798
800# 800 802# 802 804# 804 806# 806 808# 808 810# 810 812# 812
814# 814 816# 816 818# 818 821# 821 823# 823 825# 825 827# 827
829# 829 831# 831 833# 833 835# 835 837# 837 839# 839 841# 841
843# 843 845# 845 847# 847 849# 849 851# 851 856# 856 858# 858
861# 861 863# 863 865# 865 867# 867 869# 869 871# 871 873# 873
875# 875 877# 877 879# 879 881# 881 883# 883 885# 885 887# 887
889# 889 891# 891 894# 894 896# 896 898# 898 900# 900 902# 902
904# 904 906# 906 908# 908 910# 910 912# 912 914# 914 916# 916
918# 918 920# 920 922# 922 924# 924 927# 927 929# 929 931# 931
933# 933 935# 935 937# 937 939# 939 941# 941 943# 943 945# 945
947# 947 949# 949 951# 951 953# 953 955# 955 957# 957 960# 960
962# 962 964# 964 966# 966 968# 968 970# 970 972# 972 974# 974
976# 976 978# 978 980# 980 982# 982 984# 984 986# 986 988# 988
990# 990 995# 995 997# 997 1000# 1000 1002# 1002 1004# 1004 1006# 1006
1008# 1008 1010# 1010 1012# 1012 1014# 1014 1016# 1016 1018# 1018 1020# 1020
1022# 1022 1024# 1024 1026# 1026 1028# 1028 1030# 1030 1033# 1033 1035# 1035
1037# 1037 1039# 1039 1041# 1041 1043# 1043 1045# 1045 1047# 1047 1049# 1049
1051# 1051 1053# 1053 1055# 1055 1057# 1057 1059# 1059 1061# 1061 1063# 1063
1066# 1066 1068# 1068 1070# 1070 1072# 1072 1074# 1074 1076# 1076 1078# 1078
1080# 1080 1082# 1082 1084# 1084 1086# 1086 1088# 1088 1090# 1090 1092# 1092
1094# 1094 1096# 1096 1099# 1099 1101# 1101 1103# 1103 1105# 1105 1107# 1107
1109# 1109 1111# 1111 1113# 1113 1115# 1115 1117# 1117 1119# 1119 1121# 1121
1123# 1123 1125# 1125 1127# 1127 1129# 1129 1134# 1134 1136# 1136 1139# 1139
1141# 1141 1143# 1143 1145# 1145 1147# 1147 1149# 1149 1151# 1151 1153# 1153
1155# 1155 1157# 1157 1159# 1159 1161# 1161 1163# 1163 1165# 1165 1167# 1167
1169# 1169 1172# 1172 1174# 1174 1176# 1176 1178# 1178 1180# 1180 1182# 1182
1184# 1184 1186# 1186 1188# 1188 1190# 1190 1192# 1192 1194# 1194 1196# 1196
1198# 1198 1200# 1200 1202# 1202 1205# 1205 1207# 1207 1209# 1209 1211# 1211
1213# 1213 1215# 1215 1217# 1217 1219# 1219 1221# 1221 1223# 1223 1225# 1225
1227# 1227 1229# 1229 1231# 1231 1233# 1233 1235# 1235 1238# 1238 1240# 1240
1242# 1242 1244# 1244 1246# 1246 1248# 1248 1250# 1250 1252# 1252 1254# 1254
1256# 1256 1258# 1258 1260# 1260 1262# 1262 1264# 1264 1266# 1266 1268# 1268
1273# 1273 1275# 1275 1278# 1278 1280# 1280 1282# 1282 1284# 1284 1286# 1286
1288# 1288 1290# 1290 1292# 1292 1294# 1294 1296# 1296 1298# 1298 1300# 1300
1302# 1302 1304# 1304 1306# 1306 1308# 1308 1311# 1311 1313# 1313 1315# 1315
1317# 1317 1319# 1319 1321# 1321 1323# 1323 1325# 1325 1327# 1327 1329# 1329 SEQ 1236
1331# 1331 1333# 1333 1335# 1335 1337# 1337 1339# 1339 1341# 1341 1344# 1344
1346# 1346 1348# 1348 1350# 1350 1352# 1352 1354# 1354 1356# 1356 1358# 1358
1360# 1360 1362# 1362 1364# 1364 1366# 1366 1368# 1368 1370# 1370 1372# 1372
1374# 1374 1377# 1377 1379# 1379 1381# 1381 1383# 1383 1385# 1385 1387# 1387
1389# 1389 1391# 1391 1393# 1393 1395# 1395 1397# 1397 1399# 1399 1401# 1401
1403# 1403 1405# 1405 1407# 1407 1412# 1412 1414# 1414 1417# 1417 1419# 1419
1421# 1421 1423# 1423 1425# 1425 1427# 1427 1429# 1429 1431# 1431 1433# 1433
1435# 1435 1437# 1437 1439# 1439 1441# 1441 1443# 1443 1445# 1445 1447# 1447
1450# 1450 1452# 1452 1454# 1454 1456# 1456 1458# 1458 1460# 1460 1462# 1462
1464# 1464 1466# 1466 1468# 1468 1470# 1470 1472# 1472 1474# 1474 1476# 1476
1478# 1478 1480# 1480 1483# 1483 1485# 1485 1487# 1487 1489# 1489 1491# 1491
1493# 1493 1495# 1495 1497# 1497 1499# 1499 1501# 1501 1503# 1503 1505# 1505
1507# 1507 1509# 1509 1511# 1511 1513# 1513 1516# 1516 1518# 1518 1520# 1520
1522# 1522 1524# 1524 1526# 1526 1528# 1528 1530# 1530 1532# 1532 1534# 1534
1536# 1536 1538# 1538 1540# 1540 1542# 1542 1544# 1544 1546# 1546 1551# 1551
1553# 1553 1556# 1556 1558# 1558 1560# 1560 1562# 1562 1564# 1564 1566# 1566
1568# 1568 1570# 1570 1572# 1572 1574# 1574 1576# 1576 1578# 1578 1580# 1580
1582# 1582 1584# 1584 1586# 1586 1589# 1589 1591# 1591 1593# 1593 1595# 1595
1597# 1597 1599# 1599 1601# 1601 1603# 1603 1605# 1605 1607# 1607 1609# 1609
1611# 1611 1613# 1613 1615# 1615 1617# 1617 1619# 1619 1622# 1622 1624# 1624
1626# 1626 1628# 1628 1630# 1630 1632# 1632 1634# 1634 1636# 1636 1638# 1638
1640# 1640 1642# 1642 1644# 1644 1646# 1646 1648# 1648 1650# 1650 1652# 1652
1655# 1655 1657# 1657 1659# 1659 1661# 1661 1663# 1663 1665# 1665 1667# 1667
1669# 1669 1671# 1671 1673# 1673 1675# 1675 1677# 1677 1679# 1679 1681# 1681
1683# 1683 1685# 1685 1690# 1690 1692# 1692 1695# 1695 1697# 1697 1699# 1699
1701# 1701 1703# 1703 1705# 1705 1707# 1707 1709# 1709 1711# 1711 1713# 1713
1715# 1715 1717# 1717 1719# 1719 1721# 1721 1723# 1723 1725# 1725 1728# 1728
1730# 1730 1732# 1732 1734# 1734 1736# 1736 1738# 1738 1740# 1740 1742# 1742
1744# 1744 1746# 1746 1748# 1748 1750# 1750 1752# 1752 1754# 1754 1756# 1756
1758# 1758 1761# 1761 1763# 1763 1765# 1765 1767# 1767 1769# 1769 1771# 1771
1773# 1773 1775# 1775 1777# 1777 1779# 1779 1781# 1781 1783# 1783 1785# 1785
1787# 1787 1789# 1789 1791# 1791 1794# 1794 1796# 1796 1798# 1798 1800# 1800
1802# 1802 1804# 1804 1806# 1806 1808# 1808 1810# 1810 1812# 1812 1814# 1814
1816# 1816 1818# 1818 1820# 1820 1822# 1822 1824# 1824 1829# 1829 1831# 1831
1834# 1834 1836# 1836 1838# 1838 1840# 1840 1842# 1842 1844# 1844 1846# 1846
1848# 1848 1850# 1850 1852# 1852 1854# 1854 1856# 1856 1858# 1858 1860# 1860
1862# 1862 1864# 1864 1867# 1867 1869# 1869 1871# 1871 1873# 1873 1875# 1875
1877# 1877 1879# 1879 1881# 1881 1883# 1883 1885# 1885 1887# 1887 1889# 1889
1891# 1891 1893# 1893 1895# 1895 1897# 1897 1900# 1900 1902# 1902 1904# 1904
1906# 1906 1908# 1908 1910# 1910 1912# 1912 1914# 1914 1916# 1916 1918# 1918
1920# 1920 1922# 1922 1924# 1924 1926# 1926 1928# 1928 1930# 1930 1933# 1933
1935# 1935 1937# 1937 1939# 1939 1941# 1941 1943# 1943 1945# 1945 1947# 1947
1949# 1949 1951# 1951 1953# 1953 1955# 1955 1957# 1957 1959# 1959 1961# 1961
1963# 1963 1968# 1968 1970# 1970 1973# 1973 1975# 1975 1977# 1977 1979# 1979
1981# 1981 1983# 1983 1985# 1985 1987# 1987 1989# 1989 1991# 1991 1993# 1993
1995# 1995 1997# 1997 1999# 1999 2001# 2001 2003# 2003 2006# 2006 2008# 2008
2010# 2010 2012# 2012 2014# 2014 2016# 2016 2018# 2018 2020# 2020 2022# 2022
2024# 2024 2026# 2026 2028# 2028 2030# 2030 2032# 2032 2034# 2034 2036# 2036
2039# 2039 2041# 2041 2043# 2043 2045# 2045 2047# 2047 2049# 2049 2051# 2051
2053# 2053 2055# 2055 2057# 2057 2059# 2059 2061# 2061 2063# 2063 2065# 2065
2067# 2067 2069# 2069 2072# 2072 2074# 2074 2076# 2076 2078# 2078 2080# 2080
2082# 2082 2084# 2084 2086# 2086 2088# 2088 2090# 2090 2092# 2092 2094# 2094
2096# 2096 2098# 2098 2100# 2100 2102# 2102 2107# 2107 2109# 2109 2112# 2112 SEQ 1237
2114# 2114 2116# 2116 2118# 2118 2120# 2120 2122# 2122 2124# 2124 2126# 2126
2128# 2128 2130# 2130 2132# 2132 2134# 2134 2136# 2136 2138# 2138 2140# 2140
2142# 2142 2145# 2145 2147# 2147 2149# 2149 2151# 2151 2153# 2153 2155# 2155
2157# 2157 2159# 2159 2161# 2161 2163# 2163 2165# 2165 2167# 2167 2169# 2169
2171# 2171 2173# 2173 2175# 2175 2178# 2178 2180# 2180 2182# 2182 2184# 2184
2186# 2186 2188# 2188 2190# 2190 2192# 2192 2194# 2194 2196# 2196 2198# 2198
2200# 2200 2202# 2202 2204# 2204 2206# 2206 2208# 2208 2211# 2211 2213# 2213
2215# 2215 2217# 2217 2219# 2219 2221# 2221 2223# 2223 2225# 2225 2227# 2227
2229# 2229 2231# 2231 2233# 2233 2235# 2235 2237# 2237 2239# 2239 2241# 2241
2246# 2246 2248# 2248 2251# 2251 2253# 2253 2255# 2255 2257# 2257 2259# 2259
2261# 2261 2263# 2263 2265# 2265 2267# 2267 2269# 2269 2271# 2271 2273# 2273
2275# 2275 2277# 2277 2279# 2279 2281# 2281 2284# 2284 2286# 2286 2288# 2288
2290# 2290 2292# 2292 2294# 2294 2296# 2296 2298# 2298 2300# 2300 2302# 2302
2304# 2304 2306# 2306 2308# 2308 2310# 2310 2312# 2312 2314# 2314 2317# 2317
2319# 2319 2321# 2321 2323# 2323 2325# 2325 2327# 2327 2329# 2329 2331# 2331
2333# 2333 2335# 2335 2337# 2337 2339# 2339 2341# 2341 2343# 2343 2345# 2345
2347# 2347 2350# 2350 2352# 2352 2354# 2354 2356# 2356 2358# 2358 2360# 2360
2362# 2362 2364# 2364 2366# 2366 2368# 2368 2370# 2370 2372# 2372 2374# 2374
2376# 2376 2378# 2378 2380# 2380 2385# 2385 2387# 2387 2390# 2390 2392# 2392
2394# 2394 2396# 2396 2398# 2398 2400# 2400 2402# 2402 2404# 2404 2406# 2406
2408# 2408 2410# 2410 2412# 2412 2414# 2414 2416# 2416 2418# 2418 2420# 2420
2423# 2423 2425# 2425 2427# 2427 2429# 2429 2431# 2431 2433# 2433 2435# 2435
2437# 2437 2439# 2439 2441# 2441 2443# 2443 2445# 2445 2447# 2447 2449# 2449
2451# 2451 2453# 2453 2456# 2456 2458# 2458 2460# 2460 2462# 2462 2464# 2464
2466# 2466 2468# 2468 2470# 2470 2472# 2472 2474# 2474 2476# 2476 2478# 2478
2480# 2480 2482# 2482 2484# 2484 2486# 2486 2489# 2489 2491# 2491 2493# 2493
2495# 2495 2497# 2497 2499# 2499 2501# 2501 2503# 2503 2505# 2505 2507# 2507
2509# 2509 2511# 2511 2513# 2513 2515# 2515 2517# 2517 2519# 2519 2521# 2521
$CHR 102# 102 104# 104 110# 110 112# 112 114# 114 116# 116 118# 118
120# 120 122# 122 124# 124 126# 126 128# 128 130# 130 132# 132
134# 134 136# 136 138# 138 140# 140 142# 142 144# 144 149# 149
151# 151 153# 153 158# 158 160# 160 162# 162 167# 167 169# 169
171# 171 176# 176 178# 178 180# 180 185# 185 187# 187 189# 189
194# 194 196# 196 198# 198 203# 203 205# 205 207# 207 212# 212
214# 214 216# 216 221# 221 223# 223 225# 225 230# 230 232# 232
234# 234 239# 239 241# 241 243# 243 248# 248 250# 250 252# 252
257# 257 259# 259 261# 261 266# 266 268# 268 270# 270 275# 275
277# 277 279# 279 284# 284 286# 286 288# 288 293# 293 295# 295
300# 300 302# 302 305# 305 307# 307 309# 309 311# 311 313# 313
315# 315 317# 317 319# 319 321# 321 323# 323 325# 325 327# 327
329# 329 331# 331 333# 333 335# 335 338# 338 340# 340 342# 342
344# 344 346# 346 348# 348 350# 350 352# 352 354# 354 356# 356
358# 358 360# 360 362# 362 364# 364 366# 366 368# 368 371# 371
373# 373 375# 375 377# 377 379# 379 381# 381 383# 383 385# 385
387# 387 389# 389 391# 391 393# 393 395# 395 397# 397 399# 399
401# 401 404# 404 406# 406 408# 408 410# 410 412# 412 414# 414
416# 416 418# 418 420# 420 422# 422 424# 424 426# 426 428# 428
430# 430 432# 432 434# 434 439# 439 441# 441 444# 444 446# 446
448# 448 450# 450 452# 452 454# 454 456# 456 458# 458 460# 460
462# 462 464# 464 466# 466 468# 468 470# 470 472# 472 474# 474
477# 477 479# 479 481# 481 483# 483 485# 485 487# 487 489# 489
491# 491 493# 493 495# 495 497# 497 499# 499 501# 501 503# 503
505# 505 507# 507 510# 510 512# 512 514# 514 516# 516 518# 518 SEQ 1238
520# 520 522# 522 524# 524 526# 526 528# 528 530# 530 532# 532
534# 534 536# 536 538# 538 540# 540 543# 543 545# 545 547# 547
549# 549 551# 551 553# 553 555# 555 557# 557 559# 559 561# 561
563# 563 565# 565 567# 567 569# 569 571# 571 573# 573 578# 578
580# 580 583# 583 585# 585 587# 587 589# 589 591# 591 593# 593
595# 595 597# 597 599# 599 601# 601 603# 603 605# 605 607# 607
609# 609 611# 611 613# 613 616# 616 618# 618 620# 620 622# 622
624# 624 626# 626 628# 628 630# 630 632# 632 634# 634 636# 636
638# 638 640# 640 642# 642 644# 644 646# 646 649# 649 651# 651
653# 653 655# 655 657# 657 659# 659 661# 661 663# 663 665# 665
667# 667 669# 669 671# 671 673# 673 675# 675 677# 677 679# 679
682# 682 684# 684 686# 686 688# 688 690# 690 692# 692 694# 694
696# 696 698# 698 700# 700 702# 702 704# 704 706# 706 708# 708
710# 710 712# 712 717# 717 719# 719 722# 722 724# 724 726# 726
728# 728 730# 730 732# 732 734# 734 736# 736 738# 738 740# 740
742# 742 744# 744 746# 746 748# 748 750# 750 752# 752 755# 755
757# 757 759# 759 761# 761 763# 763 765# 765 767# 767 769# 769
771# 771 773# 773 775# 775 777# 777 779# 779 781# 781 783# 783
785# 785 788# 788 790# 790 792# 792 794# 794 796# 796 798# 798
800# 800 802# 802 804# 804 806# 806 808# 808 810# 810 812# 812
814# 814 816# 816 818# 818 821# 821 823# 823 825# 825 827# 827
829# 829 831# 831 833# 833 835# 835 837# 837 839# 839 841# 841
843# 843 845# 845 847# 847 849# 849 851# 851 856# 856 858# 858
861# 861 863# 863 865# 865 867# 867 869# 869 871# 871 873# 873
875# 875 877# 877 879# 879 881# 881 883# 883 885# 885 887# 887
889# 889 891# 891 894# 894 896# 896 898# 898 900# 900 902# 902
904# 904 906# 906 908# 908 910# 910 912# 912 914# 914 916# 916
918# 918 920# 920 922# 922 924# 924 927# 927 929# 929 931# 931
933# 933 935# 935 937# 937 939# 939 941# 941 943# 943 945# 945
947# 947 949# 949 951# 951 953# 953 955# 955 957# 957 960# 960
962# 962 964# 964 966# 966 968# 968 970# 970 972# 972 974# 974
976# 976 978# 978 980# 980 982# 982 984# 984 986# 986 988# 988
990# 990 995# 995 997# 997 1000# 1000 1002# 1002 1004# 1004 1006# 1006
1008# 1008 1010# 1010 1012# 1012 1014# 1014 1016# 1016 1018# 1018 1020# 1020
1022# 1022 1024# 1024 1026# 1026 1028# 1028 1030# 1030 1033# 1033 1035# 1035
1037# 1037 1039# 1039 1041# 1041 1043# 1043 1045# 1045 1047# 1047 1049# 1049
1051# 1051 1053# 1053 1055# 1055 1057# 1057 1059# 1059 1061# 1061 1063# 1063
1066# 1066 1068# 1068 1070# 1070 1072# 1072 1074# 1074 1076# 1076 1078# 1078
1080# 1080 1082# 1082 1084# 1084 1086# 1086 1088# 1088 1090# 1090 1092# 1092
1094# 1094 1096# 1096 1099# 1099 1101# 1101 1103# 1103 1105# 1105 1107# 1107
1109# 1109 1111# 1111 1113# 1113 1115# 1115 1117# 1117 1119# 1119 1121# 1121
1123# 1123 1125# 1125 1127# 1127 1129# 1129 1134# 1134 1136# 1136 1139# 1139
1141# 1141 1143# 1143 1145# 1145 1147# 1147 1149# 1149 1151# 1151 1153# 1153
1155# 1155 1157# 1157 1159# 1159 1161# 1161 1163# 1163 1165# 1165 1167# 1167
1169# 1169 1172# 1172 1174# 1174 1176# 1176 1178# 1178 1180# 1180 1182# 1182
1184# 1184 1186# 1186 1188# 1188 1190# 1190 1192# 1192 1194# 1194 1196# 1196
1198# 1198 1200# 1200 1202# 1202 1205# 1205 1207# 1207 1209# 1209 1211# 1211
1213# 1213 1215# 1215 1217# 1217 1219# 1219 1221# 1221 1223# 1223 1225# 1225
1227# 1227 1229# 1229 1231# 1231 1233# 1233 1235# 1235 1238# 1238 1240# 1240
1242# 1242 1244# 1244 1246# 1246 1248# 1248 1250# 1250 1252# 1252 1254# 1254
1256# 1256 1258# 1258 1260# 1260 1262# 1262 1264# 1264 1266# 1266 1268# 1268
1273# 1273 1275# 1275 1278# 1278 1280# 1280 1282# 1282 1284# 1284 1286# 1286
1288# 1288 1290# 1290 1292# 1292 1294# 1294 1296# 1296 1298# 1298 1300# 1300 SEQ 1239
1302# 1302 1304# 1304 1306# 1306 1308# 1308 1311# 1311 1313# 1313 1315# 1315
1317# 1317 1319# 1319 1321# 1321 1323# 1323 1325# 1325 1327# 1327 1329# 1329
1331# 1331 1333# 1333 1335# 1335 1337# 1337 1339# 1339 1341# 1341 1344# 1344
1346# 1346 1348# 1348 1350# 1350 1352# 1352 1354# 1354 1356# 1356 1358# 1358
1360# 1360 1362# 1362 1364# 1364 1366# 1366 1368# 1368 1370# 1370 1372# 1372
1374# 1374 1377# 1377 1379# 1379 1381# 1381 1383# 1383 1385# 1385 1387# 1387
1389# 1389 1391# 1391 1393# 1393 1395# 1395 1397# 1397 1399# 1399 1401# 1401
1403# 1403 1405# 1405 1407# 1407 1412# 1412 1414# 1414 1417# 1417 1419# 1419
1421# 1421 1423# 1423 1425# 1425 1427# 1427 1429# 1429 1431# 1431 1433# 1433
1435# 1435 1437# 1437 1439# 1439 1441# 1441 1443# 1443 1445# 1445 1447# 1447
1450# 1450 1452# 1452 1454# 1454 1456# 1456 1458# 1458 1460# 1460 1462# 1462
1464# 1464 1466# 1466 1468# 1468 1470# 1470 1472# 1472 1474# 1474 1476# 1476
1478# 1478 1480# 1480 1483# 1483 1485# 1485 1487# 1487 1489# 1489 1491# 1491
1493# 1493 1495# 1495 1497# 1497 1499# 1499 1501# 1501 1503# 1503 1505# 1505
1507# 1507 1509# 1509 1511# 1511 1513# 1513 1516# 1516 1518# 1518 1520# 1520
1522# 1522 1524# 1524 1526# 1526 1528# 1528 1530# 1530 1532# 1532 1534# 1534
1536# 1536 1538# 1538 1540# 1540 1542# 1542 1544# 1544 1546# 1546 1551# 1551
1553# 1553 1556# 1556 1558# 1558 1560# 1560 1562# 1562 1564# 1564 1566# 1566
1568# 1568 1570# 1570 1572# 1572 1574# 1574 1576# 1576 1578# 1578 1580# 1580
1582# 1582 1584# 1584 1586# 1586 1589# 1589 1591# 1591 1593# 1593 1595# 1595
1597# 1597 1599# 1599 1601# 1601 1603# 1603 1605# 1605 1607# 1607 1609# 1609
1611# 1611 1613# 1613 1615# 1615 1617# 1617 1619# 1619 1622# 1622 1624# 1624
1626# 1626 1628# 1628 1630# 1630 1632# 1632 1634# 1634 1636# 1636 1638# 1638
1640# 1640 1642# 1642 1644# 1644 1646# 1646 1648# 1648 1650# 1650 1652# 1652
1655# 1655 1657# 1657 1659# 1659 1661# 1661 1663# 1663 1665# 1665 1667# 1667
1669# 1669 1671# 1671 1673# 1673 1675# 1675 1677# 1677 1679# 1679 1681# 1681
1683# 1683 1685# 1685 1690# 1690 1692# 1692 1695# 1695 1697# 1697 1699# 1699
1701# 1701 1703# 1703 1705# 1705 1707# 1707 1709# 1709 1711# 1711 1713# 1713
1715# 1715 1717# 1717 1719# 1719 1721# 1721 1723# 1723 1725# 1725 1728# 1728
1730# 1730 1732# 1732 1734# 1734 1736# 1736 1738# 1738 1740# 1740 1742# 1742
1744# 1744 1746# 1746 1748# 1748 1750# 1750 1752# 1752 1754# 1754 1756# 1756
1758# 1758 1761# 1761 1763# 1763 1765# 1765 1767# 1767 1769# 1769 1771# 1771
1773# 1773 1775# 1775 1777# 1777 1779# 1779 1781# 1781 1783# 1783 1785# 1785
1787# 1787 1789# 1789 1791# 1791 1794# 1794 1796# 1796 1798# 1798 1800# 1800
1802# 1802 1804# 1804 1806# 1806 1808# 1808 1810# 1810 1812# 1812 1814# 1814
1816# 1816 1818# 1818 1820# 1820 1822# 1822 1824# 1824 1829# 1829 1831# 1831
1834# 1834 1836# 1836 1838# 1838 1840# 1840 1842# 1842 1844# 1844 1846# 1846
1848# 1848 1850# 1850 1852# 1852 1854# 1854 1856# 1856 1858# 1858 1860# 1860
1862# 1862 1864# 1864 1867# 1867 1869# 1869 1871# 1871 1873# 1873 1875# 1875
1877# 1877 1879# 1879 1881# 1881 1883# 1883 1885# 1885 1887# 1887 1889# 1889
1891# 1891 1893# 1893 1895# 1895 1897# 1897 1900# 1900 1902# 1902 1904# 1904
1906# 1906 1908# 1908 1910# 1910 1912# 1912 1914# 1914 1916# 1916 1918# 1918
1920# 1920 1922# 1922 1924# 1924 1926# 1926 1928# 1928 1930# 1930 1933# 1933
1935# 1935 1937# 1937 1939# 1939 1941# 1941 1943# 1943 1945# 1945 1947# 1947
1949# 1949 1951# 1951 1953# 1953 1955# 1955 1957# 1957 1959# 1959 1961# 1961
1963# 1963 1968# 1968 1970# 1970 1973# 1973 1975# 1975 1977# 1977 1979# 1979
1981# 1981 1983# 1983 1985# 1985 1987# 1987 1989# 1989 1991# 1991 1993# 1993
1995# 1995 1997# 1997 1999# 1999 2001# 2001 2003# 2003 2006# 2006 2008# 2008
2010# 2010 2012# 2012 2014# 2014 2016# 2016 2018# 2018 2020# 2020 2022# 2022
2024# 2024 2026# 2026 2028# 2028 2030# 2030 2032# 2032 2034# 2034 2036# 2036
2039# 2039 2041# 2041 2043# 2043 2045# 2045 2047# 2047 2049# 2049 2051# 2051
2053# 2053 2055# 2055 2057# 2057 2059# 2059 2061# 2061 2063# 2063 2065# 2065
2067# 2067 2069# 2069 2072# 2072 2074# 2074 2076# 2076 2078# 2078 2080# 2080 SEQ 1240
2082# 2082 2084# 2084 2086# 2086 2088# 2088 2090# 2090 2092# 2092 2094# 2094
2096# 2096 2098# 2098 2100# 2100 2102# 2102 2107# 2107 2109# 2109 2112# 2112
2114# 2114 2116# 2116 2118# 2118 2120# 2120 2122# 2122 2124# 2124 2126# 2126
2128# 2128 2130# 2130 2132# 2132 2134# 2134 2136# 2136 2138# 2138 2140# 2140
2142# 2142 2145# 2145 2147# 2147 2149# 2149 2151# 2151 2153# 2153 2155# 2155
2157# 2157 2159# 2159 2161# 2161 2163# 2163 2165# 2165 2167# 2167 2169# 2169
2171# 2171 2173# 2173 2175# 2175 2178# 2178 2180# 2180 2182# 2182 2184# 2184
2186# 2186 2188# 2188 2190# 2190 2192# 2192 2194# 2194 2196# 2196 2198# 2198
2200# 2200 2202# 2202 2204# 2204 2206# 2206 2208# 2208 2211# 2211 2213# 2213
2215# 2215 2217# 2217 2219# 2219 2221# 2221 2223# 2223 2225# 2225 2227# 2227
2229# 2229 2231# 2231 2233# 2233 2235# 2235 2237# 2237 2239# 2239 2241# 2241
2246# 2246 2248# 2248 2251# 2251 2253# 2253 2255# 2255 2257# 2257 2259# 2259
2261# 2261 2263# 2263 2265# 2265 2267# 2267 2269# 2269 2271# 2271 2273# 2273
2275# 2275 2277# 2277 2279# 2279 2281# 2281 2284# 2284 2286# 2286 2288# 2288
2290# 2290 2292# 2292 2294# 2294 2296# 2296 2298# 2298 2300# 2300 2302# 2302
2304# 2304 2306# 2306 2308# 2308 2310# 2310 2312# 2312 2314# 2314 2317# 2317
2319# 2319 2321# 2321 2323# 2323 2325# 2325 2327# 2327 2329# 2329 2331# 2331
2333# 2333 2335# 2335 2337# 2337 2339# 2339 2341# 2341 2343# 2343 2345# 2345
2347# 2347 2350# 2350 2352# 2352 2354# 2354 2356# 2356 2358# 2358 2360# 2360
2362# 2362 2364# 2364 2366# 2366 2368# 2368 2370# 2370 2372# 2372 2374# 2374
2376# 2376 2378# 2378 2380# 2380 2385# 2385 2387# 2387 2390# 2390 2392# 2392
2394# 2394 2396# 2396 2398# 2398 2400# 2400 2402# 2402 2404# 2404 2406# 2406
2408# 2408 2410# 2410 2412# 2412 2414# 2414 2416# 2416 2418# 2418 2420# 2420
2423# 2423 2425# 2425 2427# 2427 2429# 2429 2431# 2431 2433# 2433 2435# 2435
2437# 2437 2439# 2439 2441# 2441 2443# 2443 2445# 2445 2447# 2447 2449# 2449
2451# 2451 2453# 2453 2456# 2456 2458# 2458 2460# 2460 2462# 2462 2464# 2464
2466# 2466 2468# 2468 2470# 2470 2472# 2472 2474# 2474 2476# 2476 2478# 2478
2480# 2480 2482# 2482 2484# 2484 2486# 2486 2489# 2489 2491# 2491 2493# 2493
2495# 2495 2497# 2497 2499# 2499 2501# 2501 2503# 2503 2505# 2505 2507# 2507
2509# 2509 2511# 2511 2513# 2513 2515# 2515 2517# 2517 2519# 2519 2521# 2521
$GARG 102# 102 104# 104 110# 110 112# 112 114# 114 116# 116 118# 118
120# 120 122# 122 124# 124 126# 126 128# 128 130# 130 132# 132
134# 134 136# 136 138# 138 140# 140 142# 142 144# 144 149# 149
151# 151 153# 153 158# 158 160# 160 162# 162 167# 167 169# 169
171# 171 176# 176 178# 178 180# 180 185# 185 187# 187 189# 189
194# 194 196# 196 198# 198 203# 203 205# 205 207# 207 212# 212
214# 214 216# 216 221# 221 223# 223 225# 225 230# 230 232# 232
234# 234 239# 239 241# 241 243# 243 248# 248 250# 250 252# 252
257# 257 259# 259 261# 261 266# 266 268# 268 270# 270 275# 275
277# 277 279# 279 284# 284 286# 286 288# 288 293# 293 295# 295
300# 300 302# 302 305# 305 307# 307 309# 309 311# 311 313# 313
315# 315 317# 317 319# 319 321# 321 323# 323 325# 325 327# 327
329# 329 331# 331 333# 333 335# 335 338# 338 340# 340 342# 342
344# 344 346# 346 348# 348 350# 350 352# 352 354# 354 356# 356
358# 358 360# 360 362# 362 364# 364 366# 366 368# 368 371# 371
373# 373 375# 375 377# 377 379# 379 381# 381 383# 383 385# 385
387# 387 389# 389 391# 391 393# 393 395# 395 397# 397 399# 399
401# 401 404# 404 406# 406 408# 408 410# 410 412# 412 414# 414
416# 416 418# 418 420# 420 422# 422 424# 424 426# 426 428# 428
430# 430 432# 432 434# 434 439# 439 441# 441 444# 444 446# 446
448# 448 450# 450 452# 452 454# 454 456# 456 458# 458 460# 460
462# 462 464# 464 466# 466 468# 468 470# 470 472# 472 474# 474
477# 477 479# 479 481# 481 483# 483 485# 485 487# 487 489# 489 SEQ 1241
491# 491 493# 493 495# 495 497# 497 499# 499 501# 501 503# 503
505# 505 507# 507 510# 510 512# 512 514# 514 516# 516 518# 518
520# 520 522# 522 524# 524 526# 526 528# 528 530# 530 532# 532
534# 534 536# 536 538# 538 540# 540 543# 543 545# 545 547# 547
549# 549 551# 551 553# 553 555# 555 557# 557 559# 559 561# 561
563# 563 565# 565 567# 567 569# 569 571# 571 573# 573 578# 578
580# 580 583# 583 585# 585 587# 587 589# 589 591# 591 593# 593
595# 595 597# 597 599# 599 601# 601 603# 603 605# 605 607# 607
609# 609 611# 611 613# 613 616# 616 618# 618 620# 620 622# 622
624# 624 626# 626 628# 628 630# 630 632# 632 634# 634 636# 636
638# 638 640# 640 642# 642 644# 644 646# 646 649# 649 651# 651
653# 653 655# 655 657# 657 659# 659 661# 661 663# 663 665# 665
667# 667 669# 669 671# 671 673# 673 675# 675 677# 677 679# 679
682# 682 684# 684 686# 686 688# 688 690# 690 692# 692 694# 694
696# 696 698# 698 700# 700 702# 702 704# 704 706# 706 708# 708
710# 710 712# 712 717# 717 719# 719 722# 722 724# 724 726# 726
728# 728 730# 730 732# 732 734# 734 736# 736 738# 738 740# 740
742# 742 744# 744 746# 746 748# 748 750# 750 752# 752 755# 755
757# 757 759# 759 761# 761 763# 763 765# 765 767# 767 769# 769
771# 771 773# 773 775# 775 777# 777 779# 779 781# 781 783# 783
785# 785 788# 788 790# 790 792# 792 794# 794 796# 796 798# 798
800# 800 802# 802 804# 804 806# 806 808# 808 810# 810 812# 812
814# 814 816# 816 818# 818 821# 821 823# 823 825# 825 827# 827
829# 829 831# 831 833# 833 835# 835 837# 837 839# 839 841# 841
843# 843 845# 845 847# 847 849# 849 851# 851 856# 856 858# 858
861# 861 863# 863 865# 865 867# 867 869# 869 871# 871 873# 873
875# 875 877# 877 879# 879 881# 881 883# 883 885# 885 887# 887
889# 889 891# 891 894# 894 896# 896 898# 898 900# 900 902# 902
904# 904 906# 906 908# 908 910# 910 912# 912 914# 914 916# 916
918# 918 920# 920 922# 922 924# 924 927# 927 929# 929 931# 931
933# 933 935# 935 937# 937 939# 939 941# 941 943# 943 945# 945
947# 947 949# 949 951# 951 953# 953 955# 955 957# 957 960# 960
962# 962 964# 964 966# 966 968# 968 970# 970 972# 972 974# 974
976# 976 978# 978 980# 980 982# 982 984# 984 986# 986 988# 988
990# 990 995# 995 997# 997 1000# 1000 1002# 1002 1004# 1004 1006# 1006
1008# 1008 1010# 1010 1012# 1012 1014# 1014 1016# 1016 1018# 1018 1020# 1020
1022# 1022 1024# 1024 1026# 1026 1028# 1028 1030# 1030 1033# 1033 1035# 1035
1037# 1037 1039# 1039 1041# 1041 1043# 1043 1045# 1045 1047# 1047 1049# 1049
1051# 1051 1053# 1053 1055# 1055 1057# 1057 1059# 1059 1061# 1061 1063# 1063
1066# 1066 1068# 1068 1070# 1070 1072# 1072 1074# 1074 1076# 1076 1078# 1078
1080# 1080 1082# 1082 1084# 1084 1086# 1086 1088# 1088 1090# 1090 1092# 1092
1094# 1094 1096# 1096 1099# 1099 1101# 1101 1103# 1103 1105# 1105 1107# 1107
1109# 1109 1111# 1111 1113# 1113 1115# 1115 1117# 1117 1119# 1119 1121# 1121
1123# 1123 1125# 1125 1127# 1127 1129# 1129 1134# 1134 1136# 1136 1139# 1139
1141# 1141 1143# 1143 1145# 1145 1147# 1147 1149# 1149 1151# 1151 1153# 1153
1155# 1155 1157# 1157 1159# 1159 1161# 1161 1163# 1163 1165# 1165 1167# 1167
1169# 1169 1172# 1172 1174# 1174 1176# 1176 1178# 1178 1180# 1180 1182# 1182
1184# 1184 1186# 1186 1188# 1188 1190# 1190 1192# 1192 1194# 1194 1196# 1196
1198# 1198 1200# 1200 1202# 1202 1205# 1205 1207# 1207 1209# 1209 1211# 1211
1213# 1213 1215# 1215 1217# 1217 1219# 1219 1221# 1221 1223# 1223 1225# 1225
1227# 1227 1229# 1229 1231# 1231 1233# 1233 1235# 1235 1238# 1238 1240# 1240
1242# 1242 1244# 1244 1246# 1246 1248# 1248 1250# 1250 1252# 1252 1254# 1254
1256# 1256 1258# 1258 1260# 1260 1262# 1262 1264# 1264 1266# 1266 1268# 1268 SEQ 1242
1273# 1273 1275# 1275 1278# 1278 1280# 1280 1282# 1282 1284# 1284 1286# 1286
1288# 1288 1290# 1290 1292# 1292 1294# 1294 1296# 1296 1298# 1298 1300# 1300
1302# 1302 1304# 1304 1306# 1306 1308# 1308 1311# 1311 1313# 1313 1315# 1315
1317# 1317 1319# 1319 1321# 1321 1323# 1323 1325# 1325 1327# 1327 1329# 1329
1331# 1331 1333# 1333 1335# 1335 1337# 1337 1339# 1339 1341# 1341 1344# 1344
1346# 1346 1348# 1348 1350# 1350 1352# 1352 1354# 1354 1356# 1356 1358# 1358
1360# 1360 1362# 1362 1364# 1364 1366# 1366 1368# 1368 1370# 1370 1372# 1372
1374# 1374 1377# 1377 1379# 1379 1381# 1381 1383# 1383 1385# 1385 1387# 1387
1389# 1389 1391# 1391 1393# 1393 1395# 1395 1397# 1397 1399# 1399 1401# 1401
1403# 1403 1405# 1405 1407# 1407 1412# 1412 1414# 1414 1417# 1417 1419# 1419
1421# 1421 1423# 1423 1425# 1425 1427# 1427 1429# 1429 1431# 1431 1433# 1433
1435# 1435 1437# 1437 1439# 1439 1441# 1441 1443# 1443 1445# 1445 1447# 1447
1450# 1450 1452# 1452 1454# 1454 1456# 1456 1458# 1458 1460# 1460 1462# 1462
1464# 1464 1466# 1466 1468# 1468 1470# 1470 1472# 1472 1474# 1474 1476# 1476
1478# 1478 1480# 1480 1483# 1483 1485# 1485 1487# 1487 1489# 1489 1491# 1491
1493# 1493 1495# 1495 1497# 1497 1499# 1499 1501# 1501 1503# 1503 1505# 1505
1507# 1507 1509# 1509 1511# 1511 1513# 1513 1516# 1516 1518# 1518 1520# 1520
1522# 1522 1524# 1524 1526# 1526 1528# 1528 1530# 1530 1532# 1532 1534# 1534
1536# 1536 1538# 1538 1540# 1540 1542# 1542 1544# 1544 1546# 1546 1551# 1551
1553# 1553 1556# 1556 1558# 1558 1560# 1560 1562# 1562 1564# 1564 1566# 1566
1568# 1568 1570# 1570 1572# 1572 1574# 1574 1576# 1576 1578# 1578 1580# 1580
1582# 1582 1584# 1584 1586# 1586 1589# 1589 1591# 1591 1593# 1593 1595# 1595
1597# 1597 1599# 1599 1601# 1601 1603# 1603 1605# 1605 1607# 1607 1609# 1609
1611# 1611 1613# 1613 1615# 1615 1617# 1617 1619# 1619 1622# 1622 1624# 1624
1626# 1626 1628# 1628 1630# 1630 1632# 1632 1634# 1634 1636# 1636 1638# 1638
1640# 1640 1642# 1642 1644# 1644 1646# 1646 1648# 1648 1650# 1650 1652# 1652
1655# 1655 1657# 1657 1659# 1659 1661# 1661 1663# 1663 1665# 1665 1667# 1667
1669# 1669 1671# 1671 1673# 1673 1675# 1675 1677# 1677 1679# 1679 1681# 1681
1683# 1683 1685# 1685 1690# 1690 1692# 1692 1695# 1695 1697# 1697 1699# 1699
1701# 1701 1703# 1703 1705# 1705 1707# 1707 1709# 1709 1711# 1711 1713# 1713
1715# 1715 1717# 1717 1719# 1719 1721# 1721 1723# 1723 1725# 1725 1728# 1728
1730# 1730 1732# 1732 1734# 1734 1736# 1736 1738# 1738 1740# 1740 1742# 1742
1744# 1744 1746# 1746 1748# 1748 1750# 1750 1752# 1752 1754# 1754 1756# 1756
1758# 1758 1761# 1761 1763# 1763 1765# 1765 1767# 1767 1769# 1769 1771# 1771
1773# 1773 1775# 1775 1777# 1777 1779# 1779 1781# 1781 1783# 1783 1785# 1785
1787# 1787 1789# 1789 1791# 1791 1794# 1794 1796# 1796 1798# 1798 1800# 1800
1802# 1802 1804# 1804 1806# 1806 1808# 1808 1810# 1810 1812# 1812 1814# 1814
1816# 1816 1818# 1818 1820# 1820 1822# 1822 1824# 1824 1829# 1829 1831# 1831
1834# 1834 1836# 1836 1838# 1838 1840# 1840 1842# 1842 1844# 1844 1846# 1846
1848# 1848 1850# 1850 1852# 1852 1854# 1854 1856# 1856 1858# 1858 1860# 1860
1862# 1862 1864# 1864 1867# 1867 1869# 1869 1871# 1871 1873# 1873 1875# 1875
1877# 1877 1879# 1879 1881# 1881 1883# 1883 1885# 1885 1887# 1887 1889# 1889
1891# 1891 1893# 1893 1895# 1895 1897# 1897 1900# 1900 1902# 1902 1904# 1904
1906# 1906 1908# 1908 1910# 1910 1912# 1912 1914# 1914 1916# 1916 1918# 1918
1920# 1920 1922# 1922 1924# 1924 1926# 1926 1928# 1928 1930# 1930 1933# 1933
1935# 1935 1937# 1937 1939# 1939 1941# 1941 1943# 1943 1945# 1945 1947# 1947
1949# 1949 1951# 1951 1953# 1953 1955# 1955 1957# 1957 1959# 1959 1961# 1961
1963# 1963 1968# 1968 1970# 1970 1973# 1973 1975# 1975 1977# 1977 1979# 1979
1981# 1981 1983# 1983 1985# 1985 1987# 1987 1989# 1989 1991# 1991 1993# 1993
1995# 1995 1997# 1997 1999# 1999 2001# 2001 2003# 2003 2006# 2006 2008# 2008
2010# 2010 2012# 2012 2014# 2014 2016# 2016 2018# 2018 2020# 2020 2022# 2022
2024# 2024 2026# 2026 2028# 2028 2030# 2030 2032# 2032 2034# 2034 2036# 2036
2039# 2039 2041# 2041 2043# 2043 2045# 2045 2047# 2047 2049# 2049 2051# 2051 SEQ 1243
2053# 2053 2055# 2055 2057# 2057 2059# 2059 2061# 2061 2063# 2063 2065# 2065
2067# 2067 2069# 2069 2072# 2072 2074# 2074 2076# 2076 2078# 2078 2080# 2080
2082# 2082 2084# 2084 2086# 2086 2088# 2088 2090# 2090 2092# 2092 2094# 2094
2096# 2096 2098# 2098 2100# 2100 2102# 2102 2107# 2107 2109# 2109 2112# 2112
2114# 2114 2116# 2116 2118# 2118 2120# 2120 2122# 2122 2124# 2124 2126# 2126
2128# 2128 2130# 2130 2132# 2132 2134# 2134 2136# 2136 2138# 2138 2140# 2140
2142# 2142 2145# 2145 2147# 2147 2149# 2149 2151# 2151 2153# 2153 2155# 2155
2157# 2157 2159# 2159 2161# 2161 2163# 2163 2165# 2165 2167# 2167 2169# 2169
2171# 2171 2173# 2173 2175# 2175 2178# 2178 2180# 2180 2182# 2182 2184# 2184
2186# 2186 2188# 2188 2190# 2190 2192# 2192 2194# 2194 2196# 2196 2198# 2198
2200# 2200 2202# 2202 2204# 2204 2206# 2206 2208# 2208 2211# 2211 2213# 2213
2215# 2215 2217# 2217 2219# 2219 2221# 2221 2223# 2223 2225# 2225 2227# 2227
2229# 2229 2231# 2231 2233# 2233 2235# 2235 2237# 2237 2239# 2239 2241# 2241
2246# 2246 2248# 2248 2251# 2251 2253# 2253 2255# 2255 2257# 2257 2259# 2259
2261# 2261 2263# 2263 2265# 2265 2267# 2267 2269# 2269 2271# 2271 2273# 2273
2275# 2275 2277# 2277 2279# 2279 2281# 2281 2284# 2284 2286# 2286 2288# 2288
2290# 2290 2292# 2292 2294# 2294 2296# 2296 2298# 2298 2300# 2300 2302# 2302
2304# 2304 2306# 2306 2308# 2308 2310# 2310 2312# 2312 2314# 2314 2317# 2317
2319# 2319 2321# 2321 2323# 2323 2325# 2325 2327# 2327 2329# 2329 2331# 2331
2333# 2333 2335# 2335 2337# 2337 2339# 2339 2341# 2341 2343# 2343 2345# 2345
2347# 2347 2350# 2350 2352# 2352 2354# 2354 2356# 2356 2358# 2358 2360# 2360
2362# 2362 2364# 2364 2366# 2366 2368# 2368 2370# 2370 2372# 2372 2374# 2374
2376# 2376 2378# 2378 2380# 2380 2385# 2385 2387# 2387 2390# 2390 2392# 2392
2394# 2394 2396# 2396 2398# 2398 2400# 2400 2402# 2402 2404# 2404 2406# 2406
2408# 2408 2410# 2410 2412# 2412 2414# 2414 2416# 2416 2418# 2418 2420# 2420
2423# 2423 2425# 2425 2427# 2427 2429# 2429 2431# 2431 2433# 2433 2435# 2435
2437# 2437 2439# 2439 2441# 2441 2443# 2443 2445# 2445 2447# 2447 2449# 2449
2451# 2451 2453# 2453 2456# 2456 2458# 2458 2460# 2460 2462# 2462 2464# 2464
2466# 2466 2468# 2468 2470# 2470 2472# 2472 2474# 2474 2476# 2476 2478# 2478
2480# 2480 2482# 2482 2484# 2484 2486# 2486 2489# 2489 2491# 2491 2493# 2493
2495# 2495 2497# 2497 2499# 2499 2501# 2501 2503# 2503 2505# 2505 2507# 2507
2509# 2509 2511# 2511 2513# 2513 2515# 2515 2517# 2517 2519# 2519 2521# 2521
%ADDR 102# 102 104 104# 110 110# 112 112# 114 114# 116 116# 118 118#
120 120# 122 122# 124 124# 126 126# 128 128# 130 130# 132 132#
134 134# 136 136# 138 138# 140 140# 142 142# 144 144# 149# 149
151 151# 153 153# 158 158# 160 160# 162 162# 167 167# 169 169#
171 171# 176 176# 178 178# 180 180# 185 185# 187 187# 189 189#
194 194# 196 196# 198 198# 203 203# 205 205# 207 207# 212 212#
214 214# 216 216# 221 221# 223 223# 225 225# 230 230# 232 232#
234 234# 239 239# 241 241# 243 243# 248 248# 250 250# 252 252#
257 257# 259 259# 261 261# 266 266# 268 268# 270 270# 275 275#
277 277# 279 279# 284 284# 286 286# 288 288# 293# 293 295# 295
300# 300 302 302# 305 305# 307 307# 309 309# 311 311# 313 313#
315 315# 317 317# 319 319# 321 321# 323 323# 325 325# 327 327#
329 329# 331 331# 333 333# 335 335# 338 338# 340 340# 342 342#
344 344# 346 346# 348 348# 350 350# 352 352# 354 354# 356 356#
358 358# 360 360# 362 362# 364 364# 366 366# 368 368# 371 371#
373 373# 375 375# 377 377# 379 379# 381 381# 383 383# 385 385#
387 387# 389 389# 391 391# 393 393# 395 395# 397 397# 399 399#
401 401# 404 404# 406 406# 408 408# 410 410# 412 412# 414 414#
416 416# 418 418# 420 420# 422 422# 424 424# 426 426# 428 428#
430 430# 432 432# 434 434# 439 439# 441 441# 444 444# 446 446#
448 448# 450 450# 452 452# 454 454# 456 456# 458 458# 460 460# SEQ 1244
462 462# 464 464# 466 466# 468 468# 470 470# 472 472# 474 474#
477 477# 479 479# 481 481# 483 483# 485 485# 487 487# 489 489#
491 491# 493 493# 495 495# 497 497# 499 499# 501 501# 503 503#
505 505# 507 507# 510 510# 512 512# 514 514# 516 516# 518 518#
520 520# 522 522# 524 524# 526 526# 528 528# 530 530# 532 532#
534 534# 536 536# 538 538# 540 540# 543 543# 545 545# 547 547#
549 549# 551 551# 553 553# 555 555# 557 557# 559 559# 561 561#
563 563# 565 565# 567 567# 569 569# 571 571# 573 573# 578 578#
580 580# 583 583# 585 585# 587 587# 589 589# 591 591# 593 593#
595 595# 597 597# 599 599# 601 601# 603 603# 605 605# 607 607#
609 609# 611 611# 613 613# 616 616# 618 618# 620 620# 622 622#
624 624# 626 626# 628 628# 630 630# 632 632# 634 634# 636 636#
638 638# 640 640# 642 642# 644 644# 646 646# 649 649# 651 651#
653 653# 655 655# 657 657# 659 659# 661 661# 663 663# 665 665#
667 667# 669 669# 671 671# 673 673# 675 675# 677 677# 679 679#
682 682# 684 684# 686 686# 688 688# 690 690# 692 692# 694 694#
696 696# 698 698# 700 700# 702 702# 704 704# 706 706# 708 708#
710 710# 712 712# 717 717# 719 719# 722 722# 724 724# 726 726#
728 728# 730 730# 732 732# 734 734# 736 736# 738 738# 740 740#
742 742# 744 744# 746 746# 748 748# 750 750# 752 752# 755 755#
757 757# 759 759# 761 761# 763 763# 765 765# 767 767# 769 769#
771 771# 773 773# 775 775# 777 777# 779 779# 781 781# 783 783#
785 785# 788 788# 790 790# 792 792# 794 794# 796 796# 798 798#
800 800# 802 802# 804 804# 806 806# 808 808# 810 810# 812 812#
814 814# 816 816# 818 818# 821 821# 823 823# 825 825# 827 827#
829 829# 831 831# 833 833# 835 835# 837 837# 839 839# 841 841#
843 843# 845 845# 847 847# 849 849# 851 851# 856 856# 858 858#
861 861# 863 863# 865 865# 867 867# 869 869# 871 871# 873 873#
875 875# 877 877# 879 879# 881 881# 883 883# 885 885# 887 887#
889 889# 891 891# 894 894# 896 896# 898 898# 900 900# 902 902#
904 904# 906 906# 908 908# 910 910# 912 912# 914 914# 916 916#
918 918# 920 920# 922 922# 924 924# 927 927# 929 929# 931 931#
933 933# 935 935# 937 937# 939 939# 941 941# 943 943# 945 945#
947 947# 949 949# 951 951# 953 953# 955 955# 957 957# 960 960#
962 962# 964 964# 966 966# 968 968# 970 970# 972 972# 974 974#
976 976# 978 978# 980 980# 982 982# 984 984# 986 986# 988 988#
990 990# 995 995# 997 997# 1000 1000# 1002 1002# 1004 1004# 1006 1006#
1008 1008# 1010 1010# 1012 1012# 1014 1014# 1016 1016# 1018 1018# 1020 1020#
1022 1022# 1024 1024# 1026 1026# 1028 1028# 1030 1030# 1033 1033# 1035 1035#
1037 1037# 1039 1039# 1041 1041# 1043 1043# 1045 1045# 1047 1047# 1049 1049#
1051 1051# 1053 1053# 1055 1055# 1057 1057# 1059 1059# 1061 1061# 1063 1063#
1066 1066# 1068 1068# 1070 1070# 1072 1072# 1074 1074# 1076 1076# 1078 1078#
1080 1080# 1082 1082# 1084 1084# 1086 1086# 1088 1088# 1090 1090# 1092 1092#
1094 1094# 1096 1096# 1099 1099# 1101 1101# 1103 1103# 1105 1105# 1107 1107#
1109 1109# 1111 1111# 1113 1113# 1115 1115# 1117 1117# 1119 1119# 1121 1121#
1123 1123# 1125 1125# 1127 1127# 1129 1129# 1134 1134# 1136 1136# 1139 1139#
1141 1141# 1143 1143# 1145 1145# 1147 1147# 1149 1149# 1151 1151# 1153 1153#
1155 1155# 1157 1157# 1159 1159# 1161 1161# 1163 1163# 1165 1165# 1167 1167#
1169 1169# 1172 1172# 1174 1174# 1176 1176# 1178 1178# 1180 1180# 1182 1182#
1184 1184# 1186 1186# 1188 1188# 1190 1190# 1192 1192# 1194 1194# 1196 1196#
1198 1198# 1200 1200# 1202 1202# 1205 1205# 1207 1207# 1209 1209# 1211 1211#
1213 1213# 1215 1215# 1217 1217# 1219 1219# 1221 1221# 1223 1223# 1225 1225#
1227 1227# 1229 1229# 1231 1231# 1233 1233# 1235 1235# 1238 1238# 1240 1240# SEQ 1245
1242 1242# 1244 1244# 1246 1246# 1248 1248# 1250 1250# 1252 1252# 1254 1254#
1256 1256# 1258 1258# 1260 1260# 1262 1262# 1264 1264# 1266 1266# 1268 1268#
1273 1273# 1275 1275# 1278 1278# 1280 1280# 1282 1282# 1284 1284# 1286 1286#
1288 1288# 1290 1290# 1292 1292# 1294 1294# 1296 1296# 1298 1298# 1300 1300#
1302 1302# 1304 1304# 1306 1306# 1308 1308# 1311 1311# 1313 1313# 1315 1315#
1317 1317# 1319 1319# 1321 1321# 1323 1323# 1325 1325# 1327 1327# 1329 1329#
1331 1331# 1333 1333# 1335 1335# 1337 1337# 1339 1339# 1341 1341# 1344 1344#
1346 1346# 1348 1348# 1350 1350# 1352 1352# 1354 1354# 1356 1356# 1358 1358#
1360 1360# 1362 1362# 1364 1364# 1366 1366# 1368 1368# 1370 1370# 1372 1372#
1374 1374# 1377 1377# 1379 1379# 1381 1381# 1383 1383# 1385 1385# 1387 1387#
1389 1389# 1391 1391# 1393 1393# 1395 1395# 1397 1397# 1399 1399# 1401 1401#
1403 1403# 1405 1405# 1407 1407# 1412 1412# 1414 1414# 1417 1417# 1419 1419#
1421 1421# 1423 1423# 1425 1425# 1427 1427# 1429 1429# 1431 1431# 1433 1433#
1435 1435# 1437 1437# 1439 1439# 1441 1441# 1443 1443# 1445 1445# 1447 1447#
1450 1450# 1452 1452# 1454 1454# 1456 1456# 1458 1458# 1460 1460# 1462 1462#
1464 1464# 1466 1466# 1468 1468# 1470 1470# 1472 1472# 1474 1474# 1476 1476#
1478 1478# 1480 1480# 1483 1483# 1485 1485# 1487 1487# 1489 1489# 1491 1491#
1493 1493# 1495 1495# 1497 1497# 1499 1499# 1501 1501# 1503 1503# 1505 1505#
1507 1507# 1509 1509# 1511 1511# 1513 1513# 1516 1516# 1518 1518# 1520 1520#
1522 1522# 1524 1524# 1526 1526# 1528 1528# 1530 1530# 1532 1532# 1534 1534#
1536 1536# 1538 1538# 1540 1540# 1542 1542# 1544 1544# 1546 1546# 1551 1551#
1553 1553# 1556 1556# 1558 1558# 1560 1560# 1562 1562# 1564 1564# 1566 1566#
1568 1568# 1570 1570# 1572 1572# 1574 1574# 1576 1576# 1578 1578# 1580 1580#
1582 1582# 1584 1584# 1586 1586# 1589 1589# 1591 1591# 1593 1593# 1595 1595#
1597 1597# 1599 1599# 1601 1601# 1603 1603# 1605 1605# 1607 1607# 1609 1609#
1611 1611# 1613 1613# 1615 1615# 1617 1617# 1619 1619# 1622 1622# 1624 1624#
1626 1626# 1628 1628# 1630 1630# 1632 1632# 1634 1634# 1636 1636# 1638 1638#
1640 1640# 1642 1642# 1644 1644# 1646 1646# 1648 1648# 1650 1650# 1652 1652#
1655 1655# 1657 1657# 1659 1659# 1661 1661# 1663 1663# 1665 1665# 1667 1667#
1669 1669# 1671 1671# 1673 1673# 1675 1675# 1677 1677# 1679 1679# 1681 1681#
1683 1683# 1685 1685# 1690 1690# 1692 1692# 1695 1695# 1697 1697# 1699 1699#
1701 1701# 1703 1703# 1705 1705# 1707 1707# 1709 1709# 1711 1711# 1713 1713#
1715 1715# 1717 1717# 1719 1719# 1721 1721# 1723 1723# 1725 1725# 1728 1728#
1730 1730# 1732 1732# 1734 1734# 1736 1736# 1738 1738# 1740 1740# 1742 1742#
1744 1744# 1746 1746# 1748 1748# 1750 1750# 1752 1752# 1754 1754# 1756 1756#
1758 1758# 1761 1761# 1763 1763# 1765 1765# 1767 1767# 1769 1769# 1771 1771#
1773 1773# 1775 1775# 1777 1777# 1779 1779# 1781 1781# 1783 1783# 1785 1785#
1787 1787# 1789 1789# 1791 1791# 1794 1794# 1796 1796# 1798 1798# 1800 1800#
1802 1802# 1804 1804# 1806 1806# 1808 1808# 1810 1810# 1812 1812# 1814 1814#
1816 1816# 1818 1818# 1820 1820# 1822 1822# 1824 1824# 1829 1829# 1831 1831#
1834 1834# 1836 1836# 1838 1838# 1840 1840# 1842 1842# 1844 1844# 1846 1846#
1848 1848# 1850 1850# 1852 1852# 1854 1854# 1856 1856# 1858 1858# 1860 1860#
1862 1862# 1864 1864# 1867 1867# 1869 1869# 1871 1871# 1873 1873# 1875 1875#
1877 1877# 1879 1879# 1881 1881# 1883 1883# 1885 1885# 1887 1887# 1889 1889#
1891 1891# 1893 1893# 1895 1895# 1897 1897# 1900 1900# 1902 1902# 1904 1904#
1906 1906# 1908 1908# 1910 1910# 1912 1912# 1914 1914# 1916 1916# 1918 1918#
1920 1920# 1922 1922# 1924 1924# 1926 1926# 1928 1928# 1930 1930# 1933 1933#
1935 1935# 1937 1937# 1939 1939# 1941 1941# 1943 1943# 1945 1945# 1947 1947#
1949 1949# 1951 1951# 1953 1953# 1955 1955# 1957 1957# 1959 1959# 1961 1961#
1963 1963# 1968 1968# 1970 1970# 1973 1973# 1975 1975# 1977 1977# 1979 1979#
1981 1981# 1983 1983# 1985 1985# 1987 1987# 1989 1989# 1991 1991# 1993 1993#
1995 1995# 1997 1997# 1999 1999# 2001 2001# 2003 2003# 2006 2006# 2008 2008#
2010 2010# 2012 2012# 2014 2014# 2016 2016# 2018 2018# 2020 2020# 2022 2022# SEQ 1246
2024 2024# 2026 2026# 2028 2028# 2030 2030# 2032 2032# 2034 2034# 2036 2036#
2039 2039# 2041 2041# 2043 2043# 2045 2045# 2047 2047# 2049 2049# 2051 2051#
2053 2053# 2055 2055# 2057 2057# 2059 2059# 2061 2061# 2063 2063# 2065 2065#
2067 2067# 2069 2069# 2072 2072# 2074 2074# 2076 2076# 2078 2078# 2080 2080#
2082 2082# 2084 2084# 2086 2086# 2088 2088# 2090 2090# 2092 2092# 2094 2094#
2096 2096# 2098 2098# 2100 2100# 2102 2102# 2107 2107# 2109 2109# 2112 2112#
2114 2114# 2116 2116# 2118 2118# 2120 2120# 2122 2122# 2124 2124# 2126 2126#
2128 2128# 2130 2130# 2132 2132# 2134 2134# 2136 2136# 2138 2138# 2140 2140#
2142 2142# 2145 2145# 2147 2147# 2149 2149# 2151 2151# 2153 2153# 2155 2155#
2157 2157# 2159 2159# 2161 2161# 2163 2163# 2165 2165# 2167 2167# 2169 2169#
2171 2171# 2173 2173# 2175 2175# 2178 2178# 2180 2180# 2182 2182# 2184 2184#
2186 2186# 2188 2188# 2190 2190# 2192 2192# 2194 2194# 2196 2196# 2198 2198#
2200 2200# 2202 2202# 2204 2204# 2206 2206# 2208 2208# 2211 2211# 2213 2213#
2215 2215# 2217 2217# 2219 2219# 2221 2221# 2223 2223# 2225 2225# 2227 2227#
2229 2229# 2231 2231# 2233 2233# 2235 2235# 2237 2237# 2239 2239# 2241 2241#
2246 2246# 2248 2248# 2251 2251# 2253 2253# 2255 2255# 2257 2257# 2259 2259#
2261 2261# 2263 2263# 2265 2265# 2267 2267# 2269 2269# 2271 2271# 2273 2273#
2275 2275# 2277 2277# 2279 2279# 2281 2281# 2284 2284# 2286 2286# 2288 2288#
2290 2290# 2292 2292# 2294 2294# 2296 2296# 2298 2298# 2300 2300# 2302 2302#
2304 2304# 2306 2306# 2308 2308# 2310 2310# 2312 2312# 2314 2314# 2317 2317#
2319 2319# 2321 2321# 2323 2323# 2325 2325# 2327 2327# 2329 2329# 2331 2331#
2333 2333# 2335 2335# 2337 2337# 2339 2339# 2341 2341# 2343 2343# 2345 2345#
2347 2347# 2350 2350# 2352 2352# 2354 2354# 2356 2356# 2358 2358# 2360 2360#
2362 2362# 2364 2364# 2366 2366# 2368 2368# 2370 2370# 2372 2372# 2374 2374#
2376 2376# 2378 2378# 2380 2380# 2385 2385# 2387 2387# 2390 2390# 2392 2392#
2394 2394# 2396 2396# 2398 2398# 2400 2400# 2402 2402# 2404 2404# 2406 2406#
2408 2408# 2410 2410# 2412 2412# 2414 2414# 2416 2416# 2418 2418# 2420 2420#
2423 2423# 2425 2425# 2427 2427# 2429 2429# 2431 2431# 2433 2433# 2435 2435#
2437 2437# 2439 2439# 2441 2441# 2443 2443# 2445 2445# 2447 2447# 2449 2449#
2451 2451# 2453 2453# 2456 2456# 2458 2458# 2460 2460# 2462 2462# 2464 2464#
2466 2466# 2468 2468# 2470 2470# 2472 2472# 2474 2474# 2476 2476# 2478 2478#
2480 2480# 2482 2482# 2484 2484# 2486 2486# 2489 2489# 2491 2491# 2493 2493#
2495 2495# 2497 2497# 2499 2499# 2501 2501# 2503 2503# 2505 2505# 2507 2507#
2509 2509# 2511 2511# 2513 2513# 2515 2515# 2517 2517# 2519 2519# 2521 2521#
%ML 102# 102 104# 104 110# 110 112# 112 114# 114 116# 116 118# 118
120# 120 122# 122 124# 124 126# 126 128# 128 130# 130 132# 132
134# 134 136# 136 138# 138 140# 140 142# 142 144# 144 149# 149
151# 151 153# 153 158# 158 160# 160 162# 162 167# 167 169# 169
171# 171 176# 176 178# 178 180# 180 185# 185 187# 187 189# 189
194# 194 196# 196 198# 198 203# 203 205# 205 207# 207 212# 212
214# 214 216# 216 221# 221 223# 223 225# 225 230# 230 232# 232
234# 234 239# 239 241# 241 243# 243 248# 248 250# 250 252# 252
257# 257 259# 259 261# 261 266# 266 268# 268 270# 270 275# 275
277# 277 279# 279 284# 284 286# 286 288# 288 293# 293 295# 295
300# 300 302# 302 305# 305 307# 307 309# 309 311# 311 313# 313
315# 315 317# 317 319# 319 321# 321 323# 323 325# 325 327# 327
329# 329 331# 331 333# 333 335# 335 338# 338 340# 340 342# 342
344# 344 346# 346 348# 348 350# 350 352# 352 354# 354 356# 356
358# 358 360# 360 362# 362 364# 364 366# 366 368# 368 371# 371
373# 373 375# 375 377# 377 379# 379 381# 381 383# 383 385# 385
387# 387 389# 389 391# 391 393# 393 395# 395 397# 397 399# 399
401# 401 404# 404 406# 406 408# 408 410# 410 412# 412 414# 414
416# 416 418# 418 420# 420 422# 422 424# 424 426# 426 428# 428 SEQ 1247
430# 430 432# 432 434# 434 439# 439 441# 441 444# 444 446# 446
448# 448 450# 450 452# 452 454# 454 456# 456 458# 458 460# 460
462# 462 464# 464 466# 466 468# 468 470# 470 472# 472 474# 474
477# 477 479# 479 481# 481 483# 483 485# 485 487# 487 489# 489
491# 491 493# 493 495# 495 497# 497 499# 499 501# 501 503# 503
505# 505 507# 507 510# 510 512# 512 514# 514 516# 516 518# 518
520# 520 522# 522 524# 524 526# 526 528# 528 530# 530 532# 532
534# 534 536# 536 538# 538 540# 540 543# 543 545# 545 547# 547
549# 549 551# 551 553# 553 555# 555 557# 557 559# 559 561# 561
563# 563 565# 565 567# 567 569# 569 571# 571 573# 573 578# 578
580# 580 583# 583 585# 585 587# 587 589# 589 591# 591 593# 593
595# 595 597# 597 599# 599 601# 601 603# 603 605# 605 607# 607
609# 609 611# 611 613# 613 616# 616 618# 618 620# 620 622# 622
624# 624 626# 626 628# 628 630# 630 632# 632 634# 634 636# 636
638# 638 640# 640 642# 642 644# 644 646# 646 649# 649 651# 651
653# 653 655# 655 657# 657 659# 659 661# 661 663# 663 665# 665
667# 667 669# 669 671# 671 673# 673 675# 675 677# 677 679# 679
682# 682 684# 684 686# 686 688# 688 690# 690 692# 692 694# 694
696# 696 698# 698 700# 700 702# 702 704# 704 706# 706 708# 708
710# 710 712# 712 717# 717 719# 719 722# 722 724# 724 726# 726
728# 728 730# 730 732# 732 734# 734 736# 736 738# 738 740# 740
742# 742 744# 744 746# 746 748# 748 750# 750 752# 752 755# 755
757# 757 759# 759 761# 761 763# 763 765# 765 767# 767 769# 769
771# 771 773# 773 775# 775 777# 777 779# 779 781# 781 783# 783
785# 785 788# 788 790# 790 792# 792 794# 794 796# 796 798# 798
800# 800 802# 802 804# 804 806# 806 808# 808 810# 810 812# 812
814# 814 816# 816 818# 818 821# 821 823# 823 825# 825 827# 827
829# 829 831# 831 833# 833 835# 835 837# 837 839# 839 841# 841
843# 843 845# 845 847# 847 849# 849 851# 851 856# 856 858# 858
861# 861 863# 863 865# 865 867# 867 869# 869 871# 871 873# 873
875# 875 877# 877 879# 879 881# 881 883# 883 885# 885 887# 887
889# 889 891# 891 894# 894 896# 896 898# 898 900# 900 902# 902
904# 904 906# 906 908# 908 910# 910 912# 912 914# 914 916# 916
918# 918 920# 920 922# 922 924# 924 927# 927 929# 929 931# 931
933# 933 935# 935 937# 937 939# 939 941# 941 943# 943 945# 945
947# 947 949# 949 951# 951 953# 953 955# 955 957# 957 960# 960
962# 962 964# 964 966# 966 968# 968 970# 970 972# 972 974# 974
976# 976 978# 978 980# 980 982# 982 984# 984 986# 986 988# 988
990# 990 995# 995 997# 997 1000# 1000 1002# 1002 1004# 1004 1006# 1006
1008# 1008 1010# 1010 1012# 1012 1014# 1014 1016# 1016 1018# 1018 1020# 1020
1022# 1022 1024# 1024 1026# 1026 1028# 1028 1030# 1030 1033# 1033 1035# 1035
1037# 1037 1039# 1039 1041# 1041 1043# 1043 1045# 1045 1047# 1047 1049# 1049
1051# 1051 1053# 1053 1055# 1055 1057# 1057 1059# 1059 1061# 1061 1063# 1063
1066# 1066 1068# 1068 1070# 1070 1072# 1072 1074# 1074 1076# 1076 1078# 1078
1080# 1080 1082# 1082 1084# 1084 1086# 1086 1088# 1088 1090# 1090 1092# 1092
1094# 1094 1096# 1096 1099# 1099 1101# 1101 1103# 1103 1105# 1105 1107# 1107
1109# 1109 1111# 1111 1113# 1113 1115# 1115 1117# 1117 1119# 1119 1121# 1121
1123# 1123 1125# 1125 1127# 1127 1129# 1129 1134# 1134 1136# 1136 1139# 1139
1141# 1141 1143# 1143 1145# 1145 1147# 1147 1149# 1149 1151# 1151 1153# 1153
1155# 1155 1157# 1157 1159# 1159 1161# 1161 1163# 1163 1165# 1165 1167# 1167
1169# 1169 1172# 1172 1174# 1174 1176# 1176 1178# 1178 1180# 1180 1182# 1182
1184# 1184 1186# 1186 1188# 1188 1190# 1190 1192# 1192 1194# 1194 1196# 1196
1198# 1198 1200# 1200 1202# 1202 1205# 1205 1207# 1207 1209# 1209 1211# 1211 SEQ 1248
1213# 1213 1215# 1215 1217# 1217 1219# 1219 1221# 1221 1223# 1223 1225# 1225
1227# 1227 1229# 1229 1231# 1231 1233# 1233 1235# 1235 1238# 1238 1240# 1240
1242# 1242 1244# 1244 1246# 1246 1248# 1248 1250# 1250 1252# 1252 1254# 1254
1256# 1256 1258# 1258 1260# 1260 1262# 1262 1264# 1264 1266# 1266 1268# 1268
1273# 1273 1275# 1275 1278# 1278 1280# 1280 1282# 1282 1284# 1284 1286# 1286
1288# 1288 1290# 1290 1292# 1292 1294# 1294 1296# 1296 1298# 1298 1300# 1300
1302# 1302 1304# 1304 1306# 1306 1308# 1308 1311# 1311 1313# 1313 1315# 1315
1317# 1317 1319# 1319 1321# 1321 1323# 1323 1325# 1325 1327# 1327 1329# 1329
1331# 1331 1333# 1333 1335# 1335 1337# 1337 1339# 1339 1341# 1341 1344# 1344
1346# 1346 1348# 1348 1350# 1350 1352# 1352 1354# 1354 1356# 1356 1358# 1358
1360# 1360 1362# 1362 1364# 1364 1366# 1366 1368# 1368 1370# 1370 1372# 1372
1374# 1374 1377# 1377 1379# 1379 1381# 1381 1383# 1383 1385# 1385 1387# 1387
1389# 1389 1391# 1391 1393# 1393 1395# 1395 1397# 1397 1399# 1399 1401# 1401
1403# 1403 1405# 1405 1407# 1407 1412# 1412 1414# 1414 1417# 1417 1419# 1419
1421# 1421 1423# 1423 1425# 1425 1427# 1427 1429# 1429 1431# 1431 1433# 1433
1435# 1435 1437# 1437 1439# 1439 1441# 1441 1443# 1443 1445# 1445 1447# 1447
1450# 1450 1452# 1452 1454# 1454 1456# 1456 1458# 1458 1460# 1460 1462# 1462
1464# 1464 1466# 1466 1468# 1468 1470# 1470 1472# 1472 1474# 1474 1476# 1476
1478# 1478 1480# 1480 1483# 1483 1485# 1485 1487# 1487 1489# 1489 1491# 1491
1493# 1493 1495# 1495 1497# 1497 1499# 1499 1501# 1501 1503# 1503 1505# 1505
1507# 1507 1509# 1509 1511# 1511 1513# 1513 1516# 1516 1518# 1518 1520# 1520
1522# 1522 1524# 1524 1526# 1526 1528# 1528 1530# 1530 1532# 1532 1534# 1534
1536# 1536 1538# 1538 1540# 1540 1542# 1542 1544# 1544 1546# 1546 1551# 1551
1553# 1553 1556# 1556 1558# 1558 1560# 1560 1562# 1562 1564# 1564 1566# 1566
1568# 1568 1570# 1570 1572# 1572 1574# 1574 1576# 1576 1578# 1578 1580# 1580
1582# 1582 1584# 1584 1586# 1586 1589# 1589 1591# 1591 1593# 1593 1595# 1595
1597# 1597 1599# 1599 1601# 1601 1603# 1603 1605# 1605 1607# 1607 1609# 1609
1611# 1611 1613# 1613 1615# 1615 1617# 1617 1619# 1619 1622# 1622 1624# 1624
1626# 1626 1628# 1628 1630# 1630 1632# 1632 1634# 1634 1636# 1636 1638# 1638
1640# 1640 1642# 1642 1644# 1644 1646# 1646 1648# 1648 1650# 1650 1652# 1652
1655# 1655 1657# 1657 1659# 1659 1661# 1661 1663# 1663 1665# 1665 1667# 1667
1669# 1669 1671# 1671 1673# 1673 1675# 1675 1677# 1677 1679# 1679 1681# 1681
1683# 1683 1685# 1685 1690# 1690 1692# 1692 1695# 1695 1697# 1697 1699# 1699
1701# 1701 1703# 1703 1705# 1705 1707# 1707 1709# 1709 1711# 1711 1713# 1713
1715# 1715 1717# 1717 1719# 1719 1721# 1721 1723# 1723 1725# 1725 1728# 1728
1730# 1730 1732# 1732 1734# 1734 1736# 1736 1738# 1738 1740# 1740 1742# 1742
1744# 1744 1746# 1746 1748# 1748 1750# 1750 1752# 1752 1754# 1754 1756# 1756
1758# 1758 1761# 1761 1763# 1763 1765# 1765 1767# 1767 1769# 1769 1771# 1771
1773# 1773 1775# 1775 1777# 1777 1779# 1779 1781# 1781 1783# 1783 1785# 1785
1787# 1787 1789# 1789 1791# 1791 1794# 1794 1796# 1796 1798# 1798 1800# 1800
1802# 1802 1804# 1804 1806# 1806 1808# 1808 1810# 1810 1812# 1812 1814# 1814
1816# 1816 1818# 1818 1820# 1820 1822# 1822 1824# 1824 1829# 1829 1831# 1831
1834# 1834 1836# 1836 1838# 1838 1840# 1840 1842# 1842 1844# 1844 1846# 1846
1848# 1848 1850# 1850 1852# 1852 1854# 1854 1856# 1856 1858# 1858 1860# 1860
1862# 1862 1864# 1864 1867# 1867 1869# 1869 1871# 1871 1873# 1873 1875# 1875
1877# 1877 1879# 1879 1881# 1881 1883# 1883 1885# 1885 1887# 1887 1889# 1889
1891# 1891 1893# 1893 1895# 1895 1897# 1897 1900# 1900 1902# 1902 1904# 1904
1906# 1906 1908# 1908 1910# 1910 1912# 1912 1914# 1914 1916# 1916 1918# 1918
1920# 1920 1922# 1922 1924# 1924 1926# 1926 1928# 1928 1930# 1930 1933# 1933
1935# 1935 1937# 1937 1939# 1939 1941# 1941 1943# 1943 1945# 1945 1947# 1947
1949# 1949 1951# 1951 1953# 1953 1955# 1955 1957# 1957 1959# 1959 1961# 1961
1963# 1963 1968# 1968 1970# 1970 1973# 1973 1975# 1975 1977# 1977 1979# 1979
1981# 1981 1983# 1983 1985# 1985 1987# 1987 1989# 1989 1991# 1991 1993# 1993 SEQ 1249
1995# 1995 1997# 1997 1999# 1999 2001# 2001 2003# 2003 2006# 2006 2008# 2008
2010# 2010 2012# 2012 2014# 2014 2016# 2016 2018# 2018 2020# 2020 2022# 2022
2024# 2024 2026# 2026 2028# 2028 2030# 2030 2032# 2032 2034# 2034 2036# 2036
2039# 2039 2041# 2041 2043# 2043 2045# 2045 2047# 2047 2049# 2049 2051# 2051
2053# 2053 2055# 2055 2057# 2057 2059# 2059 2061# 2061 2063# 2063 2065# 2065
2067# 2067 2069# 2069 2072# 2072 2074# 2074 2076# 2076 2078# 2078 2080# 2080
2082# 2082 2084# 2084 2086# 2086 2088# 2088 2090# 2090 2092# 2092 2094# 2094
2096# 2096 2098# 2098 2100# 2100 2102# 2102 2107# 2107 2109# 2109 2112# 2112
2114# 2114 2116# 2116 2118# 2118 2120# 2120 2122# 2122 2124# 2124 2126# 2126
2128# 2128 2130# 2130 2132# 2132 2134# 2134 2136# 2136 2138# 2138 2140# 2140
2142# 2142 2145# 2145 2147# 2147 2149# 2149 2151# 2151 2153# 2153 2155# 2155
2157# 2157 2159# 2159 2161# 2161 2163# 2163 2165# 2165 2167# 2167 2169# 2169
2171# 2171 2173# 2173 2175# 2175 2178# 2178 2180# 2180 2182# 2182 2184# 2184
2186# 2186 2188# 2188 2190# 2190 2192# 2192 2194# 2194 2196# 2196 2198# 2198
2200# 2200 2202# 2202 2204# 2204 2206# 2206 2208# 2208 2211# 2211 2213# 2213
2215# 2215 2217# 2217 2219# 2219 2221# 2221 2223# 2223 2225# 2225 2227# 2227
2229# 2229 2231# 2231 2233# 2233 2235# 2235 2237# 2237 2239# 2239 2241# 2241
2246# 2246 2248# 2248 2251# 2251 2253# 2253 2255# 2255 2257# 2257 2259# 2259
2261# 2261 2263# 2263 2265# 2265 2267# 2267 2269# 2269 2271# 2271 2273# 2273
2275# 2275 2277# 2277 2279# 2279 2281# 2281 2284# 2284 2286# 2286 2288# 2288
2290# 2290 2292# 2292 2294# 2294 2296# 2296 2298# 2298 2300# 2300 2302# 2302
2304# 2304 2306# 2306 2308# 2308 2310# 2310 2312# 2312 2314# 2314 2317# 2317
2319# 2319 2321# 2321 2323# 2323 2325# 2325 2327# 2327 2329# 2329 2331# 2331
2333# 2333 2335# 2335 2337# 2337 2339# 2339 2341# 2341 2343# 2343 2345# 2345
2347# 2347 2350# 2350 2352# 2352 2354# 2354 2356# 2356 2358# 2358 2360# 2360
2362# 2362 2364# 2364 2366# 2366 2368# 2368 2370# 2370 2372# 2372 2374# 2374
2376# 2376 2378# 2378 2380# 2380 2385# 2385 2387# 2387 2390# 2390 2392# 2392
2394# 2394 2396# 2396 2398# 2398 2400# 2400 2402# 2402 2404# 2404 2406# 2406
2408# 2408 2410# 2410 2412# 2412 2414# 2414 2416# 2416 2418# 2418 2420# 2420
2423# 2423 2425# 2425 2427# 2427 2429# 2429 2431# 2431 2433# 2433 2435# 2435
2437# 2437 2439# 2439 2441# 2441 2443# 2443 2445# 2445 2447# 2447 2449# 2449
2451# 2451 2453# 2453 2456# 2456 2458# 2458 2460# 2460 2462# 2462 2464# 2464
2466# 2466 2468# 2468 2470# 2470 2472# 2472 2474# 2474 2476# 2476 2478# 2478
2480# 2480 2482# 2482 2484# 2484 2486# 2486 2489# 2489 2491# 2491 2493# 2493
2495# 2495 2497# 2497 2499# 2499 2501# 2501 2503# 2503 2505# 2505 2507# 2507
2509# 2509 2511# 2511 2513# 2513 2515# 2515 2517# 2517 2519# 2519 2521# 2521
%MR 102# 102 104# 104 110# 110 112# 112 114# 114 116# 116 118# 118
120# 120 122# 122 124# 124 126# 126 128# 128 130# 130 132# 132
134# 134 136# 136 138# 138 140# 140 142# 142 144# 144 149# 149
151# 151 153# 153 158# 158 160# 160 162# 162 167# 167 169# 169
171# 171 176# 176 178# 178 180# 180 185# 185 187# 187 189# 189
194# 194 196# 196 198# 198 203# 203 205# 205 207# 207 212# 212
214# 214 216# 216 221# 221 223# 223 225# 225 230# 230 232# 232
234# 234 239# 239 241# 241 243# 243 248# 248 250# 250 252# 252
257# 257 259# 259 261# 261 266# 266 268# 268 270# 270 275# 275
277# 277 279# 279 284# 284 286# 286 288# 288 293# 293 295# 295
300# 300 302# 302 305# 305 307# 307 309# 309 311# 311 313# 313
315# 315 317# 317 319# 319 321# 321 323# 323 325# 325 327# 327
329# 329 331# 331 333# 333 335# 335 338# 338 340# 340 342# 342
344# 344 346# 346 348# 348 350# 350 352# 352 354# 354 356# 356
358# 358 360# 360 362# 362 364# 364 366# 366 368# 368 371# 371
373# 373 375# 375 377# 377 379# 379 381# 381 383# 383 385# 385
387# 387 389# 389 391# 391 393# 393 395# 395 397# 397 399# 399 SEQ 1250
401# 401 404# 404 406# 406 408# 408 410# 410 412# 412 414# 414
416# 416 418# 418 420# 420 422# 422 424# 424 426# 426 428# 428
430# 430 432# 432 434# 434 439# 439 441# 441 444# 444 446# 446
448# 448 450# 450 452# 452 454# 454 456# 456 458# 458 460# 460
462# 462 464# 464 466# 466 468# 468 470# 470 472# 472 474# 474
477# 477 479# 479 481# 481 483# 483 485# 485 487# 487 489# 489
491# 491 493# 493 495# 495 497# 497 499# 499 501# 501 503# 503
505# 505 507# 507 510# 510 512# 512 514# 514 516# 516 518# 518
520# 520 522# 522 524# 524 526# 526 528# 528 530# 530 532# 532
534# 534 536# 536 538# 538 540# 540 543# 543 545# 545 547# 547
549# 549 551# 551 553# 553 555# 555 557# 557 559# 559 561# 561
563# 563 565# 565 567# 567 569# 569 571# 571 573# 573 578# 578
580# 580 583# 583 585# 585 587# 587 589# 589 591# 591 593# 593
595# 595 597# 597 599# 599 601# 601 603# 603 605# 605 607# 607
609# 609 611# 611 613# 613 616# 616 618# 618 620# 620 622# 622
624# 624 626# 626 628# 628 630# 630 632# 632 634# 634 636# 636
638# 638 640# 640 642# 642 644# 644 646# 646 649# 649 651# 651
653# 653 655# 655 657# 657 659# 659 661# 661 663# 663 665# 665
667# 667 669# 669 671# 671 673# 673 675# 675 677# 677 679# 679
682# 682 684# 684 686# 686 688# 688 690# 690 692# 692 694# 694
696# 696 698# 698 700# 700 702# 702 704# 704 706# 706 708# 708
710# 710 712# 712 717# 717 719# 719 722# 722 724# 724 726# 726
728# 728 730# 730 732# 732 734# 734 736# 736 738# 738 740# 740
742# 742 744# 744 746# 746 748# 748 750# 750 752# 752 755# 755
757# 757 759# 759 761# 761 763# 763 765# 765 767# 767 769# 769
771# 771 773# 773 775# 775 777# 777 779# 779 781# 781 783# 783
785# 785 788# 788 790# 790 792# 792 794# 794 796# 796 798# 798
800# 800 802# 802 804# 804 806# 806 808# 808 810# 810 812# 812
814# 814 816# 816 818# 818 821# 821 823# 823 825# 825 827# 827
829# 829 831# 831 833# 833 835# 835 837# 837 839# 839 841# 841
843# 843 845# 845 847# 847 849# 849 851# 851 856# 856 858# 858
861# 861 863# 863 865# 865 867# 867 869# 869 871# 871 873# 873
875# 875 877# 877 879# 879 881# 881 883# 883 885# 885 887# 887
889# 889 891# 891 894# 894 896# 896 898# 898 900# 900 902# 902
904# 904 906# 906 908# 908 910# 910 912# 912 914# 914 916# 916
918# 918 920# 920 922# 922 924# 924 927# 927 929# 929 931# 931
933# 933 935# 935 937# 937 939# 939 941# 941 943# 943 945# 945
947# 947 949# 949 951# 951 953# 953 955# 955 957# 957 960# 960
962# 962 964# 964 966# 966 968# 968 970# 970 972# 972 974# 974
976# 976 978# 978 980# 980 982# 982 984# 984 986# 986 988# 988
990# 990 995# 995 997# 997 1000# 1000 1002# 1002 1004# 1004 1006# 1006
1008# 1008 1010# 1010 1012# 1012 1014# 1014 1016# 1016 1018# 1018 1020# 1020
1022# 1022 1024# 1024 1026# 1026 1028# 1028 1030# 1030 1033# 1033 1035# 1035
1037# 1037 1039# 1039 1041# 1041 1043# 1043 1045# 1045 1047# 1047 1049# 1049
1051# 1051 1053# 1053 1055# 1055 1057# 1057 1059# 1059 1061# 1061 1063# 1063
1066# 1066 1068# 1068 1070# 1070 1072# 1072 1074# 1074 1076# 1076 1078# 1078
1080# 1080 1082# 1082 1084# 1084 1086# 1086 1088# 1088 1090# 1090 1092# 1092
1094# 1094 1096# 1096 1099# 1099 1101# 1101 1103# 1103 1105# 1105 1107# 1107
1109# 1109 1111# 1111 1113# 1113 1115# 1115 1117# 1117 1119# 1119 1121# 1121
1123# 1123 1125# 1125 1127# 1127 1129# 1129 1134# 1134 1136# 1136 1139# 1139
1141# 1141 1143# 1143 1145# 1145 1147# 1147 1149# 1149 1151# 1151 1153# 1153
1155# 1155 1157# 1157 1159# 1159 1161# 1161 1163# 1163 1165# 1165 1167# 1167
1169# 1169 1172# 1172 1174# 1174 1176# 1176 1178# 1178 1180# 1180 1182# 1182 SEQ 1251
1184# 1184 1186# 1186 1188# 1188 1190# 1190 1192# 1192 1194# 1194 1196# 1196
1198# 1198 1200# 1200 1202# 1202 1205# 1205 1207# 1207 1209# 1209 1211# 1211
1213# 1213 1215# 1215 1217# 1217 1219# 1219 1221# 1221 1223# 1223 1225# 1225
1227# 1227 1229# 1229 1231# 1231 1233# 1233 1235# 1235 1238# 1238 1240# 1240
1242# 1242 1244# 1244 1246# 1246 1248# 1248 1250# 1250 1252# 1252 1254# 1254
1256# 1256 1258# 1258 1260# 1260 1262# 1262 1264# 1264 1266# 1266 1268# 1268
1273# 1273 1275# 1275 1278# 1278 1280# 1280 1282# 1282 1284# 1284 1286# 1286
1288# 1288 1290# 1290 1292# 1292 1294# 1294 1296# 1296 1298# 1298 1300# 1300
1302# 1302 1304# 1304 1306# 1306 1308# 1308 1311# 1311 1313# 1313 1315# 1315
1317# 1317 1319# 1319 1321# 1321 1323# 1323 1325# 1325 1327# 1327 1329# 1329
1331# 1331 1333# 1333 1335# 1335 1337# 1337 1339# 1339 1341# 1341 1344# 1344
1346# 1346 1348# 1348 1350# 1350 1352# 1352 1354# 1354 1356# 1356 1358# 1358
1360# 1360 1362# 1362 1364# 1364 1366# 1366 1368# 1368 1370# 1370 1372# 1372
1374# 1374 1377# 1377 1379# 1379 1381# 1381 1383# 1383 1385# 1385 1387# 1387
1389# 1389 1391# 1391 1393# 1393 1395# 1395 1397# 1397 1399# 1399 1401# 1401
1403# 1403 1405# 1405 1407# 1407 1412# 1412 1414# 1414 1417# 1417 1419# 1419
1421# 1421 1423# 1423 1425# 1425 1427# 1427 1429# 1429 1431# 1431 1433# 1433
1435# 1435 1437# 1437 1439# 1439 1441# 1441 1443# 1443 1445# 1445 1447# 1447
1450# 1450 1452# 1452 1454# 1454 1456# 1456 1458# 1458 1460# 1460 1462# 1462
1464# 1464 1466# 1466 1468# 1468 1470# 1470 1472# 1472 1474# 1474 1476# 1476
1478# 1478 1480# 1480 1483# 1483 1485# 1485 1487# 1487 1489# 1489 1491# 1491
1493# 1493 1495# 1495 1497# 1497 1499# 1499 1501# 1501 1503# 1503 1505# 1505
1507# 1507 1509# 1509 1511# 1511 1513# 1513 1516# 1516 1518# 1518 1520# 1520
1522# 1522 1524# 1524 1526# 1526 1528# 1528 1530# 1530 1532# 1532 1534# 1534
1536# 1536 1538# 1538 1540# 1540 1542# 1542 1544# 1544 1546# 1546 1551# 1551
1553# 1553 1556# 1556 1558# 1558 1560# 1560 1562# 1562 1564# 1564 1566# 1566
1568# 1568 1570# 1570 1572# 1572 1574# 1574 1576# 1576 1578# 1578 1580# 1580
1582# 1582 1584# 1584 1586# 1586 1589# 1589 1591# 1591 1593# 1593 1595# 1595
1597# 1597 1599# 1599 1601# 1601 1603# 1603 1605# 1605 1607# 1607 1609# 1609
1611# 1611 1613# 1613 1615# 1615 1617# 1617 1619# 1619 1622# 1622 1624# 1624
1626# 1626 1628# 1628 1630# 1630 1632# 1632 1634# 1634 1636# 1636 1638# 1638
1640# 1640 1642# 1642 1644# 1644 1646# 1646 1648# 1648 1650# 1650 1652# 1652
1655# 1655 1657# 1657 1659# 1659 1661# 1661 1663# 1663 1665# 1665 1667# 1667
1669# 1669 1671# 1671 1673# 1673 1675# 1675 1677# 1677 1679# 1679 1681# 1681
1683# 1683 1685# 1685 1690# 1690 1692# 1692 1695# 1695 1697# 1697 1699# 1699
1701# 1701 1703# 1703 1705# 1705 1707# 1707 1709# 1709 1711# 1711 1713# 1713
1715# 1715 1717# 1717 1719# 1719 1721# 1721 1723# 1723 1725# 1725 1728# 1728
1730# 1730 1732# 1732 1734# 1734 1736# 1736 1738# 1738 1740# 1740 1742# 1742
1744# 1744 1746# 1746 1748# 1748 1750# 1750 1752# 1752 1754# 1754 1756# 1756
1758# 1758 1761# 1761 1763# 1763 1765# 1765 1767# 1767 1769# 1769 1771# 1771
1773# 1773 1775# 1775 1777# 1777 1779# 1779 1781# 1781 1783# 1783 1785# 1785
1787# 1787 1789# 1789 1791# 1791 1794# 1794 1796# 1796 1798# 1798 1800# 1800
1802# 1802 1804# 1804 1806# 1806 1808# 1808 1810# 1810 1812# 1812 1814# 1814
1816# 1816 1818# 1818 1820# 1820 1822# 1822 1824# 1824 1829# 1829 1831# 1831
1834# 1834 1836# 1836 1838# 1838 1840# 1840 1842# 1842 1844# 1844 1846# 1846
1848# 1848 1850# 1850 1852# 1852 1854# 1854 1856# 1856 1858# 1858 1860# 1860
1862# 1862 1864# 1864 1867# 1867 1869# 1869 1871# 1871 1873# 1873 1875# 1875
1877# 1877 1879# 1879 1881# 1881 1883# 1883 1885# 1885 1887# 1887 1889# 1889
1891# 1891 1893# 1893 1895# 1895 1897# 1897 1900# 1900 1902# 1902 1904# 1904
1906# 1906 1908# 1908 1910# 1910 1912# 1912 1914# 1914 1916# 1916 1918# 1918
1920# 1920 1922# 1922 1924# 1924 1926# 1926 1928# 1928 1930# 1930 1933# 1933
1935# 1935 1937# 1937 1939# 1939 1941# 1941 1943# 1943 1945# 1945 1947# 1947
1949# 1949 1951# 1951 1953# 1953 1955# 1955 1957# 1957 1959# 1959 1961# 1961 SEQ 1252
1963# 1963 1968# 1968 1970# 1970 1973# 1973 1975# 1975 1977# 1977 1979# 1979
1981# 1981 1983# 1983 1985# 1985 1987# 1987 1989# 1989 1991# 1991 1993# 1993
1995# 1995 1997# 1997 1999# 1999 2001# 2001 2003# 2003 2006# 2006 2008# 2008
2010# 2010 2012# 2012 2014# 2014 2016# 2016 2018# 2018 2020# 2020 2022# 2022
2024# 2024 2026# 2026 2028# 2028 2030# 2030 2032# 2032 2034# 2034 2036# 2036
2039# 2039 2041# 2041 2043# 2043 2045# 2045 2047# 2047 2049# 2049 2051# 2051
2053# 2053 2055# 2055 2057# 2057 2059# 2059 2061# 2061 2063# 2063 2065# 2065
2067# 2067 2069# 2069 2072# 2072 2074# 2074 2076# 2076 2078# 2078 2080# 2080
2082# 2082 2084# 2084 2086# 2086 2088# 2088 2090# 2090 2092# 2092 2094# 2094
2096# 2096 2098# 2098 2100# 2100 2102# 2102 2107# 2107 2109# 2109 2112# 2112
2114# 2114 2116# 2116 2118# 2118 2120# 2120 2122# 2122 2124# 2124 2126# 2126
2128# 2128 2130# 2130 2132# 2132 2134# 2134 2136# 2136 2138# 2138 2140# 2140
2142# 2142 2145# 2145 2147# 2147 2149# 2149 2151# 2151 2153# 2153 2155# 2155
2157# 2157 2159# 2159 2161# 2161 2163# 2163 2165# 2165 2167# 2167 2169# 2169
2171# 2171 2173# 2173 2175# 2175 2178# 2178 2180# 2180 2182# 2182 2184# 2184
2186# 2186 2188# 2188 2190# 2190 2192# 2192 2194# 2194 2196# 2196 2198# 2198
2200# 2200 2202# 2202 2204# 2204 2206# 2206 2208# 2208 2211# 2211 2213# 2213
2215# 2215 2217# 2217 2219# 2219 2221# 2221 2223# 2223 2225# 2225 2227# 2227
2229# 2229 2231# 2231 2233# 2233 2235# 2235 2237# 2237 2239# 2239 2241# 2241
2246# 2246 2248# 2248 2251# 2251 2253# 2253 2255# 2255 2257# 2257 2259# 2259
2261# 2261 2263# 2263 2265# 2265 2267# 2267 2269# 2269 2271# 2271 2273# 2273
2275# 2275 2277# 2277 2279# 2279 2281# 2281 2284# 2284 2286# 2286 2288# 2288
2290# 2290 2292# 2292 2294# 2294 2296# 2296 2298# 2298 2300# 2300 2302# 2302
2304# 2304 2306# 2306 2308# 2308 2310# 2310 2312# 2312 2314# 2314 2317# 2317
2319# 2319 2321# 2321 2323# 2323 2325# 2325 2327# 2327 2329# 2329 2331# 2331
2333# 2333 2335# 2335 2337# 2337 2339# 2339 2341# 2341 2343# 2343 2345# 2345
2347# 2347 2350# 2350 2352# 2352 2354# 2354 2356# 2356 2358# 2358 2360# 2360
2362# 2362 2364# 2364 2366# 2366 2368# 2368 2370# 2370 2372# 2372 2374# 2374
2376# 2376 2378# 2378 2380# 2380 2385# 2385 2387# 2387 2390# 2390 2392# 2392
2394# 2394 2396# 2396 2398# 2398 2400# 2400 2402# 2402 2404# 2404 2406# 2406
2408# 2408 2410# 2410 2412# 2412 2414# 2414 2416# 2416 2418# 2418 2420# 2420
2423# 2423 2425# 2425 2427# 2427 2429# 2429 2431# 2431 2433# 2433 2435# 2435
2437# 2437 2439# 2439 2441# 2441 2443# 2443 2445# 2445 2447# 2447 2449# 2449
2451# 2451 2453# 2453 2456# 2456 2458# 2458 2460# 2460 2462# 2462 2464# 2464
2466# 2466 2468# 2468 2470# 2470 2472# 2472 2474# 2474 2476# 2476 2478# 2478
2480# 2480 2482# 2482 2484# 2484 2486# 2486 2489# 2489 2491# 2491 2493# 2493
2495# 2495 2497# 2497 2499# 2499 2501# 2501 2503# 2503 2505# 2505 2507# 2507
2509# 2509 2511# 2511 2513# 2513 2515# 2515 2517# 2517 2519# 2519 2521# 2521
.LA 158 167 176 185 194 203 212 221 230 239 248 257 266 275
284 302 305 307 309 311 313 315 317 319 321 323 325 327
329 331 333 335 338 340 342 344 346 348 350 352 354 356
358 360 362 364 366 368 371 373 375 377 379 381 383 385
387 389 391 393 395 397 399 401 404 406 408 410 412 414
416 418 420 422 424 426 428 430 432 434 441 444 446 448
450 452 454 456 458 460 462 464 466 468 470 472 474 477
479 481 483 485 487 489 491 493 495 497 499 501 503 505
507 510 512 514 516 518 520 522 524 526 528 530 532 534
536 538 540 543 545 547 549 551 553 555 557 559 561 563
565 567 569 571 573 580 583 585 587 589 591 593 595 597
599 601 603 605 607 609 611 613 616 618 620 622 624 626
628 630 632 634 636 638 640 642 644 646 649 651 653 655
657 659 661 663 665 667 669 671 673 675 677 679 682 684
686 688 690 692 694 696 698 700 702 704 706 708 710 712 SEQ 1253
719 722 724 726 728 730 732 734 736 738 740 742 744 746
748 750 752 755 757 759 761 763 765 767 769 771 773 775
777 779 781 783 785 788 790 792 794 796 798 800 802 804
806 808 810 812 814 816 818 821 823 825 827 829 831 833
835 837 839 841 843 845 847 849 851 858 861 863 865 867
869 871 873 875 877 879 881 883 885 887 889 891 894 896
898 900 902 904 906 908 910 912 914 916 918 920 922 924
927 929 931 933 935 937 939 941 943 945 947 949 951 953
955 957 960 962 964 966 968 970 972 974 976 978 980 982
984 986 988 990 997 1000 1002 1004 1006 1008 1010 1012 1014 1016
1018 1020 1022 1024 1026 1028 1030 1033 1035 1037 1039 1041 1043 1045
1047 1049 1051 1053 1055 1057 1059 1061 1063 1066 1068 1070 1072 1074
1076 1078 1080 1082 1084 1086 1088 1090 1092 1094 1096 1099 1101 1103
1105 1107 1109 1111 1113 1115 1117 1119 1121 1123 1125 1127 1129 1136
1139 1141 1143 1145 1147 1149 1151 1153 1155 1157 1159 1161 1163 1165
1167 1169 1172 1174 1176 1178 1180 1182 1184 1186 1188 1190 1192 1194
1196 1198 1200 1202 1205 1207 1209 1211 1213 1215 1217 1219 1221 1223
1225 1227 1229 1231 1233 1235 1238 1240 1242 1244 1246 1248 1250 1252
1254 1256 1258 1260 1262 1264 1266 1268 1275 1278 1280 1282 1284 1286
1288 1290 1292 1294 1296 1298 1300 1302 1304 1306 1308 1311 1313 1315
1317 1319 1321 1323 1325 1327 1329 1331 1333 1335 1337 1339 1341 1344
1346 1348 1350 1352 1354 1356 1358 1360 1362 1364 1366 1368 1370 1372
1374 1377 1379 1381 1383 1385 1387 1389 1391 1393 1395 1397 1399 1401
1403 1405 1407 1414 1417 1419 1421 1423 1425 1427 1429 1431 1433 1435
1437 1439 1441 1443 1445 1447 1450 1452 1454 1456 1458 1460 1462 1464
1466 1468 1470 1472 1474 1476 1478 1480 1483 1485 1487 1489 1491 1493
1495 1497 1499 1501 1503 1505 1507 1509 1511 1513 1516 1518 1520 1522
1524 1526 1528 1530 1532 1534 1536 1538 1540 1542 1544 1546 1553 1556
1558 1560 1562 1564 1566 1568 1570 1572 1574 1576 1578 1580 1582 1584
1586 1589 1591 1593 1595 1597 1599 1601 1603 1605 1607 1609 1611 1613
1615 1617 1619 1622 1624 1626 1628 1630 1632 1634 1636 1638 1640 1642
1644 1646 1648 1650 1652 1655 1657 1659 1661 1663 1665 1667 1669 1671
1673 1675 1677 1679 1681 1683 1685 1692 1695 1697 1699 1701 1703 1705
1707 1709 1711 1713 1715 1717 1719 1721 1723 1725 1728 1730 1732 1734
1736 1738 1740 1742 1744 1746 1748 1750 1752 1754 1756 1758 1761 1763
1765 1767 1769 1771 1773 1775 1777 1779 1781 1783 1785 1787 1789 1791
1794 1796 1798 1800 1802 1804 1806 1808 1810 1812 1814 1816 1818 1820
1822 1824 1831 1834 1836 1838 1840 1842 1844 1846 1848 1850 1852 1854
1856 1858 1860 1862 1864 1867 1869 1871 1873 1875 1877 1879 1881 1883
1885 1887 1889 1891 1893 1895 1897 1900 1902 1904 1906 1908 1910 1912
1914 1916 1918 1920 1922 1924 1926 1928 1930 1933 1935 1937 1939 1941
1943 1945 1947 1949 1951 1953 1955 1957 1959 1961 1963 1970 1973 1975
1977 1979 1981 1983 1985 1987 1989 1991 1993 1995 1997 1999 2001 2003
2006 2008 2010 2012 2014 2016 2018 2020 2022 2024 2026 2028 2030 2032
2034 2036 2039 2041 2043 2045 2047 2049 2051 2053 2055 2057 2059 2061
2063 2065 2067 2069 2072 2074 2076 2078 2080 2082 2084 2086 2088 2090
2092 2094 2096 2098 2100 2102 2109 2112 2114 2116 2118 2120 2122 2124
2126 2128 2130 2132 2134 2136 2138 2140 2142 2145 2147 2149 2151 2153
2155 2157 2159 2161 2163 2165 2167 2169 2171 2173 2175 2178 2180 2182
2184 2186 2188 2190 2192 2194 2196 2198 2200 2202 2204 2206 2208 2211
2213 2215 2217 2219 2221 2223 2225 2227 2229 2231 2233 2235 2237 2239
2241 2248 2251 2253 2255 2257 2259 2261 2263 2265 2267 2269 2271 2273
2275 2277 2279 2281 2284 2286 2288 2290 2292 2294 2296 2298 2300 2302 SEQ 1254
2304 2306 2308 2310 2312 2314 2317 2319 2321 2323 2325 2327 2329 2331
2333 2335 2337 2339 2341 2343 2345 2347 2350 2352 2354 2356 2358 2360
2362 2364 2366 2368 2370 2372 2374 2376 2378 2380 2387 2390 2392 2394
2396 2398 2400 2402 2404 2406 2408 2410 2412 2414 2416 2418 2420 2423
2425 2427 2429 2431 2433 2435 2437 2439 2441 2443 2445 2447 2449 2451
2453 2456 2458 2460 2462 2464 2466 2468 2470 2472 2474 2476 2478 2480
2482 2484 2486 2489 2491 2493 2495 2497 2499 2501 2503 2505 2507 2509
2511 2513 2515 2517 2519
.LADDR 102 149 293 295 300
.LAND 302 321 350 387 416 441 460 489 526 555 580 599 628 665
694 719 738 767 804 833 858 877 906 943 972 997 1016 1045
1082 1111 1136 1155 1184 1221 1250 1275 1294 1323 1360 1389 1414 1433
1462 1499 1528 1553 1572 1601 1638 1667 1692 1711 1740 1777 1806 1831
1850 1879 1916 1945 1970 1989 2018 2055 2084 2109 2128 2157 2194 2223
2248 2267 2296 2333 2362 2387 2406 2435 2472 2501
.LB 110 112 114 116 118 120 122 124 126 128 130 132 134 136
138 140 142 302 305 309 313 317 321 325 329 333 338 342
346 350 354 358 362 366 371 375 379 383 387 391 395 399
404 408 412 416 420 424 428 432 441 444 448 452 456 460
464 468 472 477 481 485 489 493 497 501 505 510 514 518
522 526 530 534 538 543 547 551 555 559 563 567 571 580
583 587 591 595 599 603 607 611 616 620 624 628 632 636
640 644 649 653 657 661 665 669 673 677 682 686 690 694
698 702 706 710 719 722 726 730 734 738 742 746 750 755
759 763 767 771 775 779 783 788 792 796 800 804 808 812
816 821 825 829 833 837 841 845 849 858 861 865 869 873
877 881 885 889 894 898 902 906 910 914 918 922 927 931
935 939 943 947 951 955 960 964 968 972 976 980 984 988
997 1000 1004 1008 1012 1016 1020 1024 1028 1033 1037 1041 1045 1049
1053 1057 1061 1066 1070 1074 1078 1082 1086 1090 1094 1099 1103 1107
1111 1115 1119 1123 1127 1136 1139 1143 1147 1151 1155 1159 1163 1167
1172 1176 1180 1184 1188 1192 1196 1200 1205 1209 1213 1217 1221 1225
1229 1233 1238 1242 1246 1250 1254 1258 1262 1266 1275 1278 1282 1286
1290 1294 1298 1302 1306 1311 1315 1319 1323 1327 1331 1335 1339 1344
1348 1352 1356 1360 1364 1368 1372 1377 1381 1385 1389 1393 1397 1401
1405 1414 1417 1421 1425 1429 1433 1437 1441 1445 1450 1454 1458 1462
1466 1470 1474 1478 1483 1487 1491 1495 1499 1503 1507 1511 1516 1520
1524 1528 1532 1536 1540 1544 1553 1556 1560 1564 1568 1572 1576 1580
1584 1589 1593 1597 1601 1605 1609 1613 1617 1622 1626 1630 1634 1638
1642 1646 1650 1655 1659 1663 1667 1671 1675 1679 1683 1692 1695 1699
1703 1707 1711 1715 1719 1723 1728 1732 1736 1740 1744 1748 1752 1756
1761 1765 1769 1773 1777 1781 1785 1789 1794 1798 1802 1806 1810 1814
1818 1822 1831 1834 1838 1842 1846 1850 1854 1858 1862 1867 1871 1875
1879 1883 1887 1891 1895 1900 1904 1908 1912 1916 1920 1924 1928 1933
1937 1941 1945 1949 1953 1957 1961 1970 1973 1977 1981 1985 1989 1993
1997 2001 2006 2010 2014 2018 2022 2026 2030 2034 2039 2043 2047 2051
2055 2059 2063 2067 2072 2076 2080 2084 2088 2092 2096 2100 2109 2112
2116 2120 2124 2128 2132 2136 2140 2145 2149 2153 2157 2161 2165 2169
2173 2178 2182 2186 2190 2194 2198 2202 2206 2211 2215 2219 2223 2227
2231 2235 2239 2248 2251 2255 2259 2263 2267 2271 2275 2279 2284 2288
2292 2296 2300 2304 2308 2312 2317 2321 2325 2329 2333 2337 2341 2345
2350 2354 2358 2362 2366 2370 2374 2378 2387 2390 2394 2398 2402 2406
2410 2414 2418 2423 2427 2431 2435 2439 2443 2447 2451 2456 2460 2464 SEQ 1255
2468 2472 2476 2480 2484 2489 2493 2497 2501 2505 2509 2513 2517
.LBAD 151 160 169 178 187 196 205 214 223 232 241 250 259 268
277 286 293 295
.LCCFZ 149 158 167 176 185 194 203 212 221 230 239 248 257 266
275 284
.LCENA 149 158 167 176 185 194 203 212 221 230 239 248 257 266
275 284
.LCJS 300 307 311 315 319 323 327 331 335 340 344 348 352 356
360 364 368 373 377 381 385 389 393 397 401 406 410 414
418 422 426 430 434 439 446 450 454 458 462 466 470 474
479 483 487 491 495 499 503 507 512 516 520 524 528 532
536 540 545 549 553 557 561 565 569 573 578 585 589 593
597 601 605 609 613 618 622 626 630 634 638 642 646 651
655 659 663 667 671 675 679 684 688 692 696 700 704 708
712 717 724 728 732 736 740 744 748 752 757 761 765 769
773 777 781 785 790 794 798 802 806 810 814 818 823 827
831 835 839 843 847 851 856 863 867 871 875 879 883 887
891 896 900 904 908 912 916 920 924 929 933 937 941 945
949 953 957 962 966 970 974 978 982 986 990 995 1002 1006
1010 1014 1018 1022 1026 1030 1035 1039 1043 1047 1051 1055 1059 1063
1068 1072 1076 1080 1084 1088 1092 1096 1101 1105 1109 1113 1117 1121
1125 1129 1134 1141 1145 1149 1153 1157 1161 1165 1169 1174 1178 1182
1186 1190 1194 1198 1202 1207 1211 1215 1219 1223 1227 1231 1235 1240
1244 1248 1252 1256 1260 1264 1268 1273 1280 1284 1288 1292 1296 1300
1304 1308 1313 1317 1321 1325 1329 1333 1337 1341 1346 1350 1354 1358
1362 1366 1370 1374 1379 1383 1387 1391 1395 1399 1403 1407 1412 1419
1423 1427 1431 1435 1439 1443 1447 1452 1456 1460 1464 1468 1472 1476
1480 1485 1489 1493 1497 1501 1505 1509 1513 1518 1522 1526 1530 1534
1538 1542 1546 1551 1558 1562 1566 1570 1574 1578 1582 1586 1591 1595
1599 1603 1607 1611 1615 1619 1624 1628 1632 1636 1640 1644 1648 1652
1657 1661 1665 1669 1673 1677 1681 1685 1690 1697 1701 1705 1709 1713
1717 1721 1725 1730 1734 1738 1742 1746 1750 1754 1758 1763 1767 1771
1775 1779 1783 1787 1791 1796 1800 1804 1808 1812 1816 1820 1824 1829
1836 1840 1844 1848 1852 1856 1860 1864 1869 1873 1877 1881 1885 1889
1893 1897 1902 1906 1910 1914 1918 1922 1926 1930 1935 1939 1943 1947
1951 1955 1959 1963 1968 1975 1979 1983 1987 1991 1995 1999 2003 2008
2012 2016 2020 2024 2028 2032 2036 2041 2045 2049 2053 2057 2061 2065
2069 2074 2078 2082 2086 2090 2094 2098 2102 2107 2114 2118 2122 2126
2130 2134 2138 2142 2147 2151 2155 2159 2163 2167 2171 2175 2180 2184
2188 2192 2196 2200 2204 2208 2213 2217 2221 2225 2229 2233 2237 2241
2246 2253 2257 2261 2265 2269 2273 2277 2281 2286 2290 2294 2298 2302
2306 2310 2314 2319 2323 2327 2331 2335 2339 2343 2347 2352 2356 2360
2364 2368 2372 2376 2380 2385 2392 2396 2400 2404 2408 2412 2416 2420
2425 2429 2433 2437 2441 2445 2449 2453 2458 2462 2466 2470 2474 2478
2482 2486 2491 2495 2499 2503 2507 2511 2515 2519
.LCJV 149 158 167 176 185 194 203 212 221 230 239 248 257 266
275 284
.LCONT 110 112 114 116 118 120 122 124 126 128 130 132 134 136
138 140 142 302 305 309 313 317 321 325 329 333 338 342
346 350 354 358 362 366 371 375 379 383 387 391 395 399
404 408 412 416 420 424 428 432 441 444 448 452 456 460
464 468 472 477 481 485 489 493 497 501 505 510 514 518
522 526 530 534 538 543 547 551 555 559 563 567 571 580 SEQ 1256
583 587 591 595 599 603 607 611 616 620 624 628 632 636
640 644 649 653 657 661 665 669 673 677 682 686 690 694
698 702 706 710 719 722 726 730 734 738 742 746 750 755
759 763 767 771 775 779 783 788 792 796 800 804 808 812
816 821 825 829 833 837 841 845 849 858 861 865 869 873
877 881 885 889 894 898 902 906 910 914 918 922 927 931
935 939 943 947 951 955 960 964 968 972 976 980 984 988
997 1000 1004 1008 1012 1016 1020 1024 1028 1033 1037 1041 1045 1049
1053 1057 1061 1066 1070 1074 1078 1082 1086 1090 1094 1099 1103 1107
1111 1115 1119 1123 1127 1136 1139 1143 1147 1151 1155 1159 1163 1167
1172 1176 1180 1184 1188 1192 1196 1200 1205 1209 1213 1217 1221 1225
1229 1233 1238 1242 1246 1250 1254 1258 1262 1266 1275 1278 1282 1286
1290 1294 1298 1302 1306 1311 1315 1319 1323 1327 1331 1335 1339 1344
1348 1352 1356 1360 1364 1368 1372 1377 1381 1385 1389 1393 1397 1401
1405 1414 1417 1421 1425 1429 1433 1437 1441 1445 1450 1454 1458 1462
1466 1470 1474 1478 1483 1487 1491 1495 1499 1503 1507 1511 1516 1520
1524 1528 1532 1536 1540 1544 1553 1556 1560 1564 1568 1572 1576 1580
1584 1589 1593 1597 1601 1605 1609 1613 1617 1622 1626 1630 1634 1638
1642 1646 1650 1655 1659 1663 1667 1671 1675 1679 1683 1692 1695 1699
1703 1707 1711 1715 1719 1723 1728 1732 1736 1740 1744 1748 1752 1756
1761 1765 1769 1773 1777 1781 1785 1789 1794 1798 1802 1806 1810 1814
1818 1822 1831 1834 1838 1842 1846 1850 1854 1858 1862 1867 1871 1875
1879 1883 1887 1891 1895 1900 1904 1908 1912 1916 1920 1924 1928 1933
1937 1941 1945 1949 1953 1957 1961 1970 1973 1977 1981 1985 1989 1993
1997 2001 2006 2010 2014 2018 2022 2026 2030 2034 2039 2043 2047 2051
2055 2059 2063 2067 2072 2076 2080 2084 2088 2092 2096 2100 2109 2112
2116 2120 2124 2128 2132 2136 2140 2145 2149 2153 2157 2161 2165 2169
2173 2178 2182 2186 2190 2194 2198 2202 2206 2211 2215 2219 2223 2227
2231 2235 2239 2248 2251 2255 2259 2263 2267 2271 2275 2279 2284 2288
2292 2296 2300 2304 2308 2312 2317 2321 2325 2329 2333 2337 2341 2345
2350 2354 2358 2362 2366 2370 2374 2378 2387 2390 2394 2398 2402 2406
2410 2414 2418 2423 2427 2431 2435 2439 2443 2447 2451 2456 2460 2464
2468 2472 2476 2480 2484 2489 2493 2497 2501 2505 2509 2513 2517
.LCRTN 144 153 162 171 180 189 198 207 216 225 234 243 252 261
270 279 288
.LD 110 112 114 116 118 120 122 124 126 128 130 132 134 136
138 140 142 144 149 158 167 176 185 194 203 212 221 230
239 248 257 266 275 284 302 305 307 309 311 313 315 317
319 321 323 325 327 329 331 333 335 338 340 342 344 346
348 350 352 354 356 358 360 362 364 366 368 371 373 375
377 379 381 383 385 387 389 391 393 395 397 399 401 404
406 408 410 412 414 416 418 420 422 424 426 428 430 432
434 441 444 446 448 450 452 454 456 458 460 462 464 466
468 470 472 474 477 479 481 483 485 487 489 491 493 495
497 499 501 503 505 507 510 512 514 516 518 520 522 524
526 528 530 532 534 536 538 540 543 545 547 549 551 553
555 557 559 561 563 565 567 569 571 573 580 583 585 587
589 591 593 595 597 599 601 603 605 607 609 611 613 616
618 620 622 624 626 628 630 632 634 636 638 640 642 644
646 649 651 653 655 657 659 661 663 665 667 669 671 673
675 677 679 682 684 686 688 690 692 694 696 698 700 702
704 706 708 710 712 719 722 724 726 728 730 732 734 736
738 740 742 744 746 748 750 752 755 757 759 761 763 765 SEQ 1257
767 769 771 773 775 777 779 781 783 785 788 790 792 794
796 798 800 802 804 806 808 810 812 814 816 818 821 823
825 827 829 831 833 835 837 839 841 843 845 847 849 851
858 861 863 865 867 869 871 873 875 877 879 881 883 885
887 889 891 894 896 898 900 902 904 906 908 910 912 914
916 918 920 922 924 927 929 931 933 935 937 939 941 943
945 947 949 951 953 955 957 960 962 964 966 968 970 972
974 976 978 980 982 984 986 988 990 997 1000 1002 1004 1006
1008 1010 1012 1014 1016 1018 1020 1022 1024 1026 1028 1030 1033 1035
1037 1039 1041 1043 1045 1047 1049 1051 1053 1055 1057 1059 1061 1063
1066 1068 1070 1072 1074 1076 1078 1080 1082 1084 1086 1088 1090 1092
1094 1096 1099 1101 1103 1105 1107 1109 1111 1113 1115 1117 1119 1121
1123 1125 1127 1129 1136 1139 1141 1143 1145 1147 1149 1151 1153 1155
1157 1159 1161 1163 1165 1167 1169 1172 1174 1176 1178 1180 1182 1184
1186 1188 1190 1192 1194 1196 1198 1200 1202 1205 1207 1209 1211 1213
1215 1217 1219 1221 1223 1225 1227 1229 1231 1233 1235 1238 1240 1242
1244 1246 1248 1250 1252 1254 1256 1258 1260 1262 1264 1266 1268 1275
1278 1280 1282 1284 1286 1288 1290 1292 1294 1296 1298 1300 1302 1304
1306 1308 1311 1313 1315 1317 1319 1321 1323 1325 1327 1329 1331 1333
1335 1337 1339 1341 1344 1346 1348 1350 1352 1354 1356 1358 1360 1362
1364 1366 1368 1370 1372 1374 1377 1379 1381 1383 1385 1387 1389 1391
1393 1395 1397 1399 1401 1403 1405 1407 1414 1417 1419 1421 1423 1425
1427 1429 1431 1433 1435 1437 1439 1441 1443 1445 1447 1450 1452 1454
1456 1458 1460 1462 1464 1466 1468 1470 1472 1474 1476 1478 1480 1483
1485 1487 1489 1491 1493 1495 1497 1499 1501 1503 1505 1507 1509 1511
1513 1516 1518 1520 1522 1524 1526 1528 1530 1532 1534 1536 1538 1540
1542 1544 1546 1553 1556 1558 1560 1562 1564 1566 1568 1570 1572 1574
1576 1578 1580 1582 1584 1586 1589 1591 1593 1595 1597 1599 1601 1603
1605 1607 1609 1611 1613 1615 1617 1619 1622 1624 1626 1628 1630 1632
1634 1636 1638 1640 1642 1644 1646 1648 1650 1652 1655 1657 1659 1661
1663 1665 1667 1669 1671 1673 1675 1677 1679 1681 1683 1685 1692 1695
1697 1699 1701 1703 1705 1707 1709 1711 1713 1715 1717 1719 1721 1723
1725 1728 1730 1732 1734 1736 1738 1740 1742 1744 1746 1748 1750 1752
1754 1756 1758 1761 1763 1765 1767 1769 1771 1773 1775 1777 1779 1781
1783 1785 1787 1789 1791 1794 1796 1798 1800 1802 1804 1806 1808 1810
1812 1814 1816 1818 1820 1822 1824 1831 1834 1836 1838 1840 1842 1844
1846 1848 1850 1852 1854 1856 1858 1860 1862 1864 1867 1869 1871 1873
1875 1877 1879 1881 1883 1885 1887 1889 1891 1893 1895 1897 1900 1902
1904 1906 1908 1910 1912 1914 1916 1918 1920 1922 1924 1926 1928 1930
1933 1935 1937 1939 1941 1943 1945 1947 1949 1951 1953 1955 1957 1959
1961 1963 1970 1973 1975 1977 1979 1981 1983 1985 1987 1989 1991 1993
1995 1997 1999 2001 2003 2006 2008 2010 2012 2014 2016 2018 2020 2022
2024 2026 2028 2030 2032 2034 2036 2039 2041 2043 2045 2047 2049 2051
2053 2055 2057 2059 2061 2063 2065 2067 2069 2072 2074 2076 2078 2080
2082 2084 2086 2088 2090 2092 2094 2096 2098 2100 2102 2109 2112 2114
2116 2118 2120 2122 2124 2126 2128 2130 2132 2134 2136 2138 2140 2142
2145 2147 2149 2151 2153 2155 2157 2159 2161 2163 2165 2167 2169 2171
2173 2175 2178 2180 2182 2184 2186 2188 2190 2192 2194 2196 2198 2200
2202 2204 2206 2208 2211 2213 2215 2217 2219 2221 2223 2225 2227 2229
2231 2233 2235 2237 2239 2241 2248 2251 2253 2255 2257 2259 2261 2263
2265 2267 2269 2271 2273 2275 2277 2279 2281 2284 2286 2288 2290 2292
2294 2296 2298 2300 2302 2304 2306 2308 2310 2312 2314 2317 2319 2321
2323 2325 2327 2329 2331 2333 2335 2337 2339 2341 2343 2345 2347 2350 SEQ 1258
2352 2354 2356 2358 2360 2362 2364 2366 2368 2370 2372 2374 2376 2378
2380 2387 2390 2392 2394 2396 2398 2400 2402 2404 2406 2408 2410 2412
2414 2416 2418 2420 2423 2425 2427 2429 2431 2433 2435 2437 2439 2441
2443 2445 2447 2449 2451 2453 2456 2458 2460 2462 2464 2466 2468 2470
2472 2474 2476 2478 2480 2482 2484 2486 2489 2491 2493 2495 2497 2499
2501 2503 2505 2507 2509 2511 2513 2515 2517 2519
.LJ 102 149 151 158 160 167 169 176 178 185 187 194 196 203
205 212 214 221 223 230 232 239 241 248 250 257 259 266
268 275 277 284 286 293 295 300 307 311 315 319 323 327
331 335 340 344 348 352 356 360 364 368 373 377 381 385
389 393 397 401 406 410 414 418 422 426 430 434 439 446
450 454 458 462 466 470 474 479 483 487 491 495 499 503
507 512 516 520 524 528 532 536 540 545 549 553 557 561
565 569 573 578 585 589 593 597 601 605 609 613 618 622
626 630 634 638 642 646 651 655 659 663 667 671 675 679
684 688 692 696 700 704 708 712 717 724 728 732 736 740
744 748 752 757 761 765 769 773 777 781 785 790 794 798
802 806 810 814 818 823 827 831 835 839 843 847 851 856
863 867 871 875 879 883 887 891 896 900 904 908 912 916
920 924 929 933 937 941 945 949 953 957 962 966 970 974
978 982 986 990 995 1002 1006 1010 1014 1018 1022 1026 1030 1035
1039 1043 1047 1051 1055 1059 1063 1068 1072 1076 1080 1084 1088 1092
1096 1101 1105 1109 1113 1117 1121 1125 1129 1134 1141 1145 1149 1153
1157 1161 1165 1169 1174 1178 1182 1186 1190 1194 1198 1202 1207 1211
1215 1219 1223 1227 1231 1235 1240 1244 1248 1252 1256 1260 1264 1268
1273 1280 1284 1288 1292 1296 1300 1304 1308 1313 1317 1321 1325 1329
1333 1337 1341 1346 1350 1354 1358 1362 1366 1370 1374 1379 1383 1387
1391 1395 1399 1403 1407 1412 1419 1423 1427 1431 1435 1439 1443 1447
1452 1456 1460 1464 1468 1472 1476 1480 1485 1489 1493 1497 1501 1505
1509 1513 1518 1522 1526 1530 1534 1538 1542 1546 1551 1558 1562 1566
1570 1574 1578 1582 1586 1591 1595 1599 1603 1607 1611 1615 1619 1624
1628 1632 1636 1640 1644 1648 1652 1657 1661 1665 1669 1673 1677 1681
1685 1690 1697 1701 1705 1709 1713 1717 1721 1725 1730 1734 1738 1742
1746 1750 1754 1758 1763 1767 1771 1775 1779 1783 1787 1791 1796 1800
1804 1808 1812 1816 1820 1824 1829 1836 1840 1844 1848 1852 1856 1860
1864 1869 1873 1877 1881 1885 1889 1893 1897 1902 1906 1910 1914 1918
1922 1926 1930 1935 1939 1943 1947 1951 1955 1959 1963 1968 1975 1979
1983 1987 1991 1995 1999 2003 2008 2012 2016 2020 2024 2028 2032 2036
2041 2045 2049 2053 2057 2061 2065 2069 2074 2078 2082 2086 2090 2094
2098 2102 2107 2114 2118 2122 2126 2130 2134 2138 2142 2147 2151 2155
2159 2163 2167 2171 2175 2180 2184 2188 2192 2196 2200 2204 2208 2213
2217 2221 2225 2229 2233 2237 2241 2246 2253 2257 2261 2265 2269 2273
2277 2281 2286 2290 2294 2298 2302 2306 2310 2314 2319 2323 2327 2331
2335 2339 2343 2347 2352 2356 2360 2364 2368 2372 2376 2380 2385 2392
2396 2400 2404 2408 2412 2416 2420 2425 2429 2433 2437 2441 2445 2449
2453 2458 2462 2466 2470 2474 2478 2482 2486 2491 2495 2499 2503 2507
2511 2515 2519 2521
.LJMAP 102 151 160 169 178 187 196 205 214 223 232 241 250 259
268 277 286 293 295 2521
.LJZ 104
.LMGC 110 112 114 116 118 120 122 124 126 128 130 132 134 136
138 140 142 305 309 313 317 321 325 329 333 338 342 346
350 354 358 362 366 371 375 379 383 387 391 395 399 404 SEQ 1259
408 412 416 420 424 428 432 444 448 452 456 460 464 468
472 477 481 485 489 493 497 501 505 510 514 518 522 526
530 534 538 543 547 551 555 559 563 567 571 583 587 591
595 599 603 607 611 616 620 624 628 632 636 640 644 649
653 657 661 665 669 673 677 682 686 690 694 698 702 706
710 722 726 730 734 738 742 746 750 755 759 763 767 771
775 779 783 788 792 796 800 804 808 812 816 821 825 829
833 837 841 845 849 861 865 869 873 877 881 885 889 894
898 902 906 910 914 918 922 927 931 935 939 943 947 951
955 960 964 968 972 976 980 984 988 1000 1004 1008 1012 1016
1020 1024 1028 1033 1037 1041 1045 1049 1053 1057 1061 1066 1070 1074
1078 1082 1086 1090 1094 1099 1103 1107 1111 1115 1119 1123 1127 1139
1143 1147 1151 1155 1159 1163 1167 1172 1176 1180 1184 1188 1192 1196
1200 1205 1209 1213 1217 1221 1225 1229 1233 1238 1242 1246 1250 1254
1258 1262 1266 1278 1282 1286 1290 1294 1298 1302 1306 1311 1315 1319
1323 1327 1331 1335 1339 1344 1348 1352 1356 1360 1364 1368 1372 1377
1381 1385 1389 1393 1397 1401 1405 1417 1421 1425 1429 1433 1437 1441
1445 1450 1454 1458 1462 1466 1470 1474 1478 1483 1487 1491 1495 1499
1503 1507 1511 1516 1520 1524 1528 1532 1536 1540 1544 1556 1560 1564
1568 1572 1576 1580 1584 1589 1593 1597 1601 1605 1609 1613 1617 1622
1626 1630 1634 1638 1642 1646 1650 1655 1659 1663 1667 1671 1675 1679
1683 1695 1699 1703 1707 1711 1715 1719 1723 1728 1732 1736 1740 1744
1748 1752 1756 1761 1765 1769 1773 1777 1781 1785 1789 1794 1798 1802
1806 1810 1814 1818 1822 1834 1838 1842 1846 1850 1854 1858 1862 1867
1871 1875 1879 1883 1887 1891 1895 1900 1904 1908 1912 1916 1920 1924
1928 1933 1937 1941 1945 1949 1953 1957 1961 1973 1977 1981 1985 1989
1993 1997 2001 2006 2010 2014 2018 2022 2026 2030 2034 2039 2043 2047
2051 2055 2059 2063 2067 2072 2076 2080 2084 2088 2092 2096 2100 2112
2116 2120 2124 2128 2132 2136 2140 2145 2149 2153 2157 2161 2165 2169
2173 2178 2182 2186 2190 2194 2198 2202 2206 2211 2215 2219 2223 2227
2231 2235 2239 2251 2255 2259 2263 2267 2271 2275 2279 2284 2288 2292
2296 2300 2304 2308 2312 2317 2321 2325 2329 2333 2337 2341 2345 2350
2354 2358 2362 2366 2370 2374 2378 2390 2394 2398 2402 2406 2410 2414
2418 2423 2427 2431 2435 2439 2443 2447 2451 2456 2460 2464 2468 2472
2476 2480 2484 2489 2493 2497 2501 2505 2509 2513 2517
.LNAND 325 346 391 412 464 485 530 551 603 624 669 690 742 763
808 829 881 902 947 968 1020 1041 1086 1107 1159 1180 1225 1246
1298 1319 1364 1385 1437 1458 1503 1524 1576 1597 1642 1663 1715 1736
1781 1802 1854 1875 1920 1941 1993 2014 2059 2080 2132 2153 2198 2219
2271 2292 2337 2358 2410 2431 2476 2497
.LOR 110 112 114 116 118 120 122 124 126 128 130 132 134 136
138 140 142 149 158 167 176 185 194 203 212 221 230 239
248 257 266 275 284 307 311 315 317 319 323 327 331 335
340 344 348 352 354 356 360 364 368 373 377 381 383 385
389 393 397 401 406 410 414 418 420 422 426 430 434 446
450 454 456 458 462 466 470 474 479 483 487 491 493 495
499 503 507 512 516 520 522 524 528 532 536 540 545 549
553 557 559 561 565 569 573 585 589 593 595 597 601 605
609 613 618 622 626 630 632 634 638 642 646 651 655 659
661 663 667 671 675 679 684 688 692 696 698 700 704 708
712 724 728 732 734 736 740 744 748 752 757 761 765 769
771 773 777 781 785 790 794 798 800 802 806 810 814 818
823 827 831 835 837 839 843 847 851 863 867 871 873 875 SEQ 1260
879 883 887 891 896 900 904 908 910 912 916 920 924 929
933 937 939 941 945 949 953 957 962 966 970 974 976 978
982 986 990 1002 1006 1010 1012 1014 1018 1022 1026 1030 1035 1039
1043 1047 1049 1051 1055 1059 1063 1068 1072 1076 1078 1080 1084 1088
1092 1096 1101 1105 1109 1113 1115 1117 1121 1125 1129 1141 1145 1149
1151 1153 1157 1161 1165 1169 1174 1178 1182 1186 1188 1190 1194 1198
1202 1207 1211 1215 1217 1219 1223 1227 1231 1235 1240 1244 1248 1252
1254 1256 1260 1264 1268 1280 1284 1288 1290 1292 1296 1300 1304 1308
1313 1317 1321 1325 1327 1329 1333 1337 1341 1346 1350 1354 1356 1358
1362 1366 1370 1374 1379 1383 1387 1391 1393 1395 1399 1403 1407 1419
1423 1427 1429 1431 1435 1439 1443 1447 1452 1456 1460 1464 1466 1468
1472 1476 1480 1485 1489 1493 1495 1497 1501 1505 1509 1513 1518 1522
1526 1530 1532 1534 1538 1542 1546 1558 1562 1566 1568 1570 1574 1578
1582 1586 1591 1595 1599 1603 1605 1607 1611 1615 1619 1624 1628 1632
1634 1636 1640 1644 1648 1652 1657 1661 1665 1669 1671 1673 1677 1681
1685 1697 1701 1705 1707 1709 1713 1717 1721 1725 1730 1734 1738 1742
1744 1746 1750 1754 1758 1763 1767 1771 1773 1775 1779 1783 1787 1791
1796 1800 1804 1808 1810 1812 1816 1820 1824 1836 1840 1844 1846 1848
1852 1856 1860 1864 1869 1873 1877 1881 1883 1885 1889 1893 1897 1902
1906 1910 1912 1914 1918 1922 1926 1930 1935 1939 1943 1947 1949 1951
1955 1959 1963 1975 1979 1983 1985 1987 1991 1995 1999 2003 2008 2012
2016 2020 2022 2024 2028 2032 2036 2041 2045 2049 2051 2053 2057 2061
2065 2069 2074 2078 2082 2086 2088 2090 2094 2098 2102 2114 2118 2122
2124 2126 2130 2134 2138 2142 2147 2151 2155 2159 2161 2163 2167 2171
2175 2180 2184 2188 2190 2192 2196 2200 2204 2208 2213 2217 2221 2225
2227 2229 2233 2237 2241 2253 2257 2261 2263 2265 2269 2273 2277 2281
2286 2290 2294 2298 2300 2302 2306 2310 2314 2319 2323 2327 2329 2331
2335 2339 2343 2347 2352 2356 2360 2364 2366 2368 2372 2376 2380 2392
2396 2400 2402 2404 2408 2412 2416 2420 2425 2429 2433 2437 2439 2441
2445 2449 2453 2458 2462 2466 2468 2470 2474 2478 2482 2486 2491 2495
2499 2503 2505 2507 2511 2515 2519
.LPLUS 305 366 371 432 444 505 510 571 583 644 649 710 722 783
788 849 861 922 927 988 1000 1061 1066 1127 1139 1200 1205 1266
1278 1339 1344 1405 1417 1478 1483 1544 1556 1617 1622 1683 1695 1756
1761 1822 1834 1895 1900 1961 1973 2034 2039 2100 2112 2173 2178 2239
2251 2312 2317 2378 2390 2451 2456 2517
.LRMIN 313 358 379 424 452 497 518 563 591 636 657 702 730 775
796 841 869 914 935 980 1008 1053 1074 1119 1147 1192 1213 1258
1286 1331 1352 1397 1425 1470 1491 1536 1564 1609 1630 1675 1703 1748
1769 1814 1842 1887 1908 1953 1981 2026 2047 2092 2120 2165 2186 2231
2259 2304 2325 2370 2398 2443 2464 2509
.LS0A 149 158 167 176 185 194 203 212 221 230 239 248 257 266
275 284 302 307 311 315 319 323 327 331 335 340 344 348
352 356 360 364 368 371 373 377 379 381 385 387 389 393
395 397 401 406 410 414 418 422 426 430 434 441 446 450
454 458 462 466 470 474 479 483 487 491 495 499 503 507
510 512 516 518 520 524 526 528 532 534 536 540 545 549
553 557 561 565 569 573 580 585 589 593 597 601 605 609
613 618 622 626 630 634 638 642 646 649 651 655 657 659
663 665 667 671 673 675 679 684 688 692 696 700 704 708
712 719 724 728 732 736 740 744 748 752 757 761 765 769
773 777 781 785 788 790 794 796 798 802 804 806 810 812
814 818 823 827 831 835 839 843 847 851 858 863 867 871 SEQ 1261
875 879 883 887 891 896 900 904 908 912 916 920 924 927
929 933 935 937 941 943 945 949 951 953 957 962 966 970
974 978 982 986 990 997 1002 1006 1010 1014 1018 1022 1026 1030
1035 1039 1043 1047 1051 1055 1059 1063 1066 1068 1072 1074 1076 1080
1082 1084 1088 1090 1092 1096 1101 1105 1109 1113 1117 1121 1125 1129
1136 1141 1145 1149 1153 1157 1161 1165 1169 1174 1178 1182 1186 1190
1194 1198 1202 1205 1207 1211 1213 1215 1219 1221 1223 1227 1229 1231
1235 1240 1244 1248 1252 1256 1260 1264 1268 1275 1280 1284 1288 1292
1296 1300 1304 1308 1313 1317 1321 1325 1329 1333 1337 1341 1344 1346
1350 1352 1354 1358 1360 1362 1366 1368 1370 1374 1379 1383 1387 1391
1395 1399 1403 1407 1414 1419 1423 1427 1431 1435 1439 1443 1447 1452
1456 1460 1464 1468 1472 1476 1480 1483 1485 1489 1491 1493 1497 1499
1501 1505 1507 1509 1513 1518 1522 1526 1530 1534 1538 1542 1546 1553
1558 1562 1566 1570 1574 1578 1582 1586 1591 1595 1599 1603 1607 1611
1615 1619 1622 1624 1628 1630 1632 1636 1638 1640 1644 1646 1648 1652
1657 1661 1665 1669 1673 1677 1681 1685 1692 1697 1701 1705 1709 1713
1717 1721 1725 1730 1734 1738 1742 1746 1750 1754 1758 1761 1763 1767
1769 1771 1775 1777 1779 1783 1785 1787 1791 1796 1800 1804 1808 1812
1816 1820 1824 1831 1836 1840 1844 1848 1852 1856 1860 1864 1869 1873
1877 1881 1885 1889 1893 1897 1900 1902 1906 1908 1910 1914 1916 1918
1922 1924 1926 1930 1935 1939 1943 1947 1951 1955 1959 1963 1970 1975
1979 1983 1987 1991 1995 1999 2003 2008 2012 2016 2020 2024 2028 2032
2036 2039 2041 2045 2047 2049 2053 2055 2057 2061 2063 2065 2069 2074
2078 2082 2086 2090 2094 2098 2102 2109 2114 2118 2122 2126 2130 2134
2138 2142 2147 2151 2155 2159 2163 2167 2171 2175 2178 2180 2184 2186
2188 2192 2194 2196 2200 2202 2204 2208 2213 2217 2221 2225 2229 2233
2237 2241 2248 2253 2257 2261 2265 2269 2273 2277 2281 2286 2290 2294
2298 2302 2306 2310 2314 2317 2319 2323 2325 2327 2331 2333 2335 2339
2341 2343 2347 2352 2356 2360 2364 2368 2372 2376 2380 2387 2392 2396
2400 2404 2408 2412 2416 2420 2425 2429 2433 2437 2441 2445 2449 2453
2456 2458 2462 2464 2466 2470 2472 2474 2478 2480 2482 2486 2491 2495
2499 2503 2507 2511 2515 2519
.LS0B 342 350 358 366 481 489 497 505 620 628 636 644 759 767
775 783 898 906 914 922 1037 1045 1053 1061 1176 1184 1192 1200
1315 1323 1331 1339 1454 1462 1470 1478 1593 1601 1609 1617 1732 1740
1748 1756 1871 1879 1887 1895 2010 2018 2026 2034 2149 2157 2165 2173
2288 2296 2304 2312 2427 2435 2443 2451
.LS0Q 338 346 354 362 477 485 493 501 616 624 632 640 755 763
771 779 894 902 910 918 1033 1041 1049 1057 1172 1180 1188 1196
1311 1319 1327 1335 1450 1458 1466 1474 1589 1597 1605 1613 1728 1736
1744 1752 1867 1875 1883 1891 2006 2014 2022 2030 2145 2153 2161 2169
2284 2292 2300 2308 2423 2431 2439 2447
.LSAB 309 317 325 333 448 456 464 472 587 595 603 611 726 734
742 750 865 873 881 889 1004 1012 1020 1028 1143 1151 1159 1167
1282 1290 1298 1306 1421 1429 1437 1445 1560 1568 1576 1584 1699 1707
1715 1723 1838 1846 1854 1862 1977 1985 1993 2001 2116 2124 2132 2140
2255 2263 2271 2279 2394 2402 2410 2418
.LSAQ 305 313 321 329 444 452 460 468 583 591 599 607 722 730
738 746 861 869 877 885 1000 1008 1016 1024 1139 1147 1155 1163
1278 1286 1294 1302 1417 1425 1433 1441 1556 1564 1572 1580 1695 1703
1711 1719 1834 1842 1850 1858 1973 1981 1989 1997 2112 2120 2128 2136
2251 2259 2267 2275 2390 2398 2406 2414
.LSD0 110 112 114 116 118 120 122 124 126 128 130 132 134 136 SEQ 1262
138 140 142 408 416 424 432 547 555 563 571 686 694 702
710 825 833 841 849 964 972 980 988 1103 1111 1119 1127 1242
1250 1258 1266 1381 1389 1397 1405 1520 1528 1536 1544 1659 1667 1675
1683 1798 1806 1814 1822 1937 1945 1953 1961 2076 2084 2092 2100 2215
2223 2231 2239 2354 2362 2370 2378 2493 2501 2509 2517
.LSDA 375 383 391 399 514 522 530 538 653 661 669 677 792 800
808 816 931 939 947 955 1070 1078 1086 1094 1209 1217 1225 1233
1348 1356 1364 1372 1487 1495 1503 1511 1626 1634 1642 1650 1765 1773
1781 1789 1904 1912 1920 1928 2043 2051 2059 2067 2182 2190 2198 2206
2321 2329 2337 2345 2460 2468 2476 2484
.LSDQ 404 412 420 428 543 551 559 567 682 690 698 706 821 829
837 845 960 968 976 984 1099 1107 1115 1123 1238 1246 1254 1262
1377 1385 1393 1401 1516 1524 1532 1540 1655 1663 1671 1679 1794 1802
1810 1818 1933 1941 1949 1957 2072 2080 2088 2096 2211 2219 2227 2235
2350 2358 2366 2374 2489 2497 2505 2513
.LSKCN 110 112 114 116 118 120 122 124 126 128 130 132 134 136
138 140 142 305 309 313 317 321 325 329 333 338 342 346
350 354 358 362 366 371 375 379 383 387 391 395 399 404
408 412 416 420 424 428 432 444 448 452 456 460 464 468
472 477 481 485 489 493 497 501 505 510 514 518 522 526
530 534 538 543 547 551 555 559 563 567 571 583 587 591
595 599 603 607 611 616 620 624 628 632 636 640 644 649
653 657 661 665 669 673 677 682 686 690 694 698 702 706
710 722 726 730 734 738 742 746 750 755 759 763 767 771
775 779 783 788 792 796 800 804 808 812 816 821 825 829
833 837 841 845 849 861 865 869 873 877 881 885 889 894
898 902 906 910 914 918 922 927 931 935 939 943 947 951
955 960 964 968 972 976 980 984 988 1000 1004 1008 1012 1016
1020 1024 1028 1033 1037 1041 1045 1049 1053 1057 1061 1066 1070 1074
1078 1082 1086 1090 1094 1099 1103 1107 1111 1115 1119 1123 1127 1139
1143 1147 1151 1155 1159 1163 1167 1172 1176 1180 1184 1188 1192 1196
1200 1205 1209 1213 1217 1221 1225 1229 1233 1238 1242 1246 1250 1254
1258 1262 1266 1278 1282 1286 1290 1294 1298 1302 1306 1311 1315 1319
1323 1327 1331 1335 1339 1344 1348 1352 1356 1360 1364 1368 1372 1377
1381 1385 1389 1393 1397 1401 1405 1417 1421 1425 1429 1433 1437 1441
1445 1450 1454 1458 1462 1466 1470 1474 1478 1483 1487 1491 1495 1499
1503 1507 1511 1516 1520 1524 1528 1532 1536 1540 1544 1556 1560 1564
1568 1572 1576 1580 1584 1589 1593 1597 1601 1605 1609 1613 1617 1622
1626 1630 1634 1638 1642 1646 1650 1655 1659 1663 1667 1671 1675 1679
1683 1695 1699 1703 1707 1711 1715 1719 1723 1728 1732 1736 1740 1744
1748 1752 1756 1761 1765 1769 1773 1777 1781 1785 1789 1794 1798 1802
1806 1810 1814 1818 1822 1834 1838 1842 1846 1850 1854 1858 1862 1867
1871 1875 1879 1883 1887 1891 1895 1900 1904 1908 1912 1916 1920 1924
1928 1933 1937 1941 1945 1949 1953 1957 1961 1973 1977 1981 1985 1989
1993 1997 2001 2006 2010 2014 2018 2022 2026 2030 2034 2039 2043 2047
2051 2055 2059 2063 2067 2072 2076 2080 2084 2088 2092 2096 2100 2112
2116 2120 2124 2128 2132 2136 2140 2145 2149 2153 2157 2161 2165 2169
2173 2178 2182 2186 2190 2194 2198 2202 2206 2211 2215 2219 2223 2227
2231 2235 2239 2251 2255 2259 2263 2267 2271 2275 2279 2284 2288 2292
2296 2300 2304 2308 2312 2317 2321 2325 2329 2333 2337 2341 2345 2350
2354 2358 2362 2366 2370 2374 2378 2390 2394 2398 2402 2406 2410 2414
2418 2423 2427 2431 2435 2439 2443 2447 2451 2456 2460 2464 2468 2472
2476 2480 2484 2489 2493 2497 2501 2505 2509 2513 2517 SEQ 1263
.LSMIN 309 362 375 428 448 501 514 567 587 640 653 706 726 779
792 845 865 918 931 984 1004 1057 1070 1123 1143 1196 1209 1262
1282 1335 1348 1401 1421 1474 1487 1540 1560 1613 1626 1679 1699 1752
1765 1818 1838 1891 1904 1957 1977 2030 2043 2096 2116 2169 2182 2235
2255 2308 2321 2374 2394 2447 2460 2513
.LXNOR 333 338 399 404 472 477 538 543 611 616 677 682 750 755
816 821 889 894 955 960 1028 1033 1094 1099 1167 1172 1233 1238
1306 1311 1372 1377 1445 1450 1511 1516 1584 1589 1650 1655 1723 1728
1789 1794 1862 1867 1928 1933 2001 2006 2067 2072 2140 2145 2206 2211
2279 2284 2345 2350 2418 2423 2484 2489
.LXOR 329 342 395 408 468 481 534 547 607 620 673 686 746 759
812 825 885 898 951 964 1024 1037 1090 1103 1163 1176 1229 1242
1302 1315 1368 1381 1441 1454 1507 1520 1580 1593 1646 1659 1719 1732
1785 1798 1858 1871 1924 1937 1997 2010 2063 2076 2136 2149 2202 2215
2275 2288 2341 2354 2414 2427 2480 2493
.MA 158 167 176 185 194 203 212 221 230 239 248 257 266 275
284 302 305 307 309 311 313 315 317 319 321 323 325 327
329 331 333 335 338 340 342 344 346 348 350 352 354 356
358 360 362 364 366 368 371 373 375 377 379 381 383 385
387 389 391 393 395 397 399 401 404 406 408 410 412 414
416 418 420 422 424 426 428 430 432 434 441 444 446 448
450 452 454 456 458 460 462 464 466 468 470 472 474 477
479 481 483 485 487 489 491 493 495 497 499 501 503 505
507 510 512 514 516 518 520 522 524 526 528 530 532 534
536 538 540 543 545 547 549 551 553 555 557 559 561 563
565 567 569 571 573 580 583 585 587 589 591 593 595 597
599 601 603 605 607 609 611 613 616 618 620 622 624 626
628 630 632 634 636 638 640 642 644 646 649 651 653 655
657 659 661 663 665 667 669 671 673 675 677 679 682 684
686 688 690 692 694 696 698 700 702 704 706 708 710 712
719 722 724 726 728 730 732 734 736 738 740 742 744 746
748 750 752 755 757 759 761 763 765 767 769 771 773 775
777 779 781 783 785 788 790 792 794 796 798 800 802 804
806 808 810 812 814 816 818 821 823 825 827 829 831 833
835 837 839 841 843 845 847 849 851 858 861 863 865 867
869 871 873 875 877 879 881 883 885 887 889 891 894 896
898 900 902 904 906 908 910 912 914 916 918 920 922 924
927 929 931 933 935 937 939 941 943 945 947 949 951 953
955 957 960 962 964 966 968 970 972 974 976 978 980 982
984 986 988 990 997 1000 1002 1004 1006 1008 1010 1012 1014 1016
1018 1020 1022 1024 1026 1028 1030 1033 1035 1037 1039 1041 1043 1045
1047 1049 1051 1053 1055 1057 1059 1061 1063 1066 1068 1070 1072 1074
1076 1078 1080 1082 1084 1086 1088 1090 1092 1094 1096 1099 1101 1103
1105 1107 1109 1111 1113 1115 1117 1119 1121 1123 1125 1127 1129 1136
1139 1141 1143 1145 1147 1149 1151 1153 1155 1157 1159 1161 1163 1165
1167 1169 1172 1174 1176 1178 1180 1182 1184 1186 1188 1190 1192 1194
1196 1198 1200 1202 1205 1207 1209 1211 1213 1215 1217 1219 1221 1223
1225 1227 1229 1231 1233 1235 1238 1240 1242 1244 1246 1248 1250 1252
1254 1256 1258 1260 1262 1264 1266 1268 1275 1278 1280 1282 1284 1286
1288 1290 1292 1294 1296 1298 1300 1302 1304 1306 1308 1311 1313 1315
1317 1319 1321 1323 1325 1327 1329 1331 1333 1335 1337 1339 1341 1344
1346 1348 1350 1352 1354 1356 1358 1360 1362 1364 1366 1368 1370 1372
1374 1377 1379 1381 1383 1385 1387 1389 1391 1393 1395 1397 1399 1401 SEQ 1264
1403 1405 1407 1414 1417 1419 1421 1423 1425 1427 1429 1431 1433 1435
1437 1439 1441 1443 1445 1447 1450 1452 1454 1456 1458 1460 1462 1464
1466 1468 1470 1472 1474 1476 1478 1480 1483 1485 1487 1489 1491 1493
1495 1497 1499 1501 1503 1505 1507 1509 1511 1513 1516 1518 1520 1522
1524 1526 1528 1530 1532 1534 1536 1538 1540 1542 1544 1546 1553 1556
1558 1560 1562 1564 1566 1568 1570 1572 1574 1576 1578 1580 1582 1584
1586 1589 1591 1593 1595 1597 1599 1601 1603 1605 1607 1609 1611 1613
1615 1617 1619 1622 1624 1626 1628 1630 1632 1634 1636 1638 1640 1642
1644 1646 1648 1650 1652 1655 1657 1659 1661 1663 1665 1667 1669 1671
1673 1675 1677 1679 1681 1683 1685 1692 1695 1697 1699 1701 1703 1705
1707 1709 1711 1713 1715 1717 1719 1721 1723 1725 1728 1730 1732 1734
1736 1738 1740 1742 1744 1746 1748 1750 1752 1754 1756 1758 1761 1763
1765 1767 1769 1771 1773 1775 1777 1779 1781 1783 1785 1787 1789 1791
1794 1796 1798 1800 1802 1804 1806 1808 1810 1812 1814 1816 1818 1820
1822 1824 1831 1834 1836 1838 1840 1842 1844 1846 1848 1850 1852 1854
1856 1858 1860 1862 1864 1867 1869 1871 1873 1875 1877 1879 1881 1883
1885 1887 1889 1891 1893 1895 1897 1900 1902 1904 1906 1908 1910 1912
1914 1916 1918 1920 1922 1924 1926 1928 1930 1933 1935 1937 1939 1941
1943 1945 1947 1949 1951 1953 1955 1957 1959 1961 1963 1970 1973 1975
1977 1979 1981 1983 1985 1987 1989 1991 1993 1995 1997 1999 2001 2003
2006 2008 2010 2012 2014 2016 2018 2020 2022 2024 2026 2028 2030 2032
2034 2036 2039 2041 2043 2045 2047 2049 2051 2053 2055 2057 2059 2061
2063 2065 2067 2069 2072 2074 2076 2078 2080 2082 2084 2086 2088 2090
2092 2094 2096 2098 2100 2102 2109 2112 2114 2116 2118 2120 2122 2124
2126 2128 2130 2132 2134 2136 2138 2140 2142 2145 2147 2149 2151 2153
2155 2157 2159 2161 2163 2165 2167 2169 2171 2173 2175 2178 2180 2182
2184 2186 2188 2190 2192 2194 2196 2198 2200 2202 2204 2206 2208 2211
2213 2215 2217 2219 2221 2223 2225 2227 2229 2231 2233 2235 2237 2239
2241 2248 2251 2253 2255 2257 2259 2261 2263 2265 2267 2269 2271 2273
2275 2277 2279 2281 2284 2286 2288 2290 2292 2294 2296 2298 2300 2302
2304 2306 2308 2310 2312 2314 2317 2319 2321 2323 2325 2327 2329 2331
2333 2335 2337 2339 2341 2343 2345 2347 2350 2352 2354 2356 2358 2360
2362 2364 2366 2368 2370 2372 2374 2376 2378 2380 2387 2390 2392 2394
2396 2398 2400 2402 2404 2406 2408 2410 2412 2414 2416 2418 2420 2423
2425 2427 2429 2431 2433 2435 2437 2439 2441 2443 2445 2447 2449 2451
2453 2456 2458 2460 2462 2464 2466 2468 2470 2472 2474 2476 2478 2480
2482 2484 2486 2489 2491 2493 2495 2497 2499 2501 2503 2505 2507 2509
2511 2513 2515 2517 2519
.MAND 302 321 350 387 416 441 460 489 526 555 580 599 628 665
694 719 738 767 804 833 858 877 906 943 972 997 1016 1045
1082 1111 1136 1155 1184 1221 1250 1275 1294 1323 1360 1389 1414 1433
1462 1499 1528 1553 1572 1601 1638 1667 1692 1711 1740 1777 1806 1831
1850 1879 1916 1945 1970 1989 2018 2055 2084 2109 2128 2157 2194 2223
2248 2267 2296 2333 2362 2387 2406 2435 2472 2501
.MB 110 112 114 116 118 120 122 124 126 128 130 132 134 136
138 140 142 302 305 309 313 317 321 325 329 333 338 342
346 350 354 358 362 366 371 375 379 383 387 391 395 399
404 408 412 416 420 424 428 432 441 444 448 452 456 460
464 468 472 477 481 485 489 493 497 501 505 510 514 518
522 526 530 534 538 543 547 551 555 559 563 567 571 580
583 587 591 595 599 603 607 611 616 620 624 628 632 636
640 644 649 653 657 661 665 669 673 677 682 686 690 694
698 702 706 710 719 722 726 730 734 738 742 746 750 755 SEQ 1265
759 763 767 771 775 779 783 788 792 796 800 804 808 812
816 821 825 829 833 837 841 845 849 858 861 865 869 873
877 881 885 889 894 898 902 906 910 914 918 922 927 931
935 939 943 947 951 955 960 964 968 972 976 980 984 988
997 1000 1004 1008 1012 1016 1020 1024 1028 1033 1037 1041 1045 1049
1053 1057 1061 1066 1070 1074 1078 1082 1086 1090 1094 1099 1103 1107
1111 1115 1119 1123 1127 1136 1139 1143 1147 1151 1155 1159 1163 1167
1172 1176 1180 1184 1188 1192 1196 1200 1205 1209 1213 1217 1221 1225
1229 1233 1238 1242 1246 1250 1254 1258 1262 1266 1275 1278 1282 1286
1290 1294 1298 1302 1306 1311 1315 1319 1323 1327 1331 1335 1339 1344
1348 1352 1356 1360 1364 1368 1372 1377 1381 1385 1389 1393 1397 1401
1405 1414 1417 1421 1425 1429 1433 1437 1441 1445 1450 1454 1458 1462
1466 1470 1474 1478 1483 1487 1491 1495 1499 1503 1507 1511 1516 1520
1524 1528 1532 1536 1540 1544 1553 1556 1560 1564 1568 1572 1576 1580
1584 1589 1593 1597 1601 1605 1609 1613 1617 1622 1626 1630 1634 1638
1642 1646 1650 1655 1659 1663 1667 1671 1675 1679 1683 1692 1695 1699
1703 1707 1711 1715 1719 1723 1728 1732 1736 1740 1744 1748 1752 1756
1761 1765 1769 1773 1777 1781 1785 1789 1794 1798 1802 1806 1810 1814
1818 1822 1831 1834 1838 1842 1846 1850 1854 1858 1862 1867 1871 1875
1879 1883 1887 1891 1895 1900 1904 1908 1912 1916 1920 1924 1928 1933
1937 1941 1945 1949 1953 1957 1961 1970 1973 1977 1981 1985 1989 1993
1997 2001 2006 2010 2014 2018 2022 2026 2030 2034 2039 2043 2047 2051
2055 2059 2063 2067 2072 2076 2080 2084 2088 2092 2096 2100 2109 2112
2116 2120 2124 2128 2132 2136 2140 2145 2149 2153 2157 2161 2165 2169
2173 2178 2182 2186 2190 2194 2198 2202 2206 2211 2215 2219 2223 2227
2231 2235 2239 2248 2251 2255 2259 2263 2267 2271 2275 2279 2284 2288
2292 2296 2300 2304 2308 2312 2317 2321 2325 2329 2333 2337 2341 2345
2350 2354 2358 2362 2366 2370 2374 2378 2387 2390 2394 2398 2402 2406
2410 2414 2418 2423 2427 2431 2435 2439 2443 2447 2451 2456 2460 2464
2468 2472 2476 2480 2484 2489 2493 2497 2501 2505 2509 2513 2517
.MBAD 151 160 169 178 187 196 205 214 223 232 241 250 259 268
277 286 293 295
.MCCFZ 149 158 167 176 185 194 203 212 221 230 239 248 257 266
275 284
.MCENA 149 158 167 176 185 194 203 212 221 230 239 248 257 266
275 284
.MCJS 300 307 311 315 319 323 327 331 335 340 344 348 352 356
360 364 368 373 377 381 385 389 393 397 401 406 410 414
418 422 426 430 434 439 446 450 454 458 462 466 470 474
479 483 487 491 495 499 503 507 512 516 520 524 528 532
536 540 545 549 553 557 561 565 569 573 578 585 589 593
597 601 605 609 613 618 622 626 630 634 638 642 646 651
655 659 663 667 671 675 679 684 688 692 696 700 704 708
712 717 724 728 732 736 740 744 748 752 757 761 765 769
773 777 781 785 790 794 798 802 806 810 814 818 823 827
831 835 839 843 847 851 856 863 867 871 875 879 883 887
891 896 900 904 908 912 916 920 924 929 933 937 941 945
949 953 957 962 966 970 974 978 982 986 990 995 1002 1006
1010 1014 1018 1022 1026 1030 1035 1039 1043 1047 1051 1055 1059 1063
1068 1072 1076 1080 1084 1088 1092 1096 1101 1105 1109 1113 1117 1121
1125 1129 1134 1141 1145 1149 1153 1157 1161 1165 1169 1174 1178 1182
1186 1190 1194 1198 1202 1207 1211 1215 1219 1223 1227 1231 1235 1240
1244 1248 1252 1256 1260 1264 1268 1273 1280 1284 1288 1292 1296 1300 SEQ 1266
1304 1308 1313 1317 1321 1325 1329 1333 1337 1341 1346 1350 1354 1358
1362 1366 1370 1374 1379 1383 1387 1391 1395 1399 1403 1407 1412 1419
1423 1427 1431 1435 1439 1443 1447 1452 1456 1460 1464 1468 1472 1476
1480 1485 1489 1493 1497 1501 1505 1509 1513 1518 1522 1526 1530 1534
1538 1542 1546 1551 1558 1562 1566 1570 1574 1578 1582 1586 1591 1595
1599 1603 1607 1611 1615 1619 1624 1628 1632 1636 1640 1644 1648 1652
1657 1661 1665 1669 1673 1677 1681 1685 1690 1697 1701 1705 1709 1713
1717 1721 1725 1730 1734 1738 1742 1746 1750 1754 1758 1763 1767 1771
1775 1779 1783 1787 1791 1796 1800 1804 1808 1812 1816 1820 1824 1829
1836 1840 1844 1848 1852 1856 1860 1864 1869 1873 1877 1881 1885 1889
1893 1897 1902 1906 1910 1914 1918 1922 1926 1930 1935 1939 1943 1947
1951 1955 1959 1963 1968 1975 1979 1983 1987 1991 1995 1999 2003 2008
2012 2016 2020 2024 2028 2032 2036 2041 2045 2049 2053 2057 2061 2065
2069 2074 2078 2082 2086 2090 2094 2098 2102 2107 2114 2118 2122 2126
2130 2134 2138 2142 2147 2151 2155 2159 2163 2167 2171 2175 2180 2184
2188 2192 2196 2200 2204 2208 2213 2217 2221 2225 2229 2233 2237 2241
2246 2253 2257 2261 2265 2269 2273 2277 2281 2286 2290 2294 2298 2302
2306 2310 2314 2319 2323 2327 2331 2335 2339 2343 2347 2352 2356 2360
2364 2368 2372 2376 2380 2385 2392 2396 2400 2404 2408 2412 2416 2420
2425 2429 2433 2437 2441 2445 2449 2453 2458 2462 2466 2470 2474 2478
2482 2486 2491 2495 2499 2503 2507 2511 2515 2519
.MCJV 149 158 167 176 185 194 203 212 221 230 239 248 257 266
275 284
.MCONT 110 112 114 116 118 120 122 124 126 128 130 132 134 136
138 140 142 302 305 309 313 317 321 325 329 333 338 342
346 350 354 358 362 366 371 375 379 383 387 391 395 399
404 408 412 416 420 424 428 432 441 444 448 452 456 460
464 468 472 477 481 485 489 493 497 501 505 510 514 518
522 526 530 534 538 543 547 551 555 559 563 567 571 580
583 587 591 595 599 603 607 611 616 620 624 628 632 636
640 644 649 653 657 661 665 669 673 677 682 686 690 694
698 702 706 710 719 722 726 730 734 738 742 746 750 755
759 763 767 771 775 779 783 788 792 796 800 804 808 812
816 821 825 829 833 837 841 845 849 858 861 865 869 873
877 881 885 889 894 898 902 906 910 914 918 922 927 931
935 939 943 947 951 955 960 964 968 972 976 980 984 988
997 1000 1004 1008 1012 1016 1020 1024 1028 1033 1037 1041 1045 1049
1053 1057 1061 1066 1070 1074 1078 1082 1086 1090 1094 1099 1103 1107
1111 1115 1119 1123 1127 1136 1139 1143 1147 1151 1155 1159 1163 1167
1172 1176 1180 1184 1188 1192 1196 1200 1205 1209 1213 1217 1221 1225
1229 1233 1238 1242 1246 1250 1254 1258 1262 1266 1275 1278 1282 1286
1290 1294 1298 1302 1306 1311 1315 1319 1323 1327 1331 1335 1339 1344
1348 1352 1356 1360 1364 1368 1372 1377 1381 1385 1389 1393 1397 1401
1405 1414 1417 1421 1425 1429 1433 1437 1441 1445 1450 1454 1458 1462
1466 1470 1474 1478 1483 1487 1491 1495 1499 1503 1507 1511 1516 1520
1524 1528 1532 1536 1540 1544 1553 1556 1560 1564 1568 1572 1576 1580
1584 1589 1593 1597 1601 1605 1609 1613 1617 1622 1626 1630 1634 1638
1642 1646 1650 1655 1659 1663 1667 1671 1675 1679 1683 1692 1695 1699
1703 1707 1711 1715 1719 1723 1728 1732 1736 1740 1744 1748 1752 1756
1761 1765 1769 1773 1777 1781 1785 1789 1794 1798 1802 1806 1810 1814
1818 1822 1831 1834 1838 1842 1846 1850 1854 1858 1862 1867 1871 1875
1879 1883 1887 1891 1895 1900 1904 1908 1912 1916 1920 1924 1928 1933
1937 1941 1945 1949 1953 1957 1961 1970 1973 1977 1981 1985 1989 1993 SEQ 1267
1997 2001 2006 2010 2014 2018 2022 2026 2030 2034 2039 2043 2047 2051
2055 2059 2063 2067 2072 2076 2080 2084 2088 2092 2096 2100 2109 2112
2116 2120 2124 2128 2132 2136 2140 2145 2149 2153 2157 2161 2165 2169
2173 2178 2182 2186 2190 2194 2198 2202 2206 2211 2215 2219 2223 2227
2231 2235 2239 2248 2251 2255 2259 2263 2267 2271 2275 2279 2284 2288
2292 2296 2300 2304 2308 2312 2317 2321 2325 2329 2333 2337 2341 2345
2350 2354 2358 2362 2366 2370 2374 2378 2387 2390 2394 2398 2402 2406
2410 2414 2418 2423 2427 2431 2435 2439 2443 2447 2451 2456 2460 2464
2468 2472 2476 2480 2484 2489 2493 2497 2501 2505 2509 2513 2517
.MCRTN 144 153 162 171 180 189 198 207 216 225 234 243 252 261
270 279 288
.MD 110 112 114 116 118 120 122 124 126 128 130 132 134 136
138 140 142 144 149 158 167 176 185 194 203 212 221 230
239 248 257 266 275 284 302 305 307 309 311 313 315 317
319 321 323 325 327 329 331 333 335 338 340 342 344 346
348 350 352 354 356 358 360 362 364 366 368 371 373 375
377 379 381 383 385 387 389 391 393 395 397 399 401 404
406 408 410 412 414 416 418 420 422 424 426 428 430 432
434 441 444 446 448 450 452 454 456 458 460 462 464 466
468 470 472 474 477 479 481 483 485 487 489 491 493 495
497 499 501 503 505 507 510 512 514 516 518 520 522 524
526 528 530 532 534 536 538 540 543 545 547 549 551 553
555 557 559 561 563 565 567 569 571 573 580 583 585 587
589 591 593 595 597 599 601 603 605 607 609 611 613 616
618 620 622 624 626 628 630 632 634 636 638 640 642 644
646 649 651 653 655 657 659 661 663 665 667 669 671 673
675 677 679 682 684 686 688 690 692 694 696 698 700 702
704 706 708 710 712 719 722 724 726 728 730 732 734 736
738 740 742 744 746 748 750 752 755 757 759 761 763 765
767 769 771 773 775 777 779 781 783 785 788 790 792 794
796 798 800 802 804 806 808 810 812 814 816 818 821 823
825 827 829 831 833 835 837 839 841 843 845 847 849 851
858 861 863 865 867 869 871 873 875 877 879 881 883 885
887 889 891 894 896 898 900 902 904 906 908 910 912 914
916 918 920 922 924 927 929 931 933 935 937 939 941 943
945 947 949 951 953 955 957 960 962 964 966 968 970 972
974 976 978 980 982 984 986 988 990 997 1000 1002 1004 1006
1008 1010 1012 1014 1016 1018 1020 1022 1024 1026 1028 1030 1033 1035
1037 1039 1041 1043 1045 1047 1049 1051 1053 1055 1057 1059 1061 1063
1066 1068 1070 1072 1074 1076 1078 1080 1082 1084 1086 1088 1090 1092
1094 1096 1099 1101 1103 1105 1107 1109 1111 1113 1115 1117 1119 1121
1123 1125 1127 1129 1136 1139 1141 1143 1145 1147 1149 1151 1153 1155
1157 1159 1161 1163 1165 1167 1169 1172 1174 1176 1178 1180 1182 1184
1186 1188 1190 1192 1194 1196 1198 1200 1202 1205 1207 1209 1211 1213
1215 1217 1219 1221 1223 1225 1227 1229 1231 1233 1235 1238 1240 1242
1244 1246 1248 1250 1252 1254 1256 1258 1260 1262 1264 1266 1268 1275
1278 1280 1282 1284 1286 1288 1290 1292 1294 1296 1298 1300 1302 1304
1306 1308 1311 1313 1315 1317 1319 1321 1323 1325 1327 1329 1331 1333
1335 1337 1339 1341 1344 1346 1348 1350 1352 1354 1356 1358 1360 1362
1364 1366 1368 1370 1372 1374 1377 1379 1381 1383 1385 1387 1389 1391
1393 1395 1397 1399 1401 1403 1405 1407 1414 1417 1419 1421 1423 1425
1427 1429 1431 1433 1435 1437 1439 1441 1443 1445 1447 1450 1452 1454
1456 1458 1460 1462 1464 1466 1468 1470 1472 1474 1476 1478 1480 1483 SEQ 1268
1485 1487 1489 1491 1493 1495 1497 1499 1501 1503 1505 1507 1509 1511
1513 1516 1518 1520 1522 1524 1526 1528 1530 1532 1534 1536 1538 1540
1542 1544 1546 1553 1556 1558 1560 1562 1564 1566 1568 1570 1572 1574
1576 1578 1580 1582 1584 1586 1589 1591 1593 1595 1597 1599 1601 1603
1605 1607 1609 1611 1613 1615 1617 1619 1622 1624 1626 1628 1630 1632
1634 1636 1638 1640 1642 1644 1646 1648 1650 1652 1655 1657 1659 1661
1663 1665 1667 1669 1671 1673 1675 1677 1679 1681 1683 1685 1692 1695
1697 1699 1701 1703 1705 1707 1709 1711 1713 1715 1717 1719 1721 1723
1725 1728 1730 1732 1734 1736 1738 1740 1742 1744 1746 1748 1750 1752
1754 1756 1758 1761 1763 1765 1767 1769 1771 1773 1775 1777 1779 1781
1783 1785 1787 1789 1791 1794 1796 1798 1800 1802 1804 1806 1808 1810
1812 1814 1816 1818 1820 1822 1824 1831 1834 1836 1838 1840 1842 1844
1846 1848 1850 1852 1854 1856 1858 1860 1862 1864 1867 1869 1871 1873
1875 1877 1879 1881 1883 1885 1887 1889 1891 1893 1895 1897 1900 1902
1904 1906 1908 1910 1912 1914 1916 1918 1920 1922 1924 1926 1928 1930
1933 1935 1937 1939 1941 1943 1945 1947 1949 1951 1953 1955 1957 1959
1961 1963 1970 1973 1975 1977 1979 1981 1983 1985 1987 1989 1991 1993
1995 1997 1999 2001 2003 2006 2008 2010 2012 2014 2016 2018 2020 2022
2024 2026 2028 2030 2032 2034 2036 2039 2041 2043 2045 2047 2049 2051
2053 2055 2057 2059 2061 2063 2065 2067 2069 2072 2074 2076 2078 2080
2082 2084 2086 2088 2090 2092 2094 2096 2098 2100 2102 2109 2112 2114
2116 2118 2120 2122 2124 2126 2128 2130 2132 2134 2136 2138 2140 2142
2145 2147 2149 2151 2153 2155 2157 2159 2161 2163 2165 2167 2169 2171
2173 2175 2178 2180 2182 2184 2186 2188 2190 2192 2194 2196 2198 2200
2202 2204 2206 2208 2211 2213 2215 2217 2219 2221 2223 2225 2227 2229
2231 2233 2235 2237 2239 2241 2248 2251 2253 2255 2257 2259 2261 2263
2265 2267 2269 2271 2273 2275 2277 2279 2281 2284 2286 2288 2290 2292
2294 2296 2298 2300 2302 2304 2306 2308 2310 2312 2314 2317 2319 2321
2323 2325 2327 2329 2331 2333 2335 2337 2339 2341 2343 2345 2347 2350
2352 2354 2356 2358 2360 2362 2364 2366 2368 2370 2372 2374 2376 2378
2380 2387 2390 2392 2394 2396 2398 2400 2402 2404 2406 2408 2410 2412
2414 2416 2418 2420 2423 2425 2427 2429 2431 2433 2435 2437 2439 2441
2443 2445 2447 2449 2451 2453 2456 2458 2460 2462 2464 2466 2468 2470
2472 2474 2476 2478 2480 2482 2484 2486 2489 2491 2493 2495 2497 2499
2501 2503 2505 2507 2509 2511 2513 2515 2517 2519
.MJ 102 149 151 158 160 167 169 176 178 185 187 194 196 203
205 212 214 221 223 230 232 239 241 248 250 257 259 266
268 275 277 284 286 293 295 300 307 311 315 319 323 327
331 335 340 344 348 352 356 360 364 368 373 377 381 385
389 393 397 401 406 410 414 418 422 426 430 434 439 446
450 454 458 462 466 470 474 479 483 487 491 495 499 503
507 512 516 520 524 528 532 536 540 545 549 553 557 561
565 569 573 578 585 589 593 597 601 605 609 613 618 622
626 630 634 638 642 646 651 655 659 663 667 671 675 679
684 688 692 696 700 704 708 712 717 724 728 732 736 740
744 748 752 757 761 765 769 773 777 781 785 790 794 798
802 806 810 814 818 823 827 831 835 839 843 847 851 856
863 867 871 875 879 883 887 891 896 900 904 908 912 916
920 924 929 933 937 941 945 949 953 957 962 966 970 974
978 982 986 990 995 1002 1006 1010 1014 1018 1022 1026 1030 1035
1039 1043 1047 1051 1055 1059 1063 1068 1072 1076 1080 1084 1088 1092
1096 1101 1105 1109 1113 1117 1121 1125 1129 1134 1141 1145 1149 1153
1157 1161 1165 1169 1174 1178 1182 1186 1190 1194 1198 1202 1207 1211 SEQ 1269
1215 1219 1223 1227 1231 1235 1240 1244 1248 1252 1256 1260 1264 1268
1273 1280 1284 1288 1292 1296 1300 1304 1308 1313 1317 1321 1325 1329
1333 1337 1341 1346 1350 1354 1358 1362 1366 1370 1374 1379 1383 1387
1391 1395 1399 1403 1407 1412 1419 1423 1427 1431 1435 1439 1443 1447
1452 1456 1460 1464 1468 1472 1476 1480 1485 1489 1493 1497 1501 1505
1509 1513 1518 1522 1526 1530 1534 1538 1542 1546 1551 1558 1562 1566
1570 1574 1578 1582 1586 1591 1595 1599 1603 1607 1611 1615 1619 1624
1628 1632 1636 1640 1644 1648 1652 1657 1661 1665 1669 1673 1677 1681
1685 1690 1697 1701 1705 1709 1713 1717 1721 1725 1730 1734 1738 1742
1746 1750 1754 1758 1763 1767 1771 1775 1779 1783 1787 1791 1796 1800
1804 1808 1812 1816 1820 1824 1829 1836 1840 1844 1848 1852 1856 1860
1864 1869 1873 1877 1881 1885 1889 1893 1897 1902 1906 1910 1914 1918
1922 1926 1930 1935 1939 1943 1947 1951 1955 1959 1963 1968 1975 1979
1983 1987 1991 1995 1999 2003 2008 2012 2016 2020 2024 2028 2032 2036
2041 2045 2049 2053 2057 2061 2065 2069 2074 2078 2082 2086 2090 2094
2098 2102 2107 2114 2118 2122 2126 2130 2134 2138 2142 2147 2151 2155
2159 2163 2167 2171 2175 2180 2184 2188 2192 2196 2200 2204 2208 2213
2217 2221 2225 2229 2233 2237 2241 2246 2253 2257 2261 2265 2269 2273
2277 2281 2286 2290 2294 2298 2302 2306 2310 2314 2319 2323 2327 2331
2335 2339 2343 2347 2352 2356 2360 2364 2368 2372 2376 2380 2385 2392
2396 2400 2404 2408 2412 2416 2420 2425 2429 2433 2437 2441 2445 2449
2453 2458 2462 2466 2470 2474 2478 2482 2486 2491 2495 2499 2503 2507
2511 2515 2519 2521
.MJMAP 102 151 160 169 178 187 196 205 214 223 232 241 250 259
268 277 286 293 295 2521
.MJZ 104
.MMGC 110 112 114 116 118 120 122 124 126 128 130 132 134 136
138 140 142 305 309 313 317 321 325 329 333 338 342 346
350 354 358 362 366 371 375 379 383 387 391 395 399 404
408 412 416 420 424 428 432 444 448 452 456 460 464 468
472 477 481 485 489 493 497 501 505 510 514 518 522 526
530 534 538 543 547 551 555 559 563 567 571 583 587 591
595 599 603 607 611 616 620 624 628 632 636 640 644 649
653 657 661 665 669 673 677 682 686 690 694 698 702 706
710 722 726 730 734 738 742 746 750 755 759 763 767 771
775 779 783 788 792 796 800 804 808 812 816 821 825 829
833 837 841 845 849 861 865 869 873 877 881 885 889 894
898 902 906 910 914 918 922 927 931 935 939 943 947 951
955 960 964 968 972 976 980 984 988 1000 1004 1008 1012 1016
1020 1024 1028 1033 1037 1041 1045 1049 1053 1057 1061 1066 1070 1074
1078 1082 1086 1090 1094 1099 1103 1107 1111 1115 1119 1123 1127 1139
1143 1147 1151 1155 1159 1163 1167 1172 1176 1180 1184 1188 1192 1196
1200 1205 1209 1213 1217 1221 1225 1229 1233 1238 1242 1246 1250 1254
1258 1262 1266 1278 1282 1286 1290 1294 1298 1302 1306 1311 1315 1319
1323 1327 1331 1335 1339 1344 1348 1352 1356 1360 1364 1368 1372 1377
1381 1385 1389 1393 1397 1401 1405 1417 1421 1425 1429 1433 1437 1441
1445 1450 1454 1458 1462 1466 1470 1474 1478 1483 1487 1491 1495 1499
1503 1507 1511 1516 1520 1524 1528 1532 1536 1540 1544 1556 1560 1564
1568 1572 1576 1580 1584 1589 1593 1597 1601 1605 1609 1613 1617 1622
1626 1630 1634 1638 1642 1646 1650 1655 1659 1663 1667 1671 1675 1679
1683 1695 1699 1703 1707 1711 1715 1719 1723 1728 1732 1736 1740 1744
1748 1752 1756 1761 1765 1769 1773 1777 1781 1785 1789 1794 1798 1802
1806 1810 1814 1818 1822 1834 1838 1842 1846 1850 1854 1858 1862 1867 SEQ 1270
1871 1875 1879 1883 1887 1891 1895 1900 1904 1908 1912 1916 1920 1924
1928 1933 1937 1941 1945 1949 1953 1957 1961 1973 1977 1981 1985 1989
1993 1997 2001 2006 2010 2014 2018 2022 2026 2030 2034 2039 2043 2047
2051 2055 2059 2063 2067 2072 2076 2080 2084 2088 2092 2096 2100 2112
2116 2120 2124 2128 2132 2136 2140 2145 2149 2153 2157 2161 2165 2169
2173 2178 2182 2186 2190 2194 2198 2202 2206 2211 2215 2219 2223 2227
2231 2235 2239 2251 2255 2259 2263 2267 2271 2275 2279 2284 2288 2292
2296 2300 2304 2308 2312 2317 2321 2325 2329 2333 2337 2341 2345 2350
2354 2358 2362 2366 2370 2374 2378 2390 2394 2398 2402 2406 2410 2414
2418 2423 2427 2431 2435 2439 2443 2447 2451 2456 2460 2464 2468 2472
2476 2480 2484 2489 2493 2497 2501 2505 2509 2513 2517
.MNAND 325 346 391 412 464 485 530 551 603 624 669 690 742 763
808 829 881 902 947 968 1020 1041 1086 1107 1159 1180 1225 1246
1298 1319 1364 1385 1437 1458 1503 1524 1576 1597 1642 1663 1715 1736
1781 1802 1854 1875 1920 1941 1993 2014 2059 2080 2132 2153 2198 2219
2271 2292 2337 2358 2410 2431 2476 2497
.MOR 110 112 114 116 118 120 122 124 126 128 130 132 134 136
138 140 142 149 158 167 176 185 194 203 212 221 230 239
248 257 266 275 284 307 311 315 317 319 323 327 331 335
340 344 348 352 354 356 360 364 368 373 377 381 383 385
389 393 397 401 406 410 414 418 420 422 426 430 434 446
450 454 456 458 462 466 470 474 479 483 487 491 493 495
499 503 507 512 516 520 522 524 528 532 536 540 545 549
553 557 559 561 565 569 573 585 589 593 595 597 601 605
609 613 618 622 626 630 632 634 638 642 646 651 655 659
661 663 667 671 675 679 684 688 692 696 698 700 704 708
712 724 728 732 734 736 740 744 748 752 757 761 765 769
771 773 777 781 785 790 794 798 800 802 806 810 814 818
823 827 831 835 837 839 843 847 851 863 867 871 873 875
879 883 887 891 896 900 904 908 910 912 916 920 924 929
933 937 939 941 945 949 953 957 962 966 970 974 976 978
982 986 990 1002 1006 1010 1012 1014 1018 1022 1026 1030 1035 1039
1043 1047 1049 1051 1055 1059 1063 1068 1072 1076 1078 1080 1084 1088
1092 1096 1101 1105 1109 1113 1115 1117 1121 1125 1129 1141 1145 1149
1151 1153 1157 1161 1165 1169 1174 1178 1182 1186 1188 1190 1194 1198
1202 1207 1211 1215 1217 1219 1223 1227 1231 1235 1240 1244 1248 1252
1254 1256 1260 1264 1268 1280 1284 1288 1290 1292 1296 1300 1304 1308
1313 1317 1321 1325 1327 1329 1333 1337 1341 1346 1350 1354 1356 1358
1362 1366 1370 1374 1379 1383 1387 1391 1393 1395 1399 1403 1407 1419
1423 1427 1429 1431 1435 1439 1443 1447 1452 1456 1460 1464 1466 1468
1472 1476 1480 1485 1489 1493 1495 1497 1501 1505 1509 1513 1518 1522
1526 1530 1532 1534 1538 1542 1546 1558 1562 1566 1568 1570 1574 1578
1582 1586 1591 1595 1599 1603 1605 1607 1611 1615 1619 1624 1628 1632
1634 1636 1640 1644 1648 1652 1657 1661 1665 1669 1671 1673 1677 1681
1685 1697 1701 1705 1707 1709 1713 1717 1721 1725 1730 1734 1738 1742
1744 1746 1750 1754 1758 1763 1767 1771 1773 1775 1779 1783 1787 1791
1796 1800 1804 1808 1810 1812 1816 1820 1824 1836 1840 1844 1846 1848
1852 1856 1860 1864 1869 1873 1877 1881 1883 1885 1889 1893 1897 1902
1906 1910 1912 1914 1918 1922 1926 1930 1935 1939 1943 1947 1949 1951
1955 1959 1963 1975 1979 1983 1985 1987 1991 1995 1999 2003 2008 2012
2016 2020 2022 2024 2028 2032 2036 2041 2045 2049 2051 2053 2057 2061
2065 2069 2074 2078 2082 2086 2088 2090 2094 2098 2102 2114 2118 2122
2124 2126 2130 2134 2138 2142 2147 2151 2155 2159 2161 2163 2167 2171 SEQ 1271
2175 2180 2184 2188 2190 2192 2196 2200 2204 2208 2213 2217 2221 2225
2227 2229 2233 2237 2241 2253 2257 2261 2263 2265 2269 2273 2277 2281
2286 2290 2294 2298 2300 2302 2306 2310 2314 2319 2323 2327 2329 2331
2335 2339 2343 2347 2352 2356 2360 2364 2366 2368 2372 2376 2380 2392
2396 2400 2402 2404 2408 2412 2416 2420 2425 2429 2433 2437 2439 2441
2445 2449 2453 2458 2462 2466 2468 2470 2474 2478 2482 2486 2491 2495
2499 2503 2505 2507 2511 2515 2519
.MPLUS 305 366 371 432 444 505 510 571 583 644 649 710 722 783
788 849 861 922 927 988 1000 1061 1066 1127 1139 1200 1205 1266
1278 1339 1344 1405 1417 1478 1483 1544 1556 1617 1622 1683 1695 1756
1761 1822 1834 1895 1900 1961 1973 2034 2039 2100 2112 2173 2178 2239
2251 2312 2317 2378 2390 2451 2456 2517
.MRMIN 313 358 379 424 452 497 518 563 591 636 657 702 730 775
796 841 869 914 935 980 1008 1053 1074 1119 1147 1192 1213 1258
1286 1331 1352 1397 1425 1470 1491 1536 1564 1609 1630 1675 1703 1748
1769 1814 1842 1887 1908 1953 1981 2026 2047 2092 2120 2165 2186 2231
2259 2304 2325 2370 2398 2443 2464 2509
.MS0A 149 158 167 176 185 194 203 212 221 230 239 248 257 266
275 284 302 307 311 315 319 323 327 331 335 340 344 348
352 356 360 364 368 371 373 377 379 381 385 387 389 393
395 397 401 406 410 414 418 422 426 430 434 441 446 450
454 458 462 466 470 474 479 483 487 491 495 499 503 507
510 512 516 518 520 524 526 528 532 534 536 540 545 549
553 557 561 565 569 573 580 585 589 593 597 601 605 609
613 618 622 626 630 634 638 642 646 649 651 655 657 659
663 665 667 671 673 675 679 684 688 692 696 700 704 708
712 719 724 728 732 736 740 744 748 752 757 761 765 769
773 777 781 785 788 790 794 796 798 802 804 806 810 812
814 818 823 827 831 835 839 843 847 851 858 863 867 871
875 879 883 887 891 896 900 904 908 912 916 920 924 927
929 933 935 937 941 943 945 949 951 953 957 962 966 970
974 978 982 986 990 997 1002 1006 1010 1014 1018 1022 1026 1030
1035 1039 1043 1047 1051 1055 1059 1063 1066 1068 1072 1074 1076 1080
1082 1084 1088 1090 1092 1096 1101 1105 1109 1113 1117 1121 1125 1129
1136 1141 1145 1149 1153 1157 1161 1165 1169 1174 1178 1182 1186 1190
1194 1198 1202 1205 1207 1211 1213 1215 1219 1221 1223 1227 1229 1231
1235 1240 1244 1248 1252 1256 1260 1264 1268 1275 1280 1284 1288 1292
1296 1300 1304 1308 1313 1317 1321 1325 1329 1333 1337 1341 1344 1346
1350 1352 1354 1358 1360 1362 1366 1368 1370 1374 1379 1383 1387 1391
1395 1399 1403 1407 1414 1419 1423 1427 1431 1435 1439 1443 1447 1452
1456 1460 1464 1468 1472 1476 1480 1483 1485 1489 1491 1493 1497 1499
1501 1505 1507 1509 1513 1518 1522 1526 1530 1534 1538 1542 1546 1553
1558 1562 1566 1570 1574 1578 1582 1586 1591 1595 1599 1603 1607 1611
1615 1619 1622 1624 1628 1630 1632 1636 1638 1640 1644 1646 1648 1652
1657 1661 1665 1669 1673 1677 1681 1685 1692 1697 1701 1705 1709 1713
1717 1721 1725 1730 1734 1738 1742 1746 1750 1754 1758 1761 1763 1767
1769 1771 1775 1777 1779 1783 1785 1787 1791 1796 1800 1804 1808 1812
1816 1820 1824 1831 1836 1840 1844 1848 1852 1856 1860 1864 1869 1873
1877 1881 1885 1889 1893 1897 1900 1902 1906 1908 1910 1914 1916 1918
1922 1924 1926 1930 1935 1939 1943 1947 1951 1955 1959 1963 1970 1975
1979 1983 1987 1991 1995 1999 2003 2008 2012 2016 2020 2024 2028 2032
2036 2039 2041 2045 2047 2049 2053 2055 2057 2061 2063 2065 2069 2074
2078 2082 2086 2090 2094 2098 2102 2109 2114 2118 2122 2126 2130 2134 SEQ 1272
2138 2142 2147 2151 2155 2159 2163 2167 2171 2175 2178 2180 2184 2186
2188 2192 2194 2196 2200 2202 2204 2208 2213 2217 2221 2225 2229 2233
2237 2241 2248 2253 2257 2261 2265 2269 2273 2277 2281 2286 2290 2294
2298 2302 2306 2310 2314 2317 2319 2323 2325 2327 2331 2333 2335 2339
2341 2343 2347 2352 2356 2360 2364 2368 2372 2376 2380 2387 2392 2396
2400 2404 2408 2412 2416 2420 2425 2429 2433 2437 2441 2445 2449 2453
2456 2458 2462 2464 2466 2470 2472 2474 2478 2480 2482 2486 2491 2495
2499 2503 2507 2511 2515 2519
.MS0B 342 350 358 366 481 489 497 505 620 628 636 644 759 767
775 783 898 906 914 922 1037 1045 1053 1061 1176 1184 1192 1200
1315 1323 1331 1339 1454 1462 1470 1478 1593 1601 1609 1617 1732 1740
1748 1756 1871 1879 1887 1895 2010 2018 2026 2034 2149 2157 2165 2173
2288 2296 2304 2312 2427 2435 2443 2451
.MS0Q 338 346 354 362 477 485 493 501 616 624 632 640 755 763
771 779 894 902 910 918 1033 1041 1049 1057 1172 1180 1188 1196
1311 1319 1327 1335 1450 1458 1466 1474 1589 1597 1605 1613 1728 1736
1744 1752 1867 1875 1883 1891 2006 2014 2022 2030 2145 2153 2161 2169
2284 2292 2300 2308 2423 2431 2439 2447
.MSAB 309 317 325 333 448 456 464 472 587 595 603 611 726 734
742 750 865 873 881 889 1004 1012 1020 1028 1143 1151 1159 1167
1282 1290 1298 1306 1421 1429 1437 1445 1560 1568 1576 1584 1699 1707
1715 1723 1838 1846 1854 1862 1977 1985 1993 2001 2116 2124 2132 2140
2255 2263 2271 2279 2394 2402 2410 2418
.MSAQ 305 313 321 329 444 452 460 468 583 591 599 607 722 730
738 746 861 869 877 885 1000 1008 1016 1024 1139 1147 1155 1163
1278 1286 1294 1302 1417 1425 1433 1441 1556 1564 1572 1580 1695 1703
1711 1719 1834 1842 1850 1858 1973 1981 1989 1997 2112 2120 2128 2136
2251 2259 2267 2275 2390 2398 2406 2414
.MSD0 110 112 114 116 118 120 122 124 126 128 130 132 134 136
138 140 142 408 416 424 432 547 555 563 571 686 694 702
710 825 833 841 849 964 972 980 988 1103 1111 1119 1127 1242
1250 1258 1266 1381 1389 1397 1405 1520 1528 1536 1544 1659 1667 1675
1683 1798 1806 1814 1822 1937 1945 1953 1961 2076 2084 2092 2100 2215
2223 2231 2239 2354 2362 2370 2378 2493 2501 2509 2517
.MSDA 375 383 391 399 514 522 530 538 653 661 669 677 792 800
808 816 931 939 947 955 1070 1078 1086 1094 1209 1217 1225 1233
1348 1356 1364 1372 1487 1495 1503 1511 1626 1634 1642 1650 1765 1773
1781 1789 1904 1912 1920 1928 2043 2051 2059 2067 2182 2190 2198 2206
2321 2329 2337 2345 2460 2468 2476 2484
.MSDQ 404 412 420 428 543 551 559 567 682 690 698 706 821 829
837 845 960 968 976 984 1099 1107 1115 1123 1238 1246 1254 1262
1377 1385 1393 1401 1516 1524 1532 1540 1655 1663 1671 1679 1794 1802
1810 1818 1933 1941 1949 1957 2072 2080 2088 2096 2211 2219 2227 2235
2350 2358 2366 2374 2489 2497 2505 2513
.MSKCN 110 112 114 116 118 120 122 124 126 128 130 132 134 136
138 140 142 305 309 313 317 321 325 329 333 338 342 346
350 354 358 362 366 371 375 379 383 387 391 395 399 404
408 412 416 420 424 428 432 444 448 452 456 460 464 468
472 477 481 485 489 493 497 501 505 510 514 518 522 526
530 534 538 543 547 551 555 559 563 567 571 583 587 591
595 599 603 607 611 616 620 624 628 632 636 640 644 649
653 657 661 665 669 673 677 682 686 690 694 698 702 706
710 722 726 730 734 738 742 746 750 755 759 763 767 771 SEQ 1273
775 779 783 788 792 796 800 804 808 812 816 821 825 829
833 837 841 845 849 861 865 869 873 877 881 885 889 894
898 902 906 910 914 918 922 927 931 935 939 943 947 951
955 960 964 968 972 976 980 984 988 1000 1004 1008 1012 1016
1020 1024 1028 1033 1037 1041 1045 1049 1053 1057 1061 1066 1070 1074
1078 1082 1086 1090 1094 1099 1103 1107 1111 1115 1119 1123 1127 1139
1143 1147 1151 1155 1159 1163 1167 1172 1176 1180 1184 1188 1192 1196
1200 1205 1209 1213 1217 1221 1225 1229 1233 1238 1242 1246 1250 1254
1258 1262 1266 1278 1282 1286 1290 1294 1298 1302 1306 1311 1315 1319
1323 1327 1331 1335 1339 1344 1348 1352 1356 1360 1364 1368 1372 1377
1381 1385 1389 1393 1397 1401 1405 1417 1421 1425 1429 1433 1437 1441
1445 1450 1454 1458 1462 1466 1470 1474 1478 1483 1487 1491 1495 1499
1503 1507 1511 1516 1520 1524 1528 1532 1536 1540 1544 1556 1560 1564
1568 1572 1576 1580 1584 1589 1593 1597 1601 1605 1609 1613 1617 1622
1626 1630 1634 1638 1642 1646 1650 1655 1659 1663 1667 1671 1675 1679
1683 1695 1699 1703 1707 1711 1715 1719 1723 1728 1732 1736 1740 1744
1748 1752 1756 1761 1765 1769 1773 1777 1781 1785 1789 1794 1798 1802
1806 1810 1814 1818 1822 1834 1838 1842 1846 1850 1854 1858 1862 1867
1871 1875 1879 1883 1887 1891 1895 1900 1904 1908 1912 1916 1920 1924
1928 1933 1937 1941 1945 1949 1953 1957 1961 1973 1977 1981 1985 1989
1993 1997 2001 2006 2010 2014 2018 2022 2026 2030 2034 2039 2043 2047
2051 2055 2059 2063 2067 2072 2076 2080 2084 2088 2092 2096 2100 2112
2116 2120 2124 2128 2132 2136 2140 2145 2149 2153 2157 2161 2165 2169
2173 2178 2182 2186 2190 2194 2198 2202 2206 2211 2215 2219 2223 2227
2231 2235 2239 2251 2255 2259 2263 2267 2271 2275 2279 2284 2288 2292
2296 2300 2304 2308 2312 2317 2321 2325 2329 2333 2337 2341 2345 2350
2354 2358 2362 2366 2370 2374 2378 2390 2394 2398 2402 2406 2410 2414
2418 2423 2427 2431 2435 2439 2443 2447 2451 2456 2460 2464 2468 2472
2476 2480 2484 2489 2493 2497 2501 2505 2509 2513 2517
.MSMIN 309 362 375 428 448 501 514 567 587 640 653 706 726 779
792 845 865 918 931 984 1004 1057 1070 1123 1143 1196 1209 1262
1282 1335 1348 1401 1421 1474 1487 1540 1560 1613 1626 1679 1699 1752
1765 1818 1838 1891 1904 1957 1977 2030 2043 2096 2116 2169 2182 2235
2255 2308 2321 2374 2394 2447 2460 2513
.MXNOR 333 338 399 404 472 477 538 543 611 616 677 682 750 755
816 821 889 894 955 960 1028 1033 1094 1099 1167 1172 1233 1238
1306 1311 1372 1377 1445 1450 1511 1516 1584 1589 1650 1655 1723 1728
1789 1794 1862 1867 1928 1933 2001 2006 2067 2072 2140 2145 2206 2211
2279 2284 2345 2350 2418 2423 2484 2489
.MXOR 329 342 395 408 468 481 534 547 607 620 673 686 746 759
812 825 885 898 951 964 1024 1037 1090 1103 1163 1176 1229 1242
1302 1315 1368 1381 1441 1454 1507 1520 1580 1593 1646 1659 1719 1732
1785 1798 1858 1871 1924 1937 1997 2010 2063 2076 2136 2149 2202 2215
2275 2288 2341 2354 2414 2427 2480 2493
.RA 158 167 176 185 194 203 212 221 230 239 248 257 266 275
284 302 305 307 309 311 313 315 317 319 321 323 325 327
329 331 333 335 338 340 342 344 346 348 350 352 354 356
358 360 362 364 366 368 371 373 375 377 379 381 383 385
387 389 391 393 395 397 399 401 404 406 408 410 412 414
416 418 420 422 424 426 428 430 432 434 441 444 446 448
450 452 454 456 458 460 462 464 466 468 470 472 474 477
479 481 483 485 487 489 491 493 495 497 499 501 503 505
507 510 512 514 516 518 520 522 524 526 528 530 532 534 SEQ 1274
536 538 540 543 545 547 549 551 553 555 557 559 561 563
565 567 569 571 573 580 583 585 587 589 591 593 595 597
599 601 603 605 607 609 611 613 616 618 620 622 624 626
628 630 632 634 636 638 640 642 644 646 649 651 653 655
657 659 661 663 665 667 669 671 673 675 677 679 682 684
686 688 690 692 694 696 698 700 702 704 706 708 710 712
719 722 724 726 728 730 732 734 736 738 740 742 744 746
748 750 752 755 757 759 761 763 765 767 769 771 773 775
777 779 781 783 785 788 790 792 794 796 798 800 802 804
806 808 810 812 814 816 818 821 823 825 827 829 831 833
835 837 839 841 843 845 847 849 851 858 861 863 865 867
869 871 873 875 877 879 881 883 885 887 889 891 894 896
898 900 902 904 906 908 910 912 914 916 918 920 922 924
927 929 931 933 935 937 939 941 943 945 947 949 951 953
955 957 960 962 964 966 968 970 972 974 976 978 980 982
984 986 988 990 997 1000 1002 1004 1006 1008 1010 1012 1014 1016
1018 1020 1022 1024 1026 1028 1030 1033 1035 1037 1039 1041 1043 1045
1047 1049 1051 1053 1055 1057 1059 1061 1063 1066 1068 1070 1072 1074
1076 1078 1080 1082 1084 1086 1088 1090 1092 1094 1096 1099 1101 1103
1105 1107 1109 1111 1113 1115 1117 1119 1121 1123 1125 1127 1129 1136
1139 1141 1143 1145 1147 1149 1151 1153 1155 1157 1159 1161 1163 1165
1167 1169 1172 1174 1176 1178 1180 1182 1184 1186 1188 1190 1192 1194
1196 1198 1200 1202 1205 1207 1209 1211 1213 1215 1217 1219 1221 1223
1225 1227 1229 1231 1233 1235 1238 1240 1242 1244 1246 1248 1250 1252
1254 1256 1258 1260 1262 1264 1266 1268 1275 1278 1280 1282 1284 1286
1288 1290 1292 1294 1296 1298 1300 1302 1304 1306 1308 1311 1313 1315
1317 1319 1321 1323 1325 1327 1329 1331 1333 1335 1337 1339 1341 1344
1346 1348 1350 1352 1354 1356 1358 1360 1362 1364 1366 1368 1370 1372
1374 1377 1379 1381 1383 1385 1387 1389 1391 1393 1395 1397 1399 1401
1403 1405 1407 1414 1417 1419 1421 1423 1425 1427 1429 1431 1433 1435
1437 1439 1441 1443 1445 1447 1450 1452 1454 1456 1458 1460 1462 1464
1466 1468 1470 1472 1474 1476 1478 1480 1483 1485 1487 1489 1491 1493
1495 1497 1499 1501 1503 1505 1507 1509 1511 1513 1516 1518 1520 1522
1524 1526 1528 1530 1532 1534 1536 1538 1540 1542 1544 1546 1553 1556
1558 1560 1562 1564 1566 1568 1570 1572 1574 1576 1578 1580 1582 1584
1586 1589 1591 1593 1595 1597 1599 1601 1603 1605 1607 1609 1611 1613
1615 1617 1619 1622 1624 1626 1628 1630 1632 1634 1636 1638 1640 1642
1644 1646 1648 1650 1652 1655 1657 1659 1661 1663 1665 1667 1669 1671
1673 1675 1677 1679 1681 1683 1685 1692 1695 1697 1699 1701 1703 1705
1707 1709 1711 1713 1715 1717 1719 1721 1723 1725 1728 1730 1732 1734
1736 1738 1740 1742 1744 1746 1748 1750 1752 1754 1756 1758 1761 1763
1765 1767 1769 1771 1773 1775 1777 1779 1781 1783 1785 1787 1789 1791
1794 1796 1798 1800 1802 1804 1806 1808 1810 1812 1814 1816 1818 1820
1822 1824 1831 1834 1836 1838 1840 1842 1844 1846 1848 1850 1852 1854
1856 1858 1860 1862 1864 1867 1869 1871 1873 1875 1877 1879 1881 1883
1885 1887 1889 1891 1893 1895 1897 1900 1902 1904 1906 1908 1910 1912
1914 1916 1918 1920 1922 1924 1926 1928 1930 1933 1935 1937 1939 1941
1943 1945 1947 1949 1951 1953 1955 1957 1959 1961 1963 1970 1973 1975
1977 1979 1981 1983 1985 1987 1989 1991 1993 1995 1997 1999 2001 2003
2006 2008 2010 2012 2014 2016 2018 2020 2022 2024 2026 2028 2030 2032
2034 2036 2039 2041 2043 2045 2047 2049 2051 2053 2055 2057 2059 2061
2063 2065 2067 2069 2072 2074 2076 2078 2080 2082 2084 2086 2088 2090
2092 2094 2096 2098 2100 2102 2109 2112 2114 2116 2118 2120 2122 2124 SEQ 1275
2126 2128 2130 2132 2134 2136 2138 2140 2142 2145 2147 2149 2151 2153
2155 2157 2159 2161 2163 2165 2167 2169 2171 2173 2175 2178 2180 2182
2184 2186 2188 2190 2192 2194 2196 2198 2200 2202 2204 2206 2208 2211
2213 2215 2217 2219 2221 2223 2225 2227 2229 2231 2233 2235 2237 2239
2241 2248 2251 2253 2255 2257 2259 2261 2263 2265 2267 2269 2271 2273
2275 2277 2279 2281 2284 2286 2288 2290 2292 2294 2296 2298 2300 2302
2304 2306 2308 2310 2312 2314 2317 2319 2321 2323 2325 2327 2329 2331
2333 2335 2337 2339 2341 2343 2345 2347 2350 2352 2354 2356 2358 2360
2362 2364 2366 2368 2370 2372 2374 2376 2378 2380 2387 2390 2392 2394
2396 2398 2400 2402 2404 2406 2408 2410 2412 2414 2416 2418 2420 2423
2425 2427 2429 2431 2433 2435 2437 2439 2441 2443 2445 2447 2449 2451
2453 2456 2458 2460 2462 2464 2466 2468 2470 2472 2474 2476 2478 2480
2482 2484 2486 2489 2491 2493 2495 2497 2499 2501 2503 2505 2507 2509
2511 2513 2515 2517 2519
.RAND 302 321 350 387 416 441 460 489 526 555 580 599 628 665
694 719 738 767 804 833 858 877 906 943 972 997 1016 1045
1082 1111 1136 1155 1184 1221 1250 1275 1294 1323 1360 1389 1414 1433
1462 1499 1528 1553 1572 1601 1638 1667 1692 1711 1740 1777 1806 1831
1850 1879 1916 1945 1970 1989 2018 2055 2084 2109 2128 2157 2194 2223
2248 2267 2296 2333 2362 2387 2406 2435 2472 2501
.RB 110 112 114 116 118 120 122 124 126 128 130 132 134 136
138 140 142 302 305 309 313 317 321 325 329 333 338 342
346 350 354 358 362 366 371 375 379 383 387 391 395 399
404 408 412 416 420 424 428 432 441 444 448 452 456 460
464 468 472 477 481 485 489 493 497 501 505 510 514 518
522 526 530 534 538 543 547 551 555 559 563 567 571 580
583 587 591 595 599 603 607 611 616 620 624 628 632 636
640 644 649 653 657 661 665 669 673 677 682 686 690 694
698 702 706 710 719 722 726 730 734 738 742 746 750 755
759 763 767 771 775 779 783 788 792 796 800 804 808 812
816 821 825 829 833 837 841 845 849 858 861 865 869 873
877 881 885 889 894 898 902 906 910 914 918 922 927 931
935 939 943 947 951 955 960 964 968 972 976 980 984 988
997 1000 1004 1008 1012 1016 1020 1024 1028 1033 1037 1041 1045 1049
1053 1057 1061 1066 1070 1074 1078 1082 1086 1090 1094 1099 1103 1107
1111 1115 1119 1123 1127 1136 1139 1143 1147 1151 1155 1159 1163 1167
1172 1176 1180 1184 1188 1192 1196 1200 1205 1209 1213 1217 1221 1225
1229 1233 1238 1242 1246 1250 1254 1258 1262 1266 1275 1278 1282 1286
1290 1294 1298 1302 1306 1311 1315 1319 1323 1327 1331 1335 1339 1344
1348 1352 1356 1360 1364 1368 1372 1377 1381 1385 1389 1393 1397 1401
1405 1414 1417 1421 1425 1429 1433 1437 1441 1445 1450 1454 1458 1462
1466 1470 1474 1478 1483 1487 1491 1495 1499 1503 1507 1511 1516 1520
1524 1528 1532 1536 1540 1544 1553 1556 1560 1564 1568 1572 1576 1580
1584 1589 1593 1597 1601 1605 1609 1613 1617 1622 1626 1630 1634 1638
1642 1646 1650 1655 1659 1663 1667 1671 1675 1679 1683 1692 1695 1699
1703 1707 1711 1715 1719 1723 1728 1732 1736 1740 1744 1748 1752 1756
1761 1765 1769 1773 1777 1781 1785 1789 1794 1798 1802 1806 1810 1814
1818 1822 1831 1834 1838 1842 1846 1850 1854 1858 1862 1867 1871 1875
1879 1883 1887 1891 1895 1900 1904 1908 1912 1916 1920 1924 1928 1933
1937 1941 1945 1949 1953 1957 1961 1970 1973 1977 1981 1985 1989 1993
1997 2001 2006 2010 2014 2018 2022 2026 2030 2034 2039 2043 2047 2051
2055 2059 2063 2067 2072 2076 2080 2084 2088 2092 2096 2100 2109 2112
2116 2120 2124 2128 2132 2136 2140 2145 2149 2153 2157 2161 2165 2169 SEQ 1276
2173 2178 2182 2186 2190 2194 2198 2202 2206 2211 2215 2219 2223 2227
2231 2235 2239 2248 2251 2255 2259 2263 2267 2271 2275 2279 2284 2288
2292 2296 2300 2304 2308 2312 2317 2321 2325 2329 2333 2337 2341 2345
2350 2354 2358 2362 2366 2370 2374 2378 2387 2390 2394 2398 2402 2406
2410 2414 2418 2423 2427 2431 2435 2439 2443 2447 2451 2456 2460 2464
2468 2472 2476 2480 2484 2489 2493 2497 2501 2505 2509 2513 2517
.RBAD 151 160 169 178 187 196 205 214 223 232 241 250 259 268
277 286 293 295
.RCCFZ 149 158 167 176 185 194 203 212 221 230 239 248 257 266
275 284
.RCENA 149 158 167 176 185 194 203 212 221 230 239 248 257 266
275 284
.RCJS 300 307 311 315 319 323 327 331 335 340 344 348 352 356
360 364 368 373 377 381 385 389 393 397 401 406 410 414
418 422 426 430 434 439 446 450 454 458 462 466 470 474
479 483 487 491 495 499 503 507 512 516 520 524 528 532
536 540 545 549 553 557 561 565 569 573 578 585 589 593
597 601 605 609 613 618 622 626 630 634 638 642 646 651
655 659 663 667 671 675 679 684 688 692 696 700 704 708
712 717 724 728 732 736 740 744 748 752 757 761 765 769
773 777 781 785 790 794 798 802 806 810 814 818 823 827
831 835 839 843 847 851 856 863 867 871 875 879 883 887
891 896 900 904 908 912 916 920 924 929 933 937 941 945
949 953 957 962 966 970 974 978 982 986 990 995 1002 1006
1010 1014 1018 1022 1026 1030 1035 1039 1043 1047 1051 1055 1059 1063
1068 1072 1076 1080 1084 1088 1092 1096 1101 1105 1109 1113 1117 1121
1125 1129 1134 1141 1145 1149 1153 1157 1161 1165 1169 1174 1178 1182
1186 1190 1194 1198 1202 1207 1211 1215 1219 1223 1227 1231 1235 1240
1244 1248 1252 1256 1260 1264 1268 1273 1280 1284 1288 1292 1296 1300
1304 1308 1313 1317 1321 1325 1329 1333 1337 1341 1346 1350 1354 1358
1362 1366 1370 1374 1379 1383 1387 1391 1395 1399 1403 1407 1412 1419
1423 1427 1431 1435 1439 1443 1447 1452 1456 1460 1464 1468 1472 1476
1480 1485 1489 1493 1497 1501 1505 1509 1513 1518 1522 1526 1530 1534
1538 1542 1546 1551 1558 1562 1566 1570 1574 1578 1582 1586 1591 1595
1599 1603 1607 1611 1615 1619 1624 1628 1632 1636 1640 1644 1648 1652
1657 1661 1665 1669 1673 1677 1681 1685 1690 1697 1701 1705 1709 1713
1717 1721 1725 1730 1734 1738 1742 1746 1750 1754 1758 1763 1767 1771
1775 1779 1783 1787 1791 1796 1800 1804 1808 1812 1816 1820 1824 1829
1836 1840 1844 1848 1852 1856 1860 1864 1869 1873 1877 1881 1885 1889
1893 1897 1902 1906 1910 1914 1918 1922 1926 1930 1935 1939 1943 1947
1951 1955 1959 1963 1968 1975 1979 1983 1987 1991 1995 1999 2003 2008
2012 2016 2020 2024 2028 2032 2036 2041 2045 2049 2053 2057 2061 2065
2069 2074 2078 2082 2086 2090 2094 2098 2102 2107 2114 2118 2122 2126
2130 2134 2138 2142 2147 2151 2155 2159 2163 2167 2171 2175 2180 2184
2188 2192 2196 2200 2204 2208 2213 2217 2221 2225 2229 2233 2237 2241
2246 2253 2257 2261 2265 2269 2273 2277 2281 2286 2290 2294 2298 2302
2306 2310 2314 2319 2323 2327 2331 2335 2339 2343 2347 2352 2356 2360
2364 2368 2372 2376 2380 2385 2392 2396 2400 2404 2408 2412 2416 2420
2425 2429 2433 2437 2441 2445 2449 2453 2458 2462 2466 2470 2474 2478
2482 2486 2491 2495 2499 2503 2507 2511 2515 2519
.RCJV 149 158 167 176 185 194 203 212 221 230 239 248 257 266
275 284
.RCONT 110 112 114 116 118 120 122 124 126 128 130 132 134 136 SEQ 1277
138 140 142 302 305 309 313 317 321 325 329 333 338 342
346 350 354 358 362 366 371 375 379 383 387 391 395 399
404 408 412 416 420 424 428 432 441 444 448 452 456 460
464 468 472 477 481 485 489 493 497 501 505 510 514 518
522 526 530 534 538 543 547 551 555 559 563 567 571 580
583 587 591 595 599 603 607 611 616 620 624 628 632 636
640 644 649 653 657 661 665 669 673 677 682 686 690 694
698 702 706 710 719 722 726 730 734 738 742 746 750 755
759 763 767 771 775 779 783 788 792 796 800 804 808 812
816 821 825 829 833 837 841 845 849 858 861 865 869 873
877 881 885 889 894 898 902 906 910 914 918 922 927 931
935 939 943 947 951 955 960 964 968 972 976 980 984 988
997 1000 1004 1008 1012 1016 1020 1024 1028 1033 1037 1041 1045 1049
1053 1057 1061 1066 1070 1074 1078 1082 1086 1090 1094 1099 1103 1107
1111 1115 1119 1123 1127 1136 1139 1143 1147 1151 1155 1159 1163 1167
1172 1176 1180 1184 1188 1192 1196 1200 1205 1209 1213 1217 1221 1225
1229 1233 1238 1242 1246 1250 1254 1258 1262 1266 1275 1278 1282 1286
1290 1294 1298 1302 1306 1311 1315 1319 1323 1327 1331 1335 1339 1344
1348 1352 1356 1360 1364 1368 1372 1377 1381 1385 1389 1393 1397 1401
1405 1414 1417 1421 1425 1429 1433 1437 1441 1445 1450 1454 1458 1462
1466 1470 1474 1478 1483 1487 1491 1495 1499 1503 1507 1511 1516 1520
1524 1528 1532 1536 1540 1544 1553 1556 1560 1564 1568 1572 1576 1580
1584 1589 1593 1597 1601 1605 1609 1613 1617 1622 1626 1630 1634 1638
1642 1646 1650 1655 1659 1663 1667 1671 1675 1679 1683 1692 1695 1699
1703 1707 1711 1715 1719 1723 1728 1732 1736 1740 1744 1748 1752 1756
1761 1765 1769 1773 1777 1781 1785 1789 1794 1798 1802 1806 1810 1814
1818 1822 1831 1834 1838 1842 1846 1850 1854 1858 1862 1867 1871 1875
1879 1883 1887 1891 1895 1900 1904 1908 1912 1916 1920 1924 1928 1933
1937 1941 1945 1949 1953 1957 1961 1970 1973 1977 1981 1985 1989 1993
1997 2001 2006 2010 2014 2018 2022 2026 2030 2034 2039 2043 2047 2051
2055 2059 2063 2067 2072 2076 2080 2084 2088 2092 2096 2100 2109 2112
2116 2120 2124 2128 2132 2136 2140 2145 2149 2153 2157 2161 2165 2169
2173 2178 2182 2186 2190 2194 2198 2202 2206 2211 2215 2219 2223 2227
2231 2235 2239 2248 2251 2255 2259 2263 2267 2271 2275 2279 2284 2288
2292 2296 2300 2304 2308 2312 2317 2321 2325 2329 2333 2337 2341 2345
2350 2354 2358 2362 2366 2370 2374 2378 2387 2390 2394 2398 2402 2406
2410 2414 2418 2423 2427 2431 2435 2439 2443 2447 2451 2456 2460 2464
2468 2472 2476 2480 2484 2489 2493 2497 2501 2505 2509 2513 2517
.RCRTN 144 153 162 171 180 189 198 207 216 225 234 243 252 261
270 279 288
.RD 110 112 114 116 118 120 122 124 126 128 130 132 134 136
138 140 142 144 149 158 167 176 185 194 203 212 221 230
239 248 257 266 275 284 302 305 307 309 311 313 315 317
319 321 323 325 327 329 331 333 335 338 340 342 344 346
348 350 352 354 356 358 360 362 364 366 368 371 373 375
377 379 381 383 385 387 389 391 393 395 397 399 401 404
406 408 410 412 414 416 418 420 422 424 426 428 430 432
434 441 444 446 448 450 452 454 456 458 460 462 464 466
468 470 472 474 477 479 481 483 485 487 489 491 493 495
497 499 501 503 505 507 510 512 514 516 518 520 522 524
526 528 530 532 534 536 538 540 543 545 547 549 551 553
555 557 559 561 563 565 567 569 571 573 580 583 585 587
589 591 593 595 597 599 601 603 605 607 609 611 613 616 SEQ 1278
618 620 622 624 626 628 630 632 634 636 638 640 642 644
646 649 651 653 655 657 659 661 663 665 667 669 671 673
675 677 679 682 684 686 688 690 692 694 696 698 700 702
704 706 708 710 712 719 722 724 726 728 730 732 734 736
738 740 742 744 746 748 750 752 755 757 759 761 763 765
767 769 771 773 775 777 779 781 783 785 788 790 792 794
796 798 800 802 804 806 808 810 812 814 816 818 821 823
825 827 829 831 833 835 837 839 841 843 845 847 849 851
858 861 863 865 867 869 871 873 875 877 879 881 883 885
887 889 891 894 896 898 900 902 904 906 908 910 912 914
916 918 920 922 924 927 929 931 933 935 937 939 941 943
945 947 949 951 953 955 957 960 962 964 966 968 970 972
974 976 978 980 982 984 986 988 990 997 1000 1002 1004 1006
1008 1010 1012 1014 1016 1018 1020 1022 1024 1026 1028 1030 1033 1035
1037 1039 1041 1043 1045 1047 1049 1051 1053 1055 1057 1059 1061 1063
1066 1068 1070 1072 1074 1076 1078 1080 1082 1084 1086 1088 1090 1092
1094 1096 1099 1101 1103 1105 1107 1109 1111 1113 1115 1117 1119 1121
1123 1125 1127 1129 1136 1139 1141 1143 1145 1147 1149 1151 1153 1155
1157 1159 1161 1163 1165 1167 1169 1172 1174 1176 1178 1180 1182 1184
1186 1188 1190 1192 1194 1196 1198 1200 1202 1205 1207 1209 1211 1213
1215 1217 1219 1221 1223 1225 1227 1229 1231 1233 1235 1238 1240 1242
1244 1246 1248 1250 1252 1254 1256 1258 1260 1262 1264 1266 1268 1275
1278 1280 1282 1284 1286 1288 1290 1292 1294 1296 1298 1300 1302 1304
1306 1308 1311 1313 1315 1317 1319 1321 1323 1325 1327 1329 1331 1333
1335 1337 1339 1341 1344 1346 1348 1350 1352 1354 1356 1358 1360 1362
1364 1366 1368 1370 1372 1374 1377 1379 1381 1383 1385 1387 1389 1391
1393 1395 1397 1399 1401 1403 1405 1407 1414 1417 1419 1421 1423 1425
1427 1429 1431 1433 1435 1437 1439 1441 1443 1445 1447 1450 1452 1454
1456 1458 1460 1462 1464 1466 1468 1470 1472 1474 1476 1478 1480 1483
1485 1487 1489 1491 1493 1495 1497 1499 1501 1503 1505 1507 1509 1511
1513 1516 1518 1520 1522 1524 1526 1528 1530 1532 1534 1536 1538 1540
1542 1544 1546 1553 1556 1558 1560 1562 1564 1566 1568 1570 1572 1574
1576 1578 1580 1582 1584 1586 1589 1591 1593 1595 1597 1599 1601 1603
1605 1607 1609 1611 1613 1615 1617 1619 1622 1624 1626 1628 1630 1632
1634 1636 1638 1640 1642 1644 1646 1648 1650 1652 1655 1657 1659 1661
1663 1665 1667 1669 1671 1673 1675 1677 1679 1681 1683 1685 1692 1695
1697 1699 1701 1703 1705 1707 1709 1711 1713 1715 1717 1719 1721 1723
1725 1728 1730 1732 1734 1736 1738 1740 1742 1744 1746 1748 1750 1752
1754 1756 1758 1761 1763 1765 1767 1769 1771 1773 1775 1777 1779 1781
1783 1785 1787 1789 1791 1794 1796 1798 1800 1802 1804 1806 1808 1810
1812 1814 1816 1818 1820 1822 1824 1831 1834 1836 1838 1840 1842 1844
1846 1848 1850 1852 1854 1856 1858 1860 1862 1864 1867 1869 1871 1873
1875 1877 1879 1881 1883 1885 1887 1889 1891 1893 1895 1897 1900 1902
1904 1906 1908 1910 1912 1914 1916 1918 1920 1922 1924 1926 1928 1930
1933 1935 1937 1939 1941 1943 1945 1947 1949 1951 1953 1955 1957 1959
1961 1963 1970 1973 1975 1977 1979 1981 1983 1985 1987 1989 1991 1993
1995 1997 1999 2001 2003 2006 2008 2010 2012 2014 2016 2018 2020 2022
2024 2026 2028 2030 2032 2034 2036 2039 2041 2043 2045 2047 2049 2051
2053 2055 2057 2059 2061 2063 2065 2067 2069 2072 2074 2076 2078 2080
2082 2084 2086 2088 2090 2092 2094 2096 2098 2100 2102 2109 2112 2114
2116 2118 2120 2122 2124 2126 2128 2130 2132 2134 2136 2138 2140 2142
2145 2147 2149 2151 2153 2155 2157 2159 2161 2163 2165 2167 2169 2171
2173 2175 2178 2180 2182 2184 2186 2188 2190 2192 2194 2196 2198 2200 SEQ 1279
2202 2204 2206 2208 2211 2213 2215 2217 2219 2221 2223 2225 2227 2229
2231 2233 2235 2237 2239 2241 2248 2251 2253 2255 2257 2259 2261 2263
2265 2267 2269 2271 2273 2275 2277 2279 2281 2284 2286 2288 2290 2292
2294 2296 2298 2300 2302 2304 2306 2308 2310 2312 2314 2317 2319 2321
2323 2325 2327 2329 2331 2333 2335 2337 2339 2341 2343 2345 2347 2350
2352 2354 2356 2358 2360 2362 2364 2366 2368 2370 2372 2374 2376 2378
2380 2387 2390 2392 2394 2396 2398 2400 2402 2404 2406 2408 2410 2412
2414 2416 2418 2420 2423 2425 2427 2429 2431 2433 2435 2437 2439 2441
2443 2445 2447 2449 2451 2453 2456 2458 2460 2462 2464 2466 2468 2470
2472 2474 2476 2478 2480 2482 2484 2486 2489 2491 2493 2495 2497 2499
2501 2503 2505 2507 2509 2511 2513 2515 2517 2519
.RJ 102 149 151 158 160 167 169 176 178 185 187 194 196 203
205 212 214 221 223 230 232 239 241 248 250 257 259 266
268 275 277 284 286 293 295 300 307 311 315 319 323 327
331 335 340 344 348 352 356 360 364 368 373 377 381 385
389 393 397 401 406 410 414 418 422 426 430 434 439 446
450 454 458 462 466 470 474 479 483 487 491 495 499 503
507 512 516 520 524 528 532 536 540 545 549 553 557 561
565 569 573 578 585 589 593 597 601 605 609 613 618 622
626 630 634 638 642 646 651 655 659 663 667 671 675 679
684 688 692 696 700 704 708 712 717 724 728 732 736 740
744 748 752 757 761 765 769 773 777 781 785 790 794 798
802 806 810 814 818 823 827 831 835 839 843 847 851 856
863 867 871 875 879 883 887 891 896 900 904 908 912 916
920 924 929 933 937 941 945 949 953 957 962 966 970 974
978 982 986 990 995 1002 1006 1010 1014 1018 1022 1026 1030 1035
1039 1043 1047 1051 1055 1059 1063 1068 1072 1076 1080 1084 1088 1092
1096 1101 1105 1109 1113 1117 1121 1125 1129 1134 1141 1145 1149 1153
1157 1161 1165 1169 1174 1178 1182 1186 1190 1194 1198 1202 1207 1211
1215 1219 1223 1227 1231 1235 1240 1244 1248 1252 1256 1260 1264 1268
1273 1280 1284 1288 1292 1296 1300 1304 1308 1313 1317 1321 1325 1329
1333 1337 1341 1346 1350 1354 1358 1362 1366 1370 1374 1379 1383 1387
1391 1395 1399 1403 1407 1412 1419 1423 1427 1431 1435 1439 1443 1447
1452 1456 1460 1464 1468 1472 1476 1480 1485 1489 1493 1497 1501 1505
1509 1513 1518 1522 1526 1530 1534 1538 1542 1546 1551 1558 1562 1566
1570 1574 1578 1582 1586 1591 1595 1599 1603 1607 1611 1615 1619 1624
1628 1632 1636 1640 1644 1648 1652 1657 1661 1665 1669 1673 1677 1681
1685 1690 1697 1701 1705 1709 1713 1717 1721 1725 1730 1734 1738 1742
1746 1750 1754 1758 1763 1767 1771 1775 1779 1783 1787 1791 1796 1800
1804 1808 1812 1816 1820 1824 1829 1836 1840 1844 1848 1852 1856 1860
1864 1869 1873 1877 1881 1885 1889 1893 1897 1902 1906 1910 1914 1918
1922 1926 1930 1935 1939 1943 1947 1951 1955 1959 1963 1968 1975 1979
1983 1987 1991 1995 1999 2003 2008 2012 2016 2020 2024 2028 2032 2036
2041 2045 2049 2053 2057 2061 2065 2069 2074 2078 2082 2086 2090 2094
2098 2102 2107 2114 2118 2122 2126 2130 2134 2138 2142 2147 2151 2155
2159 2163 2167 2171 2175 2180 2184 2188 2192 2196 2200 2204 2208 2213
2217 2221 2225 2229 2233 2237 2241 2246 2253 2257 2261 2265 2269 2273
2277 2281 2286 2290 2294 2298 2302 2306 2310 2314 2319 2323 2327 2331
2335 2339 2343 2347 2352 2356 2360 2364 2368 2372 2376 2380 2385 2392
2396 2400 2404 2408 2412 2416 2420 2425 2429 2433 2437 2441 2445 2449
2453 2458 2462 2466 2470 2474 2478 2482 2486 2491 2495 2499 2503 2507
2511 2515 2519 2521
.RJMAP 102 151 160 169 178 187 196 205 214 223 232 241 250 259 SEQ 1280
268 277 286 293 295 2521
.RJZ 104
.RMGC 110 112 114 116 118 120 122 124 126 128 130 132 134 136
138 140 142 305 309 313 317 321 325 329 333 338 342 346
350 354 358 362 366 371 375 379 383 387 391 395 399 404
408 412 416 420 424 428 432 444 448 452 456 460 464 468
472 477 481 485 489 493 497 501 505 510 514 518 522 526
530 534 538 543 547 551 555 559 563 567 571 583 587 591
595 599 603 607 611 616 620 624 628 632 636 640 644 649
653 657 661 665 669 673 677 682 686 690 694 698 702 706
710 722 726 730 734 738 742 746 750 755 759 763 767 771
775 779 783 788 792 796 800 804 808 812 816 821 825 829
833 837 841 845 849 861 865 869 873 877 881 885 889 894
898 902 906 910 914 918 922 927 931 935 939 943 947 951
955 960 964 968 972 976 980 984 988 1000 1004 1008 1012 1016
1020 1024 1028 1033 1037 1041 1045 1049 1053 1057 1061 1066 1070 1074
1078 1082 1086 1090 1094 1099 1103 1107 1111 1115 1119 1123 1127 1139
1143 1147 1151 1155 1159 1163 1167 1172 1176 1180 1184 1188 1192 1196
1200 1205 1209 1213 1217 1221 1225 1229 1233 1238 1242 1246 1250 1254
1258 1262 1266 1278 1282 1286 1290 1294 1298 1302 1306 1311 1315 1319
1323 1327 1331 1335 1339 1344 1348 1352 1356 1360 1364 1368 1372 1377
1381 1385 1389 1393 1397 1401 1405 1417 1421 1425 1429 1433 1437 1441
1445 1450 1454 1458 1462 1466 1470 1474 1478 1483 1487 1491 1495 1499
1503 1507 1511 1516 1520 1524 1528 1532 1536 1540 1544 1556 1560 1564
1568 1572 1576 1580 1584 1589 1593 1597 1601 1605 1609 1613 1617 1622
1626 1630 1634 1638 1642 1646 1650 1655 1659 1663 1667 1671 1675 1679
1683 1695 1699 1703 1707 1711 1715 1719 1723 1728 1732 1736 1740 1744
1748 1752 1756 1761 1765 1769 1773 1777 1781 1785 1789 1794 1798 1802
1806 1810 1814 1818 1822 1834 1838 1842 1846 1850 1854 1858 1862 1867
1871 1875 1879 1883 1887 1891 1895 1900 1904 1908 1912 1916 1920 1924
1928 1933 1937 1941 1945 1949 1953 1957 1961 1973 1977 1981 1985 1989
1993 1997 2001 2006 2010 2014 2018 2022 2026 2030 2034 2039 2043 2047
2051 2055 2059 2063 2067 2072 2076 2080 2084 2088 2092 2096 2100 2112
2116 2120 2124 2128 2132 2136 2140 2145 2149 2153 2157 2161 2165 2169
2173 2178 2182 2186 2190 2194 2198 2202 2206 2211 2215 2219 2223 2227
2231 2235 2239 2251 2255 2259 2263 2267 2271 2275 2279 2284 2288 2292
2296 2300 2304 2308 2312 2317 2321 2325 2329 2333 2337 2341 2345 2350
2354 2358 2362 2366 2370 2374 2378 2390 2394 2398 2402 2406 2410 2414
2418 2423 2427 2431 2435 2439 2443 2447 2451 2456 2460 2464 2468 2472
2476 2480 2484 2489 2493 2497 2501 2505 2509 2513 2517
.RNAND 325 346 391 412 464 485 530 551 603 624 669 690 742 763
808 829 881 902 947 968 1020 1041 1086 1107 1159 1180 1225 1246
1298 1319 1364 1385 1437 1458 1503 1524 1576 1597 1642 1663 1715 1736
1781 1802 1854 1875 1920 1941 1993 2014 2059 2080 2132 2153 2198 2219
2271 2292 2337 2358 2410 2431 2476 2497
.ROR 110 112 114 116 118 120 122 124 126 128 130 132 134 136
138 140 142 149 158 167 176 185 194 203 212 221 230 239
248 257 266 275 284 307 311 315 317 319 323 327 331 335
340 344 348 352 354 356 360 364 368 373 377 381 383 385
389 393 397 401 406 410 414 418 420 422 426 430 434 446
450 454 456 458 462 466 470 474 479 483 487 491 493 495
499 503 507 512 516 520 522 524 528 532 536 540 545 549
553 557 559 561 565 569 573 585 589 593 595 597 601 605 SEQ 1281
609 613 618 622 626 630 632 634 638 642 646 651 655 659
661 663 667 671 675 679 684 688 692 696 698 700 704 708
712 724 728 732 734 736 740 744 748 752 757 761 765 769
771 773 777 781 785 790 794 798 800 802 806 810 814 818
823 827 831 835 837 839 843 847 851 863 867 871 873 875
879 883 887 891 896 900 904 908 910 912 916 920 924 929
933 937 939 941 945 949 953 957 962 966 970 974 976 978
982 986 990 1002 1006 1010 1012 1014 1018 1022 1026 1030 1035 1039
1043 1047 1049 1051 1055 1059 1063 1068 1072 1076 1078 1080 1084 1088
1092 1096 1101 1105 1109 1113 1115 1117 1121 1125 1129 1141 1145 1149
1151 1153 1157 1161 1165 1169 1174 1178 1182 1186 1188 1190 1194 1198
1202 1207 1211 1215 1217 1219 1223 1227 1231 1235 1240 1244 1248 1252
1254 1256 1260 1264 1268 1280 1284 1288 1290 1292 1296 1300 1304 1308
1313 1317 1321 1325 1327 1329 1333 1337 1341 1346 1350 1354 1356 1358
1362 1366 1370 1374 1379 1383 1387 1391 1393 1395 1399 1403 1407 1419
1423 1427 1429 1431 1435 1439 1443 1447 1452 1456 1460 1464 1466 1468
1472 1476 1480 1485 1489 1493 1495 1497 1501 1505 1509 1513 1518 1522
1526 1530 1532 1534 1538 1542 1546 1558 1562 1566 1568 1570 1574 1578
1582 1586 1591 1595 1599 1603 1605 1607 1611 1615 1619 1624 1628 1632
1634 1636 1640 1644 1648 1652 1657 1661 1665 1669 1671 1673 1677 1681
1685 1697 1701 1705 1707 1709 1713 1717 1721 1725 1730 1734 1738 1742
1744 1746 1750 1754 1758 1763 1767 1771 1773 1775 1779 1783 1787 1791
1796 1800 1804 1808 1810 1812 1816 1820 1824 1836 1840 1844 1846 1848
1852 1856 1860 1864 1869 1873 1877 1881 1883 1885 1889 1893 1897 1902
1906 1910 1912 1914 1918 1922 1926 1930 1935 1939 1943 1947 1949 1951
1955 1959 1963 1975 1979 1983 1985 1987 1991 1995 1999 2003 2008 2012
2016 2020 2022 2024 2028 2032 2036 2041 2045 2049 2051 2053 2057 2061
2065 2069 2074 2078 2082 2086 2088 2090 2094 2098 2102 2114 2118 2122
2124 2126 2130 2134 2138 2142 2147 2151 2155 2159 2161 2163 2167 2171
2175 2180 2184 2188 2190 2192 2196 2200 2204 2208 2213 2217 2221 2225
2227 2229 2233 2237 2241 2253 2257 2261 2263 2265 2269 2273 2277 2281
2286 2290 2294 2298 2300 2302 2306 2310 2314 2319 2323 2327 2329 2331
2335 2339 2343 2347 2352 2356 2360 2364 2366 2368 2372 2376 2380 2392
2396 2400 2402 2404 2408 2412 2416 2420 2425 2429 2433 2437 2439 2441
2445 2449 2453 2458 2462 2466 2468 2470 2474 2478 2482 2486 2491 2495
2499 2503 2505 2507 2511 2515 2519
.RPLUS 305 366 371 432 444 505 510 571 583 644 649 710 722 783
788 849 861 922 927 988 1000 1061 1066 1127 1139 1200 1205 1266
1278 1339 1344 1405 1417 1478 1483 1544 1556 1617 1622 1683 1695 1756
1761 1822 1834 1895 1900 1961 1973 2034 2039 2100 2112 2173 2178 2239
2251 2312 2317 2378 2390 2451 2456 2517
.RRMIN 313 358 379 424 452 497 518 563 591 636 657 702 730 775
796 841 869 914 935 980 1008 1053 1074 1119 1147 1192 1213 1258
1286 1331 1352 1397 1425 1470 1491 1536 1564 1609 1630 1675 1703 1748
1769 1814 1842 1887 1908 1953 1981 2026 2047 2092 2120 2165 2186 2231
2259 2304 2325 2370 2398 2443 2464 2509
.RS0A 149 158 167 176 185 194 203 212 221 230 239 248 257 266
275 284 302 307 311 315 319 323 327 331 335 340 344 348
352 356 360 364 368 371 373 377 379 381 385 387 389 393
395 397 401 406 410 414 418 422 426 430 434 441 446 450
454 458 462 466 470 474 479 483 487 491 495 499 503 507
510 512 516 518 520 524 526 528 532 534 536 540 545 549
553 557 561 565 569 573 580 585 589 593 597 601 605 609 SEQ 1282
613 618 622 626 630 634 638 642 646 649 651 655 657 659
663 665 667 671 673 675 679 684 688 692 696 700 704 708
712 719 724 728 732 736 740 744 748 752 757 761 765 769
773 777 781 785 788 790 794 796 798 802 804 806 810 812
814 818 823 827 831 835 839 843 847 851 858 863 867 871
875 879 883 887 891 896 900 904 908 912 916 920 924 927
929 933 935 937 941 943 945 949 951 953 957 962 966 970
974 978 982 986 990 997 1002 1006 1010 1014 1018 1022 1026 1030
1035 1039 1043 1047 1051 1055 1059 1063 1066 1068 1072 1074 1076 1080
1082 1084 1088 1090 1092 1096 1101 1105 1109 1113 1117 1121 1125 1129
1136 1141 1145 1149 1153 1157 1161 1165 1169 1174 1178 1182 1186 1190
1194 1198 1202 1205 1207 1211 1213 1215 1219 1221 1223 1227 1229 1231
1235 1240 1244 1248 1252 1256 1260 1264 1268 1275 1280 1284 1288 1292
1296 1300 1304 1308 1313 1317 1321 1325 1329 1333 1337 1341 1344 1346
1350 1352 1354 1358 1360 1362 1366 1368 1370 1374 1379 1383 1387 1391
1395 1399 1403 1407 1414 1419 1423 1427 1431 1435 1439 1443 1447 1452
1456 1460 1464 1468 1472 1476 1480 1483 1485 1489 1491 1493 1497 1499
1501 1505 1507 1509 1513 1518 1522 1526 1530 1534 1538 1542 1546 1553
1558 1562 1566 1570 1574 1578 1582 1586 1591 1595 1599 1603 1607 1611
1615 1619 1622 1624 1628 1630 1632 1636 1638 1640 1644 1646 1648 1652
1657 1661 1665 1669 1673 1677 1681 1685 1692 1697 1701 1705 1709 1713
1717 1721 1725 1730 1734 1738 1742 1746 1750 1754 1758 1761 1763 1767
1769 1771 1775 1777 1779 1783 1785 1787 1791 1796 1800 1804 1808 1812
1816 1820 1824 1831 1836 1840 1844 1848 1852 1856 1860 1864 1869 1873
1877 1881 1885 1889 1893 1897 1900 1902 1906 1908 1910 1914 1916 1918
1922 1924 1926 1930 1935 1939 1943 1947 1951 1955 1959 1963 1970 1975
1979 1983 1987 1991 1995 1999 2003 2008 2012 2016 2020 2024 2028 2032
2036 2039 2041 2045 2047 2049 2053 2055 2057 2061 2063 2065 2069 2074
2078 2082 2086 2090 2094 2098 2102 2109 2114 2118 2122 2126 2130 2134
2138 2142 2147 2151 2155 2159 2163 2167 2171 2175 2178 2180 2184 2186
2188 2192 2194 2196 2200 2202 2204 2208 2213 2217 2221 2225 2229 2233
2237 2241 2248 2253 2257 2261 2265 2269 2273 2277 2281 2286 2290 2294
2298 2302 2306 2310 2314 2317 2319 2323 2325 2327 2331 2333 2335 2339
2341 2343 2347 2352 2356 2360 2364 2368 2372 2376 2380 2387 2392 2396
2400 2404 2408 2412 2416 2420 2425 2429 2433 2437 2441 2445 2449 2453
2456 2458 2462 2464 2466 2470 2472 2474 2478 2480 2482 2486 2491 2495
2499 2503 2507 2511 2515 2519
.RS0B 342 350 358 366 481 489 497 505 620 628 636 644 759 767
775 783 898 906 914 922 1037 1045 1053 1061 1176 1184 1192 1200
1315 1323 1331 1339 1454 1462 1470 1478 1593 1601 1609 1617 1732 1740
1748 1756 1871 1879 1887 1895 2010 2018 2026 2034 2149 2157 2165 2173
2288 2296 2304 2312 2427 2435 2443 2451
.RS0Q 338 346 354 362 477 485 493 501 616 624 632 640 755 763
771 779 894 902 910 918 1033 1041 1049 1057 1172 1180 1188 1196
1311 1319 1327 1335 1450 1458 1466 1474 1589 1597 1605 1613 1728 1736
1744 1752 1867 1875 1883 1891 2006 2014 2022 2030 2145 2153 2161 2169
2284 2292 2300 2308 2423 2431 2439 2447
.RSAB 309 317 325 333 448 456 464 472 587 595 603 611 726 734
742 750 865 873 881 889 1004 1012 1020 1028 1143 1151 1159 1167
1282 1290 1298 1306 1421 1429 1437 1445 1560 1568 1576 1584 1699 1707
1715 1723 1838 1846 1854 1862 1977 1985 1993 2001 2116 2124 2132 2140
2255 2263 2271 2279 2394 2402 2410 2418
.RSAQ 305 313 321 329 444 452 460 468 583 591 599 607 722 730 SEQ 1283
738 746 861 869 877 885 1000 1008 1016 1024 1139 1147 1155 1163
1278 1286 1294 1302 1417 1425 1433 1441 1556 1564 1572 1580 1695 1703
1711 1719 1834 1842 1850 1858 1973 1981 1989 1997 2112 2120 2128 2136
2251 2259 2267 2275 2390 2398 2406 2414
.RSD0 110 112 114 116 118 120 122 124 126 128 130 132 134 136
138 140 142 408 416 424 432 547 555 563 571 686 694 702
710 825 833 841 849 964 972 980 988 1103 1111 1119 1127 1242
1250 1258 1266 1381 1389 1397 1405 1520 1528 1536 1544 1659 1667 1675
1683 1798 1806 1814 1822 1937 1945 1953 1961 2076 2084 2092 2100 2215
2223 2231 2239 2354 2362 2370 2378 2493 2501 2509 2517
.RSDA 375 383 391 399 514 522 530 538 653 661 669 677 792 800
808 816 931 939 947 955 1070 1078 1086 1094 1209 1217 1225 1233
1348 1356 1364 1372 1487 1495 1503 1511 1626 1634 1642 1650 1765 1773
1781 1789 1904 1912 1920 1928 2043 2051 2059 2067 2182 2190 2198 2206
2321 2329 2337 2345 2460 2468 2476 2484
.RSDQ 404 412 420 428 543 551 559 567 682 690 698 706 821 829
837 845 960 968 976 984 1099 1107 1115 1123 1238 1246 1254 1262
1377 1385 1393 1401 1516 1524 1532 1540 1655 1663 1671 1679 1794 1802
1810 1818 1933 1941 1949 1957 2072 2080 2088 2096 2211 2219 2227 2235
2350 2358 2366 2374 2489 2497 2505 2513
.RSKCN 110 112 114 116 118 120 122 124 126 128 130 132 134 136
138 140 142 305 309 313 317 321 325 329 333 338 342 346
350 354 358 362 366 371 375 379 383 387 391 395 399 404
408 412 416 420 424 428 432 444 448 452 456 460 464 468
472 477 481 485 489 493 497 501 505 510 514 518 522 526
530 534 538 543 547 551 555 559 563 567 571 583 587 591
595 599 603 607 611 616 620 624 628 632 636 640 644 649
653 657 661 665 669 673 677 682 686 690 694 698 702 706
710 722 726 730 734 738 742 746 750 755 759 763 767 771
775 779 783 788 792 796 800 804 808 812 816 821 825 829
833 837 841 845 849 861 865 869 873 877 881 885 889 894
898 902 906 910 914 918 922 927 931 935 939 943 947 951
955 960 964 968 972 976 980 984 988 1000 1004 1008 1012 1016
1020 1024 1028 1033 1037 1041 1045 1049 1053 1057 1061 1066 1070 1074
1078 1082 1086 1090 1094 1099 1103 1107 1111 1115 1119 1123 1127 1139
1143 1147 1151 1155 1159 1163 1167 1172 1176 1180 1184 1188 1192 1196
1200 1205 1209 1213 1217 1221 1225 1229 1233 1238 1242 1246 1250 1254
1258 1262 1266 1278 1282 1286 1290 1294 1298 1302 1306 1311 1315 1319
1323 1327 1331 1335 1339 1344 1348 1352 1356 1360 1364 1368 1372 1377
1381 1385 1389 1393 1397 1401 1405 1417 1421 1425 1429 1433 1437 1441
1445 1450 1454 1458 1462 1466 1470 1474 1478 1483 1487 1491 1495 1499
1503 1507 1511 1516 1520 1524 1528 1532 1536 1540 1544 1556 1560 1564
1568 1572 1576 1580 1584 1589 1593 1597 1601 1605 1609 1613 1617 1622
1626 1630 1634 1638 1642 1646 1650 1655 1659 1663 1667 1671 1675 1679
1683 1695 1699 1703 1707 1711 1715 1719 1723 1728 1732 1736 1740 1744
1748 1752 1756 1761 1765 1769 1773 1777 1781 1785 1789 1794 1798 1802
1806 1810 1814 1818 1822 1834 1838 1842 1846 1850 1854 1858 1862 1867
1871 1875 1879 1883 1887 1891 1895 1900 1904 1908 1912 1916 1920 1924
1928 1933 1937 1941 1945 1949 1953 1957 1961 1973 1977 1981 1985 1989
1993 1997 2001 2006 2010 2014 2018 2022 2026 2030 2034 2039 2043 2047
2051 2055 2059 2063 2067 2072 2076 2080 2084 2088 2092 2096 2100 2112
2116 2120 2124 2128 2132 2136 2140 2145 2149 2153 2157 2161 2165 2169
2173 2178 2182 2186 2190 2194 2198 2202 2206 2211 2215 2219 2223 2227 SEQ 1284
2231 2235 2239 2251 2255 2259 2263 2267 2271 2275 2279 2284 2288 2292
2296 2300 2304 2308 2312 2317 2321 2325 2329 2333 2337 2341 2345 2350
2354 2358 2362 2366 2370 2374 2378 2390 2394 2398 2402 2406 2410 2414
2418 2423 2427 2431 2435 2439 2443 2447 2451 2456 2460 2464 2468 2472
2476 2480 2484 2489 2493 2497 2501 2505 2509 2513 2517
.RSMIN 309 362 375 428 448 501 514 567 587 640 653 706 726 779
792 845 865 918 931 984 1004 1057 1070 1123 1143 1196 1209 1262
1282 1335 1348 1401 1421 1474 1487 1540 1560 1613 1626 1679 1699 1752
1765 1818 1838 1891 1904 1957 1977 2030 2043 2096 2116 2169 2182 2235
2255 2308 2321 2374 2394 2447 2460 2513
.RXNOR 333 338 399 404 472 477 538 543 611 616 677 682 750 755
816 821 889 894 955 960 1028 1033 1094 1099 1167 1172 1233 1238
1306 1311 1372 1377 1445 1450 1511 1516 1584 1589 1650 1655 1723 1728
1789 1794 1862 1867 1928 1933 2001 2006 2067 2072 2140 2145 2206 2211
2279 2284 2345 2350 2418 2423 2484 2489
.RXOR 329 342 395 408 468 481 534 547 607 620 673 686 746 759
812 825 885 898 951 964 1024 1037 1090 1103 1163 1176 1229 1242
1302 1315 1368 1381 1441 1454 1507 1520 1580 1593 1646 1659 1719 1732
1785 1798 1858 1871 1924 1937 1997 2010 2063 2076 2136 2149 2202 2215
2275 2288 2341 2354 2414 2427 2480 2493
CALC 102 104 110 112 114 116 118 120 122 124 126 128 130 132
134 136 138 140 142 144 149 151 153 158 160 162 167 169 SEQ 1285
171 176 178 180 185 187 189 194 196 198 203 205 207 212
214 216 221 223 225 230 232 234 239 241 243 248 250 252
257 259 261 266 268 270 275 277 279 284 286 288 293 295
300 302 305 307 309 311 313 315 317 319 321 323 325 327
329 331 333 335 338 340 342 344 346 348 350 352 354 356
358 360 362 364 366 368 371 373 375 377 379 381 383 385
387 389 391 393 395 397 399 401 404 406 408 410 412 414
416 418 420 422 424 426 428 430 432 434 439 441 444 446
448 450 452 454 456 458 460 462 464 466 468 470 472 474
477 479 481 483 485 487 489 491 493 495 497 499 501 503
505 507 510 512 514 516 518 520 522 524 526 528 530 532
534 536 538 540 543 545 547 549 551 553 555 557 559 561
563 565 567 569 571 573 578 580 583 585 587 589 591 593
595 597 599 601 603 605 607 609 611 613 616 618 620 622
624 626 628 630 632 634 636 638 640 642 644 646 649 651
653 655 657 659 661 663 665 667 669 671 673 675 677 679
682 684 686 688 690 692 694 696 698 700 702 704 706 708
710 712 717 719 722 724 726 728 730 732 734 736 738 740
742 744 746 748 750 752 755 757 759 761 763 765 767 769
771 773 775 777 779 781 783 785 788 790 792 794 796 798
800 802 804 806 808 810 812 814 816 818 821 823 825 827
829 831 833 835 837 839 841 843 845 847 849 851 856 858
861 863 865 867 869 871 873 875 877 879 881 883 885 887
889 891 894 896 898 900 902 904 906 908 910 912 914 916
918 920 922 924 927 929 931 933 935 937 939 941 943 945
947 949 951 953 955 957 960 962 964 966 968 970 972 974
976 978 980 982 984 986 988 990 995 997 1000 1002 1004 1006
1008 1010 1012 1014 1016 1018 1020 1022 1024 1026 1028 1030 1033 1035
1037 1039 1041 1043 1045 1047 1049 1051 1053 1055 1057 1059 1061 1063
1066 1068 1070 1072 1074 1076 1078 1080 1082 1084 1086 1088 1090 1092
1094 1096 1099 1101 1103 1105 1107 1109 1111 1113 1115 1117 1119 1121
1123 1125 1127 1129 1134 1136 1139 1141 1143 1145 1147 1149 1151 1153
1155 1157 1159 1161 1163 1165 1167 1169 1172 1174 1176 1178 1180 1182
1184 1186 1188 1190 1192 1194 1196 1198 1200 1202 1205 1207 1209 1211
1213 1215 1217 1219 1221 1223 1225 1227 1229 1231 1233 1235 1238 1240
1242 1244 1246 1248 1250 1252 1254 1256 1258 1260 1262 1264 1266 1268
1273 1275 1278 1280 1282 1284 1286 1288 1290 1292 1294 1296 1298 1300
1302 1304 1306 1308 1311 1313 1315 1317 1319 1321 1323 1325 1327 1329
1331 1333 1335 1337 1339 1341 1344 1346 1348 1350 1352 1354 1356 1358
1360 1362 1364 1366 1368 1370 1372 1374 1377 1379 1381 1383 1385 1387
1389 1391 1393 1395 1397 1399 1401 1403 1405 1407 1412 1414 1417 1419
1421 1423 1425 1427 1429 1431 1433 1435 1437 1439 1441 1443 1445 1447
1450 1452 1454 1456 1458 1460 1462 1464 1466 1468 1470 1472 1474 1476
1478 1480 1483 1485 1487 1489 1491 1493 1495 1497 1499 1501 1503 1505
1507 1509 1511 1513 1516 1518 1520 1522 1524 1526 1528 1530 1532 1534
1536 1538 1540 1542 1544 1546 1551 1553 1556 1558 1560 1562 1564 1566
1568 1570 1572 1574 1576 1578 1580 1582 1584 1586 1589 1591 1593 1595
1597 1599 1601 1603 1605 1607 1609 1611 1613 1615 1617 1619 1622 1624
1626 1628 1630 1632 1634 1636 1638 1640 1642 1644 1646 1648 1650 1652
1655 1657 1659 1661 1663 1665 1667 1669 1671 1673 1675 1677 1679 1681
1683 1685 1690 1692 1695 1697 1699 1701 1703 1705 1707 1709 1711 1713
1715 1717 1719 1721 1723 1725 1728 1730 1732 1734 1736 1738 1740 1742
1744 1746 1748 1750 1752 1754 1756 1758 1761 1763 1765 1767 1769 1771 SEQ 1286
1773 1775 1777 1779 1781 1783 1785 1787 1789 1791 1794 1796 1798 1800
1802 1804 1806 1808 1810 1812 1814 1816 1818 1820 1822 1824 1829 1831
1834 1836 1838 1840 1842 1844 1846 1848 1850 1852 1854 1856 1858 1860
1862 1864 1867 1869 1871 1873 1875 1877 1879 1881 1883 1885 1887 1889
1891 1893 1895 1897 1900 1902 1904 1906 1908 1910 1912 1914 1916 1918
1920 1922 1924 1926 1928 1930 1933 1935 1937 1939 1941 1943 1945 1947
1949 1951 1953 1955 1957 1959 1961 1963 1968 1970 1973 1975 1977 1979
1981 1983 1985 1987 1989 1991 1993 1995 1997 1999 2001 2003 2006 2008
2010 2012 2014 2016 2018 2020 2022 2024 2026 2028 2030 2032 2034 2036
2039 2041 2043 2045 2047 2049 2051 2053 2055 2057 2059 2061 2063 2065
2067 2069 2072 2074 2076 2078 2080 2082 2084 2086 2088 2090 2092 2094
2096 2098 2100 2102 2107 2109 2112 2114 2116 2118 2120 2122 2124 2126
2128 2130 2132 2134 2136 2138 2140 2142 2145 2147 2149 2151 2153 2155
2157 2159 2161 2163 2165 2167 2169 2171 2173 2175 2178 2180 2182 2184
2186 2188 2190 2192 2194 2196 2198 2200 2202 2204 2206 2208 2211 2213
2215 2217 2219 2221 2223 2225 2227 2229 2231 2233 2235 2237 2239 2241
2246 2248 2251 2253 2255 2257 2259 2261 2263 2265 2267 2269 2271 2273
2275 2277 2279 2281 2284 2286 2288 2290 2292 2294 2296 2298 2300 2302
2304 2306 2308 2310 2312 2314 2317 2319 2321 2323 2325 2327 2329 2331
2333 2335 2337 2339 2341 2343 2345 2347 2350 2352 2354 2356 2358 2360
2362 2364 2366 2368 2370 2372 2374 2376 2378 2380 2385 2387 2390 2392
2394 2396 2398 2400 2402 2404 2406 2408 2410 2412 2414 2416 2418 2420
2423 2425 2427 2429 2431 2433 2435 2437 2439 2441 2443 2445 2447 2449
2451 2453 2456 2458 2460 2462 2464 2466 2468 2470 2472 2474 2476 2478
2480 2482 2484 2486 2489 2491 2493 2495 2497 2499 2501 2503 2505 2507
2509 2511 2513 2515 2517 2519 2521
CONCAT 102 104 110 112 114 116 118 120 122 124 126 128 130 132
134 136 138 140 142 144 149 151 153 158 160 162 167 169
171 176 178 180 185 187 189 194 196 198 203 205 207 212
214 216 221 223 225 230 232 234 239 241 243 248 250 252
257 259 261 266 268 270 275 277 279 284 286 288 293 295
300 302 305 307 309 311 313 315 317 319 321 323 325 327
329 331 333 335 338 340 342 344 346 348 350 352 354 356
358 360 362 364 366 368 371 373 375 377 379 381 383 385
387 389 391 393 395 397 399 401 404 406 408 410 412 414
416 418 420 422 424 426 428 430 432 434 439 441 444 446
448 450 452 454 456 458 460 462 464 466 468 470 472 474
477 479 481 483 485 487 489 491 493 495 497 499 501 503
505 507 510 512 514 516 518 520 522 524 526 528 530 532
534 536 538 540 543 545 547 549 551 553 555 557 559 561
563 565 567 569 571 573 578 580 583 585 587 589 591 593
595 597 599 601 603 605 607 609 611 613 616 618 620 622
624 626 628 630 632 634 636 638 640 642 644 646 649 651
653 655 657 659 661 663 665 667 669 671 673 675 677 679
682 684 686 688 690 692 694 696 698 700 702 704 706 708
710 712 717 719 722 724 726 728 730 732 734 736 738 740
742 744 746 748 750 752 755 757 759 761 763 765 767 769
771 773 775 777 779 781 783 785 788 790 792 794 796 798
800 802 804 806 808 810 812 814 816 818 821 823 825 827
829 831 833 835 837 839 841 843 845 847 849 851 856 858
861 863 865 867 869 871 873 875 877 879 881 883 885 887
889 891 894 896 898 900 902 904 906 908 910 912 914 916
918 920 922 924 927 929 931 933 935 937 939 941 943 945 SEQ 1287
947 949 951 953 955 957 960 962 964 966 968 970 972 974
976 978 980 982 984 986 988 990 995 997 1000 1002 1004 1006
1008 1010 1012 1014 1016 1018 1020 1022 1024 1026 1028 1030 1033 1035
1037 1039 1041 1043 1045 1047 1049 1051 1053 1055 1057 1059 1061 1063
1066 1068 1070 1072 1074 1076 1078 1080 1082 1084 1086 1088 1090 1092
1094 1096 1099 1101 1103 1105 1107 1109 1111 1113 1115 1117 1119 1121
1123 1125 1127 1129 1134 1136 1139 1141 1143 1145 1147 1149 1151 1153
1155 1157 1159 1161 1163 1165 1167 1169 1172 1174 1176 1178 1180 1182
1184 1186 1188 1190 1192 1194 1196 1198 1200 1202 1205 1207 1209 1211
1213 1215 1217 1219 1221 1223 1225 1227 1229 1231 1233 1235 1238 1240
1242 1244 1246 1248 1250 1252 1254 1256 1258 1260 1262 1264 1266 1268
1273 1275 1278 1280 1282 1284 1286 1288 1290 1292 1294 1296 1298 1300
1302 1304 1306 1308 1311 1313 1315 1317 1319 1321 1323 1325 1327 1329
1331 1333 1335 1337 1339 1341 1344 1346 1348 1350 1352 1354 1356 1358
1360 1362 1364 1366 1368 1370 1372 1374 1377 1379 1381 1383 1385 1387
1389 1391 1393 1395 1397 1399 1401 1403 1405 1407 1412 1414 1417 1419
1421 1423 1425 1427 1429 1431 1433 1435 1437 1439 1441 1443 1445 1447
1450 1452 1454 1456 1458 1460 1462 1464 1466 1468 1470 1472 1474 1476
1478 1480 1483 1485 1487 1489 1491 1493 1495 1497 1499 1501 1503 1505
1507 1509 1511 1513 1516 1518 1520 1522 1524 1526 1528 1530 1532 1534
1536 1538 1540 1542 1544 1546 1551 1553 1556 1558 1560 1562 1564 1566
1568 1570 1572 1574 1576 1578 1580 1582 1584 1586 1589 1591 1593 1595
1597 1599 1601 1603 1605 1607 1609 1611 1613 1615 1617 1619 1622 1624
1626 1628 1630 1632 1634 1636 1638 1640 1642 1644 1646 1648 1650 1652
1655 1657 1659 1661 1663 1665 1667 1669 1671 1673 1675 1677 1679 1681
1683 1685 1690 1692 1695 1697 1699 1701 1703 1705 1707 1709 1711 1713
1715 1717 1719 1721 1723 1725 1728 1730 1732 1734 1736 1738 1740 1742
1744 1746 1748 1750 1752 1754 1756 1758 1761 1763 1765 1767 1769 1771
1773 1775 1777 1779 1781 1783 1785 1787 1789 1791 1794 1796 1798 1800
1802 1804 1806 1808 1810 1812 1814 1816 1818 1820 1822 1824 1829 1831
1834 1836 1838 1840 1842 1844 1846 1848 1850 1852 1854 1856 1858 1860
1862 1864 1867 1869 1871 1873 1875 1877 1879 1881 1883 1885 1887 1889
1891 1893 1895 1897 1900 1902 1904 1906 1908 1910 1912 1914 1916 1918
1920 1922 1924 1926 1928 1930 1933 1935 1937 1939 1941 1943 1945 1947
1949 1951 1953 1955 1957 1959 1961 1963 1968 1970 1973 1975 1977 1979
1981 1983 1985 1987 1989 1991 1993 1995 1997 1999 2001 2003 2006 2008
2010 2012 2014 2016 2018 2020 2022 2024 2026 2028 2030 2032 2034 2036
2039 2041 2043 2045 2047 2049 2051 2053 2055 2057 2059 2061 2063 2065
2067 2069 2072 2074 2076 2078 2080 2082 2084 2086 2088 2090 2092 2094
2096 2098 2100 2102 2107 2109 2112 2114 2116 2118 2120 2122 2124 2126
2128 2130 2132 2134 2136 2138 2140 2142 2145 2147 2149 2151 2153 2155
2157 2159 2161 2163 2165 2167 2169 2171 2173 2175 2178 2180 2182 2184
2186 2188 2190 2192 2194 2196 2198 2200 2202 2204 2206 2208 2211 2213
2215 2217 2219 2221 2223 2225 2227 2229 2231 2233 2235 2237 2239 2241
2246 2248 2251 2253 2255 2257 2259 2261 2263 2265 2267 2269 2271 2273
2275 2277 2279 2281 2284 2286 2288 2290 2292 2294 2296 2298 2300 2302
2304 2306 2308 2310 2312 2314 2317 2319 2321 2323 2325 2327 2329 2331
2333 2335 2337 2339 2341 2343 2345 2347 2350 2352 2354 2356 2358 2360
2362 2364 2366 2368 2370 2372 2374 2376 2378 2380 2385 2387 2390 2392
2394 2396 2398 2400 2402 2404 2406 2408 2410 2412 2414 2416 2418 2420
2423 2425 2427 2429 2431 2433 2435 2437 2439 2441 2443 2445 2447 2449
2451 2453 2456 2458 2460 2462 2464 2466 2468 2470 2472 2474 2476 2478
2480 2482 2484 2486 2489 2491 2493 2495 2497 2499 2501 2503 2505 2507 SEQ 1288
2509 2511 2513 2515 2517 2519 2521
FIELD 102 104 110 112 114 116 118 120 122 124 126 128 130 132
134 136 138 140 142 144 149 151 153 158 160 162 167 169
171 176 178 180 185 187 189 194 196 198 203 205 207 212
214 216 221 223 225 230 232 234 239 241 243 248 250 252
257 259 261 266 268 270 275 277 279 284 286 288 293 295
300 302 305 307 309 311 313 315 317 319 321 323 325 327
329 331 333 335 338 340 342 344 346 348 350 352 354 356
358 360 362 364 366 368 371 373 375 377 379 381 383 385
387 389 391 393 395 397 399 401 404 406 408 410 412 414
416 418 420 422 424 426 428 430 432 434 439 441 444 446
448 450 452 454 456 458 460 462 464 466 468 470 472 474
477 479 481 483 485 487 489 491 493 495 497 499 501 503
505 507 510 512 514 516 518 520 522 524 526 528 530 532
534 536 538 540 543 545 547 549 551 553 555 557 559 561
563 565 567 569 571 573 578 580 583 585 587 589 591 593
595 597 599 601 603 605 607 609 611 613 616 618 620 622
624 626 628 630 632 634 636 638 640 642 644 646 649 651
653 655 657 659 661 663 665 667 669 671 673 675 677 679
682 684 686 688 690 692 694 696 698 700 702 704 706 708
710 712 717 719 722 724 726 728 730 732 734 736 738 740
742 744 746 748 750 752 755 757 759 761 763 765 767 769
771 773 775 777 779 781 783 785 788 790 792 794 796 798
800 802 804 806 808 810 812 814 816 818 821 823 825 827
829 831 833 835 837 839 841 843 845 847 849 851 856 858
861 863 865 867 869 871 873 875 877 879 881 883 885 887
889 891 894 896 898 900 902 904 906 908 910 912 914 916
918 920 922 924 927 929 931 933 935 937 939 941 943 945
947 949 951 953 955 957 960 962 964 966 968 970 972 974
976 978 980 982 984 986 988 990 995 997 1000 1002 1004 1006
1008 1010 1012 1014 1016 1018 1020 1022 1024 1026 1028 1030 1033 1035
1037 1039 1041 1043 1045 1047 1049 1051 1053 1055 1057 1059 1061 1063
1066 1068 1070 1072 1074 1076 1078 1080 1082 1084 1086 1088 1090 1092
1094 1096 1099 1101 1103 1105 1107 1109 1111 1113 1115 1117 1119 1121
1123 1125 1127 1129 1134 1136 1139 1141 1143 1145 1147 1149 1151 1153
1155 1157 1159 1161 1163 1165 1167 1169 1172 1174 1176 1178 1180 1182
1184 1186 1188 1190 1192 1194 1196 1198 1200 1202 1205 1207 1209 1211
1213 1215 1217 1219 1221 1223 1225 1227 1229 1231 1233 1235 1238 1240
1242 1244 1246 1248 1250 1252 1254 1256 1258 1260 1262 1264 1266 1268
1273 1275 1278 1280 1282 1284 1286 1288 1290 1292 1294 1296 1298 1300
1302 1304 1306 1308 1311 1313 1315 1317 1319 1321 1323 1325 1327 1329
1331 1333 1335 1337 1339 1341 1344 1346 1348 1350 1352 1354 1356 1358
1360 1362 1364 1366 1368 1370 1372 1374 1377 1379 1381 1383 1385 1387
1389 1391 1393 1395 1397 1399 1401 1403 1405 1407 1412 1414 1417 1419
1421 1423 1425 1427 1429 1431 1433 1435 1437 1439 1441 1443 1445 1447
1450 1452 1454 1456 1458 1460 1462 1464 1466 1468 1470 1472 1474 1476
1478 1480 1483 1485 1487 1489 1491 1493 1495 1497 1499 1501 1503 1505
1507 1509 1511 1513 1516 1518 1520 1522 1524 1526 1528 1530 1532 1534
1536 1538 1540 1542 1544 1546 1551 1553 1556 1558 1560 1562 1564 1566
1568 1570 1572 1574 1576 1578 1580 1582 1584 1586 1589 1591 1593 1595
1597 1599 1601 1603 1605 1607 1609 1611 1613 1615 1617 1619 1622 1624
1626 1628 1630 1632 1634 1636 1638 1640 1642 1644 1646 1648 1650 1652
1655 1657 1659 1661 1663 1665 1667 1669 1671 1673 1675 1677 1679 1681 SEQ 1289
1683 1685 1690 1692 1695 1697 1699 1701 1703 1705 1707 1709 1711 1713
1715 1717 1719 1721 1723 1725 1728 1730 1732 1734 1736 1738 1740 1742
1744 1746 1748 1750 1752 1754 1756 1758 1761 1763 1765 1767 1769 1771
1773 1775 1777 1779 1781 1783 1785 1787 1789 1791 1794 1796 1798 1800
1802 1804 1806 1808 1810 1812 1814 1816 1818 1820 1822 1824 1829 1831
1834 1836 1838 1840 1842 1844 1846 1848 1850 1852 1854 1856 1858 1860
1862 1864 1867 1869 1871 1873 1875 1877 1879 1881 1883 1885 1887 1889
1891 1893 1895 1897 1900 1902 1904 1906 1908 1910 1912 1914 1916 1918
1920 1922 1924 1926 1928 1930 1933 1935 1937 1939 1941 1943 1945 1947
1949 1951 1953 1955 1957 1959 1961 1963 1968 1970 1973 1975 1977 1979
1981 1983 1985 1987 1989 1991 1993 1995 1997 1999 2001 2003 2006 2008
2010 2012 2014 2016 2018 2020 2022 2024 2026 2028 2030 2032 2034 2036
2039 2041 2043 2045 2047 2049 2051 2053 2055 2057 2059 2061 2063 2065
2067 2069 2072 2074 2076 2078 2080 2082 2084 2086 2088 2090 2092 2094
2096 2098 2100 2102 2107 2109 2112 2114 2116 2118 2120 2122 2124 2126
2128 2130 2132 2134 2136 2138 2140 2142 2145 2147 2149 2151 2153 2155
2157 2159 2161 2163 2165 2167 2169 2171 2173 2175 2178 2180 2182 2184
2186 2188 2190 2192 2194 2196 2198 2200 2202 2204 2206 2208 2211 2213
2215 2217 2219 2221 2223 2225 2227 2229 2231 2233 2235 2237 2239 2241
2246 2248 2251 2253 2255 2257 2259 2261 2263 2265 2267 2269 2271 2273
2275 2277 2279 2281 2284 2286 2288 2290 2292 2294 2296 2298 2300 2302
2304 2306 2308 2310 2312 2314 2317 2319 2321 2323 2325 2327 2329 2331
2333 2335 2337 2339 2341 2343 2345 2347 2350 2352 2354 2356 2358 2360
2362 2364 2366 2368 2370 2372 2374 2376 2378 2380 2385 2387 2390 2392
2394 2396 2398 2400 2402 2404 2406 2408 2410 2412 2414 2416 2418 2420
2423 2425 2427 2429 2431 2433 2435 2437 2439 2441 2443 2445 2447 2449
2451 2453 2456 2458 2460 2462 2464 2466 2468 2470 2472 2474 2476 2478
2480 2482 2484 2486 2489 2491 2493 2495 2497 2499 2501 2503 2505 2507
2509 2511 2513 2515 2517 2519 2521
GO 74 76 86
MFLD 102# 102 104# 104 110# 110 112# 112 114# 114 116# 116 118# 118
120# 120 122# 122 124# 124 126# 126 128# 128 130# 130 132# 132
134# 134 136# 136 138# 138 140# 140 142# 142 144# 144 149# 149
151# 151 153# 153 158# 158 160# 160 162# 162 167# 167 169# 169
171# 171 176# 176 178# 178 180# 180 185# 185 187# 187 189# 189
194# 194 196# 196 198# 198 203# 203 205# 205 207# 207 212# 212
214# 214 216# 216 221# 221 223# 223 225# 225 230# 230 232# 232
234# 234 239# 239 241# 241 243# 243 248# 248 250# 250 252# 252
257# 257 259# 259 261# 261 266# 266 268# 268 270# 270 275# 275
277# 277 279# 279 284# 284 286# 286 288# 288 293# 293 295# 295
300# 300 302# 302 305# 305 307# 307 309# 309 311# 311 313# 313
315# 315 317# 317 319# 319 321# 321 323# 323 325# 325 327# 327
329# 329 331# 331 333# 333 335# 335 338# 338 340# 340 342# 342
344# 344 346# 346 348# 348 350# 350 352# 352 354# 354 356# 356
358# 358 360# 360 362# 362 364# 364 366# 366 368# 368 371# 371
373# 373 375# 375 377# 377 379# 379 381# 381 383# 383 385# 385
387# 387 389# 389 391# 391 393# 393 395# 395 397# 397 399# 399
401# 401 404# 404 406# 406 408# 408 410# 410 412# 412 414# 414
416# 416 418# 418 420# 420 422# 422 424# 424 426# 426 428# 428
430# 430 432# 432 434# 434 439# 439 441# 441 444# 444 446# 446
448# 448 450# 450 452# 452 454# 454 456# 456 458# 458 460# 460
462# 462 464# 464 466# 466 468# 468 470# 470 472# 472 474# 474
477# 477 479# 479 481# 481 483# 483 485# 485 487# 487 489# 489 SEQ 1290
491# 491 493# 493 495# 495 497# 497 499# 499 501# 501 503# 503
505# 505 507# 507 510# 510 512# 512 514# 514 516# 516 518# 518
520# 520 522# 522 524# 524 526# 526 528# 528 530# 530 532# 532
534# 534 536# 536 538# 538 540# 540 543# 543 545# 545 547# 547
549# 549 551# 551 553# 553 555# 555 557# 557 559# 559 561# 561
563# 563 565# 565 567# 567 569# 569 571# 571 573# 573 578# 578
580# 580 583# 583 585# 585 587# 587 589# 589 591# 591 593# 593
595# 595 597# 597 599# 599 601# 601 603# 603 605# 605 607# 607
609# 609 611# 611 613# 613 616# 616 618# 618 620# 620 622# 622
624# 624 626# 626 628# 628 630# 630 632# 632 634# 634 636# 636
638# 638 640# 640 642# 642 644# 644 646# 646 649# 649 651# 651
653# 653 655# 655 657# 657 659# 659 661# 661 663# 663 665# 665
667# 667 669# 669 671# 671 673# 673 675# 675 677# 677 679# 679
682# 682 684# 684 686# 686 688# 688 690# 690 692# 692 694# 694
696# 696 698# 698 700# 700 702# 702 704# 704 706# 706 708# 708
710# 710 712# 712 717# 717 719# 719 722# 722 724# 724 726# 726
728# 728 730# 730 732# 732 734# 734 736# 736 738# 738 740# 740
742# 742 744# 744 746# 746 748# 748 750# 750 752# 752 755# 755
757# 757 759# 759 761# 761 763# 763 765# 765 767# 767 769# 769
771# 771 773# 773 775# 775 777# 777 779# 779 781# 781 783# 783
785# 785 788# 788 790# 790 792# 792 794# 794 796# 796 798# 798
800# 800 802# 802 804# 804 806# 806 808# 808 810# 810 812# 812
814# 814 816# 816 818# 818 821# 821 823# 823 825# 825 827# 827
829# 829 831# 831 833# 833 835# 835 837# 837 839# 839 841# 841
843# 843 845# 845 847# 847 849# 849 851# 851 856# 856 858# 858
861# 861 863# 863 865# 865 867# 867 869# 869 871# 871 873# 873
875# 875 877# 877 879# 879 881# 881 883# 883 885# 885 887# 887
889# 889 891# 891 894# 894 896# 896 898# 898 900# 900 902# 902
904# 904 906# 906 908# 908 910# 910 912# 912 914# 914 916# 916
918# 918 920# 920 922# 922 924# 924 927# 927 929# 929 931# 931
933# 933 935# 935 937# 937 939# 939 941# 941 943# 943 945# 945
947# 947 949# 949 951# 951 953# 953 955# 955 957# 957 960# 960
962# 962 964# 964 966# 966 968# 968 970# 970 972# 972 974# 974
976# 976 978# 978 980# 980 982# 982 984# 984 986# 986 988# 988
990# 990 995# 995 997# 997 1000# 1000 1002# 1002 1004# 1004 1006# 1006
1008# 1008 1010# 1010 1012# 1012 1014# 1014 1016# 1016 1018# 1018 1020# 1020
1022# 1022 1024# 1024 1026# 1026 1028# 1028 1030# 1030 1033# 1033 1035# 1035
1037# 1037 1039# 1039 1041# 1041 1043# 1043 1045# 1045 1047# 1047 1049# 1049
1051# 1051 1053# 1053 1055# 1055 1057# 1057 1059# 1059 1061# 1061 1063# 1063
1066# 1066 1068# 1068 1070# 1070 1072# 1072 1074# 1074 1076# 1076 1078# 1078
1080# 1080 1082# 1082 1084# 1084 1086# 1086 1088# 1088 1090# 1090 1092# 1092
1094# 1094 1096# 1096 1099# 1099 1101# 1101 1103# 1103 1105# 1105 1107# 1107
1109# 1109 1111# 1111 1113# 1113 1115# 1115 1117# 1117 1119# 1119 1121# 1121
1123# 1123 1125# 1125 1127# 1127 1129# 1129 1134# 1134 1136# 1136 1139# 1139
1141# 1141 1143# 1143 1145# 1145 1147# 1147 1149# 1149 1151# 1151 1153# 1153
1155# 1155 1157# 1157 1159# 1159 1161# 1161 1163# 1163 1165# 1165 1167# 1167
1169# 1169 1172# 1172 1174# 1174 1176# 1176 1178# 1178 1180# 1180 1182# 1182
1184# 1184 1186# 1186 1188# 1188 1190# 1190 1192# 1192 1194# 1194 1196# 1196
1198# 1198 1200# 1200 1202# 1202 1205# 1205 1207# 1207 1209# 1209 1211# 1211
1213# 1213 1215# 1215 1217# 1217 1219# 1219 1221# 1221 1223# 1223 1225# 1225
1227# 1227 1229# 1229 1231# 1231 1233# 1233 1235# 1235 1238# 1238 1240# 1240
1242# 1242 1244# 1244 1246# 1246 1248# 1248 1250# 1250 1252# 1252 1254# 1254
1256# 1256 1258# 1258 1260# 1260 1262# 1262 1264# 1264 1266# 1266 1268# 1268 SEQ 1291
1273# 1273 1275# 1275 1278# 1278 1280# 1280 1282# 1282 1284# 1284 1286# 1286
1288# 1288 1290# 1290 1292# 1292 1294# 1294 1296# 1296 1298# 1298 1300# 1300
1302# 1302 1304# 1304 1306# 1306 1308# 1308 1311# 1311 1313# 1313 1315# 1315
1317# 1317 1319# 1319 1321# 1321 1323# 1323 1325# 1325 1327# 1327 1329# 1329
1331# 1331 1333# 1333 1335# 1335 1337# 1337 1339# 1339 1341# 1341 1344# 1344
1346# 1346 1348# 1348 1350# 1350 1352# 1352 1354# 1354 1356# 1356 1358# 1358
1360# 1360 1362# 1362 1364# 1364 1366# 1366 1368# 1368 1370# 1370 1372# 1372
1374# 1374 1377# 1377 1379# 1379 1381# 1381 1383# 1383 1385# 1385 1387# 1387
1389# 1389 1391# 1391 1393# 1393 1395# 1395 1397# 1397 1399# 1399 1401# 1401
1403# 1403 1405# 1405 1407# 1407 1412# 1412 1414# 1414 1417# 1417 1419# 1419
1421# 1421 1423# 1423 1425# 1425 1427# 1427 1429# 1429 1431# 1431 1433# 1433
1435# 1435 1437# 1437 1439# 1439 1441# 1441 1443# 1443 1445# 1445 1447# 1447
1450# 1450 1452# 1452 1454# 1454 1456# 1456 1458# 1458 1460# 1460 1462# 1462
1464# 1464 1466# 1466 1468# 1468 1470# 1470 1472# 1472 1474# 1474 1476# 1476
1478# 1478 1480# 1480 1483# 1483 1485# 1485 1487# 1487 1489# 1489 1491# 1491
1493# 1493 1495# 1495 1497# 1497 1499# 1499 1501# 1501 1503# 1503 1505# 1505
1507# 1507 1509# 1509 1511# 1511 1513# 1513 1516# 1516 1518# 1518 1520# 1520
1522# 1522 1524# 1524 1526# 1526 1528# 1528 1530# 1530 1532# 1532 1534# 1534
1536# 1536 1538# 1538 1540# 1540 1542# 1542 1544# 1544 1546# 1546 1551# 1551
1553# 1553 1556# 1556 1558# 1558 1560# 1560 1562# 1562 1564# 1564 1566# 1566
1568# 1568 1570# 1570 1572# 1572 1574# 1574 1576# 1576 1578# 1578 1580# 1580
1582# 1582 1584# 1584 1586# 1586 1589# 1589 1591# 1591 1593# 1593 1595# 1595
1597# 1597 1599# 1599 1601# 1601 1603# 1603 1605# 1605 1607# 1607 1609# 1609
1611# 1611 1613# 1613 1615# 1615 1617# 1617 1619# 1619 1622# 1622 1624# 1624
1626# 1626 1628# 1628 1630# 1630 1632# 1632 1634# 1634 1636# 1636 1638# 1638
1640# 1640 1642# 1642 1644# 1644 1646# 1646 1648# 1648 1650# 1650 1652# 1652
1655# 1655 1657# 1657 1659# 1659 1661# 1661 1663# 1663 1665# 1665 1667# 1667
1669# 1669 1671# 1671 1673# 1673 1675# 1675 1677# 1677 1679# 1679 1681# 1681
1683# 1683 1685# 1685 1690# 1690 1692# 1692 1695# 1695 1697# 1697 1699# 1699
1701# 1701 1703# 1703 1705# 1705 1707# 1707 1709# 1709 1711# 1711 1713# 1713
1715# 1715 1717# 1717 1719# 1719 1721# 1721 1723# 1723 1725# 1725 1728# 1728
1730# 1730 1732# 1732 1734# 1734 1736# 1736 1738# 1738 1740# 1740 1742# 1742
1744# 1744 1746# 1746 1748# 1748 1750# 1750 1752# 1752 1754# 1754 1756# 1756
1758# 1758 1761# 1761 1763# 1763 1765# 1765 1767# 1767 1769# 1769 1771# 1771
1773# 1773 1775# 1775 1777# 1777 1779# 1779 1781# 1781 1783# 1783 1785# 1785
1787# 1787 1789# 1789 1791# 1791 1794# 1794 1796# 1796 1798# 1798 1800# 1800
1802# 1802 1804# 1804 1806# 1806 1808# 1808 1810# 1810 1812# 1812 1814# 1814
1816# 1816 1818# 1818 1820# 1820 1822# 1822 1824# 1824 1829# 1829 1831# 1831
1834# 1834 1836# 1836 1838# 1838 1840# 1840 1842# 1842 1844# 1844 1846# 1846
1848# 1848 1850# 1850 1852# 1852 1854# 1854 1856# 1856 1858# 1858 1860# 1860
1862# 1862 1864# 1864 1867# 1867 1869# 1869 1871# 1871 1873# 1873 1875# 1875
1877# 1877 1879# 1879 1881# 1881 1883# 1883 1885# 1885 1887# 1887 1889# 1889
1891# 1891 1893# 1893 1895# 1895 1897# 1897 1900# 1900 1902# 1902 1904# 1904
1906# 1906 1908# 1908 1910# 1910 1912# 1912 1914# 1914 1916# 1916 1918# 1918
1920# 1920 1922# 1922 1924# 1924 1926# 1926 1928# 1928 1930# 1930 1933# 1933
1935# 1935 1937# 1937 1939# 1939 1941# 1941 1943# 1943 1945# 1945 1947# 1947
1949# 1949 1951# 1951 1953# 1953 1955# 1955 1957# 1957 1959# 1959 1961# 1961
1963# 1963 1968# 1968 1970# 1970 1973# 1973 1975# 1975 1977# 1977 1979# 1979
1981# 1981 1983# 1983 1985# 1985 1987# 1987 1989# 1989 1991# 1991 1993# 1993
1995# 1995 1997# 1997 1999# 1999 2001# 2001 2003# 2003 2006# 2006 2008# 2008
2010# 2010 2012# 2012 2014# 2014 2016# 2016 2018# 2018 2020# 2020 2022# 2022
2024# 2024 2026# 2026 2028# 2028 2030# 2030 2032# 2032 2034# 2034 2036# 2036
2039# 2039 2041# 2041 2043# 2043 2045# 2045 2047# 2047 2049# 2049 2051# 2051 SEQ 1292
2053# 2053 2055# 2055 2057# 2057 2059# 2059 2061# 2061 2063# 2063 2065# 2065
2067# 2067 2069# 2069 2072# 2072 2074# 2074 2076# 2076 2078# 2078 2080# 2080
2082# 2082 2084# 2084 2086# 2086 2088# 2088 2090# 2090 2092# 2092 2094# 2094
2096# 2096 2098# 2098 2100# 2100 2102# 2102 2107# 2107 2109# 2109 2112# 2112
2114# 2114 2116# 2116 2118# 2118 2120# 2120 2122# 2122 2124# 2124 2126# 2126
2128# 2128 2130# 2130 2132# 2132 2134# 2134 2136# 2136 2138# 2138 2140# 2140
2142# 2142 2145# 2145 2147# 2147 2149# 2149 2151# 2151 2153# 2153 2155# 2155
2157# 2157 2159# 2159 2161# 2161 2163# 2163 2165# 2165 2167# 2167 2169# 2169
2171# 2171 2173# 2173 2175# 2175 2178# 2178 2180# 2180 2182# 2182 2184# 2184
2186# 2186 2188# 2188 2190# 2190 2192# 2192 2194# 2194 2196# 2196 2198# 2198
2200# 2200 2202# 2202 2204# 2204 2206# 2206 2208# 2208 2211# 2211 2213# 2213
2215# 2215 2217# 2217 2219# 2219 2221# 2221 2223# 2223 2225# 2225 2227# 2227
2229# 2229 2231# 2231 2233# 2233 2235# 2235 2237# 2237 2239# 2239 2241# 2241
2246# 2246 2248# 2248 2251# 2251 2253# 2253 2255# 2255 2257# 2257 2259# 2259
2261# 2261 2263# 2263 2265# 2265 2267# 2267 2269# 2269 2271# 2271 2273# 2273
2275# 2275 2277# 2277 2279# 2279 2281# 2281 2284# 2284 2286# 2286 2288# 2288
2290# 2290 2292# 2292 2294# 2294 2296# 2296 2298# 2298 2300# 2300 2302# 2302
2304# 2304 2306# 2306 2308# 2308 2310# 2310 2312# 2312 2314# 2314 2317# 2317
2319# 2319 2321# 2321 2323# 2323 2325# 2325 2327# 2327 2329# 2329 2331# 2331
2333# 2333 2335# 2335 2337# 2337 2339# 2339 2341# 2341 2343# 2343 2345# 2345
2347# 2347 2350# 2350 2352# 2352 2354# 2354 2356# 2356 2358# 2358 2360# 2360
2362# 2362 2364# 2364 2366# 2366 2368# 2368 2370# 2370 2372# 2372 2374# 2374
2376# 2376 2378# 2378 2380# 2380 2385# 2385 2387# 2387 2390# 2390 2392# 2392
2394# 2394 2396# 2396 2398# 2398 2400# 2400 2402# 2402 2404# 2404 2406# 2406
2408# 2408 2410# 2410 2412# 2412 2414# 2414 2416# 2416 2418# 2418 2420# 2420
2423# 2423 2425# 2425 2427# 2427 2429# 2429 2431# 2431 2433# 2433 2435# 2435
2437# 2437 2439# 2439 2441# 2441 2443# 2443 2445# 2445 2447# 2447 2449# 2449
2451# 2451 2453# 2453 2456# 2456 2458# 2458 2460# 2460 2462# 2462 2464# 2464
2466# 2466 2468# 2468 2470# 2470 2472# 2472 2474# 2474 2476# 2476 2478# 2478
2480# 2480 2482# 2482 2484# 2484 2486# 2486 2489# 2489 2491# 2491 2493# 2493
2495# 2495 2497# 2497 2499# 2499 2501# 2501 2503# 2503 2505# 2505 2507# 2507
2509# 2509 2511# 2511 2513# 2513 2515# 2515 2517# 2517 2519# 2519 2521# 2521
MWORD 102 104 110 112 114 116 118 120 122 124 126 128 130 132
134 136 138 140 142 144 149 151 153 158 160 162 167 169
171 176 178 180 185 187 189 194 196 198 203 205 207 212
214 216 221 223 225 230 232 234 239 241 243 248 250 252
257 259 261 266 268 270 275 277 279 284 286 288 293 295
300 302 305 307 309 311 313 315 317 319 321 323 325 327
329 331 333 335 338 340 342 344 346 348 350 352 354 356
358 360 362 364 366 368 371 373 375 377 379 381 383 385
387 389 391 393 395 397 399 401 404 406 408 410 412 414
416 418 420 422 424 426 428 430 432 434 439 441 444 446
448 450 452 454 456 458 460 462 464 466 468 470 472 474
477 479 481 483 485 487 489 491 493 495 497 499 501 503
505 507 510 512 514 516 518 520 522 524 526 528 530 532
534 536 538 540 543 545 547 549 551 553 555 557 559 561
563 565 567 569 571 573 578 580 583 585 587 589 591 593
595 597 599 601 603 605 607 609 611 613 616 618 620 622
624 626 628 630 632 634 636 638 640 642 644 646 649 651
653 655 657 659 661 663 665 667 669 671 673 675 677 679
682 684 686 688 690 692 694 696 698 700 702 704 706 708
710 712 717 719 722 724 726 728 730 732 734 736 738 740
742 744 746 748 750 752 755 757 759 761 763 765 767 769 SEQ 1293
771 773 775 777 779 781 783 785 788 790 792 794 796 798
800 802 804 806 808 810 812 814 816 818 821 823 825 827
829 831 833 835 837 839 841 843 845 847 849 851 856 858
861 863 865 867 869 871 873 875 877 879 881 883 885 887
889 891 894 896 898 900 902 904 906 908 910 912 914 916
918 920 922 924 927 929 931 933 935 937 939 941 943 945
947 949 951 953 955 957 960 962 964 966 968 970 972 974
976 978 980 982 984 986 988 990 995 997 1000 1002 1004 1006
1008 1010 1012 1014 1016 1018 1020 1022 1024 1026 1028 1030 1033 1035
1037 1039 1041 1043 1045 1047 1049 1051 1053 1055 1057 1059 1061 1063
1066 1068 1070 1072 1074 1076 1078 1080 1082 1084 1086 1088 1090 1092
1094 1096 1099 1101 1103 1105 1107 1109 1111 1113 1115 1117 1119 1121
1123 1125 1127 1129 1134 1136 1139 1141 1143 1145 1147 1149 1151 1153
1155 1157 1159 1161 1163 1165 1167 1169 1172 1174 1176 1178 1180 1182
1184 1186 1188 1190 1192 1194 1196 1198 1200 1202 1205 1207 1209 1211
1213 1215 1217 1219 1221 1223 1225 1227 1229 1231 1233 1235 1238 1240
1242 1244 1246 1248 1250 1252 1254 1256 1258 1260 1262 1264 1266 1268
1273 1275 1278 1280 1282 1284 1286 1288 1290 1292 1294 1296 1298 1300
1302 1304 1306 1308 1311 1313 1315 1317 1319 1321 1323 1325 1327 1329
1331 1333 1335 1337 1339 1341 1344 1346 1348 1350 1352 1354 1356 1358
1360 1362 1364 1366 1368 1370 1372 1374 1377 1379 1381 1383 1385 1387
1389 1391 1393 1395 1397 1399 1401 1403 1405 1407 1412 1414 1417 1419
1421 1423 1425 1427 1429 1431 1433 1435 1437 1439 1441 1443 1445 1447
1450 1452 1454 1456 1458 1460 1462 1464 1466 1468 1470 1472 1474 1476
1478 1480 1483 1485 1487 1489 1491 1493 1495 1497 1499 1501 1503 1505
1507 1509 1511 1513 1516 1518 1520 1522 1524 1526 1528 1530 1532 1534
1536 1538 1540 1542 1544 1546 1551 1553 1556 1558 1560 1562 1564 1566
1568 1570 1572 1574 1576 1578 1580 1582 1584 1586 1589 1591 1593 1595
1597 1599 1601 1603 1605 1607 1609 1611 1613 1615 1617 1619 1622 1624
1626 1628 1630 1632 1634 1636 1638 1640 1642 1644 1646 1648 1650 1652
1655 1657 1659 1661 1663 1665 1667 1669 1671 1673 1675 1677 1679 1681
1683 1685 1690 1692 1695 1697 1699 1701 1703 1705 1707 1709 1711 1713
1715 1717 1719 1721 1723 1725 1728 1730 1732 1734 1736 1738 1740 1742
1744 1746 1748 1750 1752 1754 1756 1758 1761 1763 1765 1767 1769 1771
1773 1775 1777 1779 1781 1783 1785 1787 1789 1791 1794 1796 1798 1800
1802 1804 1806 1808 1810 1812 1814 1816 1818 1820 1822 1824 1829 1831
1834 1836 1838 1840 1842 1844 1846 1848 1850 1852 1854 1856 1858 1860
1862 1864 1867 1869 1871 1873 1875 1877 1879 1881 1883 1885 1887 1889
1891 1893 1895 1897 1900 1902 1904 1906 1908 1910 1912 1914 1916 1918
1920 1922 1924 1926 1928 1930 1933 1935 1937 1939 1941 1943 1945 1947
1949 1951 1953 1955 1957 1959 1961 1963 1968 1970 1973 1975 1977 1979
1981 1983 1985 1987 1989 1991 1993 1995 1997 1999 2001 2003 2006 2008
2010 2012 2014 2016 2018 2020 2022 2024 2026 2028 2030 2032 2034 2036
2039 2041 2043 2045 2047 2049 2051 2053 2055 2057 2059 2061 2063 2065
2067 2069 2072 2074 2076 2078 2080 2082 2084 2086 2088 2090 2092 2094
2096 2098 2100 2102 2107 2109 2112 2114 2116 2118 2120 2122 2124 2126
2128 2130 2132 2134 2136 2138 2140 2142 2145 2147 2149 2151 2153 2155
2157 2159 2161 2163 2165 2167 2169 2171 2173 2175 2178 2180 2182 2184
2186 2188 2190 2192 2194 2196 2198 2200 2202 2204 2206 2208 2211 2213
2215 2217 2219 2221 2223 2225 2227 2229 2231 2233 2235 2237 2239 2241
2246 2248 2251 2253 2255 2257 2259 2261 2263 2265 2267 2269 2271 2273
2275 2277 2279 2281 2284 2286 2288 2290 2292 2294 2296 2298 2300 2302
2304 2306 2308 2310 2312 2314 2317 2319 2321 2323 2325 2327 2329 2331 SEQ 1294
2333 2335 2337 2339 2341 2343 2345 2347 2350 2352 2354 2356 2358 2360
2362 2364 2366 2368 2370 2372 2374 2376 2378 2380 2385 2387 2390 2392
2394 2396 2398 2400 2402 2404 2406 2408 2410 2412 2414 2416 2418 2420
2423 2425 2427 2429 2431 2433 2435 2437 2439 2441 2443 2445 2447 2449
2451 2453 2456 2458 2460 2462 2464 2466 2468 2470 2472 2474 2476 2478
2480 2482 2484 2486 2489 2491 2493 2495 2497 2499 2501 2503 2505 2507
2509 2511 2513 2515 2517 2519 2521
RTN 77 94
SCOPER 88
.MAIN MACRO %53A(1152) 10:22 16-Oct-84 Page 1
DFPTA7 MAC 11-Oct-83 20:26 EBUS/MPROC 2901 Tests (Part 4) SEQ 1295
1 SUBTTL EBUS/MPROC 2901 Tests (Part 4)
2
3 SALL
4
5 SEARCH DFPTA,MONSYM
6
7 ; INTERN's
8
9 ENTRY TSTA33,TSTA34,TSTA35,TSTA36,TSTA37,TSTA40,TSTA41,TSTA42
10
11 ; EXTERN's located in DFPTA1.MAC (Mainline code..)
12
13 EXTERN TLOAD,TRACE,TSTSUB,AEXEC,AAPNT,ALEBF,ALFLS,BEXEC,BBPNT
14
15 ; EXTERN's located in DFPTAI.MAC (Port Device Handling Routines module)
16
17 EXTERN IPACLR
18
19 ; EXTERN's located in DFPTAU.MAC (Utility Routines module)
20
21 EXTERN SCOSW
22
23
24 ;#********************************************************************
25 ; Z7 - Address for use in DDT
26 ;#********************************************************************
27
28 000000' Z7: ; address of 00000'
.MAIN MACRO %53A(1152) 10:22 16-Oct-84 Page 2
DFPTA7 MAC 11-Oct-83 20:26 EBUS/MPROC 2901 Tests (Part 4) SEQ 1296
29
30 ;#********************************************************************
31 ;* TEST 33 - Q-Register Shift
32 ;
33 ; Description: Verify that the Q-register can be shifted left
34 ; and right correctly.
35 ;
36 ; Procedure: Clear Port
37 ; Load microcode
38 ;
39 ; Set RAR to 0
40 ; Execute JMAP,CONT,JMAP - load a 1 into the Q-Reg
41 ; and write into EBUF to verify initialization
42 ; worked.
43 ; Read EBUF (Contains contents of Reg Q)
44 ; Verify data is correct - 0000..001
45 ;
46 ; Set RAR to 3
47 ; Execute JMAP,JMAP sequence
48 ; Read EBUF (Contains contents of Q-Reg)
49 ; Verify data is correct 0000..002
50 ;
51 ; Repeat the above 4 steps 34 times and verify the
52 ; bit is shifting left one position each time.
53 ;
54 ; Set RAR to 5
55 ; Execute JMAP - copy 400000,,0 into Q-Reg
56 ; Verify data is correct 4000..000
57 ;
58 ; Set RAR to 5
59 ; Execute JMAP,JMAP sequence
60 ; Read EBUF (Contains contents of Q-Reg)
61 ; Verify data is correct 2000..000
62 ;
63 ; Repeat the above 4 steps 34 times and verify the
64 ; bit is shifting right one position each time.
65 ;
66 ; Failure: ---
67 ;#********************************************************************
68
69 ; Test data
70
71 000000' 254 00 0 00 000013' TSTA33: JRST TG33 ; go start test
72 000001' 420402 000033 EBUS!ALU!NDMP!ZALU!33 ; test mask
73 000002' 000104' 003412' T33M,,[ASCIZ ^Q-Register Shift^]
74 000003' 003416' 000000 [EXP MLAST!E23],,0
75 000004' 000000 000135' TSTA34 ; failure test table
76 000005' 000000 000277' TSTA35 ; ...
77 000006' 000000 001333' TSTA36
78 000007' 000000 002016' TSTA37
79 000010' 000000 002244' TSTA40
80 000011' 000000 002467' TSTA41
81 000012' 777777 777777 -1
.MAIN MACRO %53A(1152) 10:22 16-Oct-84 Page 3
DFPTA7 MAC 11-Oct-83 20:26 EBUS/MPROC 2901 Tests (Part 4) SEQ 1297
82
83 ; Start test
84
85 000013' 201 00 0 00 000000' TG33: MOVEI Z7 ; get address of module start
86 000014' 260 17 0 00 000000* GO TRACE ; handle trace output
87 000015' 201 01 0 00 000104' MOVEI 1,T33M ; set up microcode address
88 000016' 260 17 0 00 000000* GO TLOAD ; load/verify it
89 000017' 263 17 0 00 000000 RTN ; failed - exit test
90
91 ; Initialization
92
93 000020' 400 15 0 00 000000 TL33: SETZ ERFLG, ; clear error flag
94 000021' 260 17 0 00 000000* GO IPACLR ; clear port
95 000022' 402 00 0 00 000000* SETZM TSTSUB ; initialize subtest number
96 000023' 201 06 0 00 000035' MOVEI 6,TS33 ; get sstep table address
97
98 ; Loop on single step table entries
99
100 000024' 260 17 0 00 000000* TA33: GO BEXEC ; execute table entry
101 000025' 254 00 0 00 000034' JRST TX33 ; end of sstep table
102 000026' 254 00 0 00 000024' JRST TA33 ; keep looping after call
103 000027' 474 15 0 00 000000 SETO ERFLG, ; error - EBUF data incorrect
104
105 ; Handle error printouts and scope looping
106
107 000030' 027 00 0 00 000102' SCOPER MA33 ; print error message
108 000031' 254 00 0 00 000020' JRST TL33 ; loop on error
109 000032' 254 00 0 00 000034' JRST TX33 ; altmode exit
110 000033' 322 15 0 00 000024' JUMPE ERFLG,TA33 ; do next sstep table entry
111
112 ; End of test
113
114 000034' 263 17 0 00 000000 TX33: RTN ; return
115
116 ; Sstep table, with EBUF data, as: (CMD,#Steps,Start addr,End Addr,EBUF data)
117
118 000035' 100300 000002 TS33: ATABLE (SSSTRT,3,0,2,1) ; do 2 single steps/check results
119 000036' 000000 000001
120 000037' 300000 000045' ATABLE (SSCALL,TS33IN) ; initialize test parameters
121 000040' 400000 000052' TS33L: ATABLE (SSCHK,TS33AD) ; set up single step parameters
122 000041' 100300 000000 ATABLE (SSSTRT,3,0,0,0) ; do 3 single steps/check results
123 000042' 000000 000000
124 000043' 500000 000040' ATABLE (SSJRST,TS33L) ; do next address
125 000044' 000000 000000 ATABLE (SSLAST) ; end of table
126
127 ; Special routines
128
129 000045' 201 00 0 00 000001 TS33IN: MOVEI 1 ; initialize data pattern
130 000046' 202 00 0 00 003671' MOVEM TS33PT#
131 000047' 201 00 0 00 000003 MOVEI 3 ; initialize start address
132 000050' 202 00 0 00 003672' MOVEM TS33ST#
133 000051' 263 17 0 00 000000 RTN ; return
.MAIN MACRO %53A(1152) 10:22 16-Oct-84 Page 4
DFPTA7 MAC 11-Oct-83 20:26 EBUS/MPROC 2901 Tests (Part 4) SEQ 1298
134
135 000052' 200 01 0 00 003671' TS33AD: MOVE 1,TS33PT ; get data pattern
136 000053' 200 02 0 00 003672' MOVE 2,TS33ST ; get start address
137 000054' 326 01 0 00 000062' JUMPN 1,TS33A0 ; done? no - continue
138 000055' 306 02 0 00 000011 CAIN 2,11 ; already on 2nd set?
139 000056' 263 17 0 00 000000 RTN ; yes - return +1 (done)
140 000057' 515 01 0 00 400000 HRLZI 1,400000 ; no - get proper data pattern
141 000060' 201 02 0 00 000006 MOVEI 2,6 ; set up new address
142 000061' 254 00 0 00 000070' JRST TS33A1 ; continue
143
144 000062' 306 02 0 00 000003 TS33A0: CAIN 2,3 ; left shifting?
145 000063' 242 01 0 00 000001 LSH 1,1 ; yes - shift it
146 000064' 306 02 0 00 000003 CAIN 2,3 ; left shifting?
147 000065' 254 00 0 00 000070' JRST TS33A1 ; yes - continue
148 000066' 201 02 0 00 000011 MOVEI 2,11 ; set up correct starting address
149 000067' 242 01 0 00 777777 LSH 1,-1 ; yes - shift it
150
151 000070' 202 01 0 00 003671' TS33A1: MOVEM 1,TS33PT# ; save data pattern
152 000071' 202 02 0 00 003672' MOVEM 2,TS33ST# ; save starting address
153 000072' 200 03 0 06 000000 MOVE 3,(6) ; get table entry
154 000073' 137 02 0 00 003417' DPB 2,[POINT 12,3,23] ; save initial address
155 000074' 201 02 0 02 000002 MOVEI 2,2(2) ; get address+1
156 000075' 137 02 0 00 003420' DPB 2,[POINT 12,3,35] ; save final address
157 000076' 202 03 0 06 000000 MOVEM 3,(6) ; save it
158 000077' 202 01 0 06 000001 MOVEM 1,1(6) ; save data pattern
159 000100' 350 00 0 17 000000 AOS (P) ; set up RTN+2
160 000101' 263 17 0 00 000000 RTN ; return
161
162 ; Error messages
163
164 000102' 140000 003421' MA33: MSG!TXNOT![ASCIZ /Q-Register not shifted correctly/]
165 000103' 000000000000# LAST!CALL!TXALL!BBPNT ; print sequencer data
.MAIN MACRO %53A(1152) 10:22 16-Oct-84 Page 5
DFPTA7 MAC 11-Oct-83 20:26 EBUS/MPROC 2901 Tests (Part 4) SEQ 1299
166
167 ; Microcode:
168
169 000104' 000000 010000 T33M: MWORD <ADDR=0,JMAP,J=1,S0A,AND,D=0> ; 0
170 000105' 440000 000040
171 000106' 000100 000000 MWORD <CONT,S0Q,PLUS,CRY,D=0> ; 1
172 000107' 200000 000740
173 000110' 000200 022004 MWORD <JMAP,J=2,S0Q,OR,D=1,OENA,SELE,MGC=4> ; 2
174 000111' 231000 005040
175
176 000112' 000300 040000 MWORD <JMAP,J=4,S0Q,OR,D=2,B=1> ; 3
177 000113' 232000 400040
178 000114' 000400 000000 MWORD <CONT,S0Q,OR,D=6> ; 4
179 000115' 236000 000340
180 000116' 000500 052004 MWORD <JMAP,J=5,S0Q,OR,D=1,OENA,SELE,MGC=4> ; 5
181 000117' 231000 005040
182
183 000120' 000600 070000 MWORD <JMAP,J=7,S0A,OR,A=1,D=0> ; 6
184 000121' 430010 000040
185 000122' 000700 000000 MWORD <CONT,S0A,OR,A=1,D=0> ; 7
186 000123' 430010 000340
187 000124' 001000 102004 MWORD <JMAP,J=10,S0Q,OR,D=1,OENA,SELE,MGC=4> ; 10
188 000125' 231000 005040
189
190 000126' 001100 120000 MWORD <JMAP,J=12,S0Q,OR,D=2,B=1> ; 11
191 000127' 232000 400040
192 000130' 001200 000000 MWORD <CONT,S0Q,OR,D=4> ; 12
193 000131' 234000 000340
194 000132' 001300 132004 MWORD <JMAP,J=13,S0Q,OR,D=1,OENA,SELE,MGC=4> ; 13
195 000133' 231000 005040
196 000134' 777777 777777 -1
.MAIN MACRO %53A(1152) 10:22 16-Oct-84 Page 6
DFPTA7 MAC 11-Oct-83 20:26 EBUS/MPROC 2901 Tests (Part 4) SEQ 1300
197
198 ;#********************************************************************
199 ;* TEST 34 - Q-Register Right/Left Shift
200 ;
201 ; Description: Verify that the Q-register can be shifted left
202 ; and right correctly at full speed.
203 ;
204 ; Procedure: Clear Port
205 ; Load microcode
206 ;
207 ; Set RAR to 0
208 ; Execute JMAP,CONT - load a 1 into the Q-Reg
209 ;
210 ; Execute a loop of 35 left shifts followed by
211 ; 35 right shifts, with 5 left/right shifts at
212 ; each point, and verify that the final data
213 ; in the Q-Reg, read out of the EBUF is 00..001
214 ;
215 ; Failure: ---
216 ;#********************************************************************
217
218 ; Test data
219
220 000135' 254 00 0 00 000147' TSTA34: JRST TG34 ; go start test
221 000136' 420402 000034 EBUS!ALU!NDMP!ZALU!34 ; test mask
222 000137' 000210' 003430' T34M,,[ASCIZ ^Q-Register Right/Left Shift^]
223 000140' 003416' 000000 [EXP MLAST!E23],,0
224 000141' 000000 000277' TSTA35 ; failure test table
225 000142' 000000 001333' TSTA36 ; ...
226 000143' 000000 002016' TSTA37
227 000144' 000000 002244' TSTA40
228 000145' 000000 002467' TSTA41
229 000146' 777777 777777 -1
230
231 ; Start test
232
233 000147' 201 00 0 00 000000' TG34: MOVEI Z7 ; get address of module start
234 000150' 260 17 0 00 000014* GO TRACE ; handle trace output
235 000151' 201 01 0 00 000210' MOVEI 1,T34M ; set up microcode address
236 000152' 260 17 0 00 000016* GO TLOAD ; load/verify it
237 000153' 263 17 0 00 000000 RTN ; failed - exit test
238
239 ; Initialization
240
241 000154' 400 15 0 00 000000 TL34: SETZ ERFLG, ; clear error flag
242 000155' 260 17 0 00 000021* GO IPACLR ; clear port
.MAIN MACRO %53A(1152) 10:22 16-Oct-84 Page 7
DFPTA7 MAC 11-Oct-83 20:26 EBUS/MPROC 2901 Tests (Part 4) SEQ 1301
243
244 ; 1st segment of test (Segment A) - Start up port and wait till it stops
245
246 000156' 201 01 0 00 000012 TA34: MOVEI 1,^D10 ; maximum delay before timeout (msec)
247 000157' 201 02 0 00 000000 MOVEI 2,0 ; error address
248 000160' 201 03 0 00 000032 MOVEI 3,32 ; correct address
249 000161' 400 04 0 00 000000 SETZ 4, ; starting address
250 000162' 260 17 0 00 000000* GO AEXEC ; execute ALU type test
251 000163' 255 00 0 00 000000 JFCL ; ignore error
252 000164' 400 15 0 00 000000 SETZ ERFLG, ; clear error flag
253 000165' 332 00 0 00 000000* SKIPE ALFLS ; started up ok?
254 000166' 474 15 0 00 000000 SETO ERFLG, ; no - set error flag
255 000167' 200 00 0 00 000000* MOVE ALEBF ; get EBUF data
256 000170' 302 00 0 00 000001 CAIE 1 ; correct?
257 000171' 474 15 0 00 000000 SETO ERFLG, ; no - set error flag
258
259 ; Handle error printouts and scope looping
260
261 000172' 027 00 0 00 000176' SCOPER MA34 ; print error message
262 000173' 254 00 0 00 000154' JRST TL34 ; loop on error
263 000174' 254 00 0 00 000175' JRST TX34 ; altmode exit
264
265 ; End of test
266
267 000175' 263 17 0 00 000000 TX34: RTN ; return
268
269 ; Error messages
270
271 000176' 140000 003436' MA34: MSG!TXNOT![ASCIZ /Q-Register not shifted correctly at full speed/]
272 000177' 270000 000200' LAST!CALL!TXALL!MA34PN
273
274 000200' 200 01 0 00 000000* MA34PN: MOVE 1,SCOSW ; get switches
275 000201' 603 01 0 00 000200 TLNE 1,TXTINH ; full printout
276 TMSGC <EBUF (C): 000000 000001
277 000202' 037 00 0 00 003450' (A): >
278 000203' 607 01 0 00 000200 TLNN 1,TXTINH ; full printout
279 TMSGC <EBUF (Correct): 000000 000001
280 000204' 037 00 0 00 003460' (Actual): >
281 000205' 200 00 0 00 000167* MOVE ALEBF
282 000206' 037 13 0 00 000000 PNTHW
283 000207' 263 17 0 00 000000 RTN
284
285 ; Microcode:
286
287 000210' 000000 010000 T34M: MWORD <ADDR=0,JMAP,J=1,S0A,AND,D=0> ; 0
288 000211' 440000 000040
289 000212' 000100 000000 MWORD <CONT,S0Q,PLUS,CRY,D=0> ; 1
290 000213' 200000 000740
291
292 ; Left shifts
293
294 000214' 000200 420000 MWORD <LDCT,J=42,D=1> ; 2
295 000215' 001000 000300
296 000216' 000300 000000 MWORD <CONT,S0Q,OR,D=6> ; 3
297 000217' 236000 000340
.MAIN MACRO %53A(1152) 10:22 16-Oct-84 Page 7-1
DFPTA7 MAC 11-Oct-83 20:26 EBUS/MPROC 2901 Tests (Part 4) SEQ 1302
298 000220' 000400 000000 MWORD <CONT,S0Q,OR,D=4> ; 4
299 000221' 234000 000340
300 000222' 000500 000000 MWORD <CONT,S0Q,OR,D=6> ; 5
301 000223' 236000 000340
302 000224' 000600 000000 MWORD <CONT,S0Q,OR,D=4> ; 6
303 000225' 234000 000340
304 000226' 000700 030000 MWORD <RPCT,J=3,S0Q,OR,D=6> ; 7
305 000227' 236000 000220
306
307 ; Right shifts
308
309 000230' 001000 420000 MWORD <LDCT,J=42,D=1> ; 10
310 000231' 001000 000300
311 000232' 001100 000000 MWORD <CONT,S0Q,OR,D=4> ; 11
312 000233' 234000 000340
313 000234' 001200 000000 MWORD <CONT,S0Q,OR,D=6> ; 12
314 000235' 236000 000340
315 000236' 001300 000000 MWORD <CONT,S0Q,OR,D=4> ; 13
316 000237' 234000 000340
317 000240' 001400 000000 MWORD <CONT,S0Q,OR,D=6> ; 14
318 000241' 236000 000340
319 000242' 001500 110000 MWORD <RPCT,J=11,S0Q,OR,D=4> ; 15
320 000243' 234000 000220
321
322 ; Left shifts
323
324 000244' 001600 420000 MWORD <LDCT,J=42,D=1> ; 16
325 000245' 001000 000300
326 000246' 001700 000000 MWORD <CONT,S0Q,OR,D=6> ; 17
327 000247' 236000 000340
328 000250' 002000 000000 MWORD <CONT,S0Q,OR,D=4> ; 20
329 000251' 234000 000340
330 000252' 002100 000000 MWORD <CONT,S0Q,OR,D=6> ; 21
331 000253' 236000 000340
332 000254' 002200 000000 MWORD <CONT,S0Q,OR,D=4> ; 22
333 000255' 234000 000340
334 000256' 002300 170000 MWORD <RPCT,J=17,S0Q,OR,D=6> ; 23
335 000257' 236000 000220
336
337 ; Right shifts
338
339 000260' 002400 420000 MWORD <LDCT,J=42,D=1> ; 24
340 000261' 001000 000300
341 000262' 002500 000000 MWORD <CONT,S0Q,OR,D=4> ; 25
342 000263' 234000 000340
343 000264' 002600 000000 MWORD <CONT,S0Q,OR,D=6> ; 26
344 000265' 236000 000340
345 000266' 002700 000000 MWORD <CONT,S0Q,OR,D=4> ; 27
346 000267' 234000 000340
347 000270' 003000 000000 MWORD <CONT,S0Q,OR,D=6> ; 30
348 000271' 236000 000340
349 000272' 003100 250000 MWORD <RPCT,J=25,S0Q,OR,D=4> ; 31
350 000273' 234000 000220
351
352 000274' 003200 322004 MWORD <JMAP,J=32,S0Q,OR,D=1,OENA,SELE,MGC=4> ; 32
.MAIN MACRO %53A(1152) 10:22 16-Oct-84 Page 7-2
DFPTA7 MAC 11-Oct-83 20:26 EBUS/MPROC 2901 Tests (Part 4) SEQ 1303
353 000275' 231000 005040
354 000276' 777777 777777 -1
.MAIN MACRO %53A(1152) 10:22 16-Oct-84 Page 8
DFPTA7 MAC 11-Oct-83 20:26 EBUS/MPROC 2901 Tests (Part 4) SEQ 1304
355
356 ;#********************************************************************
357 ;* TEST 35 - RAM Register Shift
358 ;
359 ; Description: Verify that the RAM registers can be shifted left
360 ; and right correctly.
361 ;
362 ; Procedure: Clear Port
363 ; Load microcode
364 ;
365 ; Set RAR to 0
366 ; Execute JMAP,CONT,JMAP - load a 1 into Reg 0
367 ; and write into EBUF to verify initialization
368 ; worked.
369 ; Read EBUF (Contains contents of Reg 0)
370 ; Verify data is correct - 0000..001
371 ;
372 ; Set RAR to 3
373 ; Execute JMAP,JMAP sequence
374 ; Read EBUF (Contains contents of Reg 0)
375 ; Verify data is correct 0000..002
376 ;
377 ; Repeat the above 4 steps 34 times and verify the
378 ; bit is shifting left one position each time.
379 ;
380 ; Set RAR to 5
381 ; Execute JMAP - copy 400000,,0 into Reg 0
382 ; Verify data is correct 4000..000
383 ;
384 ; Set RAR to 5
385 ; Execute JMAP,JMAP sequence
386 ; Read EBUF (Contains contents of Reg 0)
387 ; Verify data is correct 2000..000
388 ;
389 ; Repeat the above 4 steps 34 times and verify the
390 ; bit is shifting right one position each time.
391 ;
392 ; Repeat entire test for each 2901 register 0-17
393 ;
394 ; Failure: ---
395 ;#********************************************************************
396
397 ; Test data
398
399 000277' 254 00 0 00 000310' TSTA35: JRST TG35 ; go start test
400 000300' 420402 000035 EBUS!ALU!NDMP!ZALU!35 ; test mask
401 000301' 000532' 003473' T35M,,[ASCIZ ^RAM Register Shift^]
402 000302' 003416' 000000 [EXP MLAST!E23],,0
403 000303' 000000 001333' TSTA36 ; failure test table
404 000304' 000000 002016' TSTA37 ; ...
405 000305' 000000 002244' TSTA40
406 000306' 000000 002467' TSTA41
407 000307' 777777 777777 -1
.MAIN MACRO %53A(1152) 10:22 16-Oct-84 Page 9
DFPTA7 MAC 11-Oct-83 20:26 EBUS/MPROC 2901 Tests (Part 4) SEQ 1305
408
409 ; Start test
410
411 000310' 201 00 0 00 000000' TG35: MOVEI Z7 ; get address of module start
412 000311' 260 17 0 00 000150* GO TRACE ; handle trace output
413 000312' 201 01 0 00 000532' MOVEI 1,T35M ; set up microcode address
414 000313' 260 17 0 00 000152* GO TLOAD ; load/verify it
415 000314' 263 17 0 00 000000 RTN ; failed - exit test
416
417 ; Initialization
418
419 000315' 400 15 0 00 000000 TL35: SETZ ERFLG, ; clear error flag
420 000316' 260 17 0 00 000155* GO IPACLR ; clear port
421 000317' 402 00 0 00 000022* SETZM TSTSUB ; initialize subtest number
422 000320' 201 06 0 00 000332' MOVEI 6,TS35 ; get sstep table address
423
424 ; Loop on single step table entries
425
426 000321' 260 17 0 00 000024* TA35: GO BEXEC ; execute table entry
427 000322' 254 00 0 00 000331' JRST TX35 ; end of sstep table
428 000323' 254 00 0 00 000321' JRST TA35 ; keep looping after call
429 000324' 474 15 0 00 000000 SETO ERFLG, ; error - EBUF data incorrect
430
431 ; Handle error printouts and scope looping
432
433 000325' 027 00 0 00 000523' SCOPER MA35 ; print error message
434 000326' 254 00 0 00 000315' JRST TL35 ; loop on error
435 000327' 254 00 0 00 000331' JRST TX35 ; altmode exit
436 000330' 322 15 0 00 000321' JUMPE ERFLG,TA35 ; do next sstep table entry
437
438 ; End of test
439
440 000331' 263 17 0 00 000000 TX35: RTN ; return
441
442 ; Sstep table, with EBUF data, as: (CMD,#Steps,Start addr,End Addr,EBUF data)
443
444 000332' 300000 000340' TS35: ATABLE (SSCALL,TS35IN) ; initialize test parameters
445 000333' 400000 000345' TS35L: ATABLE (SSCHK,TS35AD) ; set up single step parameters
446 000334' 100300 000000 ATABLE (SSSTRT,3,0,0,0) ; do 3 single steps/check results
447 000335' 000000 000000
448 000336' 500000 000333' ATABLE (SSJRST,TS35L) ; do next address
449 000337' 000000 000000 ATABLE (SSLAST) ; end of table
450
451 ; Special routines
452
453 000340' 476 00 0 00 003674' TS35IN: SETOM TS35RG# ; initialize register number
454 000341' 476 00 0 00 003675' SETOM TS35ST# ; initialize start address pointer
455 000342' 201 00 0 00 000114 MOVEI ^D76 ; initialize pattern number pointer
456 000343' 202 00 0 00 003673' MOVEM TS35PA#
457 000344' 263 17 0 00 000000 RTN ; return
.MAIN MACRO %53A(1152) 10:22 16-Oct-84 Page 10
DFPTA7 MAC 11-Oct-83 20:26 EBUS/MPROC 2901 Tests (Part 4) SEQ 1306
458
459 000345' 200 03 0 00 003675' TS35AD: MOVE 3,TS35ST ; get start address pointer
460 000346' 350 02 0 00 003673' AOS 2,TS35PA ; point to next pattern
461 000347' 200 01 0 02 000405' MOVE 1,TS35T2(2) ; get data pattern
462 000350' 312 01 0 00 003477' CAME 1,[-2] ; done with table?
463 000351' 254 00 0 00 000360' JRST TS35A0 ; no - proceed
464 000352' 350 01 0 00 003674' AOS 1,TS35RG ; yes - next register
465 000353' 303 01 0 00 000017 CAILE 1,17 ; done with test?
466 000354' 263 17 0 00 000000 RTN ; yes - return
467 000355' 403 03 0 00 003675' SETZB 3,TS35ST ; no - initialize start address pointer
468 000356' 402 00 0 00 003673' SETZM TS35PA ; initialize pattern number pointer
469 000357' 254 00 0 00 000364' JRST TS35A1
470
471 000360' 312 01 0 00 003500' TS35A0: CAME 1,[-1] ; ready for next starting address?
472 000361' 254 00 0 00 000364' JRST TS35A1 ; no - continue
473 000362' 350 03 0 00 003675' AOS 3,TS35ST ; yes - increment address pointer
474 000363' 350 00 0 00 003673' AOS TS35PA ; increment data pattern pointer
475 000364' 200 01 0 06 000000 TS35A1: MOVE 1,(6) ; get table entry
476 000365' 200 02 0 00 003674' MOVE 2,TS35RG ; get register number
477 000366' 242 02 0 00 000006 LSH 2,6 ; multiply by 100
478 000367' 270 02 0 03 000401' ADD 2,TS35T1(3) ; get starting address
479 000370' 137 02 0 00 003501' DPB 2,[POINT 12,1,23] ; save initial address
480 000371' 201 02 0 02 000002 MOVEI 2,2(2) ; get address+1
481 000372' 137 02 0 00 003502' DPB 2,[POINT 12,1,35] ; save final address
482 000373' 202 01 0 06 000000 MOVEM 1,(6) ; save it
483 000374' 200 02 0 00 003673' MOVE 2,TS35PA ; get data pattern
484 000375' 200 01 0 02 000405' MOVE 1,TS35T2(2) ; get data pattern
485 000376' 202 01 0 06 000001 MOVEM 1,1(6) ; save data pattern
486 000377' 350 00 0 17 000000 AOS (P) ; set up RTN+2
487 000400' 263 17 0 00 000000 RTN ; return
488
489 ; Starting address table
490
491 000401' 000000 000000 TS35T1: 0
492 000402' 000000 000003 3
493 000403' 000000 000006 6
494 000404' 000000 000011 11
.MAIN MACRO %53A(1152) 10:22 16-Oct-84 Page 11
DFPTA7 MAC 11-Oct-83 20:26 EBUS/MPROC 2901 Tests (Part 4) SEQ 1307
495
496 ; Data pattern table
497
498 000405' 000000 000001 TS35T2: 1
499 000406' 777777 777777 -1
500 000407' 000000 000002 2
501 000410' 000000 000004 4
502 000411' 000000 000010 10
503 000412' 000000 000020 20
504 000413' 000000 000040 40
505 000414' 000000 000100 100
506 000415' 000000 000200 200
507 000416' 000000 000400 400
508 000417' 000000 001000 1000
509 000420' 000000 002000 2000
510 000421' 000000 004000 4000
511 000422' 000000 010000 10000
512 000423' 000000 020000 20000
513 000424' 000000 040000 40000
514 000425' 000000 100000 100000
515 000426' 000000 200000 200000
516 000427' 000000 400000 400000
517 000430' 000001 000000 1,,0
518 000431' 000002 000000 2,,0
519 000432' 000004 000000 4,,0
520 000433' 000010 000000 10,,0
521 000434' 000020 000000 20,,0
522 000435' 000040 000000 40,,0
523 000436' 000100 000000 100,,0
524 000437' 000200 000000 200,,0
525 000440' 000400 000000 400,,0
526 000441' 001000 000000 1000,,0
527 000442' 002000 000000 2000,,0
528 000443' 004000 000000 4000,,0
529 000444' 010000 000000 10000,,0
530 000445' 020000 000000 20000,,0
531 000446' 040000 000000 40000,,0
532 000447' 100000 000000 100000,,0
533 000450' 200000 000000 200000,,0
534 000451' 400000 000000 400000,,0
535 000452' 000000 000000 0
536 000453' 777777 777777 -1
537 000454' 400000 000000 400000,,0
538 000455' 777777 777777 -1
539 000456' 200000 000000 200000,,0
540 000457' 100000 000000 100000,,0
541 000460' 040000 000000 40000,,0
542 000461' 020000 000000 20000,,0
543 000462' 010000 000000 10000,,0
544 000463' 004000 000000 4000,,0
545 000464' 002000 000000 2000,,0
546 000465' 001000 000000 1000,,0
.MAIN MACRO %53A(1152) 10:22 16-Oct-84 Page 12
DFPTA7 MAC 11-Oct-83 20:26 EBUS/MPROC 2901 Tests (Part 4) SEQ 1308
547 000466' 000400 000000 400,,0
548 000467' 000200 000000 200,,0
549 000470' 000100 000000 100,,0
550 000471' 000040 000000 40,,0
551 000472' 000020 000000 20,,0
552 000473' 000010 000000 10,,0
553 000474' 000004 000000 4,,0
554 000475' 000002 000000 2,,0
555 000476' 000001 000000 1,,0
556 000477' 000000 400000 400000
557 000500' 000000 200000 200000
558 000501' 000000 100000 100000
559 000502' 000000 040000 40000
560 000503' 000000 020000 20000
561 000504' 000000 010000 10000
562 000505' 000000 004000 4000
563 000506' 000000 002000 2000
564 000507' 000000 001000 1000
565 000510' 000000 000400 400
566 000511' 000000 000200 200
567 000512' 000000 000100 100
568 000513' 000000 000040 40
569 000514' 000000 000020 20
570 000515' 000000 000010 10
571 000516' 000000 000004 4
572 000517' 000000 000002 2
573 000520' 000000 000001 1
574 000521' 000000 000000 0
575 000522' 777777 777776 -2
576
577 ; Error messages
578
579 000523' 240000 000525' MA35: CALL!TXNOT!MA35PN
580 000524' 000000000000# LAST!CALL!TXALL!BBPNT ; print sequencer data
581
582 000525' 037 00 0 00 003503' MA35PN: TMSGC <2901 Register >
583 000526' 200 00 0 00 003674' MOVE TS35RG
584 000527' 037 16 0 00 000003 PNTOCS
585 000530' 037 00 0 00 003423' TMSG < not shifted correctly>
586 000531' 263 17 0 00 000000 RTN
.MAIN MACRO %53A(1152) 10:22 16-Oct-84 Page 13
DFPTA7 MAC 11-Oct-83 20:26 EBUS/MPROC 2901 Tests (Part 4) SEQ 1309
587
588 ; Microcode:
589
590 ; Register 0
591
592 000532' 000000 010000 T35M: MWORD <ADDR=0,JMAP,J=1,S0B,B=0,AND,D=2> ; 0
593 000533' 342000 000040
594 000534' 000100 000000 MWORD <CONT,S0B,B=0,PLUS,CRY,D=2> ; 1
595 000535' 302000 000740
596 000536' 000200 022004 MWORD <JMAP,J=2,S0A,A=0,OR,D=1,OENA,SELE,MGC=4> ; 2
597 000537' 431000 005040
598 000540' 000300 040000 MWORD <JMAP,J=4,S0B,B=0,OR,D=0> ; 3
599 000541' 330000 000040
600 000542' 000400 000000 MWORD <CONT,S0B,B=0,OR,D=7> ; 4
601 000543' 337000 000340
602 000544' 000500 052004 MWORD <JMAP,J=5,S0A,OR,A=0,D=1,OENA,SELE,MGC=4> ; 5
603 000545' 431000 005040
604 000546' 000600 070000 MWORD <JMAP,J=7,S0Q,B=0,OR,D=2> ; 6
605 000547' 232000 000040
606 000550' 000700 000000 MWORD <CONT,S0Q,B=0,OR,D=2> ; 7
607 000551' 232000 000340
608 000552' 001000 102004 MWORD <JMAP,J=10,S0A,OR,A=0,D=1,OENA,SELE,MGC=4> ; 10
609 000553' 431000 005040
610 000554' 001100 120000 MWORD <JMAP,J=12,S0B,B=0,OR,D=0> ; 11
611 000555' 330000 000040
612 000556' 001200 000000 MWORD <CONT,S0B,B=0,OR,D=5> ; 12
613 000557' 335000 000340
614 000560' 001300 132004 MWORD <JMAP,J=13,S0A,A=0,OR,D=1,OENA,SELE,MGC=4> ; 13
615 000561' 431000 005040
616
617 ; Register 1
618
619 000562' 010001 010000 MWORD <ADDR=100,JMAP,J=101,S0B,B=1,AND,D=2> ; 100
620 000563' 342000 400040
621 000564' 010100 000000 MWORD <CONT,S0B,B=1,PLUS,CRY,D=2> ; 101
622 000565' 302000 400740
623 000566' 010201 022004 MWORD <JMAP,J=102,S0A,A=1,OR,D=1,OENA,SELE,MGC=4> ; 102
624 000567' 431010 005040
625 000570' 010301 040000 MWORD <JMAP,J=104,S0B,B=1,OR,D=0> ; 103
626 000571' 330000 400040
627 000572' 010400 000000 MWORD <CONT,S0B,B=1,OR,D=7> ; 104
628 000573' 337000 400340
629 000574' 010501 052004 MWORD <JMAP,J=105,S0A,OR,A=1,D=1,OENA,SELE,MGC=4> ; 105
630 000575' 431010 005040
631 000576' 010601 070000 MWORD <JMAP,J=107,S0Q,B=1,OR,D=2> ; 106
632 000577' 232000 400040
633 000600' 010700 000000 MWORD <CONT,S0Q,B=1,OR,D=2> ; 107
634 000601' 232000 400340
635 000602' 011001 102004 MWORD <JMAP,J=110,S0A,OR,A=1,D=1,OENA,SELE,MGC=4> ; 110
636 000603' 431010 005040
637 000604' 011101 120000 MWORD <JMAP,J=112,S0B,B=1,OR,D=0> ; 111
638 000605' 330000 400040
639 000606' 011200 000000 MWORD <CONT,S0B,B=1,OR,D=5> ; 112
640 000607' 335000 400340
641 000610' 011301 132004 MWORD <JMAP,J=113,S0A,A=1,OR,D=1,OENA,SELE,MGC=4> ; 113
.MAIN MACRO %53A(1152) 10:22 16-Oct-84 Page 13-1
DFPTA7 MAC 11-Oct-83 20:26 EBUS/MPROC 2901 Tests (Part 4) SEQ 1310
642 000611' 431010 005040
643
644 ; Register 2
645
646 000612' 020002 010000 MWORD <ADDR=200,JMAP,J=201,S0B,B=2,AND,D=2> ; 200
647 000613' 342001 000040
648 000614' 020100 000000 MWORD <CONT,S0B,B=2,PLUS,CRY,D=2> ; 201
649 000615' 302001 000740
650 000616' 020202 022004 MWORD <JMAP,J=202,S0A,A=2,OR,D=1,OENA,SELE,MGC=4> ; 202
651 000617' 431020 005040
652 000620' 020302 040000 MWORD <JMAP,J=204,S0B,B=2,OR,D=0> ; 203
653 000621' 330001 000040
654 000622' 020400 000000 MWORD <CONT,S0B,B=2,OR,D=7> ; 204
655 000623' 337001 000340
656 000624' 020502 052004 MWORD <JMAP,J=205,S0A,OR,A=2,D=1,OENA,SELE,MGC=4> ; 205
657 000625' 431020 005040
658 000626' 020602 070000 MWORD <JMAP,J=207,S0Q,B=2,OR,D=2> ; 206
659 000627' 232001 000040
660 000630' 020700 000000 MWORD <CONT,S0Q,B=2,OR,D=2> ; 207
661 000631' 232001 000340
662 000632' 021002 102004 MWORD <JMAP,J=210,S0A,OR,A=2,D=1,OENA,SELE,MGC=4> ; 210
663 000633' 431020 005040
664 000634' 021102 120000 MWORD <JMAP,J=212,S0B,B=2,OR,D=0> ; 211
665 000635' 330001 000040
666 000636' 021200 000000 MWORD <CONT,S0B,B=2,OR,D=5> ; 212
667 000637' 335001 000340
668 000640' 021302 132004 MWORD <JMAP,J=213,S0A,A=2,OR,D=1,OENA,SELE,MGC=4> ; 213
669 000641' 431020 005040
670
671 ; Register 3
672
673 000642' 030003 010000 MWORD <ADDR=300,JMAP,J=301,S0B,B=3,AND,D=2> ; 300
674 000643' 342001 400040
675 000644' 030100 000000 MWORD <CONT,S0B,B=3,PLUS,CRY,D=2> ; 301
676 000645' 302001 400740
677 000646' 030203 022004 MWORD <JMAP,J=302,S0A,A=3,OR,D=1,OENA,SELE,MGC=4> ; 302
678 000647' 431030 005040
679 000650' 030303 040000 MWORD <JMAP,J=304,S0B,B=3,OR,D=0> ; 303
680 000651' 330001 400040
681 000652' 030400 000000 MWORD <CONT,S0B,B=3,OR,D=7> ; 304
682 000653' 337001 400340
683 000654' 030503 052004 MWORD <JMAP,J=305,S0A,OR,A=3,D=1,OENA,SELE,MGC=4> ; 305
684 000655' 431030 005040
685 000656' 030603 070000 MWORD <JMAP,J=307,S0Q,B=3,OR,D=2> ; 306
686 000657' 232001 400040
687 000660' 030700 000000 MWORD <CONT,S0Q,B=3,OR,D=2> ; 307
688 000661' 232001 400340
689 000662' 031003 102004 MWORD <JMAP,J=310,S0A,OR,A=3,D=1,OENA,SELE,MGC=4> ; 310
690 000663' 431030 005040
691 000664' 031103 120000 MWORD <JMAP,J=312,S0B,B=3,OR,D=0> ; 311
692 000665' 330001 400040
693 000666' 031200 000000 MWORD <CONT,S0B,B=3,OR,D=5> ; 312
694 000667' 335001 400340
695 000670' 031303 132004 MWORD <JMAP,J=313,S0A,A=3,OR,D=1,OENA,SELE,MGC=4> ; 313
696 000671' 431030 005040
.MAIN MACRO %53A(1152) 10:22 16-Oct-84 Page 13-2
DFPTA7 MAC 11-Oct-83 20:26 EBUS/MPROC 2901 Tests (Part 4) SEQ 1311
697
698 ; Register 4
699
700 000672' 040004 010000 MWORD <ADDR=400,JMAP,J=401,S0B,B=4,AND,D=2> ; 400
701 000673' 342002 000040
702 000674' 040100 000000 MWORD <CONT,S0B,B=4,PLUS,CRY,D=2> ; 401
703 000675' 302002 000740
704 000676' 040204 022004 MWORD <JMAP,J=402,S0A,A=4,OR,D=1,OENA,SELE,MGC=4> ; 402
705 000677' 431040 005040
706 000700' 040304 040000 MWORD <JMAP,J=404,S0B,B=4,OR,D=0> ; 403
707 000701' 330002 000040
708 000702' 040400 000000 MWORD <CONT,S0B,B=4,OR,D=7> ; 404
709 000703' 337002 000340
710 000704' 040504 052004 MWORD <JMAP,J=405,S0A,OR,A=4,D=1,OENA,SELE,MGC=4> ; 405
711 000705' 431040 005040
712 000706' 040604 070000 MWORD <JMAP,J=407,S0Q,B=4,OR,D=2> ; 406
713 000707' 232002 000040
714 000710' 040700 000000 MWORD <CONT,S0Q,B=4,OR,D=2> ; 407
715 000711' 232002 000340
716 000712' 041004 102004 MWORD <JMAP,J=410,S0A,OR,A=4,D=1,OENA,SELE,MGC=4> ; 410
717 000713' 431040 005040
718 000714' 041104 120000 MWORD <JMAP,J=412,S0B,B=4,OR,D=0> ; 411
719 000715' 330002 000040
720 000716' 041200 000000 MWORD <CONT,S0B,B=4,OR,D=5> ; 412
721 000717' 335002 000340
722 000720' 041304 132004 MWORD <JMAP,J=413,S0A,A=4,OR,D=1,OENA,SELE,MGC=4> ; 413
723 000721' 431040 005040
724
725 ; Register 5
726
727 000722' 050005 010000 MWORD <ADDR=500,JMAP,J=501,S0B,B=5,AND,D=2> ; 500
728 000723' 342002 400040
729 000724' 050100 000000 MWORD <CONT,S0B,B=5,PLUS,CRY,D=2> ; 501
730 000725' 302002 400740
731 000726' 050205 022004 MWORD <JMAP,J=502,S0A,A=5,OR,D=1,OENA,SELE,MGC=4> ; 502
732 000727' 431050 005040
733 000730' 050305 040000 MWORD <JMAP,J=504,S0B,B=5,OR,D=0> ; 503
734 000731' 330002 400040
735 000732' 050400 000000 MWORD <CONT,S0B,B=5,OR,D=7> ; 504
736 000733' 337002 400340
737 000734' 050505 052004 MWORD <JMAP,J=505,S0A,OR,A=5,D=1,OENA,SELE,MGC=4> ; 505
738 000735' 431050 005040
739 000736' 050605 070000 MWORD <JMAP,J=507,S0Q,B=5,OR,D=2> ; 506
740 000737' 232002 400040
741 000740' 050700 000000 MWORD <CONT,S0Q,B=5,OR,D=2> ; 507
742 000741' 232002 400340
743 000742' 051005 102004 MWORD <JMAP,J=510,S0A,OR,A=5,D=1,OENA,SELE,MGC=4> ; 510
744 000743' 431050 005040
745 000744' 051105 120000 MWORD <JMAP,J=512,S0B,B=5,OR,D=0> ; 511
746 000745' 330002 400040
747 000746' 051200 000000 MWORD <CONT,S0B,B=5,OR,D=5> ; 512
748 000747' 335002 400340
749 000750' 051305 132004 MWORD <JMAP,J=513,S0A,A=5,OR,D=1,OENA,SELE,MGC=4> ; 513
750 000751' 431050 005040
751
.MAIN MACRO %53A(1152) 10:22 16-Oct-84 Page 13-3
DFPTA7 MAC 11-Oct-83 20:26 EBUS/MPROC 2901 Tests (Part 4) SEQ 1312
752 ; Register 6
753
754 000752' 060006 010000 MWORD <ADDR=600,JMAP,J=601,S0B,B=6,AND,D=2> ; 600
755 000753' 342003 000040
756 000754' 060100 000000 MWORD <CONT,S0B,B=6,PLUS,CRY,D=2> ; 601
757 000755' 302003 000740
758 000756' 060206 022004 MWORD <JMAP,J=602,S0A,A=6,OR,D=1,OENA,SELE,MGC=4> ; 602
759 000757' 431060 005040
760 000760' 060306 040000 MWORD <JMAP,J=604,S0B,B=6,OR,D=0> ; 603
761 000761' 330003 000040
762 000762' 060400 000000 MWORD <CONT,S0B,B=6,OR,D=7> ; 604
763 000763' 337003 000340
764 000764' 060506 052004 MWORD <JMAP,J=605,S0A,OR,A=6,D=1,OENA,SELE,MGC=4> ; 605
765 000765' 431060 005040
766 000766' 060606 070000 MWORD <JMAP,J=607,S0Q,B=6,OR,D=2> ; 606
767 000767' 232003 000040
768 000770' 060700 000000 MWORD <CONT,S0Q,B=6,OR,D=2> ; 607
769 000771' 232003 000340
770 000772' 061006 102004 MWORD <JMAP,J=610,S0A,OR,A=6,D=1,OENA,SELE,MGC=4> ; 610
771 000773' 431060 005040
772 000774' 061106 120000 MWORD <JMAP,J=612,S0B,B=6,OR,D=0> ; 611
773 000775' 330003 000040
774 000776' 061200 000000 MWORD <CONT,S0B,B=6,OR,D=5> ; 612
775 000777' 335003 000340
776 001000' 061306 132004 MWORD <JMAP,J=613,S0A,A=6,OR,D=1,OENA,SELE,MGC=4> ; 613
777 001001' 431060 005040
778
779 ; Register 7
780
781 001002' 070007 010000 MWORD <ADDR=700,JMAP,J=701,S0B,B=7,AND,D=2> ; 700
782 001003' 342003 400040
783 001004' 070100 000000 MWORD <CONT,S0B,B=7,PLUS,CRY,D=2> ; 701
784 001005' 302003 400740
785 001006' 070207 022004 MWORD <JMAP,J=702,S0A,A=7,OR,D=1,OENA,SELE,MGC=4> ; 702
786 001007' 431070 005040
787 001010' 070307 040000 MWORD <JMAP,J=704,S0B,B=7,OR,D=0> ; 703
788 001011' 330003 400040
789 001012' 070400 000000 MWORD <CONT,S0B,B=7,OR,D=7> ; 704
790 001013' 337003 400340
791 001014' 070507 052004 MWORD <JMAP,J=705,S0A,OR,A=7,D=1,OENA,SELE,MGC=4> ; 705
792 001015' 431070 005040
793 001016' 070607 070000 MWORD <JMAP,J=707,S0Q,B=7,OR,D=2> ; 706
794 001017' 232003 400040
795 001020' 070700 000000 MWORD <CONT,S0Q,B=7,OR,D=2> ; 707
796 001021' 232003 400340
797 001022' 071007 102004 MWORD <JMAP,J=710,S0A,OR,A=7,D=1,OENA,SELE,MGC=4> ; 710
798 001023' 431070 005040
799 001024' 071107 120000 MWORD <JMAP,J=712,S0B,B=7,OR,D=0> ; 711
800 001025' 330003 400040
801 001026' 071200 000000 MWORD <CONT,S0B,B=7,OR,D=5> ; 712
802 001027' 335003 400340
803 001030' 071307 132004 MWORD <JMAP,J=713,S0A,A=7,OR,D=1,OENA,SELE,MGC=4> ; 713
804 001031' 431070 005040
805
806 ; Register 10
.MAIN MACRO %53A(1152) 10:22 16-Oct-84 Page 13-4
DFPTA7 MAC 11-Oct-83 20:26 EBUS/MPROC 2901 Tests (Part 4) SEQ 1313
807
808 001032' 100010 010000 MWORD <ADDR=1000,JMAP,J=1001,S0B,B=10,AND,D=2> ; 1000
809 001033' 342004 000040
810 001034' 100100 000000 MWORD <CONT,S0B,B=10,PLUS,CRY,D=2> ; 1001
811 001035' 302004 000740
812 001036' 100210 022004 MWORD <JMAP,J=1002,S0A,A=10,OR,D=1,OENA,SELE,MGC=4> ; 1002
813 001037' 431100 005040
814 001040' 100310 040000 MWORD <JMAP,J=1004,S0B,B=10,OR,D=0> ; 1003
815 001041' 330004 000040
816 001042' 100400 000000 MWORD <CONT,S0B,B=10,OR,D=7> ; 1004
817 001043' 337004 000340
818 001044' 100510 052004 MWORD <JMAP,J=1005,S0A,OR,A=10,D=1,OENA,SELE,MGC=4> ; 1005
819 001045' 431100 005040
820 001046' 100610 070000 MWORD <JMAP,J=1007,S0Q,B=10,OR,D=2> ; 1006
821 001047' 232004 000040
822 001050' 100700 000000 MWORD <CONT,S0Q,B=10,OR,D=2> ; 1007
823 001051' 232004 000340
824 001052' 101010 102004 MWORD <JMAP,J=1010,S0A,OR,A=10,D=1,OENA,SELE,MGC=4> ; 1010
825 001053' 431100 005040
826 001054' 101110 120000 MWORD <JMAP,J=1012,S0B,B=10,OR,D=0> ; 1011
827 001055' 330004 000040
828 001056' 101200 000000 MWORD <CONT,S0B,B=10,OR,D=5> ; 1012
829 001057' 335004 000340
830 001060' 101310 132004 MWORD <JMAP,J=1013,S0A,A=10,OR,D=1,OENA,SELE,MGC=4> ; 1013
831 001061' 431100 005040
832
833 ; Register 11
834
835 001062' 110011 010000 MWORD <ADDR=1100,JMAP,J=1101,S0B,B=11,AND,D=2> ; 1100
836 001063' 342004 400040
837 001064' 110100 000000 MWORD <CONT,S0B,B=11,PLUS,CRY,D=2> ; 1101
838 001065' 302004 400740
839 001066' 110211 022004 MWORD <JMAP,J=1102,S0A,A=11,OR,D=1,OENA,SELE,MGC=4> ; 1102
840 001067' 431110 005040
841 001070' 110311 040000 MWORD <JMAP,J=1104,S0B,B=11,OR,D=0> ; 1103
842 001071' 330004 400040
843 001072' 110400 000000 MWORD <CONT,S0B,B=11,OR,D=7> ; 1104
844 001073' 337004 400340
845 001074' 110511 052004 MWORD <JMAP,J=1105,S0A,OR,A=11,D=1,OENA,SELE,MGC=4> ; 1105
846 001075' 431110 005040
847 001076' 110611 070000 MWORD <JMAP,J=1107,S0Q,B=11,OR,D=2> ; 1106
848 001077' 232004 400040
849 001100' 110700 000000 MWORD <CONT,S0Q,B=11,OR,D=2> ; 1107
850 001101' 232004 400340
851 001102' 111011 102004 MWORD <JMAP,J=1110,S0A,OR,A=11,D=1,OENA,SELE,MGC=4> ; 1110
852 001103' 431110 005040
853 001104' 111111 120000 MWORD <JMAP,J=1112,S0B,B=11,OR,D=0> ; 1111
854 001105' 330004 400040
855 001106' 111200 000000 MWORD <CONT,S0B,B=11,OR,D=5> ; 1112
856 001107' 335004 400340
857 001110' 111311 132004 MWORD <JMAP,J=1113,S0A,A=11,OR,D=1,OENA,SELE,MGC=4> ; 1113
858 001111' 431110 005040
859
860 ; Register 12
861
.MAIN MACRO %53A(1152) 10:22 16-Oct-84 Page 13-5
DFPTA7 MAC 11-Oct-83 20:26 EBUS/MPROC 2901 Tests (Part 4) SEQ 1314
862 001112' 120012 010000 MWORD <ADDR=1200,JMAP,J=1201,S0B,B=12,AND,D=2> ; 1200
863 001113' 342005 000040
864 001114' 120100 000000 MWORD <CONT,S0B,B=12,PLUS,CRY,D=2> ; 1201
865 001115' 302005 000740
866 001116' 120212 022004 MWORD <JMAP,J=1202,S0A,A=12,OR,D=1,OENA,SELE,MGC=4> ; 1202
867 001117' 431120 005040
868 001120' 120312 040000 MWORD <JMAP,J=1204,S0B,B=12,OR,D=0> ; 1203
869 001121' 330005 000040
870 001122' 120400 000000 MWORD <CONT,S0B,B=12,OR,D=7> ; 1204
871 001123' 337005 000340
872 001124' 120512 052004 MWORD <JMAP,J=1205,S0A,OR,A=12,D=1,OENA,SELE,MGC=4> ; 1205
873 001125' 431120 005040
874 001126' 120612 070000 MWORD <JMAP,J=1207,S0Q,B=12,OR,D=2> ; 1206
875 001127' 232005 000040
876 001130' 120700 000000 MWORD <CONT,S0Q,B=12,OR,D=2> ; 1207
877 001131' 232005 000340
878 001132' 121012 102004 MWORD <JMAP,J=1210,S0A,OR,A=12,D=1,OENA,SELE,MGC=4> ; 1210
879 001133' 431120 005040
880 001134' 121112 120000 MWORD <JMAP,J=1212,S0B,B=12,OR,D=0> ; 1211
881 001135' 330005 000040
882 001136' 121200 000000 MWORD <CONT,S0B,B=12,OR,D=5> ; 1212
883 001137' 335005 000340
884 001140' 121312 132004 MWORD <JMAP,J=1213,S0A,A=12,OR,D=1,OENA,SELE,MGC=4> ; 1213
885 001141' 431120 005040
886
887 ; Register 13
888
889 001142' 130013 010000 MWORD <ADDR=1300,JMAP,J=1301,S0B,B=13,AND,D=2> ; 1300
890 001143' 342005 400040
891 001144' 130100 000000 MWORD <CONT,S0B,B=13,PLUS,CRY,D=2> ; 1301
892 001145' 302005 400740
893 001146' 130213 022004 MWORD <JMAP,J=1302,S0A,A=13,OR,D=1,OENA,SELE,MGC=4> ; 1302
894 001147' 431130 005040
895 001150' 130313 040000 MWORD <JMAP,J=1304,S0B,B=13,OR,D=0> ; 1303
896 001151' 330005 400040
897 001152' 130400 000000 MWORD <CONT,S0B,B=13,OR,D=7> ; 1304
898 001153' 337005 400340
899 001154' 130513 052004 MWORD <JMAP,J=1305,S0A,OR,A=13,D=1,OENA,SELE,MGC=4> ; 1305
900 001155' 431130 005040
901 001156' 130613 070000 MWORD <JMAP,J=1307,S0Q,B=13,OR,D=2> ; 1306
902 001157' 232005 400040
903 001160' 130700 000000 MWORD <CONT,S0Q,B=13,OR,D=2> ; 1307
904 001161' 232005 400340
905 001162' 131013 102004 MWORD <JMAP,J=1310,S0A,OR,A=13,D=1,OENA,SELE,MGC=4> ; 1310
906 001163' 431130 005040
907 001164' 131113 120000 MWORD <JMAP,J=1312,S0B,B=13,OR,D=0> ; 1311
908 001165' 330005 400040
909 001166' 131200 000000 MWORD <CONT,S0B,B=13,OR,D=5> ; 1312
910 001167' 335005 400340
911 001170' 131313 132004 MWORD <JMAP,J=1313,S0A,A=13,OR,D=1,OENA,SELE,MGC=4> ; 1313
912 001171' 431130 005040
913
914 ; Register 14
915
916 001172' 140014 010000 MWORD <ADDR=1400,JMAP,J=1401,S0B,B=14,AND,D=2> ; 1400
.MAIN MACRO %53A(1152) 10:22 16-Oct-84 Page 13-6
DFPTA7 MAC 11-Oct-83 20:26 EBUS/MPROC 2901 Tests (Part 4) SEQ 1315
917 001173' 342006 000040
918 001174' 140100 000000 MWORD <CONT,S0B,B=14,PLUS,CRY,D=2> ; 1401
919 001175' 302006 000740
920 001176' 140214 022004 MWORD <JMAP,J=1402,S0A,A=14,OR,D=1,OENA,SELE,MGC=4> ; 1402
921 001177' 431140 005040
922 001200' 140314 040000 MWORD <JMAP,J=1404,S0B,B=14,OR,D=0> ; 1403
923 001201' 330006 000040
924 001202' 140400 000000 MWORD <CONT,S0B,B=14,OR,D=7> ; 1404
925 001203' 337006 000340
926 001204' 140514 052004 MWORD <JMAP,J=1405,S0A,OR,A=14,D=1,OENA,SELE,MGC=4> ; 1405
927 001205' 431140 005040
928 001206' 140614 070000 MWORD <JMAP,J=1407,S0Q,B=14,OR,D=2> ; 1406
929 001207' 232006 000040
930 001210' 140700 000000 MWORD <CONT,S0Q,B=14,OR,D=2> ; 1407
931 001211' 232006 000340
932 001212' 141014 102004 MWORD <JMAP,J=1410,S0A,OR,A=14,D=1,OENA,SELE,MGC=4> ; 1410
933 001213' 431140 005040
934 001214' 141114 120000 MWORD <JMAP,J=1412,S0B,B=14,OR,D=0> ; 1411
935 001215' 330006 000040
936 001216' 141200 000000 MWORD <CONT,S0B,B=14,OR,D=5> ; 1412
937 001217' 335006 000340
938 001220' 141314 132004 MWORD <JMAP,J=1413,S0A,A=14,OR,D=1,OENA,SELE,MGC=4> ; 1413
939 001221' 431140 005040
940
941 ; Register 15
942
943 001222' 150015 010000 MWORD <ADDR=1500,JMAP,J=1501,S0B,B=15,AND,D=2> ; 1500
944 001223' 342006 400040
945 001224' 150100 000000 MWORD <CONT,S0B,B=15,PLUS,CRY,D=2> ; 1501
946 001225' 302006 400740
947 001226' 150215 022004 MWORD <JMAP,J=1502,S0A,A=15,OR,D=1,OENA,SELE,MGC=4> ; 1502
948 001227' 431150 005040
949 001230' 150315 040000 MWORD <JMAP,J=1504,S0B,B=15,OR,D=0> ; 1503
950 001231' 330006 400040
951 001232' 150400 000000 MWORD <CONT,S0B,B=15,OR,D=7> ; 1504
952 001233' 337006 400340
953 001234' 150515 052004 MWORD <JMAP,J=1505,S0A,OR,A=15,D=1,OENA,SELE,MGC=4> ; 1505
954 001235' 431150 005040
955 001236' 150615 070000 MWORD <JMAP,J=1507,S0Q,B=15,OR,D=2> ; 1506
956 001237' 232006 400040
957 001240' 150700 000000 MWORD <CONT,S0Q,B=15,OR,D=2> ; 1507
958 001241' 232006 400340
959 001242' 151015 102004 MWORD <JMAP,J=1510,S0A,OR,A=15,D=1,OENA,SELE,MGC=4> ; 1510
960 001243' 431150 005040
961 001244' 151115 120000 MWORD <JMAP,J=1512,S0B,B=15,OR,D=0> ; 1511
962 001245' 330006 400040
963 001246' 151200 000000 MWORD <CONT,S0B,B=15,OR,D=5> ; 1512
964 001247' 335006 400340
965 001250' 151315 132004 MWORD <JMAP,J=1513,S0A,A=15,OR,D=1,OENA,SELE,MGC=4> ; 1513
966 001251' 431150 005040
967
968 ; Register 16
969
970 001252' 160016 010000 MWORD <ADDR=1600,JMAP,J=1601,S0B,B=16,AND,D=2> ; 1600
971 001253' 342007 000040
.MAIN MACRO %53A(1152) 10:22 16-Oct-84 Page 13-7
DFPTA7 MAC 11-Oct-83 20:26 EBUS/MPROC 2901 Tests (Part 4) SEQ 1316
972 001254' 160100 000000 MWORD <CONT,S0B,B=16,PLUS,CRY,D=2> ; 1601
973 001255' 302007 000740
974 001256' 160216 022004 MWORD <JMAP,J=1602,S0A,A=16,OR,D=1,OENA,SELE,MGC=4> ; 1602
975 001257' 431160 005040
976 001260' 160316 040000 MWORD <JMAP,J=1604,S0B,B=16,OR,D=0> ; 1603
977 001261' 330007 000040
978 001262' 160400 000000 MWORD <CONT,S0B,B=16,OR,D=7> ; 1604
979 001263' 337007 000340
980 001264' 160516 052004 MWORD <JMAP,J=1605,S0A,OR,A=16,D=1,OENA,SELE,MGC=4> ; 1605
981 001265' 431160 005040
982 001266' 160616 070000 MWORD <JMAP,J=1607,S0Q,B=16,OR,D=2> ; 1606
983 001267' 232007 000040
984 001270' 160700 000000 MWORD <CONT,S0Q,B=16,OR,D=2> ; 1607
985 001271' 232007 000340
986 001272' 161016 102004 MWORD <JMAP,J=1610,S0A,OR,A=16,D=1,OENA,SELE,MGC=4> ; 1610
987 001273' 431160 005040
988 001274' 161116 120000 MWORD <JMAP,J=1612,S0B,B=16,OR,D=0> ; 1611
989 001275' 330007 000040
990 001276' 161200 000000 MWORD <CONT,S0B,B=16,OR,D=5> ; 1612
991 001277' 335007 000340
992 001300' 161316 132004 MWORD <JMAP,J=1613,S0A,A=16,OR,D=1,OENA,SELE,MGC=4> ; 1613
993 001301' 431160 005040
994
995 ; Register 17
996
997 001302' 170017 010000 MWORD <ADDR=1700,JMAP,J=1701,S0B,B=17,AND,D=2> ; 1700
998 001303' 342007 400040
999 001304' 170100 000000 MWORD <CONT,S0B,B=17,PLUS,CRY,D=2> ; 1701
1000 001305' 302007 400740
1001 001306' 170217 022004 MWORD <JMAP,J=1702,S0A,A=17,OR,D=1,OENA,SELE,MGC=4> ; 1702
1002 001307' 431170 005040
1003 001310' 170317 040000 MWORD <JMAP,J=1704,S0B,B=17,OR,D=0> ; 1703
1004 001311' 330007 400040
1005 001312' 170400 000000 MWORD <CONT,S0B,B=17,OR,D=7> ; 1704
1006 001313' 337007 400340
1007 001314' 170517 052004 MWORD <JMAP,J=1705,S0A,OR,A=17,D=1,OENA,SELE,MGC=4> ; 1705
1008 001315' 431170 005040
1009 001316' 170617 070000 MWORD <JMAP,J=1707,S0Q,B=17,OR,D=2> ; 1706
1010 001317' 232007 400040
1011 001320' 170700 000000 MWORD <CONT,S0Q,B=17,OR,D=2> ; 1707
1012 001321' 232007 400340
1013 001322' 171017 102004 MWORD <JMAP,J=1710,S0A,OR,A=17,D=1,OENA,SELE,MGC=4> ; 1710
1014 001323' 431170 005040
1015 001324' 171117 120000 MWORD <JMAP,J=1712,S0B,B=17,OR,D=0> ; 1711
1016 001325' 330007 400040
1017 001326' 171200 000000 MWORD <CONT,S0B,B=17,OR,D=5> ; 1712
1018 001327' 335007 400340
1019 001330' 171317 132004 MWORD <JMAP,J=1713,S0A,A=17,OR,D=1,OENA,SELE,MGC=4> ; 1713
1020 001331' 431170 005040
1021 001332' 777777 777777 -1
.MAIN MACRO %53A(1152) 10:22 16-Oct-84 Page 14
DFPTA7 MAC 11-Oct-83 20:26 EBUS/MPROC 2901 Tests (Part 4) SEQ 1317
1022
1023 ;#********************************************************************
1024 ;* TEST 36 - RAM Data Movement Test
1025 ;
1026 ; Description: Verify that data can be successfully moved from
1027 ; RAM location to RAM location at full speed.
1028 ;
1029 ; Procedure: Clear Port
1030 ; Load microcode
1031 ;
1032 ; Set RAR to 0
1033 ; Execute JMAP - load data pattern into Reg 0
1034 ; Execute a sequence of instructions that moves
1035 ; the data from register to register while
1036 ; clearing other registers.
1037 ;
1038 ; When done, read the EBUF and verify that the
1039 ; data is correct (516000,,001234).
1040 ;
1041 ; Failure: ---
1042 ;#********************************************************************
1043
1044 ; Test data
1045
1046 001333' 254 00 0 00 001343' TSTA36: JRST TG36 ; go start test
1047 001334' 420402 000036 EBUS!ALU!NDMP!ZALU!36 ; test mask
1048 001335' 001407' 003507' T36M,,[ASCIZ ^RAM Data Movement Test^]
1049 001336' 003416' 000000 [EXP MLAST!E23],,0
1050 001337' 000000 002016' TSTA37 ; failure test table
1051 001340' 000000 002244' TSTA40 ; ...
1052 001341' 000000 002467' TSTA41
1053 001342' 777777 777777 -1
1054
1055 ; Start test
1056
1057 001343' 201 00 0 00 000000' TG36: MOVEI Z7 ; get address of module start
1058 001344' 260 17 0 00 000311* GO TRACE ; handle trace output
1059 001345' 201 01 0 00 001407' MOVEI 1,T36M ; set up microcode address
1060 001346' 260 17 0 00 000313* GO TLOAD ; load/verify it
1061 001347' 263 17 0 00 000000 RTN ; failed - exit test
1062
1063 ; Initialization
1064
1065 001350' 400 15 0 00 000000 TL36: SETZ ERFLG, ; clear error flag
1066 001351' 260 17 0 00 000316* GO IPACLR ; clear port
.MAIN MACRO %53A(1152) 10:22 16-Oct-84 Page 15
DFPTA7 MAC 11-Oct-83 20:26 EBUS/MPROC 2901 Tests (Part 4) SEQ 1318
1067
1068 ; 1st segment of test (Segment A) - Start up port and wait till it stops
1069
1070 001352' 201 01 0 00 000012 TA36: MOVEI 1,^D10 ; maximum delay before timeout (msec)
1071 001353' 201 02 0 00 000000 MOVEI 2,0 ; error address
1072 001354' 201 03 0 00 000032 MOVEI 3,32 ; correct address
1073 001355' 400 04 0 00 000000 SETZ 4, ; starting address
1074 001356' 260 17 0 00 000162* GO AEXEC ; execute ALU type test
1075 001357' 255 00 0 00 000000 JFCL ; ignore error
1076 001360' 400 15 0 00 000000 SETZ ERFLG, ; clear error flag
1077 001361' 332 00 0 00 000165* SKIPE ALFLS ; started up ok?
1078 001362' 474 15 0 00 000000 SETO ERFLG, ; no - set error flag
1079 001363' 200 00 0 00 000205* MOVE ALEBF ; get EBUF data
1080 001364' 404 00 0 00 003514' AND [777400,,1777] ; mask out indeterminate bits
1081 001365' 312 00 0 00 003515' CAME [516000,,1234] ; correct?
1082 001366' 474 15 0 00 000000 SETO ERFLG, ; no - set error flag
1083
1084 ; Handle error printouts and scope looping
1085
1086 001367' 027 00 0 00 001373' SCOPER MA36 ; print error message
1087 001370' 254 00 0 00 001350' JRST TL36 ; loop on error
1088 001371' 254 00 0 00 001372' JRST TX36 ; altmode exit
1089
1090 ; End of test
1091
1092 001372' 263 17 0 00 000000 TX36: RTN ; return
1093
1094 ; Error messages
1095
1096 001373' 140000 003516' MA36: MSG!TXNOT![ASCIZ /2901 RAM data got destroyed somehow (result in EBUF)/]
1097 001374' 270000 001375' LAST!CALL!TXALL!MA36PN
1098
1099 001375' 200 01 0 00 000200* MA36PN: MOVE 1,SCOSW ; get switches
1100 001376' 603 01 0 00 000200 TLNE 1,TXTINH ; full printout?
1101 TMSGC <EBUF (C): 000000 000001
1102 001377' 037 00 0 00 003450' (A): >
1103 001400' 607 01 0 00 000200 TLNN 1,TXTINH ; full printout?
1104 TMSGC <EBUF (Correct): 000000 000001
1105 001401' 037 00 0 00 003460' (Actual): >
1106 001402' 200 00 0 00 001363* MOVE ALEBF
1107 001403' 037 13 0 00 000000 PNTHW
1108 001404' 607 01 0 00 000200 TLNN 1,TXTINH ; full printout?
1109 001405' 037 00 0 00 003531' TMSGC <(Middle 16 bits indeterminate)>
1110 001406' 263 17 0 00 000000 RTN
.MAIN MACRO %53A(1152) 10:22 16-Oct-84 Page 16
DFPTA7 MAC 11-Oct-83 20:26 EBUS/MPROC 2901 Tests (Part 4) SEQ 1319
1111
1112 ; Microcode:
1113
1114 001407' 000000 011234 T36M: MWORD <ADDR=0,JMAP,J=1,SD0,OR,D=2,SKCN,MGC=1234> ; 0
1115 001410' 732000 240040
1116 001411' 000100 000000 MWORD <CONT,S0A,AND,D=2,B=1> ; 1
1117 001412' 442000 400340
1118 001413' 000200 000000 MWORD <CONT,S0A,PLUS,D=2,A=0,B=1> ; 2
1119 001414' 402000 400340
1120 001415' 000300 000000 MWORD <CONT,S0A,AND,D=2,B=2> ; 3
1121 001416' 442001 000340
1122 001417' 000400 000000 MWORD <CONT,S0A,PLUS,D=2,A=1,B=2> ; 4
1123 001420' 402011 000340
1124 001421' 000500 000000 MWORD <CONT,S0A,AND,D=2,B=3> ; 5
1125 001422' 442001 400340
1126 001423' 000600 000000 MWORD <CONT,S0A,PLUS,D=2,A=2,B=3> ; 6
1127 001424' 402021 400340
1128 001425' 000700 000000 MWORD <CONT,S0A,AND,D=2,B=4> ; 7
1129 001426' 442002 000340
1130 001427' 001000 000000 MWORD <CONT,S0A,PLUS,D=2,A=3,B=4> ; 10
1131 001430' 402032 000340
1132 001431' 001100 000000 MWORD <CONT,S0A,AND,D=2,B=5> ; 11
1133 001432' 442002 400340
1134 001433' 001200 000000 MWORD <CONT,S0A,PLUS,D=2,A=4,B=5> ; 12
1135 001434' 402042 400340
1136 001435' 001300 000000 MWORD <CONT,S0A,AND,D=2,B=6> ; 13
1137 001436' 442003 000340
1138 001437' 001400 000000 MWORD <CONT,S0A,PLUS,D=2,A=5,B=6> ; 14
1139 001440' 402053 000340
1140 001441' 001500 000000 MWORD <CONT,S0A,AND,D=2,B=7> ; 15
1141 001442' 442003 400340
1142 001443' 001600 000000 MWORD <CONT,S0A,PLUS,D=2,A=6,B=7> ; 16
1143 001444' 402063 400340
1144 001445' 001700 000000 MWORD <CONT,S0A,AND,D=2,B=10> ; 17
1145 001446' 442004 000340
1146 001447' 002000 000000 MWORD <CONT,S0A,PLUS,D=2,A=7,B=10> ; 20
1147 001450' 402074 000340
1148 001451' 002100 000000 MWORD <CONT,S0A,AND,D=2,B=11> ; 21
1149 001452' 442004 400340
1150 001453' 002200 000000 MWORD <CONT,S0A,PLUS,D=2,A=10,B=11> ; 22
1151 001454' 402104 400340
1152 001455' 002300 000000 MWORD <CONT,S0A,AND,D=2,B=12> ; 23
1153 001456' 442005 000340
1154 001457' 002400 000000 MWORD <CONT,S0A,PLUS,D=2,A=11,B=12> ; 24
1155 001460' 402115 000340
1156 001461' 002500 000000 MWORD <CONT,S0A,AND,D=2,B=13> ; 25
1157 001462' 442005 400340
1158 001463' 002600 000000 MWORD <CONT,S0A,PLUS,D=2,A=12,B=13> ; 26
1159 001464' 402125 400340
1160 001465' 002700 000000 MWORD <CONT,S0A,AND,D=2,B=14> ; 27
1161 001466' 442006 000340
1162 001467' 003000 000000 MWORD <CONT,S0A,PLUS,D=2,A=13,B=14> ; 30
1163 001470' 402136 000340
1164 001471' 003100 000000 MWORD <CONT,S0A,AND,D=2,B=15> ; 31
1165 001472' 442006 400340
.MAIN MACRO %53A(1152) 10:22 16-Oct-84 Page 16-1
DFPTA7 MAC 11-Oct-83 20:26 EBUS/MPROC 2901 Tests (Part 4) SEQ 1320
1166 001473' 003200 000000 MWORD <CONT,S0A,PLUS,D=2,A=14,B=15> ; 32
1167 001474' 402146 400340
1168 001475' 003300 000000 MWORD <CONT,S0A,AND,D=2,B=16> ; 33
1169 001476' 442007 000340
1170 001477' 003400 000000 MWORD <CONT,S0A,PLUS,D=2,A=15,B=16> ; 34
1171 001500' 402157 000340
1172 001501' 003500 000000 MWORD <CONT,S0A,AND,D=2,B=17> ; 35
1173 001502' 442007 400340
1174 001503' 003600 000000 MWORD <CONT,S0A,PLUS,D=2,A=16,B=17> ; 36
1175 001504' 402167 400340
1176 001505' 003700 000000 MWORD <CONT,S0A,AND,D=2,B=0> ; 37
1177 001506' 442000 000340
1178 001507' 004000 000000 MWORD <CONT,S0A,PLUS,D=2,A=17,B=0> ; 40
1179 001510' 402170 000340
1180
1181 001511' 004100 000000 MWORD <CONT,S0A,AND,D=2,B=1> ; 41
1182 001512' 442000 400340
1183 001513' 004200 000000 MWORD <CONT,S0A,OR,D=2,A=0,B=1> ; 42
1184 001514' 432000 400340
1185 001515' 004300 000000 MWORD <CONT,S0A,AND,D=2,B=2> ; 43
1186 001516' 442001 000340
1187 001517' 004400 000000 MWORD <CONT,S0A,OR,D=2,A=1,B=2> ; 44
1188 001520' 432011 000340
1189 001521' 004500 000000 MWORD <CONT,S0A,AND,D=2,B=3> ; 45
1190 001522' 442001 400340
1191 001523' 004600 000000 MWORD <CONT,S0A,OR,D=2,A=2,B=3> ; 46
1192 001524' 432021 400340
1193 001525' 004700 000000 MWORD <CONT,S0A,AND,D=2,B=4> ; 47
1194 001526' 442002 000340
1195 001527' 005000 000000 MWORD <CONT,S0A,OR,D=2,A=3,B=4> ; 50
1196 001530' 432032 000340
1197 001531' 005100 000000 MWORD <CONT,S0A,AND,D=2,B=5> ; 51
1198 001532' 442002 400340
1199 001533' 005200 000000 MWORD <CONT,S0A,OR,D=2,A=4,B=5> ; 52
1200 001534' 432042 400340
1201 001535' 005300 000000 MWORD <CONT,S0A,AND,D=2,B=6> ; 53
1202 001536' 442003 000340
1203 001537' 005400 000000 MWORD <CONT,S0A,OR,D=2,A=5,B=6> ; 54
1204 001540' 432053 000340
1205 001541' 005500 000000 MWORD <CONT,S0A,AND,D=2,B=7> ; 55
1206 001542' 442003 400340
1207 001543' 005600 000000 MWORD <CONT,S0A,OR,D=2,A=6,B=7> ; 56
1208 001544' 432063 400340
1209 001545' 005700 000000 MWORD <CONT,S0A,AND,D=2,B=10> ; 57
1210 001546' 442004 000340
1211 001547' 006000 000000 MWORD <CONT,S0A,OR,D=2,A=7,B=10> ; 60
1212 001550' 432074 000340
1213 001551' 006100 000000 MWORD <CONT,S0A,AND,D=2,B=11> ; 61
1214 001552' 442004 400340
1215 001553' 006200 000000 MWORD <CONT,S0A,OR,D=2,A=10,B=11> ; 62
1216 001554' 432104 400340
1217 001555' 006300 000000 MWORD <CONT,S0A,AND,D=2,B=12> ; 63
1218 001556' 442005 000340
1219 001557' 006400 000000 MWORD <CONT,S0A,OR,D=2,A=11,B=12> ; 64
1220 001560' 432115 000340
.MAIN MACRO %53A(1152) 10:22 16-Oct-84 Page 16-2
DFPTA7 MAC 11-Oct-83 20:26 EBUS/MPROC 2901 Tests (Part 4) SEQ 1321
1221 001561' 006500 000000 MWORD <CONT,S0A,AND,D=2,B=13> ; 65
1222 001562' 442005 400340
1223 001563' 006600 000000 MWORD <CONT,S0A,OR,D=2,A=12,B=13> ; 66
1224 001564' 432125 400340
1225 001565' 006700 000000 MWORD <CONT,S0A,AND,D=2,B=14> ; 67
1226 001566' 442006 000340
1227 001567' 007000 000000 MWORD <CONT,S0A,OR,D=2,A=13,B=14> ; 70
1228 001570' 432136 000340
1229 001571' 007100 000000 MWORD <CONT,S0A,AND,D=2,B=15> ; 71
1230 001572' 442006 400340
1231 001573' 007200 000000 MWORD <CONT,S0A,OR,D=2,A=14,B=15> ; 72
1232 001574' 432146 400340
1233 001575' 007300 000000 MWORD <CONT,S0A,AND,D=2,B=16> ; 73
1234 001576' 442007 000340
1235 001577' 007400 000000 MWORD <CONT,S0A,OR,D=2,A=15,B=16> ; 74
1236 001600' 432157 000340
1237 001601' 007500 000000 MWORD <CONT,S0A,AND,D=2,B=17> ; 75
1238 001602' 442007 400340
1239 001603' 007600 000000 MWORD <CONT,S0A,OR,D=2,A=16,B=17> ; 76
1240 001604' 432167 400340
1241 001605' 007700 000000 MWORD <CONT,S0A,AND,D=2,B=0> ; 77
1242 001606' 442000 000340
1243 001607' 010000 000000 MWORD <CONT,S0A,OR,D=2,A=17,B=0> ; 100
1244 001610' 432170 000340
1245
1246 001611' 010100 000000 MWORD <CONT,S0A,AND,D=2,B=1> ; 101
1247 001612' 442000 400340
1248 001613' 010200 000000 MWORD <CONT,S0A,XOR,D=2,A=0,B=1> ; 102
1249 001614' 462000 400340
1250 001615' 010300 000000 MWORD <CONT,S0A,AND,D=2,B=2> ; 103
1251 001616' 442001 000340
1252 001617' 010400 000000 MWORD <CONT,S0A,XOR,D=2,A=1,B=2> ; 104
1253 001620' 462011 000340
1254 001621' 010500 000000 MWORD <CONT,S0A,AND,D=2,B=3> ; 105
1255 001622' 442001 400340
1256 001623' 010600 000000 MWORD <CONT,S0A,XOR,D=2,A=2,B=3> ; 106
1257 001624' 462021 400340
1258 001625' 010700 000000 MWORD <CONT,S0A,AND,D=2,B=4> ; 107
1259 001626' 442002 000340
1260 001627' 011000 000000 MWORD <CONT,S0A,XOR,D=2,A=3,B=4> ; 110
1261 001630' 462032 000340
1262 001631' 011100 000000 MWORD <CONT,S0A,AND,D=2,B=5> ; 111
1263 001632' 442002 400340
1264 001633' 011200 000000 MWORD <CONT,S0A,XOR,D=2,A=4,B=5> ; 112
1265 001634' 462042 400340
1266 001635' 011300 000000 MWORD <CONT,S0A,AND,D=2,B=6> ; 113
1267 001636' 442003 000340
1268 001637' 011400 000000 MWORD <CONT,S0A,XOR,D=2,A=5,B=6> ; 114
1269 001640' 462053 000340
1270 001641' 011500 000000 MWORD <CONT,S0A,AND,D=2,B=7> ; 115
1271 001642' 442003 400340
1272 001643' 011600 000000 MWORD <CONT,S0A,XOR,D=2,A=6,B=7> ; 116
1273 001644' 462063 400340
1274 001645' 011700 000000 MWORD <CONT,S0A,AND,D=2,B=10> ; 117
1275 001646' 442004 000340
.MAIN MACRO %53A(1152) 10:22 16-Oct-84 Page 16-3
DFPTA7 MAC 11-Oct-83 20:26 EBUS/MPROC 2901 Tests (Part 4) SEQ 1322
1276 001647' 012000 000000 MWORD <CONT,S0A,XOR,D=2,A=7,B=10> ; 120
1277 001650' 462074 000340
1278 001651' 012100 000000 MWORD <CONT,S0A,AND,D=2,B=11> ; 121
1279 001652' 442004 400340
1280 001653' 012200 000000 MWORD <CONT,S0A,XOR,D=2,A=10,B=11> ; 122
1281 001654' 462104 400340
1282 001655' 012300 000000 MWORD <CONT,S0A,AND,D=2,B=12> ; 123
1283 001656' 442005 000340
1284 001657' 012400 000000 MWORD <CONT,S0A,XOR,D=2,A=11,B=12> ; 124
1285 001660' 462115 000340
1286 001661' 012500 000000 MWORD <CONT,S0A,AND,D=2,B=13> ; 125
1287 001662' 442005 400340
1288 001663' 012600 000000 MWORD <CONT,S0A,XOR,D=2,A=12,B=13> ; 126
1289 001664' 462125 400340
1290 001665' 012700 000000 MWORD <CONT,S0A,AND,D=2,B=14> ; 127
1291 001666' 442006 000340
1292 001667' 013000 000000 MWORD <CONT,S0A,XOR,D=2,A=13,B=14> ; 130
1293 001670' 462136 000340
1294 001671' 013100 000000 MWORD <CONT,S0A,AND,D=2,B=15> ; 131
1295 001672' 442006 400340
1296 001673' 013200 000000 MWORD <CONT,S0A,XOR,D=2,A=14,B=15> ; 132
1297 001674' 462146 400340
1298 001675' 013300 000000 MWORD <CONT,S0A,AND,D=2,B=16> ; 133
1299 001676' 442007 000340
1300 001677' 013400 000000 MWORD <CONT,S0A,XOR,D=2,A=15,B=16> ; 134
1301 001700' 462157 000340
1302 001701' 013500 000000 MWORD <CONT,S0A,AND,D=2,B=17> ; 135
1303 001702' 442007 400340
1304 001703' 013600 000000 MWORD <CONT,S0A,XOR,D=2,A=16,B=17> ; 136
1305 001704' 462167 400340
1306 001705' 013700 000000 MWORD <CONT,S0A,AND,D=2,B=0> ; 137
1307 001706' 442000 000340
1308 001707' 014000 000000 MWORD <CONT,S0A,XOR,D=2,A=17,B=0> ; 140
1309 001710' 462170 000340
1310
1311 001711' 014100 000000 MWORD <CONT,S0A,AND,D=2,B=1> ; 141
1312 001712' 442000 400340
1313 001713' 014200 000000 MWORD <CONT,S0A,NAND,D=2,A=0,B=1> ; 142
1314 001714' 452000 400340
1315 001715' 014300 000000 MWORD <CONT,S0A,AND,D=2,B=2> ; 143
1316 001716' 442001 000340
1317 001717' 014400 000000 MWORD <CONT,S0A,NAND,D=2,A=1,B=2> ; 144
1318 001720' 452011 000340
1319 001721' 014500 000000 MWORD <CONT,S0A,AND,D=2,B=3> ; 145
1320 001722' 442001 400340
1321 001723' 014600 000000 MWORD <CONT,S0A,NAND,D=2,A=2,B=3> ; 146
1322 001724' 452021 400340
1323 001725' 014700 000000 MWORD <CONT,S0A,AND,D=2,B=4> ; 147
1324 001726' 442002 000340
1325 001727' 015000 000000 MWORD <CONT,S0A,NAND,D=2,A=3,B=4> ; 150
1326 001730' 452032 000340
1327 001731' 015100 000000 MWORD <CONT,S0A,AND,D=2,B=5> ; 151
1328 001732' 442002 400340
1329 001733' 015200 000000 MWORD <CONT,S0A,NAND,D=2,A=4,B=5> ; 152
1330 001734' 452042 400340
.MAIN MACRO %53A(1152) 10:22 16-Oct-84 Page 16-4
DFPTA7 MAC 11-Oct-83 20:26 EBUS/MPROC 2901 Tests (Part 4) SEQ 1323
1331 001735' 015300 000000 MWORD <CONT,S0A,AND,D=2,B=6> ; 153
1332 001736' 442003 000340
1333 001737' 015400 000000 MWORD <CONT,S0A,NAND,D=2,A=5,B=6> ; 154
1334 001740' 452053 000340
1335 001741' 015500 000000 MWORD <CONT,S0A,AND,D=2,B=7> ; 155
1336 001742' 442003 400340
1337 001743' 015600 000000 MWORD <CONT,S0A,NAND,D=2,A=6,B=7> ; 156
1338 001744' 452063 400340
1339 001745' 015700 000000 MWORD <CONT,S0A,AND,D=2,B=10> ; 157
1340 001746' 442004 000340
1341 001747' 016000 000000 MWORD <CONT,S0A,NAND,D=2,A=7,B=10> ; 160
1342 001750' 452074 000340
1343 001751' 016100 000000 MWORD <CONT,S0A,AND,D=2,B=11> ; 161
1344 001752' 442004 400340
1345 001753' 016200 000000 MWORD <CONT,S0A,NAND,D=2,A=10,B=11> ; 162
1346 001754' 452104 400340
1347 001755' 016300 000000 MWORD <CONT,S0A,AND,D=2,B=12> ; 163
1348 001756' 442005 000340
1349 001757' 016400 000000 MWORD <CONT,S0A,NAND,D=2,A=11,B=12> ; 164
1350 001760' 452115 000340
1351 001761' 016500 000000 MWORD <CONT,S0A,AND,D=2,B=13> ; 165
1352 001762' 442005 400340
1353 001763' 016600 000000 MWORD <CONT,S0A,NAND,D=2,A=12,B=13> ; 166
1354 001764' 452125 400340
1355 001765' 016700 000000 MWORD <CONT,S0A,AND,D=2,B=14> ; 167
1356 001766' 442006 000340
1357 001767' 017000 000000 MWORD <CONT,S0A,NAND,D=2,A=13,B=14> ; 170
1358 001770' 452136 000340
1359 001771' 017100 000000 MWORD <CONT,S0A,AND,D=2,B=15> ; 171
1360 001772' 442006 400340
1361 001773' 017200 000000 MWORD <CONT,S0A,NAND,D=2,A=14,B=15> ; 172
1362 001774' 452146 400340
1363 001775' 017300 000000 MWORD <CONT,S0A,AND,D=2,B=16> ; 173
1364 001776' 442007 000340
1365 001777' 017400 000000 MWORD <CONT,S0A,NAND,D=2,A=15,B=16> ; 174
1366 002000' 452157 000340
1367 002001' 017500 000000 MWORD <CONT,S0A,AND,D=2,B=17> ; 175
1368 002002' 442007 400340
1369 002003' 017600 000000 MWORD <CONT,S0A,NAND,D=2,A=16,B=17> ; 176
1370 002004' 452167 400340
1371 002005' 017700 000000 MWORD <CONT,S0A,AND,D=2,B=0> ; 177
1372 002006' 442000 000340
1373 002007' 020000 000000 MWORD <CONT,S0A,NAND,D=2,A=17,B=0> ; 200
1374 002010' 452170 000340
1375
1376 002011' 020102 022004 MWORD <JMAP,J=202,S0A,A=0,OR,OENA,SELE,MGC=4> ; 201
1377 002012' 430000 005040
1378 002013' 020202 020000 MWORD <JMAP,J=202> ; 202
1379 002014' 000000 000040
1380 002015' 777777 777777 -1
.MAIN MACRO %53A(1152) 10:22 16-Oct-84 Page 17
DFPTA7 MAC 11-Oct-83 20:26 EBUS/MPROC 2901 Tests (Part 4) SEQ 1324
1381
1382 ;#********************************************************************
1383 ;* TEST 37 - RAM/Q-Register Data Movement Test
1384 ;
1385 ; Description: Verify that data can be successfully moved to and
1386 ; from RAM location and Q-Register at full speed.
1387 ;
1388 ; Procedure: Clear Port
1389 ; Load microcode
1390 ;
1391 ; Set RAR to 0
1392 ; Execute JMAP - load data pattern into Reg 0
1393 ; Execute a sequence of instructions that moves
1394 ; the data from register to register while
1395 ; clearing other registers.
1396 ;
1397 ; When done, read the EBUF and verify that the
1398 ; data is correct (516000,,001234).
1399 ;
1400 ; Failure: ---
1401 ;#********************************************************************
1402
1403 ; Test data
1404
1405 002016' 254 00 0 00 002025' TSTA37: JRST TG37 ; go start test
1406 002017' 420402 000037 EBUS!ALU!NDMP!ZALU!37 ; test mask
1407 002020' 002071' 003540' T37M,,[ASCIZ ^RAM/Q-Register Data Movement Test^]
1408 002021' 003416' 000000 [EXP MLAST!E23],,0
1409 002022' 000000 002244' TSTA40 ; failure test table
1410 002023' 000000 002467' TSTA41 ; ...
1411 002024' 777777 777777 -1
1412
1413 ; Start test
1414
1415 002025' 201 00 0 00 000000' TG37: MOVEI Z7 ; get address of module start
1416 002026' 260 17 0 00 001344* GO TRACE ; handle trace output
1417 002027' 201 01 0 00 002071' MOVEI 1,T37M ; set up microcode address
1418 002030' 260 17 0 00 001346* GO TLOAD ; load/verify it
1419 002031' 263 17 0 00 000000 RTN ; failed - exit test
1420
1421 ; Initialization
1422
1423 002032' 400 15 0 00 000000 TL37: SETZ ERFLG, ; clear error flag
1424 002033' 260 17 0 00 001351* GO IPACLR ; clear port
.MAIN MACRO %53A(1152) 10:22 16-Oct-84 Page 18
DFPTA7 MAC 11-Oct-83 20:26 EBUS/MPROC 2901 Tests (Part 4) SEQ 1325
1425
1426 ; 1st segment of test (Segment A) - Start up port and wait till it stops
1427
1428 002034' 201 01 0 00 000012 TA37: MOVEI 1,^D10 ; maximum delay before timeout (msec)
1429 002035' 201 02 0 00 000000 MOVEI 2,0 ; error address
1430 002036' 201 03 0 00 000032 MOVEI 3,32 ; correct address
1431 002037' 400 04 0 00 000000 SETZ 4, ; starting address
1432 002040' 260 17 0 00 001356* GO AEXEC ; execute ALU type test
1433 002041' 255 00 0 00 000000 JFCL ; ignore error
1434 002042' 400 15 0 00 000000 SETZ ERFLG, ; clear error flag
1435 002043' 332 00 0 00 001361* SKIPE ALFLS ; started up ok?
1436 002044' 474 15 0 00 000000 SETO ERFLG, ; no - set error flag
1437 002045' 200 00 0 00 001402* MOVE ALEBF ; get EBUF data
1438 002046' 404 00 0 00 003514' AND [777400,,1777] ; mask out indeterminate bits
1439 002047' 312 00 0 00 003515' CAME [516000,,1234] ; correct?
1440 002050' 474 15 0 00 000000 SETO ERFLG, ; no - set error flag
1441
1442 ; Handle error printouts and scope looping
1443
1444 002051' 027 00 0 00 002055' SCOPER MA37 ; print error message
1445 002052' 254 00 0 00 002032' JRST TL37 ; loop on error
1446 002053' 254 00 0 00 002054' JRST TX37 ; altmode exit
1447
1448 ; End of test
1449
1450 002054' 263 17 0 00 000000 TX37: RTN ; return
1451
1452 ; Error messages
1453
1454 002055' 140000 003547' MA37: MSG!TXNOT![ASCIZ ^2901 RAM/Q-Register data got destroyed somehow (result in EBUF)^]
1455 002056' 270000 002057' LAST!CALL!TXALL!MA37PN
1456
1457 002057' 200 01 0 00 001375* MA37PN: MOVE 1,SCOSW ; get switches
1458 002060' 603 01 0 00 000200 TLNE 1,TXTINH ; full printout?
1459 TMSGC <EBUF (C): 000000 000001
1460 002061' 037 00 0 00 003450' (A): >
1461 002062' 607 01 0 00 000200 TLNN 1,TXTINH ; full printout?
1462 TMSGC <EBUF (Correct): 000000 000001
1463 002063' 037 00 0 00 003460' (Actual): >
1464 002064' 200 00 0 00 002045* MOVE ALEBF
1465 002065' 037 13 0 00 000000 PNTHW
1466 002066' 607 01 0 00 000200 TLNN 1,TXTINH ; full printout?
1467 002067' 037 00 0 00 003531' TMSGC <(Middle 16 bits indeterminate)>
1468 002070' 263 17 0 00 000000 RTN
.MAIN MACRO %53A(1152) 10:22 16-Oct-84 Page 19
DFPTA7 MAC 11-Oct-83 20:26 EBUS/MPROC 2901 Tests (Part 4) SEQ 1326
1469
1470 ; Microcode:
1471
1472 002071' 000000 011234 T37M: MWORD <ADDR=0,JMAP,J=1,SD0,OR,D=2,SKCN,MGC=1234> ; 0
1473 002072' 732000 240040
1474 002073' 000100 100000 MWORD <LDCT,J=10,D=1> ; 1
1475 002074' 001000 000300
1476 002075' 000200 000000 MWORD <CONT,S0A,AND,D=4,B=1> ; 2
1477 002076' 444000 400340
1478 002077' 000300 000000 MWORD <CONT,S0A,PLUS,D=0,A=0> ; 3
1479 002100' 400000 000340
1480 002101' 000400 000000 MWORD <CONT,S0Q,PLUS,D=2,B=1> ; 4
1481 002102' 202000 400340
1482 002103' 000500 000000 MWORD <CONT,S0A,AND,D=4,B=2> ; 5
1483 002104' 444001 000340
1484 002105' 000600 000000 MWORD <CONT,S0A,OR,D=0,A=1> ; 6
1485 002106' 430010 000340
1486 002107' 000700 000000 MWORD <CONT,S0Q,OR,D=2,B=2> ; 7
1487 002110' 232001 000340
1488 002111' 001000 000000 MWORD <CONT,S0A,AND,D=4,B=3> ; 10
1489 002112' 444001 400340
1490 002113' 001100 000000 MWORD <CONT,S0A,XOR,D=0,A=2> ; 11
1491 002114' 460020 000340
1492 002115' 001200 000000 MWORD <CONT,S0Q,XOR,D=2,B=3> ; 12
1493 002116' 262001 400340
1494 002117' 001300 000000 MWORD <CONT,S0A,AND,D=4,B=4> ; 13
1495 002120' 444002 000340
1496 002121' 001400 000000 MWORD <CONT,S0A,NAND,D=0,A=3> ; 14
1497 002122' 450030 000340
1498 002123' 001500 000000 MWORD <CONT,S0Q,NAND,D=2,B=4> ; 15
1499 002124' 252002 000340
1500 002125' 001600 000000 MWORD <CONT,S0A,AND,D=4,B=5> ; 16
1501 002126' 444002 400340
1502 002127' 001700 000000 MWORD <CONT,S0A,PLUS,D=0,A=4> ; 17
1503 002130' 400040 000340
1504 002131' 002000 000000 MWORD <CONT,S0Q,PLUS,D=2,B=5> ; 20
1505 002132' 202002 400340
1506 002133' 002100 000000 MWORD <CONT,S0A,AND,D=4,B=6> ; 21
1507 002134' 444003 000340
1508 002135' 002200 000000 MWORD <CONT,S0A,OR,D=0,A=5> ; 22
1509 002136' 430050 000340
1510 002137' 002300 000000 MWORD <CONT,S0Q,OR,D=2,B=6> ; 23
1511 002140' 232003 000340
1512 002141' 002400 000000 MWORD <CONT,S0A,AND,D=4,B=7> ; 24
1513 002142' 444003 400340
1514 002143' 002500 000000 MWORD <CONT,S0A,XOR,D=0,A=6> ; 25
1515 002144' 460060 000340
1516 002145' 002600 000000 MWORD <CONT,S0Q,XOR,D=2,B=7> ; 26
1517 002146' 262003 400340
1518 002147' 002700 000000 MWORD <CONT,S0A,AND,D=4,B=10> ; 27
1519 002150' 444004 000340
1520 002151' 003000 000000 MWORD <CONT,S0A,NAND,D=0,A=7> ; 30
1521 002152' 450070 000340
1522 002153' 003100 000000 MWORD <CONT,S0Q,NAND,D=2,B=10> ; 31
1523 002154' 252004 000340
.MAIN MACRO %53A(1152) 10:22 16-Oct-84 Page 19-1
DFPTA7 MAC 11-Oct-83 20:26 EBUS/MPROC 2901 Tests (Part 4) SEQ 1327
1524 002155' 003200 000000 MWORD <CONT,S0A,AND,D=4,B=11> ; 32
1525 002156' 444004 400340
1526 002157' 003300 000000 MWORD <CONT,S0A,PLUS,D=0,A=10> ; 33
1527 002160' 400100 000340
1528 002161' 003400 000000 MWORD <CONT,S0Q,PLUS,D=2,B=11> ; 34
1529 002162' 202004 400340
1530 002163' 003500 000000 MWORD <CONT,S0A,AND,D=4,B=12> ; 35
1531 002164' 444005 000340
1532 002165' 003600 000000 MWORD <CONT,S0A,OR,D=0,A=11> ; 36
1533 002166' 430110 000340
1534 002167' 003700 000000 MWORD <CONT,S0Q,OR,D=2,B=12> ; 37
1535 002170' 232005 000340
1536 002171' 004000 000000 MWORD <CONT,S0A,AND,D=4,B=13> ; 40
1537 002172' 444005 400340
1538 002173' 004100 000000 MWORD <CONT,S0A,XOR,D=0,A=12> ; 41
1539 002174' 460120 000340
1540 002175' 004200 000000 MWORD <CONT,S0Q,XOR,D=2,B=13> ; 42
1541 002176' 262005 400340
1542 002177' 004300 000000 MWORD <CONT,S0A,AND,D=4,B=14> ; 43
1543 002200' 444006 000340
1544 002201' 004400 000000 MWORD <CONT,S0A,NAND,D=0,A=13> ; 44
1545 002202' 450130 000340
1546 002203' 004500 000000 MWORD <CONT,S0Q,NAND,D=2,B=14> ; 45
1547 002204' 252006 000340
1548 002205' 004600 000000 MWORD <CONT,S0A,AND,D=4,B=15> ; 46
1549 002206' 444006 400340
1550 002207' 004700 000000 MWORD <CONT,S0A,PLUS,D=0,A=14> ; 47
1551 002210' 400140 000340
1552 002211' 005000 000000 MWORD <CONT,S0Q,PLUS,D=2,B=15> ; 50
1553 002212' 202006 400340
1554 002213' 005100 000000 MWORD <CONT,S0A,AND,D=4,B=16> ; 51
1555 002214' 444007 000340
1556 002215' 005200 000000 MWORD <CONT,S0A,OR,D=0,A=15> ; 52
1557 002216' 430150 000340
1558 002217' 005300 000000 MWORD <CONT,S0Q,OR,D=2,B=16> ; 53
1559 002220' 232007 000340
1560 002221' 005400 000000 MWORD <CONT,S0A,AND,D=4,B=17> ; 54
1561 002222' 444007 400340
1562 002223' 005500 000000 MWORD <CONT,S0A,XOR,D=0,A=16> ; 55
1563 002224' 460160 000340
1564 002225' 005600 000000 MWORD <CONT,S0Q,XOR,D=2,B=17> ; 56
1565 002226' 262007 400340
1566 002227' 005700 000000 MWORD <CONT,S0A,AND,D=4,B=0> ; 57
1567 002230' 444000 000340
1568 002231' 006000 000000 MWORD <CONT,S0A,NAND,D=0,A=17> ; 60
1569 002232' 450170 000340
1570 002233' 006100 000000 MWORD <CONT,S0Q,NAND,D=2,A=17,B=0> ; 61
1571 002234' 252170 000340
1572 002235' 006200 020000 MWORD <RPCT,J=2,D=1> ; 62
1573 002236' 001000 000220
1574
1575 002237' 006300 642004 MWORD <JMAP,J=64,S0A,A=0,OR,OENA,SELE,MGC=4> ; 63
1576 002240' 430000 005040
1577 002241' 006400 640000 MWORD <JMAP,J=64> ; 64
1578 002242' 000000 000040
.MAIN MACRO %53A(1152) 10:22 16-Oct-84 Page 19-2
DFPTA7 MAC 11-Oct-83 20:26 EBUS/MPROC 2901 Tests (Part 4) SEQ 1328
1579 002243' 777777 777777 -1
.MAIN MACRO %53A(1152) 10:22 16-Oct-84 Page 20
DFPTA7 MAC 11-Oct-83 20:26 EBUS/MPROC 2901 Tests (Part 4) SEQ 1329
1580
1581 ;#********************************************************************
1582 ;* TEST 40 - RAM Data Movement/Shifting Test
1583 ;
1584 ; Description: Verify that data can be successfully moved to and
1585 ; from various RAM locations at full speed while
1586 ; shifting left and right.
1587 ;
1588 ; Procedure: Clear Port
1589 ; Load microcode
1590 ;
1591 ; Set RAR to 0
1592 ; Execute JMAP - load data pattern into Reg 0
1593 ; Execute a sequence of instructions that moves
1594 ; the data from register to register while
1595 ; clearing other registers and while shifting
1596 ; left and right.
1597 ;
1598 ; When done, read the EBUF and verify that the
1599 ; data is correct (516000,,000000), which is
1600 ; 516000,,001234 left shifted 26 bits.
1601 ;
1602 ; Failure: ---
1603 ;#********************************************************************
1604
1605 ; Test data
1606
1607 002244' 254 00 0 00 002252' TSTA40: JRST TG40 ; go start test
1608 002245' 420402 000040 EBUS!ALU!NDMP!ZALU!40 ; test mask
1609 002246' 002314' 003564' T40M,,[ASCIZ ^RAM Data Movement/Shifting Test^]
1610 002247' 003416' 000000 [EXP MLAST!E23],,0
1611 002250' 000000 002467' TSTA41 ; failure test table
1612 002251' 777777 777777 -1 ; ...
1613
1614 ; Start test
1615
1616 002252' 201 00 0 00 000000' TG40: MOVEI Z7 ; get address of module start
1617 002253' 260 17 0 00 002026* GO TRACE ; handle trace output
1618 002254' 201 01 0 00 002314' MOVEI 1,T40M ; set up microcode address
1619 002255' 260 17 0 00 002030* GO TLOAD ; load/verify it
1620 002256' 263 17 0 00 000000 RTN ; failed - exit test
1621
1622 ; Initialization
1623
1624 002257' 400 15 0 00 000000 TL40: SETZ ERFLG, ; clear error flag
1625 002260' 260 17 0 00 002033* GO IPACLR ; clear port
.MAIN MACRO %53A(1152) 10:22 16-Oct-84 Page 21
DFPTA7 MAC 11-Oct-83 20:26 EBUS/MPROC 2901 Tests (Part 4) SEQ 1330
1626
1627 ; 1st segment of test (Segment A) - Start up port and wait till it stops
1628
1629 002261' 201 01 0 00 000012 TA40: MOVEI 1,^D10 ; maximum delay before timeout (msec)
1630 002262' 201 02 0 00 000000 MOVEI 2,0 ; error address
1631 002263' 201 03 0 00 000032 MOVEI 3,32 ; correct address
1632 002264' 400 04 0 00 000000 SETZ 4, ; starting address
1633 002265' 260 17 0 00 002040* GO AEXEC ; execute ALU type test
1634 002266' 255 00 0 00 000000 JFCL ; ignore error
1635 002267' 400 15 0 00 000000 SETZ ERFLG, ; clear error flag
1636 002270' 332 00 0 00 002043* SKIPE ALFLS ; started up ok?
1637 002271' 474 15 0 00 000000 SETO ERFLG, ; no - set error flag
1638 002272' 200 00 0 00 002064* MOVE ALEBF ; get EBUF data
1639 002273' 404 00 0 00 003514' AND [777400,,1777] ; mask out indeterminate bits
1640 002274' 312 00 0 00 003573' CAME [516000,,0] ; correct?
1641 002275' 474 15 0 00 000000 SETO ERFLG, ; no - set error flag
1642
1643 ; Handle error printouts and scope looping
1644
1645 002276' 027 00 0 00 002302' SCOPER MA40 ; print error message
1646 002277' 254 00 0 00 002257' JRST TL40 ; loop on error
1647 002300' 254 00 0 00 002301' JRST TX40 ; altmode exit
1648
1649 ; End of test
1650
1651 002301' 263 17 0 00 000000 TX40: RTN ; return
1652
1653 ; Error messages
1654
1655 002302' 140000 003574' MA40: MSG!TXNOT![ASCIZ ^2901 RAM Register data got destroyed somehow^]
1656 002303' 270000 002304' LAST!CALL!TXALL!MA40PN
1657
1658 002304' 200 01 0 00 002057* MA40PN: MOVE 1,SCOSW ; get switches
1659 002305' 603 01 0 00 000200 TLNE 1,TXTINH ; full printout?
1660 TMSGC <EBUF (C): 516000 000000
1661 002306' 037 00 0 00 003605' (A): >
1662 002307' 607 01 0 00 000200 TLNN 1,TXTINH ; full printout?
1663 TMSGC <EBUF (Correct): 516000 000000
1664 002310' 037 00 0 00 003615' (Actual): >
1665 002311' 200 00 0 00 002272* MOVE ALEBF
1666 002312' 037 13 0 00 000000 PNTHW
1667 002313' 263 17 0 00 000000 RTN
.MAIN MACRO %53A(1152) 10:22 16-Oct-84 Page 22
DFPTA7 MAC 11-Oct-83 20:26 EBUS/MPROC 2901 Tests (Part 4) SEQ 1331
1668
1669 ; Microcode:
1670
1671 002314' 000000 011234 T40M: MWORD <ADDR=0,JMAP,J=1,SD0,OR,D=2,SKCN,MGC=1234> ; 0
1672 002315' 732000 240040
1673 002316' 000100 310000 MWORD <LDCT,J=31,D=1> ; 1
1674 002317' 001000 000300
1675 002320' 000200 000000 MWORD <CONT,S0A,AND,D=4,B=1> ; 2
1676 002321' 444000 400340
1677 002322' 000300 000000 MWORD <CONT,S0B,PLUS,D=7,B=0> ; 3
1678 002323' 307000 000340
1679 002324' 000400 000000 MWORD <CONT,S0A,PLUS,D=5,A=0,B=1> ; 4
1680 002325' 405000 400340
1681 002326' 000500 000000 MWORD <CONT,S0A,AND,D=4,B=2> ; 5
1682 002327' 444001 000340
1683 002330' 000600 000000 MWORD <CONT,S0B,OR,D=7,B=1> ; 6
1684 002331' 337000 400340
1685 002332' 000700 000000 MWORD <CONT,S0A,OR,D=5,B=2> ; 7
1686 002333' 435001 000340
1687 002334' 001000 000000 MWORD <CONT,S0A,AND,D=4,B=3> ; 10
1688 002335' 444001 400340
1689 002336' 001100 000000 MWORD <CONT,S0B,XOR,D=7,B=2> ; 11
1690 002337' 367001 000340
1691 002340' 001200 000000 MWORD <CONT,S0A,XOR,D=5,B=3> ; 12
1692 002341' 465001 400340
1693 002342' 001300 000000 MWORD <CONT,S0A,AND,D=4,B=4> ; 13
1694 002343' 444002 000340
1695 002344' 001400 000000 MWORD <CONT,S0B,NAND,D=7,B=3> ; 14
1696 002345' 357001 400340
1697 002346' 001500 000000 MWORD <CONT,S0A,NAND,D=5,B=4> ; 15
1698 002347' 455002 000340
1699 002350' 001600 000000 MWORD <CONT,S0A,AND,D=4,B=5> ; 16
1700 002351' 444002 400340
1701 002352' 001700 000000 MWORD <CONT,S0B,PLUS,D=7,B=4> ; 17
1702 002353' 307002 000340
1703 002354' 002000 000000 MWORD <CONT,S0A,PLUS,D=5,B=5> ; 20
1704 002355' 405002 400340
1705 002356' 002100 000000 MWORD <CONT,S0A,AND,D=4,B=6> ; 21
1706 002357' 444003 000340
1707 002360' 002200 000000 MWORD <CONT,S0B,OR,D=7,B=5> ; 22
1708 002361' 337002 400340
1709 002362' 002300 000000 MWORD <CONT,S0A,OR,D=5,B=6> ; 23
1710 002363' 435003 000340
1711 002364' 002400 000000 MWORD <CONT,S0A,AND,D=4,B=7> ; 24
1712 002365' 444003 400340
1713 002366' 002500 000000 MWORD <CONT,S0B,XOR,D=7,B=6> ; 25
1714 002367' 367003 000340
1715 002370' 002600 000000 MWORD <CONT,S0A,XOR,D=5,B=7> ; 26
1716 002371' 465003 400340
1717 002372' 002700 000000 MWORD <CONT,S0A,AND,D=4,B=10> ; 27
1718 002373' 444004 000340
1719 002374' 003000 000000 MWORD <CONT,S0B,NAND,D=7,B=7> ; 30
1720 002375' 357003 400340
1721 002376' 003100 000000 MWORD <CONT,S0A,NAND,D=5,B=10> ; 31
1722 002377' 455004 000340
.MAIN MACRO %53A(1152) 10:22 16-Oct-84 Page 22-1
DFPTA7 MAC 11-Oct-83 20:26 EBUS/MPROC 2901 Tests (Part 4) SEQ 1332
1723 002400' 003200 000000 MWORD <CONT,S0A,AND,D=4,B=11> ; 32
1724 002401' 444004 400340
1725 002402' 003300 000000 MWORD <CONT,S0B,PLUS,D=7,B=10> ; 33
1726 002403' 307004 000340
1727 002404' 003400 000000 MWORD <CONT,S0A,PLUS,D=5,B=11> ; 34
1728 002405' 405004 400340
1729 002406' 003500 000000 MWORD <CONT,S0A,AND,D=4,B=12> ; 35
1730 002407' 444005 000340
1731 002410' 003600 000000 MWORD <CONT,S0B,OR,D=7,B=11> ; 36
1732 002411' 337004 400340
1733 002412' 003700 000000 MWORD <CONT,S0A,OR,D=5,B=12> ; 37
1734 002413' 435005 000340
1735 002414' 004000 000000 MWORD <CONT,S0A,AND,D=4,B=13> ; 40
1736 002415' 444005 400340
1737 002416' 004100 000000 MWORD <CONT,S0B,XOR,D=7,B=12> ; 41
1738 002417' 367005 000340
1739 002420' 004200 000000 MWORD <CONT,S0A,XOR,D=5,B=13> ; 42
1740 002421' 465005 400340
1741 002422' 004300 000000 MWORD <CONT,S0A,AND,D=4,B=14> ; 43
1742 002423' 444006 000340
1743 002424' 004400 000000 MWORD <CONT,S0B,NAND,D=7,B=13> ; 44
1744 002425' 357005 400340
1745 002426' 004500 000000 MWORD <CONT,S0A,NAND,D=5,B=14> ; 45
1746 002427' 455006 000340
1747 002430' 004600 000000 MWORD <CONT,S0A,AND,D=4,B=15> ; 46
1748 002431' 444006 400340
1749 002432' 004700 000000 MWORD <CONT,S0B,PLUS,D=7,B=14> ; 47
1750 002433' 307006 000340
1751 002434' 005000 000000 MWORD <CONT,S0A,PLUS,D=5,B=15> ; 50
1752 002435' 405006 400340
1753 002436' 005100 000000 MWORD <CONT,S0A,AND,D=4,B=16> ; 51
1754 002437' 444007 000340
1755 002440' 005200 000000 MWORD <CONT,S0B,OR,D=7,B=15> ; 52
1756 002441' 337006 400340
1757 002442' 005300 000000 MWORD <CONT,S0A,OR,D=5,B=16> ; 53
1758 002443' 435007 000340
1759 002444' 005400 000000 MWORD <CONT,S0A,AND,D=4,B=17> ; 54
1760 002445' 444007 400340
1761 002446' 005500 000000 MWORD <CONT,S0B,XOR,D=7,B=16> ; 55
1762 002447' 367007 000340
1763 002450' 005600 000000 MWORD <CONT,S0A,XOR,D=5,B=17> ; 56
1764 002451' 465007 400340
1765 002452' 005700 000000 MWORD <CONT,S0A,AND,D=4,B=0> ; 57
1766 002453' 444000 000340
1767 002454' 006000 000000 MWORD <CONT,S0B,NAND,D=7,B=17> ; 60
1768 002455' 357007 400340
1769 002456' 006100 000000 MWORD <CONT,S0A,NAND,D=5,A=17,B=0> ; 61
1770 002457' 455170 000340
1771 002460' 006200 020000 MWORD <RPCT,J=2,S0B,OR,B=0,D=7> ; 62
1772 002461' 337000 000220
1773
1774 002462' 006300 642004 MWORD <JMAP,J=64,S0A,A=0,OR,OENA,SELE,MGC=4> ; 63
1775 002463' 430000 005040
1776 002464' 006400 640000 MWORD <JMAP,J=64> ; 64
1777 002465' 000000 000040
.MAIN MACRO %53A(1152) 10:22 16-Oct-84 Page 22-2
DFPTA7 MAC 11-Oct-83 20:26 EBUS/MPROC 2901 Tests (Part 4) SEQ 1333
1778 002466' 777777 777777 -1
.MAIN MACRO %53A(1152) 10:22 16-Oct-84 Page 23
DFPTA7 MAC 11-Oct-83 20:26 EBUS/MPROC 2901 Tests (Part 4) SEQ 1334
1779
1780 ;#********************************************************************
1781 ;* TEST 41 - RAM/Q-Reg Data Movement/Shifting Test
1782 ;
1783 ; Description: Verify that data can be successfully moved to and
1784 ; from RAM location and Q-Register at full speed
1785 ; while shifting left and right.
1786 ;
1787 ; Procedure: Clear Port
1788 ; Load microcode
1789 ;
1790 ; Set RAR to 0
1791 ; Execute JMAP - load data pattern into Reg 0
1792 ; Execute a sequence of instructions that moves
1793 ; the data from register to register while
1794 ; clearing other registers and while shifting
1795 ; left and right.
1796 ;
1797 ; When done, read the EBUF and verify that the
1798 ; data is correct (516000,,000000), which is
1799 ; 516000,,001234 left shifted 26 bits.
1800 ;
1801 ; Failure: ---
1802 ;#********************************************************************
1803
1804 ; Test data
1805
1806 002467' 254 00 0 00 002474' TSTA41: JRST TG41 ; go start test
1807 002470' 420402 000041 EBUS!ALU!NDMP!ZALU!41 ; test mask
1808 002471' 002536' 003630' T41M,,[ASCIZ ^RAM/Q-Reg Data Movement/Shifting Test^]
1809 002472' 003416' 000000 [EXP MLAST!E23],,0
1810 002473' 777777 777777 -1 ; failure test table
1811
1812 ; Start test
1813
1814 002474' 201 00 0 00 000000' TG41: MOVEI Z7 ; get address of module start
1815 002475' 260 17 0 00 002253* GO TRACE ; handle trace output
1816 002476' 201 01 0 00 002536' MOVEI 1,T41M ; set up microcode address
1817 002477' 260 17 0 00 002255* GO TLOAD ; load/verify it
1818 002500' 263 17 0 00 000000 RTN ; failed - exit test
1819
1820 ; Initialization
1821
1822 002501' 400 15 0 00 000000 TL41: SETZ ERFLG, ; clear error flag
1823 002502' 260 17 0 00 002260* GO IPACLR ; clear port
.MAIN MACRO %53A(1152) 10:22 16-Oct-84 Page 24
DFPTA7 MAC 11-Oct-83 20:26 EBUS/MPROC 2901 Tests (Part 4) SEQ 1335
1824
1825 ; 1st segment of test (Segment A) - Start up port and wait till it stops
1826
1827 002503' 201 01 0 00 000012 TA41: MOVEI 1,^D10 ; maximum delay before timeout (msec)
1828 002504' 201 02 0 00 000000 MOVEI 2,0 ; error address
1829 002505' 201 03 0 00 000032 MOVEI 3,32 ; correct address
1830 002506' 400 04 0 00 000000 SETZ 4, ; starting address
1831 002507' 260 17 0 00 002265* GO AEXEC ; execute ALU type test
1832 002510' 255 00 0 00 000000 JFCL ; ignore error
1833 002511' 400 15 0 00 000000 SETZ ERFLG, ; clear error flag
1834 002512' 332 00 0 00 002270* SKIPE ALFLS ; started up ok?
1835 002513' 474 15 0 00 000000 SETO ERFLG, ; no - set error flag
1836 002514' 200 00 0 00 002311* MOVE ALEBF ; get EBUF data
1837 002515' 404 00 0 00 003514' AND [777400,,1777] ; mask out indeterminate bits
1838 002516' 312 00 0 00 003573' CAME [516000,,0] ; correct?
1839 002517' 474 15 0 00 000000 SETO ERFLG, ; no - set error flag
1840
1841 ; Handle error printouts and scope looping
1842
1843 002520' 027 00 0 00 002524' SCOPER MA41 ; print error message
1844 002521' 254 00 0 00 002501' JRST TL41 ; loop on error
1845 002522' 254 00 0 00 002523' JRST TX41 ; altmode exit
1846
1847 ; End of test
1848
1849 002523' 263 17 0 00 000000 TX41: RTN ; return
1850
1851 ; Error messages
1852
1853 002524' 160000 003640' MA41: MSG!TXALL![ASCIZ ^2901 RAM/Q-Register data got destroyed somehow^]
1854 002525' 270000 002526' LAST!CALL!TXALL!MA41PN
1855
1856 002526' 200 01 0 00 002304* MA41PN: MOVE 1,SCOSW ; get switches
1857 002527' 603 01 0 00 000200 TLNE 1,TXTINH ; full printout?
1858 TMSGC <EBUF (C): 516000 000000
1859 002530' 037 00 0 00 003605' (A): >
1860 002531' 607 01 0 00 000200 TLNN 1,TXTINH ; full printout?
1861 TMSGC <EBUF (Correct): 516000 000000
1862 002532' 037 00 0 00 003615' (Actual): >
1863 002533' 200 00 0 00 002514* MOVE ALEBF
1864 002534' 037 13 0 00 000000 PNTHW
1865 002535' 263 17 0 00 000000 RTN
.MAIN MACRO %53A(1152) 10:22 16-Oct-84 Page 25
DFPTA7 MAC 11-Oct-83 20:26 EBUS/MPROC 2901 Tests (Part 4) SEQ 1336
1866
1867 ; Microcode:
1868
1869 002536' 000000 011234 T41M: MWORD <ADDR=0,JMAP,J=1,SD0,OR,D=2,SKCN,MGC=1234> ; 0
1870 002537' 732000 240040
1871 002540' 000100 310000 MWORD <LDCT,J=31,D=1> ; 1
1872 002541' 001000 000300
1873 002542' 000200 000000 MWORD <CONT,S0A,AND,D=4,B=1> ; 2
1874 002543' 444000 400340
1875 002544' 000300 000000 MWORD <CONT,S0A,PLUS,D=6,A=0,B=1> ; 3
1876 002545' 406000 400340
1877 002546' 000400 000000 MWORD <CONT,S0Q,PLUS,D=5,B=1> ; 4
1878 002547' 205000 400340
1879 002550' 000500 000000 MWORD <CONT,S0A,AND,D=4,B=2> ; 5
1880 002551' 444001 000340
1881 002552' 000600 000000 MWORD <CONT,S0A,OR,D=6,A=1,B=1> ; 6
1882 002553' 436010 400340
1883 002554' 000700 000000 MWORD <CONT,S0Q,OR,D=5,B=2> ; 7
1884 002555' 235001 000340
1885 002556' 001000 000000 MWORD <CONT,S0A,AND,D=4,B=3> ; 10
1886 002557' 444001 400340
1887 002560' 001100 000000 MWORD <CONT,S0A,XOR,D=6,A=2,B=1> ; 11
1888 002561' 466020 400340
1889 002562' 001200 000000 MWORD <CONT,S0Q,XOR,D=5,B=3> ; 12
1890 002563' 265001 400340
1891 002564' 001300 000000 MWORD <CONT,S0A,AND,D=4,B=4> ; 13
1892 002565' 444002 000340
1893 002566' 001400 000000 MWORD <CONT,S0A,NAND,D=6,A=3,B=1> ; 14
1894 002567' 456030 400340
1895 002570' 001500 000000 MWORD <CONT,S0Q,NAND,D=5,B=4> ; 15
1896 002571' 255002 000340
1897 002572' 001600 000000 MWORD <CONT,S0A,AND,D=4,B=5> ; 16
1898 002573' 444002 400340
1899 002574' 001700 000000 MWORD <CONT,S0A,PLUS,D=6,A=4,B=1> ; 17
1900 002575' 406040 400340
1901 002576' 002000 000000 MWORD <CONT,S0Q,PLUS,D=5,B=5> ; 20
1902 002577' 205002 400340
1903 002600' 002100 000000 MWORD <CONT,S0A,AND,D=4,B=6> ; 21
1904 002601' 444003 000340
1905 002602' 002200 000000 MWORD <CONT,S0A,OR,D=6,A=5,B=1> ; 22
1906 002603' 436050 400340
1907 002604' 002300 000000 MWORD <CONT,S0Q,OR,D=5,B=6> ; 23
1908 002605' 235003 000340
1909 002606' 002400 000000 MWORD <CONT,S0A,AND,D=4,B=7> ; 24
1910 002607' 444003 400340
1911 002610' 002500 000000 MWORD <CONT,S0A,XOR,D=6,A=6,B=1> ; 25
1912 002611' 466060 400340
1913 002612' 002600 000000 MWORD <CONT,S0Q,XOR,D=5,B=7> ; 26
1914 002613' 265003 400340
1915 002614' 002700 000000 MWORD <CONT,S0A,AND,D=4,B=10> ; 27
1916 002615' 444004 000340
1917 002616' 003000 000000 MWORD <CONT,S0A,NAND,D=6,A=7,B=1> ; 30
1918 002617' 456070 400340
1919 002620' 003100 000000 MWORD <CONT,S0Q,NAND,D=5,B=10> ; 31
1920 002621' 255004 000340
.MAIN MACRO %53A(1152) 10:22 16-Oct-84 Page 25-1
DFPTA7 MAC 11-Oct-83 20:26 EBUS/MPROC 2901 Tests (Part 4) SEQ 1337
1921 002622' 003200 000000 MWORD <CONT,S0A,AND,D=4,B=11> ; 32
1922 002623' 444004 400340
1923 002624' 003300 000000 MWORD <CONT,S0A,PLUS,D=6,A=10,B=1> ; 33
1924 002625' 406100 400340
1925 002626' 003400 000000 MWORD <CONT,S0Q,PLUS,D=5,B=11> ; 34
1926 002627' 205004 400340
1927 002630' 003500 000000 MWORD <CONT,S0A,AND,D=4,B=12> ; 35
1928 002631' 444005 000340
1929 002632' 003600 000000 MWORD <CONT,S0A,OR,D=6,A=11,B=1> ; 36
1930 002633' 436110 400340
1931 002634' 003700 000000 MWORD <CONT,S0Q,OR,D=5,B=12> ; 37
1932 002635' 235005 000340
1933 002636' 004000 000000 MWORD <CONT,S0A,AND,D=4,B=13> ; 40
1934 002637' 444005 400340
1935 002640' 004100 000000 MWORD <CONT,S0A,XOR,D=6,A=12,B=1> ; 41
1936 002641' 466120 400340
1937 002642' 004200 000000 MWORD <CONT,S0Q,XOR,D=5,B=13> ; 42
1938 002643' 265005 400340
1939 002644' 004300 000000 MWORD <CONT,S0A,AND,D=4,B=14> ; 43
1940 002645' 444006 000340
1941 002646' 004400 000000 MWORD <CONT,S0A,NAND,D=6,A=13,B=1> ; 44
1942 002647' 456130 400340
1943 002650' 004500 000000 MWORD <CONT,S0Q,NAND,D=5,B=14> ; 45
1944 002651' 255006 000340
1945 002652' 004600 000000 MWORD <CONT,S0A,AND,D=4,B=15> ; 46
1946 002653' 444006 400340
1947 002654' 004700 000000 MWORD <CONT,S0A,PLUS,D=6,A=14,B=1> ; 47
1948 002655' 406140 400340
1949 002656' 005000 000000 MWORD <CONT,S0Q,PLUS,D=5,B=15> ; 50
1950 002657' 205006 400340
1951 002660' 005100 000000 MWORD <CONT,S0A,AND,D=4,B=16> ; 51
1952 002661' 444007 000340
1953 002662' 005200 000000 MWORD <CONT,S0A,OR,D=6,A=15,B=1> ; 52
1954 002663' 436150 400340
1955 002664' 005300 000000 MWORD <CONT,S0Q,OR,D=5,B=16> ; 53
1956 002665' 235007 000340
1957 002666' 005400 000000 MWORD <CONT,S0A,AND,D=4,B=17> ; 54
1958 002667' 444007 400340
1959 002670' 005500 000000 MWORD <CONT,S0A,XOR,D=6,A=16,B=1> ; 55
1960 002671' 466160 400340
1961 002672' 005600 000000 MWORD <CONT,S0Q,XOR,D=5,B=17> ; 56
1962 002673' 265007 400340
1963 002674' 005700 000000 MWORD <CONT,S0A,AND,D=4,B=1> ; 57
1964 002675' 444000 400340
1965 002676' 006000 000000 MWORD <CONT,S0A,NAND,D=6,A=17,B=1> ; 60
1966 002677' 456170 400340
1967 002700' 006100 000000 MWORD <CONT,S0Q,NAND,D=5,A=17,B=1> ; 61
1968 002701' 255170 400340
1969 002702' 006200 020000 MWORD <RPCT,J=2,S0B,OR,B=0,D=7> ; 62
1970 002703' 337000 000220
1971
1972 002704' 006300 632004 MWORD <JMAP,J=63,S0A,A=0,OR,D=1,OENA,SELE,MGC=4> ; 63
1973 002705' 431000 005040
1974 002706' 777777 777777 -1
.MAIN MACRO %53A(1152) 10:22 16-Oct-84 Page 26
DFPTA7 MAC 11-Oct-83 20:26 EBUS/MPROC 2901 Tests (Part 4) SEQ 1338
1975
1976 ;#********************************************************************
1977 ;* TEST 42 - 2901 Register / Constant Mux Test
1978 ;
1979 ; Description: Verify the AND function of the 2901 registers,
1980 ; anding them with data on the direct inputs (the
1981 ; Constant MUX).
1982 ;
1983 ; Procedure: Clear Port
1984 ; Load microcode
1985 ;
1986 ; Write 0's to register x
1987 ; Write 1's to register y
1988 ; And a constant of 1's with register y and place in
1989 ; register x.
1990 ; Verify that register x now contains all zero's.
1991 ;
1992 ; Repeat with various register combinations.
1993 ;
1994 ; Failure: ---
1995 ;#********************************************************************
1996
1997 ; Test data
1998
1999 002707' 254 00 0 00 002714' TSTA42: JRST TG42 ; go start test
2000 002710' 420402 000042 EBUS!ALU!NDMP!ZALU!42 ; test mask
2001 002711' 002737' 003652' T42M,,[ASCIZ ^2901 Register / Constant Mux Test^]
2002 002712' 003416' 000000 [EXP MLAST!E23],,0
2003 002713' 777777 777777 -1 ; failure test table
2004
2005 ; Start test
2006
2007 002714' 201 00 0 00 000000' TG42: MOVEI Z7 ; get address of module start
2008 002715' 260 17 0 00 002475* GO TRACE ; handle trace output
2009 002716' 201 01 0 00 002737' MOVEI 1,T42M ; set up microcode address
2010 002717' 260 17 0 00 002477* GO TLOAD ; load/verify it
2011 002720' 263 17 0 00 000000 RTN ; failed - exit test
2012
2013 ; Initialization
2014
2015 002721' 400 15 0 00 000000 TL42: SETZ ERFLG, ; clear error flag
2016 002722' 260 17 0 00 002502* GO IPACLR ; clear port
.MAIN MACRO %53A(1152) 10:22 16-Oct-84 Page 27
DFPTA7 MAC 11-Oct-83 20:26 EBUS/MPROC 2901 Tests (Part 4) SEQ 1339
2017
2018 ; 1st segment of test (Segment A) - Start up port and wait till it stops
2019
2020 002723' 201 01 0 00 000012 TA42: MOVEI 1,^D10 ; maximum delay before timeout (msec)
2021 002724' 201 02 0 00 005000 MOVEI 2,5000 ; error address
2022 002725' 201 03 0 00 004000 MOVEI 3,4000 ; correct address
2023 002726' 201 04 0 00 000001 MOVEI 4,1 ; starting address
2024 002727' 260 17 0 00 002507* GO AEXEC ; execute ALU type test
2025 002730' 474 15 0 00 000000 SETO ERFLG, ; error occurred
2026
2027 ; Handle error printouts and scope looping
2028
2029 002731' 027 00 0 00 002735' SCOPER MA42 ; print error message
2030 002732' 254 00 0 00 002721' JRST TL42 ; loop on error
2031 002733' 254 00 0 00 002734' JRST TX42 ; altmode exit
2032
2033 ; End of test
2034
2035 002734' 263 17 0 00 000000 TX42: RTN ; return
2036
2037 ; Error message - Microcode did not stop in the right place
2038
2039 002735' 160000 003661' MA42: MSG!TXALL![ASCIZ ^2901 function using Constant MUX failed^]
2040 002736' 000000000000# LAST!CALL!TXALL!AAPNT
2041
2042 ; Microcode:
2043
2044 002737' 000001 000000 T42M: MWORD <ADDR=0,JMAP,J=100> ; 0
2045 002740' 000000 000040
2046 002741' 000100 000000 MWORD <JZ,S0A,AND,A=1,B=1,D=2> ; 1
2047 002742' 442010 400000
2048
2049 002743' 010001 010000 MWORD <ADDR=100,JMAP,J=101,S0A,AND,A=0,B=0,D=2> ; 100
2050 002744' 442000 000040
2051 002745' 010100 000000 MWORD <CONT,S0A,XNOR,A=0,B=1,D=2> ; 101
2052 002746' 472000 400340
2053 002747' 010200 001777 MWORD <CONT,MGC=1777,SKCN,SDA,AND,A=0,B=1,D=3> ; 102
2054 002750' 543000 640340
2055 002751' 010301 050000 MWORD <CJP,J=105,S0A,OR,A=1,CENA,CCFZ> ; 103
2056 002752' 430410 020060
2057 002753' 010450 000000 MWORD <JMAP,J=5000> ; 104
2058 002754' 000000 000040
2059
2060 002755' 010500 000000 MWORD <CONT,S0A,XNOR,A=0,B=2,D=2> ; 105
2061 002756' 472001 000340
2062 002757' 010600 001777 MWORD <CONT,MGC=1777,SKCN,SDA,AND,A=0,B=2,D=3> ; 106
2063 002760' 543001 240340
2064 002761' 010701 110000 MWORD <CJP,J=111,S0A,OR,A=2,CENA,CCFZ> ; 107
2065 002762' 430420 020060
2066 002763' 011050 000000 MWORD <JMAP,J=5000> ; 110
2067 002764' 000000 000040
2068
2069 002765' 011100 000000 MWORD <CONT,S0A,XNOR,A=0,B=3,D=2> ; 111
2070 002766' 472001 400340
2071 002767' 011200 001777 MWORD <CONT,MGC=1777,SKCN,SDA,AND,A=0,B=3,D=3> ; 112
.MAIN MACRO %53A(1152) 10:22 16-Oct-84 Page 27-1
DFPTA7 MAC 11-Oct-83 20:26 EBUS/MPROC 2901 Tests (Part 4) SEQ 1340
2072 002770' 543001 640340
2073 002771' 011301 150000 MWORD <CJP,J=115,S0A,OR,A=3,CENA,CCFZ> ; 113
2074 002772' 430430 020060
2075 002773' 011450 000000 MWORD <JMAP,J=5000> ; 114
2076 002774' 000000 000040
2077
2078 002775' 011500 000000 MWORD <CONT,S0A,XNOR,A=0,B=4,D=2> ; 115
2079 002776' 472002 000340
2080 002777' 011600 001777 MWORD <CONT,MGC=1777,SKCN,SDA,AND,A=0,B=4,D=3> ; 116
2081 003000' 543002 240340
2082 003001' 011701 210000 MWORD <CJP,J=121,S0A,OR,A=4,CENA,CCFZ> ; 117
2083 003002' 430440 020060
2084 003003' 012050 000000 MWORD <JMAP,J=5000> ; 120
2085 003004' 000000 000040
2086
2087 003005' 012100 000000 MWORD <CONT,S0A,XNOR,A=0,B=5,D=2> ; 121
2088 003006' 472002 400340
2089 003007' 012200 001777 MWORD <CONT,MGC=1777,SKCN,SDA,AND,A=0,B=5,D=3> ; 122
2090 003010' 543002 640340
2091 003011' 012301 250000 MWORD <CJP,J=125,S0A,OR,A=5,CENA,CCFZ> ; 123
2092 003012' 430450 020060
2093 003013' 012450 000000 MWORD <JMAP,J=5000> ; 124
2094 003014' 000000 000040
2095
2096 003015' 012500 000000 MWORD <CONT,S0A,XNOR,A=0,B=6,D=2> ; 125
2097 003016' 472003 000340
2098 003017' 012600 001777 MWORD <CONT,MGC=1777,SKCN,SDA,AND,A=0,B=6,D=3> ; 126
2099 003020' 543003 240340
2100 003021' 012701 310000 MWORD <CJP,J=131,S0A,OR,A=6,CENA,CCFZ> ; 127
2101 003022' 430460 020060
2102 003023' 013050 000000 MWORD <JMAP,J=5000> ; 130
2103 003024' 000000 000040
2104
2105 003025' 013100 000000 MWORD <CONT,S0A,XNOR,A=0,B=7,D=2> ; 131
2106 003026' 472003 400340
2107 003027' 013200 001777 MWORD <CONT,MGC=1777,SKCN,SDA,AND,A=0,B=7,D=3> ; 132
2108 003030' 543003 640340
2109 003031' 013301 350000 MWORD <CJP,J=135,S0A,OR,A=7,CENA,CCFZ> ; 133
2110 003032' 430470 020060
2111 003033' 013450 000000 MWORD <JMAP,J=5000> ; 134
2112 003034' 000000 000040
2113
2114 003035' 013500 000000 MWORD <CONT,S0A,XNOR,A=0,B=10,D=2> ; 135
2115 003036' 472004 000340
2116 003037' 013600 001777 MWORD <CONT,MGC=1777,SKCN,SDA,AND,A=0,B=10,D=3> ; 136
2117 003040' 543004 240340
2118 003041' 013701 410000 MWORD <CJP,J=141,S0A,OR,A=10,CENA,CCFZ> ; 137
2119 003042' 430500 020060
2120 003043' 014050 000000 MWORD <JMAP,J=5000> ; 140
2121 003044' 000000 000040
2122
2123 003045' 014100 000000 MWORD <CONT,S0A,XNOR,A=0,B=11,D=2> ; 141
2124 003046' 472004 400340
2125 003047' 014200 001777 MWORD <CONT,MGC=1777,SKCN,SDA,AND,A=0,B=11,D=3> ; 142
2126 003050' 543004 640340
.MAIN MACRO %53A(1152) 10:22 16-Oct-84 Page 27-2
DFPTA7 MAC 11-Oct-83 20:26 EBUS/MPROC 2901 Tests (Part 4) SEQ 1341
2127 003051' 014301 450000 MWORD <CJP,J=145,S0A,OR,A=11,CENA,CCFZ> ; 143
2128 003052' 430510 020060
2129 003053' 014450 000000 MWORD <JMAP,J=5000> ; 144
2130 003054' 000000 000040
2131
2132 003055' 014500 000000 MWORD <CONT,S0A,XNOR,A=0,B=12,D=2> ; 145
2133 003056' 472005 000340
2134 003057' 014600 001777 MWORD <CONT,MGC=1777,SKCN,SDA,AND,A=0,B=12,D=3> ; 146
2135 003060' 543005 240340
2136 003061' 014701 510000 MWORD <CJP,J=151,S0A,OR,A=12,CENA,CCFZ> ; 147
2137 003062' 430520 020060
2138 003063' 015050 000000 MWORD <JMAP,J=5000> ; 150
2139 003064' 000000 000040
2140
2141 003065' 015100 000000 MWORD <CONT,S0A,XNOR,A=0,B=13,D=2> ; 151
2142 003066' 472005 400340
2143 003067' 015200 001777 MWORD <CONT,MGC=1777,SKCN,SDA,AND,A=0,B=13,D=3> ; 152
2144 003070' 543005 640340
2145 003071' 015301 550000 MWORD <CJP,J=155,S0A,OR,A=13,CENA,CCFZ> ; 153
2146 003072' 430530 020060
2147 003073' 015450 000000 MWORD <JMAP,J=5000> ; 154
2148 003074' 000000 000040
2149
2150 003075' 015500 000000 MWORD <CONT,S0A,XNOR,A=0,B=14,D=2> ; 155
2151 003076' 472006 000340
2152 003077' 015600 001777 MWORD <CONT,MGC=1777,SKCN,SDA,AND,A=0,B=14,D=3> ; 156
2153 003100' 543006 240340
2154 003101' 015701 610000 MWORD <CJP,J=161,S0A,OR,A=14,CENA,CCFZ> ; 157
2155 003102' 430540 020060
2156 003103' 016050 000000 MWORD <JMAP,J=5000> ; 160
2157 003104' 000000 000040
2158
2159 003105' 016100 000000 MWORD <CONT,S0A,XNOR,A=0,B=15,D=2> ; 161
2160 003106' 472006 400340
2161 003107' 016200 001777 MWORD <CONT,MGC=1777,SKCN,SDA,AND,A=0,B=15,D=3> ; 162
2162 003110' 543006 640340
2163 003111' 016301 650000 MWORD <CJP,J=165,S0A,OR,A=15,CENA,CCFZ> ; 163
2164 003112' 430550 020060
2165 003113' 016450 000000 MWORD <JMAP,J=5000> ; 164
2166 003114' 000000 000040
2167
2168 003115' 016500 000000 MWORD <CONT,S0A,XNOR,A=0,B=16,D=2> ; 165
2169 003116' 472007 000340
2170 003117' 016600 001777 MWORD <CONT,MGC=1777,SKCN,SDA,AND,A=0,B=16,D=3> ; 166
2171 003120' 543007 240340
2172 003121' 016701 710000 MWORD <CJP,J=171,S0A,OR,A=16,CENA,CCFZ> ; 167
2173 003122' 430560 020060
2174 003123' 017050 000000 MWORD <JMAP,J=5000> ; 170
2175 003124' 000000 000040
2176
2177 003125' 017100 000000 MWORD <CONT,S0A,XNOR,A=0,B=17,D=2> ; 171
2178 003126' 472007 400340
2179 003127' 017200 001777 MWORD <CONT,MGC=1777,SKCN,SDA,AND,A=0,B=17,D=3> ; 172
2180 003130' 543007 640340
2181 003131' 017301 750000 MWORD <CJP,J=175,S0A,OR,A=17,CENA,CCFZ> ; 173
.MAIN MACRO %53A(1152) 10:22 16-Oct-84 Page 27-3
DFPTA7 MAC 11-Oct-83 20:26 EBUS/MPROC 2901 Tests (Part 4) SEQ 1342
2182 003132' 430570 020060
2183 003133' 017450 000000 MWORD <JMAP,J=5000> ; 174
2184 003134' 000000 000040
2185
2186 003135' 017500 000000 MWORD <CONT,S0A,XNOR,A=0,B=0,D=2> ; 175
2187 003136' 472000 000340
2188 003137' 017600 001777 MWORD <CONT,MGC=1777,SKCN,SDA,AND,A=17,B=0,D=3> ; 176
2189 003140' 543170 240340
2190 003141' 017703 000000 MWORD <CJP,J=300,S0A,OR,A=0,CENA,CCFZ> ; 177
2191 003142' 430400 020060
2192 003143' 020050 000000 MWORD <JMAP,J=5000> ; 200
2193 003144' 000000 000040
2194
2195 003145' 030000 000000 MWORD <ADDR=300,CONT,S0A,AND,D=2,A=16,B=16> ; 300
2196 003146' 442167 000340
2197 003147' 030100 000000 MWORD <CONT,S0A,XNOR,A=16,B=4,D=2> ; 301
2198 003150' 472162 000340
2199 003151' 030200 001777 MWORD <CONT,MGC=1777,SKCN,SDA,AND,A=16,B=4,D=3> ; 302
2200 003152' 543162 240340
2201 003153' 030303 050000 MWORD <CJP,J=305,S0A,OR,A=4,CENA,CCFZ> ; 303
2202 003154' 430440 020060
2203 003155' 030450 000000 MWORD <JMAP,J=5000> ; 304
2204 003156' 000000 000040
2205
2206 003157' 030500 000000 MWORD <CONT,S0A,AND,A=15,B=15,D=2> ; 305
2207 003160' 442156 400340
2208 003161' 030600 000000 MWORD <CONT,S0A,XNOR,A=15,B=4,D=2> ; 306
2209 003162' 472152 000340
2210 003163' 030700 001777 MWORD <CONT,MGC=1777,SKCN,SDA,AND,A=15,B=4,D=3> ; 307
2211 003164' 543152 240340
2212 003165' 031003 120000 MWORD <CJP,J=312,S0A,OR,A=4,CENA,CCFZ> ; 310
2213 003166' 430440 020060
2214 003167' 031150 000000 MWORD <JMAP,J=5000> ; 311
2215 003170' 000000 000040
2216
2217 003171' 031200 000000 MWORD <CONT,S0A,AND,A=14,B=14,D=2> ; 312
2218 003172' 442146 000340
2219 003173' 031300 000000 MWORD <CONT,S0A,XNOR,A=14,B=4,D=2> ; 313
2220 003174' 472142 000340
2221 003175' 031400 001777 MWORD <CONT,MGC=1777,SKCN,SDA,AND,A=14,B=4,D=3> ; 314
2222 003176' 543142 240340
2223 003177' 031503 170000 MWORD <CJP,J=317,S0A,OR,A=4,CENA,CCFZ> ; 315
2224 003200' 430440 020060
2225 003201' 031650 000000 MWORD <JMAP,J=5000> ; 316
2226 003202' 000000 000040
2227
2228 003203' 031700 000000 MWORD <CONT,S0A,AND,A=13,B=13,D=2> ; 317
2229 003204' 442135 400340
2230 003205' 032000 000000 MWORD <CONT,S0A,XNOR,A=13,B=4,D=2> ; 320
2231 003206' 472132 000340
2232 003207' 032100 001777 MWORD <CONT,MGC=1777,SKCN,SDA,AND,A=13,B=4,D=3> ; 321
2233 003210' 543132 240340
2234 003211' 032203 240000 MWORD <CJP,J=324,S0A,OR,A=4,CENA,CCFZ> ; 322
2235 003212' 430440 020060
2236 003213' 032350 000000 MWORD <JMAP,J=5000> ; 323
.MAIN MACRO %53A(1152) 10:22 16-Oct-84 Page 27-4
DFPTA7 MAC 11-Oct-83 20:26 EBUS/MPROC 2901 Tests (Part 4) SEQ 1343
2237 003214' 000000 000040
2238
2239 003215' 032400 000000 MWORD <CONT,S0A,AND,A=12,B=12,D=2> ; 324
2240 003216' 442125 000340
2241 003217' 032500 000000 MWORD <CONT,S0A,XNOR,A=12,B=4,D=2> ; 325
2242 003220' 472122 000340
2243 003221' 032600 001777 MWORD <CONT,MGC=1777,SKCN,SDA,AND,A=12,B=4,D=3> ; 326
2244 003222' 543122 240340
2245 003223' 032703 310000 MWORD <CJP,J=331,S0A,OR,A=4,CENA,CCFZ> ; 327
2246 003224' 430440 020060
2247 003225' 033050 000000 MWORD <JMAP,J=5000> ; 330
2248 003226' 000000 000040
2249
2250 003227' 033100 000000 MWORD <CONT,S0A,AND,A=11,B=11,D=2> ; 331
2251 003230' 442114 400340
2252 003231' 033200 000000 MWORD <CONT,S0A,XNOR,A=11,B=4,D=2> ; 332
2253 003232' 472112 000340
2254 003233' 033300 001777 MWORD <CONT,MGC=1777,SKCN,SDA,AND,A=11,B=4,D=3> ; 333
2255 003234' 543112 240340
2256 003235' 033403 360000 MWORD <CJP,J=336,S0A,OR,A=4,CENA,CCFZ> ; 334
2257 003236' 430440 020060
2258 003237' 033550 000000 MWORD <JMAP,J=5000> ; 335
2259 003240' 000000 000040
2260
2261 003241' 033600 000000 MWORD <CONT,S0A,AND,A=10,B=10,D=2> ; 336
2262 003242' 442104 000340
2263 003243' 033700 000000 MWORD <CONT,S0A,XNOR,A=10,B=4,D=2> ; 337
2264 003244' 472102 000340
2265 003245' 034000 001777 MWORD <CONT,MGC=1777,SKCN,SDA,AND,A=10,B=4,D=3> ; 340
2266 003246' 543102 240340
2267 003247' 034103 430000 MWORD <CJP,J=343,S0A,OR,A=4,CENA,CCFZ> ; 341
2268 003250' 430440 020060
2269 003251' 034250 000000 MWORD <JMAP,J=5000> ; 342
2270 003252' 000000 000040
2271
2272 003253' 034300 000000 MWORD <CONT,S0A,AND,A=7,B=7,D=2> ; 343
2273 003254' 442073 400340
2274 003255' 034400 000000 MWORD <CONT,S0A,XNOR,A=7,B=4,D=2> ; 344
2275 003256' 472072 000340
2276 003257' 034500 001777 MWORD <CONT,MGC=1777,SKCN,SDA,AND,A=7,B=4,D=3> ; 345
2277 003260' 543072 240340
2278 003261' 034603 500000 MWORD <CJP,J=350,S0A,OR,A=4,CENA,CCFZ> ; 346
2279 003262' 430440 020060
2280 003263' 034750 000000 MWORD <JMAP,J=5000> ; 347
2281 003264' 000000 000040
2282
2283 003265' 035000 000000 MWORD <CONT,S0A,AND,A=6,B=6,D=2> ; 350
2284 003266' 442063 000340
2285 003267' 035100 000000 MWORD <CONT,S0A,XNOR,A=6,B=4,D=2> ; 351
2286 003270' 472062 000340
2287 003271' 035200 001777 MWORD <CONT,MGC=1777,SKCN,SDA,AND,A=6,B=4,D=3> ; 352
2288 003272' 543062 240340
2289 003273' 035303 550000 MWORD <CJP,J=355,S0A,OR,A=4,CENA,CCFZ> ; 353
2290 003274' 430440 020060
2291 003275' 035450 000000 MWORD <JMAP,J=5000> ; 354
.MAIN MACRO %53A(1152) 10:22 16-Oct-84 Page 27-5
DFPTA7 MAC 11-Oct-83 20:26 EBUS/MPROC 2901 Tests (Part 4) SEQ 1344
2292 003276' 000000 000040
2293
2294 003277' 035500 000000 MWORD <CONT,S0A,AND,A=5,B=5,D=2> ; 355
2295 003300' 442052 400340
2296 003301' 035600 000000 MWORD <CONT,S0A,XNOR,A=5,B=4,D=2> ; 356
2297 003302' 472052 000340
2298 003303' 035700 001777 MWORD <CONT,MGC=1777,SKCN,SDA,AND,A=5,B=4,D=3> ; 357
2299 003304' 543052 240340
2300 003305' 036003 620000 MWORD <CJP,J=362,S0A,OR,A=4,CENA,CCFZ> ; 360
2301 003306' 430440 020060
2302 003307' 036150 000000 MWORD <JMAP,J=5000> ; 361
2303 003310' 000000 000040
2304
2305 003311' 036200 000000 MWORD <CONT,S0A,AND,A=3,B=3,D=2> ; 362
2306 003312' 442031 400340
2307 003313' 036300 000000 MWORD <CONT,S0A,XNOR,A=3,B=4,D=2> ; 363
2308 003314' 472032 000340
2309 003315' 036400 001777 MWORD <CONT,MGC=1777,SKCN,SDA,AND,A=3,B=4,D=3> ; 364
2310 003316' 543032 240340
2311 003317' 036503 670000 MWORD <CJP,J=367,S0A,OR,A=4,CENA,CCFZ> ; 365
2312 003320' 430440 020060
2313 003321' 036650 000000 MWORD <JMAP,J=5000> ; 366
2314 003322' 000000 000040
2315
2316 003323' 036700 000000 MWORD <CONT,S0A,AND,A=2,B=2,D=2> ; 367
2317 003324' 442021 000340
2318 003325' 037000 000000 MWORD <CONT,S0A,XNOR,A=2,B=4,D=2> ; 370
2319 003326' 472022 000340
2320 003327' 037100 001777 MWORD <CONT,MGC=1777,SKCN,SDA,AND,A=2,B=4,D=3> ; 371
2321 003330' 543022 240340
2322 003331' 037203 740000 MWORD <CJP,J=374,S0A,OR,A=4,CENA,CCFZ> ; 372
2323 003332' 430440 020060
2324 003333' 037350 000000 MWORD <JMAP,J=5000> ; 373
2325 003334' 000000 000040
2326
2327 003335' 037400 000000 MWORD <CONT,S0A,AND,A=1,B=1,D=2> ; 374
2328 003336' 442010 400340
2329 003337' 037500 000000 MWORD <CONT,S0A,XNOR,A=1,B=4,D=2> ; 375
2330 003340' 472012 000340
2331 003341' 037600 001777 MWORD <CONT,MGC=1777,SKCN,SDA,AND,A=1,B=4,D=3> ; 376
2332 003342' 543012 240340
2333 003343' 037704 010000 MWORD <CJP,J=401,S0A,OR,A=4,CENA,CCFZ> ; 377
2334 003344' 430440 020060
2335 003345' 040050 000000 MWORD <JMAP,J=5000> ; 400
2336 003346' 000000 000040
2337
2338 003347' 040100 000000 MWORD <CONT,S0A,AND,A=16,B=16,D=2> ; 401
2339 003350' 442167 000340
2340 003351' 040200 000000 MWORD <CONT,S0A,XNOR,A=16,B=5,D=2> ; 402
2341 003352' 472162 400340
2342 003353' 040300 001777 MWORD <CONT,MGC=1777,SKCN,SDA,AND,A=16,B=5,D=3> ; 403
2343 003354' 543162 640340
2344 003355' 040404 060000 MWORD <CJP,J=406,S0A,OR,A=5,CENA,CCFZ> ; 404
2345 003356' 430450 020060
2346 003357' 040550 000000 MWORD <JMAP,J=5000> ; 405
.MAIN MACRO %53A(1152) 10:22 16-Oct-84 Page 27-6
DFPTA7 MAC 11-Oct-83 20:26 EBUS/MPROC 2901 Tests (Part 4) SEQ 1345
2347 003360' 000000 000040
2348
2349 003361' 040600 000000 MWORD <CONT,S0A,AND,A=16,B=16,D=2> ; 406
2350 003362' 442167 000340
2351 003363' 040700 000000 MWORD <CONT,S0A,XNOR,A=16,B=6,D=2> ; 407
2352 003364' 472163 000340
2353 003365' 041000 001777 MWORD <CONT,MGC=1777,SKCN,SDA,AND,A=16,B=6,D=3> ; 410
2354 003366' 543163 240340
2355 003367' 041104 130000 MWORD <CJP,J=413,S0A,OR,A=6,CENA,CCFZ> ; 411
2356 003370' 430460 020060
2357 003371' 041250 000000 MWORD <JMAP,J=5000> ; 412
2358 003372' 000000 000040
2359
2360 003373' 041300 000000 MWORD <CONT,S0A,AND,A=16,B=16,D=2> ; 413
2361 003374' 442167 000340
2362 003375' 041400 000000 MWORD <CONT,S0A,XNOR,A=16,B=7,D=2> ; 414
2363 003376' 472163 400340
2364 003377' 041500 001777 MWORD <CONT,MGC=1777,SKCN,SDA,AND,A=16,B=7,D=3> ; 415
2365 003400' 543163 640340
2366 003401' 041640 000000 MWORD <CJP,J=4000,S0A,OR,A=7,CENA,CCFZ> ; 416
2367 003402' 430470 020060
2368 003403' 041750 000000 MWORD <JMAP,J=5000> ; 417
2369 003404' 000000 000040
2370
2371 ; Correct address
2372
2373 003405' 400040 000000 MWORD <ADDR=4000,JMAP,J=4000,BAD> ; 4000
2374 003406' 000000 000041
2375
2376 ; Error address
2377
2378 003407' 500050 000000 MWORD <ADDR=5000,JMAP,J=5000,BAD> ; 5000
2379 003410' 000000 000041
2380 003411' 777777 777777 -1
2381
2382 ;#********************************************************************
2383 ; End of 2901 Tests (Part 4)
2384 ;#********************************************************************
2385
2386 XLIST
2387
NO ERRORS DETECTED
PROGRAM BREAK IS 003676
CPU TIME USED 04:50.381
155P CORE USED
.MAIN MACRO %53A(1152) 10:22 16-Oct-84 Page S-1
DFPTA7 MAC 11-Oct-83 20:26 SYMBOL TABLE SEQ 1346
AAPNT 000000 ext TA37 002034' TX40 002301' .MJ 007777 spd
AEXEC 002727' ext TA40 002261' TX41 002523' .MJMAP 000017 spd
ALEBF 002533' ext TA41 002503' TX42 002734' .MJZ 000017 spd
ALFLS 002512' ext TA42 002723' TXALL 060000 000000 spd .MLDCT 000017 spd
ALU 020000 000000 spd TG33 000013' TXNOT 040000 000000 spd .MMGC 001777 spd
BBPNT 000000 ext TG34 000147' TXTINH 000200 spd .MNAND 000007 spd
BEXEC 000321' ext TG35 000310' Z7 000000' .MOENA 000001 spd
CALL 200000 000000 spd TG36 001343' ZALU 000002 000000 spd .MOR 000007 spd
E23 000027 spd TG37 002025' $ARG2 000001 .MPLUS 000007 spd
EBUS 400000 000000 spd TG40 002252' $B 000044 .MRPCT 000017 spd
ERFLG 000015 TG41 002474' $CHR 424144 .MS0A 000007 spd
GO 260740 000000 TG42 002714' $GARG 000000 .MS0B 000007 spd
IPACLR 002722' ext TL33 000020' %ADDR 005001 spd .MS0Q 000007 spd
LAST 010000 000000 spd TL34 000154' %ML 500050 000000 spd .MSD0 000007 spd
MA33 000102' TL35 000315' %MR 000041 spd .MSDA 000007 spd
MA34 000176' TL36 001350' .LA 000000 spd .MSELE 000007 spd
MA34PN 000200' TL37 002032' .LADDR 000100 000000 spd .MSKCN 000037 spd
MA35 000523' TL40 002257' .LAND 000000 spd .MXNOR 000007 spd
MA35PN 000525' TL41 002501' .LB 000000 spd .MXOR 000007 spd
MA36 001373' TL42 002721' .LBAD 000000 spd .RA 000010 000000 spd
MA36PN 001375' TLOAD 002717' ext .LCCFZ 000000 spd .RAND 040000 000000 spd
MA37 002055' TRACE 002715' ext .LCENA 000000 spd .RB 400000 spd
MA37PN 002057' TS33 000035' .LCJP 000000 spd .RBAD 000001 spd
MA40 002302' TS33A0 000062' .LCONT 000000 spd .RCCFZ 020000 spd
MA40PN 002304' TS33A1 000070' .LCRY 000000 spd .RCENA 000400 000000 spd
MA41 002524' TS33AD 000052' .LD 000000 spd .RCJP 000060 spd
MA41PN 002526' TS33IN 000045' .LJ 010000 spd .RCONT 000340 spd
MA42 002735' TS33L 000040' .LJMAP 000000 spd .RCRY 000400 spd
MLAST 400000 000000 spd TS33PT 003671' .LJZ 000000 spd .RD 001000 000000 spd
MSG 100000 000000 spd TS33ST 003672' .LLDCT 000000 spd .RJ 000000 spd
NDMP 000400 000000 spd TS35 000332' .LMGC 000001 spd .RJMAP 000040 spd
P 000017 TS35A0 000360' .LNAND 000000 spd .RJZ 000000 spd
PNTHW 037540 000000 TS35A1 000364' .LOENA 002000 spd .RLDCT 000300 spd
PNTMSG 037000 000000 TS35AD 000345' .LOR 000000 spd .RMGC 000000 spd
PNTOCS 037700 000003 TS35IN 000340' .LPLUS 000000 spd .RNAND 050000 000000 spd
RTN 263740 000000 TS35L 000333' .LRPCT 000000 spd .ROENA 000000 spd
SCOPER 027000 000000 TS35PA 003673' .LS0A 000000 spd .ROR 030000 000000 spd
SCOSW 002526' ext TS35RG 003674' .LS0B 000000 spd .RPLUS 000000 spd
SSCALL 000003 spd TS35ST 003675' .LS0Q 000000 spd .RRPCT 000220 spd
SSCHK 000004 spd TS35T1 000401' .LSD0 000000 spd .RS0A 400000 000000 spd
SSJRST 000005 spd TS35T2 000405' .LSDA 000000 spd .RS0B 300000 000000 spd
SSLAST 000000 spd TSTA33 000000' ent .LSELE 000000 spd .RS0Q 200000 000000 spd
SSSTRT 000001 spd TSTA34 000135' ent .LSKCN 000000 spd .RSD0 700000 000000 spd
T33M 000104' TSTA35 000277' ent .LXNOR 000000 spd .RSDA 500000 000000 spd
T34M 000210' TSTA36 001333' ent .LXOR 000000 spd .RSELE 005000 spd
T35M 000532' TSTA37 002016' ent .MA 000017 spd .RSKCN 240000 spd
T36M 001407' TSTA40 002244' ent .MAND 000007 spd .RXNOR 070000 000000 spd
T37M 002071' TSTA41 002467' ent .MB 000017 spd .RXOR 060000 000000 spd
T40M 002314' TSTA42 002707' ent .MBAD 000001 spd
T41M 002536' TSTSUB 000317' ext .MCCFZ 000037 spd
T42M 002737' TX33 000034' .MCENA 000001 spd
TA33 000024' TX34 000175' .MCJP 000017 spd
TA34 000156' TX35 000331' .MCONT 000017 spd
TA35 000321' TX36 001372' .MCRY 000001 spd
TA36 001352' TX37 002054' .MD 000007 spd
AAPNT 13# 2040
AEXEC 13# 250 1074 1432 1633 1831 2024 SEQ 1347
ALEBF 13# 255 281 1079 1106 1437 1464 1638 1665 1836 1863
ALFLS 13# 253 1077 1435 1636 1834
ALU 72 221 400 1047 1406 1608 1807 2000
BBPNT 13# 165 580
BEXEC 13# 100 426
CALL 165 272 579 580 1097 1455 1656 1854 2040
E23 74 223 402 1049 1408 1610 1809 2002
EBUS 72 221 400 1047 1406 1608 1807 2000
ERFLG 93 103 110 241 252 254 257 419 429 436 1065 1076 1078 1082
1423 1434 1436 1440 1624 1635 1637 1641 1822 1833 1835 1839 2015 2025
IPACLR 17# 94 242 420 1066 1424 1625 1823 2016
LAST 165 272 580 1097 1455 1656 1854 2040
MA33 107 164#
MA34 261 271#
MA34PN 272 274#
MA35 433 579#
MA35PN 579 582#
MA36 1086 1096#
MA36PN 1097 1099#
MA37 1444 1454#
MA37PN 1455 1457#
MA40 1645 1655#
MA40PN 1656 1658#
MA41 1843 1853#
MA41PN 1854 1856#
MA42 2029 2039#
MLAST 74 223 402 1049 1408 1610 1809 2002
MSG 164 271 1096 1454 1655 1853 2039
NDMP 72 221 400 1047 1406 1608 1807 2000
P 159 486
SCOSW 21# 274 1099 1457 1658 1856
SSCALL 120 121 444 445
SSCHK 121 122 445 446
SSJRST 124 125 448 449
SSLAST 125 126 449 450
SSSTRT 118 119 120 122 123 124 446 447 448
T33M 73 87 169#
T34M 222 235 287#
T35M 401 413 592#
T36M 1048 1059 1114#
T37M 1407 1417 1472#
T40M 1609 1618 1671#
T41M 1808 1816 1869#
T42M 2001 2009 2044#
TA33 100# 102 110
TA34 246#
TA35 426# 428 436
TA36 1070#
TA37 1428#
TA40 1629#
TA41 1827#
TA42 2020#
TG33 71 85# SEQ 1348
TG34 220 233#
TG35 399 411#
TG36 1046 1057#
TG37 1405 1415#
TG40 1607 1616#
TG41 1806 1814#
TG42 1999 2007#
TL33 93# 108
TL34 241# 262
TL35 419# 434
TL36 1065# 1087
TL37 1423# 1445
TL40 1624# 1646
TL41 1822# 1844
TL42 2015# 2030
TLOAD 13# 88 236 414 1060 1418 1619 1817 2010
TRACE 13# 86 234 412 1058 1416 1617 1815 2008
TS33 96 118#
TS33A0 137 144#
TS33A1 142 147 151#
TS33AD 121 135#
TS33IN 120 129#
TS33L 121# 124
TS33PT 130# 130 135 151# 151
TS33ST 132# 132 136 152# 152
TS35 422 444#
TS35A0 463 471#
TS35A1 469 472 475#
TS35AD 445 459#
TS35IN 444 453#
TS35L 445# 448
TS35PA 456# 456 460 468 474 483
TS35RG 453# 453 464 476 583
TS35ST 454# 454 459 467 473
TS35T1 478 491#
TS35T2 461 484 498#
TSTA33 9 71#
TSTA34 9 75 220#
TSTA35 9 76 224 399#
TSTA36 9 77 225 403 1046#
TSTA37 9 78 226 404 1050 1405#
TSTA40 9 79 227 405 1051 1409 1607#
TSTA41 9 80 228 406 1052 1410 1611 1806#
TSTA42 9 1999#
TSTSUB 13# 95 421
TX33 101 109 114#
TX34 263 267#
TX35 427 435 440#
TX36 1088 1092#
TX37 1446 1450#
TX40 1647 1651#
TX41 1845 1849#
TX42 2031 2035# SEQ 1349
TXALL 165 272 580 1097 1455 1656 1853 1854 2039 2040
TXNOT 164 271 579 1096 1454 1655
TXTINH 275 278 1100 1103 1108 1458 1461 1466 1659 1662 1857 1860
Z7 28# 85 233 411 1057 1415 1616 1814 2007
ZALU 72 221 400 1047 1406 1608 1807 2000
$ARG2 169# 169 171# 171 173# 173 176# 176 178# 178 180# 180 183# 183
185# 185 187# 187 190# 190 192# 192 194# 194 287# 287 289# 289
294# 294 296# 296 298# 298 300# 300 302# 302 304# 304 309# 309
311# 311 313# 313 315# 315 317# 317 319# 319 324# 324 326# 326
328# 328 330# 330 332# 332 334# 334 339# 339 341# 341 343# 343
345# 345 347# 347 349# 349 352# 352 592# 592 594# 594 596# 596
598# 598 600# 600 602# 602 604# 604 606# 606 608# 608 610# 610
612# 612 614# 614 619# 619 621# 621 623# 623 625# 625 627# 627
629# 629 631# 631 633# 633 635# 635 637# 637 639# 639 641# 641
646# 646 648# 648 650# 650 652# 652 654# 654 656# 656 658# 658
660# 660 662# 662 664# 664 666# 666 668# 668 673# 673 675# 675
677# 677 679# 679 681# 681 683# 683 685# 685 687# 687 689# 689
691# 691 693# 693 695# 695 700# 700 702# 702 704# 704 706# 706
708# 708 710# 710 712# 712 714# 714 716# 716 718# 718 720# 720
722# 722 727# 727 729# 729 731# 731 733# 733 735# 735 737# 737
739# 739 741# 741 743# 743 745# 745 747# 747 749# 749 754# 754
756# 756 758# 758 760# 760 762# 762 764# 764 766# 766 768# 768
770# 770 772# 772 774# 774 776# 776 781# 781 783# 783 785# 785
787# 787 789# 789 791# 791 793# 793 795# 795 797# 797 799# 799
801# 801 803# 803 808# 808 810# 810 812# 812 814# 814 816# 816
818# 818 820# 820 822# 822 824# 824 826# 826 828# 828 830# 830
835# 835 837# 837 839# 839 841# 841 843# 843 845# 845 847# 847
849# 849 851# 851 853# 853 855# 855 857# 857 862# 862 864# 864
866# 866 868# 868 870# 870 872# 872 874# 874 876# 876 878# 878
880# 880 882# 882 884# 884 889# 889 891# 891 893# 893 895# 895
897# 897 899# 899 901# 901 903# 903 905# 905 907# 907 909# 909
911# 911 916# 916 918# 918 920# 920 922# 922 924# 924 926# 926
928# 928 930# 930 932# 932 934# 934 936# 936 938# 938 943# 943
945# 945 947# 947 949# 949 951# 951 953# 953 955# 955 957# 957
959# 959 961# 961 963# 963 965# 965 970# 970 972# 972 974# 974
976# 976 978# 978 980# 980 982# 982 984# 984 986# 986 988# 988
990# 990 992# 992 997# 997 999# 999 1001# 1001 1003# 1003 1005# 1005
1007# 1007 1009# 1009 1011# 1011 1013# 1013 1015# 1015 1017# 1017 1019# 1019
1114# 1114 1116# 1116 1118# 1118 1120# 1120 1122# 1122 1124# 1124 1126# 1126
1128# 1128 1130# 1130 1132# 1132 1134# 1134 1136# 1136 1138# 1138 1140# 1140
1142# 1142 1144# 1144 1146# 1146 1148# 1148 1150# 1150 1152# 1152 1154# 1154
1156# 1156 1158# 1158 1160# 1160 1162# 1162 1164# 1164 1166# 1166 1168# 1168
1170# 1170 1172# 1172 1174# 1174 1176# 1176 1178# 1178 1181# 1181 1183# 1183
1185# 1185 1187# 1187 1189# 1189 1191# 1191 1193# 1193 1195# 1195 1197# 1197
1199# 1199 1201# 1201 1203# 1203 1205# 1205 1207# 1207 1209# 1209 1211# 1211
1213# 1213 1215# 1215 1217# 1217 1219# 1219 1221# 1221 1223# 1223 1225# 1225
1227# 1227 1229# 1229 1231# 1231 1233# 1233 1235# 1235 1237# 1237 1239# 1239
1241# 1241 1243# 1243 1246# 1246 1248# 1248 1250# 1250 1252# 1252 1254# 1254
1256# 1256 1258# 1258 1260# 1260 1262# 1262 1264# 1264 1266# 1266 1268# 1268
1270# 1270 1272# 1272 1274# 1274 1276# 1276 1278# 1278 1280# 1280 1282# 1282
1284# 1284 1286# 1286 1288# 1288 1290# 1290 1292# 1292 1294# 1294 1296# 1296
1298# 1298 1300# 1300 1302# 1302 1304# 1304 1306# 1306 1308# 1308 1311# 1311
1313# 1313 1315# 1315 1317# 1317 1319# 1319 1321# 1321 1323# 1323 1325# 1325 SEQ 1350
1327# 1327 1329# 1329 1331# 1331 1333# 1333 1335# 1335 1337# 1337 1339# 1339
1341# 1341 1343# 1343 1345# 1345 1347# 1347 1349# 1349 1351# 1351 1353# 1353
1355# 1355 1357# 1357 1359# 1359 1361# 1361 1363# 1363 1365# 1365 1367# 1367
1369# 1369 1371# 1371 1373# 1373 1376# 1376 1378# 1378 1472# 1472 1474# 1474
1476# 1476 1478# 1478 1480# 1480 1482# 1482 1484# 1484 1486# 1486 1488# 1488
1490# 1490 1492# 1492 1494# 1494 1496# 1496 1498# 1498 1500# 1500 1502# 1502
1504# 1504 1506# 1506 1508# 1508 1510# 1510 1512# 1512 1514# 1514 1516# 1516
1518# 1518 1520# 1520 1522# 1522 1524# 1524 1526# 1526 1528# 1528 1530# 1530
1532# 1532 1534# 1534 1536# 1536 1538# 1538 1540# 1540 1542# 1542 1544# 1544
1546# 1546 1548# 1548 1550# 1550 1552# 1552 1554# 1554 1556# 1556 1558# 1558
1560# 1560 1562# 1562 1564# 1564 1566# 1566 1568# 1568 1570# 1570 1572# 1572
1575# 1575 1577# 1577 1671# 1671 1673# 1673 1675# 1675 1677# 1677 1679# 1679
1681# 1681 1683# 1683 1685# 1685 1687# 1687 1689# 1689 1691# 1691 1693# 1693
1695# 1695 1697# 1697 1699# 1699 1701# 1701 1703# 1703 1705# 1705 1707# 1707
1709# 1709 1711# 1711 1713# 1713 1715# 1715 1717# 1717 1719# 1719 1721# 1721
1723# 1723 1725# 1725 1727# 1727 1729# 1729 1731# 1731 1733# 1733 1735# 1735
1737# 1737 1739# 1739 1741# 1741 1743# 1743 1745# 1745 1747# 1747 1749# 1749
1751# 1751 1753# 1753 1755# 1755 1757# 1757 1759# 1759 1761# 1761 1763# 1763
1765# 1765 1767# 1767 1769# 1769 1771# 1771 1774# 1774 1776# 1776 1869# 1869
1871# 1871 1873# 1873 1875# 1875 1877# 1877 1879# 1879 1881# 1881 1883# 1883
1885# 1885 1887# 1887 1889# 1889 1891# 1891 1893# 1893 1895# 1895 1897# 1897
1899# 1899 1901# 1901 1903# 1903 1905# 1905 1907# 1907 1909# 1909 1911# 1911
1913# 1913 1915# 1915 1917# 1917 1919# 1919 1921# 1921 1923# 1923 1925# 1925
1927# 1927 1929# 1929 1931# 1931 1933# 1933 1935# 1935 1937# 1937 1939# 1939
1941# 1941 1943# 1943 1945# 1945 1947# 1947 1949# 1949 1951# 1951 1953# 1953
1955# 1955 1957# 1957 1959# 1959 1961# 1961 1963# 1963 1965# 1965 1967# 1967
1969# 1969 1972# 1972 2044# 2044 2046# 2046 2049# 2049 2051# 2051 2053# 2053
2055# 2055 2057# 2057 2060# 2060 2062# 2062 2064# 2064 2066# 2066 2069# 2069
2071# 2071 2073# 2073 2075# 2075 2078# 2078 2080# 2080 2082# 2082 2084# 2084
2087# 2087 2089# 2089 2091# 2091 2093# 2093 2096# 2096 2098# 2098 2100# 2100
2102# 2102 2105# 2105 2107# 2107 2109# 2109 2111# 2111 2114# 2114 2116# 2116
2118# 2118 2120# 2120 2123# 2123 2125# 2125 2127# 2127 2129# 2129 2132# 2132
2134# 2134 2136# 2136 2138# 2138 2141# 2141 2143# 2143 2145# 2145 2147# 2147
2150# 2150 2152# 2152 2154# 2154 2156# 2156 2159# 2159 2161# 2161 2163# 2163
2165# 2165 2168# 2168 2170# 2170 2172# 2172 2174# 2174 2177# 2177 2179# 2179
2181# 2181 2183# 2183 2186# 2186 2188# 2188 2190# 2190 2192# 2192 2195# 2195
2197# 2197 2199# 2199 2201# 2201 2203# 2203 2206# 2206 2208# 2208 2210# 2210
2212# 2212 2214# 2214 2217# 2217 2219# 2219 2221# 2221 2223# 2223 2225# 2225
2228# 2228 2230# 2230 2232# 2232 2234# 2234 2236# 2236 2239# 2239 2241# 2241
2243# 2243 2245# 2245 2247# 2247 2250# 2250 2252# 2252 2254# 2254 2256# 2256
2258# 2258 2261# 2261 2263# 2263 2265# 2265 2267# 2267 2269# 2269 2272# 2272
2274# 2274 2276# 2276 2278# 2278 2280# 2280 2283# 2283 2285# 2285 2287# 2287
2289# 2289 2291# 2291 2294# 2294 2296# 2296 2298# 2298 2300# 2300 2302# 2302
2305# 2305 2307# 2307 2309# 2309 2311# 2311 2313# 2313 2316# 2316 2318# 2318
2320# 2320 2322# 2322 2324# 2324 2327# 2327 2329# 2329 2331# 2331 2333# 2333
2335# 2335 2338# 2338 2340# 2340 2342# 2342 2344# 2344 2346# 2346 2349# 2349
2351# 2351 2353# 2353 2355# 2355 2357# 2357 2360# 2360 2362# 2362 2364# 2364
2366# 2366 2368# 2368 2373# 2373 2378# 2378
$B 169# 169 171# 171 173# 173 176# 176 178# 178 180# 180 183# 183
185# 185 187# 187 190# 190 192# 192 194# 194 287# 287 289# 289
294# 294 296# 296 298# 298 300# 300 302# 302 304# 304 309# 309
311# 311 313# 313 315# 315 317# 317 319# 319 324# 324 326# 326
328# 328 330# 330 332# 332 334# 334 339# 339 341# 341 343# 343 SEQ 1351
345# 345 347# 347 349# 349 352# 352 592# 592 594# 594 596# 596
598# 598 600# 600 602# 602 604# 604 606# 606 608# 608 610# 610
612# 612 614# 614 619# 619 621# 621 623# 623 625# 625 627# 627
629# 629 631# 631 633# 633 635# 635 637# 637 639# 639 641# 641
646# 646 648# 648 650# 650 652# 652 654# 654 656# 656 658# 658
660# 660 662# 662 664# 664 666# 666 668# 668 673# 673 675# 675
677# 677 679# 679 681# 681 683# 683 685# 685 687# 687 689# 689
691# 691 693# 693 695# 695 700# 700 702# 702 704# 704 706# 706
708# 708 710# 710 712# 712 714# 714 716# 716 718# 718 720# 720
722# 722 727# 727 729# 729 731# 731 733# 733 735# 735 737# 737
739# 739 741# 741 743# 743 745# 745 747# 747 749# 749 754# 754
756# 756 758# 758 760# 760 762# 762 764# 764 766# 766 768# 768
770# 770 772# 772 774# 774 776# 776 781# 781 783# 783 785# 785
787# 787 789# 789 791# 791 793# 793 795# 795 797# 797 799# 799
801# 801 803# 803 808# 808 810# 810 812# 812 814# 814 816# 816
818# 818 820# 820 822# 822 824# 824 826# 826 828# 828 830# 830
835# 835 837# 837 839# 839 841# 841 843# 843 845# 845 847# 847
849# 849 851# 851 853# 853 855# 855 857# 857 862# 862 864# 864
866# 866 868# 868 870# 870 872# 872 874# 874 876# 876 878# 878
880# 880 882# 882 884# 884 889# 889 891# 891 893# 893 895# 895
897# 897 899# 899 901# 901 903# 903 905# 905 907# 907 909# 909
911# 911 916# 916 918# 918 920# 920 922# 922 924# 924 926# 926
928# 928 930# 930 932# 932 934# 934 936# 936 938# 938 943# 943
945# 945 947# 947 949# 949 951# 951 953# 953 955# 955 957# 957
959# 959 961# 961 963# 963 965# 965 970# 970 972# 972 974# 974
976# 976 978# 978 980# 980 982# 982 984# 984 986# 986 988# 988
990# 990 992# 992 997# 997 999# 999 1001# 1001 1003# 1003 1005# 1005
1007# 1007 1009# 1009 1011# 1011 1013# 1013 1015# 1015 1017# 1017 1019# 1019
1114# 1114 1116# 1116 1118# 1118 1120# 1120 1122# 1122 1124# 1124 1126# 1126
1128# 1128 1130# 1130 1132# 1132 1134# 1134 1136# 1136 1138# 1138 1140# 1140
1142# 1142 1144# 1144 1146# 1146 1148# 1148 1150# 1150 1152# 1152 1154# 1154
1156# 1156 1158# 1158 1160# 1160 1162# 1162 1164# 1164 1166# 1166 1168# 1168
1170# 1170 1172# 1172 1174# 1174 1176# 1176 1178# 1178 1181# 1181 1183# 1183
1185# 1185 1187# 1187 1189# 1189 1191# 1191 1193# 1193 1195# 1195 1197# 1197
1199# 1199 1201# 1201 1203# 1203 1205# 1205 1207# 1207 1209# 1209 1211# 1211
1213# 1213 1215# 1215 1217# 1217 1219# 1219 1221# 1221 1223# 1223 1225# 1225
1227# 1227 1229# 1229 1231# 1231 1233# 1233 1235# 1235 1237# 1237 1239# 1239
1241# 1241 1243# 1243 1246# 1246 1248# 1248 1250# 1250 1252# 1252 1254# 1254
1256# 1256 1258# 1258 1260# 1260 1262# 1262 1264# 1264 1266# 1266 1268# 1268
1270# 1270 1272# 1272 1274# 1274 1276# 1276 1278# 1278 1280# 1280 1282# 1282
1284# 1284 1286# 1286 1288# 1288 1290# 1290 1292# 1292 1294# 1294 1296# 1296
1298# 1298 1300# 1300 1302# 1302 1304# 1304 1306# 1306 1308# 1308 1311# 1311
1313# 1313 1315# 1315 1317# 1317 1319# 1319 1321# 1321 1323# 1323 1325# 1325
1327# 1327 1329# 1329 1331# 1331 1333# 1333 1335# 1335 1337# 1337 1339# 1339
1341# 1341 1343# 1343 1345# 1345 1347# 1347 1349# 1349 1351# 1351 1353# 1353
1355# 1355 1357# 1357 1359# 1359 1361# 1361 1363# 1363 1365# 1365 1367# 1367
1369# 1369 1371# 1371 1373# 1373 1376# 1376 1378# 1378 1472# 1472 1474# 1474
1476# 1476 1478# 1478 1480# 1480 1482# 1482 1484# 1484 1486# 1486 1488# 1488
1490# 1490 1492# 1492 1494# 1494 1496# 1496 1498# 1498 1500# 1500 1502# 1502
1504# 1504 1506# 1506 1508# 1508 1510# 1510 1512# 1512 1514# 1514 1516# 1516
1518# 1518 1520# 1520 1522# 1522 1524# 1524 1526# 1526 1528# 1528 1530# 1530
1532# 1532 1534# 1534 1536# 1536 1538# 1538 1540# 1540 1542# 1542 1544# 1544
1546# 1546 1548# 1548 1550# 1550 1552# 1552 1554# 1554 1556# 1556 1558# 1558 SEQ 1352
1560# 1560 1562# 1562 1564# 1564 1566# 1566 1568# 1568 1570# 1570 1572# 1572
1575# 1575 1577# 1577 1671# 1671 1673# 1673 1675# 1675 1677# 1677 1679# 1679
1681# 1681 1683# 1683 1685# 1685 1687# 1687 1689# 1689 1691# 1691 1693# 1693
1695# 1695 1697# 1697 1699# 1699 1701# 1701 1703# 1703 1705# 1705 1707# 1707
1709# 1709 1711# 1711 1713# 1713 1715# 1715 1717# 1717 1719# 1719 1721# 1721
1723# 1723 1725# 1725 1727# 1727 1729# 1729 1731# 1731 1733# 1733 1735# 1735
1737# 1737 1739# 1739 1741# 1741 1743# 1743 1745# 1745 1747# 1747 1749# 1749
1751# 1751 1753# 1753 1755# 1755 1757# 1757 1759# 1759 1761# 1761 1763# 1763
1765# 1765 1767# 1767 1769# 1769 1771# 1771 1774# 1774 1776# 1776 1869# 1869
1871# 1871 1873# 1873 1875# 1875 1877# 1877 1879# 1879 1881# 1881 1883# 1883
1885# 1885 1887# 1887 1889# 1889 1891# 1891 1893# 1893 1895# 1895 1897# 1897
1899# 1899 1901# 1901 1903# 1903 1905# 1905 1907# 1907 1909# 1909 1911# 1911
1913# 1913 1915# 1915 1917# 1917 1919# 1919 1921# 1921 1923# 1923 1925# 1925
1927# 1927 1929# 1929 1931# 1931 1933# 1933 1935# 1935 1937# 1937 1939# 1939
1941# 1941 1943# 1943 1945# 1945 1947# 1947 1949# 1949 1951# 1951 1953# 1953
1955# 1955 1957# 1957 1959# 1959 1961# 1961 1963# 1963 1965# 1965 1967# 1967
1969# 1969 1972# 1972 2044# 2044 2046# 2046 2049# 2049 2051# 2051 2053# 2053
2055# 2055 2057# 2057 2060# 2060 2062# 2062 2064# 2064 2066# 2066 2069# 2069
2071# 2071 2073# 2073 2075# 2075 2078# 2078 2080# 2080 2082# 2082 2084# 2084
2087# 2087 2089# 2089 2091# 2091 2093# 2093 2096# 2096 2098# 2098 2100# 2100
2102# 2102 2105# 2105 2107# 2107 2109# 2109 2111# 2111 2114# 2114 2116# 2116
2118# 2118 2120# 2120 2123# 2123 2125# 2125 2127# 2127 2129# 2129 2132# 2132
2134# 2134 2136# 2136 2138# 2138 2141# 2141 2143# 2143 2145# 2145 2147# 2147
2150# 2150 2152# 2152 2154# 2154 2156# 2156 2159# 2159 2161# 2161 2163# 2163
2165# 2165 2168# 2168 2170# 2170 2172# 2172 2174# 2174 2177# 2177 2179# 2179
2181# 2181 2183# 2183 2186# 2186 2188# 2188 2190# 2190 2192# 2192 2195# 2195
2197# 2197 2199# 2199 2201# 2201 2203# 2203 2206# 2206 2208# 2208 2210# 2210
2212# 2212 2214# 2214 2217# 2217 2219# 2219 2221# 2221 2223# 2223 2225# 2225
2228# 2228 2230# 2230 2232# 2232 2234# 2234 2236# 2236 2239# 2239 2241# 2241
2243# 2243 2245# 2245 2247# 2247 2250# 2250 2252# 2252 2254# 2254 2256# 2256
2258# 2258 2261# 2261 2263# 2263 2265# 2265 2267# 2267 2269# 2269 2272# 2272
2274# 2274 2276# 2276 2278# 2278 2280# 2280 2283# 2283 2285# 2285 2287# 2287
2289# 2289 2291# 2291 2294# 2294 2296# 2296 2298# 2298 2300# 2300 2302# 2302
2305# 2305 2307# 2307 2309# 2309 2311# 2311 2313# 2313 2316# 2316 2318# 2318
2320# 2320 2322# 2322 2324# 2324 2327# 2327 2329# 2329 2331# 2331 2333# 2333
2335# 2335 2338# 2338 2340# 2340 2342# 2342 2344# 2344 2346# 2346 2349# 2349
2351# 2351 2353# 2353 2355# 2355 2357# 2357 2360# 2360 2362# 2362 2364# 2364
2366# 2366 2368# 2368 2373# 2373 2378# 2378
$CHR 169# 169 171# 171 173# 173 176# 176 178# 178 180# 180 183# 183
185# 185 187# 187 190# 190 192# 192 194# 194 287# 287 289# 289
294# 294 296# 296 298# 298 300# 300 302# 302 304# 304 309# 309
311# 311 313# 313 315# 315 317# 317 319# 319 324# 324 326# 326
328# 328 330# 330 332# 332 334# 334 339# 339 341# 341 343# 343
345# 345 347# 347 349# 349 352# 352 592# 592 594# 594 596# 596
598# 598 600# 600 602# 602 604# 604 606# 606 608# 608 610# 610
612# 612 614# 614 619# 619 621# 621 623# 623 625# 625 627# 627
629# 629 631# 631 633# 633 635# 635 637# 637 639# 639 641# 641
646# 646 648# 648 650# 650 652# 652 654# 654 656# 656 658# 658
660# 660 662# 662 664# 664 666# 666 668# 668 673# 673 675# 675
677# 677 679# 679 681# 681 683# 683 685# 685 687# 687 689# 689
691# 691 693# 693 695# 695 700# 700 702# 702 704# 704 706# 706
708# 708 710# 710 712# 712 714# 714 716# 716 718# 718 720# 720
722# 722 727# 727 729# 729 731# 731 733# 733 735# 735 737# 737 SEQ 1353
739# 739 741# 741 743# 743 745# 745 747# 747 749# 749 754# 754
756# 756 758# 758 760# 760 762# 762 764# 764 766# 766 768# 768
770# 770 772# 772 774# 774 776# 776 781# 781 783# 783 785# 785
787# 787 789# 789 791# 791 793# 793 795# 795 797# 797 799# 799
801# 801 803# 803 808# 808 810# 810 812# 812 814# 814 816# 816
818# 818 820# 820 822# 822 824# 824 826# 826 828# 828 830# 830
835# 835 837# 837 839# 839 841# 841 843# 843 845# 845 847# 847
849# 849 851# 851 853# 853 855# 855 857# 857 862# 862 864# 864
866# 866 868# 868 870# 870 872# 872 874# 874 876# 876 878# 878
880# 880 882# 882 884# 884 889# 889 891# 891 893# 893 895# 895
897# 897 899# 899 901# 901 903# 903 905# 905 907# 907 909# 909
911# 911 916# 916 918# 918 920# 920 922# 922 924# 924 926# 926
928# 928 930# 930 932# 932 934# 934 936# 936 938# 938 943# 943
945# 945 947# 947 949# 949 951# 951 953# 953 955# 955 957# 957
959# 959 961# 961 963# 963 965# 965 970# 970 972# 972 974# 974
976# 976 978# 978 980# 980 982# 982 984# 984 986# 986 988# 988
990# 990 992# 992 997# 997 999# 999 1001# 1001 1003# 1003 1005# 1005
1007# 1007 1009# 1009 1011# 1011 1013# 1013 1015# 1015 1017# 1017 1019# 1019
1114# 1114 1116# 1116 1118# 1118 1120# 1120 1122# 1122 1124# 1124 1126# 1126
1128# 1128 1130# 1130 1132# 1132 1134# 1134 1136# 1136 1138# 1138 1140# 1140
1142# 1142 1144# 1144 1146# 1146 1148# 1148 1150# 1150 1152# 1152 1154# 1154
1156# 1156 1158# 1158 1160# 1160 1162# 1162 1164# 1164 1166# 1166 1168# 1168
1170# 1170 1172# 1172 1174# 1174 1176# 1176 1178# 1178 1181# 1181 1183# 1183
1185# 1185 1187# 1187 1189# 1189 1191# 1191 1193# 1193 1195# 1195 1197# 1197
1199# 1199 1201# 1201 1203# 1203 1205# 1205 1207# 1207 1209# 1209 1211# 1211
1213# 1213 1215# 1215 1217# 1217 1219# 1219 1221# 1221 1223# 1223 1225# 1225
1227# 1227 1229# 1229 1231# 1231 1233# 1233 1235# 1235 1237# 1237 1239# 1239
1241# 1241 1243# 1243 1246# 1246 1248# 1248 1250# 1250 1252# 1252 1254# 1254
1256# 1256 1258# 1258 1260# 1260 1262# 1262 1264# 1264 1266# 1266 1268# 1268
1270# 1270 1272# 1272 1274# 1274 1276# 1276 1278# 1278 1280# 1280 1282# 1282
1284# 1284 1286# 1286 1288# 1288 1290# 1290 1292# 1292 1294# 1294 1296# 1296
1298# 1298 1300# 1300 1302# 1302 1304# 1304 1306# 1306 1308# 1308 1311# 1311
1313# 1313 1315# 1315 1317# 1317 1319# 1319 1321# 1321 1323# 1323 1325# 1325
1327# 1327 1329# 1329 1331# 1331 1333# 1333 1335# 1335 1337# 1337 1339# 1339
1341# 1341 1343# 1343 1345# 1345 1347# 1347 1349# 1349 1351# 1351 1353# 1353
1355# 1355 1357# 1357 1359# 1359 1361# 1361 1363# 1363 1365# 1365 1367# 1367
1369# 1369 1371# 1371 1373# 1373 1376# 1376 1378# 1378 1472# 1472 1474# 1474
1476# 1476 1478# 1478 1480# 1480 1482# 1482 1484# 1484 1486# 1486 1488# 1488
1490# 1490 1492# 1492 1494# 1494 1496# 1496 1498# 1498 1500# 1500 1502# 1502
1504# 1504 1506# 1506 1508# 1508 1510# 1510 1512# 1512 1514# 1514 1516# 1516
1518# 1518 1520# 1520 1522# 1522 1524# 1524 1526# 1526 1528# 1528 1530# 1530
1532# 1532 1534# 1534 1536# 1536 1538# 1538 1540# 1540 1542# 1542 1544# 1544
1546# 1546 1548# 1548 1550# 1550 1552# 1552 1554# 1554 1556# 1556 1558# 1558
1560# 1560 1562# 1562 1564# 1564 1566# 1566 1568# 1568 1570# 1570 1572# 1572
1575# 1575 1577# 1577 1671# 1671 1673# 1673 1675# 1675 1677# 1677 1679# 1679
1681# 1681 1683# 1683 1685# 1685 1687# 1687 1689# 1689 1691# 1691 1693# 1693
1695# 1695 1697# 1697 1699# 1699 1701# 1701 1703# 1703 1705# 1705 1707# 1707
1709# 1709 1711# 1711 1713# 1713 1715# 1715 1717# 1717 1719# 1719 1721# 1721
1723# 1723 1725# 1725 1727# 1727 1729# 1729 1731# 1731 1733# 1733 1735# 1735
1737# 1737 1739# 1739 1741# 1741 1743# 1743 1745# 1745 1747# 1747 1749# 1749
1751# 1751 1753# 1753 1755# 1755 1757# 1757 1759# 1759 1761# 1761 1763# 1763
1765# 1765 1767# 1767 1769# 1769 1771# 1771 1774# 1774 1776# 1776 1869# 1869
1871# 1871 1873# 1873 1875# 1875 1877# 1877 1879# 1879 1881# 1881 1883# 1883 SEQ 1354
1885# 1885 1887# 1887 1889# 1889 1891# 1891 1893# 1893 1895# 1895 1897# 1897
1899# 1899 1901# 1901 1903# 1903 1905# 1905 1907# 1907 1909# 1909 1911# 1911
1913# 1913 1915# 1915 1917# 1917 1919# 1919 1921# 1921 1923# 1923 1925# 1925
1927# 1927 1929# 1929 1931# 1931 1933# 1933 1935# 1935 1937# 1937 1939# 1939
1941# 1941 1943# 1943 1945# 1945 1947# 1947 1949# 1949 1951# 1951 1953# 1953
1955# 1955 1957# 1957 1959# 1959 1961# 1961 1963# 1963 1965# 1965 1967# 1967
1969# 1969 1972# 1972 2044# 2044 2046# 2046 2049# 2049 2051# 2051 2053# 2053
2055# 2055 2057# 2057 2060# 2060 2062# 2062 2064# 2064 2066# 2066 2069# 2069
2071# 2071 2073# 2073 2075# 2075 2078# 2078 2080# 2080 2082# 2082 2084# 2084
2087# 2087 2089# 2089 2091# 2091 2093# 2093 2096# 2096 2098# 2098 2100# 2100
2102# 2102 2105# 2105 2107# 2107 2109# 2109 2111# 2111 2114# 2114 2116# 2116
2118# 2118 2120# 2120 2123# 2123 2125# 2125 2127# 2127 2129# 2129 2132# 2132
2134# 2134 2136# 2136 2138# 2138 2141# 2141 2143# 2143 2145# 2145 2147# 2147
2150# 2150 2152# 2152 2154# 2154 2156# 2156 2159# 2159 2161# 2161 2163# 2163
2165# 2165 2168# 2168 2170# 2170 2172# 2172 2174# 2174 2177# 2177 2179# 2179
2181# 2181 2183# 2183 2186# 2186 2188# 2188 2190# 2190 2192# 2192 2195# 2195
2197# 2197 2199# 2199 2201# 2201 2203# 2203 2206# 2206 2208# 2208 2210# 2210
2212# 2212 2214# 2214 2217# 2217 2219# 2219 2221# 2221 2223# 2223 2225# 2225
2228# 2228 2230# 2230 2232# 2232 2234# 2234 2236# 2236 2239# 2239 2241# 2241
2243# 2243 2245# 2245 2247# 2247 2250# 2250 2252# 2252 2254# 2254 2256# 2256
2258# 2258 2261# 2261 2263# 2263 2265# 2265 2267# 2267 2269# 2269 2272# 2272
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2289# 2289 2291# 2291 2294# 2294 2296# 2296 2298# 2298 2300# 2300 2302# 2302
2305# 2305 2307# 2307 2309# 2309 2311# 2311 2313# 2313 2316# 2316 2318# 2318
2320# 2320 2322# 2322 2324# 2324 2327# 2327 2329# 2329 2331# 2331 2333# 2333
2335# 2335 2338# 2338 2340# 2340 2342# 2342 2344# 2344 2346# 2346 2349# 2349
2351# 2351 2353# 2353 2355# 2355 2357# 2357 2360# 2360 2362# 2362 2364# 2364
2366# 2366 2368# 2368 2373# 2373 2378# 2378
$GARG 169# 169 171# 171 173# 173 176# 176 178# 178 180# 180 183# 183
185# 185 187# 187 190# 190 192# 192 194# 194 287# 287 289# 289
294# 294 296# 296 298# 298 300# 300 302# 302 304# 304 309# 309
311# 311 313# 313 315# 315 317# 317 319# 319 324# 324 326# 326
328# 328 330# 330 332# 332 334# 334 339# 339 341# 341 343# 343
345# 345 347# 347 349# 349 352# 352 592# 592 594# 594 596# 596
598# 598 600# 600 602# 602 604# 604 606# 606 608# 608 610# 610
612# 612 614# 614 619# 619 621# 621 623# 623 625# 625 627# 627
629# 629 631# 631 633# 633 635# 635 637# 637 639# 639 641# 641
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660# 660 662# 662 664# 664 666# 666 668# 668 673# 673 675# 675
677# 677 679# 679 681# 681 683# 683 685# 685 687# 687 689# 689
691# 691 693# 693 695# 695 700# 700 702# 702 704# 704 706# 706
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722# 722 727# 727 729# 729 731# 731 733# 733 735# 735 737# 737
739# 739 741# 741 743# 743 745# 745 747# 747 749# 749 754# 754
756# 756 758# 758 760# 760 762# 762 764# 764 766# 766 768# 768
770# 770 772# 772 774# 774 776# 776 781# 781 783# 783 785# 785
787# 787 789# 789 791# 791 793# 793 795# 795 797# 797 799# 799
801# 801 803# 803 808# 808 810# 810 812# 812 814# 814 816# 816
818# 818 820# 820 822# 822 824# 824 826# 826 828# 828 830# 830
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849# 849 851# 851 853# 853 855# 855 857# 857 862# 862 864# 864
866# 866 868# 868 870# 870 872# 872 874# 874 876# 876 878# 878
880# 880 882# 882 884# 884 889# 889 891# 891 893# 893 895# 895 SEQ 1355
897# 897 899# 899 901# 901 903# 903 905# 905 907# 907 909# 909
911# 911 916# 916 918# 918 920# 920 922# 922 924# 924 926# 926
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959# 959 961# 961 963# 963 965# 965 970# 970 972# 972 974# 974
976# 976 978# 978 980# 980 982# 982 984# 984 986# 986 988# 988
990# 990 992# 992 997# 997 999# 999 1001# 1001 1003# 1003 1005# 1005
1007# 1007 1009# 1009 1011# 1011 1013# 1013 1015# 1015 1017# 1017 1019# 1019
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1128# 1128 1130# 1130 1132# 1132 1134# 1134 1136# 1136 1138# 1138 1140# 1140
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1199# 1199 1201# 1201 1203# 1203 1205# 1205 1207# 1207 1209# 1209 1211# 1211
1213# 1213 1215# 1215 1217# 1217 1219# 1219 1221# 1221 1223# 1223 1225# 1225
1227# 1227 1229# 1229 1231# 1231 1233# 1233 1235# 1235 1237# 1237 1239# 1239
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1532# 1532 1534# 1534 1536# 1536 1538# 1538 1540# 1540 1542# 1542 1544# 1544
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1709# 1709 1711# 1711 1713# 1713 1715# 1715 1717# 1717 1719# 1719 1721# 1721
1723# 1723 1725# 1725 1727# 1727 1729# 1729 1731# 1731 1733# 1733 1735# 1735
1737# 1737 1739# 1739 1741# 1741 1743# 1743 1745# 1745 1747# 1747 1749# 1749
1751# 1751 1753# 1753 1755# 1755 1757# 1757 1759# 1759 1761# 1761 1763# 1763
1765# 1765 1767# 1767 1769# 1769 1771# 1771 1774# 1774 1776# 1776 1869# 1869
1871# 1871 1873# 1873 1875# 1875 1877# 1877 1879# 1879 1881# 1881 1883# 1883
1885# 1885 1887# 1887 1889# 1889 1891# 1891 1893# 1893 1895# 1895 1897# 1897
1899# 1899 1901# 1901 1903# 1903 1905# 1905 1907# 1907 1909# 1909 1911# 1911
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1927# 1927 1929# 1929 1931# 1931 1933# 1933 1935# 1935 1937# 1937 1939# 1939
1941# 1941 1943# 1943 1945# 1945 1947# 1947 1949# 1949 1951# 1951 1953# 1953
1955# 1955 1957# 1957 1959# 1959 1961# 1961 1963# 1963 1965# 1965 1967# 1967
1969# 1969 1972# 1972 2044# 2044 2046# 2046 2049# 2049 2051# 2051 2053# 2053
2055# 2055 2057# 2057 2060# 2060 2062# 2062 2064# 2064 2066# 2066 2069# 2069
2071# 2071 2073# 2073 2075# 2075 2078# 2078 2080# 2080 2082# 2082 2084# 2084
2087# 2087 2089# 2089 2091# 2091 2093# 2093 2096# 2096 2098# 2098 2100# 2100 SEQ 1356
2102# 2102 2105# 2105 2107# 2107 2109# 2109 2111# 2111 2114# 2114 2116# 2116
2118# 2118 2120# 2120 2123# 2123 2125# 2125 2127# 2127 2129# 2129 2132# 2132
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2212# 2212 2214# 2214 2217# 2217 2219# 2219 2221# 2221 2223# 2223 2225# 2225
2228# 2228 2230# 2230 2232# 2232 2234# 2234 2236# 2236 2239# 2239 2241# 2241
2243# 2243 2245# 2245 2247# 2247 2250# 2250 2252# 2252 2254# 2254 2256# 2256
2258# 2258 2261# 2261 2263# 2263 2265# 2265 2267# 2267 2269# 2269 2272# 2272
2274# 2274 2276# 2276 2278# 2278 2280# 2280 2283# 2283 2285# 2285 2287# 2287
2289# 2289 2291# 2291 2294# 2294 2296# 2296 2298# 2298 2300# 2300 2302# 2302
2305# 2305 2307# 2307 2309# 2309 2311# 2311 2313# 2313 2316# 2316 2318# 2318
2320# 2320 2322# 2322 2324# 2324 2327# 2327 2329# 2329 2331# 2331 2333# 2333
2335# 2335 2338# 2338 2340# 2340 2342# 2342 2344# 2344 2346# 2346 2349# 2349
2351# 2351 2353# 2353 2355# 2355 2357# 2357 2360# 2360 2362# 2362 2364# 2364
2366# 2366 2368# 2368 2373# 2373 2378# 2378
%ADDR 169# 169 171 171# 173 173# 176 176# 178 178# 180 180# 183 183#
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1128 1128# 1130 1130# 1132 1132# 1134 1134# 1136 1136# 1138 1138# 1140 1140# SEQ 1357
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1156 1156# 1158 1158# 1160 1160# 1162 1162# 1164 1164# 1166 1166# 1168 1168#
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2258 2258# 2261 2261# 2263 2263# 2265 2265# 2267 2267# 2269 2269# 2272 2272#
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%ML 169# 169 171# 171 173# 173 176# 176 178# 178 180# 180 183# 183
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708# 708 710# 710 712# 712 714# 714 716# 716 718# 718 720# 720
722# 722 727# 727 729# 729 731# 731 733# 733 735# 735 737# 737
739# 739 741# 741 743# 743 745# 745 747# 747 749# 749 754# 754
756# 756 758# 758 760# 760 762# 762 764# 764 766# 766 768# 768
770# 770 772# 772 774# 774 776# 776 781# 781 783# 783 785# 785
787# 787 789# 789 791# 791 793# 793 795# 795 797# 797 799# 799
801# 801 803# 803 808# 808 810# 810 812# 812 814# 814 816# 816
818# 818 820# 820 822# 822 824# 824 826# 826 828# 828 830# 830
835# 835 837# 837 839# 839 841# 841 843# 843 845# 845 847# 847
849# 849 851# 851 853# 853 855# 855 857# 857 862# 862 864# 864
866# 866 868# 868 870# 870 872# 872 874# 874 876# 876 878# 878
880# 880 882# 882 884# 884 889# 889 891# 891 893# 893 895# 895
897# 897 899# 899 901# 901 903# 903 905# 905 907# 907 909# 909
911# 911 916# 916 918# 918 920# 920 922# 922 924# 924 926# 926
928# 928 930# 930 932# 932 934# 934 936# 936 938# 938 943# 943
945# 945 947# 947 949# 949 951# 951 953# 953 955# 955 957# 957
959# 959 961# 961 963# 963 965# 965 970# 970 972# 972 974# 974
976# 976 978# 978 980# 980 982# 982 984# 984 986# 986 988# 988
990# 990 992# 992 997# 997 999# 999 1001# 1001 1003# 1003 1005# 1005
1007# 1007 1009# 1009 1011# 1011 1013# 1013 1015# 1015 1017# 1017 1019# 1019
1114# 1114 1116# 1116 1118# 1118 1120# 1120 1122# 1122 1124# 1124 1126# 1126
1128# 1128 1130# 1130 1132# 1132 1134# 1134 1136# 1136 1138# 1138 1140# 1140
1142# 1142 1144# 1144 1146# 1146 1148# 1148 1150# 1150 1152# 1152 1154# 1154
1156# 1156 1158# 1158 1160# 1160 1162# 1162 1164# 1164 1166# 1166 1168# 1168
1170# 1170 1172# 1172 1174# 1174 1176# 1176 1178# 1178 1181# 1181 1183# 1183
1185# 1185 1187# 1187 1189# 1189 1191# 1191 1193# 1193 1195# 1195 1197# 1197
1199# 1199 1201# 1201 1203# 1203 1205# 1205 1207# 1207 1209# 1209 1211# 1211
1213# 1213 1215# 1215 1217# 1217 1219# 1219 1221# 1221 1223# 1223 1225# 1225
1227# 1227 1229# 1229 1231# 1231 1233# 1233 1235# 1235 1237# 1237 1239# 1239
1241# 1241 1243# 1243 1246# 1246 1248# 1248 1250# 1250 1252# 1252 1254# 1254
1256# 1256 1258# 1258 1260# 1260 1262# 1262 1264# 1264 1266# 1266 1268# 1268
1270# 1270 1272# 1272 1274# 1274 1276# 1276 1278# 1278 1280# 1280 1282# 1282 SEQ 1359
1284# 1284 1286# 1286 1288# 1288 1290# 1290 1292# 1292 1294# 1294 1296# 1296
1298# 1298 1300# 1300 1302# 1302 1304# 1304 1306# 1306 1308# 1308 1311# 1311
1313# 1313 1315# 1315 1317# 1317 1319# 1319 1321# 1321 1323# 1323 1325# 1325
1327# 1327 1329# 1329 1331# 1331 1333# 1333 1335# 1335 1337# 1337 1339# 1339
1341# 1341 1343# 1343 1345# 1345 1347# 1347 1349# 1349 1351# 1351 1353# 1353
1355# 1355 1357# 1357 1359# 1359 1361# 1361 1363# 1363 1365# 1365 1367# 1367
1369# 1369 1371# 1371 1373# 1373 1376# 1376 1378# 1378 1472# 1472 1474# 1474
1476# 1476 1478# 1478 1480# 1480 1482# 1482 1484# 1484 1486# 1486 1488# 1488
1490# 1490 1492# 1492 1494# 1494 1496# 1496 1498# 1498 1500# 1500 1502# 1502
1504# 1504 1506# 1506 1508# 1508 1510# 1510 1512# 1512 1514# 1514 1516# 1516
1518# 1518 1520# 1520 1522# 1522 1524# 1524 1526# 1526 1528# 1528 1530# 1530
1532# 1532 1534# 1534 1536# 1536 1538# 1538 1540# 1540 1542# 1542 1544# 1544
1546# 1546 1548# 1548 1550# 1550 1552# 1552 1554# 1554 1556# 1556 1558# 1558
1560# 1560 1562# 1562 1564# 1564 1566# 1566 1568# 1568 1570# 1570 1572# 1572
1575# 1575 1577# 1577 1671# 1671 1673# 1673 1675# 1675 1677# 1677 1679# 1679
1681# 1681 1683# 1683 1685# 1685 1687# 1687 1689# 1689 1691# 1691 1693# 1693
1695# 1695 1697# 1697 1699# 1699 1701# 1701 1703# 1703 1705# 1705 1707# 1707
1709# 1709 1711# 1711 1713# 1713 1715# 1715 1717# 1717 1719# 1719 1721# 1721
1723# 1723 1725# 1725 1727# 1727 1729# 1729 1731# 1731 1733# 1733 1735# 1735
1737# 1737 1739# 1739 1741# 1741 1743# 1743 1745# 1745 1747# 1747 1749# 1749
1751# 1751 1753# 1753 1755# 1755 1757# 1757 1759# 1759 1761# 1761 1763# 1763
1765# 1765 1767# 1767 1769# 1769 1771# 1771 1774# 1774 1776# 1776 1869# 1869
1871# 1871 1873# 1873 1875# 1875 1877# 1877 1879# 1879 1881# 1881 1883# 1883
1885# 1885 1887# 1887 1889# 1889 1891# 1891 1893# 1893 1895# 1895 1897# 1897
1899# 1899 1901# 1901 1903# 1903 1905# 1905 1907# 1907 1909# 1909 1911# 1911
1913# 1913 1915# 1915 1917# 1917 1919# 1919 1921# 1921 1923# 1923 1925# 1925
1927# 1927 1929# 1929 1931# 1931 1933# 1933 1935# 1935 1937# 1937 1939# 1939
1941# 1941 1943# 1943 1945# 1945 1947# 1947 1949# 1949 1951# 1951 1953# 1953
1955# 1955 1957# 1957 1959# 1959 1961# 1961 1963# 1963 1965# 1965 1967# 1967
1969# 1969 1972# 1972 2044# 2044 2046# 2046 2049# 2049 2051# 2051 2053# 2053
2055# 2055 2057# 2057 2060# 2060 2062# 2062 2064# 2064 2066# 2066 2069# 2069
2071# 2071 2073# 2073 2075# 2075 2078# 2078 2080# 2080 2082# 2082 2084# 2084
2087# 2087 2089# 2089 2091# 2091 2093# 2093 2096# 2096 2098# 2098 2100# 2100
2102# 2102 2105# 2105 2107# 2107 2109# 2109 2111# 2111 2114# 2114 2116# 2116
2118# 2118 2120# 2120 2123# 2123 2125# 2125 2127# 2127 2129# 2129 2132# 2132
2134# 2134 2136# 2136 2138# 2138 2141# 2141 2143# 2143 2145# 2145 2147# 2147
2150# 2150 2152# 2152 2154# 2154 2156# 2156 2159# 2159 2161# 2161 2163# 2163
2165# 2165 2168# 2168 2170# 2170 2172# 2172 2174# 2174 2177# 2177 2179# 2179
2181# 2181 2183# 2183 2186# 2186 2188# 2188 2190# 2190 2192# 2192 2195# 2195
2197# 2197 2199# 2199 2201# 2201 2203# 2203 2206# 2206 2208# 2208 2210# 2210
2212# 2212 2214# 2214 2217# 2217 2219# 2219 2221# 2221 2223# 2223 2225# 2225
2228# 2228 2230# 2230 2232# 2232 2234# 2234 2236# 2236 2239# 2239 2241# 2241
2243# 2243 2245# 2245 2247# 2247 2250# 2250 2252# 2252 2254# 2254 2256# 2256
2258# 2258 2261# 2261 2263# 2263 2265# 2265 2267# 2267 2269# 2269 2272# 2272
2274# 2274 2276# 2276 2278# 2278 2280# 2280 2283# 2283 2285# 2285 2287# 2287
2289# 2289 2291# 2291 2294# 2294 2296# 2296 2298# 2298 2300# 2300 2302# 2302
2305# 2305 2307# 2307 2309# 2309 2311# 2311 2313# 2313 2316# 2316 2318# 2318
2320# 2320 2322# 2322 2324# 2324 2327# 2327 2329# 2329 2331# 2331 2333# 2333
2335# 2335 2338# 2338 2340# 2340 2342# 2342 2344# 2344 2346# 2346 2349# 2349
2351# 2351 2353# 2353 2355# 2355 2357# 2357 2360# 2360 2362# 2362 2364# 2364
2366# 2366 2368# 2368 2373# 2373 2378# 2378
%MR 169# 169 171# 171 173# 173 176# 176 178# 178 180# 180 183# 183
185# 185 187# 187 190# 190 192# 192 194# 194 287# 287 289# 289 SEQ 1360
294# 294 296# 296 298# 298 300# 300 302# 302 304# 304 309# 309
311# 311 313# 313 315# 315 317# 317 319# 319 324# 324 326# 326
328# 328 330# 330 332# 332 334# 334 339# 339 341# 341 343# 343
345# 345 347# 347 349# 349 352# 352 592# 592 594# 594 596# 596
598# 598 600# 600 602# 602 604# 604 606# 606 608# 608 610# 610
612# 612 614# 614 619# 619 621# 621 623# 623 625# 625 627# 627
629# 629 631# 631 633# 633 635# 635 637# 637 639# 639 641# 641
646# 646 648# 648 650# 650 652# 652 654# 654 656# 656 658# 658
660# 660 662# 662 664# 664 666# 666 668# 668 673# 673 675# 675
677# 677 679# 679 681# 681 683# 683 685# 685 687# 687 689# 689
691# 691 693# 693 695# 695 700# 700 702# 702 704# 704 706# 706
708# 708 710# 710 712# 712 714# 714 716# 716 718# 718 720# 720
722# 722 727# 727 729# 729 731# 731 733# 733 735# 735 737# 737
739# 739 741# 741 743# 743 745# 745 747# 747 749# 749 754# 754
756# 756 758# 758 760# 760 762# 762 764# 764 766# 766 768# 768
770# 770 772# 772 774# 774 776# 776 781# 781 783# 783 785# 785
787# 787 789# 789 791# 791 793# 793 795# 795 797# 797 799# 799
801# 801 803# 803 808# 808 810# 810 812# 812 814# 814 816# 816
818# 818 820# 820 822# 822 824# 824 826# 826 828# 828 830# 830
835# 835 837# 837 839# 839 841# 841 843# 843 845# 845 847# 847
849# 849 851# 851 853# 853 855# 855 857# 857 862# 862 864# 864
866# 866 868# 868 870# 870 872# 872 874# 874 876# 876 878# 878
880# 880 882# 882 884# 884 889# 889 891# 891 893# 893 895# 895
897# 897 899# 899 901# 901 903# 903 905# 905 907# 907 909# 909
911# 911 916# 916 918# 918 920# 920 922# 922 924# 924 926# 926
928# 928 930# 930 932# 932 934# 934 936# 936 938# 938 943# 943
945# 945 947# 947 949# 949 951# 951 953# 953 955# 955 957# 957
959# 959 961# 961 963# 963 965# 965 970# 970 972# 972 974# 974
976# 976 978# 978 980# 980 982# 982 984# 984 986# 986 988# 988
990# 990 992# 992 997# 997 999# 999 1001# 1001 1003# 1003 1005# 1005
1007# 1007 1009# 1009 1011# 1011 1013# 1013 1015# 1015 1017# 1017 1019# 1019
1114# 1114 1116# 1116 1118# 1118 1120# 1120 1122# 1122 1124# 1124 1126# 1126
1128# 1128 1130# 1130 1132# 1132 1134# 1134 1136# 1136 1138# 1138 1140# 1140
1142# 1142 1144# 1144 1146# 1146 1148# 1148 1150# 1150 1152# 1152 1154# 1154
1156# 1156 1158# 1158 1160# 1160 1162# 1162 1164# 1164 1166# 1166 1168# 1168
1170# 1170 1172# 1172 1174# 1174 1176# 1176 1178# 1178 1181# 1181 1183# 1183
1185# 1185 1187# 1187 1189# 1189 1191# 1191 1193# 1193 1195# 1195 1197# 1197
1199# 1199 1201# 1201 1203# 1203 1205# 1205 1207# 1207 1209# 1209 1211# 1211
1213# 1213 1215# 1215 1217# 1217 1219# 1219 1221# 1221 1223# 1223 1225# 1225
1227# 1227 1229# 1229 1231# 1231 1233# 1233 1235# 1235 1237# 1237 1239# 1239
1241# 1241 1243# 1243 1246# 1246 1248# 1248 1250# 1250 1252# 1252 1254# 1254
1256# 1256 1258# 1258 1260# 1260 1262# 1262 1264# 1264 1266# 1266 1268# 1268
1270# 1270 1272# 1272 1274# 1274 1276# 1276 1278# 1278 1280# 1280 1282# 1282
1284# 1284 1286# 1286 1288# 1288 1290# 1290 1292# 1292 1294# 1294 1296# 1296
1298# 1298 1300# 1300 1302# 1302 1304# 1304 1306# 1306 1308# 1308 1311# 1311
1313# 1313 1315# 1315 1317# 1317 1319# 1319 1321# 1321 1323# 1323 1325# 1325
1327# 1327 1329# 1329 1331# 1331 1333# 1333 1335# 1335 1337# 1337 1339# 1339
1341# 1341 1343# 1343 1345# 1345 1347# 1347 1349# 1349 1351# 1351 1353# 1353
1355# 1355 1357# 1357 1359# 1359 1361# 1361 1363# 1363 1365# 1365 1367# 1367
1369# 1369 1371# 1371 1373# 1373 1376# 1376 1378# 1378 1472# 1472 1474# 1474
1476# 1476 1478# 1478 1480# 1480 1482# 1482 1484# 1484 1486# 1486 1488# 1488
1490# 1490 1492# 1492 1494# 1494 1496# 1496 1498# 1498 1500# 1500 1502# 1502
1504# 1504 1506# 1506 1508# 1508 1510# 1510 1512# 1512 1514# 1514 1516# 1516 SEQ 1361
1518# 1518 1520# 1520 1522# 1522 1524# 1524 1526# 1526 1528# 1528 1530# 1530
1532# 1532 1534# 1534 1536# 1536 1538# 1538 1540# 1540 1542# 1542 1544# 1544
1546# 1546 1548# 1548 1550# 1550 1552# 1552 1554# 1554 1556# 1556 1558# 1558
1560# 1560 1562# 1562 1564# 1564 1566# 1566 1568# 1568 1570# 1570 1572# 1572
1575# 1575 1577# 1577 1671# 1671 1673# 1673 1675# 1675 1677# 1677 1679# 1679
1681# 1681 1683# 1683 1685# 1685 1687# 1687 1689# 1689 1691# 1691 1693# 1693
1695# 1695 1697# 1697 1699# 1699 1701# 1701 1703# 1703 1705# 1705 1707# 1707
1709# 1709 1711# 1711 1713# 1713 1715# 1715 1717# 1717 1719# 1719 1721# 1721
1723# 1723 1725# 1725 1727# 1727 1729# 1729 1731# 1731 1733# 1733 1735# 1735
1737# 1737 1739# 1739 1741# 1741 1743# 1743 1745# 1745 1747# 1747 1749# 1749
1751# 1751 1753# 1753 1755# 1755 1757# 1757 1759# 1759 1761# 1761 1763# 1763
1765# 1765 1767# 1767 1769# 1769 1771# 1771 1774# 1774 1776# 1776 1869# 1869
1871# 1871 1873# 1873 1875# 1875 1877# 1877 1879# 1879 1881# 1881 1883# 1883
1885# 1885 1887# 1887 1889# 1889 1891# 1891 1893# 1893 1895# 1895 1897# 1897
1899# 1899 1901# 1901 1903# 1903 1905# 1905 1907# 1907 1909# 1909 1911# 1911
1913# 1913 1915# 1915 1917# 1917 1919# 1919 1921# 1921 1923# 1923 1925# 1925
1927# 1927 1929# 1929 1931# 1931 1933# 1933 1935# 1935 1937# 1937 1939# 1939
1941# 1941 1943# 1943 1945# 1945 1947# 1947 1949# 1949 1951# 1951 1953# 1953
1955# 1955 1957# 1957 1959# 1959 1961# 1961 1963# 1963 1965# 1965 1967# 1967
1969# 1969 1972# 1972 2044# 2044 2046# 2046 2049# 2049 2051# 2051 2053# 2053
2055# 2055 2057# 2057 2060# 2060 2062# 2062 2064# 2064 2066# 2066 2069# 2069
2071# 2071 2073# 2073 2075# 2075 2078# 2078 2080# 2080 2082# 2082 2084# 2084
2087# 2087 2089# 2089 2091# 2091 2093# 2093 2096# 2096 2098# 2098 2100# 2100
2102# 2102 2105# 2105 2107# 2107 2109# 2109 2111# 2111 2114# 2114 2116# 2116
2118# 2118 2120# 2120 2123# 2123 2125# 2125 2127# 2127 2129# 2129 2132# 2132
2134# 2134 2136# 2136 2138# 2138 2141# 2141 2143# 2143 2145# 2145 2147# 2147
2150# 2150 2152# 2152 2154# 2154 2156# 2156 2159# 2159 2161# 2161 2163# 2163
2165# 2165 2168# 2168 2170# 2170 2172# 2172 2174# 2174 2177# 2177 2179# 2179
2181# 2181 2183# 2183 2186# 2186 2188# 2188 2190# 2190 2192# 2192 2195# 2195
2197# 2197 2199# 2199 2201# 2201 2203# 2203 2206# 2206 2208# 2208 2210# 2210
2212# 2212 2214# 2214 2217# 2217 2219# 2219 2221# 2221 2223# 2223 2225# 2225
2228# 2228 2230# 2230 2232# 2232 2234# 2234 2236# 2236 2239# 2239 2241# 2241
2243# 2243 2245# 2245 2247# 2247 2250# 2250 2252# 2252 2254# 2254 2256# 2256
2258# 2258 2261# 2261 2263# 2263 2265# 2265 2267# 2267 2269# 2269 2272# 2272
2274# 2274 2276# 2276 2278# 2278 2280# 2280 2283# 2283 2285# 2285 2287# 2287
2289# 2289 2291# 2291 2294# 2294 2296# 2296 2298# 2298 2300# 2300 2302# 2302
2305# 2305 2307# 2307 2309# 2309 2311# 2311 2313# 2313 2316# 2316 2318# 2318
2320# 2320 2322# 2322 2324# 2324 2327# 2327 2329# 2329 2331# 2331 2333# 2333
2335# 2335 2338# 2338 2340# 2340 2342# 2342 2344# 2344 2346# 2346 2349# 2349
2351# 2351 2353# 2353 2355# 2355 2357# 2357 2360# 2360 2362# 2362 2364# 2364
2366# 2366 2368# 2368 2373# 2373 2378# 2378
.LA 183 185 596 602 608 614 623 629 635 641 650 656 662 668
677 683 689 695 704 710 716 722 731 737 743 749 758 764
770 776 785 791 797 803 812 818 824 830 839 845 851 857
866 872 878 884 893 899 905 911 920 926 932 938 947 953
959 965 974 980 986 992 1001 1007 1013 1019 1118 1122 1126 1130
1134 1138 1142 1146 1150 1154 1158 1162 1166 1170 1174 1178 1183 1187
1191 1195 1199 1203 1207 1211 1215 1219 1223 1227 1231 1235 1239 1243
1248 1252 1256 1260 1264 1268 1272 1276 1280 1284 1288 1292 1296 1300
1304 1308 1313 1317 1321 1325 1329 1333 1337 1341 1345 1349 1353 1357
1361 1365 1369 1373 1376 1478 1484 1490 1496 1502 1508 1514 1520 1526
1532 1538 1544 1550 1556 1562 1568 1570 1575 1679 1769 1774 1875 1881
1887 1893 1899 1905 1911 1917 1923 1929 1935 1941 1947 1953 1959 1965 SEQ 1362
1967 1972 2046 2049 2051 2053 2055 2060 2062 2064 2069 2071 2073 2078
2080 2082 2087 2089 2091 2096 2098 2100 2105 2107 2109 2114 2116 2118
2123 2125 2127 2132 2134 2136 2141 2143 2145 2150 2152 2154 2159 2161
2163 2168 2170 2172 2177 2179 2181 2186 2188 2190 2195 2197 2199 2201
2206 2208 2210 2212 2217 2219 2221 2223 2228 2230 2232 2234 2239 2241
2243 2245 2250 2252 2254 2256 2261 2263 2265 2267 2272 2274 2276 2278
2283 2285 2287 2289 2294 2296 2298 2300 2305 2307 2309 2311 2316 2318
2320 2322 2327 2329 2331 2333 2338 2340 2342 2344 2349 2351 2353 2355
2360 2362 2364 2366
.LADDR 169 287 592 619 646 673 700 727 754 781 808 835 862 889
916 943 970 997 1114 1472 1671 1869 2044 2049 2195 2373 2378
.LAND 169 287 592 619 646 673 700 727 754 781 808 835 862 889
916 943 970 997 1116 1120 1124 1128 1132 1136 1140 1144 1148 1152
1156 1160 1164 1168 1172 1176 1181 1185 1189 1193 1197 1201 1205 1209
1213 1217 1221 1225 1229 1233 1237 1241 1246 1250 1254 1258 1262 1266
1270 1274 1278 1282 1286 1290 1294 1298 1302 1306 1311 1315 1319 1323
1327 1331 1335 1339 1343 1347 1351 1355 1359 1363 1367 1371 1476 1482
1488 1494 1500 1506 1512 1518 1524 1530 1536 1542 1548 1554 1560 1566
1675 1681 1687 1693 1699 1705 1711 1717 1723 1729 1735 1741 1747 1753
1759 1765 1873 1879 1885 1891 1897 1903 1909 1915 1921 1927 1933 1939
1945 1951 1957 1963 2046 2049 2053 2062 2071 2080 2089 2098 2107 2116
2125 2134 2143 2152 2161 2170 2179 2188 2195 2199 2206 2210 2217 2221
2228 2232 2239 2243 2250 2254 2261 2265 2272 2276 2283 2287 2294 2298
2305 2309 2316 2320 2327 2331 2338 2342 2349 2353 2360 2364
.LB 176 190 592 594 598 600 604 606 610 612 619 621 625 627
631 633 637 639 646 648 652 654 658 660 664 666 673 675
679 681 685 687 691 693 700 702 706 708 712 714 718 720
727 729 733 735 739 741 745 747 754 756 760 762 766 768
772 774 781 783 787 789 793 795 799 801 808 810 814 816
820 822 826 828 835 837 841 843 847 849 853 855 862 864
868 870 874 876 880 882 889 891 895 897 901 903 907 909
916 918 922 924 928 930 934 936 943 945 949 951 955 957
961 963 970 972 976 978 982 984 988 990 997 999 1003 1005
1009 1011 1015 1017 1116 1118 1120 1122 1124 1126 1128 1130 1132 1134
1136 1138 1140 1142 1144 1146 1148 1150 1152 1154 1156 1158 1160 1162
1164 1166 1168 1170 1172 1174 1176 1178 1181 1183 1185 1187 1189 1191
1193 1195 1197 1199 1201 1203 1205 1207 1209 1211 1213 1215 1217 1219
1221 1223 1225 1227 1229 1231 1233 1235 1237 1239 1241 1243 1246 1248
1250 1252 1254 1256 1258 1260 1262 1264 1266 1268 1270 1272 1274 1276
1278 1280 1282 1284 1286 1288 1290 1292 1294 1296 1298 1300 1302 1304
1306 1308 1311 1313 1315 1317 1319 1321 1323 1325 1327 1329 1331 1333
1335 1337 1339 1341 1343 1345 1347 1349 1351 1353 1355 1357 1359 1361
1363 1365 1367 1369 1371 1373 1476 1480 1482 1486 1488 1492 1494 1498
1500 1504 1506 1510 1512 1516 1518 1522 1524 1528 1530 1534 1536 1540
1542 1546 1548 1552 1554 1558 1560 1564 1566 1570 1675 1677 1679 1681
1683 1685 1687 1689 1691 1693 1695 1697 1699 1701 1703 1705 1707 1709
1711 1713 1715 1717 1719 1721 1723 1725 1727 1729 1731 1733 1735 1737
1739 1741 1743 1745 1747 1749 1751 1753 1755 1757 1759 1761 1763 1765
1767 1769 1771 1873 1875 1877 1879 1881 1883 1885 1887 1889 1891 1893
1895 1897 1899 1901 1903 1905 1907 1909 1911 1913 1915 1917 1919 1921
1923 1925 1927 1929 1931 1933 1935 1937 1939 1941 1943 1945 1947 1949
1951 1953 1955 1957 1959 1961 1963 1965 1967 1969 2046 2049 2051 2053
2060 2062 2069 2071 2078 2080 2087 2089 2096 2098 2105 2107 2114 2116 SEQ 1363
2123 2125 2132 2134 2141 2143 2150 2152 2159 2161 2168 2170 2177 2179
2186 2188 2195 2197 2199 2206 2208 2210 2217 2219 2221 2228 2230 2232
2239 2241 2243 2250 2252 2254 2261 2263 2265 2272 2274 2276 2283 2285
2287 2294 2296 2298 2305 2307 2309 2316 2318 2320 2327 2329 2331 2338
2340 2342 2349 2351 2353 2360 2362 2364
.LBAD 2373 2378
.LCCFZ 2055 2064 2073 2082 2091 2100 2109 2118 2127 2136 2145 2154 2163 2172
2181 2190 2201 2212 2223 2234 2245 2256 2267 2278 2289 2300 2311 2322
2333 2344 2355 2366
.LCENA 2055 2064 2073 2082 2091 2100 2109 2118 2127 2136 2145 2154 2163 2172
2181 2190 2201 2212 2223 2234 2245 2256 2267 2278 2289 2300 2311 2322
2333 2344 2355 2366
.LCJP 2055 2064 2073 2082 2091 2100 2109 2118 2127 2136 2145 2154 2163 2172
2181 2190 2201 2212 2223 2234 2245 2256 2267 2278 2289 2300 2311 2322
2333 2344 2355 2366
.LCONT 171 178 185 192 289 296 298 300 302 311 313 315 317 326
328 330 332 341 343 345 347 594 600 606 612 621 627 633
639 648 654 660 666 675 681 687 693 702 708 714 720 729
735 741 747 756 762 768 774 783 789 795 801 810 816 822
828 837 843 849 855 864 870 876 882 891 897 903 909 918
924 930 936 945 951 957 963 972 978 984 990 999 1005 1011
1017 1116 1118 1120 1122 1124 1126 1128 1130 1132 1134 1136 1138 1140
1142 1144 1146 1148 1150 1152 1154 1156 1158 1160 1162 1164 1166 1168
1170 1172 1174 1176 1178 1181 1183 1185 1187 1189 1191 1193 1195 1197
1199 1201 1203 1205 1207 1209 1211 1213 1215 1217 1219 1221 1223 1225
1227 1229 1231 1233 1235 1237 1239 1241 1243 1246 1248 1250 1252 1254
1256 1258 1260 1262 1264 1266 1268 1270 1272 1274 1276 1278 1280 1282
1284 1286 1288 1290 1292 1294 1296 1298 1300 1302 1304 1306 1308 1311
1313 1315 1317 1319 1321 1323 1325 1327 1329 1331 1333 1335 1337 1339
1341 1343 1345 1347 1349 1351 1353 1355 1357 1359 1361 1363 1365 1367
1369 1371 1373 1476 1478 1480 1482 1484 1486 1488 1490 1492 1494 1496
1498 1500 1502 1504 1506 1508 1510 1512 1514 1516 1518 1520 1522 1524
1526 1528 1530 1532 1534 1536 1538 1540 1542 1544 1546 1548 1550 1552
1554 1556 1558 1560 1562 1564 1566 1568 1570 1675 1677 1679 1681 1683
1685 1687 1689 1691 1693 1695 1697 1699 1701 1703 1705 1707 1709 1711
1713 1715 1717 1719 1721 1723 1725 1727 1729 1731 1733 1735 1737 1739
1741 1743 1745 1747 1749 1751 1753 1755 1757 1759 1761 1763 1765 1767
1769 1873 1875 1877 1879 1881 1883 1885 1887 1889 1891 1893 1895 1897
1899 1901 1903 1905 1907 1909 1911 1913 1915 1917 1919 1921 1923 1925
1927 1929 1931 1933 1935 1937 1939 1941 1943 1945 1947 1949 1951 1953
1955 1957 1959 1961 1963 1965 1967 2051 2053 2060 2062 2069 2071 2078
2080 2087 2089 2096 2098 2105 2107 2114 2116 2123 2125 2132 2134 2141
2143 2150 2152 2159 2161 2168 2170 2177 2179 2186 2188 2195 2197 2199
2206 2208 2210 2217 2219 2221 2228 2230 2232 2239 2241 2243 2250 2252
2254 2261 2263 2265 2272 2274 2276 2283 2285 2287 2294 2296 2298 2305
2307 2309 2316 2318 2320 2327 2329 2331 2338 2340 2342 2349 2351 2353
2360 2362 2364
.LCRY 171 289 594 621 648 675 702 729 756 783 810 837 864 891
918 945 972 999
.LD 169 171 173 176 178 180 183 185 187 190 192 194 287 289
294 296 298 300 302 304 309 311 313 315 317 319 324 326
328 330 332 334 339 341 343 345 347 349 352 592 594 596
598 600 602 604 606 608 610 612 614 619 621 623 625 627 SEQ 1364
629 631 633 635 637 639 641 646 648 650 652 654 656 658
660 662 664 666 668 673 675 677 679 681 683 685 687 689
691 693 695 700 702 704 706 708 710 712 714 716 718 720
722 727 729 731 733 735 737 739 741 743 745 747 749 754
756 758 760 762 764 766 768 770 772 774 776 781 783 785
787 789 791 793 795 797 799 801 803 808 810 812 814 816
818 820 822 824 826 828 830 835 837 839 841 843 845 847
849 851 853 855 857 862 864 866 868 870 872 874 876 878
880 882 884 889 891 893 895 897 899 901 903 905 907 909
911 916 918 920 922 924 926 928 930 932 934 936 938 943
945 947 949 951 953 955 957 959 961 963 965 970 972 974
976 978 980 982 984 986 988 990 992 997 999 1001 1003 1005
1007 1009 1011 1013 1015 1017 1019 1114 1116 1118 1120 1122 1124 1126
1128 1130 1132 1134 1136 1138 1140 1142 1144 1146 1148 1150 1152 1154
1156 1158 1160 1162 1164 1166 1168 1170 1172 1174 1176 1178 1181 1183
1185 1187 1189 1191 1193 1195 1197 1199 1201 1203 1205 1207 1209 1211
1213 1215 1217 1219 1221 1223 1225 1227 1229 1231 1233 1235 1237 1239
1241 1243 1246 1248 1250 1252 1254 1256 1258 1260 1262 1264 1266 1268
1270 1272 1274 1276 1278 1280 1282 1284 1286 1288 1290 1292 1294 1296
1298 1300 1302 1304 1306 1308 1311 1313 1315 1317 1319 1321 1323 1325
1327 1329 1331 1333 1335 1337 1339 1341 1343 1345 1347 1349 1351 1353
1355 1357 1359 1361 1363 1365 1367 1369 1371 1373 1472 1474 1476 1478
1480 1482 1484 1486 1488 1490 1492 1494 1496 1498 1500 1502 1504 1506
1508 1510 1512 1514 1516 1518 1520 1522 1524 1526 1528 1530 1532 1534
1536 1538 1540 1542 1544 1546 1548 1550 1552 1554 1556 1558 1560 1562
1564 1566 1568 1570 1572 1671 1673 1675 1677 1679 1681 1683 1685 1687
1689 1691 1693 1695 1697 1699 1701 1703 1705 1707 1709 1711 1713 1715
1717 1719 1721 1723 1725 1727 1729 1731 1733 1735 1737 1739 1741 1743
1745 1747 1749 1751 1753 1755 1757 1759 1761 1763 1765 1767 1769 1771
1869 1871 1873 1875 1877 1879 1881 1883 1885 1887 1889 1891 1893 1895
1897 1899 1901 1903 1905 1907 1909 1911 1913 1915 1917 1919 1921 1923
1925 1927 1929 1931 1933 1935 1937 1939 1941 1943 1945 1947 1949 1951
1953 1955 1957 1959 1961 1963 1965 1967 1969 1972 2046 2049 2051 2053
2060 2062 2069 2071 2078 2080 2087 2089 2096 2098 2105 2107 2114 2116
2123 2125 2132 2134 2141 2143 2150 2152 2159 2161 2168 2170 2177 2179
2186 2188 2195 2197 2199 2206 2208 2210 2217 2219 2221 2228 2230 2232
2239 2241 2243 2250 2252 2254 2261 2263 2265 2272 2274 2276 2283 2285
2287 2294 2296 2298 2305 2307 2309 2316 2318 2320 2327 2329 2331 2338
2340 2342 2349 2351 2353 2360 2362 2364
.LJ 169 173 176 180 183 187 190 194 287 294 304 309 319 324
334 339 349 352 592 596 598 602 604 608 610 614 619 623
625 629 631 635 637 641 646 650 652 656 658 662 664 668
673 677 679 683 685 689 691 695 700 704 706 710 712 716
718 722 727 731 733 737 739 743 745 749 754 758 760 764
766 770 772 776 781 785 787 791 793 797 799 803 808 812
814 818 820 824 826 830 835 839 841 845 847 851 853 857
862 866 868 872 874 878 880 884 889 893 895 899 901 905
907 911 916 920 922 926 928 932 934 938 943 947 949 953
955 959 961 965 970 974 976 980 982 986 988 992 997 1001
1003 1007 1009 1013 1015 1019 1114 1376 1378 1472 1474 1572 1575 1577
1671 1673 1771 1774 1776 1869 1871 1969 1972 2044 2049 2055 2057 2064
2066 2073 2075 2082 2084 2091 2093 2100 2102 2109 2111 2118 2120 2127
2129 2136 2138 2145 2147 2154 2156 2163 2165 2172 2174 2181 2183 2190 SEQ 1365
2192 2201 2203 2212 2214 2223 2225 2234 2236 2245 2247 2256 2258 2267
2269 2278 2280 2289 2291 2300 2302 2311 2313 2322 2324 2333 2335 2344
2346 2355 2357 2366 2368 2373 2378
.LJMAP 169 173 176 180 183 187 190 194 287 352 592 596 598 602
604 608 610 614 619 623 625 629 631 635 637 641 646 650
652 656 658 662 664 668 673 677 679 683 685 689 691 695
700 704 706 710 712 716 718 722 727 731 733 737 739 743
745 749 754 758 760 764 766 770 772 776 781 785 787 791
793 797 799 803 808 812 814 818 820 824 826 830 835 839
841 845 847 851 853 857 862 866 868 872 874 878 880 884
889 893 895 899 901 905 907 911 916 920 922 926 928 932
934 938 943 947 949 953 955 959 961 965 970 974 976 980
982 986 988 992 997 1001 1003 1007 1009 1013 1015 1019 1114 1376
1378 1472 1575 1577 1671 1774 1776 1869 1972 2044 2049 2057 2066 2075
2084 2093 2102 2111 2120 2129 2138 2147 2156 2165 2174 2183 2192 2203
2214 2225 2236 2247 2258 2269 2280 2291 2302 2313 2324 2335 2346 2357
2368 2373 2378
.LJZ 2046
.LLDCT 294 309 324 339 1474 1673 1871
.LMGC 173 180 187 194 352 596 602 608 614 623 629 635 641 650
656 662 668 677 683 689 695 704 710 716 722 731 737 743
749 758 764 770 776 785 791 797 803 812 818 824 830 839
845 851 857 866 872 878 884 893 899 905 911 920 926 932
938 947 953 959 965 974 980 986 992 1001 1007 1013 1019 1114
1376 1472 1575 1671 1774 1869 1972 2053 2062 2071 2080 2089 2098 2107
2116 2125 2134 2143 2152 2161 2170 2179 2188 2199 2210 2221 2232 2243
2254 2265 2276 2287 2298 2309 2320 2331 2342 2353 2364
.LNAND 1313 1317 1321 1325 1329 1333 1337 1341 1345 1349 1353 1357 1361 1365
1369 1373 1496 1498 1520 1522 1544 1546 1568 1570 1695 1697 1719 1721
1743 1745 1767 1769 1893 1895 1917 1919 1941 1943 1965 1967
.LOENA 173 180 187 194 352 596 602 608 614 623 629 635 641 650
656 662 668 677 683 689 695 704 710 716 722 731 737 743
749 758 764 770 776 785 791 797 803 812 818 824 830 839
845 851 857 866 872 878 884 893 899 905 911 920 926 932
938 947 953 959 965 974 980 986 992 1001 1007 1013 1019 1376
1575 1774 1972
.LOR 173 176 178 180 183 185 187 190 192 194 296 298 300 302
304 311 313 315 317 319 326 328 330 332 334 341 343 345
347 349 352 596 598 600 602 604 606 608 610 612 614 623
625 627 629 631 633 635 637 639 641 650 652 654 656 658
660 662 664 666 668 677 679 681 683 685 687 689 691 693
695 704 706 708 710 712 714 716 718 720 722 731 733 735
737 739 741 743 745 747 749 758 760 762 764 766 768 770
772 774 776 785 787 789 791 793 795 797 799 801 803 812
814 816 818 820 822 824 826 828 830 839 841 843 845 847
849 851 853 855 857 866 868 870 872 874 876 878 880 882
884 893 895 897 899 901 903 905 907 909 911 920 922 924
926 928 930 932 934 936 938 947 949 951 953 955 957 959
961 963 965 974 976 978 980 982 984 986 988 990 992 1001
1003 1005 1007 1009 1011 1013 1015 1017 1019 1114 1183 1187 1191 1195
1199 1203 1207 1211 1215 1219 1223 1227 1231 1235 1239 1243 1376 1472
1484 1486 1508 1510 1532 1534 1556 1558 1575 1671 1683 1685 1707 1709
1731 1733 1755 1757 1771 1774 1869 1881 1883 1905 1907 1929 1931 1953 SEQ 1366
1955 1969 1972 2055 2064 2073 2082 2091 2100 2109 2118 2127 2136 2145
2154 2163 2172 2181 2190 2201 2212 2223 2234 2245 2256 2267 2278 2289
2300 2311 2322 2333 2344 2355 2366
.LPLUS 171 289 594 621 648 675 702 729 756 783 810 837 864 891
918 945 972 999 1118 1122 1126 1130 1134 1138 1142 1146 1150 1154
1158 1162 1166 1170 1174 1178 1478 1480 1502 1504 1526 1528 1550 1552
1677 1679 1701 1703 1725 1727 1749 1751 1875 1877 1899 1901 1923 1925
1947 1949
.LRPCT 304 319 334 349 1572 1771 1969
.LS0A 169 183 185 287 596 602 608 614 623 629 635 641 650 656
662 668 677 683 689 695 704 710 716 722 731 737 743 749
758 764 770 776 785 791 797 803 812 818 824 830 839 845
851 857 866 872 878 884 893 899 905 911 920 926 932 938
947 953 959 965 974 980 986 992 1001 1007 1013 1019 1116 1118
1120 1122 1124 1126 1128 1130 1132 1134 1136 1138 1140 1142 1144 1146
1148 1150 1152 1154 1156 1158 1160 1162 1164 1166 1168 1170 1172 1174
1176 1178 1181 1183 1185 1187 1189 1191 1193 1195 1197 1199 1201 1203
1205 1207 1209 1211 1213 1215 1217 1219 1221 1223 1225 1227 1229 1231
1233 1235 1237 1239 1241 1243 1246 1248 1250 1252 1254 1256 1258 1260
1262 1264 1266 1268 1270 1272 1274 1276 1278 1280 1282 1284 1286 1288
1290 1292 1294 1296 1298 1300 1302 1304 1306 1308 1311 1313 1315 1317
1319 1321 1323 1325 1327 1329 1331 1333 1335 1337 1339 1341 1343 1345
1347 1349 1351 1353 1355 1357 1359 1361 1363 1365 1367 1369 1371 1373
1376 1476 1478 1482 1484 1488 1490 1494 1496 1500 1502 1506 1508 1512
1514 1518 1520 1524 1526 1530 1532 1536 1538 1542 1544 1548 1550 1554
1556 1560 1562 1566 1568 1575 1675 1679 1681 1685 1687 1691 1693 1697
1699 1703 1705 1709 1711 1715 1717 1721 1723 1727 1729 1733 1735 1739
1741 1745 1747 1751 1753 1757 1759 1763 1765 1769 1774 1873 1875 1879
1881 1885 1887 1891 1893 1897 1899 1903 1905 1909 1911 1915 1917 1921
1923 1927 1929 1933 1935 1939 1941 1945 1947 1951 1953 1957 1959 1963
1965 1972 2046 2049 2051 2055 2060 2064 2069 2073 2078 2082 2087 2091
2096 2100 2105 2109 2114 2118 2123 2127 2132 2136 2141 2145 2150 2154
2159 2163 2168 2172 2177 2181 2186 2190 2195 2197 2201 2206 2208 2212
2217 2219 2223 2228 2230 2234 2239 2241 2245 2250 2252 2256 2261 2263
2267 2272 2274 2278 2283 2285 2289 2294 2296 2300 2305 2307 2311 2316
2318 2322 2327 2329 2333 2338 2340 2344 2349 2351 2355 2360 2362 2366
.LS0B 592 594 598 600 610 612 619 621 625 627 637 639 646 648
652 654 664 666 673 675 679 681 691 693 700 702 706 708
718 720 727 729 733 735 745 747 754 756 760 762 772 774
781 783 787 789 799 801 808 810 814 816 826 828 835 837
841 843 853 855 862 864 868 870 880 882 889 891 895 897
907 909 916 918 922 924 934 936 943 945 949 951 961 963
970 972 976 978 988 990 997 999 1003 1005 1015 1017 1677 1683
1689 1695 1701 1707 1713 1719 1725 1731 1737 1743 1749 1755 1761 1767
1771 1969
.LS0Q 171 173 176 178 180 187 190 192 194 289 296 298 300 302
304 311 313 315 317 319 326 328 330 332 334 341 343 345
347 349 352 604 606 631 633 658 660 685 687 712 714 739
741 766 768 793 795 820 822 847 849 874 876 901 903 928
930 955 957 982 984 1009 1011 1480 1486 1492 1498 1504 1510 1516
1522 1528 1534 1540 1546 1552 1558 1564 1570 1877 1883 1889 1895 1901
1907 1913 1919 1925 1931 1937 1943 1949 1955 1961 1967
.LSD0 1114 1472 1671 1869 SEQ 1367
.LSDA 2053 2062 2071 2080 2089 2098 2107 2116 2125 2134 2143 2152 2161 2170
2179 2188 2199 2210 2221 2232 2243 2254 2265 2276 2287 2298 2309 2320
2331 2342 2353 2364
.LSELE 173 180 187 194 352 596 602 608 614 623 629 635 641 650
656 662 668 677 683 689 695 704 710 716 722 731 737 743
749 758 764 770 776 785 791 797 803 812 818 824 830 839
845 851 857 866 872 878 884 893 899 905 911 920 926 932
938 947 953 959 965 974 980 986 992 1001 1007 1013 1019 1376
1575 1774 1972
.LSKCN 1114 1472 1671 1869 2053 2062 2071 2080 2089 2098 2107 2116 2125 2134
2143 2152 2161 2170 2179 2188 2199 2210 2221 2232 2243 2254 2265 2276
2287 2298 2309 2320 2331 2342 2353 2364
.LXNOR 2051 2060 2069 2078 2087 2096 2105 2114 2123 2132 2141 2150 2159 2168
2177 2186 2197 2208 2219 2230 2241 2252 2263 2274 2285 2296 2307 2318
2329 2340 2351 2362
.LXOR 1248 1252 1256 1260 1264 1268 1272 1276 1280 1284 1288 1292 1296 1300
1304 1308 1490 1492 1514 1516 1538 1540 1562 1564 1689 1691 1713 1715
1737 1739 1761 1763 1887 1889 1911 1913 1935 1937 1959 1961
.MA 183 185 596 602 608 614 623 629 635 641 650 656 662 668
677 683 689 695 704 710 716 722 731 737 743 749 758 764
770 776 785 791 797 803 812 818 824 830 839 845 851 857
866 872 878 884 893 899 905 911 920 926 932 938 947 953
959 965 974 980 986 992 1001 1007 1013 1019 1118 1122 1126 1130
1134 1138 1142 1146 1150 1154 1158 1162 1166 1170 1174 1178 1183 1187
1191 1195 1199 1203 1207 1211 1215 1219 1223 1227 1231 1235 1239 1243
1248 1252 1256 1260 1264 1268 1272 1276 1280 1284 1288 1292 1296 1300
1304 1308 1313 1317 1321 1325 1329 1333 1337 1341 1345 1349 1353 1357
1361 1365 1369 1373 1376 1478 1484 1490 1496 1502 1508 1514 1520 1526
1532 1538 1544 1550 1556 1562 1568 1570 1575 1679 1769 1774 1875 1881
1887 1893 1899 1905 1911 1917 1923 1929 1935 1941 1947 1953 1959 1965
1967 1972 2046 2049 2051 2053 2055 2060 2062 2064 2069 2071 2073 2078
2080 2082 2087 2089 2091 2096 2098 2100 2105 2107 2109 2114 2116 2118
2123 2125 2127 2132 2134 2136 2141 2143 2145 2150 2152 2154 2159 2161
2163 2168 2170 2172 2177 2179 2181 2186 2188 2190 2195 2197 2199 2201
2206 2208 2210 2212 2217 2219 2221 2223 2228 2230 2232 2234 2239 2241
2243 2245 2250 2252 2254 2256 2261 2263 2265 2267 2272 2274 2276 2278
2283 2285 2287 2289 2294 2296 2298 2300 2305 2307 2309 2311 2316 2318
2320 2322 2327 2329 2331 2333 2338 2340 2342 2344 2349 2351 2353 2355
2360 2362 2364 2366
.MAND 169 287 592 619 646 673 700 727 754 781 808 835 862 889
916 943 970 997 1116 1120 1124 1128 1132 1136 1140 1144 1148 1152
1156 1160 1164 1168 1172 1176 1181 1185 1189 1193 1197 1201 1205 1209
1213 1217 1221 1225 1229 1233 1237 1241 1246 1250 1254 1258 1262 1266
1270 1274 1278 1282 1286 1290 1294 1298 1302 1306 1311 1315 1319 1323
1327 1331 1335 1339 1343 1347 1351 1355 1359 1363 1367 1371 1476 1482
1488 1494 1500 1506 1512 1518 1524 1530 1536 1542 1548 1554 1560 1566
1675 1681 1687 1693 1699 1705 1711 1717 1723 1729 1735 1741 1747 1753
1759 1765 1873 1879 1885 1891 1897 1903 1909 1915 1921 1927 1933 1939
1945 1951 1957 1963 2046 2049 2053 2062 2071 2080 2089 2098 2107 2116
2125 2134 2143 2152 2161 2170 2179 2188 2195 2199 2206 2210 2217 2221
2228 2232 2239 2243 2250 2254 2261 2265 2272 2276 2283 2287 2294 2298
2305 2309 2316 2320 2327 2331 2338 2342 2349 2353 2360 2364
.MB 176 190 592 594 598 600 604 606 610 612 619 621 625 627 SEQ 1368
631 633 637 639 646 648 652 654 658 660 664 666 673 675
679 681 685 687 691 693 700 702 706 708 712 714 718 720
727 729 733 735 739 741 745 747 754 756 760 762 766 768
772 774 781 783 787 789 793 795 799 801 808 810 814 816
820 822 826 828 835 837 841 843 847 849 853 855 862 864
868 870 874 876 880 882 889 891 895 897 901 903 907 909
916 918 922 924 928 930 934 936 943 945 949 951 955 957
961 963 970 972 976 978 982 984 988 990 997 999 1003 1005
1009 1011 1015 1017 1116 1118 1120 1122 1124 1126 1128 1130 1132 1134
1136 1138 1140 1142 1144 1146 1148 1150 1152 1154 1156 1158 1160 1162
1164 1166 1168 1170 1172 1174 1176 1178 1181 1183 1185 1187 1189 1191
1193 1195 1197 1199 1201 1203 1205 1207 1209 1211 1213 1215 1217 1219
1221 1223 1225 1227 1229 1231 1233 1235 1237 1239 1241 1243 1246 1248
1250 1252 1254 1256 1258 1260 1262 1264 1266 1268 1270 1272 1274 1276
1278 1280 1282 1284 1286 1288 1290 1292 1294 1296 1298 1300 1302 1304
1306 1308 1311 1313 1315 1317 1319 1321 1323 1325 1327 1329 1331 1333
1335 1337 1339 1341 1343 1345 1347 1349 1351 1353 1355 1357 1359 1361
1363 1365 1367 1369 1371 1373 1476 1480 1482 1486 1488 1492 1494 1498
1500 1504 1506 1510 1512 1516 1518 1522 1524 1528 1530 1534 1536 1540
1542 1546 1548 1552 1554 1558 1560 1564 1566 1570 1675 1677 1679 1681
1683 1685 1687 1689 1691 1693 1695 1697 1699 1701 1703 1705 1707 1709
1711 1713 1715 1717 1719 1721 1723 1725 1727 1729 1731 1733 1735 1737
1739 1741 1743 1745 1747 1749 1751 1753 1755 1757 1759 1761 1763 1765
1767 1769 1771 1873 1875 1877 1879 1881 1883 1885 1887 1889 1891 1893
1895 1897 1899 1901 1903 1905 1907 1909 1911 1913 1915 1917 1919 1921
1923 1925 1927 1929 1931 1933 1935 1937 1939 1941 1943 1945 1947 1949
1951 1953 1955 1957 1959 1961 1963 1965 1967 1969 2046 2049 2051 2053
2060 2062 2069 2071 2078 2080 2087 2089 2096 2098 2105 2107 2114 2116
2123 2125 2132 2134 2141 2143 2150 2152 2159 2161 2168 2170 2177 2179
2186 2188 2195 2197 2199 2206 2208 2210 2217 2219 2221 2228 2230 2232
2239 2241 2243 2250 2252 2254 2261 2263 2265 2272 2274 2276 2283 2285
2287 2294 2296 2298 2305 2307 2309 2316 2318 2320 2327 2329 2331 2338
2340 2342 2349 2351 2353 2360 2362 2364
.MBAD 2373 2378
.MCCFZ 2055 2064 2073 2082 2091 2100 2109 2118 2127 2136 2145 2154 2163 2172
2181 2190 2201 2212 2223 2234 2245 2256 2267 2278 2289 2300 2311 2322
2333 2344 2355 2366
.MCENA 2055 2064 2073 2082 2091 2100 2109 2118 2127 2136 2145 2154 2163 2172
2181 2190 2201 2212 2223 2234 2245 2256 2267 2278 2289 2300 2311 2322
2333 2344 2355 2366
.MCJP 2055 2064 2073 2082 2091 2100 2109 2118 2127 2136 2145 2154 2163 2172
2181 2190 2201 2212 2223 2234 2245 2256 2267 2278 2289 2300 2311 2322
2333 2344 2355 2366
.MCONT 171 178 185 192 289 296 298 300 302 311 313 315 317 326
328 330 332 341 343 345 347 594 600 606 612 621 627 633
639 648 654 660 666 675 681 687 693 702 708 714 720 729
735 741 747 756 762 768 774 783 789 795 801 810 816 822
828 837 843 849 855 864 870 876 882 891 897 903 909 918
924 930 936 945 951 957 963 972 978 984 990 999 1005 1011
1017 1116 1118 1120 1122 1124 1126 1128 1130 1132 1134 1136 1138 1140
1142 1144 1146 1148 1150 1152 1154 1156 1158 1160 1162 1164 1166 1168
1170 1172 1174 1176 1178 1181 1183 1185 1187 1189 1191 1193 1195 1197
1199 1201 1203 1205 1207 1209 1211 1213 1215 1217 1219 1221 1223 1225 SEQ 1369
1227 1229 1231 1233 1235 1237 1239 1241 1243 1246 1248 1250 1252 1254
1256 1258 1260 1262 1264 1266 1268 1270 1272 1274 1276 1278 1280 1282
1284 1286 1288 1290 1292 1294 1296 1298 1300 1302 1304 1306 1308 1311
1313 1315 1317 1319 1321 1323 1325 1327 1329 1331 1333 1335 1337 1339
1341 1343 1345 1347 1349 1351 1353 1355 1357 1359 1361 1363 1365 1367
1369 1371 1373 1476 1478 1480 1482 1484 1486 1488 1490 1492 1494 1496
1498 1500 1502 1504 1506 1508 1510 1512 1514 1516 1518 1520 1522 1524
1526 1528 1530 1532 1534 1536 1538 1540 1542 1544 1546 1548 1550 1552
1554 1556 1558 1560 1562 1564 1566 1568 1570 1675 1677 1679 1681 1683
1685 1687 1689 1691 1693 1695 1697 1699 1701 1703 1705 1707 1709 1711
1713 1715 1717 1719 1721 1723 1725 1727 1729 1731 1733 1735 1737 1739
1741 1743 1745 1747 1749 1751 1753 1755 1757 1759 1761 1763 1765 1767
1769 1873 1875 1877 1879 1881 1883 1885 1887 1889 1891 1893 1895 1897
1899 1901 1903 1905 1907 1909 1911 1913 1915 1917 1919 1921 1923 1925
1927 1929 1931 1933 1935 1937 1939 1941 1943 1945 1947 1949 1951 1953
1955 1957 1959 1961 1963 1965 1967 2051 2053 2060 2062 2069 2071 2078
2080 2087 2089 2096 2098 2105 2107 2114 2116 2123 2125 2132 2134 2141
2143 2150 2152 2159 2161 2168 2170 2177 2179 2186 2188 2195 2197 2199
2206 2208 2210 2217 2219 2221 2228 2230 2232 2239 2241 2243 2250 2252
2254 2261 2263 2265 2272 2274 2276 2283 2285 2287 2294 2296 2298 2305
2307 2309 2316 2318 2320 2327 2329 2331 2338 2340 2342 2349 2351 2353
2360 2362 2364
.MCRY 171 289 594 621 648 675 702 729 756 783 810 837 864 891
918 945 972 999
.MD 169 171 173 176 178 180 183 185 187 190 192 194 287 289
294 296 298 300 302 304 309 311 313 315 317 319 324 326
328 330 332 334 339 341 343 345 347 349 352 592 594 596
598 600 602 604 606 608 610 612 614 619 621 623 625 627
629 631 633 635 637 639 641 646 648 650 652 654 656 658
660 662 664 666 668 673 675 677 679 681 683 685 687 689
691 693 695 700 702 704 706 708 710 712 714 716 718 720
722 727 729 731 733 735 737 739 741 743 745 747 749 754
756 758 760 762 764 766 768 770 772 774 776 781 783 785
787 789 791 793 795 797 799 801 803 808 810 812 814 816
818 820 822 824 826 828 830 835 837 839 841 843 845 847
849 851 853 855 857 862 864 866 868 870 872 874 876 878
880 882 884 889 891 893 895 897 899 901 903 905 907 909
911 916 918 920 922 924 926 928 930 932 934 936 938 943
945 947 949 951 953 955 957 959 961 963 965 970 972 974
976 978 980 982 984 986 988 990 992 997 999 1001 1003 1005
1007 1009 1011 1013 1015 1017 1019 1114 1116 1118 1120 1122 1124 1126
1128 1130 1132 1134 1136 1138 1140 1142 1144 1146 1148 1150 1152 1154
1156 1158 1160 1162 1164 1166 1168 1170 1172 1174 1176 1178 1181 1183
1185 1187 1189 1191 1193 1195 1197 1199 1201 1203 1205 1207 1209 1211
1213 1215 1217 1219 1221 1223 1225 1227 1229 1231 1233 1235 1237 1239
1241 1243 1246 1248 1250 1252 1254 1256 1258 1260 1262 1264 1266 1268
1270 1272 1274 1276 1278 1280 1282 1284 1286 1288 1290 1292 1294 1296
1298 1300 1302 1304 1306 1308 1311 1313 1315 1317 1319 1321 1323 1325
1327 1329 1331 1333 1335 1337 1339 1341 1343 1345 1347 1349 1351 1353
1355 1357 1359 1361 1363 1365 1367 1369 1371 1373 1472 1474 1476 1478
1480 1482 1484 1486 1488 1490 1492 1494 1496 1498 1500 1502 1504 1506
1508 1510 1512 1514 1516 1518 1520 1522 1524 1526 1528 1530 1532 1534
1536 1538 1540 1542 1544 1546 1548 1550 1552 1554 1556 1558 1560 1562 SEQ 1370
1564 1566 1568 1570 1572 1671 1673 1675 1677 1679 1681 1683 1685 1687
1689 1691 1693 1695 1697 1699 1701 1703 1705 1707 1709 1711 1713 1715
1717 1719 1721 1723 1725 1727 1729 1731 1733 1735 1737 1739 1741 1743
1745 1747 1749 1751 1753 1755 1757 1759 1761 1763 1765 1767 1769 1771
1869 1871 1873 1875 1877 1879 1881 1883 1885 1887 1889 1891 1893 1895
1897 1899 1901 1903 1905 1907 1909 1911 1913 1915 1917 1919 1921 1923
1925 1927 1929 1931 1933 1935 1937 1939 1941 1943 1945 1947 1949 1951
1953 1955 1957 1959 1961 1963 1965 1967 1969 1972 2046 2049 2051 2053
2060 2062 2069 2071 2078 2080 2087 2089 2096 2098 2105 2107 2114 2116
2123 2125 2132 2134 2141 2143 2150 2152 2159 2161 2168 2170 2177 2179
2186 2188 2195 2197 2199 2206 2208 2210 2217 2219 2221 2228 2230 2232
2239 2241 2243 2250 2252 2254 2261 2263 2265 2272 2274 2276 2283 2285
2287 2294 2296 2298 2305 2307 2309 2316 2318 2320 2327 2329 2331 2338
2340 2342 2349 2351 2353 2360 2362 2364
.MJ 169 173 176 180 183 187 190 194 287 294 304 309 319 324
334 339 349 352 592 596 598 602 604 608 610 614 619 623
625 629 631 635 637 641 646 650 652 656 658 662 664 668
673 677 679 683 685 689 691 695 700 704 706 710 712 716
718 722 727 731 733 737 739 743 745 749 754 758 760 764
766 770 772 776 781 785 787 791 793 797 799 803 808 812
814 818 820 824 826 830 835 839 841 845 847 851 853 857
862 866 868 872 874 878 880 884 889 893 895 899 901 905
907 911 916 920 922 926 928 932 934 938 943 947 949 953
955 959 961 965 970 974 976 980 982 986 988 992 997 1001
1003 1007 1009 1013 1015 1019 1114 1376 1378 1472 1474 1572 1575 1577
1671 1673 1771 1774 1776 1869 1871 1969 1972 2044 2049 2055 2057 2064
2066 2073 2075 2082 2084 2091 2093 2100 2102 2109 2111 2118 2120 2127
2129 2136 2138 2145 2147 2154 2156 2163 2165 2172 2174 2181 2183 2190
2192 2201 2203 2212 2214 2223 2225 2234 2236 2245 2247 2256 2258 2267
2269 2278 2280 2289 2291 2300 2302 2311 2313 2322 2324 2333 2335 2344
2346 2355 2357 2366 2368 2373 2378
.MJMAP 169 173 176 180 183 187 190 194 287 352 592 596 598 602
604 608 610 614 619 623 625 629 631 635 637 641 646 650
652 656 658 662 664 668 673 677 679 683 685 689 691 695
700 704 706 710 712 716 718 722 727 731 733 737 739 743
745 749 754 758 760 764 766 770 772 776 781 785 787 791
793 797 799 803 808 812 814 818 820 824 826 830 835 839
841 845 847 851 853 857 862 866 868 872 874 878 880 884
889 893 895 899 901 905 907 911 916 920 922 926 928 932
934 938 943 947 949 953 955 959 961 965 970 974 976 980
982 986 988 992 997 1001 1003 1007 1009 1013 1015 1019 1114 1376
1378 1472 1575 1577 1671 1774 1776 1869 1972 2044 2049 2057 2066 2075
2084 2093 2102 2111 2120 2129 2138 2147 2156 2165 2174 2183 2192 2203
2214 2225 2236 2247 2258 2269 2280 2291 2302 2313 2324 2335 2346 2357
2368 2373 2378
.MJZ 2046
.MLDCT 294 309 324 339 1474 1673 1871
.MMGC 173 180 187 194 352 596 602 608 614 623 629 635 641 650
656 662 668 677 683 689 695 704 710 716 722 731 737 743
749 758 764 770 776 785 791 797 803 812 818 824 830 839
845 851 857 866 872 878 884 893 899 905 911 920 926 932
938 947 953 959 965 974 980 986 992 1001 1007 1013 1019 1114
1376 1472 1575 1671 1774 1869 1972 2053 2062 2071 2080 2089 2098 2107 SEQ 1371
2116 2125 2134 2143 2152 2161 2170 2179 2188 2199 2210 2221 2232 2243
2254 2265 2276 2287 2298 2309 2320 2331 2342 2353 2364
.MNAND 1313 1317 1321 1325 1329 1333 1337 1341 1345 1349 1353 1357 1361 1365
1369 1373 1496 1498 1520 1522 1544 1546 1568 1570 1695 1697 1719 1721
1743 1745 1767 1769 1893 1895 1917 1919 1941 1943 1965 1967
.MOENA 173 180 187 194 352 596 602 608 614 623 629 635 641 650
656 662 668 677 683 689 695 704 710 716 722 731 737 743
749 758 764 770 776 785 791 797 803 812 818 824 830 839
845 851 857 866 872 878 884 893 899 905 911 920 926 932
938 947 953 959 965 974 980 986 992 1001 1007 1013 1019 1376
1575 1774 1972
.MOR 173 176 178 180 183 185 187 190 192 194 296 298 300 302
304 311 313 315 317 319 326 328 330 332 334 341 343 345
347 349 352 596 598 600 602 604 606 608 610 612 614 623
625 627 629 631 633 635 637 639 641 650 652 654 656 658
660 662 664 666 668 677 679 681 683 685 687 689 691 693
695 704 706 708 710 712 714 716 718 720 722 731 733 735
737 739 741 743 745 747 749 758 760 762 764 766 768 770
772 774 776 785 787 789 791 793 795 797 799 801 803 812
814 816 818 820 822 824 826 828 830 839 841 843 845 847
849 851 853 855 857 866 868 870 872 874 876 878 880 882
884 893 895 897 899 901 903 905 907 909 911 920 922 924
926 928 930 932 934 936 938 947 949 951 953 955 957 959
961 963 965 974 976 978 980 982 984 986 988 990 992 1001
1003 1005 1007 1009 1011 1013 1015 1017 1019 1114 1183 1187 1191 1195
1199 1203 1207 1211 1215 1219 1223 1227 1231 1235 1239 1243 1376 1472
1484 1486 1508 1510 1532 1534 1556 1558 1575 1671 1683 1685 1707 1709
1731 1733 1755 1757 1771 1774 1869 1881 1883 1905 1907 1929 1931 1953
1955 1969 1972 2055 2064 2073 2082 2091 2100 2109 2118 2127 2136 2145
2154 2163 2172 2181 2190 2201 2212 2223 2234 2245 2256 2267 2278 2289
2300 2311 2322 2333 2344 2355 2366
.MPLUS 171 289 594 621 648 675 702 729 756 783 810 837 864 891
918 945 972 999 1118 1122 1126 1130 1134 1138 1142 1146 1150 1154
1158 1162 1166 1170 1174 1178 1478 1480 1502 1504 1526 1528 1550 1552
1677 1679 1701 1703 1725 1727 1749 1751 1875 1877 1899 1901 1923 1925
1947 1949
.MRPCT 304 319 334 349 1572 1771 1969
.MS0A 169 183 185 287 596 602 608 614 623 629 635 641 650 656
662 668 677 683 689 695 704 710 716 722 731 737 743 749
758 764 770 776 785 791 797 803 812 818 824 830 839 845
851 857 866 872 878 884 893 899 905 911 920 926 932 938
947 953 959 965 974 980 986 992 1001 1007 1013 1019 1116 1118
1120 1122 1124 1126 1128 1130 1132 1134 1136 1138 1140 1142 1144 1146
1148 1150 1152 1154 1156 1158 1160 1162 1164 1166 1168 1170 1172 1174
1176 1178 1181 1183 1185 1187 1189 1191 1193 1195 1197 1199 1201 1203
1205 1207 1209 1211 1213 1215 1217 1219 1221 1223 1225 1227 1229 1231
1233 1235 1237 1239 1241 1243 1246 1248 1250 1252 1254 1256 1258 1260
1262 1264 1266 1268 1270 1272 1274 1276 1278 1280 1282 1284 1286 1288
1290 1292 1294 1296 1298 1300 1302 1304 1306 1308 1311 1313 1315 1317
1319 1321 1323 1325 1327 1329 1331 1333 1335 1337 1339 1341 1343 1345
1347 1349 1351 1353 1355 1357 1359 1361 1363 1365 1367 1369 1371 1373
1376 1476 1478 1482 1484 1488 1490 1494 1496 1500 1502 1506 1508 1512
1514 1518 1520 1524 1526 1530 1532 1536 1538 1542 1544 1548 1550 1554 SEQ 1372
1556 1560 1562 1566 1568 1575 1675 1679 1681 1685 1687 1691 1693 1697
1699 1703 1705 1709 1711 1715 1717 1721 1723 1727 1729 1733 1735 1739
1741 1745 1747 1751 1753 1757 1759 1763 1765 1769 1774 1873 1875 1879
1881 1885 1887 1891 1893 1897 1899 1903 1905 1909 1911 1915 1917 1921
1923 1927 1929 1933 1935 1939 1941 1945 1947 1951 1953 1957 1959 1963
1965 1972 2046 2049 2051 2055 2060 2064 2069 2073 2078 2082 2087 2091
2096 2100 2105 2109 2114 2118 2123 2127 2132 2136 2141 2145 2150 2154
2159 2163 2168 2172 2177 2181 2186 2190 2195 2197 2201 2206 2208 2212
2217 2219 2223 2228 2230 2234 2239 2241 2245 2250 2252 2256 2261 2263
2267 2272 2274 2278 2283 2285 2289 2294 2296 2300 2305 2307 2311 2316
2318 2322 2327 2329 2333 2338 2340 2344 2349 2351 2355 2360 2362 2366
.MS0B 592 594 598 600 610 612 619 621 625 627 637 639 646 648
652 654 664 666 673 675 679 681 691 693 700 702 706 708
718 720 727 729 733 735 745 747 754 756 760 762 772 774
781 783 787 789 799 801 808 810 814 816 826 828 835 837
841 843 853 855 862 864 868 870 880 882 889 891 895 897
907 909 916 918 922 924 934 936 943 945 949 951 961 963
970 972 976 978 988 990 997 999 1003 1005 1015 1017 1677 1683
1689 1695 1701 1707 1713 1719 1725 1731 1737 1743 1749 1755 1761 1767
1771 1969
.MS0Q 171 173 176 178 180 187 190 192 194 289 296 298 300 302
304 311 313 315 317 319 326 328 330 332 334 341 343 345
347 349 352 604 606 631 633 658 660 685 687 712 714 739
741 766 768 793 795 820 822 847 849 874 876 901 903 928
930 955 957 982 984 1009 1011 1480 1486 1492 1498 1504 1510 1516
1522 1528 1534 1540 1546 1552 1558 1564 1570 1877 1883 1889 1895 1901
1907 1913 1919 1925 1931 1937 1943 1949 1955 1961 1967
.MSD0 1114 1472 1671 1869
.MSDA 2053 2062 2071 2080 2089 2098 2107 2116 2125 2134 2143 2152 2161 2170
2179 2188 2199 2210 2221 2232 2243 2254 2265 2276 2287 2298 2309 2320
2331 2342 2353 2364
.MSELE 173 180 187 194 352 596 602 608 614 623 629 635 641 650
656 662 668 677 683 689 695 704 710 716 722 731 737 743
749 758 764 770 776 785 791 797 803 812 818 824 830 839
845 851 857 866 872 878 884 893 899 905 911 920 926 932
938 947 953 959 965 974 980 986 992 1001 1007 1013 1019 1376
1575 1774 1972
.MSKCN 1114 1472 1671 1869 2053 2062 2071 2080 2089 2098 2107 2116 2125 2134
2143 2152 2161 2170 2179 2188 2199 2210 2221 2232 2243 2254 2265 2276
2287 2298 2309 2320 2331 2342 2353 2364
.MXNOR 2051 2060 2069 2078 2087 2096 2105 2114 2123 2132 2141 2150 2159 2168
2177 2186 2197 2208 2219 2230 2241 2252 2263 2274 2285 2296 2307 2318
2329 2340 2351 2362
.MXOR 1248 1252 1256 1260 1264 1268 1272 1276 1280 1284 1288 1292 1296 1300
1304 1308 1490 1492 1514 1516 1538 1540 1562 1564 1689 1691 1713 1715
1737 1739 1761 1763 1887 1889 1911 1913 1935 1937 1959 1961
.RA 183 185 596 602 608 614 623 629 635 641 650 656 662 668
677 683 689 695 704 710 716 722 731 737 743 749 758 764
770 776 785 791 797 803 812 818 824 830 839 845 851 857
866 872 878 884 893 899 905 911 920 926 932 938 947 953
959 965 974 980 986 992 1001 1007 1013 1019 1118 1122 1126 1130
1134 1138 1142 1146 1150 1154 1158 1162 1166 1170 1174 1178 1183 1187
1191 1195 1199 1203 1207 1211 1215 1219 1223 1227 1231 1235 1239 1243 SEQ 1373
1248 1252 1256 1260 1264 1268 1272 1276 1280 1284 1288 1292 1296 1300
1304 1308 1313 1317 1321 1325 1329 1333 1337 1341 1345 1349 1353 1357
1361 1365 1369 1373 1376 1478 1484 1490 1496 1502 1508 1514 1520 1526
1532 1538 1544 1550 1556 1562 1568 1570 1575 1679 1769 1774 1875 1881
1887 1893 1899 1905 1911 1917 1923 1929 1935 1941 1947 1953 1959 1965
1967 1972 2046 2049 2051 2053 2055 2060 2062 2064 2069 2071 2073 2078
2080 2082 2087 2089 2091 2096 2098 2100 2105 2107 2109 2114 2116 2118
2123 2125 2127 2132 2134 2136 2141 2143 2145 2150 2152 2154 2159 2161
2163 2168 2170 2172 2177 2179 2181 2186 2188 2190 2195 2197 2199 2201
2206 2208 2210 2212 2217 2219 2221 2223 2228 2230 2232 2234 2239 2241
2243 2245 2250 2252 2254 2256 2261 2263 2265 2267 2272 2274 2276 2278
2283 2285 2287 2289 2294 2296 2298 2300 2305 2307 2309 2311 2316 2318
2320 2322 2327 2329 2331 2333 2338 2340 2342 2344 2349 2351 2353 2355
2360 2362 2364 2366
.RAND 169 287 592 619 646 673 700 727 754 781 808 835 862 889
916 943 970 997 1116 1120 1124 1128 1132 1136 1140 1144 1148 1152
1156 1160 1164 1168 1172 1176 1181 1185 1189 1193 1197 1201 1205 1209
1213 1217 1221 1225 1229 1233 1237 1241 1246 1250 1254 1258 1262 1266
1270 1274 1278 1282 1286 1290 1294 1298 1302 1306 1311 1315 1319 1323
1327 1331 1335 1339 1343 1347 1351 1355 1359 1363 1367 1371 1476 1482
1488 1494 1500 1506 1512 1518 1524 1530 1536 1542 1548 1554 1560 1566
1675 1681 1687 1693 1699 1705 1711 1717 1723 1729 1735 1741 1747 1753
1759 1765 1873 1879 1885 1891 1897 1903 1909 1915 1921 1927 1933 1939
1945 1951 1957 1963 2046 2049 2053 2062 2071 2080 2089 2098 2107 2116
2125 2134 2143 2152 2161 2170 2179 2188 2195 2199 2206 2210 2217 2221
2228 2232 2239 2243 2250 2254 2261 2265 2272 2276 2283 2287 2294 2298
2305 2309 2316 2320 2327 2331 2338 2342 2349 2353 2360 2364
.RB 176 190 592 594 598 600 604 606 610 612 619 621 625 627
631 633 637 639 646 648 652 654 658 660 664 666 673 675
679 681 685 687 691 693 700 702 706 708 712 714 718 720
727 729 733 735 739 741 745 747 754 756 760 762 766 768
772 774 781 783 787 789 793 795 799 801 808 810 814 816
820 822 826 828 835 837 841 843 847 849 853 855 862 864
868 870 874 876 880 882 889 891 895 897 901 903 907 909
916 918 922 924 928 930 934 936 943 945 949 951 955 957
961 963 970 972 976 978 982 984 988 990 997 999 1003 1005
1009 1011 1015 1017 1116 1118 1120 1122 1124 1126 1128 1130 1132 1134
1136 1138 1140 1142 1144 1146 1148 1150 1152 1154 1156 1158 1160 1162
1164 1166 1168 1170 1172 1174 1176 1178 1181 1183 1185 1187 1189 1191
1193 1195 1197 1199 1201 1203 1205 1207 1209 1211 1213 1215 1217 1219
1221 1223 1225 1227 1229 1231 1233 1235 1237 1239 1241 1243 1246 1248
1250 1252 1254 1256 1258 1260 1262 1264 1266 1268 1270 1272 1274 1276
1278 1280 1282 1284 1286 1288 1290 1292 1294 1296 1298 1300 1302 1304
1306 1308 1311 1313 1315 1317 1319 1321 1323 1325 1327 1329 1331 1333
1335 1337 1339 1341 1343 1345 1347 1349 1351 1353 1355 1357 1359 1361
1363 1365 1367 1369 1371 1373 1476 1480 1482 1486 1488 1492 1494 1498
1500 1504 1506 1510 1512 1516 1518 1522 1524 1528 1530 1534 1536 1540
1542 1546 1548 1552 1554 1558 1560 1564 1566 1570 1675 1677 1679 1681
1683 1685 1687 1689 1691 1693 1695 1697 1699 1701 1703 1705 1707 1709
1711 1713 1715 1717 1719 1721 1723 1725 1727 1729 1731 1733 1735 1737
1739 1741 1743 1745 1747 1749 1751 1753 1755 1757 1759 1761 1763 1765
1767 1769 1771 1873 1875 1877 1879 1881 1883 1885 1887 1889 1891 1893
1895 1897 1899 1901 1903 1905 1907 1909 1911 1913 1915 1917 1919 1921 SEQ 1374
1923 1925 1927 1929 1931 1933 1935 1937 1939 1941 1943 1945 1947 1949
1951 1953 1955 1957 1959 1961 1963 1965 1967 1969 2046 2049 2051 2053
2060 2062 2069 2071 2078 2080 2087 2089 2096 2098 2105 2107 2114 2116
2123 2125 2132 2134 2141 2143 2150 2152 2159 2161 2168 2170 2177 2179
2186 2188 2195 2197 2199 2206 2208 2210 2217 2219 2221 2228 2230 2232
2239 2241 2243 2250 2252 2254 2261 2263 2265 2272 2274 2276 2283 2285
2287 2294 2296 2298 2305 2307 2309 2316 2318 2320 2327 2329 2331 2338
2340 2342 2349 2351 2353 2360 2362 2364
.RBAD 2373 2378
.RCCFZ 2055 2064 2073 2082 2091 2100 2109 2118 2127 2136 2145 2154 2163 2172
2181 2190 2201 2212 2223 2234 2245 2256 2267 2278 2289 2300 2311 2322
2333 2344 2355 2366
.RCENA 2055 2064 2073 2082 2091 2100 2109 2118 2127 2136 2145 2154 2163 2172
2181 2190 2201 2212 2223 2234 2245 2256 2267 2278 2289 2300 2311 2322
2333 2344 2355 2366
.RCJP 2055 2064 2073 2082 2091 2100 2109 2118 2127 2136 2145 2154 2163 2172
2181 2190 2201 2212 2223 2234 2245 2256 2267 2278 2289 2300 2311 2322
2333 2344 2355 2366
.RCONT 171 178 185 192 289 296 298 300 302 311 313 315 317 326
328 330 332 341 343 345 347 594 600 606 612 621 627 633
639 648 654 660 666 675 681 687 693 702 708 714 720 729
735 741 747 756 762 768 774 783 789 795 801 810 816 822
828 837 843 849 855 864 870 876 882 891 897 903 909 918
924 930 936 945 951 957 963 972 978 984 990 999 1005 1011
1017 1116 1118 1120 1122 1124 1126 1128 1130 1132 1134 1136 1138 1140
1142 1144 1146 1148 1150 1152 1154 1156 1158 1160 1162 1164 1166 1168
1170 1172 1174 1176 1178 1181 1183 1185 1187 1189 1191 1193 1195 1197
1199 1201 1203 1205 1207 1209 1211 1213 1215 1217 1219 1221 1223 1225
1227 1229 1231 1233 1235 1237 1239 1241 1243 1246 1248 1250 1252 1254
1256 1258 1260 1262 1264 1266 1268 1270 1272 1274 1276 1278 1280 1282
1284 1286 1288 1290 1292 1294 1296 1298 1300 1302 1304 1306 1308 1311
1313 1315 1317 1319 1321 1323 1325 1327 1329 1331 1333 1335 1337 1339
1341 1343 1345 1347 1349 1351 1353 1355 1357 1359 1361 1363 1365 1367
1369 1371 1373 1476 1478 1480 1482 1484 1486 1488 1490 1492 1494 1496
1498 1500 1502 1504 1506 1508 1510 1512 1514 1516 1518 1520 1522 1524
1526 1528 1530 1532 1534 1536 1538 1540 1542 1544 1546 1548 1550 1552
1554 1556 1558 1560 1562 1564 1566 1568 1570 1675 1677 1679 1681 1683
1685 1687 1689 1691 1693 1695 1697 1699 1701 1703 1705 1707 1709 1711
1713 1715 1717 1719 1721 1723 1725 1727 1729 1731 1733 1735 1737 1739
1741 1743 1745 1747 1749 1751 1753 1755 1757 1759 1761 1763 1765 1767
1769 1873 1875 1877 1879 1881 1883 1885 1887 1889 1891 1893 1895 1897
1899 1901 1903 1905 1907 1909 1911 1913 1915 1917 1919 1921 1923 1925
1927 1929 1931 1933 1935 1937 1939 1941 1943 1945 1947 1949 1951 1953
1955 1957 1959 1961 1963 1965 1967 2051 2053 2060 2062 2069 2071 2078
2080 2087 2089 2096 2098 2105 2107 2114 2116 2123 2125 2132 2134 2141
2143 2150 2152 2159 2161 2168 2170 2177 2179 2186 2188 2195 2197 2199
2206 2208 2210 2217 2219 2221 2228 2230 2232 2239 2241 2243 2250 2252
2254 2261 2263 2265 2272 2274 2276 2283 2285 2287 2294 2296 2298 2305
2307 2309 2316 2318 2320 2327 2329 2331 2338 2340 2342 2349 2351 2353
2360 2362 2364
.RCRY 171 289 594 621 648 675 702 729 756 783 810 837 864 891
918 945 972 999
.RD 169 171 173 176 178 180 183 185 187 190 192 194 287 289 SEQ 1375
294 296 298 300 302 304 309 311 313 315 317 319 324 326
328 330 332 334 339 341 343 345 347 349 352 592 594 596
598 600 602 604 606 608 610 612 614 619 621 623 625 627
629 631 633 635 637 639 641 646 648 650 652 654 656 658
660 662 664 666 668 673 675 677 679 681 683 685 687 689
691 693 695 700 702 704 706 708 710 712 714 716 718 720
722 727 729 731 733 735 737 739 741 743 745 747 749 754
756 758 760 762 764 766 768 770 772 774 776 781 783 785
787 789 791 793 795 797 799 801 803 808 810 812 814 816
818 820 822 824 826 828 830 835 837 839 841 843 845 847
849 851 853 855 857 862 864 866 868 870 872 874 876 878
880 882 884 889 891 893 895 897 899 901 903 905 907 909
911 916 918 920 922 924 926 928 930 932 934 936 938 943
945 947 949 951 953 955 957 959 961 963 965 970 972 974
976 978 980 982 984 986 988 990 992 997 999 1001 1003 1005
1007 1009 1011 1013 1015 1017 1019 1114 1116 1118 1120 1122 1124 1126
1128 1130 1132 1134 1136 1138 1140 1142 1144 1146 1148 1150 1152 1154
1156 1158 1160 1162 1164 1166 1168 1170 1172 1174 1176 1178 1181 1183
1185 1187 1189 1191 1193 1195 1197 1199 1201 1203 1205 1207 1209 1211
1213 1215 1217 1219 1221 1223 1225 1227 1229 1231 1233 1235 1237 1239
1241 1243 1246 1248 1250 1252 1254 1256 1258 1260 1262 1264 1266 1268
1270 1272 1274 1276 1278 1280 1282 1284 1286 1288 1290 1292 1294 1296
1298 1300 1302 1304 1306 1308 1311 1313 1315 1317 1319 1321 1323 1325
1327 1329 1331 1333 1335 1337 1339 1341 1343 1345 1347 1349 1351 1353
1355 1357 1359 1361 1363 1365 1367 1369 1371 1373 1472 1474 1476 1478
1480 1482 1484 1486 1488 1490 1492 1494 1496 1498 1500 1502 1504 1506
1508 1510 1512 1514 1516 1518 1520 1522 1524 1526 1528 1530 1532 1534
1536 1538 1540 1542 1544 1546 1548 1550 1552 1554 1556 1558 1560 1562
1564 1566 1568 1570 1572 1671 1673 1675 1677 1679 1681 1683 1685 1687
1689 1691 1693 1695 1697 1699 1701 1703 1705 1707 1709 1711 1713 1715
1717 1719 1721 1723 1725 1727 1729 1731 1733 1735 1737 1739 1741 1743
1745 1747 1749 1751 1753 1755 1757 1759 1761 1763 1765 1767 1769 1771
1869 1871 1873 1875 1877 1879 1881 1883 1885 1887 1889 1891 1893 1895
1897 1899 1901 1903 1905 1907 1909 1911 1913 1915 1917 1919 1921 1923
1925 1927 1929 1931 1933 1935 1937 1939 1941 1943 1945 1947 1949 1951
1953 1955 1957 1959 1961 1963 1965 1967 1969 1972 2046 2049 2051 2053
2060 2062 2069 2071 2078 2080 2087 2089 2096 2098 2105 2107 2114 2116
2123 2125 2132 2134 2141 2143 2150 2152 2159 2161 2168 2170 2177 2179
2186 2188 2195 2197 2199 2206 2208 2210 2217 2219 2221 2228 2230 2232
2239 2241 2243 2250 2252 2254 2261 2263 2265 2272 2274 2276 2283 2285
2287 2294 2296 2298 2305 2307 2309 2316 2318 2320 2327 2329 2331 2338
2340 2342 2349 2351 2353 2360 2362 2364
.RJ 169 173 176 180 183 187 190 194 287 294 304 309 319 324
334 339 349 352 592 596 598 602 604 608 610 614 619 623
625 629 631 635 637 641 646 650 652 656 658 662 664 668
673 677 679 683 685 689 691 695 700 704 706 710 712 716
718 722 727 731 733 737 739 743 745 749 754 758 760 764
766 770 772 776 781 785 787 791 793 797 799 803 808 812
814 818 820 824 826 830 835 839 841 845 847 851 853 857
862 866 868 872 874 878 880 884 889 893 895 899 901 905
907 911 916 920 922 926 928 932 934 938 943 947 949 953
955 959 961 965 970 974 976 980 982 986 988 992 997 1001
1003 1007 1009 1013 1015 1019 1114 1376 1378 1472 1474 1572 1575 1577 SEQ 1376
1671 1673 1771 1774 1776 1869 1871 1969 1972 2044 2049 2055 2057 2064
2066 2073 2075 2082 2084 2091 2093 2100 2102 2109 2111 2118 2120 2127
2129 2136 2138 2145 2147 2154 2156 2163 2165 2172 2174 2181 2183 2190
2192 2201 2203 2212 2214 2223 2225 2234 2236 2245 2247 2256 2258 2267
2269 2278 2280 2289 2291 2300 2302 2311 2313 2322 2324 2333 2335 2344
2346 2355 2357 2366 2368 2373 2378
.RJMAP 169 173 176 180 183 187 190 194 287 352 592 596 598 602
604 608 610 614 619 623 625 629 631 635 637 641 646 650
652 656 658 662 664 668 673 677 679 683 685 689 691 695
700 704 706 710 712 716 718 722 727 731 733 737 739 743
745 749 754 758 760 764 766 770 772 776 781 785 787 791
793 797 799 803 808 812 814 818 820 824 826 830 835 839
841 845 847 851 853 857 862 866 868 872 874 878 880 884
889 893 895 899 901 905 907 911 916 920 922 926 928 932
934 938 943 947 949 953 955 959 961 965 970 974 976 980
982 986 988 992 997 1001 1003 1007 1009 1013 1015 1019 1114 1376
1378 1472 1575 1577 1671 1774 1776 1869 1972 2044 2049 2057 2066 2075
2084 2093 2102 2111 2120 2129 2138 2147 2156 2165 2174 2183 2192 2203
2214 2225 2236 2247 2258 2269 2280 2291 2302 2313 2324 2335 2346 2357
2368 2373 2378
.RJZ 2046
.RLDCT 294 309 324 339 1474 1673 1871
.RMGC 173 180 187 194 352 596 602 608 614 623 629 635 641 650
656 662 668 677 683 689 695 704 710 716 722 731 737 743
749 758 764 770 776 785 791 797 803 812 818 824 830 839
845 851 857 866 872 878 884 893 899 905 911 920 926 932
938 947 953 959 965 974 980 986 992 1001 1007 1013 1019 1114
1376 1472 1575 1671 1774 1869 1972 2053 2062 2071 2080 2089 2098 2107
2116 2125 2134 2143 2152 2161 2170 2179 2188 2199 2210 2221 2232 2243
2254 2265 2276 2287 2298 2309 2320 2331 2342 2353 2364
.RNAND 1313 1317 1321 1325 1329 1333 1337 1341 1345 1349 1353 1357 1361 1365
1369 1373 1496 1498 1520 1522 1544 1546 1568 1570 1695 1697 1719 1721
1743 1745 1767 1769 1893 1895 1917 1919 1941 1943 1965 1967
.ROENA 173 180 187 194 352 596 602 608 614 623 629 635 641 650
656 662 668 677 683 689 695 704 710 716 722 731 737 743
749 758 764 770 776 785 791 797 803 812 818 824 830 839
845 851 857 866 872 878 884 893 899 905 911 920 926 932
938 947 953 959 965 974 980 986 992 1001 1007 1013 1019 1376
1575 1774 1972
.ROR 173 176 178 180 183 185 187 190 192 194 296 298 300 302
304 311 313 315 317 319 326 328 330 332 334 341 343 345
347 349 352 596 598 600 602 604 606 608 610 612 614 623
625 627 629 631 633 635 637 639 641 650 652 654 656 658
660 662 664 666 668 677 679 681 683 685 687 689 691 693
695 704 706 708 710 712 714 716 718 720 722 731 733 735
737 739 741 743 745 747 749 758 760 762 764 766 768 770
772 774 776 785 787 789 791 793 795 797 799 801 803 812
814 816 818 820 822 824 826 828 830 839 841 843 845 847
849 851 853 855 857 866 868 870 872 874 876 878 880 882
884 893 895 897 899 901 903 905 907 909 911 920 922 924
926 928 930 932 934 936 938 947 949 951 953 955 957 959
961 963 965 974 976 978 980 982 984 986 988 990 992 1001
1003 1005 1007 1009 1011 1013 1015 1017 1019 1114 1183 1187 1191 1195 SEQ 1377
1199 1203 1207 1211 1215 1219 1223 1227 1231 1235 1239 1243 1376 1472
1484 1486 1508 1510 1532 1534 1556 1558 1575 1671 1683 1685 1707 1709
1731 1733 1755 1757 1771 1774 1869 1881 1883 1905 1907 1929 1931 1953
1955 1969 1972 2055 2064 2073 2082 2091 2100 2109 2118 2127 2136 2145
2154 2163 2172 2181 2190 2201 2212 2223 2234 2245 2256 2267 2278 2289
2300 2311 2322 2333 2344 2355 2366
.RPLUS 171 289 594 621 648 675 702 729 756 783 810 837 864 891
918 945 972 999 1118 1122 1126 1130 1134 1138 1142 1146 1150 1154
1158 1162 1166 1170 1174 1178 1478 1480 1502 1504 1526 1528 1550 1552
1677 1679 1701 1703 1725 1727 1749 1751 1875 1877 1899 1901 1923 1925
1947 1949
.RRPCT 304 319 334 349 1572 1771 1969
.RS0A 169 183 185 287 596 602 608 614 623 629 635 641 650 656
662 668 677 683 689 695 704 710 716 722 731 737 743 749
758 764 770 776 785 791 797 803 812 818 824 830 839 845
851 857 866 872 878 884 893 899 905 911 920 926 932 938
947 953 959 965 974 980 986 992 1001 1007 1013 1019 1116 1118
1120 1122 1124 1126 1128 1130 1132 1134 1136 1138 1140 1142 1144 1146
1148 1150 1152 1154 1156 1158 1160 1162 1164 1166 1168 1170 1172 1174
1176 1178 1181 1183 1185 1187 1189 1191 1193 1195 1197 1199 1201 1203
1205 1207 1209 1211 1213 1215 1217 1219 1221 1223 1225 1227 1229 1231
1233 1235 1237 1239 1241 1243 1246 1248 1250 1252 1254 1256 1258 1260
1262 1264 1266 1268 1270 1272 1274 1276 1278 1280 1282 1284 1286 1288
1290 1292 1294 1296 1298 1300 1302 1304 1306 1308 1311 1313 1315 1317
1319 1321 1323 1325 1327 1329 1331 1333 1335 1337 1339 1341 1343 1345
1347 1349 1351 1353 1355 1357 1359 1361 1363 1365 1367 1369 1371 1373
1376 1476 1478 1482 1484 1488 1490 1494 1496 1500 1502 1506 1508 1512
1514 1518 1520 1524 1526 1530 1532 1536 1538 1542 1544 1548 1550 1554
1556 1560 1562 1566 1568 1575 1675 1679 1681 1685 1687 1691 1693 1697
1699 1703 1705 1709 1711 1715 1717 1721 1723 1727 1729 1733 1735 1739
1741 1745 1747 1751 1753 1757 1759 1763 1765 1769 1774 1873 1875 1879
1881 1885 1887 1891 1893 1897 1899 1903 1905 1909 1911 1915 1917 1921
1923 1927 1929 1933 1935 1939 1941 1945 1947 1951 1953 1957 1959 1963
1965 1972 2046 2049 2051 2055 2060 2064 2069 2073 2078 2082 2087 2091
2096 2100 2105 2109 2114 2118 2123 2127 2132 2136 2141 2145 2150 2154
2159 2163 2168 2172 2177 2181 2186 2190 2195 2197 2201 2206 2208 2212
2217 2219 2223 2228 2230 2234 2239 2241 2245 2250 2252 2256 2261 2263
2267 2272 2274 2278 2283 2285 2289 2294 2296 2300 2305 2307 2311 2316
2318 2322 2327 2329 2333 2338 2340 2344 2349 2351 2355 2360 2362 2366
.RS0B 592 594 598 600 610 612 619 621 625 627 637 639 646 648
652 654 664 666 673 675 679 681 691 693 700 702 706 708
718 720 727 729 733 735 745 747 754 756 760 762 772 774
781 783 787 789 799 801 808 810 814 816 826 828 835 837
841 843 853 855 862 864 868 870 880 882 889 891 895 897
907 909 916 918 922 924 934 936 943 945 949 951 961 963
970 972 976 978 988 990 997 999 1003 1005 1015 1017 1677 1683
1689 1695 1701 1707 1713 1719 1725 1731 1737 1743 1749 1755 1761 1767
1771 1969
.RS0Q 171 173 176 178 180 187 190 192 194 289 296 298 300 302
304 311 313 315 317 319 326 328 330 332 334 341 343 345
347 349 352 604 606 631 633 658 660 685 687 712 714 739
741 766 768 793 795 820 822 847 849 874 876 901 903 928
930 955 957 982 984 1009 1011 1480 1486 1492 1498 1504 1510 1516 SEQ 1378
1522 1528 1534 1540 1546 1552 1558 1564 1570 1877 1883 1889 1895 1901
1907 1913 1919 1925 1931 1937 1943 1949 1955 1961 1967
.RSD0 1114 1472 1671 1869
.RSDA 2053 2062 2071 2080 2089 2098 2107 2116 2125 2134 2143 2152 2161 2170
2179 2188 2199 2210 2221 2232 2243 2254 2265 2276 2287 2298 2309 2320
2331 2342 2353 2364
.RSELE 173 180 187 194 352 596 602 608 614 623 629 635 641 650
656 662 668 677 683 689 695 704 710 716 722 731 737 743
749 758 764 770 776 785 791 797 803 812 818 824 830 839
845 851 857 866 872 878 884 893 899 905 911 920 926 932
938 947 953 959 965 974 980 986 992 1001 1007 1013 1019 1376
1575 1774 1972
.RSKCN 1114 1472 1671 1869 2053 2062 2071 2080 2089 2098 2107 2116 2125 2134
2143 2152 2161 2170 2179 2188 2199 2210 2221 2232 2243 2254 2265 2276
2287 2298 2309 2320 2331 2342 2353 2364
.RXNOR 2051 2060 2069 2078 2087 2096 2105 2114 2123 2132 2141 2150 2159 2168
2177 2186 2197 2208 2219 2230 2241 2252 2263 2274 2285 2296 2307 2318
2329 2340 2351 2362
.RXOR 1248 1252 1256 1260 1264 1268 1272 1276 1280 1284 1288 1292 1296 1300
1304 1308 1490 1492 1514 1516 1538 1540 1562 1564 1689 1691 1713 1715
1737 1739 1761 1763 1887 1889 1911 1913 1935 1937 1959 1961
ATABLE 118 120 121 122 124 125 444 445 446 448 449
CALC 169 171 173 176 178 180 183 185 187 190 192 194 287 289 SEQ 1379
294 296 298 300 302 304 309 311 313 315 317 319 324 326
328 330 332 334 339 341 343 345 347 349 352 592 594 596
598 600 602 604 606 608 610 612 614 619 621 623 625 627
629 631 633 635 637 639 641 646 648 650 652 654 656 658
660 662 664 666 668 673 675 677 679 681 683 685 687 689
691 693 695 700 702 704 706 708 710 712 714 716 718 720
722 727 729 731 733 735 737 739 741 743 745 747 749 754
756 758 760 762 764 766 768 770 772 774 776 781 783 785
787 789 791 793 795 797 799 801 803 808 810 812 814 816
818 820 822 824 826 828 830 835 837 839 841 843 845 847
849 851 853 855 857 862 864 866 868 870 872 874 876 878
880 882 884 889 891 893 895 897 899 901 903 905 907 909
911 916 918 920 922 924 926 928 930 932 934 936 938 943
945 947 949 951 953 955 957 959 961 963 965 970 972 974
976 978 980 982 984 986 988 990 992 997 999 1001 1003 1005
1007 1009 1011 1013 1015 1017 1019 1114 1116 1118 1120 1122 1124 1126
1128 1130 1132 1134 1136 1138 1140 1142 1144 1146 1148 1150 1152 1154
1156 1158 1160 1162 1164 1166 1168 1170 1172 1174 1176 1178 1181 1183
1185 1187 1189 1191 1193 1195 1197 1199 1201 1203 1205 1207 1209 1211
1213 1215 1217 1219 1221 1223 1225 1227 1229 1231 1233 1235 1237 1239
1241 1243 1246 1248 1250 1252 1254 1256 1258 1260 1262 1264 1266 1268
1270 1272 1274 1276 1278 1280 1282 1284 1286 1288 1290 1292 1294 1296
1298 1300 1302 1304 1306 1308 1311 1313 1315 1317 1319 1321 1323 1325
1327 1329 1331 1333 1335 1337 1339 1341 1343 1345 1347 1349 1351 1353
1355 1357 1359 1361 1363 1365 1367 1369 1371 1373 1376 1378 1472 1474
1476 1478 1480 1482 1484 1486 1488 1490 1492 1494 1496 1498 1500 1502
1504 1506 1508 1510 1512 1514 1516 1518 1520 1522 1524 1526 1528 1530
1532 1534 1536 1538 1540 1542 1544 1546 1548 1550 1552 1554 1556 1558
1560 1562 1564 1566 1568 1570 1572 1575 1577 1671 1673 1675 1677 1679
1681 1683 1685 1687 1689 1691 1693 1695 1697 1699 1701 1703 1705 1707
1709 1711 1713 1715 1717 1719 1721 1723 1725 1727 1729 1731 1733 1735
1737 1739 1741 1743 1745 1747 1749 1751 1753 1755 1757 1759 1761 1763
1765 1767 1769 1771 1774 1776 1869 1871 1873 1875 1877 1879 1881 1883
1885 1887 1889 1891 1893 1895 1897 1899 1901 1903 1905 1907 1909 1911
1913 1915 1917 1919 1921 1923 1925 1927 1929 1931 1933 1935 1937 1939
1941 1943 1945 1947 1949 1951 1953 1955 1957 1959 1961 1963 1965 1967
1969 1972 2044 2046 2049 2051 2053 2055 2057 2060 2062 2064 2066 2069
2071 2073 2075 2078 2080 2082 2084 2087 2089 2091 2093 2096 2098 2100
2102 2105 2107 2109 2111 2114 2116 2118 2120 2123 2125 2127 2129 2132
2134 2136 2138 2141 2143 2145 2147 2150 2152 2154 2156 2159 2161 2163
2165 2168 2170 2172 2174 2177 2179 2181 2183 2186 2188 2190 2192 2195
2197 2199 2201 2203 2206 2208 2210 2212 2214 2217 2219 2221 2223 2225
2228 2230 2232 2234 2236 2239 2241 2243 2245 2247 2250 2252 2254 2256
2258 2261 2263 2265 2267 2269 2272 2274 2276 2278 2280 2283 2285 2287
2289 2291 2294 2296 2298 2300 2302 2305 2307 2309 2311 2313 2316 2318
2320 2322 2324 2327 2329 2331 2333 2335 2338 2340 2342 2344 2346 2349
2351 2353 2355 2357 2360 2362 2364 2366 2368 2373 2378
CONCAT 169 171 173 176 178 180 183 185 187 190 192 194 287 289
294 296 298 300 302 304 309 311 313 315 317 319 324 326
328 330 332 334 339 341 343 345 347 349 352 592 594 596
598 600 602 604 606 608 610 612 614 619 621 623 625 627
629 631 633 635 637 639 641 646 648 650 652 654 656 658
660 662 664 666 668 673 675 677 679 681 683 685 687 689 SEQ 1380
691 693 695 700 702 704 706 708 710 712 714 716 718 720
722 727 729 731 733 735 737 739 741 743 745 747 749 754
756 758 760 762 764 766 768 770 772 774 776 781 783 785
787 789 791 793 795 797 799 801 803 808 810 812 814 816
818 820 822 824 826 828 830 835 837 839 841 843 845 847
849 851 853 855 857 862 864 866 868 870 872 874 876 878
880 882 884 889 891 893 895 897 899 901 903 905 907 909
911 916 918 920 922 924 926 928 930 932 934 936 938 943
945 947 949 951 953 955 957 959 961 963 965 970 972 974
976 978 980 982 984 986 988 990 992 997 999 1001 1003 1005
1007 1009 1011 1013 1015 1017 1019 1114 1116 1118 1120 1122 1124 1126
1128 1130 1132 1134 1136 1138 1140 1142 1144 1146 1148 1150 1152 1154
1156 1158 1160 1162 1164 1166 1168 1170 1172 1174 1176 1178 1181 1183
1185 1187 1189 1191 1193 1195 1197 1199 1201 1203 1205 1207 1209 1211
1213 1215 1217 1219 1221 1223 1225 1227 1229 1231 1233 1235 1237 1239
1241 1243 1246 1248 1250 1252 1254 1256 1258 1260 1262 1264 1266 1268
1270 1272 1274 1276 1278 1280 1282 1284 1286 1288 1290 1292 1294 1296
1298 1300 1302 1304 1306 1308 1311 1313 1315 1317 1319 1321 1323 1325
1327 1329 1331 1333 1335 1337 1339 1341 1343 1345 1347 1349 1351 1353
1355 1357 1359 1361 1363 1365 1367 1369 1371 1373 1376 1378 1472 1474
1476 1478 1480 1482 1484 1486 1488 1490 1492 1494 1496 1498 1500 1502
1504 1506 1508 1510 1512 1514 1516 1518 1520 1522 1524 1526 1528 1530
1532 1534 1536 1538 1540 1542 1544 1546 1548 1550 1552 1554 1556 1558
1560 1562 1564 1566 1568 1570 1572 1575 1577 1671 1673 1675 1677 1679
1681 1683 1685 1687 1689 1691 1693 1695 1697 1699 1701 1703 1705 1707
1709 1711 1713 1715 1717 1719 1721 1723 1725 1727 1729 1731 1733 1735
1737 1739 1741 1743 1745 1747 1749 1751 1753 1755 1757 1759 1761 1763
1765 1767 1769 1771 1774 1776 1869 1871 1873 1875 1877 1879 1881 1883
1885 1887 1889 1891 1893 1895 1897 1899 1901 1903 1905 1907 1909 1911
1913 1915 1917 1919 1921 1923 1925 1927 1929 1931 1933 1935 1937 1939
1941 1943 1945 1947 1949 1951 1953 1955 1957 1959 1961 1963 1965 1967
1969 1972 2044 2046 2049 2051 2053 2055 2057 2060 2062 2064 2066 2069
2071 2073 2075 2078 2080 2082 2084 2087 2089 2091 2093 2096 2098 2100
2102 2105 2107 2109 2111 2114 2116 2118 2120 2123 2125 2127 2129 2132
2134 2136 2138 2141 2143 2145 2147 2150 2152 2154 2156 2159 2161 2163
2165 2168 2170 2172 2174 2177 2179 2181 2183 2186 2188 2190 2192 2195
2197 2199 2201 2203 2206 2208 2210 2212 2214 2217 2219 2221 2223 2225
2228 2230 2232 2234 2236 2239 2241 2243 2245 2247 2250 2252 2254 2256
2258 2261 2263 2265 2267 2269 2272 2274 2276 2278 2280 2283 2285 2287
2289 2291 2294 2296 2298 2300 2302 2305 2307 2309 2311 2313 2316 2318
2320 2322 2324 2327 2329 2331 2333 2335 2338 2340 2342 2344 2346 2349
2351 2353 2355 2357 2360 2362 2364 2366 2368 2373 2378
FIELD 169 171 173 176 178 180 183 185 187 190 192 194 287 289
294 296 298 300 302 304 309 311 313 315 317 319 324 326
328 330 332 334 339 341 343 345 347 349 352 592 594 596
598 600 602 604 606 608 610 612 614 619 621 623 625 627
629 631 633 635 637 639 641 646 648 650 652 654 656 658
660 662 664 666 668 673 675 677 679 681 683 685 687 689
691 693 695 700 702 704 706 708 710 712 714 716 718 720
722 727 729 731 733 735 737 739 741 743 745 747 749 754
756 758 760 762 764 766 768 770 772 774 776 781 783 785
787 789 791 793 795 797 799 801 803 808 810 812 814 816
818 820 822 824 826 828 830 835 837 839 841 843 845 847 SEQ 1381
849 851 853 855 857 862 864 866 868 870 872 874 876 878
880 882 884 889 891 893 895 897 899 901 903 905 907 909
911 916 918 920 922 924 926 928 930 932 934 936 938 943
945 947 949 951 953 955 957 959 961 963 965 970 972 974
976 978 980 982 984 986 988 990 992 997 999 1001 1003 1005
1007 1009 1011 1013 1015 1017 1019 1114 1116 1118 1120 1122 1124 1126
1128 1130 1132 1134 1136 1138 1140 1142 1144 1146 1148 1150 1152 1154
1156 1158 1160 1162 1164 1166 1168 1170 1172 1174 1176 1178 1181 1183
1185 1187 1189 1191 1193 1195 1197 1199 1201 1203 1205 1207 1209 1211
1213 1215 1217 1219 1221 1223 1225 1227 1229 1231 1233 1235 1237 1239
1241 1243 1246 1248 1250 1252 1254 1256 1258 1260 1262 1264 1266 1268
1270 1272 1274 1276 1278 1280 1282 1284 1286 1288 1290 1292 1294 1296
1298 1300 1302 1304 1306 1308 1311 1313 1315 1317 1319 1321 1323 1325
1327 1329 1331 1333 1335 1337 1339 1341 1343 1345 1347 1349 1351 1353
1355 1357 1359 1361 1363 1365 1367 1369 1371 1373 1376 1378 1472 1474
1476 1478 1480 1482 1484 1486 1488 1490 1492 1494 1496 1498 1500 1502
1504 1506 1508 1510 1512 1514 1516 1518 1520 1522 1524 1526 1528 1530
1532 1534 1536 1538 1540 1542 1544 1546 1548 1550 1552 1554 1556 1558
1560 1562 1564 1566 1568 1570 1572 1575 1577 1671 1673 1675 1677 1679
1681 1683 1685 1687 1689 1691 1693 1695 1697 1699 1701 1703 1705 1707
1709 1711 1713 1715 1717 1719 1721 1723 1725 1727 1729 1731 1733 1735
1737 1739 1741 1743 1745 1747 1749 1751 1753 1755 1757 1759 1761 1763
1765 1767 1769 1771 1774 1776 1869 1871 1873 1875 1877 1879 1881 1883
1885 1887 1889 1891 1893 1895 1897 1899 1901 1903 1905 1907 1909 1911
1913 1915 1917 1919 1921 1923 1925 1927 1929 1931 1933 1935 1937 1939
1941 1943 1945 1947 1949 1951 1953 1955 1957 1959 1961 1963 1965 1967
1969 1972 2044 2046 2049 2051 2053 2055 2057 2060 2062 2064 2066 2069
2071 2073 2075 2078 2080 2082 2084 2087 2089 2091 2093 2096 2098 2100
2102 2105 2107 2109 2111 2114 2116 2118 2120 2123 2125 2127 2129 2132
2134 2136 2138 2141 2143 2145 2147 2150 2152 2154 2156 2159 2161 2163
2165 2168 2170 2172 2174 2177 2179 2181 2183 2186 2188 2190 2192 2195
2197 2199 2201 2203 2206 2208 2210 2212 2214 2217 2219 2221 2223 2225
2228 2230 2232 2234 2236 2239 2241 2243 2245 2247 2250 2252 2254 2256
2258 2261 2263 2265 2267 2269 2272 2274 2276 2278 2280 2283 2285 2287
2289 2291 2294 2296 2298 2300 2302 2305 2307 2309 2311 2313 2316 2318
2320 2322 2324 2327 2329 2331 2333 2335 2338 2340 2342 2344 2346 2349
2351 2353 2355 2357 2360 2362 2364 2366 2368 2373 2378
GO 86 88 94 100 234 236 242 250 412 414 420 426 1058 1060
1066 1074 1416 1418 1424 1432 1617 1619 1625 1633 1815 1817 1823 1831
2008 2010 2016 2024
MFLD 169# 169 171# 171 173# 173 176# 176 178# 178 180# 180 183# 183
185# 185 187# 187 190# 190 192# 192 194# 194 287# 287 289# 289
294# 294 296# 296 298# 298 300# 300 302# 302 304# 304 309# 309
311# 311 313# 313 315# 315 317# 317 319# 319 324# 324 326# 326
328# 328 330# 330 332# 332 334# 334 339# 339 341# 341 343# 343
345# 345 347# 347 349# 349 352# 352 592# 592 594# 594 596# 596
598# 598 600# 600 602# 602 604# 604 606# 606 608# 608 610# 610
612# 612 614# 614 619# 619 621# 621 623# 623 625# 625 627# 627
629# 629 631# 631 633# 633 635# 635 637# 637 639# 639 641# 641
646# 646 648# 648 650# 650 652# 652 654# 654 656# 656 658# 658
660# 660 662# 662 664# 664 666# 666 668# 668 673# 673 675# 675
677# 677 679# 679 681# 681 683# 683 685# 685 687# 687 689# 689
691# 691 693# 693 695# 695 700# 700 702# 702 704# 704 706# 706 SEQ 1382
708# 708 710# 710 712# 712 714# 714 716# 716 718# 718 720# 720
722# 722 727# 727 729# 729 731# 731 733# 733 735# 735 737# 737
739# 739 741# 741 743# 743 745# 745 747# 747 749# 749 754# 754
756# 756 758# 758 760# 760 762# 762 764# 764 766# 766 768# 768
770# 770 772# 772 774# 774 776# 776 781# 781 783# 783 785# 785
787# 787 789# 789 791# 791 793# 793 795# 795 797# 797 799# 799
801# 801 803# 803 808# 808 810# 810 812# 812 814# 814 816# 816
818# 818 820# 820 822# 822 824# 824 826# 826 828# 828 830# 830
835# 835 837# 837 839# 839 841# 841 843# 843 845# 845 847# 847
849# 849 851# 851 853# 853 855# 855 857# 857 862# 862 864# 864
866# 866 868# 868 870# 870 872# 872 874# 874 876# 876 878# 878
880# 880 882# 882 884# 884 889# 889 891# 891 893# 893 895# 895
897# 897 899# 899 901# 901 903# 903 905# 905 907# 907 909# 909
911# 911 916# 916 918# 918 920# 920 922# 922 924# 924 926# 926
928# 928 930# 930 932# 932 934# 934 936# 936 938# 938 943# 943
945# 945 947# 947 949# 949 951# 951 953# 953 955# 955 957# 957
959# 959 961# 961 963# 963 965# 965 970# 970 972# 972 974# 974
976# 976 978# 978 980# 980 982# 982 984# 984 986# 986 988# 988
990# 990 992# 992 997# 997 999# 999 1001# 1001 1003# 1003 1005# 1005
1007# 1007 1009# 1009 1011# 1011 1013# 1013 1015# 1015 1017# 1017 1019# 1019
1114# 1114 1116# 1116 1118# 1118 1120# 1120 1122# 1122 1124# 1124 1126# 1126
1128# 1128 1130# 1130 1132# 1132 1134# 1134 1136# 1136 1138# 1138 1140# 1140
1142# 1142 1144# 1144 1146# 1146 1148# 1148 1150# 1150 1152# 1152 1154# 1154
1156# 1156 1158# 1158 1160# 1160 1162# 1162 1164# 1164 1166# 1166 1168# 1168
1170# 1170 1172# 1172 1174# 1174 1176# 1176 1178# 1178 1181# 1181 1183# 1183
1185# 1185 1187# 1187 1189# 1189 1191# 1191 1193# 1193 1195# 1195 1197# 1197
1199# 1199 1201# 1201 1203# 1203 1205# 1205 1207# 1207 1209# 1209 1211# 1211
1213# 1213 1215# 1215 1217# 1217 1219# 1219 1221# 1221 1223# 1223 1225# 1225
1227# 1227 1229# 1229 1231# 1231 1233# 1233 1235# 1235 1237# 1237 1239# 1239
1241# 1241 1243# 1243 1246# 1246 1248# 1248 1250# 1250 1252# 1252 1254# 1254
1256# 1256 1258# 1258 1260# 1260 1262# 1262 1264# 1264 1266# 1266 1268# 1268
1270# 1270 1272# 1272 1274# 1274 1276# 1276 1278# 1278 1280# 1280 1282# 1282
1284# 1284 1286# 1286 1288# 1288 1290# 1290 1292# 1292 1294# 1294 1296# 1296
1298# 1298 1300# 1300 1302# 1302 1304# 1304 1306# 1306 1308# 1308 1311# 1311
1313# 1313 1315# 1315 1317# 1317 1319# 1319 1321# 1321 1323# 1323 1325# 1325
1327# 1327 1329# 1329 1331# 1331 1333# 1333 1335# 1335 1337# 1337 1339# 1339
1341# 1341 1343# 1343 1345# 1345 1347# 1347 1349# 1349 1351# 1351 1353# 1353
1355# 1355 1357# 1357 1359# 1359 1361# 1361 1363# 1363 1365# 1365 1367# 1367
1369# 1369 1371# 1371 1373# 1373 1376# 1376 1378# 1378 1472# 1472 1474# 1474
1476# 1476 1478# 1478 1480# 1480 1482# 1482 1484# 1484 1486# 1486 1488# 1488
1490# 1490 1492# 1492 1494# 1494 1496# 1496 1498# 1498 1500# 1500 1502# 1502
1504# 1504 1506# 1506 1508# 1508 1510# 1510 1512# 1512 1514# 1514 1516# 1516
1518# 1518 1520# 1520 1522# 1522 1524# 1524 1526# 1526 1528# 1528 1530# 1530
1532# 1532 1534# 1534 1536# 1536 1538# 1538 1540# 1540 1542# 1542 1544# 1544
1546# 1546 1548# 1548 1550# 1550 1552# 1552 1554# 1554 1556# 1556 1558# 1558
1560# 1560 1562# 1562 1564# 1564 1566# 1566 1568# 1568 1570# 1570 1572# 1572
1575# 1575 1577# 1577 1671# 1671 1673# 1673 1675# 1675 1677# 1677 1679# 1679
1681# 1681 1683# 1683 1685# 1685 1687# 1687 1689# 1689 1691# 1691 1693# 1693
1695# 1695 1697# 1697 1699# 1699 1701# 1701 1703# 1703 1705# 1705 1707# 1707
1709# 1709 1711# 1711 1713# 1713 1715# 1715 1717# 1717 1719# 1719 1721# 1721
1723# 1723 1725# 1725 1727# 1727 1729# 1729 1731# 1731 1733# 1733 1735# 1735
1737# 1737 1739# 1739 1741# 1741 1743# 1743 1745# 1745 1747# 1747 1749# 1749
1751# 1751 1753# 1753 1755# 1755 1757# 1757 1759# 1759 1761# 1761 1763# 1763 SEQ 1383
1765# 1765 1767# 1767 1769# 1769 1771# 1771 1774# 1774 1776# 1776 1869# 1869
1871# 1871 1873# 1873 1875# 1875 1877# 1877 1879# 1879 1881# 1881 1883# 1883
1885# 1885 1887# 1887 1889# 1889 1891# 1891 1893# 1893 1895# 1895 1897# 1897
1899# 1899 1901# 1901 1903# 1903 1905# 1905 1907# 1907 1909# 1909 1911# 1911
1913# 1913 1915# 1915 1917# 1917 1919# 1919 1921# 1921 1923# 1923 1925# 1925
1927# 1927 1929# 1929 1931# 1931 1933# 1933 1935# 1935 1937# 1937 1939# 1939
1941# 1941 1943# 1943 1945# 1945 1947# 1947 1949# 1949 1951# 1951 1953# 1953
1955# 1955 1957# 1957 1959# 1959 1961# 1961 1963# 1963 1965# 1965 1967# 1967
1969# 1969 1972# 1972 2044# 2044 2046# 2046 2049# 2049 2051# 2051 2053# 2053
2055# 2055 2057# 2057 2060# 2060 2062# 2062 2064# 2064 2066# 2066 2069# 2069
2071# 2071 2073# 2073 2075# 2075 2078# 2078 2080# 2080 2082# 2082 2084# 2084
2087# 2087 2089# 2089 2091# 2091 2093# 2093 2096# 2096 2098# 2098 2100# 2100
2102# 2102 2105# 2105 2107# 2107 2109# 2109 2111# 2111 2114# 2114 2116# 2116
2118# 2118 2120# 2120 2123# 2123 2125# 2125 2127# 2127 2129# 2129 2132# 2132
2134# 2134 2136# 2136 2138# 2138 2141# 2141 2143# 2143 2145# 2145 2147# 2147
2150# 2150 2152# 2152 2154# 2154 2156# 2156 2159# 2159 2161# 2161 2163# 2163
2165# 2165 2168# 2168 2170# 2170 2172# 2172 2174# 2174 2177# 2177 2179# 2179
2181# 2181 2183# 2183 2186# 2186 2188# 2188 2190# 2190 2192# 2192 2195# 2195
2197# 2197 2199# 2199 2201# 2201 2203# 2203 2206# 2206 2208# 2208 2210# 2210
2212# 2212 2214# 2214 2217# 2217 2219# 2219 2221# 2221 2223# 2223 2225# 2225
2228# 2228 2230# 2230 2232# 2232 2234# 2234 2236# 2236 2239# 2239 2241# 2241
2243# 2243 2245# 2245 2247# 2247 2250# 2250 2252# 2252 2254# 2254 2256# 2256
2258# 2258 2261# 2261 2263# 2263 2265# 2265 2267# 2267 2269# 2269 2272# 2272
2274# 2274 2276# 2276 2278# 2278 2280# 2280 2283# 2283 2285# 2285 2287# 2287
2289# 2289 2291# 2291 2294# 2294 2296# 2296 2298# 2298 2300# 2300 2302# 2302
2305# 2305 2307# 2307 2309# 2309 2311# 2311 2313# 2313 2316# 2316 2318# 2318
2320# 2320 2322# 2322 2324# 2324 2327# 2327 2329# 2329 2331# 2331 2333# 2333
2335# 2335 2338# 2338 2340# 2340 2342# 2342 2344# 2344 2346# 2346 2349# 2349
2351# 2351 2353# 2353 2355# 2355 2357# 2357 2360# 2360 2362# 2362 2364# 2364
2366# 2366 2368# 2368 2373# 2373 2378# 2378
MWORD 169 171 173 176 178 180 183 185 187 190 192 194 287 289
294 296 298 300 302 304 309 311 313 315 317 319 324 326
328 330 332 334 339 341 343 345 347 349 352 592 594 596
598 600 602 604 606 608 610 612 614 619 621 623 625 627
629 631 633 635 637 639 641 646 648 650 652 654 656 658
660 662 664 666 668 673 675 677 679 681 683 685 687 689
691 693 695 700 702 704 706 708 710 712 714 716 718 720
722 727 729 731 733 735 737 739 741 743 745 747 749 754
756 758 760 762 764 766 768 770 772 774 776 781 783 785
787 789 791 793 795 797 799 801 803 808 810 812 814 816
818 820 822 824 826 828 830 835 837 839 841 843 845 847
849 851 853 855 857 862 864 866 868 870 872 874 876 878
880 882 884 889 891 893 895 897 899 901 903 905 907 909
911 916 918 920 922 924 926 928 930 932 934 936 938 943
945 947 949 951 953 955 957 959 961 963 965 970 972 974
976 978 980 982 984 986 988 990 992 997 999 1001 1003 1005
1007 1009 1011 1013 1015 1017 1019 1114 1116 1118 1120 1122 1124 1126
1128 1130 1132 1134 1136 1138 1140 1142 1144 1146 1148 1150 1152 1154
1156 1158 1160 1162 1164 1166 1168 1170 1172 1174 1176 1178 1181 1183
1185 1187 1189 1191 1193 1195 1197 1199 1201 1203 1205 1207 1209 1211
1213 1215 1217 1219 1221 1223 1225 1227 1229 1231 1233 1235 1237 1239
1241 1243 1246 1248 1250 1252 1254 1256 1258 1260 1262 1264 1266 1268
1270 1272 1274 1276 1278 1280 1282 1284 1286 1288 1290 1292 1294 1296 SEQ 1384
1298 1300 1302 1304 1306 1308 1311 1313 1315 1317 1319 1321 1323 1325
1327 1329 1331 1333 1335 1337 1339 1341 1343 1345 1347 1349 1351 1353
1355 1357 1359 1361 1363 1365 1367 1369 1371 1373 1376 1378 1472 1474
1476 1478 1480 1482 1484 1486 1488 1490 1492 1494 1496 1498 1500 1502
1504 1506 1508 1510 1512 1514 1516 1518 1520 1522 1524 1526 1528 1530
1532 1534 1536 1538 1540 1542 1544 1546 1548 1550 1552 1554 1556 1558
1560 1562 1564 1566 1568 1570 1572 1575 1577 1671 1673 1675 1677 1679
1681 1683 1685 1687 1689 1691 1693 1695 1697 1699 1701 1703 1705 1707
1709 1711 1713 1715 1717 1719 1721 1723 1725 1727 1729 1731 1733 1735
1737 1739 1741 1743 1745 1747 1749 1751 1753 1755 1757 1759 1761 1763
1765 1767 1769 1771 1774 1776 1869 1871 1873 1875 1877 1879 1881 1883
1885 1887 1889 1891 1893 1895 1897 1899 1901 1903 1905 1907 1909 1911
1913 1915 1917 1919 1921 1923 1925 1927 1929 1931 1933 1935 1937 1939
1941 1943 1945 1947 1949 1951 1953 1955 1957 1959 1961 1963 1965 1967
1969 1972 2044 2046 2049 2051 2053 2055 2057 2060 2062 2064 2066 2069
2071 2073 2075 2078 2080 2082 2084 2087 2089 2091 2093 2096 2098 2100
2102 2105 2107 2109 2111 2114 2116 2118 2120 2123 2125 2127 2129 2132
2134 2136 2138 2141 2143 2145 2147 2150 2152 2154 2156 2159 2161 2163
2165 2168 2170 2172 2174 2177 2179 2181 2183 2186 2188 2190 2192 2195
2197 2199 2201 2203 2206 2208 2210 2212 2214 2217 2219 2221 2223 2225
2228 2230 2232 2234 2236 2239 2241 2243 2245 2247 2250 2252 2254 2256
2258 2261 2263 2265 2267 2269 2272 2274 2276 2278 2280 2283 2285 2287
2289 2291 2294 2296 2298 2300 2302 2305 2307 2309 2311 2313 2316 2318
2320 2322 2324 2327 2329 2331 2333 2335 2338 2340 2342 2344 2346 2349
2351 2353 2355 2357 2360 2362 2364 2366 2368 2373 2378
PNTHW 282 1107 1465 1666 1864
PNTMSG 277 280 582 585 1102 1105 1109 1460 1463 1467 1661 1664 1859 1862
PNTOCS 584
RTN 89 114 133 139 160 237 267 283 415 440 457 466 487 586
1061 1092 1110 1419 1450 1468 1620 1651 1667 1818 1849 1865 2011 2035
SCOPER 107 261 433 1086 1444 1645 1843 2029
TMSG 585
TMSGC 276 279 582 1101 1104 1109 1459 1462 1467 1660 1663 1858 1861
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 1
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1385
1 SUBTTL MPROC Module Tests
2
3 SALL
4
5 SEARCH DFPTA,MONSYM
6
7 ; INTERN's
8
9 ENTRY TSTU1,TSTU2,TSTU3,TSTU4,TSTU5,TSTU6,TSTU7,TSTU10
10 ENTRY TSTU11,TSTU12,TSTU13,TSTU14,TSTU15,TSTU16,TSTU17,TSTU20
11 ENTRY TSTU21,TSTU22,TSTU23,TSTU24,TSTU25,TSTU26,TSTU27,TSTU30
12 ENTRY TSTU31,TSTU32,TSTU33,TSTU34,TSTU35,TSTU36,TSTU37,TSTU40
13 ENTRY TSTU41
14
15 ; EXTERN's
16
17 EXTERN TSTE45,TSTC3,TSTC4
18
19 ; EXTERN's located in DFPTA1.MAC (Mainline code..)
20
21 EXTERN BUFF,TLOAD,CSRPNT,TRACE,TSTSUB,ODELAY,CBUF,UDEBUG
22 EXTERN TSLOD1,TSLOD2,CADDR,CWORDL,CWORDR,DRCRAM,DWCRAM,PARFLG,CALPAR
23 EXTERN AEXEC,AAPNT,ALCSR,ALFLS,PORTCI,PORTNI
24 EXTERN BEXEC,BBPNT,CEBUF,AEBUF
25 EXTERN TEXEC,TTPNT,TADDR,SEXEC,SSPNT
26
27 ; EXTERN's located in DFPTAI.MAC (IPA20 Device Handling Routines module)
28
29 EXTERN LDRAR,LDCRAM,LDCSR,RDEBUF,RDLAR,RDCRAM,RDCSR
30 EXTERN IPACLR,IPASST,SNEXT,SLAST,SDATA
31 EXTERN CHINIT,CHDATA,GENCCW,INITPI,SETVEC
32
33 ; EXTERN's located in DFPTAU.MAC (Utility Routines module)
34
35 EXTERN BUFGEN,SCOSW
36
37
38 ;#********************************************************************
39 ; Z8 - Address for use in DDT
40 ;#********************************************************************
41
42 000000' Z8: ; address of 00000'
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 2
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1386
43
44 ;#********************************************************************
45 ;* TEST 1 - CRAM Data Test (RAR12=0)
46 ;
47 ; Description: This test verifies each CRAM location, by writing
48 ; a series of data patterns to and from each CRAM
49 ; location.
50 ;
51 ; Procedure: Port Clear
52 ; Select address to write, write to RAR
53 ; Write data pattern to CRAM (30 bits wide)
54 ; Read CRAM, verify the data
55 ; Repeat write/read sequence with each data pattern
56 ;
57 ; Repeat sequence with each CRAM location
58 ;
59 ; Data Patterns: zero's
60 ; one's
61 ; alternating (52..)
62 ; alternating (25..)
63 ; floating one
64 ; floating zero
65 ;
66 ; Failure: ---
67 ;#********************************************************************
68
69 ; Test data
70
71 000000' 254 00 0 00 000011' TSTU1: JRST TG1 ; go start test
72 000001' 200403 000001 MPROC!NDMP!ZMPROC!1 ; test mask
73 000002' 000000 011166' 0,,[ASCIZ ^CRAM Data Test RAR12=0^]
74 000003' 011173' 011201' [EXP M10,M18,M19,M4,M16,MLAST!M17],,[EXP MLAST!M1]
75 000004' 000000 000154' TSTU2 ; failure test table
76 000005' 000000 000230' TSTU3 ; ...
77 000006' 000000 000305' TSTU4
78 000007' 000000 000404' TSTU5
79 000010' 777777 777777 -1
80
81 ; Start test
82
83 000011' 201 00 0 00 000000' TG1: MOVEI Z8 ; get address of module start
84 000012' 260 17 0 00 000000* GO TRACE ; handle trace output
85 000013' 474 07 0 00 000000 SETO 7, ; init CRAM address register
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 3
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1387
86
87 ; First set up RAR to correct address
88
89 000014' 350 00 0 00 000007 TA1: AOS 7 ; point to next CRAM location
90 000015' 303 07 0 00 007777 CAILE 7,7777 ; done yet?
91 000016' 254 00 0 00 000050' JRST TX1 ; yes - exit
92 000017' 332 00 0 00 000000* SKIPE UDEBUG ; debug mode?
93 JRST [CAILE 7,10 ; yes - check if exit early
94 JRST TX1
95 000020' 254 00 0 00 011202' JRST .+1]
96 000021' 260 17 0 00 000000* GO IPACLR ; do a port clear
97 000022' 200 01 0 00 000007 MOVE 1,7 ; get address
98 000023' 242 01 0 00 000001 LSH 1,1 ; include bit to point to which half
99 000024' 202 01 0 00 011164' MOVEM 1,SAVCRA ; save CRAM address
100 000025' 260 17 0 00 000000* GO LDRAR ; write it to RAR register
101
102 ; Next, get the data pattern to write
103
104 000026' 400 06 0 00 000000 SETZ 6, ; clear bit table pointer
105 000027' 200 01 0 06 000053' TB1: MOVE 1,T1PAT(6) ; get pattern to write
106 000030' 202 01 0 00 011162' MOVEM 1,SAVCR1 ; save data
107 000031' 306 01 0 00 000377 CAIN 1,377 ; end of table?
108 000032' 254 00 0 00 000014' JRST TA1 ; yes - end of segment
109
110 ; Now write/read the location
111
112 000033' 350 00 0 00 000000* AOS TSTSUB ; set up subtest number
113 000034' 400 15 0 00 000000 TB1L: SETZ ERFLG, ; clear error flag
114 000035' 260 17 0 00 000000* GO LDCRAM ; write CRAM
115 000036' 260 17 0 00 000000* GO RDCRAM ; read CRAM
116 000037' 202 01 0 00 011163' MOVEM 1,SAVCR2 ; save CRAM data
117 000040' 312 01 0 00 011162' CAME 1,SAVCR1 ; correct?
118 000041' 474 15 0 00 000000 SETO ERFLG, ; no - flag error
119 000042' 027 00 0 00 000051' SCOPER MA1 ; print error message
120 000043' 254 00 0 00 000034' JRST TB1L ; loop on error
121 000044' 254 00 0 00 000050' JRST TX1 ; altmode exit
122 000045' 326 15 0 00 000050' JUMPN ERFLG,TX1 ; error? yes - exit
123
124 ; Increment data pattern pointer
125
126 000046' 350 00 0 00 000006 AOS 6 ; point to next data pattern
127 000047' 254 00 0 00 000027' JRST TB1 ; repeat this segment
128
129 ; End of test
130
131 000050' 263 17 0 00 000000 TX1: RTN ; return
132
133 ; Error messages
134
135 000051' 140000 011205' MA1: MSG!TXNOT![ASCIZ ^CRAM write/read failed.^]
136 000052' 270000 011023' LAST!CALL!TXALL!MPNT1 ; print CRAM data correct/actual
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 4
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1388
137
138 ; Data Patterns
139
140 000053' 000000 000000 T1PAT: EXP 0,7777777777,5252525252,2525252525
141 000054' 007777 777777
142 000055' 005252 525252
143 000056' 002525 252525
144 000057' 000000 000001 EXP 0000000001,0000000002,0000000004
145 000060' 000000 000002
146 000061' 000000 000004
147 000062' 000000 000010 EXP 0000000010,0000000020,0000000040
148 000063' 000000 000020
149 000064' 000000 000040
150 000065' 000000 000100 EXP 0000000100,0000000200,0000000400
151 000066' 000000 000200
152 000067' 000000 000400
153 000070' 000000 001000 EXP 0000001000,0000002000,0000004000
154 000071' 000000 002000
155 000072' 000000 004000
156 000073' 000000 010000 EXP 0000010000,0000020000,0000040000
157 000074' 000000 020000
158 000075' 000000 040000
159 000076' 000000 100000 EXP 0000100000,0000200000,0000400000
160 000077' 000000 200000
161 000100' 000000 400000
162 000101' 000001 000000 EXP 0001000000,0002000000,0004000000
163 000102' 000002 000000
164 000103' 000004 000000
165 000104' 000010 000000 EXP 0010000000,0020000000,0040000000
166 000105' 000020 000000
167 000106' 000040 000000
168 000107' 000100 000000 EXP 0100000000,0200000000,0400000000
169 000110' 000200 000000
170 000111' 000400 000000
171 000112' 001000 000000 EXP 1000000000,2000000000,4000000000
172 000113' 002000 000000
173 000114' 004000 000000
174 000115' 007777 777776 EXP 7777777776,7777777775,7777777773
175 000116' 007777 777775
176 000117' 007777 777773
177 000120' 007777 777767 EXP 7777777767,7777777757,7777777737
178 000121' 007777 777757
179 000122' 007777 777737
180 000123' 007777 777677 EXP 7777777677,7777777577,7777777377
181 000124' 007777 777577
182 000125' 007777 777377
183 000126' 007777 776777 EXP 7777776777,7777775777,7777773777
184 000127' 007777 775777
185 000130' 007777 773777
186 000131' 007777 767777 EXP 7777767777,7777757777,7777737777
187 000132' 007777 757777
188 000133' 007777 737777
189 000134' 007777 677777 EXP 7777677777,7777577777,7777377777
190 000135' 007777 577777
191 000136' 007777 377777
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 4-1
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1389
192 000137' 007776 777777 EXP 7776777777,7775777777,7773777777
193 000140' 007775 777777
194 000141' 007773 777777
195 000142' 007767 777777 EXP 7767777777,7757777777,7737777777
196 000143' 007757 777777
197 000144' 007737 777777
198 000145' 007677 777777 EXP 7677777777,7577777777,7377777777
199 000146' 007577 777777
200 000147' 007377 777777
201 000150' 006777 777777 EXP 6777777777,5777777777,3777777777
202 000151' 005777 777777
203 000152' 003777 777777
204 000153' 000000 000377 EXP 377 ; table terminator
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 5
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1390
205
206 ;#********************************************************************
207 ;* TEST 2 - CRAM Test (RAR12=1)
208 ;
209 ; Description: This test verifies each CRAM location, by writing
210 ; a series of data patterns to and from each CRAM
211 ; location.
212 ;
213 ; Procedure: Port Clear
214 ; Select address to write, write to RAR
215 ; Write data pattern to CRAM (30 bits wide)
216 ; Read CRAM, verify the data
217 ; Repeat write/read sequence with each data pattern
218 ;
219 ; Repeat sequence with each CRAM location
220 ;
221 ; Data Patterns: zero's
222 ; one's
223 ; alternating (52..)
224 ; alternating (25..)
225 ; floating one
226 ; floating zero
227 ;
228 ; Failure: ---
229 ;#********************************************************************
230
231 ; Test data
232
233 000154' 254 00 0 00 000164' TSTU2: JRST TG2 ; go start test
234 000155' 200403 000002 MPROC!NDMP!ZMPROC!2 ; test mask
235 000156' 000000 011212' 0,,[ASCIZ ^CRAM Data Test RAR12=1^]
236 000157' 011217' 011201' [EXP M10,M17,M19,M4,M16,MLAST!M18],,[EXP MLAST!M1]
237 000160' 000000 000230' TSTU3 ; failure test table
238 000161' 000000 000305' TSTU4 ; ...
239 000162' 000000 000404' TSTU5
240 000163' 777777 777777 -1
241
242 ; Start test
243
244 000164' 201 00 0 00 000000' TG2: MOVEI Z8 ; get address of module start
245 000165' 260 17 0 00 000012* GO TRACE ; handle trace output
246 000166' 474 07 0 00 000000 SETO 7, ; init CRAM address register
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 6
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1391
247
248 ; First set up RAR to correct address
249
250 000167' 350 00 0 00 000007 TA2: AOS 7 ; point to next CRAM location
251 000170' 303 07 0 00 007777 CAILE 7,7777 ; done yet?
252 000171' 254 00 0 00 000225' JRST TX2 ; yes - exit
253 000172' 332 00 0 00 000017* SKIPE UDEBUG ; debug mode?
254 JRST [CAILE 7,10 ; yes - check if exit early
255 JRST TX2
256 000173' 254 00 0 00 011225' JRST .+1]
257 000174' 260 17 0 00 000021* GO IPACLR ; do a port clear
258 000175' 200 01 0 00 000007 MOVE 1,7 ; get address
259 000176' 242 01 0 00 000001 LSH 1,1 ; include bit to point to which half
260 000177' 350 00 0 00 000001 AOS 1 ; point to right half
261 000200' 202 01 0 00 011164' MOVEM 1,SAVCRA ; save CRAM address
262 000201' 260 17 0 00 000025* GO LDRAR ; write it to RAR register
263
264 ; Next, get the data pattern to write
265
266 000202' 400 06 0 00 000000 SETZ 6, ; clear bit table pointer
267 000203' 200 01 0 06 000053' TB2: MOVE 1,T1PAT(6) ; get pattern to write
268 000204' 202 01 0 00 011162' MOVEM 1,SAVCR1 ; save data
269 000205' 306 01 0 00 000377 CAIN 1,377 ; end of table?
270 000206' 254 00 0 00 000167' JRST TA2 ; yes - end of segment
271
272 ; Now write/read the location
273
274 000207' 350 00 0 00 000033* AOS TSTSUB ; set up subtest number
275 000210' 400 15 0 00 000000 TB2L: SETZ ERFLG, ; clear error flag
276 000211' 260 17 0 00 000035* GO LDCRAM ; write CRAM
277 000212' 260 17 0 00 000211* GO LDCRAM ; write CRAM
278 000213' 260 17 0 00 000036* GO RDCRAM ; read CRAM
279 000214' 202 01 0 00 011163' MOVEM 1,SAVCR2 ; save CRAM data
280 000215' 312 01 0 00 011162' CAME 1,SAVCR1 ; correct?
281 000216' 474 15 0 00 000000 SETO ERFLG, ; no - flag error
282 000217' 027 00 0 00 000226' SCOPER MA2 ; print error message
283 000220' 254 00 0 00 000210' JRST TB2L ; loop on error
284 000221' 254 00 0 00 000225' JRST TX2 ; altmode exit
285 000222' 326 15 0 00 000225' JUMPN ERFLG,TX2 ; error? yes - exit
286
287 ; Increment data pattern pointer
288
289 000223' 350 00 0 00 000006 AOS 6 ; point to next data pattern
290 000224' 254 00 0 00 000203' JRST TB2 ; repeat this segment
291
292 ; End of test
293
294 000225' 263 17 0 00 000000 TX2: RTN ; return
295
296 ; Error messages
297
298 000226' 140000 011205' MA2: MSG!TXNOT![ASCIZ ^CRAM write/read failed.^]
299 000227' 270000 011023' LAST!CALL!TXALL!MPNT1 ; print CRAM data correct/actual
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 7
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1392
300
301 ;#********************************************************************
302 ;* TEST 3 - CRAM Addressing Test
303 ;
304 ; Description: This test verifies CRAM address selection by
305 ; writing an address pattern to each location, then
306 ; reading each location and verifying the address
307 ; pattern read back is correct.
308 ;
309 ; Procedure: Port Clear
310 ; For addr 0-7777: Write RAR (left half of CRAM)
311 ; Write 30 bit address pattern
312 ; Write RAR (right half of CRAM)
313 ; Write complement of pattern
314 ; For addr 0-7777: Write RAR (left half of CRAM)
315 ; Read 30 bit address pattern
316 ; Verify contents
317 ; Write RAR (right half of CRAM)
318 ; Verify contents
319 ;
320 ; Failure: ---
321 ;#********************************************************************
322
323 ; Test data
324
325 000230' 254 00 0 00 000237' TSTU3: JRST TG3 ; go start test
326 000231' 200403 000003 MPROC!NDMP!ZMPROC!3 ; test mask
327 000232' 000000 011230' 0,,[ASCIZ ^CRAM Addressing Test^]
328 000233' 011235' 011236' [EXP MLAST!M4],,[EXP M16,M10,M17,M18,MLAST!M19]
329 000234' 000000 000305' TSTU4 ; failure test table
330 000235' 000000 000404' TSTU5 ; ...
331 000236' 777777 777777 -1
332
333 ; Start test
334
335 000237' 201 00 0 00 000000' TG3: MOVEI Z8 ; get address of module start
336 000240' 260 17 0 00 000165* GO TRACE ; handle trace output
337
338 ; Test initialization
339
340 000241' 400 15 0 00 000000 TA3: SETZ ERFLG, ; clear error flag
341 000242' 260 17 0 00 000174* GO IPACLR ; do a port clear
342 000243' 402 00 0 00 000207* SETZM TSTSUB ; initialize subtest number
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 8
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1393
343
344 ; First write the address pattern to all locations
345
346 000244' 400 07 0 00 000000 SETZ 7, ; start at location 0
347 000245' 200 01 0 00 000007 TB3: MOVE 1,7 ; get address
348 000246' 242 01 0 00 000001 LSH 1,1 ; include bit to point to which half
349 000247' 260 17 0 00 000201* GO LDRAR ; write it to RAR register
350 000250' 260 17 0 00 000212* GO LDCRAM ; write it to CRAM (Left half)
351 000251' 350 00 0 00 000001 AOS 1 ; point to right half
352 000252' 260 17 0 00 000247* GO LDRAR ; write it to RAR register
353 000253' 450 01 0 00 000001 SETCA 1,1 ; complement it
354 000254' 260 17 0 00 000250* GO LDCRAM ; write it to CRAM (Right half)
355 000255' 350 00 0 00 000007 AOS 7 ; point to next CRAM location
356 000256' 307 07 0 00 007777 CAIG 7,7777 ; done yet?
357 000257' 254 00 0 00 000245' JRST TB3 ; no - continue
358
359 ; Next read all locations and verify the result
360
361 000260' 400 07 0 00 000000 SETZ 7, ; start at location 0
362 000261' 350 00 0 00 000243* TC3: AOS TSTSUB ; set up subtest
363 000262' 200 01 0 00 000007 MOVE 1,7 ; get address
364 000263' 242 01 0 00 000001 LSH 1,1 ; include bit to point to which half
365 000264' 202 01 0 00 011164' MOVEM 1,SAVCRA ; save CRAM address
366 000265' 202 01 0 00 011162' MOVEM 1,SAVCR1 ; save CRAM data (correct)
367 000266' 260 17 0 00 000252* GO LDRAR ; write it to RAR register
368 000267' 260 17 0 00 000213* GO RDCRAM ; read the contents of this location
369 000270' 202 01 0 00 011163' MOVEM 1,SAVCR2 ; save CRAM data (actual)
370 000271' 312 01 0 00 011162' CAME 1,SAVCR1 ; correct?
371 000272' 474 15 0 00 000000 SETO ERFLG, ; no - flag error
372 000273' 027 00 0 00 000303' SCOPER MA3 ; print error message
373 000274' 254 00 0 00 000241' JRST TA3 ; loop on error
374 000275' 254 00 0 00 000302' JRST TX3 ; altmode exit
375 000276' 326 15 0 00 000302' JUMPN ERFLG,TX3 ; error? yes - exit
376 000277' 350 00 0 00 000007 AOS 7 ; point to next CRAM location
377 000300' 307 07 0 00 007777 CAIG 7,7777 ; done yet?
378 000301' 254 00 0 00 000261' JRST TC3 ; no - continue
379
380 ; End of test
381
382 000302' 263 17 0 00 000000 TX3: RTN ; return
383
384 ; Error messages
385
386 000303' 140000 011243' MA3: MSG!TXNOT![ASCIZ ^CRAM data incorrect^]
387 000304' 270000 011023' LAST!CALL!TXALL!MPNT1 ; print CRAM data correct/actual
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 9
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1394
388
389 ;#********************************************************************
390 ;* TEST 4 - RAR/LAR Data Path Test - LDCRAM
391 ;
392 ; Description: This test verifies that the LAR is loaded with
393 ; the contents of the RAR whenever a CRAM location
394 ; is written. This test verifies the data path
395 ; over the MBUS to the RAR to the LAR and back over
396 ; the MBUS.
397 ;
398 ; Procedure: Port Clear
399 ; Select address to write
400 ; Write to RAR (left half)
401 ; Write data to CRAM
402 ; Read LAR
403 ; Verify that the address read is correct
404 ; Write to RAR (right half)
405 ; Write data to CRAM
406 ; Read LAR
407 ; Verify that the address read is correct
408 ;
409 ; Repeat sequence with each CRAM location
410 ;
411 ; Failure: ---
412 ;#********************************************************************
413
414 ; Test data
415
416 000305' 254 00 0 00 000313' TSTU4: JRST TG4 ; go start test
417 000306' 210403 000004 MPROC!MBUS!NDMP!ZMPROC!4 ; test mask
418 000307' 000000 011247' 0,,[ASCIZ ^RAR/LAR Data Path Test - LDCRAM^]
419 000310' 011256' 011235' [EXP M9,MLAST!M16],,[EXP MLAST!M4]
420 000311' 000000 000404' TSTU5 ; failure test table
421 000312' 777777 777777 -1 ; ...
422
423 ; Start test
424
425 000313' 201 00 0 00 000000' TG4: MOVEI Z8 ; get address of module start
426 000314' 260 17 0 00 000240* GO TRACE ; handle trace output
427
428 ; Test initialization
429
430 000315' 260 17 0 00 000242* TA4: GO IPACLR ; do a port clear
431 000316' 201 01 0 00 040000 MOVEI 1,SELLAR ; set this bit
432 000317' 260 17 0 00 000000* GO LDCSR ; write CSR register
433 000320' 400 07 0 00 000000 SETZ 7, ; start at location 0
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 10
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1395
434
435 ; Write address, read LAR, verify result (left half)
436
437 000321' 400 15 0 00 000000 TB4: SETZ ERFLG, ; clear error flag
438 000322' 200 01 0 00 000007 MOVE 1,7 ; get address
439 000323' 242 01 0 00 000001 LSH 1,1 ; include bit to point to which half
440 000324' 202 01 0 00 011162' MOVEM 1,SAVCR1 ; save CRAM address
441 000325' 202 01 0 00 000261* MOVEM 1,TSTSUB ; set up subtest number
442 000326' 350 00 0 00 000325* AOS TSTSUB ; ...
443 000327' 260 17 0 00 000266* GO LDRAR ; write it to RAR register
444 000330' 450 01 0 00 000001 SETCA 1,1 ; complement the data
445 000331' 260 17 0 00 000254* GO LDCRAM ; write to CRAM
446 000332' 260 17 0 00 000000* GO RDLAR ; read LAR
447 000333' 202 01 0 00 011163' MOVEM 1,SAVCR2 ; save data read
448 000334' 312 01 0 00 011162' CAME 1,SAVCR1 ; correct?
449 000335' 474 15 0 00 000000 SETO ERFLG, ; no - flag error
450 000336' 027 00 0 00 000370' SCOPER MA4 ; print error message
451 000337' 254 00 0 00 000321' JRST TB4 ; loop on error
452 000340' 254 00 0 00 000367' JRST TX4 ; altmode exit
453 000341' 326 15 0 00 000367' JUMPN ERFLG,TX4 ; error? yes - exit
454
455 ; Write address, read LAR, verify result (right half)
456
457 000342' 400 15 0 00 000000 TC4: SETZ ERFLG, ; clear error flag
458 000343' 200 01 0 00 000007 MOVE 1,7 ; get address
459 000344' 242 01 0 00 000001 LSH 1,1 ; include bit to point to which half
460 000345' 350 00 0 00 000001 AOS 1 ; point to right half
461 000346' 202 01 0 00 011162' MOVEM 1,SAVCR1 ; save CRAM address
462 000347' 202 01 0 00 000326* MOVEM 1,TSTSUB ; set up subtest number
463 000350' 350 00 0 00 000347* AOS TSTSUB ; ...
464 000351' 260 17 0 00 000327* GO LDRAR ; write it to RAR register
465 000352' 450 01 0 00 000001 SETCA 1,1 ; complement the data
466 000353' 260 17 0 00 000331* GO LDCRAM ; write to CRAM
467 000354' 260 17 0 00 000332* GO RDLAR ; read LAR
468 000355' 202 01 0 00 011163' MOVEM 1,SAVCR2 ; save data read
469 000356' 312 01 0 00 011162' CAME 1,SAVCR1 ; correct?
470 000357' 474 15 0 00 000000 SETO ERFLG, ; no - flag error
471 000360' 027 00 0 00 000370' SCOPER MA4 ; print error message
472 000361' 254 00 0 00 000342' JRST TC4 ; loop on error
473 000362' 254 00 0 00 000367' JRST TX4 ; altmode exit
474 000363' 326 15 0 00 000367' JUMPN ERFLG,TX4 ; error? yes - exit
475
476 ; Point to next address
477
478 000364' 350 00 0 00 000007 AOS 7 ; point to next CRAM location
479 000365' 307 07 0 00 007777 CAIG 7,7777 ; done yet?
480 000366' 254 00 0 00 000321' JRST TB4 ; no - continue
481
482 ; End of test
483
484 000367' 263 17 0 00 000000 TX4: RTN ; return
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 11
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1396
485
486 ; Error messages
487
488 000370' 140000 011260' MA4: MSG!TXNOT![ASCIZ ^LAR not loaded correctly by LDCRAM of location ^]
489 000371' 240000 000373' CALL!TXNOT!MA4PNT
490 000372' 270000 011052' LAST!CALL!TXALL!MPNT2 ; print LAR data correct/actual
491
492 ; Print CRAM address written
493
494 000373' 200 00 0 00 011162' MA4PNT: MOVE SAVCR1
495 000374' 242 01 0 00 000001 LSH 1,1
496 000375' 037 04 0 00 000000 PNT4
497 000376' 200 00 0 00 011162' MOVE SAVCR1
498 000377' 606 00 0 00 000001 TRNN 1
499 000400' 037 00 0 00 011272' TMSG < (Left)>
500 000401' 602 00 0 00 000001 TRNE 1
501 000402' 037 00 0 00 011274' TMSG < (Right)>
502 000403' 263 17 0 00 000000 RTN
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 12
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1397
503
504 ;#********************************************************************
505 ;* TEST 5 - RAR/LAR Data Path Test - RDCRAM
506 ;
507 ; Description: This test verifies that the LAR is loaded with
508 ; the contents of the RAR whenever a CRAM location
509 ; is read. This test verifies the data path over
510 ; the MBUS to the RAR to the LAR and back over the
511 ; MBUS.
512 ;
513 ; Procedure: Port Clear
514 ; Select address to write
515 ; Write RAR (left half)
516 ; Read CRAM
517 ; Read LAR
518 ; Verify that the address read is correct
519 ; Write RAR (right half)
520 ; Read CRAM
521 ; Read LAR
522 ; Verify that the address read is correct
523 ;
524 ; Repeat sequence with each CRAM location
525 ;
526 ; Failure: ---
527 ;#********************************************************************
528
529 ; Test data
530
531 000404' 254 00 0 00 000411' TSTU5: JRST TG5 ; go start test
532 000405' 210403 000005 MPROC!MBUS!NDMP!ZMPROC!5 ; test mask
533 000406' 000000 011276' 0,,[ASCIZ ^RAR/LAR Data Path Test - RDCRAM^]
534 000407' 011256' 011235' [EXP M9,MLAST!M16],,[EXP MLAST!M4]
535 000410' 777777 777777 -1 ; failure test table
536
537 ; Start test
538
539 000411' 201 00 0 00 000000' TG5: MOVEI Z8 ; get address of module start
540 000412' 260 17 0 00 000314* GO TRACE ; handle trace output
541
542 ; Test initialization
543
544 000413' 260 17 0 00 000315* TA5: GO IPACLR ; do a port clear
545 000414' 201 01 0 00 040000 MOVEI 1,SELLAR ; set this bit
546 000415' 260 17 0 00 000317* GO LDCSR ; write CSR register
547 000416' 400 07 0 00 000000 SETZ 7, ; start at location 0
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 13
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1398
548
549 ; Write address, read LAR, verify result (left half)
550
551 000417' 400 15 0 00 000000 TB5: SETZ ERFLG, ; clear error flag
552 000420' 200 01 0 00 000007 MOVE 1,7 ; get address
553 000421' 242 01 0 00 000001 LSH 1,1 ; include bit to point to which half
554 000422' 202 01 0 00 011162' MOVEM 1,SAVCR1 ; save CRAM address
555 000423' 202 01 0 00 000350* MOVEM 1,TSTSUB ; set up subtest number
556 000424' 350 00 0 00 000423* AOS TSTSUB ; ...
557 000425' 260 17 0 00 000351* GO LDRAR ; write it to RAR register
558 000426' 400 01 0 00 000000 SETZ 1, ; set up CSR to read CRAM
559 000427' 260 17 0 00 000415* GO LDCSR ; write CSR register
560 000430' 260 17 0 00 000267* GO RDCRAM ; read CRAM
561 000431' 201 01 0 00 040000 MOVEI 1,SELLAR ; set this bit
562 000432' 260 17 0 00 000427* GO LDCSR ; write CSR register
563 000433' 260 17 0 00 000354* GO RDLAR ; read LAR
564 000434' 202 01 0 00 011163' MOVEM 1,SAVCR2 ; save data read
565 000435' 312 01 0 00 011162' CAME 1,SAVCR1 ; correct?
566 000436' 474 15 0 00 000000 SETO ERFLG, ; no - flag error
567 000437' 027 00 0 00 000474' SCOPER MA5 ; print error message
568 000440' 254 00 0 00 000417' JRST TB5 ; loop on error
569 000441' 254 00 0 00 000473' JRST TX5 ; altmode exit
570 000442' 326 15 0 00 000473' JUMPN ERFLG,TX5 ; error? yes - exit
571
572 ; Write address, read LAR, verify result (right half)
573
574 000443' 400 15 0 00 000000 TC5: SETZ ERFLG, ; clear error flag
575 000444' 200 01 0 00 000007 MOVE 1,7 ; get address
576 000445' 242 01 0 00 000001 LSH 1,1 ; include bit to point to which half
577 000446' 350 00 0 00 000001 AOS 1 ; point to right half
578 000447' 202 01 0 00 011162' MOVEM 1,SAVCR1 ; save CRAM address
579 000450' 202 01 0 00 000424* MOVEM 1,TSTSUB ; set up subtest number
580 000451' 350 00 0 00 000450* AOS TSTSUB ; ...
581 000452' 260 17 0 00 000425* GO LDRAR ; write it to RAR register
582 000453' 400 01 0 00 000000 SETZ 1, ; set up CSR to read CRAM
583 000454' 260 17 0 00 000432* GO LDCSR ; write CSR register
584 000455' 260 17 0 00 000430* GO RDCRAM ; read CRAM
585 000456' 201 01 0 00 040000 MOVEI 1,SELLAR ; set this bit
586 000457' 260 17 0 00 000454* GO LDCSR ; write CSR register
587 000460' 260 17 0 00 000433* GO RDLAR ; read LAR
588 000461' 202 01 0 00 011163' MOVEM 1,SAVCR2 ; save data read
589 000462' 312 01 0 00 011162' CAME 1,SAVCR1 ; correct?
590 000463' 474 15 0 00 000000 SETO ERFLG, ; no - flag error
591 000464' 027 00 0 00 000474' SCOPER MA5 ; print error message
592 000465' 254 00 0 00 000443' JRST TC5 ; loop on error
593 000466' 254 00 0 00 000473' JRST TX5 ; altmode exit
594 000467' 326 15 0 00 000473' JUMPN ERFLG,TX5 ; error? yes - exit
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 14
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1399
595
596 ; Point to next address
597
598 000470' 350 00 0 00 000007 AOS 7 ; point to next CRAM location
599 000471' 307 07 0 00 007777 CAIG 7,7777 ; done yet?
600 000472' 254 00 0 00 000417' JRST TB5 ; no - continue
601
602 ; End of test
603
604 000473' 263 17 0 00 000000 TX5: RTN ; return
605
606 ; Error messages
607
608 000474' 140000 011305' MA5: MSG!TXNOT![ASCIZ ^LAR not loaded correctly by RDCRAM of location ^]
609 000475' 240000 000477' CALL!TXNOT!MA5PNT
610 000476' 270000 011052' LAST!CALL!TXALL!MPNT2 ; print LAR data correct/actual
611
612 ; Print CRAM address written
613
614 000477' 200 00 0 00 011162' MA5PNT: MOVE SAVCR1
615 000500' 242 01 0 00 000001 LSH 1,1
616 000501' 037 04 0 00 000000 PNT4
617 000502' 200 00 0 00 011162' MOVE SAVCR1
618 000503' 606 00 0 00 000001 TRNN 1
619 000504' 037 00 0 00 011272' TMSG < (Left)>
620 000505' 602 00 0 00 000001 TRNE 1
621 000506' 037 00 0 00 011274' TMSG < (Right)>
622 000507' 263 17 0 00 000000 RTN
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 15
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1400
623
624 ;#********************************************************************
625 ;* TEST 6 - Cram Ctrl Register Test
626 ;
627 ; Description: Verify each bit in the CRAM Control Register by
628 ; writing a 0 or 1 to it and verifying that a CRAM
629 ; parity error does not occur.
630 ;
631 ; Procedure: Port Clear
632 ; Load CRAM locations 0-59. with a floating 1 (good
633 ; parity).
634 ; Single step a microinstruction at each location
635 ; verifying that a CRAM PE does not occur.
636 ;
637 ; Do for locations 0-73 (octal).
638 ;
639 ; Failure: ---
640 ;#********************************************************************
641
642 ; Test data
643
644 000510' 254 00 0 00 000520' TSTU6: JRST TG6 ; go start test
645 000511' 200403 000006 MPROC!NDMP!ZMPROC!6 ; test mask
646 000512' 000000 011317' 0,,[ASCIZ ^Cram Ctrl Register Test^]
647 000513' 011324' 011325' [EXP MLAST!M12],,[EXP MLAST!E15]
648 000514' 000000 001017' TSTU7 ; failure test table
649 000515' 000000000000# TSTE45 ; ...
650 000516' 000000 010671' TSTU41
651 000517' 777777 777777 -1
652
653 ; Start test
654
655 000520' 201 00 0 00 000000' TG6: MOVEI Z8 ; get address of module start
656 000521' 260 17 0 00 000412* GO TRACE ; handle trace output
657 000522' 260 17 0 00 000413* GO IPACLR ; do a 'port clear'
658
659 ; Load microcode (floating 1 in each location - with good parity)
660
661 000523' 201 06 0 00 000625' MOVEI 6,T6TAB ; get address of table
662 000524' 476 00 0 00 000000* SETOM CADDR ; initialize CRAM address
663 000525' 350 00 0 00 000524* TI6A: AOS CADDR ; increment CRAM address
664 000526' 120 02 0 06 000000 DMOVE 2,(6) ; get microword data
665 000527' 306 02 0 00 000377 CAIN 2,377 ; end of table?
666 000530' 254 00 0 00 000541' JRST TL6 ; yes - continue
667 000531' 202 02 0 00 000000* MOVEM 2,CWORDL ; save left 30 bits
668 000532' 202 03 0 00 000000* MOVEM 3,CWORDR ; save right 30 bits
669 000533' 261 17 0 00 000000* PUT PARFLG ; save state of parity flag
670 000534' 476 00 0 00 000533* SETOM PARFLG ; ensure correct parity is generated
671 000535' 260 17 0 00 000000* GO DWCRAM ; write the data
672 000536' 262 17 0 00 000534* GET PARFLG ; restore state of parity flag
673 000537' 271 06 0 00 000002 ADDI 6,2 ; poin to next entry
674 000540' 254 00 0 00 000525' JRST TI6A ; loop till done
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 16
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1401
675
676 ; Initialization
677
678 000541' 400 10 0 00 000000 TL6: SETZ 10, ; initialize start address
679 000542' 201 00 0 00 000010 MOVEI MPRUN ; initialize start data
680 000543' 202 00 0 00 000000* MOVEM SDATA
681
682 ; Loop on start address
683
684 000544' 400 15 0 00 000000 TA6: SETZ ERFLG, ; clear error flag
685 000545' 201 00 0 10 000001 MOVEI 1(10) ; set up subtest number
686 000546' 202 00 0 00 000451* MOVEM TSTSUB ; ...
687 000547' 260 17 0 00 000522* GO IPACLR ; clear port
688 000550' 202 10 0 00 000000* MOVEM 10,SNEXT ; set up start data
689 000551' 260 17 0 00 000000* GO IPASST ; single step once
690 000552' 200 15 0 00 011326' MOVE ERFLG,[-2] ; error - reading/writing CSR
691 000553' 200 15 0 00 011326' MOVE ERFLG,[-2] ; error - port already running
692 000554' 200 15 0 00 011326' MOVE ERFLG,[-2] ; error - error bits set in CSR
693 000555' 326 15 0 00 000562' JUMPN ERFLG,TA6A ; error yet - yes - continue
694 000556' 260 17 0 00 000000* GO RDCSR ; read the CSR register
695 000557' 474 15 0 00 000000 SETO ERFLG, ; error
696 000560' 603 01 0 00 004000 TLNE 1,(CRAMPE) ; get a CRAM PE?
697 000561' 474 15 0 00 000000 SETO ERFLG, ; yes - set error flag
698 000562' 027 00 0 00 000572' TA6A: SCOPER MA6 ; print error message
699 000563' 254 00 0 00 000544' JRST TA6 ; loop on error
700 000564' 254 00 0 00 000571' JRST TX6 ; altmode exit
701 000565' 326 15 0 00 000571' JUMPN ERFLG,TX6 ; error yet? - yes - exit test
702
703 ; Next address
704
705 000566' 350 00 0 00 000010 AOS 10 ; point to next address
706 000567' 307 10 0 00 000073 CAIG 10,73 ; done yet?
707 000570' 254 00 0 00 000544' JRST TA6 ; no - loop till done
708
709 ; End of test
710
711 000571' 263 17 0 00 000000 TX6: RTN ; return
712
713 ; Error messages
714
715 000572' 270000 000573' MA6: LAST!CALL!TXALL!MA6PNT ; print error data
716
717 000573' 311 15 0 00 011327' MA6PNT: CAML ERFLG,[-1] ; start up error?
718 000574' 254 00 0 00 000606' JRST MA6PN0 ; no - print other message
719 000575' 200 00 0 00 000000* MOVE SCOSW ; get switches
720 000576' 607 00 0 00 000200 TLNN TXTINH ; text inhibit switch set?
721 000577' 037 00 0 00 011330' TMSGC <Couldn't single step the port>
722 000600' 260 17 0 00 000556* GO RDCSR ; get CSR contents
723 000601' 255 00 0 00 000000 JFCL ; error
724 000602' 201 02 0 00 000023 MOVEI 2,^D19 ; character count so far
725 000603' 201 03 0 00 000023 MOVEI 3,^D19 ; continuation line column number
726 000604' 260 17 0 00 000000* GO CSRPNT ; go print in English
727 000605' 263 17 0 00 000000 RTN
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 17
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1402
728
729 000606' 200 00 0 00 000575* MA6PN0: MOVE SCOSW ; get switches
730 000607' 603 00 0 00 000200 TLNE TXTINH ; text inhibit switch set?
731 JRST [TMSGC <CRAM Loc > ; yes - only print the CRAM
732 MOVE SLAST ; address
733 PNT4
734 000610' 254 00 0 00 011342' RTN]
735 000611' 037 00 0 00 011346' TMSGC <CRAM PE occurred when single stepping location >
736 000612' 200 00 0 00 000000* MOVE SLAST
737 000613' 037 04 0 00 000000 PNT4
738 000614' 037 00 0 00 011337' TMSGC <CRAM Loc >
739 000615' 200 00 0 00 000612* MOVE SLAST
740 000616' 037 04 0 00 000000 PNT4
741 000617' 037 00 0 00 011360' TMSG < contained a 1 in bit >
742 000620' 201 00 0 00 000073 MOVEI ^D59
743 000621' 274 00 0 00 000615* SUB SLAST
744 000622' 037 15 0 00 000000 PNTDEC
745 000623' 037 00 0 00 011365' TMSG <.>
746 000624' 263 17 0 00 000000 RTN
747
748 ; Microcode:
749
750 000625' 000000 400000 T6TAB: EXP 1B18!0,1 ; 0
751 000626' 000000 000001
752 000627' 000000 000000 EXP 0,2 ; 1
753 000630' 000000 000002
754 000631' 000000 000000 EXP 0,4 ; 2
755 000632' 000000 000004
756 000633' 000000 000000 EXP 0,10 ; 3
757 000634' 000000 000010
758 000635' 000000 000000 EXP 0,20 ; 4
759 000636' 000000 000020
760 000637' 000000 000000 EXP 0,40 ; 5
761 000640' 000000 000040
762 000641' 000000 000000 EXP 0,100 ; 6
763 000642' 000000 000100
764 000643' 000000 000000 EXP 0,200 ; 7
765 000644' 000000 000200
766 000645' 000000 000000 EXP 0,400 ; 10
767 000646' 000000 000400
768 000647' 000000 000000 EXP 0,1000 ; 11
769 000650' 000000 001000
770 000651' 000000 000000 EXP 0,2000 ; 12
771 000652' 000000 002000
772 000653' 000000 000000 EXP 0,4000 ; 13
773 000654' 000000 004000
774 000655' 000000 000000 EXP 0,10000 ; 14
775 000656' 000000 010000
776 000657' 000000 000000 EXP 0,20000 ; 15
777 000660' 000000 020000
778 000661' 000000 000000 EXP 0,40000 ; 16
779 000662' 000000 040000
780 000663' 000000 000000 EXP 0,100000 ; 17
781 000664' 000000 100000
782 000665' 000000 000000 EXP 0,200000 ; 20
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 17-1
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1403
783 000666' 000000 200000
784 000667' 000000 000000 EXP 0,400000 ; 21
785 000670' 000000 400000
786 000671' 000000 000000 EXP 0,1000000 ; 22
787 000672' 000001 000000
788 000673' 000000 000000 EXP 0,2000000 ; 23
789 000674' 000002 000000
790 000675' 000000 000000 EXP 0,4000000 ; 24
791 000676' 000004 000000
792 000677' 000000 000000 EXP 0,10000000 ; 25
793 000700' 000010 000000
794 000701' 000000 000000 EXP 0,20000000 ; 26
795 000702' 000020 000000
796 000703' 000000 000000 EXP 0,40000000 ; 27
797 000704' 000040 000000
798 000705' 000000 000000 EXP 0,100000000 ; 30
799 000706' 000100 000000
800 000707' 000000 000000 EXP 0,200000000 ; 31
801 000710' 000200 000000
802 000711' 000000 000000 EXP 0,400000000 ; 32
803 000712' 000400 000000
804 000713' 000000 000000 EXP 0,1000000000 ; 33
805 000714' 001000 000000
806 000715' 000000 000000 EXP 0,2000000000 ; 34
807 000716' 002000 000000
808 000717' 000000 000000 EXP 0,4000000000 ; 35
809 000720' 004000 000000
810 000721' 000000 000000 EXP 0,1 ; 36
811 000722' 000000 000001
812 000723' 000000 000000 EXP 0,2 ; 37
813 000724' 000000 000002
814 000725' 000000 000000 EXP 0,4 ; 40
815 000726' 000000 000004
816 000727' 000000 000000 EXP 0,10 ; 41
817 000730' 000000 000010
818 000731' 000000 000000 EXP 0,20 ; 42
819 000732' 000000 000020
820 000733' 000000 000000 EXP 0,40 ; 43
821 000734' 000000 000040
822 000735' 000000 000000 EXP 0,100 ; 44
823 000736' 000000 000100
824 000737' 000000 000000 EXP 0,200 ; 45
825 000740' 000000 000200
826 000741' 000000 000000 EXP 0,400 ; 46
827 000742' 000000 000400
828 000743' 000000 000000 EXP 0,1000 ; 47
829 000744' 000000 001000
830 000745' 000000 000000 EXP 0,2000 ; 50
831 000746' 000000 002000
832 000747' 000000 000000 EXP 0,4000 ; 51
833 000750' 000000 004000
834 000751' 000000 000000 EXP 0,10000 ; 52
835 000752' 000000 010000
836 000753' 000000 000000 EXP 0,20000 ; 53
837 000754' 000000 020000
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 17-2
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1404
838 000755' 000000 000000 EXP 0,40000 ; 54
839 000756' 000000 040000
840 000757' 000000 000000 EXP 0,100000 ; 55
841 000760' 000000 100000
842 000761' 000000 000000 EXP 0,200000 ; 56
843 000762' 000000 200000
844 000763' 000000 000000 EXP 0,400000 ; 57
845 000764' 000000 400000
846 000765' 000000 000000 EXP 0,1000000 ; 60
847 000766' 000001 000000
848 000767' 000000 000000 EXP 0,2000000 ; 61
849 000770' 000002 000000
850 000771' 000000 000000 EXP 0,4000000 ; 62
851 000772' 000004 000000
852 000773' 000000 000000 EXP 0,10000000 ; 63
853 000774' 000010 000000
854 000775' 000000 000000 EXP 0,20000000 ; 64
855 000776' 000020 000000
856 000777' 000000 000000 EXP 0,40000000 ; 65
857 001000' 000040 000000
858 001001' 000000 000000 EXP 0,100000000 ; 66
859 001002' 000100 000000
860 001003' 000000 000000 EXP 0,200000000 ; 67
861 001004' 000200 000000
862 001005' 000000 000000 EXP 0,400000000 ; 70
863 001006' 000400 000000
864 001007' 000000 000000 EXP 0,1000000000 ; 71
865 001010' 001000 000000
866 001011' 000000 000000 EXP 0,2000000000 ; 72
867 001012' 002000 000000
868 001013' 000000 000000 EXP 0,4000000000 ; 73
869 001014' 004000 000000
870 001015' 000000 000377 EXP 377,377
871 001016' 000000 000377
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 18
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1405
872
873 ;#********************************************************************
874 ;* TEST 7 - Cram Ctrl Register Test
875 ;
876 ; Description: Verify each bit in the CRAM Control Register by
877 ; writing a 0 or 1 to it and verifying that a CRAM
878 ; parity error does occur, when that word also has
879 ; bad parity.
880 ;
881 ; Procedure: Port Clear
882 ; Load CRAM locations 0-59. with a floating 1 (bad
883 ; parity).
884 ; Single step a microinstruction at each location
885 ; verifying that a CRAM PE does occur.
886 ;
887 ; Do for locations 0-73 (octal).
888 ;
889 ; Failure: ---
890 ;#********************************************************************
891
892 ; Test data
893
894 001017' 254 00 0 00 001026' TSTU7: JRST TG7 ; go start test
895 001020' 200403 000007 MPROC!NDMP!ZMPROC!7 ; test mask
896 001021' 000000 011317' 0,,[ASCIZ ^Cram Ctrl Register Test^]
897 001022' 011324' 011366' [EXP MLAST!M12],,[EXP E15,MLAST!E16]
898 001023' 000000000000# TSTE45 ; failure test table
899 001024' 000000 010671' TSTU41 ; ...
900 001025' 777777 777777 -1
901
902 ; Start test
903
904 001026' 201 00 0 00 000000' TG7: MOVEI Z8 ; get address of module start
905 001027' 260 17 0 00 000521* GO TRACE ; handle trace output
906 001030' 260 17 0 00 000547* GO IPACLR ; do a 'port clear'
907
908 ; Load microcode (floating 1 in each location - with good parity)
909
910 001031' 201 06 0 00 001133' MOVEI 6,T7TAB ; get address of table
911 001032' 476 00 0 00 000525* SETOM CADDR ; initialize CRAM address
912 001033' 350 00 0 00 001032* TI7A: AOS CADDR ; increment CRAM address
913 001034' 120 02 0 06 000000 DMOVE 2,(6) ; get microword data
914 001035' 306 02 0 00 000377 CAIN 2,377 ; end of table?
915 001036' 254 00 0 00 001047' JRST TL7 ; yes - continue
916 001037' 202 02 0 00 000531* MOVEM 2,CWORDL ; save left 30 bits
917 001040' 202 03 0 00 000532* MOVEM 3,CWORDR ; save right 30 bits
918 001041' 261 17 0 00 000536* PUT PARFLG ; save state of parity flag
919 001042' 402 00 0 00 001041* SETZM PARFLG ; set to not calculate parity
920 001043' 260 17 0 00 000535* GO DWCRAM ; write the data
921 001044' 262 17 0 00 001042* GET PARFLG ; restore state of parity flag
922 001045' 271 06 0 00 000002 ADDI 6,2 ; poin to next entry
923 001046' 254 00 0 00 001033' JRST TI7A ; loop till done
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 19
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1406
924
925 ; Initialization
926
927 001047' 400 10 0 00 000000 TL7: SETZ 10, ; initialize start address
928 001050' 201 00 0 00 000010 MOVEI MPRUN ; initialize start data
929 001051' 202 00 0 00 000543* MOVEM SDATA
930
931 ; Loop on start address
932
933 001052' 400 15 0 00 000000 TA7: SETZ ERFLG, ; clear error flag
934 001053' 201 00 0 10 000001 MOVEI 1(10) ; set up subtest number
935 001054' 202 00 0 00 000546* MOVEM TSTSUB ; ...
936 001055' 260 17 0 00 001030* GO IPACLR ; clear port
937 001056' 202 10 0 00 000550* MOVEM 10,SNEXT ; set up start data
938 001057' 260 17 0 00 000551* GO IPASST ; single step once
939 001060' 200 15 0 00 011326' MOVE ERFLG,[-2] ; error - reading/writing CSR
940 001061' 200 15 0 00 011326' MOVE ERFLG,[-2] ; error - port already running
941 001062' 200 15 0 00 011326' MOVE ERFLG,[-2] ; error - error bits set in CSR
942 001063' 326 15 0 00 001070' JUMPN ERFLG,TA7A ; error yet - yes - continue
943 001064' 260 17 0 00 000600* GO RDCSR ; read the CSR register
944 001065' 474 15 0 00 000000 SETO ERFLG, ; error
945 001066' 607 01 0 00 004000 TLNN 1,(CRAMPE) ; get a CRAM PE?
946 001067' 474 15 0 00 000000 SETO ERFLG, ; no - set error flag
947 001070' 027 00 0 00 001100' TA7A: SCOPER MA7 ; print error message
948 001071' 254 00 0 00 001052' JRST TA7 ; loop on error
949 001072' 254 00 0 00 001077' JRST TX7 ; altmode exit
950 001073' 326 15 0 00 001077' JUMPN ERFLG,TX7 ; error yet? - yes - exit test
951
952 ; Next address
953
954 001074' 350 00 0 00 000010 AOS 10 ; point to next address
955 001075' 307 10 0 00 000073 CAIG 10,73 ; done yet?
956 001076' 254 00 0 00 001052' JRST TA7 ; no - loop till done
957
958 ; End of test
959
960 001077' 263 17 0 00 000000 TX7: RTN ; return
961
962 ; Error messages
963
964 001100' 270000 001101' MA7: LAST!CALL!TXALL!MA7PNT ; print error data
965
966 001101' 311 15 0 00 011327' MA7PNT: CAML ERFLG,[-1] ; start up error?
967 001102' 254 00 0 00 001114' JRST MA7PN0 ; no - print other message
968 001103' 200 00 0 00 000606* MOVE SCOSW ; get switches
969 001104' 607 00 0 00 000200 TLNN TXTINH ; text inhibit switch set?
970 001105' 037 00 0 00 011330' TMSGC <Couldn't single step the port>
971 001106' 260 17 0 00 001064* GO RDCSR ; get CSR contents
972 001107' 255 00 0 00 000000 JFCL ; error
973 001110' 201 02 0 00 000023 MOVEI 2,^D19 ; character count so far
974 001111' 201 03 0 00 000023 MOVEI 3,^D19 ; continuation line column number
975 001112' 260 17 0 00 000604* GO CSRPNT ; go print in English
976 001113' 263 17 0 00 000000 RTN
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 20
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1407
977
978 001114' 200 00 0 00 001103* MA7PN0: MOVE SCOSW ; get switches
979 001115' 603 00 0 00 000200 TLNE TXTINH ; text inhibit switch set?
980 JRST [TMSGC <CRAM Loc > ; yes - only print the CRAM
981 MOVE SLAST ; address
982 PNT4
983 001116' 254 00 0 00 011342' RTN]
984 001117' 037 00 0 00 011370' TMSGC <CRAM PE did not occur when single stepping location >
985 001120' 200 00 0 00 000621* MOVE SLAST
986 001121' 037 04 0 00 000000 PNT4
987 001122' 037 00 0 00 011337' TMSGC <CRAM Loc >
988 001123' 200 00 0 00 001120* MOVE SLAST
989 001124' 037 04 0 00 000000 PNT4
990 001125' 037 00 0 00 011360' TMSG < contained a 1 in bit >
991 001126' 201 00 0 00 000073 MOVEI ^D59
992 001127' 274 00 0 00 001123* SUB SLAST
993 001130' 037 15 0 00 000000 PNTDEC
994 001131' 037 00 0 00 011365' TMSG <.>
995 001132' 263 17 0 00 000000 RTN
996
997 ; Microcode:
998
999 001133' 000000 000000 T7TAB: EXP 0,1 ; 0
1000 001134' 000000 000001
1001 001135' 000000 400000 EXP 1B18!0,2 ; 1
1002 001136' 000000 000002
1003 001137' 000000 400000 EXP 1B18!0,4 ; 2
1004 001140' 000000 000004
1005 001141' 000000 400000 EXP 1B18!0,10 ; 3
1006 001142' 000000 000010
1007 001143' 000000 400000 EXP 1B18!0,20 ; 4
1008 001144' 000000 000020
1009 001145' 000000 400000 EXP 1B18!0,40 ; 5
1010 001146' 000000 000040
1011 001147' 000000 400000 EXP 1B18!0,100 ; 6
1012 001150' 000000 000100
1013 001151' 000000 400000 EXP 1B18!0,200 ; 7
1014 001152' 000000 000200
1015 001153' 000000 400000 EXP 1B18!0,400 ; 10
1016 001154' 000000 000400
1017 001155' 000000 400000 EXP 1B18!0,1000 ; 11
1018 001156' 000000 001000
1019 001157' 000000 400000 EXP 1B18!0,2000 ; 12
1020 001160' 000000 002000
1021 001161' 000000 400000 EXP 1B18!0,4000 ; 13
1022 001162' 000000 004000
1023 001163' 000000 400000 EXP 1B18!0,10000 ; 14
1024 001164' 000000 010000
1025 001165' 000000 400000 EXP 1B18!0,20000 ; 15
1026 001166' 000000 020000
1027 001167' 000000 400000 EXP 1B18!0,40000 ; 16
1028 001170' 000000 040000
1029 001171' 000000 400000 EXP 1B18!0,100000 ; 17
1030 001172' 000000 100000
1031 001173' 000000 400000 EXP 1B18!0,200000 ; 20
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 20-1
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1408
1032 001174' 000000 200000
1033 001175' 000000 400000 EXP 1B18!0,400000 ; 21
1034 001176' 000000 400000
1035 001177' 000000 400000 EXP 1B18!0,1000000 ; 22
1036 001200' 000001 000000
1037 001201' 000000 400000 EXP 1B18!0,2000000 ; 23
1038 001202' 000002 000000
1039 001203' 000000 400000 EXP 1B18!0,4000000 ; 24
1040 001204' 000004 000000
1041 001205' 000000 400000 EXP 1B18!0,10000000 ; 25
1042 001206' 000010 000000
1043 001207' 000000 400000 EXP 1B18!0,20000000 ; 26
1044 001210' 000020 000000
1045 001211' 000000 400000 EXP 1B18!0,40000000 ; 27
1046 001212' 000040 000000
1047 001213' 000000 400000 EXP 1B18!0,100000000 ; 30
1048 001214' 000100 000000
1049 001215' 000000 400000 EXP 1B18!0,200000000 ; 31
1050 001216' 000200 000000
1051 001217' 000000 400000 EXP 1B18!0,400000000 ; 32
1052 001220' 000400 000000
1053 001221' 000000 400000 EXP 1B18!0,1000000000 ; 33
1054 001222' 001000 000000
1055 001223' 000000 400000 EXP 1B18!0,2000000000 ; 34
1056 001224' 002000 000000
1057 001225' 000000 400000 EXP 1B18!0,4000000000 ; 35
1058 001226' 004000 000000
1059 001227' 000000 400001 EXP 1B18!1,0 ; 36
1060 001230' 000000 000000
1061 001231' 000000 400002 EXP 1B18!2,0 ; 37
1062 001232' 000000 000000
1063 001233' 000000 400004 EXP 1B18!4,0 ; 40
1064 001234' 000000 000000
1065 001235' 000000 400010 EXP 1B18!10,0 ; 41
1066 001236' 000000 000000
1067 001237' 000000 400020 EXP 1B18!20,0 ; 42
1068 001240' 000000 000000
1069 001241' 000000 400040 EXP 1B18!40,0 ; 43
1070 001242' 000000 000000
1071 001243' 000000 400100 EXP 1B18!100,0 ; 44
1072 001244' 000000 000000
1073 001245' 000000 400200 EXP 1B18!200,0 ; 45
1074 001246' 000000 000000
1075 001247' 000000 400400 EXP 1B18!400,0 ; 46
1076 001250' 000000 000000
1077 001251' 000000 401000 EXP 1B18!1000,0 ; 47
1078 001252' 000000 000000
1079 001253' 000000 402000 EXP 1B18!2000,0 ; 50
1080 001254' 000000 000000
1081 001255' 000000 404000 EXP 1B18!4000,0 ; 51
1082 001256' 000000 000000
1083 001257' 000000 410000 EXP 1B18!10000,0 ; 52
1084 001260' 000000 000000
1085 001261' 000000 420000 EXP 1B18!20000,0 ; 53
1086 001262' 000000 000000
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 20-2
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1409
1087 001263' 000000 440000 EXP 1B18!40000,0 ; 54
1088 001264' 000000 000000
1089 001265' 000000 500000 EXP 1B18!100000,0 ; 55
1090 001266' 000000 000000
1091 001267' 000000 600000 EXP 1B18!200000,0 ; 56
1092 001270' 000000 000000
1093 001271' 000000 400001 EXP 1B18!400001,0 ; 57
1094 001272' 000000 000000
1095 001273' 000001 400000 EXP 1B18!1000000,0 ; 60
1096 001274' 000000 000000
1097 001275' 000002 400000 EXP 1B18!2000000,0 ; 61
1098 001276' 000000 000000
1099 001277' 000004 400000 EXP 1B18!4000000,0 ; 62
1100 001300' 000000 000000
1101 001301' 000010 400000 EXP 1B18!10000000,0 ; 63
1102 001302' 000000 000000
1103 001303' 000020 400000 EXP 1B18!20000000,0 ; 64
1104 001304' 000000 000000
1105 001305' 000040 400000 EXP 1B18!40000000,0 ; 65
1106 001306' 000000 000000
1107 001307' 000100 400000 EXP 1B18!100000000,0 ; 66
1108 001310' 000000 000000
1109 001311' 000200 400000 EXP 1B18!200000000,0 ; 67
1110 001312' 000000 000000
1111 001313' 000400 400000 EXP 1B18!400000000,0 ; 70
1112 001314' 000000 000000
1113 001315' 001000 400000 EXP 1B18!1000000000,0 ; 71
1114 001316' 000000 000000
1115 001317' 002000 400000 EXP 1B18!2000000000,0 ; 72
1116 001320' 000000 000000
1117 001321' 004000 400000 EXP 1B18!4000000000,0 ; 73
1118 001322' 000000 000000
1119 001323' 000000 000377 EXP 377,377
1120 001324' 000000 000377
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 21
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1410
1121
1122 ;#********************************************************************
1123 ;* TEST 10 - MBUS Error Test (MPROC module only)
1124 ;
1125 ; Description: Cause drivers to be asserted on the MBUS one at a
1126 ; time and verify that MBUS Error does not appear
1127 ; in the CSR register, since only one drive is on
1128 ; at once.
1129 ;
1130 ; Procedure: Port Clear
1131 ; Load microcode
1132 ; Start up ucode at location 0
1133 ; Stop ucode
1134 ; Read CSR register
1135 ; MBUS error set? yes - error
1136 ; no - ok
1137 ;
1138 ; Do for starting locations 0,3,6,11
1139 ;
1140 ; Failure: ---
1141 ;#********************************************************************
1142
1143 ; Test data
1144
1145 001325' 254 00 0 00 001335' TSTU10: JRST TG10 ; go start test
1146 001326' 210403 000010 MPROC!MBUS!NDMP!ZMPROC!10 ; test mask
1147 001327' 001400' 011403' T10M,,[ASCIZ ^MBUS Error Test (MPROC module only)^]
1148 001330' 011413' 011325' [EXP MLAST!M3],,[EXP MLAST!E15]
1149 001331' 000000 001431' TSTU11 ; failure test table
1150 001332' 000000 001507' TSTU12 ; ...
1151 001333' 000000 001643' TSTU13
1152 001334' 777777 777777 -1
1153
1154 ; Start test
1155
1156 001335' 201 00 0 00 000000' TG10: MOVEI Z8 ; get address of module start
1157 001336' 260 17 0 00 001027* GO TRACE ; handle trace output
1158 001337' 201 01 0 00 001400' MOVEI 1,T10M ; set up microcode address
1159 001340' 260 17 0 00 000000* GO TLOAD ; load/verify it
1160 001341' 263 17 0 00 000000 RTN ; failed - exit test
1161
1162 ; Initialization
1163
1164 001342' 400 15 0 00 000000 TL10: SETZ ERFLG, ; clear error flag
1165 001343' 260 17 0 00 001055* GO IPACLR ; clear port
1166 001344' 400 06 0 00 000000 SETZ 6, ; initialize table address pointer
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 22
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1411
1167
1168 ; 1st segment of test (Segment A) - Turn on MBUS drivers one at a time
1169
1170 001345' 202 06 0 00 001054* TA10: MOVEM 6,TSTSUB ; set up subtest number
1171 001346' 350 00 0 00 001345* AOS TSTSUB ; ...
1172 001347' 400 01 0 00 000000 SETZ 1, ; timeout time (test is fast)
1173 001350' 200 04 0 06 001372' MOVE 4,T10TAB(6) ; get test descriptor
1174 001351' 202 04 0 00 011165' MOVEM 4,SAVDAT ; save it
1175 001352' 554 04 0 00 000004 HLRZ 4,4 ; get starting address
1176 001353' 260 17 0 00 000000* GO AEXEC ; execute ALU type test
1177 001354' 255 00 0 00 000000 JFCL ; ignore any error
1178 001355' 200 01 0 00 000000* MOVE 1,ALCSR ; get final CSR data
1179 001356' 603 01 0 00 002000 TLNE 1,(MBERR) ; MBUS Error occurred?
1180 001357' 474 15 0 00 000000 SETO ERFLG, ; yes - set error flag
1181 001360' 607 01 0 00 004000 TLNN 1,(CRAMPE) ; CRAM PE occurred?
1182 001361' 474 15 0 00 000000 SETO ERFLG, ; no - set error flag
1183 001362' 027 00 0 00 001377' SCOPER MA10 ; print error message
1184 001363' 254 00 0 00 001345' JRST TA10 ; loop on error
1185 001364' 254 00 0 00 001371' JRST TX10 ; altmode exit
1186 001365' 326 15 0 00 001371' JUMPN ERFLG,TX10 ; error yet? yes - abort test
1187
1188 ; Next driver
1189
1190 001366' 350 00 0 00 000006 AOS 6 ; point to next driver descriptor
1191 001367' 332 00 0 06 001372' SKIPE T10TAB(6) ; done?
1192 001370' 254 00 0 00 001345' JRST TA10 ; no - loop till done
1193
1194 ; End of test
1195
1196 001371' 263 17 0 00 000000 TX10: RTN ; return
1197
1198 ; Test table - Starting addr,,Error message addr
1199
1200 001372' 000000 011414' T10TAB: 0,,[ASCIZ /'OENA' signal asserted/]
1201 001373' 000003 011421' 3,,[ASCIZ /'Rd Local Mem' signal asserted/]
1202 001374' 000006 011430' 6,,[ASCIZ /'Ena EMUX' signal asserted by 'MPREADCSR'/]
1203 001375' 000011 011441' 11,,[ASCIZ /'Ena EMUX' signal asserted by 'MPREADEBUS'/]
1204 001376' 000000 000000 0
1205
1206 ; Error message
1207
1208 001377' 270000 011104' MA10: LAST!CALL!TXALL!MPMBU1 ; print test results
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 23
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1412
1209
1210 ; Microcode:
1211
1212 001400' 000000 010000 T10M: MWORD <ADDR=0,JMAP,J=1> ; 0
1213 001401' 000000 000040
1214 001402' 000100 002000 MWORD <CONT,OENA> ; 1 'OENA'
1215 001403' 000000 000340
1216 001404' 000200 020000 MWORD <JMAP,J=2,BAD> ; 2
1217 001405' 000000 000041
1218 ;
1219 001406' 000300 040000 MWORD <JMAP,J=4> ; 3
1220 001407' 000000 000040
1221 001410' 000400 000000 MWORD <CONT,RDLM> ; 4 'RD LOCAL MEM'
1222 001411' 000000 220340
1223 001412' 000500 050000 MWORD <JMAP,J=5,BAD> ; 5
1224 001413' 000000 000041
1225
1226 001414' 000600 070000 MWORD <JMAP,J=7> ; 6
1227 001415' 000000 000040
1228 001416' 000700 000100 MWORD <CONT,SELE,MGC=100> ; 7 'ENA EMUX' (by MPREADCSR)
1229 001417' 000000 005340
1230 001420' 001000 100000 MWORD <JMAP,J=10,BAD> ; 10
1231 001421' 000000 000041
1232
1233 001422' 001100 120000 MWORD <JMAP,J=12> ; 11
1234 001423' 000000 000040
1235 001424' 001200 000010 MWORD <CONT,SELE,MGC=10> ; 12 'ENA EMUX' (by MPREADEBUS)
1236 001425' 000000 005340
1237 001426' 001300 130000 MWORD <JMAP,J=13,BAD> ; 13
1238 001427' 000000 000041
1239 001430' 777777 777777 -1
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 24
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1413
1240
1241 ;#********************************************************************
1242 ;* TEST 11 - MBUS Error Test (CBUS module only)
1243 ;
1244 ; Description: Cause drivers to be asserted on the MBUS one at a
1245 ; time and verify that MBUS Error does not appear
1246 ; in the CSR register, since only one drive is on
1247 ; at once.
1248 ;
1249 ; Procedure: Port Clear
1250 ; Load microcode
1251 ; Start up ucode at location 0
1252 ; Stop ucode
1253 ; Read CSR register
1254 ; MBUS error set? yes - error
1255 ; no - ok
1256 ;
1257 ; Do for starting location 0
1258 ;
1259 ; Failure: ---
1260 ;#********************************************************************
1261
1262 ; Test data
1263
1264 001431' 254 00 0 00 001440' TSTU11: JRST TG11 ; go start test
1265 001432' 210603 000011 MPROC!MBUS!NDMP!NDCB!ZMPROC!11 ; test mask
1266 001433' 001500' 011452' T11M,,[ASCIZ ^MBUS Error Test^]
1267 001434' 011413' 011325' [EXP MLAST!M3],,[EXP MLAST!E15]
1268 001435' 000000 001507' TSTU12 ; failure test table
1269 001436' 000000 001643' TSTU13 ; ...
1270 001437' 777777 777777 -1
1271
1272 ; Start test
1273
1274 001440' 201 00 0 00 000000' TG11: MOVEI Z8 ; get address of module start
1275 001441' 260 17 0 00 001336* GO TRACE ; handle trace output
1276 001442' 201 01 0 00 001500' MOVEI 1,T11M ; set up microcode address
1277 001443' 260 17 0 00 001340* GO TLOAD ; load/verify it
1278 001444' 263 17 0 00 000000 RTN ; failed - exit test
1279
1280 ; Initialization
1281
1282 001445' 400 15 0 00 000000 TL11: SETZ ERFLG, ; clear error flag
1283 001446' 260 17 0 00 001343* GO IPACLR ; clear port
1284 001447' 400 06 0 00 000000 SETZ 6, ; initialize table address pointer
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 25
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1414
1285
1286 ; 1st segment of test (Segment A) - Turn on MBUS drivers one at a time
1287
1288 001450' 202 06 0 00 001346* TA11: MOVEM 6,TSTSUB ; set up subtest number
1289 001451' 350 00 0 00 001450* AOS TSTSUB ; ...
1290 001452' 400 01 0 00 000000 SETZ 1, ; timeout time (test is fast)
1291 001453' 200 04 0 06 001475' MOVE 4,T11TAB(6) ; get test descriptor
1292 001454' 202 04 0 00 011165' MOVEM 4,SAVDAT ; save it
1293 001455' 554 04 0 00 000004 HLRZ 4,4 ; get starting address
1294 001456' 260 17 0 00 001353* GO AEXEC ; execute ALU type test
1295 001457' 255 00 0 00 000000 JFCL ; ignore any error
1296 001460' 200 01 0 00 001355* MOVE 1,ALCSR ; get final CSR data
1297 001461' 603 01 0 00 002000 TLNE 1,(MBERR) ; MBUS Error occurred?
1298 001462' 474 15 0 00 000000 SETO ERFLG, ; yes - set error flag
1299 001463' 607 01 0 00 004000 TLNN 1,(CRAMPE) ; CRAM PE occurred?
1300 001464' 474 15 0 00 000000 SETO ERFLG, ; no - set error flag
1301 001465' 027 00 0 00 001477' SCOPER MA11 ; print error message
1302 001466' 254 00 0 00 001450' JRST TA11 ; loop on error
1303 001467' 254 00 0 00 001474' JRST TX11 ; altmode exit
1304 001470' 326 15 0 00 001474' JUMPN ERFLG,TX11 ; error yet? yes - abort test
1305
1306 ; Next driver
1307
1308 001471' 350 00 0 00 000006 AOS 6 ; point to next driver descriptor
1309 001472' 332 00 0 06 001475' SKIPE T11TAB(6) ; done?
1310 001473' 254 00 0 00 001450' JRST TA11 ; no - loop till done
1311
1312 ; End of test
1313
1314 001474' 263 17 0 00 000000 TX11: RTN ; return
1315
1316 ; Test table - Starting addr,,Error message addr
1317
1318 001475' 000000 011456' T11TAB: 0,,[ASCIZ /'ENA CMUX' signal asserted by 'MPENACMUX'/]
1319 001476' 000000 000000 0
1320
1321 ; Error message
1322
1323 001477' 270000 011104' MA11: LAST!CALL!TXALL!MPMBU1 ; print test results
1324
1325 ; Microcode:
1326
1327 001500' 000000 010000 T11M: MWORD <ADDR=0,JMAP,J=1> ; 0
1328 001501' 000000 000040
1329 001502' 000100 000200 MWORD <CONT,SELM,MGC=200> ; 1 'Ena CMUX' (by MPENACMUX)
1330 001503' 000000 002340
1331 001504' 000200 020000 MWORD <JMAP,J=2,BAD> ; 2
1332 001505' 000000 000041
1333 001506' 777777 777777 -1
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 26
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1415
1334
1335 ;#********************************************************************
1336 ;* TEST 12 - MBUS Error Test (MPROC module only)
1337 ;
1338 ; Description: Causes multiple drivers to be asserted on the
1339 ; MBUS at the same time and verify that MBUS Error
1340 ; appears in the CSR register.
1341 ;
1342 ; Procedure: Port Clear
1343 ; Load microcode
1344 ; Start up ucode at location 0
1345 ; Stop ucode
1346 ; Read CSR register
1347 ; MBUS error set? no - error
1348 ; yes - ok
1349 ;
1350 ; Do for starting locations 0,3,6,11,14,17,22,25
1351 ;
1352 ; Failure: ---
1353 ;#********************************************************************
1354
1355 ; Test data
1356
1357 001507' 254 00 0 00 001515' TSTU12: JRST TG12 ; go start test
1358 001510' 210403 000012 MPROC!MBUS!NDMP!ZMPROC!12 ; test mask
1359 001511' 001562' 011403' T12M,,[ASCIZ ^MBUS Error Test (MPROC module only)^]
1360 001512' 011413' 011325' [EXP MLAST!M3],,[EXP MLAST!E15]
1361 001513' 000000 001643' TSTU13 ; failure test table
1362 001514' 777777 777777 -1 ; ...
1363
1364 ; Start test
1365
1366 001515' 201 00 0 00 000000' TG12: MOVEI Z8 ; get address of module start
1367 001516' 260 17 0 00 001441* GO TRACE ; handle trace output
1368 001517' 201 01 0 00 001562' MOVEI 1,T12M ; set up microcode address
1369 001520' 260 17 0 00 001443* GO TLOAD ; load/verify it
1370 001521' 263 17 0 00 000000 RTN ; failed - exit test
1371
1372 ; Initialization
1373
1374 001522' 400 15 0 00 000000 TL12: SETZ ERFLG, ; clear error flag
1375 001523' 260 17 0 00 001446* GO IPACLR ; clear port
1376 001524' 400 06 0 00 000000 SETZ 6, ; initialize table address pointer
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 27
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1416
1377
1378 ; 1st segment of test (Segment A) - Turn on multiple MBUS drivers
1379
1380 001525' 202 06 0 00 001451* TA12: MOVEM 6,TSTSUB ; set up subtest number
1381 001526' 350 00 0 00 001525* AOS TSTSUB ; ...
1382 001527' 400 01 0 00 000000 SETZ 1, ; timeout time (test is fast)
1383 001530' 200 04 0 06 001550' MOVE 4,T12TAB(6) ; get test descriptor
1384 001531' 202 04 0 00 011165' MOVEM 4,SAVDAT ; save it
1385 001532' 554 04 0 00 000004 HLRZ 4,4 ; get starting address
1386 001533' 260 17 0 00 001456* GO AEXEC ; execute ALU type test
1387 001534' 255 00 0 00 000000 JFCL ; ignore any error
1388 001535' 200 01 0 00 001460* MOVE 1,ALCSR ; get final CSR data
1389 001536' 607 01 0 00 002000 TLNN 1,(MBERR) ; MBUS Error occurred?
1390 001537' 474 15 0 00 000000 SETO ERFLG, ; no - set error flag
1391 001540' 027 00 0 00 001561' SCOPER MA12 ; print error message
1392 001541' 254 00 0 00 001525' JRST TA12 ; loop on error
1393 001542' 254 00 0 00 001547' JRST TX12 ; altmode exit
1394 001543' 326 15 0 00 001547' JUMPN ERFLG,TX12 ; error yet? yes - abort test
1395
1396 ; Next driver
1397
1398 001544' 350 00 0 00 000006 AOS 6 ; point to next driver descriptor
1399 001545' 332 00 0 06 001550' SKIPE T12TAB(6) ; done?
1400 001546' 254 00 0 00 001525' JRST TA12 ; no - loop till done
1401
1402 ; End of test
1403
1404 001547' 263 17 0 00 000000 TX12: RTN ; return
1405
1406 ; Test table - Starting addr,,Error message addr
1407
1408 001550' 000000 011467' T12TAB: 0,,[ASCIZ /'OENA','RDLM' asserted/]
1409 001551' 000003 011474' 3,,[ASCIZ /'OENA','ENA EMUX' (by MPREADCSR) asserted/]
1410 001552' 000006 011505' 6,,[ASCIZ /'OENA','ENA EMUX' (by MPREADEBUS) asserted/]
1411 001553' 000011 011516' 11,,[ASCIZ /'RDLM','ENA EMUX' (by MPREADCSR) asserted/]
1412 001554' 000014 011527' 14,,[ASCIZ /'RDLM','ENA EMUX' (by MPLOADEBUS) asserted/]
1413 001555' 000017 011540' 17,,[ASCIZ /'OENA','RDLM','ENA EMUX' (by MPREADCSR) asserted/]
1414 001556' 000022 011552' 22,,[ASCIZ /'OENA','RDLM','ENA EMUX' (by MPLOADEBUS) asserted/]
1415 001557' 000025 011564' 25,,[ASCIZ /'OENA','RDLM','ENA EMUX' (by MPLOADEBUS,MPREADEBUS) asserted/]
1416 001560' 000000 000000 0
1417 ; Error message
1418
1419 001561' 270000 011133' MA12: LAST!CALL!TXALL!MPMBU2 ; print test results
1420
1421 ; Microcode:
1422
1423 001562' 000000 010000 T12M: MWORD <ADDR=0,JMAP,J=1> ; 0
1424 001563' 000000 000040
1425 001564' 000100 002000 MWORD <CONT,OENA,RDLM> ; 1 'OENA','RDLM'
1426 001565' 000000 220340
1427 001566' 000200 020000 MWORD <JMAP,J=2,BAD> ; 2
1428 001567' 000000 000041
1429
1430 001570' 000300 040000 MWORD <JMAP,J=4> ; 3
1431 001571' 000000 000040
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 27-1
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1417
1432 001572' 000400 002100 MWORD <CONT,OENA,SELE,MGC=100> ; 4 'OENA','ENA EMUX'
1433 001573' 000000 005340
1434 001574' 000500 050000 MWORD <JMAP,J=5,BAD> ; 5
1435 001575' 000000 000041
1436
1437 001576' 000600 070000 MWORD <JMAP,J=7> ; 6
1438 001577' 000000 000040
1439 001600' 000700 002010 MWORD <CONT,OENA,SELE,MGC=10> ; 7 'OENA','ENA EMUX'
1440 001601' 000000 005340
1441 001602' 001000 100000 MWORD <JMAP,J=10,BAD> ; 10
1442 001603' 000000 000041
1443
1444 001604' 001100 120000 MWORD <JMAP,J=12> ; 11
1445 001605' 000000 000040
1446 001606' 001200 000100 MWORD <CONT,RDLM,SELE,MGC=100> ; 12 'RDLM','ENA EMUX'
1447 001607' 000000 225340
1448 001610' 001300 130000 MWORD <JMAP,J=13,BAD> ; 13
1449 001611' 000000 000041
1450
1451 001612' 001400 150000 MWORD <JMAP,J=15> ; 14
1452 001613' 000000 000040
1453 001614' 001500 000010 MWORD <CONT,RDLM,SELE,MGC=10> ; 15 'RDLM','ENA EMUX'
1454 001615' 000000 225340
1455 001616' 001600 160000 MWORD <JMAP,J=16,BAD> ; 16
1456 001617' 000000 000041
1457
1458 001620' 001700 200000 MWORD <JMAP,J=20> ; 17
1459 001621' 000000 000040
1460 001622' 002000 002100 MWORD <CONT,OENA,RDLM,SELE,MGC=100> ; 20 'OENA','RDLM','ENA EMUX'
1461 001623' 000000 225340
1462 001624' 002100 210000 MWORD <JMAP,J=21,BAD> ; 21
1463 001625' 000000 000041
1464
1465 001626' 002200 230000 MWORD <JMAP,J=23> ; 22
1466 001627' 000000 000040
1467 001630' 002300 002010 MWORD <CONT,OENA,RDLM,SELE,MGC=10> ; 23 'OENA','RDLM','ENA EMUX'
1468 001631' 000000 225340
1469 001632' 002400 240000 MWORD <JMAP,J=24,BAD> ; 24
1470 001633' 000000 000041
1471
1472 001634' 002500 260000 MWORD <JMAP,J=26> ; 25
1473 001635' 000000 000040
1474 001636' 002600 002110 MWORD <CONT,OENA,RDLM,SELE,MGC=110> ; 26 'OENA','RDLM','ENA EMUX'
1475 001637' 000000 225340
1476 001640' 002700 270000 MWORD <JMAP,J=27,BAD> ; 27
1477 001641' 000000 000041
1478 001642' 777777 777777 -1
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 28
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1418
1479
1480 ;#********************************************************************
1481 ;* TEST 13 - MBUS Error Test (CBUS module only)
1482 ;
1483 ; Description: Causes multiple drivers to be asserted on the
1484 ; MBUS at the same time and verify that MBUS Error
1485 ; appears in the CSR register.
1486 ;
1487 ; Procedure: Port Clear
1488 ; Load microcode
1489 ; Start up ucode at location 0
1490 ; Stop ucode
1491 ; Read CSR register
1492 ; MBUS error set? yes - error
1493 ; no - ok
1494 ;
1495 ; Do for starting locations 0,3,6,11,14,17,22,25,30,33
1496 ;
1497 ; Failure: ---
1498 ;#********************************************************************
1499
1500 ; Test data
1501
1502 001643' 254 00 0 00 001650' TSTU13: JRST TG13 ; go start test
1503 001644' 210603 000013 MPROC!MBUS!NDMP!NDCB!ZMPROC!13 ; test mask
1504 001645' 001710' 011452' T13M,,[ASCIZ ^MBUS Error Test^]
1505 001646' 011413' 011325' [EXP MLAST!M3],,[EXP MLAST!E15]
1506 001647' 777777 777777 -1 ; failure test table
1507
1508 ; Start test
1509
1510 001650' 201 00 0 00 000000' TG13: MOVEI Z8 ; get address of module start
1511 001651' 260 17 0 00 001516* GO TRACE ; handle trace output
1512 001652' 201 01 0 00 001710' MOVEI 1,T13M ; set up microcode address
1513 001653' 260 17 0 00 001520* GO TLOAD ; load/verify it
1514 001654' 263 17 0 00 000000 RTN ; failed - exit test
1515
1516 ; Initialization
1517
1518 001655' 400 15 0 00 000000 TL13: SETZ ERFLG, ; clear error flag
1519 001656' 260 17 0 00 001523* GO IPACLR ; clear port
1520 001657' 400 06 0 00 000000 SETZ 6, ; initialize table address pointer
1521
1522 ; 1st segment of test (Segment A) - Turn on MBUS drivers one at a time
1523
1524 001660' 202 06 0 00 001526* TA13: MOVEM 6,TSTSUB ; set up subtest number
1525 001661' 350 00 0 00 001660* AOS TSTSUB ; ...
1526 001662' 400 01 0 00 000000 SETZ 1, ; timeout time (test is fast)
1527 001663' 200 04 0 06 001703' MOVE 4,T13TAB(6) ; get test descriptor
1528 001664' 202 04 0 00 011165' MOVEM 4,SAVDAT ; save it
1529 001665' 554 04 0 00 000004 HLRZ 4,4 ; get starting address
1530 001666' 260 17 0 00 001533* GO AEXEC ; execute ALU type test
1531 001667' 255 00 0 00 000000 JFCL ; ignore any error
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 29
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1419
1532 001670' 200 01 0 00 001535* MOVE 1,ALCSR ; get final CSR data
1533 001671' 607 01 0 00 002000 TLNN 1,(MBERR) ; MBUS Error occurred?
1534 001672' 474 15 0 00 000000 SETO ERFLG, ; no - set error flag
1535 001673' 027 00 0 00 001707' SCOPER MA13 ; print error message
1536 001674' 254 00 0 00 001660' JRST TA13 ; loop on error
1537 001675' 254 00 0 00 001702' JRST TX13 ; altmode exit
1538 001676' 326 15 0 00 001702' JUMPN ERFLG,TX13 ; error yet? yes - abort test
1539
1540 ; Next driver
1541
1542 001677' 350 00 0 00 000006 AOS 6 ; point to next driver descriptor
1543 001700' 332 00 0 06 001703' SKIPE T13TAB(6) ; done?
1544 001701' 254 00 0 00 001660' JRST TA13 ; no - loop till done
1545
1546 ; End of test
1547
1548 001702' 263 17 0 00 000000 TX13: RTN ; return
1549
1550 ; Test table - Starting addr,,Error message addr
1551
1552 001703' 000000 011601' T13TAB: 0,,[ASCIZ /'OENA','ENA CMUX (Ena Cmux)' asserted/]
1553 001704' 000003 011611' 3,,[ASCIZ /'RDLM','ENA CMUX (Ena Cmux)' asserted/]
1554 001705' 000006 011621' 6,,[ASCIZ /'OENA','RDLM','ENA CMUX (Ena Cmux)' asserted/]
1555 001706' 000000 000000 0
1556
1557 ; Error message
1558
1559 001707' 270000 011133' MA13: LAST!CALL!TXALL!MPMBU2 ; print test results
1560
1561 ; Microcode:
1562
1563 001710' 000000 010000 T13M: MWORD <ADDR=0,JMAP,J=1> ; 0
1564 001711' 000000 000040
1565 001712' 000100 002200 MWORD <CONT,OENA,SELM,MGC=200> ; 1 OENA,EnaCMUX
1566 001713' 000000 002340
1567 001714' 000200 020000 MWORD <JMAP,J=2,BAD> ; 2
1568 001715' 000000 000041
1569
1570 001716' 000300 040000 MWORD <JMAP,J=4> ; 3
1571 001717' 000000 000040
1572 001720' 000400 000200 MWORD <CONT,RDLM,SELM,MGC=200> ; 4 RDLM,EnaCMUX
1573 001721' 000000 222340
1574 001722' 000500 050000 MWORD <JMAP,J=5,BAD> ; 5
1575 001723' 000000 000041
1576
1577 001724' 000600 070000 MWORD <JMAP,J=7> ; 6
1578 001725' 000000 000040
1579 001726' 000700 002200 MWORD <CONT,OENA,RDLM,SELM,MGC=200> ; 7 OENA,RDLM,EnaCMUX
1580 001727' 000000 222340
1581 001730' 001000 100000 MWORD <JMAP,J=10,BAD> ; 10
1582 001731' 000000 000041
1583 001732' 777777 777777 -1
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 30
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1420
1584
1585 ;#********************************************************************
1586 ;* TEST 14 - CCCbusAvail Test
1587 ;
1588 ; Description: Verify that condition code 'CCCbusAvail' can be
1589 ; tested by the microsequencer for conditional
1590 ; branching, and that the condition code can be set
1591 ; and reset by the hardware conditions which should
1592 ; do so.
1593 ;
1594 ; Procedure: Port Clear
1595 ; Start up port
1596 ; UC> perform an operation and then verify that
1597 ; CCCbusAvail is not asserted or asserted
1598 ; UC> if passed - set bit 12 (DISABLE Complete)
1599 ; UC> if failed - set bit 13 (ENABLE Complete)
1600 ; Read CSR and determine test disposition
1601 ;
1602 ; Repeat with several test cases:
1603 ; CC is cleared initially
1604 ; CC is set by a read in progress
1605 ; CC is set by a write in progress
1606 ; CC is cleared by completion of a read
1607 ; CC is cleared by completion of a write
1608 ; CC is cleared by 'Clrcccode'
1609 ;
1610 ; Failure: ---
1611 ;#********************************************************************
1612
1613 ; Test data
1614
1615 001733' 254 00 0 00 001745' TSTU14: JRST TG14 ; go start test
1616 001734' 200403 000014 MPROC!NDMP!ZMPROC!14 ; test mask
1617 001735' 002060' 011632' T14M,,[ASCIZ ^CCCbusAvail Test^]
1618 001736' 011636' 011640' [EXP M6,MLAST!C5],,[EXP M7,C15,C7,C8,MLAST!C1]
1619 001737' 000000000000# TSTC3 ; failure test table
1620 001740' 000000000000# TSTC4 ; ...
1621 001741' 000000 005512' TSTU30
1622 001742' 000000 006307' TSTU32
1623 001743' 000000 006603' TSTU33
1624 001744' 777777 777777 -1
1625
1626 ; Start test
1627
1628 001745' 201 00 0 00 000000' TG14: MOVEI Z8 ; get address of module start
1629 001746' 260 17 0 00 001651* GO TRACE ; handle trace output
1630 001747' 201 01 0 00 002060' MOVEI 1,T14M ; set up microcode address
1631 001750' 260 17 0 00 001653* GO TLOAD ; load/verify it
1632 001751' 263 17 0 00 000000 RTN ; failed - exit test
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 31
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1421
1633
1634 ; Initialization
1635
1636 001752' 400 15 0 00 000000 TL14: SETZ ERFLG, ; clear error flag
1637 001753' 201 06 0 00 001770' MOVEI 6,TS14 ; get test table address
1638 001754' 402 00 0 00 001661* SETZM TSTSUB ; initialize subtest number
1639 001755' 476 00 0 00 000000* SETOM TADDR ; clear start address
1640
1641 ; Loop on test execute table entries
1642
1643 001756' 260 17 0 00 001656* TA14: GO IPACLR ; clear port
1644 001757' 260 17 0 00 000000* TB14: GO TEXEC ; execute table entry
1645 001760' 254 00 0 00 001767' JRST TX14 ; end of sstep table
1646 001761' 254 00 0 00 001757' JRST TB14 ; keep looping after call
1647 001762' 474 15 0 00 000000 SETO ERFLG, ; error occurred
1648
1649 ; Handle error printouts and scope looping
1650
1651 001763' 027 00 0 00 002044' SCOPER MA14 ; print error message
1652 001764' 254 00 0 00 001752' JRST TL14 ; loop on error
1653 001765' 254 00 0 00 001767' JRST TX14 ; altmode exit
1654 001766' 322 15 0 00 001756' JUMPE ERFLG,TA14 ; do next sstep table entry
1655
1656 ; End of test
1657
1658 001767' 263 17 0 00 000000 TX14: RTN ; return
1659
1660 ; Test Execute Table, as: (CMD,parameters)
1661
1662 ; CC is cleared initially
1663
1664 001770' 140000 002021' TS14: TTABLE (TCALL,TS14IN) ; initialize port
1665 001771' 040000 000000 TTABLE (TSTART,0) ; start up port
1666 001772' 240002 000000 TTABLE (TCHECK,2) ; check if completed
1667 001773' 340000 000000 TTABLE (TEXIT) ; exit if error yet
1668
1669 ; CC is set by a read in progress
1670
1671 001774' 140000 002031' TTABLE (TCALL,TS14RW) ; start up a read
1672 001775' 040000 000010 TTABLE (TSTART,10) ; start up port
1673 001776' 240002 000000 TTABLE (TCHECK,2) ; check if completed
1674 001777' 340000 000000 TTABLE (TEXIT) ; exit if error yet
1675
1676 ; CC is set by a write in progress
1677
1678 002000' 140000 002031' TTABLE (TCALL,TS14RW) ; start up a write
1679 002001' 040000 000020 TTABLE (TSTART,20) ; start up port
1680 002002' 240002 000000 TTABLE (TCHECK,2) ; check if completed
1681 002003' 340000 000000 TTABLE (TEXIT) ; exit if error yet
1682
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 32
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1422
1683
1684 ; CC is cleared by completion of a read
1685
1686 002004' 140000 002031' TTABLE (TCALL,TS14RW) ; start up a read
1687 002005' 040000 000030 TTABLE (TSTART,30) ; start up port
1688 002006' 240002 000000 TTABLE (TCHECK,2) ; check if completed
1689 002007' 340000 000000 TTABLE (TEXIT) ; exit if error yet
1690
1691 ; CC is cleared by completion of a write
1692
1693 002010' 140000 002031' TTABLE (TCALL,TS14RW) ; start up a write
1694 002011' 040000 000040 TTABLE (TSTART,40) ; start up port
1695 002012' 240002 000000 TTABLE (TCHECK,2) ; check if completed
1696 002013' 340000 000000 TTABLE (TEXIT) ; exit if error yet
1697
1698 ; CC is cleared by 'Clrcccode'
1699
1700 002014' 140000 002031' TTABLE (TCALL,TS14RW) ; start up a write
1701 002015' 040000 000050 TTABLE (TSTART,50) ; start up port
1702 002016' 240002 000000 TTABLE (TCHECK,2) ; check if completed
1703 002017' 340000 000000 TTABLE (TEXIT) ; exit if error yet
1704 002020' 000000 000000 TTABLE (TLAST)
1705
1706 002021' 260 17 0 00 001756* TS14IN: GO IPACLR ; clear port
1707 002022' 201 01 0 00 005000 MOVEI 1,5000 ; get starting address
1708 002023' 242 01 0 00 000001 LSH 1,1 ; position properly
1709 002024' 260 17 0 00 000452* GO LDRAR ; set up starting address
1710 002025' 201 01 0 00 000010 MOVEI 1,MPRUN ; get 'MPRUN' bit
1711 002026' 260 17 0 00 000457* GO LDCSR ; start up the port
1712 002027' 260 17 0 00 002021* GO IPACLR ; stop the port
1713 002030' 263 17 0 00 000000 RTN ; return - done
1714
1715 002031' 201 14 0 00 000001 TS14RW: MOVEI PAT,1 ; get data pattern
1716 002032' 201 01 0 00 000002 MOVEI 1,2 ; get transfer type
1717 002033' 201 02 0 00 000010 MOVEI 2,10 ; get transfer length
1718 002034' 260 17 0 00 000000* GO BUFGEN ; generate buffer contents
1719 002035' 200 01 0 00 011645' MOVE 1,[CBUFSZ,,CBUF] ; get pointer to control buffer
1720 002036' 260 17 0 00 000000* GO CHINIT ; initialize software
1721 002037' 551 01 0 00 000000* HRRZI 1,BUFF ; buffer address
1722 002040' 201 02 0 00 000010 MOVEI 2,10 ; word count
1723 002041' 400 03 0 00 000000 SETZ 3, ; clear zero fill specifier
1724 002042' 260 17 0 00 000000* GO GENCCW ; generate a CCW list
1725 002043' 263 17 0 00 000000 RTN ; return
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 33
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1423
1726
1727 ; Error messages
1728
1729 002044' 140000 011646' MA14: MSG!TXNOT![ASCIZ /Condition Code 'CC CBUS Avail' not /]
1730 002045' 240000 002047' CALL!TXNOT!MA14LP ; print subtest description
1731 002046' 000000000000# LAST!CALL!TXALL!TTPNT ; print test data
1732
1733 002047' 200 01 0 00 001754* MA14LP: MOVE 1,TSTSUB ; get subtest number
1734 002050' 256 00 0 01 002051' XCT MA14L-1(1) ; print message
1735 002051' 263 17 0 00 000000 RTN ; return
1736
1737 002052' 037 00 0 00 011656' MA14L: TMSG <cleared initially>
1738 002053' 037 00 0 00 011662' TMSG <set by a read in progress>
1739 002054' 037 00 0 00 011670' TMSG <set by a write in progress>
1740 002055' 037 00 0 00 011676' TMSG <cleared by completion of a read>
1741 002056' 037 00 0 00 011705' TMSG <cleared by completion of a write>
1742 002057' 037 00 0 00 011714' TMSG <cleared by 'Clrcccode'>
1743
1744 ; Microcode:
1745
1746 ; CC is cleared initially
1747
1748 002060' 000000 010000 T14M: MWORD <ADDR=0,JMAP,J=1> ; 0
1749 002061' 000000 000040
1750 002062' 000152 000000 MWORD <CJP,J=5200,CENA,CCCA> ; 1
1751 002063' 000400 000060
1752 002064' 000251 000000 MWORD <JMAP,J=5100> ; 2
1753 002065' 000000 000040
1754
1755 ; CC is set by a read in progress
1756
1757 002066' 001000 110020 MWORD <ADDR=10,JMAP,J=11,SELM,MGC=20> ; 10
1758 002067' 000000 002040
1759 002070' 001100 000200 MWORD <CONT,D=1,SELC,MGC=200> ; 11
1760 002071' 001000 004340
1761 002072' 001251 000000 MWORD <CJP,J=5100,D=1,CENA,CCCA> ; 12
1762 002073' 001400 000060
1763 002074' 001300 120000 MWORD <JMAP,J=12,D=1> ; 13
1764 002075' 001000 000040
1765
1766 ; CC is set by a write in progress
1767
1768 002076' 002000 210020 MWORD <ADDR=20,JMAP,J=21,SELM,MGC=20> ; 20
1769 002077' 000000 002040
1770 002100' 002100 000220 MWORD <CONT,D=1,SELC,MGC=220> ; 21
1771 002101' 001000 004340
1772 002102' 002251 000000 MWORD <CJP,J=5100,D=1,CENA,CCCA> ; 22
1773 002103' 001400 000060
1774 002104' 002300 220000 MWORD <JMAP,J=22,D=1> ; 23
1775 002105' 001000 000040
1776
1777 ; CC is cleared after completion of a read
1778
1779 002106' 003000 310020 MWORD <ADDR=30,JMAP,J=31,SELM,MGC=20> ; 30
1780 002107' 000000 002040
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 33-1
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1424
1781 002110' 003100 000200 MWORD <CONT,D=1,SELC,MGC=200> ; 31
1782 002111' 001000 004340
1783 002112' 003200 340000 MWORD <CJP,J=34,D=1,CENA,CCCA> ; 32
1784 002113' 001400 000060
1785 002114' 003300 320000 MWORD <JMAP,J=32,D=1> ; 33
1786 002115' 001000 000040
1787 002116' 003400 000004 MWORD <CONT,D=1,SELC,MGC=4> ; 34
1788 002117' 001000 004340
1789 002120' 003552 000000 MWORD <CJP,J=5200,CENA,CCCA> ; 35
1790 002121' 000400 000060
1791 002122' 003651 000000 MWORD <JMAP,J=5100> ; 36
1792 002123' 000000 000040
1793
1794 ; CC is cleared by completion of a write
1795
1796 002124' 004000 410020 MWORD <ADDR=40,JMAP,J=41,SELM,MGC=20> ; 40
1797 002125' 000000 002040
1798 002126' 004100 000220 MWORD <CONT,D=1,SELC,MGC=220> ; 41
1799 002127' 001000 004340
1800 002130' 004200 440000 MWORD <CJP,J=44,D=1,CENA,CCCA> ; 42
1801 002131' 001400 000060
1802 002132' 004300 420000 MWORD <JMAP,J=42,D=1> ; 43
1803 002133' 001000 000040
1804 002134' 004400 000004 MWORD <CONT,D=1,SELC,MGC=4> ; 44
1805 002135' 001000 004340
1806 002136' 004552 000000 MWORD <CJP,J=5200,CENA,CCCA> ; 45
1807 002137' 000400 000060
1808 002140' 004651 000000 MWORD <JMAP,J=5100> ; 46
1809 002141' 000000 000040
1810
1811 ; CC is cleared by 'Clrcccode'
1812
1813 002142' 005000 510020 MWORD <ADDR=50,JMAP,J=51,SELM,MGC=20> ; 50
1814 002143' 000000 002040
1815 002144' 005100 000220 MWORD <CONT,D=1,SELC,MGC=220> ; 51
1816 002145' 001000 004340
1817 002146' 005200 540000 MWORD <CJP,J=54,D=1,CENA,CCCA> ; 52
1818 002147' 001400 000060
1819 002150' 005300 520000 MWORD <JMAP,J=52,D=1> ; 53
1820 002151' 001000 000040
1821 002152' 005400 000020 MWORD <CONT,D=1,SELM,MGC=20> ; 54
1822 002153' 001000 002340
1823 002154' 005552 000000 MWORD <CJP,J=5200,CENA,CCCA> ; 55
1824 002155' 000400 000060
1825 002156' 005651 000000 MWORD <JMAP,J=5100> ; 56
1826 002157' 000000 000040
1827
1828 ; Initialization
1829
1830 002160' 500050 010100 MWORD <ADDR=5000,JMAP,J=5001,SELC,MGC=100> ; 5000
1831 002161' 000000 004040
1832 002162' 500150 010000 MWORD <JMAP,J=5001> ; 5001
1833 002163' 000000 000040
1834
1835 ; Subroutine - Passed - Write 1 to bit 12 of CSR register
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 33-2
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1425
1836
1837 002164' 510000 000000 MWORD <ADDR=5100,CONT,SD0,AND,B=2,D=2> ; 5100
1838 002165' 742001 000340
1839 002166' 510100 000000 MWORD <CONT,S0B,PLUS,B=2,D=2,CRY> ; 5101
1840 002167' 302001 000740
1841 002170' 510200 260000 MWORD <LDCT,J=26> ; 5102
1842 002171' 000000 000300
1843 002172' 510351 030000 MWORD <RPCT,J=5103,SAB,PLUS,A=2,B=2,D=2> ; 5103
1844 002173' 102021 000220
1845 002174' 510400 002004 MWORD <CONT,S0A,A=2,OR,D=1,OENA,SELE,MGC=4> ; 5104
1846 002175' 431020 005340
1847 002176' 510551 070040 MWORD <CJP,J=5107,CENA,CCGC,D=1,SELE,MGC=40> ; 5105
1848 002177' 001400 015060
1849 002200' 510651 050000 MWORD <JMAP,J=5105,D=1> ; 5106
1850 002201' 001000 000040
1851 002202' 510700 000200 MWORD <CONT,S0A,A=1,OR,D=1,SELE,MGC=200> ; 5107
1852 002203' 431010 005340
1853 002204' 511051 100000 MWORD <JMAP,J=5110,D=1> ; 5110
1854 002205' 001000 000040
1855
1856 ; Subroutine - Failed - Write 1 to bit 13 of CSR register
1857
1858 002206' 520000 000000 MWORD <ADDR=5200,CONT,SD0,AND,B=2,D=2> ; 5200
1859 002207' 742001 000340
1860 002210' 520100 000000 MWORD <CONT,S0B,PLUS,B=2,D=2,CRY> ; 5201
1861 002211' 302001 000740
1862 002212' 520200 250000 MWORD <LDCT,J=25> ; 5202
1863 002213' 000000 000300
1864 002214' 520352 030000 MWORD <RPCT,J=5203,SAB,PLUS,A=2,B=2,D=2> ; 5203
1865 002215' 102021 000220
1866 002216' 520400 002004 MWORD <CONT,S0A,A=2,OR,D=1,OENA,SELE,MGC=4> ; 5204
1867 002217' 431020 005340
1868 002220' 520552 070040 MWORD <CJP,J=5207,CENA,CCGC,D=1,SELE,MGC=40> ; 5205
1869 002221' 001400 015060
1870 002222' 520652 050000 MWORD <JMAP,J=5205,D=1> ; 5206
1871 002223' 001000 000040
1872 002224' 520700 000200 MWORD <CONT,S0A,A=1,OR,D=1,SELE,MGC=200> ; 5207
1873 002225' 431010 005340
1874 002226' 521052 100000 MWORD <JMAP,J=5210,D=1> ; 5210
1875 002227' 001000 000040
1876 002230' 777777 777777 -1
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 34
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1426
1877
1878 ;#********************************************************************
1879 ;* TEST 15 - CCGrntCSR Test
1880 ;
1881 ; Description: Verify that condition code 'CCGrntCSR' can be
1882 ; tested by the microsequencer for conditional
1883 ; branching, and that the condition code can be set
1884 ; and reset by the hardware conditions which should
1885 ; do so.
1886 ;
1887 ; Procedure: Port Clear
1888 ; Start up port
1889 ; UC> perform an operation and then verify that
1890 ; CCGrntCSR is not asserted or asserted
1891 ; UC> if passed - set bit 12 (DISABLE Complete)
1892 ; UC> if failed - set bit 13 (ENABLE Complete)
1893 ; Read CSR and determine test disposition
1894 ;
1895 ; Repeat with several test cases:
1896 ; CC is cleared initially
1897 ; CC is set after MP requests access to CSR
1898 ; CC is cleared after MP reads CSR
1899 ; CC is cleared after MP writes CSR
1900 ; CC is still set after KL attempts to read the CSR
1901 ; CC is still set after KL attempts to write the CSR
1902 ;
1903 ; Failure: ---
1904 ;#********************************************************************
1905
1906 ; Test data
1907
1908 002231' 254 00 0 00 002243' TSTU15: JRST TG15 ; go start test
1909 002232' 200403 000015 MPROC!NDMP!ZMPROC!15 ; test mask
1910 002233' 002334' 011721' T15M,,[ASCIZ ^CCGrntCSR Test^]
1911 002234' 011724' 011726' [EXP M6,MLAST!E3],,[EXP M7,MLAST!E7]
1912 002235' 000000 002467' TSTU16 ; failure test table
1913 002236' 000000 003315' TSTU17 ; ...
1914 002237' 000000 003525' TSTU20
1915 002240' 000000 003677' TSTU21
1916 002241' 000000 004070' TSTU22
1917 002242' 777777 777777 -1
1918
1919 ; Start test
1920
1921 002243' 201 00 0 00 000000' TG15: MOVEI Z8 ; get address of module start
1922 002244' 260 17 0 00 001746* GO TRACE ; handle trace output
1923 002245' 201 01 0 00 002334' MOVEI 1,T15M ; set up microcode address
1924 002246' 260 17 0 00 001750* GO TLOAD ; load/verify it
1925 002247' 263 17 0 00 000000 RTN ; failed - exit test
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 35
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1427
1926
1927 ; Initialization
1928
1929 002250' 400 15 0 00 000000 TL15: SETZ ERFLG, ; clear error flag
1930 002251' 201 06 0 00 002266' MOVEI 6,TS15 ; get test table address
1931 002252' 402 00 0 00 002047* SETZM TSTSUB ; initialize subtest number
1932 002253' 476 00 0 00 001755* SETOM TADDR ; clear start address
1933
1934 ; Loop on test execute table entries
1935
1936 002254' 260 17 0 00 002027* TA15: GO IPACLR ; clear port
1937 002255' 260 17 0 00 001757* TB15: GO TEXEC ; execute table entry
1938 002256' 254 00 0 00 002265' JRST TX15 ; end of sstep table
1939 002257' 254 00 0 00 002255' JRST TB15 ; keep looping after call
1940 002260' 474 15 0 00 000000 SETO ERFLG, ; error occurred
1941
1942 ; Handle error printouts and scope looping
1943
1944 002261' 027 00 0 00 002320' SCOPER MA15 ; print error message
1945 002262' 254 00 0 00 002250' JRST TL15 ; loop on error
1946 002263' 254 00 0 00 002265' JRST TX15 ; altmode exit
1947 002264' 322 15 0 00 002254' JUMPE ERFLG,TA15 ; do next sstep table entry
1948
1949 ; End of test
1950
1951 002265' 263 17 0 00 000000 TX15: RTN ; return
1952
1953 ; Test Execute Table, as: (CMD,parameters)
1954
1955 ; CC is cleared initially
1956
1957 002266' 040000 000000 TS15: TTABLE (TSTART,0) ; start up port
1958 002267' 240002 000000 TTABLE (TCHECK,2) ; check if completed
1959 002270' 340000 000000 TTABLE (TEXIT) ; exit if error yet
1960
1961 ; CC is set after MP requests access to CSR
1962
1963 002271' 040000 000010 TTABLE (TSTART,10) ; start up port
1964 002272' 240002 000000 TTABLE (TCHECK,2) ; check if completed
1965 002273' 340000 000000 TTABLE (TEXIT) ; exit if error yet
1966
1967 ; CC is cleared after MP reads CSR
1968
1969 002274' 040000 000020 TTABLE (TSTART,20) ; start up port
1970 002275' 240002 000000 TTABLE (TCHECK,2) ; check if completed
1971 002276' 340000 000000 TTABLE (TEXIT) ; exit if error yet
1972
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 36
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1428
1973
1974 ; CC is cleared after MP writes CSR
1975
1976 002277' 040000 000030 TTABLE (TSTART,30) ; start up port
1977 002300' 240002 000000 TTABLE (TCHECK,2) ; check if completed
1978 002301' 340000 000000 TTABLE (TEXIT) ; exit if error yet
1979
1980 ; CC is still set after KL does a DATAI
1981
1982 002302' 040000 000040 TTABLE (TSTART,40) ; start up port
1983 002303' 140000 002313' TTABLE (TCALL,TDATAI) ; read CSR
1984 002304' 240002 000000 TTABLE (TCHECK,2) ; check if completed
1985 002305' 340000 000000 TTABLE (TEXIT) ; exit if error yet
1986
1987 ; CC is still set after KL does a DATAO
1988
1989 002306' 040000 000040 TTABLE (TSTART,40) ; start up port
1990 002307' 140000 002315' TTABLE (TCALL,TDATAO) ; read CSR
1991 002310' 240002 000000 TTABLE (TCHECK,2) ; check if completed
1992 002311' 340000 000000 TTABLE (TEXIT) ; exit if error yet
1993 002312' 000000 000000 TTABLE (TLAST) ; end of table
1994
1995 002313' 260 17 0 00 000460* TDATAI: GO RDLAR ; read LAR
1996 002314' 263 17 0 00 000000 RTN ; return
1997
1998 002315' 400 01 0 00 000000 TDATAO: SETZ 1, ; clear data
1999 002316' 260 17 0 00 002024* GO LDRAR ; write RAR
2000 002317' 263 17 0 00 000000 RTN ; return
2001
2002 ; Error messages
2003
2004 002320' 140000 011730' MA15: MSG!TXNOT![ASCIZ /Condition Code 'CC Grnt CSR' not /]
2005 002321' 240000 002323' CALL!TXNOT!MA15LP ; print subtest description
2006 002322' 000000000000# LAST!CALL!TXALL!TTPNT ; print test data
2007
2008 002323' 200 01 0 00 002252* MA15LP: MOVE 1,TSTSUB ; get subtest number
2009 002324' 256 00 0 01 002325' XCT MA15L-1(1) ; print message
2010 002325' 263 17 0 00 000000 RTN ; return
2011
2012 002326' 037 00 0 00 011656' MA15L: TMSG <cleared initially>
2013 002327' 037 00 0 00 011737' TMSG <set after MP requests access to CSR>
2014 002330' 037 00 0 00 011747' TMSG <cleared after MP reads CSR>
2015 002331' 037 00 0 00 011755' TMSG <cleared after MP writes CSR>
2016 TMSG <still set after KL attempts to read
2017 002332' 037 00 0 00 011763' the CSR>
2018 TMSG <still set after KL attempts to write
2019 002333' 037 00 0 00 011775' the CSR>
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 37
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1429
2020
2021 ; Microcode:
2022
2023 ; CC is cleared initially
2024
2025 002334' 000000 010000 T15M: MWORD <ADDR=0,JMAP,J=1> ; 0
2026 002335' 000000 000040
2027 002336' 000152 000000 MWORD <CJP,J=5200,CENA,CCGC> ; 1
2028 002337' 000400 010060
2029 002340' 000251 000000 MWORD <JMAP,J=5100> ; 2
2030 002341' 000000 000040
2031
2032 ; CC is set after MP requests access to CSR
2033
2034 002342' 001000 110040 MWORD <ADDR=10,JMAP,SELE,MGC=40,J=11> ; 10
2035 002343' 000000 005040
2036 002344' 001151 000040 MWORD <CJP,J=5100,CENA,CCGC,MGC=40,SELE>
2037 002345' 000400 015060
2038 002346' 001200 110000 MWORD <JMAP,J=11> ; 12
2039 002347' 000000 000040
2040
2041 ; CC is cleared after MP reads CSR
2042
2043 002350' 002000 210040 MWORD <ADDR=20,JMAP,SELE,MGC=40,J=21> ; 20
2044 002351' 000000 005040
2045 002352' 002100 230000 MWORD <CJP,J=23,CENA,CCGC> ; 21
2046 002353' 000400 010060
2047 002354' 002200 210000 MWORD <JMAP,J=21> ; 22
2048 002355' 000000 000040
2049 002356' 002300 000100 MWORD <CONT,SELE,MGC=100> ; 23
2050 002357' 000000 005340
2051 002360' 002452 000000 MWORD <CJP,J=5200,CENA,CCGC> ; 24
2052 002361' 000400 010060
2053 002362' 002551 000000 MWORD <JMAP,J=5100> ; 25
2054 002363' 000000 000040
2055
2056 ; CC is cleared after MP writes CSR
2057
2058 002364' 003000 310040 MWORD <ADDR=30,JMAP,SELE,MGC=40,J=31> ; 30
2059 002365' 000000 005040
2060 002366' 003100 330000 MWORD <CJP,J=33,CENA,CCGC> ; 31
2061 002367' 000400 010060
2062 002370' 003200 310000 MWORD <JMAP,J=31> ; 32
2063 002371' 000000 000040
2064 002372' 003300 000004 MWORD <CONT,S0A,AND,D=1,SELE,MGC=4> ; 33
2065 002373' 441000 005340
2066 002374' 003400 000200 MWORD <CONT,SELE,MGC=200> ; 34
2067 002375' 000000 005340
2068 002376' 003552 000000 MWORD <CJP,J=5200,CENA,CCGC> ; 35
2069 002377' 000400 010060
2070 002400' 003651 000000 MWORD <JMAP,J=5100> ; 36
2071 002401' 000000 000040
2072
2073 ; CC is still set after KL attempts to read the CSR
2074 ; CC is still set after KL attempts to write the CSR
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 37-1
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1430
2075
2076 002402' 004000 410040 MWORD <ADDR=40,JMAP,SELE,MGC=40,J=41> ; 40
2077 002403' 000000 005040
2078 002404' 004100 430000 MWORD <CJP,J=43,CENA,CCER> ; 41
2079 002405' 000400 100060
2080 002406' 004200 410000 MWORD <JMAP,J=41> ; 42
2081 002407' 000000 000040
2082 002410' 004300 460000 MWORD <CJP,J=46,CENA,CCGC> ; 43
2083 002411' 000400 010060
2084 002412' 004400 000200 MWORD <CONT,SELE,MGC=200> ; 44
2085 002413' 000000 005340
2086 002414' 004552 000000 MWORD <JMAP,J=5200> ; 45
2087 002415' 000000 000040
2088 002416' 004600 000200 MWORD <CONT,SELE,MGC=200> ; 46
2089 002417' 000000 005340
2090 002420' 004751 000000 MWORD <JMAP,J=5100> ; 47
2091 002421' 000000 000040
2092
2093 ; Subroutine - Passed - Write 1 to bit 12 of CSR register
2094
2095 002422' 510000 000000 MWORD <ADDR=5100,CONT,SD0,AND,B=2,D=2> ; 5100
2096 002423' 742001 000340
2097 002424' 510100 000000 MWORD <CONT,S0B,PLUS,B=2,D=2,CRY> ; 5101
2098 002425' 302001 000740
2099 002426' 510200 260000 MWORD <LDCT,J=26> ; 5102
2100 002427' 000000 000300
2101 002430' 510351 030000 MWORD <RPCT,J=5103,SAB,PLUS,A=2,B=2,D=2> ; 5103
2102 002431' 102021 000220
2103 002432' 510400 002004 MWORD <CONT,S0A,A=2,OR,D=1,OENA,SELE,MGC=4> ; 5104
2104 002433' 431020 005340
2105 002434' 510551 070040 MWORD <CJP,J=5107,CENA,CCGC,D=1,SELE,MGC=40> ; 5105
2106 002435' 001400 015060
2107 002436' 510651 050000 MWORD <JMAP,J=5105,D=1> ; 5106
2108 002437' 001000 000040
2109 002440' 510700 000200 MWORD <CONT,S0A,A=1,OR,D=1,SELE,MGC=200> ; 5107
2110 002441' 431010 005340
2111 002442' 511051 100000 MWORD <JMAP,J=5110,D=1> ; 5110
2112 002443' 001000 000040
2113
2114 ; Subroutine - Failed - Write 1 to bit 13 of CSR register
2115
2116 002444' 520000 000000 MWORD <ADDR=5200,CONT,SD0,AND,B=2,D=2> ; 5200
2117 002445' 742001 000340
2118 002446' 520100 000000 MWORD <CONT,S0B,PLUS,B=2,D=2,CRY> ; 5201
2119 002447' 302001 000740
2120 002450' 520200 250000 MWORD <LDCT,J=25> ; 5202
2121 002451' 000000 000300
2122 002452' 520352 030000 MWORD <RPCT,J=5203,SAB,PLUS,A=2,B=2,D=2> ; 5203
2123 002453' 102021 000220
2124 002454' 520400 002004 MWORD <CONT,S0A,A=2,OR,D=1,OENA,SELE,MGC=4> ; 5204
2125 002455' 431020 005340
2126 002456' 520552 070040 MWORD <CJP,J=5207,CENA,CCGC,D=1,SELE,MGC=40> ; 5205
2127 002457' 001400 015060
2128 002460' 520652 050000 MWORD <JMAP,J=5205,D=1> ; 5206
2129 002461' 001000 000040
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 37-2
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1431
2130 002462' 520700 000200 MWORD <CONT,S0A,A=1,OR,D=1,SELE,MGC=200> ; 5207
2131 002463' 431010 005340
2132 002464' 521052 100000 MWORD <JMAP,J=5210,D=1> ; 5210
2133 002465' 001000 000040
2134 002466' 777777 777777 -1
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 38
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1432
2135
2136 ;#********************************************************************
2137 ;* TEST 16 - CCFEQ0 Test
2138 ;
2139 ; Description: Verify that condition code 'CCFEQ0' can be tested
2140 ; by the microsequencer for use in conditional
2141 ; branching, and that the condition code can be set
2142 ; and reset by the hardware conditions which should
2143 ; do so.
2144 ;
2145 ; Procedure: Port Clear
2146 ; Start up port
2147 ; UC> gate -1's out of the 2901's and verify that
2148 ; the CCFEQ0 is not asserted or asserted
2149 ; UC> if passed - set bit 12 (DISABLE Complete)
2150 ; UC> if failed - set bit 13 (ENABLE Complete)
2151 ; Read CSR and determine test disposition
2152 ;
2153 ; Repeat with several test cases:
2154 ; -1's
2155 ; floating 1's
2156 ; 0's
2157 ;
2158 ; Failure: ---
2159 ;#********************************************************************
2160
2161 ; Test data
2162
2163 002467' 254 00 0 00 002501' TSTU16: JRST TG16 ; go start test
2164 002470' 200403 000016 MPROC!NDMP!ZMPROC!16 ; test mask
2165 002471' 002560' 012007' T16M,,[ASCIZ ^CCFEQ0 Test^]
2166 002472' 012012' 012014' [EXP M6,MLAST!E23],,[EXP MLAST!M7]
2167 002473' 000000 003315' TSTU17 ; failure test table
2168 002474' 000000 003525' TSTU20 ; ...
2169 002475' 000000 003677' TSTU21
2170 002476' 000000 004070' TSTU22
2171 002477' 000000 004261' TSTU23
2172 002500' 777777 777777 -1
2173
2174 ; Start test
2175
2176 002501' 201 00 0 00 000000' TG16: MOVEI Z8 ; get address of module start
2177 002502' 260 17 0 00 002244* GO TRACE ; handle trace output
2178 002503' 201 01 0 00 002560' MOVEI 1,T16M ; set up microcode address
2179 002504' 260 17 0 00 002246* GO TLOAD ; load/verify it
2180 002505' 263 17 0 00 000000 RTN ; failed - exit test
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 39
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1433
2181
2182 ; Initialization
2183
2184 002506' 400 15 0 00 000000 TL16: SETZ ERFLG, ; clear error flag
2185 002507' 201 06 0 00 002524' MOVEI 6,TS16 ; get test table address
2186 002510' 402 00 0 00 002323* SETZM TSTSUB ; initialize subtest number
2187 002511' 476 00 0 00 002253* SETOM TADDR ; clear start address
2188
2189 ; Loop on test execute table entries
2190
2191 002512' 260 17 0 00 002254* TA16: GO IPACLR ; clear port
2192 002513' 260 17 0 00 002255* TB16: GO TEXEC ; execute table entry
2193 002514' 254 00 0 00 002523' JRST TX16 ; end of sstep table
2194 002515' 254 00 0 00 002513' JRST TB16 ; keep looping after call
2195 002516' 474 15 0 00 000000 SETO ERFLG, ; error occurred
2196
2197 ; Handle error printouts and scope looping
2198
2199 002517' 027 00 0 00 002546' SCOPER MA16 ; print error message
2200 002520' 254 00 0 00 002506' JRST TL16 ; loop on error
2201 002521' 254 00 0 00 002523' JRST TX16 ; altmode exit
2202 002522' 322 15 0 00 002512' JUMPE ERFLG,TA16 ; do next sstep table entry
2203
2204 ; End of test
2205
2206 002523' 263 17 0 00 000000 TX16: RTN ; return
2207
2208 ; Test Execute Table, as: (CMD,parameters)
2209
2210 002524' 200000 002531' TS16: TTABLE (TCALLC,TS16AD) ; set up starting address
2211 002525' 040000 077777 TTABLE (TSTART,77777) ; start up port
2212 002526' 240002 000000 TTABLE (TCHECK,2) ; check if completed
2213 002527' 340000 000000 TTABLE (TEXIT) ; exit if error yet
2214 002530' 300000 002524' TTABLE (TJRST,TS16) ; loop till done
2215
2216 002531' 350 01 0 00 002511* TS16AD: AOS 1,TADDR ; increment address
2217 002532' 307 01 0 00 000045 CAIG 1,45 ; done yet?
2218 002533' 350 00 0 17 000000 AOS (P) ; no - set up return+2
2219 002534' 476 00 0 00 011165' SETOM SAVDAT# ; set data to 1's
2220 002535' 322 01 0 00 002545' JUMPE 1,TS16AX ; zero - yes - exit
2221 002536' 402 00 0 00 011165' SETZM SAVDAT ; set data to 0's
2222 002537' 306 01 0 00 000045 CAIN 1,45 ; zero's?
2223 002540' 263 17 0 00 000000 RTN ; yes - return
2224 002541' 370 00 0 00 000001 SOS 1 ; calculate number of shifts
2225 002542' 201 00 0 00 000001 MOVEI 1 ; get a 1 bit
2226 002543' 242 00 0 01 000000 LSH (1) ; shift (for floating 1)
2227 002544' 202 00 0 00 011165' MOVEM SAVDAT ; save it
2228 002545' 263 17 0 00 000000 TS16AX: RTN ; return
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 40
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1434
2229
2230 ; Error messages
2231
2232 002546' 140000 012015' MA16: MSG!TXNOT![ASCIZ /Condition code 'CC FEQL0'/]
2233 002547' 240000 002551' CALL!TXNOT!MA16PN ; print data used
2234 002550' 000000000000# LAST!CALL!TXALL!TTPNT ; print test data
2235
2236 002551' 336 00 0 00 011165' MA16PN: SKIPN SAVDAT
2237 JRST [TMSG < should be set (data 0's) but isn't.>
2238 002552' 254 00 0 00 012033' RTN]
2239 002553' 037 00 0 00 012035' TMSG < should not be set (data >
2240 002554' 200 00 0 00 011165' MOVE SAVDAT
2241 002555' 037 13 0 00 000000 PNTHW
2242 002556' 037 00 0 00 012043' TMSG <) but is.>
2243 002557' 263 17 0 00 000000 RTN
2244
2245 ; Microcode:
2246
2247 002560' 000001 000000 T16M: MWORD <ADDR=0,JMAP,J=100> ; 0 - 1's
2248 002561' 000000 000040
2249 002562' 000102 000000 MWORD <JMAP,J=200> ; 1 - 1
2250 002563' 000000 000040
2251 002564' 000203 000000 MWORD <JMAP,J=300> ; 2 - 2
2252 002565' 000000 000040
2253 002566' 000304 000000 MWORD <JMAP,J=400> ; 3 - 4
2254 002567' 000000 000040
2255 002570' 000405 000000 MWORD <JMAP,J=500> ; 4 - 10
2256 002571' 000000 000040
2257 002572' 000506 000000 MWORD <JMAP,J=600> ; 5 - 20
2258 002573' 000000 000040
2259 002574' 000607 000000 MWORD <JMAP,J=700> ; 6 - 40
2260 002575' 000000 000040
2261 002576' 000710 000000 MWORD <JMAP,J=1000> ; 7 - 100
2262 002577' 000000 000040
2263 002600' 001011 000000 MWORD <JMAP,J=1100> ; 10 - 200
2264 002601' 000000 000040
2265 002602' 001112 000000 MWORD <JMAP,J=1200> ; 11 - 400
2266 002603' 000000 000040
2267 002604' 001213 000000 MWORD <JMAP,J=1300> ; 12 - 1000
2268 002605' 000000 000040
2269 002606' 001314 000000 MWORD <JMAP,J=1400> ; 13 - 2000
2270 002607' 000000 000040
2271 002610' 001415 000000 MWORD <JMAP,J=1500> ; 14 - 4000
2272 002611' 000000 000040
2273 002612' 001516 000000 MWORD <JMAP,J=1600> ; 15 - 10000
2274 002613' 000000 000040
2275 002614' 001617 000000 MWORD <JMAP,J=1700> ; 16 - 20000
2276 002615' 000000 000040
2277 002616' 001720 000000 MWORD <JMAP,J=2000> ; 17 - 40000
2278 002617' 000000 000040
2279 002620' 002021 000000 MWORD <JMAP,J=2100> ; 20 - 100000
2280 002621' 000000 000040
2281 002622' 002122 000000 MWORD <JMAP,J=2200> ; 21 - 200000
2282 002623' 000000 000040
2283 002624' 002223 000000 MWORD <JMAP,J=2300> ; 22 - 400000
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 40-1
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1435
2284 002625' 000000 000040
2285 002626' 002324 000000 MWORD <JMAP,J=2400> ; 23 - 1,,0
2286 002627' 000000 000040
2287 002630' 002425 000000 MWORD <JMAP,J=2500> ; 24 - 2,,0
2288 002631' 000000 000040
2289 002632' 002526 000000 MWORD <JMAP,J=2600> ; 25 - 4,,0
2290 002633' 000000 000040
2291 002634' 002627 000000 MWORD <JMAP,J=2700> ; 26 - 10,,0
2292 002635' 000000 000040
2293 002636' 002730 000000 MWORD <JMAP,J=3000> ; 27 - 20,,0
2294 002637' 000000 000040
2295 002640' 003031 000000 MWORD <JMAP,J=3100> ; 30 - 40,,0
2296 002641' 000000 000040
2297 002642' 003132 000000 MWORD <JMAP,J=3200> ; 31 - 100,,0
2298 002643' 000000 000040
2299 002644' 003233 000000 MWORD <JMAP,J=3300> ; 32 - 200,,0
2300 002645' 000000 000040
2301 002646' 003334 000000 MWORD <JMAP,J=3400> ; 33 - 400,,0
2302 002647' 000000 000040
2303 002650' 003435 000000 MWORD <JMAP,J=3500> ; 34 - 1000,,0
2304 002651' 000000 000040
2305 002652' 003536 000000 MWORD <JMAP,J=3600> ; 35 - 2000,,0
2306 002653' 000000 000040
2307 002654' 003637 000000 MWORD <JMAP,J=3700> ; 36 - 4000,,0
2308 002655' 000000 000040
2309 002656' 003740 000000 MWORD <JMAP,J=4000> ; 37 - 10000,,0
2310 002657' 000000 000040
2311 002660' 004041 000000 MWORD <JMAP,J=4100> ; 40 - 20000,,0
2312 002661' 000000 000040
2313 002662' 004142 000000 MWORD <JMAP,J=4200> ; 41 - 40000,,0
2314 002663' 000000 000040
2315 002664' 004243 000000 MWORD <JMAP,J=4300> ; 42 - 100000,,0
2316 002665' 000000 000040
2317 002666' 004344 000000 MWORD <JMAP,J=4400> ; 43 - 200000,,0
2318 002667' 000000 000040
2319 002670' 004445 000000 MWORD <JMAP,J=4500> ; 44 - 400000,,0
2320 002671' 000000 000040
2321 002672' 004546 000000 MWORD <JMAP,J=4600> ; 45 - 0's
2322 002673' 000000 000040
2323
2324 ; Data pattern 1's
2325
2326 002674' 010000 000000 MWORD <ADDR=100,CONT,SD0,AND,D=2> ; 100
2327 002675' 742000 000340
2328 002676' 010152 002000 MWORD <CJP,J=5200,SAB,XNOR,D=1,CENA,OENA,CCFZ>; 101
2329 002677' 171400 020060
2330 002700' 010251 000000 MWORD <JMAP,J=5100> ; 102
2331 002701' 000000 000040
2332
2333 ; Data pattern floating 1's - 1
2334
2335 002702' 020000 000000 MWORD <ADDR=200,CONT,SD0,AND,D=2> ; 200
2336 002703' 742000 000340
2337 002704' 020100 000000 MWORD <CONT,SAB,PLUS,CRY,D=2> ; 201
2338 002705' 102000 000740
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 40-2
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1436
2339 002706' 020252 002000 MWORD <CJP,J=5200,S0A,OR,D=1,CENA,OENA,CCFZ> ; 202
2340 002707' 431400 020060
2341 002710' 020351 000000 MWORD <JMAP,J=5100> ; 203
2342 002711' 000000 000040
2343
2344 ; Data pattern floating 1's - 2
2345
2346 002712' 030000 000000 MWORD <ADDR=300,CONT,SD0,AND,D=2> ; 300
2347 002713' 742000 000340
2348 002714' 030100 000000 MWORD <LDCT,J=0,SAB,PLUS,CRY,D=2> ; 301
2349 002715' 102000 000700
2350 002716' 030253 000000 MWORD <JMAP,J=5300> ; 302
2351 002717' 000000 000040
2352
2353 ; Data pattern floating 1's - 4
2354
2355 002720' 040000 000000 MWORD <ADDR=400,CONT,SD0,AND,D=2> ; 400
2356 002721' 742000 000340
2357 002722' 040100 010000 MWORD <LDCT,J=1,SAB,PLUS,CRY,D=2> ; 401
2358 002723' 102000 000700
2359 002724' 040253 000000 MWORD <JMAP,J=5300> ; 402
2360 002725' 000000 000040
2361
2362 ; Data pattern floating 1's - 10
2363
2364 002726' 050000 000000 MWORD <ADDR=500,CONT,SD0,AND,D=2> ; 500
2365 002727' 742000 000340
2366 002730' 050100 020000 MWORD <LDCT,J=2,SAB,PLUS,CRY,D=2> ; 501
2367 002731' 102000 000700
2368 002732' 050253 000000 MWORD <JMAP,J=5300> ; 502
2369 002733' 000000 000040
2370
2371 ; Data pattern floating 1's - 20
2372
2373 002734' 060000 000000 MWORD <ADDR=600,CONT,SD0,AND,D=2> ; 600
2374 002735' 742000 000340
2375 002736' 060100 030000 MWORD <LDCT,J=3,SAB,PLUS,CRY,D=2> ; 601
2376 002737' 102000 000700
2377 002740' 060253 000000 MWORD <JMAP,J=5300> ; 602
2378 002741' 000000 000040
2379
2380 ; Data pattern floating 1's - 40
2381
2382 002742' 070000 000000 MWORD <ADDR=700,CONT,SD0,AND,D=2> ; 700
2383 002743' 742000 000340
2384 002744' 070100 040000 MWORD <LDCT,J=4,SAB,PLUS,CRY,D=2> ; 701
2385 002745' 102000 000700
2386 002746' 070253 000000 MWORD <JMAP,J=5300> ; 702
2387 002747' 000000 000040
2388
2389 ; Data pattern floating 1's - 100
2390
2391 002750' 100000 000000 MWORD <ADDR=1000,CONT,SD0,AND,D=2> ; 1000
2392 002751' 742000 000340
2393 002752' 100100 050000 MWORD <LDCT,J=5,SAB,PLUS,CRY,D=2> ; 1001
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 40-3
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1437
2394 002753' 102000 000700
2395 002754' 100253 000000 MWORD <JMAP,J=5300> ; 1002
2396 002755' 000000 000040
2397
2398 ; Data pattern floating 1's - 200
2399
2400 002756' 110000 000000 MWORD <ADDR=1100,CONT,SD0,AND,D=2> ; 1100
2401 002757' 742000 000340
2402 002760' 110100 060000 MWORD <LDCT,J=6,SAB,PLUS,CRY,D=2> ; 1101
2403 002761' 102000 000700
2404 002762' 110253 000000 MWORD <JMAP,J=5300> ; 1102
2405 002763' 000000 000040
2406
2407 ; Data pattern floating 1's - 400
2408
2409 002764' 120000 000000 MWORD <ADDR=1200,CONT,SD0,AND,D=2> ; 1200
2410 002765' 742000 000340
2411 002766' 120100 070000 MWORD <LDCT,J=7,SAB,PLUS,CRY,D=2> ; 1201
2412 002767' 102000 000700
2413 002770' 120253 000000 MWORD <JMAP,J=5300> ; 1202
2414 002771' 000000 000040
2415
2416 ; Data pattern floating 1's - 1000
2417
2418 002772' 130000 000000 MWORD <ADDR=1300,CONT,SD0,AND,D=2> ; 1300
2419 002773' 742000 000340
2420 002774' 130100 100000 MWORD <LDCT,J=10,SAB,PLUS,CRY,D=2> ; 1301
2421 002775' 102000 000700
2422 002776' 130253 000000 MWORD <JMAP,J=5300> ; 1302
2423 002777' 000000 000040
2424
2425 ; Data pattern floating 1's - 2000
2426
2427 003000' 140000 000000 MWORD <ADDR=1400,CONT,SD0,AND,D=2> ; 1400
2428 003001' 742000 000340
2429 003002' 140100 110000 MWORD <LDCT,J=11,SAB,PLUS,CRY,D=2> ; 1401
2430 003003' 102000 000700
2431 003004' 140253 000000 MWORD <JMAP,J=5300> ; 1402
2432 003005' 000000 000040
2433
2434 ; Data pattern floating 1's - 4000
2435
2436 003006' 150000 000000 MWORD <ADDR=1500,CONT,SD0,AND,D=2> ; 1500
2437 003007' 742000 000340
2438 003010' 150100 120000 MWORD <LDCT,J=12,SAB,PLUS,CRY,D=2> ; 1501
2439 003011' 102000 000700
2440 003012' 150253 000000 MWORD <JMAP,J=5300> ; 1502
2441 003013' 000000 000040
2442
2443 ; Data pattern floating 1's - 10000
2444
2445 003014' 160000 000000 MWORD <ADDR=1600,CONT,SD0,AND,D=2> ; 1600
2446 003015' 742000 000340
2447 003016' 160100 130000 MWORD <LDCT,J=13,SAB,PLUS,CRY,D=2> ; 1601
2448 003017' 102000 000700
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 40-4
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1438
2449 003020' 160253 000000 MWORD <JMAP,J=5300> ; 1602
2450 003021' 000000 000040
2451
2452 ; Data pattern floating 1's - 20000
2453
2454 003022' 170000 000000 MWORD <ADDR=1700,CONT,SD0,AND,D=2> ; 1700
2455 003023' 742000 000340
2456 003024' 170100 140000 MWORD <LDCT,J=14,SAB,PLUS,CRY,D=2> ; 1701
2457 003025' 102000 000700
2458 003026' 170253 000000 MWORD <JMAP,J=5300> ; 1702
2459 003027' 000000 000040
2460
2461 ; Data pattern floating 1's - 40000
2462
2463 003030' 200000 000000 MWORD <ADDR=2000,CONT,SD0,AND,D=2> ; 2000
2464 003031' 742000 000340
2465 003032' 200100 150000 MWORD <LDCT,J=15,SAB,PLUS,CRY,D=2> ; 2001
2466 003033' 102000 000700
2467 003034' 200253 000000 MWORD <JMAP,J=5300> ; 2002
2468 003035' 000000 000040
2469
2470 ; Data pattern floating 1's - 100000
2471
2472 003036' 210000 000000 MWORD <ADDR=2100,CONT,SD0,AND,D=2> ; 2100
2473 003037' 742000 000340
2474 003040' 210100 160000 MWORD <LDCT,J=16,SAB,PLUS,CRY,D=2> ; 2101
2475 003041' 102000 000700
2476 003042' 210253 000000 MWORD <JMAP,J=5300> ; 2102
2477 003043' 000000 000040
2478
2479 ; Data pattern floating 1's - 200000
2480
2481 003044' 220000 000000 MWORD <ADDR=2200,CONT,SD0,AND,D=2> ; 2200
2482 003045' 742000 000340
2483 003046' 220100 170000 MWORD <LDCT,J=17,SAB,PLUS,CRY,D=2> ; 2201
2484 003047' 102000 000700
2485 003050' 220253 000000 MWORD <JMAP,J=5300> ; 2202
2486 003051' 000000 000040
2487
2488 ; Data pattern floating 1's - 400000
2489
2490 003052' 230000 000000 MWORD <ADDR=2300,CONT,SD0,AND,D=2> ; 2300
2491 003053' 742000 000340
2492 003054' 230100 200000 MWORD <LDCT,J=20,SAB,PLUS,CRY,D=2> ; 2301
2493 003055' 102000 000700
2494 003056' 230253 000000 MWORD <JMAP,J=5300> ; 2302
2495 003057' 000000 000040
2496
2497 ; Data pattern floating 1's - 1,,000000
2498
2499 003060' 240000 000000 MWORD <ADDR=2400,CONT,SD0,AND,D=2> ; 2400
2500 003061' 742000 000340
2501 003062' 240100 210000 MWORD <LDCT,J=21,SAB,PLUS,CRY,D=2> ; 2401
2502 003063' 102000 000700
2503 003064' 240253 000000 MWORD <JMAP,J=5300> ; 2402
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 40-5
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1439
2504 003065' 000000 000040
2505
2506 ; Data pattern floating 1's - 2,,000000
2507
2508 003066' 250000 000000 MWORD <ADDR=2500,CONT,SD0,AND,D=2> ; 2500
2509 003067' 742000 000340
2510 003070' 250100 220000 MWORD <LDCT,J=22,SAB,PLUS,CRY,D=2> ; 2501
2511 003071' 102000 000700
2512 003072' 250253 000000 MWORD <JMAP,J=5300> ; 2502
2513 003073' 000000 000040
2514
2515 ; Data pattern floating 1's - 4,,000000
2516
2517 003074' 260000 000000 MWORD <ADDR=2600,CONT,SD0,AND,D=2> ; 2600
2518 003075' 742000 000340
2519 003076' 260100 230000 MWORD <LDCT,J=23,SAB,PLUS,CRY,D=2> ; 2601
2520 003077' 102000 000700
2521 003100' 260253 000000 MWORD <JMAP,J=5300> ; 2602
2522 003101' 000000 000040
2523
2524 ; Data pattern floating 1's - 10,,000000
2525
2526 003102' 270000 000000 MWORD <ADDR=2700,CONT,SD0,AND,D=2> ; 2700
2527 003103' 742000 000340
2528 003104' 270100 240000 MWORD <LDCT,J=24,SAB,PLUS,CRY,D=2> ; 2701
2529 003105' 102000 000700
2530 003106' 270253 000000 MWORD <JMAP,J=5300> ; 2702
2531 003107' 000000 000040
2532
2533 ; Data pattern floating 1's - 20,,000000
2534
2535 003110' 300000 000000 MWORD <ADDR=3000,CONT,SD0,AND,D=2> ; 3000
2536 003111' 742000 000340
2537 003112' 300100 250000 MWORD <LDCT,J=25,SAB,PLUS,CRY,D=2> ; 3001
2538 003113' 102000 000700
2539 003114' 300253 000000 MWORD <JMAP,J=5300> ; 3002
2540 003115' 000000 000040
2541
2542 ; Data pattern floating 1's - 40,,000000
2543
2544 003116' 310000 000000 MWORD <ADDR=3100,CONT,SD0,AND,D=2> ; 3100
2545 003117' 742000 000340
2546 003120' 310100 260000 MWORD <LDCT,J=26,SAB,PLUS,CRY,D=2> ; 3101
2547 003121' 102000 000700
2548 003122' 310253 000000 MWORD <JMAP,J=5300> ; 3102
2549 003123' 000000 000040
2550
2551 ; Data pattern floating 1's - 100,,000000
2552
2553 003124' 320000 000000 MWORD <ADDR=3200,CONT,SD0,AND,D=2> ; 3200
2554 003125' 742000 000340
2555 003126' 320100 270000 MWORD <LDCT,J=27,SAB,PLUS,CRY,D=2> ; 3201
2556 003127' 102000 000700
2557 003130' 320253 000000 MWORD <JMAP,J=5300> ; 3202
2558 003131' 000000 000040
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 40-6
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1440
2559
2560 ; Data pattern floating 1's - 200,,000000
2561
2562 003132' 330000 000000 MWORD <ADDR=3300,CONT,SD0,AND,D=2> ; 3300
2563 003133' 742000 000340
2564 003134' 330100 300000 MWORD <LDCT,J=30,SAB,PLUS,CRY,D=2> ; 3301
2565 003135' 102000 000700
2566 003136' 330253 000000 MWORD <JMAP,J=5300> ; 3302
2567 003137' 000000 000040
2568
2569 ; Data pattern floating 1's - 400,,000000
2570
2571 003140' 340000 000000 MWORD <ADDR=3400,CONT,SD0,AND,D=2> ; 3400
2572 003141' 742000 000340
2573 003142' 340100 310000 MWORD <LDCT,J=31,SAB,PLUS,CRY,D=2> ; 3401
2574 003143' 102000 000700
2575 003144' 340253 000000 MWORD <JMAP,J=5300> ; 3402
2576 003145' 000000 000040
2577
2578 ; Data pattern floating 1's - 1000,,000000
2579
2580 003146' 350000 000000 MWORD <ADDR=3500,CONT,SD0,AND,D=2> ; 3500
2581 003147' 742000 000340
2582 003150' 350100 320000 MWORD <LDCT,J=32,SAB,PLUS,CRY,D=2> ; 3501
2583 003151' 102000 000700
2584 003152' 350253 000000 MWORD <JMAP,J=5300> ; 3502
2585 003153' 000000 000040
2586
2587 ; Data pattern floating 1's - 2000,,000000
2588
2589 003154' 360000 000000 MWORD <ADDR=3600,CONT,SD0,AND,D=2> ; 3600
2590 003155' 742000 000340
2591 003156' 360100 330000 MWORD <LDCT,J=33,SAB,PLUS,CRY,D=2> ; 3601
2592 003157' 102000 000700
2593 003160' 360253 000000 MWORD <JMAP,J=5300> ; 3602
2594 003161' 000000 000040
2595
2596 ; Data pattern floating 1's - 4000,,000000
2597
2598 003162' 370000 000000 MWORD <ADDR=3700,CONT,SD0,AND,D=2> ; 3700
2599 003163' 742000 000340
2600 003164' 370100 340000 MWORD <LDCT,J=34,SAB,PLUS,CRY,D=2> ; 3701
2601 003165' 102000 000700
2602 003166' 370253 000000 MWORD <JMAP,J=5300> ; 3702
2603 003167' 000000 000040
2604
2605 ; Data pattern floating 1's - 10000,,000000
2606
2607 003170' 400000 000000 MWORD <ADDR=4000,CONT,SD0,AND,D=2> ; 4000
2608 003171' 742000 000340
2609 003172' 400100 350000 MWORD <LDCT,J=35,SAB,PLUS,CRY,D=2> ; 4001
2610 003173' 102000 000700
2611 003174' 400253 000000 MWORD <JMAP,J=5300> ; 4002
2612 003175' 000000 000040
2613
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 40-7
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1441
2614 ; Data pattern floating 1's - 20000,,000000
2615
2616 003176' 410000 000000 MWORD <ADDR=4100,CONT,SD0,AND,D=2> ; 4100
2617 003177' 742000 000340
2618 003200' 410100 360000 MWORD <LDCT,J=36,SAB,PLUS,CRY,D=2> ; 4101
2619 003201' 102000 000700
2620 003202' 410253 000000 MWORD <JMAP,J=5300> ; 4102
2621 003203' 000000 000040
2622
2623 ; Data pattern floating 1's - 40000,,000000
2624
2625 003204' 420000 000000 MWORD <ADDR=4200,CONT,SD0,AND,D=2> ; 4200
2626 003205' 742000 000340
2627 003206' 420100 370000 MWORD <LDCT,J=37,SAB,PLUS,CRY,D=2> ; 4201
2628 003207' 102000 000700
2629 003210' 420253 000000 MWORD <JMAP,J=5300> ; 4202
2630 003211' 000000 000040
2631
2632 ; Data pattern floating 1's - 100000,,000000
2633
2634 003212' 430000 000000 MWORD <ADDR=4300,CONT,SD0,AND,D=2> ; 4300
2635 003213' 742000 000340
2636 003214' 430100 400000 MWORD <LDCT,J=40,SAB,PLUS,CRY,D=2> ; 4301
2637 003215' 102000 000700
2638 003216' 430253 000000 MWORD <JMAP,J=5300> ; 4302
2639 003217' 000000 000040
2640
2641 ; Data pattern floating 1's - 200000,,000000
2642
2643 003220' 440000 000000 MWORD <ADDR=4400,CONT,SD0,AND,D=2> ; 4400
2644 003221' 742000 000340
2645 003222' 440100 410000 MWORD <LDCT,J=41,SAB,PLUS,CRY,D=2> ; 4401
2646 003223' 102000 000700
2647 003224' 440253 000000 MWORD <JMAP,J=5300> ; 4402
2648 003225' 000000 000040
2649
2650 ; Data pattern floating 1's - 400000,,000000
2651
2652 003226' 450000 000000 MWORD <ADDR=4500,CONT,SD0,AND,D=2> ; 4500
2653 003227' 742000 000340
2654 003230' 450100 420000 MWORD <LDCT,J=42,SAB,PLUS,CRY,D=2> ; 4501
2655 003231' 102000 000700
2656 003232' 450245 020000 MWORD <RPCT,J=4502,S0A,OR,D=7> ; 4502
2657 003233' 437000 000220
2658 003234' 450353 010000 MWORD <JMAP,J=5301> ; 4503
2659 003235' 000000 000040
2660
2661 ; Data pattern 0's
2662
2663 003236' 460051 000000 MWORD <ADDR=4600,CJP,J=5100,SD0,AND,D=1,CENA,CCFZ>
2664 003237' 741400 020060
2665 003240' 460152 000000 MWORD <JMAP,J=5200> ; 4601
2666 003241' 000000 000040
2667
2668 ; Common code for floating 1's
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 40-8
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1442
2669
2670 003242' 530053 000000 MWORD <ADDR=5300,RPCT,J=5300,SAB,PLUS,D=2> ; 5300
2671 003243' 102000 000220
2672 003244' 530152 002000 MWORD <CJP,J=5200,S0A,OR,D=1,CENA,OENA,CCFZ> ; 5301
2673 003245' 431400 020060
2674 003246' 530251 000000 MWORD <JMAP,J=5100> ; 5302
2675 003247' 000000 000040
2676
2677 ; Subroutine - Passed - Write 1 to bit 12 of CSR register
2678
2679 003250' 510000 000000 MWORD <ADDR=5100,CONT,SD0,AND,B=2,D=2> ; 5100
2680 003251' 742001 000340
2681 003252' 510100 000000 MWORD <CONT,S0B,PLUS,B=2,D=2,CRY> ; 5101
2682 003253' 302001 000740
2683 003254' 510200 260000 MWORD <LDCT,J=26> ; 5102
2684 003255' 000000 000300
2685 003256' 510351 030000 MWORD <RPCT,J=5103,SAB,PLUS,A=2,B=2,D=2> ; 5103
2686 003257' 102021 000220
2687 003260' 510400 002004 MWORD <CONT,S0A,A=2,OR,D=1,OENA,SELE,MGC=4> ; 5104
2688 003261' 431020 005340
2689 003262' 510551 070040 MWORD <CJP,J=5107,CENA,CCGC,D=1,SELE,MGC=40> ; 5105
2690 003263' 001400 015060
2691 003264' 510651 050000 MWORD <JMAP,J=5105,D=1> ; 5106
2692 003265' 001000 000040
2693 003266' 510700 000200 MWORD <CONT,S0A,A=1,OR,D=1,SELE,MGC=200> ; 5107
2694 003267' 431010 005340
2695 003270' 511051 100000 MWORD <JMAP,J=5110,D=1> ; 5110
2696 003271' 001000 000040
2697
2698 ; Subroutine - Failed - Write 1 to bit 13 of CSR register
2699
2700 003272' 520000 000000 MWORD <ADDR=5200,CONT,SD0,AND,B=2,D=2> ; 5200
2701 003273' 742001 000340
2702 003274' 520100 000000 MWORD <CONT,S0B,PLUS,B=2,D=2,CRY> ; 5201
2703 003275' 302001 000740
2704 003276' 520200 250000 MWORD <LDCT,J=25> ; 5202
2705 003277' 000000 000300
2706 003300' 520352 030000 MWORD <RPCT,J=5203,SAB,PLUS,A=2,B=2,D=2> ; 5203
2707 003301' 102021 000220
2708 003302' 520400 002004 MWORD <CONT,S0A,A=2,OR,D=1,OENA,SELE,MGC=4> ; 5204
2709 003303' 431020 005340
2710 003304' 520552 070040 MWORD <CJP,J=5207,CENA,CCGC,D=1,SELE,MGC=40> ; 5205
2711 003305' 001400 015060
2712 003306' 520652 050000 MWORD <JMAP,J=5205,D=1> ; 5206
2713 003307' 001000 000040
2714 003310' 520700 000200 MWORD <CONT,S0A,A=1,OR,D=1,SELE,MGC=200> ; 5207
2715 003311' 431010 005340
2716 003312' 521052 100000 MWORD <JMAP,J=5210,D=1> ; 5210
2717 003313' 001000 000040
2718 003314' 777777 777777 -1
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 41
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1443
2719
2720 ;#********************************************************************
2721 ;* TEST 17 - CCCSRChng Test
2722 ;
2723 ; Description: Verify that condition code 'CCCSRChng' can be
2724 ; tested by the microsequencer for conditional
2725 ; branching, and that the condition code can be set
2726 ; and reset by the hardware conditions which should
2727 ; do so.
2728 ;
2729 ; Procedure: Port Clear
2730 ; Start up port
2731 ; UC> perform an operation and then verify that
2732 ; CCCSRChng is not asserted or asserted
2733 ; UC> if passed - set bit 12 (DISABLE Complete)
2734 ; UC> if failed - set bit 13 (ENABLE Complete)
2735 ; Read CSR and determine test disposition
2736 ;
2737 ; Repeat with several test cases:
2738 ; CC is set initially (KL last wrote CSR)
2739 ; CC is not set after port reads CSR
2740 ; CC is set after an EBUS PE
2741 ; CC stays set if port writes CSR
2742 ;
2743 ; Failure: ---
2744 ;#********************************************************************
2745
2746 ; Test data
2747
2748 003315' 254 00 0 00 003327' TSTU17: JRST TG17 ; go start test
2749 003316' 200403 000017 MPROC!NDMP!ZMPROC!17 ; test mask
2750 003317' 003404' 012045' T17M,,[ASCIZ ^CCCSRChng Test^]
2751 003320' 012050' 012052' [EXP M6,MLAST!E8],,[EXP M7,E1,E6,MLAST!E16]
2752 003321' 000000 003525' TSTU20 ; failure test table
2753 003322' 000000 003677' TSTU21 ; ...
2754 003323' 000000 004070' TSTU22
2755 003324' 000000 004261' TSTU23
2756 003325' 000000 004452' TSTU24
2757 003326' 777777 777777 -1
2758
2759 ; Start test
2760
2761 003327' 201 00 0 00 000000' TG17: MOVEI Z8 ; get address of module start
2762 003330' 260 17 0 00 002502* GO TRACE ; handle trace output
2763 003331' 201 01 0 00 003404' MOVEI 1,T17M ; set up microcode address
2764 003332' 260 17 0 00 002504* GO TLOAD ; load/verify it
2765 003333' 263 17 0 00 000000 RTN ; failed - exit test
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 42
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1444
2766
2767 ; Initialization
2768
2769 003334' 400 15 0 00 000000 TL17: SETZ ERFLG, ; clear error flag
2770 003335' 201 06 0 00 003352' MOVEI 6,TS17 ; get test table address
2771 003336' 402 00 0 00 002510* SETZM TSTSUB ; initialize subtest number
2772 003337' 476 00 0 00 002531* SETOM TADDR ; clear start address
2773
2774 ; Loop on test execute table entries
2775
2776 003340' 260 17 0 00 002512* TA17: GO IPACLR ; clear port
2777 003341' 260 17 0 00 002513* TB17: GO TEXEC ; execute table entry
2778 003342' 254 00 0 00 003351' JRST TX17 ; end of sstep table
2779 003343' 254 00 0 00 003341' JRST TB17 ; keep looping after call
2780 003344' 474 15 0 00 000000 SETO ERFLG, ; error occurred
2781
2782 ; Handle error printouts and scope looping
2783
2784 003345' 027 00 0 00 003372' SCOPER MA17 ; print error message
2785 003346' 254 00 0 00 003334' JRST TL17 ; loop on error
2786 003347' 254 00 0 00 003351' JRST TX17 ; altmode exit
2787 003350' 322 15 0 00 003340' JUMPE ERFLG,TA17 ; do next sstep table entry
2788
2789 ; End of test
2790
2791 003351' 263 17 0 00 000000 TX17: RTN ; return
2792
2793 ; Test Execute Table, as: (CMD,parameters)
2794
2795 ; CC is set initially (KL last wrote CSR)
2796
2797 003352' 040000 000000 TS17: TTABLE (TSTART,0) ; start up port
2798 003353' 240002 000000 TTABLE (TCHECK,2) ; check if completed
2799 003354' 340000 000000 TTABLE (TEXIT) ; exit if error yet
2800
2801 ; CC is not set after port reads CSR
2802
2803 003355' 040000 000003 TTABLE (TSTART,3) ; start up port
2804 003356' 240002 000000 TTABLE (TCHECK,2) ; check if completed
2805 003357' 340000 000000 TTABLE (TEXIT) ; exit if error yet
2806
2807 ; CC is set after an EBUS PE
2808
2809 003360' 040000 000011 TTABLE (TSTART,11) ; start up port
2810 003361' 140000 003367' TTABLE (TCALL,TS17PE) ; cause an EBUS parity error
2811 003362' 240002 000000 TTABLE (TCHECK,2) ; check if completed
2812 003363' 340000 000000 TTABLE (TEXIT) ; exit if error yet
2813
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 43
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1445
2814
2815 ; CC stays set if port writes CSR
2816
2817 003364' 040000 000017 TTABLE (TSTART,17) ; start up port
2818 003365' 240002 000000 TTABLE (TCHECK,2) ; check if completed
2819
2820 003366' 000000 000000 TTABLE (TLAST)
2821
2822 ; Routine to cause an EBUS PE after the port has been started
2823
2824 003367' 201 01 0 00 140010 TS17PE: MOVEI 1,GENEPE!MPRUN!SELLAR ; get data to write to CSR
2825 003370' 260 17 0 00 002026* GO LDCSR ; write it
2826 003371' 263 17 0 00 000000 RTN ; return
2827
2828 ; Error messages
2829
2830 003372' 140000 012056' MA17: MSG!TXNOT![ASCIZ /Condition Code 'CC CSR Chng' not /]
2831 003373' 240000 003375' CALL!TXNOT!MA17LP ; print subtest description
2832 003374' 000000000000# LAST!CALL!TXALL!TTPNT ; print test data
2833
2834 003375' 200 01 0 00 003336* MA17LP: MOVE 1,TSTSUB ; get subtest number
2835 003376' 256 00 0 01 003377' XCT MA17L-1(1) ; print message
2836 003377' 263 17 0 00 000000 RTN ; return
2837
2838 003400' 037 00 0 00 012065' MA17L: TMSG <set initially (KL last wrote CSR)>
2839 003401' 037 00 0 00 012074' TMSG <cleared after port reads CSR>
2840 003402' 037 00 0 00 012102' TMSG <set after an EBUS PE>
2841 003403' 037 00 0 00 012107' TMSG <still set after port writes CSR>
2842
2843 ; Microcode:
2844
2845 ; CC is set initially (KL last wrote CSR)
2846
2847 003404' 000000 010000 T17M: MWORD <ADDR=0,JMAP,J=1> ; 0
2848 003405' 000000 000040
2849 003406' 000151 000000 MWORD <CJP,J=5100,CENA,CCCC> ; 1
2850 003407' 000400 030060
2851 003410' 000252 000000 MWORD <JMAP,J=5200> ; 2
2852 003411' 000000 000040
2853
2854 ; CC is not set after port reads CSR
2855
2856 003412' 000300 040000 MWORD <ADDR=3,JMAP,J=4> ; 3
2857 003413' 000000 000040
2858 003414' 000400 060040 MWORD <CJP,J=6,CENA,CCGC,D=1,SELE,MGC=40> ; 4
2859 003415' 001400 015060
2860 003416' 000500 040000 MWORD <JMAP,J=4,D=1> ; 5
2861 003417' 001000 000040
2862 003420' 000600 000100 MWORD <CONT,S0A,OR,D=1,SELE,MGC=100> ; 6
2863 003421' 431000 005340
2864 003422' 000752 000000 MWORD <CJP,J=5200,CENA,CCCC> ; 7
2865 003423' 000400 030060
2866 003424' 001051 000000 MWORD <JMAP,J=5100> ; 10
2867 003425' 000000 000040
2868
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 43-1
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1446
2869 ; CC is set after an EBUS PE
2870
2871 003426' 001100 120000 MWORD <ADDR=11,JMAP,J=12> ; 11
2872 003427' 000000 000040
2873 003430' 001200 140040 MWORD <CJP,J=14,CENA,CCGC,D=1,SELE,MGC=40> ; 12
2874 003431' 001400 015060
2875 003432' 001300 120000 MWORD <JMAP,J=12,D=1> ; 13
2876 003433' 001000 000040
2877 003434' 001400 000100 MWORD <CONT,S0A,OR,D=1,SELE,MGC=100> ; 14
2878 003435' 431000 005340
2879 003436' 001551 000000 MWORD <CJP,J=5100,CENA,CCCC> ; 15
2880 003437' 000400 030060
2881 003440' 001600 150000 MWORD <JMAP,J=15> ; 16
2882 003441' 000000 000040
2883
2884 ; CC stays set if port writes CSR
2885
2886 003442' 001700 200000 MWORD <ADDR=17,JMAP,J=20> ; 17
2887 003443' 000000 000040
2888 003444' 002000 002004 MWORD <CONT,SD0,AND,D=1,OENA,SELE,MGC=4> ; 20
2889 003445' 741000 005340
2890 003446' 002100 230040 MWORD <CJP,J=23,CENA,CCGC,D=1,SELE,MGC=40> ; 21
2891 003447' 001400 015060
2892 003450' 002200 210000 MWORD <JMAP,J=21,D=1> ; 22
2893 003451' 001000 000040
2894 003452' 002300 000200 MWORD <CONT,S0A,OR,D=1,SELE,MGC=200> ; 23
2895 003453' 431000 005340
2896 003454' 002452 000000 MWORD <CJP,J=5200,CENA,CCGC> ; 24
2897 003455' 000400 010060
2898 003456' 002551 000000 MWORD <JMAP,J=5100> ; 25
2899 003457' 000000 000040
2900
2901 ; Subroutine - Passed - Write 1 to bit 12 of CSR register
2902
2903 003460' 510000 000000 MWORD <ADDR=5100,CONT,SD0,AND,B=2,D=2> ; 5100
2904 003461' 742001 000340
2905 003462' 510100 000000 MWORD <CONT,S0B,PLUS,B=2,D=2,CRY> ; 5101
2906 003463' 302001 000740
2907 003464' 510200 260000 MWORD <LDCT,J=26> ; 5102
2908 003465' 000000 000300
2909 003466' 510351 030000 MWORD <RPCT,J=5103,SAB,PLUS,A=2,B=2,D=2> ; 5103
2910 003467' 102021 000220
2911 003470' 510400 002004 MWORD <CONT,S0A,A=2,OR,D=1,OENA,SELE,MGC=4> ; 5104
2912 003471' 431020 005340
2913 003472' 510551 070040 MWORD <CJP,J=5107,CENA,CCGC,D=1,SELE,MGC=40> ; 5105
2914 003473' 001400 015060
2915 003474' 510651 050000 MWORD <JMAP,J=5105,D=1> ; 5106
2916 003475' 001000 000040
2917 003476' 510700 000200 MWORD <CONT,S0A,A=1,OR,D=1,SELE,MGC=200> ; 5107
2918 003477' 431010 005340
2919 003500' 511051 100000 MWORD <JMAP,J=5110,D=1> ; 5110
2920 003501' 001000 000040
2921
2922 ; Subroutine - Failed - Write 1 to bit 13 of CSR register
2923
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 43-2
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1447
2924 003502' 520000 000000 MWORD <ADDR=5200,CONT,SD0,AND,B=2,D=2> ; 5200
2925 003503' 742001 000340
2926 003504' 520100 000000 MWORD <CONT,S0B,PLUS,B=2,D=2,CRY> ; 5201
2927 003505' 302001 000740
2928 003506' 520200 250000 MWORD <LDCT,J=25> ; 5202
2929 003507' 000000 000300
2930 003510' 520352 030000 MWORD <RPCT,J=5203,SAB,PLUS,A=2,B=2,D=2> ; 5203
2931 003511' 102021 000220
2932 003512' 520400 002004 MWORD <CONT,S0A,A=2,OR,D=1,OENA,SELE,MGC=4> ; 5204
2933 003513' 431020 005340
2934 003514' 520552 070040 MWORD <CJP,J=5207,CENA,CCGC,D=1,SELE,MGC=40> ; 5205
2935 003515' 001400 015060
2936 003516' 520652 050000 MWORD <JMAP,J=5205,D=1> ; 5206
2937 003517' 001000 000040
2938 003520' 520700 000200 MWORD <CONT,S0A,A=1,OR,D=1,SELE,MGC=200> ; 5207
2939 003521' 431010 005340
2940 003522' 521052 100000 MWORD <JMAP,J=5210,D=1> ; 5210
2941 003523' 001000 000040
2942 003524' 777777 777777 -1
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 44
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1448
2943
2944 ;#********************************************************************
2945 ;* TEST 20 - CCEbParErr Test
2946 ;
2947 ; Description: Verify that condition code 'CCEbParErr' can be
2948 ; tested by the microsequencer for conditional
2949 ; branching, and that the condition code can be set
2950 ; and reset by the hardware conditions which should
2951 ; do so.
2952 ;
2953 ; Procedure: Port Clear
2954 ; Start up port
2955 ; UC> perform an operation and then verify that
2956 ; CCEbParErr is not asserted or asserted
2957 ; UC> if passed - set bit 12 (DISABLE Complete)
2958 ; UC> if failed - set bit 13 (ENABLE Complete)
2959 ; Read CSR and determine test disposition
2960 ;
2961 ; Repeat with several test cases:
2962 ; CC is cleared initially
2963 ; CC is set after an EBUS PE
2964 ;
2965 ; Failure: ---
2966 ;#********************************************************************
2967
2968 ; Test data
2969
2970 003525' 254 00 0 00 003537' TSTU20: JRST TG20 ; go start test
2971 003526' 200403 000020 MPROC!NDMP!ZMPROC!20 ; test mask
2972 003527' 003604' 012116' T20M,,[ASCIZ ^CCEbParErr Test^]
2973 003530' 012122' 012124' [EXP M6,MLAST!E16],,[EXP M7,E9,E1,E4,MLAST!E6]
2974 003531' 000000 003677' TSTU21 ; failure test table
2975 003532' 000000 004070' TSTU22 ; ...
2976 003533' 000000 004261' TSTU23
2977 003534' 000000 004452' TSTU24
2978 003535' 000000 004645' TSTU25
2979 003536' 777777 777777 -1
2980
2981 ; Start test
2982
2983 003537' 201 00 0 00 000000' TG20: MOVEI Z8 ; get address of module start
2984 003540' 260 17 0 00 003330* GO TRACE ; handle trace output
2985 003541' 201 01 0 00 003604' MOVEI 1,T20M ; set up microcode address
2986 003542' 260 17 0 00 003332* GO TLOAD ; load/verify it
2987 003543' 263 17 0 00 000000 RTN ; failed - exit test
2988
2989 ; Initialization
2990
2991 003544' 400 15 0 00 000000 TL20: SETZ ERFLG, ; clear error flag
2992 003545' 201 06 0 00 003562' MOVEI 6,TS20 ; get test table address
2993 003546' 402 00 0 00 003375* SETZM TSTSUB ; initialize subtest number
2994 003547' 476 00 0 00 003337* SETOM TADDR ; clear start address
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 45
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1449
2995
2996 ; Loop on test execute table entries
2997
2998 003550' 260 17 0 00 003340* TA20: GO IPACLR ; clear port
2999 003551' 260 17 0 00 003341* TB20: GO TEXEC ; execute table entry
3000 003552' 254 00 0 00 003561' JRST TX20 ; end of sstep table
3001 003553' 254 00 0 00 003551' JRST TB20 ; keep looping after call
3002 003554' 474 15 0 00 000000 SETO ERFLG, ; error occurred
3003
3004 ; Handle error printouts and scope looping
3005
3006 003555' 027 00 0 00 003574' SCOPER MA20 ; print error message
3007 003556' 254 00 0 00 003544' JRST TL20 ; loop on error
3008 003557' 254 00 0 00 003561' JRST TX20 ; altmode exit
3009 003560' 322 15 0 00 003550' JUMPE ERFLG,TA20 ; do next sstep table entry
3010
3011 ; End of test
3012
3013 003561' 263 17 0 00 000000 TX20: RTN ; return
3014
3015 ; Test Execute Table, as: (CMD,parameters)
3016
3017 ; CC is cleared initially
3018
3019 003562' 040000 000000 TS20: TTABLE (TSTART,0) ; start up port
3020 003563' 240002 000000 TTABLE (TCHECK,2) ; check if completed
3021 003564' 340000 000000 TTABLE (TEXIT) ; exit if error yet
3022
3023 ; CC is set after an EBUS PE
3024
3025 003565' 040000 000003 TTABLE (TSTART,3) ; start up port
3026 003566' 140000 003571' TTABLE (TCALL,TS20PE) ; cause an EBUS parity error
3027 003567' 240002 000000 TTABLE (TCHECK,2) ; check if completed
3028 003570' 000000 000000 TTABLE (TLAST)
3029
3030 ; Routine to cause an EBUS PE after the port has been started
3031
3032 003571' 201 01 0 00 140010 TS20PE: MOVEI 1,GENEPE!MPRUN!SELLAR ; get data to write to CSR
3033 003572' 260 17 0 00 003370* GO LDCSR ; write it
3034 003573' 263 17 0 00 000000 RTN ; return
3035
3036 ; Error messages
3037
3038 003574' 140000 012131' MA20: MSG!TXNOT![ASCIZ /Condition Code 'CC Eb Par Err' not /]
3039 003575' 240000 003577' CALL!TXNOT!MA20LP ; print subtest description
3040 003576' 000000000000# LAST!CALL!TXALL!TTPNT ; print test data
3041
3042 003577' 200 01 0 00 003546* MA20LP: MOVE 1,TSTSUB ; get subtest number
3043 003600' 256 00 0 01 003601' XCT MA20L-1(1) ; print message
3044 003601' 263 17 0 00 000000 RTN ; return
3045
3046 003602' 037 00 0 00 011656' MA20L: TMSG <cleared initially>
3047 003603' 037 00 0 00 012102' TMSG <set after an EBUS PE>
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 46
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1450
3048
3049 ; Microcode:
3050
3051 ; CC is cleared initially
3052
3053 003604' 000000 010000 T20M: MWORD <ADDR=0,JMAP,J=1> ; 0
3054 003605' 000000 000040
3055 003606' 000152 000000 MWORD <CJP,J=5200,CENA,CCEB> ; 1
3056 003607' 000400 040060
3057 003610' 000251 000000 MWORD <JMAP,J=5100> ; 2
3058 003611' 000000 000040
3059
3060 ; CC is set after an EBUS PE
3061
3062 003612' 000300 040000 MWORD <ADDR=3,JMAP,J=4> ; 3
3063 003613' 000000 000040
3064 003614' 000400 060040 MWORD <CJP,J=6,CENA,CCGC,D=1,SELE,MGC=40> ; 4
3065 003615' 001400 015060
3066 003616' 000500 040000 MWORD <JMAP,J=4,D=1> ; 5
3067 003617' 001000 000040
3068 003620' 000600 000100 MWORD <CONT,S0A,OR,D=1,SELE,MGC=100> ; 6
3069 003621' 431000 005340
3070 003622' 000700 110000 MWORD <CJP,J=11,CENA,CCCC> ; 7
3071 003623' 000400 030060
3072 003624' 001000 070000 MWORD <JMAP,J=7> ; 10
3073 003625' 000000 000040
3074 003626' 001151 000000 MWORD <CJP,J=5100,CENA,CCEB> ; 11
3075 003627' 000400 040060
3076 003630' 001252 000000 MWORD <JMAP,J=5200> ; 12
3077 003631' 000000 000040
3078
3079 ; Subroutine - Passed - Write 1 to bit 12 of CSR register
3080
3081 003632' 510000 000000 MWORD <ADDR=5100,CONT,SD0,AND,B=2,D=2> ; 5100
3082 003633' 742001 000340
3083 003634' 510100 000000 MWORD <CONT,S0B,PLUS,B=2,D=2,CRY> ; 5101
3084 003635' 302001 000740
3085 003636' 510200 260000 MWORD <LDCT,J=26> ; 5102
3086 003637' 000000 000300
3087 003640' 510351 030000 MWORD <RPCT,J=5103,SAB,PLUS,A=2,B=2,D=2> ; 5103
3088 003641' 102021 000220
3089 003642' 510400 002004 MWORD <CONT,S0A,A=2,OR,D=1,OENA,SELE,MGC=4> ; 5104
3090 003643' 431020 005340
3091 003644' 510551 070040 MWORD <CJP,J=5107,CENA,CCGC,D=1,SELE,MGC=40> ; 5105
3092 003645' 001400 015060
3093 003646' 510651 050000 MWORD <JMAP,J=5105,D=1> ; 5106
3094 003647' 001000 000040
3095 003650' 510700 000200 MWORD <CONT,S0A,A=1,OR,D=1,SELE,MGC=200> ; 5107
3096 003651' 431010 005340
3097 003652' 511051 100000 MWORD <JMAP,J=5110,D=1> ; 5110
3098 003653' 001000 000040
3099
3100 ; Subroutine - Failed - Write 1 to bit 13 of CSR register
3101
3102 003654' 520000 000000 MWORD <ADDR=5200,CONT,SD0,AND,B=2,D=2> ; 5200
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 46-1
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1451
3103 003655' 742001 000340
3104 003656' 520100 000000 MWORD <CONT,S0B,PLUS,B=2,D=2,CRY> ; 5201
3105 003657' 302001 000740
3106 003660' 520200 250000 MWORD <LDCT,J=25> ; 5202
3107 003661' 000000 000300
3108 003662' 520352 030000 MWORD <RPCT,J=5203,SAB,PLUS,A=2,B=2,D=2> ; 5203
3109 003663' 102021 000220
3110 003664' 520400 002004 MWORD <CONT,S0A,A=2,OR,D=1,OENA,SELE,MGC=4> ; 5204
3111 003665' 431020 005340
3112 003666' 520552 070040 MWORD <CJP,J=5207,CENA,CCGC,D=1,SELE,MGC=40> ; 5205
3113 003667' 001400 015060
3114 003670' 520652 050000 MWORD <JMAP,J=5205,D=1> ; 5206
3115 003671' 001000 000040
3116 003672' 520700 000200 MWORD <CONT,S0A,A=1,OR,D=1,SELE,MGC=200> ; 5207
3117 003673' 431010 005340
3118 003674' 521052 100000 MWORD <JMAP,J=5210,D=1> ; 5210
3119 003675' 001000 000040
3120 003676' 777777 777777 -1
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 47
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1452
3121
3122 ;#********************************************************************
3123 ;* TEST 21 - CCRcvrBufAFul Test
3124 ;
3125 ; Description: Verify that condition code 'CCRcvrBufAFul' can be
3126 ; tested by the microsequencer for conditional
3127 ; branching.
3128 ;
3129 ; Procedure: Port Clear
3130 ; Start up port
3131 ; UC> perform an operation and then verify that
3132 ; CCRcvrBufAFul is not asserted
3133 ; UC> if passed - set bit 12 (DISABLE Complete)
3134 ; UC> if failed - set bit 13 (ENABLE Complete)
3135 ; Read CSR and determine test disposition
3136 ;
3137 ; Repeat with several test cases:
3138 ; CC is cleared initially (after resetting the
3139 ; bit in case the PB module is connected)
3140 ; CC is cleared after a CLRCCCODE command
3141 ;
3142 ; Failure: ---
3143 ;#********************************************************************
3144
3145 ; Test data
3146
3147 003677' 254 00 0 00 003711' TSTU21: JRST TG21 ; go start test
3148 003700' 200403 000021 MPROC!NDMP!ZMPROC!21 ; test mask
3149 003701' 003753' 012141' T21M,,[ASCIZ ^CCRcvrBufAFul Test^]
3150 003702' 012145' 012147' [EXP M6,MLAST!C13],,[EXP M7,MLAST!C7]
3151 003703' 000000 004070' TSTU22 ; failure test table
3152 003704' 000000 004261' TSTU23 ; ...
3153 003705' 000000 004452' TSTU24
3154 003706' 000000 004645' TSTU25
3155 003707' 000000 005035' TSTU26
3156 003710' 777777 777777 -1
3157
3158 ; Start test
3159
3160 003711' 201 00 0 00 000000' TG21: MOVEI Z8 ; get address of module start
3161 003712' 260 17 0 00 003540* GO TRACE ; handle trace output
3162 003713' 201 01 0 00 003753' MOVEI 1,T21M ; set up microcode address
3163 003714' 260 17 0 00 003542* GO TLOAD ; load/verify it
3164 003715' 263 17 0 00 000000 RTN ; failed - exit test
3165
3166 ; Initialization
3167
3168 003716' 400 15 0 00 000000 TL21: SETZ ERFLG, ; clear error flag
3169 003717' 201 06 0 00 003734' MOVEI 6,TS21 ; get test table address
3170 003720' 402 00 0 00 003577* SETZM TSTSUB ; initialize subtest number
3171 003721' 476 00 0 00 003547* SETOM TADDR ; clear start address
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 48
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1453
3172
3173 ; Loop on test execute table entries
3174
3175 003722' 260 17 0 00 003550* TA21: GO IPACLR ; clear port
3176 003723' 260 17 0 00 003551* TB21: GO TEXEC ; execute table entry
3177 003724' 254 00 0 00 003733' JRST TX21 ; end of sstep table
3178 003725' 254 00 0 00 003723' JRST TB21 ; keep looping after call
3179 003726' 474 15 0 00 000000 SETO ERFLG, ; error occurred
3180
3181 ; Handle error printouts and scope looping
3182
3183 003727' 027 00 0 00 003743' SCOPER MA21 ; print error message
3184 003730' 254 00 0 00 003716' JRST TL21 ; loop on error
3185 003731' 254 00 0 00 003733' JRST TX21 ; altmode exit
3186 003732' 322 15 0 00 003722' JUMPE ERFLG,TA21 ; do next sstep table entry
3187
3188 ; End of test
3189
3190 003733' 263 17 0 00 000000 TX21: RTN ; return
3191
3192 ; Test Execute Table, as: (CMD,parameters)
3193
3194 ; CC is cleared initially
3195
3196 003734' 040000 000030 TS21: TTABLE (TSTART,30) ; start up port
3197 003735' 240002 000000 TTABLE (TCHECK,2) ; check if completed
3198 003736' 340000 000000 TTABLE (TEXIT) ; exit if error yet
3199
3200 ; CC is cleared after a CLRCCCODE command
3201
3202 003737' 040000 000010 TTABLE (TSTART,10) ; start up port
3203 003740' 240002 000000 TTABLE (TCHECK,2) ; check if completed
3204 003741' 340000 000000 TTABLE (TEXIT) ; exit if error yet
3205 003742' 000000 000000 TTABLE (TLAST)
3206
3207 ; Error messages
3208
3209 003743' 140000 012151' MA21: MSG!TXNOT![ASCIZ /Condition Code 'CC Rcvr BufA Ful' not /]
3210 003744' 240000 003746' CALL!TXNOT!MA21LP ; print subtest description
3211 003745' 000000000000# LAST!CALL!TXALL!TTPNT ; print test data
3212
3213 003746' 200 01 0 00 003720* MA21LP: MOVE 1,TSTSUB ; get subtest number
3214 003747' 256 00 0 01 003750' XCT MA21L-1(1) ; print message
3215 003750' 263 17 0 00 000000 RTN ; return
3216
3217 003751' 037 00 0 00 011656' MA21L: TMSG <cleared initially>
3218 003752' 037 00 0 00 012161' TMSG <cleared after a CLRCCCODE command>
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 49
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1454
3219
3220 ; Microcode:
3221
3222 ; CC is cleared initially
3223
3224 003753' 003000 000000 T21M: MWORD <ADDR=30,JZ> ; 30
3225 003754' 000000 000000
3226 003755' 000000 400000 MWORD <ADDR=0,CJS,J=40> ; 0
3227 003756' 000000 000020
3228 003757' 000100 000014 MWORD <CONT,SD0,OR,B=2,D=2,MGC=14> ; 1
3229 003760' 732001 000340
3230 003761' 000200 002040 MWORD <CONT,S0A,A=2,OR,D=1,OENA,SELM,MGC=40> ; 2
3231 003762' 431020 002340
3232 003763' 000300 000274 MWORD <CONT,SD0,D=1,SELP,MGC=274> ; 3
3233 003764' 701000 001340
3234 003765' 000400 000000 MWORD <CONT,D=1> ; 4
3235 003766' 001000 000340
3236 003767' 000552 000000 MWORD <CJP,J=5200,CENA,CCAF> ; 5
3237 003770' 000400 050060
3238 003771' 000651 000000 MWORD <JMAP,J=5100> ; 6
3239 003772' 000000 000040
3240
3241 ; CC is cleared after a CLRCCCODE command
3242
3243 003773' 001000 110000 MWORD <ADDR=10,JMAP,J=11> ; 10
3244 003774' 000000 000040
3245 003775' 001100 400000 MWORD <CJS,J=40> ; 11
3246 003776' 000000 000020
3247 003777' 001200 000020 MWORD <CONT,SELM,MGC=20> ; 12
3248 004000' 000000 002340
3249 004001' 001300 000000 MWORD <CONT,D=1> ; 13
3250 004002' 001000 000340
3251 004003' 001452 000000 MWORD <CJP,J=5200,CENA,CCAF> ; 14
3252 004004' 000400 050060
3253 004005' 001551 000000 MWORD <JMAP,J=5100> ; 15
3254 004006' 000000 000040
3255
3256 ; Subroutine - Determine if a PILA module is connected - if not exit test
3257
3258 004007' 004000 420000 MWORD <ADDR=40,CJP,J=42,CENA,CCAF> ; 40
3259 004010' 000400 050060
3260 004011' 004100 000000 MWORD <CRTN> ; 41
3261 004012' 000000 000240
3262 004013' 004200 440000 MWORD <CJP,J=44,CENA,CCAF> ; 42
3263 004014' 000400 050060
3264 004015' 004300 000000 MWORD <CRTN> ; 43
3265 004016' 000000 000240
3266 004017' 004451 000000 MWORD <CJP,J=5100,CENA,CCAF> ; 44
3267 004020' 000400 050060
3268 004021' 004500 000000 MWORD <CRTN> ; 45
3269 004022' 000000 000240
3270
3271 ; Subroutine - Passed - Write 1 to bit 12 of CSR register
3272
3273 004023' 510000 000000 MWORD <ADDR=5100,CONT,SD0,AND,B=2,D=2> ; 5100
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 49-1
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1455
3274 004024' 742001 000340
3275 004025' 510100 000000 MWORD <CONT,S0B,PLUS,B=2,D=2,CRY> ; 5101
3276 004026' 302001 000740
3277 004027' 510200 260000 MWORD <LDCT,J=26> ; 5102
3278 004030' 000000 000300
3279 004031' 510351 030000 MWORD <RPCT,J=5103,SAB,PLUS,A=2,B=2,D=2> ; 5103
3280 004032' 102021 000220
3281 004033' 510400 002004 MWORD <CONT,S0A,A=2,OR,D=1,OENA,SELE,MGC=4> ; 5104
3282 004034' 431020 005340
3283 004035' 510551 070040 MWORD <CJP,J=5107,CENA,CCGC,D=1,SELE,MGC=40> ; 5105
3284 004036' 001400 015060
3285 004037' 510651 050000 MWORD <JMAP,J=5105,D=1> ; 5106
3286 004040' 001000 000040
3287 004041' 510700 000200 MWORD <CONT,S0A,A=1,OR,D=1,SELE,MGC=200> ; 5107
3288 004042' 431010 005340
3289 004043' 511051 100000 MWORD <JMAP,J=5110,D=1> ; 5110
3290 004044' 001000 000040
3291
3292 ; Subroutine - Failed - Write 1 to bit 13 of CSR register
3293
3294 004045' 520000 000000 MWORD <ADDR=5200,CONT,SD0,AND,B=2,D=2> ; 5200
3295 004046' 742001 000340
3296 004047' 520100 000000 MWORD <CONT,S0B,PLUS,B=2,D=2,CRY> ; 5201
3297 004050' 302001 000740
3298 004051' 520200 250000 MWORD <LDCT,J=25> ; 5202
3299 004052' 000000 000300
3300 004053' 520352 030000 MWORD <RPCT,J=5203,SAB,PLUS,A=2,B=2,D=2> ; 5203
3301 004054' 102021 000220
3302 004055' 520400 002004 MWORD <CONT,S0A,A=2,OR,D=1,OENA,SELE,MGC=4> ; 5204
3303 004056' 431020 005340
3304 004057' 520552 070040 MWORD <CJP,J=5207,CENA,CCGC,D=1,SELE,MGC=40> ; 5205
3305 004060' 001400 015060
3306 004061' 520652 050000 MWORD <JMAP,J=5205,D=1> ; 5206
3307 004062' 001000 000040
3308 004063' 520700 000200 MWORD <CONT,S0A,A=1,OR,D=1,SELE,MGC=200> ; 5207
3309 004064' 431010 005340
3310 004065' 521052 100000 MWORD <JMAP,J=5210,D=1> ; 5210
3311 004066' 001000 000040
3312 004067' 777777 777777 -1
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 50
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1456
3313
3314 ;#********************************************************************
3315 ;* TEST 22 - CCRcvrBufBFul Test
3316 ;
3317 ; Description: Verify that condition code 'CCRcvrBufBFul' can be
3318 ; tested by the microsequencer for conditional
3319 ; branching.
3320 ;
3321 ; Procedure: Port Clear
3322 ; Start up port
3323 ; UC> perform an operation and then verify that
3324 ; CCRcvrBufBFul is not asserted
3325 ; UC> if passed - set bit 12 (DISABLE Complete)
3326 ; UC> if failed - set bit 13 (ENABLE Complete)
3327 ; Read CSR and determine test disposition
3328 ;
3329 ; Repeat with several test cases:
3330 ; CC is cleared initially (after resetting the
3331 ; bit in case the PB module is connected)
3332 ; CC is cleared after a CLRCCCODE command
3333 ;
3334 ; Failure: ---
3335 ;#********************************************************************
3336
3337 ; Test data
3338
3339 004070' 254 00 0 00 004102' TSTU22: JRST TG22 ; go start test
3340 004071' 200403 000022 MPROC!NDMP!ZMPROC!22 ; test mask
3341 004072' 004144' 012170' T22M,,[ASCIZ ^CCRcvrBufBFul Test^]
3342 004073' 012145' 012147' [EXP M6,MLAST!C13],,[EXP M7,MLAST!C7]
3343 004074' 000000 004261' TSTU23 ; failure test table
3344 004075' 000000 004452' TSTU24 ; ...
3345 004076' 000000 004645' TSTU25
3346 004077' 000000 005035' TSTU26
3347 004100' 000000 005216' TSTU27
3348 004101' 777777 777777 -1
3349
3350 ; Start test
3351
3352 004102' 201 00 0 00 000000' TG22: MOVEI Z8 ; get address of module start
3353 004103' 260 17 0 00 003712* GO TRACE ; handle trace output
3354 004104' 201 01 0 00 004144' MOVEI 1,T22M ; set up microcode address
3355 004105' 260 17 0 00 003714* GO TLOAD ; load/verify it
3356 004106' 263 17 0 00 000000 RTN ; failed - exit test
3357
3358 ; Initialization
3359
3360 004107' 400 15 0 00 000000 TL22: SETZ ERFLG, ; clear error flag
3361 004110' 201 06 0 00 004125' MOVEI 6,TS22 ; get test table address
3362 004111' 402 00 0 00 003746* SETZM TSTSUB ; initialize subtest number
3363 004112' 476 00 0 00 003721* SETOM TADDR ; clear start address
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 51
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1457
3364
3365 ; Loop on test execute table entries
3366
3367 004113' 260 17 0 00 003722* TA22: GO IPACLR ; clear port
3368 004114' 260 17 0 00 003723* TB22: GO TEXEC ; execute table entry
3369 004115' 254 00 0 00 004124' JRST TX22 ; end of sstep table
3370 004116' 254 00 0 00 004114' JRST TB22 ; keep looping after call
3371 004117' 474 15 0 00 000000 SETO ERFLG, ; error occurred
3372
3373 ; Handle error printouts and scope looping
3374
3375 004120' 027 00 0 00 004134' SCOPER MA22 ; print error message
3376 004121' 254 00 0 00 004107' JRST TL22 ; loop on error
3377 004122' 254 00 0 00 004124' JRST TX22 ; altmode exit
3378 004123' 322 15 0 00 004113' JUMPE ERFLG,TA22 ; do next sstep table entry
3379
3380 ; End of test
3381
3382 004124' 263 17 0 00 000000 TX22: RTN ; return
3383
3384 ; Test Execute Table, as: (CMD,parameters)
3385
3386 ; CC is cleared initially
3387
3388 004125' 040000 000030 TS22: TTABLE (TSTART,30) ; start up port
3389 004126' 240002 000000 TTABLE (TCHECK,2) ; check if completed
3390 004127' 340000 000000 TTABLE (TEXIT) ; exit if error yet
3391
3392 ; CC is cleared after a CLRCCCODE command
3393
3394 004130' 040000 000010 TTABLE (TSTART,10) ; start up port
3395 004131' 240002 000000 TTABLE (TCHECK,2) ; check if completed
3396 004132' 340000 000000 TTABLE (TEXIT) ; exit if error yet
3397 004133' 000000 000000 TTABLE (TLAST)
3398
3399 ; Error messages
3400
3401 004134' 140000 012174' MA22: MSG!TXNOT![ASCIZ /Condition Code 'CC Rcvr BufB Ful' not /]
3402 004135' 240000 004137' CALL!TXNOT!MA22LP ; print subtest description
3403 004136' 000000000000# LAST!CALL!TXALL!TTPNT ; print test data
3404
3405 004137' 200 01 0 00 004111* MA22LP: MOVE 1,TSTSUB ; get subtest number
3406 004140' 256 00 0 01 004141' XCT MA22L-1(1) ; print message
3407 004141' 263 17 0 00 000000 RTN ; return
3408
3409 004142' 037 00 0 00 011656' MA22L: TMSG <cleared initially>
3410 004143' 037 00 0 00 012161' TMSG <cleared after a CLRCCCODE command>
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 52
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1458
3411
3412 ; Microcode:
3413
3414 ; CC is cleared initially
3415
3416 004144' 003000 000000 T22M: MWORD <ADDR=30,JZ> ; 30
3417 004145' 000000 000000
3418 004146' 000000 400000 MWORD <ADDR=0,CJS,J=40> ; 0
3419 004147' 000000 000020
3420 004150' 000100 000014 MWORD <CONT,SD0,OR,B=2,D=2,MGC=14> ; 1
3421 004151' 732001 000340
3422 004152' 000200 002040 MWORD <CONT,S0A,A=2,OR,D=1,OENA,SELM,MGC=40> ; 2
3423 004153' 431020 002340
3424 004154' 000300 000274 MWORD <CONT,SD0,D=1,SELP,MGC=274> ; 3
3425 004155' 701000 001340
3426 004156' 000400 000000 MWORD <CONT,D=1> ; 4
3427 004157' 001000 000340
3428 004160' 000552 000000 MWORD <CJP,J=5200,CENA,CCBF> ; 5
3429 004161' 000400 060060
3430 004162' 000651 000000 MWORD <JMAP,J=5100> ; 6
3431 004163' 000000 000040
3432
3433 ; CC is cleared after a CLRCCCODE command
3434
3435 004164' 001000 110000 MWORD <ADDR=10,JMAP,J=11> ; 10
3436 004165' 000000 000040
3437 004166' 001100 400000 MWORD <CJS,J=40> ; 11
3438 004167' 000000 000020
3439 004170' 001200 000020 MWORD <CONT,SELM,MGC=20> ; 12
3440 004171' 000000 002340
3441 004172' 001300 000000 MWORD <CONT,D=1> ; 13
3442 004173' 001000 000340
3443 004174' 001452 000000 MWORD <CJP,J=5200,CENA,CCBF> ; 14
3444 004175' 000400 060060
3445 004176' 001551 000000 MWORD <JMAP,J=5100> ; 15
3446 004177' 000000 000040
3447
3448 ; Subroutine - Determine if a PILA module is connected - if not exit test
3449
3450 004200' 004000 420000 MWORD <ADDR=40,CJP,J=42,CENA,CCAF> ; 40
3451 004201' 000400 050060
3452 004202' 004100 000000 MWORD <CRTN> ; 41
3453 004203' 000000 000240
3454 004204' 004200 440000 MWORD <CJP,J=44,CENA,CCAF> ; 42
3455 004205' 000400 050060
3456 004206' 004300 000000 MWORD <CRTN> ; 43
3457 004207' 000000 000240
3458 004210' 004451 000000 MWORD <CJP,J=5100,CENA,CCAF> ; 44
3459 004211' 000400 050060
3460 004212' 004500 000000 MWORD <CRTN> ; 45
3461 004213' 000000 000240
3462
3463 ; Subroutine - Passed - Write 1 to bit 12 of CSR register
3464
3465 004214' 510000 000000 MWORD <ADDR=5100,CONT,SD0,AND,B=2,D=2> ; 5100
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 52-1
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1459
3466 004215' 742001 000340
3467 004216' 510100 000000 MWORD <CONT,S0B,PLUS,B=2,D=2,CRY> ; 5101
3468 004217' 302001 000740
3469 004220' 510200 260000 MWORD <LDCT,J=26> ; 5102
3470 004221' 000000 000300
3471 004222' 510351 030000 MWORD <RPCT,J=5103,SAB,PLUS,A=2,B=2,D=2> ; 5103
3472 004223' 102021 000220
3473 004224' 510400 002004 MWORD <CONT,S0A,A=2,OR,D=1,OENA,SELE,MGC=4> ; 5104
3474 004225' 431020 005340
3475 004226' 510551 070040 MWORD <CJP,J=5107,CENA,CCGC,D=1,SELE,MGC=40> ; 5105
3476 004227' 001400 015060
3477 004230' 510651 050000 MWORD <JMAP,J=5105,D=1> ; 5106
3478 004231' 001000 000040
3479 004232' 510700 000200 MWORD <CONT,S0A,A=1,OR,D=1,SELE,MGC=200> ; 5107
3480 004233' 431010 005340
3481 004234' 511051 100000 MWORD <JMAP,J=5110,D=1> ; 5110
3482 004235' 001000 000040
3483
3484 ; Subroutine - Failed - Write 1 to bit 13 of CSR register
3485
3486 004236' 520000 000000 MWORD <ADDR=5200,CONT,SD0,AND,B=2,D=2> ; 5200
3487 004237' 742001 000340
3488 004240' 520100 000000 MWORD <CONT,S0B,PLUS,B=2,D=2,CRY> ; 5201
3489 004241' 302001 000740
3490 004242' 520200 250000 MWORD <LDCT,J=25> ; 5202
3491 004243' 000000 000300
3492 004244' 520352 030000 MWORD <RPCT,J=5203,SAB,PLUS,A=2,B=2,D=2> ; 5203
3493 004245' 102021 000220
3494 004246' 520400 002004 MWORD <CONT,S0A,A=2,OR,D=1,OENA,SELE,MGC=4> ; 5204
3495 004247' 431020 005340
3496 004250' 520552 070040 MWORD <CJP,J=5207,CENA,CCGC,D=1,SELE,MGC=40> ; 5205
3497 004251' 001400 015060
3498 004252' 520652 050000 MWORD <JMAP,J=5205,D=1> ; 5206
3499 004253' 001000 000040
3500 004254' 520700 000200 MWORD <CONT,S0A,A=1,OR,D=1,SELE,MGC=200> ; 5207
3501 004255' 431010 005340
3502 004256' 521052 100000 MWORD <JMAP,J=5210,D=1> ; 5210
3503 004257' 001000 000040
3504 004260' 777777 777777 -1
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 53
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1460
3505
3506 ;#********************************************************************
3507 ;* TEST 23 - CCXmtrAttn Test
3508 ;
3509 ; Description: Verify that condition code 'CCXmtrAttn' can be
3510 ; tested by the microsequencer for conditional
3511 ; branching.
3512 ;
3513 ; Procedure: Port Clear
3514 ; Start up port
3515 ; UC> perform an operation and then verify that
3516 ; CCXmtrAttn is not asserted
3517 ; UC> if passed - set bit 12 (DISABLE Complete)
3518 ; UC> if failed - set bit 13 (ENABLE Complete)
3519 ; Read CSR and determine test disposition
3520 ;
3521 ; Repeat with several test cases:
3522 ; CC is cleared initially (after resetting the
3523 ; bit in case the PB module is connected)
3524 ; CC is cleared after a CLRCCCODE command
3525 ;
3526 ; Failure: ---
3527 ;#********************************************************************
3528
3529 ; Test data
3530
3531 004261' 254 00 0 00 004273' TSTU23: JRST TG23 ; go start test
3532 004262' 200403 000023 MPROC!NDMP!ZMPROC!23 ; test mask
3533 004263' 004335' 012204' T23M,,[ASCIZ ^CCXmtrAttn Test^]
3534 004264' 012145' 012014' [EXP M6,MLAST!C13],,[EXP MLAST!M7]
3535 004265' 000000 004452' TSTU24 ; failure test table
3536 004266' 000000 004645' TSTU25 ; ...
3537 004267' 000000 005035' TSTU26
3538 004270' 000000 005216' TSTU27
3539 004271' 000000 005512' TSTU30
3540 004272' 777777 777777 -1
3541
3542 ; Start test
3543
3544 004273' 201 00 0 00 000000' TG23: MOVEI Z8 ; get address of module start
3545 004274' 260 17 0 00 004103* GO TRACE ; handle trace output
3546 004275' 201 01 0 00 004335' MOVEI 1,T23M ; set up microcode address
3547 004276' 260 17 0 00 004105* GO TLOAD ; load/verify it
3548 004277' 263 17 0 00 000000 RTN ; failed - exit test
3549
3550 ; Initialization
3551
3552 004300' 400 15 0 00 000000 TL23: SETZ ERFLG, ; clear error flag
3553 004301' 201 06 0 00 004316' MOVEI 6,TS23 ; get test table address
3554 004302' 402 00 0 00 004137* SETZM TSTSUB ; initialize subtest number
3555 004303' 476 00 0 00 004112* SETOM TADDR ; clear start address
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 54
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1461
3556
3557 ; Loop on test execute table entries
3558
3559 004304' 260 17 0 00 004113* TA23: GO IPACLR ; clear port
3560 004305' 260 17 0 00 004114* TB23: GO TEXEC ; execute table entry
3561 004306' 254 00 0 00 004315' JRST TX23 ; end of sstep table
3562 004307' 254 00 0 00 004305' JRST TB23 ; keep looping after call
3563 004310' 474 15 0 00 000000 SETO ERFLG, ; error occurred
3564
3565 ; Handle error printouts and scope looping
3566
3567 004311' 027 00 0 00 004325' SCOPER MA23 ; print error message
3568 004312' 254 00 0 00 004300' JRST TL23 ; loop on error
3569 004313' 254 00 0 00 004315' JRST TX23 ; altmode exit
3570 004314' 322 15 0 00 004304' JUMPE ERFLG,TA23 ; do next sstep table entry
3571
3572 ; End of test
3573
3574 004315' 263 17 0 00 000000 TX23: RTN ; return
3575
3576 ; Test Execute Table, as: (CMD,parameters)
3577
3578 ; CC is cleared initially
3579
3580 004316' 040000 000030 TS23: TTABLE (TSTART,30) ; start up port
3581 004317' 240002 000000 TTABLE (TCHECK,2) ; check if completed
3582 004320' 340000 000000 TTABLE (TEXIT) ; exit if error yet
3583
3584 ; CC is cleared after a CLRCCCODE command
3585
3586 004321' 040000 000010 TTABLE (TSTART,10) ; start up port
3587 004322' 240002 000000 TTABLE (TCHECK,2) ; check if completed
3588 004323' 340000 000000 TTABLE (TEXIT) ; exit if error yet
3589 004324' 000000 000000 TTABLE (TLAST)
3590
3591 ; Error messages
3592
3593 004325' 140000 012210' MA23: MSG!TXNOT![ASCIZ /Condition Code 'CC Xmtr Attn' not /]
3594 004326' 240000 004330' CALL!TXNOT!MA23LP ; print subtest description
3595 004327' 000000000000# LAST!CALL!TXALL!TTPNT ; print test data
3596
3597 004330' 200 01 0 00 004302* MA23LP: MOVE 1,TSTSUB ; get subtest number
3598 004331' 256 00 0 01 004332' XCT MA23L-1(1) ; print message
3599 004332' 263 17 0 00 000000 RTN ; return
3600
3601 004333' 037 00 0 00 011656' MA23L: TMSG <cleared initially>
3602 004334' 037 00 0 00 012161' TMSG <cleared after a CLRCCCODE command>
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 55
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1462
3603
3604 ; Microcode:
3605
3606 ; CC is cleared initially
3607
3608 004335' 003000 000000 T23M: MWORD <ADDR=30,JZ> ; 30
3609 004336' 000000 000000
3610 004337' 000000 400000 MWORD <ADDR=0,CJS,J=40> ; 0
3611 004340' 000000 000020
3612 004341' 000100 000050 MWORD <CONT,D=1,SELP,MGC=50> ; 1
3613 004342' 001000 001340
3614 004343' 000200 000000 MWORD <CONT,D=1> ; 2
3615 004344' 001000 000340
3616 004345' 000300 000000 MWORD <CONT,D=1> ; 3
3617 004346' 001000 000340
3618 004347' 000400 000000 MWORD <CONT,D=1> ; 4
3619 004350' 001000 000340
3620 004351' 000552 000000 MWORD <CJP,J=5200,CENA,CCXA> ; 5
3621 004352' 000400 070060
3622 004353' 000651 000000 MWORD <JMAP,J=5100> ; 6
3623 004354' 000000 000040
3624
3625 ; CC is cleared after a CLRCCCODE command
3626
3627 004355' 001000 110000 MWORD <ADDR=10,JMAP,J=11> ; 10
3628 004356' 000000 000040
3629 004357' 001100 400000 MWORD <CJS,J=40> ; 11
3630 004360' 000000 000020
3631 004361' 001200 000020 MWORD <CONT,SELM,MGC=20> ; 12
3632 004362' 000000 002340
3633 004363' 001300 000000 MWORD <CONT,D=1> ; 13
3634 004364' 001000 000340
3635 004365' 001452 000000 MWORD <CJP,J=5200,CENA,CCAF> ; 14
3636 004366' 000400 050060
3637 004367' 001551 000000 MWORD <JMAP,J=5100> ; 15
3638 004370' 000000 000040
3639
3640 ; Subroutine - Determine if a PILA module is connected - if not exit test
3641
3642 004371' 004000 420000 MWORD <ADDR=40,CJP,J=42,CENA,CCAF> ; 40
3643 004372' 000400 050060
3644 004373' 004100 000000 MWORD <CRTN> ; 41
3645 004374' 000000 000240
3646 004375' 004200 440000 MWORD <CJP,J=44,CENA,CCAF> ; 42
3647 004376' 000400 050060
3648 004377' 004300 000000 MWORD <CRTN> ; 43
3649 004400' 000000 000240
3650 004401' 004451 000000 MWORD <CJP,J=5100,CENA,CCAF> ; 44
3651 004402' 000400 050060
3652 004403' 004500 000000 MWORD <CRTN> ; 45
3653 004404' 000000 000240
3654
3655 ; Subroutine - Passed - Write 1 to bit 12 of CSR register
3656
3657 004405' 510000 000000 MWORD <ADDR=5100,CONT,SD0,AND,B=2,D=2> ; 5100
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 55-1
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1463
3658 004406' 742001 000340
3659 004407' 510100 000000 MWORD <CONT,S0B,PLUS,B=2,D=2,CRY> ; 5101
3660 004410' 302001 000740
3661 004411' 510200 260000 MWORD <LDCT,J=26> ; 5102
3662 004412' 000000 000300
3663 004413' 510351 030000 MWORD <RPCT,J=5103,SAB,PLUS,A=2,B=2,D=2> ; 5103
3664 004414' 102021 000220
3665 004415' 510400 002004 MWORD <CONT,S0A,A=2,OR,D=1,OENA,SELE,MGC=4> ; 5104
3666 004416' 431020 005340
3667 004417' 510551 070040 MWORD <CJP,J=5107,CENA,CCGC,D=1,SELE,MGC=40> ; 5105
3668 004420' 001400 015060
3669 004421' 510651 050000 MWORD <JMAP,J=5105,D=1> ; 5106
3670 004422' 001000 000040
3671 004423' 510700 000200 MWORD <CONT,S0A,A=1,OR,D=1,SELE,MGC=200> ; 5107
3672 004424' 431010 005340
3673 004425' 511051 100000 MWORD <JMAP,J=5110,D=1> ; 5110
3674 004426' 001000 000040
3675
3676 ; Subroutine - Failed - Write 1 to bit 13 of CSR register
3677
3678 004427' 520000 000000 MWORD <ADDR=5200,CONT,SD0,AND,B=2,D=2> ; 5200
3679 004430' 742001 000340
3680 004431' 520100 000000 MWORD <CONT,S0B,PLUS,B=2,D=2,CRY> ; 5201
3681 004432' 302001 000740
3682 004433' 520200 250000 MWORD <LDCT,J=25> ; 5202
3683 004434' 000000 000300
3684 004435' 520352 030000 MWORD <RPCT,J=5203,SAB,PLUS,A=2,B=2,D=2> ; 5203
3685 004436' 102021 000220
3686 004437' 520400 002004 MWORD <CONT,S0A,A=2,OR,D=1,OENA,SELE,MGC=4> ; 5204
3687 004440' 431020 005340
3688 004441' 520552 070040 MWORD <CJP,J=5207,CENA,CCGC,D=1,SELE,MGC=40> ; 5205
3689 004442' 001400 015060
3690 004443' 520652 050000 MWORD <JMAP,J=5205,D=1> ; 5206
3691 004444' 001000 000040
3692 004445' 520700 000200 MWORD <CONT,S0A,A=1,OR,D=1,SELE,MGC=200> ; 5207
3693 004446' 431010 005340
3694 004447' 521052 100000 MWORD <JMAP,J=5210,D=1> ; 5210
3695 004450' 001000 000040
3696 004451' 777777 777777 -1
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 56
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1464
3697
3698 ;#********************************************************************
3699 ;* TEST 24 - CCEbusRqst Test
3700 ;
3701 ; Description: Verify that condition code 'CCEbusRqst' can be
3702 ; tested by the microsequencer for conditional
3703 ; branching, and that the condition code can be set
3704 ; and reset by the hardware conditions which should
3705 ; do so.
3706 ;
3707 ; Procedure: Port Clear
3708 ; Start up port
3709 ; UC> perform an operation and then verify that
3710 ; CCEbusRqst is not asserted or asserted
3711 ; UC> if passed - set bit 12 (DISABLE Complete)
3712 ; UC> if failed - set bit 13 (ENABLE Complete)
3713 ; Read CSR and determine test disposition
3714 ;
3715 ; Repeat with several test cases:
3716 ; CC is cleared initially
3717 ; CC sets when KL tries to to a DATAI
3718 ; CC sets when KL tries to to a DATAO
3719 ; CC clears after KL's DATAI times out
3720 ; CC clears after KL's DATAO times out
3721 ;
3722 ; Failure: ---
3723 ;#********************************************************************
3724
3725 ; Test data
3726
3727 004452' 254 00 0 00 004464' TSTU24: JRST TG24 ; go start test
3728 004453' 200403 000024 MPROC!NDMP!ZMPROC!24 ; test mask
3729 004454' 004552' 012217' T24M,,[ASCIZ ^CCEbusRqst Test^]
3730 004455' 012223' 012225' [EXP M6,MLAST!E2],,[EXP M7,E1,MLAST!E17]
3731 004456' 000000 004645' TSTU25 ; failure test table
3732 004457' 000000 005035' TSTU26 ; ...
3733 004460' 000000 005216' TSTU27
3734 004461' 000000 005512' TSTU30
3735 004462' 000000 005747' TSTU31
3736 004463' 777777 777777 -1
3737
3738 ; Start test
3739
3740 004464' 201 00 0 00 000000' TG24: MOVEI Z8 ; get address of module start
3741 004465' 260 17 0 00 004274* GO TRACE ; handle trace output
3742 004466' 201 01 0 00 004552' MOVEI 1,T24M ; set up microcode address
3743 004467' 260 17 0 00 004276* GO TLOAD ; load/verify it
3744 004470' 263 17 0 00 000000 RTN ; failed - exit test
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 57
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1465
3745
3746 ; Initialization
3747
3748 004471' 400 15 0 00 000000 TL24: SETZ ERFLG, ; clear error flag
3749 004472' 201 06 0 00 004507' MOVEI 6,TS24 ; get test table address
3750 004473' 402 00 0 00 004330* SETZM TSTSUB ; initialize subtest number
3751 004474' 476 00 0 00 004303* SETOM TADDR ; clear start address
3752
3753 ; Loop on test execute table entries
3754
3755 004475' 260 17 0 00 004304* TA24: GO IPACLR ; clear port
3756 004476' 260 17 0 00 004305* TB24: GO TEXEC ; execute table entry
3757 004477' 254 00 0 00 004506' JRST TX24 ; end of sstep table
3758 004500' 254 00 0 00 004476' JRST TB24 ; keep looping after call
3759 004501' 474 15 0 00 000000 SETO ERFLG, ; error occurred
3760
3761 ; Handle error printouts and scope looping
3762
3763 004502' 027 00 0 00 004537' SCOPER MA24 ; print error message
3764 004503' 254 00 0 00 004471' JRST TL24 ; loop on error
3765 004504' 254 00 0 00 004506' JRST TX24 ; altmode exit
3766 004505' 322 15 0 00 004475' JUMPE ERFLG,TA24 ; do next sstep table entry
3767
3768 ; End of test
3769
3770 004506' 263 17 0 00 000000 TX24: RTN ; return
3771
3772 ; Test Execute Table, as: (CMD,parameters)
3773
3774 ; CC is cleared initially
3775
3776 004507' 040000 000000 TS24: TTABLE (TSTART,0) ; start up port
3777 004510' 240002 000000 TTABLE (TCHECK,2) ; check if completed
3778 004511' 340000 000000 TTABLE (TEXIT) ; exit if error yet
3779
3780 ; CC sets when KL tries to to a DATAI
3781
3782 004512' 040000 000003 TTABLE (TSTART,3) ; start up port
3783 004513' 140000 004533' TTABLE (TCALL,TS24DI) ; do a DATAI
3784 004514' 240002 000000 TTABLE (TCHECK,2) ; check if completed
3785 004515' 340000 000000 TTABLE (TEXIT) ; exit if error yet
3786
3787 ; CC sets when KL tries to to a DATAO
3788
3789 004516' 040000 000003 TTABLE (TSTART,3) ; start up port
3790 004517' 140000 004535' TTABLE (TCALL,TS24DO) ; do a DATAO
3791 004520' 240002 000000 TTABLE (TCHECK,2) ; check if completed
3792 004521' 340000 000000 TTABLE (TEXIT) ; exit if error yet
3793
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 58
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1466
3794
3795 ; CC clears after KL's DATAI times out
3796
3797 004522' 040000 000006 TTABLE (TSTART,6) ; start up port
3798 004523' 140000 004533' TTABLE (TCALL,TS24DI) ; do a DATAI
3799 004524' 240002 000000 TTABLE (TCHECK,2) ; check if completed
3800 004525' 340000 000000 TTABLE (TEXIT) ; exit if error yet
3801
3802 ; CC clears after KL's DATAO times out
3803
3804 004526' 040000 000006 TTABLE (TSTART,6) ; start up port
3805 004527' 140000 004535' TTABLE (TCALL,TS24DO) ; do a DATAO
3806 004530' 240002 000000 TTABLE (TCHECK,2) ; check if completed
3807 004531' 340000 000000 TTABLE (TEXIT) ; exit if error yet
3808 004532' 000000 000000 TTABLE (TLAST)
3809
3810 ; Routines to do a DATAI/O
3811
3812 004533' 260 17 0 00 002313* TS24DI: GO RDLAR ; read LAR
3813 004534' 263 17 0 00 000000 RTN ; return
3814
3815 004535' 260 17 0 00 002316* TS24DO: GO LDRAR ; load RAR
3816 004536' 263 17 0 00 000000 RTN ; return
3817
3818 ; Error messages
3819
3820 004537' 140000 012230' MA24: MSG!TXNOT![ASCIZ /Condition Code 'CC EBUS Rqst' not /]
3821 004540' 240000 004542' CALL!TXNOT!MA24LP ; print subtest description
3822 004541' 000000000000# LAST!CALL!TXALL!TTPNT ; print test data
3823
3824 004542' 200 01 0 00 004473* MA24LP: MOVE 1,TSTSUB ; get subtest number
3825 004543' 256 00 0 01 004544' XCT MA24L-1(1) ; print message
3826 004544' 263 17 0 00 000000 RTN ; return
3827
3828 004545' 037 00 0 00 011656' MA24L: TMSG <cleared initially>
3829 004546' 037 00 0 00 012237' TMSG <set when KL tries to to a DATAI>
3830 004547' 037 00 0 00 012246' TMSG <set when KL tries to to a DATAO>
3831 004550' 037 00 0 00 012255' TMSG <cleared after KL's DATAI times out>
3832 004551' 037 00 0 00 012264' TMSG <cleared after KL's DATAO times out>
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 59
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1467
3833
3834 ; Microcode:
3835
3836 ; CC is cleared initially
3837
3838 004552' 000000 010000 T24M: MWORD <ADDR=0,JMAP,J=1> ; 0
3839 004553' 000000 000040
3840 004554' 000152 000000 MWORD <CJP,J=5200,CENA,CCER> ; 1
3841 004555' 000400 100060
3842 004556' 000251 000000 MWORD <JMAP,J=5100> ; 2
3843 004557' 000000 000040
3844
3845 ; CC sets when KL tries to to a DATAI/DATAO
3846
3847 004560' 000300 040000 MWORD <ADDR=3,JMAP,J=4> ; 3
3848 004561' 000000 000040
3849 004562' 000451 000000 MWORD <CJP,J=5100,CENA,CCER> ; 4
3850 004563' 000400 100060
3851 004564' 000500 040000 MWORD <JMAP,J=4> ; 5
3852 004565' 000000 000040
3853
3854 ; CC clears after KL's DATAI/DATAO times out
3855
3856 004566' 000600 070000 MWORD <ADDR=6,JMAP,J=7> ; 6
3857 004567' 000000 000040
3858 004570' 000700 110000 MWORD <CJP,J=11,CENA,CCER> ; 7
3859 004571' 000400 100060
3860 004572' 001000 070000 MWORD <JMAP,J=7> ; 10
3861 004573' 000000 000040
3862 004574' 001100 110000 MWORD <CJP,J=11,CENA,CCER> ; 11
3863 004575' 000400 100060
3864 004576' 001251 000000 MWORD <JMAP,J=5100> ; 12
3865 004577' 000000 000040
3866
3867 ; Subroutine - Passed - Write 1 to bit 12 of CSR register
3868
3869 004600' 510000 000000 MWORD <ADDR=5100,CONT,SD0,AND,B=2,D=2> ; 5100
3870 004601' 742001 000340
3871 004602' 510100 000000 MWORD <CONT,S0B,PLUS,B=2,D=2,CRY> ; 5101
3872 004603' 302001 000740
3873 004604' 510200 260000 MWORD <LDCT,J=26> ; 5102
3874 004605' 000000 000300
3875 004606' 510351 030000 MWORD <RPCT,J=5103,SAB,PLUS,A=2,B=2,D=2> ; 5103
3876 004607' 102021 000220
3877 004610' 510400 002004 MWORD <CONT,S0A,A=2,OR,D=1,OENA,SELE,MGC=4> ; 5104
3878 004611' 431020 005340
3879 004612' 510551 070040 MWORD <CJP,J=5107,CENA,CCGC,D=1,SELE,MGC=40> ; 5105
3880 004613' 001400 015060
3881 004614' 510651 050000 MWORD <JMAP,J=5105,D=1> ; 5106
3882 004615' 001000 000040
3883 004616' 510700 000200 MWORD <CONT,S0A,A=1,OR,D=1,SELE,MGC=200> ; 5107
3884 004617' 431010 005340
3885 004620' 511051 100000 MWORD <JMAP,J=5110,D=1> ; 5110
3886 004621' 001000 000040
3887
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 59-1
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1468
3888 ; Subroutine - Failed - Write 1 to bit 13 of CSR register
3889
3890 004622' 520000 000000 MWORD <ADDR=5200,CONT,SD0,AND,B=2,D=2> ; 5200
3891 004623' 742001 000340
3892 004624' 520100 000000 MWORD <CONT,S0B,PLUS,B=2,D=2,CRY> ; 5201
3893 004625' 302001 000740
3894 004626' 520200 250000 MWORD <LDCT,J=25> ; 5202
3895 004627' 000000 000300
3896 004630' 520352 030000 MWORD <RPCT,J=5203,SAB,PLUS,A=2,B=2,D=2> ; 5203
3897 004631' 102021 000220
3898 004632' 520400 002004 MWORD <CONT,S0A,A=2,OR,D=1,OENA,SELE,MGC=4> ; 5204
3899 004633' 431020 005340
3900 004634' 520552 070040 MWORD <CJP,J=5207,CENA,CCGC,D=1,SELE,MGC=40> ; 5205
3901 004635' 001400 015060
3902 004636' 520652 050000 MWORD <JMAP,J=5205,D=1> ; 5206
3903 004637' 001000 000040
3904 004640' 520700 000200 MWORD <CONT,S0A,A=1,OR,D=1,SELE,MGC=200> ; 5207
3905 004641' 431010 005340
3906 004642' 521052 100000 MWORD <JMAP,J=5210,D=1> ; 5210
3907 004643' 001000 000040
3908 004644' 777777 777777 -1
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 60
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1469
3909
3910 ;#********************************************************************
3911 ;* TEST 25 - CCIntrActive Test
3912 ;
3913 ; Description: Verify that condition code 'CCIntrActive' can be
3914 ; tested by the microsequencer for conditional
3915 ; branching, and that the condition code can be set
3916 ; and reset by the hardware conditions which should
3917 ; do so.
3918 ;
3919 ; Procedure: Port Clear
3920 ; Start up port
3921 ; UC> perform an operation and then verify that
3922 ; CCIntrActive is not asserted or asserted
3923 ; UC> if passed - set bit 12 (DISABLE Complete)
3924 ; UC> if failed - set bit 13 (ENABLE Complete)
3925 ; Read CSR and determine test disposition
3926 ;
3927 ; Repeat with several test cases:
3928 ; CC is cleared initially
3929 ; CC sets when an interrupt is pending
3930 ; CC clears after an interrupt has been handled
3931 ;
3932 ; Failure: ---
3933 ;#********************************************************************
3934
3935 ; Test data
3936
3937 004645' 254 00 0 00 004657' TSTU25: JRST TG25 ; go start test
3938 004646' 200403 000025 MPROC!NDMP!ZMPROC!25 ; test mask
3939 004647' 004742' 012273' T25M,,[ASCIZ ^CCIntrActive Test^]
3940 004650' 012277' 012301' [EXP M6,MLAST!E14],,[EXP M7,E15,E7,MLAST!E6]
3941 004651' 000000 005035' TSTU26 ; failure test table
3942 004652' 000000 005216' TSTU27 ; ...
3943 004653' 000000 005512' TSTU30
3944 004654' 000000 005747' TSTU31
3945 004655' 000000 006307' TSTU32
3946 004656' 777777 777777 -1
3947
3948 ; Start test
3949
3950 004657' 201 00 0 00 000000' TG25: MOVEI Z8 ; get address of module start
3951 004660' 260 17 0 00 004465* GO TRACE ; handle trace output
3952 004661' 201 01 0 00 004742' MOVEI 1,T25M ; set up microcode address
3953 004662' 260 17 0 00 004467* GO TLOAD ; load/verify it
3954 004663' 263 17 0 00 000000 RTN ; failed - exit test
3955
3956 ; Initialization
3957
3958 004664' 400 15 0 00 000000 TL25: SETZ ERFLG, ; clear error flag
3959 004665' 201 06 0 00 004702' MOVEI 6,TS25 ; get test table address
3960 004666' 402 00 0 00 004542* SETZM TSTSUB ; initialize subtest number
3961 004667' 476 00 0 00 004474* SETOM TADDR ; clear start address
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 61
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1470
3962
3963 ; Loop on test execute table entries
3964
3965 004670' 260 17 0 00 004475* TA25: GO IPACLR ; clear port
3966 004671' 260 17 0 00 004476* TB25: GO TEXEC ; execute table entry
3967 004672' 254 00 0 00 004701' JRST TX25 ; end of sstep table
3968 004673' 254 00 0 00 004671' JRST TB25 ; keep looping after call
3969 004674' 474 15 0 00 000000 SETO ERFLG, ; error occurred
3970
3971 ; Handle error printouts and scope looping
3972
3973 004675' 027 00 0 00 004731' SCOPER MA25 ; print error message
3974 004676' 254 00 0 00 004664' JRST TL25 ; loop on error
3975 004677' 254 00 0 00 004701' JRST TX25 ; altmode exit
3976 004700' 322 15 0 00 004670' JUMPE ERFLG,TA25 ; do next sstep table entry
3977
3978 ; End of test
3979
3980 004701' 263 17 0 00 000000 TX25: RTN ; return
3981
3982 ; Test Execute Table, as: (CMD,parameters)
3983
3984 ; CC is cleared initially
3985
3986 004702' 040000 000000 TS25: TTABLE (TSTART,0) ; start up port
3987 004703' 240002 000000 TTABLE (TCHECK,2) ; check if completed
3988 004704' 340000 000000 TTABLE (TEXIT) ; exit if error yet
3989
3990 ; CC sets when an interrupt is pending
3991
3992 004705' 140000 004722' TTABLE (TCALL,TS25IA) ; initialize (to not handle interrupts)
3993 004706' 040000 000010 TTABLE (TSTART,10) ; start up port
3994 004707' 240002 000000 TTABLE (TCHECK,2) ; check if completed
3995 004710' 340000 000000 TTABLE (TEXIT) ; exit if error yet
3996 004711' 200000 004717' TTABLE (TCALLC,TS25EX) ; check if exit test
3997
3998 ; CC clears after an interrupt has been handled
3999
4000 004712' 140000 004725' TTABLE (TCALL,TS25IB) ; initialize (to handle interrupts)
4001 004713' 040000 000020 TTABLE (TSTART,20) ; start up port
4002 004714' 240010 000000 TTABLE (TCHECK,10) ; check if completed
4003 004715' 340000 000000 TTABLE (TEXIT) ; exit if error yet
4004 004716' 000000 000000 TTABLE (TLAST) ; end of list
4005
4006 ; Skip next test segment in user mode
4007
4008 004717' 336 00 0 00 030037 TS25EX: SKIPN USER ; user mode?
4009 004720' 350 00 0 17 000000 AOS (P) ; no - set up proper return
4010 004721' 263 17 0 00 000000 RTN ; return
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 62
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1471
4011
4012 ; Set up start addresses
4013
4014 004722' 201 00 0 00 000010 TS25IA: MOVEI 10 ; get initial start data
4015 004723' 202 00 0 00 001051* MOVEM SDATA ; save it
4016 004724' 263 17 0 00 000000 RTN
4017
4018 004725' 402 00 0 00 004723* TS25IB: SETZM SDATA ; set up initial start data
4019 004726' 260 17 0 00 000000* GO INITPI ; initialize PI system
4020 004727' 260 17 0 00 000000* GO SETVEC ; set up interrupt vectors ...
4021 004730' 263 17 0 00 000000 RTN
4022
4023 ; Error messages
4024
4025 004731' 140000 012305' MA25: MSG!TXNOT![ASCIZ /Condition Code 'CC Intr Active' not /]
4026 004732' 240000 004734' CALL!TXNOT!MA25LP ; print subtest description
4027 004733' 000000000000# LAST!CALL!TXALL!TTPNT ; print test data
4028
4029 004734' 200 01 0 00 004666* MA25LP: MOVE 1,TSTSUB ; get subtest number
4030 004735' 256 00 0 01 004736' XCT MA25L-1(1) ; print message
4031 004736' 263 17 0 00 000000 RTN ; return
4032
4033 004737' 037 00 0 00 011656' MA25L: TMSG <cleared initially>
4034 004740' 037 00 0 00 012315' TMSG <set when an interrupt is pending>
4035 TMSG <cleared after an interrupt has
4036 004741' 037 00 0 00 012324' been handled>
4037
4038 ; Microcode:
4039
4040 ; CC is cleared initially
4041
4042 004742' 000000 010000 T25M: MWORD <ADDR=0,JMAP,J=1,S0A,AND,D=2> ; 0
4043 004743' 442000 000040
4044 004744' 000152 000000 MWORD <CJP,J=5200,CENA,CCIA> ; 1
4045 004745' 000400 110060
4046 004746' 000251 000000 MWORD <JMAP,J=5100> ; 2
4047 004747' 000000 000040
4048
4049 ; CC sets when an interrupt is pending
4050
4051 004750' 001000 112004 MWORD <ADDR=10,JMAP,J=11,S0A,AND,D=2,OENA,SELE,MGC=4> ; 10
4052 004751' 442000 005040
4053 004752' 001100 000002 MWORD <CONT,SELE,MGC=2> ; 11
4054 004753' 000000 005340
4055 004754' 001251 000000 MWORD <CJP,J=5100,CENA,CCIA> ; 12
4056 004755' 000400 110060
4057 004756' 001352 000000 MWORD <JMAP,J=5200> ; 13
4058 004757' 000000 000040
4059
4060 ; CC clears after an interrupt has been handled
4061
4062 004760' 002000 212004 MWORD <ADDR=20,JMAP,J=21,S0A,AND,D=2,OENA,SELE,MGC=4> ; 20
4063 004761' 442000 005040
4064 004762' 002100 000002 MWORD <CONT,SELE,MGC=2> ; 21
4065 004763' 000000 005340
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 62-1
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1472
4066 004764' 002200 220000 MWORD <CJP,J=22,CENA,CCIA> ; 22
4067 004765' 000400 110060
4068 004766' 002351 000000 MWORD <JMAP,J=5100> ; 23
4069 004767' 000000 000040
4070
4071 ; Subroutine - Passed - Write 1 to bit 12 of CSR register
4072
4073 004770' 510000 000000 MWORD <ADDR=5100,CONT,SD0,AND,B=2,D=2> ; 5100
4074 004771' 742001 000340
4075 004772' 510100 000000 MWORD <CONT,S0B,PLUS,B=2,D=2,CRY> ; 5101
4076 004773' 302001 000740
4077 004774' 510200 260000 MWORD <LDCT,J=26> ; 5102
4078 004775' 000000 000300
4079 004776' 510351 030000 MWORD <RPCT,J=5103,SAB,PLUS,A=2,B=2,D=2> ; 5103
4080 004777' 102021 000220
4081 005000' 510400 002004 MWORD <CONT,S0A,A=2,OR,D=1,OENA,SELE,MGC=4> ; 5104
4082 005001' 431020 005340
4083 005002' 510551 070040 MWORD <CJP,J=5107,CENA,CCGC,D=1,SELE,MGC=40> ; 5105
4084 005003' 001400 015060
4085 005004' 510651 050000 MWORD <JMAP,J=5105,D=1> ; 5106
4086 005005' 001000 000040
4087 005006' 510700 000200 MWORD <CONT,S0A,A=1,OR,D=1,SELE,MGC=200> ; 5107
4088 005007' 431010 005340
4089 005010' 511051 100000 MWORD <JMAP,J=5110,D=1> ; 5110
4090 005011' 001000 000040
4091
4092 ; Subroutine - Failed - Write 1 to bit 13 of CSR register
4093
4094 005012' 520000 000000 MWORD <ADDR=5200,CONT,SD0,AND,B=2,D=2> ; 5200
4095 005013' 742001 000340
4096 005014' 520100 000000 MWORD <CONT,S0B,PLUS,B=2,D=2,CRY> ; 5201
4097 005015' 302001 000740
4098 005016' 520200 250000 MWORD <LDCT,J=25> ; 5202
4099 005017' 000000 000300
4100 005020' 520352 030000 MWORD <RPCT,J=5203,SAB,PLUS,A=2,B=2,D=2> ; 5203
4101 005021' 102021 000220
4102 005022' 520400 002004 MWORD <CONT,S0A,A=2,OR,D=1,OENA,SELE,MGC=4> ; 5204
4103 005023' 431020 005340
4104 005024' 520552 070040 MWORD <CJP,J=5207,CENA,CCGC,D=1,SELE,MGC=40> ; 5205
4105 005025' 001400 015060
4106 005026' 520652 050000 MWORD <JMAP,J=5205,D=1> ; 5206
4107 005027' 001000 000040
4108 005030' 520700 000200 MWORD <CONT,S0A,A=1,OR,D=1,SELE,MGC=200> ; 5207
4109 005031' 431010 005340
4110 005032' 521052 100000 MWORD <JMAP,J=5210,D=1> ; 5210
4111 005033' 001000 000040
4112 005034' 777777 777777 -1
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 63
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1473
4113
4114 ;#********************************************************************
4115 ;* TEST 26 - CCMBSign Test
4116 ;
4117 ; Description: Verify that condition code 'CCMBSign' can be
4118 ; tested by the microsequencer for conditional
4119 ; branching, and that the condition code can be set
4120 ; and reset by the hardware conditions which should
4121 ; do so.
4122 ;
4123 ; Procedure: Port Clear
4124 ; Start up port
4125 ; UC> perform an operation and then verify that
4126 ; CCMBSign is not asserted or asserted
4127 ; UC> if passed - set bit 12 (DISABLE Complete)
4128 ; UC> if failed - set bit 13 (ENABLE Complete)
4129 ; Read CSR and determine test disposition
4130 ;
4131 ; Repeat with several test cases:
4132 ; CC is cleared when ALU output is zero
4133 ; CC is set when ALU output is -1
4134 ; CC is cleared when ALU output is 377777,,-1
4135 ; CC is set when ALU output is 400000,,0
4136 ;
4137 ; Failure: ---
4138 ;#********************************************************************
4139
4140 ; Test data
4141
4142 005035' 254 00 0 00 005047' TSTU26: JRST TG26 ; go start test
4143 005036' 200403 000026 MPROC!NDMP!ZMPROC!26 ; test mask
4144 005037' 005121' 012336' T26M,,[ASCIZ ^CCMBSign Test^]
4145 005040' 012012' 012014' [EXP M6,MLAST!E23],,[EXP MLAST!M7]
4146 005041' 000000 005216' TSTU27 ; failure test table
4147 005042' 000000 005512' TSTU30 ; ...
4148 005043' 000000 005747' TSTU31
4149 005044' 000000 006307' TSTU32
4150 005045' 000000 006603' TSTU33
4151 005046' 777777 777777 -1
4152
4153 ; Start test
4154
4155 005047' 201 00 0 00 000000' TG26: MOVEI Z8 ; get address of module start
4156 005050' 260 17 0 00 004660* GO TRACE ; handle trace output
4157 005051' 201 01 0 00 005121' MOVEI 1,T26M ; set up microcode address
4158 005052' 260 17 0 00 004662* GO TLOAD ; load/verify it
4159 005053' 263 17 0 00 000000 RTN ; failed - exit test
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 64
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1474
4160
4161 ; Initialization
4162
4163 005054' 400 15 0 00 000000 TL26: SETZ ERFLG, ; clear error flag
4164 005055' 201 06 0 00 005072' MOVEI 6,TS26 ; get test table address
4165 005056' 402 00 0 00 004734* SETZM TSTSUB ; initialize subtest number
4166 005057' 476 00 0 00 004667* SETOM TADDR ; clear start address
4167
4168 ; Loop on test execute table entries
4169
4170 005060' 260 17 0 00 004670* TA26: GO IPACLR ; clear port
4171 005061' 260 17 0 00 004671* TB26: GO TEXEC ; execute table entry
4172 005062' 254 00 0 00 005071' JRST TX26 ; end of sstep table
4173 005063' 254 00 0 00 005061' JRST TB26 ; keep looping after call
4174 005064' 474 15 0 00 000000 SETO ERFLG, ; error occurred
4175
4176 ; Handle error printouts and scope looping
4177
4178 005065' 027 00 0 00 005107' SCOPER MA26 ; print error message
4179 005066' 254 00 0 00 005054' JRST TL26 ; loop on error
4180 005067' 254 00 0 00 005071' JRST TX26 ; altmode exit
4181 005070' 322 15 0 00 005060' JUMPE ERFLG,TA26 ; do next sstep table entry
4182
4183 ; End of test
4184
4185 005071' 263 17 0 00 000000 TX26: RTN ; return
4186
4187 ; Test Execute Table, as: (CMD,parameters)
4188
4189 ; CC is cleared when ALU output is zero
4190
4191 005072' 040000 000000 TS26: TTABLE (TSTART,0) ; start up port
4192 005073' 240002 000000 TTABLE (TCHECK,2) ; check if completed
4193 005074' 340000 000000 TTABLE (TEXIT) ; exit if error yet
4194
4195 ; CC is set when ALU output is -1
4196
4197 005075' 040000 000010 TTABLE (TSTART,10) ; start up port
4198 005076' 240002 000000 TTABLE (TCHECK,2) ; check if completed
4199 005077' 340000 000000 TTABLE (TEXIT) ; exit if error yet
4200
4201 ; CC is cleared when ALU output is 377777,,-1
4202
4203 005100' 040000 000020 TTABLE (TSTART,20) ; start up port
4204 005101' 240002 000000 TTABLE (TCHECK,2) ; check if completed
4205 005102' 340000 000000 TTABLE (TEXIT) ; exit if error yet
4206
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 65
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1475
4207
4208 ; CC is set when ALU output is 400000,,0
4209
4210 005103' 040000 000030 TTABLE (TSTART,30) ; start up port
4211 005104' 240002 000000 TTABLE (TCHECK,2) ; check if completed
4212 005105' 340000 000000 TTABLE (TEXIT) ; exit if error yet
4213 005106' 000000 000000 TTABLE (TLAST) ; end of list
4214
4215 ; Error messages
4216
4217 005107' 140000 012341' MA26: MSG!TXNOT![ASCIZ /Condition Code 'CC MB Sign' not /]
4218 005110' 240000 005112' CALL!TXNOT!MA26LP ; print subtest description
4219 005111' 000000000000# LAST!CALL!TXALL!TTPNT ; print test data
4220
4221 005112' 200 01 0 00 005056* MA26LP: MOVE 1,TSTSUB ; get subtest number
4222 005113' 256 00 0 01 005114' XCT MA26L-1(1) ; print message
4223 005114' 263 17 0 00 000000 RTN ; return
4224
4225 005115' 037 00 0 00 012350' MA26L: TMSG <cleared when ALU output is zero>
4226 005116' 037 00 0 00 012357' TMSG <set when ALU output is -1>
4227 005117' 037 00 0 00 012365' TMSG <cleared when ALU output is 377777,,-1>
4228 005120' 037 00 0 00 012375' TMSG <set when ALU output is 400000,,0>
4229
4230 ; Microcode:
4231
4232 ; CC is cleared when ALU output is zero
4233
4234 005121' 000000 010000 T26M: MWORD <ADDR=0,JMAP,J=1,S0A,AND,D=1> ; 0
4235 005122' 441000 000040
4236 005123' 000152 000000 MWORD <CJP,J=5200,S0A,AND,D=1,CENA,CCMB> ; 1
4237 005124' 441400 120060
4238 005125' 000251 000000 MWORD <JMAP,J=5100> ; 2
4239 005126' 000000 000040
4240
4241 ; CC is set when ALU output is -1
4242
4243 005127' 001000 110000 MWORD <ADDR=10,JMAP,J=11,S0A,AND,D=1> ; 10
4244 005130' 441000 000040
4245 005131' 001151 000000 MWORD <CJP,J=5100,SAB,XNOR,D=1,CENA,CCMB> ; 11
4246 005132' 171400 120060
4247 005133' 001252 000000 MWORD <JMAP,J=5200> ; 12
4248 005134' 000000 000040
4249
4250 ; CC is cleared when ALU output 377777,,-1
4251
4252 005135' 002000 210777 MWORD <ADDR=20,JMAP,J=21,SD0,OR,D=2,MGC=777,SKCN>
4253 005136' 732000 240040
4254 005137' 002152 000000 MWORD <CJP,J=5200,S0A,OR,D=1,CENA,CCMB> ; 21
4255 005140' 431400 120060
4256 005141' 002251 000000 MWORD <JMAP,J=5100> ; 22
4257 005142' 000000 000040
4258
4259 ; CC is set when ALU output 400000,,0
4260
4261 005143' 003000 311000 MWORD <ADDR=30,JMAP,J=31,SD0,OR,D=2,MGC=1000,SKCN>
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 65-1
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1476
4262 005144' 732000 240040
4263 005145' 003151 000000 MWORD <CJP,J=5100,S0A,OR,D=1,CENA,CCMB> ; 31
4264 005146' 431400 120060
4265 005147' 003252 000000 MWORD <JMAP,J=5200> ; 32
4266 005150' 000000 000040
4267
4268 ; Subroutine - Passed - Write 1 to bit 12 of CSR register
4269
4270 005151' 510000 000000 MWORD <ADDR=5100,CONT,SD0,AND,B=2,D=2> ; 5100
4271 005152' 742001 000340
4272 005153' 510100 000000 MWORD <CONT,S0B,PLUS,B=2,D=2,CRY> ; 5101
4273 005154' 302001 000740
4274 005155' 510200 260000 MWORD <LDCT,J=26> ; 5102
4275 005156' 000000 000300
4276 005157' 510351 030000 MWORD <RPCT,J=5103,SAB,PLUS,A=2,B=2,D=2> ; 5103
4277 005160' 102021 000220
4278 005161' 510400 002004 MWORD <CONT,S0A,A=2,OR,D=1,OENA,SELE,MGC=4> ; 5104
4279 005162' 431020 005340
4280 005163' 510551 070040 MWORD <CJP,J=5107,CENA,CCGC,D=1,SELE,MGC=40> ; 5105
4281 005164' 001400 015060
4282 005165' 510651 050000 MWORD <JMAP,J=5105,D=1> ; 5106
4283 005166' 001000 000040
4284 005167' 510700 000200 MWORD <CONT,S0A,A=1,OR,D=1,SELE,MGC=200> ; 5107
4285 005170' 431010 005340
4286 005171' 511051 100000 MWORD <JMAP,J=5110,D=1> ; 5110
4287 005172' 001000 000040
4288
4289 ; Subroutine - Failed - Write 1 to bit 13 of CSR register
4290
4291 005173' 520000 000000 MWORD <ADDR=5200,CONT,SD0,AND,B=2,D=2> ; 5200
4292 005174' 742001 000340
4293 005175' 520100 000000 MWORD <CONT,S0B,PLUS,B=2,D=2,CRY> ; 5201
4294 005176' 302001 000740
4295 005177' 520200 250000 MWORD <LDCT,J=25> ; 5202
4296 005200' 000000 000300
4297 005201' 520352 030000 MWORD <RPCT,J=5203,SAB,PLUS,A=2,B=2,D=2> ; 5203
4298 005202' 102021 000220
4299 005203' 520400 002004 MWORD <CONT,S0A,A=2,OR,D=1,OENA,SELE,MGC=4> ; 5204
4300 005204' 431020 005340
4301 005205' 520552 070040 MWORD <CJP,J=5207,CENA,CCGC,D=1,SELE,MGC=40> ; 5205
4302 005206' 001400 015060
4303 005207' 520652 050000 MWORD <JMAP,J=5205,D=1> ; 5206
4304 005210' 001000 000040
4305 005211' 520700 000200 MWORD <CONT,S0A,A=1,OR,D=1,SELE,MGC=200> ; 5207
4306 005212' 431010 005340
4307 005213' 521052 100000 MWORD <JMAP,J=5210,D=1> ; 5210
4308 005214' 001000 000040
4309 005215' 777777 777777 -1
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 66
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1477
4310
4311 ;#********************************************************************
4312 ;* TEST 27 - CCMVParChk Test
4313 ;
4314 ; Description: Verify that condition code 'CCMVParChk' can be
4315 ; tested by the microsequencer for conditional
4316 ; branching, and that the condition code can be set
4317 ; and reset by the hardware conditions which should
4318 ; do so.
4319 ;
4320 ; Procedure: Port Clear
4321 ; Start up port
4322 ; UC> perform an operation and then verify that
4323 ; CCMVParChk is not asserted or asserted
4324 ; UC> if passed - set bit 12 (DISABLE Complete)
4325 ; UC> if failed - set bit 13 (ENABLE Complete)
4326 ; Read CSR and determine test disposition
4327 ;
4328 ; Repeat with several test cases:
4329 ; CC is initially cleared
4330 ; CC is set after reading a word with parity bit
4331 ; set from the CBUS
4332 ; CC clears after reading a word with parity bit
4333 ; not set from the CBUS
4334 ; CC does not clear by setting 'MP Clr CC Code'
4335 ; CC clears by setting 'MP Clr Par Chk'
4336 ;
4337 ; Failure: ---
4338 ;#********************************************************************
4339
4340 ; Test data
4341
4342 005216' 254 00 0 00 005230' TSTU27: JRST TG27 ; go start test
4343 005217' 200403 000027 MPROC!NDMP!ZMPROC!27 ; test mask
4344 005220' 005333' 012404' T27M,,[ASCIZ ^CCMVParChk Test^]
4345 005221' 012410' 012412' [EXP M6,MLAST!C11],,[EXP M7,C16,MLAST!C8]
4346 005222' 000000000000# TSTC3 ; failure test table
4347 005223' 000000000000# TSTC4 ; ...
4348 005224' 000000 005512' TSTU30
4349 005225' 000000 006307' TSTU32
4350 005226' 000000 006603' TSTU33
4351 005227' 777777 777777 -1
4352
4353 ; Start test
4354
4355 005230' 201 00 0 00 000000' TG27: MOVEI Z8 ; get address of module start
4356 005231' 260 17 0 00 005050* GO TRACE ; handle trace output
4357 005232' 201 01 0 00 005333' MOVEI 1,T27M ; set up microcode address
4358 005233' 260 17 0 00 005052* GO TLOAD ; load/verify it
4359 005234' 263 17 0 00 000000 RTN ; failed - exit test
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 67
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1478
4360
4361 ; Initialization
4362
4363 005235' 400 15 0 00 000000 TL27: SETZ ERFLG, ; clear error flag
4364 005236' 260 17 0 00 005060* GO IPACLR ; clear the CSR register
4365 005237' 402 00 0 00 005112* SETZM TSTSUB ; initialize subtest number
4366 005240' 201 06 0 00 005261' MOVEI 6,TS27 ; get test table address
4367 005241' 476 00 0 00 005057* SETOM TADDR ; clear start address
4368 005242' 201 01 0 00 005000 MOVEI 1,5000 ; get start address
4369 005243' 242 01 0 00 000001 LSH 1,1 ; position correctly
4370 005244' 260 17 0 00 004535* GO LDRAR ; load the register
4371 005245' 201 01 0 00 000010 MOVEI 1,MPRUN ; get 'MPRUN' bit
4372 005246' 260 17 0 00 003572* GO LDCSR ; start up the port
4373
4374 ; Loop on test execute table entries
4375
4376 005247' 260 17 0 00 005236* TA27: GO IPACLR ; clear port
4377 005250' 260 17 0 00 005061* TB27: GO TEXEC ; execute table entry
4378 005251' 254 00 0 00 005260' JRST TX27 ; end of sstep table
4379 005252' 254 00 0 00 005250' JRST TB27 ; keep looping after call
4380 005253' 474 15 0 00 000000 SETO ERFLG, ; error occurred
4381
4382 ; Handle error printouts and scope looping
4383
4384 005254' 027 00 0 00 005320' SCOPER MA27 ; print error message
4385 005255' 254 00 0 00 005235' JRST TL27 ; loop on error
4386 005256' 254 00 0 00 005260' JRST TX27 ; altmode exit
4387 005257' 322 15 0 00 005250' JUMPE ERFLG,TB27 ; do next sstep table entry
4388
4389 ; End of test
4390
4391 005260' 263 17 0 00 000000 TX27: RTN ; return
4392
4393 ; Test Execute Table, as: (CMD,parameters)
4394
4395 ; CC is cleared initially
4396
4397 005261' 040000 000000 TS27: TTABLE (TSTART,0) ; start up port
4398 005262' 240010 000000 TTABLE (TCHECK,10) ; check if completed
4399 005263' 340000 000000 TTABLE (TEXIT) ; exit if error yet
4400
4401 ; CC is set after reading a word with parity bit
4402 ; set from the CBUS
4403
4404 005264' 140000 005305' TTABLE (TCALL,T27SR1) ; set up read of 1 word of 000..01
4405 005265' 040000 000010 TTABLE (TSTART,10) ; start up port
4406 005266' 240010 000000 TTABLE (TCHECK,10) ; check if completed
4407 005267' 340000 000000 TTABLE (TEXIT) ; exit if error yet
4408
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 68
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1479
4409
4410 ; CC clears after reading a word with parity bit
4411 ; not set from the CBUS
4412
4413 005270' 140000 005307' TTABLE (TCALL,T27SR2) ; set up read of 1 word of 000..00
4414 005271' 040000 000020 TTABLE (TSTART,20) ; start up port
4415 005272' 240010 000000 TTABLE (TCHECK,10) ; check if completed
4416 005273' 340000 000000 TTABLE (TEXIT) ; exit if error yet
4417
4418 ; CC does not clear by setting 'MP Clr CC Code'
4419
4420 005274' 140000 005305' TTABLE (TCALL,T27SR1) ; set up read of 1 word of 000..01
4421 005275' 040000 000030 TTABLE (TSTART,30) ; start up port
4422 005276' 240010 000000 TTABLE (TCHECK,10) ; check if completed
4423 005277' 340000 000000 TTABLE (TEXIT) ; exit if error yet
4424
4425 ; CC clears by setting 'MP Clr Par Chk'
4426
4427 005300' 140000 005305' TTABLE (TCALL,T27SR1) ; set up read of 1 word of 000..01
4428 005301' 040000 000040 TTABLE (TSTART,40) ; start up port
4429 005302' 240010 000000 TTABLE (TCHECK,10) ; check if completed
4430 005303' 340000 000000 TTABLE (TEXIT) ; exit if error yet
4431 005304' 000000 000000 TTABLE (TLAST) ; end of list
4432
4433 ; Set up data transfer
4434
4435 005305' 201 00 0 00 011111 T27SR1: MOVEI 11111 ; get word with odd parity
4436 005306' 334 00 0 00 000000 SKIPA
4437 005307' 201 00 0 00 002222 T27SR2: MOVEI 2222 ; get word with even parity
4438 005310' 202 00 0 00 002037* MOVEM BUFF ; save in buffer
4439 005311' 200 01 0 00 011645' MOVE 1,[CBUFSZ,,CBUF] ; get pointer to control buffer
4440 005312' 260 17 0 00 002036* GO CHINIT ; initialize software
4441 005313' 551 01 0 00 005310* HRRZI 1,BUFF ; buffer address
4442 005314' 201 02 0 00 000001 MOVEI 2,1 ; word count
4443 005315' 400 03 0 00 000000 SETZ 3, ; clear zero fill specifier
4444 005316' 260 17 0 00 002042* GO GENCCW ; generate a CCW list
4445 005317' 263 17 0 00 000000 RTN ; return
4446
4447 ; Error messages
4448
4449 005320' 140000 012415' MA27: MSG!TXNOT![ASCIZ /Condition Code 'CC MV Par Chk' not /]
4450 005321' 240000 005323' CALL!TXNOT!MA27LP ; print subtest description
4451 005322' 000000000000# LAST!CALL!TXALL!TTPNT ; print test data
4452
4453 005323' 200 01 0 00 005237* MA27LP: MOVE 1,TSTSUB ; get subtest number
4454 005324' 256 00 0 01 005325' XCT MA27L-1(1) ; print message
4455 005325' 263 17 0 00 000000 RTN ; return
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 69
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1480
4456
4457 005326' 037 00 0 00 012425' MA27L: TMSG <initially cleared>
4458 TMSG <set after reading a word with
4459 005327' 037 00 0 00 012431' parity bit set from the CBUS>
4460 TMSG <cleared after reading a word
4461 005330' 037 00 0 00 012446' with parity bit not set from the CBUS>
4462 TMSG <still set after setting
4463 005331' 037 00 0 00 012464' 'MP Clr CC Code'>
4464 TMSG <cleared by setting 'MP Clr
4465 005332' 037 00 0 00 012475' Par Chk'>
4466
4467 ; Microcode:
4468
4469 ; CC is cleared initially
4470
4471 005333' 000000 010000 T27M: MWORD <ADDR=0,JMAP,J=1> ; 0
4472 005334' 000000 000040
4473 005335' 000152 000000 MWORD <CJP,J=5200,CENA,CCMP> ; 1
4474 005336' 000400 130060
4475 005337' 000251 000000 MWORD <JMAP,J=5100> ; 2
4476 005340' 000000 000040
4477
4478 ; CC is set after reading a word with parity bit
4479 ; set from the CBUS
4480
4481 005341' 001000 110000 MWORD <ADDR=10,JMAP,J=11> ; 10
4482 005342' 000000 000040
4483 005343' 001120 000000 MWORD <CJS,J=2000> ; 11
4484 005344' 000000 000020
4485 005345' 001251 000000 MWORD <CJP,J=5100,CENA,CCMP> ; 12
4486 005346' 000400 130060
4487 005347' 001352 000000 MWORD <JMAP,J=5200> ; 13
4488 005350' 000000 000040
4489
4490 ; CC clears after reading a word with parity bit
4491 ; not set from the CBUS
4492
4493 005351' 002000 210000 MWORD <ADDR=20,JMAP,J=21> ; 20
4494 005352' 000000 000040
4495 005353' 002120 000000 MWORD <CJS,J=2000> ; 21
4496 005354' 000000 000020
4497 005355' 002252 000000 MWORD <CJP,J=5200,CENA,CCMP> ; 22
4498 005356' 000400 130060
4499 005357' 002351 000000 MWORD <JMAP,J=5100> ; 23
4500 005360' 000000 000040
4501
4502 ; CC does not clear by setting 'MP Clr CC Code'
4503
4504 005361' 003000 310000 MWORD <ADDR=30,JMAP,J=31> ; 30
4505 005362' 000000 000040
4506 005363' 003120 000000 MWORD <CJS,J=2000> ; 31
4507 005364' 000000 000020
4508 005365' 003200 000020 MWORD <CONT,SELM,MGC=20> ; 32
4509 005366' 000000 002340
4510 005367' 003351 000000 MWORD <CJP,J=5100,CENA,CCMP> ; 33
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 69-1
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1481
4511 005370' 000400 130060
4512 005371' 003452 000000 MWORD <JMAP,J=5200> ; 34
4513 005372' 000000 000040
4514
4515 ; CC clears by setting 'MP Clr Par Chk'
4516
4517 005373' 004000 410000 MWORD <ADDR=40,JMAP,J=41> ; 40
4518 005374' 000000 000040
4519 005375' 004120 000000 MWORD <CJS,J=2000> ; 41
4520 005376' 000000 000020
4521 005377' 004200 000010 MWORD <CONT,SELM,MGC=10> ; 42
4522 005400' 000000 002340
4523 005401' 004352 000000 MWORD <CJP,J=5200,CENA,CCMP> ; 43
4524 005402' 000400 130060
4525 005403' 004451 000000 MWORD <JMAP,J=5100> ; 44
4526 005404' 000000 000040
4527
4528 ; Initialization step
4529
4530 005405' 500050 010100 MWORD <ADDR=5000,JMAP,J=5001,SELC,MGC=100> ; 5000
4531 005406' 000000 004040
4532 005407' 500150 010020 MWORD <JMAP,J=5001,SELM,MGC=20> ; 5001
4533 005410' 000000 002040
4534 005411' 500250 020000 MWORD <JMAP,J=5002> ; 5002
4535 005412' 000000 000040
4536
4537 ; Subroutine to read a word over the CBUS
4538
4539 005413' 200020 010020 MWORD <ADDR=2000,JMAP,J=2001,SD0,AND,D=2,SELM,MGC=20>
4540 005414' 742000 002040
4541 005415' 200100 000100 MWORD <CONT,D=1,SELC,MGC=100> ; 2001 (stop CBUS)
4542 005416' 001000 004340
4543 005417' 200201 000000 MWORD <LDCT,J=100,D=1> ; 2002
4544 005420' 001000 000300
4545 005421' 200320 030000 MWORD <RPCT,J=2003,D=1> ; 2003
4546 005422' 001000 000220
4547 005423' 200400 000200 MWORD <CONT,D=1,SELC,MGC=200> ; 2004 (start CBUS)
4548 005424' 001000 004340
4549 005425' 200500 100000 MWORD <LDCT,J=10,D=1> ; 2005
4550 005426' 001000 000300
4551 005427' 200620 060000 MWORD <RPCT,J=2006,D=1> ; 2006
4552 005430' 001000 000220
4553 005431' 200720 110000 MWORD <CJP,J=2011,D=1,CENA,CCCA> ; 2007 (wait til avail)
4554 005432' 001400 000060
4555 005433' 201020 070000 MWORD <JMAP,J=2007,D=1> ; 2010
4556 005434' 001000 000040
4557 005435' 201100 000004 MWORD <CONT,D=1,SELC,MGC=4> ; 2011
4558 005436' 001000 004340
4559 005437' 201200 000200 MWORD <CONT,SD0,OR,D=2,SELM,MGC=200> ; 2012
4560 005440' 732000 002340
4561 005441' 201300 002004 MWORD <CONT,S0A,OR,D=1,OENA,SELE,MGC=4> ; 2013
4562 005442' 431000 005340
4563 005443' 201400 000140 MWORD <CRTN,SELC,MGC=140> ; 2014 (STOP,STORE)
4564 005444' 000000 004240
4565
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 69-2
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1482
4566 ; Subroutine - Passed - Write 1 to bit 12 of CSR register
4567
4568 005445' 510000 000000 MWORD <ADDR=5100,CONT,SD0,AND,B=2,D=2> ; 5100
4569 005446' 742001 000340
4570 005447' 510100 000000 MWORD <CONT,S0B,PLUS,B=2,D=2,CRY> ; 5101
4571 005450' 302001 000740
4572 005451' 510200 260000 MWORD <LDCT,J=26> ; 5102
4573 005452' 000000 000300
4574 005453' 510351 030000 MWORD <RPCT,J=5103,SAB,PLUS,A=2,B=2,D=2> ; 5103
4575 005454' 102021 000220
4576 005455' 510400 002004 MWORD <CONT,S0A,A=2,OR,D=1,OENA,SELE,MGC=4> ; 5104
4577 005456' 431020 005340
4578 005457' 510551 070040 MWORD <CJP,J=5107,CENA,CCGC,D=1,SELE,MGC=40> ; 5105
4579 005460' 001400 015060
4580 005461' 510651 050000 MWORD <JMAP,J=5105,D=1> ; 5106
4581 005462' 001000 000040
4582 005463' 510700 000200 MWORD <CONT,S0A,A=1,OR,D=1,SELE,MGC=200> ; 5107
4583 005464' 431010 005340
4584 005465' 511051 100000 MWORD <JMAP,J=5110,D=1> ; 5110
4585 005466' 001000 000040
4586
4587 ; Subroutine - Failed - Write 1 to bit 13 of CSR register
4588
4589 005467' 520000 000000 MWORD <ADDR=5200,CONT,SD0,AND,B=2,D=2> ; 5200
4590 005470' 742001 000340
4591 005471' 520100 000000 MWORD <CONT,S0B,PLUS,B=2,D=2,CRY> ; 5201
4592 005472' 302001 000740
4593 005473' 520200 250000 MWORD <LDCT,J=25> ; 5202
4594 005474' 000000 000300
4595 005475' 520352 030000 MWORD <RPCT,J=5203,SAB,PLUS,A=2,B=2,D=2> ; 5203
4596 005476' 102021 000220
4597 005477' 520400 002004 MWORD <CONT,S0A,A=2,OR,D=1,OENA,SELE,MGC=4> ; 5204
4598 005500' 431020 005340
4599 005501' 520552 070040 MWORD <CJP,J=5207,CENA,CCGC,D=1,SELE,MGC=40> ; 5205
4600 005502' 001400 015060
4601 005503' 520652 050000 MWORD <JMAP,J=5205,D=1> ; 5206
4602 005504' 001000 000040
4603 005505' 520700 000200 MWORD <CONT,S0A,A=1,OR,D=1,SELE,MGC=200> ; 5207
4604 005506' 431010 005340
4605 005507' 521052 100000 MWORD <JMAP,J=5210,D=1> ; 5210
4606 005510' 001000 000040
4607 005511' 777777 777777 -1
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 70
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1483
4608
4609 ;#********************************************************************
4610 ;* TEST 30 - CCCbusParErr Test
4611 ;
4612 ; Description: Verify that condition code 'CCCbusParErr' can be
4613 ; tested by the microsequencer for conditional
4614 ; branching, and that the condition code can be set
4615 ; and reset by the hardware conditions which should
4616 ; do so.
4617 ;
4618 ; Procedure: Port Clear
4619 ; Start up port
4620 ; UC> perform an operation and then verify that
4621 ; CCCbusParErr is not asserted or asserted
4622 ; UC> if passed - set bit 12 (DISABLE Complete)
4623 ; UC> if failed - set bit 13 (ENABLE Complete)
4624 ; Read CSR and determine test disposition
4625 ;
4626 ; Repeat with several test cases:
4627 ; CC is initially cleared
4628 ; CC is cleared after reading each word of a
4629 ; floating 1's and 0's pattern
4630 ; CC is cleared after a CLRCCCODE command
4631 ;
4632 ; Failure: ---
4633 ;#********************************************************************
4634
4635 ; Test data
4636
4637 005512' 254 00 0 00 005523' TSTU30: JRST TG30 ; go start test
4638 005513' 200403 000030 MPROC!NDMP!ZMPROC!30 ; test mask
4639 005514' 005640' 012505' T30M,,[ASCIZ ^CCCbusParErr Test^]
4640 005515' 012511' 012513' [EXP M6,MLAST!C9],,[EXP M7,C17,C12,MLAST!C7]
4641 005516' 000000000000# TSTC3 ; failure test table
4642 005517' 000000000000# TSTC4 ; ...
4643 005520' 000000 006307' TSTU32
4644 005521' 000000 006603' TSTU33
4645 005522' 777777 777777 -1
4646
4647 ; Start test
4648
4649 005523' 201 00 0 00 000000' TG30: MOVEI Z8 ; get address of module start
4650 005524' 260 17 0 00 005231* GO TRACE ; handle trace output
4651 005525' 201 01 0 00 005640' MOVEI 1,T30M ; set up microcode address
4652 005526' 260 17 0 00 005233* GO TLOAD ; load/verify it
4653 005527' 263 17 0 00 000000 RTN ; failed - exit test
4654
4655 ; Initialization
4656
4657 005530' 400 15 0 00 000000 TL30: SETZ ERFLG, ; clear error flag
4658 005531' 201 06 0 00 005546' MOVEI 6,TS30 ; get test table address
4659 005532' 402 00 0 00 005323* SETZM TSTSUB ; initialize subtest number
4660 005533' 476 00 0 00 005241* SETOM TADDR ; clear start address
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 71
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1484
4661
4662 ; Loop on test execute table entries
4663
4664 005534' 260 17 0 00 005247* TA30: GO IPACLR ; clear port
4665 005535' 260 17 0 00 005250* TB30: GO TEXEC ; execute table entry
4666 005536' 254 00 0 00 005545' JRST TX30 ; end of sstep table
4667 005537' 254 00 0 00 005535' JRST TB30 ; keep looping after call
4668 005540' 474 15 0 00 000000 SETO ERFLG, ; error occurred
4669
4670 ; Handle error printouts and scope looping
4671
4672 005541' 027 00 0 00 005600' SCOPER MA30 ; print error message
4673 005542' 254 00 0 00 005530' JRST TL30 ; loop on error
4674 005543' 254 00 0 00 005545' JRST TX30 ; altmode exit
4675 005544' 322 15 0 00 005534' JUMPE ERFLG,TA30 ; do next sstep table entry
4676
4677 ; End of test
4678
4679 005545' 263 17 0 00 000000 TX30: RTN ; return
4680
4681 ; Test Execute Table, as: (CMD,parameters)
4682
4683 ; CC is cleared initially
4684
4685 005546' 040000 000000 TS30: TTABLE (TSTART,0) ; start up port
4686 005547' 240010 000000 TTABLE (TCHECK,10) ; check if completed
4687 005550' 340000 000000 TTABLE (TEXIT) ; exit if error yet
4688
4689 ; CC is cleared after reading each word of a floating 1's and 0's pattern
4690
4691 005551' 140000 005560' TTABLE (TCALL,T30SRD) ; set up data transfer
4692 005552' 040000 000010 TTABLE (TSTART,10) ; start up port
4693 005553' 240010 000000 TTABLE (TCHECK,10) ; check if completed
4694 005554' 340000 000000 TTABLE (TEXIT) ; exit if error yet
4695
4696 ; CC is cleared after a CLRCCCODE command
4697
4698 005555' 040000 000030 TTABLE (TSTART,30) ; start up port
4699 005556' 240010 000000 TTABLE (TCHECK,10) ; check if completed
4700 005557' 000000 000000 TTABLE (TLAST) ; end of list
4701
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 72
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1485
4702
4703 ; Set up data transfer
4704
4705 005560' 201 01 0 00 000001 T30SRD: MOVEI 1,1 ; get initial floating 1
4706 005561' 400 02 0 00 000000 SETZ 2, ; get initial buffer offset
4707 005562' 200 00 0 00 000001 T30SR1: MOVE 1 ; get data pattern
4708 005563' 450 00 0 00 000000 SETCA ; complement it
4709 005564' 202 01 0 02 005313* MOVEM 1,BUFF(2) ; save floating 1
4710 005565' 202 00 0 02 000000# MOVEM BUFF+^D36(2) ; save floating 0
4711 005566' 350 00 0 00 000002 AOS 2 ; increment buffer offset
4712 005567' 242 01 0 00 000001 LSH 1,1 ; generate new pattern
4713 005570' 326 01 0 00 005562' JUMPN 1,T30SR1 ; loop till done
4714 005571' 200 01 0 00 011645' MOVE 1,[CBUFSZ,,CBUF] ; get pointer to control buffer
4715 005572' 260 17 0 00 005312* GO CHINIT ; initialize software
4716 005573' 551 01 0 00 005564* HRRZI 1,BUFF ; buffer address
4717 005574' 201 02 0 00 000110 MOVEI 2,^D72 ; word count
4718 005575' 400 03 0 00 000000 SETZ 3, ; clear zero fill specifier
4719 005576' 260 17 0 00 005316* GO GENCCW ; generate a CCW list
4720 005577' 263 17 0 00 000000 RTN ; return
4721
4722 ; Error messages
4723
4724 005600' 140000 012517' MA30: MSG!TXNOT![ASCIZ /Condition Code 'CC Cbus Par Err' not /]
4725 005601' 240000 005603' CALL!TXNOT!MA30LP ; print subtest description
4726 005602' 000000000000# LAST!CALL!TXALL!TTPNT ; print test data
4727
4728 005603' 200 01 0 00 005532* MA30LP: MOVE 1,TSTSUB ; get subtest number
4729 005604' 256 00 0 01 005605' XCT MA30L-1(1) ; print message
4730 005605' 263 17 0 00 000000 RTN ; return
4731
4732 005606' 037 00 0 00 012425' MA30L: TMSG <initially cleared>
4733 TMSG <cleared after reading each word
4734 005607' 037 00 0 00 012527' of a floating 1's and 0's pattern>
4735 005610' 037 00 0 00 012161' TMSG <cleared after a CLRCCCODE command>
4736
4737 005611' 260 17 0 00 000000* MA30PN: GO CHDATA ; check logout data for errors
4738 005612' 336 00 0 00 000001 SKIPN 1 ; any errors?
4739 005613' 263 17 0 00 000000 RTN ; no - return
4740 005614' 037 00 0 00 012545' TMSGC <Data transfer errors: >
4741 005615' 603 01 0 00 200000 TLNE 1,(MPER) ; mem parity error
4742 005616' 037 00 0 00 012553' TMSG <MPERR >
4743 005617' 603 01 0 00 100000 TLNE 1,(ADRPE) ; address parity error
4744 005620' 037 00 0 00 012555' TMSG <ADRPE >
4745 005621' 603 01 0 00 040000 TLNE 1,(NOTWC0) ; not word count zero
4746 005622' 037 00 0 00 012557' TMSG <NOTWC0 >
4747 005623' 603 01 0 00 020000 TLNE 1,(NEXM) ; non-existant memory
4748 005624' 037 00 0 00 012561' TMSG <NEXM >
4749 005625' 603 01 0 00 000400 TLNE 1,(LAXER) ; last xfer error
4750 005626' 037 00 0 00 012563' TMSG <LAXER >
4751 005627' 603 01 0 00 000200 TLNE 1,(IPAER) ; IPA20 error
4752 005630' 037 00 0 00 012565' TMSG <IPAER >
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 73
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1486
4753 005631' 603 01 0 00 000100 TLNE 1,(LGWC) ; long word count
4754 005632' 037 00 0 00 012567' TMSG <LGWC >
4755 005633' 603 01 0 00 000040 TLNE 1,(SHWC) ; short word count
4756 005634' 037 00 0 00 012571' TMSG <SHWC >
4757 005635' 603 01 0 00 000020 TLNE 1,(OVN) ; overrrun
4758 005636' 037 00 0 00 012573' TMSG <OVN >
4759 005637' 263 17 0 00 000000 RTN ; return
4760
4761 ; Microcode:
4762
4763 ; CC is cleared initially
4764
4765 005640' 000000 010000 T30M: MWORD <ADDR=0,JMAP,J=1> ; 0
4766 005641' 000000 000040
4767 005642' 000152 000000 MWORD <CJP,J=5200,CENA,CCCP> ; 1
4768 005643' 000400 140060
4769 005644' 000251 000000 MWORD <JMAP,J=5100> ; 2
4770 005645' 000000 000040
4771
4772 ; CC is cleared after reading each word of a
4773 ; floating 1's and 0's pattern
4774
4775 005646' 001000 110000 MWORD <ADDR=10,JMAP,J=11,SD0,AND,D=2> ; 10
4776 005647' 742000 000040
4777 005650' 001101 070200 MWORD <LDCT,J=107,D=1,SELC,MGC=200> ; 11 (start CBUS)
4778 005651' 001000 004300
4779 005652' 001200 140000 MWORD <CJP,J=14,D=1,CENA,CCCA> ; 12 (wait till avail)
4780 005653' 001400 000060
4781 005654' 001300 120000 MWORD <JMAP,J=12,D=1> ; 13
4782 005655' 001000 000040
4783 005656' 001400 210000 MWORD <CJP,J=21,CENA,CCCP> ; 14
4784 005657' 000400 140060
4785 005660' 001500 170000 MWORD <JMAP,J=17> ; 15
4786 005661' 000000 000040
4787 005662' 001600 120000 MWORD <RPCT,J=12> ; 16
4788 005663' 000000 000220
4789 005664' 001700 000140 MWORD <CONT,SELC,MGC=140> ; 17 (STOP,STORE)
4790 005665' 000000 004340
4791 005666' 002051 000000 MWORD <JMAP,J=5100> ; 20
4792 005667' 000000 000040
4793 005670' 002152 000140 MWORD <JMAP,J=5200,SELC,MGC=140> ; 21 (failed)
4794 005671' 000000 004040
4795
4796 ; CC is cleared after a CLRCCCODE command
4797
4798 005672' 003000 310000 MWORD <ADDR=30,JMAP,J=31> ; 30
4799 005673' 000000 000040
4800 005674' 003100 000020 MWORD <CONT,SELM,MGC=20> ; 31
4801 005675' 000000 002340
4802 005676' 003252 000000 MWORD <CJP,J=5200,CENA,CCCP> ; 32
4803 005677' 000400 140060
4804 005700' 003351 000000 MWORD <JMAP,J=5100> ; 33
4805 005701' 000000 000040
4806
4807 ; Subroutine - Passed - Write 1 to bit 12 of CSR register
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 73-1
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1487
4808
4809 005702' 510000 000000 MWORD <ADDR=5100,CONT,SD0,AND,B=2,D=2> ; 5100
4810 005703' 742001 000340
4811 005704' 510100 000000 MWORD <CONT,S0B,PLUS,B=2,D=2,CRY> ; 5101
4812 005705' 302001 000740
4813 005706' 510200 260000 MWORD <LDCT,J=26> ; 5102
4814 005707' 000000 000300
4815 005710' 510351 030000 MWORD <RPCT,J=5103,SAB,PLUS,A=2,B=2,D=2> ; 5103
4816 005711' 102021 000220
4817 005712' 510400 002004 MWORD <CONT,S0A,A=2,OR,D=1,OENA,SELE,MGC=4> ; 5104
4818 005713' 431020 005340
4819 005714' 510551 070040 MWORD <CJP,J=5107,CENA,CCGC,D=1,SELE,MGC=40> ; 5105
4820 005715' 001400 015060
4821 005716' 510651 050000 MWORD <JMAP,J=5105,D=1> ; 5106
4822 005717' 001000 000040
4823 005720' 510700 000200 MWORD <CONT,S0A,A=1,OR,D=1,SELE,MGC=200> ; 5107
4824 005721' 431010 005340
4825 005722' 511051 100000 MWORD <JMAP,J=5110,D=1> ; 5110
4826 005723' 001000 000040
4827
4828 ; Subroutine - Failed - Write 1 to bit 13 of CSR register
4829
4830 005724' 520000 000000 MWORD <ADDR=5200,CONT,SD0,AND,B=2,D=2> ; 5200
4831 005725' 742001 000340
4832 005726' 520100 000000 MWORD <CONT,S0B,PLUS,B=2,D=2,CRY> ; 5201
4833 005727' 302001 000740
4834 005730' 520200 250000 MWORD <LDCT,J=25> ; 5202
4835 005731' 000000 000300
4836 005732' 520352 030000 MWORD <RPCT,J=5203,SAB,PLUS,A=2,B=2,D=2> ; 5203
4837 005733' 102021 000220
4838 005734' 520400 002004 MWORD <CONT,S0A,A=2,OR,D=1,OENA,SELE,MGC=4> ; 5204
4839 005735' 431020 005340
4840 005736' 520552 070040 MWORD <CJP,J=5207,CENA,CCGC,D=1,SELE,MGC=40> ; 5205
4841 005737' 001400 015060
4842 005740' 520652 050000 MWORD <JMAP,J=5205,D=1> ; 5206
4843 005741' 001000 000040
4844 005742' 520700 000200 MWORD <CONT,S0A,A=1,OR,D=1,SELE,MGC=200> ; 5207
4845 005743' 431010 005340
4846 005744' 521052 100000 MWORD <JMAP,J=5210,D=1> ; 5210
4847 005745' 001000 000040
4848 005746' 777777 777777 -1
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 74
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1488
4849
4850 ;#********************************************************************
4851 ;* TEST 31 - CCPliParErr Test
4852 ;
4853 ; Description: Verify that condition code 'CCPliParErr' can be
4854 ; tested by the microsequencer for conditional
4855 ; branching, and that the condition code can be set
4856 ; and reset by the hardware conditions which should
4857 ; do so.
4858 ;
4859 ; Procedure: Port Clear
4860 ; Start up port
4861 ; UC> perform an operation and then verify that
4862 ; CCPliParErr is not asserted or asserted
4863 ; UC> if passed - set bit 12 (DISABLE Complete)
4864 ; UC> if failed - set bit 13 (ENABLE Complete)
4865 ; Read CSR and determine test disposition
4866 ;
4867 ; Repeat with several test cases:
4868 ; CC is initially cleared
4869 ; CC is cleared after passing floating 1's through
4870 ; PLI Input/Output buffers
4871 ; CC is set after passing floating 1's through
4872 ; PLI Input/Output buffers with 'MPTESTPLIPAR'
4873 ; asserted
4874 ; CC is cleared after a CLRCCCODE command
4875 ;
4876 ; Failure: ---
4877 ;#********************************************************************
4878
4879 ; Test data
4880
4881 005747' 254 00 0 00 005756' TSTU31: JRST TG31 ; go start test
4882 005750' 200403 000031 MPROC!NDMP!ZMPROC!31 ; test mask
4883 005751' 006140' 012574' T31M,,[ASCIZ ^CCPliParErr Test^]
4884 005752' 012600' 012602' [EXP M6,MLAST!C10],,[EXP M7,C21,MLAST!C8]
4885 005753' 000000 006307' TSTU32 ; failure test table
4886 005754' 000000 006603' TSTU33 ; ...
4887 005755' 777777 777777 -1
4888
4889 ; Start test
4890
4891 005756' 201 00 0 00 000000' TG31: MOVEI Z8 ; get address of module start
4892 005757' 260 17 0 00 005524* GO TRACE ; handle trace output
4893 005760' 201 01 0 00 006140' MOVEI 1,T31M ; set up microcode address
4894 005761' 260 17 0 00 005526* GO TLOAD ; load/verify it
4895 005762' 263 17 0 00 000000 RTN ; failed - exit test
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 75
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1489
4896
4897 ; Initialization
4898
4899 005763' 400 15 0 00 000000 TL31: SETZ ERFLG, ; clear error flag
4900 005764' 201 06 0 00 006001' MOVEI 6,TS31 ; get test table address
4901 005765' 402 00 0 00 005603* SETZM TSTSUB ; initialize subtest number
4902 005766' 476 00 0 00 005533* SETOM TADDR ; clear start address
4903
4904 ; Loop on test execute table entries
4905
4906 005767' 260 17 0 00 005534* TA31: GO IPACLR ; clear port
4907 005770' 260 17 0 00 005535* TB31: GO TEXEC ; execute table entry
4908 005771' 254 00 0 00 006000' JRST TX31 ; end of sstep table
4909 005772' 254 00 0 00 005770' JRST TB31 ; keep looping after call
4910 005773' 474 15 0 00 000000 SETO ERFLG, ; error occurred
4911
4912 ; Handle error printouts and scope looping
4913
4914 005774' 027 00 0 00 006070' SCOPER MA31 ; print error message
4915 005775' 254 00 0 00 005763' JRST TL31 ; loop on error
4916 005776' 254 00 0 00 006000' JRST TX31 ; altmode exit
4917 005777' 322 15 0 00 005767' JUMPE ERFLG,TA31 ; do next sstep table entry
4918
4919 ; End of test
4920
4921 006000' 263 17 0 00 000000 TX31: RTN ; return
4922
4923 ; Test Execute Table, as: (CMD,parameters)
4924
4925 ; CC is cleared initially
4926
4927 006001' 040000 000000 TS31: TTABLE (TSTART,0) ; start up port
4928 006002' 240002 000000 TTABLE (TCHECK,2) ; check if completed
4929 006003' 340000 000000 TTABLE (TEXIT) ; exit if error yet
4930
4931 ; CC is cleared after passing floating 1's through
4932 ; PLI Input/Output buffers
4933
4934 006004' 040000 000010 TTABLE (TSTART,10) ; start up port
4935 006005' 240002 000000 TTABLE (TCHECK,2) ; check if completed
4936 006006' 340000 000000 TTABLE (TEXIT) ; exit if error yet
4937 006007' 040000 000011 TTABLE (TSTART,11) ; start up port
4938 006010' 240002 000000 TTABLE (TCHECK,2) ; check if completed
4939 006011' 340000 000000 TTABLE (TEXIT) ; exit if error yet
4940 006012' 040000 000012 TTABLE (TSTART,12) ; start up port
4941 006013' 240002 000000 TTABLE (TCHECK,2) ; check if completed
4942 006014' 340000 000000 TTABLE (TEXIT) ; exit if error yet
4943 006015' 040000 000013 TTABLE (TSTART,13) ; start up port
4944 006016' 240002 000000 TTABLE (TCHECK,2) ; check if completed
4945 006017' 340000 000000 TTABLE (TEXIT) ; exit if error yet
4946 006020' 040000 000014 TTABLE (TSTART,14) ; start up port
4947 006021' 240002 000000 TTABLE (TCHECK,2) ; check if completed
4948 006022' 340000 000000 TTABLE (TEXIT) ; exit if error yet
4949
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 76
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1490
4950 006023' 040000 000015 TTABLE (TSTART,15) ; start up port
4951 006024' 240002 000000 TTABLE (TCHECK,2) ; check if completed
4952 006025' 340000 000000 TTABLE (TEXIT) ; exit if error yet
4953 006026' 040000 000016 TTABLE (TSTART,16) ; start up port
4954 006027' 240002 000000 TTABLE (TCHECK,2) ; check if completed
4955 006030' 340000 000000 TTABLE (TEXIT) ; exit if error yet
4956 006031' 040000 000017 TTABLE (TSTART,17) ; start up port
4957 006032' 240002 000000 TTABLE (TCHECK,2) ; check if completed
4958 006033' 340000 000000 TTABLE (TEXIT) ; exit if error yet
4959
4960 ; CC is set after passing floating 1's through
4961 ; PLI Input/Output buffers with 'MPTESTPLIPAR'
4962 ; asserted
4963
4964 006034' 040000 000030 TTABLE (TSTART,30) ; start up port
4965 006035' 240002 000000 TTABLE (TCHECK,2) ; check if completed
4966 006036' 340000 000000 TTABLE (TEXIT) ; exit if error yet
4967 006037' 040000 000031 TTABLE (TSTART,31) ; start up port
4968 006040' 240002 000000 TTABLE (TCHECK,2) ; check if completed
4969 006041' 340000 000000 TTABLE (TEXIT) ; exit if error yet
4970 006042' 040000 000032 TTABLE (TSTART,32) ; start up port
4971 006043' 240002 000000 TTABLE (TCHECK,2) ; check if completed
4972 006044' 340000 000000 TTABLE (TEXIT) ; exit if error yet
4973 006045' 040000 000033 TTABLE (TSTART,33) ; start up port
4974 006046' 240002 000000 TTABLE (TCHECK,2) ; check if completed
4975 006047' 340000 000000 TTABLE (TEXIT) ; exit if error yet
4976 006050' 040000 000034 TTABLE (TSTART,34) ; start up port
4977 006051' 240002 000000 TTABLE (TCHECK,2) ; check if completed
4978 006052' 340000 000000 TTABLE (TEXIT) ; exit if error yet
4979 006053' 040000 000035 TTABLE (TSTART,35) ; start up port
4980 006054' 240002 000000 TTABLE (TCHECK,2) ; check if completed
4981 006055' 340000 000000 TTABLE (TEXIT) ; exit if error yet
4982 006056' 040000 000036 TTABLE (TSTART,36) ; start up port
4983 006057' 240002 000000 TTABLE (TCHECK,2) ; check if completed
4984 006060' 340000 000000 TTABLE (TEXIT) ; exit if error yet
4985 006061' 040000 000037 TTABLE (TSTART,37) ; start up port
4986 006062' 240002 000000 TTABLE (TCHECK,2) ; check if completed
4987 006063' 340000 000000 TTABLE (TEXIT) ; exit if error yet
4988
4989 ; CC is cleared after a CLRCCCODE command
4990
4991 006064' 040000 000050 TTABLE (TSTART,50) ; start up port
4992 006065' 240002 000000 TTABLE (TCHECK,2) ; check if completed
4993 006066' 340000 000000 TTABLE (TEXIT) ; exit if error yet
4994 006067' 000000 000000 TTABLE (TLAST) ; end of list
4995
4996 ; Error messages
4997
4998 006070' 140000 012605' MA31: MSG!TXNOT![ASCIZ /Condition Code 'CC Pli Par Err' not /]
4999 006071' 240000 006073' CALL!TXNOT!MA31LP ; print subtest description
5000 006072' 000000000000# LAST!CALL!TXALL!TTPNT ; print test data
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 77
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1491
5001
5002 006073' 200 01 0 00 005765* MA31LP: MOVE 1,TSTSUB ; get subtest number
5003 006074' 256 00 0 01 006075' XCT MA31L-1(1) ; print message
5004 006075' 263 17 0 00 000000 RTN ; return
5005
5006 006076' 037 00 0 00 012425' MA31L: TMSG <initially cleared>
5007 006077' 260 17 0 00 006120' GO MA31L1 ; 1
5008 006100' 260 17 0 00 006120' GO MA31L1 ; 2
5009 006101' 260 17 0 00 006120' GO MA31L1 ; 4
5010 006102' 260 17 0 00 006120' GO MA31L1 ; 10
5011 006103' 260 17 0 00 006120' GO MA31L1 ; 20
5012 006104' 260 17 0 00 006120' GO MA31L1 ; 40
5013 006105' 260 17 0 00 006120' GO MA31L1 ; 100
5014 006106' 260 17 0 00 006120' GO MA31L1 ; 200
5015 006107' 260 17 0 00 006130' GO MA31L2 ; 1
5016 006110' 260 17 0 00 006130' GO MA31L2 ; 2
5017 006111' 260 17 0 00 006130' GO MA31L2 ; 4
5018 006112' 260 17 0 00 006130' GO MA31L2 ; 10
5019 006113' 260 17 0 00 006130' GO MA31L2 ; 20
5020 006114' 260 17 0 00 006130' GO MA31L2 ; 40
5021 006115' 260 17 0 00 006130' GO MA31L2 ; 100
5022 006116' 260 17 0 00 006130' GO MA31L2 ; 200
5023 006117' 037 00 0 00 012161' TMSG <cleared after a CLRCCCODE command>
5024
5025 006120' 037 00 0 00 012615' MA31L1: TMSG <cleared after passing >
5026 006121' 200 01 0 00 006073* MOVE 1,TSTSUB
5027 006122' 275 01 0 00 000002 SUBI 1,2
5028 006123' 201 00 0 00 000001 MOVEI 1
5029 006124' 242 00 0 01 000000 LSH (1)
5030 006125' 037 03 0 00 000000 PNT3
5031 006126' 037 00 0 00 012622' TMSGC < through PLI Input/Output buffers>
5032 006127' 263 17 0 00 000000 RTN
5033
5034 006130' 037 00 0 00 012632' MA31L2: TMSG <set after passing >
5035 006131' 200 01 0 00 006121* MOVE 1,TSTSUB
5036 006132' 275 01 0 00 000012 SUBI 1,^D10
5037 006133' 201 00 0 00 000001 MOVEI 1
5038 006134' 242 00 0 01 000000 LSH (1)
5039 006135' 037 03 0 00 000000 PNT3
5040 006136' 037 00 0 00 012636' TMSGC < through PLI Input/Output buffers with 'MPTESTPLIPAR' asserted>
5041 006137' 263 17 0 00 000000 RTN
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 78
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1492
5042
5043 ; Microcode:
5044
5045 ; CC is cleared initially
5046
5047 006140' 000000 010000 T31M: MWORD <ADDR=0,JMAP,J=1> ; 0
5048 006141' 000000 000040
5049 006142' 000152 000000 MWORD <CJP,J=5200,CENA,CCPP> ; 1
5050 006143' 000400 150060
5051 006144' 000251 000000 MWORD <JMAP,J=5100> ; 2
5052 006145' 000000 000040
5053
5054 ; CC is cleared after passing floating 1's through
5055 ; PLI Input/Output buffers
5056
5057 006146' 001005 000001 MWORD <ADDR=10,JMAP,J=500,SD0,OR,MGC=1,D=2>
5058 006147' 732000 000040
5059 006150' 001105 000002 MWORD <JMAP,J=500,SD0,OR,MGC=2,D=2> ; 11
5060 006151' 732000 000040
5061 006152' 001205 000004 MWORD <JMAP,J=500,SD0,OR,MGC=4,D=2> ; 12
5062 006153' 732000 000040
5063 006154' 001305 000010 MWORD <JMAP,J=500,SD0,OR,MGC=10,D=2> ; 13
5064 006155' 732000 000040
5065 006156' 001405 000020 MWORD <JMAP,J=500,SD0,OR,MGC=20,D=2> ; 14
5066 006157' 732000 000040
5067 006160' 001505 000040 MWORD <JMAP,J=500,SD0,OR,MGC=40,D=2> ; 15
5068 006161' 732000 000040
5069 006162' 001605 000100 MWORD <JMAP,J=500,SD0,OR,MGC=100,D=2> ; 16
5070 006163' 732000 000040
5071 006164' 001705 000200 MWORD <JMAP,J=500,SD0,OR,MGC=200,D=2> ; 17
5072 006165' 732000 000040
5073
5074 ; CC is set after passing floating 1's through
5075 ; PLI Input/Output buffers with 'MPTESTPLIPAR'
5076 ; asserted
5077
5078 006166' 003006 000001 MWORD <ADDR=30,JMAP,J=600,SD0,OR,MGC=1,D=2> ; 30
5079 006167' 732000 000040
5080 006170' 003106 000002 MWORD <JMAP,J=600,SD0,OR,MGC=2,D=2> ; 31
5081 006171' 732000 000040
5082 006172' 003206 000004 MWORD <JMAP,J=600,SD0,OR,MGC=4,D=2> ; 32
5083 006173' 732000 000040
5084 006174' 003306 000010 MWORD <JMAP,J=600,SD0,OR,MGC=10,D=2> ; 33
5085 006175' 732000 000040
5086 006176' 003406 000020 MWORD <JMAP,J=600,SD0,OR,MGC=20,D=2> ; 34
5087 006177' 732000 000040
5088 006200' 003506 000040 MWORD <JMAP,J=600,SD0,OR,MGC=40,D=2> ; 35
5089 006201' 732000 000040
5090 006202' 003606 000100 MWORD <JMAP,J=600,SD0,OR,MGC=100,D=2> ; 36
5091 006203' 732000 000040
5092 006204' 003706 000200 MWORD <JMAP,J=600,SD0,OR,MGC=200,D=2> ; 37
5093 006205' 732000 000040
5094
5095 ; CC is cleared after a CLRCCCODE command
5096
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 78-1
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1493
5097 006206' 005000 510000 MWORD <ADDR=50,JMAP,J=51> ; 50
5098 006207' 000000 000040
5099 006210' 005100 000020 MWORD <CONT,SELM,MGC=20> ; 51
5100 006211' 000000 002340
5101 006212' 005252 000000 MWORD <CJP,J=5200,CENA,CCPP> ; 52
5102 006213' 000400 150060
5103 006214' 005351 000000 MWORD <JMAP,J=5100> ; 53
5104 006215' 000000 000040
5105
5106 ; Routine to pass a data pattern through PLI buffers
5107 ; with good parity.
5108
5109 006216' 050005 012060 MWORD <ADDR=500,JMAP,J=501,S0A,A=2,D=1,OENA,SELM,MGC=60>
5110 006217' 401020 002040
5111 006220' 050100 000006 MWORD <CONT,SD0,D=1,SELP,MGC=6> ; 501
5112 006221' 701000 001340
5113 006222' 050200 000020 MWORD <CONT,SD0,OR,B=2,D=2,SELF,MGC=20> ; 502
5114 006223' 732001 003340
5115 006224' 050352 000000 MWORD <CJP,J=5200,CENA,CCPP> ; 503
5116 006225' 000400 150060
5117 006226' 050451 000000 MWORD <JMAP,J=5100> ; 504
5118 006227' 000000 000040
5119
5120 ; Routine to pass a data pattern through PLI buffers
5121 ; with bad parity.
5122
5123 006230' 060006 012061 MWORD <ADDR=600,JMAP,J=601,S0A,A=2,D=1,OENA,SELM,MGC=61>
5124 006231' 401020 002040
5125 006232' 060100 000006 MWORD <CONT,SD0,D=1,SELP,MGC=6> ; 601
5126 006233' 701000 001340
5127 006234' 060200 000020 MWORD <CONT,SD0,OR,B=2,D=2,SELF,MGC=20> ; 602
5128 006235' 732001 003340
5129 006236' 060351 000000 MWORD <CJP,J=5100,CENA,CCPP> ; 603
5130 006237' 000400 150060
5131 006240' 060452 000000 MWORD <JMAP,J=5200> ; 604
5132 006241' 000000 000040
5133
5134 ; Subroutine - Passed - Write 1 to bit 12 of CSR register
5135
5136 006242' 510000 000000 MWORD <ADDR=5100,CONT,SD0,AND,B=2,D=2> ; 5100
5137 006243' 742001 000340
5138 006244' 510100 000000 MWORD <CONT,S0B,PLUS,B=2,D=2,CRY> ; 5101
5139 006245' 302001 000740
5140 006246' 510200 260000 MWORD <LDCT,J=26> ; 5102
5141 006247' 000000 000300
5142 006250' 510351 030000 MWORD <RPCT,J=5103,SAB,PLUS,A=2,B=2,D=2> ; 5103
5143 006251' 102021 000220
5144 006252' 510400 002004 MWORD <CONT,S0A,A=2,OR,D=1,OENA,SELE,MGC=4> ; 5104
5145 006253' 431020 005340
5146 006254' 510551 070040 MWORD <CJP,J=5107,CENA,CCGC,D=1,SELE,MGC=40> ; 5105
5147 006255' 001400 015060
5148 006256' 510651 050000 MWORD <JMAP,J=5105,D=1> ; 5106
5149 006257' 001000 000040
5150 006260' 510700 000200 MWORD <CONT,S0A,A=1,OR,D=1,SELE,MGC=200> ; 5107
5151 006261' 431010 005340
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 78-2
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1494
5152 006262' 511051 100000 MWORD <JMAP,J=5110,D=1> ; 5110
5153 006263' 001000 000040
5154
5155 ; Subroutine - Failed - Write 1 to bit 13 of CSR register
5156
5157 006264' 520000 000000 MWORD <ADDR=5200,CONT,SD0,AND,B=2,D=2> ; 5200
5158 006265' 742001 000340
5159 006266' 520100 000000 MWORD <CONT,S0B,PLUS,B=2,D=2,CRY> ; 5201
5160 006267' 302001 000740
5161 006270' 520200 250000 MWORD <LDCT,J=25> ; 5202
5162 006271' 000000 000300
5163 006272' 520352 030000 MWORD <RPCT,J=5203,SAB,PLUS,A=2,B=2,D=2> ; 5203
5164 006273' 102021 000220
5165 006274' 520400 002004 MWORD <CONT,S0A,A=2,OR,D=1,OENA,SELE,MGC=4> ; 5204
5166 006275' 431020 005340
5167 006276' 520552 070040 MWORD <CJP,J=5207,CENA,CCGC,D=1,SELE,MGC=40> ; 5205
5168 006277' 001400 015060
5169 006300' 520652 050000 MWORD <JMAP,J=5205,D=1> ; 5206
5170 006301' 001000 000040
5171 006302' 520700 000200 MWORD <CONT,S0A,A=1,OR,D=1,SELE,MGC=200> ; 5207
5172 006303' 431010 005340
5173 006304' 521052 100000 MWORD <JMAP,J=5210,D=1> ; 5210
5174 006305' 001000 000040
5175 006306' 777777 777777 -1
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 79
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1495
5176
5177 ;#********************************************************************
5178 ;* TEST 32 - CCChanErr Test
5179 ;
5180 ; Description: Verify that condition code 'CCChanErr' can be
5181 ; tested by the microsequencer for conditional
5182 ; branching, and that the condition code can be set
5183 ; and reset by the hardware conditions which should
5184 ; do so.
5185 ;
5186 ; Procedure: Port Clear
5187 ; Start up port
5188 ; UC> perform an operation and then verify that
5189 ; CCChanErr is not asserted or asserted
5190 ; UC> if passed - set bit 12 (DISABLE Complete)
5191 ; UC> if failed - set bit 13 (ENABLE Complete)
5192 ; Read CSR and determine test disposition
5193 ;
5194 ; Repeat with several test cases:
5195 ; CC is cleared initially, after CBUS START is
5196 ; issued which does a RESET also
5197 ; CC is set after causing a 'short wc' error
5198 ; CC is set after causing a 'long wc' error
5199 ; CC is cleared after a successful data transfer
5200 ;
5201 ; Failure: ---
5202 ;#********************************************************************
5203
5204 ; Test data
5205
5206 006307' 254 00 0 00 006317' TSTU32: JRST TG32 ; go start test
5207 006310' 200403 000032 MPROC!NDMP!ZMPROC!32 ; test mask
5208 006311' 006420' 012654' T32M,,[ASCIZ ^CCChanErr Test^]
5209 006312' 012657' 012661' [EXP M6,MLAST!C6],,[EXP M7,C1,MLAST!C7]
5210 006313' 000000000000# TSTC3 ; failure test table
5211 006314' 000000000000# TSTC4 ; ...
5212 006315' 000000 006603' TSTU33
5213 006316' 777777 777777 -1
5214
5215 ; Start test
5216
5217 006317' 201 00 0 00 000000' TG32: MOVEI Z8 ; get address of module start
5218 006320' 260 17 0 00 005757* GO TRACE ; handle trace output
5219 006321' 201 01 0 00 006420' MOVEI 1,T32M ; set up microcode address
5220 006322' 260 17 0 00 005761* GO TLOAD ; load/verify it
5221 006323' 263 17 0 00 000000 RTN ; failed - exit test
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 80
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1496
5222
5223 ; Initialization
5224
5225 006324' 400 15 0 00 000000 TL32: SETZ ERFLG, ; clear error flag
5226 006325' 201 06 0 00 006352' MOVEI 6,TS32 ; get test table address
5227 006326' 402 00 0 00 006131* SETZM TSTSUB ; initialize subtest number
5228 006327' 476 00 0 00 005766* SETOM TADDR ; clear start address
5229 006330' 260 17 0 00 005767* GO IPACLR ; clear the CSR register
5230 006331' 201 06 0 00 006352' MOVEI 6,TS32 ; get test table address
5231 006332' 476 00 0 00 006327* SETOM TADDR ; clear start address
5232 006333' 201 01 0 00 005000 MOVEI 1,5000 ; get start address
5233 006334' 242 01 0 00 000001 LSH 1,1 ; position correctly
5234 006335' 260 17 0 00 005244* GO LDRAR ; load the register
5235 006336' 201 01 0 00 000010 MOVEI 1,MPRUN ; get 'MPRUN' bit
5236 006337' 260 17 0 00 005246* GO LDCSR ; start up the port
5237
5238 ; Loop on test execute table entries
5239
5240 006340' 260 17 0 00 006330* TA32: GO IPACLR ; clear port
5241 006341' 260 17 0 00 005770* TB32: GO TEXEC ; execute table entry
5242 006342' 254 00 0 00 006351' JRST TX32 ; end of sstep table
5243 006343' 254 00 0 00 006341' JRST TB32 ; keep looping after call
5244 006344' 474 15 0 00 000000 SETO ERFLG, ; error occurred
5245
5246 ; Handle error printouts and scope looping
5247
5248 006345' 027 00 0 00 006406' SCOPER MA32 ; print error message
5249 006346' 254 00 0 00 006324' JRST TL32 ; loop on error
5250 006347' 254 00 0 00 006351' JRST TX32 ; altmode exit
5251 006350' 322 15 0 00 006340' JUMPE ERFLG,TA32 ; do next sstep table entry
5252
5253 ; End of test
5254
5255 006351' 263 17 0 00 000000 TX32: RTN ; return
5256
5257 ; Test Execute Table, as: (CMD,parameters)
5258
5259 ; CC is cleared initially (after a MPSTARTCBUS)
5260
5261 006352' 140000 006373' TS32: TTABLE (TCALL,TS32RD) ; set up a write
5262 006353' 040000 000000 TTABLE (TSTART,0) ; start up port
5263 006354' 240002 000000 TTABLE (TCHECK,2) ; check if completed
5264 006355' 340000 000000 TTABLE (TEXIT) ; exit if error yet
5265
5266 ; CC is set after causing a 'short wc' error.
5267
5268 006356' 140000 006373' TTABLE (TCALL,TS32RD) ; set up a read
5269 006357' 040000 000010 TTABLE (TSTART,10) ; start up port
5270 006360' 240002 000000 TTABLE (TCHECK,2) ; check if completed
5271 006361' 340000 000000 TTABLE (TEXIT) ; exit if error yet
5272
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 81
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1497
5273
5274 ; CC is set after causing a 'long wc' error.
5275
5276 006362' 140000 006373' TTABLE (TCALL,TS32RD) ; set up a read
5277 006363' 040000 000030 TTABLE (TSTART,30) ; start up port
5278 006364' 240002 000000 TTABLE (TCHECK,2) ; check if completed
5279 006365' 340000 000000 TTABLE (TEXIT) ; exit if error yet
5280
5281 ; CC is cleared after a successful data transfer
5282
5283 006366' 140000 006373' TTABLE (TCALL,TS32RD) ; set up a write
5284 006367' 040000 000040 TTABLE (TSTART,40) ; start up port
5285 006370' 240002 000000 TTABLE (TCHECK,2) ; check if completed
5286 006371' 340000 000000 TTABLE (TEXIT) ; exit if error yet
5287 006372' 000000 000000 TTABLE (TLAST) ; end of list
5288
5289 ; Set up a read data transfer
5290
5291 006373' 201 14 0 00 000003 TS32RD: MOVEI PAT,3 ; get data pattern
5292 006374' 201 01 0 00 000002 MOVEI 1,2 ; get transfer type
5293 006375' 201 02 0 00 000002 MOVEI 2,2 ; get transfer length
5294 006376' 260 17 0 00 002034* GO BUFGEN ; generate buffer contents
5295 006377' 200 01 0 00 011645' MOVE 1,[CBUFSZ,,CBUF] ; get pointer to control buffer
5296 006400' 260 17 0 00 005572* GO CHINIT ; initialize software
5297 006401' 551 01 0 00 005573* HRRZI 1,BUFF ; buffer address
5298 006402' 201 02 0 00 000002 MOVEI 2,2 ; word count
5299 006403' 400 03 0 00 000000 SETZ 3, ; clear zero fill specifier
5300 006404' 260 17 0 00 005576* GO GENCCW ; generate a CCW list
5301 006405' 263 17 0 00 000000 RTN ; return
5302
5303 ; Error messages
5304
5305 006406' 140000 012664' MA32: MSG!TXNOT![ASCIZ /Condition Code 'CC Chan Err' not /]
5306 006407' 240000 006411' CALL!TXNOT!MA32LP ; print subtest description
5307 006410' 000000000000# LAST!CALL!TXALL!TTPNT ; print test data
5308
5309 006411' 200 01 0 00 006326* MA32LP: MOVE 1,TSTSUB ; get subtest number
5310 006412' 256 00 0 01 006413' XCT MA32L-1(1) ; print message
5311 006413' 263 17 0 00 000000 RTN ; return
5312
5313 006414' 037 00 0 00 012673' MA32L: TMSG <cleared initially (after a 'MPSTARTCBUS')>
5314 006415' 037 00 0 00 012704' TMSG <set after causing a 'short wc' error>
5315 006416' 037 00 0 00 012714' TMSG <set after causing a 'long wc' error>
5316 006417' 037 00 0 00 012724' TMSG <cleared after a successful data transfer>
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 82
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1498
5317
5318 ; Microcode:
5319
5320 ; CC is cleared initially, after CBUS START is
5321 ; issued which does a RESET also.
5322
5323 006420' 000000 010000 T32M: MWORD <ADDR=0,JMAP,J=1> ; 0
5324 006421' 000000 000040
5325 006422' 000101 000220 MWORD <LDCT,J=100,SELC,MGC=220> ; 1
5326 006423' 000000 004300
5327 006424' 000200 020000 MWORD <RPCT,J=2> ; 2
5328 006425' 000000 000220
5329 006426' 000352 000000 MWORD <CJP,J=5200,CENA,CCCE> ; 3
5330 006427' 000400 160060
5331 006430' 000451 000000 MWORD <JMAP,J=5100> ; 4
5332 006431' 000000 000040
5333
5334 ; CC is set after causing a 'short wc' error.
5335
5336 006432' 001000 110000 MWORD <ADDR=10,JMAP,J=11> ; 10
5337 006433' 000000 000040
5338 006434' 001100 200220 MWORD <LDCT,J=20,SELC,MGC=220> ; 11
5339 006435' 000000 004300
5340 006436' 001200 120000 MWORD <RPCT,J=12> ; 12
5341 006437' 000000 000220
5342 006440' 001310 000000 MWORD <CJS,J=1000,D=1> ; 13
5343 006441' 001000 000020
5344 006442' 001410 000000 MWORD <CJS,J=1000,D=1> ; 14
5345 006443' 001000 000020
5346 006444' 001510 000000 MWORD <CJS,J=1000,D=1> ; 15
5347 006445' 001000 000020
5348 006446' 001601 000140 MWORD <LDCT,J=100,SELC,MGC=140> ; 16
5349 006447' 000000 004300
5350 006450' 001700 170000 MWORD <RPCT,J=17> ; 17
5351 006451' 000000 000220
5352 006452' 002051 000000 MWORD <CJP,J=5100,CENA,CCCE> ; 20
5353 006453' 000400 160060
5354 006454' 002152 000000 MWORD <JMAP,J=5200> ; 21
5355 006455' 000000 000040
5356
5357 ; CC is set after causing a 'long wc' error.
5358
5359 006456' 003000 310000 MWORD <ADDR=30,JMAP,J=31> ; 30
5360 006457' 000000 000040
5361 006460' 003100 200220 MWORD <LDCT,J=20,SELC,MGC=220> ; 31
5362 006461' 000000 004300
5363 006462' 003200 320000 MWORD <RPCT,J=32> ; 32
5364 006463' 000000 000220
5365 006464' 003310 000000 MWORD <CJS,J=1000,D=1> ; 33
5366 006465' 001000 000020
5367 006466' 003401 000140 MWORD <LDCT,J=100,SELC,MGC=140> ; 34
5368 006467' 000000 004300
5369 006470' 003500 350000 MWORD <RPCT,J=35> ; 35
5370 006471' 000000 000220
5371 006472' 003651 000000 MWORD <CJP,J=5100,CENA,CCCE> ; 36
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 82-1
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1499
5372 006473' 000400 160060
5373 006474' 003752 000000 MWORD <JMAP,J=5200> ; 37
5374 006475' 000000 000040
5375
5376 ; CC is cleared by a good transfer has occurred
5377
5378 006476' 004000 410000 MWORD <ADDR=40,JMAP,J=41> ; 40
5379 006477' 000000 000040
5380 006500' 004100 200220 MWORD <LDCT,J=20,SELC,MGC=220> ; 41
5381 006501' 000000 004300
5382 006502' 004200 420000 MWORD <RPCT,J=42> ; 42
5383 006503' 000000 000220
5384 006504' 004310 000000 MWORD <CJS,J=1000,D=1> ; 43
5385 006505' 001000 000020
5386 006506' 004410 000000 MWORD <CJS,J=1000,D=1> ; 44
5387 006507' 001000 000020
5388 006510' 004500 000140 MWORD <CONT,SELC,MGC=140> ; 45
5389 006511' 000000 004340
5390 006512' 004652 000000 MWORD <CJP,J=5200,CENA,CCCE> ; 46
5391 006513' 000400 160060
5392 006514' 004751 000000 MWORD <JMAP,J=5100> ; 47
5393 006515' 000000 000040
5394
5395 ; Write a word over the CBUS
5396
5397 006516' 100010 020000 MWORD <ADDR=1000,CJP,J=1002,D=1,CENA,CCCA> ; 1000
5398 006517' 001400 000060
5399 006520' 100110 000000 MWORD <JMAP,J=1000,D=1> ; 1001
5400 006521' 001000 000040
5401 006522' 100200 002040 MWORD <CONT,S0A,AND,D=2,OENA,SELF,MGC=40> ; 1002
5402 006523' 442000 003340
5403 006524' 100300 060002 MWORD <LDCT,J=6,D=1,SELC,MGC=2> ; 1003
5404 006525' 001000 004300
5405 006526' 100410 040000 MWORD <RPCT,J=1004> ; 1004
5406 006527' 000000 000220
5407 006530' 100500 000000 MWORD <CRTN> ; 1005
5408 006531' 000000 000240
5409
5410 ; Initialization step
5411
5412 006532' 500050 010100 MWORD <ADDR=5000,JMAP,J=5001,SELC,MGC=100> ; 5000
5413 006533' 000000 004040
5414 006534' 500150 010030 MWORD <JMAP,J=5001,SELM,MGC=30> ; 5001
5415 006535' 000000 002040
5416
5417 ; Subroutine - Passed - Write 1 to bit 12 of CSR register
5418
5419 006536' 510000 000000 MWORD <ADDR=5100,CONT,SD0,AND,B=2,D=2> ; 5100
5420 006537' 742001 000340
5421 006540' 510100 000000 MWORD <CONT,S0B,PLUS,B=2,D=2,CRY> ; 5101
5422 006541' 302001 000740
5423 006542' 510200 260000 MWORD <LDCT,J=26> ; 5102
5424 006543' 000000 000300
5425 006544' 510351 030000 MWORD <RPCT,J=5103,SAB,PLUS,A=2,B=2,D=2> ; 5103
5426 006545' 102021 000220
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 82-2
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1500
5427 006546' 510400 002004 MWORD <CONT,S0A,A=2,OR,D=1,OENA,SELE,MGC=4> ; 5104
5428 006547' 431020 005340
5429 006550' 510551 070040 MWORD <CJP,J=5107,CENA,CCGC,D=1,SELE,MGC=40> ; 5105
5430 006551' 001400 015060
5431 006552' 510651 050000 MWORD <JMAP,J=5105,D=1> ; 5106
5432 006553' 001000 000040
5433 006554' 510700 000200 MWORD <CONT,S0A,A=1,OR,D=1,SELE,MGC=200> ; 5107
5434 006555' 431010 005340
5435 006556' 511051 100000 MWORD <JMAP,J=5110,D=1> ; 5110
5436 006557' 001000 000040
5437
5438 ; Subroutine - Failed - Write 1 to bit 13 of CSR register
5439
5440 006560' 520000 000000 MWORD <ADDR=5200,CONT,SD0,AND,B=2,D=2> ; 5200
5441 006561' 742001 000340
5442 006562' 520100 000000 MWORD <CONT,S0B,PLUS,B=2,D=2,CRY> ; 5201
5443 006563' 302001 000740
5444 006564' 520200 250000 MWORD <LDCT,J=25> ; 5202
5445 006565' 000000 000300
5446 006566' 520352 030000 MWORD <RPCT,J=5203,SAB,PLUS,A=2,B=2,D=2> ; 5203
5447 006567' 102021 000220
5448 006570' 520400 002004 MWORD <CONT,S0A,A=2,OR,D=1,OENA,SELE,MGC=4> ; 5204
5449 006571' 431020 005340
5450 006572' 520552 070040 MWORD <CJP,J=5207,CENA,CCGC,D=1,SELE,MGC=40> ; 5205
5451 006573' 001400 015060
5452 006574' 520652 050000 MWORD <JMAP,J=5205,D=1> ; 5206
5453 006575' 001000 000040
5454 006576' 520700 000200 MWORD <CONT,S0A,A=1,OR,D=1,SELE,MGC=200> ; 5207
5455 006577' 431010 005340
5456 006600' 521052 100000 MWORD <JMAP,J=5210,D=1> ; 5210
5457 006601' 001000 000040
5458 006602' 777777 777777 -1
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 83
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1501
5459
5460 ;#********************************************************************
5461 ;* TEST 33 - CCCbLstWd Test
5462 ;
5463 ; Description: Verify that condition code 'CCCbLstWd' can be
5464 ; tested by the microsequencer for conditional
5465 ; branching, and that the condition code can be set
5466 ; and reset by the hardware conditions which should
5467 ; do so.
5468 ;
5469 ; Procedure: Port Clear
5470 ; Start up port
5471 ; UC> perform an operation and then verify that
5472 ; CCCbLstWd is not asserted or asserted
5473 ; UC> if passed - set bit 12 (DISABLE Complete)
5474 ; UC> if failed - set bit 13 (ENABLE Complete)
5475 ; Read CSR and determine test disposition
5476 ;
5477 ; Repeat with several test cases:
5478 ; CC is initially cleared
5479 ; CC is set after final word of a 1 word transfer
5480 ; CC is not set after first word of a 2 word transfer
5481 ; CC is cleared after a CLRCCCODE command
5482 ;
5483 ; Failure: ---
5484 ;#********************************************************************
5485
5486 ; Test data
5487
5488 006603' 254 00 0 00 006612' TSTU33: JRST TG33 ; go start test
5489 006604' 200403 000033 MPROC!NDMP!ZMPROC!33 ; test mask
5490 006605' 006702' 012735' T33M,,[ASCIZ ^CCCbLstWd Test^]
5491 006606' 012657' 012661' [EXP M6,MLAST!C6],,[EXP M7,C1,MLAST!C7]
5492 006607' 000000000000# TSTC3 ; failure test table
5493 006610' 000000000000# TSTC4 ; ...
5494 006611' 777777 777777 -1
5495
5496 ; Start test
5497
5498 006612' 201 00 0 00 000000' TG33: MOVEI Z8 ; get address of module start
5499 006613' 260 17 0 00 006320* GO TRACE ; handle trace output
5500 006614' 201 01 0 00 006702' MOVEI 1,T33M ; set up microcode address
5501 006615' 260 17 0 00 006322* GO TLOAD ; load/verify it
5502 006616' 263 17 0 00 000000 RTN ; failed - exit test
5503
5504 ; Initialization
5505
5506 006617' 400 15 0 00 000000 TL33: SETZ ERFLG, ; clear error flag
5507 006620' 201 06 0 00 006635' MOVEI 6,TS33 ; get test table address
5508 006621' 402 00 0 00 006411* SETZM TSTSUB ; initialize subtest number
5509 006622' 476 00 0 00 006332* SETOM TADDR ; clear start address
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 84
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1502
5510
5511 ; Loop on test execute table entries
5512
5513 006623' 260 17 0 00 006340* TA33: GO IPACLR ; clear port
5514 006624' 260 17 0 00 006341* TB33: GO TEXEC ; execute table entry
5515 006625' 254 00 0 00 006634' JRST TX33 ; end of sstep table
5516 006626' 254 00 0 00 006624' JRST TB33 ; keep looping after call
5517 006627' 474 15 0 00 000000 SETO ERFLG, ; error occurred
5518
5519 ; Handle error printouts and scope looping
5520
5521 006630' 027 00 0 00 006670' SCOPER MA33 ; print error message
5522 006631' 254 00 0 00 006617' JRST TL33 ; loop on error
5523 006632' 254 00 0 00 006634' JRST TX33 ; altmode exit
5524 006633' 322 15 0 00 006623' JUMPE ERFLG,TA33 ; do next sstep table entry
5525
5526 ; End of test
5527
5528 006634' 263 17 0 00 000000 TX33: RTN ; return
5529
5530 ; Test Execute Table, as: (CMD,parameters)
5531
5532 ; CC is cleared initially
5533
5534 006635' 140000 005305' TS33: TTABLE (TCALL,T27SR1) ; set up read of 1 word
5535 006636' 040000 000000 TTABLE (TSTART,0) ; start up port
5536 006637' 240002 000000 TTABLE (TCHECK,2) ; check if completed
5537 006640' 340000 000000 TTABLE (TEXIT) ; exit if error yet
5538
5539 ; CC is set after final word of a 1 word transfer
5540
5541 006641' 140000 005305' TTABLE (TCALL,T27SR1) ; set up read of 1 word
5542 006642' 040000 000000 TTABLE (TSTART,0) ; start up port
5543 006643' 240002 000000 TTABLE (TCHECK,2) ; check if completed
5544 006644' 340000 000000 TTABLE (TEXIT) ; exit if error yet
5545
5546 ; CC is not set after first word of a 2 word transfer
5547
5548 006645' 140000 005307' TTABLE (TCALL,T27SR2) ; set up read of 2 words
5549 006646' 040000 000000 TTABLE (TSTART,0) ; start up port
5550 006647' 240002 000000 TTABLE (TCHECK,2) ; check if completed
5551 006650' 340000 000000 TTABLE (TEXIT) ; exit if error yet
5552
5553 ; CC is cleared after a CLRCCCODE command
5554
5555 006651' 140000 005305' TTABLE (TCALL,T27SR1) ; set up read of 1 word
5556 006652' 040000 000000 TTABLE (TSTART,0) ; start up port
5557 006653' 240002 000000 TTABLE (TCHECK,2) ; check if completed
5558 006654' 340000 000000 TTABLE (TEXIT) ; exit if error yet
5559 006655' 000000 000000 TTABLE (TLAST) ; end of list
5560
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 85
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1503
5561
5562 ; Routine to set up data transfer
5563
5564 006656' 201 02 0 00 000001 T33SR1: MOVEI 2,1 ; 1 word transfer
5565 006657' 334 00 0 00 000000 SKIPA ; continue
5566 006660' 201 02 0 00 000002 T33SR2: MOVEI 2,2 ; 2 word transfer
5567 006661' 402 00 0 00 006401* SETZM BUFF ; set data to 0's
5568 006662' 200 01 0 00 011645' MOVE 1,[CBUFSZ,,CBUF] ; get pointer to control buffer
5569 006663' 260 17 0 00 006400* GO CHINIT ; initialize software
5570 006664' 551 01 0 00 006661* HRRZI 1,BUFF ; buffer address
5571 006665' 400 03 0 00 000000 SETZ 3, ; clear zero fill specifier
5572 006666' 260 17 0 00 006404* GO GENCCW ; generate a CCW list
5573 006667' 263 17 0 00 000000 RTN ; return
5574
5575 ; Error messages
5576
5577 006670' 140000 012740' MA33: MSG!TXNOT![ASCIZ /Condition Code 'CC Cb Lst Wd' not /]
5578 006671' 240000 006673' CALL!TXNOT!MA33LP ; print subtest description
5579 006672' 000000000000# LAST!CALL!TXALL!TTPNT ; print test data
5580
5581 006673' 200 01 0 00 006621* MA33LP: MOVE 1,TSTSUB ; get subtest number
5582 006674' 256 00 0 01 006675' XCT MA33L-1(1) ; print message
5583 006675' 263 17 0 00 000000 RTN ; return
5584
5585 006676' 037 00 0 00 012425' MA33L: TMSG <initially cleared>
5586 006677' 037 00 0 00 012747' TMSG <set after final word of a 1 word transfer>
5587 006700' 037 00 0 00 012760' TMSG <cleared after first word of a 2 word transfer>
5588 006701' 037 00 0 00 012161' TMSG <cleared after a CLRCCCODE command>
5589
5590 ; Microcode:
5591
5592 ; CC is cleared initially
5593
5594 006702' 000000 010000 T33M: MWORD <ADDR=0,JMAP,J=1> ; 0
5595 006703' 000000 000040
5596 006704' 000100 000200 MWORD <CONT,SELC,MGC=200> ; 1
5597 006705' 000000 004340
5598 006706' 000252 000000 MWORD <CJP,J=5200,CENA,CCLW> ; 2
5599 006707' 000400 170060
5600 006710' 000351 000000 MWORD <JMAP,J=5100> ; 3
5601 006711' 000000 000040
5602
5603 ; CC is set after final word of a 1 word transfer
5604
5605 006712' 001000 110000 MWORD <ADDR=10,JMAP,J=11,SD0,AND,D=2> ; 10
5606 006713' 742000 000040
5607 006714' 001100 000200 MWORD <CONT,D=1,SELC,MGC=200> ; 11 (start CBUS)
5608 006715' 001000 004340
5609 006716' 001200 140000 MWORD <CJP,J=14,D=1,CENA,CCCA> ; 12 (wait till avail)
5610 006717' 001400 000060
5611 006720' 001300 120000 MWORD <JMAP,J=12,D=1> ; 13
5612 006721' 001000 000040
5613 006722' 001451 000000 MWORD <CJP,J=5100,CENA,CCLW> ; 14
5614 006723' 000400 170060
5615 006724' 001552 000000 MWORD <JMAP,J=5200> ; 15
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 85-1
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1504
5616 006725' 000000 000040
5617
5618 ; CC is not set after first word of a 2 word transfer
5619
5620 006726' 003000 310000 MWORD <ADDR=30,JMAP,J=31,SD0,AND,D=2> ; 30
5621 006727' 742000 000040
5622 006730' 003100 000200 MWORD <CONT,D=1,SELC,MGC=200> ; 31 (start CBUS)
5623 006731' 001000 004340
5624 006732' 003200 340000 MWORD <CJP,J=34,D=1,CENA,CCCA> ; 32 (wait till avail)
5625 006733' 001400 000060
5626 006734' 003300 320000 MWORD <JMAP,J=32,D=1> ; 33
5627 006735' 001000 000040
5628 006736' 003452 000000 MWORD <CJP,J=5200,CENA,CCLW> ; 34
5629 006737' 000400 170060
5630 006740' 003551 000000 MWORD <JMAP,J=5100> ; 35
5631 006741' 000000 000040
5632
5633 ; CC is cleared after a CLRCCCODE command
5634
5635 006742' 005000 510000 MWORD <ADDR=50,JMAP,J=51> ; 50
5636 006743' 000000 000040
5637 006744' 005100 000200 MWORD <CONT,D=1,SELC,MGC=200> ; 51 (start CBUS)
5638 006745' 001000 004340
5639 006746' 005200 540000 MWORD <CJP,J=54,D=1,CENA,CCCA> ; 52 (wait till avail)
5640 006747' 001400 000060
5641 006750' 005300 120000 MWORD <JMAP,J=12,D=1> ; 53
5642 006751' 001000 000040
5643 006752' 005400 000020 MWORD <CONT,SELM,MGC=20> ; 54
5644 006753' 000000 002340
5645 006754' 005552 000000 MWORD <CJP,J=5200,CENA,CCLW> ; 55
5646 006755' 000400 170060
5647 006756' 005651 000000 MWORD <JMAP,J=5100> ; 56
5648 006757' 000000 000040
5649
5650 ; Subroutine - Passed - Write 1 to bit 12 of CSR register
5651
5652 006760' 510000 000000 MWORD <ADDR=5100,CONT,SD0,AND,B=2,D=2> ; 5100
5653 006761' 742001 000340
5654 006762' 510100 000000 MWORD <CONT,S0B,PLUS,B=2,D=2,CRY> ; 5101
5655 006763' 302001 000740
5656 006764' 510200 260000 MWORD <LDCT,J=26> ; 5102
5657 006765' 000000 000300
5658 006766' 510351 030000 MWORD <RPCT,J=5103,SAB,PLUS,A=2,B=2,D=2> ; 5103
5659 006767' 102021 000220
5660 006770' 510400 002004 MWORD <CONT,S0A,A=2,OR,D=1,OENA,SELE,MGC=4> ; 5104
5661 006771' 431020 005340
5662 006772' 510551 070040 MWORD <CJP,J=5107,CENA,CCGC,D=1,SELE,MGC=40> ; 5105
5663 006773' 001400 015060
5664 006774' 510651 050000 MWORD <JMAP,J=5105,D=1> ; 5106
5665 006775' 001000 000040
5666 006776' 510700 000200 MWORD <CONT,S0A,A=1,OR,D=1,SELE,MGC=200> ; 5107
5667 006777' 431010 005340
5668 007000' 511051 100000 MWORD <JMAP,J=5110,D=1> ; 5110
5669 007001' 001000 000040
5670
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 85-2
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1505
5671 ; Subroutine - Failed - Write 1 to bit 13 of CSR register
5672
5673 007002' 520000 000000 MWORD <ADDR=5200,CONT,SD0,AND,B=2,D=2> ; 5200
5674 007003' 742001 000340
5675 007004' 520100 000000 MWORD <CONT,S0B,PLUS,B=2,D=2,CRY> ; 5201
5676 007005' 302001 000740
5677 007006' 520200 250000 MWORD <LDCT,J=25> ; 5202
5678 007007' 000000 000300
5679 007010' 520352 030000 MWORD <RPCT,J=5203,SAB,PLUS,A=2,B=2,D=2> ; 5203
5680 007011' 102021 000220
5681 007012' 520400 002004 MWORD <CONT,S0A,A=2,OR,D=1,OENA,SELE,MGC=4> ; 5204
5682 007013' 431020 005340
5683 007014' 520552 070040 MWORD <CJP,J=5207,CENA,CCGC,D=1,SELE,MGC=40> ; 5205
5684 007015' 001400 015060
5685 007016' 520652 050000 MWORD <JMAP,J=5205,D=1> ; 5206
5686 007017' 001000 000040
5687 007020' 520700 000200 MWORD <CONT,S0A,A=1,OR,D=1,SELE,MGC=200> ; 5207
5688 007021' 431010 005340
5689 007022' 521052 100000 MWORD <JMAP,J=5210,D=1> ; 5210
5690 007023' 001000 000040
5691 007024' 777777 777777 -1
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 86
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1506
5692
5693 ;#********************************************************************
5694 ;* TEST 34 - Basic Local Store Test
5695 ;
5696 ; Description: This test writes data to local storage and reads
5697 ; it back and verifies it. It is a basic test in
5698 ; that only data patterns 0's and 1's are used and
5699 ; only a few microinstructions are executed to read
5700 ; and write a location.
5701 ;
5702 ; Procedure: Port Clear
5703 ; Load microwords with local storage addresses
5704 ; Set start address
5705 ; Single step 3 times
5706 ; Read EBUF and verify data 0's
5707 ; Set start address
5708 ; Single step 3 times
5709 ; Read EBUF and verify data 1's
5710 ;
5711 ; Repeat above steps for addresses 0-1024
5712 ;
5713 ; Failure: ---
5714 ;#********************************************************************
5715
5716 ; Test data
5717
5718 007025' 254 00 0 00 007035' TSTU34: JRST TG34 ; go start test
5719 007026' 210403 000034 MPROC!MBUS!NDMP!ZMPROC!34 ; test mask
5720 007027' 007122' 012772' T34M,,[ASCIZ ^Basic Local Store Test^]
5721 007030' 012777' 013001' [EXP M13,MLAST!M2],,[EXP M14,M15,MLAST!M11]
5722 007031' 000000 007137' TSTU35 ; failure test table
5723 007032' 000000 010326' TSTU36 ; ...
5724 007033' 000000 010521' TSTU37
5725 007034' 777777 777777 -1
5726
5727 ; Start test
5728
5729 007035' 201 00 0 00 000000' TG34: MOVEI Z8 ; get address of module start
5730 007036' 260 17 0 00 006613* GO TRACE ; handle trace output
5731 007037' 201 01 0 00 007122' MOVEI 1,T34M ; set up microcode address
5732 007040' 260 17 0 00 006615* GO TLOAD ; load/verify it
5733 007041' 263 17 0 00 000000 RTN ; failed - exit test
5734
5735 ; Initialization
5736
5737 007042' 400 15 0 00 000000 TL34: SETZ ERFLG, ; clear error flag
5738 007043' 260 17 0 00 006623* GO IPACLR ; clear port
5739 007044' 402 00 0 00 006673* SETZM TSTSUB ; initialize subtest number
5740 007045' 201 06 0 00 007057' MOVEI 6,TS34 ; get sstep table address
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 87
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1507
5741
5742 ; Loop on single step table entries
5743
5744 007046' 260 17 0 00 000000* TA34: GO BEXEC ; execute table entry
5745 007047' 254 00 0 00 007056' JRST TX34 ; end of sstep table
5746 007050' 254 00 0 00 007046' JRST TA34 ; keep looping after call
5747 007051' 474 15 0 00 000000 SETO ERFLG, ; error - EBUF data incorrect
5748
5749 ; Handle error printouts and scope looping
5750
5751 007052' 027 00 0 00 007113' SCOPER MA34 ; print error message
5752 007053' 254 00 0 00 007042' JRST TL34 ; loop on error
5753 007054' 254 00 0 00 007056' JRST TX34 ; altmode exit
5754 007055' 322 15 0 00 007046' JUMPE ERFLG,TA34 ; do next sstep table entry
5755
5756 ; End of test
5757
5758 007056' 263 17 0 00 000000 TX34: RTN ; return
5759
5760 ; Sstep table, with EBUF data, as: (CMD,#Steps,Start addr,End Addr,EBUF data)
5761
5762 007057' 300000 007067' TS34: ATABLE (SSCALL,TS34IN) ; initialize test parameters
5763 007060' 400000 007071' TS34L: ATABLE (SSCHK,TS34ST) ; set up single step parameters
5764 007061' 100300 000003 ATABLE (SSSTRT,3,0,3,0) ; do 3 single steps/check results
5765 007062' 000000 000000
5766 007063' 100300 030006 ATABLE (SSSTRT,3,3,6,-1) ; do 3 single steps/check results
5767 007064' 777777 777777
5768 007065' 500000 007060' ATABLE (SSJRST,TS34L) ; do next address
5769 007066' 000000 000000 ATABLE (SSLAST) ; end of table
5770
5771 ; Special routines
5772
5773 007067' 476 00 0 00 011165' TS34IN: SETOM SAVDAT ; initialize address
5774 007070' 263 17 0 00 000000 RTN ; return
5775
5776 007071' 350 07 0 00 011165' TS34ST: AOS 7,SAVDAT ; point to next address
5777 007072' 305 07 0 00 002000 CAIGE 7,^D1024 ; done yet?
5778 007073' 350 00 0 17 000000 AOS (P) ; yes - set up RTN+2
5779 007074' 332 00 0 00 000172* SKIPE UDEBUG ; debug mode?
5780 JRST [CAIGE 7,10 ; yes - limit to 8 times
5781 AOS (P)
5782 007075' 254 00 0 00 013004' JRST .+1]
5783 007076' 135 07 0 00 013007' LDB 7,[POINT 10,SAVDAT,35] ; get bits 00-09
5784 007077' 137 07 0 00 013010' DPB 7,[POINT 10,T34M,35] ; save in 1st microword
5785 007100' 137 07 0 00 013011' DPB 7,[POINT 10,T34M+2,35] ; save in 2nd microword
5786 007101' 137 07 0 00 013012' DPB 7,[POINT 10,T34MA,35] ; save in 3rd microword
5787 007102' 137 07 0 00 013013' DPB 7,[POINT 10,T34MA+2,35] ; save in 4th microword
5788 007103' 316 16 0 00 000000* CAMN MBCN,PORTNI ; NI port?
5789 007104' 476 00 0 00 000000* SETOM TSLOD1 ; yes - must reload microcode each time
5790 007105' 316 16 0 00 000000* CAMN MBCN,PORTCI ; CI port?
5791 007106' 476 00 0 00 000000* SETOM TSLOD2 ; yes - must reload microcode each time
5792 007107' 201 01 0 00 007122' MOVEI 1,T34M ; get microcode address
5793 007110' 260 17 0 00 007040* GO TLOAD ; load it
5794 007111' 370 00 0 17 000000 SOS (P) ; error - exit test
5795 007112' 263 17 0 00 000000 RTN ; return
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 88
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1508
5796
5797 ; Error messages
5798
5799 007113' 240000 007115' MA34: CALL!TXNOT!MA34PN ; print data
5800 007114' 000000000000# LAST!CALL!TXALL!BBPNT ; print sequencer data
5801
5802 007115' 037 00 0 00 013014' MA34PN: TMSGC <Wrote data pattern to local storage addr >
5803 007116' 200 00 0 00 011165' MOVE SAVDAT# ; get address
5804 007117' 037 16 0 00 000003 PNTOCS ; print it
5805 007120' 037 00 0 00 013025' TMSGC <Then read back and placed in EBUF>
5806 007121' 263 17 0 00 000000 RTN
5807
5808 ; Microcode:
5809
5810 007122' 000000 012000 T34M: MWORD <ADDR=0,JMAP,J=1,S0A,AND,D=1,OENA,LDLM,MGC=0> ; 0
5811 007123' 441000 230040
5812 007124' 000100 000000 MWORD <CONT,SD0,OR,D=2,RDLM,MGC=0> ; 1
5813 007125' 732000 220340
5814 007126' 000200 002004 MWORD <CONT,S0A,OR,D=1,OENA,SELE,MGC=4> ; 2
5815 007127' 431000 005340
5816
5817 007130' 000300 042000 T34MA: MWORD <JMAP,J=4,SAB,XNOR,D=1,OENA,LDLM,MGC=0> ; 3
5818 007131' 171000 230040
5819 007132' 000400 000000 MWORD <CONT,SD0,OR,D=2,RDLM,MGC=0> ; 4
5820 007133' 732000 220340
5821 007134' 000500 002004 MWORD <CONT,S0A,OR,D=1,OENA,SELE,MGC=4> ; 5
5822 007135' 431000 005340
5823 007136' 777777 777777 -1
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 89
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1509
5824
5825 ;#********************************************************************
5826 ;* TEST 35 - Local Store Data Test
5827 ;
5828 ; Description: This test writes data to local storage and reads
5829 ; it back and verifies it. It builds a data pattern
5830 ; then writes and reads all 1024 local storage
5831 ; locations. This is repeated until all 72 data
5832 ; patterns have been done.
5833 ;
5834 ; Procedure: Port Clear
5835 ; Load microcode
5836 ; Start up port
5837 ; UC> build a data pattern
5838 ; UC> write/read all of local storage with this
5839 ; data pattern
5840 ; UC> do data compare
5841 ; If failed - read R10 to get correct data
5842 ; read R11 to get actual data
5843 ; read R12 to get part of LS addr
5844 ; read R13 to get rest of LS addr
5845 ; halt at location 100
5846 ; If passed - do next data pattern until done,
5847 ; then halt at 157
5848 ;
5849 ; Failure: ---
5850 ;#********************************************************************
5851
5852 ; Test data
5853
5854 007137' 254 00 0 00 007146' TSTU35: JRST TG35 ; go start test
5855 007140' 200403 000035 MPROC!NDMP!ZMPROC!35 ; test mask
5856 007141' 007243' 013035' T35M,,[ASCIZ ^Local Store Data Test^]
5857 007142' 012777' 013001' [EXP M13,MLAST!M2],,[EXP M14,M15,MLAST!M11]
5858 007143' 000000 010326' TSTU36 ; failure test table
5859 007144' 000000 010521' TSTU37 ; ...
5860 007145' 777777 777777 -1
5861
5862 ; Start test
5863
5864 007146' 201 00 0 00 000000' TG35: MOVEI Z8 ; get address of module start
5865 007147' 260 17 0 00 007036* GO TRACE ; handle trace output
5866 007150' 201 01 0 00 007243' MOVEI 1,T35M ; set up microcode address
5867 007151' 260 17 0 00 007110* GO TLOAD ; load/verify it
5868 007152' 263 17 0 00 000000 RTN ; failed - exit test
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 90
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1510
5869
5870 ; Initialization
5871
5872 007153' 400 15 0 00 000000 TL35: SETZ ERFLG, ; clear error flag
5873 007154' 260 17 0 00 007043* GO IPACLR ; clear port
5874 007155' 402 00 0 00 007044* SETZM TSTSUB ; initialize subtest number
5875 007156' 201 01 0 00 000200 MOVEI 1,200 ; allow 200 msecs
5876 007157' 201 02 0 00 000100 MOVEI 2,100 ; correct error address
5877 007160' 201 03 0 00 000157 MOVEI 3,157 ; correct final address
5878 007161' 201 04 0 00 005777 MOVEI 4,5777 ; start address
5879 007162' 260 17 0 00 001666* GO AEXEC ; do the test
5880 007163' 474 15 0 00 000000 SETO ERFLG, ; error - set error flag
5881
5882 ; Handle error printouts and scope looping
5883
5884 007164' 027 00 0 00 007170' SCOPER MA35 ; print error message
5885 007165' 254 00 0 00 007153' JRST TL35 ; loop on error
5886 007166' 254 00 0 00 007167' JRST TX35 ; altmode exit
5887
5888 ; End of test
5889
5890 007167' 263 17 0 00 000000 TX35: RTN ; return
5891
5892 ; Error messages
5893
5894 007170' 140000 013042' MA35: MSG!TXNOT![ASCIZ /Local storage test error:/]
5895 007171' 000000000000# CALL!TXALL!AAPNT ; print sequencer data
5896 007172' 270000 007173' LAST!CALL!TXALL!MA35PN ; get/print error data
5897
5898 007173' 201 02 0 00 000200 MA35PN: MOVEI 2,200 ; initial start address
5899 007174' 200 00 0 00 000002 MA35P1: MOVE 2 ; get start address
5900 007175' 260 17 0 00 006335* GO LDRAR ; write RAR
5901 007176' 201 01 0 00 000010 MOVEI 1,MPRUN ; get 'MPRUN'
5902 007177' 260 17 0 00 006337* GO LDCSR ; write CSR
5903 007200' 201 01 0 00 200000 MOVEI 1,TSTEBF ; get 'TSTEBF'
5904 007201' 260 17 0 00 007177* GO LDCSR ; write CSR
5905 007202' 260 17 0 00 000000* GO RDEBUF ; read EBUF
5906 007203' 202 00 0 02 007037' MOVEM SAVDA1-200(2) ; save data
5907 007204' 350 00 0 00 000002 AOS 2 ; increment address
5908 007205' 307 02 0 00 000103 CAIG 2,103 ; done yet?
5909 007206' 254 00 0 00 007174' JRST MA35P1 ; no - continue
5910
5911 007207' 200 01 0 00 001114* MOVE 1,SCOSW ; get switches
5912 007210' 603 01 0 00 000200 TLNE 1,TXTINH ; full printout?
5913 007211' 037 00 0 00 013050' TMSGC <LS> ; no
5914 007212' 607 01 0 00 000200 TLNN 1,TXTINH ; full printout?
5915 007213' 037 00 0 00 013051' TMSGC <LS address: > ; yes
5916 007214' 200 00 0 00 007241' MOVE SAVDA1+2
5917 007215' 200 01 0 00 007242' MOVE 1,SAVDA1+3
5918 007216' 242 01 0 00 000040 LSH 1,^D32
5919 007217' 246 01 0 00 000004 LSHC 1,4
5920 007220' 037 04 0 00 000000 PNT4
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 91
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1511
5921 007221' 200 01 0 00 007207* MOVE 1,SCOSW ; get switches
5922 007222' 603 01 0 00 000200 TLNE 1,TXTINH ; full printout?
5923 007223' 037 00 0 00 013055' TMSG <(C): > ; no
5924 007224' 607 01 0 00 000200 TLNN 1,TXTINH ; full printout?
5925 007225' 037 00 0 00 013057' TMSGC <Data: Correct >
5926 007226' 200 00 0 00 007237' MOVE SAVDA1
5927 007227' 037 13 0 00 000000 PNTHW
5928 007230' 603 01 0 00 000200 TLNE 1,TXTINH ; full printout?
5929 007231' 037 00 0 00 013063' TMSGC < (A): > ; no
5930 007232' 607 01 0 00 000200 TLNN 1,TXTINH ; full printout?
5931 007233' 037 00 0 00 013067' TMSGC < Actual > ; yes
5932 007234' 200 00 0 00 007240' MOVE SAVDA1+1
5933 007235' 037 13 0 00 000000 PNTHW
5934 007236' 263 17 0 00 000000 RTN
5935
5936 007237' SAVDA1: BLOCK 4 ; data area
5937
5938 ; Microcode:
5939
5940 007243' 577700 000000 T35M: MWORD <ADDR=5777,JZ> ; 5777
5941 007244' 000000 000000
5942
5943 ; Build data patterns
5944
5945 007245' 000000 000000 MWORD <ADDR=0,CONT,SD0,AND,B=7,D=2> ; 0
5946 007246' 742003 400340
5947 007247' 000110 000000 MWORD <CJS,J=1000,S0A,A=7,B=10,OR,D=2> ; 1 - 0's
5948 007250' 432074 000020
5949 007251' 000210 000000 MWORD <CJS,J=1000,S0A,A=7,B=10,XNOR,D=2> ; 2 - comp
5950 007252' 472074 000020
5951 007253' 000300 000000 MWORD <CONT,S0A,PLUS,CRY,A=7,B=7,D=2> ; 3
5952 007254' 402073 400740
5953 007255' 000410 000000 MWORD <CJS,J=1000,S0A,A=7,B=10,OR,D=2> ; 4 - 1
5954 007256' 432074 000020
5955 007257' 000510 000000 MWORD <CJS,J=1000,S0A,A=7,B=10,XNOR,D=2> ; 5 - comp
5956 007260' 472074 000020
5957 007261' 000600 000000 MWORD <CONT,S0A,OR,A=7,B=7,D=7> ; 6
5958 007262' 437073 400340
5959 007263' 000710 000000 MWORD <CJS,J=1000,S0A,A=7,B=10,OR,D=2> ; 7 - 2
5960 007264' 432074 000020
5961 007265' 001010 000000 MWORD <CJS,J=1000,S0A,A=7,B=10,XNOR,D=2> ; 10 - comp
5962 007266' 472074 000020
5963 007267' 001100 000000 MWORD <CONT,S0A,OR,A=7,B=7,D=7> ; 11
5964 007270' 437073 400340
5965 007271' 001210 000000 MWORD <CJS,J=1000,S0A,A=7,B=10,OR,D=2> ; 12 - 4
5966 007272' 432074 000020
5967 007273' 001310 000000 MWORD <CJS,J=1000,S0A,A=7,B=10,XNOR,D=2> ; 13 - comp
5968 007274' 472074 000020
5969 007275' 001400 000000 MWORD <CONT,S0A,OR,A=7,B=7,D=7> ; 14
5970 007276' 437073 400340
5971 007277' 001510 000000 MWORD <CJS,J=1000,S0A,A=7,B=10,OR,D=2> ; 15 - 10
5972 007300' 432074 000020
5973 007301' 001610 000000 MWORD <CJS,J=1000,S0A,A=7,B=10,XNOR,D=2> ; 16 - comp
5974 007302' 472074 000020
5975 007303' 001700 000000 MWORD <CONT,S0A,OR,A=7,B=7,D=7> ; 17
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 91-1
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1512
5976 007304' 437073 400340
5977 007305' 002010 000000 MWORD <CJS,J=1000,S0A,A=7,B=10,OR,D=2> ; 20 - 20
5978 007306' 432074 000020
5979 007307' 002110 000000 MWORD <CJS,J=1000,S0A,A=7,B=10,XNOR,D=2> ; 21 - comp
5980 007310' 472074 000020
5981 007311' 002200 000000 MWORD <CONT,S0A,OR,A=7,B=7,D=7> ; 22
5982 007312' 437073 400340
5983 007313' 002310 000000 MWORD <CJS,J=1000,S0A,A=7,B=10,OR,D=2> ; 23 - 40
5984 007314' 432074 000020
5985 007315' 002410 000000 MWORD <CJS,J=1000,S0A,A=7,B=10,XNOR,D=2> ; 24 - comp
5986 007316' 472074 000020
5987 007317' 002500 000000 MWORD <CONT,S0A,OR,A=7,B=7,D=7> ; 25
5988 007320' 437073 400340
5989 007321' 002610 000000 MWORD <CJS,J=1000,S0A,A=7,B=10,OR,D=2> ; 26 - 100
5990 007322' 432074 000020
5991 007323' 002710 000000 MWORD <CJS,J=1000,S0A,A=7,B=10,XNOR,D=2> ; 27 - comp
5992 007324' 472074 000020
5993 007325' 003000 000000 MWORD <CONT,S0A,OR,A=7,B=7,D=7> ; 30
5994 007326' 437073 400340
5995 007327' 003110 000000 MWORD <CJS,J=1000,S0A,A=7,B=10,OR,D=2> ; 31 - 200
5996 007330' 432074 000020
5997 007331' 003210 000000 MWORD <CJS,J=1000,S0A,A=7,B=10,XNOR,D=2> ; 32 - comp
5998 007332' 472074 000020
5999 007333' 003300 000000 MWORD <CONT,S0A,OR,A=7,B=7,D=7> ; 33
6000 007334' 437073 400340
6001 007335' 003410 000000 MWORD <CJS,J=1000,S0A,A=7,B=10,OR,D=2> ; 34 - 400
6002 007336' 432074 000020
6003 007337' 003510 000000 MWORD <CJS,J=1000,S0A,A=7,B=10,XNOR,D=2> ; 35 - comp
6004 007340' 472074 000020
6005 007341' 003600 000000 MWORD <CONT,S0A,OR,A=7,B=7,D=7> ; 36
6006 007342' 437073 400340
6007 007343' 003710 000000 MWORD <CJS,J=1000,S0A,A=7,B=10,OR,D=2> ; 37 - 1000
6008 007344' 432074 000020
6009 007345' 004010 000000 MWORD <CJS,J=1000,S0A,A=7,B=10,XNOR,D=2> ; 40 - comp
6010 007346' 472074 000020
6011 007347' 004100 000000 MWORD <CONT,S0A,OR,A=7,B=7,D=7> ; 41
6012 007350' 437073 400340
6013 007351' 004210 000000 MWORD <CJS,J=1000,S0A,A=7,B=10,OR,D=2> ; 42 - 2000
6014 007352' 432074 000020
6015 007353' 004310 000000 MWORD <CJS,J=1000,S0A,A=7,B=10,XNOR,D=2> ; 43 - comp
6016 007354' 472074 000020
6017 007355' 004400 000000 MWORD <CONT,S0A,OR,A=7,B=7,D=7> ; 44
6018 007356' 437073 400340
6019 007357' 004510 000000 MWORD <CJS,J=1000,S0A,A=7,B=10,OR,D=2> ; 45 - 4000
6020 007360' 432074 000020
6021 007361' 004610 000000 MWORD <CJS,J=1000,S0A,A=7,B=10,XNOR,D=2> ; 46 - comp
6022 007362' 472074 000020
6023 007363' 004700 000000 MWORD <CONT,S0A,OR,A=7,B=7,D=7> ; 47
6024 007364' 437073 400340
6025 007365' 005010 000000 MWORD <CJS,J=1000,S0A,A=7,B=10,OR,D=2> ; 50 - 10000
6026 007366' 432074 000020
6027 007367' 005110 000000 MWORD <CJS,J=1000,S0A,A=7,B=10,XNOR,D=2> ; 51 - comp
6028 007370' 472074 000020
6029 007371' 005200 000000 MWORD <CONT,S0A,OR,A=7,B=7,D=7> ; 52
6030 007372' 437073 400340
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 91-2
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1513
6031 007373' 005310 000000 MWORD <CJS,J=1000,S0A,A=7,B=10,OR,D=2> ; 53 - 20000
6032 007374' 432074 000020
6033 007375' 005410 000000 MWORD <CJS,J=1000,S0A,A=7,B=10,XNOR,D=2> ; 54 - comp
6034 007376' 472074 000020
6035 007377' 005500 000000 MWORD <CONT,S0A,OR,A=7,B=7,D=7> ; 55
6036 007400' 437073 400340
6037 007401' 005610 000000 MWORD <CJS,J=1000,S0A,A=7,B=10,OR,D=2> ; 56 - 40000
6038 007402' 432074 000020
6039 007403' 005710 000000 MWORD <CJS,J=1000,S0A,A=7,B=10,XNOR,D=2> ; 57 - comp
6040 007404' 472074 000020
6041 007405' 006000 000000 MWORD <CONT,S0A,OR,A=7,B=7,D=7> ; 60
6042 007406' 437073 400340
6043 007407' 006110 000000 MWORD <CJS,J=1000,S0A,A=7,B=10,OR,D=2> ; 61 - 100000
6044 007410' 432074 000020
6045 007411' 006210 000000 MWORD <CJS,J=1000,S0A,A=7,B=10,XNOR,D=2> ; 62 - comp
6046 007412' 472074 000020
6047 007413' 006300 000000 MWORD <CONT,S0A,OR,A=7,B=7,D=7> ; 63
6048 007414' 437073 400340
6049 007415' 006410 000000 MWORD <CJS,J=1000,S0A,A=7,B=10,OR,D=2> ; 64 - 200000
6050 007416' 432074 000020
6051 007417' 006510 000000 MWORD <CJS,J=1000,S0A,A=7,B=10,XNOR,D=2> ; 65 - comp
6052 007420' 472074 000020
6053 007421' 006600 000000 MWORD <CONT,S0A,OR,A=7,B=7,D=7> ; 66
6054 007422' 437073 400340
6055 007423' 006710 000000 MWORD <CJS,J=1000,S0A,A=7,B=10,OR,D=2> ; 67 - 400000
6056 007424' 432074 000020
6057 007425' 007010 000000 MWORD <CJS,J=1000,S0A,A=7,B=10,XNOR,D=2> ; 70 - comp
6058 007426' 472074 000020
6059 007427' 007100 000000 MWORD <CONT,S0A,OR,A=7,B=7,D=7> ; 71
6060 007430' 437073 400340
6061 007431' 007210 000000 MWORD <CJS,J=1000,S0A,A=7,B=10,OR,D=2> ; 72 - 1,,0
6062 007432' 432074 000020
6063 007433' 007310 000000 MWORD <CJS,J=1000,S0A,A=7,B=10,XNOR,D=2> ; 73 - comp
6064 007434' 472074 000020
6065 007435' 007400 000000 MWORD <CONT,S0A,OR,A=7,B=7,D=7> ; 74
6066 007436' 437073 400340
6067 007437' 007510 000000 MWORD <CJS,J=1000,S0A,A=7,B=10,OR,D=2> ; 75 - 2,,0
6068 007440' 432074 000020
6069 007441' 007610 000000 MWORD <CJS,J=1000,S0A,A=7,B=10,XNOR,D=2> ; 76 - comp
6070 007442' 472074 000020
6071 007443' 007700 000000 MWORD <CONT,S0A,OR,A=7,B=7,D=7> ; 77
6072 007444' 437073 400340
6073 007445' 010010 000000 MWORD <CJS,J=1000,S0A,A=7,B=10,OR,D=2> ; 100 - 4,,0
6074 007446' 432074 000020
6075 007447' 010110 000000 MWORD <CJS,J=1000,S0A,A=7,B=10,XNOR,D=2> ; 101 - comp
6076 007450' 472074 000020
6077 007451' 010200 000000 MWORD <CONT,S0A,OR,A=7,B=7,D=7> ; 102
6078 007452' 437073 400340
6079 007453' 010310 000000 MWORD <CJS,J=1000,S0A,A=7,B=10,OR,D=2> ; 103 - 10,,0
6080 007454' 432074 000020
6081 007455' 010410 000000 MWORD <CJS,J=1000,S0A,A=7,B=10,XNOR,D=2> ; 104 - comp
6082 007456' 472074 000020
6083 007457' 010500 000000 MWORD <CONT,S0A,OR,A=7,B=7,D=7> ; 105
6084 007460' 437073 400340
6085 007461' 010610 000000 MWORD <CJS,J=1000,S0A,A=7,B=10,OR,D=2> ; 106 - 20,,0
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 91-3
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1514
6086 007462' 432074 000020
6087 007463' 010710 000000 MWORD <CJS,J=1000,S0A,A=7,B=10,XNOR,D=2> ; 107 - comp
6088 007464' 472074 000020
6089 007465' 011000 000000 MWORD <CONT,S0A,OR,A=7,B=7,D=7> ; 110
6090 007466' 437073 400340
6091 007467' 011110 000000 MWORD <CJS,J=1000,S0A,A=7,B=10,OR,D=2> ; 111 - 40,,0
6092 007470' 432074 000020
6093 007471' 011210 000000 MWORD <CJS,J=1000,S0A,A=7,B=10,XNOR,D=2> ; 112 - comp
6094 007472' 472074 000020
6095 007473' 011300 000000 MWORD <CONT,S0A,OR,A=7,B=7,D=7> ; 113
6096 007474' 437073 400340
6097 007475' 011410 000000 MWORD <CJS,J=1000,S0A,A=7,B=10,OR,D=2> ; 114 - 100,,0
6098 007476' 432074 000020
6099 007477' 011510 000000 MWORD <CJS,J=1000,S0A,A=7,B=10,XNOR,D=2> ; 115 - comp
6100 007500' 472074 000020
6101 007501' 011600 000000 MWORD <CONT,S0A,OR,A=7,B=7,D=7> ; 116
6102 007502' 437073 400340
6103 007503' 011710 000000 MWORD <CJS,J=1000,S0A,A=7,B=10,OR,D=2> ; 117 - 200,,0
6104 007504' 432074 000020
6105 007505' 012010 000000 MWORD <CJS,J=1000,S0A,A=7,B=10,XNOR,D=2> ; 120 - comp
6106 007506' 472074 000020
6107 007507' 012100 000000 MWORD <CONT,S0A,OR,A=7,B=7,D=7> ; 121
6108 007510' 437073 400340
6109 007511' 012210 000000 MWORD <CJS,J=1000,S0A,A=7,B=10,OR,D=2> ; 122 - 400,,0
6110 007512' 432074 000020
6111 007513' 012310 000000 MWORD <CJS,J=1000,S0A,A=7,B=10,XNOR,D=2> ; 123 - comp
6112 007514' 472074 000020
6113 007515' 012400 000000 MWORD <CONT,S0A,OR,A=7,B=7,D=7> ; 124
6114 007516' 437073 400340
6115 007517' 012510 000000 MWORD <CJS,J=1000,S0A,A=7,B=10,OR,D=2> ; 125 - 1000,,0
6116 007520' 432074 000020
6117 007521' 012610 000000 MWORD <CJS,J=1000,S0A,A=7,B=10,XNOR,D=2> ; 126 - comp
6118 007522' 472074 000020
6119 007523' 012700 000000 MWORD <CONT,S0A,OR,A=7,B=7,D=7> ; 127
6120 007524' 437073 400340
6121 007525' 013010 000000 MWORD <CJS,J=1000,S0A,A=7,B=10,OR,D=2> ; 130 - 2000,,0
6122 007526' 432074 000020
6123 007527' 013110 000000 MWORD <CJS,J=1000,S0A,A=7,B=10,XNOR,D=2> ; 131 - comp
6124 007530' 472074 000020
6125 007531' 013200 000000 MWORD <CONT,S0A,OR,A=7,B=7,D=7> ; 132
6126 007532' 437073 400340
6127 007533' 013310 000000 MWORD <CJS,J=1000,S0A,A=7,B=10,OR,D=2> ; 133 - 4000,,0
6128 007534' 432074 000020
6129 007535' 013410 000000 MWORD <CJS,J=1000,S0A,A=7,B=10,XNOR,D=2> ; 134 - comp
6130 007536' 472074 000020
6131 007537' 013500 000000 MWORD <CONT,S0A,OR,A=7,B=7,D=7> ; 135
6132 007540' 437073 400340
6133 007541' 013610 000000 MWORD <CJS,J=1000,S0A,A=7,B=10,OR,D=2> ; 136 - 10000,,0
6134 007542' 432074 000020
6135 007543' 013710 000000 MWORD <CJS,J=1000,S0A,A=7,B=10,XNOR,D=2> ; 137 - comp
6136 007544' 472074 000020
6137 007545' 014000 000000 MWORD <CONT,S0A,OR,A=7,B=7,D=7> ; 140
6138 007546' 437073 400340
6139 007547' 014110 000000 MWORD <CJS,J=1000,S0A,A=7,B=10,OR,D=2> ; 141 - 20000,,0
6140 007550' 432074 000020
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 91-4
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1515
6141 007551' 014210 000000 MWORD <CJS,J=1000,S0A,A=7,B=10,XNOR,D=2> ; 142 - comp
6142 007552' 472074 000020
6143 007553' 014300 000000 MWORD <CONT,S0A,OR,A=7,B=7,D=7> ; 143
6144 007554' 437073 400340
6145 007555' 014410 000000 MWORD <CJS,J=1000,S0A,A=7,B=10,OR,D=2> ; 144 - 40000,,0
6146 007556' 432074 000020
6147 007557' 014510 000000 MWORD <CJS,J=1000,S0A,A=7,B=10,XNOR,D=2> ; 145 - comp
6148 007560' 472074 000020
6149 007561' 014600 000000 MWORD <CONT,S0A,OR,A=7,B=7,D=7> ; 146
6150 007562' 437073 400340
6151 007563' 014710 000000 MWORD <CJS,J=1000,S0A,A=7,B=10,OR,D=2> ; 147 - 100000,,0
6152 007564' 432074 000020
6153 007565' 015010 000000 MWORD <CJS,J=1000,S0A,A=7,B=10,XNOR,D=2> ; 150 - comp
6154 007566' 472074 000020
6155 007567' 015100 000000 MWORD <CONT,S0A,OR,A=7,B=7,D=7> ; 151
6156 007570' 437073 400340
6157 007571' 015210 000000 MWORD <CJS,J=1000,S0A,A=7,B=10,OR,D=2> ; 152 - 200000,,0
6158 007572' 432074 000020
6159 007573' 015310 000000 MWORD <CJS,J=1000,S0A,A=7,B=10,XNOR,D=2> ; 153 - comp
6160 007574' 472074 000020
6161 007575' 015400 000000 MWORD <CONT,S0A,OR,A=7,B=7,D=7> ; 154
6162 007576' 437073 400340
6163 007577' 015510 000000 MWORD <CJS,J=1000,S0A,A=7,B=10,OR,D=2> ; 155 - 400000,,0
6164 007600' 432074 000020
6165 007601' 015610 000000 MWORD <CJS,J=1000,S0A,A=7,B=10,XNOR,D=2> ; 156 - comp
6166 007602' 472074 000020
6167 007603' 015701 570000 MWORD <JMAP,J=157,BAD> ; 157 - done - exit
6168 007604' 000000 000041
6169
6170 ; Error address
6171
6172 007605' 016001 600000 MWORD <ADDR=160,JMAP,J=160,BAD> ; 160 - error - exit
6173 007606' 000000 000041
6174
6175 ; Read R10 to get correct data
6176 ; Read R11 to get actual data
6177 ; Read R12 to get part of LS addr
6178 ; Read R13 to get rest of LS addr
6179
6180 007607' 020002 042004 MWORD <ADDR=200,JMAP,J=204,S0A,A=10,D=1,OENA,SELE,MGC=4>
6181 007610' 401100 005040
6182 007611' 020102 042004 MWORD <JMAP,J=204,S0A,A=11,D=1,OENA,SELE,MGC=4>
6183 007612' 401110 005040
6184 007613' 020202 042004 MWORD <JMAP,J=204,S0A,A=12,D=1,OENA,SELE,MGC=4>
6185 007614' 401120 005040
6186 007615' 020302 042004 MWORD <JMAP,J=204,S0A,A=13,D=1,OENA,SELE,MGC=4>
6187 007616' 401130 005040
6188 007617' 020402 040000 MWORD <JMAP,J=204>
6189 007620' 000000 000040
6190
6191 ; Write/read each page
6192
6193 007621' 100020 000000 MWORD <ADDR=1000,CJS,J=2000,SD0,OR,B=12,D=1,MGC=0,LSAD> ; 1000 - 0
6194 007622' 731005 200020
6195 007623' 100120 000040 MWORD <CJS,J=2000,SD0,OR,B=12,D=1,MGC=40,LSAD> ; 1001 - 1
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 91-5
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1516
6196 007624' 731005 200020
6197 007625' 100220 000100 MWORD <CJS,J=2000,SD0,OR,B=12,D=1,MGC=100,LSAD> ; 1002 - 2
6198 007626' 731005 200020
6199 007627' 100320 000140 MWORD <CJS,J=2000,SD0,OR,B=12,D=1,MGC=140,LSAD> ; 1003 - 3
6200 007630' 731005 200020
6201 007631' 100420 000200 MWORD <CJS,J=2000,SD0,OR,B=12,D=1,MGC=200,LSAD> ; 1004 - 4
6202 007632' 731005 200020
6203 007633' 100520 000240 MWORD <CJS,J=2000,SD0,OR,B=12,D=1,MGC=240,LSAD> ; 1005 - 5
6204 007634' 731005 200020
6205 007635' 100620 000300 MWORD <CJS,J=2000,SD0,OR,B=12,D=1,MGC=300,LSAD> ; 1006 - 6
6206 007636' 731005 200020
6207 007637' 100720 000340 MWORD <CJS,J=2000,SD0,OR,B=12,D=1,MGC=340,LSAD> ; 1007 - 7
6208 007640' 731005 200020
6209 007641' 101020 000400 MWORD <CJS,J=2000,SD0,OR,B=12,D=1,MGC=400,LSAD> ; 1010 - 10
6210 007642' 731005 200020
6211 007643' 101120 000440 MWORD <CJS,J=2000,SD0,OR,B=12,D=1,MGC=440,LSAD> ; 1011 - 11
6212 007644' 731005 200020
6213 007645' 101220 000500 MWORD <CJS,J=2000,SD0,OR,B=12,D=1,MGC=500,LSAD> ; 1012 - 12
6214 007646' 731005 200020
6215 007647' 101320 000540 MWORD <CJS,J=2000,SD0,OR,B=12,D=1,MGC=540,LSAD> ; 1013 - 13
6216 007650' 731005 200020
6217 007651' 101420 000600 MWORD <CJS,J=2000,SD0,OR,B=12,D=1,MGC=600,LSAD> ; 1014 - 14
6218 007652' 731005 200020
6219 007653' 101520 000640 MWORD <CJS,J=2000,SD0,OR,B=12,D=1,MGC=640,LSAD> ; 1015 - 15
6220 007654' 731005 200020
6221 007655' 101620 000700 MWORD <CJS,J=2000,SD0,OR,B=12,D=1,MGC=700,LSAD> ; 1016 - 16
6222 007656' 731005 200020
6223 007657' 101720 000740 MWORD <CJS,J=2000,SD0,OR,B=12,D=1,MGC=740,LSAD> ; 1017 - 17
6224 007660' 731005 200020
6225 007661' 102020 001000 MWORD <CJS,J=2000,SD0,OR,B=12,D=1,MGC=1000,LSAD> ; 1020 - 20
6226 007662' 731005 200020
6227 007663' 102120 001040 MWORD <CJS,J=2000,SD0,OR,B=12,D=1,MGC=1040,LSAD> ; 1021 - 21
6228 007664' 731005 200020
6229 007665' 102220 001100 MWORD <CJS,J=2000,SD0,OR,B=12,D=1,MGC=1100,LSAD> ; 1022 - 22
6230 007666' 731005 200020
6231 007667' 102320 001140 MWORD <CJS,J=2000,SD0,OR,B=12,D=1,MGC=1140,LSAD> ; 1023 - 23
6232 007670' 731005 200020
6233 007671' 102420 001200 MWORD <CJS,J=2000,SD0,OR,B=12,D=1,MGC=1200,LSAD> ; 1024 - 24
6234 007672' 731005 200020
6235 007673' 102520 001240 MWORD <CJS,J=2000,SD0,OR,B=12,D=1,MGC=1240,LSAD> ; 1025 - 25
6236 007674' 731005 200020
6237 007675' 102620 001300 MWORD <CJS,J=2000,SD0,OR,B=12,D=1,MGC=1300,LSAD> ; 1026 - 26
6238 007676' 731005 200020
6239 007677' 102720 001340 MWORD <CJS,J=2000,SD0,OR,B=12,D=1,MGC=1340,LSAD> ; 1027 - 27
6240 007700' 731005 200020
6241 007701' 103020 001400 MWORD <CJS,J=2000,SD0,OR,B=12,D=1,MGC=1400,LSAD> ; 1030 - 30
6242 007702' 731005 200020
6243 007703' 103120 001440 MWORD <CJS,J=2000,SD0,OR,B=12,D=1,MGC=1440,LSAD> ; 1031 - 31
6244 007704' 731005 200020
6245 007705' 103220 001500 MWORD <CJS,J=2000,SD0,OR,B=12,D=1,MGC=1500,LSAD> ; 1032 - 32
6246 007706' 731005 200020
6247 007707' 103320 001540 MWORD <CJS,J=2000,SD0,OR,B=12,D=1,MGC=1540,LSAD> ; 1033 - 33
6248 007710' 731005 200020
6249 007711' 103420 001600 MWORD <CJS,J=2000,SD0,OR,B=12,D=1,MGC=1600,LSAD> ; 1034 - 34
6250 007712' 731005 200020
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 91-6
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1517
6251 007713' 103520 001640 MWORD <CJS,J=2000,SD0,OR,B=12,D=1,MGC=1640,LSAD> ; 1035 - 35
6252 007714' 731005 200020
6253 007715' 103620 001700 MWORD <CJS,J=2000,SD0,OR,B=12,D=1,MGC=1700,LSAD> ; 1036 - 36
6254 007716' 731005 200020
6255 007717' 103720 001740 MWORD <CJS,J=2000,SD0,OR,B=12,D=1,MGC=1740,LSAD> ; 1037 - 37
6256 007720' 731005 200020
6257 007721' 104000 000000 MWORD <CRTN> ; 1040 - exit
6258 007722' 000000 000240
6259
6260 ; Write/read the LS address locations
6261
6262 007723' 200000 002000 MWORD <ADDR=2000,CONT,MGC=0,S0A,OR,A=10,OENA,D=1,RAM,LDLM> ; 2000 - 0
6263 007724' 431300 230340
6264 007725' 200100 000000 MWORD <CONT,MGC=0,SD0,OR,D=2,B=11,RAM,RDLM> ; 2001
6265 007726' 732204 620340
6266 007727' 200220 040000 MWORD <CJP,J=2004,SAB,XOR,A=10,B=11,D=1,CENA,CCFZ> ; 2002
6267 007730' 161504 420060
6268 007731' 200301 600000 MWORD <JMAP,J=160,SD0,SKCN,MGC=0,OR,B=12,D=2> ; 2003
6269 007732' 732005 240040
6270
6271 007733' 200400 002001 MWORD <CONT,MGC=1,S0A,OR,A=10,OENA,D=1,RAM,LDLM> ; 2004 - 1
6272 007734' 431300 230340
6273 007735' 200500 000001 MWORD <CONT,MGC=1,SD0,OR,D=2,B=11,RAM,RDLM> ; 2005
6274 007736' 732204 620340
6275 007737' 200620 100000 MWORD <CJP,J=2010,SAB,XOR,A=10,B=11,D=1,CENA,CCFZ> ; 2006
6276 007740' 161504 420060
6277 007741' 200701 600001 MWORD <JMAP,J=160,SD0,SKCN,MGC=1,OR,B=12,D=2> ; 2007
6278 007742' 732005 240040
6279
6280 007743' 201000 002002 MWORD <CONT,MGC=2,S0A,OR,A=10,OENA,D=1,RAM,LDLM> ; 2010 - 2
6281 007744' 431300 230340
6282 007745' 201100 000002 MWORD <CONT,MGC=2,SD0,OR,D=2,B=11,RAM,RDLM> ; 2011
6283 007746' 732204 620340
6284 007747' 201220 140000 MWORD <CJP,J=2014,SAB,XOR,A=10,B=11,D=1,CENA,CCFZ> ; 2012
6285 007750' 161504 420060
6286 007751' 201301 600002 MWORD <JMAP,J=160,SD0,SKCN,MGC=2,OR,B=12,D=2> ; 2013
6287 007752' 732005 240040
6288
6289 007753' 201400 002003 MWORD <CONT,MGC=3,S0A,OR,A=10,OENA,D=1,RAM,LDLM> ; 2014 - 3
6290 007754' 431300 230340
6291 007755' 201500 000003 MWORD <CONT,MGC=3,SD0,OR,D=2,B=11,RAM,RDLM> ; 2015
6292 007756' 732204 620340
6293 007757' 201620 200000 MWORD <CJP,J=2020,SAB,XOR,A=10,B=11,D=1,CENA,CCFZ> ; 2016
6294 007760' 161504 420060
6295 007761' 201701 600003 MWORD <JMAP,J=160,SD0,SKCN,MGC=3,OR,B=12,D=2> ; 2017
6296 007762' 732005 240040
6297
6298 007763' 202000 002004 MWORD <CONT,MGC=4,S0A,OR,A=10,OENA,D=1,RAM,LDLM> ; 2020 - 4
6299 007764' 431300 230340
6300 007765' 202100 000004 MWORD <CONT,MGC=4,SD0,OR,D=2,B=11,RAM,RDLM> ; 2021
6301 007766' 732204 620340
6302 007767' 202220 240000 MWORD <CJP,J=2024,SAB,XOR,A=10,B=11,D=1,CENA,CCFZ> ; 2022
6303 007770' 161504 420060
6304 007771' 202301 600004 MWORD <JMAP,J=160,SD0,SKCN,MGC=4,OR,B=12,D=2> ; 2023
6305 007772' 732005 240040
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 91-7
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1518
6306
6307 007773' 202400 002005 MWORD <CONT,MGC=5,S0A,OR,A=10,OENA,D=1,RAM,LDLM> ; 2024 - 5
6308 007774' 431300 230340
6309 007775' 202500 000005 MWORD <CONT,MGC=5,SD0,OR,D=2,B=11,RAM,RDLM> ; 2025
6310 007776' 732204 620340
6311 007777' 202620 300000 MWORD <CJP,J=2030,SAB,XOR,A=10,B=11,D=1,CENA,CCFZ> ; 2026
6312 010000' 161504 420060
6313 010001' 202701 600005 MWORD <JMAP,J=160,SD0,SKCN,MGC=5,OR,B=12,D=2> ; 2027
6314 010002' 732005 240040
6315
6316 010003' 203000 002006 MWORD <CONT,MGC=6,S0A,OR,A=10,OENA,D=1,RAM,LDLM> ; 2030 - 6
6317 010004' 431300 230340
6318 010005' 203100 000006 MWORD <CONT,MGC=6,SD0,OR,D=2,B=11,RAM,RDLM> ; 2031
6319 010006' 732204 620340
6320 010007' 203220 340000 MWORD <CJP,J=2034,SAB,XOR,A=10,B=11,D=1,CENA,CCFZ> ; 2032
6321 010010' 161504 420060
6322 010011' 203301 600006 MWORD <JMAP,J=160,SD0,SKCN,MGC=6,OR,B=12,D=2> ; 2033
6323 010012' 732005 240040
6324
6325 010013' 203400 002007 MWORD <CONT,MGC=7,S0A,OR,A=10,OENA,D=1,RAM,LDLM> ; 2034 - 7
6326 010014' 431300 230340
6327 010015' 203500 000007 MWORD <CONT,MGC=7,SD0,OR,D=2,B=11,RAM,RDLM> ; 2035
6328 010016' 732204 620340
6329 010017' 203620 400000 MWORD <CJP,J=2040,SAB,XOR,A=10,B=11,D=1,CENA,CCFZ> ; 2036
6330 010020' 161504 420060
6331 010021' 203701 600007 MWORD <JMAP,J=160,SD0,SKCN,MGC=7,OR,B=12,D=2> ; 2037
6332 010022' 732005 240040
6333
6334 010023' 204000 002010 MWORD <CONT,MGC=10,S0A,OR,A=10,OENA,D=1,RAM,LDLM> ; 2040 - 10
6335 010024' 431300 230340
6336 010025' 204100 000010 MWORD <CONT,MGC=10,SD0,OR,D=2,B=11,RAM,RDLM> ; 2041
6337 010026' 732204 620340
6338 010027' 204220 440000 MWORD <CJP,J=2044,SAB,XOR,A=10,B=11,D=1,CENA,CCFZ> ; 2042
6339 010030' 161504 420060
6340 010031' 204301 600010 MWORD <JMAP,J=160,SD0,SKCN,MGC=10,OR,B=12,D=2> ; 2043
6341 010032' 732005 240040
6342
6343 010033' 204400 002011 MWORD <CONT,MGC=11,S0A,OR,A=10,OENA,D=1,RAM,LDLM> ; 2044 - 11
6344 010034' 431300 230340
6345 010035' 204500 000011 MWORD <CONT,MGC=11,SD0,OR,D=2,B=11,RAM,RDLM> ; 2045
6346 010036' 732204 620340
6347 010037' 204620 500000 MWORD <CJP,J=2050,SAB,XOR,A=10,B=11,D=1,CENA,CCFZ> ; 2046
6348 010040' 161504 420060
6349 010041' 204701 600011 MWORD <JMAP,J=160,SD0,SKCN,MGC=11,OR,B=12,D=2> ; 2047
6350 010042' 732005 240040
6351
6352 010043' 205000 002012 MWORD <CONT,MGC=12,S0A,OR,A=10,OENA,D=1,RAM,LDLM> ; 2050 - 12
6353 010044' 431300 230340
6354 010045' 205100 000012 MWORD <CONT,MGC=12,SD0,OR,D=2,B=11,RAM,RDLM> ; 2051
6355 010046' 732204 620340
6356 010047' 205220 540000 MWORD <CJP,J=2054,SAB,XOR,A=10,B=11,D=1,CENA,CCFZ> ; 2052
6357 010050' 161504 420060
6358 010051' 205301 600012 MWORD <JMAP,J=160,SD0,SKCN,MGC=12,OR,B=12,D=2> ; 2053
6359 010052' 732005 240040
6360
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 91-8
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1519
6361 010053' 205400 002013 MWORD <CONT,MGC=13,S0A,OR,A=10,OENA,D=1,RAM,LDLM> ; 2054 - 13
6362 010054' 431300 230340
6363 010055' 205500 000013 MWORD <CONT,MGC=13,SD0,OR,D=2,B=11,RAM,RDLM> ; 2055
6364 010056' 732204 620340
6365 010057' 205620 600000 MWORD <CJP,J=2060,SAB,XOR,A=10,B=11,D=1,CENA,CCFZ> ; 2056
6366 010060' 161504 420060
6367 010061' 205701 600013 MWORD <JMAP,J=160,SD0,SKCN,MGC=13,OR,B=12,D=2> ; 2057
6368 010062' 732005 240040
6369
6370 010063' 206000 002014 MWORD <CONT,MGC=14,S0A,OR,A=10,OENA,D=1,RAM,LDLM> ; 2060 - 14
6371 010064' 431300 230340
6372 010065' 206100 000014 MWORD <CONT,MGC=14,SD0,OR,D=2,B=11,RAM,RDLM> ; 2061
6373 010066' 732204 620340
6374 010067' 206220 640000 MWORD <CJP,J=2064,SAB,XOR,A=10,B=11,D=1,CENA,CCFZ> ; 2062
6375 010070' 161504 420060
6376 010071' 206301 600014 MWORD <JMAP,J=160,SD0,SKCN,MGC=14,OR,B=12,D=2> ; 2063
6377 010072' 732005 240040
6378
6379 010073' 206400 002015 MWORD <CONT,MGC=15,S0A,OR,A=10,OENA,D=1,RAM,LDLM> ; 2064 - 15
6380 010074' 431300 230340
6381 010075' 206500 000015 MWORD <CONT,MGC=15,SD0,OR,D=2,B=11,RAM,RDLM> ; 2065
6382 010076' 732204 620340
6383 010077' 206620 700000 MWORD <CJP,J=2070,SAB,XOR,A=10,B=11,D=1,CENA,CCFZ> ; 2066
6384 010100' 161504 420060
6385 010101' 206701 600015 MWORD <JMAP,J=160,SD0,SKCN,MGC=15,OR,B=12,D=2> ; 2067
6386 010102' 732005 240040
6387
6388 010103' 207000 002016 MWORD <CONT,MGC=16,S0A,OR,A=10,OENA,D=1,RAM,LDLM> ; 2070 - 16
6389 010104' 431300 230340
6390 010105' 207100 000016 MWORD <CONT,MGC=16,SD0,OR,D=2,B=11,RAM,RDLM> ; 2071
6391 010106' 732204 620340
6392 010107' 207220 740000 MWORD <CJP,J=2074,SAB,XOR,A=10,B=11,D=1,CENA,CCFZ> ; 2072
6393 010110' 161504 420060
6394 010111' 207301 600016 MWORD <JMAP,J=160,SD0,SKCN,MGC=16,OR,B=12,D=2> ; 2073
6395 010112' 732005 240040
6396
6397 010113' 207400 002017 MWORD <CONT,MGC=17,S0A,OR,A=10,OENA,D=1,RAM,LDLM> ; 2074 - 17
6398 010114' 431300 230340
6399 010115' 207500 000017 MWORD <CONT,MGC=17,SD0,OR,D=2,B=11,RAM,RDLM> ; 2075
6400 010116' 732204 620340
6401 010117' 207621 000000 MWORD <CJP,J=2100,SAB,XOR,A=10,B=11,D=1,CENA,CCFZ> ; 2076
6402 010120' 161504 420060
6403 010121' 207701 600017 MWORD <JMAP,J=160,SD0,SKCN,MGC=17,OR,B=12,D=2> ; 2077
6404 010122' 732005 240040
6405
6406 010123' 210000 002020 MWORD <CONT,MGC=20,S0A,OR,A=10,OENA,D=1,RAM,LDLM> ; 2100 - 20
6407 010124' 431300 230340
6408 010125' 210100 000020 MWORD <CONT,MGC=20,SD0,OR,D=2,B=11,RAM,RDLM> ; 2101
6409 010126' 732204 620340
6410 010127' 210221 040000 MWORD <CJP,J=2104,SAB,XOR,A=10,B=11,D=1,CENA,CCFZ> ; 2102
6411 010130' 161504 420060
6412 010131' 210301 600020 MWORD <JMAP,J=160,SD0,SKCN,MGC=20,OR,B=12,D=2> ; 2103
6413 010132' 732005 240040
6414
6415 010133' 210400 002021 MWORD <CONT,MGC=21,S0A,OR,A=10,OENA,D=1,RAM,LDLM> ; 2104 - 21
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 91-9
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1520
6416 010134' 431300 230340
6417 010135' 210500 000021 MWORD <CONT,MGC=21,SD0,OR,D=2,B=11,RAM,RDLM> ; 2105
6418 010136' 732204 620340
6419 010137' 210621 100000 MWORD <CJP,J=2110,SAB,XOR,A=10,B=11,D=1,CENA,CCFZ> ; 2106
6420 010140' 161504 420060
6421 010141' 210701 600021 MWORD <JMAP,J=160,SD0,SKCN,MGC=21,OR,B=12,D=2> ; 2107
6422 010142' 732005 240040
6423
6424 010143' 211000 002022 MWORD <CONT,MGC=22,S0A,OR,A=10,OENA,D=1,RAM,LDLM> ; 2110 - 22
6425 010144' 431300 230340
6426 010145' 211100 000022 MWORD <CONT,MGC=22,SD0,OR,D=2,B=11,RAM,RDLM> ; 2111
6427 010146' 732204 620340
6428 010147' 211221 140000 MWORD <CJP,J=2114,SAB,XOR,A=10,B=11,D=1,CENA,CCFZ> ; 2112
6429 010150' 161504 420060
6430 010151' 211301 600022 MWORD <JMAP,J=160,SD0,SKCN,MGC=22,OR,B=12,D=2> ; 2113
6431 010152' 732005 240040
6432
6433 010153' 211400 002023 MWORD <CONT,MGC=23,S0A,OR,A=10,OENA,D=1,RAM,LDLM> ; 2114 - 23
6434 010154' 431300 230340
6435 010155' 211500 000023 MWORD <CONT,MGC=23,SD0,OR,D=2,B=11,RAM,RDLM> ; 2115
6436 010156' 732204 620340
6437 010157' 211621 200000 MWORD <CJP,J=2120,SAB,XOR,A=10,B=11,D=1,CENA,CCFZ> ; 2116
6438 010160' 161504 420060
6439 010161' 211701 600023 MWORD <JMAP,J=160,SD0,SKCN,MGC=23,OR,B=12,D=2> ; 2117
6440 010162' 732005 240040
6441
6442 010163' 212000 002024 MWORD <CONT,MGC=24,S0A,OR,A=10,OENA,D=1,RAM,LDLM> ; 2120 - 24
6443 010164' 431300 230340
6444 010165' 212100 000024 MWORD <CONT,MGC=24,SD0,OR,D=2,B=11,RAM,RDLM> ; 2121
6445 010166' 732204 620340
6446 010167' 212221 240000 MWORD <CJP,J=2124,SAB,XOR,A=10,B=11,D=1,CENA,CCFZ> ; 2122
6447 010170' 161504 420060
6448 010171' 212301 600024 MWORD <JMAP,J=160,SD0,SKCN,MGC=24,OR,B=12,D=2> ; 2123
6449 010172' 732005 240040
6450
6451 010173' 212400 002025 MWORD <CONT,MGC=25,S0A,OR,A=10,OENA,D=1,RAM,LDLM> ; 2124 - 25
6452 010174' 431300 230340
6453 010175' 212500 000025 MWORD <CONT,MGC=25,SD0,OR,D=2,B=11,RAM,RDLM> ; 2125
6454 010176' 732204 620340
6455 010177' 212621 300000 MWORD <CJP,J=2130,SAB,XOR,A=10,B=11,D=1,CENA,CCFZ> ; 2126
6456 010200' 161504 420060
6457 010201' 212701 600025 MWORD <JMAP,J=160,SD0,SKCN,MGC=25,OR,B=12,D=2> ; 2127
6458 010202' 732005 240040
6459
6460 010203' 213000 002026 MWORD <CONT,MGC=26,S0A,OR,A=10,OENA,D=1,RAM,LDLM> ; 2130 - 26
6461 010204' 431300 230340
6462 010205' 213100 000026 MWORD <CONT,MGC=26,SD0,OR,D=2,B=11,RAM,RDLM> ; 2131
6463 010206' 732204 620340
6464 010207' 213221 340000 MWORD <CJP,J=2134,SAB,XOR,A=10,B=11,D=1,CENA,CCFZ> ; 2132
6465 010210' 161504 420060
6466 010211' 213301 600026 MWORD <JMAP,J=160,SD0,SKCN,MGC=26,OR,B=12,D=2> ; 2133
6467 010212' 732005 240040
6468
6469 010213' 213400 002027 MWORD <CONT,MGC=27,S0A,OR,A=10,OENA,D=1,RAM,LDLM> ; 2134 - 27
6470 010214' 431300 230340
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 91-10
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1521
6471 010215' 213500 000027 MWORD <CONT,MGC=27,SD0,OR,D=2,B=11,RAM,RDLM> ; 2135
6472 010216' 732204 620340
6473 010217' 213621 400000 MWORD <CJP,J=2140,SAB,XOR,A=10,B=11,D=1,CENA,CCFZ> ; 2136
6474 010220' 161504 420060
6475 010221' 213701 600027 MWORD <JMAP,J=160,SD0,SKCN,MGC=27,OR,B=12,D=2> ; 2137
6476 010222' 732005 240040
6477
6478 010223' 214000 002030 MWORD <CONT,MGC=30,S0A,OR,A=10,OENA,D=1,RAM,LDLM> ; 2140 - 30
6479 010224' 431300 230340
6480 010225' 214100 000030 MWORD <CONT,MGC=30,SD0,OR,D=2,B=11,RAM,RDLM> ; 2141
6481 010226' 732204 620340
6482 010227' 214221 440000 MWORD <CJP,J=2144,SAB,XOR,A=10,B=11,D=1,CENA,CCFZ> ; 2142
6483 010230' 161504 420060
6484 010231' 214301 600030 MWORD <JMAP,J=160,SD0,SKCN,MGC=30,OR,B=12,D=2> ; 2143
6485 010232' 732005 240040
6486
6487 010233' 214400 002031 MWORD <CONT,MGC=31,S0A,OR,A=10,OENA,D=1,RAM,LDLM> ; 2144 - 31
6488 010234' 431300 230340
6489 010235' 214500 000031 MWORD <CONT,MGC=31,SD0,OR,D=2,B=11,RAM,RDLM> ; 2145
6490 010236' 732204 620340
6491 010237' 214621 500000 MWORD <CJP,J=2150,SAB,XOR,A=10,B=11,D=1,CENA,CCFZ> ; 2146
6492 010240' 161504 420060
6493 010241' 214701 600031 MWORD <JMAP,J=160,SD0,SKCN,MGC=31,OR,B=12,D=2> ; 2147
6494 010242' 732005 240040
6495
6496 010243' 215000 002032 MWORD <CONT,MGC=32,S0A,OR,A=10,OENA,D=1,RAM,LDLM> ; 2150 - 32
6497 010244' 431300 230340
6498 010245' 215100 000032 MWORD <CONT,MGC=32,SD0,OR,D=2,B=11,RAM,RDLM> ; 2151
6499 010246' 732204 620340
6500 010247' 215221 540000 MWORD <CJP,J=2154,SAB,XOR,A=10,B=11,D=1,CENA,CCFZ> ; 2152
6501 010250' 161504 420060
6502 010251' 215301 600032 MWORD <JMAP,J=160,SD0,SKCN,MGC=32,OR,B=12,D=2> ; 2153
6503 010252' 732005 240040
6504
6505 010253' 215400 002033 MWORD <CONT,MGC=33,S0A,OR,A=10,OENA,D=1,RAM,LDLM> ; 2154 - 33
6506 010254' 431300 230340
6507 010255' 215500 000033 MWORD <CONT,MGC=33,SD0,OR,D=2,B=11,RAM,RDLM> ; 2155
6508 010256' 732204 620340
6509 010257' 215621 600000 MWORD <CJP,J=2160,SAB,XOR,A=10,B=11,D=1,CENA,CCFZ> ; 2156
6510 010260' 161504 420060
6511 010261' 215701 600033 MWORD <JMAP,J=160,SD0,SKCN,MGC=33,OR,B=12,D=2> ; 2157
6512 010262' 732005 240040
6513
6514 010263' 216000 002034 MWORD <CONT,MGC=34,S0A,OR,A=10,OENA,D=1,RAM,LDLM> ; 2160 - 34
6515 010264' 431300 230340
6516 010265' 216100 000034 MWORD <CONT,MGC=34,SD0,OR,D=2,B=11,RAM,RDLM> ; 2161
6517 010266' 732204 620340
6518 010267' 216221 640000 MWORD <CJP,J=2164,SAB,XOR,A=10,B=11,D=1,CENA,CCFZ> ; 2162
6519 010270' 161504 420060
6520 010271' 216301 600034 MWORD <JMAP,J=160,SD0,SKCN,MGC=34,OR,B=12,D=2> ; 2163
6521 010272' 732005 240040
6522
6523 010273' 216400 002035 MWORD <CONT,MGC=35,S0A,OR,A=10,OENA,D=1,RAM,LDLM> ; 2164 - 35
6524 010274' 431300 230340
6525 010275' 216500 000035 MWORD <CONT,MGC=35,SD0,OR,D=2,B=11,RAM,RDLM> ; 2165
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 91-11
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1522
6526 010276' 732204 620340
6527 010277' 216621 700000 MWORD <CJP,J=2170,SAB,XOR,A=10,B=11,D=1,CENA,CCFZ> ; 2166
6528 010300' 161504 420060
6529 010301' 216701 600035 MWORD <JMAP,J=160,SD0,SKCN,MGC=35,OR,B=12,D=2> ; 2167
6530 010302' 732005 240040
6531
6532 010303' 217000 002036 MWORD <CONT,MGC=36,S0A,OR,A=10,OENA,D=1,RAM,LDLM> ; 2170 - 36
6533 010304' 431300 230340
6534 010305' 217100 000036 MWORD <CONT,MGC=36,SD0,OR,D=2,B=11,RAM,RDLM> ; 2171
6535 010306' 732204 620340
6536 010307' 217221 740000 MWORD <CJP,J=2174,SAB,XOR,A=10,B=11,D=1,CENA,CCFZ> ; 2172
6537 010310' 161504 420060
6538 010311' 217301 600036 MWORD <JMAP,J=160,SD0,SKCN,MGC=36,OR,B=12,D=2> ; 2173
6539 010312' 732005 240040
6540
6541 010313' 217400 002037 MWORD <CONT,MGC=37,S0A,OR,A=10,OENA,D=1,RAM,LDLM> ; 2174 - 37
6542 010314' 431300 230340
6543 010315' 217500 000037 MWORD <CONT,MGC=37,SD0,OR,D=2,B=11,RAM,RDLM> ; 2175
6544 010316' 732204 620340
6545 010317' 217622 000000 MWORD <CJP,J=2200,SAB,XOR,A=10,B=11,D=1,CENA,CCFZ> ; 2176
6546 010320' 161504 420060
6547 010321' 217701 600037 MWORD <JMAP,J=160,SD0,SKCN,MGC=37,OR,B=12,D=2> ; 2177
6548 010322' 732005 240040
6549
6550 010323' 220000 000000 MWORD <CRTN> ; 2200
6551 010324' 000000 000240
6552 010325' 777777 777777 -1
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 92
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1523
6553
6554 ;#********************************************************************
6555 ;* TEST 36 - Local Store Address Test
6556 ;
6557 ; Description: This test writes an address pattern to each local
6558 ; storage word, and reads it back and verifies the
6559 ; data read.
6560 ;
6561 ; Procedure: Port Clear
6562 ; Load microcode to write address pattern to each
6563 ; local storage address
6564 ; Start up microcode (this writes each address)
6565 ; Stop microcode
6566 ;
6567 ; Set start address
6568 ; Single step 2 times
6569 ; Read EBUF and verify data
6570 ;
6571 ; Repeat above 3 steps for addresses 0,1,..1777
6572 ;
6573 ; Failure: ---
6574 ;#********************************************************************
6575
6576 ; Test data
6577
6578 010326' 254 00 0 00 010334' TSTU36: JRST TG36 ; go start test
6579 010327' 200403 000036 MPROC!NDMP!ZMPROC!36 ; test mask
6580 010330' 000000 013073' 0,,[ASCIZ ^Local Store Address Test^]
6581 010331' 013100' 013102' [EXP M14,MLAST!M15],,[EXP M2,M13,MLAST!M11]
6582 010332' 000000 010521' TSTU37 ; failure test table
6583 010333' 777777 777777 -1 ; ...
6584
6585 ; Start test
6586
6587 010334' 201 00 0 00 000000' TG36: MOVEI Z8 ; get address of module start
6588 010335' 260 17 0 00 007147* GO TRACE ; handle trace output
6589
6590 ; Initialization
6591
6592 010336' 400 15 0 00 000000 TL36: SETZ ERFLG, ; clear error flag
6593 010337' 260 17 0 00 007154* GO IPACLR ; clear port
6594 010340' 402 00 0 00 007155* SETZM TSTSUB ; initialize subtest number
6595 010341' 201 06 0 00 010353' MOVEI 6,TS36 ; get sstep table address
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 93
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1524
6596
6597 ; Loop on single step table entries
6598
6599 010342' 260 17 0 00 007046* TA36: GO BEXEC ; execute table entry
6600 010343' 254 00 0 00 010352' JRST TX36 ; end of sstep table
6601 010344' 254 00 0 00 010342' JRST TA36 ; keep looping after call
6602 GO [MOVE AEBUF ; EBUF data may be incorrect - do
6603 AND [777400,,1777] ; compare after masking out the
6604 CAME CEBUF ; middle 16 indeterminate bits
6605 SETO ERFLG, ; incorrect - set error flag
6606 010345' 260 17 0 00 013106' RTN]
6607
6608 ; Handle error printouts and scope looping
6609
6610 010346' 027 00 0 00 010470' SCOPER MA36 ; print error message
6611 010347' 254 00 0 00 010336' JRST TL36 ; loop on error
6612 010350' 254 00 0 00 010352' JRST TX36 ; altmode exit
6613 010351' 322 15 0 00 010342' JUMPE ERFLG,TA36 ; do next sstep table entry
6614
6615 ; End of test
6616
6617 010352' 263 17 0 00 000000 TX36: RTN ; return
6618
6619 ; Sstep table, with EBUF data, as: (CMD,#Steps,Start addr,End Addr,EBUF data)
6620
6621 010353' 300000 010361' TS36: ATABLE (SSCALL,TS36LD) ; load microcode/init test paramters
6622 010354' 400000 010457' TS36L: ATABLE (SSCHK,TS36ST) ; set up single step parameters
6623 010355' 100200 002000 ATABLE (SSSTRT,2,0,2000,0) ; do 3 single steps/check results
6624 010356' 000000 000000
6625 010357' 500000 010354' ATABLE (SSJRST,TS36L) ; do next address
6626 010360' 000000 000000 ATABLE (SSLAST) ; end of table
6627
6628 ; Special routine - load microcode to write address pattern to local storage
6629
6630 010361' 316 16 0 00 007103* TS36LD: CAMN MBCN,PORTNI ; NI port?
6631 010362' 476 00 0 00 007104* SETOM TSLOD1 ; yes - must reload microcode each time
6632 010363' 316 16 0 00 007105* CAMN MBCN,PORTCI ; CI port?
6633 010364' 476 00 0 00 007106* SETOM TSLOD2 ; yes - must reload microcode each time
6634 010365' 201 01 0 00 010503' MOVEI 1,T36MA ; get address of ucode
6635 010366' 260 17 0 00 007151* GO TLOAD ; load it
6636 010367' 255 00 0 00 000000 JFCL ; error - ignore
6637 010370' 402 00 0 00 001033* SETZM CADDR ; clear CRAM address
6638 010371' 260 17 0 00 000000* GO DRCRAM ; read CRAM location
6639 010372' 120 00 0 00 001037* DMOVE CWORDL ; get CRAM data
6640 010373' 124 00 0 00 010453' DMOVEM TS36W0 ; save this word
6641 010374' 350 00 0 00 010370* AOS CADDR ; point to next address
6642 010375' 260 17 0 00 010371* GO DRCRAM ; read CRAM location
6643 010376' 120 00 0 00 010372* DMOVE CWORDL ; get CRAM data
6644 010377' 124 00 0 00 010455' DMOVEM TS36W1 ; save this word
6645 010400' 261 17 0 00 001044* PUT PARFLG ; save state of parity flag
6646 010401' 476 00 0 00 010400* SETOM PARFLG ; ensure it is set
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 94
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1525
6647
6648 ; Now load CRAM locations 2-3777 while inserting the local storage
6649 ; address in the magic number field.
6650
6651 010402' 350 02 0 00 010374* TS36L0: AOS 2,CADDR ; point to next address
6652 010403' 303 02 0 00 003777 CAILE 2,3777 ; done yet?
6653 010404' 254 00 0 00 010420' JRST TS36L1 ; yes - do next part
6654 010405' 120 00 0 00 010453' DMOVE TS36W0 ; get first word
6655 010406' 124 00 0 00 010376* DMOVEM CWORDL ; save it
6656 010407' 242 02 0 00 777777 LSH 2,-1 ; make 1-1777
6657 010410' 137 02 0 00 013113' DPB 2,[POINT 10,CWORDL,29] ; save MGC #
6658 010411' 260 17 0 00 001043* GO DWCRAM ; write to CRAM
6659 010412' 120 00 0 00 010455' DMOVE TS36W1 ; get second word
6660 010413' 124 00 0 00 010406* DMOVEM CWORDL ; save it
6661 010414' 137 02 0 00 013113' DPB 2,[POINT 10,CWORDL,29] ; save MGC #
6662 010415' 350 00 0 00 010402* AOS CADDR ; point to next address
6663 010416' 260 17 0 00 010411* GO DWCRAM ; write to CRAM
6664 010417' 254 00 0 00 010402' JRST TS36L0 ; loop till done
6665
6666 ; Now the first 4001 location are set up to write address pattern
6667 ; to local storage locations 0-1023 (decimal). Now start up the
6668 ; port to accomplish this.
6669
6670 010420' 201 01 0 00 004001 TS36L1: MOVEI 1,4001 ; get address to start up at
6671 010421' 242 01 0 00 000001 LSH 1,1 ; position properly
6672 010422' 260 17 0 00 007175* GO LDRAR ; write to RAR register
6673 010423' 201 01 0 00 000010 MOVEI 1,MPRUN ; get CSR start data
6674 010424' 260 17 0 00 007201* GO LDCSR ; start up the port
6675 010425' 201 00 0 00 000100 MOVEI 100 ; set up to wait for 100 ms
6676 010426' 260 17 0 00 000000* GO ODELAY ; for this to complete
6677 010427' 400 01 0 00 000000 SETZ 1, ; clear CSR data
6678 010430' 260 17 0 00 010424* GO LDCSR ; stop the port
6679
6680 ; Now load the CRAM with instructions to read each location
6681
6682 010431' 316 16 0 00 010361* CAMN MBCN,PORTNI ; NI port?
6683 010432' 476 00 0 00 010362* SETOM TSLOD1 ; yes - must reload microcode each time
6684 010433' 316 16 0 00 010363* CAMN MBCN,PORTCI ; CI port?
6685 010434' 476 00 0 00 010364* SETOM TSLOD2 ; yes - must reload microcode each time
6686 010435' 201 01 0 00 010514' MOVEI 1,T36MB ; get address of ucode
6687 010436' 260 17 0 00 010366* GO TLOAD ; load it
6688 010437' 255 00 0 00 000000 JFCL ; error - ignore
6689 010440' 402 00 0 00 010415* SETZM CADDR ; clear CRAM address
6690 010441' 260 17 0 00 010375* GO DRCRAM ; read CRAM location
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 95
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1526
6691
6692 ; Now load CRAM locations 1-1777 while inserting the local storage
6693 ; address in the magic number field.
6694
6695 010442' 350 01 0 00 010440* TS36L2: AOS 1,CADDR ; point to next address
6696 010443' 303 01 0 00 001777 CAILE 1,1777 ; done yet?
6697 010444' 254 00 0 00 010450' JRST TS36L3 ; yes - exit
6698 010445' 137 01 0 00 013113' DPB 1,[POINT 10,CWORDL,29] ; save MGC #
6699 010446' 260 17 0 00 010416* GO DWCRAM ; write to CRAM
6700 010447' 254 00 0 00 010442' JRST TS36L2 ; loop till done
6701
6702 010450' 474 07 0 00 000000 TS36L3: SETO 7, ; initialize start address
6703 010451' 262 17 0 00 010401* GET PARFLG ; restore state of parity flag
6704 010452' 263 17 0 00 000000 RTN ; return
6705
6706 ; Miscellaneous data
6707
6708 010453' TS36W0: BLOCK 2 ; 1st microword
6709 010455' TS36W1: BLOCK 2 ; 2nd microword
6710
6711 ; Special routine - set up for next local storage address
6712
6713 010457' 350 00 0 00 000007 TS36ST: AOS 7 ; point to next address
6714 010460' 202 07 0 00 011165' MOVEM 7,SAVDAT ; save address for error printout
6715 010461' 137 07 0 00 013114' DPB 7,[POINT 10,SAVDAT,9] ; insert address into left 10 bits
6716 010462' 307 07 0 00 001777 CAIG 7,1777 ; done yet?
6717 010463' 350 00 0 17 000000 AOS (P) ; no - set up RTN+2
6718 010464' 137 07 0 00 013115' DPB 7,[POINT 12,TS36L+1,23] ; set up single step start address
6719 010465' 200 00 0 00 011165' MOVE SAVDAT ; set up correct EBUF data (LS addr
6720 010466' 202 00 0 00 010356' MOVEM TS36L+2 ; in each side of word)
6721 010467' 263 17 0 00 000000 RTN ; return
6722
6723 ; Error messages
6724
6725 010470' 260000 010472' MA36: CALL!TXALL!MA36PN ; print data
6726 010471' 000000000000# LAST!CALL!TXALL!BBPNT ; print sequencer data
6727
6728 010472' 200 01 0 00 007221* MA36PN: MOVE 1,SCOSW ; get switches
6729 010473' 607 01 0 00 000200 TLNN 1,TXTINH ; text inhibit switch set?
6730 010474' 037 00 0 00 013116' TMSGC <Wrote address patterns to each local storage location.>
6731 010475' 037 00 0 00 013132' TMSGC <Error at >
6732 010476' 200 00 0 00 011165' MOVE SAVDAT# ; get address
6733 010477' 037 04 0 00 000000 PNT4 ; print it
6734 010500' 607 01 0 00 000200 TLNN 1,TXTINH ; text inhibit switch set?
6735 010501' 037 00 0 00 013135' TMSG < (Result in EBUF - middle 16 bits indeterminate)>
6736 010502' 263 17 0 00 000000 RTN
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 96
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1527
6737
6738 ; Microcode to write address pattern to each local storage address
6739
6740 010503' 000000 000000 T36MA: MWORD <ADDR=0,CONT,SD0,OR,D=2,SKCN,MGC=0> ; 0-3777
6741 010504' 732000 240340
6742 010505' 000100 002000 MWORD <CONT,S0A,OR,D=1,OENA,LDLM,MGC=0>
6743 010506' 431000 230340
6744 010507' 400040 000000 MWORD <ADDR=4000,JMAP,J=4000> ; 4000
6745 010510' 000000 000040
6746 010511' 400100 000000 MWORD <JZ> ; 4001
6747 010512' 000000 000000
6748 010513' 777777 777777 -1
6749
6750 ; Microcode to read each local storage address and place data in EBUF
6751
6752 010514' 000020 000000 T36MB: MWORD <ADDR=0,JMAP,J=2000,SD0,OR,D=2,RDLM,MGC=0> ; 0-1777
6753 010515' 732000 220040
6754 010516' 200020 002004 MWORD <ADDR=2000,JMAP,J=2000,S0A,OR,D=1,OENA,SELE,MGC=4> ; 2000
6755 010517' 431000 005040
6756 010520' 777777 777777 -1
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 97
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1528
6757
6758 ;#********************************************************************
6759 ;* TEST 37 - Local Store RAM Mode Test
6760 ;
6761 ; Description: Data is written and verified to two local storage
6762 ; locations alternating between using the RAM mode
6763 ; bit and not.
6764 ;
6765 ; Procedure: Port Clear
6766 ; Load test microcode
6767 ; Set start address 0
6768 ; Single step 5 times - write 0's to LS 0 and 1's
6769 ; to LS 1740 (RAM mode bit not set), then read
6770 ; LS 0 (with RAM mode bit set) and put data in
6771 ; EBUF
6772 ; Read EBUF and verify data 1's
6773 ; Single step 3 times - read LS 0 (RAM mode bit
6774 ; not set), then read LS 1740 (with RAM mode bit
6775 ; set) and put data in EBUF
6776 ; Read EBUF and verify data 0's
6777 ;
6778 ; Failure: ---
6779 ;#********************************************************************
6780
6781 ; Test data
6782
6783 010521' 254 00 0 00 010526' TSTU37: JRST TG37 ; go start test
6784 010522' 200403 000037 MPROC!NDMP!ZMPROC!37 ; test mask
6785 010523' 010560' 013147' T37M,,[ASCIZ ^Local Store RAM Mode Test^]
6786 010524' 013155' 013102' [EXP M15,MLAST!M14],,[EXP M2,M13,MLAST!M11]
6787 010525' 777777 777777 -1 ; failure test table
6788
6789 ; Start test
6790
6791 010526' 201 00 0 00 000000' TG37: MOVEI Z8 ; get address of module start
6792 010527' 260 17 0 00 010335* GO TRACE ; handle trace output
6793 010530' 201 01 0 00 010560' MOVEI 1,T37M ; set up microcode address
6794 010531' 260 17 0 00 010436* GO TLOAD ; load/verify it
6795 010532' 263 17 0 00 000000 RTN ; failed - exit test
6796
6797 ; Initialization
6798
6799 010533' 400 15 0 00 000000 TL37: SETZ ERFLG, ; clear error flag
6800 010534' 260 17 0 00 010337* GO IPACLR ; clear port
6801 010535' 402 00 0 00 010340* SETZM TSTSUB ; initialize subtest number
6802 010536' 201 06 0 00 010550' MOVEI 6,TS37 ; get sstep table address
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 98
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1529
6803
6804 ; Loop on single step table entries
6805
6806 010537' 260 17 0 00 010342* TA37: GO BEXEC ; execute table entry
6807 010540' 254 00 0 00 010547' JRST TX37 ; end of sstep table
6808 010541' 254 00 0 00 010537' JRST TA37 ; keep looping after call
6809 010542' 474 15 0 00 000000 SETO ERFLG, ; error - EBUF data incorrect
6810
6811 ; Handle error printouts and scope looping
6812
6813 010543' 027 00 0 00 010555' SCOPER MA37 ; print error message
6814 010544' 254 00 0 00 010533' JRST TL37 ; loop on error
6815 010545' 254 00 0 00 010547' JRST TX37 ; altmode exit
6816 010546' 322 15 0 00 010537' JUMPE ERFLG,TA37 ; do next sstep table entry
6817
6818 ; End of test
6819
6820 010547' 263 17 0 00 000000 TX37: RTN ; return
6821
6822 ; Sstep table, with EBUF data, as: (CMD,#Steps,Start addr,End Addr,EBUF data)
6823
6824 010550' 100600 000006 TS37: ATABLE (SSSTRT,6,0,6,-1) ; do 6 single steps/check results
6825 010551' 777777 777777
6826 010552' 100400 060012 ATABLE (SSSTRT,4,6,12,0) ; do 4 single steps/check results
6827 010553' 000000 000000
6828 010554' 000000 000000 ATABLE (SSLAST) ; end of table
6829
6830 ; Error messages
6831
6832 010555' 140000 013157' MA37: MSG!TXNOT![ASCIZ /RAM Mode bit failed - wrong local storage location read./]
6833 010556' 140000 013173' MSG!TXNOT![ASCIZ /Result in EBUF./]
6834 010557' 000000000000# LAST!CALL!TXALL!BBPNT ; print sequencer data
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 99
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1530
6835
6836 ; Microcode:
6837
6838 ; Write 0's to LS 0, 1's to LS 1740
6839
6840 010560' 000000 010000 T37M: MWORD <ADDR=0,JMAP,J=1,S0A,AND,D=2,LSAD,MGC=0>; 0
6841 010561' 442000 200040
6842 010562' 000100 002000 MWORD <CONT,S0A,OR,D=1,OENA,LDLM> ; 1
6843 010563' 431000 230340
6844 010564' 000200 001740 MWORD <CONT,S0A,AND,D=1,LSAD,MGC=1740> ; 2
6845 010565' 441000 200340
6846 010566' 000300 003740 MWORD <CONT,S0A,XNOR,D=1,OENA,MGC=1740,LDLM> ; 3
6847 010567' 471000 230340
6848
6849 ; Read LS 0 and verify result
6850
6851 010570' 000400 000000 MWORD <CONT,SD0,OR,D=2,RAM,RDLM,MGC=0> ; 4
6852 010571' 732200 220340
6853 010572' 000500 002004 MWORD <CONT,S0A,OR,D=1,OENA,MGC=4,SELE> ; 5
6854 010573' 431000 005340
6855
6856 ; Read LS 0, then LS 1740, and verify result
6857
6858 010574' 000600 070000 MWORD <JMAP,J=7,S0A,AND,D=1,LSAD,MGC=0> ; 6
6859 010575' 441000 200040
6860 010576' 000700 000000 MWORD <CONT,SD0,D=2,MGC=0,RDLM> ; 7
6861 010577' 702000 220340
6862 010600' 001000 001740 MWORD <CONT,SD0,D=2,MGC=1740,RAM,RDLM> ; 10
6863 010601' 702200 220340
6864 010602' 001100 002004 MWORD <CONT,S0A,D=1,OENA,MGC=4,SELE> ; 11
6865 010603' 401000 005340
6866 010604' 001200 120000 MWORD <JMAP,J=12> ; 12
6867 010605' 000000 000040
6868 010606' 777777 777777 -1
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 100
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1531
6869
6870 ;#********************************************************************
6871 ;* Test 40 - Jump Mux Test
6872 ;
6873 ; Description: Verify that the JMP MUX can select the low order
6874 ; 8 bits from the data on the MBUS rather than the
6875 ; jump field of the microword.
6876 ;
6877 ; Procedure: Clear Port
6878 ; Load test microcode
6879 ;
6880 ; Set start address = 0
6881 ; Single step once to initialize R0
6882 ;
6883 ; Set start address = 1
6884 ; Single step once to select next address
6885 ; Read LAR and verify address
6886 ;
6887 ; Repeat the above 3 steps 255 times for MBUS field
6888 ; 2 to 254.
6889 ;
6890 ; Failure: JMP MUX not selected properly
6891 ;#********************************************************************
6892
6893 ; Test data
6894
6895 010607' 254 00 0 00 010614' TSTU40: JRST TG40 ; go start test
6896 010610' 210403 000040 MPROC!MBUS!NDMP!ZMPROC!40 ; test mask
6897 010611' 010656' 013177' T40M,,[ASCIZ ^Jump MUX Test^]
6898 010612' 013202' 013003' [EXP MLAST!M5],,[EXP MLAST!M11]
6899 010613' 777777 777777 -1 ; failure test table
6900
6901 ; Start test
6902
6903 010614' 201 00 0 00 000000' TG40: MOVEI Z8 ; get address of module start
6904 010615' 260 17 0 00 010527* GO TRACE ; handle trace output
6905 010616' 201 01 0 00 010656' MOVEI 1,T40M ; set up microcode address
6906 010617' 260 17 0 00 010531* GO TLOAD ; load/verify it
6907 010620' 263 17 0 00 000000 RTN ; failed - exit test
6908
6909 ; Initialization
6910
6911 010621' 400 15 0 00 000000 TL40: SETZ ERFLG, ; clear error flag
6912 010622' 260 17 0 00 010534* GO IPACLR ; clear port
6913 010623' 402 00 0 00 010535* SETZM TSTSUB ; initialize subtest number
6914 010624' 201 06 0 00 010636' MOVEI 6,TS40 ; get sstep table address
6915
6916 ; Loop on single step table entries
6917
6918 010625' 260 17 0 00 000000* TA40: GO SEXEC ; execute table entry
6919 010626' 254 00 0 00 010635' JRST TX40 ; end of sstep table
6920 010627' 254 00 0 00 010625' JRST TA40 ; keep looping after call
6921 010630' 474 15 0 00 000000 SETO ERFLG, ; error - end address incorrect
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 101
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1532
6922
6923 ; Handle error printouts and scope looping
6924
6925 010631' 027 00 0 00 010654' SCOPER MA40 ; print error message
6926 010632' 254 00 0 00 010621' JRST TL40 ; loop on error
6927 010633' 254 00 0 00 010635' JRST TX40 ; altmode exit
6928 010634' 322 15 0 00 010625' JUMPE ERFLG,TA40 ; do next entry (if no error yet)
6929
6930 ; End of test
6931
6932 010635' 263 17 0 00 000000 TX40: RTN ; return
6933
6934 ; Single step table, as: (CMD,#Steps,Start addr,End Addr)
6935
6936 010636' 300000 010644' TS40: STABLE (SSCALL,TS40IN) ; init end address
6937 010637' 101700 000004 STABLE (SSSTRT,^D15,0,4) ; init 2901 R0
6938 010640' 400000 010647' TS40A: STABLE (SSCHK,TS40CH) ; check if done yet
6939 010641' 100100 040000 STABLE (SSSTRT,1,4,0) ; do the single steps
6940 010642' 500000 010640' STABLE (SSJRST,TS40A) ; loop till done
6941 010643' 000000 000000 STABLE (SSLAST)
6942
6943 010644' 402 00 0 00 013422' TS40IN: SETZM SAVADD# ; init end address
6944 010645' 350 00 0 00 013422' AOS SAVADD
6945 010646' 263 17 0 00 000000 RTN ; return
6946
6947 010647' 350 01 0 00 013422' TS40CH: AOS 1,SAVADD ; point to next address
6948 010650' 305 01 0 00 000377 CAIGE 1,^D255 ; done yet?
6949 010651' 350 00 0 17 000000 AOS (P) ; no - set up proper return
6950 010652' 137 01 0 00 013203' DPB 1,[POINT 12,TS40A+1,35] ; save end address
6951 010653' 263 17 0 00 000000 RTN ; return
6952
6953 ; Error message
6954
6955 010654' 140000 013204' MA40: MSG!TXNOT![ASCIZ /JMP MUX not selected correctly/]
6956 010655' 000000000000# LAST!CALL!TXALL!SSPNT ; print sequencer data
6957
6958 ; Test microcode
6959
6960 010656' 000000 010000 T40M: MWORD <ADDR=0,JMAP,J=1,S0A,AND,D=2> ; 0
6961 010657' 442000 000040
6962 010660' 000100 130000 MWORD <LDCT,J=13,S0A,PLUS,D=2,CRY> ; 1
6963 010661' 402000 000700
6964 010662' 000200 020000 MWORD <RPCT,J=2,S0A,OR,D=7> ; 2
6965 010663' 437000 000220
6966 010664' 000300 000000 MWORD <CONT,S0A,OR,B=1,D=2> ; 3
6967 010665' 432000 400340
6968 010666' 000403 772000 MWORD <JMAP,J=377,SAB,PLUS,A=1,D=3,SKMB,OENA> ; 4
6969 010667' 103010 210040
6970 010670' 777777 777777 -1
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 102
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1533
6971
6972 ;#********************************************************************
6973 ;* TEST 41 - CRAM Control Register Parity Generators Test
6974 ;
6975 ; Description: Verify the parity generators which verify good
6976 ; parity of each word gated out of the CRAM into
6977 ; the CRAM control register.
6978 ;
6979 ; Procedure: Port Clear
6980 ; Load CRAM location 0 with a data pattern, with good
6981 ; parity).
6982 ; Single step once and verify that a CRAM PE does not
6983 ; occur.
6984 ; Load CRAM location 0 with the same data pattern, but
6985 ; with bad parity).
6986 ; Single step once and verify that a CRAM PE does occur.
6987 ;
6988 ; Repeat for each data pattern.
6989 ;
6990 ; Failure: ---
6991 ;#********************************************************************
6992
6993 ; Test data
6994
6995 010671' 254 00 0 00 010677' TSTU41: JRST TG41 ; go start test
6996 010672' 200403 000041 MPROC!NDMP!ZMPROC!41 ; test mask
6997 010673' 000000 013213' 0,,[ASCIZ ^CRAM Ctl Reg Parity Generators Test^]
6998 010674' 011324' 011324' [EXP MLAST!M12],,[EXP MLAST!M12]
6999 010675' 000000000000# TSTE45 ; failure test table
7000 010676' 777777 777777 -1 ; ...
7001
7002 ; Start test
7003
7004 010677' 201 00 0 00 000000' TG41: MOVEI Z8 ; get address of module start
7005 010700' 260 17 0 00 010615* GO TRACE ; handle trace output
7006 010701' 200 07 0 00 030022 MOVE 7,RANDBS ; get base number
7007 010702' 202 07 0 00 013421' MOVEM 7,OLDRAN# ; save it
7008
7009 ; Initialization
7010
7011 010703' 402 00 0 00 010442* SETZM CADDR ; clear CRAM address
7012 010704' 400 06 0 00 000000 SETZ 6, ; initialize data pattern number
7013 010705' 202 06 0 00 010623* TL41: MOVEM 6,TSTSUB ; set up test offset
7014
7015 ; Get data pattern
7016
7017 010706' 400 15 0 00 000000 SETZ ERFLG, ; clear error flag
7018 010707' 260 17 0 00 011007' GO T41RAN ; get random data
7019 010710' 202 02 0 00 010413* MOVEM 2,CWORDL ; save left 30 bits
7020 010711' 202 03 0 00 001040* MOVEM 3,CWORDR ; save right 30 bits
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 103
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1534
7021
7022 ; Test segment A
7023
7024 010712' 260 17 0 00 010622* TA41: GO IPACLR ; clear port
7025 010713' 201 01 0 00 000001 MOVEI 1,1 ; set bit 12 (for left 30 bits)
7026 010714' 260 17 0 00 010422* GO LDRAR ; load RAR with it
7027 010715' 200 02 0 00 010710* MOVE 2,CWORDL ; get left 30 bits
7028 010716' 200 03 0 00 010711* MOVE 3,CWORDR ; get right 30 bits
7029 010717' 400 01 0 00 000000 SETZ 1, ; set up no force parity
7030 010720' 260 17 0 00 000000* GO CALPAR ; calculate good parity
7031 010721' 200 01 0 00 000002 MOVE 1,2 ; get left 30 bits
7032 010722' 260 17 0 00 000353* GO LDCRAM ; load it
7033 010723' 400 01 0 00 000000 SETZ 1, ; clear bit 12 (for right 30 bits)
7034 010724' 260 17 0 00 010714* GO LDRAR ; load address
7035 010725' 200 01 0 00 000003 MOVE 1,3 ; get right 30 bits
7036 010726' 260 17 0 00 010722* GO LDCRAM ; load it
7037 010727' 201 01 0 00 020010 MOVEI 1,MPRUN!SINCYC ; get proper CSR data
7038 010730' 260 17 0 00 010430* GO LDCSR ; single step once
7039 010731' 260 17 0 00 001106* GO RDCSR ; read the CSR register
7040 010732' 474 15 0 00 000000 SETO ERFLG, ; error
7041 010733' 603 01 0 00 004000 TLNE 1,(CRAMPE) ; get a CRAM PE?
7042 010734' 474 15 0 00 000000 SETO ERFLG, ; yes - set error flag
7043 010735' 027 00 0 00 010774' SCOPER MA41 ; print error message
7044 010736' 254 00 0 00 010712' JRST TA41 ; loop on error
7045 010737' 254 00 0 00 010773' JRST TX41 ; altmode exit
7046 010740' 326 15 0 00 010773' JUMPN ERFLG,TX41 ; error yet? - yes - exit test
7047
7048 ; Test segment B
7049
7050 010741' 260 17 0 00 010712* TB41: GO IPACLR ; clear port
7051 010742' 201 01 0 00 000001 MOVEI 1,1 ; set bit 12 (for left 30 bits)
7052 010743' 260 17 0 00 010724* GO LDRAR ; load RAR with it
7053 010744' 200 02 0 00 010715* MOVE 2,CWORDL ; get left 30 bits
7054 010745' 200 03 0 00 010716* MOVE 3,CWORDR ; get right 30 bits
7055 010746' 474 01 0 00 000000 SETO 1, ; set up to force bad parity
7056 010747' 260 17 0 00 010720* GO CALPAR ; calculate good parity
7057 010750' 200 01 0 00 000002 MOVE 1,2 ; get left 30 bits
7058 010751' 260 17 0 00 010726* GO LDCRAM ; load it
7059 010752' 400 01 0 00 000000 SETZ 1, ; clear bit 12 (for right 30 bits)
7060 010753' 260 17 0 00 010743* GO LDRAR ; load address
7061 010754' 200 01 0 00 000003 MOVE 1,3 ; get right 30 bits
7062 010755' 260 17 0 00 010751* GO LDCRAM ; load it
7063 010756' 201 01 0 00 020010 MOVEI 1,MPRUN!SINCYC ; get proper CSR data
7064 010757' 260 17 0 00 010730* GO LDCSR ; single step once
7065 010760' 260 17 0 00 010731* GO RDCSR ; read the CSR register
7066 010761' 474 15 0 00 000000 SETO ERFLG, ; error
7067 010762' 607 01 0 00 004000 TLNN 1,(CRAMPE) ; get a CRAM PE?
7068 010763' 474 15 0 00 000000 SETO ERFLG, ; yes - set error flag
7069 010764' 027 00 0 00 010776' SCOPER MB41 ; print error message
7070 010765' 254 00 0 00 010741' JRST TB41 ; loop on error
7071 010766' 254 00 0 00 010773' JRST TX41 ; altmode exit
7072 010767' 326 15 0 00 010773' JUMPN ERFLG,TX41 ; error yet? - yes - exit test
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 104
DFPTA8 MAC 23-Jun-83 11:00 MPROC Module Tests SEQ 1535
7073
7074 ; Next data pattern
7075
7076 010770' 350 00 0 00 000006 AOS 6 ; set up next test offset
7077 010771' 307 06 0 00 001750 CAIG 6,^D1000 ; done yet?
7078 010772' 254 00 0 00 010705' JRST TL41 ; no - loop till done
7079
7080 ; End of test
7081
7082 010773' 263 17 0 00 000000 TX41: RTN ; return
7083
7084 ; Error messages
7085
7086 010774' 040000 013223' MA41: TXNOT![ASCIZ /CRAM PE should not have occurred/]
7087 010775' 270000 011000' LAST!CALL!TXALL!M41PNT ; print error data
7088
7089 010776' 040000 013232' MB41: TXNOT![ASCIZ /CRAM PE should have occurred/]
7090 010777' 270000 011000' LAST!CALL!TXALL!M41PNT ; print error data
7091
7092 011000' 037 00 0 00 013240' M41PNT: TMSGC <CRAM data: >
7093 011001' 260 17 0 00 010441* GO DRCRAM ; read CRAM data
7094 011002' 200 00 0 00 010744* MOVE CWORDL ; get left half
7095 011003' 260 17 0 00 011070' GO MPNTC ; print it
7096 011004' 200 00 0 00 010745* MOVE CWORDR ; get right half
7097 011005' 260 17 0 00 011070' GO MPNTC ; print it
7098 011006' 263 17 0 00 000000 RTN
7099
7100 ; Random number generator
7101
7102 011007' 270 07 0 00 030022 T41RAN: ADD 7,RANDBS ; modify number in AC7
7103 011010' 241 07 0 00 777774 ROT 7,-4 ; to create a new number
7104 011011' 447 07 0 00 013421' EQVB 7,OLDRAN ; put result in AC7 and OLDRAN
7105 011012' 200 02 0 00 000007 MOVE 2,7 ; put into AC2
7106 011013' 270 07 0 00 030022 ADD 7,RANDBS ; modify number in AC7
7107 011014' 241 07 0 00 777774 ROT 7,-4 ; to create a new number
7108 011015' 447 07 0 00 013421' EQVB 7,OLDRAN ; put result in AC7 and OLDRAN
7109 011016' 200 03 0 00 000007 MOVE 3,7 ; put into AC3
7110 011017' 621 02 0 00 770000 TLZ 2,770000 ; clear left 6 bits
7111 011020' 621 03 0 00 770000 TLZ 3,770000 ; clear left 6 bits
7112 011021' 120 02 0 00 011002* DMOVE 2,CWORDL ; save the data
7113 011022' 263 17 0 00 000000 RTN
7114
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 105
DFPTA8 MAC 23-Jun-83 11:00 Miscellaneous Routines SEQ 1536
7115 SUBTTL Miscellaneous Routines
7116
7117 ;#********************************************************************
7118 ; MPNT1 - Print CRAM data correct/actual (data in SAVCR1,SAVCR2)
7119 ;#********************************************************************
7120
7121 011023' 200 01 0 00 010472* MPNT1: MOVE 1,SCOSW ; get switches
7122 011024' 037 00 0 00 013243' TMSGC <CRAM Loc: >
7123 011025' 200 00 0 00 011164' MOVE SAVCRA ; get address
7124 011026' 242 00 0 00 777777 LSH -1 ; position correctly
7125 011027' 037 04 0 00 000000 PNT4 ; print it
7126 011030' 200 00 0 00 011164' MOVE SAVCRA ; get address
7127 011031' 602 00 0 00 000001 TRNE 1 ; left half?
7128 011032' 037 00 0 00 013246' TMSG <(left)> ; yes - print it
7129 011033' 606 00 0 00 000001 TRNN 1 ; right half?
7130 011034' 037 00 0 00 013250' TMSG <(right)> ; yes - print it
7131 011035' 603 01 0 00 000200 TLNE 1,TXTINH ; inhibit text?
7132 011036' 037 00 0 00 013252' TMSGC <CRAM (C): > ; yes
7133 011037' 607 01 0 00 000200 TLNN 1,TXTINH ; inhibit text?
7134 011040' 037 00 0 00 013255' TMSGC <CRAM (Correct): > ; no
7135 011041' 200 00 0 00 011162' MOVE SAVCR1 ; get CRAM data written
7136 011042' 260 17 0 00 011070' GO MPNTC ; print it
7137 011043' 603 01 0 00 000200 TLNE 1,TXTINH ; inhibit text?
7138 011044' 037 00 0 00 013261' TMSGC < (A): > ; yes
7139 011045' 607 01 0 00 000200 TLNN 1,TXTINH ; inhibit text?
7140 011046' 037 00 0 00 013264' TMSGC < (Actual): > ; no
7141 011047' 200 00 0 00 011163' MOVE SAVCR2 ; get CRAM data
7142 011050' 260 17 0 00 011070' GO MPNTC ; print it
7143 011051' 263 17 0 00 000000 RTN
7144
7145
7146 ;#********************************************************************
7147 ; MPNT2 - Print LAR data correct/actual (data in SAVCR1,SAVCR2)
7148 ;#********************************************************************
7149
7150 011052' 200 01 0 00 011023* MPNT2: MOVE 1,SCOSW ; get switches
7151 011053' 603 01 0 00 000200 TLNE 1,TXTINH ; full printout?
7152 011054' 037 00 0 00 013270' TMSGC <LAR (C): > ; no
7153 011055' 607 01 0 00 000200 TLNN 1,TXTINH ; full printout?
7154 011056' 037 00 0 00 013273' TMSGC <LAR (Correct): > ; yes
7155 011057' 200 00 0 00 011162' MOVE SAVCR1 ; get address
7156 011060' 037 04 0 00 000000 PNT4 ; print it
7157 011061' 603 01 0 00 000200 TLNE 1,TXTINH ; full printout?
7158 011062' 037 00 0 00 013277' TMSGC < (A): > ; no
7159 011063' 607 01 0 00 000200 TLNN 1,TXTINH ; full printout?
7160 011064' 037 00 0 00 013302' TMSGC < (Actual): > ; yes
7161 011065' 200 00 0 00 011163' MOVE SAVCR2 ; get address
7162 011066' 037 04 0 00 000000 PNT4 ; print it
7163 011067' 263 17 0 00 000000 RTN
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 106
DFPTA8 MAC 23-Jun-83 11:00 Miscellaneous Routines SEQ 1537
7164
7165 ;#********************************************************************
7166 ; MPNTC - Print cram half word (30 bits only)
7167 ;#********************************************************************
7168
7169 011070' 261 17 0 00 000001 MPNTC: RPUT (1,2) ; save AC's
7170
7171 011072' 200 01 0 00 000000 MOVE 1,0 ; get data into AC1
7172 011073' 242 01 0 00 000006 LSH 1,6 ; position correctly
7173 011074' 201 02 0 00 000012 MOVEI 2,^D10 ; set up to print 10 digits
7174 011075' 400 00 0 00 000000 MPNTC0: SETZ ; clear AC1
7175 011076' 246 00 0 00 000003 LSHC 0,3 ; shift digit into AC0
7176 011077' 037 16 0 00 000003 PNTOCS ; print it
7177 011100' 367 02 0 00 011075' SOJG 2,MPNTC0 ; loop till done
7178 011101' 262 17 0 00 000002 RGET (2,1) ; restore AC's
7179
7180 011103' 263 17 0 00 000000 RTN ; return
7181
7182
7183 ;#********************************************************************
7184 ; MPMBU1 - Print MBUS Error message
7185 ;#********************************************************************
7186
7187 011104' 331 00 0 00 000000* MPMBU1: SKIPL ALFLS ; started up the port ok?
7188 011105' 254 00 0 00 011117' JRST MPMB1A ; yes - other message
7189 011106' 200 00 0 00 011052* MOVE SCOSW ; get switches
7190 011107' 607 00 0 00 000200 TLNN TXTINH ; text inhibit switch set?
7191 011110' 037 00 0 00 013306' TMSGC <Couldn't start the port properly>
7192 011111' 260 17 0 00 010760* GO RDCSR ; get CSR contents
7193 011112' 255 00 0 00 000000 JFCL ; error
7194 011113' 201 02 0 00 000023 MOVEI 2,^D19 ; character count so far
7195 011114' 201 03 0 00 000023 MOVEI 3,^D19 ; continuation line column number
7196 011115' 260 17 0 00 001112* GO CSRPNT ; go print in English
7197 011116' 263 17 0 00 000000 RTN ; return
7198
7199 011117' 200 00 0 00 011106* MPMB1A: MOVE SCOSW ; get switches
7200 011120' 603 00 0 00 000200 TLNE TXTINH ; text inhibit switch set?
7201 JRST [TMSGC <Set > ; yes - just print what signal
7202 PNTMSG @1 ; was turned on
7203 011121' 254 00 0 00 013317' JRST MPMB1B]
7204 011122' 037 00 0 00 013322' TMSGC <Turned on MBUS driver with >
7205 011123' 550 01 0 00 011165' HRRZ 1,SAVDAT ; get ASCIZ string address
7206 011124' 037 00 1 00 000001 PNTMSG @1 ; print it
7207 011125' 037 00 0 00 013330' TMSGC <'MBUS Error' should not have occurred>
7208 011126' 200 01 0 00 001670* MPMB1B: MOVE 1,ALCSR ; get CSR data
7209 011127' 201 02 0 00 000023 MOVEI 2,^D19 ; character count so far
7210 011130' 201 03 0 00 000023 MOVEI 3,^D19 ; continuation line column number
7211 011131' 260 17 0 00 011115* GO CSRPNT ; go print in English
7212 011132' 263 17 0 00 000000 RTN ; return
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 107
DFPTA8 MAC 23-Jun-83 11:00 Miscellaneous Routines SEQ 1538
7213
7214 ;#********************************************************************
7215 ; MPMBU2 - Print MBUS Error message
7216 ;#********************************************************************
7217
7218 011133' 331 00 0 00 011104* MPMBU2: SKIPL ALFLS ; started up the port ok?
7219 011134' 254 00 0 00 011146' JRST MPMB2A ; yes - other message
7220 011135' 200 00 0 00 011117* MOVE SCOSW ; get switches
7221 011136' 607 00 0 00 000200 TLNN TXTINH ; text inhibit switch set?
7222 011137' 037 00 0 00 013306' TMSGC <Couldn't start the port properly>
7223 011140' 260 17 0 00 011111* GO RDCSR ; get CSR contents
7224 011141' 255 00 0 00 000000 JFCL ; error
7225 011142' 201 02 0 00 000023 MOVEI 2,^D19 ; character count so far
7226 011143' 201 03 0 00 000023 MOVEI 3,^D19 ; continuation line column number
7227 011144' 260 17 0 00 011131* GO CSRPNT ; go print in English
7228 011145' 263 17 0 00 000000 RTN ; return
7229
7230 011146' 200 00 0 00 011135* MPMB2A: MOVE SCOSW ; get switches
7231 011147' 603 00 0 00 000200 TLNE TXTINH ; text inhibit switch set?
7232 JRST [TMSGC <Set > ; yes - just print what signal
7233 PNTMSG @1 ; was turned on
7234 011150' 254 00 0 00 013340' JRST MPMB2B]
7235 011151' 037 00 0 00 013322' TMSGC <Turned on MBUS driver with >
7236 011152' 550 01 0 00 011165' HRRZ 1,SAVDAT ; get ASCIZ string address
7237 011153' 037 00 1 00 000001 PNTMSG @1 ; print it
7238 011154' 037 00 0 00 013343' TMSGC <'MBUS Error' should have occurred>
7239 011155' 200 01 0 00 011126* MPMB2B: MOVE 1,ALCSR ; get CSR data
7240 011156' 201 02 0 00 000023 MOVEI 2,^D19 ; character count so far
7241 011157' 201 03 0 00 000023 MOVEI 3,^D19 ; continuation line column number
7242 011160' 260 17 0 00 011144* GO CSRPNT ; go print in English
7243 011161' 263 17 0 00 000000 RTN ; return
7244
7245 ; Miscellaneous variables
7246
7247 011162' 000000 000000 SAVCR1: 0
7248 011163' 000000 000000 SAVCR2: 0
7249 011164' 000000 000000 SAVCRA: 0
7250 011165' 000000 000000 SAVDAT: 0
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page 108
DFPTA8 MAC 23-Jun-83 11:00 Miscellaneous Routines SEQ 1539
7251
7252 ;#********************************************************************
7253 ; End of MPROC Module Tests
7254 ;#********************************************************************
7255
7256 XLIST
7257
NO ERRORS DETECTED
PROGRAM BREAK IS 013423
CPU TIME USED 08:12.715
209P CORE USED
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page S-1
DFPTA8 MAC 23-Jun-83 11:00 SYMBOL TABLE SEQ 1540
AAPNT 000000 ext GO 260740 000000 MA22LP 004137' MBUS 010000 000000 spd
ADRPE 100000 000000 spd INITPI 004726' ext MA23 004325' MLAST 400000 000000 spd
AEBUF 013106' ext IPACLR 010741' ext MA23L 004333' MPER 200000 000000 spd
AEXEC 007162' ext IPAER 000200 000000 spd MA23LP 004330' MPMB1A 011117'
ALCSR 011155' ext IPASST 001057' ext MA24 004537' MPMB1B 011126'
ALFLS 011133' ext LAST 010000 000000 spd MA24L 004545' MPMB2A 011146'
BBPNT 000000 ext LAXER 000400 000000 spd MA24LP 004542' MPMB2B 011155'
BEXEC 010537' ext LDCRAM 010755' ext MA25 004731' MPMBU1 011104'
BUFF 006664' ext LDCSR 010757' ext MA25L 004737' MPMBU2 011133'
BUFGEN 006376' ext LDRAR 010753' ext MA25LP 004734' MPNT1 011023'
C1 000054 spd LGWC 000100 000000 spd MA26 005107' MPNT2 011052'
C10 000065 spd M1 000031 spd MA26L 005115' MPNTC 011070'
C11 000066 spd M10 000042 spd MA26LP 005112' MPNTC0 011075'
C12 000067 spd M11 000043 spd MA27 005320' MPROC 200000 000000 spd
C13 000070 spd M12 000044 spd MA27L 005326' MPRUN 000010 spd
C15 000072 spd M13 000045 spd MA27LP 005323' MSG 100000 000000 spd
C16 000073 spd M14 000046 spd MA3 000303' NDCB 000200 000000 spd
C17 000074 spd M15 000047 spd MA30 005600' NDMP 000400 000000 spd
C21 000100 spd M16 000050 spd MA30L 005606' NEXM 020000 000000 spd
C5 000060 spd M17 000051 spd MA30LP 005603' NOTWC0 040000 000000 spd
C6 000061 spd M18 000052 spd MA30PN 005611' ODELAY 010426' ext
C7 000062 spd M19 000053 spd MA31 006070' OLDRAN 013421'
C8 000063 spd M2 000032 spd MA31L 006076' OVN 000020 000000 spd
C9 000064 spd M3 000033 spd MA31L1 006120' P 000017
CADDR 010703' ext M4 000034 spd MA31L2 006130' PARFLG 010451' ext
CALL 200000 000000 spd M41PNT 011000' MA31LP 006073' PAT 000014
CALPAR 010747' ext M5 000035 spd MA32 006406' PNT3 037140 000000
CBUF 011645' ext M6 000036 spd MA32L 006414' PNT4 037200 000000
CBUFSZ 000315 spd M7 000037 spd MA32LP 006411' PNTDEC 037640 000000
CEBUF 013110' ext M9 000041 spd MA33 006670' PNTHW 037540 000000
CHDATA 005611' ext MA1 000051' MA33L 006676' PNTMSG 037000 000000
CHINIT 006663' ext MA10 001377' MA33LP 006673' PNTOCS 037700 000003
CRAMPE 004000 000000 spd MA11 001477' MA34 007113' PORTCI 010433' ext
CSRPNT 011160' ext MA12 001561' MA34PN 007115' PORTNI 010431' ext
CWORDL 013113' ext MA13 001707' MA35 007170' PUT 261740 000000
CWORDR 011004' ext MA14 002044' MA35P1 007174' RANDBS 030022
DRCRAM 011001' ext MA14L 002052' MA35PN 007173' RDCRAM 000455' ext
DWCRAM 010446' ext MA14LP 002047' MA36 010470' RDCSR 011140' ext
E1 000001 spd MA15 002320' MA36PN 010472' RDEBUF 007202' ext
E14 000016 spd MA15L 002326' MA37 010555' RDLAR 004533' ext
E15 000017 spd MA15LP 002323' MA4 000370' RTN 263740 000000
E16 000020 spd MA16 002546' MA40 010654' SAVADD 013422'
E17 000021 spd MA16PN 002551' MA41 010774' SAVCR1 011162'
E2 000002 spd MA17 003372' MA4PNT 000373' SAVCR2 011163'
E23 000027 spd MA17L 003400' MA5 000474' SAVCRA 011164'
E3 000003 spd MA17LP 003375' MA5PNT 000477' SAVDA1 007237'
E4 000004 spd MA2 000226' MA6 000572' SAVDAT 011165'
E6 000006 spd MA20 003574' MA6PN0 000606' SCOPER 027000 000000
E7 000007 spd MA20L 003602' MA6PNT 000573' SCOSW 011146' ext
E8 000010 spd MA20LP 003577' MA7 001100' SDATA 004725' ext
E9 000011 spd MA21 003743' MA7PN0 001114' SELLAR 040000 spd
ERFLG 000015 MA21L 003751' MA7PNT 001101' SETVEC 004727' ext
GENCCW 006666' ext MA21LP 003746' MB41 010776' SEXEC 010625' ext
GENEPE 100000 spd MA22 004134' MBCN 000016 SHWC 000040 000000 spd
GET 262740 000000 MA22L 004142' MBERR 002000 000000 spd SINCYC 020000 spd
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page S-2
DFPTA8 MAC 23-Jun-83 11:00 SYMBOL TABLE SEQ 1541
SLAST 011343' ext TA15 002254' TC5 000443' TL23 004300'
SNEXT 001056' ext TA16 002512' TCALL 000003 spd TL24 004471'
SSCALL 000003 spd TA17 003340' TCALLC 000004 spd TL25 004664'
SSCHK 000004 spd TA2 000167' TCHECK 000005 spd TL26 005054'
SSJRST 000005 spd TA20 003550' TDATAI 002313' TL27 005235'
SSLAST 000000 spd TA21 003722' TDATAO 002315' TL30 005530'
SSPNT 000000 ext TA22 004113' TEXEC 006624' ext TL31 005763'
SSSTRT 000001 spd TA23 004304' TEXIT 000007 spd TL32 006324'
T10M 001400' TA24 004475' TG1 000011' TL33 006617'
T10TAB 001372' TA25 004670' TG10 001335' TL34 007042'
T11M 001500' TA26 005060' TG11 001440' TL35 007153'
T11TAB 001475' TA27 005247' TG12 001515' TL36 010336'
T12M 001562' TA3 000241' TG13 001650' TL37 010533'
T12TAB 001550' TA30 005534' TG14 001745' TL40 010621'
T13M 001710' TA31 005767' TG15 002243' TL41 010705'
T13TAB 001703' TA32 006340' TG16 002501' TL6 000541'
T14M 002060' TA33 006623' TG17 003327' TL7 001047'
T15M 002334' TA34 007046' TG2 000164' TLAST 000000 spd
T16M 002560' TA36 010342' TG20 003537' TLOAD 010617' ext
T17M 003404' TA37 010537' TG21 003711' TRACE 010700' ext
T1PAT 000053' TA4 000315' TG22 004102' TS14 001770'
T20M 003604' TA40 010625' TG23 004273' TS14IN 002021'
T21M 003753' TA41 010712' TG24 004464' TS14RW 002031'
T22M 004144' TA5 000413' TG25 004657' TS15 002266'
T23M 004335' TA6 000544' TG26 005047' TS16 002524'
T24M 004552' TA6A 000562' TG27 005230' TS16AD 002531'
T25M 004742' TA7 001052' TG3 000237' TS16AX 002545'
T26M 005121' TA7A 001070' TG30 005523' TS17 003352'
T27M 005333' TADDR 006622' ext TG31 005756' TS17PE 003367'
T27SR1 005305' TB1 000027' TG32 006317' TS20 003562'
T27SR2 005307' TB14 001757' TG33 006612' TS20PE 003571'
T30M 005640' TB15 002255' TG34 007035' TS21 003734'
T30SR1 005562' TB16 002513' TG35 007146' TS22 004125'
T30SRD 005560' TB17 003341' TG36 010334' TS23 004316'
T31M 006140' TB1L 000034' TG37 010526' TS24 004507'
T32M 006420' TB2 000203' TG4 000313' TS24DI 004533'
T33M 006702' TB20 003551' TG40 010614' TS24DO 004535'
T33SR1 006656' TB21 003723' TG41 010677' TS25 004702'
T33SR2 006660' TB22 004114' TG5 000411' TS25EX 004717'
T34M 007122' TB23 004305' TG6 000520' TS25IA 004722'
T34MA 007130' TB24 004476' TG7 001026' TS25IB 004725'
T35M 007243' TB25 004671' TI6A 000525' TS26 005072'
T36MA 010503' TB26 005061' TI7A 001033' TS27 005261'
T36MB 010514' TB27 005250' TJRST 000006 spd TS30 005546'
T37M 010560' TB2L 000210' TL10 001342' TS31 006001'
T40M 010656' TB3 000245' TL11 001445' TS32 006352'
T41RAN 011007' TB30 005535' TL12 001522' TS32RD 006373'
T6TAB 000625' TB31 005770' TL13 001655' TS33 006635'
T7TAB 001133' TB32 006341' TL14 001752' TS34 007057'
TA1 000014' TB33 006624' TL15 002250' TS34IN 007067'
TA10 001345' TB4 000321' TL16 002506' TS34L 007060'
TA11 001450' TB41 010741' TL17 003334' TS34ST 007071'
TA12 001525' TB5 000417' TL20 003544' TS36 010353'
TA13 001660' TC3 000261' TL21 003716' TS36L 010354'
TA14 001756' TC4 000342' TL22 004107' TS36L0 010402'
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page S-3
DFPTA8 MAC 23-Jun-83 11:00 SYMBOL TABLE SEQ 1542
TS36L1 010420' TX10 001371' .LCCCE 000000 spd .MCCEB 000037 spd
TS36L2 010442' TX11 001474' .LCCCP 000000 spd .MCCER 000037 spd
TS36L3 010450' TX12 001547' .LCCEB 000000 spd .MCCFZ 000037 spd
TS36LD 010361' TX13 001702' .LCCER 000000 spd .MCCGC 000037 spd
TS36ST 010457' TX14 001767' .LCCFZ 000000 spd .MCCIA 000037 spd
TS36W0 010453' TX15 002265' .LCCGC 000000 spd .MCCLW 000037 spd
TS36W1 010455' TX16 002523' .LCCIA 000000 spd .MCCMB 000037 spd
TS37 010550' TX17 003351' .LCCLW 000000 spd .MCCMP 000037 spd
TS40 010636' TX2 000225' .LCCMB 000000 spd .MCCPP 000037 spd
TS40A 010640' TX20 003561' .LCCMP 000000 spd .MCCXA 000037 spd
TS40CH 010647' TX21 003733' .LCCPP 000000 spd .MCENA 000001 spd
TS40IN 010644' TX22 004124' .LCCXA 000000 spd .MCJP 000017 spd
TSLOD1 010432' ext TX23 004315' .LCENA 000000 spd .MCJS 000017 spd
TSLOD2 010434' ext TX24 004506' .LCJP 000000 spd .MCONT 000017 spd
TSTART 000001 spd TX25 004701' .LCJS 000000 spd .MCRTN 000017 spd
TSTC3 000000 ext TX26 005071' .LCONT 000000 spd .MCRY 000001 spd
TSTC4 000000 ext TX27 005260' .LCRTN 000000 spd .MD 000007 spd
TSTE45 000000 ext TX3 000302' .LCRY 000000 spd .MJ 007777 spd
TSTEBF 200000 spd TX30 005545' .LD 000000 spd .MJMAP 000017 spd
TSTSUB 010705' ext TX31 006000' .LJ 010000 spd .MJZ 000017 spd
TSTU1 000000' ent TX32 006351' .LJMAP 000000 spd .MLDCT 000017 spd
TSTU10 001325' ent TX33 006634' .LJZ 000000 spd .MLDLM 000037 spd
TSTU11 001431' ent TX34 007056' .LLDCT 000000 spd .MLSAD 000037 spd
TSTU12 001507' ent TX35 007167' .LLDLM 000000 spd .MMGC 001777 spd
TSTU13 001643' ent TX36 010352' .LLSAD 000000 spd .MOENA 000001 spd
TSTU14 001733' ent TX37 010547' .LMGC 000001 spd .MOR 000007 spd
TSTU15 002231' ent TX4 000367' .LOENA 002000 spd .MPLUS 000007 spd
TSTU16 002467' ent TX40 010635' .LOR 000000 spd .MRAM 000001 spd
TSTU17 003315' ent TX41 010773' .LPLUS 000000 spd .MRDLM 000037 spd
TSTU2 000154' ent TX5 000473' .LRAM 000000 spd .MRPCT 000017 spd
TSTU20 003525' ent TX6 000571' .LRDLM 000000 spd .MS0A 000007 spd
TSTU21 003677' ent TX7 001077' .LRPCT 000000 spd .MS0B 000007 spd
TSTU22 004070' ent TXALL 060000 000000 spd .LS0A 000000 spd .MSAB 000007 spd
TSTU23 004261' ent TXNOT 040000 000000 spd .LS0B 000000 spd .MSD0 000007 spd
TSTU24 004452' ent TXTINH 000200 spd .LSAB 000000 spd .MSELC 000007 spd
TSTU25 004645' ent UDEBUG 007074' ext .LSD0 000000 spd .MSELE 000007 spd
TSTU26 005035' ent USER 030037 .LSELC 000000 spd .MSELF 000007 spd
TSTU27 005216' ent Z8 000000' .LSELE 000000 spd .MSELM 000007 spd
TSTU3 000230' ent ZMPROC 000003 000000 spd .LSELF 000000 spd .MSELP 000007 spd
TSTU30 005512' ent $ARG2 000001 .LSELM 000000 spd .MSKCN 000037 spd
TSTU31 005747' ent $B 000041 .LSELP 000000 spd .MSKMB 000037 spd
TSTU32 006307' ent $CHR 000057 455641 .LSKCN 000000 spd .MXNOR 000007 spd
TSTU33 006603' ent $GARG 000000 .LSKMB 000000 spd .MXOR 000007 spd
TSTU34 007025' ent %ADDR 000005 spd .LXNOR 000000 spd .RA 000010 000000 spd
TSTU35 007137' ent %ML 000403 772000 spd .LXOR 000000 spd .RAND 040000 000000 spd
TSTU36 010326' ent %MR 103010 210040 spd .MA 000017 spd .RB 400000 spd
TSTU37 010521' ent .LA 000000 spd .MAND 000007 spd .RBAD 000001 spd
TSTU4 000305' ent .LADDR 000100 000000 spd .MB 000017 spd .RCCAF 050000 spd
TSTU40 010607' ent .LAND 000000 spd .MBAD 000001 spd .RCCBF 060000 spd
TSTU41 010671' ent .LB 000000 spd .MCCAF 000037 spd .RCCCA 000000 spd
TSTU5 000404' ent .LBAD 000000 spd .MCCBF 000037 spd .RCCCC 030000 spd
TSTU6 000510' ent .LCCAF 000000 spd .MCCCA 000037 spd .RCCCE 160000 spd
TSTU7 001017' ent .LCCBF 000000 spd .MCCCC 000037 spd .RCCCP 140000 spd
TTPNT 000000 ext .LCCCA 000000 spd .MCCCE 000037 spd .RCCEB 040000 spd
TX1 000050' .LCCCC 000000 spd .MCCCP 000037 spd .RCCER 100000 spd
.MAIN MACRO %53A(1152) 10:28 16-Oct-84 Page S-4
DFPTA8 MAC 23-Jun-83 11:00 SYMBOL TABLE SEQ 1543
.RCCFZ 020000 spd
.RCCGC 010000 spd
.RCCIA 110000 spd
.RCCLW 170000 spd
.RCCMB 120000 spd
.RCCMP 130000 spd
.RCCPP 150000 spd
.RCCXA 070000 spd
.RCENA 000400 000000 spd
.RCJP 000060 spd
.RCJS 000020 spd
.RCONT 000340 spd
.RCRTN 000240 spd
.RCRY 000400 spd
.RD 001000 000000 spd
.RJ 000000 spd
.RJMAP 000040 spd
.RJZ 000000 spd
.RLDCT 000300 spd
.RLDLM 230000 spd
.RLSAD 200000 spd
.RMGC 000000 spd
.ROENA 000000 spd
.ROR 030000 000000 spd
.RPLUS 000000 spd
.RRAM 000200 000000 spd
.RRDLM 220000 spd
.RRPCT 000220 spd
.RS0A 400000 000000 spd
.RS0B 300000 000000 spd
.RSAB 100000 000000 spd
.RSD0 700000 000000 spd
.RSELC 004000 spd
.RSELE 005000 spd
.RSELF 003000 spd
.RSELM 002000 spd
.RSELP 001000 spd
.RSKCN 240000 spd
.RSKMB 210000 spd
.RXNOR 070000 000000 spd
.RXOR 060000 000000 spd
AAPNT 23# 5895
ADRPE 4743 SEQ 1544
AEBUF 24# 6602
AEXEC 23# 1176 1294 1386 1530 5879
ALCSR 23# 1178 1296 1388 1532 7208 7239
ALFLS 23# 7187 7218
BBPNT 24# 5800 6726 6834
BEXEC 24# 5744 6599 6806
BUFF 21# 1721 4438 4441 4709 4710 4716 5297 5567 5570
BUFGEN 35# 1718 5294
C1 1618 5209 5491
C10 4884
C11 4345
C12 4640
C13 3150 3342 3534
C15 1618
C16 4345
C17 4640
C21 4884
C5 1618
C6 5209 5491
C7 1618 3150 3342 4640 5209 5491
C8 1618 4345 4884
C9 4640
CADDR 22# 662 663 911 912 6637 6641 6651 6662 6689 6695 7011
CALL 136 299 387 489 490 609 610 715 964 1208 1323 1419 1559 1730
1731 2005 2006 2233 2234 2831 2832 3039 3040 3210 3211 3402 3403 3594
3595 3821 3822 4026 4027 4218 4219 4450 4451 4725 4726 4999 5000 5306
5307 5578 5579 5799 5800 5895 5896 6725 6726 6834 6956 7087 7090
CALPAR 22# 7030 7056
CBUF 21# 1719 4439 4714 5295 5568
CBUFSZ 1719 4439 4714 5295 5568
CEBUF 24# 6604
CHDATA 31# 4737
CHINIT 31# 1720 4440 4715 5296 5569
CRAMPE 696 945 1181 1299 7041 7067
CSRPNT 21# 726 975 7196 7211 7227 7242
CWORDL 22# 667 916 6639 6643 6655 6657 6660 6661 6698 7019 7027 7053 7094
7112
CWORDR 22# 668 917 7020 7028 7054 7096
DRCRAM 22# 6638 6642 6690 7093
DWCRAM 22# 671 920 6658 6663 6699
E1 2751 2973 3730
E14 3940
E15 647 897 1148 1267 1360 1505 3940
E16 897 2751 2973
E17 3730
E2 3730
E23 2166 4145
E3 1911
E4 2973
E6 2751 2973 3940
E7 1911 3940
E8 2751
E9 2973 SEQ 1545
ERFLG 113 118 122 275 281 285 340 371 375 437 449 453 457 470
474 551 566 570 574 590 594 684 690 691 692 693 695 697
701 717 933 939 940 941 942 944 946 950 966 1164 1180 1182
1186 1282 1298 1300 1304 1374 1390 1394 1518 1534 1538 1636 1647 1654
1929 1940 1947 2184 2195 2202 2769 2780 2787 2991 3002 3009 3168 3179
3186 3360 3371 3378 3552 3563 3570 3748 3759 3766 3958 3969 3976 4163
4174 4181 4363 4380 4387 4657 4668 4675 4899 4910 4917 5225 5244 5251
5506 5517 5524 5737 5747 5754 5872 5880 6592 6605 6613 6799 6809 6816
6911 6921 6928 7017 7040 7042 7046 7066 7068 7072
GENCCW 31# 1724 4444 4719 5300 5572
GENEPE 2824 3032
INITPI 31# 4019
IPACLR 30# 96 257 341 430 544 657 687 906 936 1165 1283 1375 1519
1643 1706 1712 1936 2191 2776 2998 3175 3367 3559 3755 3965 4170 4364
4376 4664 4906 5229 5240 5513 5738 5873 6593 6800 6912 7024 7050
IPAER 4751
IPASST 30# 689 938
LAST 136 299 387 490 610 715 964 1208 1323 1419 1559 1731 2006 2234
2832 3040 3211 3403 3595 3822 4027 4219 4451 4726 5000 5307 5579 5800
5896 6726 6834 6956 7087 7090
LAXER 4749
LDCRAM 29# 114 276 277 350 354 445 466 7032 7036 7058 7062
LDCSR 29# 432 546 559 562 583 586 1711 2825 3033 4372 5236 5902 5904
6674 6678 7038 7064
LDRAR 29# 100 262 349 352 367 443 464 557 581 1709 1999 3815 4370
5234 5900 6672 7026 7034 7052 7060
LGWC 4753
M1 74 236
M10 74 236 328
M11 5721 5857 6581 6786 6898
M12 647 897 6998
M13 5721 5857 6581 6786
M14 5721 5857 6581 6786
M15 5721 5857 6581 6786
M16 74 236 328 419 534
M17 74 236 328
M18 74 236 328
M19 74 236 328
M2 5721 5857 6581 6786
M3 1148 1267 1360 1505
M4 74 236 328 419 534
M41PNT 7087 7090 7092#
M5 6898
M6 1618 1911 2166 2751 2973 3150 3342 3534 3730 3940 4145 4345 4640 4884
5209 5491
M7 1618 1911 2166 2751 2973 3150 3342 3534 3730 3940 4145 4345 4640 4884
5209 5491
M9 419 534
MA1 119 135#
MA10 1183 1208#
MA11 1301 1323#
MA12 1391 1419#
MA13 1535 1559# SEQ 1546
MA14 1651 1729#
MA14L 1734 1737#
MA14LP 1730 1733#
MA15 1944 2004#
MA15L 2009 2012#
MA15LP 2005 2008#
MA16 2199 2232#
MA16PN 2233 2236#
MA17 2784 2830#
MA17L 2835 2838#
MA17LP 2831 2834#
MA2 282 298#
MA20 3006 3038#
MA20L 3043 3046#
MA20LP 3039 3042#
MA21 3183 3209#
MA21L 3214 3217#
MA21LP 3210 3213#
MA22 3375 3401#
MA22L 3406 3409#
MA22LP 3402 3405#
MA23 3567 3593#
MA23L 3598 3601#
MA23LP 3594 3597#
MA24 3763 3820#
MA24L 3825 3828#
MA24LP 3821 3824#
MA25 3973 4025#
MA25L 4030 4033#
MA25LP 4026 4029#
MA26 4178 4217#
MA26L 4222 4225#
MA26LP 4218 4221#
MA27 4384 4449#
MA27L 4454 4457#
MA27LP 4450 4453#
MA3 372 386#
MA30 4672 4724#
MA30L 4729 4732#
MA30LP 4725 4728#
MA30PN 4737#
MA31 4914 4998#
MA31L 5003 5006#
MA31L1 5007 5008 5009 5010 5011 5012 5013 5014 5025#
MA31L2 5015 5016 5017 5018 5019 5020 5021 5022 5034#
MA31LP 4999 5002#
MA32 5248 5305#
MA32L 5310 5313#
MA32LP 5306 5309#
MA33 5521 5577#
MA33L 5582 5585#
MA33LP 5578 5581#
MA34 5751 5799# SEQ 1547
MA34PN 5799 5802#
MA35 5884 5894#
MA35P1 5899# 5909
MA35PN 5896 5898#
MA36 6610 6725#
MA36PN 6725 6728#
MA37 6813 6832#
MA4 450 471 488#
MA40 6925 6955#
MA41 7043 7086#
MA4PNT 489 494#
MA5 567 591 608#
MA5PNT 609 614#
MA6 698 715#
MA6PN0 718 729#
MA6PNT 715 717#
MA7 947 964#
MA7PN0 967 978#
MA7PNT 964 966#
MB41 7069 7089#
MBCN 5788 5790 6630 6632 6682 6684
MBERR 1179 1297 1389 1533
MBUS 417 532 1146 1265 1358 1503 5719 6896
MLAST 74 236 328 419 534 647 897 1148 1267 1360 1505 1618 1911 2166
2751 2973 3150 3342 3534 3730 3940 4145 4345 4640 4884 5209 5491 5721
5857 6581 6786 6898 6998
MPER 4741
MPMB1A 7188 7199#
MPMB1B 7203 7208#
MPMB2A 7219 7230#
MPMB2B 7234 7239#
MPMBU1 1208 1323 7187#
MPMBU2 1419 1559 7218#
MPNT1 136 299 387 7121#
MPNT2 490 610 7150#
MPNTC 7095 7097 7136 7142 7169#
MPNTC0 7174# 7177
MPROC 72 234 326 417 532 645 895 1146 1265 1358 1503 1616 1909 2164
2749 2971 3148 3340 3532 3728 3938 4143 4343 4638 4882 5207 5489 5719
5855 6579 6784 6896 6996
MPRUN 679 928 1710 2824 3032 4371 5235 5901 6673 7037 7063
MSG 135 298 386 488 608 1729 2004 2232 2830 3038 3209 3401 3593 3820
4025 4217 4449 4724 4998 5305 5577 5894 6832 6833 6955
NDCB 1265 1503
NDMP 72 234 326 417 532 645 895 1146 1265 1358 1503 1616 1909 2164
2749 2971 3148 3340 3532 3728 3938 4143 4343 4638 4882 5207 5489 5719
5855 6579 6784 6896 6996
NEXM 4747
NOTWC0 4745
ODELAY 21# 6676
OLDRAN 7007# 7007 7104 7108
OVN 4757
P 2218 4009 5778 5781 5794 6717 6949 SEQ 1548
PARFLG 22# 669 670 672 918 919 921 6645 6646 6703
PAT 1715 5291
PORTCI 23# 5790 6632 6684
PORTNI 23# 5788 6630 6682
RANDBS 7006 7102 7106
RDCRAM 29# 115 278 368 560 584
RDCSR 29# 694 722 943 971 7039 7065 7192 7223
RDEBUF 29# 5905
RDLAR 29# 446 467 563 587 1995 3812
SAVADD 6943# 6943 6944 6947
SAVCR1 106 117 268 280 366 370 440 448 461 469 494 497 554 565
578 589 614 617 7135 7155 7247#
SAVCR2 116 279 369 447 468 564 588 7141 7161 7248#
SAVCRA 99 261 365 7123 7126 7249#
SAVDA1 5906 5916 5917 5926 5932 5936#
SAVDAT 1174 1292 1384 1528 2219# 2219 2221 2227 2236 2240 5773 5776 5783 5803#
5803 6714 6715 6719 6732# 6732 7205 7236 7250#
SCOSW 35# 719 729 968 978 5911 5921 6728 7121 7150 7189 7199 7220 7230
SDATA 30# 680 929 4015 4018
SELLAR 431 545 561 585 2824 3032
SETVEC 31# 4020
SEXEC 25# 6918
SHWC 4755
SINCYC 7037 7063
SLAST 30# 732 736 739 743 981 985 988 992
SNEXT 30# 688 937
SSCALL 5762 5763 6621 6622 6936 6937
SSCHK 5763 5764 6622 6623 6938 6939
SSJRST 5768 5769 6625 6626 6940
SSLAST 5769 5770 6626 6627 6828 6829 6941 6942
SSPNT 25# 6956
SSSTRT 5764 5765 5766 5767 5768 6623 6624 6625 6824 6825 6826 6827 6828 6937
6938 6939 6940
T10M 1147 1158 1212#
T10TAB 1173 1191 1200#
T11M 1266 1276 1327#
T11TAB 1291 1309 1318#
T12M 1359 1368 1423#
T12TAB 1383 1399 1408#
T13M 1504 1512 1563#
T13TAB 1527 1543 1552#
T14M 1617 1630 1748#
T15M 1910 1923 2025#
T16M 2165 2178 2247#
T17M 2750 2763 2847#
T1PAT 105 140# 267
T20M 2972 2985 3053#
T21M 3149 3162 3224#
T22M 3341 3354 3416#
T23M 3533 3546 3608#
T24M 3729 3742 3838#
T25M 3939 3952 4042#
T26M 4144 4157 4234# SEQ 1549
T27M 4344 4357 4471#
T27SR1 4404 4420 4427 4435# 5534 5541 5555
T27SR2 4413 4437# 5548
T30M 4639 4651 4765#
T30SR1 4707# 4713
T30SRD 4691 4705#
T31M 4883 4893 5047#
T32M 5208 5219 5323#
T33M 5490 5500 5594#
T33SR1 5564#
T33SR2 5566#
T34M 5720 5731 5784 5785 5792 5810#
T34MA 5786 5787 5817#
T35M 5856 5866 5940#
T36MA 6634 6740#
T36MB 6686 6752#
T37M 6785 6793 6840#
T40M 6897 6905 6960#
T41RAN 7018 7102#
T6TAB 661 750#
T7TAB 910 999#
TA1 89# 108
TA10 1170# 1184 1192
TA11 1288# 1302 1310
TA12 1380# 1392 1400
TA13 1524# 1536 1544
TA14 1643# 1654
TA15 1936# 1947
TA16 2191# 2202
TA17 2776# 2787
TA2 250# 270
TA20 2998# 3009
TA21 3175# 3186
TA22 3367# 3378
TA23 3559# 3570
TA24 3755# 3766
TA25 3965# 3976
TA26 4170# 4181
TA27 4376#
TA3 340# 373
TA30 4664# 4675
TA31 4906# 4917
TA32 5240# 5251
TA33 5513# 5524
TA34 5744# 5746 5754
TA36 6599# 6601 6613
TA37 6806# 6808 6816
TA4 430#
TA40 6918# 6920 6928
TA41 7024# 7044
TA5 544#
TA6 684# 699 707
TA6A 693 698# SEQ 1550
TA7 933# 948 956
TA7A 942 947#
TADDR 25# 1639 1932 2187 2216 2772 2994 3171 3363 3555 3751 3961 4166 4367
4660 4902 5228 5231 5509
TB1 105# 127
TB14 1644# 1646
TB15 1937# 1939
TB16 2192# 2194
TB17 2777# 2779
TB1L 113# 120
TB2 267# 290
TB20 2999# 3001
TB21 3176# 3178
TB22 3368# 3370
TB23 3560# 3562
TB24 3756# 3758
TB25 3966# 3968
TB26 4171# 4173
TB27 4377# 4379 4387
TB2L 275# 283
TB3 347# 357
TB30 4665# 4667
TB31 4907# 4909
TB32 5241# 5243
TB33 5514# 5516
TB4 437# 451 480
TB41 7050# 7070
TB5 551# 568 600
TC3 362# 378
TC4 457# 472
TC5 574# 592
TCALL 1664 1665 1671 1672 1678 1679 1686 1687 1693 1694 1700 1701 1983 1984
1990 1991 2810 2811 3026 3027 3783 3784 3790 3791 3798 3799 3805 3806
3992 3993 4000 4001 4404 4405 4413 4414 4420 4421 4427 4428 4691 4692
5261 5262 5268 5269 5276 5277 5283 5284 5534 5535 5541 5542 5548 5549
5555 5556
TCALLC 2210 2211 3996 3997
TCHECK 1666 1667 1673 1674 1680 1681 1688 1689 1695 1696 1702 1703 1958 1959
1964 1965 1970 1971 1977 1978 1984 1985 1991 1992 2212 2213 2798 2799
2804 2805 2811 2812 2818 2819 3020 3021 3027 3028 3197 3198 3203 3204
3389 3390 3395 3396 3581 3582 3587 3588 3777 3778 3784 3785 3791 3792
3799 3800 3806 3807 3987 3988 3994 3995 4002 4003 4192 4193 4198 4199
4204 4205 4211 4212 4398 4399 4406 4407 4415 4416 4422 4423 4429 4430
4686 4687 4693 4694 4699 4700 4928 4929 4935 4936 4938 4939 4941 4942
4944 4945 4947 4948 4951 4952 4954 4955 4957 4958 4965 4966 4968 4969
4971 4972 4974 4975 4977 4978 4980 4981 4983 4984 4986 4987 4992 4993
5263 5264 5270 5271 5278 5279 5285 5286 5536 5537 5543 5544 5550 5551
5557 5558
TDATAI 1983 1995#
TDATAO 1990 1998#
TEXEC 25# 1644 1937 2192 2777 2999 3176 3368 3560 3756 3966 4171 4377 4665
4907 5241 5514
TEXIT 1667 1668 1674 1675 1681 1682 1689 1690 1696 1697 1703 1704 1959 1960 SEQ 1551
1965 1966 1971 1972 1978 1979 1985 1986 1992 1993 2213 2214 2799 2800
2805 2806 2812 2813 3021 3022 3198 3199 3204 3205 3390 3391 3396 3397
3582 3583 3588 3589 3778 3779 3785 3786 3792 3793 3800 3801 3807 3808
3988 3989 3995 3996 4003 4004 4193 4194 4199 4200 4205 4206 4212 4213
4399 4400 4407 4408 4416 4417 4423 4424 4430 4431 4687 4688 4694 4695
4929 4930 4936 4937 4939 4940 4942 4943 4945 4946 4948 4949 4952 4953
4955 4956 4958 4959 4966 4967 4969 4970 4972 4973 4975 4976 4978 4979
4981 4982 4984 4985 4987 4988 4993 4994 5264 5265 5271 5272 5279 5280
5286 5287 5537 5538 5544 5545 5551 5552 5558 5559
TG1 71 83#
TG10 1145 1156#
TG11 1264 1274#
TG12 1357 1366#
TG13 1502 1510#
TG14 1615 1628#
TG15 1908 1921#
TG16 2163 2176#
TG17 2748 2761#
TG2 233 244#
TG20 2970 2983#
TG21 3147 3160#
TG22 3339 3352#
TG23 3531 3544#
TG24 3727 3740#
TG25 3937 3950#
TG26 4142 4155#
TG27 4342 4355#
TG3 325 335#
TG30 4637 4649#
TG31 4881 4891#
TG32 5206 5217#
TG33 5488 5498#
TG34 5718 5729#
TG35 5854 5864#
TG36 6578 6587#
TG37 6783 6791#
TG4 416 425#
TG40 6895 6903#
TG41 6995 7004#
TG5 531 539#
TG6 644 655#
TG7 894 904#
TI6A 663# 674
TI7A 912# 923
TJRST 2214 2215
TL10 1164#
TL11 1282#
TL12 1374#
TL13 1518#
TL14 1636# 1652
TL15 1929# 1945
TL16 2184# 2200
TL17 2769# 2785 SEQ 1552
TL20 2991# 3007
TL21 3168# 3184
TL22 3360# 3376
TL23 3552# 3568
TL24 3748# 3764
TL25 3958# 3974
TL26 4163# 4179
TL27 4363# 4385
TL30 4657# 4673
TL31 4899# 4915
TL32 5225# 5249
TL33 5506# 5522
TL34 5737# 5752
TL35 5872# 5885
TL36 6592# 6611
TL37 6799# 6814
TL40 6911# 6926
TL41 7013# 7078
TL6 666 678#
TL7 915 927#
TLAST 1704 1705 1993 1994 2820 2821 3028 3029 3205 3206 3397 3398 3589 3590
3808 3809 4004 4005 4213 4214 4431 4432 4700 4701 4994 4995 5287 5288
5559 5560
TLOAD 21# 1159 1277 1369 1513 1631 1924 2179 2764 2986 3163 3355 3547 3743
3953 4158 4358 4652 4894 5220 5501 5732 5793 5867 6635 6687 6794 6906
TRACE 21# 84 245 336 426 540 656 905 1157 1275 1367 1511 1629 1922
2177 2762 2984 3161 3353 3545 3741 3951 4156 4356 4650 4892 5218 5499
5730 5865 6588 6792 6904 7005
TS14 1637 1664#
TS14IN 1664 1706#
TS14RW 1671 1678 1686 1693 1700 1715#
TS15 1930 1957#
TS16 2185 2210# 2214
TS16AD 2210 2216#
TS16AX 2220 2228#
TS17 2770 2797#
TS17PE 2810 2824#
TS20 2992 3019#
TS20PE 3026 3032#
TS21 3169 3196#
TS22 3361 3388#
TS23 3553 3580#
TS24 3749 3776#
TS24DI 3783 3798 3812#
TS24DO 3790 3805 3815#
TS25 3959 3986#
TS25EX 3996 4008#
TS25IA 3992 4014#
TS25IB 4000 4018#
TS26 4164 4191#
TS27 4366 4397#
TS30 4658 4685#
TS31 4900 4927# SEQ 1553
TS32 5226 5230 5261#
TS32RD 5261 5268 5276 5283 5291#
TS33 5507 5534#
TS34 5740 5762#
TS34IN 5762 5773#
TS34L 5763# 5768
TS34ST 5763 5776#
TS36 6595 6621#
TS36L 6622# 6625 6718 6720
TS36L0 6651# 6664
TS36L1 6653 6670#
TS36L2 6695# 6700
TS36L3 6697 6702#
TS36LD 6621 6630#
TS36ST 6622 6713#
TS36W0 6640 6654 6708#
TS36W1 6644 6659 6709#
TS37 6802 6824#
TS40 6914 6936#
TS40A 6938# 6940 6950
TS40CH 6938 6947#
TS40IN 6936 6943#
TSLOD1 22# 5789 6631 6683
TSLOD2 22# 5791 6633 6685
TSTART 1665 1666 1672 1673 1679 1680 1687 1688 1694 1695 1701 1702 1957 1958
1963 1964 1969 1970 1976 1977 1982 1983 1989 1990 2211 2212 2797 2798
2803 2804 2809 2810 2817 2818 3019 3020 3025 3026 3196 3197 3202 3203
3388 3389 3394 3395 3580 3581 3586 3587 3776 3777 3782 3783 3789 3790
3797 3798 3804 3805 3986 3987 3993 3994 4001 4002 4191 4192 4197 4198
4203 4204 4210 4211 4397 4398 4405 4406 4414 4415 4421 4422 4428 4429
4685 4686 4692 4693 4698 4699 4927 4928 4934 4935 4937 4938 4940 4941
4943 4944 4946 4947 4950 4951 4953 4954 4956 4957 4964 4965 4967 4968
4970 4971 4973 4974 4976 4977 4979 4980 4982 4983 4985 4986 4991 4992
5262 5263 5269 5270 5277 5278 5284 5285 5535 5536 5542 5543 5549 5550
5556 5557
TSTC3 17# 1619 4346 4641 5210 5492
TSTC4 17# 1620 4347 4642 5211 5493
TSTE45 17# 649 898 6999
TSTEBF 5903
TSTSUB 21# 112 274 342 362 441 442 462 463 555 556 579 580 686
935 1170 1171 1288 1289 1380 1381 1524 1525 1638 1733 1931 2008 2186
2771 2834 2993 3042 3170 3213 3362 3405 3554 3597 3750 3824 3960 4029
4165 4221 4365 4453 4659 4728 4901 5002 5026 5035 5227 5309 5508 5581
5739 5874 6594 6801 6913 7013
TSTU1 9 71#
TSTU10 9 1145#
TSTU11 10 1149 1264#
TSTU12 10 1150 1268 1357#
TSTU13 10 1151 1269 1361 1502#
TSTU14 10 1615#
TSTU15 10 1908#
TSTU16 10 1912 2163#
TSTU17 10 1913 2167 2748# SEQ 1554
TSTU2 9 75 233#
TSTU20 10 1914 2168 2752 2970#
TSTU21 11 1915 2169 2753 2974 3147#
TSTU22 11 1916 2170 2754 2975 3151 3339#
TSTU23 11 2171 2755 2976 3152 3343 3531#
TSTU24 11 2756 2977 3153 3344 3535 3727#
TSTU25 11 2978 3154 3345 3536 3731 3937#
TSTU26 11 3155 3346 3537 3732 3941 4142#
TSTU27 11 3347 3538 3733 3942 4146 4342#
TSTU3 9 76 237 325#
TSTU30 11 1621 3539 3734 3943 4147 4348 4637#
TSTU31 12 3735 3944 4148 4881#
TSTU32 12 1622 3945 4149 4349 4643 4885 5206#
TSTU33 12 1623 4150 4350 4644 4886 5212 5488#
TSTU34 12 5718#
TSTU35 12 5722 5854#
TSTU36 12 5723 5858 6578#
TSTU37 12 5724 5859 6582 6783#
TSTU4 9 77 238 329 416#
TSTU40 12 6895#
TSTU41 13 650 899 6995#
TSTU5 9 78 239 330 420 531#
TSTU6 9 644#
TSTU7 9 648 894#
TTPNT 25# 1731 2006 2234 2832 3040 3211 3403 3595 3822 4027 4219 4451 4726
5000 5307 5579
TX1 91 94 121 122 131#
TX10 1185 1186 1196#
TX11 1303 1304 1314#
TX12 1393 1394 1404#
TX13 1537 1538 1548#
TX14 1645 1653 1658#
TX15 1938 1946 1951#
TX16 2193 2201 2206#
TX17 2778 2786 2791#
TX2 252 255 284 285 294#
TX20 3000 3008 3013#
TX21 3177 3185 3190#
TX22 3369 3377 3382#
TX23 3561 3569 3574#
TX24 3757 3765 3770#
TX25 3967 3975 3980#
TX26 4172 4180 4185#
TX27 4378 4386 4391#
TX3 374 375 382#
TX30 4666 4674 4679#
TX31 4908 4916 4921#
TX32 5242 5250 5255#
TX33 5515 5523 5528#
TX34 5745 5753 5758#
TX35 5886 5890#
TX36 6600 6612 6617#
TX37 6807 6815 6820# SEQ 1555
TX4 452 453 473 474 484#
TX40 6919 6927 6932#
TX41 7045 7046 7071 7072 7082#
TX5 569 570 593 594 604#
TX6 700 701 711#
TX7 949 950 960#
TXALL 136 299 387 490 610 715 964 1208 1323 1419 1559 1731 2006 2234
2832 3040 3211 3403 3595 3822 4027 4219 4451 4726 5000 5307 5579 5800
5895 5896 6725 6726 6834 6956 7087 7090
TXNOT 135 298 386 488 489 608 609 1729 1730 2004 2005 2232 2233 2830
2831 3038 3039 3209 3210 3401 3402 3593 3594 3820 3821 4025 4026 4217
4218 4449 4450 4724 4725 4998 4999 5305 5306 5577 5578 5799 5894 6832
6833 6955 7086 7089
TXTINH 720 730 969 979 5912 5914 5922 5924 5928 5930 6729 6734 7131 7133
7137 7139 7151 7153 7157 7159 7190 7200 7221 7231
UDEBUG 21# 92 253 5779
USER 4008
Z8 42# 83 244 335 425 539 655 904 1156 1274 1366 1510 1628 1921
2176 2761 2983 3160 3352 3544 3740 3950 4155 4355 4649 4891 5217 5498
5729 5864 6587 6791 6903 7004
ZMPROC 72 234 326 417 532 645 895 1146 1265 1358 1503 1616 1909 2164
2749 2971 3148 3340 3532 3728 3938 4143 4343 4638 4882 5207 5489 5719
5855 6579 6784 6896 6996
$ARG2 1212# 1212 1214# 1214 1216# 1216 1219# 1219 1221# 1221 1223# 1223 1226# 1226
1228# 1228 1230# 1230 1233# 1233 1235# 1235 1237# 1237 1327# 1327 1329# 1329
1331# 1331 1423# 1423 1425# 1425 1427# 1427 1430# 1430 1432# 1432 1434# 1434
1437# 1437 1439# 1439 1441# 1441 1444# 1444 1446# 1446 1448# 1448 1451# 1451
1453# 1453 1455# 1455 1458# 1458 1460# 1460 1462# 1462 1465# 1465 1467# 1467
1469# 1469 1472# 1472 1474# 1474 1476# 1476 1563# 1563 1565# 1565 1567# 1567
1570# 1570 1572# 1572 1574# 1574 1577# 1577 1579# 1579 1581# 1581 1748# 1748
1750# 1750 1752# 1752 1757# 1757 1759# 1759 1761# 1761 1763# 1763 1768# 1768
1770# 1770 1772# 1772 1774# 1774 1779# 1779 1781# 1781 1783# 1783 1785# 1785
1787# 1787 1789# 1789 1791# 1791 1796# 1796 1798# 1798 1800# 1800 1802# 1802
1804# 1804 1806# 1806 1808# 1808 1813# 1813 1815# 1815 1817# 1817 1819# 1819
1821# 1821 1823# 1823 1825# 1825 1830# 1830 1832# 1832 1837# 1837 1839# 1839
1841# 1841 1843# 1843 1845# 1845 1847# 1847 1849# 1849 1851# 1851 1853# 1853
1858# 1858 1860# 1860 1862# 1862 1864# 1864 1866# 1866 1868# 1868 1870# 1870
1872# 1872 1874# 1874 2025# 2025 2027# 2027 2029# 2029 2034# 2034 2036# 2036
2038# 2038 2043# 2043 2045# 2045 2047# 2047 2049# 2049 2051# 2051 2053# 2053
2058# 2058 2060# 2060 2062# 2062 2064# 2064 2066# 2066 2068# 2068 2070# 2070
2076# 2076 2078# 2078 2080# 2080 2082# 2082 2084# 2084 2086# 2086 2088# 2088
2090# 2090 2095# 2095 2097# 2097 2099# 2099 2101# 2101 2103# 2103 2105# 2105
2107# 2107 2109# 2109 2111# 2111 2116# 2116 2118# 2118 2120# 2120 2122# 2122
2124# 2124 2126# 2126 2128# 2128 2130# 2130 2132# 2132 2247# 2247 2249# 2249
2251# 2251 2253# 2253 2255# 2255 2257# 2257 2259# 2259 2261# 2261 2263# 2263
2265# 2265 2267# 2267 2269# 2269 2271# 2271 2273# 2273 2275# 2275 2277# 2277
2279# 2279 2281# 2281 2283# 2283 2285# 2285 2287# 2287 2289# 2289 2291# 2291
2293# 2293 2295# 2295 2297# 2297 2299# 2299 2301# 2301 2303# 2303 2305# 2305
2307# 2307 2309# 2309 2311# 2311 2313# 2313 2315# 2315 2317# 2317 2319# 2319
2321# 2321 2326# 2326 2328# 2328 2330# 2330 2335# 2335 2337# 2337 2339# 2339
2341# 2341 2346# 2346 2348# 2348 2350# 2350 2355# 2355 2357# 2357 2359# 2359
2364# 2364 2366# 2366 2368# 2368 2373# 2373 2375# 2375 2377# 2377 2382# 2382
2384# 2384 2386# 2386 2391# 2391 2393# 2393 2395# 2395 2400# 2400 2402# 2402 SEQ 1556
2404# 2404 2409# 2409 2411# 2411 2413# 2413 2418# 2418 2420# 2420 2422# 2422
2427# 2427 2429# 2429 2431# 2431 2436# 2436 2438# 2438 2440# 2440 2445# 2445
2447# 2447 2449# 2449 2454# 2454 2456# 2456 2458# 2458 2463# 2463 2465# 2465
2467# 2467 2472# 2472 2474# 2474 2476# 2476 2481# 2481 2483# 2483 2485# 2485
2490# 2490 2492# 2492 2494# 2494 2499# 2499 2501# 2501 2503# 2503 2508# 2508
2510# 2510 2512# 2512 2517# 2517 2519# 2519 2521# 2521 2526# 2526 2528# 2528
2530# 2530 2535# 2535 2537# 2537 2539# 2539 2544# 2544 2546# 2546 2548# 2548
2553# 2553 2555# 2555 2557# 2557 2562# 2562 2564# 2564 2566# 2566 2571# 2571
2573# 2573 2575# 2575 2580# 2580 2582# 2582 2584# 2584 2589# 2589 2591# 2591
2593# 2593 2598# 2598 2600# 2600 2602# 2602 2607# 2607 2609# 2609 2611# 2611
2616# 2616 2618# 2618 2620# 2620 2625# 2625 2627# 2627 2629# 2629 2634# 2634
2636# 2636 2638# 2638 2643# 2643 2645# 2645 2647# 2647 2652# 2652 2654# 2654
2656# 2656 2658# 2658 2663# 2663 2665# 2665 2670# 2670 2672# 2672 2674# 2674
2679# 2679 2681# 2681 2683# 2683 2685# 2685 2687# 2687 2689# 2689 2691# 2691
2693# 2693 2695# 2695 2700# 2700 2702# 2702 2704# 2704 2706# 2706 2708# 2708
2710# 2710 2712# 2712 2714# 2714 2716# 2716 2847# 2847 2849# 2849 2851# 2851
2856# 2856 2858# 2858 2860# 2860 2862# 2862 2864# 2864 2866# 2866 2871# 2871
2873# 2873 2875# 2875 2877# 2877 2879# 2879 2881# 2881 2886# 2886 2888# 2888
2890# 2890 2892# 2892 2894# 2894 2896# 2896 2898# 2898 2903# 2903 2905# 2905
2907# 2907 2909# 2909 2911# 2911 2913# 2913 2915# 2915 2917# 2917 2919# 2919
2924# 2924 2926# 2926 2928# 2928 2930# 2930 2932# 2932 2934# 2934 2936# 2936
2938# 2938 2940# 2940 3053# 3053 3055# 3055 3057# 3057 3062# 3062 3064# 3064
3066# 3066 3068# 3068 3070# 3070 3072# 3072 3074# 3074 3076# 3076 3081# 3081
3083# 3083 3085# 3085 3087# 3087 3089# 3089 3091# 3091 3093# 3093 3095# 3095
3097# 3097 3102# 3102 3104# 3104 3106# 3106 3108# 3108 3110# 3110 3112# 3112
3114# 3114 3116# 3116 3118# 3118 3224# 3224 3226# 3226 3228# 3228 3230# 3230
3232# 3232 3234# 3234 3236# 3236 3238# 3238 3243# 3243 3245# 3245 3247# 3247
3249# 3249 3251# 3251 3253# 3253 3258# 3258 3260# 3260 3262# 3262 3264# 3264
3266# 3266 3268# 3268 3273# 3273 3275# 3275 3277# 3277 3279# 3279 3281# 3281
3283# 3283 3285# 3285 3287# 3287 3289# 3289 3294# 3294 3296# 3296 3298# 3298
3300# 3300 3302# 3302 3304# 3304 3306# 3306 3308# 3308 3310# 3310 3416# 3416
3418# 3418 3420# 3420 3422# 3422 3424# 3424 3426# 3426 3428# 3428 3430# 3430
3435# 3435 3437# 3437 3439# 3439 3441# 3441 3443# 3443 3445# 3445 3450# 3450
3452# 3452 3454# 3454 3456# 3456 3458# 3458 3460# 3460 3465# 3465 3467# 3467
3469# 3469 3471# 3471 3473# 3473 3475# 3475 3477# 3477 3479# 3479 3481# 3481
3486# 3486 3488# 3488 3490# 3490 3492# 3492 3494# 3494 3496# 3496 3498# 3498
3500# 3500 3502# 3502 3608# 3608 3610# 3610 3612# 3612 3614# 3614 3616# 3616
3618# 3618 3620# 3620 3622# 3622 3627# 3627 3629# 3629 3631# 3631 3633# 3633
3635# 3635 3637# 3637 3642# 3642 3644# 3644 3646# 3646 3648# 3648 3650# 3650
3652# 3652 3657# 3657 3659# 3659 3661# 3661 3663# 3663 3665# 3665 3667# 3667
3669# 3669 3671# 3671 3673# 3673 3678# 3678 3680# 3680 3682# 3682 3684# 3684
3686# 3686 3688# 3688 3690# 3690 3692# 3692 3694# 3694 3838# 3838 3840# 3840
3842# 3842 3847# 3847 3849# 3849 3851# 3851 3856# 3856 3858# 3858 3860# 3860
3862# 3862 3864# 3864 3869# 3869 3871# 3871 3873# 3873 3875# 3875 3877# 3877
3879# 3879 3881# 3881 3883# 3883 3885# 3885 3890# 3890 3892# 3892 3894# 3894
3896# 3896 3898# 3898 3900# 3900 3902# 3902 3904# 3904 3906# 3906 4042# 4042
4044# 4044 4046# 4046 4051# 4051 4053# 4053 4055# 4055 4057# 4057 4062# 4062
4064# 4064 4066# 4066 4068# 4068 4073# 4073 4075# 4075 4077# 4077 4079# 4079
4081# 4081 4083# 4083 4085# 4085 4087# 4087 4089# 4089 4094# 4094 4096# 4096
4098# 4098 4100# 4100 4102# 4102 4104# 4104 4106# 4106 4108# 4108 4110# 4110
4234# 4234 4236# 4236 4238# 4238 4243# 4243 4245# 4245 4247# 4247 4252# 4252
4254# 4254 4256# 4256 4261# 4261 4263# 4263 4265# 4265 4270# 4270 4272# 4272
4274# 4274 4276# 4276 4278# 4278 4280# 4280 4282# 4282 4284# 4284 4286# 4286 SEQ 1557
4291# 4291 4293# 4293 4295# 4295 4297# 4297 4299# 4299 4301# 4301 4303# 4303
4305# 4305 4307# 4307 4471# 4471 4473# 4473 4475# 4475 4481# 4481 4483# 4483
4485# 4485 4487# 4487 4493# 4493 4495# 4495 4497# 4497 4499# 4499 4504# 4504
4506# 4506 4508# 4508 4510# 4510 4512# 4512 4517# 4517 4519# 4519 4521# 4521
4523# 4523 4525# 4525 4530# 4530 4532# 4532 4534# 4534 4539# 4539 4541# 4541
4543# 4543 4545# 4545 4547# 4547 4549# 4549 4551# 4551 4553# 4553 4555# 4555
4557# 4557 4559# 4559 4561# 4561 4563# 4563 4568# 4568 4570# 4570 4572# 4572
4574# 4574 4576# 4576 4578# 4578 4580# 4580 4582# 4582 4584# 4584 4589# 4589
4591# 4591 4593# 4593 4595# 4595 4597# 4597 4599# 4599 4601# 4601 4603# 4603
4605# 4605 4765# 4765 4767# 4767 4769# 4769 4775# 4775 4777# 4777 4779# 4779
4781# 4781 4783# 4783 4785# 4785 4787# 4787 4789# 4789 4791# 4791 4793# 4793
4798# 4798 4800# 4800 4802# 4802 4804# 4804 4809# 4809 4811# 4811 4813# 4813
4815# 4815 4817# 4817 4819# 4819 4821# 4821 4823# 4823 4825# 4825 4830# 4830
4832# 4832 4834# 4834 4836# 4836 4838# 4838 4840# 4840 4842# 4842 4844# 4844
4846# 4846 5047# 5047 5049# 5049 5051# 5051 5057# 5057 5059# 5059 5061# 5061
5063# 5063 5065# 5065 5067# 5067 5069# 5069 5071# 5071 5078# 5078 5080# 5080
5082# 5082 5084# 5084 5086# 5086 5088# 5088 5090# 5090 5092# 5092 5097# 5097
5099# 5099 5101# 5101 5103# 5103 5109# 5109 5111# 5111 5113# 5113 5115# 5115
5117# 5117 5123# 5123 5125# 5125 5127# 5127 5129# 5129 5131# 5131 5136# 5136
5138# 5138 5140# 5140 5142# 5142 5144# 5144 5146# 5146 5148# 5148 5150# 5150
5152# 5152 5157# 5157 5159# 5159 5161# 5161 5163# 5163 5165# 5165 5167# 5167
5169# 5169 5171# 5171 5173# 5173 5323# 5323 5325# 5325 5327# 5327 5329# 5329
5331# 5331 5336# 5336 5338# 5338 5340# 5340 5342# 5342 5344# 5344 5346# 5346
5348# 5348 5350# 5350 5352# 5352 5354# 5354 5359# 5359 5361# 5361 5363# 5363
5365# 5365 5367# 5367 5369# 5369 5371# 5371 5373# 5373 5378# 5378 5380# 5380
5382# 5382 5384# 5384 5386# 5386 5388# 5388 5390# 5390 5392# 5392 5397# 5397
5399# 5399 5401# 5401 5403# 5403 5405# 5405 5407# 5407 5412# 5412 5414# 5414
5419# 5419 5421# 5421 5423# 5423 5425# 5425 5427# 5427 5429# 5429 5431# 5431
5433# 5433 5435# 5435 5440# 5440 5442# 5442 5444# 5444 5446# 5446 5448# 5448
5450# 5450 5452# 5452 5454# 5454 5456# 5456 5594# 5594 5596# 5596 5598# 5598
5600# 5600 5605# 5605 5607# 5607 5609# 5609 5611# 5611 5613# 5613 5615# 5615
5620# 5620 5622# 5622 5624# 5624 5626# 5626 5628# 5628 5630# 5630 5635# 5635
5637# 5637 5639# 5639 5641# 5641 5643# 5643 5645# 5645 5647# 5647 5652# 5652
5654# 5654 5656# 5656 5658# 5658 5660# 5660 5662# 5662 5664# 5664 5666# 5666
5668# 5668 5673# 5673 5675# 5675 5677# 5677 5679# 5679 5681# 5681 5683# 5683
5685# 5685 5687# 5687 5689# 5689 5810# 5810 5812# 5812 5814# 5814 5817# 5817
5819# 5819 5821# 5821 5940# 5940 5945# 5945 5947# 5947 5949# 5949 5951# 5951
5953# 5953 5955# 5955 5957# 5957 5959# 5959 5961# 5961 5963# 5963 5965# 5965
5967# 5967 5969# 5969 5971# 5971 5973# 5973 5975# 5975 5977# 5977 5979# 5979
5981# 5981 5983# 5983 5985# 5985 5987# 5987 5989# 5989 5991# 5991 5993# 5993
5995# 5995 5997# 5997 5999# 5999 6001# 6001 6003# 6003 6005# 6005 6007# 6007
6009# 6009 6011# 6011 6013# 6013 6015# 6015 6017# 6017 6019# 6019 6021# 6021
6023# 6023 6025# 6025 6027# 6027 6029# 6029 6031# 6031 6033# 6033 6035# 6035
6037# 6037 6039# 6039 6041# 6041 6043# 6043 6045# 6045 6047# 6047 6049# 6049
6051# 6051 6053# 6053 6055# 6055 6057# 6057 6059# 6059 6061# 6061 6063# 6063
6065# 6065 6067# 6067 6069# 6069 6071# 6071 6073# 6073 6075# 6075 6077# 6077
6079# 6079 6081# 6081 6083# 6083 6085# 6085 6087# 6087 6089# 6089 6091# 6091
6093# 6093 6095# 6095 6097# 6097 6099# 6099 6101# 6101 6103# 6103 6105# 6105
6107# 6107 6109# 6109 6111# 6111 6113# 6113 6115# 6115 6117# 6117 6119# 6119
6121# 6121 6123# 6123 6125# 6125 6127# 6127 6129# 6129 6131# 6131 6133# 6133
6135# 6135 6137# 6137 6139# 6139 6141# 6141 6143# 6143 6145# 6145 6147# 6147
6149# 6149 6151# 6151 6153# 6153 6155# 6155 6157# 6157 6159# 6159 6161# 6161
6163# 6163 6165# 6165 6167# 6167 6172# 6172 6180# 6180 6182# 6182 6184# 6184 SEQ 1558
6186# 6186 6188# 6188 6193# 6193 6195# 6195 6197# 6197 6199# 6199 6201# 6201
6203# 6203 6205# 6205 6207# 6207 6209# 6209 6211# 6211 6213# 6213 6215# 6215
6217# 6217 6219# 6219 6221# 6221 6223# 6223 6225# 6225 6227# 6227 6229# 6229
6231# 6231 6233# 6233 6235# 6235 6237# 6237 6239# 6239 6241# 6241 6243# 6243
6245# 6245 6247# 6247 6249# 6249 6251# 6251 6253# 6253 6255# 6255 6257# 6257
6262# 6262 6264# 6264 6266# 6266 6268# 6268 6271# 6271 6273# 6273 6275# 6275
6277# 6277 6280# 6280 6282# 6282 6284# 6284 6286# 6286 6289# 6289 6291# 6291
6293# 6293 6295# 6295 6298# 6298 6300# 6300 6302# 6302 6304# 6304 6307# 6307
6309# 6309 6311# 6311 6313# 6313 6316# 6316 6318# 6318 6320# 6320 6322# 6322
6325# 6325 6327# 6327 6329# 6329 6331# 6331 6334# 6334 6336# 6336 6338# 6338
6340# 6340 6343# 6343 6345# 6345 6347# 6347 6349# 6349 6352# 6352 6354# 6354
6356# 6356 6358# 6358 6361# 6361 6363# 6363 6365# 6365 6367# 6367 6370# 6370
6372# 6372 6374# 6374 6376# 6376 6379# 6379 6381# 6381 6383# 6383 6385# 6385
6388# 6388 6390# 6390 6392# 6392 6394# 6394 6397# 6397 6399# 6399 6401# 6401
6403# 6403 6406# 6406 6408# 6408 6410# 6410 6412# 6412 6415# 6415 6417# 6417
6419# 6419 6421# 6421 6424# 6424 6426# 6426 6428# 6428 6430# 6430 6433# 6433
6435# 6435 6437# 6437 6439# 6439 6442# 6442 6444# 6444 6446# 6446 6448# 6448
6451# 6451 6453# 6453 6455# 6455 6457# 6457 6460# 6460 6462# 6462 6464# 6464
6466# 6466 6469# 6469 6471# 6471 6473# 6473 6475# 6475 6478# 6478 6480# 6480
6482# 6482 6484# 6484 6487# 6487 6489# 6489 6491# 6491 6493# 6493 6496# 6496
6498# 6498 6500# 6500 6502# 6502 6505# 6505 6507# 6507 6509# 6509 6511# 6511
6514# 6514 6516# 6516 6518# 6518 6520# 6520 6523# 6523 6525# 6525 6527# 6527
6529# 6529 6532# 6532 6534# 6534 6536# 6536 6538# 6538 6541# 6541 6543# 6543
6545# 6545 6547# 6547 6550# 6550 6740# 6740 6742# 6742 6744# 6744 6746# 6746
6752# 6752 6754# 6754 6840# 6840 6842# 6842 6844# 6844 6846# 6846 6851# 6851
6853# 6853 6858# 6858 6860# 6860 6862# 6862 6864# 6864 6866# 6866 6960# 6960
6962# 6962 6964# 6964 6966# 6966 6968# 6968
$B 1212# 1212 1214# 1214 1216# 1216 1219# 1219 1221# 1221 1223# 1223 1226# 1226
1228# 1228 1230# 1230 1233# 1233 1235# 1235 1237# 1237 1327# 1327 1329# 1329
1331# 1331 1423# 1423 1425# 1425 1427# 1427 1430# 1430 1432# 1432 1434# 1434
1437# 1437 1439# 1439 1441# 1441 1444# 1444 1446# 1446 1448# 1448 1451# 1451
1453# 1453 1455# 1455 1458# 1458 1460# 1460 1462# 1462 1465# 1465 1467# 1467
1469# 1469 1472# 1472 1474# 1474 1476# 1476 1563# 1563 1565# 1565 1567# 1567
1570# 1570 1572# 1572 1574# 1574 1577# 1577 1579# 1579 1581# 1581 1748# 1748
1750# 1750 1752# 1752 1757# 1757 1759# 1759 1761# 1761 1763# 1763 1768# 1768
1770# 1770 1772# 1772 1774# 1774 1779# 1779 1781# 1781 1783# 1783 1785# 1785
1787# 1787 1789# 1789 1791# 1791 1796# 1796 1798# 1798 1800# 1800 1802# 1802
1804# 1804 1806# 1806 1808# 1808 1813# 1813 1815# 1815 1817# 1817 1819# 1819
1821# 1821 1823# 1823 1825# 1825 1830# 1830 1832# 1832 1837# 1837 1839# 1839
1841# 1841 1843# 1843 1845# 1845 1847# 1847 1849# 1849 1851# 1851 1853# 1853
1858# 1858 1860# 1860 1862# 1862 1864# 1864 1866# 1866 1868# 1868 1870# 1870
1872# 1872 1874# 1874 2025# 2025 2027# 2027 2029# 2029 2034# 2034 2036# 2036
2038# 2038 2043# 2043 2045# 2045 2047# 2047 2049# 2049 2051# 2051 2053# 2053
2058# 2058 2060# 2060 2062# 2062 2064# 2064 2066# 2066 2068# 2068 2070# 2070
2076# 2076 2078# 2078 2080# 2080 2082# 2082 2084# 2084 2086# 2086 2088# 2088
2090# 2090 2095# 2095 2097# 2097 2099# 2099 2101# 2101 2103# 2103 2105# 2105
2107# 2107 2109# 2109 2111# 2111 2116# 2116 2118# 2118 2120# 2120 2122# 2122
2124# 2124 2126# 2126 2128# 2128 2130# 2130 2132# 2132 2247# 2247 2249# 2249
2251# 2251 2253# 2253 2255# 2255 2257# 2257 2259# 2259 2261# 2261 2263# 2263
2265# 2265 2267# 2267 2269# 2269 2271# 2271 2273# 2273 2275# 2275 2277# 2277
2279# 2279 2281# 2281 2283# 2283 2285# 2285 2287# 2287 2289# 2289 2291# 2291
2293# 2293 2295# 2295 2297# 2297 2299# 2299 2301# 2301 2303# 2303 2305# 2305
2307# 2307 2309# 2309 2311# 2311 2313# 2313 2315# 2315 2317# 2317 2319# 2319 SEQ 1559
2321# 2321 2326# 2326 2328# 2328 2330# 2330 2335# 2335 2337# 2337 2339# 2339
2341# 2341 2346# 2346 2348# 2348 2350# 2350 2355# 2355 2357# 2357 2359# 2359
2364# 2364 2366# 2366 2368# 2368 2373# 2373 2375# 2375 2377# 2377 2382# 2382
2384# 2384 2386# 2386 2391# 2391 2393# 2393 2395# 2395 2400# 2400 2402# 2402
2404# 2404 2409# 2409 2411# 2411 2413# 2413 2418# 2418 2420# 2420 2422# 2422
2427# 2427 2429# 2429 2431# 2431 2436# 2436 2438# 2438 2440# 2440 2445# 2445
2447# 2447 2449# 2449 2454# 2454 2456# 2456 2458# 2458 2463# 2463 2465# 2465
2467# 2467 2472# 2472 2474# 2474 2476# 2476 2481# 2481 2483# 2483 2485# 2485
2490# 2490 2492# 2492 2494# 2494 2499# 2499 2501# 2501 2503# 2503 2508# 2508
2510# 2510 2512# 2512 2517# 2517 2519# 2519 2521# 2521 2526# 2526 2528# 2528
2530# 2530 2535# 2535 2537# 2537 2539# 2539 2544# 2544 2546# 2546 2548# 2548
2553# 2553 2555# 2555 2557# 2557 2562# 2562 2564# 2564 2566# 2566 2571# 2571
2573# 2573 2575# 2575 2580# 2580 2582# 2582 2584# 2584 2589# 2589 2591# 2591
2593# 2593 2598# 2598 2600# 2600 2602# 2602 2607# 2607 2609# 2609 2611# 2611
2616# 2616 2618# 2618 2620# 2620 2625# 2625 2627# 2627 2629# 2629 2634# 2634
2636# 2636 2638# 2638 2643# 2643 2645# 2645 2647# 2647 2652# 2652 2654# 2654
2656# 2656 2658# 2658 2663# 2663 2665# 2665 2670# 2670 2672# 2672 2674# 2674
2679# 2679 2681# 2681 2683# 2683 2685# 2685 2687# 2687 2689# 2689 2691# 2691
2693# 2693 2695# 2695 2700# 2700 2702# 2702 2704# 2704 2706# 2706 2708# 2708
2710# 2710 2712# 2712 2714# 2714 2716# 2716 2847# 2847 2849# 2849 2851# 2851
2856# 2856 2858# 2858 2860# 2860 2862# 2862 2864# 2864 2866# 2866 2871# 2871
2873# 2873 2875# 2875 2877# 2877 2879# 2879 2881# 2881 2886# 2886 2888# 2888
2890# 2890 2892# 2892 2894# 2894 2896# 2896 2898# 2898 2903# 2903 2905# 2905
2907# 2907 2909# 2909 2911# 2911 2913# 2913 2915# 2915 2917# 2917 2919# 2919
2924# 2924 2926# 2926 2928# 2928 2930# 2930 2932# 2932 2934# 2934 2936# 2936
2938# 2938 2940# 2940 3053# 3053 3055# 3055 3057# 3057 3062# 3062 3064# 3064
3066# 3066 3068# 3068 3070# 3070 3072# 3072 3074# 3074 3076# 3076 3081# 3081
3083# 3083 3085# 3085 3087# 3087 3089# 3089 3091# 3091 3093# 3093 3095# 3095
3097# 3097 3102# 3102 3104# 3104 3106# 3106 3108# 3108 3110# 3110 3112# 3112
3114# 3114 3116# 3116 3118# 3118 3224# 3224 3226# 3226 3228# 3228 3230# 3230
3232# 3232 3234# 3234 3236# 3236 3238# 3238 3243# 3243 3245# 3245 3247# 3247
3249# 3249 3251# 3251 3253# 3253 3258# 3258 3260# 3260 3262# 3262 3264# 3264
3266# 3266 3268# 3268 3273# 3273 3275# 3275 3277# 3277 3279# 3279 3281# 3281
3283# 3283 3285# 3285 3287# 3287 3289# 3289 3294# 3294 3296# 3296 3298# 3298
3300# 3300 3302# 3302 3304# 3304 3306# 3306 3308# 3308 3310# 3310 3416# 3416
3418# 3418 3420# 3420 3422# 3422 3424# 3424 3426# 3426 3428# 3428 3430# 3430
3435# 3435 3437# 3437 3439# 3439 3441# 3441 3443# 3443 3445# 3445 3450# 3450
3452# 3452 3454# 3454 3456# 3456 3458# 3458 3460# 3460 3465# 3465 3467# 3467
3469# 3469 3471# 3471 3473# 3473 3475# 3475 3477# 3477 3479# 3479 3481# 3481
3486# 3486 3488# 3488 3490# 3490 3492# 3492 3494# 3494 3496# 3496 3498# 3498
3500# 3500 3502# 3502 3608# 3608 3610# 3610 3612# 3612 3614# 3614 3616# 3616
3618# 3618 3620# 3620 3622# 3622 3627# 3627 3629# 3629 3631# 3631 3633# 3633
3635# 3635 3637# 3637 3642# 3642 3644# 3644 3646# 3646 3648# 3648 3650# 3650
3652# 3652 3657# 3657 3659# 3659 3661# 3661 3663# 3663 3665# 3665 3667# 3667
3669# 3669 3671# 3671 3673# 3673 3678# 3678 3680# 3680 3682# 3682 3684# 3684
3686# 3686 3688# 3688 3690# 3690 3692# 3692 3694# 3694 3838# 3838 3840# 3840
3842# 3842 3847# 3847 3849# 3849 3851# 3851 3856# 3856 3858# 3858 3860# 3860
3862# 3862 3864# 3864 3869# 3869 3871# 3871 3873# 3873 3875# 3875 3877# 3877
3879# 3879 3881# 3881 3883# 3883 3885# 3885 3890# 3890 3892# 3892 3894# 3894
3896# 3896 3898# 3898 3900# 3900 3902# 3902 3904# 3904 3906# 3906 4042# 4042
4044# 4044 4046# 4046 4051# 4051 4053# 4053 4055# 4055 4057# 4057 4062# 4062
4064# 4064 4066# 4066 4068# 4068 4073# 4073 4075# 4075 4077# 4077 4079# 4079
4081# 4081 4083# 4083 4085# 4085 4087# 4087 4089# 4089 4094# 4094 4096# 4096 SEQ 1560
4098# 4098 4100# 4100 4102# 4102 4104# 4104 4106# 4106 4108# 4108 4110# 4110
4234# 4234 4236# 4236 4238# 4238 4243# 4243 4245# 4245 4247# 4247 4252# 4252
4254# 4254 4256# 4256 4261# 4261 4263# 4263 4265# 4265 4270# 4270 4272# 4272
4274# 4274 4276# 4276 4278# 4278 4280# 4280 4282# 4282 4284# 4284 4286# 4286
4291# 4291 4293# 4293 4295# 4295 4297# 4297 4299# 4299 4301# 4301 4303# 4303
4305# 4305 4307# 4307 4471# 4471 4473# 4473 4475# 4475 4481# 4481 4483# 4483
4485# 4485 4487# 4487 4493# 4493 4495# 4495 4497# 4497 4499# 4499 4504# 4504
4506# 4506 4508# 4508 4510# 4510 4512# 4512 4517# 4517 4519# 4519 4521# 4521
4523# 4523 4525# 4525 4530# 4530 4532# 4532 4534# 4534 4539# 4539 4541# 4541
4543# 4543 4545# 4545 4547# 4547 4549# 4549 4551# 4551 4553# 4553 4555# 4555
4557# 4557 4559# 4559 4561# 4561 4563# 4563 4568# 4568 4570# 4570 4572# 4572
4574# 4574 4576# 4576 4578# 4578 4580# 4580 4582# 4582 4584# 4584 4589# 4589
4591# 4591 4593# 4593 4595# 4595 4597# 4597 4599# 4599 4601# 4601 4603# 4603
4605# 4605 4765# 4765 4767# 4767 4769# 4769 4775# 4775 4777# 4777 4779# 4779
4781# 4781 4783# 4783 4785# 4785 4787# 4787 4789# 4789 4791# 4791 4793# 4793
4798# 4798 4800# 4800 4802# 4802 4804# 4804 4809# 4809 4811# 4811 4813# 4813
4815# 4815 4817# 4817 4819# 4819 4821# 4821 4823# 4823 4825# 4825 4830# 4830
4832# 4832 4834# 4834 4836# 4836 4838# 4838 4840# 4840 4842# 4842 4844# 4844
4846# 4846 5047# 5047 5049# 5049 5051# 5051 5057# 5057 5059# 5059 5061# 5061
5063# 5063 5065# 5065 5067# 5067 5069# 5069 5071# 5071 5078# 5078 5080# 5080
5082# 5082 5084# 5084 5086# 5086 5088# 5088 5090# 5090 5092# 5092 5097# 5097
5099# 5099 5101# 5101 5103# 5103 5109# 5109 5111# 5111 5113# 5113 5115# 5115
5117# 5117 5123# 5123 5125# 5125 5127# 5127 5129# 5129 5131# 5131 5136# 5136
5138# 5138 5140# 5140 5142# 5142 5144# 5144 5146# 5146 5148# 5148 5150# 5150
5152# 5152 5157# 5157 5159# 5159 5161# 5161 5163# 5163 5165# 5165 5167# 5167
5169# 5169 5171# 5171 5173# 5173 5323# 5323 5325# 5325 5327# 5327 5329# 5329
5331# 5331 5336# 5336 5338# 5338 5340# 5340 5342# 5342 5344# 5344 5346# 5346
5348# 5348 5350# 5350 5352# 5352 5354# 5354 5359# 5359 5361# 5361 5363# 5363
5365# 5365 5367# 5367 5369# 5369 5371# 5371 5373# 5373 5378# 5378 5380# 5380
5382# 5382 5384# 5384 5386# 5386 5388# 5388 5390# 5390 5392# 5392 5397# 5397
5399# 5399 5401# 5401 5403# 5403 5405# 5405 5407# 5407 5412# 5412 5414# 5414
5419# 5419 5421# 5421 5423# 5423 5425# 5425 5427# 5427 5429# 5429 5431# 5431
5433# 5433 5435# 5435 5440# 5440 5442# 5442 5444# 5444 5446# 5446 5448# 5448
5450# 5450 5452# 5452 5454# 5454 5456# 5456 5594# 5594 5596# 5596 5598# 5598
5600# 5600 5605# 5605 5607# 5607 5609# 5609 5611# 5611 5613# 5613 5615# 5615
5620# 5620 5622# 5622 5624# 5624 5626# 5626 5628# 5628 5630# 5630 5635# 5635
5637# 5637 5639# 5639 5641# 5641 5643# 5643 5645# 5645 5647# 5647 5652# 5652
5654# 5654 5656# 5656 5658# 5658 5660# 5660 5662# 5662 5664# 5664 5666# 5666
5668# 5668 5673# 5673 5675# 5675 5677# 5677 5679# 5679 5681# 5681 5683# 5683
5685# 5685 5687# 5687 5689# 5689 5810# 5810 5812# 5812 5814# 5814 5817# 5817
5819# 5819 5821# 5821 5940# 5940 5945# 5945 5947# 5947 5949# 5949 5951# 5951
5953# 5953 5955# 5955 5957# 5957 5959# 5959 5961# 5961 5963# 5963 5965# 5965
5967# 5967 5969# 5969 5971# 5971 5973# 5973 5975# 5975 5977# 5977 5979# 5979
5981# 5981 5983# 5983 5985# 5985 5987# 5987 5989# 5989 5991# 5991 5993# 5993
5995# 5995 5997# 5997 5999# 5999 6001# 6001 6003# 6003 6005# 6005 6007# 6007
6009# 6009 6011# 6011 6013# 6013 6015# 6015 6017# 6017 6019# 6019 6021# 6021
6023# 6023 6025# 6025 6027# 6027 6029# 6029 6031# 6031 6033# 6033 6035# 6035
6037# 6037 6039# 6039 6041# 6041 6043# 6043 6045# 6045 6047# 6047 6049# 6049
6051# 6051 6053# 6053 6055# 6055 6057# 6057 6059# 6059 6061# 6061 6063# 6063
6065# 6065 6067# 6067 6069# 6069 6071# 6071 6073# 6073 6075# 6075 6077# 6077
6079# 6079 6081# 6081 6083# 6083 6085# 6085 6087# 6087 6089# 6089 6091# 6091
6093# 6093 6095# 6095 6097# 6097 6099# 6099 6101# 6101 6103# 6103 6105# 6105
6107# 6107 6109# 6109 6111# 6111 6113# 6113 6115# 6115 6117# 6117 6119# 6119 SEQ 1561
6121# 6121 6123# 6123 6125# 6125 6127# 6127 6129# 6129 6131# 6131 6133# 6133
6135# 6135 6137# 6137 6139# 6139 6141# 6141 6143# 6143 6145# 6145 6147# 6147
6149# 6149 6151# 6151 6153# 6153 6155# 6155 6157# 6157 6159# 6159 6161# 6161
6163# 6163 6165# 6165 6167# 6167 6172# 6172 6180# 6180 6182# 6182 6184# 6184
6186# 6186 6188# 6188 6193# 6193 6195# 6195 6197# 6197 6199# 6199 6201# 6201
6203# 6203 6205# 6205 6207# 6207 6209# 6209 6211# 6211 6213# 6213 6215# 6215
6217# 6217 6219# 6219 6221# 6221 6223# 6223 6225# 6225 6227# 6227 6229# 6229
6231# 6231 6233# 6233 6235# 6235 6237# 6237 6239# 6239 6241# 6241 6243# 6243
6245# 6245 6247# 6247 6249# 6249 6251# 6251 6253# 6253 6255# 6255 6257# 6257
6262# 6262 6264# 6264 6266# 6266 6268# 6268 6271# 6271 6273# 6273 6275# 6275
6277# 6277 6280# 6280 6282# 6282 6284# 6284 6286# 6286 6289# 6289 6291# 6291
6293# 6293 6295# 6295 6298# 6298 6300# 6300 6302# 6302 6304# 6304 6307# 6307
6309# 6309 6311# 6311 6313# 6313 6316# 6316 6318# 6318 6320# 6320 6322# 6322
6325# 6325 6327# 6327 6329# 6329 6331# 6331 6334# 6334 6336# 6336 6338# 6338
6340# 6340 6343# 6343 6345# 6345 6347# 6347 6349# 6349 6352# 6352 6354# 6354
6356# 6356 6358# 6358 6361# 6361 6363# 6363 6365# 6365 6367# 6367 6370# 6370
6372# 6372 6374# 6374 6376# 6376 6379# 6379 6381# 6381 6383# 6383 6385# 6385
6388# 6388 6390# 6390 6392# 6392 6394# 6394 6397# 6397 6399# 6399 6401# 6401
6403# 6403 6406# 6406 6408# 6408 6410# 6410 6412# 6412 6415# 6415 6417# 6417
6419# 6419 6421# 6421 6424# 6424 6426# 6426 6428# 6428 6430# 6430 6433# 6433
6435# 6435 6437# 6437 6439# 6439 6442# 6442 6444# 6444 6446# 6446 6448# 6448
6451# 6451 6453# 6453 6455# 6455 6457# 6457 6460# 6460 6462# 6462 6464# 6464
6466# 6466 6469# 6469 6471# 6471 6473# 6473 6475# 6475 6478# 6478 6480# 6480
6482# 6482 6484# 6484 6487# 6487 6489# 6489 6491# 6491 6493# 6493 6496# 6496
6498# 6498 6500# 6500 6502# 6502 6505# 6505 6507# 6507 6509# 6509 6511# 6511
6514# 6514 6516# 6516 6518# 6518 6520# 6520 6523# 6523 6525# 6525 6527# 6527
6529# 6529 6532# 6532 6534# 6534 6536# 6536 6538# 6538 6541# 6541 6543# 6543
6545# 6545 6547# 6547 6550# 6550 6740# 6740 6742# 6742 6744# 6744 6746# 6746
6752# 6752 6754# 6754 6840# 6840 6842# 6842 6844# 6844 6846# 6846 6851# 6851
6853# 6853 6858# 6858 6860# 6860 6862# 6862 6864# 6864 6866# 6866 6960# 6960
6962# 6962 6964# 6964 6966# 6966 6968# 6968
$CHR 1212# 1212 1214# 1214 1216# 1216 1219# 1219 1221# 1221 1223# 1223 1226# 1226
1228# 1228 1230# 1230 1233# 1233 1235# 1235 1237# 1237 1327# 1327 1329# 1329
1331# 1331 1423# 1423 1425# 1425 1427# 1427 1430# 1430 1432# 1432 1434# 1434
1437# 1437 1439# 1439 1441# 1441 1444# 1444 1446# 1446 1448# 1448 1451# 1451
1453# 1453 1455# 1455 1458# 1458 1460# 1460 1462# 1462 1465# 1465 1467# 1467
1469# 1469 1472# 1472 1474# 1474 1476# 1476 1563# 1563 1565# 1565 1567# 1567
1570# 1570 1572# 1572 1574# 1574 1577# 1577 1579# 1579 1581# 1581 1748# 1748
1750# 1750 1752# 1752 1757# 1757 1759# 1759 1761# 1761 1763# 1763 1768# 1768
1770# 1770 1772# 1772 1774# 1774 1779# 1779 1781# 1781 1783# 1783 1785# 1785
1787# 1787 1789# 1789 1791# 1791 1796# 1796 1798# 1798 1800# 1800 1802# 1802
1804# 1804 1806# 1806 1808# 1808 1813# 1813 1815# 1815 1817# 1817 1819# 1819
1821# 1821 1823# 1823 1825# 1825 1830# 1830 1832# 1832 1837# 1837 1839# 1839
1841# 1841 1843# 1843 1845# 1845 1847# 1847 1849# 1849 1851# 1851 1853# 1853
1858# 1858 1860# 1860 1862# 1862 1864# 1864 1866# 1866 1868# 1868 1870# 1870
1872# 1872 1874# 1874 2025# 2025 2027# 2027 2029# 2029 2034# 2034 2036# 2036
2038# 2038 2043# 2043 2045# 2045 2047# 2047 2049# 2049 2051# 2051 2053# 2053
2058# 2058 2060# 2060 2062# 2062 2064# 2064 2066# 2066 2068# 2068 2070# 2070
2076# 2076 2078# 2078 2080# 2080 2082# 2082 2084# 2084 2086# 2086 2088# 2088
2090# 2090 2095# 2095 2097# 2097 2099# 2099 2101# 2101 2103# 2103 2105# 2105
2107# 2107 2109# 2109 2111# 2111 2116# 2116 2118# 2118 2120# 2120 2122# 2122
2124# 2124 2126# 2126 2128# 2128 2130# 2130 2132# 2132 2247# 2247 2249# 2249
2251# 2251 2253# 2253 2255# 2255 2257# 2257 2259# 2259 2261# 2261 2263# 2263 SEQ 1562
2265# 2265 2267# 2267 2269# 2269 2271# 2271 2273# 2273 2275# 2275 2277# 2277
2279# 2279 2281# 2281 2283# 2283 2285# 2285 2287# 2287 2289# 2289 2291# 2291
2293# 2293 2295# 2295 2297# 2297 2299# 2299 2301# 2301 2303# 2303 2305# 2305
2307# 2307 2309# 2309 2311# 2311 2313# 2313 2315# 2315 2317# 2317 2319# 2319
2321# 2321 2326# 2326 2328# 2328 2330# 2330 2335# 2335 2337# 2337 2339# 2339
2341# 2341 2346# 2346 2348# 2348 2350# 2350 2355# 2355 2357# 2357 2359# 2359
2364# 2364 2366# 2366 2368# 2368 2373# 2373 2375# 2375 2377# 2377 2382# 2382
2384# 2384 2386# 2386 2391# 2391 2393# 2393 2395# 2395 2400# 2400 2402# 2402
2404# 2404 2409# 2409 2411# 2411 2413# 2413 2418# 2418 2420# 2420 2422# 2422
2427# 2427 2429# 2429 2431# 2431 2436# 2436 2438# 2438 2440# 2440 2445# 2445
2447# 2447 2449# 2449 2454# 2454 2456# 2456 2458# 2458 2463# 2463 2465# 2465
2467# 2467 2472# 2472 2474# 2474 2476# 2476 2481# 2481 2483# 2483 2485# 2485
2490# 2490 2492# 2492 2494# 2494 2499# 2499 2501# 2501 2503# 2503 2508# 2508
2510# 2510 2512# 2512 2517# 2517 2519# 2519 2521# 2521 2526# 2526 2528# 2528
2530# 2530 2535# 2535 2537# 2537 2539# 2539 2544# 2544 2546# 2546 2548# 2548
2553# 2553 2555# 2555 2557# 2557 2562# 2562 2564# 2564 2566# 2566 2571# 2571
2573# 2573 2575# 2575 2580# 2580 2582# 2582 2584# 2584 2589# 2589 2591# 2591
2593# 2593 2598# 2598 2600# 2600 2602# 2602 2607# 2607 2609# 2609 2611# 2611
2616# 2616 2618# 2618 2620# 2620 2625# 2625 2627# 2627 2629# 2629 2634# 2634
2636# 2636 2638# 2638 2643# 2643 2645# 2645 2647# 2647 2652# 2652 2654# 2654
2656# 2656 2658# 2658 2663# 2663 2665# 2665 2670# 2670 2672# 2672 2674# 2674
2679# 2679 2681# 2681 2683# 2683 2685# 2685 2687# 2687 2689# 2689 2691# 2691
2693# 2693 2695# 2695 2700# 2700 2702# 2702 2704# 2704 2706# 2706 2708# 2708
2710# 2710 2712# 2712 2714# 2714 2716# 2716 2847# 2847 2849# 2849 2851# 2851
2856# 2856 2858# 2858 2860# 2860 2862# 2862 2864# 2864 2866# 2866 2871# 2871
2873# 2873 2875# 2875 2877# 2877 2879# 2879 2881# 2881 2886# 2886 2888# 2888
2890# 2890 2892# 2892 2894# 2894 2896# 2896 2898# 2898 2903# 2903 2905# 2905
2907# 2907 2909# 2909 2911# 2911 2913# 2913 2915# 2915 2917# 2917 2919# 2919
2924# 2924 2926# 2926 2928# 2928 2930# 2930 2932# 2932 2934# 2934 2936# 2936
2938# 2938 2940# 2940 3053# 3053 3055# 3055 3057# 3057 3062# 3062 3064# 3064
3066# 3066 3068# 3068 3070# 3070 3072# 3072 3074# 3074 3076# 3076 3081# 3081
3083# 3083 3085# 3085 3087# 3087 3089# 3089 3091# 3091 3093# 3093 3095# 3095
3097# 3097 3102# 3102 3104# 3104 3106# 3106 3108# 3108 3110# 3110 3112# 3112
3114# 3114 3116# 3116 3118# 3118 3224# 3224 3226# 3226 3228# 3228 3230# 3230
3232# 3232 3234# 3234 3236# 3236 3238# 3238 3243# 3243 3245# 3245 3247# 3247
3249# 3249 3251# 3251 3253# 3253 3258# 3258 3260# 3260 3262# 3262 3264# 3264
3266# 3266 3268# 3268 3273# 3273 3275# 3275 3277# 3277 3279# 3279 3281# 3281
3283# 3283 3285# 3285 3287# 3287 3289# 3289 3294# 3294 3296# 3296 3298# 3298
3300# 3300 3302# 3302 3304# 3304 3306# 3306 3308# 3308 3310# 3310 3416# 3416
3418# 3418 3420# 3420 3422# 3422 3424# 3424 3426# 3426 3428# 3428 3430# 3430
3435# 3435 3437# 3437 3439# 3439 3441# 3441 3443# 3443 3445# 3445 3450# 3450
3452# 3452 3454# 3454 3456# 3456 3458# 3458 3460# 3460 3465# 3465 3467# 3467
3469# 3469 3471# 3471 3473# 3473 3475# 3475 3477# 3477 3479# 3479 3481# 3481
3486# 3486 3488# 3488 3490# 3490 3492# 3492 3494# 3494 3496# 3496 3498# 3498
3500# 3500 3502# 3502 3608# 3608 3610# 3610 3612# 3612 3614# 3614 3616# 3616
3618# 3618 3620# 3620 3622# 3622 3627# 3627 3629# 3629 3631# 3631 3633# 3633
3635# 3635 3637# 3637 3642# 3642 3644# 3644 3646# 3646 3648# 3648 3650# 3650
3652# 3652 3657# 3657 3659# 3659 3661# 3661 3663# 3663 3665# 3665 3667# 3667
3669# 3669 3671# 3671 3673# 3673 3678# 3678 3680# 3680 3682# 3682 3684# 3684
3686# 3686 3688# 3688 3690# 3690 3692# 3692 3694# 3694 3838# 3838 3840# 3840
3842# 3842 3847# 3847 3849# 3849 3851# 3851 3856# 3856 3858# 3858 3860# 3860
3862# 3862 3864# 3864 3869# 3869 3871# 3871 3873# 3873 3875# 3875 3877# 3877
3879# 3879 3881# 3881 3883# 3883 3885# 3885 3890# 3890 3892# 3892 3894# 3894 SEQ 1563
3896# 3896 3898# 3898 3900# 3900 3902# 3902 3904# 3904 3906# 3906 4042# 4042
4044# 4044 4046# 4046 4051# 4051 4053# 4053 4055# 4055 4057# 4057 4062# 4062
4064# 4064 4066# 4066 4068# 4068 4073# 4073 4075# 4075 4077# 4077 4079# 4079
4081# 4081 4083# 4083 4085# 4085 4087# 4087 4089# 4089 4094# 4094 4096# 4096
4098# 4098 4100# 4100 4102# 4102 4104# 4104 4106# 4106 4108# 4108 4110# 4110
4234# 4234 4236# 4236 4238# 4238 4243# 4243 4245# 4245 4247# 4247 4252# 4252
4254# 4254 4256# 4256 4261# 4261 4263# 4263 4265# 4265 4270# 4270 4272# 4272
4274# 4274 4276# 4276 4278# 4278 4280# 4280 4282# 4282 4284# 4284 4286# 4286
4291# 4291 4293# 4293 4295# 4295 4297# 4297 4299# 4299 4301# 4301 4303# 4303
4305# 4305 4307# 4307 4471# 4471 4473# 4473 4475# 4475 4481# 4481 4483# 4483
4485# 4485 4487# 4487 4493# 4493 4495# 4495 4497# 4497 4499# 4499 4504# 4504
4506# 4506 4508# 4508 4510# 4510 4512# 4512 4517# 4517 4519# 4519 4521# 4521
4523# 4523 4525# 4525 4530# 4530 4532# 4532 4534# 4534 4539# 4539 4541# 4541
4543# 4543 4545# 4545 4547# 4547 4549# 4549 4551# 4551 4553# 4553 4555# 4555
4557# 4557 4559# 4559 4561# 4561 4563# 4563 4568# 4568 4570# 4570 4572# 4572
4574# 4574 4576# 4576 4578# 4578 4580# 4580 4582# 4582 4584# 4584 4589# 4589
4591# 4591 4593# 4593 4595# 4595 4597# 4597 4599# 4599 4601# 4601 4603# 4603
4605# 4605 4765# 4765 4767# 4767 4769# 4769 4775# 4775 4777# 4777 4779# 4779
4781# 4781 4783# 4783 4785# 4785 4787# 4787 4789# 4789 4791# 4791 4793# 4793
4798# 4798 4800# 4800 4802# 4802 4804# 4804 4809# 4809 4811# 4811 4813# 4813
4815# 4815 4817# 4817 4819# 4819 4821# 4821 4823# 4823 4825# 4825 4830# 4830
4832# 4832 4834# 4834 4836# 4836 4838# 4838 4840# 4840 4842# 4842 4844# 4844
4846# 4846 5047# 5047 5049# 5049 5051# 5051 5057# 5057 5059# 5059 5061# 5061
5063# 5063 5065# 5065 5067# 5067 5069# 5069 5071# 5071 5078# 5078 5080# 5080
5082# 5082 5084# 5084 5086# 5086 5088# 5088 5090# 5090 5092# 5092 5097# 5097
5099# 5099 5101# 5101 5103# 5103 5109# 5109 5111# 5111 5113# 5113 5115# 5115
5117# 5117 5123# 5123 5125# 5125 5127# 5127 5129# 5129 5131# 5131 5136# 5136
5138# 5138 5140# 5140 5142# 5142 5144# 5144 5146# 5146 5148# 5148 5150# 5150
5152# 5152 5157# 5157 5159# 5159 5161# 5161 5163# 5163 5165# 5165 5167# 5167
5169# 5169 5171# 5171 5173# 5173 5323# 5323 5325# 5325 5327# 5327 5329# 5329
5331# 5331 5336# 5336 5338# 5338 5340# 5340 5342# 5342 5344# 5344 5346# 5346
5348# 5348 5350# 5350 5352# 5352 5354# 5354 5359# 5359 5361# 5361 5363# 5363
5365# 5365 5367# 5367 5369# 5369 5371# 5371 5373# 5373 5378# 5378 5380# 5380
5382# 5382 5384# 5384 5386# 5386 5388# 5388 5390# 5390 5392# 5392 5397# 5397
5399# 5399 5401# 5401 5403# 5403 5405# 5405 5407# 5407 5412# 5412 5414# 5414
5419# 5419 5421# 5421 5423# 5423 5425# 5425 5427# 5427 5429# 5429 5431# 5431
5433# 5433 5435# 5435 5440# 5440 5442# 5442 5444# 5444 5446# 5446 5448# 5448
5450# 5450 5452# 5452 5454# 5454 5456# 5456 5594# 5594 5596# 5596 5598# 5598
5600# 5600 5605# 5605 5607# 5607 5609# 5609 5611# 5611 5613# 5613 5615# 5615
5620# 5620 5622# 5622 5624# 5624 5626# 5626 5628# 5628 5630# 5630 5635# 5635
5637# 5637 5639# 5639 5641# 5641 5643# 5643 5645# 5645 5647# 5647 5652# 5652
5654# 5654 5656# 5656 5658# 5658 5660# 5660 5662# 5662 5664# 5664 5666# 5666
5668# 5668 5673# 5673 5675# 5675 5677# 5677 5679# 5679 5681# 5681 5683# 5683
5685# 5685 5687# 5687 5689# 5689 5810# 5810 5812# 5812 5814# 5814 5817# 5817
5819# 5819 5821# 5821 5940# 5940 5945# 5945 5947# 5947 5949# 5949 5951# 5951
5953# 5953 5955# 5955 5957# 5957 5959# 5959 5961# 5961 5963# 5963 5965# 5965
5967# 5967 5969# 5969 5971# 5971 5973# 5973 5975# 5975 5977# 5977 5979# 5979
5981# 5981 5983# 5983 5985# 5985 5987# 5987 5989# 5989 5991# 5991 5993# 5993
5995# 5995 5997# 5997 5999# 5999 6001# 6001 6003# 6003 6005# 6005 6007# 6007
6009# 6009 6011# 6011 6013# 6013 6015# 6015 6017# 6017 6019# 6019 6021# 6021
6023# 6023 6025# 6025 6027# 6027 6029# 6029 6031# 6031 6033# 6033 6035# 6035
6037# 6037 6039# 6039 6041# 6041 6043# 6043 6045# 6045 6047# 6047 6049# 6049
6051# 6051 6053# 6053 6055# 6055 6057# 6057 6059# 6059 6061# 6061 6063# 6063 SEQ 1564
6065# 6065 6067# 6067 6069# 6069 6071# 6071 6073# 6073 6075# 6075 6077# 6077
6079# 6079 6081# 6081 6083# 6083 6085# 6085 6087# 6087 6089# 6089 6091# 6091
6093# 6093 6095# 6095 6097# 6097 6099# 6099 6101# 6101 6103# 6103 6105# 6105
6107# 6107 6109# 6109 6111# 6111 6113# 6113 6115# 6115 6117# 6117 6119# 6119
6121# 6121 6123# 6123 6125# 6125 6127# 6127 6129# 6129 6131# 6131 6133# 6133
6135# 6135 6137# 6137 6139# 6139 6141# 6141 6143# 6143 6145# 6145 6147# 6147
6149# 6149 6151# 6151 6153# 6153 6155# 6155 6157# 6157 6159# 6159 6161# 6161
6163# 6163 6165# 6165 6167# 6167 6172# 6172 6180# 6180 6182# 6182 6184# 6184
6186# 6186 6188# 6188 6193# 6193 6195# 6195 6197# 6197 6199# 6199 6201# 6201
6203# 6203 6205# 6205 6207# 6207 6209# 6209 6211# 6211 6213# 6213 6215# 6215
6217# 6217 6219# 6219 6221# 6221 6223# 6223 6225# 6225 6227# 6227 6229# 6229
6231# 6231 6233# 6233 6235# 6235 6237# 6237 6239# 6239 6241# 6241 6243# 6243
6245# 6245 6247# 6247 6249# 6249 6251# 6251 6253# 6253 6255# 6255 6257# 6257
6262# 6262 6264# 6264 6266# 6266 6268# 6268 6271# 6271 6273# 6273 6275# 6275
6277# 6277 6280# 6280 6282# 6282 6284# 6284 6286# 6286 6289# 6289 6291# 6291
6293# 6293 6295# 6295 6298# 6298 6300# 6300 6302# 6302 6304# 6304 6307# 6307
6309# 6309 6311# 6311 6313# 6313 6316# 6316 6318# 6318 6320# 6320 6322# 6322
6325# 6325 6327# 6327 6329# 6329 6331# 6331 6334# 6334 6336# 6336 6338# 6338
6340# 6340 6343# 6343 6345# 6345 6347# 6347 6349# 6349 6352# 6352 6354# 6354
6356# 6356 6358# 6358 6361# 6361 6363# 6363 6365# 6365 6367# 6367 6370# 6370
6372# 6372 6374# 6374 6376# 6376 6379# 6379 6381# 6381 6383# 6383 6385# 6385
6388# 6388 6390# 6390 6392# 6392 6394# 6394 6397# 6397 6399# 6399 6401# 6401
6403# 6403 6406# 6406 6408# 6408 6410# 6410 6412# 6412 6415# 6415 6417# 6417
6419# 6419 6421# 6421 6424# 6424 6426# 6426 6428# 6428 6430# 6430 6433# 6433
6435# 6435 6437# 6437 6439# 6439 6442# 6442 6444# 6444 6446# 6446 6448# 6448
6451# 6451 6453# 6453 6455# 6455 6457# 6457 6460# 6460 6462# 6462 6464# 6464
6466# 6466 6469# 6469 6471# 6471 6473# 6473 6475# 6475 6478# 6478 6480# 6480
6482# 6482 6484# 6484 6487# 6487 6489# 6489 6491# 6491 6493# 6493 6496# 6496
6498# 6498 6500# 6500 6502# 6502 6505# 6505 6507# 6507 6509# 6509 6511# 6511
6514# 6514 6516# 6516 6518# 6518 6520# 6520 6523# 6523 6525# 6525 6527# 6527
6529# 6529 6532# 6532 6534# 6534 6536# 6536 6538# 6538 6541# 6541 6543# 6543
6545# 6545 6547# 6547 6550# 6550 6740# 6740 6742# 6742 6744# 6744 6746# 6746
6752# 6752 6754# 6754 6840# 6840 6842# 6842 6844# 6844 6846# 6846 6851# 6851
6853# 6853 6858# 6858 6860# 6860 6862# 6862 6864# 6864 6866# 6866 6960# 6960
6962# 6962 6964# 6964 6966# 6966 6968# 6968
$GARG 1212# 1212 1214# 1214 1216# 1216 1219# 1219 1221# 1221 1223# 1223 1226# 1226
1228# 1228 1230# 1230 1233# 1233 1235# 1235 1237# 1237 1327# 1327 1329# 1329
1331# 1331 1423# 1423 1425# 1425 1427# 1427 1430# 1430 1432# 1432 1434# 1434
1437# 1437 1439# 1439 1441# 1441 1444# 1444 1446# 1446 1448# 1448 1451# 1451
1453# 1453 1455# 1455 1458# 1458 1460# 1460 1462# 1462 1465# 1465 1467# 1467
1469# 1469 1472# 1472 1474# 1474 1476# 1476 1563# 1563 1565# 1565 1567# 1567
1570# 1570 1572# 1572 1574# 1574 1577# 1577 1579# 1579 1581# 1581 1748# 1748
1750# 1750 1752# 1752 1757# 1757 1759# 1759 1761# 1761 1763# 1763 1768# 1768
1770# 1770 1772# 1772 1774# 1774 1779# 1779 1781# 1781 1783# 1783 1785# 1785
1787# 1787 1789# 1789 1791# 1791 1796# 1796 1798# 1798 1800# 1800 1802# 1802
1804# 1804 1806# 1806 1808# 1808 1813# 1813 1815# 1815 1817# 1817 1819# 1819
1821# 1821 1823# 1823 1825# 1825 1830# 1830 1832# 1832 1837# 1837 1839# 1839
1841# 1841 1843# 1843 1845# 1845 1847# 1847 1849# 1849 1851# 1851 1853# 1853
1858# 1858 1860# 1860 1862# 1862 1864# 1864 1866# 1866 1868# 1868 1870# 1870
1872# 1872 1874# 1874 2025# 2025 2027# 2027 2029# 2029 2034# 2034 2036# 2036
2038# 2038 2043# 2043 2045# 2045 2047# 2047 2049# 2049 2051# 2051 2053# 2053
2058# 2058 2060# 2060 2062# 2062 2064# 2064 2066# 2066 2068# 2068 2070# 2070
2076# 2076 2078# 2078 2080# 2080 2082# 2082 2084# 2084 2086# 2086 2088# 2088 SEQ 1565
2090# 2090 2095# 2095 2097# 2097 2099# 2099 2101# 2101 2103# 2103 2105# 2105
2107# 2107 2109# 2109 2111# 2111 2116# 2116 2118# 2118 2120# 2120 2122# 2122
2124# 2124 2126# 2126 2128# 2128 2130# 2130 2132# 2132 2247# 2247 2249# 2249
2251# 2251 2253# 2253 2255# 2255 2257# 2257 2259# 2259 2261# 2261 2263# 2263
2265# 2265 2267# 2267 2269# 2269 2271# 2271 2273# 2273 2275# 2275 2277# 2277
2279# 2279 2281# 2281 2283# 2283 2285# 2285 2287# 2287 2289# 2289 2291# 2291
2293# 2293 2295# 2295 2297# 2297 2299# 2299 2301# 2301 2303# 2303 2305# 2305
2307# 2307 2309# 2309 2311# 2311 2313# 2313 2315# 2315 2317# 2317 2319# 2319
2321# 2321 2326# 2326 2328# 2328 2330# 2330 2335# 2335 2337# 2337 2339# 2339
2341# 2341 2346# 2346 2348# 2348 2350# 2350 2355# 2355 2357# 2357 2359# 2359
2364# 2364 2366# 2366 2368# 2368 2373# 2373 2375# 2375 2377# 2377 2382# 2382
2384# 2384 2386# 2386 2391# 2391 2393# 2393 2395# 2395 2400# 2400 2402# 2402
2404# 2404 2409# 2409 2411# 2411 2413# 2413 2418# 2418 2420# 2420 2422# 2422
2427# 2427 2429# 2429 2431# 2431 2436# 2436 2438# 2438 2440# 2440 2445# 2445
2447# 2447 2449# 2449 2454# 2454 2456# 2456 2458# 2458 2463# 2463 2465# 2465
2467# 2467 2472# 2472 2474# 2474 2476# 2476 2481# 2481 2483# 2483 2485# 2485
2490# 2490 2492# 2492 2494# 2494 2499# 2499 2501# 2501 2503# 2503 2508# 2508
2510# 2510 2512# 2512 2517# 2517 2519# 2519 2521# 2521 2526# 2526 2528# 2528
2530# 2530 2535# 2535 2537# 2537 2539# 2539 2544# 2544 2546# 2546 2548# 2548
2553# 2553 2555# 2555 2557# 2557 2562# 2562 2564# 2564 2566# 2566 2571# 2571
2573# 2573 2575# 2575 2580# 2580 2582# 2582 2584# 2584 2589# 2589 2591# 2591
2593# 2593 2598# 2598 2600# 2600 2602# 2602 2607# 2607 2609# 2609 2611# 2611
2616# 2616 2618# 2618 2620# 2620 2625# 2625 2627# 2627 2629# 2629 2634# 2634
2636# 2636 2638# 2638 2643# 2643 2645# 2645 2647# 2647 2652# 2652 2654# 2654
2656# 2656 2658# 2658 2663# 2663 2665# 2665 2670# 2670 2672# 2672 2674# 2674
2679# 2679 2681# 2681 2683# 2683 2685# 2685 2687# 2687 2689# 2689 2691# 2691
2693# 2693 2695# 2695 2700# 2700 2702# 2702 2704# 2704 2706# 2706 2708# 2708
2710# 2710 2712# 2712 2714# 2714 2716# 2716 2847# 2847 2849# 2849 2851# 2851
2856# 2856 2858# 2858 2860# 2860 2862# 2862 2864# 2864 2866# 2866 2871# 2871
2873# 2873 2875# 2875 2877# 2877 2879# 2879 2881# 2881 2886# 2886 2888# 2888
2890# 2890 2892# 2892 2894# 2894 2896# 2896 2898# 2898 2903# 2903 2905# 2905
2907# 2907 2909# 2909 2911# 2911 2913# 2913 2915# 2915 2917# 2917 2919# 2919
2924# 2924 2926# 2926 2928# 2928 2930# 2930 2932# 2932 2934# 2934 2936# 2936
2938# 2938 2940# 2940 3053# 3053 3055# 3055 3057# 3057 3062# 3062 3064# 3064
3066# 3066 3068# 3068 3070# 3070 3072# 3072 3074# 3074 3076# 3076 3081# 3081
3083# 3083 3085# 3085 3087# 3087 3089# 3089 3091# 3091 3093# 3093 3095# 3095
3097# 3097 3102# 3102 3104# 3104 3106# 3106 3108# 3108 3110# 3110 3112# 3112
3114# 3114 3116# 3116 3118# 3118 3224# 3224 3226# 3226 3228# 3228 3230# 3230
3232# 3232 3234# 3234 3236# 3236 3238# 3238 3243# 3243 3245# 3245 3247# 3247
3249# 3249 3251# 3251 3253# 3253 3258# 3258 3260# 3260 3262# 3262 3264# 3264
3266# 3266 3268# 3268 3273# 3273 3275# 3275 3277# 3277 3279# 3279 3281# 3281
3283# 3283 3285# 3285 3287# 3287 3289# 3289 3294# 3294 3296# 3296 3298# 3298
3300# 3300 3302# 3302 3304# 3304 3306# 3306 3308# 3308 3310# 3310 3416# 3416
3418# 3418 3420# 3420 3422# 3422 3424# 3424 3426# 3426 3428# 3428 3430# 3430
3435# 3435 3437# 3437 3439# 3439 3441# 3441 3443# 3443 3445# 3445 3450# 3450
3452# 3452 3454# 3454 3456# 3456 3458# 3458 3460# 3460 3465# 3465 3467# 3467
3469# 3469 3471# 3471 3473# 3473 3475# 3475 3477# 3477 3479# 3479 3481# 3481
3486# 3486 3488# 3488 3490# 3490 3492# 3492 3494# 3494 3496# 3496 3498# 3498
3500# 3500 3502# 3502 3608# 3608 3610# 3610 3612# 3612 3614# 3614 3616# 3616
3618# 3618 3620# 3620 3622# 3622 3627# 3627 3629# 3629 3631# 3631 3633# 3633
3635# 3635 3637# 3637 3642# 3642 3644# 3644 3646# 3646 3648# 3648 3650# 3650
3652# 3652 3657# 3657 3659# 3659 3661# 3661 3663# 3663 3665# 3665 3667# 3667
3669# 3669 3671# 3671 3673# 3673 3678# 3678 3680# 3680 3682# 3682 3684# 3684 SEQ 1566
3686# 3686 3688# 3688 3690# 3690 3692# 3692 3694# 3694 3838# 3838 3840# 3840
3842# 3842 3847# 3847 3849# 3849 3851# 3851 3856# 3856 3858# 3858 3860# 3860
3862# 3862 3864# 3864 3869# 3869 3871# 3871 3873# 3873 3875# 3875 3877# 3877
3879# 3879 3881# 3881 3883# 3883 3885# 3885 3890# 3890 3892# 3892 3894# 3894
3896# 3896 3898# 3898 3900# 3900 3902# 3902 3904# 3904 3906# 3906 4042# 4042
4044# 4044 4046# 4046 4051# 4051 4053# 4053 4055# 4055 4057# 4057 4062# 4062
4064# 4064 4066# 4066 4068# 4068 4073# 4073 4075# 4075 4077# 4077 4079# 4079
4081# 4081 4083# 4083 4085# 4085 4087# 4087 4089# 4089 4094# 4094 4096# 4096
4098# 4098 4100# 4100 4102# 4102 4104# 4104 4106# 4106 4108# 4108 4110# 4110
4234# 4234 4236# 4236 4238# 4238 4243# 4243 4245# 4245 4247# 4247 4252# 4252
4254# 4254 4256# 4256 4261# 4261 4263# 4263 4265# 4265 4270# 4270 4272# 4272
4274# 4274 4276# 4276 4278# 4278 4280# 4280 4282# 4282 4284# 4284 4286# 4286
4291# 4291 4293# 4293 4295# 4295 4297# 4297 4299# 4299 4301# 4301 4303# 4303
4305# 4305 4307# 4307 4471# 4471 4473# 4473 4475# 4475 4481# 4481 4483# 4483
4485# 4485 4487# 4487 4493# 4493 4495# 4495 4497# 4497 4499# 4499 4504# 4504
4506# 4506 4508# 4508 4510# 4510 4512# 4512 4517# 4517 4519# 4519 4521# 4521
4523# 4523 4525# 4525 4530# 4530 4532# 4532 4534# 4534 4539# 4539 4541# 4541
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4557# 4557 4559# 4559 4561# 4561 4563# 4563 4568# 4568 4570# 4570 4572# 4572
4574# 4574 4576# 4576 4578# 4578 4580# 4580 4582# 4582 4584# 4584 4589# 4589
4591# 4591 4593# 4593 4595# 4595 4597# 4597 4599# 4599 4601# 4601 4603# 4603
4605# 4605 4765# 4765 4767# 4767 4769# 4769 4775# 4775 4777# 4777 4779# 4779
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4798# 4798 4800# 4800 4802# 4802 4804# 4804 4809# 4809 4811# 4811 4813# 4813
4815# 4815 4817# 4817 4819# 4819 4821# 4821 4823# 4823 4825# 4825 4830# 4830
4832# 4832 4834# 4834 4836# 4836 4838# 4838 4840# 4840 4842# 4842 4844# 4844
4846# 4846 5047# 5047 5049# 5049 5051# 5051 5057# 5057 5059# 5059 5061# 5061
5063# 5063 5065# 5065 5067# 5067 5069# 5069 5071# 5071 5078# 5078 5080# 5080
5082# 5082 5084# 5084 5086# 5086 5088# 5088 5090# 5090 5092# 5092 5097# 5097
5099# 5099 5101# 5101 5103# 5103 5109# 5109 5111# 5111 5113# 5113 5115# 5115
5117# 5117 5123# 5123 5125# 5125 5127# 5127 5129# 5129 5131# 5131 5136# 5136
5138# 5138 5140# 5140 5142# 5142 5144# 5144 5146# 5146 5148# 5148 5150# 5150
5152# 5152 5157# 5157 5159# 5159 5161# 5161 5163# 5163 5165# 5165 5167# 5167
5169# 5169 5171# 5171 5173# 5173 5323# 5323 5325# 5325 5327# 5327 5329# 5329
5331# 5331 5336# 5336 5338# 5338 5340# 5340 5342# 5342 5344# 5344 5346# 5346
5348# 5348 5350# 5350 5352# 5352 5354# 5354 5359# 5359 5361# 5361 5363# 5363
5365# 5365 5367# 5367 5369# 5369 5371# 5371 5373# 5373 5378# 5378 5380# 5380
5382# 5382 5384# 5384 5386# 5386 5388# 5388 5390# 5390 5392# 5392 5397# 5397
5399# 5399 5401# 5401 5403# 5403 5405# 5405 5407# 5407 5412# 5412 5414# 5414
5419# 5419 5421# 5421 5423# 5423 5425# 5425 5427# 5427 5429# 5429 5431# 5431
5433# 5433 5435# 5435 5440# 5440 5442# 5442 5444# 5444 5446# 5446 5448# 5448
5450# 5450 5452# 5452 5454# 5454 5456# 5456 5594# 5594 5596# 5596 5598# 5598
5600# 5600 5605# 5605 5607# 5607 5609# 5609 5611# 5611 5613# 5613 5615# 5615
5620# 5620 5622# 5622 5624# 5624 5626# 5626 5628# 5628 5630# 5630 5635# 5635
5637# 5637 5639# 5639 5641# 5641 5643# 5643 5645# 5645 5647# 5647 5652# 5652
5654# 5654 5656# 5656 5658# 5658 5660# 5660 5662# 5662 5664# 5664 5666# 5666
5668# 5668 5673# 5673 5675# 5675 5677# 5677 5679# 5679 5681# 5681 5683# 5683
5685# 5685 5687# 5687 5689# 5689 5810# 5810 5812# 5812 5814# 5814 5817# 5817
5819# 5819 5821# 5821 5940# 5940 5945# 5945 5947# 5947 5949# 5949 5951# 5951
5953# 5953 5955# 5955 5957# 5957 5959# 5959 5961# 5961 5963# 5963 5965# 5965
5967# 5967 5969# 5969 5971# 5971 5973# 5973 5975# 5975 5977# 5977 5979# 5979
5981# 5981 5983# 5983 5985# 5985 5987# 5987 5989# 5989 5991# 5991 5993# 5993
5995# 5995 5997# 5997 5999# 5999 6001# 6001 6003# 6003 6005# 6005 6007# 6007 SEQ 1567
6009# 6009 6011# 6011 6013# 6013 6015# 6015 6017# 6017 6019# 6019 6021# 6021
6023# 6023 6025# 6025 6027# 6027 6029# 6029 6031# 6031 6033# 6033 6035# 6035
6037# 6037 6039# 6039 6041# 6041 6043# 6043 6045# 6045 6047# 6047 6049# 6049
6051# 6051 6053# 6053 6055# 6055 6057# 6057 6059# 6059 6061# 6061 6063# 6063
6065# 6065 6067# 6067 6069# 6069 6071# 6071 6073# 6073 6075# 6075 6077# 6077
6079# 6079 6081# 6081 6083# 6083 6085# 6085 6087# 6087 6089# 6089 6091# 6091
6093# 6093 6095# 6095 6097# 6097 6099# 6099 6101# 6101 6103# 6103 6105# 6105
6107# 6107 6109# 6109 6111# 6111 6113# 6113 6115# 6115 6117# 6117 6119# 6119
6121# 6121 6123# 6123 6125# 6125 6127# 6127 6129# 6129 6131# 6131 6133# 6133
6135# 6135 6137# 6137 6139# 6139 6141# 6141 6143# 6143 6145# 6145 6147# 6147
6149# 6149 6151# 6151 6153# 6153 6155# 6155 6157# 6157 6159# 6159 6161# 6161
6163# 6163 6165# 6165 6167# 6167 6172# 6172 6180# 6180 6182# 6182 6184# 6184
6186# 6186 6188# 6188 6193# 6193 6195# 6195 6197# 6197 6199# 6199 6201# 6201
6203# 6203 6205# 6205 6207# 6207 6209# 6209 6211# 6211 6213# 6213 6215# 6215
6217# 6217 6219# 6219 6221# 6221 6223# 6223 6225# 6225 6227# 6227 6229# 6229
6231# 6231 6233# 6233 6235# 6235 6237# 6237 6239# 6239 6241# 6241 6243# 6243
6245# 6245 6247# 6247 6249# 6249 6251# 6251 6253# 6253 6255# 6255 6257# 6257
6262# 6262 6264# 6264 6266# 6266 6268# 6268 6271# 6271 6273# 6273 6275# 6275
6277# 6277 6280# 6280 6282# 6282 6284# 6284 6286# 6286 6289# 6289 6291# 6291
6293# 6293 6295# 6295 6298# 6298 6300# 6300 6302# 6302 6304# 6304 6307# 6307
6309# 6309 6311# 6311 6313# 6313 6316# 6316 6318# 6318 6320# 6320 6322# 6322
6325# 6325 6327# 6327 6329# 6329 6331# 6331 6334# 6334 6336# 6336 6338# 6338
6340# 6340 6343# 6343 6345# 6345 6347# 6347 6349# 6349 6352# 6352 6354# 6354
6356# 6356 6358# 6358 6361# 6361 6363# 6363 6365# 6365 6367# 6367 6370# 6370
6372# 6372 6374# 6374 6376# 6376 6379# 6379 6381# 6381 6383# 6383 6385# 6385
6388# 6388 6390# 6390 6392# 6392 6394# 6394 6397# 6397 6399# 6399 6401# 6401
6403# 6403 6406# 6406 6408# 6408 6410# 6410 6412# 6412 6415# 6415 6417# 6417
6419# 6419 6421# 6421 6424# 6424 6426# 6426 6428# 6428 6430# 6430 6433# 6433
6435# 6435 6437# 6437 6439# 6439 6442# 6442 6444# 6444 6446# 6446 6448# 6448
6451# 6451 6453# 6453 6455# 6455 6457# 6457 6460# 6460 6462# 6462 6464# 6464
6466# 6466 6469# 6469 6471# 6471 6473# 6473 6475# 6475 6478# 6478 6480# 6480
6482# 6482 6484# 6484 6487# 6487 6489# 6489 6491# 6491 6493# 6493 6496# 6496
6498# 6498 6500# 6500 6502# 6502 6505# 6505 6507# 6507 6509# 6509 6511# 6511
6514# 6514 6516# 6516 6518# 6518 6520# 6520 6523# 6523 6525# 6525 6527# 6527
6529# 6529 6532# 6532 6534# 6534 6536# 6536 6538# 6538 6541# 6541 6543# 6543
6545# 6545 6547# 6547 6550# 6550 6740# 6740 6742# 6742 6744# 6744 6746# 6746
6752# 6752 6754# 6754 6840# 6840 6842# 6842 6844# 6844 6846# 6846 6851# 6851
6853# 6853 6858# 6858 6860# 6860 6862# 6862 6864# 6864 6866# 6866 6960# 6960
6962# 6962 6964# 6964 6966# 6966 6968# 6968
%ADDR 1212# 1212 1214 1214# 1216 1216# 1219 1219# 1221 1221# 1223 1223# 1226 1226#
1228 1228# 1230 1230# 1233 1233# 1235 1235# 1237 1237# 1327# 1327 1329 1329#
1331 1331# 1423# 1423 1425 1425# 1427 1427# 1430 1430# 1432 1432# 1434 1434#
1437 1437# 1439 1439# 1441 1441# 1444 1444# 1446 1446# 1448 1448# 1451 1451#
1453 1453# 1455 1455# 1458 1458# 1460 1460# 1462 1462# 1465 1465# 1467 1467#
1469 1469# 1472 1472# 1474 1474# 1476 1476# 1563# 1563 1565 1565# 1567 1567#
1570 1570# 1572 1572# 1574 1574# 1577 1577# 1579 1579# 1581 1581# 1748# 1748
1750 1750# 1752 1752# 1757# 1757 1759 1759# 1761 1761# 1763 1763# 1768# 1768
1770 1770# 1772 1772# 1774 1774# 1779# 1779 1781 1781# 1783 1783# 1785 1785#
1787 1787# 1789 1789# 1791 1791# 1796# 1796 1798 1798# 1800 1800# 1802 1802#
1804 1804# 1806 1806# 1808 1808# 1813# 1813 1815 1815# 1817 1817# 1819 1819#
1821 1821# 1823 1823# 1825 1825# 1830# 1830 1832 1832# 1837# 1837 1839 1839#
1841 1841# 1843 1843# 1845 1845# 1847 1847# 1849 1849# 1851 1851# 1853 1853#
1858# 1858 1860 1860# 1862 1862# 1864 1864# 1866 1866# 1868 1868# 1870 1870# SEQ 1568
1872 1872# 1874 1874# 2025# 2025 2027 2027# 2029 2029# 2034# 2034 2036 2036#
2038 2038# 2043# 2043 2045 2045# 2047 2047# 2049 2049# 2051 2051# 2053 2053#
2058# 2058 2060 2060# 2062 2062# 2064 2064# 2066 2066# 2068 2068# 2070 2070#
2076# 2076 2078 2078# 2080 2080# 2082 2082# 2084 2084# 2086 2086# 2088 2088#
2090 2090# 2095# 2095 2097 2097# 2099 2099# 2101 2101# 2103 2103# 2105 2105#
2107 2107# 2109 2109# 2111 2111# 2116# 2116 2118 2118# 2120 2120# 2122 2122#
2124 2124# 2126 2126# 2128 2128# 2130 2130# 2132 2132# 2247# 2247 2249 2249#
2251 2251# 2253 2253# 2255 2255# 2257 2257# 2259 2259# 2261 2261# 2263 2263#
2265 2265# 2267 2267# 2269 2269# 2271 2271# 2273 2273# 2275 2275# 2277 2277#
2279 2279# 2281 2281# 2283 2283# 2285 2285# 2287 2287# 2289 2289# 2291 2291#
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3097 3097# 3102# 3102 3104 3104# 3106 3106# 3108 3108# 3110 3110# 3112 3112#
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3283 3283# 3285 3285# 3287 3287# 3289 3289# 3294# 3294 3296 3296# 3298 3298#
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3500 3500# 3502 3502# 3608# 3608 3610# 3610 3612 3612# 3614 3614# 3616 3616# SEQ 1569
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6962 6962# 6964 6964# 6966 6966# 6968 6968#
%ML 1212# 1212 1214# 1214 1216# 1216 1219# 1219 1221# 1221 1223# 1223 1226# 1226
1228# 1228 1230# 1230 1233# 1233 1235# 1235 1237# 1237 1327# 1327 1329# 1329
1331# 1331 1423# 1423 1425# 1425 1427# 1427 1430# 1430 1432# 1432 1434# 1434
1437# 1437 1439# 1439 1441# 1441 1444# 1444 1446# 1446 1448# 1448 1451# 1451
1453# 1453 1455# 1455 1458# 1458 1460# 1460 1462# 1462 1465# 1465 1467# 1467
1469# 1469 1472# 1472 1474# 1474 1476# 1476 1563# 1563 1565# 1565 1567# 1567
1570# 1570 1572# 1572 1574# 1574 1577# 1577 1579# 1579 1581# 1581 1748# 1748
1750# 1750 1752# 1752 1757# 1757 1759# 1759 1761# 1761 1763# 1763 1768# 1768
1770# 1770 1772# 1772 1774# 1774 1779# 1779 1781# 1781 1783# 1783 1785# 1785
1787# 1787 1789# 1789 1791# 1791 1796# 1796 1798# 1798 1800# 1800 1802# 1802 SEQ 1571
1804# 1804 1806# 1806 1808# 1808 1813# 1813 1815# 1815 1817# 1817 1819# 1819
1821# 1821 1823# 1823 1825# 1825 1830# 1830 1832# 1832 1837# 1837 1839# 1839
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4081# 4081 4083# 4083 4085# 4085 4087# 4087 4089# 4089 4094# 4094 4096# 4096
4098# 4098 4100# 4100 4102# 4102 4104# 4104 4106# 4106 4108# 4108 4110# 4110
4234# 4234 4236# 4236 4238# 4238 4243# 4243 4245# 4245 4247# 4247 4252# 4252
4254# 4254 4256# 4256 4261# 4261 4263# 4263 4265# 4265 4270# 4270 4272# 4272
4274# 4274 4276# 4276 4278# 4278 4280# 4280 4282# 4282 4284# 4284 4286# 4286
4291# 4291 4293# 4293 4295# 4295 4297# 4297 4299# 4299 4301# 4301 4303# 4303
4305# 4305 4307# 4307 4471# 4471 4473# 4473 4475# 4475 4481# 4481 4483# 4483
4485# 4485 4487# 4487 4493# 4493 4495# 4495 4497# 4497 4499# 4499 4504# 4504
4506# 4506 4508# 4508 4510# 4510 4512# 4512 4517# 4517 4519# 4519 4521# 4521
4523# 4523 4525# 4525 4530# 4530 4532# 4532 4534# 4534 4539# 4539 4541# 4541
4543# 4543 4545# 4545 4547# 4547 4549# 4549 4551# 4551 4553# 4553 4555# 4555
4557# 4557 4559# 4559 4561# 4561 4563# 4563 4568# 4568 4570# 4570 4572# 4572
4574# 4574 4576# 4576 4578# 4578 4580# 4580 4582# 4582 4584# 4584 4589# 4589
4591# 4591 4593# 4593 4595# 4595 4597# 4597 4599# 4599 4601# 4601 4603# 4603
4605# 4605 4765# 4765 4767# 4767 4769# 4769 4775# 4775 4777# 4777 4779# 4779
4781# 4781 4783# 4783 4785# 4785 4787# 4787 4789# 4789 4791# 4791 4793# 4793
4798# 4798 4800# 4800 4802# 4802 4804# 4804 4809# 4809 4811# 4811 4813# 4813
4815# 4815 4817# 4817 4819# 4819 4821# 4821 4823# 4823 4825# 4825 4830# 4830
4832# 4832 4834# 4834 4836# 4836 4838# 4838 4840# 4840 4842# 4842 4844# 4844
4846# 4846 5047# 5047 5049# 5049 5051# 5051 5057# 5057 5059# 5059 5061# 5061
5063# 5063 5065# 5065 5067# 5067 5069# 5069 5071# 5071 5078# 5078 5080# 5080
5082# 5082 5084# 5084 5086# 5086 5088# 5088 5090# 5090 5092# 5092 5097# 5097
5099# 5099 5101# 5101 5103# 5103 5109# 5109 5111# 5111 5113# 5113 5115# 5115
5117# 5117 5123# 5123 5125# 5125 5127# 5127 5129# 5129 5131# 5131 5136# 5136
5138# 5138 5140# 5140 5142# 5142 5144# 5144 5146# 5146 5148# 5148 5150# 5150
5152# 5152 5157# 5157 5159# 5159 5161# 5161 5163# 5163 5165# 5165 5167# 5167
5169# 5169 5171# 5171 5173# 5173 5323# 5323 5325# 5325 5327# 5327 5329# 5329
5331# 5331 5336# 5336 5338# 5338 5340# 5340 5342# 5342 5344# 5344 5346# 5346
5348# 5348 5350# 5350 5352# 5352 5354# 5354 5359# 5359 5361# 5361 5363# 5363
5365# 5365 5367# 5367 5369# 5369 5371# 5371 5373# 5373 5378# 5378 5380# 5380
5382# 5382 5384# 5384 5386# 5386 5388# 5388 5390# 5390 5392# 5392 5397# 5397
5399# 5399 5401# 5401 5403# 5403 5405# 5405 5407# 5407 5412# 5412 5414# 5414
5419# 5419 5421# 5421 5423# 5423 5425# 5425 5427# 5427 5429# 5429 5431# 5431
5433# 5433 5435# 5435 5440# 5440 5442# 5442 5444# 5444 5446# 5446 5448# 5448
5450# 5450 5452# 5452 5454# 5454 5456# 5456 5594# 5594 5596# 5596 5598# 5598
5600# 5600 5605# 5605 5607# 5607 5609# 5609 5611# 5611 5613# 5613 5615# 5615
5620# 5620 5622# 5622 5624# 5624 5626# 5626 5628# 5628 5630# 5630 5635# 5635
5637# 5637 5639# 5639 5641# 5641 5643# 5643 5645# 5645 5647# 5647 5652# 5652 SEQ 1573
5654# 5654 5656# 5656 5658# 5658 5660# 5660 5662# 5662 5664# 5664 5666# 5666
5668# 5668 5673# 5673 5675# 5675 5677# 5677 5679# 5679 5681# 5681 5683# 5683
5685# 5685 5687# 5687 5689# 5689 5810# 5810 5812# 5812 5814# 5814 5817# 5817
5819# 5819 5821# 5821 5940# 5940 5945# 5945 5947# 5947 5949# 5949 5951# 5951
5953# 5953 5955# 5955 5957# 5957 5959# 5959 5961# 5961 5963# 5963 5965# 5965
5967# 5967 5969# 5969 5971# 5971 5973# 5973 5975# 5975 5977# 5977 5979# 5979
5981# 5981 5983# 5983 5985# 5985 5987# 5987 5989# 5989 5991# 5991 5993# 5993
5995# 5995 5997# 5997 5999# 5999 6001# 6001 6003# 6003 6005# 6005 6007# 6007
6009# 6009 6011# 6011 6013# 6013 6015# 6015 6017# 6017 6019# 6019 6021# 6021
6023# 6023 6025# 6025 6027# 6027 6029# 6029 6031# 6031 6033# 6033 6035# 6035
6037# 6037 6039# 6039 6041# 6041 6043# 6043 6045# 6045 6047# 6047 6049# 6049
6051# 6051 6053# 6053 6055# 6055 6057# 6057 6059# 6059 6061# 6061 6063# 6063
6065# 6065 6067# 6067 6069# 6069 6071# 6071 6073# 6073 6075# 6075 6077# 6077
6079# 6079 6081# 6081 6083# 6083 6085# 6085 6087# 6087 6089# 6089 6091# 6091
6093# 6093 6095# 6095 6097# 6097 6099# 6099 6101# 6101 6103# 6103 6105# 6105
6107# 6107 6109# 6109 6111# 6111 6113# 6113 6115# 6115 6117# 6117 6119# 6119
6121# 6121 6123# 6123 6125# 6125 6127# 6127 6129# 6129 6131# 6131 6133# 6133
6135# 6135 6137# 6137 6139# 6139 6141# 6141 6143# 6143 6145# 6145 6147# 6147
6149# 6149 6151# 6151 6153# 6153 6155# 6155 6157# 6157 6159# 6159 6161# 6161
6163# 6163 6165# 6165 6167# 6167 6172# 6172 6180# 6180 6182# 6182 6184# 6184
6186# 6186 6188# 6188 6193# 6193 6195# 6195 6197# 6197 6199# 6199 6201# 6201
6203# 6203 6205# 6205 6207# 6207 6209# 6209 6211# 6211 6213# 6213 6215# 6215
6217# 6217 6219# 6219 6221# 6221 6223# 6223 6225# 6225 6227# 6227 6229# 6229
6231# 6231 6233# 6233 6235# 6235 6237# 6237 6239# 6239 6241# 6241 6243# 6243
6245# 6245 6247# 6247 6249# 6249 6251# 6251 6253# 6253 6255# 6255 6257# 6257
6262# 6262 6264# 6264 6266# 6266 6268# 6268 6271# 6271 6273# 6273 6275# 6275
6277# 6277 6280# 6280 6282# 6282 6284# 6284 6286# 6286 6289# 6289 6291# 6291
6293# 6293 6295# 6295 6298# 6298 6300# 6300 6302# 6302 6304# 6304 6307# 6307
6309# 6309 6311# 6311 6313# 6313 6316# 6316 6318# 6318 6320# 6320 6322# 6322
6325# 6325 6327# 6327 6329# 6329 6331# 6331 6334# 6334 6336# 6336 6338# 6338
6340# 6340 6343# 6343 6345# 6345 6347# 6347 6349# 6349 6352# 6352 6354# 6354
6356# 6356 6358# 6358 6361# 6361 6363# 6363 6365# 6365 6367# 6367 6370# 6370
6372# 6372 6374# 6374 6376# 6376 6379# 6379 6381# 6381 6383# 6383 6385# 6385
6388# 6388 6390# 6390 6392# 6392 6394# 6394 6397# 6397 6399# 6399 6401# 6401
6403# 6403 6406# 6406 6408# 6408 6410# 6410 6412# 6412 6415# 6415 6417# 6417
6419# 6419 6421# 6421 6424# 6424 6426# 6426 6428# 6428 6430# 6430 6433# 6433
6435# 6435 6437# 6437 6439# 6439 6442# 6442 6444# 6444 6446# 6446 6448# 6448
6451# 6451 6453# 6453 6455# 6455 6457# 6457 6460# 6460 6462# 6462 6464# 6464
6466# 6466 6469# 6469 6471# 6471 6473# 6473 6475# 6475 6478# 6478 6480# 6480
6482# 6482 6484# 6484 6487# 6487 6489# 6489 6491# 6491 6493# 6493 6496# 6496
6498# 6498 6500# 6500 6502# 6502 6505# 6505 6507# 6507 6509# 6509 6511# 6511
6514# 6514 6516# 6516 6518# 6518 6520# 6520 6523# 6523 6525# 6525 6527# 6527
6529# 6529 6532# 6532 6534# 6534 6536# 6536 6538# 6538 6541# 6541 6543# 6543
6545# 6545 6547# 6547 6550# 6550 6740# 6740 6742# 6742 6744# 6744 6746# 6746
6752# 6752 6754# 6754 6840# 6840 6842# 6842 6844# 6844 6846# 6846 6851# 6851
6853# 6853 6858# 6858 6860# 6860 6862# 6862 6864# 6864 6866# 6866 6960# 6960
6962# 6962 6964# 6964 6966# 6966 6968# 6968
%MR 1212# 1212 1214# 1214 1216# 1216 1219# 1219 1221# 1221 1223# 1223 1226# 1226
1228# 1228 1230# 1230 1233# 1233 1235# 1235 1237# 1237 1327# 1327 1329# 1329
1331# 1331 1423# 1423 1425# 1425 1427# 1427 1430# 1430 1432# 1432 1434# 1434
1437# 1437 1439# 1439 1441# 1441 1444# 1444 1446# 1446 1448# 1448 1451# 1451
1453# 1453 1455# 1455 1458# 1458 1460# 1460 1462# 1462 1465# 1465 1467# 1467
1469# 1469 1472# 1472 1474# 1474 1476# 1476 1563# 1563 1565# 1565 1567# 1567 SEQ 1574
1570# 1570 1572# 1572 1574# 1574 1577# 1577 1579# 1579 1581# 1581 1748# 1748
1750# 1750 1752# 1752 1757# 1757 1759# 1759 1761# 1761 1763# 1763 1768# 1768
1770# 1770 1772# 1772 1774# 1774 1779# 1779 1781# 1781 1783# 1783 1785# 1785
1787# 1787 1789# 1789 1791# 1791 1796# 1796 1798# 1798 1800# 1800 1802# 1802
1804# 1804 1806# 1806 1808# 1808 1813# 1813 1815# 1815 1817# 1817 1819# 1819
1821# 1821 1823# 1823 1825# 1825 1830# 1830 1832# 1832 1837# 1837 1839# 1839
1841# 1841 1843# 1843 1845# 1845 1847# 1847 1849# 1849 1851# 1851 1853# 1853
1858# 1858 1860# 1860 1862# 1862 1864# 1864 1866# 1866 1868# 1868 1870# 1870
1872# 1872 1874# 1874 2025# 2025 2027# 2027 2029# 2029 2034# 2034 2036# 2036
2038# 2038 2043# 2043 2045# 2045 2047# 2047 2049# 2049 2051# 2051 2053# 2053
2058# 2058 2060# 2060 2062# 2062 2064# 2064 2066# 2066 2068# 2068 2070# 2070
2076# 2076 2078# 2078 2080# 2080 2082# 2082 2084# 2084 2086# 2086 2088# 2088
2090# 2090 2095# 2095 2097# 2097 2099# 2099 2101# 2101 2103# 2103 2105# 2105
2107# 2107 2109# 2109 2111# 2111 2116# 2116 2118# 2118 2120# 2120 2122# 2122
2124# 2124 2126# 2126 2128# 2128 2130# 2130 2132# 2132 2247# 2247 2249# 2249
2251# 2251 2253# 2253 2255# 2255 2257# 2257 2259# 2259 2261# 2261 2263# 2263
2265# 2265 2267# 2267 2269# 2269 2271# 2271 2273# 2273 2275# 2275 2277# 2277
2279# 2279 2281# 2281 2283# 2283 2285# 2285 2287# 2287 2289# 2289 2291# 2291
2293# 2293 2295# 2295 2297# 2297 2299# 2299 2301# 2301 2303# 2303 2305# 2305
2307# 2307 2309# 2309 2311# 2311 2313# 2313 2315# 2315 2317# 2317 2319# 2319
2321# 2321 2326# 2326 2328# 2328 2330# 2330 2335# 2335 2337# 2337 2339# 2339
2341# 2341 2346# 2346 2348# 2348 2350# 2350 2355# 2355 2357# 2357 2359# 2359
2364# 2364 2366# 2366 2368# 2368 2373# 2373 2375# 2375 2377# 2377 2382# 2382
2384# 2384 2386# 2386 2391# 2391 2393# 2393 2395# 2395 2400# 2400 2402# 2402
2404# 2404 2409# 2409 2411# 2411 2413# 2413 2418# 2418 2420# 2420 2422# 2422
2427# 2427 2429# 2429 2431# 2431 2436# 2436 2438# 2438 2440# 2440 2445# 2445
2447# 2447 2449# 2449 2454# 2454 2456# 2456 2458# 2458 2463# 2463 2465# 2465
2467# 2467 2472# 2472 2474# 2474 2476# 2476 2481# 2481 2483# 2483 2485# 2485
2490# 2490 2492# 2492 2494# 2494 2499# 2499 2501# 2501 2503# 2503 2508# 2508
2510# 2510 2512# 2512 2517# 2517 2519# 2519 2521# 2521 2526# 2526 2528# 2528
2530# 2530 2535# 2535 2537# 2537 2539# 2539 2544# 2544 2546# 2546 2548# 2548
2553# 2553 2555# 2555 2557# 2557 2562# 2562 2564# 2564 2566# 2566 2571# 2571
2573# 2573 2575# 2575 2580# 2580 2582# 2582 2584# 2584 2589# 2589 2591# 2591
2593# 2593 2598# 2598 2600# 2600 2602# 2602 2607# 2607 2609# 2609 2611# 2611
2616# 2616 2618# 2618 2620# 2620 2625# 2625 2627# 2627 2629# 2629 2634# 2634
2636# 2636 2638# 2638 2643# 2643 2645# 2645 2647# 2647 2652# 2652 2654# 2654
2656# 2656 2658# 2658 2663# 2663 2665# 2665 2670# 2670 2672# 2672 2674# 2674
2679# 2679 2681# 2681 2683# 2683 2685# 2685 2687# 2687 2689# 2689 2691# 2691
2693# 2693 2695# 2695 2700# 2700 2702# 2702 2704# 2704 2706# 2706 2708# 2708
2710# 2710 2712# 2712 2714# 2714 2716# 2716 2847# 2847 2849# 2849 2851# 2851
2856# 2856 2858# 2858 2860# 2860 2862# 2862 2864# 2864 2866# 2866 2871# 2871
2873# 2873 2875# 2875 2877# 2877 2879# 2879 2881# 2881 2886# 2886 2888# 2888
2890# 2890 2892# 2892 2894# 2894 2896# 2896 2898# 2898 2903# 2903 2905# 2905
2907# 2907 2909# 2909 2911# 2911 2913# 2913 2915# 2915 2917# 2917 2919# 2919
2924# 2924 2926# 2926 2928# 2928 2930# 2930 2932# 2932 2934# 2934 2936# 2936
2938# 2938 2940# 2940 3053# 3053 3055# 3055 3057# 3057 3062# 3062 3064# 3064
3066# 3066 3068# 3068 3070# 3070 3072# 3072 3074# 3074 3076# 3076 3081# 3081
3083# 3083 3085# 3085 3087# 3087 3089# 3089 3091# 3091 3093# 3093 3095# 3095
3097# 3097 3102# 3102 3104# 3104 3106# 3106 3108# 3108 3110# 3110 3112# 3112
3114# 3114 3116# 3116 3118# 3118 3224# 3224 3226# 3226 3228# 3228 3230# 3230
3232# 3232 3234# 3234 3236# 3236 3238# 3238 3243# 3243 3245# 3245 3247# 3247
3249# 3249 3251# 3251 3253# 3253 3258# 3258 3260# 3260 3262# 3262 3264# 3264
3266# 3266 3268# 3268 3273# 3273 3275# 3275 3277# 3277 3279# 3279 3281# 3281 SEQ 1575
3283# 3283 3285# 3285 3287# 3287 3289# 3289 3294# 3294 3296# 3296 3298# 3298
3300# 3300 3302# 3302 3304# 3304 3306# 3306 3308# 3308 3310# 3310 3416# 3416
3418# 3418 3420# 3420 3422# 3422 3424# 3424 3426# 3426 3428# 3428 3430# 3430
3435# 3435 3437# 3437 3439# 3439 3441# 3441 3443# 3443 3445# 3445 3450# 3450
3452# 3452 3454# 3454 3456# 3456 3458# 3458 3460# 3460 3465# 3465 3467# 3467
3469# 3469 3471# 3471 3473# 3473 3475# 3475 3477# 3477 3479# 3479 3481# 3481
3486# 3486 3488# 3488 3490# 3490 3492# 3492 3494# 3494 3496# 3496 3498# 3498
3500# 3500 3502# 3502 3608# 3608 3610# 3610 3612# 3612 3614# 3614 3616# 3616
3618# 3618 3620# 3620 3622# 3622 3627# 3627 3629# 3629 3631# 3631 3633# 3633
3635# 3635 3637# 3637 3642# 3642 3644# 3644 3646# 3646 3648# 3648 3650# 3650
3652# 3652 3657# 3657 3659# 3659 3661# 3661 3663# 3663 3665# 3665 3667# 3667
3669# 3669 3671# 3671 3673# 3673 3678# 3678 3680# 3680 3682# 3682 3684# 3684
3686# 3686 3688# 3688 3690# 3690 3692# 3692 3694# 3694 3838# 3838 3840# 3840
3842# 3842 3847# 3847 3849# 3849 3851# 3851 3856# 3856 3858# 3858 3860# 3860
3862# 3862 3864# 3864 3869# 3869 3871# 3871 3873# 3873 3875# 3875 3877# 3877
3879# 3879 3881# 3881 3883# 3883 3885# 3885 3890# 3890 3892# 3892 3894# 3894
3896# 3896 3898# 3898 3900# 3900 3902# 3902 3904# 3904 3906# 3906 4042# 4042
4044# 4044 4046# 4046 4051# 4051 4053# 4053 4055# 4055 4057# 4057 4062# 4062
4064# 4064 4066# 4066 4068# 4068 4073# 4073 4075# 4075 4077# 4077 4079# 4079
4081# 4081 4083# 4083 4085# 4085 4087# 4087 4089# 4089 4094# 4094 4096# 4096
4098# 4098 4100# 4100 4102# 4102 4104# 4104 4106# 4106 4108# 4108 4110# 4110
4234# 4234 4236# 4236 4238# 4238 4243# 4243 4245# 4245 4247# 4247 4252# 4252
4254# 4254 4256# 4256 4261# 4261 4263# 4263 4265# 4265 4270# 4270 4272# 4272
4274# 4274 4276# 4276 4278# 4278 4280# 4280 4282# 4282 4284# 4284 4286# 4286
4291# 4291 4293# 4293 4295# 4295 4297# 4297 4299# 4299 4301# 4301 4303# 4303
4305# 4305 4307# 4307 4471# 4471 4473# 4473 4475# 4475 4481# 4481 4483# 4483
4485# 4485 4487# 4487 4493# 4493 4495# 4495 4497# 4497 4499# 4499 4504# 4504
4506# 4506 4508# 4508 4510# 4510 4512# 4512 4517# 4517 4519# 4519 4521# 4521
4523# 4523 4525# 4525 4530# 4530 4532# 4532 4534# 4534 4539# 4539 4541# 4541
4543# 4543 4545# 4545 4547# 4547 4549# 4549 4551# 4551 4553# 4553 4555# 4555
4557# 4557 4559# 4559 4561# 4561 4563# 4563 4568# 4568 4570# 4570 4572# 4572
4574# 4574 4576# 4576 4578# 4578 4580# 4580 4582# 4582 4584# 4584 4589# 4589
4591# 4591 4593# 4593 4595# 4595 4597# 4597 4599# 4599 4601# 4601 4603# 4603
4605# 4605 4765# 4765 4767# 4767 4769# 4769 4775# 4775 4777# 4777 4779# 4779
4781# 4781 4783# 4783 4785# 4785 4787# 4787 4789# 4789 4791# 4791 4793# 4793
4798# 4798 4800# 4800 4802# 4802 4804# 4804 4809# 4809 4811# 4811 4813# 4813
4815# 4815 4817# 4817 4819# 4819 4821# 4821 4823# 4823 4825# 4825 4830# 4830
4832# 4832 4834# 4834 4836# 4836 4838# 4838 4840# 4840 4842# 4842 4844# 4844
4846# 4846 5047# 5047 5049# 5049 5051# 5051 5057# 5057 5059# 5059 5061# 5061
5063# 5063 5065# 5065 5067# 5067 5069# 5069 5071# 5071 5078# 5078 5080# 5080
5082# 5082 5084# 5084 5086# 5086 5088# 5088 5090# 5090 5092# 5092 5097# 5097
5099# 5099 5101# 5101 5103# 5103 5109# 5109 5111# 5111 5113# 5113 5115# 5115
5117# 5117 5123# 5123 5125# 5125 5127# 5127 5129# 5129 5131# 5131 5136# 5136
5138# 5138 5140# 5140 5142# 5142 5144# 5144 5146# 5146 5148# 5148 5150# 5150
5152# 5152 5157# 5157 5159# 5159 5161# 5161 5163# 5163 5165# 5165 5167# 5167
5169# 5169 5171# 5171 5173# 5173 5323# 5323 5325# 5325 5327# 5327 5329# 5329
5331# 5331 5336# 5336 5338# 5338 5340# 5340 5342# 5342 5344# 5344 5346# 5346
5348# 5348 5350# 5350 5352# 5352 5354# 5354 5359# 5359 5361# 5361 5363# 5363
5365# 5365 5367# 5367 5369# 5369 5371# 5371 5373# 5373 5378# 5378 5380# 5380
5382# 5382 5384# 5384 5386# 5386 5388# 5388 5390# 5390 5392# 5392 5397# 5397
5399# 5399 5401# 5401 5403# 5403 5405# 5405 5407# 5407 5412# 5412 5414# 5414
5419# 5419 5421# 5421 5423# 5423 5425# 5425 5427# 5427 5429# 5429 5431# 5431
5433# 5433 5435# 5435 5440# 5440 5442# 5442 5444# 5444 5446# 5446 5448# 5448 SEQ 1576
5450# 5450 5452# 5452 5454# 5454 5456# 5456 5594# 5594 5596# 5596 5598# 5598
5600# 5600 5605# 5605 5607# 5607 5609# 5609 5611# 5611 5613# 5613 5615# 5615
5620# 5620 5622# 5622 5624# 5624 5626# 5626 5628# 5628 5630# 5630 5635# 5635
5637# 5637 5639# 5639 5641# 5641 5643# 5643 5645# 5645 5647# 5647 5652# 5652
5654# 5654 5656# 5656 5658# 5658 5660# 5660 5662# 5662 5664# 5664 5666# 5666
5668# 5668 5673# 5673 5675# 5675 5677# 5677 5679# 5679 5681# 5681 5683# 5683
5685# 5685 5687# 5687 5689# 5689 5810# 5810 5812# 5812 5814# 5814 5817# 5817
5819# 5819 5821# 5821 5940# 5940 5945# 5945 5947# 5947 5949# 5949 5951# 5951
5953# 5953 5955# 5955 5957# 5957 5959# 5959 5961# 5961 5963# 5963 5965# 5965
5967# 5967 5969# 5969 5971# 5971 5973# 5973 5975# 5975 5977# 5977 5979# 5979
5981# 5981 5983# 5983 5985# 5985 5987# 5987 5989# 5989 5991# 5991 5993# 5993
5995# 5995 5997# 5997 5999# 5999 6001# 6001 6003# 6003 6005# 6005 6007# 6007
6009# 6009 6011# 6011 6013# 6013 6015# 6015 6017# 6017 6019# 6019 6021# 6021
6023# 6023 6025# 6025 6027# 6027 6029# 6029 6031# 6031 6033# 6033 6035# 6035
6037# 6037 6039# 6039 6041# 6041 6043# 6043 6045# 6045 6047# 6047 6049# 6049
6051# 6051 6053# 6053 6055# 6055 6057# 6057 6059# 6059 6061# 6061 6063# 6063
6065# 6065 6067# 6067 6069# 6069 6071# 6071 6073# 6073 6075# 6075 6077# 6077
6079# 6079 6081# 6081 6083# 6083 6085# 6085 6087# 6087 6089# 6089 6091# 6091
6093# 6093 6095# 6095 6097# 6097 6099# 6099 6101# 6101 6103# 6103 6105# 6105
6107# 6107 6109# 6109 6111# 6111 6113# 6113 6115# 6115 6117# 6117 6119# 6119
6121# 6121 6123# 6123 6125# 6125 6127# 6127 6129# 6129 6131# 6131 6133# 6133
6135# 6135 6137# 6137 6139# 6139 6141# 6141 6143# 6143 6145# 6145 6147# 6147
6149# 6149 6151# 6151 6153# 6153 6155# 6155 6157# 6157 6159# 6159 6161# 6161
6163# 6163 6165# 6165 6167# 6167 6172# 6172 6180# 6180 6182# 6182 6184# 6184
6186# 6186 6188# 6188 6193# 6193 6195# 6195 6197# 6197 6199# 6199 6201# 6201
6203# 6203 6205# 6205 6207# 6207 6209# 6209 6211# 6211 6213# 6213 6215# 6215
6217# 6217 6219# 6219 6221# 6221 6223# 6223 6225# 6225 6227# 6227 6229# 6229
6231# 6231 6233# 6233 6235# 6235 6237# 6237 6239# 6239 6241# 6241 6243# 6243
6245# 6245 6247# 6247 6249# 6249 6251# 6251 6253# 6253 6255# 6255 6257# 6257
6262# 6262 6264# 6264 6266# 6266 6268# 6268 6271# 6271 6273# 6273 6275# 6275
6277# 6277 6280# 6280 6282# 6282 6284# 6284 6286# 6286 6289# 6289 6291# 6291
6293# 6293 6295# 6295 6298# 6298 6300# 6300 6302# 6302 6304# 6304 6307# 6307
6309# 6309 6311# 6311 6313# 6313 6316# 6316 6318# 6318 6320# 6320 6322# 6322
6325# 6325 6327# 6327 6329# 6329 6331# 6331 6334# 6334 6336# 6336 6338# 6338
6340# 6340 6343# 6343 6345# 6345 6347# 6347 6349# 6349 6352# 6352 6354# 6354
6356# 6356 6358# 6358 6361# 6361 6363# 6363 6365# 6365 6367# 6367 6370# 6370
6372# 6372 6374# 6374 6376# 6376 6379# 6379 6381# 6381 6383# 6383 6385# 6385
6388# 6388 6390# 6390 6392# 6392 6394# 6394 6397# 6397 6399# 6399 6401# 6401
6403# 6403 6406# 6406 6408# 6408 6410# 6410 6412# 6412 6415# 6415 6417# 6417
6419# 6419 6421# 6421 6424# 6424 6426# 6426 6428# 6428 6430# 6430 6433# 6433
6435# 6435 6437# 6437 6439# 6439 6442# 6442 6444# 6444 6446# 6446 6448# 6448
6451# 6451 6453# 6453 6455# 6455 6457# 6457 6460# 6460 6462# 6462 6464# 6464
6466# 6466 6469# 6469 6471# 6471 6473# 6473 6475# 6475 6478# 6478 6480# 6480
6482# 6482 6484# 6484 6487# 6487 6489# 6489 6491# 6491 6493# 6493 6496# 6496
6498# 6498 6500# 6500 6502# 6502 6505# 6505 6507# 6507 6509# 6509 6511# 6511
6514# 6514 6516# 6516 6518# 6518 6520# 6520 6523# 6523 6525# 6525 6527# 6527
6529# 6529 6532# 6532 6534# 6534 6536# 6536 6538# 6538 6541# 6541 6543# 6543
6545# 6545 6547# 6547 6550# 6550 6740# 6740 6742# 6742 6744# 6744 6746# 6746
6752# 6752 6754# 6754 6840# 6840 6842# 6842 6844# 6844 6846# 6846 6851# 6851
6853# 6853 6858# 6858 6860# 6860 6862# 6862 6864# 6864 6866# 6866 6960# 6960
6962# 6962 6964# 6964 6966# 6966 6968# 6968
.LA 1843 1845 1851 1864 1866 1872 2101 2103 2109 2122 2124 2130 2685 2687
2693 2706 2708 2714 2909 2911 2917 2930 2932 2938 3087 3089 3095 3108 SEQ 1577
3110 3116 3230 3279 3281 3287 3300 3302 3308 3422 3471 3473 3479 3492
3494 3500 3663 3665 3671 3684 3686 3692 3875 3877 3883 3896 3898 3904
4079 4081 4087 4100 4102 4108 4276 4278 4284 4297 4299 4305 4574 4576
4582 4595 4597 4603 4815 4817 4823 4836 4838 4844 5109 5123 5142 5144
5150 5163 5165 5171 5425 5427 5433 5446 5448 5454 5658 5660 5666 5679
5681 5687 5947 5949 5951 5953 5955 5957 5959 5961 5963 5965 5967 5969
5971 5973 5975 5977 5979 5981 5983 5985 5987 5989 5991 5993 5995 5997
5999 6001 6003 6005 6007 6009 6011 6013 6015 6017 6019 6021 6023 6025
6027 6029 6031 6033 6035 6037 6039 6041 6043 6045 6047 6049 6051 6053
6055 6057 6059 6061 6063 6065 6067 6069 6071 6073 6075 6077 6079 6081
6083 6085 6087 6089 6091 6093 6095 6097 6099 6101 6103 6105 6107 6109
6111 6113 6115 6117 6119 6121 6123 6125 6127 6129 6131 6133 6135 6137
6139 6141 6143 6145 6147 6149 6151 6153 6155 6157 6159 6161 6163 6165
6180 6182 6184 6186 6262 6266 6271 6275 6280 6284 6289 6293 6298 6302
6307 6311 6316 6320 6325 6329 6334 6338 6343 6347 6352 6356 6361 6365
6370 6374 6379 6383 6388 6392 6397 6401 6406 6410 6415 6419 6424 6428
6433 6437 6442 6446 6451 6455 6460 6464 6469 6473 6478 6482 6487 6491
6496 6500 6505 6509 6514 6518 6523 6527 6532 6536 6541 6545 6968
.LADDR 1212 1327 1423 1563 1748 1757 1768 1779 1796 1813 1830 1837 1858 2025
2034 2043 2058 2076 2095 2116 2247 2326 2335 2346 2355 2364 2373 2382
2391 2400 2409 2418 2427 2436 2445 2454 2463 2472 2481 2490 2499 2508
2517 2526 2535 2544 2553 2562 2571 2580 2589 2598 2607 2616 2625 2634
2643 2652 2663 2670 2679 2700 2847 2856 2871 2886 2903 2924 3053 3062
3081 3102 3224 3226 3243 3258 3273 3294 3416 3418 3435 3450 3465 3486
3608 3610 3627 3642 3657 3678 3838 3847 3856 3869 3890 4042 4051 4062
4073 4094 4234 4243 4252 4261 4270 4291 4471 4481 4493 4504 4517 4530
4539 4568 4589 4765 4775 4798 4809 4830 5047 5057 5078 5097 5109 5123
5136 5157 5323 5336 5359 5378 5397 5412 5419 5440 5594 5605 5620 5635
5652 5673 5810 5940 5945 6172 6180 6193 6262 6740 6744 6752 6754 6840
6960
.LAND 1837 1858 2064 2095 2116 2326 2335 2346 2355 2364 2373 2382 2391 2400
2409 2418 2427 2436 2445 2454 2463 2472 2481 2490 2499 2508 2517 2526
2535 2544 2553 2562 2571 2580 2589 2598 2607 2616 2625 2634 2643 2652
2663 2679 2700 2888 2903 2924 3081 3102 3273 3294 3465 3486 3657 3678
3869 3890 4042 4051 4062 4073 4094 4234 4236 4243 4270 4291 4539 4568
4589 4775 4809 4830 5136 5157 5401 5419 5440 5605 5620 5652 5673 5810
5945 6840 6844 6858 6960
.LB 1837 1839 1843 1858 1860 1864 2095 2097 2101 2116 2118 2122 2679 2681
2685 2700 2702 2706 2903 2905 2909 2924 2926 2930 3081 3083 3087 3102
3104 3108 3228 3273 3275 3279 3294 3296 3300 3420 3465 3467 3471 3486
3488 3492 3657 3659 3663 3678 3680 3684 3869 3871 3875 3890 3892 3896
4073 4075 4079 4094 4096 4100 4270 4272 4276 4291 4293 4297 4568 4570
4574 4589 4591 4595 4809 4811 4815 4830 4832 4836 5113 5127 5136 5138
5142 5157 5159 5163 5419 5421 5425 5440 5442 5446 5652 5654 5658 5673
5675 5679 5945 5947 5949 5951 5953 5955 5957 5959 5961 5963 5965 5967
5969 5971 5973 5975 5977 5979 5981 5983 5985 5987 5989 5991 5993 5995
5997 5999 6001 6003 6005 6007 6009 6011 6013 6015 6017 6019 6021 6023
6025 6027 6029 6031 6033 6035 6037 6039 6041 6043 6045 6047 6049 6051
6053 6055 6057 6059 6061 6063 6065 6067 6069 6071 6073 6075 6077 6079
6081 6083 6085 6087 6089 6091 6093 6095 6097 6099 6101 6103 6105 6107
6109 6111 6113 6115 6117 6119 6121 6123 6125 6127 6129 6131 6133 6135
6137 6139 6141 6143 6145 6147 6149 6151 6153 6155 6157 6159 6161 6163
6165 6193 6195 6197 6199 6201 6203 6205 6207 6209 6211 6213 6215 6217 SEQ 1578
6219 6221 6223 6225 6227 6229 6231 6233 6235 6237 6239 6241 6243 6245
6247 6249 6251 6253 6255 6264 6266 6268 6273 6275 6277 6282 6284 6286
6291 6293 6295 6300 6302 6304 6309 6311 6313 6318 6320 6322 6327 6329
6331 6336 6338 6340 6345 6347 6349 6354 6356 6358 6363 6365 6367 6372
6374 6376 6381 6383 6385 6390 6392 6394 6399 6401 6403 6408 6410 6412
6417 6419 6421 6426 6428 6430 6435 6437 6439 6444 6446 6448 6453 6455
6457 6462 6464 6466 6471 6473 6475 6480 6482 6484 6489 6491 6493 6498
6500 6502 6507 6509 6511 6516 6518 6520 6525 6527 6529 6534 6536 6538
6543 6545 6547 6966
.LBAD 1216 1223 1230 1237 1331 1427 1434 1441 1448 1455 1462 1469 1476 1567
1574 1581 6167 6172
.LCCAF 3236 3251 3258 3262 3266 3450 3454 3458 3635 3642 3646 3650
.LCCBF 3428 3443
.LCCCA 1750 1761 1772 1783 1789 1800 1806 1817 1823 4553 4779 5397 5609 5624
5639
.LCCCC 2849 2864 2879 3070
.LCCCE 5329 5352 5371 5390
.LCCCP 4767 4783 4802
.LCCEB 3055 3074
.LCCER 2078 3840 3849 3858 3862
.LCCFZ 2328 2339 2663 2672 6266 6275 6284 6293 6302 6311 6320 6329 6338 6347
6356 6365 6374 6383 6392 6401 6410 6419 6428 6437 6446 6455 6464 6473
6482 6491 6500 6509 6518 6527 6536 6545
.LCCGC 1847 1868 2027 2036 2045 2051 2060 2068 2082 2105 2126 2689 2710 2858
2873 2890 2896 2913 2934 3064 3091 3112 3283 3304 3475 3496 3667 3688
3879 3900 4083 4104 4280 4301 4578 4599 4819 4840 5146 5167 5429 5450
5662 5683
.LCCIA 4044 4055 4066
.LCCLW 5598 5613 5628 5645
.LCCMB 4236 4245 4254 4263
.LCCMP 4473 4485 4497 4510 4523
.LCCPP 5049 5101 5115 5129
.LCCXA 3620
.LCENA 1750 1761 1772 1783 1789 1800 1806 1817 1823 1847 1868 2027 2036 2045
2051 2060 2068 2078 2082 2105 2126 2328 2339 2663 2672 2689 2710 2849
2858 2864 2873 2879 2890 2896 2913 2934 3055 3064 3070 3074 3091 3112
3236 3251 3258 3262 3266 3283 3304 3428 3443 3450 3454 3458 3475 3496
3620 3635 3642 3646 3650 3667 3688 3840 3849 3858 3862 3879 3900 4044
4055 4066 4083 4104 4236 4245 4254 4263 4280 4301 4473 4485 4497 4510
4523 4553 4578 4599 4767 4779 4783 4802 4819 4840 5049 5101 5115 5129
5146 5167 5329 5352 5371 5390 5397 5429 5450 5598 5609 5613 5624 5628
5639 5645 5662 5683 6266 6275 6284 6293 6302 6311 6320 6329 6338 6347
6356 6365 6374 6383 6392 6401 6410 6419 6428 6437 6446 6455 6464 6473
6482 6491 6500 6509 6518 6527 6536 6545
.LCJP 1750 1761 1772 1783 1789 1800 1806 1817 1823 1847 1868 2027 2036 2045
2051 2060 2068 2078 2082 2105 2126 2328 2339 2663 2672 2689 2710 2849
2858 2864 2873 2879 2890 2896 2913 2934 3055 3064 3070 3074 3091 3112
3236 3251 3258 3262 3266 3283 3304 3428 3443 3450 3454 3458 3475 3496
3620 3635 3642 3646 3650 3667 3688 3840 3849 3858 3862 3879 3900 4044
4055 4066 4083 4104 4236 4245 4254 4263 4280 4301 4473 4485 4497 4510
4523 4553 4578 4599 4767 4779 4783 4802 4819 4840 5049 5101 5115 5129
5146 5167 5329 5352 5371 5390 5397 5429 5450 5598 5609 5613 5624 5628
5639 5645 5662 5683 6266 6275 6284 6293 6302 6311 6320 6329 6338 6347 SEQ 1579
6356 6365 6374 6383 6392 6401 6410 6419 6428 6437 6446 6455 6464 6473
6482 6491 6500 6509 6518 6527 6536 6545
.LCJS 3226 3245 3418 3437 3610 3629 4483 4495 4506 4519 5342 5344 5346 5365
5384 5386 5947 5949 5953 5955 5959 5961 5965 5967 5971 5973 5977 5979
5983 5985 5989 5991 5995 5997 6001 6003 6007 6009 6013 6015 6019 6021
6025 6027 6031 6033 6037 6039 6043 6045 6049 6051 6055 6057 6061 6063
6067 6069 6073 6075 6079 6081 6085 6087 6091 6093 6097 6099 6103 6105
6109 6111 6115 6117 6121 6123 6127 6129 6133 6135 6139 6141 6145 6147
6151 6153 6157 6159 6163 6165 6193 6195 6197 6199 6201 6203 6205 6207
6209 6211 6213 6215 6217 6219 6221 6223 6225 6227 6229 6231 6233 6235
6237 6239 6241 6243 6245 6247 6249 6251 6253 6255
.LCONT 1214 1221 1228 1235 1329 1425 1432 1439 1446 1453 1460 1467 1474 1565
1572 1579 1759 1770 1781 1787 1798 1804 1815 1821 1837 1839 1845 1851
1858 1860 1866 1872 2049 2064 2066 2084 2088 2095 2097 2103 2109 2116
2118 2124 2130 2326 2335 2337 2346 2355 2364 2373 2382 2391 2400 2409
2418 2427 2436 2445 2454 2463 2472 2481 2490 2499 2508 2517 2526 2535
2544 2553 2562 2571 2580 2589 2598 2607 2616 2625 2634 2643 2652 2679
2681 2687 2693 2700 2702 2708 2714 2862 2877 2888 2894 2903 2905 2911
2917 2924 2926 2932 2938 3068 3081 3083 3089 3095 3102 3104 3110 3116
3228 3230 3232 3234 3247 3249 3273 3275 3281 3287 3294 3296 3302 3308
3420 3422 3424 3426 3439 3441 3465 3467 3473 3479 3486 3488 3494 3500
3612 3614 3616 3618 3631 3633 3657 3659 3665 3671 3678 3680 3686 3692
3869 3871 3877 3883 3890 3892 3898 3904 4053 4064 4073 4075 4081 4087
4094 4096 4102 4108 4270 4272 4278 4284 4291 4293 4299 4305 4508 4521
4541 4547 4557 4559 4561 4568 4570 4576 4582 4589 4591 4597 4603 4789
4800 4809 4811 4817 4823 4830 4832 4838 4844 5099 5111 5113 5125 5127
5136 5138 5144 5150 5157 5159 5165 5171 5388 5401 5419 5421 5427 5433
5440 5442 5448 5454 5596 5607 5622 5637 5643 5652 5654 5660 5666 5673
5675 5681 5687 5812 5814 5819 5821 5945 5951 5957 5963 5969 5975 5981
5987 5993 5999 6005 6011 6017 6023 6029 6035 6041 6047 6053 6059 6065
6071 6077 6083 6089 6095 6101 6107 6113 6119 6125 6131 6137 6143 6149
6155 6161 6262 6264 6271 6273 6280 6282 6289 6291 6298 6300 6307 6309
6316 6318 6325 6327 6334 6336 6343 6345 6352 6354 6361 6363 6370 6372
6379 6381 6388 6390 6397 6399 6406 6408 6415 6417 6424 6426 6433 6435
6442 6444 6451 6453 6460 6462 6469 6471 6478 6480 6487 6489 6496 6498
6505 6507 6514 6516 6523 6525 6532 6534 6541 6543 6740 6742 6842 6844
6846 6851 6853 6860 6862 6864 6966
.LCRTN 3260 3264 3268 3452 3456 3460 3644 3648 3652 4563 5407 6257 6550
.LCRY 1839 1860 2097 2118 2337 2348 2357 2366 2375 2384 2393 2402 2411 2420
2429 2438 2447 2456 2465 2474 2483 2492 2501 2510 2519 2528 2537 2546
2555 2564 2573 2582 2591 2600 2609 2618 2627 2636 2645 2654 2681 2702
2905 2926 3083 3104 3275 3296 3467 3488 3659 3680 3871 3892 4075 4096
4272 4293 4570 4591 4811 4832 5138 5159 5421 5442 5654 5675 5951 6962
.LD 1759 1761 1763 1770 1772 1774 1781 1783 1785 1787 1798 1800 1802 1804
1815 1817 1819 1821 1837 1839 1843 1845 1847 1849 1851 1853 1858 1860
1864 1866 1868 1870 1872 1874 2064 2095 2097 2101 2103 2105 2107 2109
2111 2116 2118 2122 2124 2126 2128 2130 2132 2326 2328 2335 2337 2339
2346 2348 2355 2357 2364 2366 2373 2375 2382 2384 2391 2393 2400 2402
2409 2411 2418 2420 2427 2429 2436 2438 2445 2447 2454 2456 2463 2465
2472 2474 2481 2483 2490 2492 2499 2501 2508 2510 2517 2519 2526 2528
2535 2537 2544 2546 2553 2555 2562 2564 2571 2573 2580 2582 2589 2591
2598 2600 2607 2609 2616 2618 2625 2627 2634 2636 2643 2645 2652 2654
2656 2663 2670 2672 2679 2681 2685 2687 2689 2691 2693 2695 2700 2702 SEQ 1580
2706 2708 2710 2712 2714 2716 2858 2860 2862 2873 2875 2877 2888 2890
2892 2894 2903 2905 2909 2911 2913 2915 2917 2919 2924 2926 2930 2932
2934 2936 2938 2940 3064 3066 3068 3081 3083 3087 3089 3091 3093 3095
3097 3102 3104 3108 3110 3112 3114 3116 3118 3228 3230 3232 3234 3249
3273 3275 3279 3281 3283 3285 3287 3289 3294 3296 3300 3302 3304 3306
3308 3310 3420 3422 3424 3426 3441 3465 3467 3471 3473 3475 3477 3479
3481 3486 3488 3492 3494 3496 3498 3500 3502 3612 3614 3616 3618 3633
3657 3659 3663 3665 3667 3669 3671 3673 3678 3680 3684 3686 3688 3690
3692 3694 3869 3871 3875 3877 3879 3881 3883 3885 3890 3892 3896 3898
3900 3902 3904 3906 4042 4051 4062 4073 4075 4079 4081 4083 4085 4087
4089 4094 4096 4100 4102 4104 4106 4108 4110 4234 4236 4243 4245 4252
4254 4261 4263 4270 4272 4276 4278 4280 4282 4284 4286 4291 4293 4297
4299 4301 4303 4305 4307 4539 4541 4543 4545 4547 4549 4551 4553 4555
4557 4559 4561 4568 4570 4574 4576 4578 4580 4582 4584 4589 4591 4595
4597 4599 4601 4603 4605 4775 4777 4779 4781 4809 4811 4815 4817 4819
4821 4823 4825 4830 4832 4836 4838 4840 4842 4844 4846 5057 5059 5061
5063 5065 5067 5069 5071 5078 5080 5082 5084 5086 5088 5090 5092 5109
5111 5113 5123 5125 5127 5136 5138 5142 5144 5146 5148 5150 5152 5157
5159 5163 5165 5167 5169 5171 5173 5342 5344 5346 5365 5384 5386 5397
5399 5401 5403 5419 5421 5425 5427 5429 5431 5433 5435 5440 5442 5446
5448 5450 5452 5454 5456 5605 5607 5609 5611 5620 5622 5624 5626 5637
5639 5641 5652 5654 5658 5660 5662 5664 5666 5668 5673 5675 5679 5681
5683 5685 5687 5689 5810 5812 5814 5817 5819 5821 5945 5947 5949 5951
5953 5955 5957 5959 5961 5963 5965 5967 5969 5971 5973 5975 5977 5979
5981 5983 5985 5987 5989 5991 5993 5995 5997 5999 6001 6003 6005 6007
6009 6011 6013 6015 6017 6019 6021 6023 6025 6027 6029 6031 6033 6035
6037 6039 6041 6043 6045 6047 6049 6051 6053 6055 6057 6059 6061 6063
6065 6067 6069 6071 6073 6075 6077 6079 6081 6083 6085 6087 6089 6091
6093 6095 6097 6099 6101 6103 6105 6107 6109 6111 6113 6115 6117 6119
6121 6123 6125 6127 6129 6131 6133 6135 6137 6139 6141 6143 6145 6147
6149 6151 6153 6155 6157 6159 6161 6163 6165 6180 6182 6184 6186 6193
6195 6197 6199 6201 6203 6205 6207 6209 6211 6213 6215 6217 6219 6221
6223 6225 6227 6229 6231 6233 6235 6237 6239 6241 6243 6245 6247 6249
6251 6253 6255 6262 6264 6266 6268 6271 6273 6275 6277 6280 6282 6284
6286 6289 6291 6293 6295 6298 6300 6302 6304 6307 6309 6311 6313 6316
6318 6320 6322 6325 6327 6329 6331 6334 6336 6338 6340 6343 6345 6347
6349 6352 6354 6356 6358 6361 6363 6365 6367 6370 6372 6374 6376 6379
6381 6383 6385 6388 6390 6392 6394 6397 6399 6401 6403 6406 6408 6410
6412 6415 6417 6419 6421 6424 6426 6428 6430 6433 6435 6437 6439 6442
6444 6446 6448 6451 6453 6455 6457 6460 6462 6464 6466 6469 6471 6473
6475 6478 6480 6482 6484 6487 6489 6491 6493 6496 6498 6500 6502 6505
6507 6509 6511 6514 6516 6518 6520 6523 6525 6527 6529 6532 6534 6536
6538 6541 6543 6545 6547 6740 6742 6752 6754 6840 6842 6844 6846 6851
6853 6858 6860 6862 6864 6960 6962 6964 6966 6968
.LJ 1212 1216 1219 1223 1226 1230 1233 1237 1327 1331 1423 1427 1430 1434
1437 1441 1444 1448 1451 1455 1458 1462 1465 1469 1472 1476 1563 1567
1570 1574 1577 1581 1748 1750 1752 1757 1761 1763 1768 1772 1774 1779
1783 1785 1789 1791 1796 1800 1802 1806 1808 1813 1817 1819 1823 1825
1830 1832 1841 1843 1847 1849 1853 1862 1864 1868 1870 1874 2025 2027
2029 2034 2036 2038 2043 2045 2047 2051 2053 2058 2060 2062 2068 2070
2076 2078 2080 2082 2086 2090 2099 2101 2105 2107 2111 2120 2122 2126
2128 2132 2247 2249 2251 2253 2255 2257 2259 2261 2263 2265 2267 2269
2271 2273 2275 2277 2279 2281 2283 2285 2287 2289 2291 2293 2295 2297 SEQ 1581
2299 2301 2303 2305 2307 2309 2311 2313 2315 2317 2319 2321 2328 2330
2339 2341 2348 2350 2357 2359 2366 2368 2375 2377 2384 2386 2393 2395
2402 2404 2411 2413 2420 2422 2429 2431 2438 2440 2447 2449 2456 2458
2465 2467 2474 2476 2483 2485 2492 2494 2501 2503 2510 2512 2519 2521
2528 2530 2537 2539 2546 2548 2555 2557 2564 2566 2573 2575 2582 2584
2591 2593 2600 2602 2609 2611 2618 2620 2627 2629 2636 2638 2645 2647
2654 2656 2658 2663 2665 2670 2672 2674 2683 2685 2689 2691 2695 2704
2706 2710 2712 2716 2847 2849 2851 2856 2858 2860 2864 2866 2871 2873
2875 2879 2881 2886 2890 2892 2896 2898 2907 2909 2913 2915 2919 2928
2930 2934 2936 2940 3053 3055 3057 3062 3064 3066 3070 3072 3074 3076
3085 3087 3091 3093 3097 3106 3108 3112 3114 3118 3226 3236 3238 3243
3245 3251 3253 3258 3262 3266 3277 3279 3283 3285 3289 3298 3300 3304
3306 3310 3418 3428 3430 3435 3437 3443 3445 3450 3454 3458 3469 3471
3475 3477 3481 3490 3492 3496 3498 3502 3610 3620 3622 3627 3629 3635
3637 3642 3646 3650 3661 3663 3667 3669 3673 3682 3684 3688 3690 3694
3838 3840 3842 3847 3849 3851 3856 3858 3860 3862 3864 3873 3875 3879
3881 3885 3894 3896 3900 3902 3906 4042 4044 4046 4051 4055 4057 4062
4066 4068 4077 4079 4083 4085 4089 4098 4100 4104 4106 4110 4234 4236
4238 4243 4245 4247 4252 4254 4256 4261 4263 4265 4274 4276 4280 4282
4286 4295 4297 4301 4303 4307 4471 4473 4475 4481 4483 4485 4487 4493
4495 4497 4499 4504 4506 4510 4512 4517 4519 4523 4525 4530 4532 4534
4539 4543 4545 4549 4551 4553 4555 4572 4574 4578 4580 4584 4593 4595
4599 4601 4605 4765 4767 4769 4775 4777 4779 4781 4783 4785 4787 4791
4793 4798 4802 4804 4813 4815 4819 4821 4825 4834 4836 4840 4842 4846
5047 5049 5051 5057 5059 5061 5063 5065 5067 5069 5071 5078 5080 5082
5084 5086 5088 5090 5092 5097 5101 5103 5109 5115 5117 5123 5129 5131
5140 5142 5146 5148 5152 5161 5163 5167 5169 5173 5323 5325 5327 5329
5331 5336 5338 5340 5342 5344 5346 5348 5350 5352 5354 5359 5361 5363
5365 5367 5369 5371 5373 5378 5380 5382 5384 5386 5390 5392 5397 5399
5403 5405 5412 5414 5423 5425 5429 5431 5435 5444 5446 5450 5452 5456
5594 5598 5600 5605 5609 5611 5613 5615 5620 5624 5626 5628 5630 5635
5639 5641 5645 5647 5656 5658 5662 5664 5668 5677 5679 5683 5685 5689
5810 5817 5947 5949 5953 5955 5959 5961 5965 5967 5971 5973 5977 5979
5983 5985 5989 5991 5995 5997 6001 6003 6007 6009 6013 6015 6019 6021
6025 6027 6031 6033 6037 6039 6043 6045 6049 6051 6055 6057 6061 6063
6067 6069 6073 6075 6079 6081 6085 6087 6091 6093 6097 6099 6103 6105
6109 6111 6115 6117 6121 6123 6127 6129 6133 6135 6139 6141 6145 6147
6151 6153 6157 6159 6163 6165 6167 6172 6180 6182 6184 6186 6188 6193
6195 6197 6199 6201 6203 6205 6207 6209 6211 6213 6215 6217 6219 6221
6223 6225 6227 6229 6231 6233 6235 6237 6239 6241 6243 6245 6247 6249
6251 6253 6255 6266 6268 6275 6277 6284 6286 6293 6295 6302 6304 6311
6313 6320 6322 6329 6331 6338 6340 6347 6349 6356 6358 6365 6367 6374
6376 6383 6385 6392 6394 6401 6403 6410 6412 6419 6421 6428 6430 6437
6439 6446 6448 6455 6457 6464 6466 6473 6475 6482 6484 6491 6493 6500
6502 6509 6511 6518 6520 6527 6529 6536 6538 6545 6547 6744 6752 6754
6840 6858 6866 6960 6962 6964 6968
.LJMAP 1212 1216 1219 1223 1226 1230 1233 1237 1327 1331 1423 1427 1430 1434
1437 1441 1444 1448 1451 1455 1458 1462 1465 1469 1472 1476 1563 1567
1570 1574 1577 1581 1748 1752 1757 1763 1768 1774 1779 1785 1791 1796
1802 1808 1813 1819 1825 1830 1832 1849 1853 1870 1874 2025 2029 2034
2038 2043 2047 2053 2058 2062 2070 2076 2080 2086 2090 2107 2111 2128
2132 2247 2249 2251 2253 2255 2257 2259 2261 2263 2265 2267 2269 2271
2273 2275 2277 2279 2281 2283 2285 2287 2289 2291 2293 2295 2297 2299 SEQ 1582
2301 2303 2305 2307 2309 2311 2313 2315 2317 2319 2321 2330 2341 2350
2359 2368 2377 2386 2395 2404 2413 2422 2431 2440 2449 2458 2467 2476
2485 2494 2503 2512 2521 2530 2539 2548 2557 2566 2575 2584 2593 2602
2611 2620 2629 2638 2647 2658 2665 2674 2691 2695 2712 2716 2847 2851
2856 2860 2866 2871 2875 2881 2886 2892 2898 2915 2919 2936 2940 3053
3057 3062 3066 3072 3076 3093 3097 3114 3118 3238 3243 3253 3285 3289
3306 3310 3430 3435 3445 3477 3481 3498 3502 3622 3627 3637 3669 3673
3690 3694 3838 3842 3847 3851 3856 3860 3864 3881 3885 3902 3906 4042
4046 4051 4057 4062 4068 4085 4089 4106 4110 4234 4238 4243 4247 4252
4256 4261 4265 4282 4286 4303 4307 4471 4475 4481 4487 4493 4499 4504
4512 4517 4525 4530 4532 4534 4539 4555 4580 4584 4601 4605 4765 4769
4775 4781 4785 4791 4793 4798 4804 4821 4825 4842 4846 5047 5051 5057
5059 5061 5063 5065 5067 5069 5071 5078 5080 5082 5084 5086 5088 5090
5092 5097 5103 5109 5117 5123 5131 5148 5152 5169 5173 5323 5331 5336
5354 5359 5373 5378 5392 5399 5412 5414 5431 5435 5452 5456 5594 5600
5605 5611 5615 5620 5626 5630 5635 5641 5647 5664 5668 5685 5689 5810
5817 6167 6172 6180 6182 6184 6186 6188 6268 6277 6286 6295 6304 6313
6322 6331 6340 6349 6358 6367 6376 6385 6394 6403 6412 6421 6430 6439
6448 6457 6466 6475 6484 6493 6502 6511 6520 6529 6538 6547 6744 6752
6754 6840 6858 6866 6960 6968
.LJZ 3224 3416 3608 5940 6746
.LLDCT 1841 1862 2099 2120 2348 2357 2366 2375 2384 2393 2402 2411 2420 2429
2438 2447 2456 2465 2474 2483 2492 2501 2510 2519 2528 2537 2546 2555
2564 2573 2582 2591 2600 2609 2618 2627 2636 2645 2654 2683 2704 2907
2928 3085 3106 3277 3298 3469 3490 3661 3682 3873 3894 4077 4098 4274
4295 4543 4549 4572 4593 4777 4813 4834 5140 5161 5325 5338 5348 5361
5367 5380 5403 5423 5444 5656 5677 6962
.LLDLM 5810 5817 6262 6271 6280 6289 6298 6307 6316 6325 6334 6343 6352 6361
6370 6379 6388 6397 6406 6415 6424 6433 6442 6451 6460 6469 6478 6487
6496 6505 6514 6523 6532 6541 6742 6842 6846
.LLSAD 6193 6195 6197 6199 6201 6203 6205 6207 6209 6211 6213 6215 6217 6219
6221 6223 6225 6227 6229 6231 6233 6235 6237 6239 6241 6243 6245 6247
6249 6251 6253 6255 6840 6844 6858
.LMGC 1228 1235 1329 1432 1439 1446 1453 1460 1467 1474 1565 1572 1579 1757
1759 1768 1770 1779 1781 1787 1796 1798 1804 1813 1815 1821 1830 1845
1847 1851 1866 1868 1872 2034 2036 2043 2049 2058 2064 2066 2076 2084
2088 2103 2105 2109 2124 2126 2130 2687 2689 2693 2708 2710 2714 2858
2862 2873 2877 2888 2890 2894 2911 2913 2917 2932 2934 2938 3064 3068
3089 3091 3095 3110 3112 3116 3228 3230 3232 3247 3281 3283 3287 3302
3304 3308 3420 3422 3424 3439 3473 3475 3479 3494 3496 3500 3612 3631
3665 3667 3671 3686 3688 3692 3877 3879 3883 3898 3900 3904 4051 4053
4062 4064 4081 4083 4087 4102 4104 4108 4252 4261 4278 4280 4284 4299
4301 4305 4508 4521 4530 4532 4539 4541 4547 4557 4559 4561 4563 4576
4578 4582 4597 4599 4603 4777 4789 4793 4800 4817 4819 4823 4838 4840
4844 5057 5059 5061 5063 5065 5067 5069 5071 5078 5080 5082 5084 5086
5088 5090 5092 5099 5109 5111 5113 5123 5125 5127 5144 5146 5150 5165
5167 5171 5325 5338 5348 5361 5367 5380 5388 5401 5403 5412 5414 5427
5429 5433 5448 5450 5454 5596 5607 5622 5637 5643 5660 5662 5666 5681
5683 5687 5810 5812 5814 5817 5819 5821 6180 6182 6184 6186 6193 6195
6197 6199 6201 6203 6205 6207 6209 6211 6213 6215 6217 6219 6221 6223
6225 6227 6229 6231 6233 6235 6237 6239 6241 6243 6245 6247 6249 6251
6253 6255 6262 6264 6268 6271 6273 6277 6280 6282 6286 6289 6291 6295
6298 6300 6304 6307 6309 6313 6316 6318 6322 6325 6327 6331 6334 6336 SEQ 1583
6340 6343 6345 6349 6352 6354 6358 6361 6363 6367 6370 6372 6376 6379
6381 6385 6388 6390 6394 6397 6399 6403 6406 6408 6412 6415 6417 6421
6424 6426 6430 6433 6435 6439 6442 6444 6448 6451 6453 6457 6460 6462
6466 6469 6471 6475 6478 6480 6484 6487 6489 6493 6496 6498 6502 6505
6507 6511 6514 6516 6520 6523 6525 6529 6532 6534 6538 6541 6543 6547
6740 6742 6752 6754 6840 6844 6846 6851 6853 6858 6860 6862 6864
.LOENA 1214 1425 1432 1439 1460 1467 1474 1565 1579 1845 1866 2103 2124 2328
2339 2672 2687 2708 2888 2911 2932 3089 3110 3230 3281 3302 3422 3473
3494 3665 3686 3877 3898 4051 4062 4081 4102 4278 4299 4561 4576 4597
4817 4838 5109 5123 5144 5165 5401 5427 5448 5660 5681 5810 5814 5817
5821 6180 6182 6184 6186 6262 6271 6280 6289 6298 6307 6316 6325 6334
6343 6352 6361 6370 6379 6388 6397 6406 6415 6424 6433 6442 6451 6460
6469 6478 6487 6496 6505 6514 6523 6532 6541 6742 6754 6842 6846 6853
6864 6968
.LOR 1845 1851 1866 1872 2103 2109 2124 2130 2339 2656 2672 2687 2693 2708
2714 2862 2877 2894 2911 2917 2932 2938 3068 3089 3095 3110 3116 3228
3230 3281 3287 3302 3308 3420 3422 3473 3479 3494 3500 3665 3671 3686
3692 3877 3883 3898 3904 4081 4087 4102 4108 4252 4254 4261 4263 4278
4284 4299 4305 4559 4561 4576 4582 4597 4603 4817 4823 4838 4844 5057
5059 5061 5063 5065 5067 5069 5071 5078 5080 5082 5084 5086 5088 5090
5092 5113 5127 5144 5150 5165 5171 5427 5433 5448 5454 5660 5666 5681
5687 5812 5814 5819 5821 5947 5953 5957 5959 5963 5965 5969 5971 5975
5977 5981 5983 5987 5989 5993 5995 5999 6001 6005 6007 6011 6013 6017
6019 6023 6025 6029 6031 6035 6037 6041 6043 6047 6049 6053 6055 6059
6061 6065 6067 6071 6073 6077 6079 6083 6085 6089 6091 6095 6097 6101
6103 6107 6109 6113 6115 6119 6121 6125 6127 6131 6133 6137 6139 6143
6145 6149 6151 6155 6157 6161 6163 6193 6195 6197 6199 6201 6203 6205
6207 6209 6211 6213 6215 6217 6219 6221 6223 6225 6227 6229 6231 6233
6235 6237 6239 6241 6243 6245 6247 6249 6251 6253 6255 6262 6264 6268
6271 6273 6277 6280 6282 6286 6289 6291 6295 6298 6300 6304 6307 6309
6313 6316 6318 6322 6325 6327 6331 6334 6336 6340 6343 6345 6349 6352
6354 6358 6361 6363 6367 6370 6372 6376 6379 6381 6385 6388 6390 6394
6397 6399 6403 6406 6408 6412 6415 6417 6421 6424 6426 6430 6433 6435
6439 6442 6444 6448 6451 6453 6457 6460 6462 6466 6469 6471 6475 6478
6480 6484 6487 6489 6493 6496 6498 6502 6505 6507 6511 6514 6516 6520
6523 6525 6529 6532 6534 6538 6541 6543 6547 6740 6742 6752 6754 6842
6851 6853 6964 6966
.LPLUS 1839 1843 1860 1864 2097 2101 2118 2122 2337 2348 2357 2366 2375 2384
2393 2402 2411 2420 2429 2438 2447 2456 2465 2474 2483 2492 2501 2510
2519 2528 2537 2546 2555 2564 2573 2582 2591 2600 2609 2618 2627 2636
2645 2654 2670 2681 2685 2702 2706 2905 2909 2926 2930 3083 3087 3104
3108 3275 3279 3296 3300 3467 3471 3488 3492 3659 3663 3680 3684 3871
3875 3892 3896 4075 4079 4096 4100 4272 4276 4293 4297 4570 4574 4591
4595 4811 4815 4832 4836 5138 5142 5159 5163 5421 5425 5442 5446 5654
5658 5675 5679 5951 6962 6968
.LRAM 6262 6264 6271 6273 6280 6282 6289 6291 6298 6300 6307 6309 6316 6318
6325 6327 6334 6336 6343 6345 6352 6354 6361 6363 6370 6372 6379 6381
6388 6390 6397 6399 6406 6408 6415 6417 6424 6426 6433 6435 6442 6444
6451 6453 6460 6462 6469 6471 6478 6480 6487 6489 6496 6498 6505 6507
6514 6516 6523 6525 6532 6534 6541 6543 6851 6862
.LRDLM 1221 1425 1446 1453 1460 1467 1474 1572 1579 5812 5819 6264 6273 6282
6291 6300 6309 6318 6327 6336 6345 6354 6363 6372 6381 6390 6399 6408
6417 6426 6435 6444 6453 6462 6471 6480 6489 6498 6507 6516 6525 6534 SEQ 1584
6543 6752 6851 6860 6862
.LRPCT 1843 1864 2101 2122 2656 2670 2685 2706 2909 2930 3087 3108 3279 3300
3471 3492 3663 3684 3875 3896 4079 4100 4276 4297 4545 4551 4574 4595
4787 4815 4836 5142 5163 5327 5340 5350 5363 5369 5382 5405 5425 5446
5658 5679 6964
.LS0A 1845 1851 1866 1872 2064 2103 2109 2124 2130 2339 2656 2672 2687 2693
2708 2714 2862 2877 2894 2911 2917 2932 2938 3068 3089 3095 3110 3116
3230 3281 3287 3302 3308 3422 3473 3479 3494 3500 3665 3671 3686 3692
3877 3883 3898 3904 4042 4051 4062 4081 4087 4102 4108 4234 4236 4243
4254 4263 4278 4284 4299 4305 4561 4576 4582 4597 4603 4817 4823 4838
4844 5109 5123 5144 5150 5165 5171 5401 5427 5433 5448 5454 5660 5666
5681 5687 5810 5814 5821 5947 5949 5951 5953 5955 5957 5959 5961 5963
5965 5967 5969 5971 5973 5975 5977 5979 5981 5983 5985 5987 5989 5991
5993 5995 5997 5999 6001 6003 6005 6007 6009 6011 6013 6015 6017 6019
6021 6023 6025 6027 6029 6031 6033 6035 6037 6039 6041 6043 6045 6047
6049 6051 6053 6055 6057 6059 6061 6063 6065 6067 6069 6071 6073 6075
6077 6079 6081 6083 6085 6087 6089 6091 6093 6095 6097 6099 6101 6103
6105 6107 6109 6111 6113 6115 6117 6119 6121 6123 6125 6127 6129 6131
6133 6135 6137 6139 6141 6143 6145 6147 6149 6151 6153 6155 6157 6159
6161 6163 6165 6180 6182 6184 6186 6262 6271 6280 6289 6298 6307 6316
6325 6334 6343 6352 6361 6370 6379 6388 6397 6406 6415 6424 6433 6442
6451 6460 6469 6478 6487 6496 6505 6514 6523 6532 6541 6742 6754 6840
6842 6844 6846 6853 6858 6864 6960 6962 6964 6966
.LS0B 1839 1860 2097 2118 2681 2702 2905 2926 3083 3104 3275 3296 3467 3488
3659 3680 3871 3892 4075 4096 4272 4293 4570 4591 4811 4832 5138 5159
5421 5442 5654 5675
.LSAB 1843 1864 2101 2122 2328 2337 2348 2357 2366 2375 2384 2393 2402 2411
2420 2429 2438 2447 2456 2465 2474 2483 2492 2501 2510 2519 2528 2537
2546 2555 2564 2573 2582 2591 2600 2609 2618 2627 2636 2645 2654 2670
2685 2706 2909 2930 3087 3108 3279 3300 3471 3492 3663 3684 3875 3896
4079 4100 4245 4276 4297 4574 4595 4815 4836 5142 5163 5425 5446 5658
5679 5817 6266 6275 6284 6293 6302 6311 6320 6329 6338 6347 6356 6365
6374 6383 6392 6401 6410 6419 6428 6437 6446 6455 6464 6473 6482 6491
6500 6509 6518 6527 6536 6545 6968
.LSD0 1837 1858 2095 2116 2326 2335 2346 2355 2364 2373 2382 2391 2400 2409
2418 2427 2436 2445 2454 2463 2472 2481 2490 2499 2508 2517 2526 2535
2544 2553 2562 2571 2580 2589 2598 2607 2616 2625 2634 2643 2652 2663
2679 2700 2888 2903 2924 3081 3102 3228 3232 3273 3294 3420 3424 3465
3486 3657 3678 3869 3890 4073 4094 4252 4261 4270 4291 4539 4559 4568
4589 4775 4809 4830 5057 5059 5061 5063 5065 5067 5069 5071 5078 5080
5082 5084 5086 5088 5090 5092 5111 5113 5125 5127 5136 5157 5419 5440
5605 5620 5652 5673 5812 5819 5945 6193 6195 6197 6199 6201 6203 6205
6207 6209 6211 6213 6215 6217 6219 6221 6223 6225 6227 6229 6231 6233
6235 6237 6239 6241 6243 6245 6247 6249 6251 6253 6255 6264 6268 6273
6277 6282 6286 6291 6295 6300 6304 6309 6313 6318 6322 6327 6331 6336
6340 6345 6349 6354 6358 6363 6367 6372 6376 6381 6385 6390 6394 6399
6403 6408 6412 6417 6421 6426 6430 6435 6439 6444 6448 6453 6457 6462
6466 6471 6475 6480 6484 6489 6493 6498 6502 6507 6511 6516 6520 6525
6529 6534 6538 6543 6547 6740 6752 6851 6860 6862
.LSELC 1759 1770 1781 1787 1798 1804 1815 1830 4530 4541 4547 4557 4563 4777
4789 4793 5325 5338 5348 5361 5367 5380 5388 5403 5412 5596 5607 5622
5637
.LSELE 1228 1235 1432 1439 1446 1453 1460 1467 1474 1845 1847 1851 1866 1868 SEQ 1585
1872 2034 2036 2043 2049 2058 2064 2066 2076 2084 2088 2103 2105 2109
2124 2126 2130 2687 2689 2693 2708 2710 2714 2858 2862 2873 2877 2888
2890 2894 2911 2913 2917 2932 2934 2938 3064 3068 3089 3091 3095 3110
3112 3116 3281 3283 3287 3302 3304 3308 3473 3475 3479 3494 3496 3500
3665 3667 3671 3686 3688 3692 3877 3879 3883 3898 3900 3904 4051 4053
4062 4064 4081 4083 4087 4102 4104 4108 4278 4280 4284 4299 4301 4305
4561 4576 4578 4582 4597 4599 4603 4817 4819 4823 4838 4840 4844 5144
5146 5150 5165 5167 5171 5427 5429 5433 5448 5450 5454 5660 5662 5666
5681 5683 5687 5814 5821 6180 6182 6184 6186 6754 6853 6864
.LSELF 5113 5127 5401
.LSELM 1329 1565 1572 1579 1757 1768 1779 1796 1813 1821 3230 3247 3422 3439
3631 4508 4521 4532 4539 4559 4800 5099 5109 5123 5414 5643
.LSELP 3232 3424 3612 5111 5125
.LSKCN 4252 4261 6268 6277 6286 6295 6304 6313 6322 6331 6340 6349 6358 6367
6376 6385 6394 6403 6412 6421 6430 6439 6448 6457 6466 6475 6484 6493
6502 6511 6520 6529 6538 6547 6740
.LSKMB 6968
.LXNOR 2328 4245 5817 5949 5955 5961 5967 5973 5979 5985 5991 5997 6003 6009
6015 6021 6027 6033 6039 6045 6051 6057 6063 6069 6075 6081 6087 6093
6099 6105 6111 6117 6123 6129 6135 6141 6147 6153 6159 6165 6846
.LXOR 6266 6275 6284 6293 6302 6311 6320 6329 6338 6347 6356 6365 6374 6383
6392 6401 6410 6419 6428 6437 6446 6455 6464 6473 6482 6491 6500 6509
6518 6527 6536 6545
.MA 1843 1845 1851 1864 1866 1872 2101 2103 2109 2122 2124 2130 2685 2687
2693 2706 2708 2714 2909 2911 2917 2930 2932 2938 3087 3089 3095 3108
3110 3116 3230 3279 3281 3287 3300 3302 3308 3422 3471 3473 3479 3492
3494 3500 3663 3665 3671 3684 3686 3692 3875 3877 3883 3896 3898 3904
4079 4081 4087 4100 4102 4108 4276 4278 4284 4297 4299 4305 4574 4576
4582 4595 4597 4603 4815 4817 4823 4836 4838 4844 5109 5123 5142 5144
5150 5163 5165 5171 5425 5427 5433 5446 5448 5454 5658 5660 5666 5679
5681 5687 5947 5949 5951 5953 5955 5957 5959 5961 5963 5965 5967 5969
5971 5973 5975 5977 5979 5981 5983 5985 5987 5989 5991 5993 5995 5997
5999 6001 6003 6005 6007 6009 6011 6013 6015 6017 6019 6021 6023 6025
6027 6029 6031 6033 6035 6037 6039 6041 6043 6045 6047 6049 6051 6053
6055 6057 6059 6061 6063 6065 6067 6069 6071 6073 6075 6077 6079 6081
6083 6085 6087 6089 6091 6093 6095 6097 6099 6101 6103 6105 6107 6109
6111 6113 6115 6117 6119 6121 6123 6125 6127 6129 6131 6133 6135 6137
6139 6141 6143 6145 6147 6149 6151 6153 6155 6157 6159 6161 6163 6165
6180 6182 6184 6186 6262 6266 6271 6275 6280 6284 6289 6293 6298 6302
6307 6311 6316 6320 6325 6329 6334 6338 6343 6347 6352 6356 6361 6365
6370 6374 6379 6383 6388 6392 6397 6401 6406 6410 6415 6419 6424 6428
6433 6437 6442 6446 6451 6455 6460 6464 6469 6473 6478 6482 6487 6491
6496 6500 6505 6509 6514 6518 6523 6527 6532 6536 6541 6545 6968
.MAND 1837 1858 2064 2095 2116 2326 2335 2346 2355 2364 2373 2382 2391 2400
2409 2418 2427 2436 2445 2454 2463 2472 2481 2490 2499 2508 2517 2526
2535 2544 2553 2562 2571 2580 2589 2598 2607 2616 2625 2634 2643 2652
2663 2679 2700 2888 2903 2924 3081 3102 3273 3294 3465 3486 3657 3678
3869 3890 4042 4051 4062 4073 4094 4234 4236 4243 4270 4291 4539 4568
4589 4775 4809 4830 5136 5157 5401 5419 5440 5605 5620 5652 5673 5810
5945 6840 6844 6858 6960
.MB 1837 1839 1843 1858 1860 1864 2095 2097 2101 2116 2118 2122 2679 2681
2685 2700 2702 2706 2903 2905 2909 2924 2926 2930 3081 3083 3087 3102
3104 3108 3228 3273 3275 3279 3294 3296 3300 3420 3465 3467 3471 3486 SEQ 1586
3488 3492 3657 3659 3663 3678 3680 3684 3869 3871 3875 3890 3892 3896
4073 4075 4079 4094 4096 4100 4270 4272 4276 4291 4293 4297 4568 4570
4574 4589 4591 4595 4809 4811 4815 4830 4832 4836 5113 5127 5136 5138
5142 5157 5159 5163 5419 5421 5425 5440 5442 5446 5652 5654 5658 5673
5675 5679 5945 5947 5949 5951 5953 5955 5957 5959 5961 5963 5965 5967
5969 5971 5973 5975 5977 5979 5981 5983 5985 5987 5989 5991 5993 5995
5997 5999 6001 6003 6005 6007 6009 6011 6013 6015 6017 6019 6021 6023
6025 6027 6029 6031 6033 6035 6037 6039 6041 6043 6045 6047 6049 6051
6053 6055 6057 6059 6061 6063 6065 6067 6069 6071 6073 6075 6077 6079
6081 6083 6085 6087 6089 6091 6093 6095 6097 6099 6101 6103 6105 6107
6109 6111 6113 6115 6117 6119 6121 6123 6125 6127 6129 6131 6133 6135
6137 6139 6141 6143 6145 6147 6149 6151 6153 6155 6157 6159 6161 6163
6165 6193 6195 6197 6199 6201 6203 6205 6207 6209 6211 6213 6215 6217
6219 6221 6223 6225 6227 6229 6231 6233 6235 6237 6239 6241 6243 6245
6247 6249 6251 6253 6255 6264 6266 6268 6273 6275 6277 6282 6284 6286
6291 6293 6295 6300 6302 6304 6309 6311 6313 6318 6320 6322 6327 6329
6331 6336 6338 6340 6345 6347 6349 6354 6356 6358 6363 6365 6367 6372
6374 6376 6381 6383 6385 6390 6392 6394 6399 6401 6403 6408 6410 6412
6417 6419 6421 6426 6428 6430 6435 6437 6439 6444 6446 6448 6453 6455
6457 6462 6464 6466 6471 6473 6475 6480 6482 6484 6489 6491 6493 6498
6500 6502 6507 6509 6511 6516 6518 6520 6525 6527 6529 6534 6536 6538
6543 6545 6547 6966
.MBAD 1216 1223 1230 1237 1331 1427 1434 1441 1448 1455 1462 1469 1476 1567
1574 1581 6167 6172
.MCCAF 3236 3251 3258 3262 3266 3450 3454 3458 3635 3642 3646 3650
.MCCBF 3428 3443
.MCCCA 1750 1761 1772 1783 1789 1800 1806 1817 1823 4553 4779 5397 5609 5624
5639
.MCCCC 2849 2864 2879 3070
.MCCCE 5329 5352 5371 5390
.MCCCP 4767 4783 4802
.MCCEB 3055 3074
.MCCER 2078 3840 3849 3858 3862
.MCCFZ 2328 2339 2663 2672 6266 6275 6284 6293 6302 6311 6320 6329 6338 6347
6356 6365 6374 6383 6392 6401 6410 6419 6428 6437 6446 6455 6464 6473
6482 6491 6500 6509 6518 6527 6536 6545
.MCCGC 1847 1868 2027 2036 2045 2051 2060 2068 2082 2105 2126 2689 2710 2858
2873 2890 2896 2913 2934 3064 3091 3112 3283 3304 3475 3496 3667 3688
3879 3900 4083 4104 4280 4301 4578 4599 4819 4840 5146 5167 5429 5450
5662 5683
.MCCIA 4044 4055 4066
.MCCLW 5598 5613 5628 5645
.MCCMB 4236 4245 4254 4263
.MCCMP 4473 4485 4497 4510 4523
.MCCPP 5049 5101 5115 5129
.MCCXA 3620
.MCENA 1750 1761 1772 1783 1789 1800 1806 1817 1823 1847 1868 2027 2036 2045
2051 2060 2068 2078 2082 2105 2126 2328 2339 2663 2672 2689 2710 2849
2858 2864 2873 2879 2890 2896 2913 2934 3055 3064 3070 3074 3091 3112
3236 3251 3258 3262 3266 3283 3304 3428 3443 3450 3454 3458 3475 3496
3620 3635 3642 3646 3650 3667 3688 3840 3849 3858 3862 3879 3900 4044
4055 4066 4083 4104 4236 4245 4254 4263 4280 4301 4473 4485 4497 4510
4523 4553 4578 4599 4767 4779 4783 4802 4819 4840 5049 5101 5115 5129 SEQ 1587
5146 5167 5329 5352 5371 5390 5397 5429 5450 5598 5609 5613 5624 5628
5639 5645 5662 5683 6266 6275 6284 6293 6302 6311 6320 6329 6338 6347
6356 6365 6374 6383 6392 6401 6410 6419 6428 6437 6446 6455 6464 6473
6482 6491 6500 6509 6518 6527 6536 6545
.MCJP 1750 1761 1772 1783 1789 1800 1806 1817 1823 1847 1868 2027 2036 2045
2051 2060 2068 2078 2082 2105 2126 2328 2339 2663 2672 2689 2710 2849
2858 2864 2873 2879 2890 2896 2913 2934 3055 3064 3070 3074 3091 3112
3236 3251 3258 3262 3266 3283 3304 3428 3443 3450 3454 3458 3475 3496
3620 3635 3642 3646 3650 3667 3688 3840 3849 3858 3862 3879 3900 4044
4055 4066 4083 4104 4236 4245 4254 4263 4280 4301 4473 4485 4497 4510
4523 4553 4578 4599 4767 4779 4783 4802 4819 4840 5049 5101 5115 5129
5146 5167 5329 5352 5371 5390 5397 5429 5450 5598 5609 5613 5624 5628
5639 5645 5662 5683 6266 6275 6284 6293 6302 6311 6320 6329 6338 6347
6356 6365 6374 6383 6392 6401 6410 6419 6428 6437 6446 6455 6464 6473
6482 6491 6500 6509 6518 6527 6536 6545
.MCJS 3226 3245 3418 3437 3610 3629 4483 4495 4506 4519 5342 5344 5346 5365
5384 5386 5947 5949 5953 5955 5959 5961 5965 5967 5971 5973 5977 5979
5983 5985 5989 5991 5995 5997 6001 6003 6007 6009 6013 6015 6019 6021
6025 6027 6031 6033 6037 6039 6043 6045 6049 6051 6055 6057 6061 6063
6067 6069 6073 6075 6079 6081 6085 6087 6091 6093 6097 6099 6103 6105
6109 6111 6115 6117 6121 6123 6127 6129 6133 6135 6139 6141 6145 6147
6151 6153 6157 6159 6163 6165 6193 6195 6197 6199 6201 6203 6205 6207
6209 6211 6213 6215 6217 6219 6221 6223 6225 6227 6229 6231 6233 6235
6237 6239 6241 6243 6245 6247 6249 6251 6253 6255
.MCONT 1214 1221 1228 1235 1329 1425 1432 1439 1446 1453 1460 1467 1474 1565
1572 1579 1759 1770 1781 1787 1798 1804 1815 1821 1837 1839 1845 1851
1858 1860 1866 1872 2049 2064 2066 2084 2088 2095 2097 2103 2109 2116
2118 2124 2130 2326 2335 2337 2346 2355 2364 2373 2382 2391 2400 2409
2418 2427 2436 2445 2454 2463 2472 2481 2490 2499 2508 2517 2526 2535
2544 2553 2562 2571 2580 2589 2598 2607 2616 2625 2634 2643 2652 2679
2681 2687 2693 2700 2702 2708 2714 2862 2877 2888 2894 2903 2905 2911
2917 2924 2926 2932 2938 3068 3081 3083 3089 3095 3102 3104 3110 3116
3228 3230 3232 3234 3247 3249 3273 3275 3281 3287 3294 3296 3302 3308
3420 3422 3424 3426 3439 3441 3465 3467 3473 3479 3486 3488 3494 3500
3612 3614 3616 3618 3631 3633 3657 3659 3665 3671 3678 3680 3686 3692
3869 3871 3877 3883 3890 3892 3898 3904 4053 4064 4073 4075 4081 4087
4094 4096 4102 4108 4270 4272 4278 4284 4291 4293 4299 4305 4508 4521
4541 4547 4557 4559 4561 4568 4570 4576 4582 4589 4591 4597 4603 4789
4800 4809 4811 4817 4823 4830 4832 4838 4844 5099 5111 5113 5125 5127
5136 5138 5144 5150 5157 5159 5165 5171 5388 5401 5419 5421 5427 5433
5440 5442 5448 5454 5596 5607 5622 5637 5643 5652 5654 5660 5666 5673
5675 5681 5687 5812 5814 5819 5821 5945 5951 5957 5963 5969 5975 5981
5987 5993 5999 6005 6011 6017 6023 6029 6035 6041 6047 6053 6059 6065
6071 6077 6083 6089 6095 6101 6107 6113 6119 6125 6131 6137 6143 6149
6155 6161 6262 6264 6271 6273 6280 6282 6289 6291 6298 6300 6307 6309
6316 6318 6325 6327 6334 6336 6343 6345 6352 6354 6361 6363 6370 6372
6379 6381 6388 6390 6397 6399 6406 6408 6415 6417 6424 6426 6433 6435
6442 6444 6451 6453 6460 6462 6469 6471 6478 6480 6487 6489 6496 6498
6505 6507 6514 6516 6523 6525 6532 6534 6541 6543 6740 6742 6842 6844
6846 6851 6853 6860 6862 6864 6966
.MCRTN 3260 3264 3268 3452 3456 3460 3644 3648 3652 4563 5407 6257 6550
.MCRY 1839 1860 2097 2118 2337 2348 2357 2366 2375 2384 2393 2402 2411 2420
2429 2438 2447 2456 2465 2474 2483 2492 2501 2510 2519 2528 2537 2546 SEQ 1588
2555 2564 2573 2582 2591 2600 2609 2618 2627 2636 2645 2654 2681 2702
2905 2926 3083 3104 3275 3296 3467 3488 3659 3680 3871 3892 4075 4096
4272 4293 4570 4591 4811 4832 5138 5159 5421 5442 5654 5675 5951 6962
.MD 1759 1761 1763 1770 1772 1774 1781 1783 1785 1787 1798 1800 1802 1804
1815 1817 1819 1821 1837 1839 1843 1845 1847 1849 1851 1853 1858 1860
1864 1866 1868 1870 1872 1874 2064 2095 2097 2101 2103 2105 2107 2109
2111 2116 2118 2122 2124 2126 2128 2130 2132 2326 2328 2335 2337 2339
2346 2348 2355 2357 2364 2366 2373 2375 2382 2384 2391 2393 2400 2402
2409 2411 2418 2420 2427 2429 2436 2438 2445 2447 2454 2456 2463 2465
2472 2474 2481 2483 2490 2492 2499 2501 2508 2510 2517 2519 2526 2528
2535 2537 2544 2546 2553 2555 2562 2564 2571 2573 2580 2582 2589 2591
2598 2600 2607 2609 2616 2618 2625 2627 2634 2636 2643 2645 2652 2654
2656 2663 2670 2672 2679 2681 2685 2687 2689 2691 2693 2695 2700 2702
2706 2708 2710 2712 2714 2716 2858 2860 2862 2873 2875 2877 2888 2890
2892 2894 2903 2905 2909 2911 2913 2915 2917 2919 2924 2926 2930 2932
2934 2936 2938 2940 3064 3066 3068 3081 3083 3087 3089 3091 3093 3095
3097 3102 3104 3108 3110 3112 3114 3116 3118 3228 3230 3232 3234 3249
3273 3275 3279 3281 3283 3285 3287 3289 3294 3296 3300 3302 3304 3306
3308 3310 3420 3422 3424 3426 3441 3465 3467 3471 3473 3475 3477 3479
3481 3486 3488 3492 3494 3496 3498 3500 3502 3612 3614 3616 3618 3633
3657 3659 3663 3665 3667 3669 3671 3673 3678 3680 3684 3686 3688 3690
3692 3694 3869 3871 3875 3877 3879 3881 3883 3885 3890 3892 3896 3898
3900 3902 3904 3906 4042 4051 4062 4073 4075 4079 4081 4083 4085 4087
4089 4094 4096 4100 4102 4104 4106 4108 4110 4234 4236 4243 4245 4252
4254 4261 4263 4270 4272 4276 4278 4280 4282 4284 4286 4291 4293 4297
4299 4301 4303 4305 4307 4539 4541 4543 4545 4547 4549 4551 4553 4555
4557 4559 4561 4568 4570 4574 4576 4578 4580 4582 4584 4589 4591 4595
4597 4599 4601 4603 4605 4775 4777 4779 4781 4809 4811 4815 4817 4819
4821 4823 4825 4830 4832 4836 4838 4840 4842 4844 4846 5057 5059 5061
5063 5065 5067 5069 5071 5078 5080 5082 5084 5086 5088 5090 5092 5109
5111 5113 5123 5125 5127 5136 5138 5142 5144 5146 5148 5150 5152 5157
5159 5163 5165 5167 5169 5171 5173 5342 5344 5346 5365 5384 5386 5397
5399 5401 5403 5419 5421 5425 5427 5429 5431 5433 5435 5440 5442 5446
5448 5450 5452 5454 5456 5605 5607 5609 5611 5620 5622 5624 5626 5637
5639 5641 5652 5654 5658 5660 5662 5664 5666 5668 5673 5675 5679 5681
5683 5685 5687 5689 5810 5812 5814 5817 5819 5821 5945 5947 5949 5951
5953 5955 5957 5959 5961 5963 5965 5967 5969 5971 5973 5975 5977 5979
5981 5983 5985 5987 5989 5991 5993 5995 5997 5999 6001 6003 6005 6007
6009 6011 6013 6015 6017 6019 6021 6023 6025 6027 6029 6031 6033 6035
6037 6039 6041 6043 6045 6047 6049 6051 6053 6055 6057 6059 6061 6063
6065 6067 6069 6071 6073 6075 6077 6079 6081 6083 6085 6087 6089 6091
6093 6095 6097 6099 6101 6103 6105 6107 6109 6111 6113 6115 6117 6119
6121 6123 6125 6127 6129 6131 6133 6135 6137 6139 6141 6143 6145 6147
6149 6151 6153 6155 6157 6159 6161 6163 6165 6180 6182 6184 6186 6193
6195 6197 6199 6201 6203 6205 6207 6209 6211 6213 6215 6217 6219 6221
6223 6225 6227 6229 6231 6233 6235 6237 6239 6241 6243 6245 6247 6249
6251 6253 6255 6262 6264 6266 6268 6271 6273 6275 6277 6280 6282 6284
6286 6289 6291 6293 6295 6298 6300 6302 6304 6307 6309 6311 6313 6316
6318 6320 6322 6325 6327 6329 6331 6334 6336 6338 6340 6343 6345 6347
6349 6352 6354 6356 6358 6361 6363 6365 6367 6370 6372 6374 6376 6379
6381 6383 6385 6388 6390 6392 6394 6397 6399 6401 6403 6406 6408 6410
6412 6415 6417 6419 6421 6424 6426 6428 6430 6433 6435 6437 6439 6442
6444 6446 6448 6451 6453 6455 6457 6460 6462 6464 6466 6469 6471 6473 SEQ 1589
6475 6478 6480 6482 6484 6487 6489 6491 6493 6496 6498 6500 6502 6505
6507 6509 6511 6514 6516 6518 6520 6523 6525 6527 6529 6532 6534 6536
6538 6541 6543 6545 6547 6740 6742 6752 6754 6840 6842 6844 6846 6851
6853 6858 6860 6862 6864 6960 6962 6964 6966 6968
.MJ 1212 1216 1219 1223 1226 1230 1233 1237 1327 1331 1423 1427 1430 1434
1437 1441 1444 1448 1451 1455 1458 1462 1465 1469 1472 1476 1563 1567
1570 1574 1577 1581 1748 1750 1752 1757 1761 1763 1768 1772 1774 1779
1783 1785 1789 1791 1796 1800 1802 1806 1808 1813 1817 1819 1823 1825
1830 1832 1841 1843 1847 1849 1853 1862 1864 1868 1870 1874 2025 2027
2029 2034 2036 2038 2043 2045 2047 2051 2053 2058 2060 2062 2068 2070
2076 2078 2080 2082 2086 2090 2099 2101 2105 2107 2111 2120 2122 2126
2128 2132 2247 2249 2251 2253 2255 2257 2259 2261 2263 2265 2267 2269
2271 2273 2275 2277 2279 2281 2283 2285 2287 2289 2291 2293 2295 2297
2299 2301 2303 2305 2307 2309 2311 2313 2315 2317 2319 2321 2328 2330
2339 2341 2348 2350 2357 2359 2366 2368 2375 2377 2384 2386 2393 2395
2402 2404 2411 2413 2420 2422 2429 2431 2438 2440 2447 2449 2456 2458
2465 2467 2474 2476 2483 2485 2492 2494 2501 2503 2510 2512 2519 2521
2528 2530 2537 2539 2546 2548 2555 2557 2564 2566 2573 2575 2582 2584
2591 2593 2600 2602 2609 2611 2618 2620 2627 2629 2636 2638 2645 2647
2654 2656 2658 2663 2665 2670 2672 2674 2683 2685 2689 2691 2695 2704
2706 2710 2712 2716 2847 2849 2851 2856 2858 2860 2864 2866 2871 2873
2875 2879 2881 2886 2890 2892 2896 2898 2907 2909 2913 2915 2919 2928
2930 2934 2936 2940 3053 3055 3057 3062 3064 3066 3070 3072 3074 3076
3085 3087 3091 3093 3097 3106 3108 3112 3114 3118 3226 3236 3238 3243
3245 3251 3253 3258 3262 3266 3277 3279 3283 3285 3289 3298 3300 3304
3306 3310 3418 3428 3430 3435 3437 3443 3445 3450 3454 3458 3469 3471
3475 3477 3481 3490 3492 3496 3498 3502 3610 3620 3622 3627 3629 3635
3637 3642 3646 3650 3661 3663 3667 3669 3673 3682 3684 3688 3690 3694
3838 3840 3842 3847 3849 3851 3856 3858 3860 3862 3864 3873 3875 3879
3881 3885 3894 3896 3900 3902 3906 4042 4044 4046 4051 4055 4057 4062
4066 4068 4077 4079 4083 4085 4089 4098 4100 4104 4106 4110 4234 4236
4238 4243 4245 4247 4252 4254 4256 4261 4263 4265 4274 4276 4280 4282
4286 4295 4297 4301 4303 4307 4471 4473 4475 4481 4483 4485 4487 4493
4495 4497 4499 4504 4506 4510 4512 4517 4519 4523 4525 4530 4532 4534
4539 4543 4545 4549 4551 4553 4555 4572 4574 4578 4580 4584 4593 4595
4599 4601 4605 4765 4767 4769 4775 4777 4779 4781 4783 4785 4787 4791
4793 4798 4802 4804 4813 4815 4819 4821 4825 4834 4836 4840 4842 4846
5047 5049 5051 5057 5059 5061 5063 5065 5067 5069 5071 5078 5080 5082
5084 5086 5088 5090 5092 5097 5101 5103 5109 5115 5117 5123 5129 5131
5140 5142 5146 5148 5152 5161 5163 5167 5169 5173 5323 5325 5327 5329
5331 5336 5338 5340 5342 5344 5346 5348 5350 5352 5354 5359 5361 5363
5365 5367 5369 5371 5373 5378 5380 5382 5384 5386 5390 5392 5397 5399
5403 5405 5412 5414 5423 5425 5429 5431 5435 5444 5446 5450 5452 5456
5594 5598 5600 5605 5609 5611 5613 5615 5620 5624 5626 5628 5630 5635
5639 5641 5645 5647 5656 5658 5662 5664 5668 5677 5679 5683 5685 5689
5810 5817 5947 5949 5953 5955 5959 5961 5965 5967 5971 5973 5977 5979
5983 5985 5989 5991 5995 5997 6001 6003 6007 6009 6013 6015 6019 6021
6025 6027 6031 6033 6037 6039 6043 6045 6049 6051 6055 6057 6061 6063
6067 6069 6073 6075 6079 6081 6085 6087 6091 6093 6097 6099 6103 6105
6109 6111 6115 6117 6121 6123 6127 6129 6133 6135 6139 6141 6145 6147
6151 6153 6157 6159 6163 6165 6167 6172 6180 6182 6184 6186 6188 6193
6195 6197 6199 6201 6203 6205 6207 6209 6211 6213 6215 6217 6219 6221
6223 6225 6227 6229 6231 6233 6235 6237 6239 6241 6243 6245 6247 6249 SEQ 1590
6251 6253 6255 6266 6268 6275 6277 6284 6286 6293 6295 6302 6304 6311
6313 6320 6322 6329 6331 6338 6340 6347 6349 6356 6358 6365 6367 6374
6376 6383 6385 6392 6394 6401 6403 6410 6412 6419 6421 6428 6430 6437
6439 6446 6448 6455 6457 6464 6466 6473 6475 6482 6484 6491 6493 6500
6502 6509 6511 6518 6520 6527 6529 6536 6538 6545 6547 6744 6752 6754
6840 6858 6866 6960 6962 6964 6968
.MJMAP 1212 1216 1219 1223 1226 1230 1233 1237 1327 1331 1423 1427 1430 1434
1437 1441 1444 1448 1451 1455 1458 1462 1465 1469 1472 1476 1563 1567
1570 1574 1577 1581 1748 1752 1757 1763 1768 1774 1779 1785 1791 1796
1802 1808 1813 1819 1825 1830 1832 1849 1853 1870 1874 2025 2029 2034
2038 2043 2047 2053 2058 2062 2070 2076 2080 2086 2090 2107 2111 2128
2132 2247 2249 2251 2253 2255 2257 2259 2261 2263 2265 2267 2269 2271
2273 2275 2277 2279 2281 2283 2285 2287 2289 2291 2293 2295 2297 2299
2301 2303 2305 2307 2309 2311 2313 2315 2317 2319 2321 2330 2341 2350
2359 2368 2377 2386 2395 2404 2413 2422 2431 2440 2449 2458 2467 2476
2485 2494 2503 2512 2521 2530 2539 2548 2557 2566 2575 2584 2593 2602
2611 2620 2629 2638 2647 2658 2665 2674 2691 2695 2712 2716 2847 2851
2856 2860 2866 2871 2875 2881 2886 2892 2898 2915 2919 2936 2940 3053
3057 3062 3066 3072 3076 3093 3097 3114 3118 3238 3243 3253 3285 3289
3306 3310 3430 3435 3445 3477 3481 3498 3502 3622 3627 3637 3669 3673
3690 3694 3838 3842 3847 3851 3856 3860 3864 3881 3885 3902 3906 4042
4046 4051 4057 4062 4068 4085 4089 4106 4110 4234 4238 4243 4247 4252
4256 4261 4265 4282 4286 4303 4307 4471 4475 4481 4487 4493 4499 4504
4512 4517 4525 4530 4532 4534 4539 4555 4580 4584 4601 4605 4765 4769
4775 4781 4785 4791 4793 4798 4804 4821 4825 4842 4846 5047 5051 5057
5059 5061 5063 5065 5067 5069 5071 5078 5080 5082 5084 5086 5088 5090
5092 5097 5103 5109 5117 5123 5131 5148 5152 5169 5173 5323 5331 5336
5354 5359 5373 5378 5392 5399 5412 5414 5431 5435 5452 5456 5594 5600
5605 5611 5615 5620 5626 5630 5635 5641 5647 5664 5668 5685 5689 5810
5817 6167 6172 6180 6182 6184 6186 6188 6268 6277 6286 6295 6304 6313
6322 6331 6340 6349 6358 6367 6376 6385 6394 6403 6412 6421 6430 6439
6448 6457 6466 6475 6484 6493 6502 6511 6520 6529 6538 6547 6744 6752
6754 6840 6858 6866 6960 6968
.MJZ 3224 3416 3608 5940 6746
.MLDCT 1841 1862 2099 2120 2348 2357 2366 2375 2384 2393 2402 2411 2420 2429
2438 2447 2456 2465 2474 2483 2492 2501 2510 2519 2528 2537 2546 2555
2564 2573 2582 2591 2600 2609 2618 2627 2636 2645 2654 2683 2704 2907
2928 3085 3106 3277 3298 3469 3490 3661 3682 3873 3894 4077 4098 4274
4295 4543 4549 4572 4593 4777 4813 4834 5140 5161 5325 5338 5348 5361
5367 5380 5403 5423 5444 5656 5677 6962
.MLDLM 5810 5817 6262 6271 6280 6289 6298 6307 6316 6325 6334 6343 6352 6361
6370 6379 6388 6397 6406 6415 6424 6433 6442 6451 6460 6469 6478 6487
6496 6505 6514 6523 6532 6541 6742 6842 6846
.MLSAD 6193 6195 6197 6199 6201 6203 6205 6207 6209 6211 6213 6215 6217 6219
6221 6223 6225 6227 6229 6231 6233 6235 6237 6239 6241 6243 6245 6247
6249 6251 6253 6255 6840 6844 6858
.MMGC 1228 1235 1329 1432 1439 1446 1453 1460 1467 1474 1565 1572 1579 1757
1759 1768 1770 1779 1781 1787 1796 1798 1804 1813 1815 1821 1830 1845
1847 1851 1866 1868 1872 2034 2036 2043 2049 2058 2064 2066 2076 2084
2088 2103 2105 2109 2124 2126 2130 2687 2689 2693 2708 2710 2714 2858
2862 2873 2877 2888 2890 2894 2911 2913 2917 2932 2934 2938 3064 3068
3089 3091 3095 3110 3112 3116 3228 3230 3232 3247 3281 3283 3287 3302
3304 3308 3420 3422 3424 3439 3473 3475 3479 3494 3496 3500 3612 3631 SEQ 1591
3665 3667 3671 3686 3688 3692 3877 3879 3883 3898 3900 3904 4051 4053
4062 4064 4081 4083 4087 4102 4104 4108 4252 4261 4278 4280 4284 4299
4301 4305 4508 4521 4530 4532 4539 4541 4547 4557 4559 4561 4563 4576
4578 4582 4597 4599 4603 4777 4789 4793 4800 4817 4819 4823 4838 4840
4844 5057 5059 5061 5063 5065 5067 5069 5071 5078 5080 5082 5084 5086
5088 5090 5092 5099 5109 5111 5113 5123 5125 5127 5144 5146 5150 5165
5167 5171 5325 5338 5348 5361 5367 5380 5388 5401 5403 5412 5414 5427
5429 5433 5448 5450 5454 5596 5607 5622 5637 5643 5660 5662 5666 5681
5683 5687 5810 5812 5814 5817 5819 5821 6180 6182 6184 6186 6193 6195
6197 6199 6201 6203 6205 6207 6209 6211 6213 6215 6217 6219 6221 6223
6225 6227 6229 6231 6233 6235 6237 6239 6241 6243 6245 6247 6249 6251
6253 6255 6262 6264 6268 6271 6273 6277 6280 6282 6286 6289 6291 6295
6298 6300 6304 6307 6309 6313 6316 6318 6322 6325 6327 6331 6334 6336
6340 6343 6345 6349 6352 6354 6358 6361 6363 6367 6370 6372 6376 6379
6381 6385 6388 6390 6394 6397 6399 6403 6406 6408 6412 6415 6417 6421
6424 6426 6430 6433 6435 6439 6442 6444 6448 6451 6453 6457 6460 6462
6466 6469 6471 6475 6478 6480 6484 6487 6489 6493 6496 6498 6502 6505
6507 6511 6514 6516 6520 6523 6525 6529 6532 6534 6538 6541 6543 6547
6740 6742 6752 6754 6840 6844 6846 6851 6853 6858 6860 6862 6864
.MOENA 1214 1425 1432 1439 1460 1467 1474 1565 1579 1845 1866 2103 2124 2328
2339 2672 2687 2708 2888 2911 2932 3089 3110 3230 3281 3302 3422 3473
3494 3665 3686 3877 3898 4051 4062 4081 4102 4278 4299 4561 4576 4597
4817 4838 5109 5123 5144 5165 5401 5427 5448 5660 5681 5810 5814 5817
5821 6180 6182 6184 6186 6262 6271 6280 6289 6298 6307 6316 6325 6334
6343 6352 6361 6370 6379 6388 6397 6406 6415 6424 6433 6442 6451 6460
6469 6478 6487 6496 6505 6514 6523 6532 6541 6742 6754 6842 6846 6853
6864 6968
.MOR 1845 1851 1866 1872 2103 2109 2124 2130 2339 2656 2672 2687 2693 2708
2714 2862 2877 2894 2911 2917 2932 2938 3068 3089 3095 3110 3116 3228
3230 3281 3287 3302 3308 3420 3422 3473 3479 3494 3500 3665 3671 3686
3692 3877 3883 3898 3904 4081 4087 4102 4108 4252 4254 4261 4263 4278
4284 4299 4305 4559 4561 4576 4582 4597 4603 4817 4823 4838 4844 5057
5059 5061 5063 5065 5067 5069 5071 5078 5080 5082 5084 5086 5088 5090
5092 5113 5127 5144 5150 5165 5171 5427 5433 5448 5454 5660 5666 5681
5687 5812 5814 5819 5821 5947 5953 5957 5959 5963 5965 5969 5971 5975
5977 5981 5983 5987 5989 5993 5995 5999 6001 6005 6007 6011 6013 6017
6019 6023 6025 6029 6031 6035 6037 6041 6043 6047 6049 6053 6055 6059
6061 6065 6067 6071 6073 6077 6079 6083 6085 6089 6091 6095 6097 6101
6103 6107 6109 6113 6115 6119 6121 6125 6127 6131 6133 6137 6139 6143
6145 6149 6151 6155 6157 6161 6163 6193 6195 6197 6199 6201 6203 6205
6207 6209 6211 6213 6215 6217 6219 6221 6223 6225 6227 6229 6231 6233
6235 6237 6239 6241 6243 6245 6247 6249 6251 6253 6255 6262 6264 6268
6271 6273 6277 6280 6282 6286 6289 6291 6295 6298 6300 6304 6307 6309
6313 6316 6318 6322 6325 6327 6331 6334 6336 6340 6343 6345 6349 6352
6354 6358 6361 6363 6367 6370 6372 6376 6379 6381 6385 6388 6390 6394
6397 6399 6403 6406 6408 6412 6415 6417 6421 6424 6426 6430 6433 6435
6439 6442 6444 6448 6451 6453 6457 6460 6462 6466 6469 6471 6475 6478
6480 6484 6487 6489 6493 6496 6498 6502 6505 6507 6511 6514 6516 6520
6523 6525 6529 6532 6534 6538 6541 6543 6547 6740 6742 6752 6754 6842
6851 6853 6964 6966
.MPLUS 1839 1843 1860 1864 2097 2101 2118 2122 2337 2348 2357 2366 2375 2384
2393 2402 2411 2420 2429 2438 2447 2456 2465 2474 2483 2492 2501 2510
2519 2528 2537 2546 2555 2564 2573 2582 2591 2600 2609 2618 2627 2636 SEQ 1592
2645 2654 2670 2681 2685 2702 2706 2905 2909 2926 2930 3083 3087 3104
3108 3275 3279 3296 3300 3467 3471 3488 3492 3659 3663 3680 3684 3871
3875 3892 3896 4075 4079 4096 4100 4272 4276 4293 4297 4570 4574 4591
4595 4811 4815 4832 4836 5138 5142 5159 5163 5421 5425 5442 5446 5654
5658 5675 5679 5951 6962 6968
.MRAM 6262 6264 6271 6273 6280 6282 6289 6291 6298 6300 6307 6309 6316 6318
6325 6327 6334 6336 6343 6345 6352 6354 6361 6363 6370 6372 6379 6381
6388 6390 6397 6399 6406 6408 6415 6417 6424 6426 6433 6435 6442 6444
6451 6453 6460 6462 6469 6471 6478 6480 6487 6489 6496 6498 6505 6507
6514 6516 6523 6525 6532 6534 6541 6543 6851 6862
.MRDLM 1221 1425 1446 1453 1460 1467 1474 1572 1579 5812 5819 6264 6273 6282
6291 6300 6309 6318 6327 6336 6345 6354 6363 6372 6381 6390 6399 6408
6417 6426 6435 6444 6453 6462 6471 6480 6489 6498 6507 6516 6525 6534
6543 6752 6851 6860 6862
.MRPCT 1843 1864 2101 2122 2656 2670 2685 2706 2909 2930 3087 3108 3279 3300
3471 3492 3663 3684 3875 3896 4079 4100 4276 4297 4545 4551 4574 4595
4787 4815 4836 5142 5163 5327 5340 5350 5363 5369 5382 5405 5425 5446
5658 5679 6964
.MS0A 1845 1851 1866 1872 2064 2103 2109 2124 2130 2339 2656 2672 2687 2693
2708 2714 2862 2877 2894 2911 2917 2932 2938 3068 3089 3095 3110 3116
3230 3281 3287 3302 3308 3422 3473 3479 3494 3500 3665 3671 3686 3692
3877 3883 3898 3904 4042 4051 4062 4081 4087 4102 4108 4234 4236 4243
4254 4263 4278 4284 4299 4305 4561 4576 4582 4597 4603 4817 4823 4838
4844 5109 5123 5144 5150 5165 5171 5401 5427 5433 5448 5454 5660 5666
5681 5687 5810 5814 5821 5947 5949 5951 5953 5955 5957 5959 5961 5963
5965 5967 5969 5971 5973 5975 5977 5979 5981 5983 5985 5987 5989 5991
5993 5995 5997 5999 6001 6003 6005 6007 6009 6011 6013 6015 6017 6019
6021 6023 6025 6027 6029 6031 6033 6035 6037 6039 6041 6043 6045 6047
6049 6051 6053 6055 6057 6059 6061 6063 6065 6067 6069 6071 6073 6075
6077 6079 6081 6083 6085 6087 6089 6091 6093 6095 6097 6099 6101 6103
6105 6107 6109 6111 6113 6115 6117 6119 6121 6123 6125 6127 6129 6131
6133 6135 6137 6139 6141 6143 6145 6147 6149 6151 6153 6155 6157 6159
6161 6163 6165 6180 6182 6184 6186 6262 6271 6280 6289 6298 6307 6316
6325 6334 6343 6352 6361 6370 6379 6388 6397 6406 6415 6424 6433 6442
6451 6460 6469 6478 6487 6496 6505 6514 6523 6532 6541 6742 6754 6840
6842 6844 6846 6853 6858 6864 6960 6962 6964 6966
.MS0B 1839 1860 2097 2118 2681 2702 2905 2926 3083 3104 3275 3296 3467 3488
3659 3680 3871 3892 4075 4096 4272 4293 4570 4591 4811 4832 5138 5159
5421 5442 5654 5675
.MSAB 1843 1864 2101 2122 2328 2337 2348 2357 2366 2375 2384 2393 2402 2411
2420 2429 2438 2447 2456 2465 2474 2483 2492 2501 2510 2519 2528 2537
2546 2555 2564 2573 2582 2591 2600 2609 2618 2627 2636 2645 2654 2670
2685 2706 2909 2930 3087 3108 3279 3300 3471 3492 3663 3684 3875 3896
4079 4100 4245 4276 4297 4574 4595 4815 4836 5142 5163 5425 5446 5658
5679 5817 6266 6275 6284 6293 6302 6311 6320 6329 6338 6347 6356 6365
6374 6383 6392 6401 6410 6419 6428 6437 6446 6455 6464 6473 6482 6491
6500 6509 6518 6527 6536 6545 6968
.MSD0 1837 1858 2095 2116 2326 2335 2346 2355 2364 2373 2382 2391 2400 2409
2418 2427 2436 2445 2454 2463 2472 2481 2490 2499 2508 2517 2526 2535
2544 2553 2562 2571 2580 2589 2598 2607 2616 2625 2634 2643 2652 2663
2679 2700 2888 2903 2924 3081 3102 3228 3232 3273 3294 3420 3424 3465
3486 3657 3678 3869 3890 4073 4094 4252 4261 4270 4291 4539 4559 4568
4589 4775 4809 4830 5057 5059 5061 5063 5065 5067 5069 5071 5078 5080 SEQ 1593
5082 5084 5086 5088 5090 5092 5111 5113 5125 5127 5136 5157 5419 5440
5605 5620 5652 5673 5812 5819 5945 6193 6195 6197 6199 6201 6203 6205
6207 6209 6211 6213 6215 6217 6219 6221 6223 6225 6227 6229 6231 6233
6235 6237 6239 6241 6243 6245 6247 6249 6251 6253 6255 6264 6268 6273
6277 6282 6286 6291 6295 6300 6304 6309 6313 6318 6322 6327 6331 6336
6340 6345 6349 6354 6358 6363 6367 6372 6376 6381 6385 6390 6394 6399
6403 6408 6412 6417 6421 6426 6430 6435 6439 6444 6448 6453 6457 6462
6466 6471 6475 6480 6484 6489 6493 6498 6502 6507 6511 6516 6520 6525
6529 6534 6538 6543 6547 6740 6752 6851 6860 6862
.MSELC 1759 1770 1781 1787 1798 1804 1815 1830 4530 4541 4547 4557 4563 4777
4789 4793 5325 5338 5348 5361 5367 5380 5388 5403 5412 5596 5607 5622
5637
.MSELE 1228 1235 1432 1439 1446 1453 1460 1467 1474 1845 1847 1851 1866 1868
1872 2034 2036 2043 2049 2058 2064 2066 2076 2084 2088 2103 2105 2109
2124 2126 2130 2687 2689 2693 2708 2710 2714 2858 2862 2873 2877 2888
2890 2894 2911 2913 2917 2932 2934 2938 3064 3068 3089 3091 3095 3110
3112 3116 3281 3283 3287 3302 3304 3308 3473 3475 3479 3494 3496 3500
3665 3667 3671 3686 3688 3692 3877 3879 3883 3898 3900 3904 4051 4053
4062 4064 4081 4083 4087 4102 4104 4108 4278 4280 4284 4299 4301 4305
4561 4576 4578 4582 4597 4599 4603 4817 4819 4823 4838 4840 4844 5144
5146 5150 5165 5167 5171 5427 5429 5433 5448 5450 5454 5660 5662 5666
5681 5683 5687 5814 5821 6180 6182 6184 6186 6754 6853 6864
.MSELF 5113 5127 5401
.MSELM 1329 1565 1572 1579 1757 1768 1779 1796 1813 1821 3230 3247 3422 3439
3631 4508 4521 4532 4539 4559 4800 5099 5109 5123 5414 5643
.MSELP 3232 3424 3612 5111 5125
.MSKCN 4252 4261 6268 6277 6286 6295 6304 6313 6322 6331 6340 6349 6358 6367
6376 6385 6394 6403 6412 6421 6430 6439 6448 6457 6466 6475 6484 6493
6502 6511 6520 6529 6538 6547 6740
.MSKMB 6968
.MXNOR 2328 4245 5817 5949 5955 5961 5967 5973 5979 5985 5991 5997 6003 6009
6015 6021 6027 6033 6039 6045 6051 6057 6063 6069 6075 6081 6087 6093
6099 6105 6111 6117 6123 6129 6135 6141 6147 6153 6159 6165 6846
.MXOR 6266 6275 6284 6293 6302 6311 6320 6329 6338 6347 6356 6365 6374 6383
6392 6401 6410 6419 6428 6437 6446 6455 6464 6473 6482 6491 6500 6509
6518 6527 6536 6545
.RA 1843 1845 1851 1864 1866 1872 2101 2103 2109 2122 2124 2130 2685 2687
2693 2706 2708 2714 2909 2911 2917 2930 2932 2938 3087 3089 3095 3108
3110 3116 3230 3279 3281 3287 3300 3302 3308 3422 3471 3473 3479 3492
3494 3500 3663 3665 3671 3684 3686 3692 3875 3877 3883 3896 3898 3904
4079 4081 4087 4100 4102 4108 4276 4278 4284 4297 4299 4305 4574 4576
4582 4595 4597 4603 4815 4817 4823 4836 4838 4844 5109 5123 5142 5144
5150 5163 5165 5171 5425 5427 5433 5446 5448 5454 5658 5660 5666 5679
5681 5687 5947 5949 5951 5953 5955 5957 5959 5961 5963 5965 5967 5969
5971 5973 5975 5977 5979 5981 5983 5985 5987 5989 5991 5993 5995 5997
5999 6001 6003 6005 6007 6009 6011 6013 6015 6017 6019 6021 6023 6025
6027 6029 6031 6033 6035 6037 6039 6041 6043 6045 6047 6049 6051 6053
6055 6057 6059 6061 6063 6065 6067 6069 6071 6073 6075 6077 6079 6081
6083 6085 6087 6089 6091 6093 6095 6097 6099 6101 6103 6105 6107 6109
6111 6113 6115 6117 6119 6121 6123 6125 6127 6129 6131 6133 6135 6137
6139 6141 6143 6145 6147 6149 6151 6153 6155 6157 6159 6161 6163 6165
6180 6182 6184 6186 6262 6266 6271 6275 6280 6284 6289 6293 6298 6302
6307 6311 6316 6320 6325 6329 6334 6338 6343 6347 6352 6356 6361 6365 SEQ 1594
6370 6374 6379 6383 6388 6392 6397 6401 6406 6410 6415 6419 6424 6428
6433 6437 6442 6446 6451 6455 6460 6464 6469 6473 6478 6482 6487 6491
6496 6500 6505 6509 6514 6518 6523 6527 6532 6536 6541 6545 6968
.RAND 1837 1858 2064 2095 2116 2326 2335 2346 2355 2364 2373 2382 2391 2400
2409 2418 2427 2436 2445 2454 2463 2472 2481 2490 2499 2508 2517 2526
2535 2544 2553 2562 2571 2580 2589 2598 2607 2616 2625 2634 2643 2652
2663 2679 2700 2888 2903 2924 3081 3102 3273 3294 3465 3486 3657 3678
3869 3890 4042 4051 4062 4073 4094 4234 4236 4243 4270 4291 4539 4568
4589 4775 4809 4830 5136 5157 5401 5419 5440 5605 5620 5652 5673 5810
5945 6840 6844 6858 6960
.RB 1837 1839 1843 1858 1860 1864 2095 2097 2101 2116 2118 2122 2679 2681
2685 2700 2702 2706 2903 2905 2909 2924 2926 2930 3081 3083 3087 3102
3104 3108 3228 3273 3275 3279 3294 3296 3300 3420 3465 3467 3471 3486
3488 3492 3657 3659 3663 3678 3680 3684 3869 3871 3875 3890 3892 3896
4073 4075 4079 4094 4096 4100 4270 4272 4276 4291 4293 4297 4568 4570
4574 4589 4591 4595 4809 4811 4815 4830 4832 4836 5113 5127 5136 5138
5142 5157 5159 5163 5419 5421 5425 5440 5442 5446 5652 5654 5658 5673
5675 5679 5945 5947 5949 5951 5953 5955 5957 5959 5961 5963 5965 5967
5969 5971 5973 5975 5977 5979 5981 5983 5985 5987 5989 5991 5993 5995
5997 5999 6001 6003 6005 6007 6009 6011 6013 6015 6017 6019 6021 6023
6025 6027 6029 6031 6033 6035 6037 6039 6041 6043 6045 6047 6049 6051
6053 6055 6057 6059 6061 6063 6065 6067 6069 6071 6073 6075 6077 6079
6081 6083 6085 6087 6089 6091 6093 6095 6097 6099 6101 6103 6105 6107
6109 6111 6113 6115 6117 6119 6121 6123 6125 6127 6129 6131 6133 6135
6137 6139 6141 6143 6145 6147 6149 6151 6153 6155 6157 6159 6161 6163
6165 6193 6195 6197 6199 6201 6203 6205 6207 6209 6211 6213 6215 6217
6219 6221 6223 6225 6227 6229 6231 6233 6235 6237 6239 6241 6243 6245
6247 6249 6251 6253 6255 6264 6266 6268 6273 6275 6277 6282 6284 6286
6291 6293 6295 6300 6302 6304 6309 6311 6313 6318 6320 6322 6327 6329
6331 6336 6338 6340 6345 6347 6349 6354 6356 6358 6363 6365 6367 6372
6374 6376 6381 6383 6385 6390 6392 6394 6399 6401 6403 6408 6410 6412
6417 6419 6421 6426 6428 6430 6435 6437 6439 6444 6446 6448 6453 6455
6457 6462 6464 6466 6471 6473 6475 6480 6482 6484 6489 6491 6493 6498
6500 6502 6507 6509 6511 6516 6518 6520 6525 6527 6529 6534 6536 6538
6543 6545 6547 6966
.RBAD 1216 1223 1230 1237 1331 1427 1434 1441 1448 1455 1462 1469 1476 1567
1574 1581 6167 6172
.RCCAF 3236 3251 3258 3262 3266 3450 3454 3458 3635 3642 3646 3650
.RCCBF 3428 3443
.RCCCA 1750 1761 1772 1783 1789 1800 1806 1817 1823 4553 4779 5397 5609 5624
5639
.RCCCC 2849 2864 2879 3070
.RCCCE 5329 5352 5371 5390
.RCCCP 4767 4783 4802
.RCCEB 3055 3074
.RCCER 2078 3840 3849 3858 3862
.RCCFZ 2328 2339 2663 2672 6266 6275 6284 6293 6302 6311 6320 6329 6338 6347
6356 6365 6374 6383 6392 6401 6410 6419 6428 6437 6446 6455 6464 6473
6482 6491 6500 6509 6518 6527 6536 6545
.RCCGC 1847 1868 2027 2036 2045 2051 2060 2068 2082 2105 2126 2689 2710 2858
2873 2890 2896 2913 2934 3064 3091 3112 3283 3304 3475 3496 3667 3688
3879 3900 4083 4104 4280 4301 4578 4599 4819 4840 5146 5167 5429 5450
5662 5683 SEQ 1595
.RCCIA 4044 4055 4066
.RCCLW 5598 5613 5628 5645
.RCCMB 4236 4245 4254 4263
.RCCMP 4473 4485 4497 4510 4523
.RCCPP 5049 5101 5115 5129
.RCCXA 3620
.RCENA 1750 1761 1772 1783 1789 1800 1806 1817 1823 1847 1868 2027 2036 2045
2051 2060 2068 2078 2082 2105 2126 2328 2339 2663 2672 2689 2710 2849
2858 2864 2873 2879 2890 2896 2913 2934 3055 3064 3070 3074 3091 3112
3236 3251 3258 3262 3266 3283 3304 3428 3443 3450 3454 3458 3475 3496
3620 3635 3642 3646 3650 3667 3688 3840 3849 3858 3862 3879 3900 4044
4055 4066 4083 4104 4236 4245 4254 4263 4280 4301 4473 4485 4497 4510
4523 4553 4578 4599 4767 4779 4783 4802 4819 4840 5049 5101 5115 5129
5146 5167 5329 5352 5371 5390 5397 5429 5450 5598 5609 5613 5624 5628
5639 5645 5662 5683 6266 6275 6284 6293 6302 6311 6320 6329 6338 6347
6356 6365 6374 6383 6392 6401 6410 6419 6428 6437 6446 6455 6464 6473
6482 6491 6500 6509 6518 6527 6536 6545
.RCJP 1750 1761 1772 1783 1789 1800 1806 1817 1823 1847 1868 2027 2036 2045
2051 2060 2068 2078 2082 2105 2126 2328 2339 2663 2672 2689 2710 2849
2858 2864 2873 2879 2890 2896 2913 2934 3055 3064 3070 3074 3091 3112
3236 3251 3258 3262 3266 3283 3304 3428 3443 3450 3454 3458 3475 3496
3620 3635 3642 3646 3650 3667 3688 3840 3849 3858 3862 3879 3900 4044
4055 4066 4083 4104 4236 4245 4254 4263 4280 4301 4473 4485 4497 4510
4523 4553 4578 4599 4767 4779 4783 4802 4819 4840 5049 5101 5115 5129
5146 5167 5329 5352 5371 5390 5397 5429 5450 5598 5609 5613 5624 5628
5639 5645 5662 5683 6266 6275 6284 6293 6302 6311 6320 6329 6338 6347
6356 6365 6374 6383 6392 6401 6410 6419 6428 6437 6446 6455 6464 6473
6482 6491 6500 6509 6518 6527 6536 6545
.RCJS 3226 3245 3418 3437 3610 3629 4483 4495 4506 4519 5342 5344 5346 5365
5384 5386 5947 5949 5953 5955 5959 5961 5965 5967 5971 5973 5977 5979
5983 5985 5989 5991 5995 5997 6001 6003 6007 6009 6013 6015 6019 6021
6025 6027 6031 6033 6037 6039 6043 6045 6049 6051 6055 6057 6061 6063
6067 6069 6073 6075 6079 6081 6085 6087 6091 6093 6097 6099 6103 6105
6109 6111 6115 6117 6121 6123 6127 6129 6133 6135 6139 6141 6145 6147
6151 6153 6157 6159 6163 6165 6193 6195 6197 6199 6201 6203 6205 6207
6209 6211 6213 6215 6217 6219 6221 6223 6225 6227 6229 6231 6233 6235
6237 6239 6241 6243 6245 6247 6249 6251 6253 6255
.RCONT 1214 1221 1228 1235 1329 1425 1432 1439 1446 1453 1460 1467 1474 1565
1572 1579 1759 1770 1781 1787 1798 1804 1815 1821 1837 1839 1845 1851
1858 1860 1866 1872 2049 2064 2066 2084 2088 2095 2097 2103 2109 2116
2118 2124 2130 2326 2335 2337 2346 2355 2364 2373 2382 2391 2400 2409
2418 2427 2436 2445 2454 2463 2472 2481 2490 2499 2508 2517 2526 2535
2544 2553 2562 2571 2580 2589 2598 2607 2616 2625 2634 2643 2652 2679
2681 2687 2693 2700 2702 2708 2714 2862 2877 2888 2894 2903 2905 2911
2917 2924 2926 2932 2938 3068 3081 3083 3089 3095 3102 3104 3110 3116
3228 3230 3232 3234 3247 3249 3273 3275 3281 3287 3294 3296 3302 3308
3420 3422 3424 3426 3439 3441 3465 3467 3473 3479 3486 3488 3494 3500
3612 3614 3616 3618 3631 3633 3657 3659 3665 3671 3678 3680 3686 3692
3869 3871 3877 3883 3890 3892 3898 3904 4053 4064 4073 4075 4081 4087
4094 4096 4102 4108 4270 4272 4278 4284 4291 4293 4299 4305 4508 4521
4541 4547 4557 4559 4561 4568 4570 4576 4582 4589 4591 4597 4603 4789
4800 4809 4811 4817 4823 4830 4832 4838 4844 5099 5111 5113 5125 5127
5136 5138 5144 5150 5157 5159 5165 5171 5388 5401 5419 5421 5427 5433 SEQ 1596
5440 5442 5448 5454 5596 5607 5622 5637 5643 5652 5654 5660 5666 5673
5675 5681 5687 5812 5814 5819 5821 5945 5951 5957 5963 5969 5975 5981
5987 5993 5999 6005 6011 6017 6023 6029 6035 6041 6047 6053 6059 6065
6071 6077 6083 6089 6095 6101 6107 6113 6119 6125 6131 6137 6143 6149
6155 6161 6262 6264 6271 6273 6280 6282 6289 6291 6298 6300 6307 6309
6316 6318 6325 6327 6334 6336 6343 6345 6352 6354 6361 6363 6370 6372
6379 6381 6388 6390 6397 6399 6406 6408 6415 6417 6424 6426 6433 6435
6442 6444 6451 6453 6460 6462 6469 6471 6478 6480 6487 6489 6496 6498
6505 6507 6514 6516 6523 6525 6532 6534 6541 6543 6740 6742 6842 6844
6846 6851 6853 6860 6862 6864 6966
.RCRTN 3260 3264 3268 3452 3456 3460 3644 3648 3652 4563 5407 6257 6550
.RCRY 1839 1860 2097 2118 2337 2348 2357 2366 2375 2384 2393 2402 2411 2420
2429 2438 2447 2456 2465 2474 2483 2492 2501 2510 2519 2528 2537 2546
2555 2564 2573 2582 2591 2600 2609 2618 2627 2636 2645 2654 2681 2702
2905 2926 3083 3104 3275 3296 3467 3488 3659 3680 3871 3892 4075 4096
4272 4293 4570 4591 4811 4832 5138 5159 5421 5442 5654 5675 5951 6962
.RD 1759 1761 1763 1770 1772 1774 1781 1783 1785 1787 1798 1800 1802 1804
1815 1817 1819 1821 1837 1839 1843 1845 1847 1849 1851 1853 1858 1860
1864 1866 1868 1870 1872 1874 2064 2095 2097 2101 2103 2105 2107 2109
2111 2116 2118 2122 2124 2126 2128 2130 2132 2326 2328 2335 2337 2339
2346 2348 2355 2357 2364 2366 2373 2375 2382 2384 2391 2393 2400 2402
2409 2411 2418 2420 2427 2429 2436 2438 2445 2447 2454 2456 2463 2465
2472 2474 2481 2483 2490 2492 2499 2501 2508 2510 2517 2519 2526 2528
2535 2537 2544 2546 2553 2555 2562 2564 2571 2573 2580 2582 2589 2591
2598 2600 2607 2609 2616 2618 2625 2627 2634 2636 2643 2645 2652 2654
2656 2663 2670 2672 2679 2681 2685 2687 2689 2691 2693 2695 2700 2702
2706 2708 2710 2712 2714 2716 2858 2860 2862 2873 2875 2877 2888 2890
2892 2894 2903 2905 2909 2911 2913 2915 2917 2919 2924 2926 2930 2932
2934 2936 2938 2940 3064 3066 3068 3081 3083 3087 3089 3091 3093 3095
3097 3102 3104 3108 3110 3112 3114 3116 3118 3228 3230 3232 3234 3249
3273 3275 3279 3281 3283 3285 3287 3289 3294 3296 3300 3302 3304 3306
3308 3310 3420 3422 3424 3426 3441 3465 3467 3471 3473 3475 3477 3479
3481 3486 3488 3492 3494 3496 3498 3500 3502 3612 3614 3616 3618 3633
3657 3659 3663 3665 3667 3669 3671 3673 3678 3680 3684 3686 3688 3690
3692 3694 3869 3871 3875 3877 3879 3881 3883 3885 3890 3892 3896 3898
3900 3902 3904 3906 4042 4051 4062 4073 4075 4079 4081 4083 4085 4087
4089 4094 4096 4100 4102 4104 4106 4108 4110 4234 4236 4243 4245 4252
4254 4261 4263 4270 4272 4276 4278 4280 4282 4284 4286 4291 4293 4297
4299 4301 4303 4305 4307 4539 4541 4543 4545 4547 4549 4551 4553 4555
4557 4559 4561 4568 4570 4574 4576 4578 4580 4582 4584 4589 4591 4595
4597 4599 4601 4603 4605 4775 4777 4779 4781 4809 4811 4815 4817 4819
4821 4823 4825 4830 4832 4836 4838 4840 4842 4844 4846 5057 5059 5061
5063 5065 5067 5069 5071 5078 5080 5082 5084 5086 5088 5090 5092 5109
5111 5113 5123 5125 5127 5136 5138 5142 5144 5146 5148 5150 5152 5157
5159 5163 5165 5167 5169 5171 5173 5342 5344 5346 5365 5384 5386 5397
5399 5401 5403 5419 5421 5425 5427 5429 5431 5433 5435 5440 5442 5446
5448 5450 5452 5454 5456 5605 5607 5609 5611 5620 5622 5624 5626 5637
5639 5641 5652 5654 5658 5660 5662 5664 5666 5668 5673 5675 5679 5681
5683 5685 5687 5689 5810 5812 5814 5817 5819 5821 5945 5947 5949 5951
5953 5955 5957 5959 5961 5963 5965 5967 5969 5971 5973 5975 5977 5979
5981 5983 5985 5987 5989 5991 5993 5995 5997 5999 6001 6003 6005 6007
6009 6011 6013 6015 6017 6019 6021 6023 6025 6027 6029 6031 6033 6035
6037 6039 6041 6043 6045 6047 6049 6051 6053 6055 6057 6059 6061 6063 SEQ 1597
6065 6067 6069 6071 6073 6075 6077 6079 6081 6083 6085 6087 6089 6091
6093 6095 6097 6099 6101 6103 6105 6107 6109 6111 6113 6115 6117 6119
6121 6123 6125 6127 6129 6131 6133 6135 6137 6139 6141 6143 6145 6147
6149 6151 6153 6155 6157 6159 6161 6163 6165 6180 6182 6184 6186 6193
6195 6197 6199 6201 6203 6205 6207 6209 6211 6213 6215 6217 6219 6221
6223 6225 6227 6229 6231 6233 6235 6237 6239 6241 6243 6245 6247 6249
6251 6253 6255 6262 6264 6266 6268 6271 6273 6275 6277 6280 6282 6284
6286 6289 6291 6293 6295 6298 6300 6302 6304 6307 6309 6311 6313 6316
6318 6320 6322 6325 6327 6329 6331 6334 6336 6338 6340 6343 6345 6347
6349 6352 6354 6356 6358 6361 6363 6365 6367 6370 6372 6374 6376 6379
6381 6383 6385 6388 6390 6392 6394 6397 6399 6401 6403 6406 6408 6410
6412 6415 6417 6419 6421 6424 6426 6428 6430 6433 6435 6437 6439 6442
6444 6446 6448 6451 6453 6455 6457 6460 6462 6464 6466 6469 6471 6473
6475 6478 6480 6482 6484 6487 6489 6491 6493 6496 6498 6500 6502 6505
6507 6509 6511 6514 6516 6518 6520 6523 6525 6527 6529 6532 6534 6536
6538 6541 6543 6545 6547 6740 6742 6752 6754 6840 6842 6844 6846 6851
6853 6858 6860 6862 6864 6960 6962 6964 6966 6968
.RJ 1212 1216 1219 1223 1226 1230 1233 1237 1327 1331 1423 1427 1430 1434
1437 1441 1444 1448 1451 1455 1458 1462 1465 1469 1472 1476 1563 1567
1570 1574 1577 1581 1748 1750 1752 1757 1761 1763 1768 1772 1774 1779
1783 1785 1789 1791 1796 1800 1802 1806 1808 1813 1817 1819 1823 1825
1830 1832 1841 1843 1847 1849 1853 1862 1864 1868 1870 1874 2025 2027
2029 2034 2036 2038 2043 2045 2047 2051 2053 2058 2060 2062 2068 2070
2076 2078 2080 2082 2086 2090 2099 2101 2105 2107 2111 2120 2122 2126
2128 2132 2247 2249 2251 2253 2255 2257 2259 2261 2263 2265 2267 2269
2271 2273 2275 2277 2279 2281 2283 2285 2287 2289 2291 2293 2295 2297
2299 2301 2303 2305 2307 2309 2311 2313 2315 2317 2319 2321 2328 2330
2339 2341 2348 2350 2357 2359 2366 2368 2375 2377 2384 2386 2393 2395
2402 2404 2411 2413 2420 2422 2429 2431 2438 2440 2447 2449 2456 2458
2465 2467 2474 2476 2483 2485 2492 2494 2501 2503 2510 2512 2519 2521
2528 2530 2537 2539 2546 2548 2555 2557 2564 2566 2573 2575 2582 2584
2591 2593 2600 2602 2609 2611 2618 2620 2627 2629 2636 2638 2645 2647
2654 2656 2658 2663 2665 2670 2672 2674 2683 2685 2689 2691 2695 2704
2706 2710 2712 2716 2847 2849 2851 2856 2858 2860 2864 2866 2871 2873
2875 2879 2881 2886 2890 2892 2896 2898 2907 2909 2913 2915 2919 2928
2930 2934 2936 2940 3053 3055 3057 3062 3064 3066 3070 3072 3074 3076
3085 3087 3091 3093 3097 3106 3108 3112 3114 3118 3226 3236 3238 3243
3245 3251 3253 3258 3262 3266 3277 3279 3283 3285 3289 3298 3300 3304
3306 3310 3418 3428 3430 3435 3437 3443 3445 3450 3454 3458 3469 3471
3475 3477 3481 3490 3492 3496 3498 3502 3610 3620 3622 3627 3629 3635
3637 3642 3646 3650 3661 3663 3667 3669 3673 3682 3684 3688 3690 3694
3838 3840 3842 3847 3849 3851 3856 3858 3860 3862 3864 3873 3875 3879
3881 3885 3894 3896 3900 3902 3906 4042 4044 4046 4051 4055 4057 4062
4066 4068 4077 4079 4083 4085 4089 4098 4100 4104 4106 4110 4234 4236
4238 4243 4245 4247 4252 4254 4256 4261 4263 4265 4274 4276 4280 4282
4286 4295 4297 4301 4303 4307 4471 4473 4475 4481 4483 4485 4487 4493
4495 4497 4499 4504 4506 4510 4512 4517 4519 4523 4525 4530 4532 4534
4539 4543 4545 4549 4551 4553 4555 4572 4574 4578 4580 4584 4593 4595
4599 4601 4605 4765 4767 4769 4775 4777 4779 4781 4783 4785 4787 4791
4793 4798 4802 4804 4813 4815 4819 4821 4825 4834 4836 4840 4842 4846
5047 5049 5051 5057 5059 5061 5063 5065 5067 5069 5071 5078 5080 5082
5084 5086 5088 5090 5092 5097 5101 5103 5109 5115 5117 5123 5129 5131
5140 5142 5146 5148 5152 5161 5163 5167 5169 5173 5323 5325 5327 5329 SEQ 1598
5331 5336 5338 5340 5342 5344 5346 5348 5350 5352 5354 5359 5361 5363
5365 5367 5369 5371 5373 5378 5380 5382 5384 5386 5390 5392 5397 5399
5403 5405 5412 5414 5423 5425 5429 5431 5435 5444 5446 5450 5452 5456
5594 5598 5600 5605 5609 5611 5613 5615 5620 5624 5626 5628 5630 5635
5639 5641 5645 5647 5656 5658 5662 5664 5668 5677 5679 5683 5685 5689
5810 5817 5947 5949 5953 5955 5959 5961 5965 5967 5971 5973 5977 5979
5983 5985 5989 5991 5995 5997 6001 6003 6007 6009 6013 6015 6019 6021
6025 6027 6031 6033 6037 6039 6043 6045 6049 6051 6055 6057 6061 6063
6067 6069 6073 6075 6079 6081 6085 6087 6091 6093 6097 6099 6103 6105
6109 6111 6115 6117 6121 6123 6127 6129 6133 6135 6139 6141 6145 6147
6151 6153 6157 6159 6163 6165 6167 6172 6180 6182 6184 6186 6188 6193
6195 6197 6199 6201 6203 6205 6207 6209 6211 6213 6215 6217 6219 6221
6223 6225 6227 6229 6231 6233 6235 6237 6239 6241 6243 6245 6247 6249
6251 6253 6255 6266 6268 6275 6277 6284 6286 6293 6295 6302 6304 6311
6313 6320 6322 6329 6331 6338 6340 6347 6349 6356 6358 6365 6367 6374
6376 6383 6385 6392 6394 6401 6403 6410 6412 6419 6421 6428 6430 6437
6439 6446 6448 6455 6457 6464 6466 6473 6475 6482 6484 6491 6493 6500
6502 6509 6511 6518 6520 6527 6529 6536 6538 6545 6547 6744 6752 6754
6840 6858 6866 6960 6962 6964 6968
.RJMAP 1212 1216 1219 1223 1226 1230 1233 1237 1327 1331 1423 1427 1430 1434
1437 1441 1444 1448 1451 1455 1458 1462 1465 1469 1472 1476 1563 1567
1570 1574 1577 1581 1748 1752 1757 1763 1768 1774 1779 1785 1791 1796
1802 1808 1813 1819 1825 1830 1832 1849 1853 1870 1874 2025 2029 2034
2038 2043 2047 2053 2058 2062 2070 2076 2080 2086 2090 2107 2111 2128
2132 2247 2249 2251 2253 2255 2257 2259 2261 2263 2265 2267 2269 2271
2273 2275 2277 2279 2281 2283 2285 2287 2289 2291 2293 2295 2297 2299
2301 2303 2305 2307 2309 2311 2313 2315 2317 2319 2321 2330 2341 2350
2359 2368 2377 2386 2395 2404 2413 2422 2431 2440 2449 2458 2467 2476
2485 2494 2503 2512 2521 2530 2539 2548 2557 2566 2575 2584 2593 2602
2611 2620 2629 2638 2647 2658 2665 2674 2691 2695 2712 2716 2847 2851
2856 2860 2866 2871 2875 2881 2886 2892 2898 2915 2919 2936 2940 3053
3057 3062 3066 3072 3076 3093 3097 3114 3118 3238 3243 3253 3285 3289
3306 3310 3430 3435 3445 3477 3481 3498 3502 3622 3627 3637 3669 3673
3690 3694 3838 3842 3847 3851 3856 3860 3864 3881 3885 3902 3906 4042
4046 4051 4057 4062 4068 4085 4089 4106 4110 4234 4238 4243 4247 4252
4256 4261 4265 4282 4286 4303 4307 4471 4475 4481 4487 4493 4499 4504
4512 4517 4525 4530 4532 4534 4539 4555 4580 4584 4601 4605 4765 4769
4775 4781 4785 4791 4793 4798 4804 4821 4825 4842 4846 5047 5051 5057
5059 5061 5063 5065 5067 5069 5071 5078 5080 5082 5084 5086 5088 5090
5092 5097 5103 5109 5117 5123 5131 5148 5152 5169 5173 5323 5331 5336
5354 5359 5373 5378 5392 5399 5412 5414 5431 5435 5452 5456 5594 5600
5605 5611 5615 5620 5626 5630 5635 5641 5647 5664 5668 5685 5689 5810
5817 6167 6172 6180 6182 6184 6186 6188 6268 6277 6286 6295 6304 6313
6322 6331 6340 6349 6358 6367 6376 6385 6394 6403 6412 6421 6430 6439
6448 6457 6466 6475 6484 6493 6502 6511 6520 6529 6538 6547 6744 6752
6754 6840 6858 6866 6960 6968
.RJZ 3224 3416 3608 5940 6746
.RLDCT 1841 1862 2099 2120 2348 2357 2366 2375 2384 2393 2402 2411 2420 2429
2438 2447 2456 2465 2474 2483 2492 2501 2510 2519 2528 2537 2546 2555
2564 2573 2582 2591 2600 2609 2618 2627 2636 2645 2654 2683 2704 2907
2928 3085 3106 3277 3298 3469 3490 3661 3682 3873 3894 4077 4098 4274
4295 4543 4549 4572 4593 4777 4813 4834 5140 5161 5325 5338 5348 5361
5367 5380 5403 5423 5444 5656 5677 6962 SEQ 1599
.RLDLM 5810 5817 6262 6271 6280 6289 6298 6307 6316 6325 6334 6343 6352 6361
6370 6379 6388 6397 6406 6415 6424 6433 6442 6451 6460 6469 6478 6487
6496 6505 6514 6523 6532 6541 6742 6842 6846
.RLSAD 6193 6195 6197 6199 6201 6203 6205 6207 6209 6211 6213 6215 6217 6219
6221 6223 6225 6227 6229 6231 6233 6235 6237 6239 6241 6243 6245 6247
6249 6251 6253 6255 6840 6844 6858
.RMGC 1228 1235 1329 1432 1439 1446 1453 1460 1467 1474 1565 1572 1579 1757
1759 1768 1770 1779 1781 1787 1796 1798 1804 1813 1815 1821 1830 1845
1847 1851 1866 1868 1872 2034 2036 2043 2049 2058 2064 2066 2076 2084
2088 2103 2105 2109 2124 2126 2130 2687 2689 2693 2708 2710 2714 2858
2862 2873 2877 2888 2890 2894 2911 2913 2917 2932 2934 2938 3064 3068
3089 3091 3095 3110 3112 3116 3228 3230 3232 3247 3281 3283 3287 3302
3304 3308 3420 3422 3424 3439 3473 3475 3479 3494 3496 3500 3612 3631
3665 3667 3671 3686 3688 3692 3877 3879 3883 3898 3900 3904 4051 4053
4062 4064 4081 4083 4087 4102 4104 4108 4252 4261 4278 4280 4284 4299
4301 4305 4508 4521 4530 4532 4539 4541 4547 4557 4559 4561 4563 4576
4578 4582 4597 4599 4603 4777 4789 4793 4800 4817 4819 4823 4838 4840
4844 5057 5059 5061 5063 5065 5067 5069 5071 5078 5080 5082 5084 5086
5088 5090 5092 5099 5109 5111 5113 5123 5125 5127 5144 5146 5150 5165
5167 5171 5325 5338 5348 5361 5367 5380 5388 5401 5403 5412 5414 5427
5429 5433 5448 5450 5454 5596 5607 5622 5637 5643 5660 5662 5666 5681
5683 5687 5810 5812 5814 5817 5819 5821 6180 6182 6184 6186 6193 6195
6197 6199 6201 6203 6205 6207 6209 6211 6213 6215 6217 6219 6221 6223
6225 6227 6229 6231 6233 6235 6237 6239 6241 6243 6245 6247 6249 6251
6253 6255 6262 6264 6268 6271 6273 6277 6280 6282 6286 6289 6291 6295
6298 6300 6304 6307 6309 6313 6316 6318 6322 6325 6327 6331 6334 6336
6340 6343 6345 6349 6352 6354 6358 6361 6363 6367 6370 6372 6376 6379
6381 6385 6388 6390 6394 6397 6399 6403 6406 6408 6412 6415 6417 6421
6424 6426 6430 6433 6435 6439 6442 6444 6448 6451 6453 6457 6460 6462
6466 6469 6471 6475 6478 6480 6484 6487 6489 6493 6496 6498 6502 6505
6507 6511 6514 6516 6520 6523 6525 6529 6532 6534 6538 6541 6543 6547
6740 6742 6752 6754 6840 6844 6846 6851 6853 6858 6860 6862 6864
.ROENA 1214 1425 1432 1439 1460 1467 1474 1565 1579 1845 1866 2103 2124 2328
2339 2672 2687 2708 2888 2911 2932 3089 3110 3230 3281 3302 3422 3473
3494 3665 3686 3877 3898 4051 4062 4081 4102 4278 4299 4561 4576 4597
4817 4838 5109 5123 5144 5165 5401 5427 5448 5660 5681 5810 5814 5817
5821 6180 6182 6184 6186 6262 6271 6280 6289 6298 6307 6316 6325 6334
6343 6352 6361 6370 6379 6388 6397 6406 6415 6424 6433 6442 6451 6460
6469 6478 6487 6496 6505 6514 6523 6532 6541 6742 6754 6842 6846 6853
6864 6968
.ROR 1845 1851 1866 1872 2103 2109 2124 2130 2339 2656 2672 2687 2693 2708
2714 2862 2877 2894 2911 2917 2932 2938 3068 3089 3095 3110 3116 3228
3230 3281 3287 3302 3308 3420 3422 3473 3479 3494 3500 3665 3671 3686
3692 3877 3883 3898 3904 4081 4087 4102 4108 4252 4254 4261 4263 4278
4284 4299 4305 4559 4561 4576 4582 4597 4603 4817 4823 4838 4844 5057
5059 5061 5063 5065 5067 5069 5071 5078 5080 5082 5084 5086 5088 5090
5092 5113 5127 5144 5150 5165 5171 5427 5433 5448 5454 5660 5666 5681
5687 5812 5814 5819 5821 5947 5953 5957 5959 5963 5965 5969 5971 5975
5977 5981 5983 5987 5989 5993 5995 5999 6001 6005 6007 6011 6013 6017
6019 6023 6025 6029 6031 6035 6037 6041 6043 6047 6049 6053 6055 6059
6061 6065 6067 6071 6073 6077 6079 6083 6085 6089 6091 6095 6097 6101
6103 6107 6109 6113 6115 6119 6121 6125 6127 6131 6133 6137 6139 6143
6145 6149 6151 6155 6157 6161 6163 6193 6195 6197 6199 6201 6203 6205 SEQ 1600
6207 6209 6211 6213 6215 6217 6219 6221 6223 6225 6227 6229 6231 6233
6235 6237 6239 6241 6243 6245 6247 6249 6251 6253 6255 6262 6264 6268
6271 6273 6277 6280 6282 6286 6289 6291 6295 6298 6300 6304 6307 6309
6313 6316 6318 6322 6325 6327 6331 6334 6336 6340 6343 6345 6349 6352
6354 6358 6361 6363 6367 6370 6372 6376 6379 6381 6385 6388 6390 6394
6397 6399 6403 6406 6408 6412 6415 6417 6421 6424 6426 6430 6433 6435
6439 6442 6444 6448 6451 6453 6457 6460 6462 6466 6469 6471 6475 6478
6480 6484 6487 6489 6493 6496 6498 6502 6505 6507 6511 6514 6516 6520
6523 6525 6529 6532 6534 6538 6541 6543 6547 6740 6742 6752 6754 6842
6851 6853 6964 6966
.RPLUS 1839 1843 1860 1864 2097 2101 2118 2122 2337 2348 2357 2366 2375 2384
2393 2402 2411 2420 2429 2438 2447 2456 2465 2474 2483 2492 2501 2510
2519 2528 2537 2546 2555 2564 2573 2582 2591 2600 2609 2618 2627 2636
2645 2654 2670 2681 2685 2702 2706 2905 2909 2926 2930 3083 3087 3104
3108 3275 3279 3296 3300 3467 3471 3488 3492 3659 3663 3680 3684 3871
3875 3892 3896 4075 4079 4096 4100 4272 4276 4293 4297 4570 4574 4591
4595 4811 4815 4832 4836 5138 5142 5159 5163 5421 5425 5442 5446 5654
5658 5675 5679 5951 6962 6968
.RRAM 6262 6264 6271 6273 6280 6282 6289 6291 6298 6300 6307 6309 6316 6318
6325 6327 6334 6336 6343 6345 6352 6354 6361 6363 6370 6372 6379 6381
6388 6390 6397 6399 6406 6408 6415 6417 6424 6426 6433 6435 6442 6444
6451 6453 6460 6462 6469 6471 6478 6480 6487 6489 6496 6498 6505 6507
6514 6516 6523 6525 6532 6534 6541 6543 6851 6862
.RRDLM 1221 1425 1446 1453 1460 1467 1474 1572 1579 5812 5819 6264 6273 6282
6291 6300 6309 6318 6327 6336 6345 6354 6363 6372 6381 6390 6399 6408
6417 6426 6435 6444 6453 6462 6471 6480 6489 6498 6507 6516 6525 6534
6543 6752 6851 6860 6862
.RRPCT 1843 1864 2101 2122 2656 2670 2685 2706 2909 2930 3087 3108 3279 3300
3471 3492 3663 3684 3875 3896 4079 4100 4276 4297 4545 4551 4574 4595
4787 4815 4836 5142 5163 5327 5340 5350 5363 5369 5382 5405 5425 5446
5658 5679 6964
.RS0A 1845 1851 1866 1872 2064 2103 2109 2124 2130 2339 2656 2672 2687 2693
2708 2714 2862 2877 2894 2911 2917 2932 2938 3068 3089 3095 3110 3116
3230 3281 3287 3302 3308 3422 3473 3479 3494 3500 3665 3671 3686 3692
3877 3883 3898 3904 4042 4051 4062 4081 4087 4102 4108 4234 4236 4243
4254 4263 4278 4284 4299 4305 4561 4576 4582 4597 4603 4817 4823 4838
4844 5109 5123 5144 5150 5165 5171 5401 5427 5433 5448 5454 5660 5666
5681 5687 5810 5814 5821 5947 5949 5951 5953 5955 5957 5959 5961 5963
5965 5967 5969 5971 5973 5975 5977 5979 5981 5983 5985 5987 5989 5991
5993 5995 5997 5999 6001 6003 6005 6007 6009 6011 6013 6015 6017 6019
6021 6023 6025 6027 6029 6031 6033 6035 6037 6039 6041 6043 6045 6047
6049 6051 6053 6055 6057 6059 6061 6063 6065 6067 6069 6071 6073 6075
6077 6079 6081 6083 6085 6087 6089 6091 6093 6095 6097 6099 6101 6103
6105 6107 6109 6111 6113 6115 6117 6119 6121 6123 6125 6127 6129 6131
6133 6135 6137 6139 6141 6143 6145 6147 6149 6151 6153 6155 6157 6159
6161 6163 6165 6180 6182 6184 6186 6262 6271 6280 6289 6298 6307 6316
6325 6334 6343 6352 6361 6370 6379 6388 6397 6406 6415 6424 6433 6442
6451 6460 6469 6478 6487 6496 6505 6514 6523 6532 6541 6742 6754 6840
6842 6844 6846 6853 6858 6864 6960 6962 6964 6966
.RS0B 1839 1860 2097 2118 2681 2702 2905 2926 3083 3104 3275 3296 3467 3488
3659 3680 3871 3892 4075 4096 4272 4293 4570 4591 4811 4832 5138 5159
5421 5442 5654 5675
.RSAB 1843 1864 2101 2122 2328 2337 2348 2357 2366 2375 2384 2393 2402 2411 SEQ 1601
2420 2429 2438 2447 2456 2465 2474 2483 2492 2501 2510 2519 2528 2537
2546 2555 2564 2573 2582 2591 2600 2609 2618 2627 2636 2645 2654 2670
2685 2706 2909 2930 3087 3108 3279 3300 3471 3492 3663 3684 3875 3896
4079 4100 4245 4276 4297 4574 4595 4815 4836 5142 5163 5425 5446 5658
5679 5817 6266 6275 6284 6293 6302 6311 6320 6329 6338 6347 6356 6365
6374 6383 6392 6401 6410 6419 6428 6437 6446 6455 6464 6473 6482 6491
6500 6509 6518 6527 6536 6545 6968
.RSD0 1837 1858 2095 2116 2326 2335 2346 2355 2364 2373 2382 2391 2400 2409
2418 2427 2436 2445 2454 2463 2472 2481 2490 2499 2508 2517 2526 2535
2544 2553 2562 2571 2580 2589 2598 2607 2616 2625 2634 2643 2652 2663
2679 2700 2888 2903 2924 3081 3102 3228 3232 3273 3294 3420 3424 3465
3486 3657 3678 3869 3890 4073 4094 4252 4261 4270 4291 4539 4559 4568
4589 4775 4809 4830 5057 5059 5061 5063 5065 5067 5069 5071 5078 5080
5082 5084 5086 5088 5090 5092 5111 5113 5125 5127 5136 5157 5419 5440
5605 5620 5652 5673 5812 5819 5945 6193 6195 6197 6199 6201 6203 6205
6207 6209 6211 6213 6215 6217 6219 6221 6223 6225 6227 6229 6231 6233
6235 6237 6239 6241 6243 6245 6247 6249 6251 6253 6255 6264 6268 6273
6277 6282 6286 6291 6295 6300 6304 6309 6313 6318 6322 6327 6331 6336
6340 6345 6349 6354 6358 6363 6367 6372 6376 6381 6385 6390 6394 6399
6403 6408 6412 6417 6421 6426 6430 6435 6439 6444 6448 6453 6457 6462
6466 6471 6475 6480 6484 6489 6493 6498 6502 6507 6511 6516 6520 6525
6529 6534 6538 6543 6547 6740 6752 6851 6860 6862
.RSELC 1759 1770 1781 1787 1798 1804 1815 1830 4530 4541 4547 4557 4563 4777
4789 4793 5325 5338 5348 5361 5367 5380 5388 5403 5412 5596 5607 5622
5637
.RSELE 1228 1235 1432 1439 1446 1453 1460 1467 1474 1845 1847 1851 1866 1868
1872 2034 2036 2043 2049 2058 2064 2066 2076 2084 2088 2103 2105 2109
2124 2126 2130 2687 2689 2693 2708 2710 2714 2858 2862 2873 2877 2888
2890 2894 2911 2913 2917 2932 2934 2938 3064 3068 3089 3091 3095 3110
3112 3116 3281 3283 3287 3302 3304 3308 3473 3475 3479 3494 3496 3500
3665 3667 3671 3686 3688 3692 3877 3879 3883 3898 3900 3904 4051 4053
4062 4064 4081 4083 4087 4102 4104 4108 4278 4280 4284 4299 4301 4305
4561 4576 4578 4582 4597 4599 4603 4817 4819 4823 4838 4840 4844 5144
5146 5150 5165 5167 5171 5427 5429 5433 5448 5450 5454 5660 5662 5666
5681 5683 5687 5814 5821 6180 6182 6184 6186 6754 6853 6864
.RSELF 5113 5127 5401
.RSELM 1329 1565 1572 1579 1757 1768 1779 1796 1813 1821 3230 3247 3422 3439
3631 4508 4521 4532 4539 4559 4800 5099 5109 5123 5414 5643
.RSELP 3232 3424 3612 5111 5125
.RSKCN 4252 4261 6268 6277 6286 6295 6304 6313 6322 6331 6340 6349 6358 6367
6376 6385 6394 6403 6412 6421 6430 6439 6448 6457 6466 6475 6484 6493
6502 6511 6520 6529 6538 6547 6740
.RSKMB 6968
.RXNOR 2328 4245 5817 5949 5955 5961 5967 5973 5979 5985 5991 5997 6003 6009
6015 6021 6027 6033 6039 6045 6051 6057 6063 6069 6075 6081 6087 6093
6099 6105 6111 6117 6123 6129 6135 6141 6147 6153 6159 6165 6846
.RXOR 6266 6275 6284 6293 6302 6311 6320 6329 6338 6347 6356 6365 6374 6383
6392 6401 6410 6419 6428 6437 6446 6455 6464 6473 6482 6491 6500 6509
6518 6527 6536 6545
ATABLE 5762 5763 5764 5766 5768 5769 6621 6622 6623 6625 6626 6824 6826 6828
CALC 1212 1214 1216 1219 1221 1223 1226 1228 1230 1233 1235 1237 1327 1329 SEQ 1602
1331 1423 1425 1427 1430 1432 1434 1437 1439 1441 1444 1446 1448 1451
1453 1455 1458 1460 1462 1465 1467 1469 1472 1474 1476 1563 1565 1567
1570 1572 1574 1577 1579 1581 1748 1750 1752 1757 1759 1761 1763 1768
1770 1772 1774 1779 1781 1783 1785 1787 1789 1791 1796 1798 1800 1802
1804 1806 1808 1813 1815 1817 1819 1821 1823 1825 1830 1832 1837 1839
1841 1843 1845 1847 1849 1851 1853 1858 1860 1862 1864 1866 1868 1870
1872 1874 2025 2027 2029 2034 2036 2038 2043 2045 2047 2049 2051 2053
2058 2060 2062 2064 2066 2068 2070 2076 2078 2080 2082 2084 2086 2088
2090 2095 2097 2099 2101 2103 2105 2107 2109 2111 2116 2118 2120 2122
2124 2126 2128 2130 2132 2247 2249 2251 2253 2255 2257 2259 2261 2263
2265 2267 2269 2271 2273 2275 2277 2279 2281 2283 2285 2287 2289 2291
2293 2295 2297 2299 2301 2303 2305 2307 2309 2311 2313 2315 2317 2319
2321 2326 2328 2330 2335 2337 2339 2341 2346 2348 2350 2355 2357 2359
2364 2366 2368 2373 2375 2377 2382 2384 2386 2391 2393 2395 2400 2402
2404 2409 2411 2413 2418 2420 2422 2427 2429 2431 2436 2438 2440 2445
2447 2449 2454 2456 2458 2463 2465 2467 2472 2474 2476 2481 2483 2485
2490 2492 2494 2499 2501 2503 2508 2510 2512 2517 2519 2521 2526 2528
2530 2535 2537 2539 2544 2546 2548 2553 2555 2557 2562 2564 2566 2571
2573 2575 2580 2582 2584 2589 2591 2593 2598 2600 2602 2607 2609 2611
2616 2618 2620 2625 2627 2629 2634 2636 2638 2643 2645 2647 2652 2654
2656 2658 2663 2665 2670 2672 2674 2679 2681 2683 2685 2687 2689 2691
2693 2695 2700 2702 2704 2706 2708 2710 2712 2714 2716 2847 2849 2851
2856 2858 2860 2862 2864 2866 2871 2873 2875 2877 2879 2881 2886 2888
2890 2892 2894 2896 2898 2903 2905 2907 2909 2911 2913 2915 2917 2919
2924 2926 2928 2930 2932 2934 2936 2938 2940 3053 3055 3057 3062 3064
3066 3068 3070 3072 3074 3076 3081 3083 3085 3087 3089 3091 3093 3095
3097 3102 3104 3106 3108 3110 3112 3114 3116 3118 3224 3226 3228 3230
3232 3234 3236 3238 3243 3245 3247 3249 3251 3253 3258 3260 3262 3264
3266 3268 3273 3275 3277 3279 3281 3283 3285 3287 3289 3294 3296 3298
3300 3302 3304 3306 3308 3310 3416 3418 3420 3422 3424 3426 3428 3430
3435 3437 3439 3441 3443 3445 3450 3452 3454 3456 3458 3460 3465 3467
3469 3471 3473 3475 3477 3479 3481 3486 3488 3490 3492 3494 3496 3498
3500 3502 3608 3610 3612 3614 3616 3618 3620 3622 3627 3629 3631 3633
3635 3637 3642 3644 3646 3648 3650 3652 3657 3659 3661 3663 3665 3667
3669 3671 3673 3678 3680 3682 3684 3686 3688 3690 3692 3694 3838 3840
3842 3847 3849 3851 3856 3858 3860 3862 3864 3869 3871 3873 3875 3877
3879 3881 3883 3885 3890 3892 3894 3896 3898 3900 3902 3904 3906 4042
4044 4046 4051 4053 4055 4057 4062 4064 4066 4068 4073 4075 4077 4079
4081 4083 4085 4087 4089 4094 4096 4098 4100 4102 4104 4106 4108 4110
4234 4236 4238 4243 4245 4247 4252 4254 4256 4261 4263 4265 4270 4272
4274 4276 4278 4280 4282 4284 4286 4291 4293 4295 4297 4299 4301 4303
4305 4307 4471 4473 4475 4481 4483 4485 4487 4493 4495 4497 4499 4504
4506 4508 4510 4512 4517 4519 4521 4523 4525 4530 4532 4534 4539 4541
4543 4545 4547 4549 4551 4553 4555 4557 4559 4561 4563 4568 4570 4572
4574 4576 4578 4580 4582 4584 4589 4591 4593 4595 4597 4599 4601 4603
4605 4765 4767 4769 4775 4777 4779 4781 4783 4785 4787 4789 4791 4793
4798 4800 4802 4804 4809 4811 4813 4815 4817 4819 4821 4823 4825 4830
4832 4834 4836 4838 4840 4842 4844 4846 5047 5049 5051 5057 5059 5061
5063 5065 5067 5069 5071 5078 5080 5082 5084 5086 5088 5090 5092 5097
5099 5101 5103 5109 5111 5113 5115 5117 5123 5125 5127 5129 5131 5136
5138 5140 5142 5144 5146 5148 5150 5152 5157 5159 5161 5163 5165 5167
5169 5171 5173 5323 5325 5327 5329 5331 5336 5338 5340 5342 5344 5346
5348 5350 5352 5354 5359 5361 5363 5365 5367 5369 5371 5373 5378 5380 SEQ 1603
5382 5384 5386 5388 5390 5392 5397 5399 5401 5403 5405 5407 5412 5414
5419 5421 5423 5425 5427 5429 5431 5433 5435 5440 5442 5444 5446 5448
5450 5452 5454 5456 5594 5596 5598 5600 5605 5607 5609 5611 5613 5615
5620 5622 5624 5626 5628 5630 5635 5637 5639 5641 5643 5645 5647 5652
5654 5656 5658 5660 5662 5664 5666 5668 5673 5675 5677 5679 5681 5683
5685 5687 5689 5810 5812 5814 5817 5819 5821 5940 5945 5947 5949 5951
5953 5955 5957 5959 5961 5963 5965 5967 5969 5971 5973 5975 5977 5979
5981 5983 5985 5987 5989 5991 5993 5995 5997 5999 6001 6003 6005 6007
6009 6011 6013 6015 6017 6019 6021 6023 6025 6027 6029 6031 6033 6035
6037 6039 6041 6043 6045 6047 6049 6051 6053 6055 6057 6059 6061 6063
6065 6067 6069 6071 6073 6075 6077 6079 6081 6083 6085 6087 6089 6091
6093 6095 6097 6099 6101 6103 6105 6107 6109 6111 6113 6115 6117 6119
6121 6123 6125 6127 6129 6131 6133 6135 6137 6139 6141 6143 6145 6147
6149 6151 6153 6155 6157 6159 6161 6163 6165 6167 6172 6180 6182 6184
6186 6188 6193 6195 6197 6199 6201 6203 6205 6207 6209 6211 6213 6215
6217 6219 6221 6223 6225 6227 6229 6231 6233 6235 6237 6239 6241 6243
6245 6247 6249 6251 6253 6255 6257 6262 6264 6266 6268 6271 6273 6275
6277 6280 6282 6284 6286 6289 6291 6293 6295 6298 6300 6302 6304 6307
6309 6311 6313 6316 6318 6320 6322 6325 6327 6329 6331 6334 6336 6338
6340 6343 6345 6347 6349 6352 6354 6356 6358 6361 6363 6365 6367 6370
6372 6374 6376 6379 6381 6383 6385 6388 6390 6392 6394 6397 6399 6401
6403 6406 6408 6410 6412 6415 6417 6419 6421 6424 6426 6428 6430 6433
6435 6437 6439 6442 6444 6446 6448 6451 6453 6455 6457 6460 6462 6464
6466 6469 6471 6473 6475 6478 6480 6482 6484 6487 6489 6491 6493 6496
6498 6500 6502 6505 6507 6509 6511 6514 6516 6518 6520 6523 6525 6527
6529 6532 6534 6536 6538 6541 6543 6545 6547 6550 6740 6742 6744 6746
6752 6754 6840 6842 6844 6846 6851 6853 6858 6860 6862 6864 6866 6960
6962 6964 6966 6968
CONCAT 1212 1214 1216 1219 1221 1223 1226 1228 1230 1233 1235 1237 1327 1329
1331 1423 1425 1427 1430 1432 1434 1437 1439 1441 1444 1446 1448 1451
1453 1455 1458 1460 1462 1465 1467 1469 1472 1474 1476 1563 1565 1567
1570 1572 1574 1577 1579 1581 1748 1750 1752 1757 1759 1761 1763 1768
1770 1772 1774 1779 1781 1783 1785 1787 1789 1791 1796 1798 1800 1802
1804 1806 1808 1813 1815 1817 1819 1821 1823 1825 1830 1832 1837 1839
1841 1843 1845 1847 1849 1851 1853 1858 1860 1862 1864 1866 1868 1870
1872 1874 2025 2027 2029 2034 2036 2038 2043 2045 2047 2049 2051 2053
2058 2060 2062 2064 2066 2068 2070 2076 2078 2080 2082 2084 2086 2088
2090 2095 2097 2099 2101 2103 2105 2107 2109 2111 2116 2118 2120 2122
2124 2126 2128 2130 2132 2247 2249 2251 2253 2255 2257 2259 2261 2263
2265 2267 2269 2271 2273 2275 2277 2279 2281 2283 2285 2287 2289 2291
2293 2295 2297 2299 2301 2303 2305 2307 2309 2311 2313 2315 2317 2319
2321 2326 2328 2330 2335 2337 2339 2341 2346 2348 2350 2355 2357 2359
2364 2366 2368 2373 2375 2377 2382 2384 2386 2391 2393 2395 2400 2402
2404 2409 2411 2413 2418 2420 2422 2427 2429 2431 2436 2438 2440 2445
2447 2449 2454 2456 2458 2463 2465 2467 2472 2474 2476 2481 2483 2485
2490 2492 2494 2499 2501 2503 2508 2510 2512 2517 2519 2521 2526 2528
2530 2535 2537 2539 2544 2546 2548 2553 2555 2557 2562 2564 2566 2571
2573 2575 2580 2582 2584 2589 2591 2593 2598 2600 2602 2607 2609 2611
2616 2618 2620 2625 2627 2629 2634 2636 2638 2643 2645 2647 2652 2654
2656 2658 2663 2665 2670 2672 2674 2679 2681 2683 2685 2687 2689 2691
2693 2695 2700 2702 2704 2706 2708 2710 2712 2714 2716 2847 2849 2851
2856 2858 2860 2862 2864 2866 2871 2873 2875 2877 2879 2881 2886 2888
2890 2892 2894 2896 2898 2903 2905 2907 2909 2911 2913 2915 2917 2919 SEQ 1604
2924 2926 2928 2930 2932 2934 2936 2938 2940 3053 3055 3057 3062 3064
3066 3068 3070 3072 3074 3076 3081 3083 3085 3087 3089 3091 3093 3095
3097 3102 3104 3106 3108 3110 3112 3114 3116 3118 3224 3226 3228 3230
3232 3234 3236 3238 3243 3245 3247 3249 3251 3253 3258 3260 3262 3264
3266 3268 3273 3275 3277 3279 3281 3283 3285 3287 3289 3294 3296 3298
3300 3302 3304 3306 3308 3310 3416 3418 3420 3422 3424 3426 3428 3430
3435 3437 3439 3441 3443 3445 3450 3452 3454 3456 3458 3460 3465 3467
3469 3471 3473 3475 3477 3479 3481 3486 3488 3490 3492 3494 3496 3498
3500 3502 3608 3610 3612 3614 3616 3618 3620 3622 3627 3629 3631 3633
3635 3637 3642 3644 3646 3648 3650 3652 3657 3659 3661 3663 3665 3667
3669 3671 3673 3678 3680 3682 3684 3686 3688 3690 3692 3694 3838 3840
3842 3847 3849 3851 3856 3858 3860 3862 3864 3869 3871 3873 3875 3877
3879 3881 3883 3885 3890 3892 3894 3896 3898 3900 3902 3904 3906 4042
4044 4046 4051 4053 4055 4057 4062 4064 4066 4068 4073 4075 4077 4079
4081 4083 4085 4087 4089 4094 4096 4098 4100 4102 4104 4106 4108 4110
4234 4236 4238 4243 4245 4247 4252 4254 4256 4261 4263 4265 4270 4272
4274 4276 4278 4280 4282 4284 4286 4291 4293 4295 4297 4299 4301 4303
4305 4307 4471 4473 4475 4481 4483 4485 4487 4493 4495 4497 4499 4504
4506 4508 4510 4512 4517 4519 4521 4523 4525 4530 4532 4534 4539 4541
4543 4545 4547 4549 4551 4553 4555 4557 4559 4561 4563 4568 4570 4572
4574 4576 4578 4580 4582 4584 4589 4591 4593 4595 4597 4599 4601 4603
4605 4765 4767 4769 4775 4777 4779 4781 4783 4785 4787 4789 4791 4793
4798 4800 4802 4804 4809 4811 4813 4815 4817 4819 4821 4823 4825 4830
4832 4834 4836 4838 4840 4842 4844 4846 5047 5049 5051 5057 5059 5061
5063 5065 5067 5069 5071 5078 5080 5082 5084 5086 5088 5090 5092 5097
5099 5101 5103 5109 5111 5113 5115 5117 5123 5125 5127 5129 5131 5136
5138 5140 5142 5144 5146 5148 5150 5152 5157 5159 5161 5163 5165 5167
5169 5171 5173 5323 5325 5327 5329 5331 5336 5338 5340 5342 5344 5346
5348 5350 5352 5354 5359 5361 5363 5365 5367 5369 5371 5373 5378 5380
5382 5384 5386 5388 5390 5392 5397 5399 5401 5403 5405 5407 5412 5414
5419 5421 5423 5425 5427 5429 5431 5433 5435 5440 5442 5444 5446 5448
5450 5452 5454 5456 5594 5596 5598 5600 5605 5607 5609 5611 5613 5615
5620 5622 5624 5626 5628 5630 5635 5637 5639 5641 5643 5645 5647 5652
5654 5656 5658 5660 5662 5664 5666 5668 5673 5675 5677 5679 5681 5683
5685 5687 5689 5810 5812 5814 5817 5819 5821 5940 5945 5947 5949 5951
5953 5955 5957 5959 5961 5963 5965 5967 5969 5971 5973 5975 5977 5979
5981 5983 5985 5987 5989 5991 5993 5995 5997 5999 6001 6003 6005 6007
6009 6011 6013 6015 6017 6019 6021 6023 6025 6027 6029 6031 6033 6035
6037 6039 6041 6043 6045 6047 6049 6051 6053 6055 6057 6059 6061 6063
6065 6067 6069 6071 6073 6075 6077 6079 6081 6083 6085 6087 6089 6091
6093 6095 6097 6099 6101 6103 6105 6107 6109 6111 6113 6115 6117 6119
6121 6123 6125 6127 6129 6131 6133 6135 6137 6139 6141 6143 6145 6147
6149 6151 6153 6155 6157 6159 6161 6163 6165 6167 6172 6180 6182 6184
6186 6188 6193 6195 6197 6199 6201 6203 6205 6207 6209 6211 6213 6215
6217 6219 6221 6223 6225 6227 6229 6231 6233 6235 6237 6239 6241 6243
6245 6247 6249 6251 6253 6255 6257 6262 6264 6266 6268 6271 6273 6275
6277 6280 6282 6284 6286 6289 6291 6293 6295 6298 6300 6302 6304 6307
6309 6311 6313 6316 6318 6320 6322 6325 6327 6329 6331 6334 6336 6338
6340 6343 6345 6347 6349 6352 6354 6356 6358 6361 6363 6365 6367 6370
6372 6374 6376 6379 6381 6383 6385 6388 6390 6392 6394 6397 6399 6401
6403 6406 6408 6410 6412 6415 6417 6419 6421 6424 6426 6428 6430 6433
6435 6437 6439 6442 6444 6446 6448 6451 6453 6455 6457 6460 6462 6464
6466 6469 6471 6473 6475 6478 6480 6482 6484 6487 6489 6491 6493 6496 SEQ 1605
6498 6500 6502 6505 6507 6509 6511 6514 6516 6518 6520 6523 6525 6527
6529 6532 6534 6536 6538 6541 6543 6545 6547 6550 6740 6742 6744 6746
6752 6754 6840 6842 6844 6846 6851 6853 6858 6860 6862 6864 6866 6960
6962 6964 6966 6968
FIELD 1212 1214 1216 1219 1221 1223 1226 1228 1230 1233 1235 1237 1327 1329
1331 1423 1425 1427 1430 1432 1434 1437 1439 1441 1444 1446 1448 1451
1453 1455 1458 1460 1462 1465 1467 1469 1472 1474 1476 1563 1565 1567
1570 1572 1574 1577 1579 1581 1748 1750 1752 1757 1759 1761 1763 1768
1770 1772 1774 1779 1781 1783 1785 1787 1789 1791 1796 1798 1800 1802
1804 1806 1808 1813 1815 1817 1819 1821 1823 1825 1830 1832 1837 1839
1841 1843 1845 1847 1849 1851 1853 1858 1860 1862 1864 1866 1868 1870
1872 1874 2025 2027 2029 2034 2036 2038 2043 2045 2047 2049 2051 2053
2058 2060 2062 2064 2066 2068 2070 2076 2078 2080 2082 2084 2086 2088
2090 2095 2097 2099 2101 2103 2105 2107 2109 2111 2116 2118 2120 2122
2124 2126 2128 2130 2132 2247 2249 2251 2253 2255 2257 2259 2261 2263
2265 2267 2269 2271 2273 2275 2277 2279 2281 2283 2285 2287 2289 2291
2293 2295 2297 2299 2301 2303 2305 2307 2309 2311 2313 2315 2317 2319
2321 2326 2328 2330 2335 2337 2339 2341 2346 2348 2350 2355 2357 2359
2364 2366 2368 2373 2375 2377 2382 2384 2386 2391 2393 2395 2400 2402
2404 2409 2411 2413 2418 2420 2422 2427 2429 2431 2436 2438 2440 2445
2447 2449 2454 2456 2458 2463 2465 2467 2472 2474 2476 2481 2483 2485
2490 2492 2494 2499 2501 2503 2508 2510 2512 2517 2519 2521 2526 2528
2530 2535 2537 2539 2544 2546 2548 2553 2555 2557 2562 2564 2566 2571
2573 2575 2580 2582 2584 2589 2591 2593 2598 2600 2602 2607 2609 2611
2616 2618 2620 2625 2627 2629 2634 2636 2638 2643 2645 2647 2652 2654
2656 2658 2663 2665 2670 2672 2674 2679 2681 2683 2685 2687 2689 2691
2693 2695 2700 2702 2704 2706 2708 2710 2712 2714 2716 2847 2849 2851
2856 2858 2860 2862 2864 2866 2871 2873 2875 2877 2879 2881 2886 2888
2890 2892 2894 2896 2898 2903 2905 2907 2909 2911 2913 2915 2917 2919
2924 2926 2928 2930 2932 2934 2936 2938 2940 3053 3055 3057 3062 3064
3066 3068 3070 3072 3074 3076 3081 3083 3085 3087 3089 3091 3093 3095
3097 3102 3104 3106 3108 3110 3112 3114 3116 3118 3224 3226 3228 3230
3232 3234 3236 3238 3243 3245 3247 3249 3251 3253 3258 3260 3262 3264
3266 3268 3273 3275 3277 3279 3281 3283 3285 3287 3289 3294 3296 3298
3300 3302 3304 3306 3308 3310 3416 3418 3420 3422 3424 3426 3428 3430
3435 3437 3439 3441 3443 3445 3450 3452 3454 3456 3458 3460 3465 3467
3469 3471 3473 3475 3477 3479 3481 3486 3488 3490 3492 3494 3496 3498
3500 3502 3608 3610 3612 3614 3616 3618 3620 3622 3627 3629 3631 3633
3635 3637 3642 3644 3646 3648 3650 3652 3657 3659 3661 3663 3665 3667
3669 3671 3673 3678 3680 3682 3684 3686 3688 3690 3692 3694 3838 3840
3842 3847 3849 3851 3856 3858 3860 3862 3864 3869 3871 3873 3875 3877
3879 3881 3883 3885 3890 3892 3894 3896 3898 3900 3902 3904 3906 4042
4044 4046 4051 4053 4055 4057 4062 4064 4066 4068 4073 4075 4077 4079
4081 4083 4085 4087 4089 4094 4096 4098 4100 4102 4104 4106 4108 4110
4234 4236 4238 4243 4245 4247 4252 4254 4256 4261 4263 4265 4270 4272
4274 4276 4278 4280 4282 4284 4286 4291 4293 4295 4297 4299 4301 4303
4305 4307 4471 4473 4475 4481 4483 4485 4487 4493 4495 4497 4499 4504
4506 4508 4510 4512 4517 4519 4521 4523 4525 4530 4532 4534 4539 4541
4543 4545 4547 4549 4551 4553 4555 4557 4559 4561 4563 4568 4570 4572
4574 4576 4578 4580 4582 4584 4589 4591 4593 4595 4597 4599 4601 4603
4605 4765 4767 4769 4775 4777 4779 4781 4783 4785 4787 4789 4791 4793
4798 4800 4802 4804 4809 4811 4813 4815 4817 4819 4821 4823 4825 4830
4832 4834 4836 4838 4840 4842 4844 4846 5047 5049 5051 5057 5059 5061 SEQ 1606
5063 5065 5067 5069 5071 5078 5080 5082 5084 5086 5088 5090 5092 5097
5099 5101 5103 5109 5111 5113 5115 5117 5123 5125 5127 5129 5131 5136
5138 5140 5142 5144 5146 5148 5150 5152 5157 5159 5161 5163 5165 5167
5169 5171 5173 5323 5325 5327 5329 5331 5336 5338 5340 5342 5344 5346
5348 5350 5352 5354 5359 5361 5363 5365 5367 5369 5371 5373 5378 5380
5382 5384 5386 5388 5390 5392 5397 5399 5401 5403 5405 5407 5412 5414
5419 5421 5423 5425 5427 5429 5431 5433 5435 5440 5442 5444 5446 5448
5450 5452 5454 5456 5594 5596 5598 5600 5605 5607 5609 5611 5613 5615
5620 5622 5624 5626 5628 5630 5635 5637 5639 5641 5643 5645 5647 5652
5654 5656 5658 5660 5662 5664 5666 5668 5673 5675 5677 5679 5681 5683
5685 5687 5689 5810 5812 5814 5817 5819 5821 5940 5945 5947 5949 5951
5953 5955 5957 5959 5961 5963 5965 5967 5969 5971 5973 5975 5977 5979
5981 5983 5985 5987 5989 5991 5993 5995 5997 5999 6001 6003 6005 6007
6009 6011 6013 6015 6017 6019 6021 6023 6025 6027 6029 6031 6033 6035
6037 6039 6041 6043 6045 6047 6049 6051 6053 6055 6057 6059 6061 6063
6065 6067 6069 6071 6073 6075 6077 6079 6081 6083 6085 6087 6089 6091
6093 6095 6097 6099 6101 6103 6105 6107 6109 6111 6113 6115 6117 6119
6121 6123 6125 6127 6129 6131 6133 6135 6137 6139 6141 6143 6145 6147
6149 6151 6153 6155 6157 6159 6161 6163 6165 6167 6172 6180 6182 6184
6186 6188 6193 6195 6197 6199 6201 6203 6205 6207 6209 6211 6213 6215
6217 6219 6221 6223 6225 6227 6229 6231 6233 6235 6237 6239 6241 6243
6245 6247 6249 6251 6253 6255 6257 6262 6264 6266 6268 6271 6273 6275
6277 6280 6282 6284 6286 6289 6291 6293 6295 6298 6300 6302 6304 6307
6309 6311 6313 6316 6318 6320 6322 6325 6327 6329 6331 6334 6336 6338
6340 6343 6345 6347 6349 6352 6354 6356 6358 6361 6363 6365 6367 6370
6372 6374 6376 6379 6381 6383 6385 6388 6390 6392 6394 6397 6399 6401
6403 6406 6408 6410 6412 6415 6417 6419 6421 6424 6426 6428 6430 6433
6435 6437 6439 6442 6444 6446 6448 6451 6453 6455 6457 6460 6462 6464
6466 6469 6471 6473 6475 6478 6480 6482 6484 6487 6489 6491 6493 6496
6498 6500 6502 6505 6507 6509 6511 6514 6516 6518 6520 6523 6525 6527
6529 6532 6534 6536 6538 6541 6543 6545 6547 6550 6740 6742 6744 6746
6752 6754 6840 6842 6844 6846 6851 6853 6858 6860 6862 6864 6866 6960
6962 6964 6966 6968
GET 672 921 6703 7178 7180
GO 84 96 100 114 115 245 257 262 276 277 278 336 341 349
350 352 354 367 368 426 430 432 443 445 446 464 466 467
540 544 546 557 559 560 562 563 581 583 584 586 587 656
657 671 687 689 694 722 726 905 906 920 936 938 943 971
975 1157 1159 1165 1176 1275 1277 1283 1294 1367 1369 1375 1386 1511
1513 1519 1530 1629 1631 1643 1644 1706 1709 1711 1712 1718 1720 1724
1922 1924 1936 1937 1995 1999 2177 2179 2191 2192 2762 2764 2776 2777
2825 2984 2986 2998 2999 3033 3161 3163 3175 3176 3353 3355 3367 3368
3545 3547 3559 3560 3741 3743 3755 3756 3812 3815 3951 3953 3965 3966
4019 4020 4156 4158 4170 4171 4356 4358 4364 4370 4372 4376 4377 4440
4444 4650 4652 4664 4665 4715 4719 4737 4892 4894 4906 4907 5007 5008
5009 5010 5011 5012 5013 5014 5015 5016 5017 5018 5019 5020 5021 5022
5218 5220 5229 5234 5236 5240 5241 5294 5296 5300 5499 5501 5513 5514
5569 5572 5730 5732 5738 5744 5793 5865 5867 5873 5879 5900 5902 5904
5905 6588 6593 6599 6602 6635 6638 6642 6658 6663 6672 6674 6676 6678
6687 6690 6699 6792 6794 6800 6806 6904 6906 6912 6918 7005 7018 7024
7026 7030 7032 7034 7036 7038 7039 7050 7052 7056 7058 7060 7062 7064
7065 7093 7095 7097 7136 7142 7192 7196 7211 7223 7227 7242
MFLD 1212# 1212 1214# 1214 1216# 1216 1219# 1219 1221# 1221 1223# 1223 1226# 1226 SEQ 1607
1228# 1228 1230# 1230 1233# 1233 1235# 1235 1237# 1237 1327# 1327 1329# 1329
1331# 1331 1423# 1423 1425# 1425 1427# 1427 1430# 1430 1432# 1432 1434# 1434
1437# 1437 1439# 1439 1441# 1441 1444# 1444 1446# 1446 1448# 1448 1451# 1451
1453# 1453 1455# 1455 1458# 1458 1460# 1460 1462# 1462 1465# 1465 1467# 1467
1469# 1469 1472# 1472 1474# 1474 1476# 1476 1563# 1563 1565# 1565 1567# 1567
1570# 1570 1572# 1572 1574# 1574 1577# 1577 1579# 1579 1581# 1581 1748# 1748
1750# 1750 1752# 1752 1757# 1757 1759# 1759 1761# 1761 1763# 1763 1768# 1768
1770# 1770 1772# 1772 1774# 1774 1779# 1779 1781# 1781 1783# 1783 1785# 1785
1787# 1787 1789# 1789 1791# 1791 1796# 1796 1798# 1798 1800# 1800 1802# 1802
1804# 1804 1806# 1806 1808# 1808 1813# 1813 1815# 1815 1817# 1817 1819# 1819
1821# 1821 1823# 1823 1825# 1825 1830# 1830 1832# 1832 1837# 1837 1839# 1839
1841# 1841 1843# 1843 1845# 1845 1847# 1847 1849# 1849 1851# 1851 1853# 1853
1858# 1858 1860# 1860 1862# 1862 1864# 1864 1866# 1866 1868# 1868 1870# 1870
1872# 1872 1874# 1874 2025# 2025 2027# 2027 2029# 2029 2034# 2034 2036# 2036
2038# 2038 2043# 2043 2045# 2045 2047# 2047 2049# 2049 2051# 2051 2053# 2053
2058# 2058 2060# 2060 2062# 2062 2064# 2064 2066# 2066 2068# 2068 2070# 2070
2076# 2076 2078# 2078 2080# 2080 2082# 2082 2084# 2084 2086# 2086 2088# 2088
2090# 2090 2095# 2095 2097# 2097 2099# 2099 2101# 2101 2103# 2103 2105# 2105
2107# 2107 2109# 2109 2111# 2111 2116# 2116 2118# 2118 2120# 2120 2122# 2122
2124# 2124 2126# 2126 2128# 2128 2130# 2130 2132# 2132 2247# 2247 2249# 2249
2251# 2251 2253# 2253 2255# 2255 2257# 2257 2259# 2259 2261# 2261 2263# 2263
2265# 2265 2267# 2267 2269# 2269 2271# 2271 2273# 2273 2275# 2275 2277# 2277
2279# 2279 2281# 2281 2283# 2283 2285# 2285 2287# 2287 2289# 2289 2291# 2291
2293# 2293 2295# 2295 2297# 2297 2299# 2299 2301# 2301 2303# 2303 2305# 2305
2307# 2307 2309# 2309 2311# 2311 2313# 2313 2315# 2315 2317# 2317 2319# 2319
2321# 2321 2326# 2326 2328# 2328 2330# 2330 2335# 2335 2337# 2337 2339# 2339
2341# 2341 2346# 2346 2348# 2348 2350# 2350 2355# 2355 2357# 2357 2359# 2359
2364# 2364 2366# 2366 2368# 2368 2373# 2373 2375# 2375 2377# 2377 2382# 2382
2384# 2384 2386# 2386 2391# 2391 2393# 2393 2395# 2395 2400# 2400 2402# 2402
2404# 2404 2409# 2409 2411# 2411 2413# 2413 2418# 2418 2420# 2420 2422# 2422
2427# 2427 2429# 2429 2431# 2431 2436# 2436 2438# 2438 2440# 2440 2445# 2445
2447# 2447 2449# 2449 2454# 2454 2456# 2456 2458# 2458 2463# 2463 2465# 2465
2467# 2467 2472# 2472 2474# 2474 2476# 2476 2481# 2481 2483# 2483 2485# 2485
2490# 2490 2492# 2492 2494# 2494 2499# 2499 2501# 2501 2503# 2503 2508# 2508
2510# 2510 2512# 2512 2517# 2517 2519# 2519 2521# 2521 2526# 2526 2528# 2528
2530# 2530 2535# 2535 2537# 2537 2539# 2539 2544# 2544 2546# 2546 2548# 2548
2553# 2553 2555# 2555 2557# 2557 2562# 2562 2564# 2564 2566# 2566 2571# 2571
2573# 2573 2575# 2575 2580# 2580 2582# 2582 2584# 2584 2589# 2589 2591# 2591
2593# 2593 2598# 2598 2600# 2600 2602# 2602 2607# 2607 2609# 2609 2611# 2611
2616# 2616 2618# 2618 2620# 2620 2625# 2625 2627# 2627 2629# 2629 2634# 2634
2636# 2636 2638# 2638 2643# 2643 2645# 2645 2647# 2647 2652# 2652 2654# 2654
2656# 2656 2658# 2658 2663# 2663 2665# 2665 2670# 2670 2672# 2672 2674# 2674
2679# 2679 2681# 2681 2683# 2683 2685# 2685 2687# 2687 2689# 2689 2691# 2691
2693# 2693 2695# 2695 2700# 2700 2702# 2702 2704# 2704 2706# 2706 2708# 2708
2710# 2710 2712# 2712 2714# 2714 2716# 2716 2847# 2847 2849# 2849 2851# 2851
2856# 2856 2858# 2858 2860# 2860 2862# 2862 2864# 2864 2866# 2866 2871# 2871
2873# 2873 2875# 2875 2877# 2877 2879# 2879 2881# 2881 2886# 2886 2888# 2888
2890# 2890 2892# 2892 2894# 2894 2896# 2896 2898# 2898 2903# 2903 2905# 2905
2907# 2907 2909# 2909 2911# 2911 2913# 2913 2915# 2915 2917# 2917 2919# 2919
2924# 2924 2926# 2926 2928# 2928 2930# 2930 2932# 2932 2934# 2934 2936# 2936
2938# 2938 2940# 2940 3053# 3053 3055# 3055 3057# 3057 3062# 3062 3064# 3064
3066# 3066 3068# 3068 3070# 3070 3072# 3072 3074# 3074 3076# 3076 3081# 3081
3083# 3083 3085# 3085 3087# 3087 3089# 3089 3091# 3091 3093# 3093 3095# 3095 SEQ 1608
3097# 3097 3102# 3102 3104# 3104 3106# 3106 3108# 3108 3110# 3110 3112# 3112
3114# 3114 3116# 3116 3118# 3118 3224# 3224 3226# 3226 3228# 3228 3230# 3230
3232# 3232 3234# 3234 3236# 3236 3238# 3238 3243# 3243 3245# 3245 3247# 3247
3249# 3249 3251# 3251 3253# 3253 3258# 3258 3260# 3260 3262# 3262 3264# 3264
3266# 3266 3268# 3268 3273# 3273 3275# 3275 3277# 3277 3279# 3279 3281# 3281
3283# 3283 3285# 3285 3287# 3287 3289# 3289 3294# 3294 3296# 3296 3298# 3298
3300# 3300 3302# 3302 3304# 3304 3306# 3306 3308# 3308 3310# 3310 3416# 3416
3418# 3418 3420# 3420 3422# 3422 3424# 3424 3426# 3426 3428# 3428 3430# 3430
3435# 3435 3437# 3437 3439# 3439 3441# 3441 3443# 3443 3445# 3445 3450# 3450
3452# 3452 3454# 3454 3456# 3456 3458# 3458 3460# 3460 3465# 3465 3467# 3467
3469# 3469 3471# 3471 3473# 3473 3475# 3475 3477# 3477 3479# 3479 3481# 3481
3486# 3486 3488# 3488 3490# 3490 3492# 3492 3494# 3494 3496# 3496 3498# 3498
3500# 3500 3502# 3502 3608# 3608 3610# 3610 3612# 3612 3614# 3614 3616# 3616
3618# 3618 3620# 3620 3622# 3622 3627# 3627 3629# 3629 3631# 3631 3633# 3633
3635# 3635 3637# 3637 3642# 3642 3644# 3644 3646# 3646 3648# 3648 3650# 3650
3652# 3652 3657# 3657 3659# 3659 3661# 3661 3663# 3663 3665# 3665 3667# 3667
3669# 3669 3671# 3671 3673# 3673 3678# 3678 3680# 3680 3682# 3682 3684# 3684
3686# 3686 3688# 3688 3690# 3690 3692# 3692 3694# 3694 3838# 3838 3840# 3840
3842# 3842 3847# 3847 3849# 3849 3851# 3851 3856# 3856 3858# 3858 3860# 3860
3862# 3862 3864# 3864 3869# 3869 3871# 3871 3873# 3873 3875# 3875 3877# 3877
3879# 3879 3881# 3881 3883# 3883 3885# 3885 3890# 3890 3892# 3892 3894# 3894
3896# 3896 3898# 3898 3900# 3900 3902# 3902 3904# 3904 3906# 3906 4042# 4042
4044# 4044 4046# 4046 4051# 4051 4053# 4053 4055# 4055 4057# 4057 4062# 4062
4064# 4064 4066# 4066 4068# 4068 4073# 4073 4075# 4075 4077# 4077 4079# 4079
4081# 4081 4083# 4083 4085# 4085 4087# 4087 4089# 4089 4094# 4094 4096# 4096
4098# 4098 4100# 4100 4102# 4102 4104# 4104 4106# 4106 4108# 4108 4110# 4110
4234# 4234 4236# 4236 4238# 4238 4243# 4243 4245# 4245 4247# 4247 4252# 4252
4254# 4254 4256# 4256 4261# 4261 4263# 4263 4265# 4265 4270# 4270 4272# 4272
4274# 4274 4276# 4276 4278# 4278 4280# 4280 4282# 4282 4284# 4284 4286# 4286
4291# 4291 4293# 4293 4295# 4295 4297# 4297 4299# 4299 4301# 4301 4303# 4303
4305# 4305 4307# 4307 4471# 4471 4473# 4473 4475# 4475 4481# 4481 4483# 4483
4485# 4485 4487# 4487 4493# 4493 4495# 4495 4497# 4497 4499# 4499 4504# 4504
4506# 4506 4508# 4508 4510# 4510 4512# 4512 4517# 4517 4519# 4519 4521# 4521
4523# 4523 4525# 4525 4530# 4530 4532# 4532 4534# 4534 4539# 4539 4541# 4541
4543# 4543 4545# 4545 4547# 4547 4549# 4549 4551# 4551 4553# 4553 4555# 4555
4557# 4557 4559# 4559 4561# 4561 4563# 4563 4568# 4568 4570# 4570 4572# 4572
4574# 4574 4576# 4576 4578# 4578 4580# 4580 4582# 4582 4584# 4584 4589# 4589
4591# 4591 4593# 4593 4595# 4595 4597# 4597 4599# 4599 4601# 4601 4603# 4603
4605# 4605 4765# 4765 4767# 4767 4769# 4769 4775# 4775 4777# 4777 4779# 4779
4781# 4781 4783# 4783 4785# 4785 4787# 4787 4789# 4789 4791# 4791 4793# 4793
4798# 4798 4800# 4800 4802# 4802 4804# 4804 4809# 4809 4811# 4811 4813# 4813
4815# 4815 4817# 4817 4819# 4819 4821# 4821 4823# 4823 4825# 4825 4830# 4830
4832# 4832 4834# 4834 4836# 4836 4838# 4838 4840# 4840 4842# 4842 4844# 4844
4846# 4846 5047# 5047 5049# 5049 5051# 5051 5057# 5057 5059# 5059 5061# 5061
5063# 5063 5065# 5065 5067# 5067 5069# 5069 5071# 5071 5078# 5078 5080# 5080
5082# 5082 5084# 5084 5086# 5086 5088# 5088 5090# 5090 5092# 5092 5097# 5097
5099# 5099 5101# 5101 5103# 5103 5109# 5109 5111# 5111 5113# 5113 5115# 5115
5117# 5117 5123# 5123 5125# 5125 5127# 5127 5129# 5129 5131# 5131 5136# 5136
5138# 5138 5140# 5140 5142# 5142 5144# 5144 5146# 5146 5148# 5148 5150# 5150
5152# 5152 5157# 5157 5159# 5159 5161# 5161 5163# 5163 5165# 5165 5167# 5167
5169# 5169 5171# 5171 5173# 5173 5323# 5323 5325# 5325 5327# 5327 5329# 5329
5331# 5331 5336# 5336 5338# 5338 5340# 5340 5342# 5342 5344# 5344 5346# 5346
5348# 5348 5350# 5350 5352# 5352 5354# 5354 5359# 5359 5361# 5361 5363# 5363 SEQ 1609
5365# 5365 5367# 5367 5369# 5369 5371# 5371 5373# 5373 5378# 5378 5380# 5380
5382# 5382 5384# 5384 5386# 5386 5388# 5388 5390# 5390 5392# 5392 5397# 5397
5399# 5399 5401# 5401 5403# 5403 5405# 5405 5407# 5407 5412# 5412 5414# 5414
5419# 5419 5421# 5421 5423# 5423 5425# 5425 5427# 5427 5429# 5429 5431# 5431
5433# 5433 5435# 5435 5440# 5440 5442# 5442 5444# 5444 5446# 5446 5448# 5448
5450# 5450 5452# 5452 5454# 5454 5456# 5456 5594# 5594 5596# 5596 5598# 5598
5600# 5600 5605# 5605 5607# 5607 5609# 5609 5611# 5611 5613# 5613 5615# 5615
5620# 5620 5622# 5622 5624# 5624 5626# 5626 5628# 5628 5630# 5630 5635# 5635
5637# 5637 5639# 5639 5641# 5641 5643# 5643 5645# 5645 5647# 5647 5652# 5652
5654# 5654 5656# 5656 5658# 5658 5660# 5660 5662# 5662 5664# 5664 5666# 5666
5668# 5668 5673# 5673 5675# 5675 5677# 5677 5679# 5679 5681# 5681 5683# 5683
5685# 5685 5687# 5687 5689# 5689 5810# 5810 5812# 5812 5814# 5814 5817# 5817
5819# 5819 5821# 5821 5940# 5940 5945# 5945 5947# 5947 5949# 5949 5951# 5951
5953# 5953 5955# 5955 5957# 5957 5959# 5959 5961# 5961 5963# 5963 5965# 5965
5967# 5967 5969# 5969 5971# 5971 5973# 5973 5975# 5975 5977# 5977 5979# 5979
5981# 5981 5983# 5983 5985# 5985 5987# 5987 5989# 5989 5991# 5991 5993# 5993
5995# 5995 5997# 5997 5999# 5999 6001# 6001 6003# 6003 6005# 6005 6007# 6007
6009# 6009 6011# 6011 6013# 6013 6015# 6015 6017# 6017 6019# 6019 6021# 6021
6023# 6023 6025# 6025 6027# 6027 6029# 6029 6031# 6031 6033# 6033 6035# 6035
6037# 6037 6039# 6039 6041# 6041 6043# 6043 6045# 6045 6047# 6047 6049# 6049
6051# 6051 6053# 6053 6055# 6055 6057# 6057 6059# 6059 6061# 6061 6063# 6063
6065# 6065 6067# 6067 6069# 6069 6071# 6071 6073# 6073 6075# 6075 6077# 6077
6079# 6079 6081# 6081 6083# 6083 6085# 6085 6087# 6087 6089# 6089 6091# 6091
6093# 6093 6095# 6095 6097# 6097 6099# 6099 6101# 6101 6103# 6103 6105# 6105
6107# 6107 6109# 6109 6111# 6111 6113# 6113 6115# 6115 6117# 6117 6119# 6119
6121# 6121 6123# 6123 6125# 6125 6127# 6127 6129# 6129 6131# 6131 6133# 6133
6135# 6135 6137# 6137 6139# 6139 6141# 6141 6143# 6143 6145# 6145 6147# 6147
6149# 6149 6151# 6151 6153# 6153 6155# 6155 6157# 6157 6159# 6159 6161# 6161
6163# 6163 6165# 6165 6167# 6167 6172# 6172 6180# 6180 6182# 6182 6184# 6184
6186# 6186 6188# 6188 6193# 6193 6195# 6195 6197# 6197 6199# 6199 6201# 6201
6203# 6203 6205# 6205 6207# 6207 6209# 6209 6211# 6211 6213# 6213 6215# 6215
6217# 6217 6219# 6219 6221# 6221 6223# 6223 6225# 6225 6227# 6227 6229# 6229
6231# 6231 6233# 6233 6235# 6235 6237# 6237 6239# 6239 6241# 6241 6243# 6243
6245# 6245 6247# 6247 6249# 6249 6251# 6251 6253# 6253 6255# 6255 6257# 6257
6262# 6262 6264# 6264 6266# 6266 6268# 6268 6271# 6271 6273# 6273 6275# 6275
6277# 6277 6280# 6280 6282# 6282 6284# 6284 6286# 6286 6289# 6289 6291# 6291
6293# 6293 6295# 6295 6298# 6298 6300# 6300 6302# 6302 6304# 6304 6307# 6307
6309# 6309 6311# 6311 6313# 6313 6316# 6316 6318# 6318 6320# 6320 6322# 6322
6325# 6325 6327# 6327 6329# 6329 6331# 6331 6334# 6334 6336# 6336 6338# 6338
6340# 6340 6343# 6343 6345# 6345 6347# 6347 6349# 6349 6352# 6352 6354# 6354
6356# 6356 6358# 6358 6361# 6361 6363# 6363 6365# 6365 6367# 6367 6370# 6370
6372# 6372 6374# 6374 6376# 6376 6379# 6379 6381# 6381 6383# 6383 6385# 6385
6388# 6388 6390# 6390 6392# 6392 6394# 6394 6397# 6397 6399# 6399 6401# 6401
6403# 6403 6406# 6406 6408# 6408 6410# 6410 6412# 6412 6415# 6415 6417# 6417
6419# 6419 6421# 6421 6424# 6424 6426# 6426 6428# 6428 6430# 6430 6433# 6433
6435# 6435 6437# 6437 6439# 6439 6442# 6442 6444# 6444 6446# 6446 6448# 6448
6451# 6451 6453# 6453 6455# 6455 6457# 6457 6460# 6460 6462# 6462 6464# 6464
6466# 6466 6469# 6469 6471# 6471 6473# 6473 6475# 6475 6478# 6478 6480# 6480
6482# 6482 6484# 6484 6487# 6487 6489# 6489 6491# 6491 6493# 6493 6496# 6496
6498# 6498 6500# 6500 6502# 6502 6505# 6505 6507# 6507 6509# 6509 6511# 6511
6514# 6514 6516# 6516 6518# 6518 6520# 6520 6523# 6523 6525# 6525 6527# 6527
6529# 6529 6532# 6532 6534# 6534 6536# 6536 6538# 6538 6541# 6541 6543# 6543
6545# 6545 6547# 6547 6550# 6550 6740# 6740 6742# 6742 6744# 6744 6746# 6746 SEQ 1610
6752# 6752 6754# 6754 6840# 6840 6842# 6842 6844# 6844 6846# 6846 6851# 6851
6853# 6853 6858# 6858 6860# 6860 6862# 6862 6864# 6864 6866# 6866 6960# 6960
6962# 6962 6964# 6964 6966# 6966 6968# 6968
MWORD 1212 1214 1216 1219 1221 1223 1226 1228 1230 1233 1235 1237 1327 1329
1331 1423 1425 1427 1430 1432 1434 1437 1439 1441 1444 1446 1448 1451
1453 1455 1458 1460 1462 1465 1467 1469 1472 1474 1476 1563 1565 1567
1570 1572 1574 1577 1579 1581 1748 1750 1752 1757 1759 1761 1763 1768
1770 1772 1774 1779 1781 1783 1785 1787 1789 1791 1796 1798 1800 1802
1804 1806 1808 1813 1815 1817 1819 1821 1823 1825 1830 1832 1837 1839
1841 1843 1845 1847 1849 1851 1853 1858 1860 1862 1864 1866 1868 1870
1872 1874 2025 2027 2029 2034 2036 2038 2043 2045 2047 2049 2051 2053
2058 2060 2062 2064 2066 2068 2070 2076 2078 2080 2082 2084 2086 2088
2090 2095 2097 2099 2101 2103 2105 2107 2109 2111 2116 2118 2120 2122
2124 2126 2128 2130 2132 2247 2249 2251 2253 2255 2257 2259 2261 2263
2265 2267 2269 2271 2273 2275 2277 2279 2281 2283 2285 2287 2289 2291
2293 2295 2297 2299 2301 2303 2305 2307 2309 2311 2313 2315 2317 2319
2321 2326 2328 2330 2335 2337 2339 2341 2346 2348 2350 2355 2357 2359
2364 2366 2368 2373 2375 2377 2382 2384 2386 2391 2393 2395 2400 2402
2404 2409 2411 2413 2418 2420 2422 2427 2429 2431 2436 2438 2440 2445
2447 2449 2454 2456 2458 2463 2465 2467 2472 2474 2476 2481 2483 2485
2490 2492 2494 2499 2501 2503 2508 2510 2512 2517 2519 2521 2526 2528
2530 2535 2537 2539 2544 2546 2548 2553 2555 2557 2562 2564 2566 2571
2573 2575 2580 2582 2584 2589 2591 2593 2598 2600 2602 2607 2609 2611
2616 2618 2620 2625 2627 2629 2634 2636 2638 2643 2645 2647 2652 2654
2656 2658 2663 2665 2670 2672 2674 2679 2681 2683 2685 2687 2689 2691
2693 2695 2700 2702 2704 2706 2708 2710 2712 2714 2716 2847 2849 2851
2856 2858 2860 2862 2864 2866 2871 2873 2875 2877 2879 2881 2886 2888
2890 2892 2894 2896 2898 2903 2905 2907 2909 2911 2913 2915 2917 2919
2924 2926 2928 2930 2932 2934 2936 2938 2940 3053 3055 3057 3062 3064
3066 3068 3070 3072 3074 3076 3081 3083 3085 3087 3089 3091 3093 3095
3097 3102 3104 3106 3108 3110 3112 3114 3116 3118 3224 3226 3228 3230
3232 3234 3236 3238 3243 3245 3247 3249 3251 3253 3258 3260 3262 3264
3266 3268 3273 3275 3277 3279 3281 3283 3285 3287 3289 3294 3296 3298
3300 3302 3304 3306 3308 3310 3416 3418 3420 3422 3424 3426 3428 3430
3435 3437 3439 3441 3443 3445 3450 3452 3454 3456 3458 3460 3465 3467
3469 3471 3473 3475 3477 3479 3481 3486 3488 3490 3492 3494 3496 3498
3500 3502 3608 3610 3612 3614 3616 3618 3620 3622 3627 3629 3631 3633
3635 3637 3642 3644 3646 3648 3650 3652 3657 3659 3661 3663 3665 3667
3669 3671 3673 3678 3680 3682 3684 3686 3688 3690 3692 3694 3838 3840
3842 3847 3849 3851 3856 3858 3860 3862 3864 3869 3871 3873 3875 3877
3879 3881 3883 3885 3890 3892 3894 3896 3898 3900 3902 3904 3906 4042
4044 4046 4051 4053 4055 4057 4062 4064 4066 4068 4073 4075 4077 4079
4081 4083 4085 4087 4089 4094 4096 4098 4100 4102 4104 4106 4108 4110
4234 4236 4238 4243 4245 4247 4252 4254 4256 4261 4263 4265 4270 4272
4274 4276 4278 4280 4282 4284 4286 4291 4293 4295 4297 4299 4301 4303
4305 4307 4471 4473 4475 4481 4483 4485 4487 4493 4495 4497 4499 4504
4506 4508 4510 4512 4517 4519 4521 4523 4525 4530 4532 4534 4539 4541
4543 4545 4547 4549 4551 4553 4555 4557 4559 4561 4563 4568 4570 4572
4574 4576 4578 4580 4582 4584 4589 4591 4593 4595 4597 4599 4601 4603
4605 4765 4767 4769 4775 4777 4779 4781 4783 4785 4787 4789 4791 4793
4798 4800 4802 4804 4809 4811 4813 4815 4817 4819 4821 4823 4825 4830
4832 4834 4836 4838 4840 4842 4844 4846 5047 5049 5051 5057 5059 5061
5063 5065 5067 5069 5071 5078 5080 5082 5084 5086 5088 5090 5092 5097 SEQ 1611
5099 5101 5103 5109 5111 5113 5115 5117 5123 5125 5127 5129 5131 5136
5138 5140 5142 5144 5146 5148 5150 5152 5157 5159 5161 5163 5165 5167
5169 5171 5173 5323 5325 5327 5329 5331 5336 5338 5340 5342 5344 5346
5348 5350 5352 5354 5359 5361 5363 5365 5367 5369 5371 5373 5378 5380
5382 5384 5386 5388 5390 5392 5397 5399 5401 5403 5405 5407 5412 5414
5419 5421 5423 5425 5427 5429 5431 5433 5435 5440 5442 5444 5446 5448
5450 5452 5454 5456 5594 5596 5598 5600 5605 5607 5609 5611 5613 5615
5620 5622 5624 5626 5628 5630 5635 5637 5639 5641 5643 5645 5647 5652
5654 5656 5658 5660 5662 5664 5666 5668 5673 5675 5677 5679 5681 5683
5685 5687 5689 5810 5812 5814 5817 5819 5821 5940 5945 5947 5949 5951
5953 5955 5957 5959 5961 5963 5965 5967 5969 5971 5973 5975 5977 5979
5981 5983 5985 5987 5989 5991 5993 5995 5997 5999 6001 6003 6005 6007
6009 6011 6013 6015 6017 6019 6021 6023 6025 6027 6029 6031 6033 6035
6037 6039 6041 6043 6045 6047 6049 6051 6053 6055 6057 6059 6061 6063
6065 6067 6069 6071 6073 6075 6077 6079 6081 6083 6085 6087 6089 6091
6093 6095 6097 6099 6101 6103 6105 6107 6109 6111 6113 6115 6117 6119
6121 6123 6125 6127 6129 6131 6133 6135 6137 6139 6141 6143 6145 6147
6149 6151 6153 6155 6157 6159 6161 6163 6165 6167 6172 6180 6182 6184
6186 6188 6193 6195 6197 6199 6201 6203 6205 6207 6209 6211 6213 6215
6217 6219 6221 6223 6225 6227 6229 6231 6233 6235 6237 6239 6241 6243
6245 6247 6249 6251 6253 6255 6257 6262 6264 6266 6268 6271 6273 6275
6277 6280 6282 6284 6286 6289 6291 6293 6295 6298 6300 6302 6304 6307
6309 6311 6313 6316 6318 6320 6322 6325 6327 6329 6331 6334 6336 6338
6340 6343 6345 6347 6349 6352 6354 6356 6358 6361 6363 6365 6367 6370
6372 6374 6376 6379 6381 6383 6385 6388 6390 6392 6394 6397 6399 6401
6403 6406 6408 6410 6412 6415 6417 6419 6421 6424 6426 6428 6430 6433
6435 6437 6439 6442 6444 6446 6448 6451 6453 6455 6457 6460 6462 6464
6466 6469 6471 6473 6475 6478 6480 6482 6484 6487 6489 6491 6493 6496
6498 6500 6502 6505 6507 6509 6511 6514 6516 6518 6520 6523 6525 6527
6529 6532 6534 6536 6538 6541 6543 6545 6547 6550 6740 6742 6744 6746
6752 6754 6840 6842 6844 6846 6851 6853 6858 6860 6862 6864 6866 6960
6962 6964 6966 6968
PNT3 5030 5039
PNT4 496 616 733 737 740 982 986 989 5920 6733 7125 7156 7162
PNTDEC 744 993
PNTHW 2241 5927 5933
PNTMSG 499 501 619 621 721 731 735 738 741 745 970 980 984 987
990 994 1737 1738 1739 1740 1741 1742 2012 2013 2014 2015 2017 2019
2237 2239 2242 2838 2839 2840 2841 3046 3047 3217 3218 3409 3410 3601
3602 3828 3829 3830 3831 3832 4033 4034 4036 4225 4226 4227 4228 4457
4459 4461 4463 4465 4732 4734 4735 4740 4742 4744 4746 4748 4750 4752
4754 4756 4758 5006 5023 5025 5031 5034 5040 5313 5314 5315 5316 5585
5586 5587 5588 5802 5805 5913 5915 5923 5925 5929 5931 6730 6731 6735
7092 7122 7128 7130 7132 7134 7138 7140 7152 7154 7158 7160 7191 7201
7202 7204 7206 7207 7222 7232 7233 7235 7237 7238
PNTOCS 5804 7176
PUT 669 918 6645 7169 7171
RGET 7178
RPUT 7169
RTN 131 294 382 484 502 604 622 711 727 734 746 960 976 983
995 1160 1196 1278 1314 1370 1404 1514 1548 1632 1658 1713 1725 1735
1925 1951 1996 2000 2010 2180 2206 2223 2228 2238 2243 2765 2791 2826
2836 2987 3013 3034 3044 3164 3190 3215 3356 3382 3407 3548 3574 3599 SEQ 1612
3744 3770 3813 3816 3826 3954 3980 4010 4016 4021 4031 4159 4185 4223
4359 4391 4445 4455 4653 4679 4720 4730 4739 4759 4895 4921 5004 5032
5041 5221 5255 5301 5311 5502 5528 5573 5583 5733 5758 5774 5795 5806
5868 5890 5934 6606 6617 6704 6721 6736 6795 6820 6907 6932 6945 6951
7082 7098 7113 7143 7163 7180 7197 7212 7228 7243
SCOPER 119 282 372 450 471 567 591 698 947 1183 1301 1391 1535 1651
1944 2199 2784 3006 3183 3375 3567 3763 3973 4178 4384 4672 4914 5248
5521 5751 5884 6610 6813 6925 7043 7069
STABLE 6936 6937 6938 6939 6940 6941
TMSG 499 501 619 621 741 745 990 994 1737 1738 1739 1740 1741 1742
2012 2013 2014 2015 2016 2018 2237 2239 2242 2838 2839 2840 2841 3046
3047 3217 3218 3409 3410 3601 3602 3828 3829 3830 3831 3832 4033 4034
4035 4225 4226 4227 4228 4457 4458 4460 4462 4464 4732 4733 4735 4742
4744 4746 4748 4750 4752 4754 4756 4758 5006 5023 5025 5034 5313 5314
5315 5316 5585 5586 5587 5588 5923 6735 7128 7130
TMSGC 721 731 735 738 970 980 984 987 4740 5031 5040 5802 5805 5913
5915 5925 5929 5931 6730 6731 7092 7122 7132 7134 7138 7140 7152 7154
7158 7160 7191 7201 7204 7207 7222 7232 7235 7238
TTABLE 1664 1665 1666 1667 1671 1672 1673 1674 1678 1679 1680 1681 1686 1687
1688 1689 1693 1694 1695 1696 1700 1701 1702 1703 1704 1957 1958 1959
1963 1964 1965 1969 1970 1971 1976 1977 1978 1982 1983 1984 1985 1989
1990 1991 1992 1993 2210 2211 2212 2213 2214 2797 2798 2799 2803 2804
2805 2809 2810 2811 2812 2817 2818 2820 3019 3020 3021 3025 3026 3027
3028 3196 3197 3198 3202 3203 3204 3205 3388 3389 3390 3394 3395 3396
3397 3580 3581 3582 3586 3587 3588 3589 3776 3777 3778 3782 3783 3784
3785 3789 3790 3791 3792 3797 3798 3799 3800 3804 3805 3806 3807 3808
3986 3987 3988 3992 3993 3994 3995 3996 4000 4001 4002 4003 4004 4191
4192 4193 4197 4198 4199 4203 4204 4205 4210 4211 4212 4213 4397 4398
4399 4404 4405 4406 4407 4413 4414 4415 4416 4420 4421 4422 4423 4427
4428 4429 4430 4431 4685 4686 4687 4691 4692 4693 4694 4698 4699 4700
4927 4928 4929 4934 4935 4936 4937 4938 4939 4940 4941 4942 4943 4944
4945 4946 4947 4948 4950 4951 4952 4953 4954 4955 4956 4957 4958 4964
4965 4966 4967 4968 4969 4970 4971 4972 4973 4974 4975 4976 4977 4978
4979 4980 4981 4982 4983 4984 4985 4986 4987 4991 4992 4993 4994 5261
5262 5263 5264 5268 5269 5270 5271 5276 5277 5278 5279 5283 5284 5285
5286 5287 5534 5535 5536 5537 5541 5542 5543 5544 5548 5549 5550 5551
5555 5556 5557 5558 5559
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 1
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1613
1 SUBTTL CBUS MODULE TESTS
2
3 SALL
4
5 SEARCH DFPTA,MONSYM
6
7 ; INTERN's
8
9 ENTRY TSTC1,TSTC2,TSTC3,TSTC4,TSTC5,TSTC6,TSTC7,TSTC10
10 ENTRY TSTC11,TSTC12,TSTC13,TSTC14,TSTC15,TSTC16,TSTC17,TSTC20
11 ENTRY TSTC21,TSTC22,TSTC23,TSTC24,TSTC25,TSTC26,TSTC27,TSTC30
12 ENTRY TSTC31,TSTC32,TSTC33,TSTC34,TSTC35,TSTC36,TSTC37
13
14 ; EXTERN's
15
16 EXTERN TSTC40,TSTC41
17
18 ; EXTERN's located in DFPTA1.MAC (Mainline code..)
19
20 EXTERN UDEBUG,BUFF,CBUF,TLOAD,CSRPNT,TRACE,TSTSUB,ODELAY,TSLOD1,TSLOD2
21 EXTERN BEXEC,BBPNT,TEXEC,TTPNT,TEBUFC,TEBUFA,UDEBUG,PORTCI,PORTNI
22 EXTERN CEXEC,CCPNT,CPAT,CSTATF,CEBUFA,CDERR,CLEN
23
24 ; EXTERN's located in DFPTAI.MAC (Port Device Handling Routines module)
25
26 EXTERN LDRAR,LDCSR,RDEBUF,RDCSR,IPACLR,IPASRT,SNEXT,SDATA
27 EXTERN CHINIT,GENCCW
28
29 ; EXTERN's located in DFPTAU.MAC (Utility Routines module)
30
31 EXTERN PATBUF,BUFCOM,SCOSW,BUFGEN
32
33
34 ;#********************************************************************
35 ; Z9 - Address for use in DDT
36 ;#********************************************************************
37
38 000000' Z9: ; address of 00000'
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 2
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1614
39
40 ;#********************************************************************
41 ;* Test 1 - Fmtr Data Loopback
42 ;
43 ; Description: This test does simple data loopback over the MBUS
44 ; through the CBUF, through the Fmtr, through the
45 ; CMUX and back to the MBUS.
46 ;
47 ; Procedure: Port Clear
48 ; Set RAR to 0
49 ; Execute single steps
50 ; Read EBUF, verify data is correct
51 ;
52 ; Repeat with each data pattern:
53 ; 0's
54 ; 1's
55 ; floating 1's
56 ; floating 0's
57 ;
58 ; Failure: ---
59 ;#********************************************************************
60
61 ; Test data
62
63 000000' 254 00 0 00 000011' TSTC1: JRST TG1 ; go start test
64 000001' 110604 000001 CBUS!MBUS!NDMP!NDCB!ZCBUS!1 ; test mask
65 000002' 000152' 012703' T1M,,[ASCIZ ^Fmtr Data Loopback^]
66 000003' 012707' 012713' [EXP C20,C18,C23,MLAST!C24],,[EXP C12,C8,C3,C4,MLAST!C2]
67 000004' 000000 000637' TSTC2 ; failure test table
68 000005' 000000 003034' TSTC11 ; ...
69 000006' 000000 001044' TSTC3
70 000007' 000000 001152' TSTC4
71 000010' 777777 777777 -1
72
73 ; Start test
74
75 000011' 201 00 0 00 000000' TG1: MOVEI Z9 ; get address of module start
76 000012' 260 17 0 00 000000* GO TRACE ; handle trace output
77 000013' 201 01 0 00 000152' MOVEI 1,T1M ; set up microcode address
78 000014' 260 17 0 00 000000* GO TLOAD ; load/verify it
79 000015' 263 17 0 00 000000 RTN ; failed - exit test
80
81 ; Initialization
82
83 000016' 400 15 0 00 000000 TL1: SETZ ERFLG, ; clear error flag
84 000017' 260 17 0 00 000000* GO IPACLR ; clear port
85 000020' 402 00 0 00 000000* SETZM TSTSUB ; initialize subtest number
86 000021' 201 06 0 00 000033' MOVEI 6,TS1 ; get sstep table address
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 3
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1615
87
88 ; Loop on single step table entries
89
90 000022' 260 17 0 00 000000* TA1: GO BEXEC ; execute table entry
91 000023' 254 00 0 00 000032' JRST TX1 ; end of sstep table
92 000024' 254 00 0 00 000022' JRST TA1 ; keep looping after call
93 000025' 474 15 0 00 000000 SETO ERFLG, ; error - EBUF data incorrect
94
95 ; Handle error printouts and scope looping
96
97 000026' 027 00 0 00 000150' SCOPER MA1 ; print error message
98 000027' 254 00 0 00 000016' JRST TL1 ; loop on error
99 000030' 254 00 0 00 000032' JRST TX1 ; altmode exit
100 000031' 322 15 0 00 000022' JUMPE ERFLG,TA1 ; do next sstep table entry
101
102 ; End of test
103
104 000032' 263 17 0 00 000000 TX1: RTN ; return
105
106 ; Sstep table, with EBUF data, as: (CMD,#Steps,Start addr,End Addr,EBUF data)
107
108 000033' 100600 005004 TS1: ATABLE (SSSTRT,6,0,5004,-1)
109 000034' 777777 777777
110 000035' 100600 015004 ATABLE (SSSTRT,6,1,5004,1)
111 000036' 000000 000001
112 000037' 101000 025004 ATABLE (SSSTRT,^D8,2,5004,2)
113 000040' 000000 000002
114 000041' 101100 035004 ATABLE (SSSTRT,^D9,3,5004,4)
115 000042' 000000 000004
116 000043' 101200 045004 ATABLE (SSSTRT,^D10,4,5004,10)
117 000044' 000000 000010
118 000045' 101300 055004 ATABLE (SSSTRT,^D11,5,5004,20)
119 000046' 000000 000020
120 000047' 101400 065004 ATABLE (SSSTRT,^D12,6,5004,40)
121 000050' 000000 000040
122 000051' 101500 075004 ATABLE (SSSTRT,^D13,7,5004,100)
123 000052' 000000 000100
124 000053' 101600 105004 ATABLE (SSSTRT,^D14,10,5004,200)
125 000054' 000000 000200
126 000055' 101700 115004 ATABLE (SSSTRT,^D15,11,5004,400)
127 000056' 000000 000400
128 000057' 102000 125004 ATABLE (SSSTRT,^D16,12,5004,1000)
129 000060' 000000 001000
130 000061' 102100 135004 ATABLE (SSSTRT,^D17,13,5004,2000)
131 000062' 000000 002000
132 000063' 102200 145004 ATABLE (SSSTRT,^D18,14,5004,4000)
133 000064' 000000 004000
134 000065' 102300 155004 ATABLE (SSSTRT,^D19,15,5004,10000)
135 000066' 000000 010000
136 000067' 102400 165004 ATABLE (SSSTRT,^D20,16,5004,20000)
137 000070' 000000 020000
138 000071' 102500 175004 ATABLE (SSSTRT,^D21,17,5004,40000)
139 000072' 000000 040000
140 000073' 102600 205004 ATABLE (SSSTRT,^D22,20,5004,100000)
141 000074' 000000 100000
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 3-1
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1616
142 000075' 102700 215004 ATABLE (SSSTRT,^D23,21,5004,200000)
143 000076' 000000 200000
144 000077' 103000 225004 ATABLE (SSSTRT,^D24,22,5004,400000)
145 000100' 000000 400000
146 000101' 103100 235004 ATABLE (SSSTRT,^D25,23,5004,1000000)
147 000102' 000001 000000
148 000103' 103200 245004 ATABLE (SSSTRT,^D26,24,5004,2000000)
149 000104' 000002 000000
150 000105' 103300 255004 ATABLE (SSSTRT,^D27,25,5004,4000000)
151 000106' 000004 000000
152 000107' 103400 265004 ATABLE (SSSTRT,^D28,26,5004,10000000)
153 000110' 000010 000000
154 000111' 103500 275004 ATABLE (SSSTRT,^D29,27,5004,20000000)
155 000112' 000020 000000
156 000113' 103600 305004 ATABLE (SSSTRT,^D30,30,5004,40000000)
157 000114' 000040 000000
158 000115' 103700 315004 ATABLE (SSSTRT,^D31,31,5004,100000000)
159 000116' 000100 000000
160 000117' 104000 325004 ATABLE (SSSTRT,^D32,32,5004,200000000)
161 000120' 000200 000000
162 000121' 104100 335004 ATABLE (SSSTRT,^D33,33,5004,400000000)
163 000122' 000400 000000
164 000123' 104200 345004 ATABLE (SSSTRT,^D34,34,5004,1000000000)
165 000124' 001000 000000
166 000125' 104300 355004 ATABLE (SSSTRT,^D35,35,5004,2000000000)
167 000126' 002000 000000
168 000127' 104400 365004 ATABLE (SSSTRT,^D36,36,5004,4000000000)
169 000130' 004000 000000
170 000131' 104500 375004 ATABLE (SSSTRT,^D37,37,5004,10000000000)
171 000132' 010000 000000
172 000133' 104600 405004 ATABLE (SSSTRT,^D38,40,5004,20000000000)
173 000134' 020000 000000
174 000135' 104700 415004 ATABLE (SSSTRT,^D39,41,5004,40000000000)
175 000136' 040000 000000
176 000137' 105000 425004 ATABLE (SSSTRT,^D40,42,5004,100000000000)
177 000140' 100000 000000
178 000141' 105100 435004 ATABLE (SSSTRT,^D41,43,5004,200000000000)
179 000142' 200000 000000
180 000143' 105000 445004 ATABLE (SSSTRT,^D40,44,5004,400000000000)
181 000144' 400000 000000
182 000145' 100500 455004 ATABLE (SSSTRT,5,45,5004,0)
183 000146' 000000 000000
184 000147' 000000 000000 ATABLE (SSLAST)
185
186 ; Error messages
187
188 000150' 140000 012720' MA1: MSG!TXNOT![ASCIZ /Data loopback through Fmtr failed (result in EBUF)/]
189 000151' 000000000000# LAST!CALL!TXALL!BBPNT ; print sequencer data
190
191 ; Microcode
192
193 000152' 000001 000000 T1M: MWORD <ADDR=0,JMAP,J=100> ; 0 - 1's
194 000153' 000000 000040
195 000154' 000102 000000 MWORD <JMAP,J=200> ; 1 - 1
196 000155' 000000 000040
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 3-2
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1617
197 000156' 000203 000000 MWORD <JMAP,J=300> ; 2 - 2
198 000157' 000000 000040
199 000160' 000304 000000 MWORD <JMAP,J=400> ; 3 - 4
200 000161' 000000 000040
201 000162' 000405 000000 MWORD <JMAP,J=500> ; 4 - 10
202 000163' 000000 000040
203 000164' 000506 000000 MWORD <JMAP,J=600> ; 5 - 20
204 000165' 000000 000040
205 000166' 000607 000000 MWORD <JMAP,J=700> ; 6 - 40
206 000167' 000000 000040
207 000170' 000710 000000 MWORD <JMAP,J=1000> ; 7 - 100
208 000171' 000000 000040
209 000172' 001011 000000 MWORD <JMAP,J=1100> ; 10 - 200
210 000173' 000000 000040
211 000174' 001112 000000 MWORD <JMAP,J=1200> ; 11 - 400
212 000175' 000000 000040
213 000176' 001213 000000 MWORD <JMAP,J=1300> ; 12 - 1000
214 000177' 000000 000040
215 000200' 001314 000000 MWORD <JMAP,J=1400> ; 13 - 2000
216 000201' 000000 000040
217 000202' 001415 000000 MWORD <JMAP,J=1500> ; 14 - 4000
218 000203' 000000 000040
219 000204' 001516 000000 MWORD <JMAP,J=1600> ; 15 - 10000
220 000205' 000000 000040
221 000206' 001617 000000 MWORD <JMAP,J=1700> ; 16 - 20000
222 000207' 000000 000040
223 000210' 001720 000000 MWORD <JMAP,J=2000> ; 17 - 40000
224 000211' 000000 000040
225 000212' 002021 000000 MWORD <JMAP,J=2100> ; 20 - 100000
226 000213' 000000 000040
227 000214' 002122 000000 MWORD <JMAP,J=2200> ; 21 - 200000
228 000215' 000000 000040
229 000216' 002223 000000 MWORD <JMAP,J=2300> ; 22 - 400000
230 000217' 000000 000040
231 000220' 002324 000000 MWORD <JMAP,J=2400> ; 23 - 1,,0
232 000221' 000000 000040
233 000222' 002425 000000 MWORD <JMAP,J=2500> ; 24 - 2,,0
234 000223' 000000 000040
235 000224' 002526 000000 MWORD <JMAP,J=2600> ; 25 - 4,,0
236 000225' 000000 000040
237 000226' 002627 000000 MWORD <JMAP,J=2700> ; 26 - 10,,0
238 000227' 000000 000040
239 000230' 002730 000000 MWORD <JMAP,J=3000> ; 27 - 20,,0
240 000231' 000000 000040
241 000232' 003031 000000 MWORD <JMAP,J=3100> ; 30 - 40,,0
242 000233' 000000 000040
243 000234' 003132 000000 MWORD <JMAP,J=3200> ; 31 - 100,,0
244 000235' 000000 000040
245 000236' 003233 000000 MWORD <JMAP,J=3300> ; 32 - 200,,0
246 000237' 000000 000040
247 000240' 003334 000000 MWORD <JMAP,J=3400> ; 33 - 400,,0
248 000241' 000000 000040
249 000242' 003435 000000 MWORD <JMAP,J=3500> ; 34 - 1000,,0
250 000243' 000000 000040
251 000244' 003536 000000 MWORD <JMAP,J=3600> ; 35 - 2000,,0
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 3-3
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1618
252 000245' 000000 000040
253 000246' 003637 000000 MWORD <JMAP,J=3700> ; 36 - 4000,,0
254 000247' 000000 000040
255 000250' 003740 000000 MWORD <JMAP,J=4000> ; 37 - 10000,,0
256 000251' 000000 000040
257 000252' 004041 000000 MWORD <JMAP,J=4100> ; 40 - 20000,,0
258 000253' 000000 000040
259 000254' 004142 000000 MWORD <JMAP,J=4200> ; 41 - 40000,,0
260 000255' 000000 000040
261 000256' 004243 000000 MWORD <JMAP,J=4300> ; 42 - 100000,,0
262 000257' 000000 000040
263 000260' 004344 000000 MWORD <JMAP,J=4400> ; 43 - 200000,,0
264 000261' 000000 000040
265 000262' 004445 000000 MWORD <JMAP,J=4500> ; 44 - 400000,,0
266 000263' 000000 000040
267 000264' 004546 000000 MWORD <JMAP,J=4600> ; 45 - 0's
268 000265' 000000 000040
269
270 ; Data pattern 1's
271
272 000266' 010000 000000 MWORD <ADDR=100,CONT,SD0,B=2,AND,D=2> ; 100
273 000267' 742001 000340
274 000270' 010150 010000 MWORD <JMAP,J=5001,SAB,A=2,B=2,XNOR,D=2> ; 101
275 000271' 172021 000040
276
277 ; Data pattern floating 1's - 1
278
279 000272' 020000 000000 MWORD <ADDR=200,CONT,SD0,B=2,AND,D=2> ; 200
280 000273' 742001 000340
281 000274' 020150 010000 MWORD <JMAP,J=5001,SAB,A=2,B=2,PLUS,CRY,D=2> ; 201
282 000275' 102021 000440
283
284 ; Data pattern floating 1's - 2
285
286 000276' 030000 000000 MWORD <ADDR=300,CONT,SD0,B=2,AND,D=2> ; 300
287 000277' 742001 000340
288 000300' 030100 000000 MWORD <LDCT,J=0,SAB,A=2,B=2,PLUS,CRY,D=2> ; 301
289 000301' 102021 000700
290 000302' 030250 000000 MWORD <JMAP,J=5000> ; 302
291 000303' 000000 000040
292
293 ; Data pattern floating 1's - 4
294
295 000304' 040000 000000 MWORD <ADDR=400,CONT,SD0,B=2,AND,D=2> ; 400
296 000305' 742001 000340
297 000306' 040100 010000 MWORD <LDCT,J=1,SAB,A=2,B=2,PLUS,CRY,D=2> ; 401
298 000307' 102021 000700
299 000310' 040250 000000 MWORD <JMAP,J=5000> ; 402
300 000311' 000000 000040
301
302 ; Data pattern floating 1's - 10
303
304 000312' 050000 000000 MWORD <ADDR=500,CONT,SD0,B=2,AND,D=2> ; 500
305 000313' 742001 000340
306 000314' 050100 020000 MWORD <LDCT,J=2,SAB,A=2,B=2,PLUS,CRY,D=2> ; 501
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 3-4
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1619
307 000315' 102021 000700
308 000316' 050250 000000 MWORD <JMAP,J=5000> ; 502
309 000317' 000000 000040
310
311 ; Data pattern floating 1's - 20
312
313 000320' 060000 000000 MWORD <ADDR=600,CONT,SD0,B=2,AND,D=2> ; 600
314 000321' 742001 000340
315 000322' 060100 030000 MWORD <LDCT,J=3,SAB,A=2,B=2,PLUS,CRY,D=2> ; 601
316 000323' 102021 000700
317 000324' 060250 000000 MWORD <JMAP,J=5000> ; 602
318 000325' 000000 000040
319
320 ; Data pattern floating 1's - 40
321
322 000326' 070000 000000 MWORD <ADDR=700,CONT,SD0,B=2,AND,D=2> ; 700
323 000327' 742001 000340
324 000330' 070100 040000 MWORD <LDCT,J=4,SAB,A=2,B=2,PLUS,CRY,D=2> ; 701
325 000331' 102021 000700
326 000332' 070250 000000 MWORD <JMAP,J=5000> ; 702
327 000333' 000000 000040
328
329 ; Data pattern floating 1's - 100
330
331 000334' 100000 000000 MWORD <ADDR=1000,CONT,SD0,B=2,AND,D=2> ; 1000
332 000335' 742001 000340
333 000336' 100100 050000 MWORD <LDCT,J=5,SAB,A=2,B=2,PLUS,CRY,D=2> ; 1001
334 000337' 102021 000700
335 000340' 100250 000000 MWORD <JMAP,J=5000> ; 1002
336 000341' 000000 000040
337
338 ; Data pattern floating 1's - 200
339
340 000342' 110000 000000 MWORD <ADDR=1100,CONT,SD0,B=2,AND,D=2> ; 1100
341 000343' 742001 000340
342 000344' 110100 060000 MWORD <LDCT,J=6,SAB,A=2,B=2,PLUS,CRY,D=2> ; 1101
343 000345' 102021 000700
344 000346' 110250 000000 MWORD <JMAP,J=5000> ; 1102
345 000347' 000000 000040
346
347 ; Data pattern floating 1's - 400
348
349 000350' 120000 000000 MWORD <ADDR=1200,CONT,SD0,B=2,AND,D=2> ; 1200
350 000351' 742001 000340
351 000352' 120100 070000 MWORD <LDCT,J=7,SAB,A=2,B=2,PLUS,CRY,D=2> ; 1201
352 000353' 102021 000700
353 000354' 120250 000000 MWORD <JMAP,J=5000> ; 1202
354 000355' 000000 000040
355
356 ; Data pattern floating 1's - 1000
357
358 000356' 130000 000000 MWORD <ADDR=1300,CONT,SD0,B=2,AND,D=2> ; 1300
359 000357' 742001 000340
360 000360' 130100 100000 MWORD <LDCT,J=10,SAB,A=2,B=2,PLUS,CRY,D=2> ; 1301
361 000361' 102021 000700
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 3-5
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1620
362 000362' 130250 000000 MWORD <JMAP,J=5000> ; 1302
363 000363' 000000 000040
364
365 ; Data pattern floating 1's - 2000
366
367 000364' 140000 000000 MWORD <ADDR=1400,CONT,SD0,B=2,AND,D=2> ; 1400
368 000365' 742001 000340
369 000366' 140100 110000 MWORD <LDCT,J=11,SAB,A=2,B=2,PLUS,CRY,D=2> ; 1401
370 000367' 102021 000700
371 000370' 140250 000000 MWORD <JMAP,J=5000> ; 1402
372 000371' 000000 000040
373
374 ; Data pattern floating 1's - 4000
375
376 000372' 150000 000000 MWORD <ADDR=1500,CONT,SD0,B=2,AND,D=2> ; 1500
377 000373' 742001 000340
378 000374' 150100 120000 MWORD <LDCT,J=12,SAB,A=2,B=2,PLUS,CRY,D=2> ; 1501
379 000375' 102021 000700
380 000376' 150250 000000 MWORD <JMAP,J=5000> ; 1502
381 000377' 000000 000040
382
383 ; Data pattern floating 1's - 10000
384
385 000400' 160000 000000 MWORD <ADDR=1600,CONT,SD0,B=2,AND,D=2> ; 1600
386 000401' 742001 000340
387 000402' 160100 130000 MWORD <LDCT,J=13,SAB,A=2,B=2,PLUS,CRY,D=2> ; 1601
388 000403' 102021 000700
389 000404' 160250 000000 MWORD <JMAP,J=5000> ; 1602
390 000405' 000000 000040
391
392 ; Data pattern floating 1's - 20000
393
394 000406' 170000 000000 MWORD <ADDR=1700,CONT,SD0,B=2,AND,D=2> ; 1700
395 000407' 742001 000340
396 000410' 170100 140000 MWORD <LDCT,J=14,SAB,A=2,B=2,PLUS,CRY,D=2> ; 1701
397 000411' 102021 000700
398 000412' 170250 000000 MWORD <JMAP,J=5000> ; 1702
399 000413' 000000 000040
400
401 ; Data pattern floating 1's - 40000
402
403 000414' 200000 000000 MWORD <ADDR=2000,CONT,SD0,B=2,AND,D=2> ; 2000
404 000415' 742001 000340
405 000416' 200100 150000 MWORD <LDCT,J=15,SAB,A=2,B=2,PLUS,CRY,D=2> ; 2001
406 000417' 102021 000700
407 000420' 200250 000000 MWORD <JMAP,J=5000> ; 2002
408 000421' 000000 000040
409
410 ; Data pattern floating 1's - 100000
411
412 000422' 210000 000000 MWORD <ADDR=2100,CONT,SD0,B=2,AND,D=2> ; 2100
413 000423' 742001 000340
414 000424' 210100 160000 MWORD <LDCT,J=16,SAB,A=2,B=2,PLUS,CRY,D=2> ; 2101
415 000425' 102021 000700
416 000426' 210250 000000 MWORD <JMAP,J=5000> ; 2102
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 3-6
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1621
417 000427' 000000 000040
418
419 ; Data pattern floating 1's - 200000
420
421 000430' 220000 000000 MWORD <ADDR=2200,CONT,SD0,B=2,AND,D=2> ; 2200
422 000431' 742001 000340
423 000432' 220100 170000 MWORD <LDCT,J=17,SAB,A=2,B=2,PLUS,CRY,D=2> ; 2201
424 000433' 102021 000700
425 000434' 220250 000000 MWORD <JMAP,J=5000> ; 2202
426 000435' 000000 000040
427
428 ; Data pattern floating 1's - 400000
429
430 000436' 230000 000000 MWORD <ADDR=2300,CONT,SD0,B=2,AND,D=2> ; 2300
431 000437' 742001 000340
432 000440' 230100 200000 MWORD <LDCT,J=20,SAB,A=2,B=2,PLUS,CRY,D=2> ; 2301
433 000441' 102021 000700
434 000442' 230250 000000 MWORD <JMAP,J=5000> ; 2302
435 000443' 000000 000040
436
437 ; Data pattern floating 1's - 1,,000000
438
439 000444' 240000 000000 MWORD <ADDR=2400,CONT,SD0,B=2,AND,D=2> ; 2400
440 000445' 742001 000340
441 000446' 240100 210000 MWORD <LDCT,J=21,SAB,A=2,B=2,PLUS,CRY,D=2> ; 2401
442 000447' 102021 000700
443 000450' 240250 000000 MWORD <JMAP,J=5000> ; 2402
444 000451' 000000 000040
445
446 ; Data pattern floating 1's - 2,,000000
447
448 000452' 250000 000000 MWORD <ADDR=2500,CONT,SD0,B=2,AND,D=2> ; 2500
449 000453' 742001 000340
450 000454' 250100 220000 MWORD <LDCT,J=22,SAB,A=2,B=2,PLUS,CRY,D=2> ; 2501
451 000455' 102021 000700
452 000456' 250250 000000 MWORD <JMAP,J=5000> ; 2502
453 000457' 000000 000040
454
455 ; Data pattern floating 1's - 4,,000000
456
457 000460' 260000 000000 MWORD <ADDR=2600,CONT,SD0,B=2,AND,D=2> ; 2600
458 000461' 742001 000340
459 000462' 260100 230000 MWORD <LDCT,J=23,SAB,A=2,B=2,PLUS,CRY,D=2> ; 2601
460 000463' 102021 000700
461 000464' 260250 000000 MWORD <JMAP,J=5000> ; 2602
462 000465' 000000 000040
463
464 ; Data pattern floating 1's - 10,,000000
465
466 000466' 270000 000000 MWORD <ADDR=2700,CONT,SD0,B=2,AND,D=2> ; 2700
467 000467' 742001 000340
468 000470' 270100 240000 MWORD <LDCT,J=24,SAB,A=2,B=2,PLUS,CRY,D=2> ; 2701
469 000471' 102021 000700
470 000472' 270250 000000 MWORD <JMAP,J=5000> ; 2702
471 000473' 000000 000040
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 3-7
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1622
472
473 ; Data pattern floating 1's - 20,,000000
474
475 000474' 300000 000000 MWORD <ADDR=3000,CONT,SD0,B=2,AND,D=2> ; 3000
476 000475' 742001 000340
477 000476' 300100 250000 MWORD <LDCT,J=25,SAB,A=2,B=2,PLUS,CRY,D=2> ; 3001
478 000477' 102021 000700
479 000500' 300250 000000 MWORD <JMAP,J=5000> ; 3002
480 000501' 000000 000040
481
482 ; Data pattern floating 1's - 40,,000000
483
484 000502' 310000 000000 MWORD <ADDR=3100,CONT,SD0,B=2,AND,D=2> ; 3100
485 000503' 742001 000340
486 000504' 310100 260000 MWORD <LDCT,J=26,SAB,A=2,B=2,PLUS,CRY,D=2> ; 3101
487 000505' 102021 000700
488 000506' 310250 000000 MWORD <JMAP,J=5000> ; 3102
489 000507' 000000 000040
490
491 ; Data pattern floating 1's - 100,,000000
492
493 000510' 320000 000000 MWORD <ADDR=3200,CONT,SD0,B=2,AND,D=2> ; 3200
494 000511' 742001 000340
495 000512' 320100 270000 MWORD <LDCT,J=27,SAB,A=2,B=2,PLUS,CRY,D=2> ; 3201
496 000513' 102021 000700
497 000514' 320250 000000 MWORD <JMAP,J=5000> ; 3202
498 000515' 000000 000040
499
500 ; Data pattern floating 1's - 200,,000000
501
502 000516' 330000 000000 MWORD <ADDR=3300,CONT,SD0,B=2,AND,D=2> ; 3300
503 000517' 742001 000340
504 000520' 330100 300000 MWORD <LDCT,J=30,SAB,A=2,B=2,PLUS,CRY,D=2> ; 3301
505 000521' 102021 000700
506 000522' 330250 000000 MWORD <JMAP,J=5000> ; 3302
507 000523' 000000 000040
508
509 ; Data pattern floating 1's - 400,,000000
510
511 000524' 340000 000000 MWORD <ADDR=3400,CONT,SD0,B=2,AND,D=2> ; 3400
512 000525' 742001 000340
513 000526' 340100 310000 MWORD <LDCT,J=31,SAB,A=2,B=2,PLUS,CRY,D=2> ; 3401
514 000527' 102021 000700
515 000530' 340250 000000 MWORD <JMAP,J=5000> ; 3402
516 000531' 000000 000040
517
518 ; Data pattern floating 1's - 1000,,000000
519
520 000532' 350000 000000 MWORD <ADDR=3500,CONT,SD0,B=2,AND,D=2> ; 3500
521 000533' 742001 000340
522 000534' 350100 320000 MWORD <LDCT,J=32,SAB,A=2,B=2,PLUS,CRY,D=2> ; 3501
523 000535' 102021 000700
524 000536' 350250 000000 MWORD <JMAP,J=5000> ; 3502
525 000537' 000000 000040
526
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 3-8
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1623
527 ; Data pattern floating 1's - 2000,,000000
528
529 000540' 360000 000000 MWORD <ADDR=3600,CONT,SD0,B=2,AND,D=2> ; 3600
530 000541' 742001 000340
531 000542' 360100 330000 MWORD <LDCT,J=33,SAB,A=2,B=2,PLUS,CRY,D=2> ; 3601
532 000543' 102021 000700
533 000544' 360250 000000 MWORD <JMAP,J=5000> ; 3602
534 000545' 000000 000040
535
536 ; Data pattern floating 1's - 4000,,000000
537
538 000546' 370000 000000 MWORD <ADDR=3700,CONT,SD0,B=2,AND,D=2> ; 3700
539 000547' 742001 000340
540 000550' 370100 340000 MWORD <LDCT,J=34,SAB,A=2,B=2,PLUS,CRY,D=2> ; 3701
541 000551' 102021 000700
542 000552' 370250 000000 MWORD <JMAP,J=5000> ; 3702
543 000553' 000000 000040
544
545 ; Data pattern floating 1's - 10000,,000000
546
547 000554' 400000 000000 MWORD <ADDR=4000,CONT,SD0,B=2,AND,D=2> ; 4000
548 000555' 742001 000340
549 000556' 400100 350000 MWORD <LDCT,J=35,SAB,A=2,B=2,PLUS,CRY,D=2> ; 4001
550 000557' 102021 000700
551 000560' 400250 000000 MWORD <JMAP,J=5000> ; 4002
552 000561' 000000 000040
553
554 ; Data pattern floating 1's - 20000,,000000
555
556 000562' 410000 000000 MWORD <ADDR=4100,CONT,SD0,B=2,AND,D=2> ; 4100
557 000563' 742001 000340
558 000564' 410100 360000 MWORD <LDCT,J=36,SAB,A=2,B=2,PLUS,CRY,D=2> ; 4101
559 000565' 102021 000700
560 000566' 410250 000000 MWORD <JMAP,J=5000> ; 4102
561 000567' 000000 000040
562
563 ; Data pattern floating 1's - 40000,,000000
564
565 000570' 420000 000000 MWORD <ADDR=4200,CONT,SD0,B=2,AND,D=2> ; 4200
566 000571' 742001 000340
567 000572' 420100 370000 MWORD <LDCT,J=37,SAB,A=2,B=2,PLUS,CRY,D=2> ; 4201
568 000573' 102021 000700
569 000574' 420250 000000 MWORD <JMAP,J=5000> ; 4202
570 000575' 000000 000040
571
572 ; Data pattern floating 1's - 100000,,000000
573
574 000576' 430000 000000 MWORD <ADDR=4300,CONT,SD0,B=2,AND,D=2> ; 4300
575 000577' 742001 000340
576 000600' 430100 400000 MWORD <LDCT,J=40,SAB,A=2,B=2,PLUS,CRY,D=2> ; 4301
577 000601' 102021 000700
578 000602' 430250 000000 MWORD <JMAP,J=5000> ; 4302
579 000603' 000000 000040
580
581 ; Data pattern floating 1's - 200000,,000000
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 3-9
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1624
582
583 000604' 440000 000000 MWORD <ADDR=4400,CONT,SD0,B=2,AND,D=2> ; 4400
584 000605' 742001 000340
585 000606' 440100 410000 MWORD <LDCT,J=41,SAB,A=2,B=2,PLUS,CRY,D=2> ; 4401
586 000607' 102021 000700
587 000610' 440250 000000 MWORD <JMAP,J=5000> ; 4402
588 000611' 000000 000040
589
590 ; Data pattern floating 1's - 400000,,000000
591
592 000612' 450000 000000 MWORD <ADDR=4500,CONT,SD0,B=2,AND,D=2> ; 4500
593 000613' 742001 000340
594 000614' 450100 400000 MWORD <LDCT,J=40,SAB,A=2,B=2,PLUS,CRY,D=2> ; 4501
595 000615' 102021 000700
596 000616' 450245 020000 MWORD <RPCT,J=4502,SAB,A=2,B=2,PLUS,D=2> ; 4502
597 000617' 102021 000220
598 000620' 450350 010000 MWORD <JMAP,J=5001,SAB,A=2,B=2,D=7> ; 4503
599 000621' 107021 000040
600
601 ; Data pattern 0's
602
603 000622' 460050 010000 MWORD <ADDR=4600,JMAP,J=5001,SD0,B=2,AND,D=2> ; 4600
604 000623' 742001 000040
605
606 ; Subroutine to write data to formatter, read back, and place in EBUF
607
608 000624' 500050 000000 MWORD <ADDR=5000,RPCT,J=5000,SAB,A=2,B=2,PLUS,D=2> ; 5000
609 000625' 102021 000220
610 000626' 500100 002040 MWORD <CONT,S0A,A=2,D=1,OENA,SELF,MGC=40> ; 5001
611 000627' 401020 003340
612 000630' 500200 000200 MWORD <CONT,SD0,B=2,D=2,SELM,MGC=200> ; 5002
613 000631' 702001 002340
614 000632' 500300 002004 MWORD <CONT,S0A,A=2,D=1,OENA,SELE,MGC=4> ; 5003
615 000633' 401020 005340
616 000634' 500450 040000 MWORD <JMAP,J=5004> ; 5004
617 000635' 000000 000040
618 000636' 777777 777777 -1
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 4
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1625
619
620 ;#********************************************************************
621 ;* Test 2 - PLI Buffer Data Loopback
622 ;
623 ; Description: This test does simple data loopback over the MBUS
624 ; through the CBUF, through the PMUX, through the
625 ; PLI Output Buffer, through the PLI Input Buffer,
626 ; through the CMUX, and back to the MBUS.
627 ;
628 ; Procedure: Port Clear
629 ; Set RAR to 0
630 ; Execute single steps
631 ; Read EBUF, verify data is correct
632 ;
633 ; Repeat with each data pattern:
634 ; 0's
635 ; 1's
636 ; floating 1's
637 ; floating 0's
638 ;
639 ; Failure: ---
640 ;#********************************************************************
641
642 ; Test data
643
644 000637' 254 00 0 00 000646' TSTC2: JRST TG2 ; go start test
645 000640' 100604 000002 CBUS!NDMP!NDCB!ZCBUS!2 ; test mask
646 000641' 000717' 012733' T2M,,[ASCIZ ^PLI Buffer Data Loopback^]
647 000642' 012740' 012746' [EXP C13,C22,C21,C20,C23,MLAST!C24],,[EXP C12,C19,C8,C3,C4,MLAST!C2]
648 000643' 000000 003034' TSTC11 ; failure test table
649 000644' 000000000000# TSTC40 ; ...
650 000645' 777777 777777 -1
651
652 ; Start test
653
654 000646' 201 00 0 00 000000' TG2: MOVEI Z9 ; get address of module start
655 000647' 260 17 0 00 000012* GO TRACE ; handle trace output
656 000650' 201 01 0 00 000717' MOVEI 1,T2M ; set up microcode address
657 000651' 260 17 0 00 000014* GO TLOAD ; load/verify it
658 000652' 263 17 0 00 000000 RTN ; failed - exit test
659
660 ; Initialization
661
662 000653' 400 15 0 00 000000 TL2: SETZ ERFLG, ; clear error flag
663 000654' 260 17 0 00 000017* GO IPACLR ; clear port
664 000655' 402 00 0 00 000020* SETZM TSTSUB ; initialize subtest number
665 000656' 201 06 0 00 000670' MOVEI 6,TS2 ; get sstep table address
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 5
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1626
666
667 ; Loop on single step table entries
668
669 000657' 260 17 0 00 000022* TA2: GO BEXEC ; execute table entry
670 000660' 254 00 0 00 000667' JRST TX2 ; end of sstep table
671 000661' 254 00 0 00 000657' JRST TA2 ; keep looping after call
672 000662' 474 15 0 00 000000 SETO ERFLG, ; error - EBUF data incorrect
673
674 ; Handle error printouts and scope looping
675
676 000663' 027 00 0 00 000715' SCOPER MA2 ; print error message
677 000664' 254 00 0 00 000653' JRST TL2 ; loop on error
678 000665' 254 00 0 00 000667' JRST TX2 ; altmode exit
679 000666' 322 15 0 00 000657' JUMPE ERFLG,TA2 ; do next sstep table entry
680
681 ; End of test
682
683 000667' 263 17 0 00 000000 TX2: RTN ; return
684
685 ; Sstep table, with EBUF data, as: (CMD,#Steps,Start addr,End Addr,EBUF data)
686
687 000670' 100700 005005 TS2: ATABLE (SSSTRT,7,0,5005,377)
688 000671' 000000 000377
689 000672' 100700 015005 ATABLE (SSSTRT,7,1,5005,1)
690 000673' 000000 000001
691 000674' 101100 025005 ATABLE (SSSTRT,^D9,2,5005,2)
692 000675' 000000 000002
693 000676' 101200 035005 ATABLE (SSSTRT,^D10,3,5005,4)
694 000677' 000000 000004
695 000700' 101300 045005 ATABLE (SSSTRT,^D11,4,5005,10)
696 000701' 000000 000010
697 000702' 101400 055005 ATABLE (SSSTRT,^D12,5,5005,20)
698 000703' 000000 000020
699 000704' 101500 065005 ATABLE (SSSTRT,^D13,6,5005,40)
700 000705' 000000 000040
701 000706' 101600 075005 ATABLE (SSSTRT,^D14,7,5005,100)
702 000707' 000000 000100
703 000710' 101700 105005 ATABLE (SSSTRT,^D15,10,5005,200)
704 000711' 000000 000200
705 000712' 100600 115005 ATABLE (SSSTRT,6,11,5005,0)
706 000713' 000000 000000
707 000714' 000000 000000 ATABLE (SSLAST)
708
709 ; Error messages
710
711 000715' 140000 012754' MA2: MSG!TXNOT![ASCIZ /Data loopback through PLI Buffers failed (result in EBUF)/]
712 000716' 000000000000# LAST!CALL!TXALL!BBPNT ; print sequencer data
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 6
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1627
713
714 ; Microcode
715
716 000717' 000001 000000 T2M: MWORD <ADDR=0,JMAP,J=100> ; 0 - 1's
717 000720' 000000 000040
718 000721' 000102 000000 MWORD <JMAP,J=200> ; 1 - 1
719 000722' 000000 000040
720 000723' 000203 000000 MWORD <JMAP,J=300> ; 2 - 2
721 000724' 000000 000040
722 000725' 000304 000000 MWORD <JMAP,J=400> ; 3 - 4
723 000726' 000000 000040
724 000727' 000405 000000 MWORD <JMAP,J=500> ; 4 - 10
725 000730' 000000 000040
726 000731' 000506 000000 MWORD <JMAP,J=600> ; 5 - 20
727 000732' 000000 000040
728 000733' 000607 000000 MWORD <JMAP,J=700> ; 6 - 40
729 000734' 000000 000040
730 000735' 000710 000000 MWORD <JMAP,J=1000> ; 7 - 100
731 000736' 000000 000040
732 000737' 001011 000000 MWORD <JMAP,J=1100> ; 10 - 200
733 000740' 000000 000040
734 000741' 001112 000000 MWORD <JMAP,J=1200> ; 11 - 0's
735 000742' 000000 000040
736
737 ; Data pattern 1's
738
739 000743' 010000 000000 MWORD <ADDR=100,CONT,SD0,B=2,AND,D=2> ; 100
740 000744' 742001 000340
741 000745' 010150 010000 MWORD <JMAP,J=5001,SAB,A=2,B=2,XNOR,D=2> ; 101
742 000746' 172021 000040
743
744 ; Data pattern floating 1's - 1
745
746 000747' 020000 000000 MWORD <ADDR=200,CONT,SD0,B=2,AND,D=2> ; 200
747 000750' 742001 000340
748 000751' 020150 010000 MWORD <JMAP,J=5001,SAB,A=2,B=2,PLUS,CRY,D=2> ; 201
749 000752' 102021 000440
750
751 ; Data pattern floating 1's - 2
752
753 000753' 030000 000000 MWORD <ADDR=300,CONT,SD0,B=2,AND,D=2> ; 300
754 000754' 742001 000340
755 000755' 030100 000000 MWORD <LDCT,J=0,SAB,A=2,B=2,PLUS,CRY,D=2> ; 301
756 000756' 102021 000700
757 000757' 030250 000000 MWORD <JMAP,J=5000> ; 302
758 000760' 000000 000040
759
760 ; Data pattern floating 1's - 4
761
762 000761' 040000 000000 MWORD <ADDR=400,CONT,SD0,B=2,AND,D=2> ; 400
763 000762' 742001 000340
764 000763' 040100 010000 MWORD <LDCT,J=1,SAB,A=2,B=2,PLUS,CRY,D=2> ; 401
765 000764' 102021 000700
766 000765' 040250 000000 MWORD <JMAP,J=5000> ; 402
767 000766' 000000 000040
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 6-1
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1628
768
769 ; Data pattern floating 1's - 10
770
771 000767' 050000 000000 MWORD <ADDR=500,CONT,SD0,B=2,AND,D=2> ; 500
772 000770' 742001 000340
773 000771' 050100 020000 MWORD <LDCT,J=2,SAB,A=2,B=2,PLUS,CRY,D=2> ; 501
774 000772' 102021 000700
775 000773' 050250 000000 MWORD <JMAP,J=5000> ; 502
776 000774' 000000 000040
777
778 ; Data pattern floating 1's - 20
779
780 000775' 060000 000000 MWORD <ADDR=600,CONT,SD0,B=2,AND,D=2> ; 600
781 000776' 742001 000340
782 000777' 060100 030000 MWORD <LDCT,J=3,SAB,A=2,B=2,PLUS,CRY,D=2> ; 601
783 001000' 102021 000700
784 001001' 060250 000000 MWORD <JMAP,J=5000> ; 602
785 001002' 000000 000040
786
787 ; Data pattern floating 1's - 40
788
789 001003' 070000 000000 MWORD <ADDR=700,CONT,SD0,B=2,AND,D=2> ; 700
790 001004' 742001 000340
791 001005' 070100 040000 MWORD <LDCT,J=4,SAB,A=2,B=2,PLUS,CRY,D=2> ; 701
792 001006' 102021 000700
793 001007' 070250 000000 MWORD <JMAP,J=5000> ; 702
794 001010' 000000 000040
795
796 ; Data pattern floating 1's - 100
797
798 001011' 100000 000000 MWORD <ADDR=1000,CONT,SD0,B=2,AND,D=2> ; 1000
799 001012' 742001 000340
800 001013' 100100 050000 MWORD <LDCT,J=5,SAB,A=2,B=2,PLUS,CRY,D=2> ; 1001
801 001014' 102021 000700
802 001015' 100250 000000 MWORD <JMAP,J=5000> ; 1002
803 001016' 000000 000040
804
805 ; Data pattern floating 1's - 200
806
807 001017' 110000 000000 MWORD <ADDR=1100,CONT,SD0,B=2,AND,D=2> ; 1100
808 001020' 742001 000340
809 001021' 110100 060000 MWORD <LDCT,J=6,SAB,A=2,B=2,PLUS,CRY,D=2> ; 1101
810 001022' 102021 000700
811 001023' 110250 000000 MWORD <JMAP,J=5000> ; 1102
812 001024' 000000 000040
813
814 ; Data pattern 0's
815
816 001025' 120050 010000 MWORD <ADDR=1200,JMAP,J=5001,SD0,B=2,AND,D=2> ; 1200
817 001026' 742001 000040
818
819 ; Subroutine to write data to PLI Buffers, read back, and place in EBUF
820
821 001027' 500050 000000 MWORD <ADDR=5000,RPCT,J=5000,SAB,A=2,B=2,PLUS,D=2> ; 5000
822 001030' 102021 000220
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 6-2
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1629
823 001031' 500100 002040 MWORD <CONT,S0A,A=2,OR,D=1,OENA,SELM,MGC=40> ; 5001
824 001032' 431020 002340
825 001033' 500200 000006 MWORD <CONT,SD0,D=1,SELP,MGC=6> ; 5002
826 001034' 701000 001340
827 001035' 500300 000300 MWORD <CONT,SD0,OR,B=2,D=2,SELM,MGC=300> ; 5003
828 001036' 732001 002340
829 001037' 500400 002004 MWORD <CONT,S0A,A=2,D=1,OENA,SELE,MGC=4> ; 5004
830 001040' 401020 005340
831 001041' 500550 050000 MWORD <JMAP,J=5005> ; 5005
832 001042' 000000 000040
833 001043' 777777 777777 -1
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 7
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1630
834
835 ;#********************************************************************
836 ;* Test 3 - CBUS to EBUF Data Transfer
837 ;
838 ; Description: This test performs a simple single word CBUS data
839 ; transfer from KL10 memory over the CBUS through
840 ; the CBUS module over the MBUS through the 2901's
841 ; to the EBUF. The EBUF is then read and verified.
842 ;
843 ; Procedure: KL> Port Clear
844 ; KL> Set up a CCW list to transfer 1 word
845 ; KL> Start up port
846 ; UC> Read word from CBUS and put in EBUF
847 ; KL> Stop microcode, read EBUF
848 ; KL> Verify data transfer completed ok
849 ;
850 ; Repeat with data patterns 1-114
851 ;
852 ; Failure: ---
853 ;#********************************************************************
854
855 ; Test data
856
857 001044' 254 00 0 00 001055' TSTC3: JRST TG3 ; go start test
858 001045' 100604 000003 CBUS!NDMP!NDCB!ZCBUS!3 ; test mask
859 001046' 001123' 012770' T3M,,[ASCIZ ^CBUS to EBUF Data Transfer^]
860 001047' 012776' 013000' [EXP C1,MLAST!C14],,[EXP C5,C4,C8,MLAST!C2]
861 001050' 000000 001152' TSTC4 ; failure test table
862 001051' 000000 001275' TSTC5 ; ...
863 001052' 000000000000# TSTC40
864 001053' 000000000000# TSTC41
865 001054' 777777 777777 -1
866
867 ; Start test
868
869 001055' 201 00 0 00 000000' TG3: MOVEI Z9 ; get address of module start
870 001056' 260 17 0 00 000647* GO TRACE ; handle trace output
871 001057' 201 01 0 00 001123' MOVEI 1,T3M ; set up microcode address
872 001060' 260 17 0 00 000651* GO TLOAD ; load/verify it
873 001061' 263 17 0 00 000000 RTN ; failed - exit test
874
875 ; Initialization
876
877 001062' 400 15 0 00 000000 TL3: SETZ ERFLG, ; clear error flag
878 001063' 201 06 0 00 001100' MOVEI 6,TS3 ; get test table address
879 001064' 402 00 0 00 000655* SETZM TSTSUB ; initialize subtest number
880 001065' 476 00 0 00 000000* SETOM CSTATF ; set check logout status flag
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 8
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1631
881
882 ; Loop on test execute table entries
883
884 001066' 260 17 0 00 000654* TA3: GO IPACLR ; clear port
885 001067' 260 17 0 00 000000* TB3: GO CEXEC ; execute table entry
886 001070' 254 00 0 00 001077' JRST TX3 ; end of test execute table
887 001071' 254 00 0 00 001067' JRST TB3 ; keep looping after call
888 001072' 474 15 0 00 000000 SETO ERFLG, ; error occurred
889
890 ; Handle error printouts and scope looping
891
892 001073' 027 00 0 00 001121' SCOPER MA3 ; print error message
893 001074' 254 00 0 00 001062' JRST TL3 ; loop on error
894 001075' 254 00 0 00 001077' JRST TX3 ; altmode exit
895 001076' 322 15 0 00 001066' JUMPE ERFLG,TA3 ; do next test execute table entry
896
897 ; End of test
898
899 001077' 263 17 0 00 000000 TX3: RTN ; return
900
901 ; Data Test Execute Table, as: (CMD,parameters)
902
903 001100' 240000 001110' TS3: CTABLE (CCALL,TS3SET) ; set up initial data pattern
904 001101' 300000 001112' TS3A: CTABLE (CCALLC,TS3INC) ; increment data pattern
905 001102' 100000 000001 CTABLE (CSETWR,0,1) ; set up write (default pattern,1 word)
906 001103' 240000 001116' CTABLE (CCALL,TS3SEE) ; set up correct EBUF contents
907 001104' 200000 000000 CTABLE (CSTART,0) ; start up port
908 001105' 340001 014064' CTABLE (CWAIT,1,TS3EBU) ; check if completed (and verify EBUF)
909 001106' 440000 001101' CTABLE (CJRST,TS3A) ; loop till done
910 001107' 000000 000000 CTABLE (CLAST) ; end of table
911
912 ; Initialize data pattern selection
913
914 001110' 402 00 0 00 000000* TS3SET: SETZM CPAT ; clear data pattern
915 001111' 263 17 0 00 000000 RTN ; return
916
917 ; Increment data pattern
918
919 001112' 350 01 0 00 001110* TS3INC: AOS 1,CPAT ; increment data pattern
920 001113' 307 01 0 00 000114 CAIG 1,114 ; done with test yet?
921 001114' 350 00 0 17 000000 AOS (P) ; no - set up proper return
922 001115' 263 17 0 00 000000 RTN ; return
923
924 ; Set up correct EBUF data
925
926 001116' 200 00 0 00 000000* TS3SEE: MOVE BUFF ; get correct EBUF data
927 001117' 202 00 0 00 014064' MOVEM TS3EBU# ; save it
928 001120' 263 17 0 00 000000 RTN ; return
929
930 ; Error messages
931
932 001121' 140000 013004' MA3: MSG!TXNOT![ASCIZ /Data transfer test error detected (result in EBUF)/]
933 001122' 000000000000# LAST!CALL!TXALL!CCPNT ; print test data
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 9
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1632
934
935 ; Microcode
936
937 001123' 000000 010000 T3M: MWORD <ADDR=0,JMAP,J=1,SD0,AND,D=2> ; 0
938 001124' 742000 000040
939
940 ; First, start the CBUS
941
942 001125' 000100 000200 MWORD <CONT,D=1,SELC,MGC=200> ; 1
943 001126' 001000 004340
944
945 ; Then wait for CBUS to be available (1 word done)
946
947 001127' 000200 040000 MWORD <CJP,J=4,D=1,CENA,CCCA> ; 2
948 001130' 001400 000060
949 001131' 000300 020000 MWORD <JMAP,J=2,D=1> ; 3
950 001132' 001000 000040
951
952 ; Now move it to formatter then to 2901's then to EBUF
953
954 001133' 000400 000004 MWORD <CONT,D=1,SELC,MGC=4> ; 4
955 001134' 001000 004340
956 001135' 000500 000200 MWORD <CONT,SD0,OR,D=2,SELM,MGC=200> ; 5
957 001136' 732000 002340
958 001137' 000600 002004 MWORD <CONT,S0A,OR,D=1,OENA,SELE,MGC=4> ; 6
959 001140' 431000 005340
960
961 ; Finally set STOP and STORE
962
963 001141' 000700 000140 MWORD <CONT,SELC,MGC=140> ; 7
964 001142' 000000 004340
965 001143' 001000 100000 MWORD <JMAP,J=10> ; 10
966 001144' 000000 000040
967
968 ; Initialization step
969
970 001145' 500050 010100 MWORD <ADDR=5000,JMAP,J=5001,SELC,MGC=100> ; 5000
971 001146' 000000 004040
972 001147' 500150 010020 MWORD <JMAP,J=5001,SELM,MGC=20> ; 5001
973 001150' 000000 002040
974 001151' 777777 777777 -1
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 10
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1633
975
976 ;#********************************************************************
977 ;* Test 4 - 2901 to CBUS Data Transfer
978 ;
979 ; Description: This test performs a simple single word CBUS data
980 ; transfer from the 2901's across the MBUS to the
981 ; CBUS module, then to KL10 memory. The data buffer
982 ; contents is then verified.
983 ;
984 ; Procedure: KL> Port Clear
985 ; KL> Set up a CCW list to transfer 1 word
986 ; KL> Start up port
987 ; UC> Generate a data pattern in 2901 and
988 ; transfer over the CBUS to 10 memory
989 ; KL> Verify the data is correct
990 ; KL> Verify data transfer completed ok
991 ;
992 ; Repeat with data patterns 0's and 1's
993 ;
994 ; Failure: ---
995 ;#********************************************************************
996
997 ; Test data
998
999 001152' 254 00 0 00 001162' TSTC4: JRST TG4 ; go start test
1000 001153' 100604 000004 CBUS!NDMP!NDCB!ZCBUS!4 ; test mask
1001 001154' 001220' 013017' T4M,,[ASCIZ ^2901 to CBUS Data Transfer^]
1002 001155' 013025' 013000' [EXP C1,MLAST!C15],,[EXP C5,C4,C8,MLAST!C2]
1003 001156' 000000 001275' TSTC5 ; failure test table
1004 001157' 000000000000# TSTC40 ; ...
1005 001160' 000000000000# TSTC41
1006 001161' 777777 777777 -1
1007
1008 ; Start test
1009
1010 001162' 201 00 0 00 000000' TG4: MOVEI Z9 ; get address of module start
1011 001163' 260 17 0 00 001056* GO TRACE ; handle trace output
1012 001164' 201 01 0 00 001220' MOVEI 1,T4M ; set up microcode address
1013 001165' 260 17 0 00 001060* GO TLOAD ; load/verify it
1014 001166' 263 17 0 00 000000 RTN ; failed - exit test
1015
1016 ; Initialization
1017
1018 001167' 400 15 0 00 000000 TL4: SETZ ERFLG, ; clear error flag
1019 001170' 201 06 0 00 001206' MOVEI 6,TS4 ; get test table address
1020 001171' 402 00 0 00 001064* SETZM TSTSUB ; initialize subtest number
1021 001172' 476 00 0 00 001065* SETOM CSTATF ; set check logout status flag
1022 001173' 400 15 0 00 000000 SETZ ERFLG, ; clear error flag
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 11
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1634
1023
1024 ; Loop on test execute table entries
1025
1026 001174' 260 17 0 00 001066* TA4: GO IPACLR ; clear port
1027 001175' 260 17 0 00 001067* TB4: GO CEXEC ; execute table entry
1028 001176' 254 00 0 00 001205' JRST TX4 ; end of test execute table
1029 001177' 254 00 0 00 001175' JRST TB4 ; keep looping after call
1030 001200' 474 15 0 00 000000 SETO ERFLG, ; error occurred
1031
1032 ; Handle error printouts and scope looping
1033
1034 001201' 027 00 0 00 001216' SCOPER MA4 ; print error message
1035 001202' 254 00 0 00 001167' JRST TL4 ; loop on error
1036 001203' 254 00 0 00 001205' JRST TX4 ; altmode exit
1037 001204' 322 15 0 00 001174' JUMPE ERFLG,TA4 ; do next test execute table entry
1038
1039 ; End of test
1040
1041 001205' 263 17 0 00 000000 TX4: RTN ; return
1042
1043 ; Data Test Execute Table, as: (CMD,parameters)
1044
1045 001206' 040000 000001 TS4: CTABLE (CSETRD,0,1) ; set up write (default pattern,1 word)
1046 001207' 200000 000000 CTABLE (CSTART,0) ; start up port at location 0
1047 001210' 340001 000000 CTABLE (CWAIT,1) ; check if completed
1048 001211' 500000 000000 CTABLE (CEXIT) ; exit if error yet
1049 001212' 040000 000001 CTABLE (CSETRD,0,1) ; set up write (default pattern,1 word)
1050 001213' 200000 000001 CTABLE (CSTART,1) ; start up port at location 1
1051 001214' 340001 000000 CTABLE (CWAIT,1) ; check if completed
1052 001215' 000000 000000 CTABLE (CLAST) ; end of table
1053
1054 ; Error messages
1055
1056 001216' 140000 013027' MA4: MSG!TXNOT![ASCIZ /Data transfer test error detected/]
1057 001217' 000000000000# LAST!CALL!TXALL!CCPNT ; print test data
1058
1059 ; Microcode
1060
1061 001220' 000000 030000 T4M: MWORD <ADDR=0,JMAP,J=3,SD0,AND,D=2> ; 0
1062 001221' 742000 000040
1063 001222' 000100 020000 MWORD <JMAP,J=2,SD0,AND,D=2> ; 1
1064 001223' 742000 000040
1065 001224' 000200 030000 MWORD <JMAP,J=3,SAB,XNOR,D=2> ; 2
1066 001225' 172000 000040
1067
1068 ; First, load the formatter
1069
1070 001226' 000300 002040 MWORD <CONT,S0A,D=1,OENA,SELF,MGC=40> ; 3
1071 001227' 401000 003340
1072
1073 ; Then, start the CBUS
1074
1075 001230' 000400 000220 MWORD <CONT,D=1,SELC,MGC=220> ; 4
1076 001231' 001000 004340
1077
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 11-1
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1635
1078 ; Then, wait for CBUS to be available
1079
1080 001232' 000500 070000 MWORD <CJP,J=7,D=1,CENA,CCCA> ; 5
1081 001233' 001400 000060
1082 001234' 000600 050000 MWORD <JMAP,J=5,D=1> ; 6
1083 001235' 001000 000040
1084
1085 ; Put data in CB Output Buffer
1086
1087 001236' 000700 000002 MWORD <CONT,D=1,SELC,MGC=2> ; 7
1088 001237' 001000 004340
1089
1090 ; Then, wait for CBUS to be available (1 word done)
1091
1092 001240' 001000 120000 MWORD <CJP,J=12,D=1,CENA,CCCA> ; 10
1093 001241' 001400 000060
1094 001242' 001100 100000 MWORD <JMAP,J=10,D=1> ; 11
1095 001243' 001000 000040
1096
1097 ; Finally set STOP and STORE
1098
1099 001244' 001200 000140 MWORD <CONT,SELC,MGC=140> ; 12
1100 001245' 000000 004340
1101 001246' 001300 130000 MWORD <JMAP,J=13> ; 13
1102 001247' 000000 000040
1103
1104 ; Finally, write bit 'RspQAV' in CSR to indicate we are done,
1105 ; and write word count to EBUF
1106
1107 001250' 001400 310200 MWORD <LDCT,J=31,SD0,OR,B=17,D=2,SKCN,MGC=200> ; 14
1108 001251' 732007 640300
1109 001252' 001500 150000 MWORD <RPCT,J=15,S0B,OR,B=17,D=5> ; 15
1110 001253' 335007 400220
1111 001254' 001600 002004 MWORD <CONT,S0A,A=17,OR,D=1,OENA,SELE,MGC=4> ; 16
1112 001255' 431170 005340
1113 001256' 001700 210040 MWORD <CJP,J=21,CENA,CCGC,SELE,MGC=40> ; 17
1114 001257' 000400 015060
1115 001260' 002000 170000 MWORD <JMAP,J=17> ; 20
1116 001261' 000000 000040
1117 001262' 002100 000200 MWORD <CONT,S0A,A=1,OR,D=1,SELE,MGC=200> ; 21
1118 001263' 431010 005340
1119 001264' 002200 002004 MWORD <CONT,S0A,OR,A=5,D=1,OENA,SELE,MGC=4> ; 22
1120 001265' 431050 005340
1121 001266' 002300 230000 MWORD <JMAP,J=23> ; 23
1122 001267' 000000 000040
1123
1124 ; Initialization step
1125
1126 001270' 500050 010100 MWORD <ADDR=5000,JMAP,J=5001,SELC,MGC=100> ; 5000
1127 001271' 000000 004040
1128 001272' 500150 010020 MWORD <JMAP,J=5001,SELM,MGC=20> ; 5001
1129 001273' 000000 002040
1130 001274' 777777 777777 -1
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 12
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1636
1131
1132 ;#********************************************************************
1133 ;* Test 5 - CBUS to 2901 Multiple word Transfer
1134 ;
1135 ; Description: This test performs a lengthy CBUS data transfer
1136 ; from the KL10 memory across CBUS to the port. The
1137 ; microcode accepts the first data word as the data
1138 ; pattern to be used, and verifies the remaining
1139 ; words against this.
1140 ;
1141 ; Procedure: KL> Port Clear
1142 ; KL> Set up a CCW list to transfer 102400 words
1143 ; (512 words in user mode)
1144 ; KL> Start up port
1145 ; UC> Initialize word count
1146 ; UC> Read first word from CBUS and put in 2901 R4
1147 ; UC> Repeat until 'Last Wd' is seen:
1148 ; Read a word
1149 ; Compare to first word
1150 ; If error - put word in error into R3
1151 ; - put word count in EBUF
1152 ; - abort test
1153 ; If ok - do next word
1154 ; UC> Assert STOP and STORE and put word count into EBUF
1155 ; KL> Stop microcode, read EBUF - verify word count
1156 ; KL> Read R4 to get correct data (1st word read)
1157 ; KL> If stopped at wrong location, read R3 to get
1158 ; actual data.
1159 ; KL> Verify data transfer completed ok
1160 ;
1161 ; Repeat with data patterns 1-114
1162 ;
1163 ; Failure: ---
1164 ;#********************************************************************
1165
1166 ; Test data
1167
1168 001275' 254 00 0 00 001305' TSTC5: JRST TG5 ; go start test
1169 001276' 100604 000005 CBUS!NDMP!NDCB!ZCBUS!5 ; test mask
1170 001277' 001453' 013036' T5M,,[ASCIZ ^CBUS to 2901 Multiple Word Transfer^]
1171 001300' 013046' 013051' [EXP C1,C14,MLAST!C17],,[EXP C12,C5,C8,C4,MLAST!C2]
1172 001301' 000000000000# TSTC40 ; failure test table
1173 001302' 000000000000# TSTC41 ; ...
1174 001303' 000000 001612' TSTC6
1175 001304' 777777 777777 -1
1176
1177 ; Start test
1178
1179 001305' 201 00 0 00 000000' TG5: MOVEI Z9 ; get address of module start
1180 001306' 260 17 0 00 001163* GO TRACE ; handle trace output
1181 001307' 201 01 0 00 001453' MOVEI 1,T5M ; set up microcode address
1182 001310' 260 17 0 00 001165* GO TLOAD ; load/verify it
1183 001311' 263 17 0 00 000000 RTN ; failed - exit test
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 13
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1637
1184
1185 ; Initialization
1186
1187 001312' 400 15 0 00 000000 TL5: SETZ ERFLG, ; clear error flag
1188 001313' 201 06 0 00 001330' MOVEI 6,TS5 ; get test table address
1189 001314' 402 00 0 00 001171* SETZM TSTSUB ; initialize subtest number
1190 001315' 400 15 0 00 000000 SETZ ERFLG, ; clear error flag
1191
1192 ; Loop on test execute table entries
1193
1194 001316' 260 17 0 00 001174* TA5: GO IPACLR ; clear port
1195 001317' 260 17 0 00 001175* TB5: GO CEXEC ; execute table entry
1196 001320' 254 00 0 00 001327' JRST TX5 ; end of test execute table
1197 001321' 254 00 0 00 001317' JRST TB5 ; keep looping after call
1198 001322' 474 15 0 00 000000 SETO ERFLG, ; error occurred
1199
1200 ; Handle error printouts and scope looping
1201
1202 001323' 027 00 0 00 001370' SCOPER MA5 ; print error message
1203 001324' 254 00 0 00 001312' JRST TL5 ; loop on error
1204 001325' 254 00 0 00 001327' JRST TX5 ; altmode exit
1205 001326' 322 15 0 00 001316' JUMPE ERFLG,TA5 ; do next test execute table entry
1206
1207 ; End of test
1208
1209 001327' 263 17 0 00 000000 TX5: RTN ; return
1210
1211 ; Data Test Execute Table, as: (CMD,parameters)
1212
1213 001330' 240000 001340' TS5: CTABLE (CCALL,TS5SET) ; set up initial data pattern
1214 001331' 300000 001346' TS5A: CTABLE (CCALLC,TS5INC) ; increment data pattern
1215 001332' 100000 000000 CTABLE (CSETWR,0,0) ; set up write
1216 001333' 200000 001000 CTABLE (CSTART,1000) ; start up port
1217 001334' 341000 000000 CTABLE (CWAIT,1000,0) ; check if completed
1218 001335' 240000 001356' CTABLE (CCALL,TS5CHE) ; check results
1219 001336' 440000 001331' CTABLE (CJRST,TS5A) ; loop till done
1220 001337' 000000 000000 CTABLE (CLAST) ; end of table
1221
1222 ; Initialize data pattern selection
1223
1224 001340' 402 00 0 00 001112* TS5SET: SETZM CPAT ; clear data pattern
1225 001341' 201 00 0 00 001000 MOVEI ^D512 ; length of data transfer is
1226 001342' 336 00 0 00 030037 SKIPN USER ; 102400 words exec mode
1227 001343' 201 00 0 00 310000 MOVEI ^D102400 ; and 512 words user mode
1228 001344' 202 00 0 00 000000* MOVEM CLEN ; save it
1229 001345' 263 17 0 00 000000 RTN ; return
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 14
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1638
1230
1231 ; Increment data pattern
1232
1233 001346' 350 01 0 00 001340* TS5INC: AOS 1,CPAT ; increment data pattern
1234 001347' 260 17 0 00 001316* GO IPACLR ; do a 'port clear'
1235 001350' 307 01 0 00 000114 CAIG 1,114 ; done with test yet?
1236 001351' 350 00 0 17 000000 AOS (P) ; no - set up proper return
1237 001352' 332 00 0 00 000000* SKIPE UDEBUG ; debug mode?
1238 JRST [CAIG 1,10 ; yes - limit to only 10 segments
1239 AOS (P)
1240 001353' 254 00 0 00 013056' JRST .+1]
1241 001354' 476 00 0 00 001172* SETOM CSTATF ; set check logout status flag
1242 001355' 263 17 0 00 000000 RTN ; return
1243
1244 ; Check results
1245
1246 001356' 260 17 0 00 001373' TS5CHE: GO MA5CHE ; get additional data
1247 001357' 200 01 0 00 000000* MOVE 1,CEBUFA ; get word count
1248 001360' 312 01 0 00 001344* CAME 1,CLEN ; correct?
1249 001361' 474 15 0 00 000000 SETO ERFLG, ; no - set error flag
1250 001362' 200 01 0 00 014011' MOVE 1,SAVDA1 ; get actual data
1251 001363' 312 01 0 00 014012' CAME 1,SAVDA2 ; same as correct?
1252 001364' 474 15 0 00 000000 SETO ERFLG, ; no - set error flag
1253 001365' 350 00 0 17 777772 AOS -6(P) ; set up error return
1254 001366' 350 00 0 17 777772 AOS -6(P) ; set up error return
1255 001367' 263 17 0 00 000000 RTN ; return
1256
1257 ; Error messages
1258
1259 001370' 140000 013027' MA5: MSG!TXNOT![ASCIZ /Data transfer test error detected/]
1260 001371' 240000 001373' CALL!TXNOT!MA5CHE ; check other results
1261 001372' 000000000000# LAST!CALL!TXALL!CCPNT ; print test data
1262
1263 ; Check results - first the word count left in the EBUF
1264
1265 001373' 322 15 0 00 001406' MA5CHE: JUMPE ERFLG,MA5CH0 ; no error yet? - continue
1266 001374' 200 01 0 00 001357* MOVE 1,CEBUFA ; get word count
1267 001375' 316 01 0 00 001360* CAMN 1,CLEN ; correct?
1268 001376' 254 00 0 00 001406' JRST MA5CH0 ; yes - continue
1269 001377' 331 00 0 00 000001 SKIPL 1 ; word count error?
1270 JRST [TMSGC <Word count error detected by port: >
1271 TMSGC < Correct:>
1272 PDEC 10,CLEN
1273 TMSG <.>
1274 TMSGC < Actual:>
1275 PDEC 11,CEBUFA ; print it
1276 TMSG <.>
1277 001400' 254 00 0 00 013100' JRST MA5CH0]
1278 001401' 037 00 0 00 013110' TMSGC <Parity error detected by port in word #>
1279 001402' 210 00 0 00 001374* MOVN CEBUFA
1280 001403' 350 00 0 00 000000 AOS
1281 001404' 037 15 0 00 000000 PNTDEC
1282 001405' 037 00 0 00 013074' TMSG <.>
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 15
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1639
1283
1284 ; Then the correct/actual data being read
1285
1286 001406' 400 01 0 00 000000 MA5CH0: SETZ 1, ; ensure the port is
1287 001407' 260 17 0 00 000000* GO LDCSR ; stopped
1288 001410' 201 01 0 00 000200 MOVEI 1,200 ; get address to get R3
1289 001411' 242 01 0 00 000001 LSH 1,1 ; position correctly
1290 001412' 260 17 0 00 000000* GO LDRAR ; load RAR register
1291 001413' 201 01 0 00 000010 MOVEI 1,MPRUN ; set up initial CSR data
1292 001414' 260 17 0 00 001407* GO LDCSR ; write CSR register
1293 001415' 201 01 0 00 200000 MOVEI 1,TSTEBF ; set up CSR to read EBUF
1294 001416' 260 17 0 00 001414* GO LDCSR ; write it
1295 001417' 260 17 0 00 000000* GO RDEBUF ; get EBUF data (actual)
1296 001420' 202 01 0 00 014011' MOVEM 1,SAVDA1# ; save it
1297 001421' 400 01 0 00 000000 SETZ 1, ; ensure the port is
1298 001422' 260 17 0 00 001416* GO LDCSR ; stopped
1299 001423' 201 01 0 00 000300 MOVEI 1,300 ; get address to get R4
1300 001424' 242 01 0 00 000001 LSH 1,1 ; position correctly
1301 001425' 260 17 0 00 001412* GO LDRAR ; load RAR register
1302 001426' 201 01 0 00 000010 MOVEI 1,MPRUN ; set up initial CSR data
1303 001427' 260 17 0 00 001422* GO LDCSR ; write CSR register
1304 001430' 201 01 0 00 200000 MOVEI 1,TSTEBF ; set up CSR to read EBUF
1305 001431' 260 17 0 00 001427* GO LDCSR ; write it
1306 001432' 260 17 0 00 001417* GO RDEBUF ; get EBUF data (actual)
1307 001433' 202 01 0 00 014012' MOVEM 1,SAVDA2# ; save it
1308
1309 ; Check for data compare error - and print if so
1310
1311 001434' 332 00 0 00 000015 SKIPE ERFLG ; error yet?
1312 001435' 316 01 0 00 014011' CAMN 1,SAVDA1 ; yes - error?
1313 001436' 263 17 0 00 000000 RTN ; no - return
1314 001437' 037 00 0 00 013121' TMSGC <Data compare error - Word # >
1315 001440' 200 00 0 00 001402* MOVE CEBUFA ; get word count
1316 001441' 350 00 0 00 000000 AOS
1317 001442' 037 15 0 00 000000 PNTDEC ; print it
1318 001443' 037 00 0 00 013074' TMSG <.>
1319 001444' 037 00 0 00 013130' TMSGC < Correct: >
1320 001445' 200 00 0 00 014012' MOVE SAVDA2 ; get correct data
1321 001446' 037 13 0 00 000000 PNTHW ; print it
1322 001447' 037 00 0 00 013133' TMSGC < Actual: >
1323 001450' 200 00 0 00 014011' MOVE SAVDA1 ; get actual data
1324 001451' 037 13 0 00 000000 PNTHW ; print it
1325 001452' 263 17 0 00 000000 RTN ; return
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 16
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1640
1326
1327 ; Microcode - Read the first word
1328
1329 001453' 000001 000000 T5M: MWORD <ADDR=0,CJS,J=100,D=1> ; 0
1330 001454' 001000 000020
1331 001455' 000100 000000 MWORD <CONT,S0A,OR,A=3,B=4,D=2> ; 1
1332 001456' 432032 000340
1333 001457' 000200 000000 MWORD <CONT,S0A,AND,A=5,B=5,D=2> ; 2
1334 001460' 442052 400340
1335 001461' 000300 000000 MWORD <CONT,S0A,PLUS,A=5,B=5,D=2,CRY> ; 3
1336 001462' 402052 400740
1337
1338 ; Read 2nd through 102400 words
1339
1340 001463' 000401 030000 MWORD <CJS,J=103,D=1> ; 4
1341 001464' 001000 000020
1342 001465' 000500 070000 MWORD <CJP,J=7,SAB,XOR,A=3,B=4,D=1,CENA,CCFZ> ; 5
1343 001466' 161432 020060
1344 001467' 000600 110000 MWORD <JMAP,J=11> ; 6
1345 001470' 000000 000040
1346 001471' 000700 000000 MWORD <CONT,S0B,B=5,PLUS,D=2,CRY> ; 7
1347 001472' 302002 400740
1348 001473' 001000 150000 MWORD <CJP,J=15,S0B,OR,B=12,D=2,CENA,CCMB> ; 10
1349 001474' 332405 120060
1350 001475' 001100 040000 MWORD <JMAP,J=4> ; 11
1351 001476' 000000 000040
1352
1353 ; Error (data compare) occurred
1354
1355 001477' 001200 000140 MWORD <CONT,SELC,MGC=140> ; 12
1356 001500' 000000 004340
1357 001501' 001300 002004 MWORD <CONT,S0A,OR,A=5,D=1,OENA,SELE,MGC=4> ; 13
1358 001502' 431050 005340
1359 001503' 001400 140000 MWORD <JMAP,J=14> ; 14
1360 001504' 000000 000040
1361
1362 ; All done - set STOP and STORE
1363
1364 001505' 001500 000140 MWORD <CONT,SELC,MGC=140> ; 15
1365 001506' 000000 004340
1366
1367 ; Finally, write bit 'RspQAV' in CSR to indicate we are done,
1368 ; and write word count to EBUF
1369
1370 001507' 001600 310200 MWORD <LDCT,J=31,SD0,OR,B=17,D=2,SKCN,MGC=200> ; 16
1371 001510' 732007 640300
1372 001511' 001700 170000 MWORD <RPCT,J=17,S0B,OR,B=17,D=5> ; 17
1373 001512' 335007 400220
1374 001513' 002000 002004 MWORD <CONT,S0A,A=17,OR,D=1,OENA,SELE,MGC=4> ; 20
1375 001514' 431170 005340
1376 001515' 002100 230040 MWORD <CJP,J=23,CENA,CCGC,SELE,MGC=40> ; 21
1377 001516' 000400 015060
1378 001517' 002200 210000 MWORD <JMAP,J=21> ; 22
1379 001520' 000000 000040
1380 001521' 002300 000200 MWORD <CONT,S0A,A=1,OR,D=1,SELE,MGC=200> ; 23
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 16-1
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1641
1381 001522' 431010 005340
1382 001523' 002400 002004 MWORD <CONT,S0A,OR,A=5,D=1,OENA,SELE,MGC=4> ; 24
1383 001524' 431050 005340
1384 001525' 002500 250000 MWORD <JMAP,J=25> ; 25
1385 001526' 000000 000040
1386
1387 ; Routine to read a word from CBUS, through formatter into R3
1388 ; (If this routine is started at 101, then the next word from
1389 ; the CBUS is read).
1390
1391 001527' 010000 000200 MWORD <ADDR=100,CONT,SELC,MGC=200> ; 100
1392 001530' 000000 004340
1393 001531' 010100 100000 MWORD <LDCT,J=10> ; 101
1394 001532' 000000 000300
1395 001533' 010201 020000 MWORD <RPCT,J=102> ; 102
1396 001534' 000000 000220
1397 001535' 010301 050000 MWORD <CJP,J=105,CENA,CCCA> ; 103
1398 001536' 000400 000060
1399 001537' 010401 030000 MWORD <JMAP,J=103> ; 104
1400 001540' 000000 000040
1401 001541' 010500 000000 MWORD <CONT> ; 105
1402 001542' 000000 000340
1403 001543' 010600 000004 MWORD <CONT,S0B,AND,B=12,D=2,SELC,MGC=4> ; 106
1404 001544' 342005 004340
1405 001545' 010700 000200 MWORD <CONT,SD0,OR,B=3,D=2,SELM,MGC=200> ; 107
1406 001546' 732001 402340
1407 001547' 011001 120000 MWORD <CJP,J=112,S0B,XNOR,B=12,D=2,CENA,CCLW> ; 110
1408 001550' 372405 170060
1409 001551' 011100 000000 MWORD <CONT,S0B,AND,B=12,D=2> ; 111
1410 001552' 342005 000340
1411 001553' 011201 150000 MWORD <CJP,J=115,CENA,CCCE> ; 112
1412 001554' 000400 160060
1413 001555' 011301 170000 MWORD <CJP,J=117,CENA,CCCP> ; 113
1414 001556' 000400 140060
1415 001557' 011400 000000 MWORD <CRTN> ; 114
1416 001560' 000000 000240
1417
1418 ; Error (channel error) occurred - set STOP and STORE
1419
1420 001561' 011500 000140 MWORD <CONT,SELC,MGC=140> ; 115
1421 001562' 000000 004340
1422 001563' 011601 160000 MWORD <JMAP,J=116> ; 116
1423 001564' 000000 000040
1424
1425 ; Error (parity error) occurred
1426
1427 001565' 011700 000140 MWORD <CONT,SELC,MGC=140> ; 117
1428 001566' 000000 004340
1429 001567' 012000 002004 MWORD <CONT,S0A,XNOR,A=5,D=1,OENA,SELE,MGC=4> ; 120
1430 001570' 471050 005340
1431 001571' 012101 210000 MWORD <JMAP,J=121> ; 121
1432 001572' 000000 000040
1433
1434 ; Routine to read R3 and place in EBUF
1435
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 16-2
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1642
1436 001573' 020002 012004 MWORD <ADDR=200,JMAP,J=201,S0A,A=3,OR,OENA,D=1,SELE,MGC=4>
1437 001574' 431030 005040
1438 001575' 020102 010000 MWORD <JMAP,J=201> ; 201
1439 001576' 000000 000040
1440
1441 ; Routine to read R4 and place in EBUF
1442
1443 001577' 030003 012004 MWORD <ADDR=300,JMAP,J=301,S0A,A=4,OR,OENA,D=1,SELE,MGC=4>
1444 001600' 431040 005040
1445 001601' 030103 010000 MWORD <JMAP,J=301> ; 201
1446 001602' 000000 000040
1447
1448 ; Initialization
1449
1450 001603' 100000 000020 MWORD <ADDR=1000,JZ,SELM,MGC=20> ; 1000
1451 001604' 000000 002000
1452
1453 ; Initialization step
1454
1455 001605' 500050 010100 MWORD <ADDR=5000,JMAP,J=5001,SELC,MGC=100> ; 5000
1456 001606' 000000 004040
1457 001607' 500150 010020 MWORD <JMAP,J=5001,SELM,MGC=20> ; 5001
1458 001610' 000000 002040
1459 001611' 777777 777777 -1
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 17
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1643
1460
1461 ;#********************************************************************
1462 ;* Test 6 - 2901 to CBUS Multiple word Transfer
1463 ;
1464 ; Description: This test performs a lengthy CBUS data transfer
1465 ; from the port across the CBUS to KL10 memory. The
1466 ; microcode builds each data pattern then transfers
1467 ; this data to the KL10 until the CCW list is
1468 ; exhausted. The data buffer is then verified.
1469 ;
1470 ; Procedure: KL> Port Clear
1471 ; KL> Load test microcode
1472 ;
1473 ; KL> Load microcode to generate data pattern
1474 ; KL> Set up a CCW list to transfer 102400 words
1475 ; (512 words in user mode)
1476 ; KL> Start up port
1477 ; UC> Initialize word count
1478 ; UC> Write word to CBUS, and repeat this until done
1479 ; UC> Assert STOP and STORE and put word count into EBUF
1480 ; KL> Stop microcode, read EBUF - verify word count
1481 ; KL> Read R4 to get correct data (1st word written)
1482 ; KL> Verify data buffer
1483 ;
1484 ; Repeat with data patterns 1-114
1485 ;#********************************************************************
1486
1487 ; Test data
1488
1489 001612' 254 00 0 00 001621' TSTC6: JRST TG6 ; go start test
1490 001613' 100604 000006 CBUS!NDMP!NDCB!ZCBUS!6 ; test mask
1491 001614' 002022' 013136' T6M,,[ASCIZ ^2901 to CBUS Multiple Word Transfer^]
1492 001615' 013146' 013051' [EXP C1,C15,MLAST!C16],,[EXP C12,C5,C8,C4,MLAST!C2]
1493 001616' 000000000000# TSTC40 ; failure test table
1494 001617' 000000000000# TSTC41 ; ...
1495 001620' 777777 777777 -1
1496
1497 ; Start test
1498
1499 001621' 201 00 0 00 000000' TG6: MOVEI Z9 ; get address of module start
1500 001622' 260 17 0 00 001306* GO TRACE ; handle trace output
1501 001623' 201 01 0 00 002022' MOVEI 1,T6M ; set up microcode address
1502 001624' 260 17 0 00 001310* GO TLOAD ; load/verify it
1503 001625' 263 17 0 00 000000 RTN ; failed - exit test
1504
1505 ; Initialization
1506
1507 001626' 400 15 0 00 000000 TL6: SETZ ERFLG, ; clear error flag
1508 001627' 201 06 0 00 001644' MOVEI 6,TS6 ; get test table address
1509 001630' 402 00 0 00 001314* SETZM TSTSUB ; initialize subtest number
1510 001631' 400 15 0 00 000000 SETZ ERFLG, ; clear error flag
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 18
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1644
1511
1512 ; Loop on test execute table entries
1513
1514 001632' 260 17 0 00 001347* TA6: GO IPACLR ; clear port
1515 001633' 260 17 0 00 001317* TB6: GO CEXEC ; execute table entry
1516 001634' 254 00 0 00 001643' JRST TX6 ; end of test execute table
1517 001635' 254 00 0 00 001633' JRST TB6 ; keep looping after call
1518 001636' 474 15 0 00 000000 SETO ERFLG, ; error occurred
1519
1520 ; Handle error printouts and scope looping
1521
1522 001637' 027 00 0 00 001742' SCOPER MA6 ; print error message
1523 001640' 254 00 0 00 001626' JRST TL6 ; loop on error
1524 001641' 254 00 0 00 001643' JRST TX6 ; altmode exit
1525 001642' 322 15 0 00 001632' JUMPE ERFLG,TA6 ; do next test execute table entry
1526
1527 ; End of test
1528
1529 001643' 263 17 0 00 000000 TX6: RTN ; return
1530
1531 ; Data Test Execute Table, as: (CMD,parameters)
1532
1533 001644' 240000 001654' TS6: CTABLE (CCALL,TS6SET) ; set up initial data pattern
1534 001645' 300000 001666' TS6A: CTABLE (CCALLC,TS6INC) ; increment data pattern
1535 001646' 040000 000000 CTABLE (CSETRD,0,0) ; set up write
1536 001647' 200000 000100 TS6S: CTABLE (CSTART,100) ; start up port
1537 001650' 341000 000000 CTABLE (CWAIT,1000,0) ; check if completed
1538 001651' 240000 001730' CTABLE (CCALL,TS6CHE) ; check results
1539 001652' 440000 001645' CTABLE (CJRST,TS6A) ; loop till done
1540 001653' 000000 000000 CTABLE (CLAST) ; end of table
1541
1542 ; Initialize data pattern selection
1543
1544 001654' 402 00 0 00 001346* TS6SET: SETZM CPAT ; clear data pattern
1545 001655' 201 00 0 00 001000 MOVEI ^D512 ; length of data transfer is
1546 001656' 336 00 0 00 030037 SKIPN USER ; 102400 words exec mode
1547 001657' 201 00 0 00 310000 MOVEI ^D102400 ; and 512 words user mode
1548 001660' 202 00 0 00 001375* MOVEM CLEN ; save it
1549 001661' 201 00 0 00 000100 MOVEI 100 ; get exec mode start address
1550 001662' 332 00 0 00 030037 SKIPE USER ; user mode?
1551 001663' 201 00 0 00 000110 MOVEI 110 ; yes - set up user mode address
1552 001664' 542 00 0 00 001647' HRRM TS6S ; store it
1553 001665' 263 17 0 00 000000 RTN ; return
1554
1555 ; Increment data pattern
1556
1557 001666' 260 17 0 00 001632* TS6INC: GO IPACLR ; do a 'port clear'
1558 001667' 350 01 0 00 001654* AOS 1,CPAT ; increment data pattern
1559 001670' 307 01 0 00 000114 CAIG 1,114 ; done with test yet?
1560 001671' 350 00 0 17 000000 AOS (P) ; no - set up proper return
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 19
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1645
1561 001672' 332 00 0 00 001352* SKIPE UDEBUG ; debug mode?
1562 JRST [CAIG 1,10 ; yes - limit to only 10 segments
1563 AOS (P)
1564 001673' 254 00 0 00 013151' JRST .+1]
1565 001674' 200 01 0 01 000000* MOVE 1,PATBUF(1) ; get data pattern
1566 001675' 202 01 0 00 014011' MOVEM 1,SAVDA1 ; save 'correct data'
1567 001676' 135 02 0 00 013154' LDB 2,[POINT 10,1,9] ; get 1st MGC field
1568 001677' 137 02 0 00 013155' DPB 2,[POINT 10,T6MM,35] ; save it
1569 001700' 135 02 0 00 013156' LDB 2,[POINT 10,1,19] ; get 2nd MGC field
1570 001701' 137 02 0 00 013157' DPB 2,[POINT 10,T6MM+2,35] ; save it
1571 001702' 135 02 0 00 013160' LDB 2,[POINT 10,1,29] ; get 3rd MGC field
1572 001703' 137 02 0 00 013161' DPB 2,[POINT 10,T6MM+4,35] ; save it
1573 001704' 135 02 0 00 013162' LDB 2,[POINT 6,1,35] ; get 1st half of 4th MGC field
1574 001705' 137 02 0 00 013163' DPB 2,[POINT 6,T6MM+6,31] ; save it
1575 001706' 316 16 0 00 000000* CAMN MBCN,PORTNI ; NI port?
1576 001707' 476 00 0 00 000000* SETOM TSLOD1 ; yes - must reload microcode each time
1577 001710' 316 16 0 00 000000* CAMN MBCN,PORTCI ; CI port?
1578 001711' 476 00 0 00 000000* SETOM TSLOD2 ; yes - must reload microcode each time
1579 001712' 201 01 0 00 001717' MOVEI 1,T6MM ; set up microcode address
1580 001713' 260 17 0 00 001624* GO TLOAD ; load/verify it
1581 001714' 255 00 0 00 000000 JFCL ; ignore error
1582 001715' 476 00 0 00 001354* SETOM CSTATF ; set check logout status flag
1583 001716' 263 17 0 00 000000 RTN ; return
1584
1585 001717' 000000 010000 T6MM: MWORD <ADDR=0,JMAP,J=1,MGC=0,SD0,OR,D=2,SKCN> ; 0 00-09
1586 001720' 732000 240040
1587 001721' 000100 000000 MWORD <CONT,MGC=0,SD0,OR,B=1,D=2,SKCN> ; 1 10-19
1588 001722' 732000 640340
1589 001723' 000200 000000 MWORD <CONT,MGC=0,SD0,OR,B=2,D=2,SKCN> ; 2 20-29
1590 001724' 732001 240340
1591 001725' 000300 000000 MWORD <CONT,MGC=0,SD0,OR,B=3,D=2,SKCN> ; 3 30-35
1592 001726' 732001 640340
1593 001727' 777777 777777 -1
1594
1595 ; Check results
1596
1597 001730' 260 17 0 00 001745' TS6CHE: GO MA6CHE ; get additional data
1598 001731' 200 01 0 00 001440* MOVE 1,CEBUFA ; get word count
1599 001732' 312 01 0 00 001660* CAME 1,CLEN ; correct?
1600 001733' 474 15 0 00 000000 SETO ERFLG, ; no - set error flag
1601 001734' 200 01 0 00 014011' MOVE 1,SAVDA1 ; get actual data
1602 001735' 312 01 0 00 014012' CAME 1,SAVDA2 ; same as correct?
1603 001736' 474 15 0 00 000000 SETO ERFLG, ; no - set error flag
1604 001737' 350 00 0 17 777772 AOS -6(P) ; set up error return
1605 001740' 350 00 0 17 777772 AOS -6(P) ; set up error return
1606 001741' 263 17 0 00 000000 RTN ; return
1607
1608 ; Error messages
1609
1610 001742' 140000 013027' MA6: MSG!TXNOT![ASCIZ /Data transfer test error detected/]
1611 001743' 240000 001745' CALL!TXNOT!MA6CHE ; check other results
1612 001744' 000000000000# LAST!CALL!TXALL!CCPNT ; print test data
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 20
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1646
1613
1614 ; Check results - first the word count left in the EBUF
1615
1616 001745' 322 15 0 00 001760' MA6CHE: JUMPE ERFLG,MA6CH0 ; no error yet? - continue
1617 001746' 200 01 0 00 001731* MOVE 1,CEBUFA ; get word count
1618 001747' 316 01 0 00 001732* CAMN 1,CLEN ; correct?
1619 001750' 254 00 0 00 001760' JRST MA6CH0 ; yes - continue
1620 001751' 037 00 0 00 013061' TMSGC <Word count error detected by port: >
1621 001752' 037 00 0 00 013071' TMSGC < Correct:>
1622 001753' 006 10 0 00 001747* PDEC 10,CLEN
1623 001754' 037 00 0 00 013074' TMSG <.>
1624 001755' 037 00 0 00 013075' TMSGC < Actual:>
1625 001756' 006 11 0 00 001746* PDEC 11,CEBUFA ; print it
1626 001757' 037 00 0 00 013074' TMSG <.>
1627
1628 ; Then the actual data written
1629
1630 001760' 400 01 0 00 000000 MA6CH0: SETZ 1, ; ensure the port is
1631 001761' 260 17 0 00 001431* GO LDCSR ; stopped
1632 001762' 201 01 0 00 000300 MOVEI 1,300 ; get address to get R4
1633 001763' 242 01 0 00 000001 LSH 1,1 ; position correctly
1634 001764' 260 17 0 00 001425* GO LDRAR ; load RAR register
1635 001765' 201 01 0 00 000010 MOVEI 1,MPRUN ; set up initial CSR data
1636 001766' 260 17 0 00 001761* GO LDCSR ; write CSR register
1637 001767' 201 01 0 00 200000 MOVEI 1,TSTEBF ; set up CSR to read EBUF
1638 001770' 260 17 0 00 001766* GO LDCSR ; write it
1639 001771' 260 17 0 00 001432* GO RDEBUF ; get EBUF data (actual)
1640 001772' 202 01 0 00 014012' MOVEM 1,SAVDA2 ; save it
1641
1642 ; Check for data generation error - and print if so
1643
1644 001773' 332 00 0 00 000015 SKIPE ERFLG ; error yet?
1645 001774' 316 01 0 00 014011' CAMN 1,SAVDA1 ; yes - error?
1646 001775' 254 00 0 00 002006' JRST MA6CH1 ; no - do data buffer compare
1647 001776' 037 00 0 00 013164' TMSGC <Data pattern not generated correctly:>
1648 001777' 037 00 0 00 013130' TMSGC < Correct: >
1649 002000' 200 00 0 00 014011' MOVE SAVDA1 ; get correct data
1650 002001' 037 13 0 00 000000 PNTHW ; print it
1651 002002' 037 00 0 00 013133' TMSGC < Actual: >
1652 002003' 200 00 0 00 014012' MOVE SAVDA2 ; get actual data
1653 002004' 037 13 0 00 000000 PNTHW ; print it
1654 002005' 263 17 0 00 000000 RTN ; return
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 21
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1647
1655
1656 ; Check for data buffer compare error
1657
1658 002006' 200 01 0 00 013174' MA6CH1: MOVE 1,[-1] ; set to 'read - don't report errors'
1659 002007' 201 02 0 00 001000 MOVEI 2,^D512 ; get buffer length
1660 002010' 260 17 0 00 000000* GO BUFCOM ; do the compare
1661 002011' 202 01 0 00 014014' MOVEM 1,SAVNUM# ; save number of data compare errors
1662 002012' 332 00 0 00 000015 SKIPE ERFLG ; error yet?
1663 002013' 336 00 0 00 000001 SKIPN 1 ; any words in error?
1664 002014' 263 17 0 00 000000 RTN ; no - return
1665 002015' 201 01 0 00 000001 MOVEI 1,1 ; set to 'read - report errors'
1666 002016' 201 02 0 00 001000 MOVEI 2,^D512 ; get buffer length
1667 002017' 260 17 0 00 002010* GO BUFCOM ; do the compare/print errors
1668 002020' 402 00 0 00 000000* SETZM CDERR ; don't report these in CCPNT
1669 002021' 263 17 0 00 000000 RTN ; done - return
1670
1671 ; Microcode - Initialize the word count
1672
1673 ; Initialize word count (exec mode)
1674
1675 002022' 010001 010000 T6M: MWORD <ADDR=100,JMAP,J=101,SD0,AND,B=5,D=2> ; 100
1676 002023' 742002 400040
1677 002024' 010100 310310 MWORD <LDCT,J=31,SD0,OR,B=6,D=2,SKCN,MGC=310> ; 101
1678 002025' 732003 240300
1679 002026' 010201 020000 MWORD <RPCT,J=102,S0B,B=6,OR,D=5> ; 102
1680 002027' 335003 000220
1681 002030' 010300 100000 MWORD <LDCT,J=10,D=1> ; 103
1682 002031' 001000 000300
1683 002032' 010401 040000 MWORD <RPCT,J=104,S0B,B=6,OR,D=6> ; 104
1684 002033' 336003 000220
1685 002034' 010500 000000 MWORD <JZ> ; 105
1686 002035' 000000 000000
1687
1688 ; Initialize word count (exec mode)
1689
1690 002036' 011001 110000 MWORD <ADDR=110,JMAP,J=111,SD0,AND,B=5,D=2> ; 110
1691 002037' 742002 400040
1692 002040' 011100 310001 MWORD <LDCT,J=31,SD0,OR,B=6,D=2,SKCN,MGC=1> ; 111
1693 002041' 732003 240300
1694 002042' 011201 120000 MWORD <RPCT,J=112,S0B,B=6,OR,D=5> ; 112
1695 002043' 335003 000220
1696 002044' 011300 100000 MWORD <LDCT,J=10,D=1> ; 113
1697 002045' 001000 000300
1698 002046' 011401 140000 MWORD <RPCT,J=114,S0B,B=6,OR,D=6> ; 114
1699 002047' 336003 000220
1700 002050' 011500 000000 MWORD <JZ> ; 115
1701 002051' 000000 000000
1702
1703 ; Build the data pattern word
1704
1705 002052' 000000 010000 MWORD <ADDR=0,JMAP,J=1,MGC=0,SD0,OR,D=2,SKCN> ; 0 00-09
1706 002053' 732000 240040
1707 002054' 000100 000000 MWORD <CONT,MGC=0,SD0,OR,B=1,D=2,SKCN> ; 1 10-19
1708 002055' 732000 640340
1709 002056' 000200 000000 MWORD <CONT,MGC=0,SD0,OR,B=2,D=2,SKCN> ; 2 20-29
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 21-1
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1648
1710 002057' 732001 240340
1711 002060' 000300 000000 MWORD <CONT,MGC=0,SD0,OR,B=3,D=2,SKCN> ; 3 30-35
1712 002061' 732001 640340
1713 002062' 000400 310000 MWORD <LDCT,J=31,D=1> ; 4
1714 002063' 001000 000300
1715 002064' 000500 050000 MWORD <RPCT,J=5,S0B,B=0,OR,D=7> ; 5
1716 002065' 337000 000220
1717 002066' 000600 310000 MWORD <LDCT,J=31,D=1> ; 6
1718 002067' 001000 000300
1719 002070' 000700 070000 MWORD <RPCT,J=7,S0B,B=1,OR,D=7> ; 7
1720 002071' 337000 400220
1721 002072' 001000 110000 MWORD <LDCT,J=11,D=1> ; 10
1722 002073' 001000 000300
1723 002074' 001100 110000 MWORD <RPCT,J=11,S0B,B=1,OR,D=5> ; 11
1724 002075' 335000 400220
1725 002076' 001200 310000 MWORD <LDCT,J=31,D=1> ; 12
1726 002077' 001000 000300
1727 002100' 001300 130000 MWORD <RPCT,J=13,S0B,B=2,OR,D=7> ; 13
1728 002101' 337001 000220
1729 002102' 001400 230000 MWORD <LDCT,J=23,D=1> ; 14
1730 002103' 001000 000300
1731 002104' 001500 150000 MWORD <RPCT,J=15,S0B,B=2,OR,D=5> ; 15
1732 002105' 335001 000220
1733 002106' 001600 350000 MWORD <LDCT,J=35,D=1> ; 16
1734 002107' 001000 000300
1735 002110' 001700 170000 MWORD <RPCT,J=17,S0B,B=3,OR,D=5> ; 17
1736 002111' 335001 400220
1737 002112' 002000 000000 MWORD <CONT,S0A,OR,D=2,B=4> ; 20
1738 002113' 432002 000340
1739 002114' 002100 000000 MWORD <CONT,SAB,OR,D=2,A=1,B=4> ; 21
1740 002115' 132012 000340
1741 002116' 002200 000000 MWORD <CONT,SAB,OR,D=2,A=2,B=4> ; 22
1742 002117' 132022 000340
1743 002120' 002300 000000 MWORD <CONT,SAB,OR,D=2,A=3,B=4> ; 23
1744 002121' 132032 000340
1745
1746 ; Write all the words specified by the CCW list
1747
1748 002122' 002405 000220 MWORD <CJS,J=500,SELC,MGC=220> ; 24
1749 002123' 000000 004020
1750 002124' 002500 350000 MWORD <CJP,J=35,CENA,CCCE> ; 25
1751 002125' 000400 160060
1752 002126' 002600 350000 MWORD <CJP,J=35,CENA,CCCP> ; 26
1753 002127' 000400 140060
1754 002130' 002700 310000 MWORD <CJP,J=31,CENA,CCCA> ; 27
1755 002131' 000400 000060
1756 002132' 003000 250000 MWORD <JMAP,J=25> ; 30
1757 002133' 000000 000040
1758 002134' 003100 000000 MWORD <CONT> ; 31
1759 002135' 000000 000340
1760 002136' 003200 002040 MWORD <CONT,S0A,A=4,D=1,OENA,SELF,MGC=40> ; 32
1761 002137' 401040 003340
1762 002140' 003300 000002 MWORD <CONT,S0B,PLUS,B=5,D=2,CRY,SELC,MGC=2> ; 33
1763 002141' 302002 404740
1764 002142' 003400 360000 MWORD <CJP,J=36,S0B,SMIN,B=6,D=2,CENA,CCFZ> ; 34
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 21-2
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1649
1765 002143' 312403 020060
1766 002144' 003500 250000 MWORD <JMAP,J=25> ; 35
1767 002145' 000000 000040
1768
1769 ; All done - set STOP and STORE (after a short delay to wait
1770 ; for channel to finish up the last data transfer).
1771
1772 002146' 003600 100000 MWORD <LDCT,J=10> ; 36
1773 002147' 000000 000300
1774 002150' 003700 370000 MWORD <RPCT,J=37> ; 37
1775 002151' 000000 000220
1776 002152' 004000 000140 MWORD <CONT,SELC,MGC=140> ; 40
1777 002153' 000000 004340
1778
1779 ; Finally, write bit 'RspQAV' in CSR to indicate we are done,
1780 ; and write word count to EBUF
1781
1782 002154' 004100 310200 MWORD <LDCT,J=31,SD0,OR,B=17,D=2,SKCN,MGC=200> ; 41
1783 002155' 732007 640300
1784 002156' 004200 420000 MWORD <RPCT,J=42,S0B,OR,B=17,D=5> ; 42
1785 002157' 335007 400220
1786 002160' 004300 002004 MWORD <CONT,S0A,A=17,OR,D=1,OENA,SELE,MGC=4> ; 43
1787 002161' 431170 005340
1788 002162' 004400 460040 MWORD <CJP,J=46,CENA,CCGC,SELE,MGC=40> ; 44
1789 002163' 000400 015060
1790 002164' 004500 440000 MWORD <JMAP,J=44> ; 45
1791 002165' 000000 000040
1792 002166' 004600 000200 MWORD <CONT,S0A,A=1,OR,D=1,SELE,MGC=200> ; 46
1793 002167' 431010 005340
1794 002170' 004700 002004 MWORD <CONT,S0A,OR,A=5,D=1,OENA,SELE,MGC=4> ; 47
1795 002171' 431050 005340
1796 002172' 005000 500000 MWORD <JMAP,J=50> ; 50
1797 002173' 000000 000040
1798
1799 ; Routine to read R4 and place in EBUF
1800
1801 002174' 030003 012004 MWORD <ADDR=300,JMAP,J=301,S0A,A=4,OR,OENA,D=1,SELE,MGC=4>
1802 002175' 431040 005040
1803 002176' 030103 010000 MWORD <JMAP,J=301> ; 301
1804 002177' 000000 000040
1805
1806 ; Delay
1807
1808 002200' 050000 100000 MWORD <ADDR=500,LDCT,J=10,D=1> ; 500
1809 002201' 001000 000300
1810 002202' 050105 010000 MWORD <RPCT,J=501,D=1> ; 501
1811 002203' 001000 000220
1812 002204' 050200 000000 MWORD <CRTN> ; 502
1813 002205' 000000 000240
1814
1815 ; Initialization
1816
1817 002206' 100000 000020 MWORD <ADDR=1000,JZ,SELM,MGC=20> ; 1000
1818 002207' 000000 002000
1819
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 21-3
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1650
1820 ; Initialization step
1821
1822 002210' 500050 010100 MWORD <ADDR=5000,JMAP,J=5001,SELC,MGC=100> ; 5000
1823 002211' 000000 004040
1824 002212' 500150 010020 MWORD <JMAP,J=5001,SELM,MGC=20> ; 5001
1825 002213' 000000 002040
1826 002214' 777777 777777 -1
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 22
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1651
1827
1828 ;#********************************************************************
1829 ;* Test 7 - CBUS to EBUS Data Transfer
1830 ;
1831 ; Description: This test does data transfers over the CBUS and
1832 ; EBUS concurrently. Data is read by the port over
1833 ; the CBUS, then transfered via an IOP deposit over
1834 ; the EBUS into the 2nd half of the buffer. Then
1835 ; a data compare of the data buffer is done to
1836 ; verify the result.
1837 ;
1838 ; Procedure: KL> Port Clear
1839 ; KL> Set up a CCW list to transfer 1 word
1840 ; KL> Start up port
1841 ; UC> Read word from CBUS and save as buffer address+256
1842 ; KL> Set up a CCW list to transfer 256 words
1843 ; KL> Start up port
1844 ; UC> Read word from CBUS and write over EBUS into 2nd
1845 ; half of buffer
1846 ; KL> When done, verify data transfer completed ok
1847 ;
1848 ; Repeat with data patterns 116-125
1849 ;
1850 ; Failure: ---
1851 ;#********************************************************************
1852
1853 ; Test data
1854
1855 002215' 254 00 0 00 002225' TSTC7: JRST TG7 ; go start test
1856 002216' 100604 000007 CBUS!NDMP!NDCB!ZCBUS!7 ; test mask
1857 002217' 002334' 013175' T7M,,[ASCIZ ^CBUS to EBUS Data Transfer^]
1858 002220' 013203' 013051' [EXP E1,E4,C1,C14,MLAST!C17],,[EXP C12,C5,C8,C4,MLAST!C2]
1859 002221' 000000 002517' TSTC10 ; failure test table
1860 002222' 000000000000# TSTC40 ; ...
1861 002223' 000000000000# TSTC41
1862 002224' 777777 777777 -1
1863
1864 ; Start test
1865
1866 002225' 201 00 0 00 000000' TG7: MOVEI Z9 ; get address of module start
1867 002226' 260 17 0 00 001622* GO TRACE ; handle trace output
1868 002227' 201 01 0 00 002334' MOVEI 1,T7M ; set up microcode address
1869 002230' 260 17 0 00 001713* GO TLOAD ; load/verify it
1870 002231' 263 17 0 00 000000 RTN ; failed - exit test
1871
1872 ; Initialization
1873
1874 002232' 400 15 0 00 000000 TL7: SETZ ERFLG, ; clear error flag
1875 002233' 201 06 0 00 002301' MOVEI 6,TS7 ; get test table address
1876 002234' 402 00 0 00 001630* SETZM TSTSUB ; initialize subtest number
1877 002235' 400 15 0 00 000000 SETZ ERFLG, ; clear error flag
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 23
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1652
1878
1879 ; Initialize the data transfer
1880
1881 002236' 260 17 0 00 001666* GO IPACLR ; clear port
1882 002237' 201 01 0 00 004000 MOVEI 1,4000 ; get start address
1883 002240' 242 01 0 00 000001 LSH 1,1 ; position correctly
1884 002241' 260 17 0 00 001764* GO LDRAR ; load the register
1885 002242' 201 01 0 00 000010 MOVEI 1,MPRUN ; get 'MPRUN' bit
1886 002243' 260 17 0 00 001770* GO LDCSR ; start up the port
1887
1888 ; Set up channel
1889
1890 002244' 201 01 0 00 000000# MOVEI 1,BUFF+^D256 ; get buffer address
1891 002245' 336 00 0 00 001672* SKIPN UDEBUG ; debug mode?
1892 002246' 257 01 0 01 000000 MAP 1,(1) ; no - map to physical
1893 002247' 621 01 0 00 777000 TLZ 1,777000 ; get rid of extraneous bits
1894 002250' 202 01 0 00 001116* MOVEM 1,BUFF ; save in buffer
1895 002251' 200 01 0 00 013210' MOVE 1,[CBUFSZ,,CBUF] ; get pointer to control buffer
1896 002252' 260 17 0 00 000000* GO CHINIT ; initialize software
1897 002253' 551 01 0 00 002250* HRRZI 1,BUFF ; buffer address
1898 002254' 201 02 0 00 000001 MOVEI 2,1 ; word count
1899 002255' 400 03 0 00 000000 SETZ 3, ; clear zero fill specifier
1900 002256' 260 17 0 00 000000* GO GENCCW ; generate a CCW list
1901
1902 ; Do the data transfer
1903
1904 002257' 260 17 0 00 002236* GO IPACLR ; clear the port
1905 002260' 201 01 0 00 004002 MOVEI 1,4002 ; get start address
1906 002261' 242 01 0 00 000001 LSH 1,1 ; position correctly
1907 002262' 260 17 0 00 002241* GO LDRAR ; load the register
1908 002263' 201 01 0 00 000010 MOVEI 1,MPRUN ; get 'MPRUN' bit
1909 002264' 260 17 0 00 002243* GO LDCSR ; start up the port
1910 002265' 201 00 0 00 000010 MOVEI 10 ; set up 10ms wait
1911 002266' 260 17 0 00 000000* GO ODELAY ; wait a bit
1912
1913 ; Loop on test execute table entries
1914
1915 002267' 260 17 0 00 002257* TA7: GO IPACLR ; clear port
1916 002270' 260 17 0 00 001633* TB7: GO CEXEC ; execute table entry
1917 002271' 254 00 0 00 002300' JRST TX7 ; end of test execute table
1918 002272' 254 00 0 00 002270' JRST TB7 ; keep looping after call
1919 002273' 474 15 0 00 000000 SETO ERFLG, ; error occurred
1920
1921 ; Handle error printouts and scope looping
1922
1923 002274' 027 00 0 00 002321' SCOPER MA7 ; print error message
1924 002275' 254 00 0 00 002232' JRST TL7 ; loop on error
1925 002276' 254 00 0 00 002300' JRST TX7 ; altmode exit
1926 002277' 322 15 0 00 002267' JUMPE ERFLG,TA7 ; do next test execute table entry
1927
1928 ; End of test
1929
1930 002300' 263 17 0 00 000000 TX7: RTN ; return
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 24
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1653
1931
1932 ; Test Execute Entries
1933
1934 002301' 240000 002311' TS7: CTABLE (CCALL,TS7SE) ; set up initial data pattern
1935 002302' 300000 002314' TS7A: CTABLE (CCALLC,TS7IN) ; increment data pattern
1936 002303' 140000 001000 CTABLE (CSETRW,0,^D512) ; set up read/write (512 words)
1937 002304' 200000 001000 CTABLE (CSTART,1000) ; start up port
1938 002305' 340100 000000 CTABLE (CWAIT,100,0) ; check if completed
1939 002306' 400000 000000 CTABLE (CCOMP) ; compare buffer
1940 002307' 440000 002302' CTABLE (CJRST,TS7A) ; loop till done
1941 002310' 000000 000000 CTABLE (CLAST) ; end of table
1942
1943 ; Initialize data pattern selection
1944
1945 002311' 201 00 0 00 000115 TS7SE: MOVEI 115 ; get initial pattern
1946 002312' 202 00 0 00 001667* MOVEM CPAT ; save data pattern
1947 002313' 263 17 0 00 000000 RTN ; return
1948
1949 ; Increment data pattern
1950
1951 002314' 350 01 0 00 002312* TS7IN: AOS 1,CPAT ; increment data pattern
1952 002315' 260 17 0 00 002267* GO IPACLR ; do a 'port clear'
1953 002316' 307 01 0 00 000125 CAIG 1,125 ; done with test yet?
1954 002317' 350 00 0 17 000000 AOS (P) ; no - set up proper return
1955 002320' 263 17 0 00 000000 RTN ; return
1956
1957 ; Error messages
1958
1959 002321' 140000 013027' MA7: MSG!TXNOT![ASCIZ /Data transfer test error detected/]
1960 002322' 240000 002324' CALL!TXNOT!MA7CHE ; check for data compare error
1961 002323' 000000000000# LAST!CALL!TXALL!CCPNT ; print test data
1962
1963 002324' 336 00 0 00 002020* MA7CHE: SKIPN CDERR ; data compare error?
1964 002325' 263 17 0 00 000000 RTN ; no - return
1965 002326' 201 01 0 00 000003 MOVEI 1,3 ; get transfer type
1966 002327' 201 02 0 00 001000 MOVEI 2,^D512 ; get transfer length
1967 002330' 200 14 0 00 002314* MOVE PAT,CPAT ; get data pattern
1968 002331' 260 17 0 00 002017* GO BUFCOM ; compare the data
1969 002332' 402 00 0 00 002324* SETZM CDERR ; don't report these in CCPNT
1970 002333' 263 17 0 00 000000 RTN ; return
1971
1972 ; Microcode - Read a word into R3 and write to 2nd half of buffer
1973
1974 002334' 000000 020000 T7M: MWORD <ADDR=0,CJP,J=2,CENA,CCCA> ; 0
1975 002335' 000400 000060
1976 002336' 000100 000000 MWORD <JZ> ; 1
1977 002337' 000000 000000
1978 002340' 000200 000004 MWORD <CONT,SELC,MGC=4> ; 2
1979 002341' 000000 004340
1980 002342' 000300 000200 MWORD <CONT,SD0,OR,B=3,D=2,SELM,MGC=200> ; 3
1981 002343' 732001 402340
1982
1983 002344' 000400 002004 MWORD <CONT,SAB,OR,D=1,A=15,B=16,OENA,SELE,MGC=4> ; 4
1984 002345' 131157 005340
1985 002346' 000500 000001 MWORD <CONT,S0B,PLUS,B=17,D=2,CRY,SELE,MGC=1> ; 5
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 24-1
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1654
1986 002347' 302007 405740
1987 002350' 000600 100000 MWORD <CJP,J=10,CENA,CCER> ; 6
1988 002351' 000400 100060
1989 002352' 000700 060000 MWORD <JMAP,J=6> ; 7
1990 002353' 000000 000040
1991 002354' 001000 002004 MWORD <CONT,S0A,OR,A=3,D=1,SELE,MGC=4,OENA> ; 10
1992 002355' 431030 005340
1993 002356' 001101 000020 MWORD <CJS,J=100,S0B,PLUS,B=15,CRY,D=2,SELE,MGC=20> ; 11
1994 002357' 302006 405420
1995
1996 002360' 001200 000000 MWORD <RPCT,J=0> ; 12
1997 002361' 000000 000220
1998
1999 ; All done - set STOP and STORE
2000
2001 002362' 001300 000140 MWORD <CONT,SELC,MGC=140> ; 13
2002 002363' 000000 004340
2003
2004 ; Finally, write bit 'RspQAV' in CSR to indicate we are done,
2005 ; and write word count to EBUF
2006
2007 002364' 001400 310200 MWORD <LDCT,J=31,SD0,OR,B=17,D=2,SKCN,MGC=200> ; 14
2008 002365' 732007 640300
2009 002366' 001500 150000 MWORD <RPCT,J=15,S0B,OR,B=17,D=5> ; 15
2010 002367' 335007 400220
2011 002370' 001600 002004 MWORD <CONT,S0A,A=17,OR,D=1,OENA,SELE,MGC=4> ; 16
2012 002371' 431170 005340
2013 002372' 001700 210040 MWORD <CJP,J=21,CENA,CCGC,SELE,MGC=40> ; 17
2014 002373' 000400 015060
2015 002374' 002000 170000 MWORD <JMAP,J=17> ; 20
2016 002375' 000000 000040
2017 002376' 002100 000200 MWORD <CONT,S0A,A=1,OR,D=1,SELE,MGC=200> ; 21
2018 002377' 431010 005340
2019 002400' 002200 002004 MWORD <CONT,S0A,OR,A=5,D=1,OENA,SELE,MGC=4> ; 22
2020 002401' 431050 005340
2021 002402' 002300 230000 MWORD <JMAP,J=23> ; 23
2022 002403' 000000 000040
2023
2024 ; Delay
2025
2026 002404' 010000 000000 MWORD <ADDR=100,CONT> ; 100
2027 002405' 000000 000340
2028 002406' 010100 000000 MWORD <CONT> ; 101
2029 002407' 000000 000340
2030 002410' 010200 000000 MWORD <CONT> ; 102
2031 002411' 000000 000340
2032 002412' 010300 000000 MWORD <CONT> ; 103
2033 002413' 000000 000340
2034 002414' 010400 000000 MWORD <CONT> ; 104
2035 002415' 000000 000340
2036 002416' 010500 000000 MWORD <CONT> ; 105
2037 002417' 000000 000340
2038 002420' 010600 000000 MWORD <CONT> ; 106
2039 002421' 000000 000340
2040 002422' 010700 000000 MWORD <CONT> ; 107
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 24-2
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1655
2041 002423' 000000 000340
2042 002424' 011000 000000 MWORD <CONT> ; 110
2043 002425' 000000 000340
2044 002426' 011100 000000 MWORD <CONT> ; 111
2045 002427' 000000 000340
2046 002430' 011200 000000 MWORD <CONT> ; 112
2047 002431' 000000 000340
2048 002432' 011300 000000 MWORD <CONT> ; 113
2049 002433' 000000 000340
2050 002434' 011400 000000 MWORD <CONT> ; 114
2051 002435' 000000 000340
2052 002436' 011500 000000 MWORD <CONT> ; 115
2053 002437' 000000 000340
2054 002440' 011600 000000 MWORD <CONT> ; 116
2055 002441' 000000 000340
2056 002442' 011700 000000 MWORD <CONT> ; 117
2057 002443' 000000 000340
2058 002444' 012000 000000 MWORD <CONT> ; 120
2059 002445' 000000 000340
2060 002446' 012100 000000 MWORD <CONT> ; 121
2061 002447' 000000 000340
2062 002450' 012200 000000 MWORD <CONT> ; 122
2063 002451' 000000 000340
2064 002452' 012300 000000 MWORD <CRTN> ; 123
2065 002453' 000000 000240
2066
2067 ; Initialization
2068
2069 002454' 100010 010020 MWORD <ADDR=1000,JMAP,J=1001,SELM,MGC=20> ; 1000
2070 002455' 000000 002040
2071 002456' 100103 770004 MWORD <LDCT,J=377,S0A,A=14,B=15,OR,D=2,SELC,MGC=4> ; 1001
2072 002457' 432146 404300
2073 002460' 100200 000200 MWORD <JZ,SELC,MGC=200> ; 1002
2074 002461' 000000 004000
2075
2076 ; Initialization step to read buffer address into R14,R15 and
2077 ; put IOP word (left half) into R16
2078
2079 002462' 400040 010100 MWORD <ADDR=4000,JMAP,J=4001,SELC,MGC=100> ; 4000
2080 002463' 000000 004040
2081 002464' 400140 010020 MWORD <JMAP,J=4001,SELM,MGC=20> ; 4001
2082 002465' 000000 002040
2083 002466' 400240 030200 MWORD <JMAP,J=4003,SELC,MGC=200> ; 4002
2084 002467' 000000 004040
2085 002470' 400340 050000 MWORD <CJP,J=4005,CENA,CCCA> ; 4003
2086 002471' 000400 000060
2087 002472' 400440 030000 MWORD <JMAP,J=4003> ; 4004
2088 002473' 000000 000040
2089 002474' 400500 000004 MWORD <CONT,SELC,MGC=4> ; 4005
2090 002475' 000000 004340
2091 002476' 400600 000200 MWORD <CONT,SD0,OR,B=15,D=2,SELM,MGC=200> ; 4006
2092 002477' 732006 402340
2093 002500' 400700 000000 MWORD <CONT,S0A,OR,A=15,B=14,D=2> ; 4007
2094 002501' 432156 000340
2095 002502' 401000 320450 MWORD <LDCT,J=32,SD0,OR,B=16,D=2,SKCN,MGC=450> ; 4010
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 24-3
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1656
2096 002503' 732007 240300
2097 002504' 401140 110000 MWORD <RPCT,J=4011,S0B,B=16,OR,D=7> ; 4011
2098 002505' 337007 000220
2099 002506' 401200 000140 MWORD <CONT,SELC,MGC=140> ; 4012
2100 002507' 000000 004340
2101 002510' 401340 130000 MWORD <JMAP,J=4013,S0B,B=17,AND,D=2> ; 4013
2102 002511' 342007 400040
2103
2104 ; Initialization step
2105
2106 002512' 500050 010100 MWORD <ADDR=5000,JMAP,J=5001,SELC,MGC=100> ; 5000
2107 002513' 000000 004040
2108 002514' 500150 010020 MWORD <JMAP,J=5001,SELM,MGC=20> ; 5001
2109 002515' 000000 002040
2110 002516' 777777 777777 -1
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 25
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1657
2111
2112 ;#********************************************************************
2113 ;* Test 10 - EBUS to CBUS Data Transfer
2114 ;
2115 ; Description: This test does data transfers over the CBUS and
2116 ; EBUS concurrently. Data is read by the port over
2117 ; the EBUS via an IOP examine, then transfered over
2118 ; the CBUS into the 1st half of the buffer. Then
2119 ; a data compare of the data buffer is done to
2120 ; verify the result.
2121 ;
2122 ; Procedure: KL> Port Clear
2123 ; KL> Set up a CCW list to transfer 1 word
2124 ; KL> Start up port
2125 ; UC> Read word from CBUS and save as buffer address+256
2126 ; KL> Set up a CCW list to transfer 256 words
2127 ; KL> Start up port
2128 ; UC> Read word from EBUS and write over CBUS into 1st
2129 ; half of buffer
2130 ; KL> When done, verify data transfer completed ok
2131 ;
2132 ; Repeat with data patterns 116-125
2133 ;
2134 ; Failure: ---
2135 ;#********************************************************************
2136
2137 ; Test data
2138
2139 002517' 254 00 0 00 002526' TSTC10: JRST TG10 ; go start test
2140 002520' 100604 000010 CBUS!NDMP!NDCB!ZCBUS!10 ; test mask
2141 002521' 002645' 013211' T10M,,[ASCIZ ^EBUS to CBUS Data Transfer^]
2142 002522' 013217' 013051' [EXP E1,E4,C1,C15,MLAST!C16],,[EXP C12,C5,C8,C4,MLAST!C2]
2143 002523' 000000000000# TSTC40 ; failure test table
2144 002524' 000000000000# TSTC41 ; ...
2145 002525' 777777 777777 -1
2146
2147 ; Start test
2148
2149 002526' 201 00 0 00 000000' TG10: MOVEI Z9 ; get address of module start
2150 002527' 260 17 0 00 002226* GO TRACE ; handle trace output
2151 002530' 201 01 0 00 002645' MOVEI 1,T10M ; set up microcode address
2152 002531' 260 17 0 00 002230* GO TLOAD ; load/verify it
2153 002532' 263 17 0 00 000000 RTN ; failed - exit test
2154
2155 ; Initialization
2156
2157 002533' 400 15 0 00 000000 TL10: SETZ ERFLG, ; clear error flag
2158 002534' 201 06 0 00 002602' MOVEI 6,TS10 ; get test table address
2159 002535' 402 00 0 00 002234* SETZM TSTSUB ; initialize subtest number
2160 002536' 400 15 0 00 000000 SETZ ERFLG, ; clear error flag
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 26
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1658
2161
2162 ; Initialize the data transfer
2163
2164 002537' 260 17 0 00 002315* GO IPACLR ; clear port
2165 002540' 201 01 0 00 004000 MOVEI 1,4000 ; get start address
2166 002541' 242 01 0 00 000001 LSH 1,1 ; position correctly
2167 002542' 260 17 0 00 002262* GO LDRAR ; load the register
2168 002543' 201 01 0 00 000010 MOVEI 1,MPRUN ; get 'MPRUN' bit
2169 002544' 260 17 0 00 002264* GO LDCSR ; start up the port
2170
2171 ; Set up channel
2172
2173 002545' 201 01 0 00 000000# MOVEI 1,BUFF+^D256 ; get buffer address
2174 002546' 336 00 0 00 002245* SKIPN UDEBUG ; debug mode?
2175 002547' 257 01 0 01 000000 MAP 1,(1) ; no - map to physical
2176 002550' 621 01 0 00 777000 TLZ 1,777000 ; get rid of extraneous bits
2177 002551' 202 01 0 00 002253* MOVEM 1,BUFF ; save in buffer
2178 002552' 200 01 0 00 013210' MOVE 1,[CBUFSZ,,CBUF] ; get pointer to control buffer
2179 002553' 260 17 0 00 002252* GO CHINIT ; initialize software
2180 002554' 551 01 0 00 002551* HRRZI 1,BUFF ; buffer address
2181 002555' 201 02 0 00 000001 MOVEI 2,1 ; word count
2182 002556' 400 03 0 00 000000 SETZ 3, ; clear zero fill specifier
2183 002557' 260 17 0 00 002256* GO GENCCW ; generate a CCW list
2184
2185 ; Do the data transfer
2186
2187 002560' 260 17 0 00 002537* GO IPACLR ; clear the port
2188 002561' 201 01 0 00 004002 MOVEI 1,4002 ; get start address
2189 002562' 242 01 0 00 000001 LSH 1,1 ; position correctly
2190 002563' 260 17 0 00 002542* GO LDRAR ; load the register
2191 002564' 201 01 0 00 000010 MOVEI 1,MPRUN ; get 'MPRUN' bit
2192 002565' 260 17 0 00 002544* GO LDCSR ; start up the port
2193 002566' 201 00 0 00 000010 MOVEI 10 ; set up 10ms wait
2194 002567' 260 17 0 00 002266* GO ODELAY ; wait a bit
2195
2196 ; Loop on test execute table entries
2197
2198 002570' 260 17 0 00 002560* TA10: GO IPACLR ; clear port
2199 002571' 260 17 0 00 002270* TB10: GO CEXEC ; execute table entry
2200 002572' 254 00 0 00 002601' JRST TX10 ; end of test execute table
2201 002573' 254 00 0 00 002571' JRST TB10 ; keep looping after call
2202 002574' 474 15 0 00 000000 SETO ERFLG, ; error occurred
2203
2204 ; Handle error printouts and scope looping
2205
2206 002575' 027 00 0 00 002632' SCOPER MA10 ; print error message
2207 002576' 254 00 0 00 002533' JRST TL10 ; loop on error
2208 002577' 254 00 0 00 002601' JRST TX10 ; altmode exit
2209 002600' 322 15 0 00 002570' JUMPE ERFLG,TA10 ; do next test execute table entry
2210
2211 ; End of test
2212
2213 002601' 263 17 0 00 000000 TX10: RTN ; return
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 27
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1659
2214
2215 ; Test Execute Entries
2216
2217 002602' 240000 002613' TS10: CTABLE (CCALL,TS10SE) ; set up initial data pattern
2218 002603' 300000 002616' TS10A: CTABLE (CCALLC,TS10IN) ; increment data pattern
2219 002604' 140000 001000 CTABLE (CSETRW,0,^D512) ; set up read/write (512 words)
2220 002605' 240000 002623' CTABLE (CCALL,TS10SW) ; swap buffer halves
2221 002606' 200000 001000 CTABLE (CSTART,1000) ; start up port
2222 002607' 340100 000000 CTABLE (CWAIT,100,0) ; check if completed
2223 002610' 400000 000000 CTABLE (CCOMP) ; compare buffer
2224 002611' 440000 002603' CTABLE (CJRST,TS10A) ; loop till done
2225 002612' 000000 000000 CTABLE (CLAST) ; end of table
2226
2227 ; Initialize data pattern selection
2228
2229 002613' 201 00 0 00 000115 TS10SE: MOVEI 115 ; get initial pattern
2230 002614' 202 00 0 00 002330* MOVEM CPAT ; save data pattern
2231 002615' 263 17 0 00 000000 RTN ; return
2232
2233 ; Increment data pattern
2234
2235 002616' 350 01 0 00 002614* TS10IN: AOS 1,CPAT ; increment data pattern
2236 002617' 260 17 0 00 002570* GO IPACLR ; do a 'port clear'
2237 002620' 307 01 0 00 000126 CAIG 1,126 ; done with test yet?
2238 002621' 350 00 0 17 000000 AOS (P) ; no - set up proper return
2239 002622' 263 17 0 00 000000 RTN ; return
2240
2241 ; Swap buffer halves
2242
2243 002623' 200 00 0 00 013224' TS10SW: MOVE [BUFF,,BUFF+400] ; move first 256 words of buffer
2244 002624' 251 00 0 00 000000# BLT BUFF+777 ; into 2nd half of buffer
2245 002625' 200 00 0 00 013225' MOVE [400000,,1] ; initialize first half of buffer
2246 002626' 202 00 0 00 002554* MOVEM BUFF ; now
2247 002627' 200 00 0 00 013226' MOVE [BUFF,,BUFF+1] ; ...
2248 002630' 251 00 0 00 000000# BLT BUFF+377 ; ...
2249 002631' 263 17 0 00 000000 RTN ; return
2250
2251 ; Error messages
2252
2253 002632' 140000 013027' MA10: MSG!TXNOT![ASCIZ /Data transfer test error detected/]
2254 002633' 240000 002635' CALL!TXNOT!MA10CH ; check for data compare error
2255 002634' 000000000000# LAST!CALL!TXALL!CCPNT ; print test data
2256
2257 002635' 336 00 0 00 002332* MA10CH: SKIPN CDERR ; data compare error?
2258 002636' 263 17 0 00 000000 RTN ; no - return
2259 002637' 201 01 0 00 000003 MOVEI 1,3 ; get transfer type
2260 002640' 201 02 0 00 000400 MOVEI 2,^D256 ; get transfer length
2261 002641' 200 14 0 00 002616* MOVE PAT,CPAT ; get data pattern
2262 002642' 260 17 0 00 002331* GO BUFCOM ; compare the data
2263 002643' 402 00 0 00 002635* SETZM CDERR ; don't report these in CCPNT
2264 002644' 263 17 0 00 000000 RTN ; return
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 28
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1660
2265
2266 ; Microcode - Read a word into R3 and write to 1st half of buffer
2267
2268 002645' 000003 770000 T10M: MWORD <ADDR=0,LDCT,J=377,S0B,B=17,AND,D=2> ; 0
2269 002646' 342007 400300
2270
2271 002647' 000100 002004 MWORD <CONT,SAB,OR,D=1,A=15,B=16,OENA,SELE,MGC=4> ; 1
2272 002650' 131157 005340
2273 002651' 000200 000001 MWORD <CONT,S0B,PLUS,B=15,D=2,CRY,SELE,MGC=1> ; 2
2274 002652' 302006 405740
2275 002653' 000300 050000 MWORD <CJP,J=5,CENA,CCER> ; 3
2276 002654' 000400 100060
2277 002655' 000400 030000 MWORD <JMAP,J=3> ; 4
2278 002656' 000000 000040
2279 002657' 000500 000010 MWORD <CONT,SD0,OR,B=3,D=2,SELE,MGC=10> ; 5
2280 002660' 732001 405340
2281
2282 002661' 000600 100000 MWORD <CJP,J=10,CENA,CCCA> ; 6
2283 002662' 000400 000060
2284 002663' 000700 060000 MWORD <JMAP,J=6> ; 7
2285 002664' 000000 000040
2286 002665' 001000 002040 MWORD <CONT,S0B,B=3,OR,D=1,OENA,SELF,MGC=40> ; 10
2287 002666' 331001 403340
2288 002667' 001101 000002 MWORD <CJS,J=100,D=1,SELC,MGC=2> ; 11
2289 002670' 001000 004020
2290
2291 002671' 001200 010000 MWORD <RPCT,J=1,S0B,B=17,PLUS,CRY,D=2> ; 12
2292 002672' 302007 400620
2293
2294 ; All done - set STOP and STORE (after a short delay to wait
2295 ; for channel to finish up the last data transfer).
2296
2297 002673' 001300 100000 MWORD <LDCT,J=10> ; 13
2298 002674' 000000 000300
2299 002675' 001400 140000 MWORD <RPCT,J=14> ; 14
2300 002676' 000000 000220
2301 002677' 001500 000140 MWORD <CONT,SELC,MGC=140> ; 15
2302 002700' 000000 004340
2303
2304 ; Finally, write bit 'RspQAV' in CSR to indicate we are done,
2305 ; and write word count to EBUF
2306
2307 002701' 001600 310200 MWORD <LDCT,J=31,SD0,OR,B=17,D=2,SKCN,MGC=200> ; 16
2308 002702' 732007 640300
2309 002703' 001700 170000 MWORD <RPCT,J=17,S0B,OR,B=17,D=5> ; 17
2310 002704' 335007 400220
2311 002705' 002000 002004 MWORD <CONT,S0A,A=17,OR,D=1,OENA,SELE,MGC=4> ; 20
2312 002706' 431170 005340
2313 002707' 002100 230040 MWORD <CJP,J=23,CENA,CCGC,SELE,MGC=40> ; 21
2314 002710' 000400 015060
2315 002711' 002200 210000 MWORD <JMAP,J=21> ; 22
2316 002712' 000000 000040
2317 002713' 002300 000200 MWORD <CONT,S0A,A=1,OR,D=1,SELE,MGC=200> ; 23
2318 002714' 431010 005340
2319 002715' 002400 002004 MWORD <CONT,S0A,OR,A=5,D=1,OENA,SELE,MGC=4> ; 24
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 28-1
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1661
2320 002716' 431050 005340
2321 002717' 002500 250000 MWORD <JMAP,J=25> ; 25
2322 002720' 000000 000040
2323
2324 ; Delay
2325
2326 002721' 010000 000000 MWORD <ADDR=100,CONT> ; 100
2327 002722' 000000 000340
2328 002723' 010100 000000 MWORD <CONT> ; 101
2329 002724' 000000 000340
2330 002725' 010200 000000 MWORD <CONT> ; 102
2331 002726' 000000 000340
2332 002727' 010300 000000 MWORD <CONT> ; 103
2333 002730' 000000 000340
2334 002731' 010400 000000 MWORD <CONT> ; 104
2335 002732' 000000 000340
2336 002733' 010500 000000 MWORD <CONT> ; 105
2337 002734' 000000 000340
2338 002735' 010600 000000 MWORD <CONT> ; 106
2339 002736' 000000 000340
2340 002737' 010700 000000 MWORD <CONT> ; 107
2341 002740' 000000 000340
2342 002741' 011000 000000 MWORD <CONT> ; 110
2343 002742' 000000 000340
2344 002743' 011100 000000 MWORD <CONT> ; 111
2345 002744' 000000 000340
2346 002745' 011200 000000 MWORD <CONT> ; 112
2347 002746' 000000 000340
2348 002747' 011300 000000 MWORD <CONT> ; 113
2349 002750' 000000 000340
2350 002751' 011400 000000 MWORD <CONT> ; 114
2351 002752' 000000 000340
2352 002753' 011500 000000 MWORD <CONT> ; 115
2353 002754' 000000 000340
2354 002755' 011600 000000 MWORD <CONT> ; 116
2355 002756' 000000 000340
2356 002757' 011700 000000 MWORD <CONT> ; 117
2357 002760' 000000 000340
2358 002761' 012000 000000 MWORD <CONT> ; 120
2359 002762' 000000 000340
2360 002763' 012100 000000 MWORD <CONT> ; 121
2361 002764' 000000 000340
2362 002765' 012200 000000 MWORD <CONT> ; 122
2363 002766' 000000 000340
2364 002767' 012300 000000 MWORD <CRTN> ; 123
2365 002770' 000000 000240
2366
2367 ; Initialization
2368
2369 002771' 100010 010020 MWORD <ADDR=1000,JMAP,J=1001,SELM,MGC=20> ; 1000
2370 002772' 000000 002040
2371 002773' 100100 000004 MWORD <CONT,S0A,A=14,B=15,OR,D=2,SELC,MGC=4> ; 1001
2372 002774' 432146 404340
2373 002775' 100200 000220 MWORD <JZ,SELC,MGC=220> ; 1002
2374 002776' 000000 004000
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 28-2
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1662
2375
2376 ; Initialization step to read buffer address into R14,R15 and
2377 ; put IOP word (left half) into R16
2378
2379 002777' 400040 010100 MWORD <ADDR=4000,JMAP,J=4001,SELC,MGC=100> ; 4000
2380 003000' 000000 004040
2381 003001' 400140 010020 MWORD <JMAP,J=4001,SELM,MGC=20> ; 4001
2382 003002' 000000 002040
2383 003003' 400240 030200 MWORD <JMAP,J=4003,SELC,MGC=200> ; 4002
2384 003004' 000000 004040
2385 003005' 400340 050000 MWORD <CJP,J=4005,CENA,CCCA> ; 4003
2386 003006' 000400 000060
2387 003007' 400440 030000 MWORD <JMAP,J=4003> ; 4004
2388 003010' 000000 000040
2389 003011' 400500 000004 MWORD <CONT,SELC,MGC=4> ; 4005
2390 003012' 000000 004340
2391 003013' 400600 000200 MWORD <CONT,SD0,OR,B=15,D=2,SELM,MGC=200> ; 4006
2392 003014' 732006 402340
2393 003015' 400700 000000 MWORD <CONT,S0A,OR,A=15,B=14,D=2> ; 4007
2394 003016' 432156 000340
2395 003017' 401000 320440 MWORD <LDCT,J=32,SD0,OR,B=16,D=2,SKCN,MGC=440> ; 4010
2396 003020' 732007 240300
2397 003021' 401140 110000 MWORD <RPCT,J=4011,S0B,B=16,OR,D=7> ; 4011
2398 003022' 337007 000220
2399 003023' 401200 000140 MWORD <CONT,SELC,MGC=140> ; 4012
2400 003024' 000000 004340
2401 003025' 401340 130000 MWORD <JMAP,J=4013,S0B,B=17,AND,D=2> ; 4013
2402 003026' 342007 400040
2403
2404 ; Initialization step
2405
2406 003027' 500050 010100 MWORD <ADDR=5000,JMAP,J=5001,SELC,MGC=100> ; 5000
2407 003030' 000000 004040
2408 003031' 500150 010020 MWORD <JMAP,J=5001,SELM,MGC=20> ; 5001
2409 003032' 000000 002040
2410 003033' 777777 777777 -1
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 29
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1663
2411
2412 ;#********************************************************************
2413 ;* Test 11 - Fmtr Cleared by 'Port Clear'
2414 ;
2415 ; Description: A 'Port Clear' should clear the contents of the
2416 ; Mover/Formatter. This test verifies this.
2417 ;
2418 ; Procedure: KL> Port Clear
2419 ; UC> Read FMTR, place data in 2901's
2420 ; UC> Move data from 2901's to EBUF
2421 ; KL> Read EBUF and verify the data is zero
2422 ;
2423 ; Failure: ---
2424 ;#********************************************************************
2425
2426 ; Test data
2427
2428 003034' 254 00 0 00 003045' TSTC11: JRST TG11 ; go start test
2429 003035' 100604 000011 CBUS!NDMP!NDCB!ZCBUS!11 ; test mask
2430 003036' 003074' 013227' T11M,,[ASCIZ ^Fmtr Cleared by 'Port Clear'^]
2431 003037' 013235' 013237' [EXP C20,MLAST!C4],,[EXP C12,C8,C18,C23,C24,C3,MLAST!C2]
2432 003040' 000000 001044' TSTC3 ; failure test table
2433 003041' 000000 001152' TSTC4 ; ...
2434 003042' 000000 001275' TSTC5
2435 003043' 000000 001612' TSTC6
2436 003044' 777777 777777 -1
2437
2438 ; Start test
2439
2440 003045' 201 00 0 00 000000' TG11: MOVEI Z9 ; get address of module start
2441 003046' 260 17 0 00 002527* GO TRACE ; handle trace output
2442 003047' 201 01 0 00 003074' MOVEI 1,T11M ; set up microcode address
2443 003050' 260 17 0 00 002531* GO TLOAD ; load/verify it
2444 003051' 263 17 0 00 000000 RTN ; failed - exit test
2445
2446 ; Initialization
2447
2448 003052' 400 15 0 00 000000 TL11: SETZ ERFLG, ; clear error flag
2449 003053' 260 17 0 00 002617* GO IPACLR ; clear port
2450 003054' 402 00 0 00 002535* SETZM TSTSUB ; initialize subtest number
2451 003055' 201 06 0 00 003067' MOVEI 6,TS11 ; get sstep table address
2452
2453 ; Loop on single step table entries
2454
2455 003056' 260 17 0 00 000657* TA11: GO BEXEC ; execute table entry
2456 003057' 254 00 0 00 003066' JRST TX11 ; end of sstep table
2457 003060' 254 00 0 00 003056' JRST TA11 ; keep looping after call
2458 003061' 474 15 0 00 000000 SETO ERFLG, ; error - EBUF data incorrect
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 30
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1664
2459
2460 ; Handle error printouts and scope looping
2461
2462 003062' 027 00 0 00 003072' SCOPER MA11 ; print error message
2463 003063' 254 00 0 00 003052' JRST TL11 ; loop on error
2464 003064' 254 00 0 00 003066' JRST TX11 ; altmode exit
2465 003065' 322 15 0 00 003056' JUMPE ERFLG,TA11 ; do next sstep table entry
2466
2467 ; End of test
2468
2469 003066' 263 17 0 00 000000 TX11: RTN ; return
2470
2471 ; Sstep table, with EBUF data, as: (CMD,#Steps,Start addr,End Addr,EBUF data)
2472
2473 003067' 100200 000001 TS11: ATABLE (SSSTRT,2,0,1,0)
2474 003070' 000000 000000
2475 003071' 000000 000000 ATABLE (SSLAST)
2476
2477 ; Error messages
2478
2479 003072' 140000 013246' MA11: MSG!TXNOT![ASCIZ /Fmtr not cleared by a 'Port Clear'/]
2480 003073' 000000000000# LAST!CALL!TXALL!BBPNT ; print sequencer data
2481
2482 ; Microcode:
2483
2484 003074' 000000 010200 T11M: MWORD <ADDR=0,JMAP,J=1,SD0,OR,D=2,SELM,MGC=200>
2485 003075' 732000 002040
2486 003076' 000100 012004 MWORD <JMAP,J=1,S0A,OR,D=1,OENA,SELE,MGC=4> ; 1
2487 003077' 431000 005040
2488 003100' 777777 777777 -1
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 31
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1665
2489
2490 ;#********************************************************************
2491 ;* Test 12 - Fmtr Basic Up Shifting Test
2492 ;
2493 ; Description: Verify that the Mover/Formatter is capable of
2494 ; being shifted up. The contents of the formatter
2495 ; is initially zero, and the result of any shifting
2496 ; should be zero.
2497 ;
2498 ; Procedure: KL> Port Clear
2499 ; UC> Shift formatter 4 bits up
2500 ; UC> Read formatter data
2501 ; UC> If zero, continue.
2502 ; If non-zero, halt with a CRAM PE and leave
2503 ; the non-zero data read in the EBUF.
2504 ; KL> Let it run at full speed for 1/2 second then
2505 ; halt and verify that no CRAM PE occurred and
2506 ; that the microcode did not stop at the error
2507 ; location.
2508 ;
2509 ; Failure: ---
2510 ;#********************************************************************
2511
2512 ; Test data
2513
2514 003101' 254 00 0 00 003112' TSTC12: JRST TG12 ; go start test
2515 003102' 100604 000012 CBUS!NDMP!NDCB!ZCBUS!12 ; test mask
2516 003103' 003175' 013255' T12M,,[ASCIZ ^Fmtr Basic Up Shifting Test^]
2517 003104' 013263' 012716' [EXP C20,C12,MLAST!C8],,[EXP C4,MLAST!C2]
2518 003105' 000000 003210' TSTC13 ; failure test table
2519 003106' 000000 003510' TSTC14 ; ...
2520 003107' 000000 006754' TSTC25
2521 003110' 000000 007062' TSTC26
2522 003111' 777777 777777 -1
2523
2524 ; Start test
2525
2526 003112' 201 00 0 00 000000' TG12: MOVEI Z9 ; get address of module start
2527 003113' 260 17 0 00 003046* GO TRACE ; handle trace output
2528 003114' 201 01 0 00 003175' MOVEI 1,T12M ; set up microcode address
2529 003115' 260 17 0 00 003050* GO TLOAD ; load/verify it
2530 003116' 263 17 0 00 000000 RTN ; failed - exit test
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 32
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1666
2531
2532 ; 1st segment of test (Segment A) - Start up port
2533
2534 003117' 400 15 0 00 000000 TA12: SETZ ERFLG, ; clear error flag
2535 003120' 201 00 0 00 000001 MOVEI 1 ; initialize subtest number
2536 003121' 202 00 0 00 003054* MOVEM TSTSUB ; to 1
2537 003122' 260 17 0 00 003053* GO IPACLR ; issue a port clear
2538 003123' 402 00 0 00 000000* SETZM SNEXT ; set up start location
2539 003124' 201 00 0 00 000010 MOVEI 10 ; get a 10
2540 003125' 202 00 0 00 000000* MOVEM SDATA ; set up start CSR data
2541 003126' 260 17 0 00 000000* GO IPASRT ; start up the port
2542 003127' 474 15 0 00 000000 SETO ERFLG, ; failed - error reading/writing CSR
2543 003130' 474 15 0 00 000000 SETO ERFLG, ; failed - port already running
2544 003131' 474 15 0 00 000000 SETO ERFLG, ; failed - error bits set in CSR
2545 003132' 027 00 0 00 003155' SCOPER MA12 ; print error message
2546 003133' 254 00 0 00 003117' JRST TA12 ; loop on error
2547 003134' 254 00 0 00 003154' JRST TX12 ; altmode exit
2548 003135' 326 15 0 00 003154' JUMPN ERFLG,TX12 ; error already - exit test
2549
2550 ; 2nd segment of test (Segment B) - Check if CRAM PE sets after 1/2 second
2551
2552 003136' 350 00 0 00 003121* AOS TSTSUB ; increment subtest number
2553 003137' 201 00 0 00 000764 MOVEI ^D500 ; wait 1/2 second
2554 003140' 260 17 0 00 002567* GO ODELAY ; do the wait
2555 003141' 260 17 0 00 000000* GO RDCSR ; read CSR
2556 003142' 474 15 0 00 000000 SETO ERFLG, ; failed - couldn't read CSR
2557 003143' 603 01 0 00 004000 TLNE 1,(CRAMPE) ; got a CRAM PE?
2558 003144' 474 15 0 00 000000 SETO ERFLG, ; yes - set error flag
2559 003145' 201 01 0 00 204000 MOVEI 1,EBUSPE!TSTEBF ; get bits to clear error condition
2560 003146' 260 17 0 00 002565* GO LDCSR ; and set up to read the EBUF
2561 003147' 260 17 0 00 001771* GO RDEBUF ; read EBUF data
2562 003150' 202 01 0 00 014013' MOVEM 1,SAVDAT# ; save data
2563 003151' 027 00 0 00 003167' SCOPER MB12 ; print error message
2564 003152' 254 00 0 00 003117' JRST TA12 ; loop on error
2565 003153' 254 00 0 00 003154' JRST TX12 ; altmode exit
2566
2567 003154' 263 17 0 00 000000 TX12: RTN ; exit test
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 33
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1667
2568
2569 ; Error messages
2570
2571 003155' 140000 013266' MA12: MSG!TXNOT![ASCIZ /Couldn't successfully start the port/]
2572 003156' 270000 003157' LAST!CALL!TXALL!MA12P1
2573
2574 003157' 260 17 0 00 003141* MA12P1: GO RDCSR ; get CSR contents
2575 003160' 255 00 0 00 000000 JFCL ; error
2576 003161' 202 01 0 00 014010' MOVEM 1,SAVCSR# ; save it
2577 003162' 200 01 0 00 014010' MOVE 1,SAVCSR ; get CSR data
2578 003163' 201 02 0 00 000023 MOVEI 2,^D19 ; character count so far
2579 003164' 201 03 0 00 000023 MOVEI 3,^D19 ; continuation line column number
2580 003165' 260 17 0 00 000000* GO CSRPNT ; go print in English
2581 003166' 263 17 0 00 000000 RTN ; return
2582
2583 003167' 140000 013276' MB12: MSG!TXNOT![ASCIZ /Up shifting of zero data resulted in non-zero data/]
2584 003170' 270000 003171' LAST!CALL!TXALL!MA12PN
2585
2586 003171' 037 00 0 00 013311' MA12PN: TMSGC <EBUF Data (Formatter contents): >
2587 003172' 200 00 0 00 014013' MOVE SAVDAT
2588 003173' 037 13 0 00 000000 PNTHW
2589 003174' 263 17 0 00 000000 RTN
2590
2591 ; Microcode:
2592
2593 003175' 000000 010100 T12M: MWORD <ADDR=0,JMAP,J=1,S0A,D=1,SELF,MGC=100> ; 0
2594 003176' 401000 003040
2595 003177' 000100 000200 MWORD <CONT,SD0,OR,D=2,SELM,MGC=200> ; 1
2596 003200' 732000 002340
2597 003201' 000200 000000 MWORD <CJP,J=0,S0A,OR,D=1,CENA,CCFZ> ; 2
2598 003202' 431400 020060
2599 003203' 000300 002004 MWORD <CONT,S0A,OR,D=1,OENA,SELE,MGC=4> ; 3
2600 003204' 431000 005340
2601 003205' 000400 040000 MWORD <JMAP,J=4,BAD> ; 4
2602 003206' 000000 000041
2603 003207' 777777 777777 -1
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 34
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1668
2604
2605 ;#********************************************************************
2606 ;* Test 13 - Fmtr Up Shift 4 Test - BUS Ctl=Cbus
2607 ;
2608 ; Description: Verify that the formatter can shift various data
2609 ; patterns up 4 bits at a time.
2610 ;
2611 ; Procedure: KL> Port Clear
2612 ; KL> Set up data transfer for data patterns
2613 ;
2614 ; UC> Read a data pattern over the CBUS
2615 ; UC> Shift up 4 bits
2616 ; UC> Read formatter contents and write into
2617 ; EBUF
2618 ; KL> Read EBUF and verify the data
2619 ; KL> Start up the ucode to shift again
2620 ;
2621 ; Repeat the above shifting then verifying EBUF
2622 ; contents 10 times, until the data becomes
2623 ; all zero.
2624 ;
2625 ; Do for data patterns: 0's
2626 ; 1's
2627 ; 525252,,525252
2628 ; 000000,,007777
2629 ; 000000,,007070
2630 ; 000000,,000707
2631 ;
2632 ; Failure: ---
2633 ;#********************************************************************
2634
2635 ; Test data
2636
2637 003210' 254 00 0 00 003220' TSTC13: JRST TG13 ; go start test
2638 003211' 100604 000013 CBUS!NDMP!NDCB!ZCBUS!13 ; test mask
2639 003212' 003427' 013321' T13M,,[ASCIZ ^Fmtr Up Shift 4 Test - BUS Ctl=Cbus^]
2640 003213' 013263' 012716' [EXP C20,C12,MLAST!C8],,[EXP C4,MLAST!C2]
2641 003214' 000000 003510' TSTC14 ; failure test table
2642 003215' 000000 006754' TSTC25 ; ...
2643 003216' 000000 007062' TSTC26
2644 003217' 777777 777777 -1
2645
2646 ; Start test
2647
2648 003220' 201 00 0 00 000000' TG13: MOVEI Z9 ; get address of module start
2649 003221' 260 17 0 00 003113* GO TRACE ; handle trace output
2650 003222' 201 01 0 00 003427' MOVEI 1,T13M ; set up microcode address
2651 003223' 260 17 0 00 003115* GO TLOAD ; load/verify it
2652 003224' 263 17 0 00 000000 RTN ; failed - exit test
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 35
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1669
2653
2654 ; Initialization
2655
2656 003225' 400 15 0 00 000000 TL13: SETZ ERFLG, ; clear error flag
2657 003226' 260 17 0 00 003122* GO IPACLR ; clear port
2658 003227' 402 00 0 00 003136* SETZM TSTSUB ; initialize subtest number
2659 MOVSI [000000,,000000 ; get address of buffer
2660 777777,,777777 ; contents
2661 525252,,525252
2662 000000,,007777
2663 000000,,007070
2664 003230' 205 00 0 00 013330' 000000,,000707]
2665 003231' 541 00 0 00 002626* HRRI BUFF ; build the BLT pointer
2666 003232' 251 00 0 00 000000# BLT BUFF+5 ; insert data into buffer
2667
2668 ; First ensure the data transfer is reset
2669
2670 003233' 201 01 0 00 005000 MOVEI 1,5000 ; get start address
2671 003234' 242 01 0 00 000001 LSH 1,1 ; position correctly
2672 003235' 260 17 0 00 002563* GO LDRAR ; load the register
2673 003236' 201 01 0 00 000010 MOVEI 1,MPRUN ; get 'MPRUN' bit
2674 003237' 260 17 0 00 003146* GO LDCSR ; start up the port
2675 003240' 400 01 0 00 000000 SETZ 1, ; stop the port
2676 003241' 260 17 0 00 003237* GO LDCSR
2677
2678 ; Now generate CCW list
2679
2680 003242' 200 01 0 00 013210' MOVE 1,[CBUFSZ,,CBUF] ; get pointer to control buffer
2681 003243' 260 17 0 00 002553* GO CHINIT ; initialize software
2682 003244' 551 01 0 00 003231* HRRZI 1,BUFF ; buffer address
2683 003245' 201 02 0 00 000006 MOVEI 2,6 ; word count
2684 003246' 400 03 0 00 000000 SETZ 3, ; clear zero fill specifier
2685 003247' 260 17 0 00 002557* GO GENCCW ; generate a CCW list
2686 003250' 201 06 0 00 003273' MOVEI 6,TS13 ; get test execute table address
2687
2688 ; Start up the data transfer
2689
2690 003251' 201 01 0 00 001000 MOVEI 1,1000 ; get start address
2691 003252' 242 01 0 00 000001 LSH 1,1 ; position correctly
2692 003253' 260 17 0 00 003235* GO LDRAR ; load the register
2693 003254' 201 01 0 00 000010 MOVEI 1,MPRUN ; get MPRUN bit
2694 003255' 260 17 0 00 003241* GO LDCSR ; start up the port
2695 003256' 201 00 0 00 000001 MOVEI 1 ; set up delay of 1 ms
2696 003257' 260 17 0 00 003140* GO ODELAY ; wait a bit
2697 003260' 400 01 0 00 000000 SETZ 1, ; clear data
2698 003261' 260 17 0 00 003255* GO LDCSR ; stop the port
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 36
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1670
2699
2700 ; Loop on test execute table entries
2701
2702 003262' 260 17 0 00 000000* TA13: GO TEXEC ; execute table entry
2703 003263' 254 00 0 00 003272' JRST TX13 ; end of table
2704 003264' 254 00 0 00 003262' JRST TA13 ; keep looping after call
2705 003265' 474 15 0 00 000000 SETO ERFLG, ; error - EBUF data incorrect
2706
2707 ; Handle error printouts and scope looping
2708
2709 003266' 027 00 0 00 003414' SCOPER MA13 ; print error message
2710 003267' 254 00 0 00 003225' JRST TL13 ; loop on error
2711 003270' 254 00 0 00 003272' JRST TX13 ; altmode exit
2712 003271' 322 15 0 00 003262' JUMPE ERFLG,TA13 ; do next sstep table entry
2713
2714 ; End of test
2715
2716 003272' 263 17 0 00 000000 TX13: RTN ; return
2717
2718 ; Test Execute Table, as: (CMD,parameters)
2719
2720 003273' 140000 003347' TS13: TTABLE (TCALL,TS13IN) ; initialize stuff
2721 003274' 200000 003352' TS13L: TTABLE (TCALLC,TS13NE) ; set up next data pattern
2722
2723 ; Shifted 4 bits
2724
2725 003275' 140000 003377' TS13A: TTABLE (TCALL,TS13NN) ; increment shift count
2726 003276' 400000 000100 TTABLE (TSSTAR,100) ; start up port
2727 003277' 240001 003402' TTABLE (TCHECK,1,TS13RS) ; check if completed
2728 003300' 340000 000000 TTABLE (TEXIT) ; exit if error yet
2729
2730 ; Shifted 8 bits
2731
2732 003301' 140000 003377' TTABLE (TCALL,TS13NN) ; increment shift count
2733 003302' 400000 000100 TTABLE (TSSTAR,100) ; start up port
2734 003303' 240001 003403' TTABLE (TCHECK,1,TS13RS+1) ; check if completed
2735 003304' 340000 000000 TTABLE (TEXIT) ; exit if error yet
2736
2737 ; Shifted 12 bits
2738
2739 003305' 140000 003377' TTABLE (TCALL,TS13NN) ; increment shift count
2740 003306' 400000 000100 TTABLE (TSSTAR,100) ; start up port
2741 003307' 240001 003404' TTABLE (TCHECK,1,TS13RS+2) ; check if completed
2742 003310' 340000 000000 TTABLE (TEXIT) ; exit if error yet
2743
2744 ; Shifted 16 bits
2745
2746 003311' 140000 003377' TTABLE (TCALL,TS13NN) ; increment shift count
2747 003312' 400000 000100 TTABLE (TSSTAR,100) ; start up port
2748 003313' 240001 003405' TTABLE (TCHECK,1,TS13RS+3) ; check if completed
2749 003314' 340000 000000 TTABLE (TEXIT) ; exit if error yet
2750
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 37
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1671
2751
2752 ; Shifted 20 bits
2753
2754 003315' 140000 003377' TTABLE (TCALL,TS13NN) ; increment shift count
2755 003316' 400000 000100 TTABLE (TSSTAR,100) ; start up port
2756 003317' 240001 003406' TTABLE (TCHECK,1,TS13RS+4) ; check if completed
2757 003320' 340000 000000 TTABLE (TEXIT) ; exit if error yet
2758
2759 ; Shifted 24 bits
2760
2761 003321' 140000 003377' TTABLE (TCALL,TS13NN) ; increment shift count
2762 003322' 400000 000100 TTABLE (TSSTAR,100) ; start up port
2763 003323' 240001 003407' TTABLE (TCHECK,1,TS13RS+5) ; check if completed
2764 003324' 340000 000000 TTABLE (TEXIT) ; exit if error yet
2765
2766 ; Shifted 28 bits
2767
2768 003325' 140000 003377' TTABLE (TCALL,TS13NN) ; increment shift count
2769 003326' 400000 000100 TTABLE (TSSTAR,100) ; start up port
2770 003327' 240001 003410' TTABLE (TCHECK,1,TS13RS+6) ; check if completed
2771 003330' 340000 000000 TTABLE (TEXIT) ; exit if error yet
2772
2773 ; Shifted 32 bits
2774
2775 003331' 140000 003377' TTABLE (TCALL,TS13NN) ; increment shift count
2776 003332' 400000 000100 TTABLE (TSSTAR,100) ; start up port
2777 003333' 240001 003411' TTABLE (TCHECK,1,TS13RS+7) ; check if completed
2778 003334' 340000 000000 TTABLE (TEXIT) ; exit if error yet
2779
2780 ; Shifted 36 bits
2781
2782 003335' 140000 003377' TTABLE (TCALL,TS13NN) ; increment shift count
2783 003336' 400000 000100 TTABLE (TSSTAR,100) ; start up port
2784 003337' 240001 003412' TTABLE (TCHECK,1,TS13RS+10) ; check if completed
2785 003340' 340000 000000 TTABLE (TEXIT) ; exit if error yet
2786
2787 ; Shifted 40 bits
2788
2789 003341' 140000 003377' TTABLE (TCALL,TS13NN) ; increment shift count
2790 003342' 400000 000100 TTABLE (TSSTAR,100) ; start up port
2791 003343' 240001 003413' TTABLE (TCHECK,1,TS13RS+11) ; check if completed
2792 003344' 340000 000000 TTABLE (TEXIT) ; exit if error yet
2793 003345' 300000 003274' TTABLE (TJRST,TS13L) ; loop till done
2794 003346' 000000 000000 TTABLE (TLAST)
2795
2796 ; Initialize stuff
2797
2798 003347' 201 00 0 00 000000# TS13IN: MOVEI BUFF-1 ; initialize buffer pointer
2799 003350' 202 00 0 00 014015' MOVEM T13BUF# ; ...
2800 003351' 263 17 0 00 000000 RTN ; return
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 38
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1672
2801
2802 ; Set up next data pattern
2803
2804 003352' 350 01 0 00 014015' TS13NE: AOS 1,T13BUF ; point to next data pattern
2805 003353' 307 01 0 00 000000# CAIG 1,BUFF+5 ; done yet?
2806 003354' 350 00 0 17 000000 AOS (P) ; no - set up proper return
2807 003355' 200 00 0 01 000000 MOVE (1) ; get data pattern
2808 003356' 201 02 0 00 003402' MOVEI 2,TS13RS ; get initial address of EBUF data
2809 003357' 242 00 0 00 000004 TS13N0: LSH 4 ; shift 4 bits
2810 003360' 202 00 0 02 000000 MOVEM (2) ; save it
2811 003361' 350 00 0 00 000002 AOS 2 ; point to next address
2812 003362' 307 02 0 00 003413' CAIG 2,TS13RS+11 ; done yet?
2813 003363' 254 00 0 00 003357' JRST TS13N0 ; no - loop till done
2814 003364' 402 00 0 00 014040' SETZM TS13NM# ; initialize number of shifts
2815
2816 ; Read the next word
2817
2818 003365' 400 01 0 00 000000 SETZ 1, ; clear data
2819 003366' 260 17 0 00 003261* GO LDCSR ; stop the port
2820 003367' 201 01 0 00 000200 MOVEI 1,200 ; get start address
2821 003370' 242 01 0 00 000001 LSH 1,1 ; position correctly
2822 003371' 260 17 0 00 003253* GO LDRAR ; load the register
2823 003372' 201 01 0 00 000010 MOVEI 1,MPRUN ; get MPRUN bit
2824 003373' 260 17 0 00 003366* GO LDCSR ; start up the port
2825 003374' 400 01 0 00 000000 SETZ 1, ; clear data
2826 003375' 260 17 0 00 003373* GO LDCSR ; stop the port
2827 003376' 263 17 0 00 000000 RTN ; return
2828
2829 ; Increment shift count
2830
2831 003377' 201 00 0 00 000004 TS13NN: MOVEI 4 ; get a 4
2832 003400' 272 00 0 00 014040' ADDM TS13NM ; add it
2833 003401' 263 17 0 00 000000 RTN ; return
2834
2835 003402' TS13RS: BLOCK 12 ; correct EBUF data
2836
2837 ; Error messages
2838
2839 003414' 240000 003416' MA13: CALL!TXNOT!MA13PN ; print data pattern ...
2840 003415' 000000000000# LAST!CALL!TXALL!TTPNT ; print test data
2841
2842 003416' 037 00 0 00 013336' MA13PN: TMSGC <Data > ; get data and
2843 003417' 200 01 0 00 014015' MOVE 1,T13BUF ; print it
2844 003420' 200 00 0 01 000000 MOVE (1)
2845 003421' 037 13 0 00 000000 PNTHW
2846 003422' 037 00 0 00 013340' TMSG < shifted up >
2847 003423' 200 00 0 00 014040' MOVE TS13NM ; get shift count
2848 003424' 037 15 0 00 000000 PNTDEC
2849 003425' 037 00 0 00 013343' TMSG <. bits, result in EBUF>
2850 003426' 263 17 0 00 000000 RTN
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 39
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1673
2851
2852 ; Microcode - Shift 4 bits
2853
2854 003427' 010001 010000 T13M: MWORD <ADDR=100,JMAP,J=101,D=1> ; 100
2855 003430' 001000 000040
2856 003431' 010100 000001 MWORD <CONT,D=1,SELC,MGC=1> ; 101
2857 003432' 001000 004340
2858 003433' 010200 000200 MWORD <CONT,SD0,OR,B=4,D=2,SELM,MGC=200> ; 102
2859 003434' 732002 002340
2860 003435' 010351 000000 MWORD <JMAP,J=5100,D=1> ; 103
2861 003436' 001000 000040
2862
2863 ; Routine to read a word from CBUS into the formatter.
2864
2865 003437' 020002 010000 MWORD <ADDR=200,JMAP,J=201> ; 200
2866 003440' 000000 000040
2867 003441' 020102 030000 MWORD <CJP,J=203,D=1,CENA,CCCA> ; 201
2868 003442' 001400 000060
2869 003443' 020202 010000 MWORD <JMAP,J=201,D=1> ; 202
2870 003444' 001000 000040
2871 003445' 020300 000004 MWORD <CONT,D=1,SELC,MGC=4> ; 203
2872 003446' 001000 004340
2873 003447' 020400 000200 MWORD <CONT,SD0,OR,B=3,D=2,SELM,MGC=200> ; 204
2874 003450' 732001 402340
2875 003451' 020500 000000 MWORD <JZ> ; 205
2876 003452' 000000 000000
2877
2878 ; Initialization
2879
2880 003453' 100010 010020 MWORD <ADDR=1000,JMAP,J=1001,SELM,MGC=20> ; 1000
2881 003454' 000000 002040
2882 003455' 100100 000200 MWORD <JZ,D=1,SELC,MGC=200> ; 1001
2883 003456' 001000 004000
2884 003457' 000000 000000 MWORD <ADDR=0,JZ> ; 0
2885 003460' 000000 000000
2886
2887 ; Initialization step
2888
2889 003461' 500050 010100 MWORD <ADDR=5000,JMAP,J=5001,SELC,MGC=100> ; 5000
2890 003462' 000000 004040
2891 003463' 500100 000020 MWORD <JZ,SELM,MGC=20> ; 5001
2892 003464' 000000 002000
2893
2894 ; Subroutine - Passed - Write 1 to bit 12 of CSR register
2895
2896 003465' 510000 000000 MWORD <ADDR=5100,CONT,SD0,AND,B=2,D=2> ; 5100
2897 003466' 742001 000340
2898 003467' 510100 000000 MWORD <CONT,S0B,PLUS,B=2,D=2,CRY> ; 5101
2899 003470' 302001 000740
2900 003471' 510200 260000 MWORD <LDCT,J=26> ; 5102
2901 003472' 000000 000300
2902 003473' 510351 030000 MWORD <RPCT,J=5103,SAB,PLUS,A=2,B=2,D=2> ; 5103
2903 003474' 102021 000220
2904 003475' 510400 002004 MWORD <CONT,S0A,A=2,OR,D=1,OENA,SELE,MGC=4> ; 5104
2905 003476' 431020 005340
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 39-1
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1674
2906 003477' 510551 070040 MWORD <CJP,J=5107,CENA,CCGC,D=1,SELE,MGC=40> ; 5105
2907 003500' 001400 015060
2908 003501' 510651 050000 MWORD <JMAP,J=5105,D=1> ; 5106
2909 003502' 001000 000040
2910 003503' 510700 000200 MWORD <CONT,S0A,A=1,OR,D=1,SELE,MGC=200> ; 5107
2911 003504' 431010 005340
2912 003505' 511051 102004 MWORD <JMAP,J=5110,S0A,OR,A=4,D=1,OENA,SELE,MGC=4> ; 5110
2913 003506' 431040 005040
2914 003507' 777777 777777 -1
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 40
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1675
2915
2916 ;#********************************************************************
2917 ;* Test 14 - Fmtr Up Shift 4 Test - BUS Ctl=Fmtr
2918 ;
2919 ; Description: Verify that the formatter can shift various data
2920 ; patterns up 4 bits at a time.
2921 ;
2922 ; Procedure: KL> Port Clear
2923 ; KL> Set up data transfer for data patterns
2924 ;
2925 ; UC> Read a data pattern over the CBUS
2926 ; UC> Shift up 4 bits
2927 ; UC> Read formatter contents and write into
2928 ; EBUF
2929 ; KL> Read EBUF and verify the data
2930 ; KL> Start up the ucode to shift again
2931 ;
2932 ; Repeat the above shifting then verifying EBUF
2933 ; contents 10 times, until the data becomes
2934 ; all zero.
2935 ;
2936 ; Do for data patterns: 0's
2937 ; 1's
2938 ; 525252,,525252
2939 ; 000000,,007777
2940 ; 000000,,007070
2941 ; 000000,,000707
2942 ;
2943 ; Failure: ---
2944 ;#********************************************************************
2945
2946 ; Test data
2947
2948 003510' 254 00 0 00 003521' TSTC14: JRST TG14 ; go start test
2949 003511' 100604 000014 CBUS!NDMP!NDCB!ZCBUS!14 ; test mask
2950 003512' 003726' 013350' T14M,,[ASCIZ ^Fmtr Up Shift 4 Test - BUS Ctl=Fmtr^]
2951 003513' 013263' 012716' [EXP C20,C12,MLAST!C8],,[EXP C4,MLAST!C2]
2952 003514' 000000 004007' TSTC15 ; failure test table
2953 003515' 000000 004322' TSTC16 ; ...
2954 003516' 000000 006754' TSTC25
2955 003517' 000000 007062' TSTC26
2956 003520' 777777 777777 -1
2957
2958 ; Start test
2959
2960 003521' 201 00 0 00 000000' TG14: MOVEI Z9 ; get address of module start
2961 003522' 260 17 0 00 003221* GO TRACE ; handle trace output
2962 003523' 201 01 0 00 003726' MOVEI 1,T14M ; set up microcode address
2963 003524' 260 17 0 00 003223* GO TLOAD ; load/verify it
2964 003525' 263 17 0 00 000000 RTN ; failed - exit test
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 41
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1676
2965
2966 ; Initialization
2967
2968 003526' 400 15 0 00 000000 TL14: SETZ ERFLG, ; clear error flag
2969 003527' 260 17 0 00 003226* GO IPACLR ; clear port
2970 003530' 402 00 0 00 003227* SETZM TSTSUB ; initialize subtest number
2971 MOVSI [000000,,000000 ; get address of buffer
2972 777777,,777777 ; contents
2973 525252,,525252
2974 000000,,007777
2975 000000,,007070
2976 003531' 205 00 0 00 013330' 000000,,000707]
2977 003532' 541 00 0 00 003244* HRRI BUFF ; build the BLT pointer
2978 003533' 251 00 0 00 000000# BLT BUFF+5 ; insert data into buffer
2979
2980 ; First ensure the data transfer is reset
2981
2982 003534' 201 01 0 00 005000 MOVEI 1,5000 ; get start address
2983 003535' 242 01 0 00 000001 LSH 1,1 ; position correctly
2984 003536' 260 17 0 00 003371* GO LDRAR ; load the register
2985 003537' 201 01 0 00 000010 MOVEI 1,MPRUN ; get MPRUN bit
2986 003540' 260 17 0 00 003375* GO LDCSR ; start up the port
2987 003541' 400 01 0 00 000000 SETZ 1, ; clear data
2988 003542' 260 17 0 00 003540* GO LDCSR ; stop the port
2989
2990 ; Now generate CCW list
2991
2992 003543' 200 01 0 00 013210' MOVE 1,[CBUFSZ,,CBUF] ; get pointer to control buffer
2993 003544' 260 17 0 00 003243* GO CHINIT ; initialize software
2994 003545' 551 01 0 00 003532* HRRZI 1,BUFF ; buffer address
2995 003546' 201 02 0 00 000006 MOVEI 2,6 ; word count
2996 003547' 400 03 0 00 000000 SETZ 3, ; clear zero fill specifier
2997 003550' 260 17 0 00 003247* GO GENCCW ; generate a CCW list
2998 003551' 201 06 0 00 003574' MOVEI 6,TS14 ; get test execute table address
2999
3000 ; Start up the data transfer
3001
3002 003552' 201 01 0 00 001000 MOVEI 1,1000 ; get start address
3003 003553' 242 01 0 00 000001 LSH 1,1 ; position correctly
3004 003554' 260 17 0 00 003536* GO LDRAR ; load the register
3005 003555' 201 01 0 00 000010 MOVEI 1,MPRUN ; get MPRUN bit
3006 003556' 260 17 0 00 003542* GO LDCSR ; start up the port
3007 003557' 201 00 0 00 000001 MOVEI 1 ; set up delay of 1 ms
3008 003560' 260 17 0 00 003257* GO ODELAY ; wait a bit
3009 003561' 400 01 0 00 000000 SETZ 1, ; clear data
3010 003562' 260 17 0 00 003556* GO LDCSR ; stop the port
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 42
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1677
3011
3012 ; Loop on test execute table entries
3013
3014 003563' 260 17 0 00 003262* TA14: GO TEXEC ; execute table entry
3015 003564' 254 00 0 00 003573' JRST TX14 ; end of table
3016 003565' 254 00 0 00 003563' JRST TA14 ; keep looping after call
3017 003566' 474 15 0 00 000000 SETO ERFLG, ; error - EBUF data incorrect
3018
3019 ; Handle error printouts and scope looping
3020
3021 003567' 027 00 0 00 003713' SCOPER MA14 ; print error message
3022 003570' 254 00 0 00 003526' JRST TL14 ; loop on error
3023 003571' 254 00 0 00 003573' JRST TX14 ; altmode exit
3024 003572' 322 15 0 00 003563' JUMPE ERFLG,TA14 ; do next sstep table entry
3025
3026 ; End of test
3027
3028 003573' 263 17 0 00 000000 TX14: RTN ; return
3029
3030 ; Test Execute Table, as: (CMD,parameters)
3031
3032 003574' 140000 003650' TS14: TTABLE (TCALL,TS14IN) ; initialize stuff
3033 003575' 200000 003653' TS14L: TTABLE (TCALLC,TS14NE) ; set up next data pattern
3034
3035 ; Shifted 4 bits
3036
3037 003576' 140000 003676' TS14A: TTABLE (TCALL,TS14NN) ; increment shift count
3038 003577' 400000 000100 TTABLE (TSSTAR,100) ; start up port
3039 003600' 240001 003701' TTABLE (TCHECK,1,TS14RS) ; check if completed
3040 003601' 340000 000000 TTABLE (TEXIT) ; exit if error yet
3041
3042 ; Shifted 8 bits
3043
3044 003602' 140000 003676' TTABLE (TCALL,TS14NN) ; increment shift count
3045 003603' 400000 000100 TTABLE (TSSTAR,100) ; start up port
3046 003604' 240001 003702' TTABLE (TCHECK,1,TS14RS+1) ; check if completed
3047 003605' 340000 000000 TTABLE (TEXIT) ; exit if error yet
3048
3049 ; Shifted 12 bits
3050
3051 003606' 140000 003676' TTABLE (TCALL,TS14NN) ; increment shift count
3052 003607' 400000 000100 TTABLE (TSSTAR,100) ; start up port
3053 003610' 240001 003703' TTABLE (TCHECK,1,TS14RS+2) ; check if completed
3054 003611' 340000 000000 TTABLE (TEXIT) ; exit if error yet
3055
3056 ; Shifted 16 bits
3057
3058 003612' 140000 003676' TTABLE (TCALL,TS14NN) ; increment shift count
3059 003613' 400000 000100 TTABLE (TSSTAR,100) ; start up port
3060 003614' 240001 003704' TTABLE (TCHECK,1,TS14RS+3) ; check if completed
3061 003615' 340000 000000 TTABLE (TEXIT) ; exit if error yet
3062
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 43
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1678
3063
3064 ; Shifted 20 bits
3065
3066 003616' 140000 003676' TTABLE (TCALL,TS14NN) ; increment shift count
3067 003617' 400000 000100 TTABLE (TSSTAR,100) ; start up port
3068 003620' 240001 003705' TTABLE (TCHECK,1,TS14RS+4) ; check if completed
3069 003621' 340000 000000 TTABLE (TEXIT) ; exit if error yet
3070
3071 ; Shifted 24 bits
3072
3073 003622' 140000 003676' TTABLE (TCALL,TS14NN) ; increment shift count
3074 003623' 400000 000100 TTABLE (TSSTAR,100) ; start up port
3075 003624' 240001 003706' TTABLE (TCHECK,1,TS14RS+5) ; check if completed
3076 003625' 340000 000000 TTABLE (TEXIT) ; exit if error yet
3077
3078 ; Shifted 28 bits
3079
3080 003626' 140000 003676' TTABLE (TCALL,TS14NN) ; increment shift count
3081 003627' 400000 000100 TTABLE (TSSTAR,100) ; start up port
3082 003630' 240001 003707' TTABLE (TCHECK,1,TS14RS+6) ; check if completed
3083 003631' 340000 000000 TTABLE (TEXIT) ; exit if error yet
3084
3085 ; Shifted 32 bits
3086
3087 003632' 140000 003676' TTABLE (TCALL,TS14NN) ; increment shift count
3088 003633' 400000 000100 TTABLE (TSSTAR,100) ; start up port
3089 003634' 240001 003710' TTABLE (TCHECK,1,TS14RS+7) ; check if completed
3090 003635' 340000 000000 TTABLE (TEXIT) ; exit if error yet
3091
3092 ; Shifted 36 bits
3093
3094 003636' 140000 003676' TTABLE (TCALL,TS14NN) ; increment shift count
3095 003637' 400000 000100 TTABLE (TSSTAR,100) ; start up port
3096 003640' 240001 003711' TTABLE (TCHECK,1,TS14RS+10) ; check if completed
3097 003641' 340000 000000 TTABLE (TEXIT) ; exit if error yet
3098
3099 ; Shifted 40 bits
3100
3101 003642' 140000 003676' TTABLE (TCALL,TS14NN) ; increment shift count
3102 003643' 400000 000100 TTABLE (TSSTAR,100) ; start up port
3103 003644' 240001 003712' TTABLE (TCHECK,1,TS14RS+11) ; check if completed
3104 003645' 340000 000000 TTABLE (TEXIT) ; exit if error yet
3105 003646' 300000 003575' TTABLE (TJRST,TS14L) ; loop till done
3106 003647' 000000 000000 TTABLE (TLAST)
3107
3108 ; Initialize stuff
3109
3110 003650' 201 00 0 00 000000# TS14IN: MOVEI BUFF-1 ; initialize buffer pointer
3111 003651' 202 00 0 00 014016' MOVEM T14BUF# ; ...
3112 003652' 263 17 0 00 000000 RTN ; return
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 44
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1679
3113
3114 ; Set up next data pattern
3115
3116 003653' 350 01 0 00 014016' TS14NE: AOS 1,T14BUF ; point to next data pattern
3117 003654' 307 01 0 00 000000# CAIG 1,BUFF+5 ; done yet?
3118 003655' 350 00 0 17 000000 AOS (P) ; no - set up proper return
3119 003656' 200 00 0 01 000000 MOVE (1) ; get data pattern
3120 003657' 201 02 0 00 003701' MOVEI 2,TS14RS ; get initial address of EBUF data
3121 003660' 242 00 0 00 000004 TS14N0: LSH 4 ; shift 4 bits
3122 003661' 202 00 0 02 000000 MOVEM (2) ; save it
3123 003662' 350 00 0 00 000002 AOS 2 ; point to next address
3124 003663' 307 02 0 00 003712' CAIG 2,TS14RS+11 ; done yet?
3125 003664' 254 00 0 00 003660' JRST TS14N0 ; no - loop till done
3126 003665' 402 00 0 00 014041' SETZM TS14NM# ; initialize number of shifts
3127
3128 ; Read the next word
3129
3130 003666' 201 01 0 00 000200 MOVEI 1,200 ; get start address
3131 003667' 242 01 0 00 000001 LSH 1,1 ; position correctly
3132 003670' 260 17 0 00 003554* GO LDRAR ; load the register
3133 003671' 201 01 0 00 000010 MOVEI 1,MPRUN ; get MPRUN bit
3134 003672' 260 17 0 00 003562* GO LDCSR ; start up the port
3135 003673' 400 01 0 00 000000 SETZ 1, ; clear data
3136 003674' 260 17 0 00 003672* GO LDCSR ; stop the port
3137 003675' 263 17 0 00 000000 RTN ; return
3138
3139 ; Increment shift count
3140
3141 003676' 201 00 0 00 000004 TS14NN: MOVEI 4 ; get a 4
3142 003677' 272 00 0 00 014041' ADDM TS14NM ; add it
3143 003700' 263 17 0 00 000000 RTN ; return
3144
3145 003701' TS14RS: BLOCK 12 ; correct EBUF data
3146
3147 ; Error messages
3148
3149 003713' 240000 003715' MA14: CALL!TXNOT!MA14PN ; print data pattern ...
3150 003714' 000000000000# LAST!CALL!TXALL!TTPNT ; print test data
3151
3152 003715' 037 00 0 00 013336' MA14PN: TMSGC <Data > ; get data and
3153 003716' 200 01 0 00 014016' MOVE 1,T14BUF ; print it
3154 003717' 200 00 0 01 000000 MOVE (1)
3155 003720' 037 13 0 00 000000 PNTHW
3156 003721' 037 00 0 00 013340' TMSG < shifted up >
3157 003722' 200 00 0 00 014041' MOVE TS14NM ; get shift count
3158 003723' 037 15 0 00 000000 PNTDEC
3159 003724' 037 00 0 00 013343' TMSG <. bits, result in EBUF>
3160 003725' 263 17 0 00 000000 RTN
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 45
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1680
3161
3162 ; Microcode - Shift 4 bits
3163
3164 003726' 010001 010000 T14M: MWORD <ADDR=100,JMAP,J=101,D=1> ; 100
3165 003727' 001000 000040
3166 003730' 010100 000100 MWORD <CONT,D=1,SELF,MGC=100> ; 101
3167 003731' 001000 003340
3168 003732' 010200 000200 MWORD <CONT,SD0,OR,B=4,D=2,SELM,MGC=200> ; 102
3169 003733' 732002 002340
3170 003734' 010351 000000 MWORD <JMAP,J=5100,D=1> ; 103
3171 003735' 001000 000040
3172
3173 ; Routine to read a word from CBUS into the formatter.
3174
3175 003736' 020002 010000 MWORD <ADDR=200,JMAP,J=201> ; 200
3176 003737' 000000 000040
3177 003740' 020102 030000 MWORD <CJP,J=203,D=1,CENA,CCCA> ; 201
3178 003741' 001400 000060
3179 003742' 020202 010000 MWORD <JMAP,J=201,D=1> ; 202
3180 003743' 001000 000040
3181 003744' 020300 000004 MWORD <CONT,D=1,SELC,MGC=4> ; 203
3182 003745' 001000 004340
3183 003746' 020400 000200 MWORD <CONT,SD0,OR,B=3,D=2,SELM,MGC=200> ; 204
3184 003747' 732001 402340
3185 003750' 020500 000000 MWORD <JZ> ; 205
3186 003751' 000000 000000
3187
3188 ; Initialization
3189
3190 003752' 100010 010020 MWORD <ADDR=1000,JMAP,J=1001,SELM,MGC=20> ; 1000
3191 003753' 000000 002040
3192 003754' 100100 000200 MWORD <JZ,D=1,SELC,MGC=200> ; 1001
3193 003755' 001000 004000
3194 003756' 000000 000000 MWORD <ADDR=0,JZ> ; 0
3195 003757' 000000 000000
3196
3197 ; Initialization step
3198
3199 003760' 500050 010100 MWORD <ADDR=5000,JMAP,J=5001,SELC,MGC=100> ; 5000
3200 003761' 000000 004040
3201 003762' 500100 000020 MWORD <JZ,SELM,MGC=20> ; 5001
3202 003763' 000000 002000
3203
3204 ; Subroutine - Passed - Write 1 to bit 12 of CSR register
3205
3206 003764' 510000 000000 MWORD <ADDR=5100,CONT,SD0,AND,B=2,D=2> ; 5100
3207 003765' 742001 000340
3208 003766' 510100 000000 MWORD <CONT,S0B,PLUS,B=2,D=2,CRY> ; 5101
3209 003767' 302001 000740
3210 003770' 510200 260000 MWORD <LDCT,J=26> ; 5102
3211 003771' 000000 000300
3212 003772' 510351 030000 MWORD <RPCT,J=5103,SAB,PLUS,A=2,B=2,D=2> ; 5103
3213 003773' 102021 000220
3214 003774' 510400 002004 MWORD <CONT,S0A,A=2,OR,D=1,OENA,SELE,MGC=4> ; 5104
3215 003775' 431020 005340
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 45-1
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1681
3216 003776' 510551 070040 MWORD <CJP,J=5107,CENA,CCGC,D=1,SELE,MGC=40> ; 5105
3217 003777' 001400 015060
3218 004000' 510651 050000 MWORD <JMAP,J=5105,D=1> ; 5106
3219 004001' 001000 000040
3220 004002' 510700 000200 MWORD <CONT,S0A,A=1,OR,D=1,SELE,MGC=200> ; 5107
3221 004003' 431010 005340
3222 004004' 511051 102004 MWORD <JMAP,J=5110,S0A,OR,A=4,D=1,OENA,SELE,MGC=4> ; 5110
3223 004005' 431040 005040
3224 004006' 777777 777777 -1
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 46
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1682
3225
3226 ;#********************************************************************
3227 ;* Test 15 - Fmtr Up Shift 4 (from PLIN) Test - SELRHTNIB=0
3228 ;
3229 ; Description: Verify that the formatter can shift various data
3230 ; patterns 4 bits at a time while inserting bytes
3231 ; from the PLIN into the formatter. The data loaded
3232 ; into the PLIN initially is 017.
3233 ;
3234 ; Procedure: KL> Port Clear
3235 ; KL> Set up data transfer for data patterns
3236 ;
3237 ; UC> Read a data pattern over the CBUS
3238 ; UC> Load PLIN with 017
3239 ;
3240 ; UC> Shift up 4 bits
3241 ; UC> Read formatter contents and write into EBUF
3242 ; KL> Read EBUF and verify the data
3243 ; KL> Start up the ucode to shift again
3244 ;
3245 ; Repeat the above shifting then verifying EBUF
3246 ; contents 10 times, until the data becomes
3247 ; all zero.
3248 ;
3249 ; Do for data patterns: 0's
3250 ; 1's
3251 ; 525252,,525252
3252 ; 000000,,007777
3253 ; 000000,,007070
3254 ; 000000,,000707
3255 ;
3256 ; Failure: ---
3257 ;#********************************************************************
3258
3259 ; Test data
3260
3261 004007' 254 00 0 00 004021' TSTC15: JRST TG15 ; go start test
3262 004010' 100604 000015 CBUS!NDMP!NDCB!ZCBUS!15 ; test mask
3263 004011' 004231' 013360' T15M,,[ASCIZ ^Fmtr Up Shift 4 (from PLIN) Test - SELRHTNIB=0^]
3264 004012' 013263' 012716' [EXP C20,C12,MLAST!C8],,[EXP C4,MLAST!C2]
3265 004013' 000000 004322' TSTC16 ; failure test table
3266 004014' 000000 004633' TSTC17 ; ...
3267 004015' 000000 005144' TSTC20
3268 004016' 000000 005456' TSTC21
3269 004017' 000000 005736' TSTC22
3270 004020' 777777 777777 -1
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 47
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1683
3271
3272 ; Start test
3273
3274 004021' 201 00 0 00 000000' TG15: MOVEI Z9 ; get address of module start
3275 004022' 260 17 0 00 003522* GO TRACE ; handle trace output
3276 004023' 201 01 0 00 004231' MOVEI 1,T15M ; set up microcode address
3277 004024' 260 17 0 00 003524* GO TLOAD ; load/verify it
3278 004025' 263 17 0 00 000000 RTN ; failed - exit test
3279
3280 ; Initialization
3281
3282 004026' 400 15 0 00 000000 TL15: SETZ ERFLG, ; clear error flag
3283 004027' 260 17 0 00 003527* GO IPACLR ; clear port
3284 004030' 402 00 0 00 003530* SETZM TSTSUB ; initialize subtest number
3285 MOVSI [000000,,000000 ; get address of buffer
3286 777777,,777777 ; contents
3287 525252,,525252
3288 000000,,007777
3289 000000,,007070
3290 004031' 205 00 0 00 013330' 000000,,000707]
3291 004032' 541 00 0 00 003545* HRRI BUFF ; build the BLT pointer
3292 004033' 251 00 0 00 000000# BLT BUFF+5 ; insert data into buffer
3293
3294 ; First ensure the data transfer is reset
3295
3296 004034' 201 01 0 00 005000 MOVEI 1,5000 ; get start address
3297 004035' 242 01 0 00 000001 LSH 1,1 ; position correctly
3298 004036' 260 17 0 00 003670* GO LDRAR ; load the register
3299 004037' 201 01 0 00 000010 MOVEI 1,MPRUN ; get MPRUN bit
3300 004040' 260 17 0 00 003674* GO LDCSR ; start up the port
3301 004041' 400 01 0 00 000000 SETZ 1, ; clear data
3302 004042' 260 17 0 00 004040* GO LDCSR ; stop the port
3303
3304 ; Now generate CCW list
3305
3306 004043' 200 01 0 00 013210' MOVE 1,[CBUFSZ,,CBUF] ; get pointer to control buffer
3307 004044' 260 17 0 00 003544* GO CHINIT ; initialize software
3308 004045' 551 01 0 00 004032* HRRZI 1,BUFF ; buffer address
3309 004046' 201 02 0 00 000006 MOVEI 2,6 ; word count
3310 004047' 400 03 0 00 000000 SETZ 3, ; clear zero fill specifier
3311 004050' 260 17 0 00 003550* GO GENCCW ; generate a CCW list
3312 004051' 201 06 0 00 004074' MOVEI 6,TS15 ; get test execute table address
3313
3314 ; Start up the data transfer
3315
3316 004052' 201 01 0 00 001000 MOVEI 1,1000 ; get start address
3317 004053' 242 01 0 00 000001 LSH 1,1 ; position correctly
3318 004054' 260 17 0 00 004036* GO LDRAR ; load the register
3319 004055' 201 01 0 00 000010 MOVEI 1,MPRUN ; get MPRUN bit
3320 004056' 260 17 0 00 004042* GO LDCSR ; start up the port
3321 004057' 201 00 0 00 000001 MOVEI 1 ; set up delay of 1 ms
3322 004060' 260 17 0 00 003560* GO ODELAY ; wait a bit
3323 004061' 400 01 0 00 000000 SETZ 1, ; clear data
3324 004062' 260 17 0 00 004056* GO LDCSR ; stop the port
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 48
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1684
3325
3326 ; Loop on test execute table entries
3327
3328 004063' 260 17 0 00 003563* TA15: GO TEXEC ; execute table entry
3329 004064' 254 00 0 00 004073' JRST TX15 ; end of table
3330 004065' 254 00 0 00 004063' JRST TA15 ; keep looping after call
3331 004066' 474 15 0 00 000000 SETO ERFLG, ; error - EBUF data incorrect
3332
3333 ; Handle error printouts and scope looping
3334
3335 004067' 027 00 0 00 004216' SCOPER MA15 ; print error message
3336 004070' 254 00 0 00 004026' JRST TL15 ; loop on error
3337 004071' 254 00 0 00 004073' JRST TX15 ; altmode exit
3338 004072' 322 15 0 00 004063' JUMPE ERFLG,TA15 ; do next sstep table entry
3339
3340 ; End of test
3341
3342 004073' 263 17 0 00 000000 TX15: RTN ; return
3343
3344 ; Test Execute Table, as: (CMD,parameters)
3345
3346 004074' 140000 004150' TS15: TTABLE (TCALL,TS15IN) ; initialize stuff
3347 004075' 200000 004153' TS15L: TTABLE (TCALLC,TS15NE) ; set up next data pattern
3348
3349 ; Shifted 4 bits
3350
3351 004076' 140000 004201' TS15A: TTABLE (TCALL,TS15NN) ; increment shift count
3352 004077' 400000 000100 TTABLE (TSSTAR,100) ; start up port
3353 004100' 240001 004204' TTABLE (TCHECK,1,TS15RS) ; check if completed
3354 004101' 340000 000000 TTABLE (TEXIT) ; exit if error yet
3355
3356 ; Shifted 8 bits
3357
3358 004102' 140000 004201' TTABLE (TCALL,TS15NN) ; increment shift count
3359 004103' 400000 000100 TTABLE (TSSTAR,100) ; start up port
3360 004104' 240001 004205' TTABLE (TCHECK,1,TS15RS+1) ; check if completed
3361 004105' 340000 000000 TTABLE (TEXIT) ; exit if error yet
3362
3363 ; Shifted 12 bits
3364
3365 004106' 140000 004201' TTABLE (TCALL,TS15NN) ; increment shift count
3366 004107' 400000 000100 TTABLE (TSSTAR,100) ; start up port
3367 004110' 240001 004206' TTABLE (TCHECK,1,TS15RS+2) ; check if completed
3368 004111' 340000 000000 TTABLE (TEXIT) ; exit if error yet
3369
3370 ; Shifted 16 bits
3371
3372 004112' 140000 004201' TTABLE (TCALL,TS15NN) ; increment shift count
3373 004113' 400000 000100 TTABLE (TSSTAR,100) ; start up port
3374 004114' 240001 004207' TTABLE (TCHECK,1,TS15RS+3) ; check if completed
3375 004115' 340000 000000 TTABLE (TEXIT) ; exit if error yet
3376
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 49
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1685
3377
3378 ; Shifted 20 bits
3379
3380 004116' 140000 004201' TTABLE (TCALL,TS15NN) ; increment shift count
3381 004117' 400000 000100 TTABLE (TSSTAR,100) ; start up port
3382 004120' 240001 004210' TTABLE (TCHECK,1,TS15RS+4) ; check if completed
3383 004121' 340000 000000 TTABLE (TEXIT) ; exit if error yet
3384
3385 ; Shifted 24 bits
3386
3387 004122' 140000 004201' TTABLE (TCALL,TS15NN) ; increment shift count
3388 004123' 400000 000100 TTABLE (TSSTAR,100) ; start up port
3389 004124' 240001 004211' TTABLE (TCHECK,1,TS15RS+5) ; check if completed
3390 004125' 340000 000000 TTABLE (TEXIT) ; exit if error yet
3391
3392 ; Shifted 28 bits
3393
3394 004126' 140000 004201' TTABLE (TCALL,TS15NN) ; increment shift count
3395 004127' 400000 000100 TTABLE (TSSTAR,100) ; start up port
3396 004130' 240001 004212' TTABLE (TCHECK,1,TS15RS+6) ; check if completed
3397 004131' 340000 000000 TTABLE (TEXIT) ; exit if error yet
3398
3399 ; Shifted 32 bits
3400
3401 004132' 140000 004201' TTABLE (TCALL,TS15NN) ; increment shift count
3402 004133' 400000 000100 TTABLE (TSSTAR,100) ; start up port
3403 004134' 240001 004213' TTABLE (TCHECK,1,TS15RS+7) ; check if completed
3404 004135' 340000 000000 TTABLE (TEXIT) ; exit if error yet
3405
3406 ; Shifted 36 bits
3407
3408 004136' 140000 004201' TTABLE (TCALL,TS15NN) ; increment shift count
3409 004137' 400000 000100 TTABLE (TSSTAR,100) ; start up port
3410 004140' 240001 004214' TTABLE (TCHECK,1,TS15RS+10) ; check if completed
3411 004141' 340000 000000 TTABLE (TEXIT) ; exit if error yet
3412
3413 ; Shifted 40 bits
3414
3415 004142' 140000 004201' TTABLE (TCALL,TS15NN) ; increment shift count
3416 004143' 400000 000100 TTABLE (TSSTAR,100) ; start up port
3417 004144' 240001 004215' TTABLE (TCHECK,1,TS15RS+11) ; check if completed
3418 004145' 340000 000000 TTABLE (TEXIT) ; exit if error yet
3419 004146' 300000 004075' TTABLE (TJRST,TS15L) ; loop till done
3420 004147' 000000 000000 TTABLE (TLAST)
3421
3422 ; Initialize stuff
3423
3424 004150' 201 00 0 00 000000# TS15IN: MOVEI BUFF-1 ; initialize buffer pointer
3425 004151' 202 00 0 00 014017' MOVEM T15BUF# ; ...
3426 004152' 263 17 0 00 000000 RTN ; return
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 50
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1686
3427
3428 ; Set up next data pattern
3429
3430 004153' 350 01 0 00 014017' TS15NE: AOS 1,T15BUF ; point to next data pattern
3431 004154' 307 01 0 00 000000# CAIG 1,BUFF+5 ; done yet?
3432 004155' 350 00 0 17 000000 AOS (P) ; no - set up proper return
3433 004156' 200 00 0 01 000000 MOVE (1) ; get data pattern
3434 004157' 201 02 0 00 004204' MOVEI 2,TS15RS ; get initial address of EBUF data
3435 004160' 400 01 0 00 000000 TS15N0: SETZ 1, ; first shift doesn't include PLIN data
3436 004161' 302 02 0 00 004204' CAIE 2,TS15RS ; so check if first shift and if not
3437 004162' 505 01 0 00 741777 HRLI 1,741777 ; get initial PLIN data (left 8 bits)
3438 004163' 246 00 0 00 000004 LSHC 4 ; shift 4 bits
3439 004164' 202 00 0 02 000000 MOVEM (2) ; save it
3440 004165' 350 00 0 00 000002 AOS 2 ; point to next address
3441 004166' 307 02 0 00 004215' CAIG 2,TS15RS+11 ; done yet?
3442 004167' 254 00 0 00 004160' JRST TS15N0 ; no - loop till done
3443 004170' 402 00 0 00 014042' SETZM TS15NM# ; initialize number of shifts
3444
3445 ; Read the next word
3446
3447 004171' 201 01 0 00 000200 MOVEI 1,200 ; get start address
3448 004172' 242 01 0 00 000001 LSH 1,1 ; position correctly
3449 004173' 260 17 0 00 004054* GO LDRAR ; load the register
3450 004174' 201 01 0 00 000010 MOVEI 1,MPRUN ; get MPRUN bit
3451 004175' 260 17 0 00 004062* GO LDCSR ; start up the port
3452 004176' 400 01 0 00 000000 SETZ 1, ; clear data
3453 004177' 260 17 0 00 004175* GO LDCSR ; stop the port
3454 004200' 263 17 0 00 000000 RTN ; return
3455
3456 ; Increment shift count
3457
3458 004201' 201 00 0 00 000004 TS15NN: MOVEI 4 ; get a 4
3459 004202' 272 00 0 00 014042' ADDM TS15NM ; add it
3460 004203' 263 17 0 00 000000 RTN ; return
3461
3462 004204' TS15RS: BLOCK 12 ; correct EBUF data
3463
3464 ; Error messages
3465
3466 004216' 240000 004220' MA15: CALL!TXNOT!MA15PN ; print data pattern ...
3467 004217' 000000000000# LAST!CALL!TXALL!TTPNT ; print test data
3468
3469 004220' 037 00 0 00 013336' MA15PN: TMSGC <Data > ; get data and
3470 004221' 200 01 0 00 014017' MOVE 1,T15BUF ; print it
3471 004222' 200 00 0 01 000000 MOVE (1)
3472 004223' 037 13 0 00 000000 PNTHW
3473 004224' 037 00 0 00 013372' TMSG < shifted up from PLIN >
3474 004225' 200 00 0 00 014042' MOVE TS15NM ; get shift count
3475 004226' 037 15 0 00 000000 PNTDEC
3476 004227' 037 00 0 00 013343' TMSG <. bits, result in EBUF>
3477 004230' 263 17 0 00 000000 RTN
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 51
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1687
3478
3479 ; Microcode - Shift 4 bits
3480
3481 004231' 010001 010000 T15M: MWORD <ADDR=100,JMAP,J=101,D=1> ; 100
3482 004232' 001000 000040
3483 004233' 010100 000120 MWORD <CONT,D=1,SELF,MGC=120> ; 101
3484 004234' 001000 003340
3485 004235' 010200 000200 MWORD <CONT,SD0,OR,B=4,D=2,SELM,MGC=200> ; 102
3486 004236' 732002 002340
3487 004237' 010351 000000 MWORD <JMAP,J=5100,D=1> ; 103
3488 004240' 001000 000040
3489
3490 ; Routine to read a word from CBUS into the formatter.
3491
3492 004241' 020002 010000 MWORD <ADDR=200,JMAP,J=201> ; 200
3493 004242' 000000 000040
3494 004243' 020102 030000 MWORD <CJP,J=203,D=1,CENA,CCCA> ; 201
3495 004244' 001400 000060
3496 004245' 020202 010000 MWORD <JMAP,J=201,D=1> ; 202
3497 004246' 001000 000040
3498 004247' 020300 000004 MWORD <CONT,D=1,SELC,MGC=4> ; 203
3499 004250' 001000 004340
3500 004251' 020400 000200 MWORD <CONT,SD0,OR,B=3,D=2,SELM,MGC=200> ; 204
3501 004252' 732001 402340
3502 004253' 020500 000000 MWORD <JZ> ; 205
3503 004254' 000000 000000
3504
3505 ; Initialization
3506
3507 004255' 100010 010020 MWORD <ADDR=1000,JMAP,J=1001,SELM,MGC=20> ; 1000
3508 004256' 000000 002040
3509 004257' 100100 000200 MWORD <CONT,D=1,SELC,MGC=200> ; 1001
3510 004260' 001000 004340
3511 004261' 100200 310017 MWORD <LDCT,J=31,SD0,OR,D=2,SKCN,MGC=017> ; 1002
3512 004262' 732000 240300
3513 004263' 100310 030000 MWORD <RPCT,J=1003,S0A,OR,D=5> ; 1003
3514 004264' 435000 000220
3515 004265' 100400 002040 MWORD <CONT,S0A,OR,D=1,OENA,SELM,MGC=40> ; 1004
3516 004266' 431000 002340
3517 004267' 100500 000006 MWORD <JZ,SD0,D=1,SELP,MGC=6> ; 1005
3518 004270' 701000 001000
3519 004271' 000000 000000 MWORD <ADDR=0,JZ> ; 0
3520 004272' 000000 000000
3521
3522 ; Initialization step
3523
3524 004273' 500050 010100 MWORD <ADDR=5000,JMAP,J=5001,SELC,MGC=100> ; 5000
3525 004274' 000000 004040
3526 004275' 500100 000020 MWORD <JZ,SELM,MGC=20> ; 5001
3527 004276' 000000 002000
3528
3529 ; Subroutine - Passed - Write 1 to bit 12 of CSR register
3530
3531 004277' 510000 000000 MWORD <ADDR=5100,CONT,SD0,AND,B=2,D=2> ; 5100
3532 004300' 742001 000340
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 51-1
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1688
3533 004301' 510100 000000 MWORD <CONT,S0B,PLUS,B=2,D=2,CRY> ; 5101
3534 004302' 302001 000740
3535 004303' 510200 260000 MWORD <LDCT,J=26> ; 5102
3536 004304' 000000 000300
3537 004305' 510351 030000 MWORD <RPCT,J=5103,SAB,PLUS,A=2,B=2,D=2> ; 5103
3538 004306' 102021 000220
3539 004307' 510400 002004 MWORD <CONT,S0A,A=2,OR,D=1,OENA,SELE,MGC=4> ; 5104
3540 004310' 431020 005340
3541 004311' 510551 070040 MWORD <CJP,J=5107,CENA,CCGC,D=1,SELE,MGC=40> ; 5105
3542 004312' 001400 015060
3543 004313' 510651 050000 MWORD <JMAP,J=5105,D=1> ; 5106
3544 004314' 001000 000040
3545 004315' 510700 000200 MWORD <CONT,S0A,A=1,OR,D=1,SELE,MGC=200> ; 5107
3546 004316' 431010 005340
3547 004317' 511051 102004 MWORD <JMAP,J=5110,D=1,S0A,A=4,OR,OENA,SELE,MGC=4> ; 5110
3548 004320' 431040 005040
3549 004321' 777777 777777 -1
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 52
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1689
3550
3551 ;#********************************************************************
3552 ;* Test 16 - Fmtr Up Shift 4 (from PLIN) Test - SELRHTNIB=0
3553 ;
3554 ; Description: Verify that the formatter can shift various data
3555 ; patterns up 4 bits at a time while inserting bits
3556 ; from the PLIN into the formatter. The data loaded
3557 ; into the PLIN initially is 360.
3558 ;
3559 ; Procedure: KL> Port Clear
3560 ; KL> Set up data transfer for data patterns
3561 ;
3562 ; UC> Read a data pattern over the CBUS
3563 ; UC> Load PLIN with 360
3564 ;
3565 ; UC> Shift up 4 bits
3566 ; UC> Read formatter contents and write into EBUF
3567 ; KL> Read EBUF and verify the data
3568 ; KL> Start up the ucode to shift again
3569 ;
3570 ; Repeat the above shifting then verifying EBUF
3571 ; contents 10 times, until the data becomes
3572 ; all zero.
3573 ;
3574 ; Do for data patterns: 0's
3575 ; 1's
3576 ; 525252,,525252
3577 ; 000000,,007777
3578 ; 000000,,007070
3579 ; 000000,,000707
3580 ;
3581 ; Failure: ---
3582 ;#********************************************************************
3583
3584 ; Test data
3585
3586 004322' 254 00 0 00 004334' TSTC16: JRST TG16 ; go start test
3587 004323' 100604 000016 CBUS!NDMP!NDCB!ZCBUS!16 ; test mask
3588 004324' 004542' 013360' T16M,,[ASCIZ ^Fmtr Up Shift 4 (from PLIN) Test - SELRHTNIB=0^]
3589 004325' 013263' 012716' [EXP C20,C12,MLAST!C8],,[EXP C4,MLAST!C2]
3590 004326' 000000 004633' TSTC17 ; failure test table
3591 004327' 000000 005144' TSTC20 ; ...
3592 004330' 000000 005456' TSTC21
3593 004331' 000000 005736' TSTC22
3594 004332' 000000 006215' TSTC23
3595 004333' 777777 777777 -1
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 53
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1690
3596
3597 ; Start test
3598
3599 004334' 201 00 0 00 000000' TG16: MOVEI Z9 ; get address of module start
3600 004335' 260 17 0 00 004022* GO TRACE ; handle trace output
3601 004336' 201 01 0 00 004542' MOVEI 1,T16M ; set up microcode address
3602 004337' 260 17 0 00 004024* GO TLOAD ; load/verify it
3603 004340' 263 17 0 00 000000 RTN ; failed - exit test
3604
3605 ; Initialization
3606
3607 004341' 400 15 0 00 000000 TL16: SETZ ERFLG, ; clear error flag
3608 004342' 260 17 0 00 004027* GO IPACLR ; clear port
3609 004343' 402 00 0 00 004030* SETZM TSTSUB ; initialize subtest number
3610 MOVSI [000000,,000000 ; get address of buffer
3611 777777,,777777 ; contents
3612 525252,,525252
3613 000000,,007777
3614 000000,,007070
3615 004344' 205 00 0 00 013330' 000000,,000707]
3616 004345' 541 00 0 00 004045* HRRI BUFF ; build the BLT pointer
3617 004346' 251 00 0 00 000000# BLT BUFF+5 ; insert data into buffer
3618
3619 ; First ensure the data transfer is reset
3620
3621 004347' 201 01 0 00 005000 MOVEI 1,5000 ; get start address
3622 004350' 242 01 0 00 000001 LSH 1,1 ; position correctly
3623 004351' 260 17 0 00 004173* GO LDRAR ; load the register
3624 004352' 201 01 0 00 000010 MOVEI 1,MPRUN ; get MPRUN bit
3625 004353' 260 17 0 00 004177* GO LDCSR ; start up the port
3626 004354' 400 01 0 00 000000 SETZ 1, ; clear data
3627 004355' 260 17 0 00 004353* GO LDCSR ; stop the port
3628
3629 ; Now generate CCW list
3630
3631 004356' 200 01 0 00 013210' MOVE 1,[CBUFSZ,,CBUF] ; get pointer to control buffer
3632 004357' 260 17 0 00 004044* GO CHINIT ; initialize software
3633 004360' 551 01 0 00 004345* HRRZI 1,BUFF ; buffer address
3634 004361' 201 02 0 00 000006 MOVEI 2,6 ; word count
3635 004362' 400 03 0 00 000000 SETZ 3, ; clear zero fill specifier
3636 004363' 260 17 0 00 004050* GO GENCCW ; generate a CCW list
3637 004364' 201 06 0 00 004407' MOVEI 6,TS16 ; get test execute table address
3638
3639 ; Start up the data transfer
3640
3641 004365' 201 01 0 00 001000 MOVEI 1,1000 ; get start address
3642 004366' 242 01 0 00 000001 LSH 1,1 ; position correctly
3643 004367' 260 17 0 00 004351* GO LDRAR ; load the register
3644 004370' 201 01 0 00 000010 MOVEI 1,MPRUN ; get MPRUN bit
3645 004371' 260 17 0 00 004355* GO LDCSR ; start up the port
3646 004372' 201 00 0 00 000001 MOVEI 1 ; set up delay of 1 ms
3647 004373' 260 17 0 00 004060* GO ODELAY ; wait a bit
3648 004374' 400 01 0 00 000000 SETZ 1, ; clear data
3649 004375' 260 17 0 00 004371* GO LDCSR ; stop the port
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 54
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1691
3650
3651 ; Loop on test execute table entries
3652
3653 004376' 260 17 0 00 004063* TA16: GO TEXEC ; execute table entry
3654 004377' 254 00 0 00 004406' JRST TX16 ; end of table
3655 004400' 254 00 0 00 004376' JRST TA16 ; keep looping after call
3656 004401' 474 15 0 00 000000 SETO ERFLG, ; error - EBUF data incorrect
3657
3658 ; Handle error printouts and scope looping
3659
3660 004402' 027 00 0 00 004527' SCOPER MA16 ; print error message
3661 004403' 254 00 0 00 004341' JRST TL16 ; loop on error
3662 004404' 254 00 0 00 004406' JRST TX16 ; altmode exit
3663 004405' 322 15 0 00 004376' JUMPE ERFLG,TA16 ; do next sstep table entry
3664
3665 ; End of test
3666
3667 004406' 263 17 0 00 000000 TX16: RTN ; return
3668
3669 ; Test Execute Table, as: (CMD,parameters)
3670
3671 004407' 140000 004463' TS16: TTABLE (TCALL,TS16IN) ; initialize stuff
3672 004410' 200000 004466' TS16L: TTABLE (TCALLC,TS16NE) ; set up next data pattern
3673
3674 ; Shifted 4 bits
3675
3676 004411' 140000 004512' TS16A: TTABLE (TCALL,TS16NN) ; increment shift count
3677 004412' 400000 000100 TTABLE (TSSTAR,100) ; start up port
3678 004413' 240001 004515' TTABLE (TCHECK,1,TS16RS) ; check if completed
3679 004414' 340000 000000 TTABLE (TEXIT) ; exit if error yet
3680
3681 ; Shifted 8 bits
3682
3683 004415' 140000 004512' TTABLE (TCALL,TS16NN) ; increment shift count
3684 004416' 400000 000100 TTABLE (TSSTAR,100) ; start up port
3685 004417' 240001 004516' TTABLE (TCHECK,1,TS16RS+1) ; check if completed
3686 004420' 340000 000000 TTABLE (TEXIT) ; exit if error yet
3687
3688 ; Shifted 12 bits
3689
3690 004421' 140000 004512' TTABLE (TCALL,TS16NN) ; increment shift count
3691 004422' 400000 000100 TTABLE (TSSTAR,100) ; start up port
3692 004423' 240001 004517' TTABLE (TCHECK,1,TS16RS+2) ; check if completed
3693 004424' 340000 000000 TTABLE (TEXIT) ; exit if error yet
3694
3695 ; Shifted 16 bits
3696
3697 004425' 140000 004512' TTABLE (TCALL,TS16NN) ; increment shift count
3698 004426' 400000 000100 TTABLE (TSSTAR,100) ; start up port
3699 004427' 240001 004520' TTABLE (TCHECK,1,TS16RS+3) ; check if completed
3700 004430' 340000 000000 TTABLE (TEXIT) ; exit if error yet
3701
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 55
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1692
3702
3703 ; Shifted 20 bits
3704
3705 004431' 140000 004512' TTABLE (TCALL,TS16NN) ; increment shift count
3706 004432' 400000 000100 TTABLE (TSSTAR,100) ; start up port
3707 004433' 240001 004521' TTABLE (TCHECK,1,TS16RS+4) ; check if completed
3708 004434' 340000 000000 TTABLE (TEXIT) ; exit if error yet
3709
3710 ; Shifted 24 bits
3711
3712 004435' 140000 004512' TTABLE (TCALL,TS16NN) ; increment shift count
3713 004436' 400000 000100 TTABLE (TSSTAR,100) ; start up port
3714 004437' 240001 004522' TTABLE (TCHECK,1,TS16RS+5) ; check if completed
3715 004440' 340000 000000 TTABLE (TEXIT) ; exit if error yet
3716
3717 ; Shifted 28 bits
3718
3719 004441' 140000 004512' TTABLE (TCALL,TS16NN) ; increment shift count
3720 004442' 400000 000100 TTABLE (TSSTAR,100) ; start up port
3721 004443' 240001 004523' TTABLE (TCHECK,1,TS16RS+6) ; check if completed
3722 004444' 340000 000000 TTABLE (TEXIT) ; exit if error yet
3723
3724 ; Shifted 32 bits
3725
3726 004445' 140000 004512' TTABLE (TCALL,TS16NN) ; increment shift count
3727 004446' 400000 000100 TTABLE (TSSTAR,100) ; start up port
3728 004447' 240001 004524' TTABLE (TCHECK,1,TS16RS+7) ; check if completed
3729 004450' 340000 000000 TTABLE (TEXIT) ; exit if error yet
3730
3731 ; Shifted 36 bits
3732
3733 004451' 140000 004512' TTABLE (TCALL,TS16NN) ; increment shift count
3734 004452' 400000 000100 TTABLE (TSSTAR,100) ; start up port
3735 004453' 240001 004525' TTABLE (TCHECK,1,TS16RS+10) ; check if completed
3736 004454' 340000 000000 TTABLE (TEXIT) ; exit if error yet
3737
3738 ; Shifted 40 bits
3739
3740 004455' 140000 004512' TTABLE (TCALL,TS16NN) ; increment shift count
3741 004456' 400000 000100 TTABLE (TSSTAR,100) ; start up port
3742 004457' 240001 004526' TTABLE (TCHECK,1,TS16RS+11) ; check if completed
3743 004460' 340000 000000 TTABLE (TEXIT) ; exit if error yet
3744 004461' 300000 004410' TTABLE (TJRST,TS16L) ; loop till done
3745 004462' 000000 000000 TTABLE (TLAST)
3746
3747 ; Initialize stuff
3748
3749 004463' 201 00 0 00 000000# TS16IN: MOVEI BUFF-1 ; initialize buffer pointer
3750 004464' 202 00 0 00 014020' MOVEM T16BUF# ; ...
3751 004465' 263 17 0 00 000000 RTN ; return
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 56
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1693
3752
3753 ; Set up next data pattern
3754
3755 004466' 350 01 0 00 014020' TS16NE: AOS 1,T16BUF ; point to next data pattern
3756 004467' 307 01 0 00 000000# CAIG 1,BUFF+5 ; done yet?
3757 004470' 350 00 0 17 000000 AOS (P) ; no - set up proper return
3758 004471' 200 00 0 01 000000 MOVE (1) ; get data pattern
3759 004472' 201 02 0 00 004515' MOVEI 2,TS16RS ; get initial address of EBUF data
3760 004473' 505 01 0 00 037777 TS16N0: HRLI 1,37777 ; get initial PLIN data (left 8 bits)
3761 004474' 246 00 0 00 000004 LSHC 4 ; shift 4 bits
3762 004475' 202 00 0 02 000000 MOVEM (2) ; save it
3763 004476' 350 00 0 00 000002 AOS 2 ; point to next address
3764 004477' 307 02 0 00 004526' CAIG 2,TS16RS+11 ; done yet?
3765 004500' 254 00 0 00 004473' JRST TS16N0 ; no - loop till done
3766 004501' 402 00 0 00 014043' SETZM TS16NM# ; initialize number of shifts
3767
3768 ; Read the next word
3769
3770 004502' 201 01 0 00 000200 MOVEI 1,200 ; get start address
3771 004503' 242 01 0 00 000001 LSH 1,1 ; position correctly
3772 004504' 260 17 0 00 004367* GO LDRAR ; load the register
3773 004505' 201 01 0 00 000010 MOVEI 1,MPRUN ; get MPRUN bit
3774 004506' 260 17 0 00 004375* GO LDCSR ; start up the port
3775 004507' 400 01 0 00 000000 SETZ 1, ; clear data
3776 004510' 260 17 0 00 004506* GO LDCSR ; stop the port
3777 004511' 263 17 0 00 000000 RTN ; return
3778
3779 ; Increment shift count
3780
3781 004512' 201 00 0 00 000004 TS16NN: MOVEI 4 ; get a 4
3782 004513' 272 00 0 00 014043' ADDM TS16NM ; add it
3783 004514' 263 17 0 00 000000 RTN ; return
3784
3785 004515' TS16RS: BLOCK 12 ; correct EBUF data
3786
3787 ; Error messages
3788
3789 004527' 240000 004531' MA16: CALL!TXNOT!MA16PN ; print data pattern ...
3790 004530' 000000000000# LAST!CALL!TXALL!TTPNT ; print test data
3791
3792 004531' 037 00 0 00 013336' MA16PN: TMSGC <Data > ; get data and
3793 004532' 200 01 0 00 014020' MOVE 1,T16BUF ; print it
3794 004533' 200 00 0 01 000000 MOVE (1)
3795 004534' 037 13 0 00 000000 PNTHW
3796 004535' 037 00 0 00 013372' TMSG < shifted up from PLIN >
3797 004536' 200 00 0 00 014043' MOVE TS16NM ; get shift count
3798 004537' 037 15 0 00 000000 PNTDEC
3799 004540' 037 00 0 00 013343' TMSG <. bits, result in EBUF>
3800 004541' 263 17 0 00 000000 RTN
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 57
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1694
3801
3802 ; Microcode - Shift 4 bits
3803
3804 004542' 010001 010000 T16M: MWORD <ADDR=100,JMAP,J=101,D=1> ; 100
3805 004543' 001000 000040
3806 004544' 010100 000120 MWORD <CONT,D=1,SELF,MGC=120> ; 101
3807 004545' 001000 003340
3808 004546' 010200 000200 MWORD <CONT,SD0,OR,B=4,D=2,SELM,MGC=200> ; 102
3809 004547' 732002 002340
3810 004550' 010351 000000 MWORD <JMAP,J=5100,D=1> ; 103
3811 004551' 001000 000040
3812
3813 ; Routine to read a word from CBUS into the formatter.
3814
3815 004552' 020002 010000 MWORD <ADDR=200,JMAP,J=201> ; 200
3816 004553' 000000 000040
3817 004554' 020102 030000 MWORD <CJP,J=203,D=1,CENA,CCCA> ; 201
3818 004555' 001400 000060
3819 004556' 020202 010000 MWORD <JMAP,J=201,D=1> ; 202
3820 004557' 001000 000040
3821 004560' 020300 000004 MWORD <CONT,D=1,SELC,MGC=4> ; 203
3822 004561' 001000 004340
3823 004562' 020400 000200 MWORD <CONT,SD0,OR,B=3,D=2,SELM,MGC=200> ; 204
3824 004563' 732001 402340
3825 004564' 020500 000000 MWORD <JZ> ; 205
3826 004565' 000000 000000
3827
3828 ; Initialization
3829
3830 004566' 100010 010020 MWORD <ADDR=1000,JMAP,J=1001,SELM,MGC=20> ; 1000
3831 004567' 000000 002040
3832 004570' 100100 000200 MWORD <CONT,D=1,SELC,MGC=200> ; 1001
3833 004571' 001000 004340
3834 004572' 100200 310360 MWORD <LDCT,J=31,SD0,OR,D=2,SKCN,MGC=360> ; 1002
3835 004573' 732000 240300
3836 004574' 100310 030000 MWORD <RPCT,J=1003,S0A,OR,D=5> ; 1003
3837 004575' 435000 000220
3838 004576' 100400 002040 MWORD <CONT,S0A,OR,D=1,OENA,SELM,MGC=40> ; 1004
3839 004577' 431000 002340
3840 004600' 100500 000006 MWORD <JZ,SD0,D=1,SELP,MGC=6> ; 1005
3841 004601' 701000 001000
3842 004602' 000000 000000 MWORD <ADDR=0,JZ> ; 0
3843 004603' 000000 000000
3844
3845 ; Initialization step
3846
3847 004604' 500050 010100 MWORD <ADDR=5000,JMAP,J=5001,SELC,MGC=100> ; 5000
3848 004605' 000000 004040
3849 004606' 500100 000020 MWORD <JZ,SELM,MGC=20> ; 5001
3850 004607' 000000 002000
3851
3852 ; Subroutine - Passed - Write 1 to bit 12 of CSR register
3853
3854 004610' 510000 000000 MWORD <ADDR=5100,CONT,SD0,AND,B=2,D=2> ; 5100
3855 004611' 742001 000340
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 57-1
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1695
3856 004612' 510100 000000 MWORD <CONT,S0B,PLUS,B=2,D=2,CRY> ; 5101
3857 004613' 302001 000740
3858 004614' 510200 260000 MWORD <LDCT,J=26> ; 5102
3859 004615' 000000 000300
3860 004616' 510351 030000 MWORD <RPCT,J=5103,SAB,PLUS,A=2,B=2,D=2> ; 5103
3861 004617' 102021 000220
3862 004620' 510400 002004 MWORD <CONT,S0A,A=2,OR,D=1,OENA,SELE,MGC=4> ; 5104
3863 004621' 431020 005340
3864 004622' 510551 070040 MWORD <CJP,J=5107,CENA,CCGC,D=1,SELE,MGC=40> ; 5105
3865 004623' 001400 015060
3866 004624' 510651 050000 MWORD <JMAP,J=5105,D=1> ; 5106
3867 004625' 001000 000040
3868 004626' 510700 000200 MWORD <CONT,S0A,A=1,OR,D=1,SELE,MGC=200> ; 5107
3869 004627' 431010 005340
3870 004630' 511051 102004 MWORD <JMAP,J=5110,S0A,A=4,OR,D=1,OENA,SELE,MGC=4> ; 5110
3871 004631' 431040 005040
3872 004632' 777777 777777 -1
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 58
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1696
3873
3874 ;#********************************************************************
3875 ;* Test 17 - Fmtr Up Shift 4 (from PLIN) Test - SELRHTNIB=1
3876 ;
3877 ; Description: Verify that the formatter can shift various data
3878 ; patterns up 4 bits at a time while inserting bits
3879 ; from the PLIN into the formatter. The data loaded
3880 ; into the PLIN initially is 017.
3881 ;
3882 ; Procedure: KL> Port Clear
3883 ; KL> Set up data transfer for data patterns
3884 ;
3885 ; UC> Read a data pattern over the CBUS
3886 ; UC> Load PLIN with 017
3887 ;
3888 ; UC> Shift up 4 bits
3889 ; UC> Read formatter contents and write into EBUF
3890 ; KL> Read EBUF and verify the data
3891 ; KL> Start up the ucode to shift again
3892 ;
3893 ; Repeat the above shifting then verifying EBUF
3894 ; contents 10 times, until the data becomes
3895 ; all zero.
3896 ;
3897 ; Do for data patterns: 0's
3898 ; 1's
3899 ; 525252,,525252
3900 ; 000000,,007777
3901 ; 000000,,007070
3902 ; 000000,,000707
3903 ;
3904 ; Failure: ---
3905 ;#********************************************************************
3906
3907 ; Test data
3908
3909 004633' 254 00 0 00 004645' TSTC17: JRST TG17 ; go start test
3910 004634' 100604 000017 CBUS!NDMP!NDCB!ZCBUS!17 ; test mask
3911 004635' 005053' 013377' T17M,,[ASCIZ ^Fmtr Up Shift 4 (from PLIN) Test - SELRHTNIB=1^]
3912 004636' 013263' 012716' [EXP C20,C12,MLAST!C8],,[EXP C4,MLAST!C2]
3913 004637' 000000 005144' TSTC20 ; failure test table
3914 004640' 000000 005456' TSTC21 ; ...
3915 004641' 000000 005736' TSTC22
3916 004642' 000000 006215' TSTC23
3917 004643' 000000 006473' TSTC24
3918 004644' 777777 777777 -1
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 59
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1697
3919
3920 ; Start test
3921
3922 004645' 201 00 0 00 000000' TG17: MOVEI Z9 ; get address of module start
3923 004646' 260 17 0 00 004335* GO TRACE ; handle trace output
3924 004647' 201 01 0 00 005053' MOVEI 1,T17M ; set up microcode address
3925 004650' 260 17 0 00 004337* GO TLOAD ; load/verify it
3926 004651' 263 17 0 00 000000 RTN ; failed - exit test
3927
3928 ; Initialization
3929
3930 004652' 400 15 0 00 000000 TL17: SETZ ERFLG, ; clear error flag
3931 004653' 260 17 0 00 004342* GO IPACLR ; clear port
3932 004654' 402 00 0 00 004343* SETZM TSTSUB ; initialize subtest number
3933 MOVSI [000000,,000000 ; get address of buffer
3934 777777,,777777 ; contents
3935 525252,,525252
3936 000000,,007777
3937 000000,,007070
3938 004655' 205 00 0 00 013330' 000000,,000707]
3939 004656' 541 00 0 00 004360* HRRI BUFF ; build the BLT pointer
3940 004657' 251 00 0 00 000000# BLT BUFF+5 ; insert data into buffer
3941
3942 ; First ensure the data transfer is reset
3943
3944 004660' 201 01 0 00 005000 MOVEI 1,5000 ; get start address
3945 004661' 242 01 0 00 000001 LSH 1,1 ; position correctly
3946 004662' 260 17 0 00 004504* GO LDRAR ; load the register
3947 004663' 201 01 0 00 000010 MOVEI 1,MPRUN ; get MPRUN bit
3948 004664' 260 17 0 00 004510* GO LDCSR ; start up the port
3949 004665' 400 01 0 00 000000 SETZ 1, ; clear data
3950 004666' 260 17 0 00 004664* GO LDCSR ; stop the port
3951
3952 ; Now generate CCW list
3953
3954 004667' 200 01 0 00 013210' MOVE 1,[CBUFSZ,,CBUF] ; get pointer to control buffer
3955 004670' 260 17 0 00 004357* GO CHINIT ; initialize software
3956 004671' 551 01 0 00 004656* HRRZI 1,BUFF ; buffer address
3957 004672' 201 02 0 00 000006 MOVEI 2,6 ; word count
3958 004673' 400 03 0 00 000000 SETZ 3, ; clear zero fill specifier
3959 004674' 260 17 0 00 004363* GO GENCCW ; generate a CCW list
3960 004675' 201 06 0 00 004720' MOVEI 6,TS17 ; get test execute table address
3961
3962 ; Start up the data transfer
3963
3964 004676' 201 01 0 00 001000 MOVEI 1,1000 ; get start address
3965 004677' 242 01 0 00 000001 LSH 1,1 ; position correctly
3966 004700' 260 17 0 00 004662* GO LDRAR ; load the register
3967 004701' 201 01 0 00 000010 MOVEI 1,MPRUN ; get MPRUN bit
3968 004702' 260 17 0 00 004666* GO LDCSR ; start up the port
3969 004703' 201 00 0 00 000001 MOVEI 1 ; set up delay of 1 ms
3970 004704' 260 17 0 00 004373* GO ODELAY ; wait a bit
3971 004705' 400 01 0 00 000000 SETZ 1, ; clear data
3972 004706' 260 17 0 00 004702* GO LDCSR ; stop the port
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 60
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1698
3973
3974 ; Loop on test execute table entries
3975
3976 004707' 260 17 0 00 004376* TA17: GO TEXEC ; execute table entry
3977 004710' 254 00 0 00 004717' JRST TX17 ; end of table
3978 004711' 254 00 0 00 004707' JRST TA17 ; keep looping after call
3979 004712' 474 15 0 00 000000 SETO ERFLG, ; error - EBUF data incorrect
3980
3981 ; Handle error printouts and scope looping
3982
3983 004713' 027 00 0 00 005040' SCOPER MA17 ; print error message
3984 004714' 254 00 0 00 004652' JRST TL17 ; loop on error
3985 004715' 254 00 0 00 004717' JRST TX17 ; altmode exit
3986 004716' 322 15 0 00 004707' JUMPE ERFLG,TA17 ; do next sstep table entry
3987
3988 ; End of test
3989
3990 004717' 263 17 0 00 000000 TX17: RTN ; return
3991
3992 ; Test Execute Table, as: (CMD,parameters)
3993
3994 004720' 140000 004774' TS17: TTABLE (TCALL,TS17IN) ; initialize stuff
3995 004721' 200000 004777' TS17L: TTABLE (TCALLC,TS17NE) ; set up next data pattern
3996
3997 ; Shifted 4 bits
3998
3999 004722' 140000 005023' TS17A: TTABLE (TCALL,TS17NN) ; increment shift count
4000 004723' 400000 000100 TTABLE (TSSTAR,100) ; start up port
4001 004724' 240001 005026' TTABLE (TCHECK,1,TS17RS) ; check if completed
4002 004725' 340000 000000 TTABLE (TEXIT) ; exit if error yet
4003
4004 ; Shifted 8 bits
4005
4006 004726' 140000 005023' TTABLE (TCALL,TS17NN) ; increment shift count
4007 004727' 400000 000100 TTABLE (TSSTAR,100) ; start up port
4008 004730' 240001 005027' TTABLE (TCHECK,1,TS17RS+1) ; check if completed
4009 004731' 340000 000000 TTABLE (TEXIT) ; exit if error yet
4010
4011 ; Shifted 12 bits
4012
4013 004732' 140000 005023' TTABLE (TCALL,TS17NN) ; increment shift count
4014 004733' 400000 000100 TTABLE (TSSTAR,100) ; start up port
4015 004734' 240001 005030' TTABLE (TCHECK,1,TS17RS+2) ; check if completed
4016 004735' 340000 000000 TTABLE (TEXIT) ; exit if error yet
4017
4018 ; Shifted 16 bits
4019
4020 004736' 140000 005023' TTABLE (TCALL,TS17NN) ; increment shift count
4021 004737' 400000 000100 TTABLE (TSSTAR,100) ; start up port
4022 004740' 240001 005031' TTABLE (TCHECK,1,TS17RS+3) ; check if completed
4023 004741' 340000 000000 TTABLE (TEXIT) ; exit if error yet
4024
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 61
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1699
4025
4026 ; Shifted 20 bits
4027
4028 004742' 140000 005023' TTABLE (TCALL,TS17NN) ; increment shift count
4029 004743' 400000 000100 TTABLE (TSSTAR,100) ; start up port
4030 004744' 240001 005032' TTABLE (TCHECK,1,TS17RS+4) ; check if completed
4031 004745' 340000 000000 TTABLE (TEXIT) ; exit if error yet
4032
4033 ; Shifted 24 bits
4034
4035 004746' 140000 005023' TTABLE (TCALL,TS17NN) ; increment shift count
4036 004747' 400000 000100 TTABLE (TSSTAR,100) ; start up port
4037 004750' 240001 005033' TTABLE (TCHECK,1,TS17RS+5) ; check if completed
4038 004751' 340000 000000 TTABLE (TEXIT) ; exit if error yet
4039
4040 ; Shifted 28 bits
4041
4042 004752' 140000 005023' TTABLE (TCALL,TS17NN) ; increment shift count
4043 004753' 400000 000100 TTABLE (TSSTAR,100) ; start up port
4044 004754' 240001 005034' TTABLE (TCHECK,1,TS17RS+6) ; check if completed
4045 004755' 340000 000000 TTABLE (TEXIT) ; exit if error yet
4046
4047 ; Shifted 32 bits
4048
4049 004756' 140000 005023' TTABLE (TCALL,TS17NN) ; increment shift count
4050 004757' 400000 000100 TTABLE (TSSTAR,100) ; start up port
4051 004760' 240001 005035' TTABLE (TCHECK,1,TS17RS+7) ; check if completed
4052 004761' 340000 000000 TTABLE (TEXIT) ; exit if error yet
4053
4054 ; Shifted 36 bits
4055
4056 004762' 140000 005023' TTABLE (TCALL,TS17NN) ; increment shift count
4057 004763' 400000 000100 TTABLE (TSSTAR,100) ; start up port
4058 004764' 240001 005036' TTABLE (TCHECK,1,TS17RS+10) ; check if completed
4059 004765' 340000 000000 TTABLE (TEXIT) ; exit if error yet
4060
4061 ; Shifted 40 bits
4062
4063 004766' 140000 005023' TTABLE (TCALL,TS17NN) ; increment shift count
4064 004767' 400000 000100 TTABLE (TSSTAR,100) ; start up port
4065 004770' 240001 005037' TTABLE (TCHECK,1,TS17RS+11) ; check if completed
4066 004771' 340000 000000 TTABLE (TEXIT) ; exit if error yet
4067 004772' 300000 004721' TTABLE (TJRST,TS17L) ; loop till done
4068 004773' 000000 000000 TTABLE (TLAST)
4069
4070 ; Initialize stuff
4071
4072 004774' 201 00 0 00 000000# TS17IN: MOVEI BUFF-1 ; initialize buffer pointer
4073 004775' 202 00 0 00 014021' MOVEM T17BUF# ; ...
4074 004776' 263 17 0 00 000000 RTN ; return
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 62
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1700
4075
4076 ; Set up next data pattern
4077
4078 004777' 350 01 0 00 014021' TS17NE: AOS 1,T17BUF ; point to next data pattern
4079 005000' 307 01 0 00 000000# CAIG 1,BUFF+5 ; done yet?
4080 005001' 350 00 0 17 000000 AOS (P) ; no - set up proper return
4081 005002' 200 00 0 01 000000 MOVE (1) ; get data pattern
4082 005003' 201 02 0 00 005026' MOVEI 2,TS17RS ; get initial address of EBUF data
4083 005004' 505 01 0 00 037777 TS17N0: HRLI 1,37777 ; get initial PLIN data (left 8 bits)
4084 005005' 246 00 0 00 000004 LSHC 4 ; shift 4 bits
4085 005006' 202 00 0 02 000000 MOVEM (2) ; save it
4086 005007' 350 00 0 00 000002 AOS 2 ; point to next address
4087 005010' 307 02 0 00 005037' CAIG 2,TS17RS+11 ; done yet?
4088 005011' 254 00 0 00 005004' JRST TS17N0 ; no - loop till done
4089 005012' 402 00 0 00 014044' SETZM TS17NM# ; initialize number of shifts
4090
4091 ; Read the next word
4092
4093 005013' 201 01 0 00 000200 MOVEI 1,200 ; get start address
4094 005014' 242 01 0 00 000001 LSH 1,1 ; position correctly
4095 005015' 260 17 0 00 004700* GO LDRAR ; load the register
4096 005016' 201 01 0 00 000010 MOVEI 1,MPRUN ; get MPRUN bit
4097 005017' 260 17 0 00 004706* GO LDCSR ; start up the port
4098 005020' 400 01 0 00 000000 SETZ 1, ; clear data
4099 005021' 260 17 0 00 005017* GO LDCSR ; stop the port
4100 005022' 263 17 0 00 000000 RTN ; return
4101
4102 ; Increment shift count
4103
4104 005023' 201 00 0 00 000004 TS17NN: MOVEI 4 ; get a 4
4105 005024' 272 00 0 00 014044' ADDM TS17NM ; add it
4106 005025' 263 17 0 00 000000 RTN ; return
4107
4108 005026' TS17RS: BLOCK 12 ; correct EBUF data
4109
4110 ; Error messages
4111
4112 005040' 240000 005042' MA17: CALL!TXNOT!MA17PN ; print data pattern ...
4113 005041' 000000000000# LAST!CALL!TXALL!TTPNT ; print test data
4114
4115 005042' 037 00 0 00 013336' MA17PN: TMSGC <Data > ; get data and
4116 005043' 200 01 0 00 014021' MOVE 1,T17BUF ; print it
4117 005044' 200 00 0 01 000000 MOVE (1)
4118 005045' 037 13 0 00 000000 PNTHW
4119 005046' 037 00 0 00 013372' TMSG < shifted up from PLIN >
4120 005047' 200 00 0 00 014044' MOVE TS17NM ; get shift count
4121 005050' 037 15 0 00 000000 PNTDEC
4122 005051' 037 00 0 00 013343' TMSG <. bits, result in EBUF>
4123 005052' 263 17 0 00 000000 RTN
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 63
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1701
4124
4125 ; Microcode - Shift 4 bits
4126
4127 005053' 010001 010000 T17M: MWORD <ADDR=100,JMAP,J=101,D=1> ; 100
4128 005054' 001000 000040
4129 005055' 010100 000122 MWORD <CONT,D=1,SELF,MGC=122> ; 101
4130 005056' 001000 003340
4131 005057' 010200 000200 MWORD <CONT,SD0,OR,B=4,D=2,SELM,MGC=200> ; 102
4132 005060' 732002 002340
4133 005061' 010351 000000 MWORD <JMAP,J=5100,D=1> ; 103
4134 005062' 001000 000040
4135
4136 ; Routine to read a word from CBUS into the formatter.
4137
4138 005063' 020002 010000 MWORD <ADDR=200,JMAP,J=201> ; 200
4139 005064' 000000 000040
4140 005065' 020102 030000 MWORD <CJP,J=203,D=1,CENA,CCCA> ; 201
4141 005066' 001400 000060
4142 005067' 020202 010000 MWORD <JMAP,J=201,D=1> ; 202
4143 005070' 001000 000040
4144 005071' 020300 000004 MWORD <CONT,D=1,SELC,MGC=4> ; 203
4145 005072' 001000 004340
4146 005073' 020400 000200 MWORD <CONT,SD0,OR,B=3,D=2,SELM,MGC=200> ; 204
4147 005074' 732001 402340
4148 005075' 020500 000000 MWORD <JZ> ; 205
4149 005076' 000000 000000
4150
4151 ; Initialization
4152
4153 005077' 100010 010020 MWORD <ADDR=1000,JMAP,J=1001,SELM,MGC=20> ; 1000
4154 005100' 000000 002040
4155 005101' 100100 000200 MWORD <CONT,D=1,SELC,MGC=200> ; 1001
4156 005102' 001000 004340
4157 005103' 100200 310017 MWORD <LDCT,J=31,SD0,OR,D=2,SKCN,MGC=017> ; 1002
4158 005104' 732000 240300
4159 005105' 100310 030000 MWORD <RPCT,J=1003,S0A,OR,D=5> ; 1003
4160 005106' 435000 000220
4161 005107' 100400 002040 MWORD <CONT,S0A,OR,D=1,OENA,SELM,MGC=40> ; 1004
4162 005110' 431000 002340
4163 005111' 100500 000006 MWORD <JZ,SD0,D=1,SELP,MGC=6> ; 1005
4164 005112' 701000 001000
4165 005113' 000000 000000 MWORD <ADDR=0,JZ> ; 0
4166 005114' 000000 000000
4167
4168 ; Initialization step
4169
4170 005115' 500050 010100 MWORD <ADDR=5000,JMAP,J=5001,SELC,MGC=100> ; 5000
4171 005116' 000000 004040
4172 005117' 500100 000020 MWORD <JZ,SELM,MGC=20> ; 5001
4173 005120' 000000 002000
4174
4175 ; Subroutine - Passed - Write 1 to bit 12 of CSR register
4176
4177 005121' 510000 000000 MWORD <ADDR=5100,CONT,SD0,AND,B=2,D=2> ; 5100
4178 005122' 742001 000340
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 63-1
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1702
4179 005123' 510100 000000 MWORD <CONT,S0B,PLUS,B=2,D=2,CRY> ; 5101
4180 005124' 302001 000740
4181 005125' 510200 260000 MWORD <LDCT,J=26> ; 5102
4182 005126' 000000 000300
4183 005127' 510351 030000 MWORD <RPCT,J=5103,SAB,PLUS,A=2,B=2,D=2> ; 5103
4184 005130' 102021 000220
4185 005131' 510400 002004 MWORD <CONT,S0A,A=2,OR,D=1,OENA,SELE,MGC=4> ; 5104
4186 005132' 431020 005340
4187 005133' 510551 070040 MWORD <CJP,J=5107,CENA,CCGC,D=1,SELE,MGC=40> ; 5105
4188 005134' 001400 015060
4189 005135' 510651 050000 MWORD <JMAP,J=5105,D=1> ; 5106
4190 005136' 001000 000040
4191 005137' 510700 000200 MWORD <CONT,S0A,A=1,OR,D=1,SELE,MGC=200> ; 5107
4192 005140' 431010 005340
4193 005141' 511051 102004 MWORD <JMAP,J=5110,S0A,A=4,OR,D=1,OENA,SELE,MGC=4> ; 5110
4194 005142' 431040 005040
4195 005143' 777777 777777 -1
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 64
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1703
4196
4197 ;#********************************************************************
4198 ;* Test 20 - Fmtr Up Shift 4 (from PLIN) Test - SELRHTNIB=1
4199 ;
4200 ; Description: Verify that the formatter can shift various data
4201 ; patterns up 4 bits at a time while inserting bits
4202 ; from the PLIN into the formatter. The data loaded
4203 ; into the PLIN initially is 360.
4204 ;
4205 ; Procedure: KL> Port Clear
4206 ; KL> Set up data transfer for data patterns
4207 ;
4208 ; UC> Read a data pattern over the CBUS
4209 ; UC> Load PLIN with 360
4210 ;
4211 ; UC> Shift up 4 bits
4212 ; UC> Read formatter contents and write into EBUF
4213 ; KL> Read EBUF and verify the data
4214 ; KL> Start up the ucode to shift again
4215 ;
4216 ; Repeat the above shifting then verifying EBUF
4217 ; contents 10 times, until the data becomes
4218 ; all zero.
4219 ;
4220 ; Do for data patterns: 0's
4221 ; 1's
4222 ; 525252,,525252
4223 ; 000000,,007777
4224 ; 000000,,007070
4225 ; 000000,,000707
4226 ;
4227 ; Failure: ---
4228 ;#********************************************************************
4229
4230 ; Test data
4231
4232 005144' 254 00 0 00 005155' TSTC20: JRST TG20 ; go start test
4233 005145' 100604 000020 CBUS!NDMP!NDCB!ZCBUS!20 ; test mask
4234 005146' 005365' 013377' T20M,,[ASCIZ ^Fmtr Up Shift 4 (from PLIN) Test - SELRHTNIB=1^]
4235 005147' 013263' 012716' [EXP C20,C12,MLAST!C8],,[EXP C4,MLAST!C2]
4236 005150' 000000 005456' TSTC21 ; failure test table
4237 005151' 000000 005736' TSTC22 ; ...
4238 005152' 000000 006215' TSTC23
4239 005153' 000000 006473' TSTC24
4240 005154' 777777 777777 -1
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 65
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1704
4241
4242 ; Start test
4243
4244 005155' 201 00 0 00 000000' TG20: MOVEI Z9 ; get address of module start
4245 005156' 260 17 0 00 004646* GO TRACE ; handle trace output
4246 005157' 201 01 0 00 005365' MOVEI 1,T20M ; set up microcode address
4247 005160' 260 17 0 00 004650* GO TLOAD ; load/verify it
4248 005161' 263 17 0 00 000000 RTN ; failed - exit test
4249
4250 ; Initialization
4251
4252 005162' 400 15 0 00 000000 TL20: SETZ ERFLG, ; clear error flag
4253 005163' 260 17 0 00 004653* GO IPACLR ; clear port
4254 005164' 402 00 0 00 004654* SETZM TSTSUB ; initialize subtest number
4255 MOVSI [000000,,000000 ; get address of buffer
4256 777777,,777777 ; contents
4257 525252,,525252
4258 000000,,007777
4259 000000,,007070
4260 005165' 205 00 0 00 013330' 000000,,000707]
4261 005166' 541 00 0 00 004671* HRRI BUFF ; build the BLT pointer
4262 005167' 251 00 0 00 000000# BLT BUFF+5 ; insert data into buffer
4263
4264 ; First ensure the data transfer is reset
4265
4266 005170' 201 01 0 00 005000 MOVEI 1,5000 ; get start address
4267 005171' 242 01 0 00 000001 LSH 1,1 ; position correctly
4268 005172' 260 17 0 00 005015* GO LDRAR ; load the register
4269 005173' 201 01 0 00 000010 MOVEI 1,MPRUN ; get MPRUN bit
4270 005174' 260 17 0 00 005021* GO LDCSR ; start up the port
4271 005175' 400 01 0 00 000000 SETZ 1, ; clear data
4272 005176' 260 17 0 00 005174* GO LDCSR ; stop the port
4273
4274 ; Now generate CCW list
4275
4276 005177' 200 01 0 00 013210' MOVE 1,[CBUFSZ,,CBUF] ; get pointer to control buffer
4277 005200' 260 17 0 00 004670* GO CHINIT ; initialize software
4278 005201' 551 01 0 00 005166* HRRZI 1,BUFF ; buffer address
4279 005202' 201 02 0 00 000006 MOVEI 2,6 ; word count
4280 005203' 400 03 0 00 000000 SETZ 3, ; clear zero fill specifier
4281 005204' 260 17 0 00 004674* GO GENCCW ; generate a CCW list
4282 005205' 201 06 0 00 005230' MOVEI 6,TS20 ; get test execute table address
4283
4284 ; Start up the data transfer
4285
4286 005206' 201 01 0 00 001000 MOVEI 1,1000 ; get start address
4287 005207' 242 01 0 00 000001 LSH 1,1 ; position correctly
4288 005210' 260 17 0 00 005172* GO LDRAR ; load the register
4289 005211' 201 01 0 00 000010 MOVEI 1,MPRUN ; get MPRUN bit
4290 005212' 260 17 0 00 005176* GO LDCSR ; start up the port
4291 005213' 201 00 0 00 000001 MOVEI 1 ; set up delay of 1 ms
4292 005214' 260 17 0 00 004704* GO ODELAY ; wait a bit
4293 005215' 400 01 0 00 000000 SETZ 1, ; clear data
4294 005216' 260 17 0 00 005212* GO LDCSR ; stop the port
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 66
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1705
4295
4296 ; Loop on test execute table entries
4297
4298 005217' 260 17 0 00 004707* TA20: GO TEXEC ; execute table entry
4299 005220' 254 00 0 00 005227' JRST TX20 ; end of table
4300 005221' 254 00 0 00 005217' JRST TA20 ; keep looping after call
4301 005222' 474 15 0 00 000000 SETO ERFLG, ; error - EBUF data incorrect
4302
4303 ; Handle error printouts and scope looping
4304
4305 005223' 027 00 0 00 005352' SCOPER MA20 ; print error message
4306 005224' 254 00 0 00 005162' JRST TL20 ; loop on error
4307 005225' 254 00 0 00 005227' JRST TX20 ; altmode exit
4308 005226' 322 15 0 00 005217' JUMPE ERFLG,TA20 ; do next sstep table entry
4309
4310 ; End of test
4311
4312 005227' 263 17 0 00 000000 TX20: RTN ; return
4313
4314 ; Test Execute Table, as: (CMD,parameters)
4315
4316 005230' 140000 005304' TS20: TTABLE (TCALL,TS20IN) ; initialize stuff
4317 005231' 200000 005307' TS20L: TTABLE (TCALLC,TS20NE) ; set up next data pattern
4318
4319 ; Shifted 4 bits
4320
4321 005232' 140000 005335' TS20A: TTABLE (TCALL,TS20NN) ; increment shift count
4322 005233' 400000 000100 TTABLE (TSSTAR,100) ; start up port
4323 005234' 240001 005340' TTABLE (TCHECK,1,TS20RS) ; check if completed
4324 005235' 340000 000000 TTABLE (TEXIT) ; exit if error yet
4325
4326 ; Shifted 8 bits
4327
4328 005236' 140000 005335' TTABLE (TCALL,TS20NN) ; increment shift count
4329 005237' 400000 000100 TTABLE (TSSTAR,100) ; start up port
4330 005240' 240001 005341' TTABLE (TCHECK,1,TS20RS+1) ; check if completed
4331 005241' 340000 000000 TTABLE (TEXIT) ; exit if error yet
4332
4333 ; Shifted 12 bits
4334
4335 005242' 140000 005335' TTABLE (TCALL,TS20NN) ; increment shift count
4336 005243' 400000 000100 TTABLE (TSSTAR,100) ; start up port
4337 005244' 240001 005342' TTABLE (TCHECK,1,TS20RS+2) ; check if completed
4338 005245' 340000 000000 TTABLE (TEXIT) ; exit if error yet
4339
4340 ; Shifted 16 bits
4341
4342 005246' 140000 005335' TTABLE (TCALL,TS20NN) ; increment shift count
4343 005247' 400000 000100 TTABLE (TSSTAR,100) ; start up port
4344 005250' 240001 005343' TTABLE (TCHECK,1,TS20RS+3) ; check if completed
4345 005251' 340000 000000 TTABLE (TEXIT) ; exit if error yet
4346
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 67
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1706
4347
4348 ; Shifted 20 bits
4349
4350 005252' 140000 005335' TTABLE (TCALL,TS20NN) ; increment shift count
4351 005253' 400000 000100 TTABLE (TSSTAR,100) ; start up port
4352 005254' 240001 005344' TTABLE (TCHECK,1,TS20RS+4) ; check if completed
4353 005255' 340000 000000 TTABLE (TEXIT) ; exit if error yet
4354
4355 ; Shifted 24 bits
4356
4357 005256' 140000 005335' TTABLE (TCALL,TS20NN) ; increment shift count
4358 005257' 400000 000100 TTABLE (TSSTAR,100) ; start up port
4359 005260' 240001 005345' TTABLE (TCHECK,1,TS20RS+5) ; check if completed
4360 005261' 340000 000000 TTABLE (TEXIT) ; exit if error yet
4361
4362 ; Shifted 28 bits
4363
4364 005262' 140000 005335' TTABLE (TCALL,TS20NN) ; increment shift count
4365 005263' 400000 000100 TTABLE (TSSTAR,100) ; start up port
4366 005264' 240001 005346' TTABLE (TCHECK,1,TS20RS+6) ; check if completed
4367 005265' 340000 000000 TTABLE (TEXIT) ; exit if error yet
4368
4369 ; Shifted 32 bits
4370
4371 005266' 140000 005335' TTABLE (TCALL,TS20NN) ; increment shift count
4372 005267' 400000 000100 TTABLE (TSSTAR,100) ; start up port
4373 005270' 240001 005347' TTABLE (TCHECK,1,TS20RS+7) ; check if completed
4374 005271' 340000 000000 TTABLE (TEXIT) ; exit if error yet
4375
4376 ; Shifted 36 bits
4377
4378 005272' 140000 005335' TTABLE (TCALL,TS20NN) ; increment shift count
4379 005273' 400000 000100 TTABLE (TSSTAR,100) ; start up port
4380 005274' 240001 005350' TTABLE (TCHECK,1,TS20RS+10) ; check if completed
4381 005275' 340000 000000 TTABLE (TEXIT) ; exit if error yet
4382
4383 ; Shifted 40 bits
4384
4385 005276' 140000 005335' TTABLE (TCALL,TS20NN) ; increment shift count
4386 005277' 400000 000100 TTABLE (TSSTAR,100) ; start up port
4387 005300' 240001 005351' TTABLE (TCHECK,1,TS20RS+11) ; check if completed
4388 005301' 340000 000000 TTABLE (TEXIT) ; exit if error yet
4389 005302' 300000 005231' TTABLE (TJRST,TS20L) ; loop till done
4390 005303' 000000 000000 TTABLE (TLAST)
4391
4392 ; Initialize stuff
4393
4394 005304' 201 00 0 00 000000# TS20IN: MOVEI BUFF-1 ; initialize buffer pointer
4395 005305' 202 00 0 00 014022' MOVEM T20BUF# ; ...
4396 005306' 263 17 0 00 000000 RTN ; return
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 68
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1707
4397
4398 ; Set up next data pattern
4399
4400 005307' 350 01 0 00 014022' TS20NE: AOS 1,T20BUF ; point to next data pattern
4401 005310' 307 01 0 00 000000# CAIG 1,BUFF+5 ; done yet?
4402 005311' 350 00 0 17 000000 AOS (P) ; no - set up proper return
4403 005312' 200 00 0 01 000000 MOVE (1) ; get data pattern
4404 005313' 201 02 0 00 005340' MOVEI 2,TS20RS ; get initial address of EBUF data
4405 005314' 400 01 0 00 000000 TS20N0: SETZ 1, ; first shift doesn't include PLIN data
4406 005315' 302 02 0 00 005340' CAIE 2,TS20RS ; so check if first shift and if not
4407 005316' 505 01 0 00 741777 HRLI 1,741777 ; get initial PLIN data (left 8 bits)
4408 005317' 246 00 0 00 000004 LSHC 4 ; shift 4 bits
4409 005320' 202 00 0 02 000000 MOVEM (2) ; save it
4410 005321' 350 00 0 00 000002 AOS 2 ; point to next address
4411 005322' 307 02 0 00 005351' CAIG 2,TS20RS+11 ; done yet?
4412 005323' 254 00 0 00 005314' JRST TS20N0 ; no - loop till done
4413 005324' 402 00 0 00 014045' SETZM TS20NM# ; initialize number of shifts
4414
4415 ; Read the next word
4416
4417 005325' 201 01 0 00 000200 MOVEI 1,200 ; get start address
4418 005326' 242 01 0 00 000001 LSH 1,1 ; position correctly
4419 005327' 260 17 0 00 005210* GO LDRAR ; load the register
4420 005330' 201 01 0 00 000010 MOVEI 1,MPRUN ; get MPRUN bit
4421 005331' 260 17 0 00 005216* GO LDCSR ; start up the port
4422 005332' 400 01 0 00 000000 SETZ 1, ; clear data
4423 005333' 260 17 0 00 005331* GO LDCSR ; stop the port
4424 005334' 263 17 0 00 000000 RTN ; return
4425
4426 ; Increment shift count
4427
4428 005335' 201 00 0 00 000004 TS20NN: MOVEI 4 ; get a 4
4429 005336' 272 00 0 00 014045' ADDM TS20NM ; add it
4430 005337' 263 17 0 00 000000 RTN ; return
4431
4432 005340' TS20RS: BLOCK 12 ; correct EBUF data
4433
4434 ; Error messages
4435
4436 005352' 240000 005354' MA20: CALL!TXNOT!MA20PN ; print data pattern ...
4437 005353' 000000000000# LAST!CALL!TXALL!TTPNT ; print test data
4438
4439 005354' 037 00 0 00 013336' MA20PN: TMSGC <Data > ; get data and
4440 005355' 200 01 0 00 014022' MOVE 1,T20BUF ; print it
4441 005356' 200 00 0 01 000000 MOVE (1)
4442 005357' 037 13 0 00 000000 PNTHW
4443 005360' 037 00 0 00 013372' TMSG < shifted up from PLIN >
4444 005361' 200 00 0 00 014045' MOVE TS20NM ; get shift count
4445 005362' 037 15 0 00 000000 PNTDEC
4446 005363' 037 00 0 00 013343' TMSG <. bits, result in EBUF>
4447 005364' 263 17 0 00 000000 RTN
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 69
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1708
4448
4449 ; Microcode - Shift 4 bits
4450
4451 005365' 010001 010000 T20M: MWORD <ADDR=100,JMAP,J=101,D=1> ; 100
4452 005366' 001000 000040
4453 005367' 010100 000122 MWORD <CONT,D=1,SELF,MGC=122> ; 101
4454 005370' 001000 003340
4455 005371' 010200 000200 MWORD <CONT,SD0,OR,B=4,D=2,SELM,MGC=200> ; 102
4456 005372' 732002 002340
4457 005373' 010351 000000 MWORD <JMAP,J=5100,D=1> ; 103
4458 005374' 001000 000040
4459
4460 ; Routine to read a word from CBUS into the formatter.
4461
4462 005375' 020002 010000 MWORD <ADDR=200,JMAP,J=201> ; 200
4463 005376' 000000 000040
4464 005377' 020102 030000 MWORD <CJP,J=203,D=1,CENA,CCCA> ; 201
4465 005400' 001400 000060
4466 005401' 020202 010000 MWORD <JMAP,J=201,D=1> ; 202
4467 005402' 001000 000040
4468 005403' 020300 000004 MWORD <CONT,D=1,SELC,MGC=4> ; 203
4469 005404' 001000 004340
4470 005405' 020400 000200 MWORD <CONT,SD0,OR,B=3,D=2,SELM,MGC=200> ; 204
4471 005406' 732001 402340
4472 005407' 020500 000000 MWORD <JZ> ; 205
4473 005410' 000000 000000
4474
4475 ; Initialization
4476
4477 005411' 100010 010020 MWORD <ADDR=1000,JMAP,J=1001,SELM,MGC=20> ; 1000
4478 005412' 000000 002040
4479 005413' 100100 000200 MWORD <CONT,D=1,SELC,MGC=200> ; 1001
4480 005414' 001000 004340
4481 005415' 100200 310360 MWORD <LDCT,J=31,SD0,OR,D=2,SKCN,MGC=360> ; 1002
4482 005416' 732000 240300
4483 005417' 100310 030000 MWORD <RPCT,J=1003,S0A,OR,D=5> ; 1003
4484 005420' 435000 000220
4485 005421' 100400 002040 MWORD <CONT,S0A,OR,D=1,OENA,SELM,MGC=40> ; 1004
4486 005422' 431000 002340
4487 005423' 100500 000006 MWORD <JZ,SD0,D=1,SELP,MGC=6> ; 1005
4488 005424' 701000 001000
4489 005425' 000000 000000 MWORD <ADDR=0,JZ> ; 0
4490 005426' 000000 000000
4491
4492 ; Initialization step
4493
4494 005427' 500050 010100 MWORD <ADDR=5000,JMAP,J=5001,SELC,MGC=100> ; 5000
4495 005430' 000000 004040
4496 005431' 500100 000020 MWORD <JZ,SELM,MGC=20> ; 5001
4497 005432' 000000 002000
4498
4499 ; Subroutine - Passed - Write 1 to bit 12 of CSR register
4500
4501 005433' 510000 000000 MWORD <ADDR=5100,CONT,SD0,AND,B=2,D=2> ; 5100
4502 005434' 742001 000340
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 69-1
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1709
4503 005435' 510100 000000 MWORD <CONT,S0B,PLUS,B=2,D=2,CRY> ; 5101
4504 005436' 302001 000740
4505 005437' 510200 260000 MWORD <LDCT,J=26> ; 5102
4506 005440' 000000 000300
4507 005441' 510351 030000 MWORD <RPCT,J=5103,SAB,PLUS,A=2,B=2,D=2> ; 5103
4508 005442' 102021 000220
4509 005443' 510400 002004 MWORD <CONT,S0A,A=2,OR,D=1,OENA,SELE,MGC=4> ; 5104
4510 005444' 431020 005340
4511 005445' 510551 070040 MWORD <CJP,J=5107,CENA,CCGC,D=1,SELE,MGC=40> ; 5105
4512 005446' 001400 015060
4513 005447' 510651 050000 MWORD <JMAP,J=5105,D=1> ; 5106
4514 005450' 001000 000040
4515 005451' 510700 000200 MWORD <CONT,S0A,A=1,OR,D=1,SELE,MGC=200> ; 5107
4516 005452' 431010 005340
4517 005453' 511051 102004 MWORD <JMAP,J=5110,S0A,A=4,OR,D=1,OENA,SELE,MGC=4> ; 5110
4518 005454' 431040 005040
4519 005455' 777777 777777 -1
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 70
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1710
4520
4521 ;#********************************************************************
4522 ;* Test 21 - Fmtr Up Shift 8 (from PLIN) Test - SELRHTNIB=0
4523 ;
4524 ; Description: Verify that the formatter can shift various data
4525 ; patterns up 8 bits at a time while inserting bits
4526 ; from the PLIN into the formatter. The data loaded
4527 ; into the PLIN initially is 017.
4528 ;
4529 ; Procedure: KL> Port Clear
4530 ; KL> Set up data transfer for data patterns
4531 ;
4532 ; UC> Read a data pattern over the CBUS
4533 ; UC> Load PLIN with 017
4534 ;
4535 ; UC> Shift up 8 bits
4536 ; UC> Read formatter contents and write into EBUF
4537 ; KL> Read EBUF and verify the data
4538 ; KL> Start up the ucode to shift again
4539 ;
4540 ; Repeat the above shifting then verifying EBUF
4541 ; contents 5 times, until the data becomes
4542 ; all zero.
4543 ;
4544 ; Do for data patterns: 0's
4545 ; 1's
4546 ; 525252,,525252
4547 ; 000000,,007777
4548 ; 000000,,007070
4549 ; 000000,,000707
4550 ;
4551 ; Failure: ---
4552 ;#********************************************************************
4553
4554 ; Test data
4555
4556 005456' 254 00 0 00 005466' TSTC21: JRST TG21 ; go start test
4557 005457' 100604 000021 CBUS!NDMP!NDCB!ZCBUS!21 ; test mask
4558 005460' 005645' 013411' T21M,,[ASCIZ ^Fmtr Up Shift 8 (from PLIN) Test - SELRHTNIB=0^]
4559 005461' 013263' 012716' [EXP C20,C12,MLAST!C8],,[EXP C4,MLAST!C2]
4560 005462' 000000 005736' TSTC22 ; failure test table
4561 005463' 000000 006215' TSTC23 ; ...
4562 005464' 000000 006473' TSTC24
4563 005465' 777777 777777 -1
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 71
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1711
4564
4565 ; Start test
4566
4567 005466' 201 00 0 00 000000' TG21: MOVEI Z9 ; get address of module start
4568 005467' 260 17 0 00 005156* GO TRACE ; handle trace output
4569 005470' 201 01 0 00 005645' MOVEI 1,T21M ; set up microcode address
4570 005471' 260 17 0 00 005160* GO TLOAD ; load/verify it
4571 005472' 263 17 0 00 000000 RTN ; failed - exit test
4572
4573 ; Initialization
4574
4575 005473' 400 15 0 00 000000 TL21: SETZ ERFLG, ; clear error flag
4576 005474' 260 17 0 00 005163* GO IPACLR ; clear port
4577 005475' 402 00 0 00 005164* SETZM TSTSUB ; initialize subtest number
4578 MOVSI [000000,,000000 ; get address of buffer
4579 777777,,777777 ; contents
4580 525252,,525252
4581 000000,,007777
4582 000000,,007070
4583 005476' 205 00 0 00 013330' 000000,,000707]
4584 005477' 541 00 0 00 005201* HRRI BUFF ; build the BLT pointer
4585 005500' 251 00 0 00 000000# BLT BUFF+5 ; insert data into buffer
4586
4587 ; First ensure the data transfer is reset
4588
4589 005501' 201 01 0 00 005000 MOVEI 1,5000 ; get start address
4590 005502' 242 01 0 00 000001 LSH 1,1 ; position correctly
4591 005503' 260 17 0 00 005327* GO LDRAR ; load the register
4592 005504' 201 01 0 00 000010 MOVEI 1,MPRUN ; get MPRUN bit
4593 005505' 260 17 0 00 005333* GO LDCSR ; start up the port
4594 005506' 400 01 0 00 000000 SETZ 1, ; clear data
4595 005507' 260 17 0 00 005505* GO LDCSR ; stop the port
4596
4597 ; Now generate CCW list
4598
4599 005510' 200 01 0 00 013210' MOVE 1,[CBUFSZ,,CBUF] ; get pointer to control buffer
4600 005511' 260 17 0 00 005200* GO CHINIT ; initialize software
4601 005512' 551 01 0 00 005477* HRRZI 1,BUFF ; buffer address
4602 005513' 201 02 0 00 000006 MOVEI 2,6 ; word count
4603 005514' 400 03 0 00 000000 SETZ 3, ; clear zero fill specifier
4604 005515' 260 17 0 00 005204* GO GENCCW ; generate a CCW list
4605 005516' 201 06 0 00 005541' MOVEI 6,TS21 ; get test execute table address
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 72
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1712
4606
4607 ; Start up the data transfer
4608
4609 005517' 201 01 0 00 001000 MOVEI 1,1000 ; get start address
4610 005520' 242 01 0 00 000001 LSH 1,1 ; position correctly
4611 005521' 260 17 0 00 005503* GO LDRAR ; load the register
4612 005522' 201 01 0 00 000010 MOVEI 1,MPRUN ; get MPRUN bit
4613 005523' 260 17 0 00 005507* GO LDCSR ; start up the port
4614 005524' 201 00 0 00 000001 MOVEI 1 ; set up delay of 1 ms
4615 005525' 260 17 0 00 005214* GO ODELAY ; wait a bit
4616 005526' 400 01 0 00 000000 SETZ 1, ; clear data
4617 005527' 260 17 0 00 005523* GO LDCSR ; stop the port
4618
4619 ; Loop on test execute table entries
4620
4621 005530' 260 17 0 00 005217* TA21: GO TEXEC ; execute table entry
4622 005531' 254 00 0 00 005540' JRST TX21 ; end of table
4623 005532' 254 00 0 00 005530' JRST TA21 ; keep looping after call
4624 005533' 474 15 0 00 000000 SETO ERFLG, ; error - EBUF data incorrect
4625
4626 ; Handle error printouts and scope looping
4627
4628 005534' 027 00 0 00 005632' SCOPER MA21 ; print error message
4629 005535' 254 00 0 00 005473' JRST TL21 ; loop on error
4630 005536' 254 00 0 00 005540' JRST TX21 ; altmode exit
4631 005537' 322 15 0 00 005530' JUMPE ERFLG,TA21 ; do next sstep table entry
4632
4633 ; End of test
4634
4635 005540' 263 17 0 00 000000 TX21: RTN ; return
4636
4637 ; Test Execute Table, as: (CMD,parameters)
4638
4639 005541' 140000 005571' TS21: TTABLE (TCALL,TS21IN) ; initialize stuff
4640 005542' 200000 005574' TS21L: TTABLE (TCALLC,TS21NE) ; set up next data pattern
4641
4642 ; Shifted 8 bits
4643
4644 005543' 140000 005622' TS21A: TTABLE (TCALL,TS21NN) ; increment shift count
4645 005544' 400000 000100 TTABLE (TSSTAR,100) ; start up port
4646 005545' 240001 005625' TTABLE (TCHECK,1,TS21RS) ; check if completed
4647 005546' 340000 000000 TTABLE (TEXIT) ; exit if error yet
4648
4649 ; Shifted 16 bits
4650
4651 005547' 140000 005622' TTABLE (TCALL,TS21NN) ; increment shift count
4652 005550' 400000 000100 TTABLE (TSSTAR,100) ; start up port
4653 005551' 240001 005626' TTABLE (TCHECK,1,TS21RS+1) ; check if completed
4654 005552' 340000 000000 TTABLE (TEXIT) ; exit if error yet
4655
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 73
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1713
4656
4657 ; Shifted 24 bits
4658
4659 005553' 140000 005622' TTABLE (TCALL,TS21NN) ; increment shift count
4660 005554' 400000 000100 TTABLE (TSSTAR,100) ; start up port
4661 005555' 240001 005627' TTABLE (TCHECK,1,TS21RS+2) ; check if completed
4662 005556' 340000 000000 TTABLE (TEXIT) ; exit if error yet
4663
4664 ; Shifted 32 bits
4665
4666 005557' 140000 005622' TTABLE (TCALL,TS21NN) ; increment shift count
4667 005560' 400000 000100 TTABLE (TSSTAR,100) ; start up port
4668 005561' 240001 005630' TTABLE (TCHECK,1,TS21RS+3) ; check if completed
4669 005562' 340000 000000 TTABLE (TEXIT) ; exit if error yet
4670
4671 ; Shifted 40 bits
4672
4673 005563' 140000 005622' TTABLE (TCALL,TS21NN) ; increment shift count
4674 005564' 400000 000100 TTABLE (TSSTAR,100) ; start up port
4675 005565' 240001 005631' TTABLE (TCHECK,1,TS21RS+4) ; check if completed
4676 005566' 340000 000000 TTABLE (TEXIT) ; exit if error yet
4677 005567' 300000 005542' TTABLE (TJRST,TS21L) ; loop till done
4678 005570' 000000 000000 TTABLE (TLAST)
4679
4680 ; Initialize stuff
4681
4682 005571' 201 00 0 00 000000# TS21IN: MOVEI BUFF-1 ; initialize buffer pointer
4683 005572' 202 00 0 00 014023' MOVEM T21BUF# ; ...
4684 005573' 263 17 0 00 000000 RTN ; return
4685
4686 ; Set up next data pattern
4687
4688 005574' 350 01 0 00 014023' TS21NE: AOS 1,T21BUF ; point to next data pattern
4689 005575' 307 01 0 00 000000# CAIG 1,BUFF+5 ; done yet?
4690 005576' 350 00 0 17 000000 AOS (P) ; no - set up proper return
4691 005577' 200 00 0 01 000000 MOVE (1) ; get data pattern
4692 005600' 201 02 0 00 005625' MOVEI 2,TS21RS ; get initial address of EBUF data
4693 005601' 400 01 0 00 000000 TS21N0: SETZ 1, ; first shift doesn't include PLIN data
4694 005602' 302 02 0 00 005625' CAIE 2,TS21RS ; so check if first shift and if not
4695 005603' 505 01 0 00 741777 HRLI 1,741777 ; get initial PLIN data (left 8 bits)
4696 005604' 246 00 0 00 000010 LSHC 8 ; shift 8 bits
4697 005605' 202 00 0 02 000000 MOVEM (2) ; save it
4698 005606' 350 00 0 00 000002 AOS 2 ; point to next address
4699 005607' 307 02 0 00 005631' CAIG 2,TS21RS+4 ; done yet?
4700 005610' 254 00 0 00 005601' JRST TS21N0 ; no - loop till done
4701 005611' 402 00 0 00 014046' SETZM TS21NM# ; initialize number of shifts
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 74
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1714
4702
4703 ; Read the next word
4704
4705 005612' 201 01 0 00 000200 MOVEI 1,200 ; get start address
4706 005613' 242 01 0 00 000001 LSH 1,1 ; position correctly
4707 005614' 260 17 0 00 005521* GO LDRAR ; load the register
4708 005615' 201 01 0 00 000010 MOVEI 1,MPRUN ; get MPRUN bit
4709 005616' 260 17 0 00 005527* GO LDCSR ; start up the port
4710 005617' 400 01 0 00 000000 SETZ 1, ; clear data
4711 005620' 260 17 0 00 005616* GO LDCSR ; stop the port
4712 005621' 263 17 0 00 000000 RTN ; return
4713
4714 ; Increment shift count
4715
4716 005622' 201 00 0 00 000010 TS21NN: MOVEI 8 ; get an 8
4717 005623' 272 00 0 00 014046' ADDM TS21NM ; add it
4718 005624' 263 17 0 00 000000 RTN ; return
4719
4720 005625' TS21RS: BLOCK 5 ; correct EBUF data
4721
4722 ; Error messages
4723
4724 005632' 240000 005634' MA21: CALL!TXNOT!MA21PN ; print data pattern ...
4725 005633' 000000000000# LAST!CALL!TXALL!TTPNT ; print test data
4726
4727 005634' 037 00 0 00 013336' MA21PN: TMSGC <Data > ; get data and
4728 005635' 200 01 0 00 014023' MOVE 1,T21BUF ; print it
4729 005636' 200 00 0 01 000000 MOVE (1)
4730 005637' 037 13 0 00 000000 PNTHW
4731 005640' 037 00 0 00 013372' TMSG < shifted up from PLIN >
4732 005641' 200 00 0 00 014046' MOVE TS21NM ; get shift count
4733 005642' 037 15 0 00 000000 PNTDEC
4734 005643' 037 00 0 00 013343' TMSG <. bits, result in EBUF>
4735 005644' 263 17 0 00 000000 RTN
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 75
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1715
4736
4737 ; Microcode - Shift 8 bits
4738
4739 005645' 010001 010000 T21M: MWORD <ADDR=100,JMAP,J=101,D=1> ; 100
4740 005646' 001000 000040
4741 005647' 010100 000220 MWORD <CONT,D=1,SELF,MGC=220> ; 101
4742 005650' 001000 003340
4743 005651' 010200 000200 MWORD <CONT,SD0,OR,B=4,D=2,SELM,MGC=200> ; 102
4744 005652' 732002 002340
4745 005653' 010351 000000 MWORD <JMAP,J=5100,D=1> ; 103
4746 005654' 001000 000040
4747
4748 ; Routine to read a word from CBUS into the formatter.
4749
4750 005655' 020002 010000 MWORD <ADDR=200,JMAP,J=201> ; 200
4751 005656' 000000 000040
4752 005657' 020102 030000 MWORD <CJP,J=203,D=1,CENA,CCCA> ; 201
4753 005660' 001400 000060
4754 005661' 020202 010000 MWORD <JMAP,J=201,D=1> ; 202
4755 005662' 001000 000040
4756 005663' 020300 000004 MWORD <CONT,D=1,SELC,MGC=4> ; 203
4757 005664' 001000 004340
4758 005665' 020400 000200 MWORD <CONT,SD0,OR,B=3,D=2,SELM,MGC=200> ; 204
4759 005666' 732001 402340
4760 005667' 020500 000000 MWORD <JZ> ; 205
4761 005670' 000000 000000
4762
4763 ; Initialization
4764
4765 005671' 100010 010020 MWORD <ADDR=1000,JMAP,J=1001,SELM,MGC=20> ; 1000
4766 005672' 000000 002040
4767 005673' 100100 000200 MWORD <CONT,D=1,SELC,MGC=200> ; 1001
4768 005674' 001000 004340
4769 005675' 100200 310017 MWORD <LDCT,J=31,SD0,OR,D=2,SKCN,MGC=017> ; 1002
4770 005676' 732000 240300
4771 005677' 100310 030000 MWORD <RPCT,J=1003,S0A,OR,D=5> ; 1003
4772 005700' 435000 000220
4773 005701' 100400 002040 MWORD <CONT,S0A,OR,D=1,OENA,SELM,MGC=40> ; 1004
4774 005702' 431000 002340
4775 005703' 100500 000006 MWORD <JZ,SD0,D=1,SELP,MGC=6> ; 1005
4776 005704' 701000 001000
4777 005705' 000000 000000 MWORD <ADDR=0,JZ> ; 0
4778 005706' 000000 000000
4779
4780 ; Initialization step
4781
4782 005707' 500050 010100 MWORD <ADDR=5000,JMAP,J=5001,SELC,MGC=100> ; 5000
4783 005710' 000000 004040
4784 005711' 500100 000020 MWORD <JZ,SELM,MGC=20> ; 5001
4785 005712' 000000 002000
4786
4787 ; Subroutine - Passed - Write 1 to bit 12 of CSR register
4788
4789 005713' 510000 000000 MWORD <ADDR=5100,CONT,SD0,AND,B=2,D=2> ; 5100
4790 005714' 742001 000340
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 75-1
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1716
4791 005715' 510100 000000 MWORD <CONT,S0B,PLUS,B=2,D=2,CRY> ; 5101
4792 005716' 302001 000740
4793 005717' 510200 260000 MWORD <LDCT,J=26> ; 5102
4794 005720' 000000 000300
4795 005721' 510351 030000 MWORD <RPCT,J=5103,SAB,PLUS,A=2,B=2,D=2> ; 5103
4796 005722' 102021 000220
4797 005723' 510400 002004 MWORD <CONT,S0A,A=2,OR,D=1,OENA,SELE,MGC=4> ; 5104
4798 005724' 431020 005340
4799 005725' 510551 070040 MWORD <CJP,J=5107,CENA,CCGC,D=1,SELE,MGC=40> ; 5105
4800 005726' 001400 015060
4801 005727' 510651 050000 MWORD <JMAP,J=5105,D=1> ; 5106
4802 005730' 001000 000040
4803 005731' 510700 000200 MWORD <CONT,S0A,A=1,OR,D=1,SELE,MGC=200> ; 5107
4804 005732' 431010 005340
4805 005733' 511051 102004 MWORD <JMAP,J=5110,S0A,A=4,OR,D=1,OENA,SELE,MGC=4> ; 5110
4806 005734' 431040 005040
4807 005735' 777777 777777 -1
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 76
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1717
4808
4809 ;#********************************************************************
4810 ;* Test 22 - Fmtr Up Shift 8 (from PLIN) Test - SELRHTNIB=0
4811 ;
4812 ; Description: Verify that the formatter can shift various data
4813 ; patterns up 8 bits at a time while inserting bits
4814 ; from the PLIN into the formatter. The data loaded
4815 ; into the PLIN initially is 360.
4816 ;
4817 ; Procedure: KL> Port Clear
4818 ; KL> Set up data transfer for data patterns
4819 ;
4820 ; UC> Read a data pattern over the CBUS
4821 ; UC> Load PLIN with 360
4822 ;
4823 ; UC> Shift up 8 bits
4824 ; UC> Read formatter contents and write into EBUF
4825 ; KL> Read EBUF and verify the data
4826 ; KL> Start up the ucode to shift again
4827 ;
4828 ; Repeat the above shifting then verifying EBUF
4829 ; contents 5 times, until the data becomes
4830 ; all zero.
4831 ;
4832 ; Do for data patterns: 0's
4833 ; 1's
4834 ; 525252,,525252
4835 ; 000000,,007777
4836 ; 000000,,007070
4837 ; 000000,,000707
4838 ;
4839 ; Failure: ---
4840 ;#********************************************************************
4841
4842 ; Test data
4843
4844 005736' 254 00 0 00 005747' TSTC22: JRST TG22 ; go start test
4845 005737' 100604 000022 CBUS!NDMP!NDCB!ZCBUS!22 ; test mask
4846 005740' 006124' 013411' T22M,,[ASCIZ ^Fmtr Up Shift 8 (from PLIN) Test - SELRHTNIB=0^]
4847 005741' 013263' 012716' [EXP C20,C12,MLAST!C8],,[EXP C4,MLAST!C2]
4848 005742' 000000 006215' TSTC23 ; failure test table
4849 005743' 000000 006473' TSTC24 ; ...
4850 005744' 000000 006754' TSTC25
4851 005745' 000000 007062' TSTC26
4852 005746' 777777 777777 -1
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 77
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1718
4853
4854 ; Start test
4855
4856 005747' 201 00 0 00 000000' TG22: MOVEI Z9 ; get address of module start
4857 005750' 260 17 0 00 005467* GO TRACE ; handle trace output
4858 005751' 201 01 0 00 006124' MOVEI 1,T22M ; set up microcode address
4859 005752' 260 17 0 00 005471* GO TLOAD ; load/verify it
4860 005753' 263 17 0 00 000000 RTN ; failed - exit test
4861
4862 ; Initialization
4863
4864 005754' 400 15 0 00 000000 TL22: SETZ ERFLG, ; clear error flag
4865 005755' 260 17 0 00 005474* GO IPACLR ; clear port
4866 005756' 402 00 0 00 005475* SETZM TSTSUB ; initialize subtest number
4867 MOVSI [000000,,000000 ; get address of buffer
4868 777777,,777777 ; contents
4869 525252,,525252
4870 000000,,007777
4871 000000,,007070
4872 005757' 205 00 0 00 013330' 000000,,000707]
4873 005760' 541 00 0 00 005512* HRRI BUFF ; build the BLT pointer
4874 005761' 251 00 0 00 000000# BLT BUFF+5 ; insert data into buffer
4875
4876 ; First ensure the data transfer is reset
4877
4878 005762' 201 01 0 00 005000 MOVEI 1,5000 ; get start address
4879 005763' 242 01 0 00 000001 LSH 1,1 ; position correctly
4880 005764' 260 17 0 00 005614* GO LDRAR ; load the register
4881 005765' 201 01 0 00 000010 MOVEI 1,MPRUN ; get MPRUN bit
4882 005766' 260 17 0 00 005620* GO LDCSR ; start up the port
4883 005767' 400 01 0 00 000000 SETZ 1, ; clear data
4884 005770' 260 17 0 00 005766* GO LDCSR ; stop the port
4885
4886 ; Now generate CCW list
4887
4888 005771' 200 01 0 00 013210' MOVE 1,[CBUFSZ,,CBUF] ; get pointer to control buffer
4889 005772' 260 17 0 00 005511* GO CHINIT ; initialize software
4890 005773' 551 01 0 00 005760* HRRZI 1,BUFF ; buffer address
4891 005774' 201 02 0 00 000006 MOVEI 2,6 ; word count
4892 005775' 400 03 0 00 000000 SETZ 3, ; clear zero fill specifier
4893 005776' 260 17 0 00 005515* GO GENCCW ; generate a CCW list
4894 005777' 201 06 0 00 006022' MOVEI 6,TS22 ; get test execute table address
4895
4896 ; Start up the data transfer
4897
4898 006000' 201 01 0 00 001000 MOVEI 1,1000 ; get start address
4899 006001' 242 01 0 00 000001 LSH 1,1 ; position correctly
4900 006002' 260 17 0 00 005764* GO LDRAR ; load the register
4901 006003' 201 01 0 00 000010 MOVEI 1,MPRUN ; get MPRUN bit
4902 006004' 260 17 0 00 005770* GO LDCSR ; start up the port
4903 006005' 201 00 0 00 000001 MOVEI 1 ; set up delay of 1 ms
4904 006006' 260 17 0 00 005525* GO ODELAY ; wait a bit
4905 006007' 400 01 0 00 000000 SETZ 1, ; clear data
4906 006010' 260 17 0 00 006004* GO LDCSR ; stop the port
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 78
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1719
4907
4908 ; Loop on test execute table entries
4909
4910 006011' 260 17 0 00 005530* TA22: GO TEXEC ; execute table entry
4911 006012' 254 00 0 00 006021' JRST TX22 ; end of table
4912 006013' 254 00 0 00 006011' JRST TA22 ; keep looping after call
4913 006014' 474 15 0 00 000000 SETO ERFLG, ; error - EBUF data incorrect
4914
4915 ; Handle error printouts and scope looping
4916
4917 006015' 027 00 0 00 006111' SCOPER MA22 ; print error message
4918 006016' 254 00 0 00 005754' JRST TL22 ; loop on error
4919 006017' 254 00 0 00 006021' JRST TX22 ; altmode exit
4920 006020' 322 15 0 00 006011' JUMPE ERFLG,TA22 ; do next sstep table entry
4921
4922 ; End of test
4923
4924 006021' 263 17 0 00 000000 TX22: RTN ; return
4925
4926 ; Test Execute Table, as: (CMD,parameters)
4927
4928 006022' 140000 006052' TS22: TTABLE (TCALL,TS22IN) ; initialize stuff
4929 006023' 200000 006055' TS22L: TTABLE (TCALLC,TS22NE) ; set up next data pattern
4930
4931 ; Shifted 8 bits
4932
4933 006024' 140000 006101' TS22A: TTABLE (TCALL,TS22NN) ; increment shift count
4934 006025' 400000 000100 TTABLE (TSSTAR,100) ; start up port
4935 006026' 240001 006104' TTABLE (TCHECK,1,TS22RS) ; check if completed
4936 006027' 340000 000000 TTABLE (TEXIT) ; exit if error yet
4937
4938 ; Shifted 16 bits
4939
4940 006030' 140000 006101' TTABLE (TCALL,TS22NN) ; increment shift count
4941 006031' 400000 000100 TTABLE (TSSTAR,100) ; start up port
4942 006032' 240001 006105' TTABLE (TCHECK,1,TS22RS+1) ; check if completed
4943 006033' 340000 000000 TTABLE (TEXIT) ; exit if error yet
4944
4945 ; Shifted 24 bits
4946
4947 006034' 140000 006101' TTABLE (TCALL,TS22NN) ; increment shift count
4948 006035' 400000 000100 TTABLE (TSSTAR,100) ; start up port
4949 006036' 240001 006106' TTABLE (TCHECK,1,TS22RS+2) ; check if completed
4950 006037' 340000 000000 TTABLE (TEXIT) ; exit if error yet
4951
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 79
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1720
4952
4953 ; Shifted 32 bits
4954
4955 006040' 140000 006101' TTABLE (TCALL,TS22NN) ; increment shift count
4956 006041' 400000 000100 TTABLE (TSSTAR,100) ; start up port
4957 006042' 240001 006107' TTABLE (TCHECK,1,TS22RS+3) ; check if completed
4958 006043' 340000 000000 TTABLE (TEXIT) ; exit if error yet
4959
4960 ; Shifted 40 bits
4961
4962 006044' 140000 006101' TTABLE (TCALL,TS22NN) ; increment shift count
4963 006045' 400000 000100 TTABLE (TSSTAR,100) ; start up port
4964 006046' 240001 006110' TTABLE (TCHECK,1,TS22RS+4) ; check if completed
4965 006047' 340000 000000 TTABLE (TEXIT) ; exit if error yet
4966 006050' 300000 006023' TTABLE (TJRST,TS22L) ; loop till done
4967 006051' 000000 000000 TTABLE (TLAST)
4968
4969 ; Initialize stuff
4970
4971 006052' 201 00 0 00 000000# TS22IN: MOVEI BUFF-1 ; initialize buffer pointer
4972 006053' 202 00 0 00 014024' MOVEM T22BUF# ; ...
4973 006054' 263 17 0 00 000000 RTN ; return
4974
4975 ; Set up next data pattern
4976
4977 006055' 350 01 0 00 014024' TS22NE: AOS 1,T22BUF ; point to next data pattern
4978 006056' 307 01 0 00 000000# CAIG 1,BUFF+5 ; done yet?
4979 006057' 350 00 0 17 000000 AOS (P) ; no - set up proper return
4980 006060' 200 00 0 01 000000 MOVE (1) ; get data pattern
4981 006061' 201 02 0 00 006104' MOVEI 2,TS22RS ; get initial address of EBUF data
4982 006062' 505 01 0 00 037777 TS22N0: HRLI 1,37777 ; get initial PLIN data (left 8 bits)
4983 006063' 246 00 0 00 000010 LSHC 8 ; shift 8 bits
4984 006064' 202 00 0 02 000000 MOVEM (2) ; save it
4985 006065' 350 00 0 00 000002 AOS 2 ; point to next address
4986 006066' 307 02 0 00 006110' CAIG 2,TS22RS+4 ; done yet?
4987 006067' 254 00 0 00 006062' JRST TS22N0 ; no - loop till done
4988 006070' 402 00 0 00 014047' SETZM TS22NM# ; initialize number of shifts
4989
4990 ; Read the next word
4991
4992 006071' 201 01 0 00 000200 MOVEI 1,200 ; get start address
4993 006072' 242 01 0 00 000001 LSH 1,1 ; position correctly
4994 006073' 260 17 0 00 006002* GO LDRAR ; load the register
4995 006074' 201 01 0 00 000010 MOVEI 1,MPRUN ; get MPRUN bit
4996 006075' 260 17 0 00 006010* GO LDCSR ; start up the port
4997 006076' 400 01 0 00 000000 SETZ 1, ; clear data
4998 006077' 260 17 0 00 006075* GO LDCSR ; stop the port
4999 006100' 263 17 0 00 000000 RTN ; return
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 80
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1721
5000
5001 ; Increment shift count
5002
5003 006101' 201 00 0 00 000010 TS22NN: MOVEI 8 ; get a 8
5004 006102' 272 00 0 00 014047' ADDM TS22NM ; add it
5005 006103' 263 17 0 00 000000 RTN ; return
5006
5007 006104' TS22RS: BLOCK 5 ; correct EBUF data
5008
5009 ; Error messages
5010
5011 006111' 240000 006113' MA22: CALL!TXNOT!MA22PN ; print data pattern ...
5012 006112' 000000000000# LAST!CALL!TXALL!TTPNT ; print test data
5013
5014 006113' 037 00 0 00 013336' MA22PN: TMSGC <Data > ; get data and
5015 006114' 200 01 0 00 014024' MOVE 1,T22BUF ; print it
5016 006115' 200 00 0 01 000000 MOVE (1)
5017 006116' 037 13 0 00 000000 PNTHW
5018 006117' 037 00 0 00 013372' TMSG < shifted up from PLIN >
5019 006120' 200 00 0 00 014047' MOVE TS22NM ; get shift count
5020 006121' 037 15 0 00 000000 PNTDEC
5021 006122' 037 00 0 00 013343' TMSG <. bits, result in EBUF>
5022 006123' 263 17 0 00 000000 RTN
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 81
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1722
5023
5024 ; Microcode - Shift 8 bits
5025
5026 006124' 010001 010000 T22M: MWORD <ADDR=100,JMAP,J=101,D=1> ; 100
5027 006125' 001000 000040
5028 006126' 010100 000220 MWORD <CONT,D=1,SELF,MGC=220> ; 101
5029 006127' 001000 003340
5030 006130' 010200 000200 MWORD <CONT,SD0,OR,B=4,D=2,SELM,MGC=200> ; 102
5031 006131' 732002 002340
5032 006132' 010351 000000 MWORD <JMAP,J=5100,D=1> ; 103
5033 006133' 001000 000040
5034
5035 ; Routine to read a word from CBUS into the formatter.
5036
5037 006134' 020002 010000 MWORD <ADDR=200,JMAP,J=201> ; 200
5038 006135' 000000 000040
5039 006136' 020102 030000 MWORD <CJP,J=203,D=1,CENA,CCCA> ; 201
5040 006137' 001400 000060
5041 006140' 020202 010000 MWORD <JMAP,J=201,D=1> ; 202
5042 006141' 001000 000040
5043 006142' 020300 000004 MWORD <CONT,D=1,SELC,MGC=4> ; 203
5044 006143' 001000 004340
5045 006144' 020400 000200 MWORD <CONT,SD0,OR,B=3,D=2,SELM,MGC=200> ; 204
5046 006145' 732001 402340
5047 006146' 020500 000000 MWORD <JZ> ; 205
5048 006147' 000000 000000
5049
5050 ; Initialization
5051
5052 006150' 100010 010020 MWORD <ADDR=1000,JMAP,J=1001,SELM,MGC=20> ; 1000
5053 006151' 000000 002040
5054 006152' 100100 000200 MWORD <CONT,D=1,SELC,MGC=200> ; 1001
5055 006153' 001000 004340
5056 006154' 100200 310360 MWORD <LDCT,J=31,SD0,OR,D=2,SKCN,MGC=360> ; 1002
5057 006155' 732000 240300
5058 006156' 100310 030000 MWORD <RPCT,J=1003,S0A,OR,D=5> ; 1003
5059 006157' 435000 000220
5060 006160' 100400 002040 MWORD <CONT,S0A,OR,D=1,OENA,SELM,MGC=40> ; 1004
5061 006161' 431000 002340
5062 006162' 100500 000006 MWORD <JZ,SD0,D=1,SELP,MGC=6> ; 1005
5063 006163' 701000 001000
5064 006164' 000000 000000 MWORD <ADDR=0,JZ> ; 0
5065 006165' 000000 000000
5066
5067 ; Initialization step
5068
5069 006166' 500050 010100 MWORD <ADDR=5000,JMAP,J=5001,SELC,MGC=100> ; 5000
5070 006167' 000000 004040
5071 006170' 500100 000020 MWORD <JZ,SELM,MGC=20> ; 5001
5072 006171' 000000 002000
5073
5074 ; Subroutine - Passed - Write 1 to bit 12 of CSR register
5075
5076 006172' 510000 000000 MWORD <ADDR=5100,CONT,SD0,AND,B=2,D=2> ; 5100
5077 006173' 742001 000340
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 81-1
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1723
5078 006174' 510100 000000 MWORD <CONT,S0B,PLUS,B=2,D=2,CRY> ; 5101
5079 006175' 302001 000740
5080 006176' 510200 260000 MWORD <LDCT,J=26> ; 5102
5081 006177' 000000 000300
5082 006200' 510351 030000 MWORD <RPCT,J=5103,SAB,PLUS,A=2,B=2,D=2> ; 5103
5083 006201' 102021 000220
5084 006202' 510400 002004 MWORD <CONT,S0A,A=2,OR,D=1,OENA,SELE,MGC=4> ; 5104
5085 006203' 431020 005340
5086 006204' 510551 070040 MWORD <CJP,J=5107,CENA,CCGC,D=1,SELE,MGC=40> ; 5105
5087 006205' 001400 015060
5088 006206' 510651 050000 MWORD <JMAP,J=5105,D=1> ; 5106
5089 006207' 001000 000040
5090 006210' 510700 000200 MWORD <CONT,S0A,A=1,OR,D=1,SELE,MGC=200> ; 5107
5091 006211' 431010 005340
5092 006212' 511051 102004 MWORD <JMAP,J=5110,S0A,A=4,OR,D=1,OENA,SELE,MGC=4> ; 5110
5093 006213' 431040 005040
5094 006214' 777777 777777 -1
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 82
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1724
5095
5096 ;#********************************************************************
5097 ;* Test 23 - Fmtr Up Shift 8 (from PLIN) Test - SELRHTNIB=1
5098 ;
5099 ; Description: Verify that the formatter can shift various data
5100 ; patterns up 8 bits at a time while inserting bits
5101 ; from the PLIN into the formatter. The data loaded
5102 ; into the PLIN initially is 017.
5103 ;
5104 ; Procedure: KL> Port Clear
5105 ; KL> Set up data transfer for data patterns
5106 ;
5107 ; UC> Read a data pattern over the CBUS
5108 ; UC> Load PLIN with 017
5109 ;
5110 ; UC> Shift up 8 bits
5111 ; UC> Read formatter contents and write into EBUF
5112 ; KL> Read EBUF and verify the data
5113 ; KL> Start up the ucode to shift again
5114 ;
5115 ; Repeat the above shifting then verifying EBUF
5116 ; contents 5 times, until the data becomes
5117 ; all zero.
5118 ;
5119 ; Do for data patterns: 0's
5120 ; 1's
5121 ; 525252,,525252
5122 ; 000000,,007777
5123 ; 000000,,007070
5124 ; 000000,,000707
5125 ;
5126 ; Failure: ---
5127 ;#********************************************************************
5128
5129 ; Test data
5130
5131 006215' 254 00 0 00 006225' TSTC23: JRST TG23 ; go start test
5132 006216' 100604 000023 CBUS!NDMP!NDCB!ZCBUS!23 ; test mask
5133 006217' 006402' 013423' T23M,,[ASCIZ ^Fmtr Up Shift 8 (from PLIN) Test - SELRHTNIB=1^]
5134 006220' 013263' 012716' [EXP C20,C12,MLAST!C8],,[EXP C4,MLAST!C2]
5135 006221' 000000 006473' TSTC24 ; failure test table
5136 006222' 000000 006754' TSTC25 ; ...
5137 006223' 000000 007062' TSTC26
5138 006224' 777777 777777 -1
5139
5140 ; Start test
5141
5142 006225' 201 00 0 00 000000' TG23: MOVEI Z9 ; get address of module start
5143 006226' 260 17 0 00 005750* GO TRACE ; handle trace output
5144 006227' 201 01 0 00 006402' MOVEI 1,T23M ; set up microcode address
5145 006230' 260 17 0 00 005752* GO TLOAD ; load/verify it
5146 006231' 263 17 0 00 000000 RTN ; failed - exit test
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 83
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1725
5147
5148 ; Initialization
5149
5150 006232' 400 15 0 00 000000 TL23: SETZ ERFLG, ; clear error flag
5151 006233' 260 17 0 00 005755* GO IPACLR ; clear port
5152 006234' 402 00 0 00 005756* SETZM TSTSUB ; initialize subtest number
5153 MOVSI [000000,,000000 ; get address of buffer
5154 777777,,777777 ; contents
5155 525252,,525252
5156 000000,,007777
5157 000000,,007070
5158 006235' 205 00 0 00 013330' 000000,,000707]
5159 006236' 541 00 0 00 005773* HRRI BUFF ; build the BLT pointer
5160 006237' 251 00 0 00 000000# BLT BUFF+5 ; insert data into buffer
5161
5162 ; First ensure the data transfer is reset
5163
5164 006240' 201 01 0 00 005000 MOVEI 1,5000 ; get start address
5165 006241' 242 01 0 00 000001 LSH 1,1 ; position correctly
5166 006242' 260 17 0 00 006073* GO LDRAR ; load the register
5167 006243' 201 01 0 00 000010 MOVEI 1,MPRUN ; get MPRUN bit
5168 006244' 260 17 0 00 006077* GO LDCSR ; start up the port
5169 006245' 400 01 0 00 000000 SETZ 1, ; clear data
5170 006246' 260 17 0 00 006244* GO LDCSR ; stop the port
5171
5172 ; Now generate CCW list
5173
5174 006247' 200 01 0 00 013210' MOVE 1,[CBUFSZ,,CBUF] ; get pointer to control buffer
5175 006250' 260 17 0 00 005772* GO CHINIT ; initialize software
5176 006251' 551 01 0 00 006236* HRRZI 1,BUFF ; buffer address
5177 006252' 201 02 0 00 000006 MOVEI 2,6 ; word count
5178 006253' 400 03 0 00 000000 SETZ 3, ; clear zero fill specifier
5179 006254' 260 17 0 00 005776* GO GENCCW ; generate a CCW list
5180 006255' 201 06 0 00 006300' MOVEI 6,TS23 ; get test execute table address
5181
5182 ; Start up the data transfer
5183
5184 006256' 201 01 0 00 001000 MOVEI 1,1000 ; get start address
5185 006257' 242 01 0 00 000001 LSH 1,1 ; position correctly
5186 006260' 260 17 0 00 006242* GO LDRAR ; load the register
5187 006261' 201 01 0 00 000010 MOVEI 1,MPRUN ; get MPRUN bit
5188 006262' 260 17 0 00 006246* GO LDCSR ; start up the port
5189 006263' 201 00 0 00 000001 MOVEI 1 ; set up delay of 1 ms
5190 006264' 260 17 0 00 006006* GO ODELAY ; wait a bit
5191 006265' 400 01 0 00 000000 SETZ 1, ; clear data
5192 006266' 260 17 0 00 006262* GO LDCSR ; stop the port
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 84
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1726
5193
5194 ; Loop on test execute table entries
5195
5196 006267' 260 17 0 00 006011* TA23: GO TEXEC ; execute table entry
5197 006270' 254 00 0 00 006277' JRST TX23 ; end of table
5198 006271' 254 00 0 00 006267' JRST TA23 ; keep looping after call
5199 006272' 474 15 0 00 000000 SETO ERFLG, ; error - EBUF data incorrect
5200
5201 ; Handle error printouts and scope looping
5202
5203 006273' 027 00 0 00 006367' SCOPER MA23 ; print error message
5204 006274' 254 00 0 00 006232' JRST TL23 ; loop on error
5205 006275' 254 00 0 00 006277' JRST TX23 ; altmode exit
5206 006276' 322 15 0 00 006267' JUMPE ERFLG,TA23 ; do next sstep table entry
5207
5208 ; End of test
5209
5210 006277' 263 17 0 00 000000 TX23: RTN ; return
5211
5212 ; Test Execute Table, as: (CMD,parameters)
5213
5214 006300' 140000 006330' TS23: TTABLE (TCALL,TS23IN) ; initialize stuff
5215 006301' 200000 006333' TS23L: TTABLE (TCALLC,TS23NE) ; set up next data pattern
5216
5217 ; Shifted 8 bits
5218
5219 006302' 140000 006357' TS23A: TTABLE (TCALL,TS23NN) ; increment shift count
5220 006303' 400000 000100 TTABLE (TSSTAR,100) ; start up port
5221 006304' 240001 006362' TTABLE (TCHECK,1,TS23RS) ; check if completed
5222 006305' 340000 000000 TTABLE (TEXIT) ; exit if error yet
5223
5224 ; Shifted 16 bits
5225
5226 006306' 140000 006357' TTABLE (TCALL,TS23NN) ; increment shift count
5227 006307' 400000 000100 TTABLE (TSSTAR,100) ; start up port
5228 006310' 240001 006363' TTABLE (TCHECK,1,TS23RS+1) ; check if completed
5229 006311' 340000 000000 TTABLE (TEXIT) ; exit if error yet
5230
5231 ; Shifted 24 bits
5232
5233 006312' 140000 006357' TTABLE (TCALL,TS23NN) ; increment shift count
5234 006313' 400000 000100 TTABLE (TSSTAR,100) ; start up port
5235 006314' 240001 006364' TTABLE (TCHECK,1,TS23RS+2) ; check if completed
5236 006315' 340000 000000 TTABLE (TEXIT) ; exit if error yet
5237
5238 ; Shifted 32 bits
5239
5240 006316' 140000 006357' TTABLE (TCALL,TS23NN) ; increment shift count
5241 006317' 400000 000100 TTABLE (TSSTAR,100) ; start up port
5242 006320' 240001 006365' TTABLE (TCHECK,1,TS23RS+3) ; check if completed
5243 006321' 340000 000000 TTABLE (TEXIT) ; exit if error yet
5244
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 85
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1727
5245
5246 ; Shifted 40 bits
5247
5248 006322' 140000 006357' TTABLE (TCALL,TS23NN) ; increment shift count
5249 006323' 400000 000100 TTABLE (TSSTAR,100) ; start up port
5250 006324' 240001 006366' TTABLE (TCHECK,1,TS23RS+4) ; check if completed
5251 006325' 340000 000000 TTABLE (TEXIT) ; exit if error yet
5252 006326' 300000 006301' TTABLE (TJRST,TS23L) ; loop till done
5253 006327' 000000 000000 TTABLE (TLAST)
5254
5255 ; Initialize stuff
5256
5257 006330' 201 00 0 00 000000# TS23IN: MOVEI BUFF-1 ; initialize buffer pointer
5258 006331' 202 00 0 00 014025' MOVEM T23BUF# ; ...
5259 006332' 263 17 0 00 000000 RTN ; return
5260
5261 ; Set up next data pattern
5262
5263 006333' 350 01 0 00 014025' TS23NE: AOS 1,T23BUF ; point to next data pattern
5264 006334' 307 01 0 00 000000# CAIG 1,BUFF+5 ; done yet?
5265 006335' 350 00 0 17 000000 AOS (P) ; no - set up proper return
5266 006336' 200 00 0 01 000000 MOVE (1) ; get data pattern
5267 006337' 201 02 0 00 006362' MOVEI 2,TS23RS ; get initial address of EBUF data
5268 006340' 505 01 0 00 037777 TS23N0: HRLI 1,37777 ; get initial PLIN data (left 8 bits)
5269 006341' 246 00 0 00 000010 LSHC 8 ; shift 8 bits
5270 006342' 202 00 0 02 000000 MOVEM (2) ; save it
5271 006343' 350 00 0 00 000002 AOS 2 ; point to next address
5272 006344' 307 02 0 00 006366' CAIG 2,TS23RS+4 ; done yet?
5273 006345' 254 00 0 00 006340' JRST TS23N0 ; no - loop till done
5274 006346' 402 00 0 00 014050' SETZM TS23NM# ; initialize number of shifts
5275
5276 ; Read the next word
5277
5278 006347' 201 01 0 00 000200 MOVEI 1,200 ; get start address
5279 006350' 242 01 0 00 000001 LSH 1,1 ; position correctly
5280 006351' 260 17 0 00 006260* GO LDRAR ; load the register
5281 006352' 201 01 0 00 000010 MOVEI 1,MPRUN ; get MPRUN bit
5282 006353' 260 17 0 00 006266* GO LDCSR ; start up the port
5283 006354' 400 01 0 00 000000 SETZ 1, ; clear data
5284 006355' 260 17 0 00 006353* GO LDCSR ; stop the port
5285 006356' 263 17 0 00 000000 RTN ; return
5286
5287 ; Increment shift count
5288
5289 006357' 201 00 0 00 000010 TS23NN: MOVEI 8 ; get a 8
5290 006360' 272 00 0 00 014050' ADDM TS23NM ; add it
5291 006361' 263 17 0 00 000000 RTN ; return
5292
5293 006362' TS23RS: BLOCK 5 ; correct EBUF data
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 86
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1728
5294
5295 ; Error messages
5296
5297 006367' 240000 006371' MA23: CALL!TXNOT!MA23PN ; print data pattern ...
5298 006370' 000000000000# LAST!CALL!TXALL!TTPNT ; print test data
5299
5300 006371' 037 00 0 00 013336' MA23PN: TMSGC <Data > ; get data and
5301 006372' 200 01 0 00 014025' MOVE 1,T23BUF ; print it
5302 006373' 200 00 0 01 000000 MOVE (1)
5303 006374' 037 13 0 00 000000 PNTHW
5304 006375' 037 00 0 00 013372' TMSG < shifted up from PLIN >
5305 006376' 200 00 0 00 014050' MOVE TS23NM ; get shift count
5306 006377' 037 15 0 00 000000 PNTDEC
5307 006400' 037 00 0 00 013343' TMSG <. bits, result in EBUF>
5308 006401' 263 17 0 00 000000 RTN
5309
5310 ; Microcode - Shift 8 bits
5311
5312 006402' 010001 010000 T23M: MWORD <ADDR=100,JMAP,J=101,D=1> ; 100
5313 006403' 001000 000040
5314 006404' 010100 000222 MWORD <CONT,D=1,SELF,MGC=222> ; 101
5315 006405' 001000 003340
5316 006406' 010200 000200 MWORD <CONT,SD0,OR,B=4,D=2,SELM,MGC=200> ; 102
5317 006407' 732002 002340
5318 006410' 010351 000000 MWORD <JMAP,J=5100,D=1> ; 103
5319 006411' 001000 000040
5320
5321 ; Routine to read a word from CBUS into the formatter.
5322
5323 006412' 020002 010000 MWORD <ADDR=200,JMAP,J=201> ; 200
5324 006413' 000000 000040
5325 006414' 020102 030000 MWORD <CJP,J=203,D=1,CENA,CCCA> ; 201
5326 006415' 001400 000060
5327 006416' 020202 010000 MWORD <JMAP,J=201,D=1> ; 202
5328 006417' 001000 000040
5329 006420' 020300 000004 MWORD <CONT,D=1,SELC,MGC=4> ; 203
5330 006421' 001000 004340
5331 006422' 020400 000200 MWORD <CONT,SD0,OR,B=3,D=2,SELM,MGC=200> ; 204
5332 006423' 732001 402340
5333 006424' 020500 000000 MWORD <JZ> ; 205
5334 006425' 000000 000000
5335
5336 ; Initialization
5337
5338 006426' 100010 010020 MWORD <ADDR=1000,JMAP,J=1001,SELM,MGC=20> ; 1000
5339 006427' 000000 002040
5340 006430' 100100 000200 MWORD <CONT,D=1,SELC,MGC=200> ; 1001
5341 006431' 001000 004340
5342 006432' 100200 310017 MWORD <LDCT,J=31,SD0,OR,D=2,SKCN,MGC=017> ; 1002
5343 006433' 732000 240300
5344 006434' 100310 030000 MWORD <RPCT,J=1003,S0A,OR,D=5> ; 1003
5345 006435' 435000 000220
5346 006436' 100400 002040 MWORD <CONT,S0A,OR,D=1,OENA,SELM,MGC=40> ; 1004
5347 006437' 431000 002340
5348 006440' 100500 000006 MWORD <JZ,SD0,D=1,SELP,MGC=6> ; 1005
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 86-1
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1729
5349 006441' 701000 001000
5350 006442' 000000 000000 MWORD <ADDR=0,JZ> ; 0
5351 006443' 000000 000000
5352
5353 ; Initialization step
5354
5355 006444' 500050 010100 MWORD <ADDR=5000,JMAP,J=5001,SELC,MGC=100> ; 5000
5356 006445' 000000 004040
5357 006446' 500100 000020 MWORD <JZ,SELM,MGC=20> ; 5001
5358 006447' 000000 002000
5359
5360 ; Subroutine - Passed - Write 1 to bit 12 of CSR register
5361
5362 006450' 510000 000000 MWORD <ADDR=5100,CONT,SD0,AND,B=2,D=2> ; 5100
5363 006451' 742001 000340
5364 006452' 510100 000000 MWORD <CONT,S0B,PLUS,B=2,D=2,CRY> ; 5101
5365 006453' 302001 000740
5366 006454' 510200 260000 MWORD <LDCT,J=26> ; 5102
5367 006455' 000000 000300
5368 006456' 510351 030000 MWORD <RPCT,J=5103,SAB,PLUS,A=2,B=2,D=2> ; 5103
5369 006457' 102021 000220
5370 006460' 510400 002004 MWORD <CONT,S0A,A=2,OR,D=1,OENA,SELE,MGC=4> ; 5104
5371 006461' 431020 005340
5372 006462' 510551 070040 MWORD <CJP,J=5107,CENA,CCGC,D=1,SELE,MGC=40> ; 5105
5373 006463' 001400 015060
5374 006464' 510651 050000 MWORD <JMAP,J=5105,D=1> ; 5106
5375 006465' 001000 000040
5376 006466' 510700 000200 MWORD <CONT,S0A,A=1,OR,D=1,SELE,MGC=200> ; 5107
5377 006467' 431010 005340
5378 006470' 511051 102004 MWORD <JMAP,J=5110,S0A,A=4,OR,D=1,OENA,SELE,MGC=4> ; 5110
5379 006471' 431040 005040
5380 006472' 777777 777777 -1
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 87
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1730
5381
5382 ;#********************************************************************
5383 ;* Test 24 - Fmtr Up Shift 8 (from PLIN) Test - SELRHTNIB=1
5384 ;
5385 ; Description: Verify that the formatter can shift various data
5386 ; patterns up 4 bits at a time while inserting bits
5387 ; from the PLIN into the formatter. The data loaded
5388 ; into the PLIN initially is 360.
5389 ;
5390 ; Procedure: KL> Port Clear
5391 ; KL> Set up data transfer for data patterns
5392 ;
5393 ; UC> Read a data pattern over the CBUS
5394 ; UC> Load PLIN with 360
5395 ;
5396 ; UC> Shift up 4 bits
5397 ; UC> Read formatter contents and write into EBUF
5398 ; KL> Read EBUF and verify the data
5399 ; KL> Start up the ucode to shift again
5400 ;
5401 ; Repeat the above shifting then verifying EBUF
5402 ; contents 10 times, until the data becomes
5403 ; all zero.
5404 ;
5405 ; Do for data patterns: 0's
5406 ; 1's
5407 ; 525252,,525252
5408 ; 000000,,007777
5409 ; 000000,,007070
5410 ; 000000,,000707
5411 ;
5412 ; Failure: ---
5413 ;#********************************************************************
5414
5415 ; Test data
5416
5417 006473' 254 00 0 00 006504' TSTC24: JRST TG24 ; go start test
5418 006474' 100604 000024 CBUS!NDMP!NDCB!ZCBUS!24 ; test mask
5419 006475' 006663' 013377' T24M,,[ASCIZ ^Fmtr Up Shift 4 (from PLIN) Test - SELRHTNIB=1^]
5420 006476' 013263' 012716' [EXP C20,C12,MLAST!C8],,[EXP C4,MLAST!C2]
5421 006477' 000000 006754' TSTC25 ; failure test table
5422 006500' 000000 007062' TSTC26 ; ...
5423 006501' 000000 010224' TSTC31
5424 006502' 000000 010542' TSTC32
5425 006503' 777777 777777 -1
5426
5427 ; Start test
5428
5429 006504' 201 00 0 00 000000' TG24: MOVEI Z9 ; get address of module start
5430 006505' 260 17 0 00 006226* GO TRACE ; handle trace output
5431 006506' 201 01 0 00 006663' MOVEI 1,T24M ; set up microcode address
5432 006507' 260 17 0 00 006230* GO TLOAD ; load/verify it
5433 006510' 263 17 0 00 000000 RTN ; failed - exit test
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 88
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1731
5434
5435 ; Initialization
5436
5437 006511' 400 15 0 00 000000 TL24: SETZ ERFLG, ; clear error flag
5438 006512' 260 17 0 00 006233* GO IPACLR ; clear port
5439 006513' 402 00 0 00 006234* SETZM TSTSUB ; initialize subtest number
5440 MOVSI [000000,,000000 ; get address of buffer
5441 777777,,777777 ; contents
5442 525252,,525252
5443 000000,,007777
5444 000000,,007070
5445 006514' 205 00 0 00 013330' 000000,,000707]
5446 006515' 541 00 0 00 006251* HRRI BUFF ; build the BLT pointer
5447 006516' 251 00 0 00 000000# BLT BUFF+5 ; insert data into buffer
5448
5449 ; First ensure the data transfer is reset
5450
5451 006517' 201 01 0 00 005000 MOVEI 1,5000 ; get start address
5452 006520' 242 01 0 00 000001 LSH 1,1 ; position correctly
5453 006521' 260 17 0 00 006351* GO LDRAR ; load the register
5454 006522' 201 01 0 00 000010 MOVEI 1,MPRUN ; get MPRUN bit
5455 006523' 260 17 0 00 006355* GO LDCSR ; start up the port
5456 006524' 400 01 0 00 000000 SETZ 1, ; clear data
5457 006525' 260 17 0 00 006523* GO LDCSR ; stop the port
5458
5459 ; Now generate CCW list
5460
5461 006526' 200 01 0 00 013210' MOVE 1,[CBUFSZ,,CBUF] ; get pointer to control buffer
5462 006527' 260 17 0 00 006250* GO CHINIT ; initialize software
5463 006530' 551 01 0 00 006515* HRRZI 1,BUFF ; buffer address
5464 006531' 201 02 0 00 000006 MOVEI 2,6 ; word count
5465 006532' 400 03 0 00 000000 SETZ 3, ; clear zero fill specifier
5466 006533' 260 17 0 00 006254* GO GENCCW ; generate a CCW list
5467 006534' 201 06 0 00 006557' MOVEI 6,TS24 ; get test execute table address
5468
5469 ; Start up the data transfer
5470
5471 006535' 201 01 0 00 001000 MOVEI 1,1000 ; get start address
5472 006536' 242 01 0 00 000001 LSH 1,1 ; position correctly
5473 006537' 260 17 0 00 006521* GO LDRAR ; load the register
5474 006540' 201 01 0 00 000010 MOVEI 1,MPRUN ; get MPRUN bit
5475 006541' 260 17 0 00 006525* GO LDCSR ; start up the port
5476 006542' 201 00 0 00 000001 MOVEI 1 ; set up delay of 1 ms
5477 006543' 260 17 0 00 006264* GO ODELAY ; wait a bit
5478 006544' 400 01 0 00 000000 SETZ 1, ; clear data
5479 006545' 260 17 0 00 006541* GO LDCSR ; stop the port
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 89
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1732
5480
5481 ; Loop on test execute table entries
5482
5483 006546' 260 17 0 00 006267* TA24: GO TEXEC ; execute table entry
5484 006547' 254 00 0 00 006556' JRST TX24 ; end of table
5485 006550' 254 00 0 00 006546' JRST TA24 ; keep looping after call
5486 006551' 474 15 0 00 000000 SETO ERFLG, ; error - EBUF data incorrect
5487
5488 ; Handle error printouts and scope looping
5489
5490 006552' 027 00 0 00 006650' SCOPER MA24 ; print error message
5491 006553' 254 00 0 00 006511' JRST TL24 ; loop on error
5492 006554' 254 00 0 00 006556' JRST TX24 ; altmode exit
5493 006555' 322 15 0 00 006546' JUMPE ERFLG,TA24 ; do next sstep table entry
5494
5495 ; End of test
5496
5497 006556' 263 17 0 00 000000 TX24: RTN ; return
5498
5499 ; Test Execute Table, as: (CMD,parameters)
5500
5501 006557' 140000 006607' TS24: TTABLE (TCALL,TS24IN) ; initialize stuff
5502 006560' 200000 006612' TS24L: TTABLE (TCALLC,TS24NE) ; set up next data pattern
5503
5504 ; Shifted 8 bits
5505
5506 006561' 140000 006640' TS24A: TTABLE (TCALL,TS24NN) ; increment shift count
5507 006562' 400000 000100 TTABLE (TSSTAR,100) ; start up port
5508 006563' 240001 006643' TTABLE (TCHECK,1,TS24RS) ; check if completed
5509 006564' 340000 000000 TTABLE (TEXIT) ; exit if error yet
5510
5511 ; Shifted 16 bits
5512
5513 006565' 140000 006640' TTABLE (TCALL,TS24NN) ; increment shift count
5514 006566' 400000 000100 TTABLE (TSSTAR,100) ; start up port
5515 006567' 240001 006644' TTABLE (TCHECK,1,TS24RS+1) ; check if completed
5516 006570' 340000 000000 TTABLE (TEXIT) ; exit if error yet
5517
5518 ; Shifted 24 bits
5519
5520 006571' 140000 006640' TTABLE (TCALL,TS24NN) ; increment shift count
5521 006572' 400000 000100 TTABLE (TSSTAR,100) ; start up port
5522 006573' 240001 006645' TTABLE (TCHECK,1,TS24RS+2) ; check if completed
5523 006574' 340000 000000 TTABLE (TEXIT) ; exit if error yet
5524
5525 ; Shifted 32 bits
5526
5527 006575' 140000 006640' TTABLE (TCALL,TS24NN) ; increment shift count
5528 006576' 400000 000100 TTABLE (TSSTAR,100) ; start up port
5529 006577' 240001 006646' TTABLE (TCHECK,1,TS24RS+3) ; check if completed
5530 006600' 340000 000000 TTABLE (TEXIT) ; exit if error yet
5531
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 90
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1733
5532
5533 ; Shifted 40 bits
5534
5535 006601' 140000 006640' TTABLE (TCALL,TS24NN) ; increment shift count
5536 006602' 400000 000100 TTABLE (TSSTAR,100) ; start up port
5537 006603' 240001 006647' TTABLE (TCHECK,1,TS24RS+4) ; check if completed
5538 006604' 340000 000000 TTABLE (TEXIT) ; exit if error yet
5539 006605' 300000 006560' TTABLE (TJRST,TS24L) ; loop till done
5540 006606' 000000 000000 TTABLE (TLAST)
5541
5542 ; Initialize stuff
5543
5544 006607' 201 00 0 00 000000# TS24IN: MOVEI BUFF-1 ; initialize buffer pointer
5545 006610' 202 00 0 00 014026' MOVEM T24BUF# ; ...
5546 006611' 263 17 0 00 000000 RTN ; return
5547
5548 ; Set up next data pattern
5549
5550 006612' 350 01 0 00 014026' TS24NE: AOS 1,T24BUF ; point to next data pattern
5551 006613' 307 01 0 00 000000# CAIG 1,BUFF+5 ; done yet?
5552 006614' 350 00 0 17 000000 AOS (P) ; no - set up proper return
5553 006615' 200 00 0 01 000000 MOVE (1) ; get data pattern
5554 006616' 201 02 0 00 006643' MOVEI 2,TS24RS ; get initial address of EBUF data
5555 006617' 400 01 0 00 000000 TS24N0: SETZ 1, ; first shift doesn't include PLIN data
5556 006620' 302 02 0 00 006643' CAIE 2,TS24RS ; so check if first shift and if not
5557 006621' 505 01 0 00 741777 HRLI 1,741777 ; get initial PLIN data (left 8 bits)
5558 006622' 246 00 0 00 000010 LSHC 8 ; shift 8 bits
5559 006623' 202 00 0 02 000000 MOVEM (2) ; save it
5560 006624' 350 00 0 00 000002 AOS 2 ; point to next address
5561 006625' 307 02 0 00 006647' CAIG 2,TS24RS+4 ; done yet?
5562 006626' 254 00 0 00 006617' JRST TS24N0 ; no - loop till done
5563 006627' 402 00 0 00 014051' SETZM TS24NM# ; initialize number of shifts
5564
5565 ; Read the next word
5566
5567 006630' 201 01 0 00 000200 MOVEI 1,200 ; get start address
5568 006631' 242 01 0 00 000001 LSH 1,1 ; position correctly
5569 006632' 260 17 0 00 006537* GO LDRAR ; load the register
5570 006633' 201 01 0 00 000010 MOVEI 1,MPRUN ; get MPRUN bit
5571 006634' 260 17 0 00 006545* GO LDCSR ; start up the port
5572 006635' 400 01 0 00 000000 SETZ 1, ; clear data
5573 006636' 260 17 0 00 006634* GO LDCSR ; stop the port
5574 006637' 263 17 0 00 000000 RTN ; return
5575
5576 ; Increment shift count
5577
5578 006640' 201 00 0 00 000010 TS24NN: MOVEI 8 ; get a 8
5579 006641' 272 00 0 00 014051' ADDM TS24NM ; add it
5580 006642' 263 17 0 00 000000 RTN ; return
5581
5582 006643' TS24RS: BLOCK 5 ; correct EBUF data
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 91
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1734
5583
5584 ; Error messages
5585
5586 006650' 240000 006652' MA24: CALL!TXNOT!MA24PN ; print data pattern ...
5587 006651' 000000000000# LAST!CALL!TXALL!TTPNT ; print test data
5588
5589 006652' 037 00 0 00 013336' MA24PN: TMSGC <Data > ; get data and
5590 006653' 200 01 0 00 014026' MOVE 1,T24BUF ; print it
5591 006654' 200 00 0 01 000000 MOVE (1)
5592 006655' 037 13 0 00 000000 PNTHW
5593 006656' 037 00 0 00 013372' TMSG < shifted up from PLIN >
5594 006657' 200 00 0 00 014051' MOVE TS24NM ; get shift count
5595 006660' 037 15 0 00 000000 PNTDEC
5596 006661' 037 00 0 00 013343' TMSG <. bits, result in EBUF>
5597 006662' 263 17 0 00 000000 RTN
5598
5599 ; Microcode - Shift 8 bits
5600
5601 006663' 010001 010000 T24M: MWORD <ADDR=100,JMAP,J=101,D=1> ; 100
5602 006664' 001000 000040
5603 006665' 010100 000222 MWORD <CONT,D=1,SELF,MGC=222> ; 101
5604 006666' 001000 003340
5605 006667' 010200 000200 MWORD <CONT,SD0,OR,B=4,D=2,SELM,MGC=200> ; 102
5606 006670' 732002 002340
5607 006671' 010351 000000 MWORD <JMAP,J=5100,D=1> ; 103
5608 006672' 001000 000040
5609
5610 ; Routine to read a word from CBUS into the formatter.
5611
5612 006673' 020002 010000 MWORD <ADDR=200,JMAP,J=201> ; 200
5613 006674' 000000 000040
5614 006675' 020102 030000 MWORD <CJP,J=203,D=1,CENA,CCCA> ; 201
5615 006676' 001400 000060
5616 006677' 020202 010000 MWORD <JMAP,J=201,D=1> ; 202
5617 006700' 001000 000040
5618 006701' 020300 000004 MWORD <CONT,D=1,SELC,MGC=4> ; 203
5619 006702' 001000 004340
5620 006703' 020400 000200 MWORD <CONT,SD0,OR,B=3,D=2,SELM,MGC=200> ; 204
5621 006704' 732001 402340
5622 006705' 020500 000000 MWORD <JZ> ; 205
5623 006706' 000000 000000
5624
5625 ; Initialization
5626
5627 006707' 100010 010020 MWORD <ADDR=1000,JMAP,J=1001,SELM,MGC=20> ; 1000
5628 006710' 000000 002040
5629 006711' 100100 000200 MWORD <CONT,D=1,SELC,MGC=200> ; 1001
5630 006712' 001000 004340
5631 006713' 100200 310360 MWORD <LDCT,J=31,SD0,OR,D=2,SKCN,MGC=360> ; 1002
5632 006714' 732000 240300
5633 006715' 100310 030000 MWORD <RPCT,J=1003,S0A,OR,D=5> ; 1003
5634 006716' 435000 000220
5635 006717' 100400 002040 MWORD <CONT,S0A,OR,D=1,OENA,SELM,MGC=40> ; 1004
5636 006720' 431000 002340
5637 006721' 100500 000006 MWORD <JZ,SD0,D=1,SELP,MGC=6> ; 1005
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 91-1
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1735
5638 006722' 701000 001000
5639 006723' 000000 000000 MWORD <ADDR=0,JZ> ; 0
5640 006724' 000000 000000
5641
5642 ; Initialization step
5643
5644 006725' 500050 010100 MWORD <ADDR=5000,JMAP,J=5001,SELC,MGC=100> ; 5000
5645 006726' 000000 004040
5646 006727' 500100 000020 MWORD <JZ,SELM,MGC=20> ; 5001
5647 006730' 000000 002000
5648
5649 ; Subroutine - Passed - Write 1 to bit 12 of CSR register
5650
5651 006731' 510000 000000 MWORD <ADDR=5100,CONT,SD0,AND,B=2,D=2> ; 5100
5652 006732' 742001 000340
5653 006733' 510100 000000 MWORD <CONT,S0B,PLUS,B=2,D=2,CRY> ; 5101
5654 006734' 302001 000740
5655 006735' 510200 260000 MWORD <LDCT,J=26> ; 5102
5656 006736' 000000 000300
5657 006737' 510351 030000 MWORD <RPCT,J=5103,SAB,PLUS,A=2,B=2,D=2> ; 5103
5658 006740' 102021 000220
5659 006741' 510400 002004 MWORD <CONT,S0A,A=2,OR,D=1,OENA,SELE,MGC=4> ; 5104
5660 006742' 431020 005340
5661 006743' 510551 070040 MWORD <CJP,J=5107,CENA,CCGC,D=1,SELE,MGC=40> ; 5105
5662 006744' 001400 015060
5663 006745' 510651 050000 MWORD <JMAP,J=5105,D=1> ; 5106
5664 006746' 001000 000040
5665 006747' 510700 000200 MWORD <CONT,S0A,A=1,OR,D=1,SELE,MGC=200> ; 5107
5666 006750' 431010 005340
5667 006751' 511051 102004 MWORD <JMAP,J=5110,S0A,A=4,OR,D=1,OENA,SELE,MGC=4> ; 5110
5668 006752' 431040 005040
5669 006753' 777777 777777 -1
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 92
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1736
5670
5671 ;#********************************************************************
5672 ;* Test 25 - Fmtr Basic Down Shifting Test
5673 ;
5674 ; Description: Verify that the Mover/Formatter is capable of
5675 ; being shifted down. The contents of the formatter
5676 ; is initially zero, and the result of any shifting
5677 ; should be zero.
5678 ;
5679 ; Procedure: KL> Port Clear
5680 ; UC> Shift formatter 4 bits down
5681 ; UC> Read formatter data
5682 ; UC> If zero, continue.
5683 ; If non-zero, halt with a CRAM PE and leave
5684 ; the non-zero data read in the EBUF.
5685 ; KL> Let it run at full speed for 1/2 second then
5686 ; halt and verify that no CRAM PE occurred and
5687 ; that the microcode did not stop at the error
5688 ; location.
5689 ;
5690 ; Failure: ---
5691 ;#********************************************************************
5692
5693 ; Test data
5694
5695 006754' 254 00 0 00 006764' TSTC25: JRST TG25 ; go start test
5696 006755' 100604 000025 CBUS!NDMP!NDCB!ZCBUS!25 ; test mask
5697 006756' 007047' 013435' T25M,,[ASCIZ ^Fmtr Basic Down Shifting Test^]
5698 006757' 013263' 012716' [EXP C20,C12,MLAST!C8],,[EXP C4,MLAST!C2]
5699 006760' 000000 007062' TSTC26 ; failure test table
5700 006761' 000000 007372' TSTC27 ; ...
5701 006762' 000000 007710' TSTC30
5702 006763' 777777 777777 -1
5703
5704 ; Start test
5705
5706 006764' 201 00 0 00 000000' TG25: MOVEI Z9 ; get address of module start
5707 006765' 260 17 0 00 006505* GO TRACE ; handle trace output
5708 006766' 201 01 0 00 007047' MOVEI 1,T25M ; set up microcode address
5709 006767' 260 17 0 00 006507* GO TLOAD ; load/verify it
5710 006770' 263 17 0 00 000000 RTN ; failed - exit test
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 93
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1737
5711
5712 ; 1st segment of test (Segment A) - Start up port
5713
5714 006771' 400 15 0 00 000000 TA25: SETZ ERFLG, ; clear error flag
5715 006772' 201 00 0 00 000001 MOVEI 1 ; initialize subtest number
5716 006773' 202 00 0 00 006513* MOVEM TSTSUB ; to 1
5717 006774' 260 17 0 00 006512* GO IPACLR ; issue a port clear
5718 006775' 402 00 0 00 003123* SETZM SNEXT ; set up start location
5719 006776' 201 00 0 00 000010 MOVEI 10 ; get a 10
5720 006777' 202 00 0 00 003125* MOVEM SDATA ; set up start CSR data
5721 007000' 260 17 0 00 003126* GO IPASRT ; start up the port
5722 007001' 474 15 0 00 000000 SETO ERFLG, ; failed - error reading/writing CSR
5723 007002' 474 15 0 00 000000 SETO ERFLG, ; failed - port already running
5724 007003' 474 15 0 00 000000 SETO ERFLG, ; failed - error bits set in CSR
5725 007004' 027 00 0 00 007027' SCOPER MA25 ; print error message
5726 007005' 254 00 0 00 006771' JRST TA25 ; loop on error
5727 007006' 254 00 0 00 007026' JRST TX25 ; altmode exit
5728 007007' 326 15 0 00 007026' JUMPN ERFLG,TX25 ; error already - exit test
5729
5730 ; 2nd segment of test (Segment B) - Check if CRAM PE sets after 1/2 second
5731
5732 007010' 350 00 0 00 006773* AOS TSTSUB ; increment subtest number
5733 007011' 201 00 0 00 000764 MOVEI ^D500 ; wait 1/2 second
5734 007012' 260 17 0 00 006543* GO ODELAY ; do the wait
5735 007013' 260 17 0 00 003157* GO RDCSR ; read CSR
5736 007014' 474 15 0 00 000000 SETO ERFLG, ; failed - couldn't read CSR
5737 007015' 603 01 0 00 004000 TLNE 1,(CRAMPE) ; got a CRAM PE?
5738 007016' 474 15 0 00 000000 SETO ERFLG, ; yes - set error flag
5739 007017' 201 01 0 00 204000 MOVEI 1,EBUSPE!TSTEBF ; get bits to clear error condition
5740 007020' 260 17 0 00 006636* GO LDCSR ; and set up to read the EBUF
5741 007021' 260 17 0 00 003147* GO RDEBUF ; read EBUF data
5742 007022' 202 01 0 00 014013' MOVEM 1,SAVDAT# ; save data
5743 007023' 027 00 0 00 007041' SCOPER MB25 ; print error message
5744 007024' 254 00 0 00 006771' JRST TA25 ; loop on error
5745 007025' 254 00 0 00 007026' JRST TX25 ; altmode exit
5746
5747 007026' 263 17 0 00 000000 TX25: RTN ; exit test
5748
5749 ; Error messages
5750
5751 007027' 140000 013266' MA25: MSG!TXNOT![ASCIZ /Couldn't successfully start the port/]
5752 007030' 270000 007031' LAST!CALL!TXALL!MA25P1
5753
5754 007031' 260 17 0 00 007013* MA25P1: GO RDCSR ; get CSR contents
5755 007032' 255 00 0 00 000000 JFCL ; error
5756 007033' 202 01 0 00 014010' MOVEM 1,SAVCSR# ; save it
5757 007034' 200 01 0 00 014010' MOVE 1,SAVCSR ; get CSR data
5758 007035' 201 02 0 00 000023 MOVEI 2,^D19 ; character count so far
5759 007036' 201 03 0 00 000023 MOVEI 3,^D19 ; continuation line column number
5760 007037' 260 17 0 00 003165* GO CSRPNT ; go print in English
5761 007040' 263 17 0 00 000000 RTN ; return
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 94
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1738
5762
5763 007041' 140000 013443' MB25: MSG!TXNOT![ASCIZ /Down shifting of zero data resulted in non-zero data/]
5764 007042' 270000 007043' LAST!CALL!TXALL!MA25PN
5765
5766 007043' 037 00 0 00 013311' MA25PN: TMSGC <EBUF Data (Formatter contents): >
5767 007044' 200 00 0 00 014013' MOVE SAVDAT
5768 007045' 037 13 0 00 000000 PNTHW
5769 007046' 263 17 0 00 000000 RTN
5770
5771 ; Microcode:
5772
5773 007047' 000000 010104 T25M: MWORD <ADDR=0,JMAP,J=1,S0A,D=1,SELF,MGC=104> ; 0
5774 007050' 401000 003040
5775 007051' 000100 000200 MWORD <CONT,SD0,OR,D=2,SELM,MGC=200> ; 1
5776 007052' 732000 002340
5777 007053' 000200 000000 MWORD <CJP,J=0,S0A,OR,D=1,CENA,CCFZ> ; 2
5778 007054' 431400 020060
5779 007055' 000300 002004 MWORD <CONT,S0A,OR,D=1,OENA,SELE,MGC=4> ; 3
5780 007056' 431000 005340
5781 007057' 000400 040000 MWORD <JMAP,J=4,BAD> ; 4
5782 007060' 000000 000041
5783 007061' 777777 777777 -1
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 95
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1739
5784
5785 ;#********************************************************************
5786 ;* Test 26 - Fmtr Down Shift 4 Test
5787 ;
5788 ; Description: Verify that the formatter can shift various data
5789 ; patterns down 4 bits at a time.
5790 ;
5791 ; Procedure: KL> Port Clear
5792 ; KL> Set up data transfer for data patterns
5793 ;
5794 ; UC> Read a data pattern over the CBUS
5795 ; UC> Shift down 4 bits
5796 ; UC> Read formatter contents and write into
5797 ; EBUF
5798 ; KL> Read EBUF and verify the data
5799 ; KL> Start up the ucode to shift again
5800 ;
5801 ; Repeat the above shifting then verifying EBUF
5802 ; contents 10 times, until the data becomes
5803 ; all zero.
5804 ;
5805 ; Do for data patterns: 0's
5806 ; 1's
5807 ; 525252,,525252
5808 ; 000000,,007777
5809 ; 000000,,007070
5810 ; 000000,,000707
5811 ;
5812 ; Failure: ---
5813 ;#********************************************************************
5814
5815 ; Test data
5816
5817 007062' 254 00 0 00 007073' TSTC26: JRST TG26 ; go start test
5818 007063' 100604 000026 CBUS!NDMP!NDCB!ZCBUS!26 ; test mask
5819 007064' 007305' 013456' T26M,,[ASCIZ ^Fmtr Down Shift 4 Test^]
5820 007065' 013263' 012716' [EXP C20,C12,MLAST!C8],,[EXP C4,MLAST!C2]
5821 007066' 000000 007372' TSTC27 ; failure test table
5822 007067' 000000 007710' TSTC30 ; ...
5823 007070' 000000 010224' TSTC31
5824 007071' 000000 010542' TSTC32
5825 007072' 777777 777777 -1
5826
5827 ; Start test
5828
5829 007073' 201 00 0 00 000000' TG26: MOVEI Z9 ; get address of module start
5830 007074' 260 17 0 00 006765* GO TRACE ; handle trace output
5831 007075' 201 01 0 00 007305' MOVEI 1,T26M ; set up microcode address
5832 007076' 260 17 0 00 006767* GO TLOAD ; load/verify it
5833 007077' 263 17 0 00 000000 RTN ; failed - exit test
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 96
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1740
5834
5835 ; Initialization
5836
5837 007100' 400 15 0 00 000000 TL26: SETZ ERFLG, ; clear error flag
5838 007101' 260 17 0 00 006774* GO IPACLR ; clear port
5839 007102' 402 00 0 00 007010* SETZM TSTSUB ; initialize subtest number
5840 MOVSI [000000,,000000 ; get address of buffer
5841 777777,,777777 ; contents
5842 525252,,525252
5843 000000,,007777
5844 000000,,007070
5845 007103' 205 00 0 00 013330' 000000,,000707]
5846 007104' 541 00 0 00 006530* HRRI BUFF ; build the BLT pointer
5847 007105' 251 00 0 00 000000# BLT BUFF+5 ; insert data into buffer
5848
5849 ; First ensure the data transfer is reset
5850
5851 007106' 201 01 0 00 005000 MOVEI 1,5000 ; get start address
5852 007107' 242 01 0 00 000001 LSH 1,1 ; position correctly
5853 007110' 260 17 0 00 006632* GO LDRAR ; load the register
5854 007111' 201 01 0 00 000010 MOVEI 1,MPRUN ; get 'MPRUN' bit
5855 007112' 260 17 0 00 007020* GO LDCSR ; start up the port
5856 007113' 400 01 0 00 000000 SETZ 1, ; stop the port
5857 007114' 260 17 0 00 007112* GO LDCSR
5858
5859 ; Now generate CCW list
5860
5861 007115' 200 01 0 00 013210' MOVE 1,[CBUFSZ,,CBUF] ; get pointer to control buffer
5862 007116' 260 17 0 00 006527* GO CHINIT ; initialize software
5863 007117' 551 01 0 00 007104* HRRZI 1,BUFF ; buffer address
5864 007120' 201 02 0 00 000006 MOVEI 2,6 ; word count
5865 007121' 400 03 0 00 000000 SETZ 3, ; clear zero fill specifier
5866 007122' 260 17 0 00 006533* GO GENCCW ; generate a CCW list
5867 007123' 201 06 0 00 007146' MOVEI 6,TS26 ; get test execute table address
5868
5869 ; Start up the data transfer
5870
5871 007124' 201 01 0 00 001000 MOVEI 1,1000 ; get start address
5872 007125' 242 01 0 00 000001 LSH 1,1 ; position correctly
5873 007126' 260 17 0 00 007110* GO LDRAR ; load the register
5874 007127' 201 01 0 00 000010 MOVEI 1,MPRUN ; get MPRUN bit
5875 007130' 260 17 0 00 007114* GO LDCSR ; start up the port
5876 007131' 201 00 0 00 000001 MOVEI 1 ; set up delay of 1 ms
5877 007132' 260 17 0 00 007012* GO ODELAY ; wait a bit
5878 007133' 400 01 0 00 000000 SETZ 1, ; clear data
5879 007134' 260 17 0 00 007130* GO LDCSR ; stop the port
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 97
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1741
5880
5881 ; Loop on test execute table entries
5882
5883 007135' 260 17 0 00 006546* TA26: GO TEXEC ; execute table entry
5884 007136' 254 00 0 00 007145' JRST TX26 ; end of table
5885 007137' 254 00 0 00 007135' JRST TA26 ; keep looping after call
5886 007140' 474 15 0 00 000000 SETO ERFLG, ; error - EBUF data incorrect
5887
5888 ; Handle error printouts and scope looping
5889
5890 007141' 027 00 0 00 007272' SCOPER MA26 ; print error message
5891 007142' 254 00 0 00 007100' JRST TL26 ; loop on error
5892 007143' 254 00 0 00 007145' JRST TX26 ; altmode exit
5893 007144' 322 15 0 00 007135' JUMPE ERFLG,TA26 ; do next sstep table entry
5894
5895 ; End of test
5896
5897 007145' 263 17 0 00 000000 TX26: RTN ; return
5898
5899 ; Test Execute Table, as: (CMD,parameters)
5900
5901 007146' 140000 007222' TS26: TTABLE (TCALL,TS26IN) ; initialize stuff
5902 007147' 200000 007225' TS26L: TTABLE (TCALLC,TS26NE) ; set up next data pattern
5903
5904 ; Shifted 4 bits
5905
5906 007150' 140000 007255' TS26A: TTABLE (TCALL,TS26NN) ; increment shift count
5907 007151' 400000 000100 TTABLE (TSSTAR,100) ; start up port
5908 007152' 240001 007260' TTABLE (TCHECK,1,TS26RS) ; check if completed
5909 007153' 340000 000000 TTABLE (TEXIT) ; exit if error yet
5910
5911 ; Shifted 8 bits
5912
5913 007154' 140000 007255' TTABLE (TCALL,TS26NN) ; increment shift count
5914 007155' 400000 000100 TTABLE (TSSTAR,100) ; start up port
5915 007156' 240001 007261' TTABLE (TCHECK,1,TS26RS+1) ; check if completed
5916 007157' 340000 000000 TTABLE (TEXIT) ; exit if error yet
5917
5918 ; Shifted 12 bits
5919
5920 007160' 140000 007255' TTABLE (TCALL,TS26NN) ; increment shift count
5921 007161' 400000 000100 TTABLE (TSSTAR,100) ; start up port
5922 007162' 240001 007262' TTABLE (TCHECK,1,TS26RS+2) ; check if completed
5923 007163' 340000 000000 TTABLE (TEXIT) ; exit if error yet
5924
5925 ; Shifted 16 bits
5926
5927 007164' 140000 007255' TTABLE (TCALL,TS26NN) ; increment shift count
5928 007165' 400000 000100 TTABLE (TSSTAR,100) ; start up port
5929 007166' 240001 007263' TTABLE (TCHECK,1,TS26RS+3) ; check if completed
5930 007167' 340000 000000 TTABLE (TEXIT) ; exit if error yet
5931
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 98
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1742
5932
5933 ; Shifted 20 bits
5934
5935 007170' 140000 007255' TTABLE (TCALL,TS26NN) ; increment shift count
5936 007171' 400000 000100 TTABLE (TSSTAR,100) ; start up port
5937 007172' 240001 007264' TTABLE (TCHECK,1,TS26RS+4) ; check if completed
5938 007173' 340000 000000 TTABLE (TEXIT) ; exit if error yet
5939
5940 ; Shifted 24 bits
5941
5942 007174' 140000 007255' TTABLE (TCALL,TS26NN) ; increment shift count
5943 007175' 400000 000100 TTABLE (TSSTAR,100) ; start up port
5944 007176' 240001 007265' TTABLE (TCHECK,1,TS26RS+5) ; check if completed
5945 007177' 340000 000000 TTABLE (TEXIT) ; exit if error yet
5946
5947 ; Shifted 28 bits
5948
5949 007200' 140000 007255' TTABLE (TCALL,TS26NN) ; increment shift count
5950 007201' 400000 000100 TTABLE (TSSTAR,100) ; start up port
5951 007202' 240001 007266' TTABLE (TCHECK,1,TS26RS+6) ; check if completed
5952 007203' 340000 000000 TTABLE (TEXIT) ; exit if error yet
5953
5954 ; Shifted 32 bits
5955
5956 007204' 140000 007255' TTABLE (TCALL,TS26NN) ; increment shift count
5957 007205' 400000 000100 TTABLE (TSSTAR,100) ; start up port
5958 007206' 240001 007267' TTABLE (TCHECK,1,TS26RS+7) ; check if completed
5959 007207' 340000 000000 TTABLE (TEXIT) ; exit if error yet
5960
5961 ; Shifted 36 bits
5962
5963 007210' 140000 007255' TTABLE (TCALL,TS26NN) ; increment shift count
5964 007211' 400000 000100 TTABLE (TSSTAR,100) ; start up port
5965 007212' 240001 007270' TTABLE (TCHECK,1,TS26RS+10) ; check if completed
5966 007213' 340000 000000 TTABLE (TEXIT) ; exit if error yet
5967
5968 ; Shifted 40 bits
5969
5970 007214' 140000 007255' TTABLE (TCALL,TS26NN) ; increment shift count
5971 007215' 400000 000100 TTABLE (TSSTAR,100) ; start up port
5972 007216' 240001 007271' TTABLE (TCHECK,1,TS26RS+11) ; check if completed
5973 007217' 340000 000000 TTABLE (TEXIT) ; exit if error yet
5974 007220' 300000 007147' TTABLE (TJRST,TS26L) ; loop till done
5975 007221' 000000 000000 TTABLE (TLAST)
5976
5977 ; Initialize stuff
5978
5979 007222' 201 00 0 00 000000# TS26IN: MOVEI BUFF-1 ; initialize buffer pointer
5980 007223' 202 00 0 00 014027' MOVEM T26BUF# ; ...
5981 007224' 263 17 0 00 000000 RTN ; return
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 99
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1743
5982
5983 ; Set up next data pattern
5984
5985 007225' 350 01 0 00 014027' TS26NE: AOS 1,T26BUF ; point to next data pattern
5986 007226' 307 01 0 00 000000# CAIG 1,BUFF+5 ; done yet?
5987 007227' 350 00 0 17 000000 AOS (P) ; no - set up proper return
5988 007230' 200 00 0 01 000000 MOVE (1) ; get data pattern
5989 007231' 400 01 0 00 000000 SETZ 1, ; clear word to shift into
5990 007232' 201 02 0 00 007260' MOVEI 2,TS26RS ; get initial address of EBUF data
5991 007233' 246 00 0 00 777774 TS26N0: LSHC -4 ; shift 4 bits into AC1
5992 007234' 135 03 0 00 013463' LDB 3,[POINT 4,1,15] ; get 4 bits
5993 007235' 137 03 0 00 013464' DPB 3,[POINT 4,0,3] ; save them
5994 007236' 202 00 0 02 000000 MOVEM (2) ; save it
5995 007237' 350 00 0 00 000002 AOS 2 ; point to next address
5996 007240' 307 02 0 00 007271' CAIG 2,TS26RS+11 ; done yet?
5997 007241' 254 00 0 00 007233' JRST TS26N0 ; no - loop till done
5998 007242' 402 00 0 00 014052' SETZM TS26NM# ; initialize number of shifts
5999
6000 ; Read the next word
6001
6002 007243' 400 01 0 00 000000 SETZ 1, ; clear data
6003 007244' 260 17 0 00 007134* GO LDCSR ; stop the port
6004 007245' 201 01 0 00 000200 MOVEI 1,200 ; get start address
6005 007246' 242 01 0 00 000001 LSH 1,1 ; position correctly
6006 007247' 260 17 0 00 007126* GO LDRAR ; load the register
6007 007250' 201 01 0 00 000010 MOVEI 1,MPRUN ; get MPRUN bit
6008 007251' 260 17 0 00 007244* GO LDCSR ; start up the port
6009 007252' 400 01 0 00 000000 SETZ 1, ; clear data
6010 007253' 260 17 0 00 007251* GO LDCSR ; stop the port
6011 007254' 263 17 0 00 000000 RTN ; return
6012
6013 ; Increment shift count
6014
6015 007255' 201 00 0 00 000004 TS26NN: MOVEI 4 ; get a 4
6016 007256' 272 00 0 00 014052' ADDM TS26NM ; add it
6017 007257' 263 17 0 00 000000 RTN ; return
6018
6019 007260' TS26RS: BLOCK 12 ; correct EBUF data
6020
6021 ; Error messages
6022
6023 007272' 240000 007274' MA26: CALL!TXNOT!MA26PN ; print data pattern ...
6024 007273' 000000000000# LAST!CALL!TXALL!TTPNT ; print test data
6025
6026 007274' 037 00 0 00 013336' MA26PN: TMSGC <Data > ; get data and
6027 007275' 200 01 0 00 014027' MOVE 1,T26BUF ; print it
6028 007276' 200 00 0 01 000000 MOVE (1)
6029 007277' 037 13 0 00 000000 PNTHW
6030 007300' 037 00 0 00 013465' TMSG < shifted down >
6031 007301' 200 00 0 00 014052' MOVE TS26NM ; get shift count
6032 007302' 037 15 0 00 000000 PNTDEC
6033 007303' 037 00 0 00 013343' TMSG <. bits, result in EBUF>
6034 007304' 263 17 0 00 000000 RTN
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 100
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1744
6035
6036 ; Microcode - Shift 4 bits
6037
6038 007305' 010001 010000 T26M: MWORD <ADDR=100,JMAP,J=101,D=1> ; 100
6039 007306' 001000 000040
6040 007307' 010100 000104 MWORD <CONT,D=1,SELF,MGC=104> ; 101
6041 007310' 001000 003340
6042 007311' 010200 000200 MWORD <CONT,SD0,OR,B=4,D=2,SELM,MGC=200> ; 102
6043 007312' 732002 002340
6044 007313' 010351 000000 MWORD <JMAP,J=5100,D=1> ; 103
6045 007314' 001000 000040
6046
6047 ; Routine to read a word from CBUS into the formatter.
6048
6049 007315' 020002 010000 MWORD <ADDR=200,JMAP,J=201> ; 200
6050 007316' 000000 000040
6051 007317' 020102 030000 MWORD <CJP,J=203,D=1,CENA,CCCA> ; 201
6052 007320' 001400 000060
6053 007321' 020202 010000 MWORD <JMAP,J=201,D=1> ; 202
6054 007322' 001000 000040
6055 007323' 020300 000200 MWORD <CONT,D=1,SELF,MGC=200> ; 203
6056 007324' 001000 003340
6057 007325' 020400 000204 MWORD <CONT,D=1,SELF,MGC=204> ; 204
6058 007326' 001000 003340
6059 007327' 020500 000004 MWORD <CONT,D=1,SELC,MGC=4> ; 205
6060 007330' 001000 004340
6061 007331' 020600 000200 MWORD <CONT,SD0,OR,B=3,D=2,SELM,MGC=200> ; 206
6062 007332' 732001 402340
6063 007333' 020700 000000 MWORD <JZ> ; 207
6064 007334' 000000 000000
6065
6066 ; Initialization
6067
6068 007335' 100010 010020 MWORD <ADDR=1000,JMAP,J=1001,SELM,MGC=20> ; 1000
6069 007336' 000000 002040
6070 007337' 100100 000200 MWORD <JZ,D=1,SELC,MGC=200> ; 1001
6071 007340' 001000 004000
6072 007341' 000000 000000 MWORD <ADDR=0,JZ> ; 0
6073 007342' 000000 000000
6074
6075 ; Initialization step
6076
6077 007343' 500050 010100 MWORD <ADDR=5000,JMAP,J=5001,SELC,MGC=100> ; 5000
6078 007344' 000000 004040
6079 007345' 500100 000020 MWORD <JZ,SELM,MGC=20> ; 5001
6080 007346' 000000 002000
6081
6082 ; Subroutine - Passed - Write 1 to bit 12 of CSR register
6083
6084 007347' 510000 000000 MWORD <ADDR=5100,CONT,SD0,AND,B=2,D=2> ; 5100
6085 007350' 742001 000340
6086 007351' 510100 000000 MWORD <CONT,S0B,PLUS,B=2,D=2,CRY> ; 5101
6087 007352' 302001 000740
6088 007353' 510200 260000 MWORD <LDCT,J=26> ; 5102
6089 007354' 000000 000300
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 100-1
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1745
6090 007355' 510351 030000 MWORD <RPCT,J=5103,SAB,PLUS,A=2,B=2,D=2> ; 5103
6091 007356' 102021 000220
6092 007357' 510400 002004 MWORD <CONT,S0A,A=2,OR,D=1,OENA,SELE,MGC=4> ; 5104
6093 007360' 431020 005340
6094 007361' 510551 070040 MWORD <CJP,J=5107,CENA,CCGC,D=1,SELE,MGC=40> ; 5105
6095 007362' 001400 015060
6096 007363' 510651 050000 MWORD <JMAP,J=5105,D=1> ; 5106
6097 007364' 001000 000040
6098 007365' 510700 000200 MWORD <CONT,S0A,A=1,OR,D=1,SELE,MGC=200> ; 5107
6099 007366' 431010 005340
6100 007367' 511051 102004 MWORD <JMAP,J=5110,S0A,OR,A=4,D=1,OENA,SELE,MGC=4> ; 5110
6101 007370' 431040 005040
6102 007371' 777777 777777 -1
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 101
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1746
6103
6104 ;#********************************************************************
6105 ;* Test 27 - Fmtr Down Shift 4 (from PLIN) Test - SELRHTNIB=0
6106 ;
6107 ; Description: Verify that the formatter can shift various data
6108 ; patterns 4 bits at a time while inserting bytes
6109 ; from the PLIN into the formatter. The data loaded
6110 ; into the PLIN initially is 017.
6111 ;
6112 ; Procedure: KL> Port Clear
6113 ; KL> Set up data transfer for data patterns
6114 ;
6115 ; UC> Read a data pattern over the CBUS
6116 ; UC> Load PLIN with 017
6117 ;
6118 ; UC> Shift down 4 bits
6119 ; UC> Read formatter contents and write into EBUF
6120 ; KL> Read EBUF and verify the data
6121 ; KL> Start up the ucode to shift again
6122 ;
6123 ; Repeat the above shifting then verifying EBUF
6124 ; contents 10 times, until the data becomes
6125 ; all zero.
6126 ;
6127 ; Do for data patterns: 0's
6128 ; 1's
6129 ; 525252,,525252
6130 ; 000000,,007777
6131 ; 000000,,007070
6132 ; 000000,,000707
6133 ;
6134 ; Failure: ---
6135 ;#********************************************************************
6136
6137 ; Test data
6138
6139 007372' 254 00 0 00 007404' TSTC27: JRST TG27 ; go start test
6140 007373' 100604 000027 CBUS!NDMP!NDCB!ZCBUS!27 ; test mask
6141 007374' 007613' 013470' T27M,,[ASCIZ ^Fmtr Down Shift 4 (from PLIN) Test - SELRHTNIB=0^]
6142 007375' 013263' 012716' [EXP C20,C12,MLAST!C8],,[EXP C4,MLAST!C2]
6143 007376' 000000 007710' TSTC30 ; failure test table
6144 007377' 000000 010224' TSTC31 ; ...
6145 007400' 000000 010542' TSTC32
6146 007401' 000000 011060' TSTC33
6147 007402' 000000 011344' TSTC34
6148 007403' 777777 777777 -1
6149
6150 ; Start test
6151
6152 007404' 201 00 0 00 000000' TG27: MOVEI Z9 ; get address of module start
6153 007405' 260 17 0 00 007074* GO TRACE ; handle trace output
6154 007406' 201 01 0 00 007613' MOVEI 1,T27M ; set up microcode address
6155 007407' 260 17 0 00 007076* GO TLOAD ; load/verify it
6156 007410' 263 17 0 00 000000 RTN ; failed - exit test
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 102
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1747
6157
6158 ; Initialization
6159
6160 007411' 400 15 0 00 000000 TL27: SETZ ERFLG, ; clear error flag
6161 007412' 260 17 0 00 007101* GO IPACLR ; clear port
6162 007413' 402 00 0 00 007102* SETZM TSTSUB ; initialize subtest number
6163 MOVSI [000000,,000000 ; get address of buffer
6164 777777,,777777 ; contents
6165 525252,,525252
6166 000000,,007777
6167 000000,,007070
6168 007414' 205 00 0 00 013330' 000000,,000707]
6169 007415' 541 00 0 00 007117* HRRI BUFF ; build the BLT pointer
6170 007416' 251 00 0 00 000000# BLT BUFF+5 ; insert data into buffer
6171
6172 ; First ensure the data transfer is reset
6173
6174 007417' 201 01 0 00 005000 MOVEI 1,5000 ; get start address
6175 007420' 242 01 0 00 000001 LSH 1,1 ; position correctly
6176 007421' 260 17 0 00 007247* GO LDRAR ; load the register
6177 007422' 201 01 0 00 000010 MOVEI 1,MPRUN ; get MPRUN bit
6178 007423' 260 17 0 00 007253* GO LDCSR ; start up the port
6179 007424' 400 01 0 00 000000 SETZ 1, ; clear data
6180 007425' 260 17 0 00 007423* GO LDCSR ; stop the port
6181
6182 ; Now generate CCW list
6183
6184 007426' 200 01 0 00 013210' MOVE 1,[CBUFSZ,,CBUF] ; get pointer to control buffer
6185 007427' 260 17 0 00 007116* GO CHINIT ; initialize software
6186 007430' 551 01 0 00 007415* HRRZI 1,BUFF ; buffer address
6187 007431' 201 02 0 00 000006 MOVEI 2,6 ; word count
6188 007432' 400 03 0 00 000000 SETZ 3, ; clear zero fill specifier
6189 007433' 260 17 0 00 007122* GO GENCCW ; generate a CCW list
6190 007434' 201 06 0 00 007457' MOVEI 6,TS27 ; get test execute table address
6191
6192 ; Start up the data transfer
6193
6194 007435' 201 01 0 00 001000 MOVEI 1,1000 ; get start address
6195 007436' 242 01 0 00 000001 LSH 1,1 ; position correctly
6196 007437' 260 17 0 00 007421* GO LDRAR ; load the register
6197 007440' 201 01 0 00 000010 MOVEI 1,MPRUN ; get MPRUN bit
6198 007441' 260 17 0 00 007425* GO LDCSR ; start up the port
6199 007442' 201 00 0 00 000001 MOVEI 1 ; set up delay of 1 ms
6200 007443' 260 17 0 00 007132* GO ODELAY ; wait a bit
6201 007444' 400 01 0 00 000000 SETZ 1, ; clear data
6202 007445' 260 17 0 00 007441* GO LDCSR ; stop the port
6203
6204 ; Loop on test execute table entries
6205
6206 007446' 260 17 0 00 007135* TA27: GO TEXEC ; execute table entry
6207 007447' 254 00 0 00 007456' JRST TX27 ; end of table
6208 007450' 254 00 0 00 007446' JRST TA27 ; keep looping after call
6209 007451' 474 15 0 00 000000 SETO ERFLG, ; error - EBUF data incorrect
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 103
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1748
6210
6211 ; Handle error printouts and scope looping
6212
6213 007452' 027 00 0 00 007600' SCOPER MA27 ; print error message
6214 007453' 254 00 0 00 007411' JRST TL27 ; loop on error
6215 007454' 254 00 0 00 007456' JRST TX27 ; altmode exit
6216 007455' 322 15 0 00 007446' JUMPE ERFLG,TA27 ; do next sstep table entry
6217
6218 ; End of test
6219
6220 007456' 263 17 0 00 000000 TX27: RTN ; return
6221
6222 ; Test Execute Table, as: (CMD,parameters)
6223
6224 007457' 140000 007533' TS27: TTABLE (TCALL,TS27IN) ; initialize stuff
6225 007460' 200000 007536' TS27L: TTABLE (TCALLC,TS27NE) ; set up next data pattern
6226
6227 ; Shifted 4 bits
6228
6229 007461' 140000 007563' TS27A: TTABLE (TCALL,TS27NN) ; increment shift count
6230 007462' 400000 000100 TTABLE (TSSTAR,100) ; start up port
6231 007463' 240001 007566' TTABLE (TCHECK,1,TS27RS) ; check if completed
6232 007464' 340000 000000 TTABLE (TEXIT) ; exit if error yet
6233
6234 ; Shifted 8 bits
6235
6236 007465' 140000 007563' TTABLE (TCALL,TS27NN) ; increment shift count
6237 007466' 400000 000100 TTABLE (TSSTAR,100) ; start up port
6238 007467' 240001 007567' TTABLE (TCHECK,1,TS27RS+1) ; check if completed
6239 007470' 340000 000000 TTABLE (TEXIT) ; exit if error yet
6240
6241 ; Shifted 12 bits
6242
6243 007471' 140000 007563' TTABLE (TCALL,TS27NN) ; increment shift count
6244 007472' 400000 000100 TTABLE (TSSTAR,100) ; start up port
6245 007473' 240001 007570' TTABLE (TCHECK,1,TS27RS+2) ; check if completed
6246 007474' 340000 000000 TTABLE (TEXIT) ; exit if error yet
6247
6248 ; Shifted 16 bits
6249
6250 007475' 140000 007563' TTABLE (TCALL,TS27NN) ; increment shift count
6251 007476' 400000 000100 TTABLE (TSSTAR,100) ; start up port
6252 007477' 240001 007571' TTABLE (TCHECK,1,TS27RS+3) ; check if completed
6253 007500' 340000 000000 TTABLE (TEXIT) ; exit if error yet
6254
6255 ; Shifted 20 bits
6256
6257 007501' 140000 007563' TTABLE (TCALL,TS27NN) ; increment shift count
6258 007502' 400000 000100 TTABLE (TSSTAR,100) ; start up port
6259 007503' 240001 007572' TTABLE (TCHECK,1,TS27RS+4) ; check if completed
6260 007504' 340000 000000 TTABLE (TEXIT) ; exit if error yet
6261
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 104
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1749
6262
6263 ; Shifted 24 bits
6264
6265 007505' 140000 007563' TTABLE (TCALL,TS27NN) ; increment shift count
6266 007506' 400000 000100 TTABLE (TSSTAR,100) ; start up port
6267 007507' 240001 007573' TTABLE (TCHECK,1,TS27RS+5) ; check if completed
6268 007510' 340000 000000 TTABLE (TEXIT) ; exit if error yet
6269
6270 ; Shifted 28 bits
6271
6272 007511' 140000 007563' TTABLE (TCALL,TS27NN) ; increment shift count
6273 007512' 400000 000100 TTABLE (TSSTAR,100) ; start up port
6274 007513' 240001 007574' TTABLE (TCHECK,1,TS27RS+6) ; check if completed
6275 007514' 340000 000000 TTABLE (TEXIT) ; exit if error yet
6276
6277 ; Shifted 32 bits
6278
6279 007515' 140000 007563' TTABLE (TCALL,TS27NN) ; increment shift count
6280 007516' 400000 000100 TTABLE (TSSTAR,100) ; start up port
6281 007517' 240001 007575' TTABLE (TCHECK,1,TS27RS+7) ; check if completed
6282 007520' 340000 000000 TTABLE (TEXIT) ; exit if error yet
6283
6284 ; Shifted 36 bits
6285
6286 007521' 140000 007563' TTABLE (TCALL,TS27NN) ; increment shift count
6287 007522' 400000 000100 TTABLE (TSSTAR,100) ; start up port
6288 007523' 240001 007576' TTABLE (TCHECK,1,TS27RS+10) ; check if completed
6289 007524' 340000 000000 TTABLE (TEXIT) ; exit if error yet
6290
6291 ; Shifted 40 bits
6292
6293 007525' 140000 007563' TTABLE (TCALL,TS27NN) ; increment shift count
6294 007526' 400000 000100 TTABLE (TSSTAR,100) ; start up port
6295 007527' 240001 007577' TTABLE (TCHECK,1,TS27RS+11) ; check if completed
6296 007530' 340000 000000 TTABLE (TEXIT) ; exit if error yet
6297 007531' 300000 007460' TTABLE (TJRST,TS27L) ; loop till done
6298 007532' 000000 000000 TTABLE (TLAST)
6299
6300 ; Initialize stuff
6301
6302 007533' 201 00 0 00 000000# TS27IN: MOVEI BUFF-1 ; initialize buffer pointer
6303 007534' 202 00 0 00 014030' MOVEM T27BUF# ; ...
6304 007535' 263 17 0 00 000000 RTN ; return
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 105
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1750
6305
6306 ; Set up next data pattern
6307
6308 007536' 350 01 0 00 014030' TS27NE: AOS 1,T27BUF ; point to next data pattern
6309 007537' 307 01 0 00 000000# CAIG 1,BUFF+5 ; done yet?
6310 007540' 350 00 0 17 000000 AOS (P) ; no - set up proper return
6311 007541' 200 00 0 01 000000 MOVE (1) ; get data pattern
6312 007542' 201 02 0 00 007566' MOVEI 2,TS27RS ; get initial address of EBUF data
6313 007543' 242 00 0 00 777774 TS27N0: LSH -4 ; shift 4 bits
6314 007544' 303 02 0 00 007567' CAILE 2,TS27RS+1 ; if past the first 2 shifts, insert
6315 007545' 661 00 0 00 740000 TLO 740000 ; the PLIN data into left 4 bits
6316 007546' 202 00 0 02 000000 MOVEM (2) ; save it
6317 007547' 350 00 0 00 000002 AOS 2 ; point to next address
6318 007550' 307 02 0 00 007577' CAIG 2,TS27RS+11 ; done yet?
6319 007551' 254 00 0 00 007543' JRST TS27N0 ; no - loop till done
6320 007552' 402 00 0 00 014053' SETZM TS27NM# ; initialize number of shifts
6321
6322 ; Read the next word
6323
6324 007553' 201 01 0 00 000200 MOVEI 1,200 ; get start address
6325 007554' 242 01 0 00 000001 LSH 1,1 ; position correctly
6326 007555' 260 17 0 00 007437* GO LDRAR ; load the register
6327 007556' 201 01 0 00 000010 MOVEI 1,MPRUN ; get MPRUN bit
6328 007557' 260 17 0 00 007445* GO LDCSR ; start up the port
6329 007560' 400 01 0 00 000000 SETZ 1, ; clear data
6330 007561' 260 17 0 00 007557* GO LDCSR ; stop the port
6331 007562' 263 17 0 00 000000 RTN ; return
6332
6333 ; Increment shift count
6334
6335 007563' 201 00 0 00 000004 TS27NN: MOVEI 4 ; get a 4
6336 007564' 272 00 0 00 014053' ADDM TS27NM ; add it
6337 007565' 263 17 0 00 000000 RTN ; return
6338
6339 007566' TS27RS: BLOCK 12 ; correct EBUF data
6340
6341 ; Error messages
6342
6343 007600' 240000 007602' MA27: CALL!TXNOT!MA27PN ; print data pattern ...
6344 007601' 000000000000# LAST!CALL!TXALL!TTPNT ; print test data
6345
6346 007602' 037 00 0 00 013336' MA27PN: TMSGC <Data > ; get data and
6347 007603' 200 01 0 00 014030' MOVE 1,T27BUF ; print it
6348 007604' 200 00 0 01 000000 MOVE (1)
6349 007605' 037 13 0 00 000000 PNTHW
6350 007606' 037 00 0 00 013502' TMSG < shifted down from PLIN >
6351 007607' 200 00 0 00 014053' MOVE TS27NM ; get shift count
6352 007610' 037 15 0 00 000000 PNTDEC
6353 007611' 037 00 0 00 013343' TMSG <. bits, result in EBUF>
6354 007612' 263 17 0 00 000000 RTN
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 106
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1751
6355
6356 ; Microcode - Shift 4 bits
6357
6358 007613' 010001 010000 T27M: MWORD <ADDR=100,JMAP,J=101,D=1> ; 100
6359 007614' 001000 000040
6360 007615' 010100 000124 MWORD <CONT,D=1,SELF,MGC=124> ; 101
6361 007616' 001000 003340
6362 007617' 010200 000200 MWORD <CONT,SD0,OR,B=4,D=2,SELM,MGC=200> ; 102
6363 007620' 732002 002340
6364 007621' 010351 000000 MWORD <JMAP,J=5100,D=1> ; 103
6365 007622' 001000 000040
6366
6367 ; Routine to read a word from CBUS into the formatter.
6368
6369 007623' 020002 010000 MWORD <ADDR=200,JMAP,J=201> ; 200
6370 007624' 000000 000040
6371 007625' 020102 030000 MWORD <CJP,J=203,D=1,CENA,CCCA> ; 201
6372 007626' 001400 000060
6373 007627' 020202 010000 MWORD <JMAP,J=201,D=1> ; 202
6374 007630' 001000 000040
6375 007631' 020300 000200 MWORD <CONT,D=1,SELF,MGC=200> ; 203
6376 007632' 001000 003340
6377 007633' 020400 000204 MWORD <CONT,D=1,SELF,MGC=204> ; 204
6378 007634' 001000 003340
6379 007635' 020500 000004 MWORD <CONT,D=1,SELC,MGC=4> ; 205
6380 007636' 001000 004340
6381 007637' 020600 000200 MWORD <CONT,SD0,OR,B=3,D=2,SELM,MGC=200> ; 206
6382 007640' 732001 402340
6383 007641' 020700 000000 MWORD <JZ> ; 207
6384 007642' 000000 000000
6385
6386 ; Initialization
6387
6388 007643' 100010 010020 MWORD <ADDR=1000,JMAP,J=1001,SELM,MGC=20> ; 1000
6389 007644' 000000 002040
6390 007645' 100100 000200 MWORD <CONT,D=1,SELC,MGC=200> ; 1001
6391 007646' 001000 004340
6392 007647' 100200 310017 MWORD <LDCT,J=31,SD0,OR,D=2,SKCN,MGC=017> ; 1002
6393 007650' 732000 240300
6394 007651' 100310 030000 MWORD <RPCT,J=1003,S0A,OR,D=5> ; 1003
6395 007652' 435000 000220
6396 007653' 100400 002040 MWORD <CONT,S0A,OR,D=1,OENA,SELM,MGC=40> ; 1004
6397 007654' 431000 002340
6398 007655' 100500 000006 MWORD <JZ,SD0,D=1,SELP,MGC=6> ; 1005
6399 007656' 701000 001000
6400 007657' 000000 000000 MWORD <ADDR=0,JZ> ; 0
6401 007660' 000000 000000
6402
6403 ; Initialization step
6404
6405 007661' 500050 010100 MWORD <ADDR=5000,JMAP,J=5001,SELC,MGC=100> ; 5000
6406 007662' 000000 004040
6407 007663' 500100 000020 MWORD <JZ,SELM,MGC=20> ; 5001
6408 007664' 000000 002000
6409
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 106-1
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1752
6410 ; Subroutine - Passed - Write 1 to bit 12 of CSR register
6411
6412 007665' 510000 000000 MWORD <ADDR=5100,CONT,SD0,AND,B=2,D=2> ; 5100
6413 007666' 742001 000340
6414 007667' 510100 000000 MWORD <CONT,S0B,PLUS,B=2,D=2,CRY> ; 5101
6415 007670' 302001 000740
6416 007671' 510200 260000 MWORD <LDCT,J=26> ; 5102
6417 007672' 000000 000300
6418 007673' 510351 030000 MWORD <RPCT,J=5103,SAB,PLUS,A=2,B=2,D=2> ; 5103
6419 007674' 102021 000220
6420 007675' 510400 002004 MWORD <CONT,S0A,A=2,OR,D=1,OENA,SELE,MGC=4> ; 5104
6421 007676' 431020 005340
6422 007677' 510551 070040 MWORD <CJP,J=5107,CENA,CCGC,D=1,SELE,MGC=40> ; 5105
6423 007700' 001400 015060
6424 007701' 510651 050000 MWORD <JMAP,J=5105,D=1> ; 5106
6425 007702' 001000 000040
6426 007703' 510700 000200 MWORD <CONT,S0A,A=1,OR,D=1,SELE,MGC=200> ; 5107
6427 007704' 431010 005340
6428 007705' 511051 102004 MWORD <JMAP,J=5110,D=1,S0A,A=4,OR,OENA,SELE,MGC=4> ; 5110
6429 007706' 431040 005040
6430 007707' 777777 777777 -1
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 107
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1753
6431
6432 ;#********************************************************************
6433 ;* Test 30 - Fmtr Down Shift 4 (from PLIN) Test - SELRHTNIB=0
6434 ;
6435 ; Description: Verify that the formatter can shift various data
6436 ; patterns down 4 bits at a time while inserting
6437 ; bits from the PLIN into the formatter. The data
6438 ; loaded into the PLIN initially is 360.
6439 ;
6440 ; Procedure: KL> Port Clear
6441 ; KL> Set up data transfer for data patterns
6442 ;
6443 ; UC> Read a data pattern over the CBUS
6444 ; UC> Load PLIN with 360
6445 ;
6446 ; UC> Shift down 4 bits
6447 ; UC> Read formatter contents and write into EBUF
6448 ; KL> Read EBUF and verify the data
6449 ; KL> Start up the ucode to shift again
6450 ;
6451 ; Repeat the above shifting then verifying EBUF
6452 ; contents 10 times, until the data becomes
6453 ; all zero.
6454 ;
6455 ; Do for data patterns: 0's
6456 ; 1's
6457 ; 525252,,525252
6458 ; 000000,,007777
6459 ; 000000,,007070
6460 ; 000000,,000707
6461 ;
6462 ; Failure: ---
6463 ;#********************************************************************
6464
6465 ; Test data
6466
6467 007710' 254 00 0 00 007720' TSTC30: JRST TG30 ; go start test
6468 007711' 100604 000030 CBUS!NDMP!NDCB!ZCBUS!30 ; test mask
6469 007712' 010127' 013470' T30M,,[ASCIZ ^Fmtr Down Shift 4 (from PLIN) Test - SELRHTNIB=0^]
6470 007713' 013263' 012716' [EXP C20,C12,MLAST!C8],,[EXP C4,MLAST!C2]
6471 007714' 000000 010224' TSTC31 ; failure test table
6472 007715' 000000 010542' TSTC32 ; ...
6473 007716' 000000 011060' TSTC33
6474 007717' 777777 777777 -1
6475
6476 ; Start test
6477
6478 007720' 201 00 0 00 000000' TG30: MOVEI Z9 ; get address of module start
6479 007721' 260 17 0 00 007405* GO TRACE ; handle trace output
6480 007722' 201 01 0 00 010127' MOVEI 1,T30M ; set up microcode address
6481 007723' 260 17 0 00 007407* GO TLOAD ; load/verify it
6482 007724' 263 17 0 00 000000 RTN ; failed - exit test
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 108
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1754
6483
6484 ; Initialization
6485
6486 007725' 400 15 0 00 000000 TL30: SETZ ERFLG, ; clear error flag
6487 007726' 260 17 0 00 007412* GO IPACLR ; clear port
6488 007727' 402 00 0 00 007413* SETZM TSTSUB ; initialize subtest number
6489 MOVSI [000000,,000000 ; get address of buffer
6490 777777,,777777 ; contents
6491 525252,,525252
6492 000000,,007777
6493 000000,,007070
6494 007730' 205 00 0 00 013330' 000000,,000707]
6495 007731' 541 00 0 00 007430* HRRI BUFF ; build the BLT pointer
6496 007732' 251 00 0 00 000000# BLT BUFF+5 ; insert data into buffer
6497
6498 ; First ensure the data transfer is reset
6499
6500 007733' 201 01 0 00 005000 MOVEI 1,5000 ; get start address
6501 007734' 242 01 0 00 000001 LSH 1,1 ; position correctly
6502 007735' 260 17 0 00 007555* GO LDRAR ; load the register
6503 007736' 201 01 0 00 000010 MOVEI 1,MPRUN ; get MPRUN bit
6504 007737' 260 17 0 00 007561* GO LDCSR ; start up the port
6505 007740' 400 01 0 00 000000 SETZ 1, ; clear data
6506 007741' 260 17 0 00 007737* GO LDCSR ; stop the port
6507
6508 ; Now generate CCW list
6509
6510 007742' 200 01 0 00 013210' MOVE 1,[CBUFSZ,,CBUF] ; get pointer to control buffer
6511 007743' 260 17 0 00 007427* GO CHINIT ; initialize software
6512 007744' 551 01 0 00 007731* HRRZI 1,BUFF ; buffer address
6513 007745' 201 02 0 00 000006 MOVEI 2,6 ; word count
6514 007746' 400 03 0 00 000000 SETZ 3, ; clear zero fill specifier
6515 007747' 260 17 0 00 007433* GO GENCCW ; generate a CCW list
6516 007750' 201 06 0 00 007773' MOVEI 6,TS30 ; get test execute table address
6517
6518 ; Start up the data transfer
6519
6520 007751' 201 01 0 00 001000 MOVEI 1,1000 ; get start address
6521 007752' 242 01 0 00 000001 LSH 1,1 ; position correctly
6522 007753' 260 17 0 00 007735* GO LDRAR ; load the register
6523 007754' 201 01 0 00 000010 MOVEI 1,MPRUN ; get MPRUN bit
6524 007755' 260 17 0 00 007741* GO LDCSR ; start up the port
6525 007756' 201 00 0 00 000001 MOVEI 1 ; set up delay of 1 ms
6526 007757' 260 17 0 00 007443* GO ODELAY ; wait a bit
6527 007760' 400 01 0 00 000000 SETZ 1, ; clear data
6528 007761' 260 17 0 00 007755* GO LDCSR ; stop the port
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 109
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1755
6529
6530 ; Loop on test execute table entries
6531
6532 007762' 260 17 0 00 007446* TA30: GO TEXEC ; execute table entry
6533 007763' 254 00 0 00 007772' JRST TX30 ; end of table
6534 007764' 254 00 0 00 007762' JRST TA30 ; keep looping after call
6535 007765' 474 15 0 00 000000 SETO ERFLG, ; error - EBUF data incorrect
6536
6537 ; Handle error printouts and scope looping
6538
6539 007766' 027 00 0 00 010114' SCOPER MA30 ; print error message
6540 007767' 254 00 0 00 007725' JRST TL30 ; loop on error
6541 007770' 254 00 0 00 007772' JRST TX30 ; altmode exit
6542 007771' 322 15 0 00 007762' JUMPE ERFLG,TA30 ; do next sstep table entry
6543
6544 ; End of test
6545
6546 007772' 263 17 0 00 000000 TX30: RTN ; return
6547
6548 ; Test Execute Table, as: (CMD,parameters)
6549
6550 007773' 140000 010047' TS30: TTABLE (TCALL,TS30IN) ; initialize stuff
6551 007774' 200000 010052' TS30L: TTABLE (TCALLC,TS30NE) ; set up next data pattern
6552
6553 ; Shifted 4 bits
6554
6555 007775' 140000 010077' TS30A: TTABLE (TCALL,TS30NN) ; increment shift count
6556 007776' 400000 000100 TTABLE (TSSTAR,100) ; start up port
6557 007777' 240001 010102' TTABLE (TCHECK,1,TS30RS) ; check if completed
6558 010000' 340000 000000 TTABLE (TEXIT) ; exit if error yet
6559
6560 ; Shifted 8 bits
6561
6562 010001' 140000 010077' TTABLE (TCALL,TS30NN) ; increment shift count
6563 010002' 400000 000100 TTABLE (TSSTAR,100) ; start up port
6564 010003' 240001 010103' TTABLE (TCHECK,1,TS30RS+1) ; check if completed
6565 010004' 340000 000000 TTABLE (TEXIT) ; exit if error yet
6566
6567 ; Shifted 12 bits
6568
6569 010005' 140000 010077' TTABLE (TCALL,TS30NN) ; increment shift count
6570 010006' 400000 000100 TTABLE (TSSTAR,100) ; start up port
6571 010007' 240001 010104' TTABLE (TCHECK,1,TS30RS+2) ; check if completed
6572 010010' 340000 000000 TTABLE (TEXIT) ; exit if error yet
6573
6574 ; Shifted 16 bits
6575
6576 010011' 140000 010077' TTABLE (TCALL,TS30NN) ; increment shift count
6577 010012' 400000 000100 TTABLE (TSSTAR,100) ; start up port
6578 010013' 240001 010105' TTABLE (TCHECK,1,TS30RS+3) ; check if completed
6579 010014' 340000 000000 TTABLE (TEXIT) ; exit if error yet
6580
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 110
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1756
6581
6582 ; Shifted 20 bits
6583
6584 010015' 140000 010077' TTABLE (TCALL,TS30NN) ; increment shift count
6585 010016' 400000 000100 TTABLE (TSSTAR,100) ; start up port
6586 010017' 240001 010106' TTABLE (TCHECK,1,TS30RS+4) ; check if completed
6587 010020' 340000 000000 TTABLE (TEXIT) ; exit if error yet
6588
6589 ; Shifted 24 bits
6590
6591 010021' 140000 010077' TTABLE (TCALL,TS30NN) ; increment shift count
6592 010022' 400000 000100 TTABLE (TSSTAR,100) ; start up port
6593 010023' 240001 010107' TTABLE (TCHECK,1,TS30RS+5) ; check if completed
6594 010024' 340000 000000 TTABLE (TEXIT) ; exit if error yet
6595
6596 ; Shifted 28 bits
6597
6598 010025' 140000 010077' TTABLE (TCALL,TS30NN) ; increment shift count
6599 010026' 400000 000100 TTABLE (TSSTAR,100) ; start up port
6600 010027' 240001 010110' TTABLE (TCHECK,1,TS30RS+6) ; check if completed
6601 010030' 340000 000000 TTABLE (TEXIT) ; exit if error yet
6602
6603 ; Shifted 32 bits
6604
6605 010031' 140000 010077' TTABLE (TCALL,TS30NN) ; increment shift count
6606 010032' 400000 000100 TTABLE (TSSTAR,100) ; start up port
6607 010033' 240001 010111' TTABLE (TCHECK,1,TS30RS+7) ; check if completed
6608 010034' 340000 000000 TTABLE (TEXIT) ; exit if error yet
6609
6610 ; Shifted 36 bits
6611
6612 010035' 140000 010077' TTABLE (TCALL,TS30NN) ; increment shift count
6613 010036' 400000 000100 TTABLE (TSSTAR,100) ; start up port
6614 010037' 240001 010112' TTABLE (TCHECK,1,TS30RS+10) ; check if completed
6615 010040' 340000 000000 TTABLE (TEXIT) ; exit if error yet
6616
6617 ; Shifted 40 bits
6618
6619 010041' 140000 010077' TTABLE (TCALL,TS30NN) ; increment shift count
6620 010042' 400000 000100 TTABLE (TSSTAR,100) ; start up port
6621 010043' 240001 010113' TTABLE (TCHECK,1,TS30RS+11) ; check if completed
6622 010044' 340000 000000 TTABLE (TEXIT) ; exit if error yet
6623 010045' 300000 007774' TTABLE (TJRST,TS30L) ; loop till done
6624 010046' 000000 000000 TTABLE (TLAST)
6625
6626 ; Initialize stuff
6627
6628 010047' 201 00 0 00 000000# TS30IN: MOVEI BUFF-1 ; initialize buffer pointer
6629 010050' 202 00 0 00 014031' MOVEM T30BUF# ; ...
6630 010051' 263 17 0 00 000000 RTN ; return
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 111
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1757
6631
6632 ; Set up next data pattern
6633
6634 010052' 350 01 0 00 014031' TS30NE: AOS 1,T30BUF ; point to next data pattern
6635 010053' 307 01 0 00 000000# CAIG 1,BUFF+5 ; done yet?
6636 010054' 350 00 0 17 000000 AOS (P) ; no - set up proper return
6637 010055' 200 00 0 01 000000 MOVE (1) ; get data pattern
6638 010056' 201 02 0 00 010102' MOVEI 2,TS30RS ; get initial address of EBUF data
6639 010057' 242 00 0 00 777774 TS30N0: LSH -4 ; shift 4 bits
6640 010060' 303 02 0 00 010103' CAILE 2,TS30RS+1 ; if past the first 2 shifts, insert
6641 010061' 661 00 0 00 000000 TLO 0 ; the PLIN data into left 4 bits
6642 010062' 202 00 0 02 000000 MOVEM (2) ; save it
6643 010063' 350 00 0 00 000002 AOS 2 ; point to next address
6644 010064' 307 02 0 00 010113' CAIG 2,TS30RS+11 ; done yet?
6645 010065' 254 00 0 00 010057' JRST TS30N0 ; no - loop till done
6646 010066' 402 00 0 00 014054' SETZM TS30NM# ; initialize number of shifts
6647
6648 ; Read the next word
6649
6650 010067' 201 01 0 00 000200 MOVEI 1,200 ; get start address
6651 010070' 242 01 0 00 000001 LSH 1,1 ; position correctly
6652 010071' 260 17 0 00 007753* GO LDRAR ; load the register
6653 010072' 201 01 0 00 000010 MOVEI 1,MPRUN ; get MPRUN bit
6654 010073' 260 17 0 00 007761* GO LDCSR ; start up the port
6655 010074' 400 01 0 00 000000 SETZ 1, ; clear data
6656 010075' 260 17 0 00 010073* GO LDCSR ; stop the port
6657 010076' 263 17 0 00 000000 RTN ; return
6658
6659 ; Increment shift count
6660
6661 010077' 201 00 0 00 000004 TS30NN: MOVEI 4 ; get a 4
6662 010100' 272 00 0 00 014054' ADDM TS30NM ; add it
6663 010101' 263 17 0 00 000000 RTN ; return
6664
6665 010102' TS30RS: BLOCK 12 ; correct EBUF data
6666
6667 ; Error messages
6668
6669 010114' 240000 010116' MA30: CALL!TXNOT!MA30PN ; print data pattern ...
6670 010115' 000000000000# LAST!CALL!TXALL!TTPNT ; print test data
6671
6672 010116' 037 00 0 00 013336' MA30PN: TMSGC <Data > ; get data and
6673 010117' 200 01 0 00 014031' MOVE 1,T30BUF ; print it
6674 010120' 200 00 0 01 000000 MOVE (1)
6675 010121' 037 13 0 00 000000 PNTHW
6676 010122' 037 00 0 00 013502' TMSG < shifted down from PLIN >
6677 010123' 200 00 0 00 014054' MOVE TS30NM ; get shift count
6678 010124' 037 15 0 00 000000 PNTDEC
6679 010125' 037 00 0 00 013343' TMSG <. bits, result in EBUF>
6680 010126' 263 17 0 00 000000 RTN
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 112
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1758
6681
6682 ; Microcode - Shift 4 bits
6683
6684 010127' 010001 010000 T30M: MWORD <ADDR=100,JMAP,J=101,D=1> ; 100
6685 010130' 001000 000040
6686 010131' 010100 000124 MWORD <CONT,D=1,SELF,MGC=124> ; 101
6687 010132' 001000 003340
6688 010133' 010200 000200 MWORD <CONT,SD0,OR,B=4,D=2,SELM,MGC=200> ; 102
6689 010134' 732002 002340
6690 010135' 010351 000000 MWORD <JMAP,J=5100,D=1> ; 103
6691 010136' 001000 000040
6692
6693 ; Routine to read a word from CBUS into the formatter.
6694
6695 010137' 020002 010000 MWORD <ADDR=200,JMAP,J=201> ; 200
6696 010140' 000000 000040
6697 010141' 020102 030000 MWORD <CJP,J=203,D=1,CENA,CCCA> ; 201
6698 010142' 001400 000060
6699 010143' 020202 010000 MWORD <JMAP,J=201,D=1> ; 202
6700 010144' 001000 000040
6701 010145' 020300 000200 MWORD <CONT,D=1,SELF,MGC=200> ; 203
6702 010146' 001000 003340
6703 010147' 020400 000204 MWORD <CONT,D=1,SELF,MGC=204> ; 204
6704 010150' 001000 003340
6705 010151' 020500 000004 MWORD <CONT,D=1,SELC,MGC=4> ; 205
6706 010152' 001000 004340
6707 010153' 020600 000200 MWORD <CONT,SD0,OR,B=3,D=2,SELM,MGC=200> ; 206
6708 010154' 732001 402340
6709 010155' 020700 000000 MWORD <JZ> ; 207
6710 010156' 000000 000000
6711
6712 ; Initialization
6713
6714 010157' 100010 010020 MWORD <ADDR=1000,JMAP,J=1001,SELM,MGC=20> ; 1000
6715 010160' 000000 002040
6716 010161' 100100 000200 MWORD <CONT,D=1,SELC,MGC=200> ; 1001
6717 010162' 001000 004340
6718 010163' 100200 310360 MWORD <LDCT,J=31,SD0,OR,D=2,SKCN,MGC=360> ; 1002
6719 010164' 732000 240300
6720 010165' 100310 030000 MWORD <RPCT,J=1003,S0A,OR,D=5> ; 1003
6721 010166' 435000 000220
6722 010167' 100400 002040 MWORD <CONT,S0A,OR,D=1,OENA,SELM,MGC=40> ; 1004
6723 010170' 431000 002340
6724 010171' 100500 000006 MWORD <JZ,SD0,D=1,SELP,MGC=6> ; 1005
6725 010172' 701000 001000
6726 010173' 000000 000000 MWORD <ADDR=0,JZ> ; 0
6727 010174' 000000 000000
6728
6729 ; Initialization step
6730
6731 010175' 500050 010100 MWORD <ADDR=5000,JMAP,J=5001,SELC,MGC=100> ; 5000
6732 010176' 000000 004040
6733 010177' 500100 000020 MWORD <JZ,SELM,MGC=20> ; 5001
6734 010200' 000000 002000
6735
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 112-1
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1759
6736 ; Subroutine - Passed - Write 1 to bit 12 of CSR register
6737
6738 010201' 510000 000000 MWORD <ADDR=5100,CONT,SD0,AND,B=2,D=2> ; 5100
6739 010202' 742001 000340
6740 010203' 510100 000000 MWORD <CONT,S0B,PLUS,B=2,D=2,CRY> ; 5101
6741 010204' 302001 000740
6742 010205' 510200 260000 MWORD <LDCT,J=26> ; 5102
6743 010206' 000000 000300
6744 010207' 510351 030000 MWORD <RPCT,J=5103,SAB,PLUS,A=2,B=2,D=2> ; 5103
6745 010210' 102021 000220
6746 010211' 510400 002004 MWORD <CONT,S0A,A=2,OR,D=1,OENA,SELE,MGC=4> ; 5104
6747 010212' 431020 005340
6748 010213' 510551 070040 MWORD <CJP,J=5107,CENA,CCGC,D=1,SELE,MGC=40> ; 5105
6749 010214' 001400 015060
6750 010215' 510651 050000 MWORD <JMAP,J=5105,D=1> ; 5106
6751 010216' 001000 000040
6752 010217' 510700 000200 MWORD <CONT,S0A,A=1,OR,D=1,SELE,MGC=200> ; 5107
6753 010220' 431010 005340
6754 010221' 511051 102004 MWORD <JMAP,J=5110,S0A,A=4,OR,D=1,OENA,SELE,MGC=4> ; 5110
6755 010222' 431040 005040
6756 010223' 777777 777777 -1
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 113
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1760
6757
6758 ;#********************************************************************
6759 ;* Test 31 - Fmtr Down Shift 4 (from PLIN) Test - SELRHTNIB=1
6760 ;
6761 ; Description: Verify that the formatter can shift various data
6762 ; patterns down 4 bits at a time while inserting
6763 ; bits from the PLIN into the formatter. The data
6764 ; loaded into the PLIN initially is 017.
6765 ;
6766 ; Procedure: KL> Port Clear
6767 ; KL> Set up data transfer for data patterns
6768 ;
6769 ; UC> Read a data pattern over the CBUS
6770 ; UC> Load PLIN with 017
6771 ;
6772 ; UC> Shift down 4 bits
6773 ; UC> Read formatter contents and write into EBUF
6774 ; KL> Read EBUF and verify the data
6775 ; KL> Start up the ucode to shift again
6776 ;
6777 ; Repeat the above shifting then verifying EBUF
6778 ; contents 10 times, until the data becomes
6779 ; all zero.
6780 ;
6781 ; Do for data patterns: 0's
6782 ; 1's
6783 ; 525252,,525252
6784 ; 000000,,007777
6785 ; 000000,,007070
6786 ; 000000,,000707
6787 ;
6788 ; Failure: ---
6789 ;#********************************************************************
6790
6791 ; Test data
6792
6793 010224' 254 00 0 00 010236' TSTC31: JRST TG31 ; go start test
6794 010225' 100604 000031 CBUS!NDMP!NDCB!ZCBUS!31 ; test mask
6795 010226' 010445' 013507' T31M,,[ASCIZ ^Fmtr Down Shift 4 (from PLIN) Test - SELRHTNIB=1^]
6796 010227' 013263' 012716' [EXP C20,C12,MLAST!C8],,[EXP C4,MLAST!C2]
6797 010230' 000000 010542' TSTC32 ; failure test table
6798 010231' 000000 011060' TSTC33 ; ...
6799 010232' 000000 011344' TSTC34
6800 010233' 000000 011627' TSTC35
6801 010234' 000000 012111' TSTC36
6802 010235' 777777 777777 -1
6803
6804 ; Start test
6805
6806 010236' 201 00 0 00 000000' TG31: MOVEI Z9 ; get address of module start
6807 010237' 260 17 0 00 007721* GO TRACE ; handle trace output
6808 010240' 201 01 0 00 010445' MOVEI 1,T31M ; set up microcode address
6809 010241' 260 17 0 00 007723* GO TLOAD ; load/verify it
6810 010242' 263 17 0 00 000000 RTN ; failed - exit test
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 114
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1761
6811
6812 ; Initialization
6813
6814 010243' 400 15 0 00 000000 TL31: SETZ ERFLG, ; clear error flag
6815 010244' 260 17 0 00 007726* GO IPACLR ; clear port
6816 010245' 402 00 0 00 007727* SETZM TSTSUB ; initialize subtest number
6817 MOVSI [000000,,000000 ; get address of buffer
6818 777777,,777777 ; contents
6819 525252,,525252
6820 000000,,007777
6821 000000,,007070
6822 010246' 205 00 0 00 013330' 000000,,000707]
6823 010247' 541 00 0 00 007744* HRRI BUFF ; build the BLT pointer
6824 010250' 251 00 0 00 000000# BLT BUFF+5 ; insert data into buffer
6825
6826 ; First ensure the data transfer is reset
6827
6828 010251' 201 01 0 00 005000 MOVEI 1,5000 ; get start address
6829 010252' 242 01 0 00 000001 LSH 1,1 ; position correctly
6830 010253' 260 17 0 00 010071* GO LDRAR ; load the register
6831 010254' 201 01 0 00 000010 MOVEI 1,MPRUN ; get MPRUN bit
6832 010255' 260 17 0 00 010075* GO LDCSR ; start up the port
6833 010256' 400 01 0 00 000000 SETZ 1, ; clear data
6834 010257' 260 17 0 00 010255* GO LDCSR ; stop the port
6835
6836 ; Now generate CCW list
6837
6838 010260' 200 01 0 00 013210' MOVE 1,[CBUFSZ,,CBUF] ; get pointer to control buffer
6839 010261' 260 17 0 00 007743* GO CHINIT ; initialize software
6840 010262' 551 01 0 00 010247* HRRZI 1,BUFF ; buffer address
6841 010263' 201 02 0 00 000006 MOVEI 2,6 ; word count
6842 010264' 400 03 0 00 000000 SETZ 3, ; clear zero fill specifier
6843 010265' 260 17 0 00 007747* GO GENCCW ; generate a CCW list
6844 010266' 201 06 0 00 010311' MOVEI 6,TS31 ; get test execute table address
6845
6846 ; Start up the data transfer
6847
6848 010267' 201 01 0 00 001000 MOVEI 1,1000 ; get start address
6849 010270' 242 01 0 00 000001 LSH 1,1 ; position correctly
6850 010271' 260 17 0 00 010253* GO LDRAR ; load the register
6851 010272' 201 01 0 00 000010 MOVEI 1,MPRUN ; get MPRUN bit
6852 010273' 260 17 0 00 010257* GO LDCSR ; start up the port
6853 010274' 201 00 0 00 000001 MOVEI 1 ; set up delay of 1 ms
6854 010275' 260 17 0 00 007757* GO ODELAY ; wait a bit
6855 010276' 400 01 0 00 000000 SETZ 1, ; clear data
6856 010277' 260 17 0 00 010273* GO LDCSR ; stop the port
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 115
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1762
6857
6858 ; Loop on test execute table entries
6859
6860 010300' 260 17 0 00 007762* TA31: GO TEXEC ; execute table entry
6861 010301' 254 00 0 00 010310' JRST TX31 ; end of table
6862 010302' 254 00 0 00 010300' JRST TA31 ; keep looping after call
6863 010303' 474 15 0 00 000000 SETO ERFLG, ; error - EBUF data incorrect
6864
6865 ; Handle error printouts and scope looping
6866
6867 010304' 027 00 0 00 010432' SCOPER MA31 ; print error message
6868 010305' 254 00 0 00 010243' JRST TL31 ; loop on error
6869 010306' 254 00 0 00 010310' JRST TX31 ; altmode exit
6870 010307' 322 15 0 00 010300' JUMPE ERFLG,TA31 ; do next sstep table entry
6871
6872 ; End of test
6873
6874 010310' 263 17 0 00 000000 TX31: RTN ; return
6875
6876 ; Test Execute Table, as: (CMD,parameters)
6877
6878 010311' 140000 010365' TS31: TTABLE (TCALL,TS31IN) ; initialize stuff
6879 010312' 200000 010370' TS31L: TTABLE (TCALLC,TS31NE) ; set up next data pattern
6880
6881 ; Shifted 4 bits
6882
6883 010313' 140000 010415' TS31A: TTABLE (TCALL,TS31NN) ; increment shift count
6884 010314' 400000 000100 TTABLE (TSSTAR,100) ; start up port
6885 010315' 240001 010420' TTABLE (TCHECK,1,TS31RS) ; check if completed
6886 010316' 340000 000000 TTABLE (TEXIT) ; exit if error yet
6887
6888 ; Shifted 8 bits
6889
6890 010317' 140000 010415' TTABLE (TCALL,TS31NN) ; increment shift count
6891 010320' 400000 000100 TTABLE (TSSTAR,100) ; start up port
6892 010321' 240001 010421' TTABLE (TCHECK,1,TS31RS+1) ; check if completed
6893 010322' 340000 000000 TTABLE (TEXIT) ; exit if error yet
6894
6895 ; Shifted 12 bits
6896
6897 010323' 140000 010415' TTABLE (TCALL,TS31NN) ; increment shift count
6898 010324' 400000 000100 TTABLE (TSSTAR,100) ; start up port
6899 010325' 240001 010422' TTABLE (TCHECK,1,TS31RS+2) ; check if completed
6900 010326' 340000 000000 TTABLE (TEXIT) ; exit if error yet
6901
6902 ; Shifted 16 bits
6903
6904 010327' 140000 010415' TTABLE (TCALL,TS31NN) ; increment shift count
6905 010330' 400000 000100 TTABLE (TSSTAR,100) ; start up port
6906 010331' 240001 010423' TTABLE (TCHECK,1,TS31RS+3) ; check if completed
6907 010332' 340000 000000 TTABLE (TEXIT) ; exit if error yet
6908
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 116
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1763
6909
6910 ; Shifted 20 bits
6911
6912 010333' 140000 010415' TTABLE (TCALL,TS31NN) ; increment shift count
6913 010334' 400000 000100 TTABLE (TSSTAR,100) ; start up port
6914 010335' 240001 010424' TTABLE (TCHECK,1,TS31RS+4) ; check if completed
6915 010336' 340000 000000 TTABLE (TEXIT) ; exit if error yet
6916
6917 ; Shifted 24 bits
6918
6919 010337' 140000 010415' TTABLE (TCALL,TS31NN) ; increment shift count
6920 010340' 400000 000100 TTABLE (TSSTAR,100) ; start up port
6921 010341' 240001 010425' TTABLE (TCHECK,1,TS31RS+5) ; check if completed
6922 010342' 340000 000000 TTABLE (TEXIT) ; exit if error yet
6923
6924 ; Shifted 28 bits
6925
6926 010343' 140000 010415' TTABLE (TCALL,TS31NN) ; increment shift count
6927 010344' 400000 000100 TTABLE (TSSTAR,100) ; start up port
6928 010345' 240001 010426' TTABLE (TCHECK,1,TS31RS+6) ; check if completed
6929 010346' 340000 000000 TTABLE (TEXIT) ; exit if error yet
6930
6931 ; Shifted 32 bits
6932
6933 010347' 140000 010415' TTABLE (TCALL,TS31NN) ; increment shift count
6934 010350' 400000 000100 TTABLE (TSSTAR,100) ; start up port
6935 010351' 240001 010427' TTABLE (TCHECK,1,TS31RS+7) ; check if completed
6936 010352' 340000 000000 TTABLE (TEXIT) ; exit if error yet
6937
6938 ; Shifted 36 bits
6939
6940 010353' 140000 010415' TTABLE (TCALL,TS31NN) ; increment shift count
6941 010354' 400000 000100 TTABLE (TSSTAR,100) ; start up port
6942 010355' 240001 010430' TTABLE (TCHECK,1,TS31RS+10) ; check if completed
6943 010356' 340000 000000 TTABLE (TEXIT) ; exit if error yet
6944
6945 ; Shifted 40 bits
6946
6947 010357' 140000 010415' TTABLE (TCALL,TS31NN) ; increment shift count
6948 010360' 400000 000100 TTABLE (TSSTAR,100) ; start up port
6949 010361' 240001 010431' TTABLE (TCHECK,1,TS31RS+11) ; check if completed
6950 010362' 340000 000000 TTABLE (TEXIT) ; exit if error yet
6951 010363' 300000 010312' TTABLE (TJRST,TS31L) ; loop till done
6952 010364' 000000 000000 TTABLE (TLAST)
6953
6954 ; Initialize stuff
6955
6956 010365' 201 00 0 00 000000# TS31IN: MOVEI BUFF-1 ; initialize buffer pointer
6957 010366' 202 00 0 00 014032' MOVEM T31BUF# ; ...
6958 010367' 263 17 0 00 000000 RTN ; return
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 117
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1764
6959
6960 ; Set up next data pattern
6961
6962 010370' 350 01 0 00 014032' TS31NE: AOS 1,T31BUF ; point to next data pattern
6963 010371' 307 01 0 00 000000# CAIG 1,BUFF+5 ; done yet?
6964 010372' 350 00 0 17 000000 AOS (P) ; no - set up proper return
6965 010373' 200 00 0 01 000000 MOVE (1) ; get data pattern
6966 010374' 201 02 0 00 010420' MOVEI 2,TS31RS ; get initial address of EBUF data
6967 010375' 242 00 0 00 777774 TS31N0: LSH -4 ; shift 4 bits
6968 010376' 303 02 0 00 010421' CAILE 2,TS31RS+1 ; if past the first 2 shifts, insert
6969 010377' 661 00 0 00 000000 TLO 0 ; the PLIN data into left 4 bits
6970 010400' 202 00 0 02 000000 MOVEM (2) ; save it
6971 010401' 350 00 0 00 000002 AOS 2 ; point to next address
6972 010402' 307 02 0 00 010431' CAIG 2,TS31RS+11 ; done yet?
6973 010403' 254 00 0 00 010375' JRST TS31N0 ; no - loop till done
6974 010404' 402 00 0 00 014055' SETZM TS31NM# ; initialize number of shifts
6975
6976 ; Read the next word
6977
6978 010405' 201 01 0 00 000200 MOVEI 1,200 ; get start address
6979 010406' 242 01 0 00 000001 LSH 1,1 ; position correctly
6980 010407' 260 17 0 00 010271* GO LDRAR ; load the register
6981 010410' 201 01 0 00 000010 MOVEI 1,MPRUN ; get MPRUN bit
6982 010411' 260 17 0 00 010277* GO LDCSR ; start up the port
6983 010412' 400 01 0 00 000000 SETZ 1, ; clear data
6984 010413' 260 17 0 00 010411* GO LDCSR ; stop the port
6985 010414' 263 17 0 00 000000 RTN ; return
6986
6987 ; Increment shift count
6988
6989 010415' 201 00 0 00 000004 TS31NN: MOVEI 4 ; get a 4
6990 010416' 272 00 0 00 014055' ADDM TS31NM ; add it
6991 010417' 263 17 0 00 000000 RTN ; return
6992
6993 010420' TS31RS: BLOCK 12 ; correct EBUF data
6994
6995 ; Error messages
6996
6997 010432' 240000 010434' MA31: CALL!TXNOT!MA31PN ; print data pattern ...
6998 010433' 000000000000# LAST!CALL!TXALL!TTPNT ; print test data
6999
7000 010434' 037 00 0 00 013336' MA31PN: TMSGC <Data > ; get data and
7001 010435' 200 01 0 00 014032' MOVE 1,T31BUF ; print it
7002 010436' 200 00 0 01 000000 MOVE (1)
7003 010437' 037 13 0 00 000000 PNTHW
7004 010440' 037 00 0 00 013502' TMSG < shifted down from PLIN >
7005 010441' 200 00 0 00 014055' MOVE TS31NM ; get shift count
7006 010442' 037 15 0 00 000000 PNTDEC
7007 010443' 037 00 0 00 013343' TMSG <. bits, result in EBUF>
7008 010444' 263 17 0 00 000000 RTN
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 118
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1765
7009
7010 ; Microcode - Shift 4 bits
7011
7012 010445' 010001 010000 T31M: MWORD <ADDR=100,JMAP,J=101,D=1> ; 100
7013 010446' 001000 000040
7014 010447' 010100 000126 MWORD <CONT,D=1,SELF,MGC=126> ; 101
7015 010450' 001000 003340
7016 010451' 010200 000200 MWORD <CONT,SD0,OR,B=4,D=2,SELM,MGC=200> ; 102
7017 010452' 732002 002340
7018 010453' 010351 000000 MWORD <JMAP,J=5100,D=1> ; 103
7019 010454' 001000 000040
7020
7021 ; Routine to read a word from CBUS into the formatter.
7022
7023 010455' 020002 010000 MWORD <ADDR=200,JMAP,J=201> ; 200
7024 010456' 000000 000040
7025 010457' 020102 030000 MWORD <CJP,J=203,D=1,CENA,CCCA> ; 201
7026 010460' 001400 000060
7027 010461' 020202 010000 MWORD <JMAP,J=201,D=1> ; 202
7028 010462' 001000 000040
7029 010463' 020300 000200 MWORD <CONT,D=1,SELF,MGC=200> ; 203
7030 010464' 001000 003340
7031 010465' 020400 000204 MWORD <CONT,D=1,SELF,MGC=204> ; 204
7032 010466' 001000 003340
7033 010467' 020500 000004 MWORD <CONT,D=1,SELC,MGC=4> ; 205
7034 010470' 001000 004340
7035 010471' 020600 000200 MWORD <CONT,SD0,OR,B=3,D=2,SELM,MGC=200> ; 206
7036 010472' 732001 402340
7037 010473' 020700 000000 MWORD <JZ> ; 207
7038 010474' 000000 000000
7039
7040 ; Initialization
7041
7042 010475' 100010 010020 MWORD <ADDR=1000,JMAP,J=1001,SELM,MGC=20> ; 1000
7043 010476' 000000 002040
7044 010477' 100100 000200 MWORD <CONT,D=1,SELC,MGC=200> ; 1001
7045 010500' 001000 004340
7046 010501' 100200 310017 MWORD <LDCT,J=31,SD0,OR,D=2,SKCN,MGC=017> ; 1002
7047 010502' 732000 240300
7048 010503' 100310 030000 MWORD <RPCT,J=1003,S0A,OR,D=5> ; 1003
7049 010504' 435000 000220
7050 010505' 100400 002040 MWORD <CONT,S0A,OR,D=1,OENA,SELM,MGC=40> ; 1004
7051 010506' 431000 002340
7052 010507' 100500 000006 MWORD <JZ,SD0,D=1,SELP,MGC=6> ; 1005
7053 010510' 701000 001000
7054 010511' 000000 000000 MWORD <ADDR=0,JZ> ; 0
7055 010512' 000000 000000
7056
7057 ; Initialization step
7058
7059 010513' 500050 010100 MWORD <ADDR=5000,JMAP,J=5001,SELC,MGC=100> ; 5000
7060 010514' 000000 004040
7061 010515' 500100 000020 MWORD <JZ,SELM,MGC=20> ; 5001
7062 010516' 000000 002000
7063
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 118-1
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1766
7064 ; Subroutine - Passed - Write 1 to bit 12 of CSR register
7065
7066 010517' 510000 000000 MWORD <ADDR=5100,CONT,SD0,AND,B=2,D=2> ; 5100
7067 010520' 742001 000340
7068 010521' 510100 000000 MWORD <CONT,S0B,PLUS,B=2,D=2,CRY> ; 5101
7069 010522' 302001 000740
7070 010523' 510200 260000 MWORD <LDCT,J=26> ; 5102
7071 010524' 000000 000300
7072 010525' 510351 030000 MWORD <RPCT,J=5103,SAB,PLUS,A=2,B=2,D=2> ; 5103
7073 010526' 102021 000220
7074 010527' 510400 002004 MWORD <CONT,S0A,A=2,OR,D=1,OENA,SELE,MGC=4> ; 5104
7075 010530' 431020 005340
7076 010531' 510551 070040 MWORD <CJP,J=5107,CENA,CCGC,D=1,SELE,MGC=40> ; 5105
7077 010532' 001400 015060
7078 010533' 510651 050000 MWORD <JMAP,J=5105,D=1> ; 5106
7079 010534' 001000 000040
7080 010535' 510700 000200 MWORD <CONT,S0A,A=1,OR,D=1,SELE,MGC=200> ; 5107
7081 010536' 431010 005340
7082 010537' 511051 102004 MWORD <JMAP,J=5110,S0A,A=4,OR,D=1,OENA,SELE,MGC=4> ; 5110
7083 010540' 431040 005040
7084 010541' 777777 777777 -1
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 119
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1767
7085
7086 ;#********************************************************************
7087 ;* Test 32 - Fmtr Down Shift 4 (from PLIN) Test - SELRHTNIB=1
7088 ;
7089 ; Description: Verify that the formatter can shift various data
7090 ; patterns down 4 bits at a time while inserting
7091 ; bits from the PLIN into the formatter. The data
7092 ; loaded into the PLIN initially is 360.
7093 ;
7094 ; Procedure: KL> Port Clear
7095 ; KL> Set up data transfer for data patterns
7096 ;
7097 ; UC> Read a data pattern over the CBUS
7098 ; UC> Load PLIN with 360
7099 ;
7100 ; UC> Shift down 4 bits
7101 ; UC> Read formatter contents and write into EBUF
7102 ; KL> Read EBUF and verify the data
7103 ; KL> Start up the ucode to shift again
7104 ;
7105 ; Repeat the above shifting then verifying EBUF
7106 ; contents 10 times, until the data becomes
7107 ; all zero.
7108 ;
7109 ; Do for data patterns: 0's
7110 ; 1's
7111 ; 525252,,525252
7112 ; 000000,,007777
7113 ; 000000,,007070
7114 ; 000000,,000707
7115 ;
7116 ; Failure: ---
7117 ;#********************************************************************
7118
7119 ; Test data
7120
7121 010542' 254 00 0 00 010554' TSTC32: JRST TG32 ; go start test
7122 010543' 100604 000032 CBUS!NDMP!NDCB!ZCBUS!32 ; test mask
7123 010544' 010763' 013507' T32M,,[ASCIZ ^Fmtr Down Shift 4 (from PLIN) Test - SELRHTNIB=1^]
7124 010545' 013263' 012716' [EXP C20,C12,MLAST!C8],,[EXP C4,MLAST!C2]
7125 010546' 000000 011060' TSTC33 ; failure test table
7126 010547' 000000 011344' TSTC34 ; ...
7127 010550' 000000 011627' TSTC35
7128 010551' 000000 012111' TSTC36
7129 010552' 000000 012372' TSTC37
7130 010553' 777777 777777 -1
7131
7132 ; Start test
7133
7134 010554' 201 00 0 00 000000' TG32: MOVEI Z9 ; get address of module start
7135 010555' 260 17 0 00 010237* GO TRACE ; handle trace output
7136 010556' 201 01 0 00 010763' MOVEI 1,T32M ; set up microcode address
7137 010557' 260 17 0 00 010241* GO TLOAD ; load/verify it
7138 010560' 263 17 0 00 000000 RTN ; failed - exit test
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 120
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1768
7139
7140 ; Initialization
7141
7142 010561' 400 15 0 00 000000 TL32: SETZ ERFLG, ; clear error flag
7143 010562' 260 17 0 00 010244* GO IPACLR ; clear port
7144 010563' 402 00 0 00 010245* SETZM TSTSUB ; initialize subtest number
7145 MOVSI [000000,,000000 ; get address of buffer
7146 777777,,777777 ; contents
7147 525252,,525252
7148 000000,,007777
7149 000000,,007070
7150 010564' 205 00 0 00 013330' 000000,,000707]
7151 010565' 541 00 0 00 010262* HRRI BUFF ; build the BLT pointer
7152 010566' 251 00 0 00 000000# BLT BUFF+5 ; insert data into buffer
7153
7154 ; First ensure the data transfer is reset
7155
7156 010567' 201 01 0 00 005000 MOVEI 1,5000 ; get start address
7157 010570' 242 01 0 00 000001 LSH 1,1 ; position correctly
7158 010571' 260 17 0 00 010407* GO LDRAR ; load the register
7159 010572' 201 01 0 00 000010 MOVEI 1,MPRUN ; get MPRUN bit
7160 010573' 260 17 0 00 010413* GO LDCSR ; start up the port
7161 010574' 400 01 0 00 000000 SETZ 1, ; clear data
7162 010575' 260 17 0 00 010573* GO LDCSR ; stop the port
7163
7164 ; Now generate CCW list
7165
7166 010576' 200 01 0 00 013210' MOVE 1,[CBUFSZ,,CBUF] ; get pointer to control buffer
7167 010577' 260 17 0 00 010261* GO CHINIT ; initialize software
7168 010600' 551 01 0 00 010565* HRRZI 1,BUFF ; buffer address
7169 010601' 201 02 0 00 000006 MOVEI 2,6 ; word count
7170 010602' 400 03 0 00 000000 SETZ 3, ; clear zero fill specifier
7171 010603' 260 17 0 00 010265* GO GENCCW ; generate a CCW list
7172 010604' 201 06 0 00 010627' MOVEI 6,TS32 ; get test execute table address
7173
7174 ; Start up the data transfer
7175
7176 010605' 201 01 0 00 001000 MOVEI 1,1000 ; get start address
7177 010606' 242 01 0 00 000001 LSH 1,1 ; position correctly
7178 010607' 260 17 0 00 010571* GO LDRAR ; load the register
7179 010610' 201 01 0 00 000010 MOVEI 1,MPRUN ; get MPRUN bit
7180 010611' 260 17 0 00 010575* GO LDCSR ; start up the port
7181 010612' 201 00 0 00 000001 MOVEI 1 ; set up delay of 1 ms
7182 010613' 260 17 0 00 010275* GO ODELAY ; wait a bit
7183 010614' 400 01 0 00 000000 SETZ 1, ; clear data
7184 010615' 260 17 0 00 010611* GO LDCSR ; stop the port
7185
7186 ; Loop on test execute table entries
7187
7188 010616' 260 17 0 00 010300* TA32: GO TEXEC ; execute table entry
7189 010617' 254 00 0 00 010626' JRST TX32 ; end of table
7190 010620' 254 00 0 00 010616' JRST TA32 ; keep looping after call
7191 010621' 474 15 0 00 000000 SETO ERFLG, ; error - EBUF data incorrect
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 121
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1769
7192
7193 ; Handle error printouts and scope looping
7194
7195 010622' 027 00 0 00 010750' SCOPER MA32 ; print error message
7196 010623' 254 00 0 00 010561' JRST TL32 ; loop on error
7197 010624' 254 00 0 00 010626' JRST TX32 ; altmode exit
7198 010625' 322 15 0 00 010616' JUMPE ERFLG,TA32 ; do next sstep table entry
7199
7200 ; End of test
7201
7202 010626' 263 17 0 00 000000 TX32: RTN ; return
7203
7204 ; Test Execute Table, as: (CMD,parameters)
7205
7206 010627' 140000 010703' TS32: TTABLE (TCALL,TS32IN) ; initialize stuff
7207 010630' 200000 010706' TS32L: TTABLE (TCALLC,TS32NE) ; set up next data pattern
7208
7209 ; Shifted 4 bits
7210
7211 010631' 140000 010733' TS32A: TTABLE (TCALL,TS32NN) ; increment shift count
7212 010632' 400000 000100 TTABLE (TSSTAR,100) ; start up port
7213 010633' 240001 010736' TTABLE (TCHECK,1,TS32RS) ; check if completed
7214 010634' 340000 000000 TTABLE (TEXIT) ; exit if error yet
7215
7216 ; Shifted 8 bits
7217
7218 010635' 140000 010733' TTABLE (TCALL,TS32NN) ; increment shift count
7219 010636' 400000 000100 TTABLE (TSSTAR,100) ; start up port
7220 010637' 240001 010737' TTABLE (TCHECK,1,TS32RS+1) ; check if completed
7221 010640' 340000 000000 TTABLE (TEXIT) ; exit if error yet
7222
7223 ; Shifted 12 bits
7224
7225 010641' 140000 010733' TTABLE (TCALL,TS32NN) ; increment shift count
7226 010642' 400000 000100 TTABLE (TSSTAR,100) ; start up port
7227 010643' 240001 010740' TTABLE (TCHECK,1,TS32RS+2) ; check if completed
7228 010644' 340000 000000 TTABLE (TEXIT) ; exit if error yet
7229
7230 ; Shifted 16 bits
7231
7232 010645' 140000 010733' TTABLE (TCALL,TS32NN) ; increment shift count
7233 010646' 400000 000100 TTABLE (TSSTAR,100) ; start up port
7234 010647' 240001 010741' TTABLE (TCHECK,1,TS32RS+3) ; check if completed
7235 010650' 340000 000000 TTABLE (TEXIT) ; exit if error yet
7236
7237 ; Shifted 20 bits
7238
7239 010651' 140000 010733' TTABLE (TCALL,TS32NN) ; increment shift count
7240 010652' 400000 000100 TTABLE (TSSTAR,100) ; start up port
7241 010653' 240001 010742' TTABLE (TCHECK,1,TS32RS+4) ; check if completed
7242 010654' 340000 000000 TTABLE (TEXIT) ; exit if error yet
7243
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 122
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1770
7244
7245 ; Shifted 24 bits
7246
7247 010655' 140000 010733' TTABLE (TCALL,TS32NN) ; increment shift count
7248 010656' 400000 000100 TTABLE (TSSTAR,100) ; start up port
7249 010657' 240001 010743' TTABLE (TCHECK,1,TS32RS+5) ; check if completed
7250 010660' 340000 000000 TTABLE (TEXIT) ; exit if error yet
7251
7252 ; Shifted 28 bits
7253
7254 010661' 140000 010733' TTABLE (TCALL,TS32NN) ; increment shift count
7255 010662' 400000 000100 TTABLE (TSSTAR,100) ; start up port
7256 010663' 240001 010744' TTABLE (TCHECK,1,TS32RS+6) ; check if completed
7257 010664' 340000 000000 TTABLE (TEXIT) ; exit if error yet
7258
7259 ; Shifted 32 bits
7260
7261 010665' 140000 010733' TTABLE (TCALL,TS32NN) ; increment shift count
7262 010666' 400000 000100 TTABLE (TSSTAR,100) ; start up port
7263 010667' 240001 010745' TTABLE (TCHECK,1,TS32RS+7) ; check if completed
7264 010670' 340000 000000 TTABLE (TEXIT) ; exit if error yet
7265
7266 ; Shifted 36 bits
7267
7268 010671' 140000 010733' TTABLE (TCALL,TS32NN) ; increment shift count
7269 010672' 400000 000100 TTABLE (TSSTAR,100) ; start up port
7270 010673' 240001 010746' TTABLE (TCHECK,1,TS32RS+10) ; check if completed
7271 010674' 340000 000000 TTABLE (TEXIT) ; exit if error yet
7272
7273 ; Shifted 40 bits
7274
7275 010675' 140000 010733' TTABLE (TCALL,TS32NN) ; increment shift count
7276 010676' 400000 000100 TTABLE (TSSTAR,100) ; start up port
7277 010677' 240001 010747' TTABLE (TCHECK,1,TS32RS+11) ; check if completed
7278 010700' 340000 000000 TTABLE (TEXIT) ; exit if error yet
7279 010701' 300000 010630' TTABLE (TJRST,TS32L) ; loop till done
7280 010702' 000000 000000 TTABLE (TLAST)
7281
7282 ; Initialize stuff
7283
7284 010703' 201 00 0 00 000000# TS32IN: MOVEI BUFF-1 ; initialize buffer pointer
7285 010704' 202 00 0 00 014033' MOVEM T32BUF# ; ...
7286 010705' 263 17 0 00 000000 RTN ; return
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 123
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1771
7287
7288 ; Set up next data pattern
7289
7290 010706' 350 01 0 00 014033' TS32NE: AOS 1,T32BUF ; point to next data pattern
7291 010707' 307 01 0 00 000000# CAIG 1,BUFF+5 ; done yet?
7292 010710' 350 00 0 17 000000 AOS (P) ; no - set up proper return
7293 010711' 200 00 0 01 000000 MOVE (1) ; get data pattern
7294 010712' 201 02 0 00 010736' MOVEI 2,TS32RS ; get initial address of EBUF data
7295 010713' 242 00 0 00 777774 TS32N0: LSH -4 ; shift 4 bits
7296 010714' 303 02 0 00 010737' CAILE 2,TS32RS+1 ; if past the first 2 shifts, insert
7297 010715' 661 00 0 00 740000 TLO 740000 ; the PLIN data into left 4 bits
7298 010716' 202 00 0 02 000000 MOVEM (2) ; save it
7299 010717' 350 00 0 00 000002 AOS 2 ; point to next address
7300 010720' 307 02 0 00 010747' CAIG 2,TS32RS+11 ; done yet?
7301 010721' 254 00 0 00 010713' JRST TS32N0 ; no - loop till done
7302 010722' 402 00 0 00 014056' SETZM TS32NM# ; initialize number of shifts
7303
7304 ; Read the next word
7305
7306 010723' 201 01 0 00 000200 MOVEI 1,200 ; get start address
7307 010724' 242 01 0 00 000001 LSH 1,1 ; position correctly
7308 010725' 260 17 0 00 010607* GO LDRAR ; load the register
7309 010726' 201 01 0 00 000010 MOVEI 1,MPRUN ; get MPRUN bit
7310 010727' 260 17 0 00 010615* GO LDCSR ; start up the port
7311 010730' 400 01 0 00 000000 SETZ 1, ; clear data
7312 010731' 260 17 0 00 010727* GO LDCSR ; stop the port
7313 010732' 263 17 0 00 000000 RTN ; return
7314
7315 ; Increment shift count
7316
7317 010733' 201 00 0 00 000004 TS32NN: MOVEI 4 ; get a 4
7318 010734' 272 00 0 00 014056' ADDM TS32NM ; add it
7319 010735' 263 17 0 00 000000 RTN ; return
7320
7321 010736' TS32RS: BLOCK 12 ; correct EBUF data
7322
7323 ; Error messages
7324
7325 010750' 240000 010752' MA32: CALL!TXNOT!MA32PN ; print data pattern ...
7326 010751' 000000000000# LAST!CALL!TXALL!TTPNT ; print test data
7327
7328 010752' 037 00 0 00 013336' MA32PN: TMSGC <Data > ; get data and
7329 010753' 200 01 0 00 014033' MOVE 1,T32BUF ; print it
7330 010754' 200 00 0 01 000000 MOVE (1)
7331 010755' 037 13 0 00 000000 PNTHW
7332 010756' 037 00 0 00 013502' TMSG < shifted down from PLIN >
7333 010757' 200 00 0 00 014056' MOVE TS32NM ; get shift count
7334 010760' 037 15 0 00 000000 PNTDEC
7335 010761' 037 00 0 00 013343' TMSG <. bits, result in EBUF>
7336 010762' 263 17 0 00 000000 RTN
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 124
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1772
7337
7338 ; Microcode - Shift 4 bits
7339
7340 010763' 010001 010000 T32M: MWORD <ADDR=100,JMAP,J=101,D=1> ; 100
7341 010764' 001000 000040
7342 010765' 010100 000126 MWORD <CONT,D=1,SELF,MGC=126> ; 101
7343 010766' 001000 003340
7344 010767' 010200 000200 MWORD <CONT,SD0,OR,B=4,D=2,SELM,MGC=200> ; 102
7345 010770' 732002 002340
7346 010771' 010351 000000 MWORD <JMAP,J=5100,D=1> ; 103
7347 010772' 001000 000040
7348
7349 ; Routine to read a word from CBUS into the formatter.
7350
7351 010773' 020002 010000 MWORD <ADDR=200,JMAP,J=201> ; 200
7352 010774' 000000 000040
7353 010775' 020102 030000 MWORD <CJP,J=203,D=1,CENA,CCCA> ; 201
7354 010776' 001400 000060
7355 010777' 020202 010000 MWORD <JMAP,J=201,D=1> ; 202
7356 011000' 001000 000040
7357 011001' 020300 000200 MWORD <CONT,D=1,SELF,MGC=200> ; 203
7358 011002' 001000 003340
7359 011003' 020400 000204 MWORD <CONT,D=1,SELF,MGC=204> ; 204
7360 011004' 001000 003340
7361 011005' 020500 000004 MWORD <CONT,D=1,SELC,MGC=4> ; 205
7362 011006' 001000 004340
7363 011007' 020600 000200 MWORD <CONT,SD0,OR,B=3,D=2,SELM,MGC=200> ; 206
7364 011010' 732001 402340
7365 011011' 020700 000000 MWORD <JZ> ; 207
7366 011012' 000000 000000
7367
7368 ; Initialization
7369
7370 011013' 100010 010020 MWORD <ADDR=1000,JMAP,J=1001,SELM,MGC=20> ; 1000
7371 011014' 000000 002040
7372 011015' 100100 000200 MWORD <CONT,D=1,SELC,MGC=200> ; 1001
7373 011016' 001000 004340
7374 011017' 100200 310360 MWORD <LDCT,J=31,SD0,OR,D=2,SKCN,MGC=360> ; 1002
7375 011020' 732000 240300
7376 011021' 100310 030000 MWORD <RPCT,J=1003,S0A,OR,D=5> ; 1003
7377 011022' 435000 000220
7378 011023' 100400 002040 MWORD <CONT,S0A,OR,D=1,OENA,SELM,MGC=40> ; 1004
7379 011024' 431000 002340
7380 011025' 100500 000006 MWORD <JZ,SD0,D=1,SELP,MGC=6> ; 1005
7381 011026' 701000 001000
7382 011027' 000000 000000 MWORD <ADDR=0,JZ> ; 0
7383 011030' 000000 000000
7384
7385 ; Initialization step
7386
7387 011031' 500050 010100 MWORD <ADDR=5000,JMAP,J=5001,SELC,MGC=100> ; 5000
7388 011032' 000000 004040
7389 011033' 500100 000020 MWORD <JZ,SELM,MGC=20> ; 5001
7390 011034' 000000 002000
7391
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 124-1
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1773
7392 ; Subroutine - Passed - Write 1 to bit 12 of CSR register
7393
7394 011035' 510000 000000 MWORD <ADDR=5100,CONT,SD0,AND,B=2,D=2> ; 5100
7395 011036' 742001 000340
7396 011037' 510100 000000 MWORD <CONT,S0B,PLUS,B=2,D=2,CRY> ; 5101
7397 011040' 302001 000740
7398 011041' 510200 260000 MWORD <LDCT,J=26> ; 5102
7399 011042' 000000 000300
7400 011043' 510351 030000 MWORD <RPCT,J=5103,SAB,PLUS,A=2,B=2,D=2> ; 5103
7401 011044' 102021 000220
7402 011045' 510400 002004 MWORD <CONT,S0A,A=2,OR,D=1,OENA,SELE,MGC=4> ; 5104
7403 011046' 431020 005340
7404 011047' 510551 070040 MWORD <CJP,J=5107,CENA,CCGC,D=1,SELE,MGC=40> ; 5105
7405 011050' 001400 015060
7406 011051' 510651 050000 MWORD <JMAP,J=5105,D=1> ; 5106
7407 011052' 001000 000040
7408 011053' 510700 000200 MWORD <CONT,S0A,A=1,OR,D=1,SELE,MGC=200> ; 5107
7409 011054' 431010 005340
7410 011055' 511051 102004 MWORD <JMAP,J=5110,S0A,A=4,OR,D=1,OENA,SELE,MGC=4> ; 5110
7411 011056' 431040 005040
7412 011057' 777777 777777 -1
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 125
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1774
7413
7414 ;#********************************************************************
7415 ;* Test 33 - Fmtr Down Shift 8 (from PLIN) Test - SELRHTNIB=0
7416 ;
7417 ; Description: Verify that the formatter can shift various data
7418 ; patterns down 8 bits at a time while inserting
7419 ; bits from the PLIN into the formatter. The data
7420 ; loaded into the PLIN initially is 017.
7421 ;
7422 ; Procedure: KL> Port Clear
7423 ; KL> Set up data transfer for data patterns
7424 ;
7425 ; UC> Read a data pattern over the CBUS
7426 ; UC> Load PLIN with 017
7427 ;
7428 ; UC> Shift down 8 bits
7429 ; UC> Read formatter contents and write into EBUF
7430 ; KL> Read EBUF and verify the data
7431 ; KL> Start up the ucode to shift again
7432 ;
7433 ; Repeat the above shifting then verifying EBUF
7434 ; contents 5 times, until the data becomes
7435 ; all zero.
7436 ;
7437 ; Do for data patterns: 0's
7438 ; 1's
7439 ; 525252,,525252
7440 ; 000000,,007777
7441 ; 000000,,007070
7442 ; 000000,,000707
7443 ;
7444 ; Failure: ---
7445 ;#********************************************************************
7446
7447 ; Test data
7448
7449 011060' 254 00 0 00 011071' TSTC33: JRST TG33 ; go start test
7450 011061' 100604 000033 CBUS!NDMP!NDCB!ZCBUS!33 ; test mask
7451 011062' 011247' 013521' T33M,,[ASCIZ ^Fmtr Down Shift 8 (from PLIN) Test - SELRHTNIB=0^]
7452 011063' 013263' 012716' [EXP C20,C12,MLAST!C8],,[EXP C4,MLAST!C2]
7453 011064' 000000 011344' TSTC34 ; failure test table
7454 011065' 000000 011627' TSTC35 ; ...
7455 011066' 000000 012111' TSTC36
7456 011067' 000000 012372' TSTC37
7457 011070' 777777 777777 -1
7458
7459 ; Start test
7460
7461 011071' 201 00 0 00 000000' TG33: MOVEI Z9 ; get address of module start
7462 011072' 260 17 0 00 010555* GO TRACE ; handle trace output
7463 011073' 201 01 0 00 011247' MOVEI 1,T33M ; set up microcode address
7464 011074' 260 17 0 00 010557* GO TLOAD ; load/verify it
7465 011075' 263 17 0 00 000000 RTN ; failed - exit test
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 126
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1775
7466
7467 ; Initialization
7468
7469 011076' 400 15 0 00 000000 TL33: SETZ ERFLG, ; clear error flag
7470 011077' 260 17 0 00 010562* GO IPACLR ; clear port
7471 011100' 402 00 0 00 010563* SETZM TSTSUB ; initialize subtest number
7472 MOVSI [000000,,000000 ; get address of buffer
7473 777777,,777777 ; contents
7474 525252,,525252
7475 000000,,007777
7476 000000,,007070
7477 011101' 205 00 0 00 013330' 000000,,000707]
7478 011102' 541 00 0 00 010600* HRRI BUFF ; build the BLT pointer
7479 011103' 251 00 0 00 000000# BLT BUFF+5 ; insert data into buffer
7480
7481 ; First ensure the data transfer is reset
7482
7483 011104' 201 01 0 00 005000 MOVEI 1,5000 ; get start address
7484 011105' 242 01 0 00 000001 LSH 1,1 ; position correctly
7485 011106' 260 17 0 00 010725* GO LDRAR ; load the register
7486 011107' 201 01 0 00 000010 MOVEI 1,MPRUN ; get MPRUN bit
7487 011110' 260 17 0 00 010731* GO LDCSR ; start up the port
7488 011111' 400 01 0 00 000000 SETZ 1, ; clear data
7489 011112' 260 17 0 00 011110* GO LDCSR ; stop the port
7490
7491 ; Now generate CCW list
7492
7493 011113' 200 01 0 00 013210' MOVE 1,[CBUFSZ,,CBUF] ; get pointer to control buffer
7494 011114' 260 17 0 00 010577* GO CHINIT ; initialize software
7495 011115' 551 01 0 00 011102* HRRZI 1,BUFF ; buffer address
7496 011116' 201 02 0 00 000006 MOVEI 2,6 ; word count
7497 011117' 400 03 0 00 000000 SETZ 3, ; clear zero fill specifier
7498 011120' 260 17 0 00 010603* GO GENCCW ; generate a CCW list
7499 011121' 201 06 0 00 011144' MOVEI 6,TS33 ; get test execute table address
7500
7501 ; Start up the data transfer
7502
7503 011122' 201 01 0 00 001000 MOVEI 1,1000 ; get start address
7504 011123' 242 01 0 00 000001 LSH 1,1 ; position correctly
7505 011124' 260 17 0 00 011106* GO LDRAR ; load the register
7506 011125' 201 01 0 00 000010 MOVEI 1,MPRUN ; get MPRUN bit
7507 011126' 260 17 0 00 011112* GO LDCSR ; start up the port
7508 011127' 201 00 0 00 000001 MOVEI 1 ; set up delay of 1 ms
7509 011130' 260 17 0 00 010613* GO ODELAY ; wait a bit
7510 011131' 400 01 0 00 000000 SETZ 1, ; clear data
7511 011132' 260 17 0 00 011126* GO LDCSR ; stop the port
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 127
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1776
7512
7513 ; Loop on test execute table entries
7514
7515 011133' 260 17 0 00 010616* TA33: GO TEXEC ; execute table entry
7516 011134' 254 00 0 00 011143' JRST TX33 ; end of table
7517 011135' 254 00 0 00 011133' JRST TA33 ; keep looping after call
7518 011136' 474 15 0 00 000000 SETO ERFLG, ; error - EBUF data incorrect
7519
7520 ; Handle error printouts and scope looping
7521
7522 011137' 027 00 0 00 011234' SCOPER MA33 ; print error message
7523 011140' 254 00 0 00 011076' JRST TL33 ; loop on error
7524 011141' 254 00 0 00 011143' JRST TX33 ; altmode exit
7525 011142' 322 15 0 00 011133' JUMPE ERFLG,TA33 ; do next sstep table entry
7526
7527 ; End of test
7528
7529 011143' 263 17 0 00 000000 TX33: RTN ; return
7530
7531 ; Test Execute Table, as: (CMD,parameters)
7532
7533 011144' 140000 011174' TS33: TTABLE (TCALL,TS33IN) ; initialize stuff
7534 011145' 200000 011177' TS33L: TTABLE (TCALLC,TS33NE) ; set up next data pattern
7535
7536 ; Shifted 8 bits
7537
7538 011146' 140000 011224' TS33A: TTABLE (TCALL,TS33NN) ; increment shift count
7539 011147' 400000 000100 TTABLE (TSSTAR,100) ; start up port
7540 011150' 240001 011227' TTABLE (TCHECK,1,TS33RS) ; check if completed
7541 011151' 340000 000000 TTABLE (TEXIT) ; exit if error yet
7542
7543 ; Shifted 16 bits
7544
7545 011152' 140000 011224' TTABLE (TCALL,TS33NN) ; increment shift count
7546 011153' 400000 000100 TTABLE (TSSTAR,100) ; start up port
7547 011154' 240001 011230' TTABLE (TCHECK,1,TS33RS+1) ; check if completed
7548 011155' 340000 000000 TTABLE (TEXIT) ; exit if error yet
7549
7550 ; Shifted 24 bits
7551
7552 011156' 140000 011224' TTABLE (TCALL,TS33NN) ; increment shift count
7553 011157' 400000 000100 TTABLE (TSSTAR,100) ; start up port
7554 011160' 240001 011231' TTABLE (TCHECK,1,TS33RS+2) ; check if completed
7555 011161' 340000 000000 TTABLE (TEXIT) ; exit if error yet
7556
7557 ; Shifted 32 bits
7558
7559 011162' 140000 011224' TTABLE (TCALL,TS33NN) ; increment shift count
7560 011163' 400000 000100 TTABLE (TSSTAR,100) ; start up port
7561 011164' 240001 011232' TTABLE (TCHECK,1,TS33RS+3) ; check if completed
7562 011165' 340000 000000 TTABLE (TEXIT) ; exit if error yet
7563
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 128
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1777
7564
7565 ; Shifted 40 bits
7566
7567 011166' 140000 011224' TTABLE (TCALL,TS33NN) ; increment shift count
7568 011167' 400000 000100 TTABLE (TSSTAR,100) ; start up port
7569 011170' 240001 011233' TTABLE (TCHECK,1,TS33RS+4) ; check if completed
7570 011171' 340000 000000 TTABLE (TEXIT) ; exit if error yet
7571 011172' 300000 011145' TTABLE (TJRST,TS33L) ; loop till done
7572 011173' 000000 000000 TTABLE (TLAST)
7573
7574 ; Initialize stuff
7575
7576 011174' 201 00 0 00 000000# TS33IN: MOVEI BUFF-1 ; initialize buffer pointer
7577 011175' 202 00 0 00 014034' MOVEM T33BUF# ; ...
7578 011176' 263 17 0 00 000000 RTN ; return
7579
7580 ; Set up next data pattern
7581
7582 011177' 350 01 0 00 014034' TS33NE: AOS 1,T33BUF ; point to next data pattern
7583 011200' 307 01 0 00 000000# CAIG 1,BUFF+5 ; done yet?
7584 011201' 350 00 0 17 000000 AOS (P) ; no - set up proper return
7585 011202' 200 00 0 01 000000 MOVE (1) ; get data pattern
7586 011203' 201 02 0 00 011227' MOVEI 2,TS33RS ; get initial address of EBUF data
7587 011204' 242 00 0 00 777770 TS33N0: LSH -8 ; shift 4 bits
7588 011205' 303 02 0 00 011227' CAILE 2,TS33RS ; if past the first shift, insert
7589 011206' 661 00 0 00 740000 TLO 740000 ; the PLIN data into left 8 bits
7590 011207' 202 00 0 02 000000 MOVEM (2) ; save it
7591 011210' 350 00 0 00 000002 AOS 2 ; point to next address
7592 011211' 307 02 0 00 011233' CAIG 2,TS33RS+4 ; done yet?
7593 011212' 254 00 0 00 011204' JRST TS33N0 ; no - loop till done
7594 011213' 402 00 0 00 014057' SETZM TS33NM# ; initialize number of shifts
7595
7596 ; Read the next word
7597
7598 011214' 201 01 0 00 000200 MOVEI 1,200 ; get start address
7599 011215' 242 01 0 00 000001 LSH 1,1 ; position correctly
7600 011216' 260 17 0 00 011124* GO LDRAR ; load the register
7601 011217' 201 01 0 00 000010 MOVEI 1,MPRUN ; get MPRUN bit
7602 011220' 260 17 0 00 011132* GO LDCSR ; start up the port
7603 011221' 400 01 0 00 000000 SETZ 1, ; clear data
7604 011222' 260 17 0 00 011220* GO LDCSR ; stop the port
7605 011223' 263 17 0 00 000000 RTN ; return
7606
7607 ; Increment shift count
7608
7609 011224' 201 00 0 00 000010 TS33NN: MOVEI 8 ; get an 8
7610 011225' 272 00 0 00 014057' ADDM TS33NM ; add it
7611 011226' 263 17 0 00 000000 RTN ; return
7612
7613 011227' TS33RS: BLOCK 5 ; correct EBUF data
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 129
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1778
7614
7615 ; Error messages
7616
7617 011234' 240000 011236' MA33: CALL!TXNOT!MA33PN ; print data pattern ...
7618 011235' 000000000000# LAST!CALL!TXALL!TTPNT ; print test data
7619
7620 011236' 037 00 0 00 013336' MA33PN: TMSGC <Data > ; get data and
7621 011237' 200 01 0 00 014034' MOVE 1,T33BUF ; print it
7622 011240' 200 00 0 01 000000 MOVE (1)
7623 011241' 037 13 0 00 000000 PNTHW
7624 011242' 037 00 0 00 013502' TMSG < shifted down from PLIN >
7625 011243' 200 00 0 00 014057' MOVE TS33NM ; get shift count
7626 011244' 037 15 0 00 000000 PNTDEC
7627 011245' 037 00 0 00 013343' TMSG <. bits, result in EBUF>
7628 011246' 263 17 0 00 000000 RTN
7629
7630 ; Microcode - Shift 8 bits
7631
7632 011247' 010001 010000 T33M: MWORD <ADDR=100,JMAP,J=101,D=1> ; 100
7633 011250' 001000 000040
7634 011251' 010100 000224 MWORD <CONT,D=1,SELF,MGC=224> ; 101
7635 011252' 001000 003340
7636 011253' 010200 000200 MWORD <CONT,SD0,OR,B=4,D=2,SELM,MGC=200> ; 102
7637 011254' 732002 002340
7638 011255' 010351 000000 MWORD <JMAP,J=5100,D=1> ; 103
7639 011256' 001000 000040
7640
7641 ; Routine to read a word from CBUS into the formatter.
7642
7643 011257' 020002 010000 MWORD <ADDR=200,JMAP,J=201> ; 200
7644 011260' 000000 000040
7645 011261' 020102 030000 MWORD <CJP,J=203,D=1,CENA,CCCA> ; 201
7646 011262' 001400 000060
7647 011263' 020202 010000 MWORD <JMAP,J=201,D=1> ; 202
7648 011264' 001000 000040
7649 011265' 020300 000200 MWORD <CONT,D=1,SELF,MGC=200> ; 203
7650 011266' 001000 003340
7651 011267' 020400 000204 MWORD <CONT,D=1,SELF,MGC=204> ; 204
7652 011270' 001000 003340
7653 011271' 020500 000004 MWORD <CONT,D=1,SELC,MGC=4> ; 205
7654 011272' 001000 004340
7655 011273' 020600 000200 MWORD <CONT,SD0,OR,B=3,D=2,SELM,MGC=200> ; 206
7656 011274' 732001 402340
7657 011275' 020700 000000 MWORD <JZ> ; 207
7658 011276' 000000 000000
7659
7660 ; Initialization
7661
7662 011277' 100010 010020 MWORD <ADDR=1000,JMAP,J=1001,SELM,MGC=20> ; 1000
7663 011300' 000000 002040
7664 011301' 100100 000200 MWORD <CONT,D=1,SELC,MGC=200> ; 1001
7665 011302' 001000 004340
7666 011303' 100200 310017 MWORD <LDCT,J=31,SD0,OR,D=2,SKCN,MGC=017> ; 1002
7667 011304' 732000 240300
7668 011305' 100310 030000 MWORD <RPCT,J=1003,S0A,OR,D=5> ; 1003
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 129-1
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1779
7669 011306' 435000 000220
7670 011307' 100400 002040 MWORD <CONT,S0A,OR,D=1,OENA,SELM,MGC=40> ; 1004
7671 011310' 431000 002340
7672 011311' 100500 000006 MWORD <JZ,SD0,D=1,SELP,MGC=6> ; 1005
7673 011312' 701000 001000
7674 011313' 000000 000000 MWORD <ADDR=0,JZ> ; 0
7675 011314' 000000 000000
7676
7677 ; Initialization step
7678
7679 011315' 500050 010100 MWORD <ADDR=5000,JMAP,J=5001,SELC,MGC=100> ; 5000
7680 011316' 000000 004040
7681 011317' 500100 000020 MWORD <JZ,SELM,MGC=20> ; 5001
7682 011320' 000000 002000
7683
7684 ; Subroutine - Passed - Write 1 to bit 12 of CSR register
7685
7686 011321' 510000 000000 MWORD <ADDR=5100,CONT,SD0,AND,B=2,D=2> ; 5100
7687 011322' 742001 000340
7688 011323' 510100 000000 MWORD <CONT,S0B,PLUS,B=2,D=2,CRY> ; 5101
7689 011324' 302001 000740
7690 011325' 510200 260000 MWORD <LDCT,J=26> ; 5102
7691 011326' 000000 000300
7692 011327' 510351 030000 MWORD <RPCT,J=5103,SAB,PLUS,A=2,B=2,D=2> ; 5103
7693 011330' 102021 000220
7694 011331' 510400 002004 MWORD <CONT,S0A,A=2,OR,D=1,OENA,SELE,MGC=4> ; 5104
7695 011332' 431020 005340
7696 011333' 510551 070040 MWORD <CJP,J=5107,CENA,CCGC,D=1,SELE,MGC=40> ; 5105
7697 011334' 001400 015060
7698 011335' 510651 050000 MWORD <JMAP,J=5105,D=1> ; 5106
7699 011336' 001000 000040
7700 011337' 510700 000200 MWORD <CONT,S0A,A=1,OR,D=1,SELE,MGC=200> ; 5107
7701 011340' 431010 005340
7702 011341' 511051 102004 MWORD <JMAP,J=5110,S0A,A=4,OR,D=1,OENA,SELE,MGC=4> ; 5110
7703 011342' 431040 005040
7704 011343' 777777 777777 -1
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 130
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1780
7705
7706 ;#********************************************************************
7707 ;* Test 34 - Fmtr Down Shift 8 (from PLIN) Test - SELRHTNIB=0
7708 ;
7709 ; Description: Verify that the formatter can shift various data
7710 ; patterns down 8 bits at a time while inserting
7711 ; bits from the PLIN into the formatter. The data
7712 ; loaded into the PLIN initially is 360.
7713 ;
7714 ; Procedure: KL> Port Clear
7715 ; KL> Set up data transfer for data patterns
7716 ;
7717 ; UC> Read a data pattern over the CBUS
7718 ; UC> Load PLIN with 360
7719 ;
7720 ; UC> Shift down 8 bits
7721 ; UC> Read formatter contents and write into EBUF
7722 ; KL> Read EBUF and verify the data
7723 ; KL> Start up the ucode to shift again
7724 ;
7725 ; Repeat the above shifting then verifying EBUF
7726 ; contents 5 times, until the data becomes
7727 ; all zero.
7728 ;
7729 ; Do for data patterns: 0's
7730 ; 1's
7731 ; 525252,,525252
7732 ; 000000,,007777
7733 ; 000000,,007070
7734 ; 000000,,000707
7735 ;
7736 ; Failure: ---
7737 ;#********************************************************************
7738
7739 ; Test data
7740
7741 011344' 254 00 0 00 011354' TSTC34: JRST TG34 ; go start test
7742 011345' 100604 000034 CBUS!NDMP!NDCB!ZCBUS!34 ; test mask
7743 011346' 011532' 013521' T34M,,[ASCIZ ^Fmtr Down Shift 8 (from PLIN) Test - SELRHTNIB=0^]
7744 011347' 013263' 012716' [EXP C20,C12,MLAST!C8],,[EXP C4,MLAST!C2]
7745 011350' 000000 011627' TSTC35 ; failure test table
7746 011351' 000000 012111' TSTC36 ; ...
7747 011352' 000000 012372' TSTC37
7748 011353' 777777 777777 -1
7749
7750 ; Start test
7751
7752 011354' 201 00 0 00 000000' TG34: MOVEI Z9 ; get address of module start
7753 011355' 260 17 0 00 011072* GO TRACE ; handle trace output
7754 011356' 201 01 0 00 011532' MOVEI 1,T34M ; set up microcode address
7755 011357' 260 17 0 00 011074* GO TLOAD ; load/verify it
7756 011360' 263 17 0 00 000000 RTN ; failed - exit test
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 131
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1781
7757
7758 ; Initialization
7759
7760 011361' 400 15 0 00 000000 TL34: SETZ ERFLG, ; clear error flag
7761 011362' 260 17 0 00 011077* GO IPACLR ; clear port
7762 011363' 402 00 0 00 011100* SETZM TSTSUB ; initialize subtest number
7763 MOVSI [000000,,000000 ; get address of buffer
7764 777777,,777777 ; contents
7765 525252,,525252
7766 000000,,007777
7767 000000,,007070
7768 011364' 205 00 0 00 013330' 000000,,000707]
7769 011365' 541 00 0 00 011115* HRRI BUFF ; build the BLT pointer
7770 011366' 251 00 0 00 000000# BLT BUFF+5 ; insert data into buffer
7771
7772 ; First ensure the data transfer is reset
7773
7774 011367' 201 01 0 00 005000 MOVEI 1,5000 ; get start address
7775 011370' 242 01 0 00 000001 LSH 1,1 ; position correctly
7776 011371' 260 17 0 00 011216* GO LDRAR ; load the register
7777 011372' 201 01 0 00 000010 MOVEI 1,MPRUN ; get MPRUN bit
7778 011373' 260 17 0 00 011222* GO LDCSR ; start up the port
7779 011374' 400 01 0 00 000000 SETZ 1, ; clear data
7780 011375' 260 17 0 00 011373* GO LDCSR ; stop the port
7781
7782 ; Now generate CCW list
7783
7784 011376' 200 01 0 00 013210' MOVE 1,[CBUFSZ,,CBUF] ; get pointer to control buffer
7785 011377' 260 17 0 00 011114* GO CHINIT ; initialize software
7786 011400' 551 01 0 00 011365* HRRZI 1,BUFF ; buffer address
7787 011401' 201 02 0 00 000006 MOVEI 2,6 ; word count
7788 011402' 400 03 0 00 000000 SETZ 3, ; clear zero fill specifier
7789 011403' 260 17 0 00 011120* GO GENCCW ; generate a CCW list
7790 011404' 201 06 0 00 011427' MOVEI 6,TS34 ; get test execute table address
7791
7792 ; Start up the data transfer
7793
7794 011405' 201 01 0 00 001000 MOVEI 1,1000 ; get start address
7795 011406' 242 01 0 00 000001 LSH 1,1 ; position correctly
7796 011407' 260 17 0 00 011371* GO LDRAR ; load the register
7797 011410' 201 01 0 00 000010 MOVEI 1,MPRUN ; get MPRUN bit
7798 011411' 260 17 0 00 011375* GO LDCSR ; start up the port
7799 011412' 201 00 0 00 000001 MOVEI 1 ; set up delay of 1 ms
7800 011413' 260 17 0 00 011130* GO ODELAY ; wait a bit
7801 011414' 400 01 0 00 000000 SETZ 1, ; clear data
7802 011415' 260 17 0 00 011411* GO LDCSR ; stop the port
7803
7804 ; Loop on test execute table entries
7805
7806 011416' 260 17 0 00 011133* TA34: GO TEXEC ; execute table entry
7807 011417' 254 00 0 00 011426' JRST TX34 ; end of table
7808 011420' 254 00 0 00 011416' JRST TA34 ; keep looping after call
7809 011421' 474 15 0 00 000000 SETO ERFLG, ; error - EBUF data incorrect
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 132
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1782
7810
7811 ; Handle error printouts and scope looping
7812
7813 011422' 027 00 0 00 011517' SCOPER MA34 ; print error message
7814 011423' 254 00 0 00 011361' JRST TL34 ; loop on error
7815 011424' 254 00 0 00 011426' JRST TX34 ; altmode exit
7816 011425' 322 15 0 00 011416' JUMPE ERFLG,TA34 ; do next sstep table entry
7817
7818 ; End of test
7819
7820 011426' 263 17 0 00 000000 TX34: RTN ; return
7821
7822 ; Test Execute Table, as: (CMD,parameters)
7823
7824 011427' 140000 011457' TS34: TTABLE (TCALL,TS34IN) ; initialize stuff
7825 011430' 200000 011462' TS34L: TTABLE (TCALLC,TS34NE) ; set up next data pattern
7826
7827 ; Shifted 8 bits
7828
7829 011431' 140000 011507' TS34A: TTABLE (TCALL,TS34NN) ; increment shift count
7830 011432' 400000 000100 TTABLE (TSSTAR,100) ; start up port
7831 011433' 240001 011512' TTABLE (TCHECK,1,TS34RS) ; check if completed
7832 011434' 340000 000000 TTABLE (TEXIT) ; exit if error yet
7833
7834 ; Shifted 16 bits
7835
7836 011435' 140000 011507' TTABLE (TCALL,TS34NN) ; increment shift count
7837 011436' 400000 000100 TTABLE (TSSTAR,100) ; start up port
7838 011437' 240001 011513' TTABLE (TCHECK,1,TS34RS+1) ; check if completed
7839 011440' 340000 000000 TTABLE (TEXIT) ; exit if error yet
7840
7841 ; Shifted 24 bits
7842
7843 011441' 140000 011507' TTABLE (TCALL,TS34NN) ; increment shift count
7844 011442' 400000 000100 TTABLE (TSSTAR,100) ; start up port
7845 011443' 240001 011514' TTABLE (TCHECK,1,TS34RS+2) ; check if completed
7846 011444' 340000 000000 TTABLE (TEXIT) ; exit if error yet
7847
7848 ; Shifted 32 bits
7849
7850 011445' 140000 011507' TTABLE (TCALL,TS34NN) ; increment shift count
7851 011446' 400000 000100 TTABLE (TSSTAR,100) ; start up port
7852 011447' 240001 011515' TTABLE (TCHECK,1,TS34RS+3) ; check if completed
7853 011450' 340000 000000 TTABLE (TEXIT) ; exit if error yet
7854
7855 ; Shifted 40 bits
7856
7857 011451' 140000 011507' TTABLE (TCALL,TS34NN) ; increment shift count
7858 011452' 400000 000100 TTABLE (TSSTAR,100) ; start up port
7859 011453' 240001 011516' TTABLE (TCHECK,1,TS34RS+4) ; check if completed
7860 011454' 340000 000000 TTABLE (TEXIT) ; exit if error yet
7861 011455' 300000 011430' TTABLE (TJRST,TS34L) ; loop till done
7862 011456' 000000 000000 TTABLE (TLAST)
7863
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 133
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1783
7864
7865 ; Initialize stuff
7866
7867 011457' 201 00 0 00 000000# TS34IN: MOVEI BUFF-1 ; initialize buffer pointer
7868 011460' 202 00 0 00 014035' MOVEM T34BUF# ; ...
7869 011461' 263 17 0 00 000000 RTN ; return
7870
7871 ; Set up next data pattern
7872
7873 011462' 350 01 0 00 014035' TS34NE: AOS 1,T34BUF ; point to next data pattern
7874 011463' 307 01 0 00 000000# CAIG 1,BUFF+5 ; done yet?
7875 011464' 350 00 0 17 000000 AOS (P) ; no - set up proper return
7876 011465' 200 00 0 01 000000 MOVE (1) ; get data pattern
7877 011466' 201 02 0 00 011512' MOVEI 2,TS34RS ; get initial address of EBUF data
7878 011467' 242 00 0 00 777770 TS34N0: LSH -8 ; shift 4 bits
7879 011470' 303 02 0 00 011512' CAILE 2,TS34RS ; if past the first shift, insert
7880 011471' 661 00 0 00 036000 TLO 36000 ; the PLIN data into left 8 bits
7881 011472' 202 00 0 02 000000 MOVEM (2) ; save it
7882 011473' 350 00 0 00 000002 AOS 2 ; point to next address
7883 011474' 307 02 0 00 011516' CAIG 2,TS34RS+4 ; done yet?
7884 011475' 254 00 0 00 011467' JRST TS34N0 ; no - loop till done
7885 011476' 402 00 0 00 014060' SETZM TS34NM# ; initialize number of shifts
7886
7887 ; Read the next word
7888
7889 011477' 201 01 0 00 000200 MOVEI 1,200 ; get start address
7890 011500' 242 01 0 00 000001 LSH 1,1 ; position correctly
7891 011501' 260 17 0 00 011407* GO LDRAR ; load the register
7892 011502' 201 01 0 00 000010 MOVEI 1,MPRUN ; get MPRUN bit
7893 011503' 260 17 0 00 011415* GO LDCSR ; start up the port
7894 011504' 400 01 0 00 000000 SETZ 1, ; clear data
7895 011505' 260 17 0 00 011503* GO LDCSR ; stop the port
7896 011506' 263 17 0 00 000000 RTN ; return
7897
7898 ; Increment shift count
7899
7900 011507' 201 00 0 00 000010 TS34NN: MOVEI 8 ; get a 8
7901 011510' 272 00 0 00 014060' ADDM TS34NM ; add it
7902 011511' 263 17 0 00 000000 RTN ; return
7903
7904 011512' TS34RS: BLOCK 5 ; correct EBUF data
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 134
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1784
7905
7906 ; Error messages
7907
7908 011517' 240000 011521' MA34: CALL!TXNOT!MA34PN ; print data pattern ...
7909 011520' 000000000000# LAST!CALL!TXALL!TTPNT ; print test data
7910
7911 011521' 037 00 0 00 013336' MA34PN: TMSGC <Data > ; get data and
7912 011522' 200 01 0 00 014035' MOVE 1,T34BUF ; print it
7913 011523' 200 00 0 01 000000 MOVE (1)
7914 011524' 037 13 0 00 000000 PNTHW
7915 011525' 037 00 0 00 013502' TMSG < shifted down from PLIN >
7916 011526' 200 00 0 00 014060' MOVE TS34NM ; get shift count
7917 011527' 037 15 0 00 000000 PNTDEC
7918 011530' 037 00 0 00 013343' TMSG <. bits, result in EBUF>
7919 011531' 263 17 0 00 000000 RTN
7920
7921 ; Microcode - Shift 8 bits
7922
7923 011532' 010001 010000 T34M: MWORD <ADDR=100,JMAP,J=101,D=1> ; 100
7924 011533' 001000 000040
7925 011534' 010100 000224 MWORD <CONT,D=1,SELF,MGC=224> ; 101
7926 011535' 001000 003340
7927 011536' 010200 000200 MWORD <CONT,SD0,OR,B=4,D=2,SELM,MGC=200> ; 102
7928 011537' 732002 002340
7929 011540' 010351 000000 MWORD <JMAP,J=5100,D=1> ; 103
7930 011541' 001000 000040
7931
7932 ; Routine to read a word from CBUS into the formatter.
7933
7934 011542' 020002 010000 MWORD <ADDR=200,JMAP,J=201> ; 200
7935 011543' 000000 000040
7936 011544' 020102 030000 MWORD <CJP,J=203,D=1,CENA,CCCA> ; 201
7937 011545' 001400 000060
7938 011546' 020202 010000 MWORD <JMAP,J=201,D=1> ; 202
7939 011547' 001000 000040
7940 011550' 020300 000200 MWORD <CONT,D=1,SELF,MGC=200> ; 203
7941 011551' 001000 003340
7942 011552' 020400 000204 MWORD <CONT,D=1,SELF,MGC=204> ; 204
7943 011553' 001000 003340
7944 011554' 020500 000004 MWORD <CONT,D=1,SELC,MGC=4> ; 205
7945 011555' 001000 004340
7946 011556' 020600 000200 MWORD <CONT,SD0,OR,B=3,D=2,SELM,MGC=200> ; 206
7947 011557' 732001 402340
7948 011560' 020700 000000 MWORD <JZ> ; 207
7949 011561' 000000 000000
7950
7951 ; Initialization
7952
7953 011562' 100010 010020 MWORD <ADDR=1000,JMAP,J=1001,SELM,MGC=20> ; 1000
7954 011563' 000000 002040
7955 011564' 100100 000200 MWORD <CONT,D=1,SELC,MGC=200> ; 1001
7956 011565' 001000 004340
7957 011566' 100200 310360 MWORD <LDCT,J=31,SD0,OR,D=2,SKCN,MGC=360> ; 1002
7958 011567' 732000 240300
7959 011570' 100310 030000 MWORD <RPCT,J=1003,S0A,OR,D=5> ; 1003
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 134-1
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1785
7960 011571' 435000 000220
7961 011572' 100400 002040 MWORD <CONT,S0A,OR,D=1,OENA,SELM,MGC=40> ; 1004
7962 011573' 431000 002340
7963 011574' 100500 000006 MWORD <JZ,SD0,D=1,SELP,MGC=6> ; 1005
7964 011575' 701000 001000
7965 011576' 000000 000000 MWORD <ADDR=0,JZ> ; 0
7966 011577' 000000 000000
7967
7968 ; Initialization step
7969
7970 011600' 500050 010100 MWORD <ADDR=5000,JMAP,J=5001,SELC,MGC=100> ; 5000
7971 011601' 000000 004040
7972 011602' 500100 000020 MWORD <JZ,SELM,MGC=20> ; 5001
7973 011603' 000000 002000
7974
7975 ; Subroutine - Passed - Write 1 to bit 12 of CSR register
7976
7977 011604' 510000 000000 MWORD <ADDR=5100,CONT,SD0,AND,B=2,D=2> ; 5100
7978 011605' 742001 000340
7979 011606' 510100 000000 MWORD <CONT,S0B,PLUS,B=2,D=2,CRY> ; 5101
7980 011607' 302001 000740
7981 011610' 510200 260000 MWORD <LDCT,J=26> ; 5102
7982 011611' 000000 000300
7983 011612' 510351 030000 MWORD <RPCT,J=5103,SAB,PLUS,A=2,B=2,D=2> ; 5103
7984 011613' 102021 000220
7985 011614' 510400 002004 MWORD <CONT,S0A,A=2,OR,D=1,OENA,SELE,MGC=4> ; 5104
7986 011615' 431020 005340
7987 011616' 510551 070040 MWORD <CJP,J=5107,CENA,CCGC,D=1,SELE,MGC=40> ; 5105
7988 011617' 001400 015060
7989 011620' 510651 050000 MWORD <JMAP,J=5105,D=1> ; 5106
7990 011621' 001000 000040
7991 011622' 510700 000200 MWORD <CONT,S0A,A=1,OR,D=1,SELE,MGC=200> ; 5107
7992 011623' 431010 005340
7993 011624' 511051 102004 MWORD <JMAP,J=5110,S0A,A=4,OR,D=1,OENA,SELE,MGC=4> ; 5110
7994 011625' 431040 005040
7995 011626' 777777 777777 -1
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 135
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1786
7996
7997 ;#********************************************************************
7998 ;* Test 35 - Fmtr Down Shift 8 (from PLIN) Test - SELRHTNIB=1
7999 ;
8000 ; Description: Verify that the formatter can shift various data
8001 ; patterns down 8 bits at a time while inserting
8002 ; bits from the PLIN into the formatter. The data
8003 ; loaded into the PLIN initially is 017.
8004 ;
8005 ; Procedure: KL> Port Clear
8006 ; KL> Set up data transfer for data patterns
8007 ;
8008 ; UC> Read a data pattern over the CBUS
8009 ; UC> Load PLIN with 017
8010 ;
8011 ; UC> Shift down 8 bits
8012 ; UC> Read formatter contents and write into EBUF
8013 ; KL> Read EBUF and verify the data
8014 ; KL> Start up the ucode to shift again
8015 ;
8016 ; Repeat the above shifting then verifying EBUF
8017 ; contents 5 times, until the data becomes
8018 ; all zero.
8019 ;
8020 ; Do for data patterns: 0's
8021 ; 1's
8022 ; 525252,,525252
8023 ; 000000,,007777
8024 ; 000000,,007070
8025 ; 000000,,000707
8026 ;
8027 ; Failure: ---
8028 ;#********************************************************************
8029
8030 ; Test data
8031
8032 011627' 254 00 0 00 011636' TSTC35: JRST TG35 ; go start test
8033 011630' 100604 000035 CBUS!NDMP!NDCB!ZCBUS!35 ; test mask
8034 011631' 012014' 013533' T35M,,[ASCIZ ^Fmtr Down Shift 8 (from PLIN) Test - SELRHTNIB=1^]
8035 011632' 013263' 012716' [EXP C20,C12,MLAST!C8],,[EXP C4,MLAST!C2]
8036 011633' 000000 012111' TSTC36 ; failure test table
8037 011634' 000000 012372' TSTC37 ; ...
8038 011635' 777777 777777 -1
8039
8040 ; Start test
8041
8042 011636' 201 00 0 00 000000' TG35: MOVEI Z9 ; get address of module start
8043 011637' 260 17 0 00 011355* GO TRACE ; handle trace output
8044 011640' 201 01 0 00 012014' MOVEI 1,T35M ; set up microcode address
8045 011641' 260 17 0 00 011357* GO TLOAD ; load/verify it
8046 011642' 263 17 0 00 000000 RTN ; failed - exit test
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 136
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1787
8047
8048 ; Initialization
8049
8050 011643' 400 15 0 00 000000 TL35: SETZ ERFLG, ; clear error flag
8051 011644' 260 17 0 00 011362* GO IPACLR ; clear port
8052 011645' 402 00 0 00 011363* SETZM TSTSUB ; initialize subtest number
8053 MOVSI [000000,,000000 ; get address of buffer
8054 777777,,777777 ; contents
8055 525252,,525252
8056 000000,,007777
8057 000000,,007070
8058 011646' 205 00 0 00 013330' 000000,,000707]
8059 011647' 541 00 0 00 011400* HRRI BUFF ; build the BLT pointer
8060 011650' 251 00 0 00 000000# BLT BUFF+5 ; insert data into buffer
8061
8062 ; First ensure the data transfer is reset
8063
8064 011651' 201 01 0 00 005000 MOVEI 1,5000 ; get start address
8065 011652' 242 01 0 00 000001 LSH 1,1 ; position correctly
8066 011653' 260 17 0 00 011501* GO LDRAR ; load the register
8067 011654' 201 01 0 00 000010 MOVEI 1,MPRUN ; get MPRUN bit
8068 011655' 260 17 0 00 011505* GO LDCSR ; start up the port
8069 011656' 400 01 0 00 000000 SETZ 1, ; clear data
8070 011657' 260 17 0 00 011655* GO LDCSR ; stop the port
8071
8072 ; Now generate CCW list
8073
8074 011660' 200 01 0 00 013210' MOVE 1,[CBUFSZ,,CBUF] ; get pointer to control buffer
8075 011661' 260 17 0 00 011377* GO CHINIT ; initialize software
8076 011662' 551 01 0 00 011647* HRRZI 1,BUFF ; buffer address
8077 011663' 201 02 0 00 000006 MOVEI 2,6 ; word count
8078 011664' 400 03 0 00 000000 SETZ 3, ; clear zero fill specifier
8079 011665' 260 17 0 00 011403* GO GENCCW ; generate a CCW list
8080 011666' 201 06 0 00 011711' MOVEI 6,TS35 ; get test execute table address
8081
8082 ; Start up the data transfer
8083
8084 011667' 201 01 0 00 001000 MOVEI 1,1000 ; get start address
8085 011670' 242 01 0 00 000001 LSH 1,1 ; position correctly
8086 011671' 260 17 0 00 011653* GO LDRAR ; load the register
8087 011672' 201 01 0 00 000010 MOVEI 1,MPRUN ; get MPRUN bit
8088 011673' 260 17 0 00 011657* GO LDCSR ; start up the port
8089 011674' 201 00 0 00 000001 MOVEI 1 ; set up delay of 1 ms
8090 011675' 260 17 0 00 011413* GO ODELAY ; wait a bit
8091 011676' 400 01 0 00 000000 SETZ 1, ; clear data
8092 011677' 260 17 0 00 011673* GO LDCSR ; stop the port
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 137
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1788
8093
8094 ; Loop on test execute table entries
8095
8096 011700' 260 17 0 00 011416* TA35: GO TEXEC ; execute table entry
8097 011701' 254 00 0 00 011710' JRST TX35 ; end of table
8098 011702' 254 00 0 00 011700' JRST TA35 ; keep looping after call
8099 011703' 474 15 0 00 000000 SETO ERFLG, ; error - EBUF data incorrect
8100
8101 ; Handle error printouts and scope looping
8102
8103 011704' 027 00 0 00 012001' SCOPER MA35 ; print error message
8104 011705' 254 00 0 00 011643' JRST TL35 ; loop on error
8105 011706' 254 00 0 00 011710' JRST TX35 ; altmode exit
8106 011707' 322 15 0 00 011700' JUMPE ERFLG,TA35 ; do next sstep table entry
8107
8108 ; End of test
8109
8110 011710' 263 17 0 00 000000 TX35: RTN ; return
8111
8112 ; Test Execute Table, as: (CMD,parameters)
8113
8114 011711' 140000 011741' TS35: TTABLE (TCALL,TS35IN) ; initialize stuff
8115 011712' 200000 011744' TS35L: TTABLE (TCALLC,TS35NE) ; set up next data pattern
8116
8117 ; Shifted 8 bits
8118
8119 011713' 140000 011771' TS35A: TTABLE (TCALL,TS35NN) ; increment shift count
8120 011714' 400000 000100 TTABLE (TSSTAR,100) ; start up port
8121 011715' 240001 011774' TTABLE (TCHECK,1,TS35RS) ; check if completed
8122 011716' 340000 000000 TTABLE (TEXIT) ; exit if error yet
8123
8124 ; Shifted 16 bits
8125
8126 011717' 140000 011771' TTABLE (TCALL,TS35NN) ; increment shift count
8127 011720' 400000 000100 TTABLE (TSSTAR,100) ; start up port
8128 011721' 240001 011775' TTABLE (TCHECK,1,TS35RS+1) ; check if completed
8129 011722' 340000 000000 TTABLE (TEXIT) ; exit if error yet
8130
8131 ; Shifted 24 bits
8132
8133 011723' 140000 011771' TTABLE (TCALL,TS35NN) ; increment shift count
8134 011724' 400000 000100 TTABLE (TSSTAR,100) ; start up port
8135 011725' 240001 011776' TTABLE (TCHECK,1,TS35RS+2) ; check if completed
8136 011726' 340000 000000 TTABLE (TEXIT) ; exit if error yet
8137
8138 ; Shifted 32 bits
8139
8140 011727' 140000 011771' TTABLE (TCALL,TS35NN) ; increment shift count
8141 011730' 400000 000100 TTABLE (TSSTAR,100) ; start up port
8142 011731' 240001 011777' TTABLE (TCHECK,1,TS35RS+3) ; check if completed
8143 011732' 340000 000000 TTABLE (TEXIT) ; exit if error yet
8144
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 138
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1789
8145
8146 ; Shifted 40 bits
8147
8148 011733' 140000 011771' TTABLE (TCALL,TS35NN) ; increment shift count
8149 011734' 400000 000100 TTABLE (TSSTAR,100) ; start up port
8150 011735' 240001 012000' TTABLE (TCHECK,1,TS35RS+4) ; check if completed
8151 011736' 340000 000000 TTABLE (TEXIT) ; exit if error yet
8152 011737' 300000 011712' TTABLE (TJRST,TS35L) ; loop till done
8153 011740' 000000 000000 TTABLE (TLAST)
8154
8155 ; Initialize stuff
8156
8157 011741' 201 00 0 00 000000# TS35IN: MOVEI BUFF-1 ; initialize buffer pointer
8158 011742' 202 00 0 00 014036' MOVEM T35BUF# ; ...
8159 011743' 263 17 0 00 000000 RTN ; return
8160
8161 ; Set up next data pattern
8162
8163 011744' 350 01 0 00 014036' TS35NE: AOS 1,T35BUF ; point to next data pattern
8164 011745' 307 01 0 00 000000# CAIG 1,BUFF+5 ; done yet?
8165 011746' 350 00 0 17 000000 AOS (P) ; no - set up proper return
8166 011747' 200 00 0 01 000000 MOVE (1) ; get data pattern
8167 011750' 201 02 0 00 011774' MOVEI 2,TS35RS ; get initial address of EBUF data
8168 011751' 242 00 0 00 777770 TS35N0: LSH -8 ; shift 4 bits
8169 011752' 303 02 0 00 011774' CAILE 2,TS35RS ; if past the first shift, insert
8170 011753' 661 00 0 00 036000 TLO 36000 ; the PLIN data into left 8 bits
8171 011754' 202 00 0 02 000000 MOVEM (2) ; save it
8172 011755' 350 00 0 00 000002 AOS 2 ; point to next address
8173 011756' 307 02 0 00 012000' CAIG 2,TS35RS+4 ; done yet?
8174 011757' 254 00 0 00 011751' JRST TS35N0 ; no - loop till done
8175 011760' 402 00 0 00 014061' SETZM TS35NM# ; initialize number of shifts
8176
8177 ; Read the next word
8178
8179 011761' 201 01 0 00 000200 MOVEI 1,200 ; get start address
8180 011762' 242 01 0 00 000001 LSH 1,1 ; position correctly
8181 011763' 260 17 0 00 011671* GO LDRAR ; load the register
8182 011764' 201 01 0 00 000010 MOVEI 1,MPRUN ; get MPRUN bit
8183 011765' 260 17 0 00 011677* GO LDCSR ; start up the port
8184 011766' 400 01 0 00 000000 SETZ 1, ; clear data
8185 011767' 260 17 0 00 011765* GO LDCSR ; stop the port
8186 011770' 263 17 0 00 000000 RTN ; return
8187
8188 ; Increment shift count
8189
8190 011771' 201 00 0 00 000010 TS35NN: MOVEI 8 ; get a 8
8191 011772' 272 00 0 00 014061' ADDM TS35NM ; add it
8192 011773' 263 17 0 00 000000 RTN ; return
8193
8194 011774' TS35RS: BLOCK 5 ; correct EBUF data
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 139
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1790
8195
8196 ; Error messages
8197
8198 012001' 240000 012003' MA35: CALL!TXNOT!MA35PN ; print data pattern ...
8199 012002' 000000000000# LAST!CALL!TXALL!TTPNT ; print test data
8200
8201 012003' 037 00 0 00 013336' MA35PN: TMSGC <Data > ; get data and
8202 012004' 200 01 0 00 014036' MOVE 1,T35BUF ; print it
8203 012005' 200 00 0 01 000000 MOVE (1)
8204 012006' 037 13 0 00 000000 PNTHW
8205 012007' 037 00 0 00 013502' TMSG < shifted down from PLIN >
8206 012010' 200 00 0 00 014061' MOVE TS35NM ; get shift count
8207 012011' 037 15 0 00 000000 PNTDEC
8208 012012' 037 00 0 00 013343' TMSG <. bits, result in EBUF>
8209 012013' 263 17 0 00 000000 RTN
8210
8211 ; Microcode - Shift 8 bits
8212
8213 012014' 010001 010000 T35M: MWORD <ADDR=100,JMAP,J=101,D=1> ; 100
8214 012015' 001000 000040
8215 012016' 010100 000226 MWORD <CONT,D=1,SELF,MGC=226> ; 101
8216 012017' 001000 003340
8217 012020' 010200 000200 MWORD <CONT,SD0,OR,B=4,D=2,SELM,MGC=200> ; 102
8218 012021' 732002 002340
8219 012022' 010351 000000 MWORD <JMAP,J=5100,D=1> ; 103
8220 012023' 001000 000040
8221
8222 ; Routine to read a word from CBUS into the formatter.
8223
8224 012024' 020002 010000 MWORD <ADDR=200,JMAP,J=201> ; 200
8225 012025' 000000 000040
8226 012026' 020102 030000 MWORD <CJP,J=203,D=1,CENA,CCCA> ; 201
8227 012027' 001400 000060
8228 012030' 020202 010000 MWORD <JMAP,J=201,D=1> ; 202
8229 012031' 001000 000040
8230 012032' 020300 000200 MWORD <CONT,D=1,SELF,MGC=200> ; 203
8231 012033' 001000 003340
8232 012034' 020400 000204 MWORD <CONT,D=1,SELF,MGC=204> ; 204
8233 012035' 001000 003340
8234 012036' 020500 000004 MWORD <CONT,D=1,SELC,MGC=4> ; 205
8235 012037' 001000 004340
8236 012040' 020600 000200 MWORD <CONT,SD0,OR,B=3,D=2,SELM,MGC=200> ; 206
8237 012041' 732001 402340
8238 012042' 020700 000000 MWORD <JZ> ; 207
8239 012043' 000000 000000
8240
8241 ; Initialization
8242
8243 012044' 100010 010020 MWORD <ADDR=1000,JMAP,J=1001,SELM,MGC=20> ; 1000
8244 012045' 000000 002040
8245 012046' 100100 000200 MWORD <CONT,D=1,SELC,MGC=200> ; 1001
8246 012047' 001000 004340
8247 012050' 100200 310017 MWORD <LDCT,J=31,SD0,OR,D=2,SKCN,MGC=017> ; 1002
8248 012051' 732000 240300
8249 012052' 100310 030000 MWORD <RPCT,J=1003,S0A,OR,D=5> ; 1003
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 139-1
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1791
8250 012053' 435000 000220
8251 012054' 100400 002040 MWORD <CONT,S0A,OR,D=1,OENA,SELM,MGC=40> ; 1004
8252 012055' 431000 002340
8253 012056' 100500 000006 MWORD <JZ,SD0,D=1,SELP,MGC=6> ; 1005
8254 012057' 701000 001000
8255 012060' 000000 000000 MWORD <ADDR=0,JZ> ; 0
8256 012061' 000000 000000
8257
8258 ; Initialization step
8259
8260 012062' 500050 010100 MWORD <ADDR=5000,JMAP,J=5001,SELC,MGC=100> ; 5000
8261 012063' 000000 004040
8262 012064' 500100 000020 MWORD <JZ,SELM,MGC=20> ; 5001
8263 012065' 000000 002000
8264
8265 ; Subroutine - Passed - Write 1 to bit 12 of CSR register
8266
8267 012066' 510000 000000 MWORD <ADDR=5100,CONT,SD0,AND,B=2,D=2> ; 5100
8268 012067' 742001 000340
8269 012070' 510100 000000 MWORD <CONT,S0B,PLUS,B=2,D=2,CRY> ; 5101
8270 012071' 302001 000740
8271 012072' 510200 260000 MWORD <LDCT,J=26> ; 5102
8272 012073' 000000 000300
8273 012074' 510351 030000 MWORD <RPCT,J=5103,SAB,PLUS,A=2,B=2,D=2> ; 5103
8274 012075' 102021 000220
8275 012076' 510400 002004 MWORD <CONT,S0A,A=2,OR,D=1,OENA,SELE,MGC=4> ; 5104
8276 012077' 431020 005340
8277 012100' 510551 070040 MWORD <CJP,J=5107,CENA,CCGC,D=1,SELE,MGC=40> ; 5105
8278 012101' 001400 015060
8279 012102' 510651 050000 MWORD <JMAP,J=5105,D=1> ; 5106
8280 012103' 001000 000040
8281 012104' 510700 000200 MWORD <CONT,S0A,A=1,OR,D=1,SELE,MGC=200> ; 5107
8282 012105' 431010 005340
8283 012106' 511051 102004 MWORD <JMAP,J=5110,S0A,A=4,OR,D=1,OENA,SELE,MGC=4> ; 5110
8284 012107' 431040 005040
8285 012110' 777777 777777 -1
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 140
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1792
8286
8287 ;#********************************************************************
8288 ;* Test 36 - Fmtr Down Shift 8 (from PLIN) Test - SELRHTNIB=1
8289 ;
8290 ; Description: Verify that the formatter can shift various data
8291 ; patterns down 4 bits at a time while inserting
8292 ; bits from the PLIN into the formatter. The data
8293 ; loaded into the PLIN initially is 360.
8294 ;
8295 ; Procedure: KL> Port Clear
8296 ; KL> Set up data transfer for data patterns
8297 ;
8298 ; UC> Read a data pattern over the CBUS
8299 ; UC> Load PLIN with 360
8300 ;
8301 ; UC> Shift down 4 bits
8302 ; UC> Read formatter contents and write into EBUF
8303 ; KL> Read EBUF and verify the data
8304 ; KL> Start up the ucode to shift again
8305 ;
8306 ; Repeat the above shifting then verifying EBUF
8307 ; contents 10 times, until the data becomes
8308 ; all zero.
8309 ;
8310 ; Do for data patterns: 0's
8311 ; 1's
8312 ; 525252,,525252
8313 ; 000000,,007777
8314 ; 000000,,007070
8315 ; 000000,,000707
8316 ;
8317 ; Failure: ---
8318 ;#********************************************************************
8319
8320 ; Test data
8321
8322 012111' 254 00 0 00 012117' TSTC36: JRST TG36 ; go start test
8323 012112' 100604 000036 CBUS!NDMP!NDCB!ZCBUS!36 ; test mask
8324 012113' 012275' 013507' T36M,,[ASCIZ ^Fmtr Down Shift 4 (from PLIN) Test - SELRHTNIB=1^]
8325 012114' 013263' 012716' [EXP C20,C12,MLAST!C8],,[EXP C4,MLAST!C2]
8326 012115' 000000 012372' TSTC37 ; failure test table
8327 012116' 777777 777777 -1 ; ...
8328
8329 ; Start test
8330
8331 012117' 201 00 0 00 000000' TG36: MOVEI Z9 ; get address of module start
8332 012120' 260 17 0 00 011637* GO TRACE ; handle trace output
8333 012121' 201 01 0 00 012275' MOVEI 1,T36M ; set up microcode address
8334 012122' 260 17 0 00 011641* GO TLOAD ; load/verify it
8335 012123' 263 17 0 00 000000 RTN ; failed - exit test
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 141
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1793
8336
8337 ; Initialization
8338
8339 012124' 400 15 0 00 000000 TL36: SETZ ERFLG, ; clear error flag
8340 012125' 260 17 0 00 011644* GO IPACLR ; clear port
8341 012126' 402 00 0 00 011645* SETZM TSTSUB ; initialize subtest number
8342 MOVSI [000000,,000000 ; get address of buffer
8343 777777,,777777 ; contents
8344 525252,,525252
8345 000000,,007777
8346 000000,,007070
8347 012127' 205 00 0 00 013330' 000000,,000707]
8348 012130' 541 00 0 00 011662* HRRI BUFF ; build the BLT pointer
8349 012131' 251 00 0 00 000000# BLT BUFF+5 ; insert data into buffer
8350
8351 ; First ensure the data transfer is reset
8352
8353 012132' 201 01 0 00 005000 MOVEI 1,5000 ; get start address
8354 012133' 242 01 0 00 000001 LSH 1,1 ; position correctly
8355 012134' 260 17 0 00 011763* GO LDRAR ; load the register
8356 012135' 201 01 0 00 000010 MOVEI 1,MPRUN ; get MPRUN bit
8357 012136' 260 17 0 00 011767* GO LDCSR ; start up the port
8358 012137' 400 01 0 00 000000 SETZ 1, ; clear data
8359 012140' 260 17 0 00 012136* GO LDCSR ; stop the port
8360
8361 ; Now generate CCW list
8362
8363 012141' 200 01 0 00 013210' MOVE 1,[CBUFSZ,,CBUF] ; get pointer to control buffer
8364 012142' 260 17 0 00 011661* GO CHINIT ; initialize software
8365 012143' 551 01 0 00 012130* HRRZI 1,BUFF ; buffer address
8366 012144' 201 02 0 00 000006 MOVEI 2,6 ; word count
8367 012145' 400 03 0 00 000000 SETZ 3, ; clear zero fill specifier
8368 012146' 260 17 0 00 011665* GO GENCCW ; generate a CCW list
8369 012147' 201 06 0 00 012172' MOVEI 6,TS36 ; get test execute table address
8370
8371 ; Start up the data transfer
8372
8373 012150' 201 01 0 00 001000 MOVEI 1,1000 ; get start address
8374 012151' 242 01 0 00 000001 LSH 1,1 ; position correctly
8375 012152' 260 17 0 00 012134* GO LDRAR ; load the register
8376 012153' 201 01 0 00 000010 MOVEI 1,MPRUN ; get MPRUN bit
8377 012154' 260 17 0 00 012140* GO LDCSR ; start up the port
8378 012155' 201 00 0 00 000001 MOVEI 1 ; set up delay of 1 ms
8379 012156' 260 17 0 00 011675* GO ODELAY ; wait a bit
8380 012157' 400 01 0 00 000000 SETZ 1, ; clear data
8381 012160' 260 17 0 00 012154* GO LDCSR ; stop the port
8382
8383 ; Loop on test execute table entries
8384
8385 012161' 260 17 0 00 011700* TA36: GO TEXEC ; execute table entry
8386 012162' 254 00 0 00 012171' JRST TX36 ; end of table
8387 012163' 254 00 0 00 012161' JRST TA36 ; keep looping after call
8388 012164' 474 15 0 00 000000 SETO ERFLG, ; error - EBUF data incorrect
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 142
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1794
8389
8390 ; Handle error printouts and scope looping
8391
8392 012165' 027 00 0 00 012262' SCOPER MA36 ; print error message
8393 012166' 254 00 0 00 012124' JRST TL36 ; loop on error
8394 012167' 254 00 0 00 012171' JRST TX36 ; altmode exit
8395 012170' 322 15 0 00 012161' JUMPE ERFLG,TA36 ; do next sstep table entry
8396
8397 ; End of test
8398
8399 012171' 263 17 0 00 000000 TX36: RTN ; return
8400
8401 ; Test Execute Table, as: (CMD,parameters)
8402
8403 012172' 140000 012222' TS36: TTABLE (TCALL,TS36IN) ; initialize stuff
8404 012173' 200000 012225' TS36L: TTABLE (TCALLC,TS36NE) ; set up next data pattern
8405
8406 ; Shifted 8 bits
8407
8408 012174' 140000 012252' TS36A: TTABLE (TCALL,TS36NN) ; increment shift count
8409 012175' 400000 000100 TTABLE (TSSTAR,100) ; start up port
8410 012176' 240001 012255' TTABLE (TCHECK,1,TS36RS) ; check if completed
8411 012177' 340000 000000 TTABLE (TEXIT) ; exit if error yet
8412
8413 ; Shifted 16 bits
8414
8415 012200' 140000 012252' TTABLE (TCALL,TS36NN) ; increment shift count
8416 012201' 400000 000100 TTABLE (TSSTAR,100) ; start up port
8417 012202' 240001 012256' TTABLE (TCHECK,1,TS36RS+1) ; check if completed
8418 012203' 340000 000000 TTABLE (TEXIT) ; exit if error yet
8419
8420 ; Shifted 24 bits
8421
8422 012204' 140000 012252' TTABLE (TCALL,TS36NN) ; increment shift count
8423 012205' 400000 000100 TTABLE (TSSTAR,100) ; start up port
8424 012206' 240001 012257' TTABLE (TCHECK,1,TS36RS+2) ; check if completed
8425 012207' 340000 000000 TTABLE (TEXIT) ; exit if error yet
8426
8427 ; Shifted 32 bits
8428
8429 012210' 140000 012252' TTABLE (TCALL,TS36NN) ; increment shift count
8430 012211' 400000 000100 TTABLE (TSSTAR,100) ; start up port
8431 012212' 240001 012260' TTABLE (TCHECK,1,TS36RS+3) ; check if completed
8432 012213' 340000 000000 TTABLE (TEXIT) ; exit if error yet
8433
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 143
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1795
8434
8435 ; Shifted 40 bits
8436
8437 012214' 140000 012252' TTABLE (TCALL,TS36NN) ; increment shift count
8438 012215' 400000 000100 TTABLE (TSSTAR,100) ; start up port
8439 012216' 240001 012261' TTABLE (TCHECK,1,TS36RS+4) ; check if completed
8440 012217' 340000 000000 TTABLE (TEXIT) ; exit if error yet
8441 012220' 300000 012173' TTABLE (TJRST,TS36L) ; loop till done
8442 012221' 000000 000000 TTABLE (TLAST)
8443
8444 ; Initialize stuff
8445
8446 012222' 201 00 0 00 000000# TS36IN: MOVEI BUFF-1 ; initialize buffer pointer
8447 012223' 202 00 0 00 014037' MOVEM T36BUF# ; ...
8448 012224' 263 17 0 00 000000 RTN ; return
8449
8450 ; Set up next data pattern
8451
8452 012225' 350 01 0 00 014037' TS36NE: AOS 1,T36BUF ; point to next data pattern
8453 012226' 307 01 0 00 000000# CAIG 1,BUFF+5 ; done yet?
8454 012227' 350 00 0 17 000000 AOS (P) ; no - set up proper return
8455 012230' 200 00 0 01 000000 MOVE (1) ; get data pattern
8456 012231' 201 02 0 00 012255' MOVEI 2,TS36RS ; get initial address of EBUF data
8457 012232' 242 00 0 00 777770 TS36N0: LSH -8 ; shift 4 bits
8458 012233' 303 02 0 00 012255' CAILE 2,TS36RS ; if past the first shift, insert
8459 012234' 661 00 0 00 740000 TLO 740000 ; the PLIN data into left 8 bits
8460 012235' 202 00 0 02 000000 MOVEM (2) ; save it
8461 012236' 350 00 0 00 000002 AOS 2 ; point to next address
8462 012237' 307 02 0 00 012261' CAIG 2,TS36RS+4 ; done yet?
8463 012240' 254 00 0 00 012232' JRST TS36N0 ; no - loop till done
8464 012241' 402 00 0 00 014062' SETZM TS36NM# ; initialize number of shifts
8465
8466 ; Read the next word
8467
8468 012242' 201 01 0 00 000200 MOVEI 1,200 ; get start address
8469 012243' 242 01 0 00 000001 LSH 1,1 ; position correctly
8470 012244' 260 17 0 00 012152* GO LDRAR ; load the register
8471 012245' 201 01 0 00 000010 MOVEI 1,MPRUN ; get MPRUN bit
8472 012246' 260 17 0 00 012160* GO LDCSR ; start up the port
8473 012247' 400 01 0 00 000000 SETZ 1, ; clear data
8474 012250' 260 17 0 00 012246* GO LDCSR ; stop the port
8475 012251' 263 17 0 00 000000 RTN ; return
8476
8477 ; Increment shift count
8478
8479 012252' 201 00 0 00 000010 TS36NN: MOVEI 8 ; get a 8
8480 012253' 272 00 0 00 014062' ADDM TS36NM ; add it
8481 012254' 263 17 0 00 000000 RTN ; return
8482
8483 012255' TS36RS: BLOCK 5 ; correct EBUF data
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 144
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1796
8484
8485 ; Error messages
8486
8487 012262' 240000 012264' MA36: CALL!TXNOT!MA36PN ; print data pattern ...
8488 012263' 000000000000# LAST!CALL!TXALL!TTPNT ; print test data
8489
8490 012264' 037 00 0 00 013336' MA36PN: TMSGC <Data > ; get data and
8491 012265' 200 01 0 00 014037' MOVE 1,T36BUF ; print it
8492 012266' 200 00 0 01 000000 MOVE (1)
8493 012267' 037 13 0 00 000000 PNTHW
8494 012270' 037 00 0 00 013502' TMSG < shifted down from PLIN >
8495 012271' 200 00 0 00 014062' MOVE TS36NM ; get shift count
8496 012272' 037 15 0 00 000000 PNTDEC
8497 012273' 037 00 0 00 013343' TMSG <. bits, result in EBUF>
8498 012274' 263 17 0 00 000000 RTN
8499
8500 ; Microcode - Shift 8 bits
8501
8502 012275' 010001 010000 T36M: MWORD <ADDR=100,JMAP,J=101,D=1> ; 100
8503 012276' 001000 000040
8504 012277' 010100 000226 MWORD <CONT,D=1,SELF,MGC=226> ; 101
8505 012300' 001000 003340
8506 012301' 010200 000200 MWORD <CONT,SD0,OR,B=4,D=2,SELM,MGC=200> ; 102
8507 012302' 732002 002340
8508 012303' 010351 000000 MWORD <JMAP,J=5100,D=1> ; 103
8509 012304' 001000 000040
8510
8511 ; Routine to read a word from CBUS into the formatter.
8512
8513 012305' 020002 010000 MWORD <ADDR=200,JMAP,J=201> ; 200
8514 012306' 000000 000040
8515 012307' 020102 030000 MWORD <CJP,J=203,D=1,CENA,CCCA> ; 201
8516 012310' 001400 000060
8517 012311' 020202 010000 MWORD <JMAP,J=201,D=1> ; 202
8518 012312' 001000 000040
8519 012313' 020300 000200 MWORD <CONT,D=1,SELF,MGC=200> ; 203
8520 012314' 001000 003340
8521 012315' 020400 000204 MWORD <CONT,D=1,SELF,MGC=204> ; 204
8522 012316' 001000 003340
8523 012317' 020500 000004 MWORD <CONT,D=1,SELC,MGC=4> ; 205
8524 012320' 001000 004340
8525 012321' 020600 000200 MWORD <CONT,SD0,OR,B=3,D=2,SELM,MGC=200> ; 206
8526 012322' 732001 402340
8527 012323' 020700 000000 MWORD <JZ> ; 207
8528 012324' 000000 000000
8529
8530 ; Initialization
8531
8532 012325' 100010 010020 MWORD <ADDR=1000,JMAP,J=1001,SELM,MGC=20> ; 1000
8533 012326' 000000 002040
8534 012327' 100100 000200 MWORD <CONT,D=1,SELC,MGC=200> ; 1001
8535 012330' 001000 004340
8536 012331' 100200 310360 MWORD <LDCT,J=31,SD0,OR,D=2,SKCN,MGC=360> ; 1002
8537 012332' 732000 240300
8538 012333' 100310 030000 MWORD <RPCT,J=1003,S0A,OR,D=5> ; 1003
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 144-1
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1797
8539 012334' 435000 000220
8540 012335' 100400 002040 MWORD <CONT,S0A,OR,D=1,OENA,SELM,MGC=40> ; 1004
8541 012336' 431000 002340
8542 012337' 100500 000006 MWORD <JZ,SD0,D=1,SELP,MGC=6> ; 1005
8543 012340' 701000 001000
8544 012341' 000000 000000 MWORD <ADDR=0,JZ> ; 0
8545 012342' 000000 000000
8546
8547 ; Initialization step
8548
8549 012343' 500050 010100 MWORD <ADDR=5000,JMAP,J=5001,SELC,MGC=100> ; 5000
8550 012344' 000000 004040
8551 012345' 500100 000020 MWORD <JZ,SELM,MGC=20> ; 5001
8552 012346' 000000 002000
8553
8554 ; Subroutine - Passed - Write 1 to bit 12 of CSR register
8555
8556 012347' 510000 000000 MWORD <ADDR=5100,CONT,SD0,AND,B=2,D=2> ; 5100
8557 012350' 742001 000340
8558 012351' 510100 000000 MWORD <CONT,S0B,PLUS,B=2,D=2,CRY> ; 5101
8559 012352' 302001 000740
8560 012353' 510200 260000 MWORD <LDCT,J=26> ; 5102
8561 012354' 000000 000300
8562 012355' 510351 030000 MWORD <RPCT,J=5103,SAB,PLUS,A=2,B=2,D=2> ; 5103
8563 012356' 102021 000220
8564 012357' 510400 002004 MWORD <CONT,S0A,A=2,OR,D=1,OENA,SELE,MGC=4> ; 5104
8565 012360' 431020 005340
8566 012361' 510551 070040 MWORD <CJP,J=5107,CENA,CCGC,D=1,SELE,MGC=40> ; 5105
8567 012362' 001400 015060
8568 012363' 510651 050000 MWORD <JMAP,J=5105,D=1> ; 5106
8569 012364' 001000 000040
8570 012365' 510700 000200 MWORD <CONT,S0A,A=1,OR,D=1,SELE,MGC=200> ; 5107
8571 012366' 431010 005340
8572 012367' 511051 102004 MWORD <JMAP,J=5110,S0A,A=4,OR,D=1,OENA,SELE,MGC=4> ; 5110
8573 012370' 431040 005040
8574 012371' 777777 777777 -1
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 145
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1798
8575
8576 ;#********************************************************************
8577 ;* Test 37 - Fmtr Ring Buffer Test
8578 ;
8579 ; Description: Verify that the formatter is capable of shifting
8580 ; down in a circular manner, retaining the data in
8581 ; the formatter.
8582 ;
8583 ; Procedure: KL> Port Clear
8584 ; KL> Set up data transfer for data patterns
8585 ;
8586 ; UC> Read a data pattern over the CBUS
8587 ; UC> Shift formatter up/down 8 bits to clear it
8588 ; UC> Load data into formatter
8589 ; UC> Shift down 4 bits (11 times)
8590 ; UC> Read formatter contents and verify same
8591 ; as it was originally
8592 ; UC> Repeat the above 2 steps 512 times
8593 ;
8594 ; Repeat the above 6 steps 6 times, for each data
8595 ; pattern.
8596 ;
8597 ; Do for data patterns: 0's
8598 ; 1's
8599 ; 525252,,525252
8600 ; 000000,,007777
8601 ; 000000,,007070
8602 ; 000000,,000707
8603 ;
8604 ; Failure: ---
8605 ;#********************************************************************
8606
8607 ; Test data
8608
8609 012372' 254 00 0 00 012377' TSTC37: JRST TG37 ; go start test
8610 012373' 100604 000037 CBUS!NDMP!NDCB!ZCBUS!37 ; test mask
8611 012374' 012536' 013545' T37M,,[ASCIZ ^Fmtr Ring Buffer Test^]
8612 012375' 013263' 012716' [EXP C20,C12,MLAST!C8],,[EXP C4,MLAST!C2]
8613 012376' 777777 777777 -1 ; failure test table
8614
8615 ; Start test
8616
8617 012377' 201 00 0 00 000000' TG37: MOVEI Z9 ; get address of module start
8618 012400' 260 17 0 00 012120* GO TRACE ; handle trace output
8619 012401' 201 01 0 00 012536' MOVEI 1,T37M ; set up microcode address
8620 012402' 260 17 0 00 012122* GO TLOAD ; load/verify it
8621 012403' 263 17 0 00 000000 RTN ; failed - exit test
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 146
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1799
8622
8623 ; Initialization
8624
8625 012404' 400 15 0 00 000000 TL37: SETZ ERFLG, ; clear error flag
8626 012405' 260 17 0 00 012125* GO IPACLR ; clear port
8627 012406' 402 00 0 00 012126* SETZM TSTSUB ; initialize subtest number
8628 MOVSI [000000,,000000 ; get address of buffer
8629 777777,,777777 ; contents
8630 525252,,525252
8631 000000,,007777
8632 000000,,007070
8633 012407' 205 00 0 00 013330' 000000,,000707]
8634 012410' 541 00 0 00 012143* HRRI BUFF ; build the BLT pointer
8635 012411' 251 00 0 00 000000# BLT BUFF+5 ; insert data into buffer
8636
8637 ; First ensure the data transfer is reset
8638
8639 012412' 201 01 0 00 005000 MOVEI 1,5000 ; get start address
8640 012413' 242 01 0 00 000001 LSH 1,1 ; position correctly
8641 012414' 260 17 0 00 012244* GO LDRAR ; load the register
8642 012415' 201 01 0 00 000010 MOVEI 1,MPRUN ; get MPRUN bit
8643 012416' 260 17 0 00 012250* GO LDCSR ; start up the port
8644 012417' 201 00 0 00 000001 MOVEI 1 ; wait a little bit
8645 012420' 260 17 0 00 012156* GO ODELAY ; (1 millisecond)
8646 012421' 400 01 0 00 000000 SETZ 1, ; clear data
8647 012422' 260 17 0 00 012416* GO LDCSR ; stop the port
8648
8649 ; Now generate CCW list
8650
8651 012423' 200 01 0 00 013210' MOVE 1,[CBUFSZ,,CBUF] ; get pointer to control buffer
8652 012424' 260 17 0 00 012142* GO CHINIT ; initialize software
8653 012425' 551 01 0 00 012410* HRRZI 1,BUFF ; buffer address
8654 012426' 201 02 0 00 000006 MOVEI 2,6 ; word count
8655 012427' 400 03 0 00 000000 SETZ 3, ; clear zero fill specifier
8656 012430' 260 17 0 00 012146* GO GENCCW ; generate a CCW list
8657 012431' 201 06 0 00 012477' MOVEI 6,TS37 ; get test execute table address
8658
8659 ; Start up the data transfer
8660
8661 012432' 201 01 0 00 001000 MOVEI 1,1000 ; get start address
8662 012433' 242 01 0 00 000001 LSH 1,1 ; position correctly
8663 012434' 260 17 0 00 012414* GO LDRAR ; load the register
8664 012435' 201 01 0 00 000010 MOVEI 1,MPRUN ; get MPRUN bit
8665 012436' 260 17 0 00 012422* GO LDCSR ; start up the port
8666 012437' 201 00 0 00 000001 MOVEI 1 ; wait a little bit
8667 012440' 260 17 0 00 012420* GO ODELAY ; (1 millisecond)
8668 012441' 400 01 0 00 000000 SETZ 1, ; clear data
8669 012442' 260 17 0 00 012436* GO LDCSR ; stop the port
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 147
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1800
8670
8671 ; Loop on test execute table entries
8672
8673 012443' 260 17 0 00 012161* TA37: GO TEXEC ; execute table entry
8674 012444' 254 00 0 00 012476' JRST TX37 ; end of table
8675 012445' 254 00 0 00 012443' JRST TA37 ; keep looping after call
8676 012446' 474 15 0 00 000000 SETO ERFLG, ; error - EBUF data incorrect
8677
8678 ; Get correct/actual data (R3/R4)
8679
8680 012447' 260 17 0 00 012405* GO IPACLR ; do a 'port clear'
8681 012450' 201 01 0 00 002000 MOVEI 1,2000 ; set start address to
8682 012451' 242 01 0 00 000001 LSH 1,1 ; 2000
8683 012452' 260 17 0 00 012434* GO LDRAR
8684 012453' 201 01 0 00 000010 MOVEI 1,MPRUN
8685 012454' 260 17 0 00 012442* GO LDCSR ; start the port
8686 012455' 201 01 0 00 200000 MOVEI 1,TSTEBF
8687 012456' 260 17 0 00 012454* GO LDCSR ; stop the port
8688 012457' 260 17 0 00 007021* GO RDEBUF ; read EBUF data
8689 012460' 202 01 0 00 000000* MOVEM 1,TEBUFC ; save it
8690 012461' 201 01 0 00 002002 MOVEI 1,2002 ; set start address to
8691 012462' 242 01 0 00 000001 LSH 1,1 ; 2002
8692 012463' 260 17 0 00 012452* GO LDRAR
8693 012464' 201 01 0 00 000010 MOVEI 1,MPRUN
8694 012465' 260 17 0 00 012456* GO LDCSR ; start the port
8695 012466' 201 01 0 00 200000 MOVEI 1,TSTEBF
8696 012467' 260 17 0 00 012465* GO LDCSR ; stop the port
8697 012470' 260 17 0 00 012457* GO RDEBUF ; read EBUF data
8698 012471' 202 01 0 00 000000* MOVEM 1,TEBUFA ; save it
8699
8700 ; Handle error printouts and scope looping
8701
8702 012472' 027 00 0 00 012525' SCOPER MA37 ; print error message
8703 012473' 254 00 0 00 012404' JRST TL37 ; loop on error
8704 012474' 254 00 0 00 012476' JRST TX37 ; altmode exit
8705 012475' 322 15 0 00 012443' JUMPE ERFLG,TA37 ; do next sstep table entry
8706
8707 ; End of test
8708
8709 012476' 263 17 0 00 000000 TX37: RTN ; return
8710
8711 ; Test Execute Table, as: (CMD,parameters)
8712
8713 012477' 140000 012506' TS37: TTABLE (TCALL,TS37IN) ; init data pattern
8714 012500' 200000 012510' TS37A: TTABLE (TCALLC,TS37CH) ; set up next data pattern
8715 012501' 400000 000100 TTABLE (TSSTAR,100) ; start up port
8716 012502' 240005 000000 TTABLE (TCHECK,5,0) ; check if completed
8717 012503' 340000 000000 TTABLE (TEXIT) ; exit if error yet
8718 012504' 300000 012500' TTABLE (TJRST,TS37A) ; loop till done
8719 012505' 000000 000000 TTABLE (TLAST)
8720
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 148
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1801
8721
8722 012506' 476 00 0 00 014063' TS37IN: SETOM TS37DA# ; init word number
8723 012507' 263 17 0 00 000000 RTN ; return
8724
8725 012510' 350 01 0 00 014063' TS37CH: AOS 1,TS37DA ; point to next word number
8726 012511' 305 01 0 00 000006 CAIGE 1,6 ; done yet?
8727 012512' 350 00 0 17 000000 AOS (P) ; no - set up proper return
8728
8729 ; Read the next word
8730
8731 012513' 201 01 0 00 000200 MOVEI 1,200 ; get start address
8732 012514' 242 01 0 00 000001 LSH 1,1 ; position correctly
8733 012515' 260 17 0 00 012463* GO LDRAR ; load the register
8734 012516' 201 01 0 00 000010 MOVEI 1,MPRUN ; get MPRUN bit
8735 012517' 260 17 0 00 012467* GO LDCSR ; start up the port
8736 012520' 201 00 0 00 000001 MOVEI 1 ; wait a little bit
8737 012521' 260 17 0 00 012440* GO ODELAY ; (1 millisecond)
8738 012522' 400 01 0 00 000000 SETZ 1, ; clear data
8739 012523' 260 17 0 00 012517* GO LDCSR ; stop the port
8740 012524' 263 17 0 00 000000 RTN ; return
8741
8742 ; Error messages
8743
8744 012525' 240000 012527' MA37: CALL!TXNOT!MA37PN ; print data pattern ...
8745 012526' 000000000000# LAST!CALL!TXALL!TTPNT ; print test data
8746
8747 012527' 037 00 0 00 013336' MA37PN: TMSGC <Data > ; get data and
8748 012530' 200 01 0 00 014063' MOVE 1,TS37DA ; print it
8749 012531' 200 00 0 01 012425* MOVE BUFF(1)
8750 012532' 037 13 0 00 000000 PNTHW
8751 012533' 037 00 0 00 013552' TMSG < changed while being shifted down continuously.>
8752 012534' 037 00 0 00 013564' TMSGC <Result in EBUF.>
8753 012535' 263 17 0 00 000000 RTN
8754
8755 ; Microcode
8756
8757 012536' 010001 010000 T37M: MWORD <ADDR=100,JMAP,J=101,S0B,AND,B=5,D=2> ; 100
8758 012537' 342002 400040
8759 012540' 010110 000000 MWORD <LDCT,J=1000> ; 101
8760 012541' 000000 000300
8761 012542' 010200 000204 MWORD <CONT,S0B,PLUS,B=5,D=2,CRY,SELF,MGC=204> ; 102
8762 012543' 302002 403740
8763 012544' 010300 000104 MWORD <CONT,SELF,MGC=104> ; 103
8764 012545' 000000 003340
8765 012546' 010400 000204 MWORD <CONT,SELF,MGC=204> ; 104
8766 012547' 000000 003340
8767 012550' 010500 000104 MWORD <CONT,SELF,MGC=104> ; 105
8768 012551' 000000 003340
8769 012552' 010600 000204 MWORD <CONT,SELF,MGC=204> ; 106
8770 012553' 000000 003340
8771 012554' 010700 000104 MWORD <CONT,SELF,MGC=104> ; 107
8772 012555' 000000 003340
8773 012556' 011000 000204 MWORD <CONT,SELF,MGC=204> ; 110
8774 012557' 000000 003340
8775 012560' 011100 000104 MWORD <CONT,SELF,MGC=104> ; 111
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 148-1
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1802
8776 012561' 000000 003340
8777 012562' 011200 000200 MWORD <CONT,SD0,OR,B=4,D=2,SELM,MGC=200> ; 112
8778 012563' 732002 002340
8779 012564' 011301 150000 MWORD <CJP,J=115,SAB,A=3,B=4,D=1,SMIN,CRY,CENA,CCFZ> ; 113
8780 012565' 111432 020460
8781 012566' 011452 000000 MWORD <JMAP,J=5200,D=1> ; 114
8782 012567' 001000 000040
8783 012570' 011501 020000 MWORD <RPCT,J=102> ; 115
8784 012571' 000000 000220
8785 012572' 011651 000000 MWORD <JMAP,J=5100,D=1> ; 116
8786 012573' 001000 000040
8787
8788 ; Routine to read a word from CBUS into the formatter.
8789
8790 012574' 020002 010000 MWORD <ADDR=200,JMAP,J=201> ; 200
8791 012575' 000000 000040
8792 012576' 020102 030000 MWORD <CJP,J=203,D=1,CENA,CCCA> ; 201
8793 012577' 001400 000060
8794 012600' 020202 010000 MWORD <JMAP,J=201,D=1> ; 202
8795 012601' 001000 000040
8796 012602' 020300 000200 MWORD <CONT,D=1,SELF,MGC=200> ; 203
8797 012603' 001000 003340
8798 012604' 020400 000204 MWORD <CONT,D=1,SELF,MGC=204> ; 204
8799 012605' 001000 003340
8800 012606' 020500 000004 MWORD <CONT,D=1,SELC,MGC=4> ; 205
8801 012607' 001000 004340
8802 012610' 020600 000200 MWORD <CONT,SD0,OR,B=3,D=2,SELM,MGC=200> ; 206
8803 012611' 732001 402340
8804 012612' 020700 000000 MWORD <JZ,S0A,OR,A=3,B=6,D=2> ; 207
8805 012613' 432033 000000
8806
8807 ; Initialization
8808
8809 012614' 100010 010020 MWORD <ADDR=1000,JMAP,J=1001,SELM,MGC=20> ; 1000
8810 012615' 000000 002040
8811 012616' 100100 000200 MWORD <JZ,D=1,SELC,MGC=200> ; 1001
8812 012617' 001000 004000
8813 012620' 000000 000000 MWORD <ADDR=0,JZ> ; 0
8814 012621' 000000 000000
8815
8816 ; Read correct/actual data
8817
8818 012622' 200020 012004 MWORD <ADDR=2000,JMAP,J=2001,S0A,A=3,OR,D=2,OENA,SELE,MGC=4>
8819 012623' 432030 005040
8820 012624' 200120 010000 MWORD <JMAP,J=2001> ; 2001
8821 012625' 000000 000040
8822 012626' 200220 032004 MWORD <JMAP,J=2003,S0A,A=3,OR,D=2,OENA,SELE,MGC=4> ; 2002
8823 012627' 432030 005040
8824 012630' 200320 030000 MWORD <JMAP,J=2003> ; 2003
8825 012631' 000000 000040
8826
8827 ; Initialization step
8828
8829 012632' 500050 010100 MWORD <ADDR=5000,JMAP,J=5001,SELC,MGC=100> ; 5000
8830 012633' 000000 004040
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 148-2
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1803
8831 012634' 500100 000020 MWORD <JZ,SELM,MGC=20> ; 5001
8832 012635' 000000 002000
8833
8834 ; Subroutine - Passed - Write 1 to bit 12 of CSR register
8835
8836 012636' 510000 000000 MWORD <ADDR=5100,CONT,SD0,AND,B=2,D=2> ; 5100
8837 012637' 742001 000340
8838 012640' 510100 000000 MWORD <CONT,S0B,PLUS,B=2,D=2,CRY> ; 5101
8839 012641' 302001 000740
8840 012642' 510200 260000 MWORD <LDCT,J=26> ; 5102
8841 012643' 000000 000300
8842 012644' 510351 030000 MWORD <RPCT,J=5103,SAB,PLUS,A=2,B=2,D=2> ; 5103
8843 012645' 102021 000220
8844 012646' 510400 002004 MWORD <CONT,S0A,A=2,OR,D=1,OENA,SELE,MGC=4> ; 5104
8845 012647' 431020 005340
8846 012650' 510551 070040 MWORD <CJP,J=5107,CENA,CCGC,D=1,SELE,MGC=40> ; 5105
8847 012651' 001400 015060
8848 012652' 510651 050000 MWORD <JMAP,J=5105,D=1> ; 5106
8849 012653' 001000 000040
8850 012654' 510700 000200 MWORD <CONT,S0A,A=1,OR,D=1,SELE,MGC=200> ; 5107
8851 012655' 431010 005340
8852 012656' 511051 102004 MWORD <JMAP,J=5110,S0A,OR,A=4,D=1,OENA,SELE,MGC=4> ; 5110
8853 012657' 431040 005040
8854
8855 ; Subroutine - Failed - Write 1 to bit 13 of CSR register
8856
8857 012660' 520000 000000 MWORD <ADDR=5200,CONT,SD0,AND,B=2,D=2> ; 5200
8858 012661' 742001 000340
8859 012662' 520100 000000 MWORD <CONT,S0B,PLUS,B=2,D=2,CRY> ; 5201
8860 012663' 302001 000740
8861 012664' 520200 250000 MWORD <LDCT,J=25> ; 5202
8862 012665' 000000 000300
8863 012666' 520352 030000 MWORD <RPCT,J=5203,SAB,PLUS,A=2,B=2,D=2> ; 5203
8864 012667' 102021 000220
8865 012670' 520400 002004 MWORD <CONT,S0A,A=2,OR,D=1,OENA,SELE,MGC=4> ; 5204
8866 012671' 431020 005340
8867 012672' 520552 070040 MWORD <CJP,J=5207,CENA,CCGC,D=1,SELE,MGC=40> ; 5205
8868 012673' 001400 015060
8869 012674' 520652 050000 MWORD <JMAP,J=5205,D=1> ; 5206
8870 012675' 001000 000040
8871 012676' 520700 000200 MWORD <CONT,S0A,A=1,OR,D=1,SELE,MGC=200> ; 5207
8872 012677' 431010 005340
8873 012700' 521052 102004 MWORD <JMAP,J=5210,S0A,OR,A=4,D=1,OENA,SELE,MGC=4> ; 5210
8874 012701' 431040 005040
8875 012702' 777777 777777 -1
8876
8877
8878 ;#********************************************************************
8879 ; End of CBUS Tests (Part 1)
8880 ;#********************************************************************
8881
8882 XLIST
8883
NO ERRORS DETECTED
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page 148-3
DFPTA9 MAC 11-Mar-83 15:06 CBUS MODULE TESTS SEQ 1804
PROGRAM BREAK IS 014065
CPU TIME USED 07:33.881
185P CORE USED
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page S-1
DFPTA9 MAC 11-Mar-83 15:06 SYMBOL TABLE SEQ 1805
BBPNT 000000 ext IPACLR 012447' ext MA37 012525' T16M 004542'
BEXEC 003056' ext IPASRT 007000' ext MA37PN 012527' T17BUF 014021'
BUFCOM 002642' ext LAST 010000 000000 spd MA4 001216' T17M 005053'
BUFF 012531' ext LDCSR 012523' ext MA5 001370' T1M 000152'
BUFGEN 000000 ext LDRAR 012515' ext MA5CH0 001406' T20BUF 014022'
C1 000054 spd MA1 000150' MA5CHE 001373' T20M 005365'
C12 000067 spd MA10 002632' MA6 001742' T21BUF 014023'
C13 000070 spd MA10CH 002635' MA6CH0 001760' T21M 005645'
C14 000071 spd MA11 003072' MA6CH1 002006' T22BUF 014024'
C15 000072 spd MA12 003155' MA6CHE 001745' T22M 006124'
C16 000073 spd MA12P1 003157' MA7 002321' T23BUF 014025'
C17 000074 spd MA12PN 003171' MA7CHE 002324' T23M 006402'
C18 000075 spd MA13 003414' MB12 003167' T24BUF 014026'
C19 000076 spd MA13PN 003416' MB25 007041' T24M 006663'
C2 000055 spd MA14 003713' MBCN 000016 T25M 007047'
C20 000077 spd MA14PN 003715' MBUS 010000 000000 spd T26BUF 014027'
C21 000100 spd MA15 004216' MLAST 400000 000000 spd T26M 007305'
C22 000101 spd MA15PN 004220' MPRUN 000010 spd T27BUF 014030'
C23 000102 spd MA16 004527' MSG 100000 000000 spd T27M 007613'
C24 000103 spd MA16PN 004531' NDCB 000200 000000 spd T2M 000717'
C3 000056 spd MA17 005040' NDMP 000400 000000 spd T30BUF 014031'
C4 000057 spd MA17PN 005042' ODELAY 012521' ext T30M 010127'
C5 000060 spd MA2 000715' P 000017 T31BUF 014032'
C8 000063 spd MA20 005352' PAT 000014 T31M 010445'
CALL 200000 000000 spd MA20PN 005354' PATBUF 001674' ext T32BUF 014033'
CBUF 013210' ext MA21 005632' PDEC 006000 000000 T32M 010763'
CBUFSZ 000315 spd MA21PN 005634' PNTDEC 037640 000000 T33BUF 014034'
CBUS 100000 000000 spd MA22 006111' PNTHW 037540 000000 T33M 011247'
CCALL 000005 spd MA22PN 006113' PNTMSG 037000 000000 T34BUF 014035'
CCALLC 000006 spd MA23 006367' PORTCI 001710' ext T34M 011532'
CCOMP 000010 spd MA23PN 006371' PORTNI 001706' ext T35BUF 014036'
CCPNT 000000 ext MA24 006650' RDCSR 007031' ext T35M 012014'
CDERR 002643' ext MA24PN 006652' RDEBUF 012470' ext T36BUF 014037'
CEBUFA 013105' ext MA25 007027' RTN 263740 000000 T36M 012275'
CEXEC 002571' ext MA25P1 007031' SAVCSR 014010' T37M 012536'
CEXIT 000012 spd MA25PN 007043' SAVDA1 014011' T3M 001123'
CHINIT 012424' ext MA26 007272' SAVDA2 014012' T4M 001220'
CJRST 000011 spd MA26PN 007274' SAVDAT 014013' T5M 001453'
CLAST 000000 spd MA27 007600' SAVNUM 014014' T6M 002022'
CLEN 013102' ext MA27PN 007602' SCOPER 027000 000000 T6MM 001717'
CPAT 002641' ext MA3 001121' SCOSW 000000 ext T7M 002334'
CRAMPE 004000 000000 spd MA30 010114' SDATA 006777' ext TA1 000022'
CSETRD 000001 spd MA30PN 010116' SNEXT 006775' ext TA10 002570'
CSETRW 000003 spd MA31 010432' SSLAST 000000 spd TA11 003056'
CSETWR 000002 spd MA31PN 010434' SSSTRT 000001 spd TA12 003117'
CSRPNT 007037' ext MA32 010750' T10M 002645' TA13 003262'
CSTART 000004 spd MA32PN 010752' T11M 003074' TA14 003563'
CSTATF 001715' ext MA33 011234' T12M 003175' TA15 004063'
CWAIT 000007 spd MA33PN 011236' T13BUF 014015' TA16 004376'
E1 000001 spd MA34 011517' T13M 003427' TA17 004707'
E4 000004 spd MA34PN 011521' T14BUF 014016' TA2 000657'
EBUSPE 004000 spd MA35 012001' T14M 003726' TA20 005217'
ERFLG 000015 MA35PN 012003' T15BUF 014017' TA21 005530'
GENCCW 012430' ext MA36 012262' T15M 004231' TA22 006011'
GO 260740 000000 MA36PN 012264' T16BUF 014020' TA23 006267'
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page S-2
DFPTA9 MAC 11-Mar-83 15:06 SYMBOL TABLE SEQ 1806
TA24 006546' TG36 012117' TS14 003574' TS22 006022'
TA25 006771' TG37 012377' TS14A 003576' TS22A 006024'
TA26 007135' TG4 001162' TS14IN 003650' TS22IN 006052'
TA27 007446' TG5 001305' TS14L 003575' TS22L 006023'
TA3 001066' TG6 001621' TS14N0 003660' TS22N0 006062'
TA30 007762' TG7 002225' TS14NE 003653' TS22NE 006055'
TA31 010300' TJRST 000006 spd TS14NM 014041' TS22NM 014047'
TA32 010616' TL1 000016' TS14NN 003676' TS22NN 006101'
TA33 011133' TL10 002533' TS14RS 003701' TS22RS 006104'
TA34 011416' TL11 003052' TS15 004074' TS23 006300'
TA35 011700' TL13 003225' TS15A 004076' TS23A 006302'
TA36 012161' TL14 003526' TS15IN 004150' TS23IN 006330'
TA37 012443' TL15 004026' TS15L 004075' TS23L 006301'
TA4 001174' TL16 004341' TS15N0 004160' TS23N0 006340'
TA5 001316' TL17 004652' TS15NE 004153' TS23NE 006333'
TA6 001632' TL2 000653' TS15NM 014042' TS23NM 014050'
TA7 002267' TL20 005162' TS15NN 004201' TS23NN 006357'
TB10 002571' TL21 005473' TS15RS 004204' TS23RS 006362'
TB3 001067' TL22 005754' TS16 004407' TS24 006557'
TB4 001175' TL23 006232' TS16A 004411' TS24A 006561'
TB5 001317' TL24 006511' TS16IN 004463' TS24IN 006607'
TB6 001633' TL26 007100' TS16L 004410' TS24L 006560'
TB7 002270' TL27 007411' TS16N0 004473' TS24N0 006617'
TCALL 000003 spd TL3 001062' TS16NE 004466' TS24NE 006612'
TCALLC 000004 spd TL30 007725' TS16NM 014043' TS24NM 014051'
TCHECK 000005 spd TL31 010243' TS16NN 004512' TS24NN 006640'
TEBUFA 012471' ext TL32 010561' TS16RS 004515' TS24RS 006643'
TEBUFC 012460' ext TL33 011076' TS17 004720' TS26 007146'
TEXEC 012443' ext TL34 011361' TS17A 004722' TS26A 007150'
TEXIT 000007 spd TL35 011643' TS17IN 004774' TS26IN I42?2267 M
VO1I 200053/ ItL;6I 292166/ ItA97 004 9'I V[26l 00347'
\g30 I422527 \l!? I432407 \S3?N0 005424'I V[26n2 04%233
\g36 I424337 \l_IDI 29244 / m|v T[>6 !?3 T{?oy $! y @y=A 0>~0 _y}_/0y>?0!Pd |_0 =A 0}?? _2A y ! {{ }{|_?y 6>a y y {{ /T{>`N =` }{ >/y |_0=A 0<` =AT> y ?0}} /T{> y >?0 /T{>`y 2{! y~?^ =A 0=~0 =AT? y ?0& /T{>oy & ! y~0N =A 0}! _2~_ y ! { }{|_0" =` }<ay |_0 yB /0 &=_p{<^`y { ?a y~?^}=A y ?0 =AT! y "} /T{>p} =` 2?/y |_0 A /0y<`}=_p{ oy }! y @"=A 0=` _y C y >?2{ /T{>o^ =` }{?/y |_0_/0 ??6=_/~0y <a ya y 0?a y~?R{=A 0}>0 _{ =` yy y _>_/0 ?`{=_p{y /0 >0{=_p{ /0 =0y=_p{{ /0 ?a{=_/~?y $ <a yay =` {?/y |_0y =A 0}=~0 _{ A /0 ?a}=_/a y ! }} /T{!@N =` {{<ay |_0yyB /0 =0y=_p{{<_oy ! 0?a y @{ =A 0?~0 _y{@ /0 >0$=_p{=@ y ??4 /T{>`y <a y @{y=A y ?0 _y{B> y ??} /T{?` =` } !y |_?0 /0y =_/?y ! }}<a yaN=A 0{?? _2y~_ y ?? /T{>o} =` =~/y _{ /0y y=_p{y?^oy ! ! y~?^}=A y >0 _{ ~A y >?} }{|_?4 =`y{=~/y |_0{B /0 ?0=_p{=^oy 6! y0N=A y ! =AT! y ! { /T{!P{ =` { >/y |_0y_/0 =`}=_p{{<@Py ! y ! y>^/} A } @@ =aO8y??yy 4 <a}C> ( O} { oPA! } Cy}}}y>0}{ > y{}AO OR}~ y<~ y<~ y<~ y<~ y<~ y<~ y<~ y<~ y<~ y<~ y<~ y<~ y<~ y<`P}y<a ?y ! {y! y?y =`"500' TSTC4 001152' ent .LAND 000000 spd
TS31A 010313' TS37CH 012510' TSTC40 000000 ext .LB 000000 spd
TS31IN 010365' TS37DA 014063' TSTC41 000000 ext .LBAD 000000 spd
TS31L 010312' TS37IN 012506' TSTC5 001275' ent .LCCCA 000000 spd
TS31N0 010375' TS3A 001101' TSTC6 001612' ent .LCCCE 000000 spd
TS31NE 010370' TS3EBU 014064' TSTC7 002215' ent .LCCCP 000000 spd
TS31NM 014055' TS3INC 001112' TSTEBF 200000 spd .LCCER 000000 spd
TS31NN 010415' TS3SEE 001116' TSTSUB 012406' ext .LCCFZ 000000 spd
TS31RS 010420' TS3SET 001110' TTPNT 000000 ext .LCCGC 000000 spd
TS32 010627' TS4 001206' TX1 000032' .LCCLW 000000 spd
TS32A 010631' TS5 001330' TX10 002601' .LCCMB 000000 spd
TS32IN 010703' TS5A 001331' TX11 003066' .LCENA 000000 spd
TS32L 010630' TS5CHE 001356' TX12 003154' .LCJP 000000 spd
TS32N0 010713' TS5INC 001346' TX13 003272' .LCJS 000000 spd
TS32NE 010706' TS5SET 001340' TX14 003573' .LCONT 000000 spd
TS32NM 014056' TS6 001644' TX15 004073' .LCRTN 000000 spd
TS32NN 010733' TS6A 001645' TX16 004406' .LCRY 000000 spd
TS32RS 010736' TS6CHE 001730' TX17 004717' .LD 000000 spd
TS33 011144' TS6INC 001666' TX2 000667' .LJ 010000 spd
TS33A 011146' TS6S 001647' TX20 005227' .LJMAP 000000 spd
TS33IN 011174' TS6SET 001654' TX21 005540' .LJZ 000000 spd
TS33L 011145' TS7 002301' TX22 006021' .LLDCT 000000 spd
TS33N0 011204' TS7A 002302' TX23 006277' .LMGC 000001 spd
TS33NE 011177' TS7IN 002314' TX24 006556' .LOENA 002000 spd
TS33NM 014057' TS7SE 002311' TX25 007026' .LOR 000000 spd
TS33NN 011224' TSLOD1 001707' ext TX26 007145' .LPLUS 000000 spd
TS33RS 011227' TSLOD2 001711' ext TX27 007456' .LRPCT 000000 spd
TS34 011427' TSSTAR 000010 spd TX3 001077' .LS0A 000000 spd
TS34A 011431' TSTC1 000000' ent TX30 007772' .LS0B 000000 spd
TS34IN 011457' TSTC10 002517' ent TX31 010310' .LSAB 000000 spd
TS34L 011430' TSTC11 003034' ent TX32 010626' .LSD0 000000 spd
TS34N0 011467' TSTC12 003101' ent TX33 011143' .LSELC 000000 spd
TS34NE 011462' TSTC13 003210' ent TX34 011426' .LSELE 000000 spd
TS34NM 014060' TSTC14 003510' ent TX35 011710' .LSELF 000000 spd
TS34NN 011507' TSTC15 004007' ent TX36 012171' .LSELM 000000 spd
TS34RS 011512' TSTC16 004322' ent TX37 012476' .LSELP 000000 spd
TS35 011711' TSTC17 004633' ent TX4 001205' .LSKCN 000000 spd
TS35A 011713' TSTC2 000637' ent TX5 001327' .LSMIN 000000 spd
TS35IN 011741' TSTC20 005144' ent TX6 001643' .LXNOR 000000 spd
TS35L 011712' TSTC21 005456' ent TX7 002300' .LXOR 000000 spd
TS35N0 011751' TSTC22 005736' ent TXALL 060000 000000 spd .MA 000017 spd
TS35NE 011744' TSTC23 006215' ent TXNOT 040000 000000 spd .MAND 000007 spd
TS35NM 014061' TSTC24 006473' ent UDEBUG 002546' ext .MB 000017 spd
TS35NN 011771' TSTC25 006754' ent USER 030037 .MBAD 000001 spd
TS35RS 011774' TSTC26 007062' ent Z9 000000' .MCCCA 000037 spd
TS36 012172' TSTC27 007372' ent ZCBUS 000004 000000 spd .MCCCE 000037 spd
TS36A 012174' TSTC3 001044' ent $ARG2 000004 .MCCCP 000037 spd
TS36IN 012222' TSTC30 007710' ent $B 000043 .MCCER 000037 spd
TS36L 012173' TSTC31 010224' ent $CHR 554743 .MCCFZ 000037 spd
TS36N0 012232' TSTC32 010542' ent $GARG 000001 .MCCGC 000037 spd
TS36NE 012225' TSTC33 011060' ent %ADDR 005211 spd .MCCLW 000037 spd
TS36NM 014062' TSTC34 011344' ent %ML 521052 102004 spd .MCCMB 000037 spd
TS36NN 012252' TSTC35 011627' ent %MR 431040 005040 spd .MCENA 000001 spd
TS36RS 012255' TSTC36 012111' ent .LA 000000 spd .MCJP 000017 spd
TS37 012477' TSTC37 012372' ent .LADDR 000100 000000 spd .MCJS 000017 spd
.MAIN MACRO %53A(1152) 10:40 16-Oct-84 Page S-4
DFPTA9 MAC 11-Mar-83 15:06 SYMBOL TABLE SEQ 1808
.MCONT 000017 spd .RS0B 300000 000000 spd
.MCRTN 000017 spd .RSAB 100000 000000 spd
.MCRY 000001 spd .RSD0 700000 000000 spd
.MD 000007 spd .RSELC 004000 spd
.MJ 007777 spd .RSELE 005000 spd
.MJMAP 000017 spd .RSELF 003000 spd
.MJZ 000017 spd .RSELM 002000 spd
.MLDCT 000017 spd .RSELP 001000 spd
.MMGC 001777 spd .RSKCN 240000 spd
.MOENA 000001 spd .RSMIN 010000 000000 spd
.MOR 000007 spd .RXNOR 070000 000000 spd
.MPLUS 000007 spd .RXOR 060000 000000 spd
.MRPCT 000017 spd
.MS0A 000007 spd
.MS0B 000007 spd
.MSAB 000007 spd
.MSD0 000007 spd
.MSELC 000007 spd
.MSELE 000007 spd
.MSELF 000007 spd
.MSELM 000007 spd
.MSELP 000007 spd
.MSKCN 000037 spd
.MSMIN 000007 spd
.MXNOR 000007 spd
.MXOR 000007 spd
.RA 000010 000000 spd
.RAND 040000 000000 spd
.RB 400000 spd
.RBAD 000001 spd
.RCCCA 000000 spd
.RCCCE 160000 spd
.RCCCP 140000 spd
.RCCER 100000 spd
.RCCFZ 020000 spd
.RCCGC 010000 spd
.RCCLW 170000 spd
.RCCMB 120000 spd
.RCENA 000400 000000 spd
.RCJP 000060 spd
.RCJS 000020 spd
.RCONT 000340 spd
.RCRTN 000240 spd
.RCRY 000400 spd
.RD 001000 000000 spd
.RJ 000000 spd
.RJMAP 000040 spd
.RJZ 000000 spd
.RLDCT 000300 spd
.RMGC 000000 spd
.ROENA 000000 spd
.ROR 030000 000000 spd
.RPLUS 000000 spd
.RRPCT 000220 spd
.RS0A 400000 000000 spd
BBPNT 21# 189 712 2480
BEXEC 21# 90 669 2455 SEQ 1809
BUFCOM 31# 1660 1667 1968 2262
BUFF 20# 926 1890 1894 1897 2173 2177 2180 2243 2244 2246 2247 2248 2665
2666 2682 2798 2805 2977 2978 2994 3110 3117 3291 3292 3308 3424 3431
3616 3617 3633 3749 3756 3939 3940 3956 4072 4079 4261 4262 4278 4394
4401 4584 4585 4601 4682 4689 4873 4874 4890 4971 4978 5159 5160 5176
5257 5264 5446 5447 5463 5544 5551 5846 5847 5863 5979 5986 6169 6170
6186 6302 6309 6495 6496 6512 6628 6635 6823 6824 6840 6956 6963 7151
7152 7168 7284 7291 7478 7479 7495 7576 7583 7769 7770 7786 7867 7874
8059 8060 8076 8157 8164 8348 8349 8365 8446 8453 8634 8635 8653 8749
BUFGEN 31#
C1 860 1002 1171 1492 1858 2142
C12 66 647 1171 1492 1858 2142 2431 2517 2640 2951 3264 3589 3912 4235
4559 4847 5134 5420 5698 5820 6142 6470 6796 7124 7452 7744 8035 8325
8612
C13 647
C14 860 1171 1858
C15 1002 1492 2142
C16 1492 2142
C17 1171 1858
C18 66 2431
C19 647
C2 66 647 860 1002 1171 1492 1858 2142 2431 2517 2640 2951 3264 3589
3912 4235 4559 4847 5134 5420 5698 5820 6142 6470 6796 7124 7452 7744
8035 8325 8612
C20 66 647 2431 2517 2640 2951 3264 3589 3912 4235 4559 4847 5134 5420
5698 5820 6142 6470 6796 7124 7452 7744 8035 8325 8612
C21 647
C22 647
C23 66 647 2431
C24 66 647 2431
C3 66 647 2431
C4 66 647 860 1002 1171 1492 1858 2142 2431 2517 2640 2951 3264 3589
3912 4235 4559 4847 5134 5420 5698 5820 6142 6470 6796 7124 7452 7744
8035 8325 8612
C5 860 1002 1171 1492 1858 2142
C8 66 647 860 1002 1171 1492 1858 2142 2431 2517 2640 2951 3264 3589
3912 4235 4559 4847 5134 5420 5698 5820 6142 6470 6796 7124 7452 7744
8035 8325 8612
CALL 189 712 933 1057 1260 1261 1611 1612 1960 1961 2254 2255 2480 2572
2584 2839 2840 3149 3150 3466 3467 3789 3790 4112 4113 4436 4437 4724
4725 5011 5012 5297 5298 5586 5587 5752 5764 6023 6024 6343 6344 6669
6670 6997 6998 7325 7326 7617 7618 7908 7909 8198 8199 8487 8488 8744
8745
CBUF 20# 1895 2178 2680 2992 3306 3631 3954 4276 4599 4888 5174 5461 5861
6184 6510 6838 7166 7493 7784 8074 8363 8651
CBUFSZ 1895 2178 2680 2992 3306 3631 3954 4276 4599 4888 5174 5461 5861 6184
6510 6838 7166 7493 7784 8074 8363 8651
CBUS 64 645 858 1000 1169 1490 1856 2140 2429 2515 2638 2949 3262 3587
3910 4233 4557 4845 5132 5418 5696 5818 6140 6468 6794 7122 7450 7742
8033 8323 8610
CCALL 903 904 906 907 1213 1214 1218 1219 1533 1534 1538 1539 1934 1935
2217 2218 2220 2221
CCALLC 904 905 1214 1215 1534 1535 1935 1936 2218 2219 SEQ 1810
CCOMP 1939 1940 2223 2224
CCPNT 22# 933 1057 1261 1612 1961 2255
CDERR 22# 1668 1963 1969 2257 2263
CEBUFA 22# 1247 1266 1275 1279 1315 1598 1617 1625
CEXEC 22# 885 1027 1195 1515 1916 2199
CEXIT 1048
CHINIT 27# 1896 2179 2681 2993 3307 3632 3955 4277 4600 4889 5175 5462 5862
6185 6511 6839 7167 7494 7785 8075 8364 8652
CJRST 909 910 1219 1220 1539 1540 1940 1941 2224 2225
CLAST 910 911 1052 1053 1220 1221 1540 1541 1941 1942 2225 2226
CLEN 22# 1228 1248 1267 1272 1548 1599 1618 1622
CPAT 22# 914 919 1224 1233 1544 1558 1946 1951 1967 2230 2235 2261
CRAMPE 2557 5737
CSETRD 1045 1046 1049 1050 1535 1536
CSETRW 1936 1937 2219 2220
CSETWR 905 906 1215 1216
CSRPNT 20# 2580 5760
CSTART 907 908 1046 1047 1050 1051 1216 1217 1536 1537 1937 1938 2221 2222
CSTATF 22# 880 1021 1241 1582
CWAIT 908 909 1047 1048 1051 1052 1217 1218 1537 1538 1938 1939 2222 2223
E1 1858 2142
E4 1858 2142
EBUSPE 2559 5739
ERFLG 83 93 100 662 672 679 877 888 895 1018 1022 1030 1037 1187
1190 1198 1205 1249 1252 1265 1311 1507 1510 1518 1525 1600 1603 1616
1644 1662 1874 1877 1919 1926 2157 2160 2202 2209 2448 2458 2465 2534
2542 2543 2544 2548 2556 2558 2656 2705 2712 2968 3017 3024 3282 3331
3338 3607 3656 3663 3930 3979 3986 4252 4301 4308 4575 4624 4631 4864
4913 4920 5150 5199 5206 5437 5486 5493 5714 5722 5723 5724 5728 5736
5738 5837 5886 5893 6160 6209 6216 6486 6535 6542 6814 6863 6870 7142
7191 7198 7469 7518 7525 7760 7809 7816 8050 8099 8106 8339 8388 8395
8625 8676 8705
GENCCW 27# 1900 2183 2685 2997 3311 3636 3959 4281 4604 4893 5179 5466 5866
6189 6515 6843 7171 7498 7789 8079 8368 8656
IPACLR 26# 84 663 884 1026 1194 1234 1514 1557 1881 1904 1915 1952 2164
2187 2198 2236 2449 2537 2657 2969 3283 3608 3931 4253 4576 4865 5151
5438 5717 5838 6161 6487 6815 7143 7470 7761 8051 8340 8626 8680
IPASRT 26# 2541 5721
LAST 189 712 933 1057 1261 1612 1961 2255 2480 2572 2584 2840 3150 3467
3790 4113 4437 4725 5012 5298 5587 5752 5764 6024 6344 6670 6998 7326
7618 7909 8199 8488 8745
LDCSR 26# 1287 1292 1294 1298 1303 1305 1631 1636 1638 1886 1909 2169 2192
2560 2674 2676 2694 2698 2819 2824 2826 2986 2988 3006 3010 3134 3136
3300 3302 3320 3324 3451 3453 3625 3627 3645 3649 3774 3776 3948 3950
3968 3972 4097 4099 4270 4272 4290 4294 4421 4423 4593 4595 4613 4617
4709 4711 4882 4884 4902 4906 4996 4998 5168 5170 5188 5192 5282 5284
5455 5457 5475 5479 5571 5573 5740 5855 5857 5875 5879 6003 6008 6010
6178 6180 6198 6202 6328 6330 6504 6506 6524 6528 6654 6656 6832 6834
6852 6856 6982 6984 7160 7162 7180 7184 7310 7312 7487 7489 7507 7511
7602 7604 7778 7780 7798 7802 7893 7895 8068 8070 8088 8092 8183 8185
8357 8359 8377 8381 8472 8474 8643 8647 8665 8669 8685 8687 8694 8696
8735 8739
LDRAR 26# 1290 1301 1634 1884 1907 2167 2190 2672 2692 2822 2984 3004 3132 SEQ 1811
3298 3318 3449 3623 3643 3772 3946 3966 4095 4268 4288 4419 4591 4611
4707 4880 4900 4994 5166 5186 5280 5453 5473 5569 5853 5873 6006 6176
6196 6326 6502 6522 6652 6830 6850 6980 7158 7178 7308 7485 7505 7600
7776 7796 7891 8066 8086 8181 8355 8375 8470 8641 8663 8683 8692 8733
MA1 97 188#
MA10 2206 2253#
MA10CH 2254 2257#
MA11 2462 2479#
MA12 2545 2571#
MA12P1 2572 2574#
MA12PN 2584 2586#
MA13 2709 2839#
MA13PN 2839 2842#
MA14 3021 3149#
MA14PN 3149 3152#
MA15 3335 3466#
MA15PN 3466 3469#
MA16 3660 3789#
MA16PN 3789 3792#
MA17 3983 4112#
MA17PN 4112 4115#
MA2 676 711#
MA20 4305 4436#
MA20PN 4436 4439#
MA21 4628 4724#
MA21PN 4724 4727#
MA22 4917 5011#
MA22PN 5011 5014#
MA23 5203 5297#
MA23PN 5297 5300#
MA24 5490 5586#
MA24PN 5586 5589#
MA25 5725 5751#
MA25P1 5752 5754#
MA25PN 5764 5766#
MA26 5890 6023#
MA26PN 6023 6026#
MA27 6213 6343#
MA27PN 6343 6346#
MA3 892 932#
MA30 6539 6669#
MA30PN 6669 6672#
MA31 6867 6997#
MA31PN 6997 7000#
MA32 7195 7325#
MA32PN 7325 7328#
MA33 7522 7617#
MA33PN 7617 7620#
MA34 7813 7908#
MA34PN 7908 7911#
MA35 8103 8198#
MA35PN 8198 8201#
MA36 8392 8487# SEQ 1812
MA36PN 8487 8490#
MA37 8702 8744#
MA37PN 8744 8747#
MA4 1034 1056#
MA5 1202 1259#
MA5CH0 1265 1268 1277 1286#
MA5CHE 1246 1260 1265#
MA6 1522 1610#
MA6CH0 1616 1619 1630#
MA6CH1 1646 1658#
MA6CHE 1597 1611 1616#
MA7 1923 1959#
MA7CHE 1960 1963#
MB12 2563 2583#
MB25 5743 5763#
MBCN 1575 1577
MBUS 64
MLAST 66 647 860 1002 1171 1492 1858 2142 2431 2517 2640 2951 3264 3589
3912 4235 4559 4847 5134 5420 5698 5820 6142 6470 6796 7124 7452 7744
8035 8325 8612
MPRUN 1291 1302 1635 1885 1908 2168 2191 2673 2693 2823 2985 3005 3133 3299
3319 3450 3624 3644 3773 3947 3967 4096 4269 4289 4420 4592 4612 4708
4881 4901 4995 5167 5187 5281 5454 5474 5570 5854 5874 6007 6177 6197
6327 6503 6523 6653 6831 6851 6981 7159 7179 7309 7486 7506 7601 7777
7797 7892 8067 8087 8182 8356 8376 8471 8642 8664 8684 8693 8734
MSG 188 711 932 1056 1259 1610 1959 2253 2479 2571 2583 5751 5763
NDCB 64 645 858 1000 1169 1490 1856 2140 2429 2515 2638 2949 3262 3587
3910 4233 4557 4845 5132 5418 5696 5818 6140 6468 6794 7122 7450 7742
8033 8323 8610
NDMP 64 645 858 1000 1169 1490 1856 2140 2429 2515 2638 2949 3262 3587
3910 4233 4557 4845 5132 5418 5696 5818 6140 6468 6794 7122 7450 7742
8033 8323 8610
ODELAY 20# 1911 2194 2554 2696 3008 3322 3647 3970 4292 4615 4904 5190 5477
5734 5877 6200 6526 6854 7182 7509 7800 8090 8379 8645 8667 8737
P 921 1236 1239 1253 1254 1560 1563 1604 1605 1954 2238 2806 3118 3432
3757 4080 4402 4690 4979 5265 5552 5987 6310 6636 6964 7292 7584 7875
8165 8454 8727
PAT 1967 2261
PATBUF 31# 1565
PORTCI 21# 1577
PORTNI 21# 1575
RDCSR 26# 2555 2574 5735 5754
RDEBUF 26# 1295 1306 1639 2561 5741 8688 8697
SAVCSR 2576# 2576 2577 5756# 5756 5757
SAVDA1 1250 1296# 1296 1312 1323 1566 1601 1645 1649
SAVDA2 1251 1307# 1307 1320 1602 1640 1652
SAVDAT 2562# 2562 2587 5742# 5742 5767
SAVNUM 1661# 1661
SCOSW 31#
SDATA 26# 2540 5720
SNEXT 26# 2538 5718
SSLAST 184 185 707 708 2475 2476
SSSTRT 108 109 110 111 112 113 114 115 116 117 118 119 120 121 SEQ 1813
122 123 124 125 126 127 128 129 130 131 132 133 134 135
136 137 138 139 140 141 142 143 144 145 146 147 148 149
150 151 152 153 154 155 156 157 158 159 160 161 162 163
164 165 166 167 168 169 170 171 172 173 174 175 176 177
178 179 180 181 182 183 184 687 688 689 690 691 692 693
694 695 696 697 698 699 700 701 702 703 704 705 706 707
2473 2474 2475
T10M 2141 2151 2268#
T11M 2430 2442 2484#
T12M 2516 2528 2593#
T13BUF 2799# 2799 2804 2843
T13M 2639 2650 2854#
T14BUF 3111# 3111 3116 3153
T14M 2950 2962 3164#
T15BUF 3425# 3425 3430 3470
T15M 3263 3276 3481#
T16BUF 3750# 3750 3755 3793
T16M 3588 3601 3804#
T17BUF 4073# 4073 4078 4116
T17M 3911 3924 4127#
T1M 65 77 193#
T20BUF 4395# 4395 4400 4440
T20M 4234 4246 4451#
T21BUF 4683# 4683 4688 4728
T21M 4558 4569 4739#
T22BUF 4972# 4972 4977 5015
T22M 4846 4858 5026#
T23BUF 5258# 5258 5263 5301
T23M 5133 5144 5312#
T24BUF 5545# 5545 5550 5590
T24M 5419 5431 5601#
T25M 5697 5708 5773#
T26BUF 5980# 5980 5985 6027
T26M 5819 5831 6038#
T27BUF 6303# 6303 6308 6347
T27M 6141 6154 6358#
T2M 646 656 716#
T30BUF 6629# 6629 6634 6673
T30M 6469 6480 6684#
T31BUF 6957# 6957 6962 7001
T31M 6795 6808 7012#
T32BUF 7285# 7285 7290 7329
T32M 7123 7136 7340#
T33BUF 7577# 7577 7582 7621
T33M 7451 7463 7632#
T34BUF 7868# 7868 7873 7912
T34M 7743 7754 7923#
T35BUF 8158# 8158 8163 8202
T35M 8034 8044 8213#
T36BUF 8447# 8447 8452 8491
T36M 8324 8333 8502#
T37M 8611 8619 8757#
T3M 859 871 937# SEQ 1814
T4M 1001 1012 1061#
T5M 1170 1181 1329#
T6M 1491 1501 1675#
T6MM 1568 1570 1572 1574 1579 1585#
T7M 1857 1868 1974#
TA1 90# 92 100
TA10 2198# 2209
TA11 2455# 2457 2465
TA12 2534# 2546 2564
TA13 2702# 2704 2712
TA14 3014# 3016 3024
TA15 3328# 3330 3338
TA16 3653# 3655 3663
TA17 3976# 3978 3986
TA2 669# 671 679
TA20 4298# 4300 4308
TA21 4621# 4623 4631
TA22 4910# 4912 4920
TA23 5196# 5198 5206
TA24 5483# 5485 5493
TA25 5714# 5726 5744
TA26 5883# 5885 5893
TA27 6206# 6208 6216
TA3 884# 895
TA30 6532# 6534 6542
TA31 6860# 6862 6870
TA32 7188# 7190 7198
TA33 7515# 7517 7525
TA34 7806# 7808 7816
TA35 8096# 8098 8106
TA36 8385# 8387 8395
TA37 8673# 8675 8705
TA4 1026# 1037
TA5 1194# 1205
TA6 1514# 1525
TA7 1915# 1926
TB10 2199# 2201
TB3 885# 887
TB4 1027# 1029
TB5 1195# 1197
TB6 1515# 1517
TB7 1916# 1918
TCALL 2720 2721 2725 2726 2732 2733 2739 2740 2746 2747 2754 2755 2761 2762
2768 2769 2775 2776 2782 2783 2789 2790 3032 3033 3037 3038 3044 3045
3051 3052 3058 3059 3066 3067 3073 3074 3080 3081 3087 3088 3094 3095
3101 3102 3346 3347 3351 3352 3358 3359 3365 3366 3372 3373 3380 3381
3387 3388 3394 3395 3401 3402 3408 3409 3415 3416 3671 3672 3676 3677
3683 3684 3690 3691 3697 3698 3705 3706 3712 3713 3719 3720 3726 3727
3733 3734 3740 3741 3994 3995 3999 4000 4006 4007 4013 4014 4020 4021
4028 4029 4035 4036 4042 4043 4049 4050 4056 4057 4063 4064 4316 4317
4321 4322 4328 4329 4335 4336 4342 4343 4350 4351 4357 4358 4364 4365
4371 4372 4378 4379 4385 4386 4639 4640 4644 4645 4651 4652 4659 4660
4666 4667 4673 4674 4928 4929 4933 4934 4940 4941 4947 4948 4955 4956 SEQ 1815
4962 4963 5214 5215 5219 5220 5226 5227 5233 5234 5240 5241 5248 5249
5501 5502 5506 5507 5513 5514 5520 5521 5527 5528 5535 5536 5901 5902
5906 5907 5913 5914 5920 5921 5927 5928 5935 5936 5942 5943 5949 5950
5956 5957 5963 5964 5970 5971 6224 6225 6229 6230 6236 6237 6243 6244
6250 6251 6257 6258 6265 6266 6272 6273 6279 6280 6286 6287 6293 6294
6550 6551 6555 6556 6562 6563 6569 6570 6576 6577 6584 6585 6591 6592
6598 6599 6605 6606 6612 6613 6619 6620 6878 6879 6883 6884 6890 6891
6897 6898 6904 6905 6912 6913 6919 6920 6926 6927 6933 6934 6940 6941
6947 6948 7206 7207 7211 7212 7218 7219 7225 7226 7232 7233 7239 7240
7247 7248 7254 7255 7261 7262 7268 7269 7275 7276 7533 7534 7538 7539
7545 7546 7552 7553 7559 7560 7567 7568 7824 7825 7829 7830 7836 7837
7843 7844 7850 7851 7857 7858 8114 8115 8119 8120 8126 8127 8133 8134
8140 8141 8148 8149 8403 8404 8408 8409 8415 8416 8422 8423 8429 8430
8437 8438 8713 8714
TCALLC 2721 2722 3033 3034 3347 3348 3672 3673 3995 3996 4317 4318 4640 4641
4929 4930 5215 5216 5502 5503 5902 5903 6225 6226 6551 6552 6879 6880
7207 7208 7534 7535 7825 7826 8115 8116 8404 8405 8714 8715
TCHECK 2727 2728 2734 2735 2741 2742 2748 2749 2756 2757 2763 2764 2770 2771
2777 2778 2784 2785 2791 2792 3039 3040 3046 3047 3053 3054 3060 3061
3068 3069 3075 3076 3082 3083 3089 3090 3096 3097 3103 3104 3353 3354
3360 3361 3367 3368 3374 3375 3382 3383 3389 3390 3396 3397 3403 3404
3410 3411 3417 3418 3678 3679 3685 3686 3692 3693 3699 3700 3707 3708
3714 3715 3721 3722 3728 3729 3735 3736 3742 3743 4001 4002 4008 4009
4015 4016 4022 4023 4030 4031 4037 4038 4044 4045 4051 4052 4058 4059
4065 4066 4323 4324 4330 4331 4337 4338 4344 4345 4352 4353 4359 4360
4366 4367 4373 4374 4380 4381 4387 4388 4646 4647 4653 4654 4661 4662
4668 4669 4675 4676 4935 4936 4942 4943 4949 4950 4957 4958 4964 4965
5221 5222 5228 5229 5235 5236 5242 5243 5250 5251 5508 5509 5515 5516
5522 5523 5529 5530 5537 5538 5908 5909 5915 5916 5922 5923 5929 5930
5937 5938 5944 5945 5951 5952 5958 5959 5965 5966 5972 5973 6231 6232
6238 6239 6245 6246 6252 6253 6259 6260 6267 6268 6274 6275 6281 6282
6288 6289 6295 6296 6557 6558 6564 6565 6571 6572 6578 6579 6586 6587
6593 6594 6600 6601 6607 6608 6614 6615 6621 6622 6885 6886 6892 6893
6899 6900 6906 6907 6914 6915 6921 6922 6928 6929 6935 6936 6942 6943
6949 6950 7213 7214 7220 7221 7227 7228 7234 7235 7241 7242 7249 7250
7256 7257 7263 7264 7270 7271 7277 7278 7540 7541 7547 7548 7554 7555
7561 7562 7569 7570 7831 7832 7838 7839 7845 7846 7852 7853 7859 7860
8121 8122 8128 8129 8135 8136 8142 8143 8150 8151 8410 8411 8417 8418
8424 8425 8431 8432 8439 8440 8716 8717
TEBUFA 21# 8698
TEBUFC 21# 8689
TEXEC 21# 2702 3014 3328 3653 3976 4298 4621 4910 5196 5483 5883 6206 6532
6860 7188 7515 7806 8096 8385 8673
TEXIT 2728 2729 2735 2736 2742 2743 2749 2750 2757 2758 2764 2765 2771 2772
2778 2779 2785 2786 2792 2793 3040 3041 3047 3048 3054 3055 3061 3062
3069 3070 3076 3077 3083 3084 3090 3091 3097 3098 3104 3105 3354 3355
3361 3362 3368 3369 3375 3376 3383 3384 3390 3391 3397 3398 3404 3405
3411 3412 3418 3419 3679 3680 3686 3687 3693 3694 3700 3701 3708 3709
3715 3716 3722 3723 3729 3730 3736 3737 3743 3744 4002 4003 4009 4010
4016 4017 4023 4024 4031 4032 4038 4039 4045 4046 4052 4053 4059 4060
4066 4067 4324 4325 4331 4332 4338 4339 4345 4346 4353 4354 4360 4361
4367 4368 4374 4375 4381 4382 4388 4389 4647 4648 4654 4655 4662 4663
4669 4670 4676 4677 4936 4937 4943 4944 4950 4951 4958 4959 4965 4966 SEQ 1816
5222 5223 5229 5230 5236 5237 5243 5244 5251 5252 5509 5510 5516 5517
5523 5524 5530 5531 5538 5539 5909 5910 5916 5917 5923 5924 5930 5931
5938 5939 5945 5946 5952 5953 5959 5960 5966 5967 5973 5974 6232 6233
6239 6240 6246 6247 6253 6254 6260 6261 6268 6269 6275 6276 6282 6283
6289 6290 6296 6297 6558 6559 6565 6566 6572 6573 6579 6580 6587 6588
6594 6595 6601 6602 6608 6609 6615 6616 6622 6623 6886 6887 6893 6894
6900 6901 6907 6908 6915 6916 6922 6923 6929 6930 6936 6937 6943 6944
6950 6951 7214 7215 7221 7222 7228 7229 7235 7236 7242 7243 7250 7251
7257 7258 7264 7265 7271 7272 7278 7279 7541 7542 7548 7549 7555 7556
7562 7563 7570 7571 7832 7833 7839 7840 7846 7847 7853 7854 7860 7861
8122 8123 8129 8130 8136 8137 8143 8144 8151 8152 8411 8412 8418 8419
8425 8426 8432 8433 8440 8441 8717 8718
TG1 63 75#
TG10 2139 2149#
TG11 2428 2440#
TG12 2514 2526#
TG13 2637 2648#
TG14 2948 2960#
TG15 3261 3274#
TG16 3586 3599#
TG17 3909 3922#
TG2 644 654#
TG20 4232 4244#
TG21 4556 4567#
TG22 4844 4856#
TG23 5131 5142#
TG24 5417 5429#
TG25 5695 5706#
TG26 5817 5829#
TG27 6139 6152#
TG3 857 869#
TG30 6467 6478#
TG31 6793 6806#
TG32 7121 7134#
TG33 7449 7461#
TG34 7741 7752#
TG35 8032 8042#
TG36 8322 8331#
TG37 8609 8617#
TG4 999 1010#
TG5 1168 1179#
TG6 1489 1499#
TG7 1855 1866#
TJRST 2793 2794 3105 3106 3419 3420 3744 3745 4067 4068 4389 4390 4677 4678
4966 4967 5252 5253 5539 5540 5974 5975 6297 6298 6623 6624 6951 6952
7279 7280 7571 7572 7861 7862 8152 8153 8441 8442 8718 8719
TL1 83# 98
TL10 2157# 2207
TL11 2448# 2463
TL13 2656# 2710
TL14 2968# 3022
TL15 3282# 3336
TL16 3607# 3661 SEQ 1817
TL17 3930# 3984
TL2 662# 677
TL20 4252# 4306
TL21 4575# 4629
TL22 4864# 4918
TL23 5150# 5204
TL24 5437# 5491
TL26 5837# 5891
TL27 6160# 6214
TL3 877# 893
TL30 6486# 6540
TL31 6814# 6868
TL32 7142# 7196
TL33 7469# 7523
TL34 7760# 7814
TL35 8050# 8104
TL36 8339# 8393
TL37 8625# 8703
TL4 1018# 1035
TL5 1187# 1203
TL6 1507# 1523
TL7 1874# 1924
TLAST 2794 2795 3106 3107 3420 3421 3745 3746 4068 4069 4390 4391 4678 4679
4967 4968 5253 5254 5540 5541 5975 5976 6298 6299 6624 6625 6952 6953
7280 7281 7572 7573 7862 7863 8153 8154 8442 8443 8719 8720
TLOAD 20# 78 657 872 1013 1182 1502 1580 1869 2152 2443 2529 2651 2963
3277 3602 3925 4247 4570 4859 5145 5432 5709 5832 6155 6481 6809 7137
7464 7755 8045 8334 8620
TRACE 20# 76 655 870 1011 1180 1500 1867 2150 2441 2527 2649 2961 3275
3600 3923 4245 4568 4857 5143 5430 5707 5830 6153 6479 6807 7135 7462
7753 8043 8332 8618
TS1 86 108#
TS10 2158 2217#
TS10A 2218# 2224
TS10IN 2218 2235#
TS10SE 2217 2229#
TS10SW 2220 2243#
TS11 2451 2473#
TS13 2686 2720#
TS13A 2725#
TS13IN 2720 2798#
TS13L 2721# 2793
TS13N0 2809# 2813
TS13NE 2721 2804#
TS13NM 2814# 2814 2832 2847
TS13NN 2725 2732 2739 2746 2754 2761 2768 2775 2782 2789 2831#
TS13RS 2727 2734 2741 2748 2756 2763 2770 2777 2784 2791 2808 2812 2835#
TS14 2998 3032#
TS14A 3037#
TS14IN 3032 3110#
TS14L 3033# 3105
TS14N0 3121# 3125
TS14NE 3033 3116# SEQ 1818
TS14NM 3126# 3126 3142 3157
TS14NN 3037 3044 3051 3058 3066 3073 3080 3087 3094 3101 3141#
TS14RS 3039 3046 3053 3060 3068 3075 3082 3089 3096 3103 3120 3124 3145#
TS15 3312 3346#
TS15A 3351#
TS15IN 3346 3424#
TS15L 3347# 3419
TS15N0 3435# 3442
TS15NE 3347 3430#
TS15NM 3443# 3443 3459 3474
TS15NN 3351 3358 3365 3372 3380 3387 3394 3401 3408 3415 3458#
TS15RS 3353 3360 3367 3374 3382 3389 3396 3403 3410 3417 3434 3436 3441 3462#
TS16 3637 3671#
TS16A 3676#
TS16IN 3671 3749#
TS16L 3672# 3744
TS16N0 3760# 3765
TS16NE 3672 3755#
TS16NM 3766# 3766 3782 3797
TS16NN 3676 3683 3690 3697 3705 3712 3719 3726 3733 3740 3781#
TS16RS 3678 3685 3692 3699 3707 3714 3721 3728 3735 3742 3759 3764 3785#
TS17 3960 3994#
TS17A 3999#
TS17IN 3994 4072#
TS17L 3995# 4067
TS17N0 4083# 4088
TS17NE 3995 4078#
TS17NM 4089# 4089 4105 4120
TS17NN 3999 4006 4013 4020 4028 4035 4042 4049 4056 4063 4104#
TS17RS 4001 4008 4015 4022 4030 4037 4044 4051 4058 4065 4082 4087 4108#
TS2 665 687#
TS20 4282 4316#
TS20A 4321#
TS20IN 4316 4394#
TS20L 4317# 4389
TS20N0 4405# 4412
TS20NE 4317 4400#
TS20NM 4413# 4413 4429 4444
TS20NN 4321 4328 4335 4342 4350 4357 4364 4371 4378 4385 4428#
TS20RS 4323 4330 4337 4344 4352 4359 4366 4373 4380 4387 4404 4406 4411 4432#
TS21 4605 4639#
TS21A 4644#
TS21IN 4639 4682#
TS21L 4640# 4677
TS21N0 4693# 4700
TS21NE 4640 4688#
TS21NM 4701# 4701 4717 4732
TS21NN 4644 4651 4659 4666 4673 4716#
TS21RS 4646 4653 4661 4668 4675 4692 4694 4699 4720#
TS22 4894 4928#
TS22A 4933#
TS22IN 4928 4971#
TS22L 4929# 4966 SEQ 1819
TS22N0 4982# 4987
TS22NE 4929 4977#
TS22NM 4988# 4988 5004 5019
TS22NN 4933 4940 4947 4955 4962 5003#
TS22RS 4935 4942 4949 4957 4964 4981 4986 5007#
TS23 5180 5214#
TS23A 5219#
TS23IN 5214 5257#
TS23L 5215# 5252
TS23N0 5268# 5273
TS23NE 5215 5263#
TS23NM 5274# 5274 5290 5305
TS23NN 5219 5226 5233 5240 5248 5289#
TS23RS 5221 5228 5235 5242 5250 5267 5272 5293#
TS24 5467 5501#
TS24A 5506#
TS24IN 5501 5544#
TS24L 5502# 5539
TS24N0 5555# 5562
TS24NE 5502 5550#
TS24NM 5563# 5563 5579 5594
TS24NN 5506 5513 5520 5527 5535 5578#
TS24RS 5508 5515 5522 5529 5537 5554 5556 5561 5582#
TS26 5867 5901#
TS26A 5906#
TS26IN 5901 5979#
TS26L 5902# 5974
TS26N0 5991# 5997
TS26NE 5902 5985#
TS26NM 5998# 5998 6016 6031
TS26NN 5906 5913 5920 5927 5935 5942 5949 5956 5963 5970 6015#
TS26RS 5908 5915 5922 5929 5937 5944 5951 5958 5965 5972 5990 5996 6019#
TS27 6190 6224#
TS27A 6229#
TS27IN 6224 6302#
TS27L 6225# 6297
TS27N0 6313# 6319
TS27NE 6225 6308#
TS27NM 6320# 6320 6336 6351
TS27NN 6229 6236 6243 6250 6257 6265 6272 6279 6286 6293 6335#
TS27RS 6231 6238 6245 6252 6259 6267 6274 6281 6288 6295 6312 6314 6318 6339#
TS3 878 903#
TS30 6516 6550#
TS30A 6555#
TS30IN 6550 6628#
TS30L 6551# 6623
TS30N0 6639# 6645
TS30NE 6551 6634#
TS30NM 6646# 6646 6662 6677
TS30NN 6555 6562 6569 6576 6584 6591 6598 6605 6612 6619 6661#
TS30RS 6557 6564 6571 6578 6586 6593 6600 6607 6614 6621 6638 6640 6644 6665#
TS31 6844 6878#
TS31A 6883# SEQ 1820
TS31IN 6878 6956#
TS31L 6879# 6951
TS31N0 6967# 6973
TS31NE 6879 6962#
TS31NM 6974# 6974 6990 7005
TS31NN 6883 6890 6897 6904 6912 6919 6926 6933 6940 6947 6989#
TS31RS 6885 6892 6899 6906 6914 6921 6928 6935 6942 6949 6966 6968 6972 6993#
TS32 7172 7206#
TS32A 7211#
TS32IN 7206 7284#
TS32L 7207# 7279
TS32N0 7295# 7301
TS32NE 7207 7290#
TS32NM 7302# 7302 7318 7333
TS32NN 7211 7218 7225 7232 7239 7247 7254 7261 7268 7275 7317#
TS32RS 7213 7220 7227 7234 7241 7249 7256 7263 7270 7277 7294 7296 7300 7321#
TS33 7499 7533#
TS33A 7538#
TS33IN 7533 7576#
TS33L 7534# 7571
TS33N0 7587# 7593
TS33NE 7534 7582#
TS33NM 7594# 7594 7610 7625
TS33NN 7538 7545 7552 7559 7567 7609#
TS33RS 7540 7547 7554 7561 7569 7586 7588 7592 7613#
TS34 7790 7824#
TS34A 7829#
TS34IN 7824 7867#
TS34L 7825# 7861
TS34N0 7878# 7884
TS34NE 7825 7873#
TS34NM 7885# 7885 7901 7916
TS34NN 7829 7836 7843 7850 7857 7900#
TS34RS 7831 7838 7845 7852 7859 7877 7879 7883 7904#
TS35 8080 8114#
TS35A 8119#
TS35IN 8114 8157#
TS35L 8115# 8152
TS35N0 8168# 8174
TS35NE 8115 8163#
TS35NM 8175# 8175 8191 8206
TS35NN 8119 8126 8133 8140 8148 8190#
TS35RS 8121 8128 8135 8142 8150 8167 8169 8173 8194#
TS36 8369 8403#
TS36A 8408#
TS36IN 8403 8446#
TS36L 8404# 8441
TS36N0 8457# 8463
TS36NE 8404 8452#
TS36NM 8464# 8464 8480 8495
TS36NN 8408 8415 8422 8429 8437 8479#
TS36RS 8410 8417 8424 8431 8439 8456 8458 8462 8483#
TS37 8657 8713# SEQ 1821
TS37A 8714# 8718
TS37CH 8714 8725#
TS37DA 8722# 8722 8725 8748
TS37IN 8713 8722#
TS3A 904# 909
TS3EBU 908 927# 927
TS3INC 904 919#
TS3SEE 906 926#
TS3SET 903 914#
TS4 1019 1045#
TS5 1188 1213#
TS5A 1214# 1219
TS5CHE 1218 1246#
TS5INC 1214 1233#
TS5SET 1213 1224#
TS6 1508 1533#
TS6A 1534# 1539
TS6CHE 1538 1597#
TS6INC 1534 1557#
TS6S 1536# 1552
TS6SET 1533 1544#
TS7 1875 1934#
TS7A 1935# 1940
TS7IN 1935 1951#
TS7SE 1934 1945#
TSLOD1 20# 1576
TSLOD2 20# 1578
TSSTAR 2726 2733 2740 2747 2755 2762 2769 2776 2783 2790 3038 3045 3052 3059
3067 3074 3081 3088 3095 3102 3352 3359 3366 3373 3381 3388 3395 3402
3409 3416 3677 3684 3691 3698 3706 3713 3720 3727 3734 3741 4000 4007
4014 4021 4029 4036 4043 4050 4057 4064 4322 4329 4336 4343 4351 4358
4365 4372 4379 4386 4645 4652 4660 4667 4674 4934 4941 4948 4956 4963
5220 5227 5234 5241 5249 5507 5514 5521 5528 5536 5907 5914 5921 5928
5936 5943 5950 5957 5964 5971 6230 6237 6244 6251 6258 6266 6273 6280
6287 6294 6556 6563 6570 6577 6585 6592 6599 6606 6613 6620 6884 6891
6898 6905 6913 6920 6927 6934 6941 6948 7212 7219 7226 7233 7240 7248
7255 7262 7269 7276 7539 7546 7553 7560 7568 7830 7837 7844 7851 7858
8120 8127 8134 8141 8149 8409 8416 8423 8430 8438 8715
TSTC1 9 63#
TSTC10 9 1859 2139#
TSTC11 10 68 648 2428#
TSTC12 10 2514#
TSTC13 10 2518 2637#
TSTC14 10 2519 2641 2948#
TSTC15 10 2952 3261#
TSTC16 10 2953 3265 3586#
TSTC17 10 3266 3590 3909#
TSTC2 9 67 644#
TSTC20 10 3267 3591 3913 4232#
TSTC21 11 3268 3592 3914 4236 4556#
TSTC22 11 3269 3593 3915 4237 4560 4844#
TSTC23 11 3594 3916 4238 4561 4848 5131#
TSTC24 11 3917 4239 4562 4849 5135 5417# SEQ 1822
TSTC25 11 2520 2642 2954 4850 5136 5421 5695#
TSTC26 11 2521 2643 2955 4851 5137 5422 5699 5817#
TSTC27 11 5700 5821 6139#
TSTC3 9 69 857# 2432
TSTC30 11 5701 5822 6143 6467#
TSTC31 12 5423 5823 6144 6471 6793#
TSTC32 12 5424 5824 6145 6472 6797 7121#
TSTC33 12 6146 6473 6798 7125 7449#
TSTC34 12 6147 6799 7126 7453 7741#
TSTC35 12 6800 7127 7454 7745 8032#
TSTC36 12 6801 7128 7455 7746 8036 8322#
TSTC37 12 7129 7456 7747 8037 8326 8609#
TSTC4 9 70 861 999# 2433
TSTC40 16# 649 863 1004 1172 1493 1860 2143
TSTC41 16# 864 1005 1173 1494 1861 2144
TSTC5 9 862 1003 1168# 2434
TSTC6 9 1174 1489# 2435
TSTC7 9 1855#
TSTEBF 1293 1304 1637 2559 5739 8686 8695
TSTSUB 20# 85 664 879 1020 1189 1509 1876 2159 2450 2536 2552 2658 2970
3284 3609 3932 4254 4577 4866 5152 5439 5716 5732 5839 6162 6488 6816
7144 7471 7762 8052 8341 8627
TTPNT 21# 2840 3150 3467 3790 4113 4437 4725 5012 5298 5587 6024 6344 6670
6998 7326 7618 7909 8199 8488 8745
TX1 91 99 104#
TX10 2200 2208 2213#
TX11 2456 2464 2469#
TX12 2547 2548 2565 2567#
TX13 2703 2711 2716#
TX14 3015 3023 3028#
TX15 3329 3337 3342#
TX16 3654 3662 3667#
TX17 3977 3985 3990#
TX2 670 678 683#
TX20 4299 4307 4312#
TX21 4622 4630 4635#
TX22 4911 4919 4924#
TX23 5197 5205 5210#
TX24 5484 5492 5497#
TX25 5727 5728 5745 5747#
TX26 5884 5892 5897#
TX27 6207 6215 6220#
TX3 886 894 899#
TX30 6533 6541 6546#
TX31 6861 6869 6874#
TX32 7189 7197 7202#
TX33 7516 7524 7529#
TX34 7807 7815 7820#
TX35 8097 8105 8110#
TX36 8386 8394 8399#
TX37 8674 8704 8709#
TX4 1028 1036 1041#
TX5 1196 1204 1209# SEQ 1823
TX6 1516 1524 1529#
TX7 1917 1925 1930#
TXALL 189 712 933 1057 1261 1612 1961 2255 2480 2572 2584 2840 3150 3467
3790 4113 4437 4725 5012 5298 5587 5752 5764 6024 6344 6670 6998 7326
7618 7909 8199 8488 8745
TXNOT 188 711 932 1056 1259 1260 1610 1611 1959 1960 2253 2254 2479 2571
2583 2839 3149 3466 3789 4112 4436 4724 5011 5297 5586 5751 5763 6023
6343 6669 6997 7325 7617 7908 8198 8487 8744
UDEBUG 20# 21# 1237 1561 1891 2174
USER 1226 1546 1550
Z9 38# 75 654 869 1010 1179 1499 1866 2149 2440 2526 2648 2960 3274
3599 3922 4244 4567 4856 5142 5429 5706 5829 6152 6478 6806 7134 7461
7752 8042 8331 8617
ZCBUS 64 645 858 1000 1169 1490 1856 2140 2429 2515 2638 2949 3262 3587
3910 4233 4557 4845 5132 5418 5696 5818 6140 6468 6794 7122 7450 7742
8033 8323 8610
$ARG2 193# 193 195# 195 197# 197 199# 199 201# 201 203# 203 205# 205
207# 207 209# 209 211# 211 213# 213 215# 215 217# 217 219# 219
221# 221 223# 223 225# 225 227# 227 229# 229 231# 231 233# 233
235# 235 237# 237 239# 239 241# 241 243# 243 245# 245 247# 247
249# 249 251# 251 253# 253 255# 255 257# 257 259# 259 261# 261
263# 263 265# 265 267# 267 272# 272 274# 274 279# 279 281# 281
286# 286 288# 288 290# 290 295# 295 297# 297 299# 299 304# 304
306# 306 308# 308 313# 313 315# 315 317# 317 322# 322 324# 324
326# 326 331# 331 333# 333 335# 335 340# 340 342# 342 344# 344
349# 349 351# 351 353# 353 358# 358 360# 360 362# 362 367# 367
369# 369 371# 371 376# 376 378# 378 380# 380 385# 385 387# 387
389# 389 394# 394 396# 396 398# 398 403# 403 405# 405 407# 407
412# 412 414# 414 416# 416 421# 421 423# 423 425# 425 430# 430
432# 432 434# 434 439# 439 441# 441 443# 443 448# 448 450# 450
452# 452 457# 457 459# 459 461# 461 466# 466 468# 468 470# 470
475# 475 477# 477 479# 479 484# 484 486# 486 488# 488 493# 493
495# 495 497# 497 502# 502 504# 504 506# 506 511# 511 513# 513
515# 515 520# 520 522# 522 524# 524 529# 529 531# 531 533# 533
538# 538 540# 540 542# 542 547# 547 549# 549 551# 551 556# 556
558# 558 560# 560 565# 565 567# 567 569# 569 574# 574 576# 576
578# 578 583# 583 585# 585 587# 587 592# 592 594# 594 596# 596
598# 598 603# 603 608# 608 610# 610 612# 612 614# 614 616# 616
716# 716 718# 718 720# 720 722# 722 724# 724 726# 726 728# 728
730# 730 732# 732 734# 734 739# 739 741# 741 746# 746 748# 748
753# 753 755# 755 757# 757 762# 762 764# 764 766# 766 771# 771
773# 773 775# 775 780# 780 782# 782 784# 784 789# 789 791# 791
793# 793 798# 798 800# 800 802# 802 807# 807 809# 809 811# 811
816# 816 821# 821 823# 823 825# 825 827# 827 829# 829 831# 831
937# 937 942# 942 947# 947 949# 949 954# 954 956# 956 958# 958
963# 963 965# 965 970# 970 972# 972 1061# 1061 1063# 1063 1065# 1065
1070# 1070 1075# 1075 1080# 1080 1082# 1082 1087# 1087 1092# 1092 1094# 1094
1099# 1099 1101# 1101 1107# 1107 1109# 1109 1111# 1111 1113# 1113 1115# 1115
1117# 1117 1119# 1119 1121# 1121 1126# 1126 1128# 1128 1329# 1329 1331# 1331
1333# 1333 1335# 1335 1340# 1340 1342# 1342 1344# 1344 1346# 1346 1348# 1348
1350# 1350 1355# 1355 1357# 1357 1359# 1359 1364# 1364 1370# 1370 1372# 1372
1374# 1374 1376# 1376 1378# 1378 1380# 1380 1382# 1382 1384# 1384 1391# 1391
1393# 1393 1395# 1395 1397# 1397 1399# 1399 1401# 1401 1403# 1403 1405# 1405 SEQ 1824
1407# 1407 1409# 1409 1411# 1411 1413# 1413 1415# 1415 1420# 1420 1422# 1422
1427# 1427 1429# 1429 1431# 1431 1436# 1436 1438# 1438 1443# 1443 1445# 1445
1450# 1450 1455# 1455 1457# 1457 1585# 1585 1587# 1587 1589# 1589 1591# 1591
1675# 1675 1677# 1677 1679# 1679 1681# 1681 1683# 1683 1685# 1685 1690# 1690
1692# 1692 1694# 1694 1696# 1696 1698# 1698 1700# 1700 1705# 1705 1707# 1707
1709# 1709 1711# 1711 1713# 1713 1715# 1715 1717# 1717 1719# 1719 1721# 1721
1723# 1723 1725# 1725 1727# 1727 1729# 1729 1731# 1731 1733# 1733 1735# 1735
1737# 1737 1739# 1739 1741# 1741 1743# 1743 1748# 1748 1750# 1750 1752# 1752
1754# 1754 1756# 1756 1758# 1758 1760# 1760 1762# 1762 1764# 1764 1766# 1766
1772# 1772 1774# 1774 1776# 1776 1782# 1782 1784# 1784 1786# 1786 1788# 1788
1790# 1790 1792# 1792 1794# 1794 1796# 1796 1801# 1801 1803# 1803 1808# 1808
1810# 1810 1812# 1812 1817# 1817 1822# 1822 1824# 1824 1974# 1974 1976# 1976
1978# 1978 1980# 1980 1983# 1983 1985# 1985 1987# 1987 1989# 1989 1991# 1991
1993# 1993 1996# 1996 2001# 2001 2007# 2007 2009# 2009 2011# 2011 2013# 2013
2015# 2015 2017# 2017 2019# 2019 2021# 2021 2026# 2026 2028# 2028 2030# 2030
2032# 2032 2034# 2034 2036# 2036 2038# 2038 2040# 2040 2042# 2042 2044# 2044
2046# 2046 2048# 2048 2050# 2050 2052# 2052 2054# 2054 2056# 2056 2058# 2058
2060# 2060 2062# 2062 2064# 2064 2069# 2069 2071# 2071 2073# 2073 2079# 2079
2081# 2081 2083# 2083 2085# 2085 2087# 2087 2089# 2089 2091# 2091 2093# 2093
2095# 2095 2097# 2097 2099# 2099 2101# 2101 2106# 2106 2108# 2108 2268# 2268
2271# 2271 2273# 2273 2275# 2275 2277# 2277 2279# 2279 2282# 2282 2284# 2284
2286# 2286 2288# 2288 2291# 2291 2297# 2297 2299# 2299 2301# 2301 2307# 2307
2309# 2309 2311# 2311 2313# 2313 2315# 2315 2317# 2317 2319# 2319 2321# 2321
2326# 2326 2328# 2328 2330# 2330 2332# 2332 2334# 2334 2336# 2336 2338# 2338
2340# 2340 2342# 2342 2344# 2344 2346# 2346 2348# 2348 2350# 2350 2352# 2352
2354# 2354 2356# 2356 2358# 2358 2360# 2360 2362# 2362 2364# 2364 2369# 2369
2371# 2371 2373# 2373 2379# 2379 2381# 2381 2383# 2383 2385# 2385 2387# 2387
2389# 2389 2391# 2391 2393# 2393 2395# 2395 2397# 2397 2399# 2399 2401# 2401
2406# 2406 2408# 2408 2484# 2484 2486# 2486 2593# 2593 2595# 2595 2597# 2597
2599# 2599 2601# 2601 2854# 2854 2856# 2856 2858# 2858 2860# 2860 2865# 2865
2867# 2867 2869# 2869 2871# 2871 2873# 2873 2875# 2875 2880# 2880 2882# 2882
2884# 2884 2889# 2889 2891# 2891 2896# 2896 2898# 2898 2900# 2900 2902# 2902
2904# 2904 2906# 2906 2908# 2908 2910# 2910 2912# 2912 3164# 3164 3166# 3166
3168# 3168 3170# 3170 3175# 3175 3177# 3177 3179# 3179 3181# 3181 3183# 3183
3185# 3185 3190# 3190 3192# 3192 3194# 3194 3199# 3199 3201# 3201 3206# 3206
3208# 3208 3210# 3210 3212# 3212 3214# 3214 3216# 3216 3218# 3218 3220# 3220
3222# 3222 3481# 3481 3483# 3483 3485# 3485 3487# 3487 3492# 3492 3494# 3494
3496# 3496 3498# 3498 3500# 3500 3502# 3502 3507# 3507 3509# 3509 3511# 3511
3513# 3513 3515# 3515 3517# 3517 3519# 3519 3524# 3524 3526# 3526 3531# 3531
3533# 3533 3535# 3535 3537# 3537 3539# 3539 3541# 3541 3543# 3543 3545# 3545
3547# 3547 3804# 3804 3806# 3806 3808# 3808 3810# 3810 3815# 3815 3817# 3817
3819# 3819 3821# 3821 3823# 3823 3825# 3825 3830# 3830 3832# 3832 3834# 3834
3836# 3836 3838# 3838 3840# 3840 3842# 3842 3847# 3847 3849# 3849 3854# 3854
3856# 3856 3858# 3858 3860# 3860 3862# 3862 3864# 3864 3866# 3866 3868# 3868
3870# 3870 4127# 4127 4129# 4129 4131# 4131 4133# 4133 4138# 4138 4140# 4140
4142# 4142 4144# 4144 4146# 4146 4148# 4148 4153# 4153 4155# 4155 4157# 4157
4159# 4159 4161# 4161 4163# 4163 4165# 4165 4170# 4170 4172# 4172 4177# 4177
4179# 4179 4181# 4181 4183# 4183 4185# 4185 4187# 4187 4189# 4189 4191# 4191
4193# 4193 4451# 4451 4453# 4453 4455# 4455 4457# 4457 4462# 4462 4464# 4464
4466# 4466 4468# 4468 4470# 4470 4472# 4472 4477# 4477 4479# 4479 4481# 4481
4483# 4483 4485# 4485 4487# 4487 4489# 4489 4494# 4494 4496# 4496 4501# 4501
4503# 4503 4505# 4505 4507# 4507 4509# 4509 4511# 4511 4513# 4513 4515# 4515
4517# 4517 4739# 4739 4741# 4741 4743# 4743 4745# 4745 4750# 4750 4752# 4752 SEQ 1825
4754# 4754 4756# 4756 4758# 4758 4760# 4760 4765# 4765 4767# 4767 4769# 4769
4771# 4771 4773# 4773 4775# 4775 4777# 4777 4782# 4782 4784# 4784 4789# 4789
4791# 4791 4793# 4793 4795# 4795 4797# 4797 4799# 4799 4801# 4801 4803# 4803
4805# 4805 5026# 5026 5028# 5028 5030# 5030 5032# 5032 5037# 5037 5039# 5039
5041# 5041 5043# 5043 5045# 5045 5047# 5047 5052# 5052 5054# 5054 5056# 5056
5058# 5058 5060# 5060 5062# 5062 5064# 5064 5069# 5069 5071# 5071 5076# 5076
5078# 5078 5080# 5080 5082# 5082 5084# 5084 5086# 5086 5088# 5088 5090# 5090
5092# 5092 5312# 5312 5314# 5314 5316# 5316 5318# 5318 5323# 5323 5325# 5325
5327# 5327 5329# 5329 5331# 5331 5333# 5333 5338# 5338 5340# 5340 5342# 5342
5344# 5344 5346# 5346 5348# 5348 5350# 5350 5355# 5355 5357# 5357 5362# 5362
5364# 5364 5366# 5366 5368# 5368 5370# 5370 5372# 5372 5374# 5374 5376# 5376
5378# 5378 5601# 5601 5603# 5603 5605# 5605 5607# 5607 5612# 5612 5614# 5614
5616# 5616 5618# 5618 5620# 5620 5622# 5622 5627# 5627 5629# 5629 5631# 5631
5633# 5633 5635# 5635 5637# 5637 5639# 5639 5644# 5644 5646# 5646 5651# 5651
5653# 5653 5655# 5655 5657# 5657 5659# 5659 5661# 5661 5663# 5663 5665# 5665
5667# 5667 5773# 5773 5775# 5775 5777# 5777 5779# 5779 5781# 5781 6038# 6038
6040# 6040 6042# 6042 6044# 6044 6049# 6049 6051# 6051 6053# 6053 6055# 6055
6057# 6057 6059# 6059 6061# 6061 6063# 6063 6068# 6068 6070# 6070 6072# 6072
6077# 6077 6079# 6079 6084# 6084 6086# 6086 6088# 6088 6090# 6090 6092# 6092
6094# 6094 6096# 6096 6098# 6098 6100# 6100 6358# 6358 6360# 6360 6362# 6362
6364# 6364 6369# 6369 6371# 6371 6373# 6373 6375# 6375 6377# 6377 6379# 6379
6381# 6381 6383# 6383 6388# 6388 6390# 6390 6392# 6392 6394# 6394 6396# 6396
6398# 6398 6400# 6400 6405# 6405 6407# 6407 6412# 6412 6414# 6414 6416# 6416
6418# 6418 6420# 6420 6422# 6422 6424# 6424 6426# 6426 6428# 6428 6684# 6684
6686# 6686 6688# 6688 6690# 6690 6695# 6695 6697# 6697 6699# 6699 6701# 6701
6703# 6703 6705# 6705 6707# 6707 6709# 6709 6714# 6714 6716# 6716 6718# 6718
6720# 6720 6722# 6722 6724# 6724 6726# 6726 6731# 6731 6733# 6733 6738# 6738
6740# 6740 6742# 6742 6744# 6744 6746# 6746 6748# 6748 6750# 6750 6752# 6752
6754# 6754 7012# 7012 7014# 7014 7016# 7016 7018# 7018 7023# 7023 7025# 7025
7027# 7027 7029# 7029 7031# 7031 7033# 7033 7035# 7035 7037# 7037 7042# 7042
7044# 7044 7046# 7046 7048# 7048 7050# 7050 7052# 7052 7054# 7054 7059# 7059
7061# 7061 7066# 7066 7068# 7068 7070# 7070 7072# 7072 7074# 7074 7076# 7076
7078# 7078 7080# 7080 7082# 7082 7340# 7340 7342# 7342 7344# 7344 7346# 7346
7351# 7351 7353# 7353 7355# 7355 7357# 7357 7359# 7359 7361# 7361 7363# 7363
7365# 7365 7370# 7370 7372# 7372 7374# 7374 7376# 7376 7378# 7378 7380# 7380
7382# 7382 7387# 7387 7389# 7389 7394# 7394 7396# 7396 7398# 7398 7400# 7400
7402# 7402 7404# 7404 7406# 7406 7408# 7408 7410# 7410 7632# 7632 7634# 7634
7636# 7636 7638# 7638 7643# 7643 7645# 7645 7647# 7647 7649# 7649 7651# 7651
7653# 7653 7655# 7655 7657# 7657 7662# 7662 7664# 7664 7666# 7666 7668# 7668
7670# 7670 7672# 7672 7674# 7674 7679# 7679 7681# 7681 7686# 7686 7688# 7688
7690# 7690 7692# 7692 7694# 7694 7696# 7696 7698# 7698 7700# 7700 7702# 7702
7923# 7923 7925# 7925 7927# 7927 7929# 7929 7934# 7934 7936# 7936 7938# 7938
7940# 7940 7942# 7942 7944# 7944 7946# 7946 7948# 7948 7953# 7953 7955# 7955
7957# 7957 7959# 7959 7961# 7961 7963# 7963 7965# 7965 7970# 7970 7972# 7972
7977# 7977 7979# 7979 7981# 7981 7983# 7983 7985# 7985 7987# 7987 7989# 7989
7991# 7991 7993# 7993 8213# 8213 8215# 8215 8217# 8217 8219# 8219 8224# 8224
8226# 8226 8228# 8228 8230# 8230 8232# 8232 8234# 8234 8236# 8236 8238# 8238
8243# 8243 8245# 8245 8247# 8247 8249# 8249 8251# 8251 8253# 8253 8255# 8255
8260# 8260 8262# 8262 8267# 8267 8269# 8269 8271# 8271 8273# 8273 8275# 8275
8277# 8277 8279# 8279 8281# 8281 8283# 8283 8502# 8502 8504# 8504 8506# 8506
8508# 8508 8513# 8513 8515# 8515 8517# 8517 8519# 8519 8521# 8521 8523# 8523
8525# 8525 8527# 8527 8532# 8532 8534# 8534 8536# 8536 8538# 8538 8540# 8540
8542# 8542 8544# 8544 8549# 8549 8551# 8551 8556# 8556 8558# 8558 8560# 8560 SEQ 1826
8562# 8562 8564# 8564 8566# 8566 8568# 8568 8570# 8570 8572# 8572 8757# 8757
8759# 8759 8761# 8761 8763# 8763 8765# 8765 8767# 8767 8769# 8769 8771# 8771
8773# 8773 8775# 8775 8777# 8777 8779# 8779 8781# 8781 8783# 8783 8785# 8785
8790# 8790 8792# 8792 8794# 8794 8796# 8796 8798# 8798 8800# 8800 8802# 8802
8804# 8804 8809# 8809 8811# 8811 8813# 8813 8818# 8818 8820# 8820 8822# 8822
8824# 8824 8829# 8829 8831# 8831 8836# 8836 8838# 8838 8840# 8840 8842# 8842
8844# 8844 8846# 8846 8848# 8848 8850# 8850 8852# 8852 8857# 8857 8859# 8859
8861# 8861 8863# 8863 8865# 8865 8867# 8867 8869# 8869 8871# 8871 8873# 8873
$B 193# 193 195# 195 197# 197 199# 199 201# 201 203# 203 205# 205
207# 207 209# 209 211# 211 213# 213 215# 215 217# 217 219# 219
221# 221 223# 223 225# 225 227# 227 229# 229 231# 231 233# 233
235# 235 237# 237 239# 239 241# 241 243# 243 245# 245 247# 247
249# 249 251# 251 253# 253 255# 255 257# 257 259# 259 261# 261
263# 263 265# 265 267# 267 272# 272 274# 274 279# 279 281# 281
286# 286 288# 288 290# 290 295# 295 297# 297 299# 299 304# 304
306# 306 308# 308 313# 313 315# 315 317# 317 322# 322 324# 324
326# 326 331# 331 333# 333 335# 335 340# 340 342# 342 344# 344
349# 349 351# 351 353# 353 358# 358 360# 360 362# 362 367# 367
369# 369 371# 371 376# 376 378# 378 380# 380 385# 385 387# 387
389# 389 394# 394 396# 396 398# 398 403# 403 405# 405 407# 407
412# 412 414# 414 416# 416 421# 421 423# 423 425# 425 430# 430
432# 432 434# 434 439# 439 441# 441 443# 443 448# 448 450# 450
452# 452 457# 457 459# 459 461# 461 466# 466 468# 468 470# 470
475# 475 477# 477 479# 479 484# 484 486# 486 488# 488 493# 493
495# 495 497# 497 502# 502 504# 504 506# 506 511# 511 513# 513
515# 515 520# 520 522# 522 524# 524 529# 529 531# 531 533# 533
538# 538 540# 540 542# 542 547# 547 549# 549 551# 551 556# 556
558# 558 560# 560 565# 565 567# 567 569# 569 574# 574 576# 576
578# 578 583# 583 585# 585 587# 587 592# 592 594# 594 596# 596
598# 598 603# 603 608# 608 610# 610 612# 612 614# 614 616# 616
716# 716 718# 718 720# 720 722# 722 724# 724 726# 726 728# 728
730# 730 732# 732 734# 734 739# 739 741# 741 746# 746 748# 748
753# 753 755# 755 757# 757 762# 762 764# 764 766# 766 771# 771
773# 773 775# 775 780# 780 782# 782 784# 784 789# 789 791# 791
793# 793 798# 798 800# 800 802# 802 807# 807 809# 809 811# 811
816# 816 821# 821 823# 823 825# 825 827# 827 829# 829 831# 831
937# 937 942# 942 947# 947 949# 949 954# 954 956# 956 958# 958
963# 963 965# 965 970# 970 972# 972 1061# 1061 1063# 1063 1065# 1065
1070# 1070 1075# 1075 1080# 1080 1082# 1082 1087# 1087 1092# 1092 1094# 1094
1099# 1099 1101# 1101 1107# 1107 1109# 1109 1111# 1111 1113# 1113 1115# 1115
1117# 1117 1119# 1119 1121# 1121 1126# 1126 1128# 1128 1329# 1329 1331# 1331
1333# 1333 1335# 1335 1340# 1340 1342# 1342 1344# 1344 1346# 1346 1348# 1348
1350# 1350 1355# 1355 1357# 1357 1359# 1359 1364# 1364 1370# 1370 1372# 1372
1374# 1374 1376# 1376 1378# 1378 1380# 1380 1382# 1382 1384# 1384 1391# 1391
1393# 1393 1395# 1395 1397# 1397 1399# 1399 1401# 1401 1403# 1403 1405# 1405
1407# 1407 1409# 1409 1411# 1411 1413# 1413 1415# 1415 1420# 1420 1422# 1422
1427# 1427 1429# 1429 1431# 1431 1436# 1436 1438# 1438 1443# 1443 1445# 1445
1450# 1450 1455# 1455 1457# 1457 1585# 1585 1587# 1587 1589# 1589 1591# 1591
1675# 1675 1677# 1677 1679# 1679 1681# 1681 1683# 1683 1685# 1685 1690# 1690
1692# 1692 1694# 1694 1696# 1696 1698# 1698 1700# 1700 1705# 1705 1707# 1707
1709# 1709 1711# 1711 1713# 1713 1715# 1715 1717# 1717 1719# 1719 1721# 1721
1723# 1723 1725# 1725 1727# 1727 1729# 1729 1731# 1731 1733# 1733 1735# 1735
1737# 1737 1739# 1739 1741# 1741 1743# 1743 1748# 1748 1750# 1750 1752# 1752 SEQ 1827
1754# 1754 1756# 1756 1758# 1758 1760# 1760 1762# 1762 1764# 1764 1766# 1766
1772# 1772 1774# 1774 1776# 1776 1782# 1782 1784# 1784 1786# 1786 1788# 1788
1790# 1790 1792# 1792 1794# 1794 1796# 1796 1801# 1801 1803# 1803 1808# 1808
1810# 1810 1812# 1812 1817# 1817 1822# 1822 1824# 1824 1974# 1974 1976# 1976
1978# 1978 1980# 1980 1983# 1983 1985# 1985 1987# 1987 1989# 1989 1991# 1991
1993# 1993 1996# 1996 2001# 2001 2007# 2007 2009# 2009 2011# 2011 2013# 2013
2015# 2015 2017# 2017 2019# 2019 2021# 2021 2026# 2026 2028# 2028 2030# 2030
2032# 2032 2034# 2034 2036# 2036 2038# 2038 2040# 2040 2042# 2042 2044# 2044
2046# 2046 2048# 2048 2050# 2050 2052# 2052 2054# 2054 2056# 2056 2058# 2058
2060# 2060 2062# 2062 2064# 2064 2069# 2069 2071# 2071 2073# 2073 2079# 2079
2081# 2081 2083# 2083 2085# 2085 2087# 2087 2089# 2089 2091# 2091 2093# 2093
2095# 2095 2097# 2097 2099# 2099 2101# 2101 2106# 2106 2108# 2108 2268# 2268
2271# 2271 2273# 2273 2275# 2275 2277# 2277 2279# 2279 2282# 2282 2284# 2284
2286# 2286 2288# 2288 2291# 2291 2297# 2297 2299# 2299 2301# 2301 2307# 2307
2309# 2309 2311# 2311 2313# 2313 2315# 2315 2317# 2317 2319# 2319 2321# 2321
2326# 2326 2328# 2328 2330# 2330 2332# 2332 2334# 2334 2336# 2336 2338# 2338
2340# 2340 2342# 2342 2344# 2344 2346# 2346 2348# 2348 2350# 2350 2352# 2352
2354# 2354 2356# 2356 2358# 2358 2360# 2360 2362# 2362 2364# 2364 2369# 2369
2371# 2371 2373# 2373 2379# 2379 2381# 2381 2383# 2383 2385# 2385 2387# 2387
2389# 2389 2391# 2391 2393# 2393 2395# 2395 2397# 2397 2399# 2399 2401# 2401
2406# 2406 2408# 2408 2484# 2484 2486# 2486 2593# 2593 2595# 2595 2597# 2597
2599# 2599 2601# 2601 2854# 2854 2856# 2856 2858# 2858 2860# 2860 2865# 2865
2867# 2867 2869# 2869 2871# 2871 2873# 2873 2875# 2875 2880# 2880 2882# 2882
2884# 2884 2889# 2889 2891# 2891 2896# 2896 2898# 2898 2900# 2900 2902# 2902
2904# 2904 2906# 2906 2908# 2908 2910# 2910 2912# 2912 3164# 3164 3166# 3166
3168# 3168 3170# 3170 3175# 3175 3177# 3177 3179# 3179 3181# 3181 3183# 3183
3185# 3185 3190# 3190 3192# 3192 3194# 3194 3199# 3199 3201# 3201 3206# 3206
3208# 3208 3210# 3210 3212# 3212 3214# 3214 3216# 3216 3218# 3218 3220# 3220
3222# 3222 3481# 3481 3483# 3483 3485# 3485 3487# 3487 3492# 3492 3494# 3494
3496# 3496 3498# 3498 3500# 3500 3502# 3502 3507# 3507 3509# 3509 3511# 3511
3513# 3513 3515# 3515 3517# 3517 3519# 3519 3524# 3524 3526# 3526 3531# 3531
3533# 3533 3535# 3535 3537# 3537 3539# 3539 3541# 3541 3543# 3543 3545# 3545
3547# 3547 3804# 3804 3806# 3806 3808# 3808 3810# 3810 3815# 3815 3817# 3817
3819# 3819 3821# 3821 3823# 3823 3825# 3825 3830# 3830 3832# 3832 3834# 3834
3836# 3836 3838# 3838 3840# 3840 3842# 3842 3847# 3847 3849# 3849 3854# 3854
3856# 3856 3858# 3858 3860# 3860 3862# 3862 3864# 3864 3866# 3866 3868# 3868
3870# 3870 4127# 4127 4129# 4129 4131# 4131 4133# 4133 4138# 4138 4140# 4140
4142# 4142 4144# 4144 4146# 4146 4148# 4148 4153# 4153 4155# 4155 4157# 4157
4159# 4159 4161# 4161 4163# 4163 4165# 4165 4170# 4170 4172# 4172 4177# 4177
4179# 4179 4181# 4181 4183# 4183 4185# 4185 4187# 4187 4189# 4189 4191# 4191
4193# 4193 4451# 4451 4453# 4453 4455# 4455 4457# 4457 4462# 4462 4464# 4464
4466# 4466 4468# 4468 4470# 4470 4472# 4472 4477# 4477 4479# 4479 4481# 4481
4483# 4483 4485# 4485 4487# 4487 4489# 4489 4494# 4494 4496# 4496 4501# 4501
4503# 4503 4505# 4505 4507# 4507 4509# 4509 4511# 4511 4513# 4513 4515# 4515
4517# 4517 4739# 4739 4741# 4741 4743# 4743 4745# 4745 4750# 4750 4752# 4752
4754# 4754 4756# 4756 4758# 4758 4760# 4760 4765# 4765 4767# 4767 4769# 4769
4771# 4771 4773# 4773 4775# 4775 4777# 4777 4782# 4782 4784# 4784 4789# 4789
4791# 4791 4793# 4793 4795# 4795 4797# 4797 4799# 4799 4801# 4801 4803# 4803
4805# 4805 5026# 5026 5028# 5028 5030# 5030 5032# 5032 5037# 5037 5039# 5039
5041# 5041 5043# 5043 5045# 5045 5047# 5047 5052# 5052 5054# 5054 5056# 5056
5058# 5058 5060# 5060 5062# 5062 5064# 5064 5069# 5069 5071# 5071 5076# 5076
5078# 5078 5080# 5080 5082# 5082 5084# 5084 5086# 5086 5088# 5088 5090# 5090
5092# 5092 5312# 5312 5314# 5314 5316# 5316 5318# 5318 5323# 5323 5325# 5325 SEQ 1828
5327# 5327 5329# 5329 5331# 5331 5333# 5333 5338# 5338 5340# 5340 5342# 5342
5344# 5344 5346# 5346 5348# 5348 5350# 5350 5355# 5355 5357# 5357 5362# 5362
5364# 5364 5366# 5366 5368# 5368 5370# 5370 5372# 5372 5374# 5374 5376# 5376
5378# 5378 5601# 5601 5603# 5603 5605# 5605 5607# 5607 5612# 5612 5614# 5614
5616# 5616 5618# 5618 5620# 5620 5622# 5622 5627# 5627 5629# 5629 5631# 5631
5633# 5633 5635# 5635 5637# 5637 5639# 5639 5644# 5644 5646# 5646 5651# 5651
5653# 5653 5655# 5655 5657# 5657 5659# 5659 5661# 5661 5663# 5663 5665# 5665
5667# 5667 5773# 5773 5775# 5775 5777# 5777 5779# 5779 5781# 5781 6038# 6038
6040# 6040 6042# 6042 6044# 6044 6049# 6049 6051# 6051 6053# 6053 6055# 6055
6057# 6057 6059# 6059 6061# 6061 6063# 6063 6068# 6068 6070# 6070 6072# 6072
6077# 6077 6079# 6079 6084# 6084 6086# 6086 6088# 6088 6090# 6090 6092# 6092
6094# 6094 6096# 6096 6098# 6098 6100# 6100 6358# 6358 6360# 6360 6362# 6362
6364# 6364 6369# 6369 6371# 6371 6373# 6373 6375# 6375 6377# 6377 6379# 6379
6381# 6381 6383# 6383 6388# 6388 6390# 6390 6392# 6392 6394# 6394 6396# 6396
6398# 6398 6400# 6400 6405# 6405 6407# 6407 6412# 6412 6414# 6414 6416# 6416
6418# 6418 6420# 6420 6422# 6422 6424# 6424 6426# 6426 6428# 6428 6684# 6684
6686# 6686 6688# 6688 6690# 6690 6695# 6695 6697# 6697 6699# 6699 6701# 6701
6703# 6703 6705# 6705 6707# 6707 6709# 6709 6714# 6714 6716# 6716 6718# 6718
6720# 6720 6722# 6722 6724# 6724 6726# 6726 6731# 6731 6733# 6733 6738# 6738
6740# 6740 6742# 6742 6744# 6744 6746# 6746 6748# 6748 6750# 6750 6752# 6752
6754# 6754 7012# 7012 7014# 7014 7016# 7016 7018# 7018 7023# 7023 7025# 7025
7027# 7027 7029# 7029 7031# 7031 7033# 7033 7035# 7035 7037# 7037 7042# 7042
7044# 7044 7046# 7046 7048# 7048 7050# 7050 7052# 7052 7054# 7054 7059# 7059
7061# 7061 7066# 7066 7068# 7068 7070# 7070 7072# 7072 7074# 7074 7076# 7076
7078# 7078 7080# 7080 7082# 7082 7340# 7340 7342# 7342 7344# 7344 7346# 7346
7351# 7351 7353# 7353 7355# 7355 7357# 7357 7359# 7359 7361# 7361 7363# 7363
7365# 7365 7370# 7370 7372# 7372 7374# 7374 7376# 7376 7378# 7378 7380# 7380
7382# 7382 7387# 7387 7389# 7389 7394# 7394 7396# 7396 7398# 7398 7400# 7400
7402# 7402 7404# 7404 7406# 7406 7408# 7408 7410# 7410 7632# 7632 7634# 7634
7636# 7636 7638# 7638 7643# 7643 7645# 7645 7647# 7647 7649# 7649 7651# 7651
7653# 7653 7655# 7655 7657# 7657 7662# 7662 7664# 7664 7666# 7666 7668# 7668
7670# 7670 7672# 7672 7674# 7674 7679# 7679 7681# 7681 7686# 7686 7688# 7688
7690# 7690 7692# 7692 7694# 7694 7696# 7696 7698# 7698 7700# 7700 7702# 7702
7923# 7923 7925# 7925 7927# 7927 7929# 7929 7934# 7934 7936# 7936 7938# 7938
7940# 7940 7942# 7942 7944# 7944 7946# 7946 7948# 7948 7953# 7953 7955# 7955
7957# 7957 7959# 7959 7961# 7961 7963# 7963 7965# 7965 7970# 7970 7972# 7972
7977# 7977 7979# 7979 7981# 7981 7983# 7983 7985# 7985 7987# 7987 7989# 7989
7991# 7991 7993# 7993 8213# 8213 8215# 8215 8217# 8217 8219# 8219 8224# 8224
8226# 8226 8228# 8228 8230# 8230 8232# 8232 8234# 8234 8236# 8236 8238# 8238
8243# 8243 8245# 8245 8247# 8247 8249# 8249 8251# 8251 8253# 8253 8255# 8255
8260# 8260 8262# 8262 8267# 8267 8269# 8269 8271# 8271 8273# 8273 8275# 8275
8277# 8277 8279# 8279 8281# 8281 8283# 8283 8502# 8502 8504# 8504 8506# 8506
8508# 8508 8513# 8513 8515# 8515 8517# 8517 8519# 8519 8521# 8521 8523# 8523
8525# 8525 8527# 8527 8532# 8532 8534# 8534 8536# 8536 8538# 8538 8540# 8540
8542# 8542 8544# 8544 8549# 8549 8551# 8551 8556# 8556 8558# 8558 8560# 8560
8562# 8562 8564# 8564 8566# 8566 8568# 8568 8570# 8570 8572# 8572 8757# 8757
8759# 8759 8761# 8761 8763# 8763 8765# 8765 8767# 8767 8769# 8769 8771# 8771
8773# 8773 8775# 8775 8777# 8777 8779# 8779 8781# 8781 8783# 8783 8785# 8785
8790# 8790 8792# 8792 8794# 8794 8796# 8796 8798# 8798 8800# 8800 8802# 8802
8804# 8804 8809# 8809 8811# 8811 8813# 8813 8818# 8818 8820# 8820 8822# 8822
8824# 8824 8829# 8829 8831# 8831 8836# 8836 8838# 8838 8840# 8840 8842# 8842
8844# 8844 8846# 8846 8848# 8848 8850# 8850 8852# 8852 8857# 8857 8859# 8859
8861# 8861 8863# 8863 8865# 8865 8867# 8867 8869# 8869 8871# 8871 8873# 8873 SEQ 1829
$CHR 193# 193 195# 195 197# 197 199# 199 201# 201 203# 203 205# 205
207# 207 209# 209 211# 211 213# 213 215# 215 217# 217 219# 219
221# 221 223# 223 225# 225 227# 227 229# 229 231# 231 233# 233
235# 235 237# 237 239# 239 241# 241 243# 243 245# 245 247# 247
249# 249 251# 251 253# 253 255# 255 257# 257 259# 259 261# 261
263# 263 265# 265 267# 267 272# 272 274# 274 279# 279 281# 281
286# 286 288# 288 290# 290 295# 295 297# 297 299# 299 304# 304
306# 306 308# 308 313# 313 315# 315 317# 317 322# 322 324# 324
326# 326 331# 331 333# 333 335# 335 340# 340 342# 342 344# 344
349# 349 351# 351 353# 353 358# 358 360# 360 362# 362 367# 367
369# 369 371# 371 376# 376 378# 378 380# 380 385# 385 387# 387
389# 389 394# 394 396# 396 398# 398 403# 403 405# 405 407# 407
412# 412 414# 414 416# 416 421# 421 423# 423 425# 425 430# 430
432# 432 434# 434 439# 439 441# 441 443# 443 448# 448 450# 450
452# 452 457# 457 459# 459 461# 461 466# 466 468# 468 470# 470
475# 475 477# 477 479# 479 484# 484 486# 486 488# 488 493# 493
495# 495 497# 497 502# 502 504# 504 506# 506 511# 511 513# 513
515# 515 520# 520 522# 522 524# 524 529# 529 531# 531 533# 533
538# 538 540# 540 542# 542 547# 547 549# 549 551# 551 556# 556
558# 558 560# 560 565# 565 567# 567 569# 569 574# 574 576# 576
578# 578 583# 583 585# 585 587# 587 592# 592 594# 594 596# 596
598# 598 603# 603 608# 608 610# 610 612# 612 614# 614 616# 616
716# 716 718# 718 720# 720 722# 722 724# 724 726# 726 728# 728
730# 730 732# 732 734# 734 739# 739 741# 741 746# 746 748# 748
753# 753 755# 755 757# 757 762# 762 764# 764 766# 766 771# 771
773# 773 775# 775 780# 780 782# 782 784# 784 789# 789 791# 791
793# 793 798# 798 800# 800 802# 802 807# 807 809# 809 811# 811
816# 816 821# 821 823# 823 825# 825 827# 827 829# 829 831# 831
937# 937 942# 942 947# 947 949# 949 954# 954 956# 956 958# 958
963# 963 965# 965 970# 970 972# 972 1061# 1061 1063# 1063 1065# 1065
1070# 1070 1075# 1075 1080# 1080 1082# 1082 1087# 1087 1092# 1092 1094# 1094
1099# 1099 1101# 1101 1107# 1107 1109# 1109 1111# 1111 1113# 1113 1115# 1115
1117# 1117 1119# 1119 1121# 1121 1126# 1126 1128# 1128 1329# 1329 1331# 1331
1333# 1333 1335# 1335 1340# 1340 1342# 1342 1344# 1344 1346# 1346 1348# 1348
1350# 1350 1355# 1355 1357# 1357 1359# 1359 1364# 1364 1370# 1370 1372# 1372
1374# 1374 1376# 1376 1378# 1378 1380# 1380 1382# 1382 1384# 1384 1391# 1391
1393# 1393 1395# 1395 1397# 1397 1399# 1399 1401# 1401 1403# 1403 1405# 1405
1407# 1407 1409# 1409 1411# 1411 1413# 1413 1415# 1415 1420# 1420 1422# 1422
1427# 1427 1429# 1429 1431# 1431 1436# 1436 1438# 1438 1443# 1443 1445# 1445
1450# 1450 1455# 1455 1457# 1457 1585# 1585 1587# 1587 1589# 1589 1591# 1591
1675# 1675 1677# 1677 1679# 1679 1681# 1681 1683# 1683 1685# 1685 1690# 1690
1692# 1692 1694# 1694 1696# 1696 1698# 1698 1700# 1700 1705# 1705 1707# 1707
1709# 1709 1711# 1711 1713# 1713 1715# 1715 1717# 1717 1719# 1719 1721# 1721
1723# 1723 1725# 1725 1727# 1727 1729# 1729 1731# 1731 1733# 1733 1735# 1735
1737# 1737 1739# 1739 1741# 1741 1743# 1743 1748# 1748 1750# 1750 1752# 1752
1754# 1754 1756# 1756 1758# 1758 1760# 1760 1762# 1762 1764# 1764 1766# 1766
1772# 1772 1774# 1774 1776# 1776 1782# 1782 1784# 1784 1786# 1786 1788# 1788
1790# 1790 1792# 1792 1794# 1794 1796# 1796 1801# 1801 1803# 1803 1808# 1808
1810# 1810 1812# 1812 1817# 1817 1822# 1822 1824# 1824 1974# 1974 1976# 1976
1978# 1978 1980# 1980 1983# 1983 1985# 1985 1987# 1987 1989# 1989 1991# 1991
1993# 1993 1996# 1996 2001# 2001 2007# 2007 2009# 2009 2011# 2011 2013# 2013
2015# 2015 2017# 2017 2019# 2019 2021# 2021 2026# 2026 2028# 2028 2030# 2030
2032# 2032 2034# 2034 2036# 2036 2038# 2038 2040# 2040 2042# 2042 2044# 2044 SEQ 1830
2046# 2046 2048# 2048 2050# 2050 2052# 2052 2054# 2054 2056# 2056 2058# 2058
2060# 2060 2062# 2062 2064# 2064 2069# 2069 2071# 2071 2073# 2073 2079# 2079
2081# 2081 2083# 2083 2085# 2085 2087# 2087 2089# 2089 2091# 2091 2093# 2093
2095# 2095 2097# 2097 2099# 2099 2101# 2101 2106# 2106 2108# 2108 2268# 2268
2271# 2271 2273# 2273 2275# 2275 2277# 2277 2279# 2279 2282# 2282 2284# 2284
2286# 2286 2288# 2288 2291# 2291 2297# 2297 2299# 2299 2301# 2301 2307# 2307
2309# 2309 2311# 2311 2313# 2313 2315# 2315 2317# 2317 2319# 2319 2321# 2321
2326# 2326 2328# 2328 2330# 2330 2332# 2332 2334# 2334 2336# 2336 2338# 2338
2340# 2340 2342# 2342 2344# 2344 2346# 2346 2348# 2348 2350# 2350 2352# 2352
2354# 2354 2356# 2356 2358# 2358 2360# 2360 2362# 2362 2364# 2364 2369# 2369
2371# 2371 2373# 2373 2379# 2379 2381# 2381 2383# 2383 2385# 2385 2387# 2387
2389# 2389 2391# 2391 2393# 2393 2395# 2395 2397# 2397 2399# 2399 2401# 2401
2406# 2406 2408# 2408 2484# 2484 2486# 2486 2593# 2593 2595# 2595 2597# 2597
2599# 2599 2601# 2601 2854# 2854 2856# 2856 2858# 2858 2860# 2860 2865# 2865
2867# 2867 2869# 2869 2871# 2871 2873# 2873 2875# 2875 2880# 2880 2882# 2882
2884# 2884 2889# 2889 2891# 2891 2896# 2896 2898# 2898 2900# 2900 2902# 2902
2904# 2904 2906# 2906 2908# 2908 2910# 2910 2912# 2912 3164# 3164 3166# 3166
3168# 3168 3170# 3170 3175# 3175 3177# 3177 3179# 3179 3181# 3181 3183# 3183
3185# 3185 3190# 3190 3192# 3192 3194# 3194 3199# 3199 3201# 3201 3206# 3206
3208# 3208 3210# 3210 3212# 3212 3214# 3214 3216# 3216 3218# 3218 3220# 3220
3222# 3222 3481# 3481 3483# 3483 3485# 3485 3487# 3487 3492# 3492 3494# 3494
3496# 3496 3498# 3498 3500# 3500 3502# 3502 3507# 3507 3509# 3509 3511# 3511
3513# 3513 3515# 3515 3517# 3517 3519# 3519 3524# 3524 3526# 3526 3531# 3531
3533# 3533 3535# 3535 3537# 3537 3539# 3539 3541# 3541 3543# 3543 3545# 3545
3547# 3547 3804# 3804 3806# 3806 3808# 3808 3810# 3810 3815# 3815 3817# 3817
3819# 3819 3821# 3821 3823# 3823 3825# 3825 3830# 3830 3832# 3832 3834# 3834
3836# 3836 3838# 3838 3840# 3840 3842# 3842 3847# 3847 3849# 3849 3854# 3854
3856# 3856 3858# 3858 3860# 3860 3862# 3862 3864# 3864 3866# 3866 3868# 3868
3870# 3870 4127# 4127 4129# 4129 4131# 4131 4133# 4133 4138# 4138 4140# 4140
4142# 4142 4144# 4144 4146# 4146 4148# 4148 4153# 4153 4155# 4155 4157# 4157
4159# 4159 4161# 4161 4163# 4163 4165# 4165 4170# 4170 4172# 4172 4177# 4177
4179# 4179 4181# 4181 4183# 4183 4185# 4185 4187# 4187 4189# 4189 4191# 4191
4193# 4193 4451# 4451 4453# 4453 4455# 4455 4457# 4457 4462# 4462 4464# 4464
4466# 4466 4468# 4468 4470# 4470 4472# 4472 4477# 4477 4479# 4479 4481# 4481
4483# 4483 4485# 4485 4487# 4487 4489# 4489 4494# 4494 4496# 4496 4501# 4501
4503# 4503 4505# 4505 4507# 4507 4509# 4509 4511# 4511 4513# 4513 4515# 4515
4517# 4517 4739# 4739 4741# 4741 4743# 4743 4745# 4745 4750# 4750 4752# 4752
4754# 4754 4756# 4756 4758# 4758 4760# 4760 4765# 4765 4767# 4767 4769# 4769
4771# 4771 4773# 4773 4775# 4775 4777# 4777 4782# 4782 4784# 4784 4789# 4789
4791# 4791 4793# 4793 4795# 4795 4797# 4797 4799# 4799 4801# 4801 4803# 4803
4805# 4805 5026# 5026 5028# 5028 5030# 5030 5032# 5032 5037# 5037 5039# 5039
5041# 5041 5043# 5043 5045# 5045 5047# 5047 5052# 5052 5054# 5054 5056# 5056
5058# 5058 5060# 5060 5062# 5062 5064# 5064 5069# 5069 5071# 5071 5076# 5076
5078# 5078 5080# 5080 5082# 5082 5084# 5084 5086# 5086 5088# 5088 5090# 5090
5092# 5092 5312# 5312 5314# 5314 5316# 5316 5318# 5318 5323# 5323 5325# 5325
5327# 5327 5329# 5329 5331# 5331 5333# 5333 5338# 5338 5340# 5340 5342# 5342
5344# 5344 5346# 5346 5348# 5348 5350# 5350 5355# 5355 5357# 5357 5362# 5362
5364# 5364 5366# 5366 5368# 5368 5370# 5370 5372# 5372 5374# 5374 5376# 5376
5378# 5378 5601# 5601 5603# 5603 5605# 5605 5607# 5607 5612# 5612 5614# 5614
5616# 5616 5618# 5618 5620# 5620 5622# 5622 5627# 5627 5629# 5629 5631# 5631
5633# 5633 5635# 5635 5637# 5637 5639# 5639 5644# 5644 5646# 5646 5651# 5651
5653# 5653 5655# 5655 5657# 5657 5659# 5659 5661# 5661 5663# 5663 5665# 5665
5667# 5667 5773# 5773 5775# 5775 5777# 5777 5779# 5779 5781# 5781 6038# 6038 SEQ 1831
6040# 6040 6042# 6042 6044# 6044 6049# 6049 6051# 6051 6053# 6053 6055# 6055
6057# 6057 6059# 6059 6061# 6061 6063# 6063 6068# 6068 6070# 6070 6072# 6072
6077# 6077 6079# 6079 6084# 6084 6086# 6086 6088# 6088 6090# 6090 6092# 6092
6094# 6094 6096# 6096 6098# 6098 6100# 6100 6358# 6358 6360# 6360 6362# 6362
6364# 6364 6369# 6369 6371# 6371 6373# 6373 6375# 6375 6377# 6377 6379# 6379
6381# 6381 6383# 6383 6388# 6388 6390# 6390 6392# 6392 6394# 6394 6396# 6396
6398# 6398 6400# 6400 6405# 6405 6407# 6407 6412# 6412 6414# 6414 6416# 6416
6418# 6418 6420# 6420 6422# 6422 6424# 6424 6426# 6426 6428# 6428 6684# 6684
6686# 6686 6688# 6688 6690# 6690 6695# 6695 6697# 6697 6699# 6699 6701# 6701
6703# 6703 6705# 6705 6707# 6707 6709# 6709 6714# 6714 6716# 6716 6718# 6718
6720# 6720 6722# 6722 6724# 6724 6726# 6726 6731# 6731 6733# 6733 6738# 6738
6740# 6740 6742# 6742 6744# 6744 6746# 6746 6748# 6748 6750# 6750 6752# 6752
6754# 6754 7012# 7012 7014# 7014 7016# 7016 7018# 7018 7023# 7023 7025# 7025
7027# 7027 7029# 7029 7031# 7031 7033# 7033 7035# 7035 7037# 7037 7042# 7042
7044# 7044 7046# 7046 7048# 7048 7050# 7050 7052# 7052 7054# 7054 7059# 7059
7061# 7061 7066# 7066 7068# 7068 7070# 7070 7072# 7072 7074# 7074 7076# 7076
7078# 7078 7080# 7080 7082# 7082 7340# 7340 7342# 7342 7344# 7344 7346# 7346
7351# 7351 7353# 7353 7355# 7355 7357# 7357 7359# 7359 7361# 7361 7363# 7363
7365# 7365 7370# 7370 7372# 7372 7374# 7374 7376# 7376 7378# 7378 7380# 7380
7382# 7382 7387# 7387 7389# 7389 7394# 7394 7396# 7396 7398# 7398 7400# 7400
7402# 7402 7404# 7404 7406# 7406 7408# 7408 7410# 7410 7632# 7632 7634# 7634
7636# 7636 7638# 7638 7643# 7643 7645# 7645 7647# 7647 7649# 7649 7651# 7651
7653# 7653 7655# 7655 7657# 7657 7662# 7662 7664# 7664 7666# 7666 7668# 7668
7670# 7670 7672# 7672 7674# 7674 7679# 7679 7681# 7681 7686# 7686 7688# 7688
7690# 7690 7692# 7692 7694# 7694 7696# 7696 7698# 7698 7700# 7700 7702# 7702
7923# 7923 7925# 7925 7927# 7927 7929# 7929 7934# 7934 7936# 7936 7938# 7938
7940# 7940 7942# 7942 7944# 7944 7946# 7946 7948# 7948 7953# 7953 7955# 7955
7957# 7957 7959# 7959 7961# 7961 7963# 7963 7965# 7965 7970# 7970 7972# 7972
7977# 7977 7979# 7979 7981# 7981 7983# 7983 7985# 7985 7987# 7987 7989# 7989
7991# 7991 7993# 7993 8213# 8213 8215# 8215 8217# 8217 8219# 8219 8224# 8224
8226# 8226 8228# 8228 8230# 8230 8232# 8232 8234# 8234 8236# 8236 8238# 8238
8243# 8243 8245# 8245 8247# 8247 8249# 8249 8251# 8251 8253# 8253 8255# 8255
8260# 8260 8262# 8262 8267# 8267 8269# 8269 8271# 8271 8273# 8273 8275# 8275
8277# 8277 8279# 8279 8281# 8281 8283# 8283 8502# 8502 8504# 8504 8506# 8506
8508# 8508 8513# 8513 8515# 8515 8517# 8517 8519# 8519 8521# 8521 8523# 8523
8525# 8525 8527# 8527 8532# 8532 8534# 8534 8536# 8536 8538# 8538 8540# 8540
8542# 8542 8544# 8544 8549# 8549 8551# 8551 8556# 8556 8558# 8558 8560# 8560
8562# 8562 8564# 8564 8566# 8566 8568# 8568 8570# 8570 8572# 8572 8757# 8757
8759# 8759 8761# 8761 8763# 8763 8765# 8765 8767# 8767 8769# 8769 8771# 8771
8773# 8773 8775# 8775 8777# 8777 8779# 8779 8781# 8781 8783# 8783 8785# 8785
8790# 8790 8792# 8792 8794# 8794 8796# 8796 8798# 8798 8800# 8800 8802# 8802
8804# 8804 8809# 8809 8811# 8811 8813# 8813 8818# 8818 8820# 8820 8822# 8822
8824# 8824 8829# 8829 8831# 8831 8836# 8836 8838# 8838 8840# 8840 8842# 8842
8844# 8844 8846# 8846 8848# 8848 8850# 8850 8852# 8852 8857# 8857 8859# 8859
8861# 8861 8863# 8863 8865# 8865 8867# 8867 8869# 8869 8871# 8871 8873# 8873
$GARG 193# 193 195# 195 197# 197 199# 199 201# 201 203# 203 205# 205
207# 207 209# 209 211# 211 213# 213 215# 215 217# 217 219# 219
221# 221 223# 223 225# 225 227# 227 229# 229 231# 231 233# 233
235# 235 237# 237 239# 239 241# 241 243# 243 245# 245 247# 247
249# 249 251# 251 253# 253 255# 255 257# 257 259# 259 261# 261
263# 263 265# 265 267# 267 272# 272 274# 274 279# 279 281# 281
286# 286 288# 288 290# 290 295# 295 297# 297 299# 299 304# 304
306# 306 308# 308 313# 313 315# 315 317# 317 322# 322 324# 324 SEQ 1832
326# 326 331# 331 333# 333 335# 335 340# 340 342# 342 344# 344
349# 349 351# 351 353# 353 358# 358 360# 360 362# 362 367# 367
369# 369 371# 371 376# 376 378# 378 380# 380 385# 385 387# 387
389# 389 394# 394 396# 396 398# 398 403# 403 405# 405 407# 407
412# 412 414# 414 416# 416 421# 421 423# 423 425# 425 430# 430
432# 432 434# 434 439# 439 441# 441 443# 443 448# 448 450# 450
452# 452 457# 457 459# 459 461# 461 466# 466 468# 468 470# 470
475# 475 477# 477 479# 479 484# 484 486# 486 488# 488 493# 493
495# 495 497# 497 502# 502 504# 504 506# 506 511# 511 513# 513
515# 515 520# 520 522# 522 524# 524 529# 529 531# 531 533# 533
538# 538 540# 540 542# 542 547# 547 549# 549 551# 551 556# 556
558# 558 560# 560 565# 565 567# 567 569# 569 574# 574 576# 576
578# 578 583# 583 585# 585 587# 587 592# 592 594# 594 596# 596
598# 598 603# 603 608# 608 610# 610 612# 612 614# 614 616# 616
716# 716 718# 718 720# 720 722# 722 724# 724 726# 726 728# 728
730# 730 732# 732 734# 734 739# 739 741# 741 746# 746 748# 748
753# 753 755# 755 757# 757 762# 762 764# 764 766# 766 771# 771
773# 773 775# 775 780# 780 782# 782 784# 784 789# 789 791# 791
793# 793 798# 798 800# 800 802# 802 807# 807 809# 809 811# 811
816# 816 821# 821 823# 823 825# 825 827# 827 829# 829 831# 831
937# 937 942# 942 947# 947 949# 949 954# 954 956# 956 958# 958
963# 963 965# 965 970# 970 972# 972 1061# 1061 1063# 1063 1065# 1065
1070# 1070 1075# 1075 1080# 1080 1082# 1082 1087# 1087 1092# 1092 1094# 1094
1099# 1099 1101# 1101 1107# 1107 1109# 1109 1111# 1111 1113# 1113 1115# 1115
1117# 1117 1119# 1119 1121# 1121 1126# 1126 1128# 1128 1329# 1329 1331# 1331
1333# 1333 1335# 1335 1340# 1340 1342# 1342 1344# 1344 1346# 1346 1348# 1348
1350# 1350 1355# 1355 1357# 1357 1359# 1359 1364# 1364 1370# 1370 1372# 1372
1374# 1374 1376# 1376 1378# 1378 1380# 1380 1382# 1382 1384# 1384 1391# 1391
1393# 1393 1395# 1395 1397# 1397 1399# 1399 1401# 1401 1403# 1403 1405# 1405
1407# 1407 1409# 1409 1411# 1411 1413# 1413 1415# 1415 1420# 1420 1422# 1422
1427# 1427 1429# 1429 1431# 1431 1436# 1436 1438# 1438 1443# 1443 1445# 1445
1450# 1450 1455# 1455 1457# 1457 1585# 1585 1587# 1587 1589# 1589 1591# 1591
1675# 1675 1677# 1677 1679# 1679 1681# 1681 1683# 1683 1685# 1685 1690# 1690
1692# 1692 1694# 1694 1696# 1696 1698# 1698 1700# 1700 1705# 1705 1707# 1707
1709# 1709 1711# 1711 1713# 1713 1715# 1715 1717# 1717 1719# 1719 1721# 1721
1723# 1723 1725# 1725 1727# 1727 1729# 1729 1731# 1731 1733# 1733 1735# 1735
1737# 1737 1739# 1739 1741# 1741 1743# 1743 1748# 1748 1750# 1750 1752# 1752
1754# 1754 1756# 1756 1758# 1758 1760# 1760 1762# 1762 1764# 1764 1766# 1766
1772# 1772 1774# 1774 1776# 1776 1782# 1782 1784# 1784 1786# 1786 1788# 1788
1790# 1790 1792# 1792 1794# 1794 1796# 1796 1801# 1801 1803# 1803 1808# 1808
1810# 1810 1812# 1812 1817# 1817 1822# 1822 1824# 1824 1974# 1974 1976# 1976
1978# 1978 1980# 1980 1983# 1983 1985# 1985 1987# 1987 1989# 1989 1991# 1991
1993# 1993 1996# 1996 2001# 2001 2007# 2007 2009# 2009 2011# 2011 2013# 2013
2015# 2015 2017# 2017 2019# 2019 2021# 2021 2026# 2026 2028# 2028 2030# 2030
2032# 2032 2034# 2034 2036# 2036 2038# 2038 2040# 2040 2042# 2042 2044# 2044
2046# 2046 2048# 2048 2050# 2050 2052# 2052 2054# 2054 2056# 2056 2058# 2058
2060# 2060 2062# 2062 2064# 2064 2069# 2069 2071# 2071 2073# 2073 2079# 2079
2081# 2081 2083# 2083 2085# 2085 2087# 2087 2089# 2089 2091# 2091 2093# 2093
2095# 2095 2097# 2097 2099# 2099 2101# 2101 2106# 2106 2108# 2108 2268# 2268
2271# 2271 2273# 2273 2275# 2275 2277# 2277 2279# 2279 2282# 2282 2284# 2284
2286# 2286 2288# 2288 2291# 2291 2297# 2297 2299# 2299 2301# 2301 2307# 2307
2309# 2309 2311# 2311 2313# 2313 2315# 2315 2317# 2317 2319# 2319 2321# 2321
2326# 2326 2328# 2328 2330# 2330 2332# 2332 2334# 2334 2336# 2336 2338# 2338 SEQ 1833
2340# 2340 2342# 2342 2344# 2344 2346# 2346 2348# 2348 2350# 2350 2352# 2352
2354# 2354 2356# 2356 2358# 2358 2360# 2360 2362# 2362 2364# 2364 2369# 2369
2371# 2371 2373# 2373 2379# 2379 2381# 2381 2383# 2383 2385# 2385 2387# 2387
2389# 2389 2391# 2391 2393# 2393 2395# 2395 2397# 2397 2399# 2399 2401# 2401
2406# 2406 2408# 2408 2484# 2484 2486# 2486 2593# 2593 2595# 2595 2597# 2597
2599# 2599 2601# 2601 2854# 2854 2856# 2856 2858# 2858 2860# 2860 2865# 2865
2867# 2867 2869# 2869 2871# 2871 2873# 2873 2875# 2875 2880# 2880 2882# 2882
2884# 2884 2889# 2889 2891# 2891 2896# 2896 2898# 2898 2900# 2900 2902# 2902
2904# 2904 2906# 2906 2908# 2908 2910# 2910 2912# 2912 3164# 3164 3166# 3166
3168# 3168 3170# 3170 3175# 3175 3177# 3177 3179# 3179 3181# 3181 3183# 3183
3185# 3185 3190# 3190 3192# 3192 3194# 3194 3199# 3199 3201# 3201 3206# 3206
3208# 3208 3210# 3210 3212# 3212 3214# 3214 3216# 3216 3218# 3218 3220# 3220
3222# 3222 3481# 3481 3483# 3483 3485# 3485 3487# 3487 3492# 3492 3494# 3494
3496# 3496 3498# 3498 3500# 3500 3502# 3502 3507# 3507 3509# 3509 3511# 3511
3513# 3513 3515# 3515 3517# 3517 3519# 3519 3524# 3524 3526# 3526 3531# 3531
3533# 3533 3535# 3535 3537# 3537 3539# 3539 3541# 3541 3543# 3543 3545# 3545
3547# 3547 3804# 3804 3806# 3806 3808# 3808 3810# 3810 3815# 3815 3817# 3817
3819# 3819 3821# 3821 3823# 3823 3825# 3825 3830# 3830 3832# 3832 3834# 3834
3836# 3836 3838# 3838 3840# 3840 3842# 3842 3847# 3847 3849# 3849 3854# 3854
3856# 3856 3858# 3858 3860# 3860 3862# 3862 3864# 3864 3866# 3866 3868# 3868
3870# 3870 4127# 4127 4129# 4129 4131# 4131 4133# 4133 4138# 4138 4140# 4140
4142# 4142 4144# 4144 4146# 4146 4148# 4148 4153# 4153 4155# 4155 4157# 4157
4159# 4159 4161# 4161 4163# 4163 4165# 4165 4170# 4170 4172# 4172 4177# 4177
4179# 4179 4181# 4181 4183# 4183 4185# 4185 4187# 4187 4189# 4189 4191# 4191
4193# 4193 4451# 4451 4453# 4453 4455# 4455 4457# 4457 4462# 4462 4464# 4464
4466# 4466 4468# 4468 4470# 4470 4472# 4472 4477# 4477 4479# 4479 4481# 4481
4483# 4483 4485# 4485 4487# 4487 4489# 4489 4494# 4494 4496# 4496 4501# 4501
4503# 4503 4505# 4505 4507# 4507 4509# 4509 4511# 4511 4513# 4513 4515# 4515
4517# 4517 4739# 4739 4741# 4741 4743# 4743 4745# 4745 4750# 4750 4752# 4752
4754# 4754 4756# 4756 4758# 4758 4760# 4760 4765# 4765 4767# 4767 4769# 4769
4771# 4771 4773# 4773 4775# 4775 4777# 4777 4782# 4782 4784# 4784 4789# 4789
4791# 4791 4793# 4793 4795# 4795 4797# 4797 4799# 4799 4801# 4801 4803# 4803
4805# 4805 5026# 5026 5028# 5028 5030# 5030 5032# 5032 5037# 5037 5039# 5039
5041# 5041 5043# 5043 5045# 5045 5047# 5047 5052# 5052 5054# 5054 5056# 5056
5058# 5058 5060# 5060 5062# 5062 5064# 5064 5069# 5069 5071# 5071 5076# 5076
5078# 5078 5080# 5080 5082# 5082 5084# 5084 5086# 5086 5088# 5088 5090# 5090
5092# 5092 5312# 5312 5314# 5314 5316# 5316 5318# 5318 5323# 5323 5325# 5325
5327# 5327 5329# 5329 5331# 5331 5333# 5333 5338# 5338 5340# 5340 5342# 5342
5344# 5344 5346# 5346 5348# 5348 5350# 5350 5355# 5355 5357# 5357 5362# 5362
5364# 5364 5366# 5366 5368# 5368 5370# 5370 5372# 5372 5374# 5374 5376# 5376
5378# 5378 5601# 5601 5603# 5603 5605# 5605 5607# 5607 5612# 5612 5614# 5614
5616# 5616 5618# 5618 5620# 5620 5622# 5622 5627# 5627 5629# 5629 5631# 5631
5633# 5633 5635# 5635 5637# 5637 5639# 5639 5644# 5644 5646# 5646 5651# 5651
5653# 5653 5655# 5655 5657# 5657 5659# 5659 5661# 5661 5663# 5663 5665# 5665
5667# 5667 5773# 5773 5775# 5775 5777# 5777 5779# 5779 5781# 5781 6038# 6038
6040# 6040 6042# 6042 6044# 6044 6049# 6049 6051# 6051 6053# 6053 6055# 6055
6057# 6057 6059# 6059 6061# 6061 6063# 6063 6068# 6068 6070# 6070 6072# 6072
6077# 6077 6079# 6079 6084# 6084 6086# 6086 6088# 6088 6090# 6090 6092# 6092
6094# 6094 6096# 6096 6098# 6098 6100# 6100 6358# 6358 6360# 6360 6362# 6362
6364# 6364 6369# 6369 6371# 6371 6373# 6373 6375# 6375 6377# 6377 6379# 6379
6381# 6381 6383# 6383 6388# 6388 6390# 6390 6392# 6392 6394# 6394 6396# 6396
6398# 6398 6400# 6400 6405# 6405 6407# 6407 6412# 6412 6414# 6414 6416# 6416
6418# 6418 6420# 6420 6422# 6422 6424# 6424 6426# 6426 6428# 6428 6684# 6684 SEQ 1834
6686# 6686 6688# 6688 6690# 6690 6695# 6695 6697# 6697 6699# 6699 6701# 6701
6703# 6703 6705# 6705 6707# 6707 6709# 6709 6714# 6714 6716# 6716 6718# 6718
6720# 6720 6722# 6722 6724# 6724 6726# 6726 6731# 6731 6733# 6733 6738# 6738
6740# 6740 6742# 6742 6744# 6744 6746# 6746 6748# 6748 6750# 6750 6752# 6752
6754# 6754 7012# 7012 7014# 7014 7016# 7016 7018# 7018 7023# 7023 7025# 7025
7027# 7027 7029# 7029 7031# 7031 7033# 7033 7035# 7035 7037# 7037 7042# 7042
7044# 7044 7046# 7046 7048# 7048 7050# 7050 7052# 7052 7054# 7054 7059# 7059
7061# 7061 7066# 7066 7068# 7068 7070# 7070 7072# 7072 7074# 7074 7076# 7076
7078# 7078 7080# 7080 7082# 7082 7340# 7340 7342# 7342 7344# 7344 7346# 7346
7351# 7351 7353# 7353 7355# 7355 7357# 7357 7359# 7359 7361# 7361 7363# 7363
7365# 7365 7370# 7370 7372# 7372 7374# 7374 7376# 7376 7378# 7378 7380# 7380
7382# 7382 7387# 7387 7389# 7389 7394# 7394 7396# 7396 7398# 7398 7400# 7400
7402# 7402 7404# 7404 7406# 7406 7408# 7408 7410# 7410 7632# 7632 7634# 7634
7636# 7636 7638# 7638 7643# 7643 7645# 7645 7647# 7647 7649# 7649 7651# 7651
7653# 7653 7655# 7655 7657# 7657 7662# 7662 7664# 7664 7666# 7666 7668# 7668
7670# 7670 7672# 7672 7674# 7674 7679# 7679 7681# 7681 7686# 7686 7688# 7688
7690# 7690 7692# 7692 7694# 7694 7696# 7696 7698# 7698 7700# 7700 7702# 7702
7923# 7923 7925# 7925 7927# 7927 7929# 7929 7934# 7934 7936# 7936 7938# 7938
7940# 7940 7942# 7942 7944# 7944 7946# 7946 7948# 7948 7953# 7953 7955# 7955
7957# 7957 7959# 7959 7961# 7961 7963# 7963 7965# 7965 7970# 7970 7972# 7972
7977# 7977 7979# 7979 7981# 7981 7983# 7983 7985# 7985 7987# 7987 7989# 7989
7991# 7991 7993# 7993 8213# 8213 8215# 8215 8217# 8217 8219# 8219 8224# 8224
8226# 8226 8228# 8228 8230# 8230 8232# 8232 8234# 8234 8236# 8236 8238# 8238
8243# 8243 8245# 8245 8247# 8247 8249# 8249 8251# 8251 8253# 8253 8255# 8255
8260# 8260 8262# 8262 8267# 8267 8269# 8269 8271# 8271 8273# 8273 8275# 8275
8277# 8277 8279# 8279 8281# 8281 8283# 8283 8502# 8502 8504# 8504 8506# 8506
8508# 8508 8513# 8513 8515# 8515 8517# 8517 8519# 8519 8521# 8521 8523# 8523
8525# 8525 8527# 8527 8532# 8532 8534# 8534 8536# 8536 8538# 8538 8540# 8540
8542# 8542 8544# 8544 8549# 8549 8551# 8551 8556# 8556 8558# 8558 8560# 8560
8562# 8562 8564# 8564 8566# 8566 8568# 8568 8570# 8570 8572# 8572 8757# 8757
8759# 8759 8761# 8761 8763# 8763 8765# 8765 8767# 8767 8769# 8769 8771# 8771
8773# 8773 8775# 8775 8777# 8777 8779# 8779 8781# 8781 8783# 8783 8785# 8785
8790# 8790 8792# 8792 8794# 8794 8796# 8796 8798# 8798 8800# 8800 8802# 8802
8804# 8804 8809# 8809 8811# 8811 8813# 8813 8818# 8818 8820# 8820 8822# 8822
8824# 8824 8829# 8829 8831# 8831 8836# 8836 8838# 8838 8840# 8840 8842# 8842
8844# 8844 8846# 8846 8848# 8848 8850# 8850 8852# 8852 8857# 8857 8859# 8859
8861# 8861 8863# 8863 8865# 8865 8867# 8867 8869# 8869 8871# 8871 8873# 8873
%ADDR 193# 193 195 195# 197 197# 199 199# 201 201# 203 203# 205 205#
207 207# 209 209# 211 211# 213 213# 215 215# 217 217# 219 219#
221 221# 223 223# 225 225# 227 227# 229 229# 231 231# 233 233#
235 235# 237 237# 239 239# 241 241# 243 243# 245 245# 247 247#
249 249# 251 251# 253 253# 255 255# 257 257# 259 259# 261 261#
263 263# 265 265# 267 267# 272# 272 274 274# 279# 279 281 281#
286# 286 288 288# 290 290# 295# 295 297 297# 299 299# 304# 304
306 306# 308 308# 313# 313 315 315# 317 317# 322# 322 324 324#
326 326# 331# 331 333 333# 335 335# 340# 340 342 342# 344 344#
349# 349 351 351# 353 353# 358# 358 360 360# 362 362# 367# 367
369 369# 371 371# 376# 376 378 378# 380 380# 385# 385 387 387#
389 389# 394# 394 396 396# 398 398# 403# 403 405 405# 407 407#
412# 412 414 414# 416 416# 421# 421 423 423# 425 425# 430# 430
432 432# 434 434# 439# 439 441 441# 443 443# 448# 448 450 450#
452 452# 457# 457 459 459# 461 461# 466# 466 468 468# 470 470#
475# 475 477 477# 479 479# 484# 484 486 486# 488 488# 493# 493 SEQ 1835
495 495# 497 497# 502# 502 504 504# 506 506# 511# 511 513 513#
515 515# 520# 520 522 522# 524 524# 529# 529 531 531# 533 533#
538# 538 540 540# 542 542# 547# 547 549 549# 551 551# 556# 556
558 558# 560 560# 565# 565 567 567# 569 569# 574# 574 576 576#
578 578# 583# 583 585 585# 587 587# 592# 592 594 594# 596 596#
598 598# 603# 603 608# 608 610 610# 612 612# 614 614# 616 616#
716# 716 718 718# 720 720# 722 722# 724 724# 726 726# 728 728#
730 730# 732 732# 734 734# 739# 739 741 741# 746# 746 748 748#
753# 753 755 755# 757 757# 762# 762 764 764# 766 766# 771# 771
773 773# 775 775# 780# 780 782 782# 784 784# 789# 789 791 791#
793 793# 798# 798 800 800# 802 802# 807# 807 809 809# 811 811#
816# 816 821# 821 823 823# 825 825# 827 827# 829 829# 831 831#
937# 937 942 942# 947 947# 949 949# 954 954# 956 956# 958 958#
963 963# 965 965# 970# 970 972 972# 1061# 1061 1063 1063# 1065 1065#
1070 1070# 1075 1075# 1080 1080# 1082 1082# 1087 1087# 1092 1092# 1094 1094#
1099 1099# 1101 1101# 1107 1107# 1109 1109# 1111 1111# 1113 1113# 1115 1115#
1117 1117# 1119 1119# 1121 1121# 1126# 1126 1128 1128# 1329# 1329 1331 1331#
1333 1333# 1335 1335# 1340 1340# 1342 1342# 1344 1344# 1346 1346# 1348 1348#
1350 1350# 1355 1355# 1357 1357# 1359 1359# 1364 1364# 1370 1370# 1372 1372#
1374 1374# 1376 1376# 1378 1378# 1380 1380# 1382 1382# 1384 1384# 1391# 1391
1393 1393# 1395 1395# 1397 1397# 1399 1399# 1401 1401# 1403 1403# 1405 1405#
1407 1407# 1409 1409# 1411 1411# 1413 1413# 1415 1415# 1420 1420# 1422 1422#
1427 1427# 1429 1429# 1431 1431# 1436# 1436 1438 1438# 1443# 1443 1445 1445#
1450# 1450 1455# 1455 1457 1457# 1585# 1585 1587 1587# 1589 1589# 1591 1591#
1675# 1675 1677 1677# 1679 1679# 1681 1681# 1683 1683# 1685 1685# 1690# 1690
1692 1692# 1694 1694# 1696 1696# 1698 1698# 1700 1700# 1705# 1705 1707 1707#
1709 1709# 1711 1711# 1713 1713# 1715 1715# 1717 1717# 1719 1719# 1721 1721#
1723 1723# 1725 1725# 1727 1727# 1729 1729# 1731 1731# 1733 1733# 1735 1735#
1737 1737# 1739 1739# 1741 1741# 1743 1743# 1748 1748# 1750 1750# 1752 1752#
1754 1754# 1756 1756# 1758 1758# 1760 1760# 1762 1762# 1764 1764# 1766 1766#
1772 1772# 1774 1774# 1776 1776# 1782 1782# 1784 1784# 1786 1786# 1788 1788#
1790 1790# 1792 1792# 1794 1794# 1796 1796# 1801# 1801 1803 1803# 1808# 1808
1810 1810# 1812 1812# 1817# 1817 1822# 1822 1824 1824# 1974# 1974 1976 1976#
1978 1978# 1980 1980# 1983 1983# 1985 1985# 1987 1987# 1989 1989# 1991 1991#
1993 1993# 1996 1996# 2001 2001# 2007 2007# 2009 2009# 2011 2011# 2013 2013#
2015 2015# 2017 2017# 2019 2019# 2021 2021# 2026# 2026 2028 2028# 2030 2030#
2032 2032# 2034 2034# 2036 2036# 2038 2038# 2040 2040# 2042 2042# 2044 2044#
2046 2046# 2048 2048# 2050 2050# 2052 2052# 2054 2054# 2056 2056# 2058 2058#
2060 2060# 2062 2062# 2064 2064# 2069# 2069 2071 2071# 2073 2073# 2079# 2079
2081 2081# 2083 2083# 2085 2085# 2087 2087# 2089 2089# 2091 2091# 2093 2093#
2095 2095# 2097 2097# 2099 2099# 2101 2101# 2106# 2106 2108 2108# 2268# 2268
2271 2271# 2273 2273# 2275 2275# 2277 2277# 2279 2279# 2282 2282# 2284 2284#
2286 2286# 2288 2288# 2291 2291# 2297 2297# 2299 2299# 2301 2301# 2307 2307#
2309 2309# 2311 2311# 2313 2313# 2315 2315# 2317 2317# 2319 2319# 2321 2321#
2326# 2326 2328 2328# 2330 2330# 2332 2332# 2334 2334# 2336 2336# 2338 2338#
2340 2340# 2342 2342# 2344 2344# 2346 2346# 2348 2348# 2350 2350# 2352 2352#
2354 2354# 2356 2356# 2358 2358# 2360 2360# 2362 2362# 2364 2364# 2369# 2369
2371 2371# 2373 2373# 2379# 2379 2381 2381# 2383 2383# 2385 2385# 2387 2387#
2389 2389# 2391 2391# 2393 2393# 2395 2395# 2397 2397# 2399 2399# 2401 2401#
2406# 2406 2408 2408# 2484# 2484 2486 2486# 2593# 2593 2595 2595# 2597 2597#
2599 2599# 2601 2601# 2854# 2854 2856 2856# 2858 2858# 2860 2860# 2865# 2865
2867 2867# 2869 2869# 2871 2871# 2873 2873# 2875 2875# 2880# 2880 2882 2882#
2884# 2884 2889# 2889 2891 2891# 2896# 2896 2898 2898# 2900 2900# 2902 2902# SEQ 1836
2904 2904# 2906 2906# 2908 2908# 2910 2910# 2912 2912# 3164# 3164 3166 3166#
3168 3168# 3170 3170# 3175# 3175 3177 3177# 3179 3179# 3181 3181# 3183 3183#
3185 3185# 3190# 3190 3192 3192# 3194# 3194 3199# 3199 3201 3201# 3206# 3206
3208 3208# 3210 3210# 3212 3212# 3214 3214# 3216 3216# 3218 3218# 3220 3220#
3222 3222# 3481# 3481 3483 3483# 3485 3485# 3487 3487# 3492# 3492 3494 3494#
3496 3496# 3498 3498# 3500 3500# 3502 3502# 3507# 3507 3509 3509# 3511 3511#
3513 3513# 3515 3515# 3517 3517# 3519# 3519 3524# 3524 3526 3526# 3531# 3531
3533 3533# 3535 3535# 3537 3537# 3539 3539# 3541 3541# 3543 3543# 3545 3545#
3547 3547# 3804# 3804 3806 3806# 3808 3808# 3810 3810# 3815# 3815 3817 3817#
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3870 3870# 4127# 4127 4129 4129# 4131 4131# 4133 4133# 4138# 4138 4140 4140#
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6398 6398# 6400# 6400 6405# 6405 6407 6407# 6412# 6412 6414 6414# 6416 6416#
6418 6418# 6420 6420# 6422 6422# 6424 6424# 6426 6426# 6428 6428# 6684# 6684
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6703 6703# 6705 6705# 6707 6707# 6709 6709# 6714# 6714 6716 6716# 6718 6718#
6720 6720# 6722 6722# 6724 6724# 6726# 6726 6731# 6731 6733 6733# 6738# 6738
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7061 7061# 7066# 7066 7068 7068# 7070 7070# 7072 7072# 7074 7074# 7076 7076# SEQ 1837
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%ML 193# 193 195# 195 197# 197 199# 199 201# 201 203# 203 205# 205
207# 207 209# 209 211# 211 213# 213 215# 215 217# 217 219# 219
221# 221 223# 223 225# 225 227# 227 229# 229 231# 231 233# 233
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249# 249 251# 251 253# 253 255# 255 257# 257 259# 259 261# 261
263# 263 265# 265 267# 267 272# 272 274# 274 279# 279 281# 281
286# 286 288# 288 290# 290 295# 295 297# 297 299# 299 304# 304
306# 306 308# 308 313# 313 315# 315 317# 317 322# 322 324# 324
326# 326 331# 331 333# 333 335# 335 340# 340 342# 342 344# 344
349# 349 351# 351 353# 353 358# 358 360# 360 362# 362 367# 367
369# 369 371# 371 376# 376 378# 378 380# 380 385# 385 387# 387
389# 389 394# 394 396# 396 398# 398 403# 403 405# 405 407# 407
412# 412 414# 414 416# 416 421# 421 423# 423 425# 425 430# 430
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495# 495 497# 497 502# 502 504# 504 506# 506 511# 511 513# 513
515# 515 520# 520 522# 522 524# 524 529# 529 531# 531 533# 533
538# 538 540# 540 542# 542 547# 547 549# 549 551# 551 556# 556
558# 558 560# 560 565# 565 567# 567 569# 569 574# 574 576# 576
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598# 598 603# 603 608# 608 610# 610 612# 612 614# 614 616# 616
716# 716 718# 718 720# 720 722# 722 724# 724 726# 726 728# 728
730# 730 732# 732 734# 734 739# 739 741# 741 746# 746 748# 748 SEQ 1838
753# 753 755# 755 757# 757 762# 762 764# 764 766# 766 771# 771
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1070# 1070 1075# 1075 1080# 1080 1082# 1082 1087# 1087 1092# 1092 1094# 1094
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1450# 1450 1455# 1455 1457# 1457 1585# 1585 1587# 1587 1589# 1589 1591# 1591
1675# 1675 1677# 1677 1679# 1679 1681# 1681 1683# 1683 1685# 1685 1690# 1690
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1709# 1709 1711# 1711 1713# 1713 1715# 1715 1717# 1717 1719# 1719 1721# 1721
1723# 1723 1725# 1725 1727# 1727 1729# 1729 1731# 1731 1733# 1733 1735# 1735
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1810# 1810 1812# 1812 1817# 1817 1822# 1822 1824# 1824 1974# 1974 1976# 1976
1978# 1978 1980# 1980 1983# 1983 1985# 1985 1987# 1987 1989# 1989 1991# 1991
1993# 1993 1996# 1996 2001# 2001 2007# 2007 2009# 2009 2011# 2011 2013# 2013
2015# 2015 2017# 2017 2019# 2019 2021# 2021 2026# 2026 2028# 2028 2030# 2030
2032# 2032 2034# 2034 2036# 2036 2038# 2038 2040# 2040 2042# 2042 2044# 2044
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2309# 2309 2311# 2311 2313# 2313 2315# 2315 2317# 2317 2319# 2319 2321# 2321
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2599# 2599 2601# 2601 2854# 2854 2856# 2856 2858# 2858 2860# 2860 2865# 2865
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3185# 3185 3190# 3190 3192# 3192 3194# 3194 3199# 3199 3201# 3201 3206# 3206
3208# 3208 3210# 3210 3212# 3212 3214# 3214 3216# 3216 3218# 3218 3220# 3220
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3513# 3513 3515# 3515 3517# 3517 3519# 3519 3524# 3524 3526# 3526 3531# 3531
3533# 3533 3535# 3535 3537# 3537 3539# 3539 3541# 3541 3543# 3543 3545# 3545 SEQ 1839
3547# 3547 3804# 3804 3806# 3806 3808# 3808 3810# 3810 3815# 3815 3817# 3817
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7382# 7382 7387# 7387 7389# 7389 7394# 7394 7396# 7396 7398# 7398 7400# 7400
7402# 7402 7404# 7404 7406# 7406 7408# 7408 7410# 7410 7632# 7632 7634# 7634
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7653# 7653 7655# 7655 7657# 7657 7662# 7662 7664# 7664 7666# 7666 7668# 7668
7670# 7670 7672# 7672 7674# 7674 7679# 7679 7681# 7681 7686# 7686 7688# 7688 SEQ 1840
7690# 7690 7692# 7692 7694# 7694 7696# 7696 7698# 7698 7700# 7700 7702# 7702
7923# 7923 7925# 7925 7927# 7927 7929# 7929 7934# 7934 7936# 7936 7938# 7938
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8277# 8277 8279# 8279 8281# 8281 8283# 8283 8502# 8502 8504# 8504 8506# 8506
8508# 8508 8513# 8513 8515# 8515 8517# 8517 8519# 8519 8521# 8521 8523# 8523
8525# 8525 8527# 8527 8532# 8532 8534# 8534 8536# 8536 8538# 8538 8540# 8540
8542# 8542 8544# 8544 8549# 8549 8551# 8551 8556# 8556 8558# 8558 8560# 8560
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8759# 8759 8761# 8761 8763# 8763 8765# 8765 8767# 8767 8769# 8769 8771# 8771
8773# 8773 8775# 8775 8777# 8777 8779# 8779 8781# 8781 8783# 8783 8785# 8785
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8804# 8804 8809# 8809 8811# 8811 8813# 8813 8818# 8818 8820# 8820 8822# 8822
8824# 8824 8829# 8829 8831# 8831 8836# 8836 8838# 8838 8840# 8840 8842# 8842
8844# 8844 8846# 8846 8848# 8848 8850# 8850 8852# 8852 8857# 8857 8859# 8859
8861# 8861 8863# 8863 8865# 8865 8867# 8867 8869# 8869 8871# 8871 8873# 8873
%MR 193# 193 195# 195 197# 197 199# 199 201# 201 203# 203 205# 205
207# 207 209# 209 211# 211 213# 213 215# 215 217# 217 219# 219
221# 221 223# 223 225# 225 227# 227 229# 229 231# 231 233# 233
235# 235 237# 237 239# 239 241# 241 243# 243 245# 245 247# 247
249# 249 251# 251 253# 253 255# 255 257# 257 259# 259 261# 261
263# 263 265# 265 267# 267 272# 272 274# 274 279# 279 281# 281
286# 286 288# 288 290# 290 295# 295 297# 297 299# 299 304# 304
306# 306 308# 308 313# 313 315# 315 317# 317 322# 322 324# 324
326# 326 331# 331 333# 333 335# 335 340# 340 342# 342 344# 344
349# 349 351# 351 353# 353 358# 358 360# 360 362# 362 367# 367
369# 369 371# 371 376# 376 378# 378 380# 380 385# 385 387# 387
389# 389 394# 394 396# 396 398# 398 403# 403 405# 405 407# 407
412# 412 414# 414 416# 416 421# 421 423# 423 425# 425 430# 430
432# 432 434# 434 439# 439 441# 441 443# 443 448# 448 450# 450
452# 452 457# 457 459# 459 461# 461 466# 466 468# 468 470# 470
475# 475 477# 477 479# 479 484# 484 486# 486 488# 488 493# 493
495# 495 497# 497 502# 502 504# 504 506# 506 511# 511 513# 513
515# 515 520# 520 522# 522 524# 524 529# 529 531# 531 533# 533
538# 538 540# 540 542# 542 547# 547 549# 549 551# 551 556# 556
558# 558 560# 560 565# 565 567# 567 569# 569 574# 574 576# 576
578# 578 583# 583 585# 585 587# 587 592# 592 594# 594 596# 596
598# 598 603# 603 608# 608 610# 610 612# 612 614# 614 616# 616
716# 716 718# 718 720# 720 722# 722 724# 724 726# 726 728# 728
730# 730 732# 732 734# 734 739# 739 741# 741 746# 746 748# 748
753# 753 755# 755 757# 757 762# 762 764# 764 766# 766 771# 771
773# 773 775# 775 780# 780 782# 782 784# 784 789# 789 791# 791
793# 793 798# 798 800# 800 802# 802 807# 807 809# 809 811# 811
816# 816 821# 821 823# 823 825# 825 827# 827 829# 829 831# 831
937# 937 942# 942 947# 947 949# 949 954# 954 956# 956 958# 958
963# 963 965# 965 970# 970 972# 972 1061# 1061 1063# 1063 1065# 1065
1070# 1070 1075# 1075 1080# 1080 1082# 1082 1087# 1087 1092# 1092 1094# 1094
1099# 1099 1101# 1101 1107# 1107 1109# 1109 1111# 1111 1113# 1113 1115# 1115 SEQ 1841
1117# 1117 1119# 1119 1121# 1121 1126# 1126 1128# 1128 1329# 1329 1331# 1331
1333# 1333 1335# 1335 1340# 1340 1342# 1342 1344# 1344 1346# 1346 1348# 1348
1350# 1350 1355# 1355 1357# 1357 1359# 1359 1364# 1364 1370# 1370 1372# 1372
1374# 1374 1376# 1376 1378# 1378 1380# 1380 1382# 1382 1384# 1384 1391# 1391
1393# 1393 1395# 1395 1397# 1397 1399# 1399 1401# 1401 1403# 1403 1405# 1405
1407# 1407 1409# 1409 1411# 1411 1413# 1413 1415# 1415 1420# 1420 1422# 1422
1427# 1427 1429# 1429 1431# 1431 1436# 1436 1438# 1438 1443# 1443 1445# 1445
1450# 1450 1455# 1455 1457# 1457 1585# 1585 1587# 1587 1589# 1589 1591# 1591
1675# 1675 1677# 1677 1679# 1679 1681# 1681 1683# 1683 1685# 1685 1690# 1690
1692# 1692 1694# 1694 1696# 1696 1698# 1698 1700# 1700 1705# 1705 1707# 1707
1709# 1709 1711# 1711 1713# 1713 1715# 1715 1717# 1717 1719# 1719 1721# 1721
1723# 1723 1725# 1725 1727# 1727 1729# 1729 1731# 1731 1733# 1733 1735# 1735
1737# 1737 1739# 1739 1741# 1741 1743# 1743 1748# 1748 1750# 1750 1752# 1752
1754# 1754 1756# 1756 1758# 1758 1760# 1760 1762# 1762 1764# 1764 1766# 1766
1772# 1772 1774# 1774 1776# 1776 1782# 1782 1784# 1784 1786# 1786 1788# 1788
1790# 1790 1792# 1792 1794# 1794 1796# 1796 1801# 1801 1803# 1803 1808# 1808
1810# 1810 1812# 1812 1817# 1817 1822# 1822 1824# 1824 1974# 1974 1976# 1976
1978# 1978 1980# 1980 1983# 1983 1985# 1985 1987# 1987 1989# 1989 1991# 1991
1993# 1993 1996# 1996 2001# 2001 2007# 2007 2009# 2009 2011# 2011 2013# 2013
2015# 2015 2017# 2017 2019# 2019 2021# 2021 2026# 2026 2028# 2028 2030# 2030
2032# 2032 2034# 2034 2036# 2036 2038# 2038 2040# 2040 2042# 2042 2044# 2044
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2271# 2271 2273# 2273 2275# 2275 2277# 2277 2279# 2279 2282# 2282 2284# 2284
2286# 2286 2288# 2288 2291# 2291 2297# 2297 2299# 2299 2301# 2301 2307# 2307
2309# 2309 2311# 2311 2313# 2313 2315# 2315 2317# 2317 2319# 2319 2321# 2321
2326# 2326 2328# 2328 2330# 2330 2332# 2332 2334# 2334 2336# 2336 2338# 2338
2340# 2340 2342# 2342 2344# 2344 2346# 2346 2348# 2348 2350# 2350 2352# 2352
2354# 2354 2356# 2356 2358# 2358 2360# 2360 2362# 2362 2364# 2364 2369# 2369
2371# 2371 2373# 2373 2379# 2379 2381# 2381 2383# 2383 2385# 2385 2387# 2387
2389# 2389 2391# 2391 2393# 2393 2395# 2395 2397# 2397 2399# 2399 2401# 2401
2406# 2406 2408# 2408 2484# 2484 2486# 2486 2593# 2593 2595# 2595 2597# 2597
2599# 2599 2601# 2601 2854# 2854 2856# 2856 2858# 2858 2860# 2860 2865# 2865
2867# 2867 2869# 2869 2871# 2871 2873# 2873 2875# 2875 2880# 2880 2882# 2882
2884# 2884 2889# 2889 2891# 2891 2896# 2896 2898# 2898 2900# 2900 2902# 2902
2904# 2904 2906# 2906 2908# 2908 2910# 2910 2912# 2912 3164# 3164 3166# 3166
3168# 3168 3170# 3170 3175# 3175 3177# 3177 3179# 3179 3181# 3181 3183# 3183
3185# 3185 3190# 3190 3192# 3192 3194# 3194 3199# 3199 3201# 3201 3206# 3206
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3222# 3222 3481# 3481 3483# 3483 3485# 3485 3487# 3487 3492# 3492 3494# 3494
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3513# 3513 3515# 3515 3517# 3517 3519# 3519 3524# 3524 3526# 3526 3531# 3531
3533# 3533 3535# 3535 3537# 3537 3539# 3539 3541# 3541 3543# 3543 3545# 3545
3547# 3547 3804# 3804 3806# 3806 3808# 3808 3810# 3810 3815# 3815 3817# 3817
3819# 3819 3821# 3821 3823# 3823 3825# 3825 3830# 3830 3832# 3832 3834# 3834
3836# 3836 3838# 3838 3840# 3840 3842# 3842 3847# 3847 3849# 3849 3854# 3854
3856# 3856 3858# 3858 3860# 3860 3862# 3862 3864# 3864 3866# 3866 3868# 3868
3870# 3870 4127# 4127 4129# 4129 4131# 4131 4133# 4133 4138# 4138 4140# 4140
4142# 4142 4144# 4144 4146# 4146 4148# 4148 4153# 4153 4155# 4155 4157# 4157
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4179# 4179 4181# 4181 4183# 4183 4185# 4185 4187# 4187 4189# 4189 4191# 4191 SEQ 1842
4193# 4193 4451# 4451 4453# 4453 4455# 4455 4457# 4457 4462# 4462 4464# 4464
4466# 4466 4468# 4468 4470# 4470 4472# 4472 4477# 4477 4479# 4479 4481# 4481
4483# 4483 4485# 4485 4487# 4487 4489# 4489 4494# 4494 4496# 4496 4501# 4501
4503# 4503 4505# 4505 4507# 4507 4509# 4509 4511# 4511 4513# 4513 4515# 4515
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4754# 4754 4756# 4756 4758# 4758 4760# 4760 4765# 4765 4767# 4767 4769# 4769
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4791# 4791 4793# 4793 4795# 4795 4797# 4797 4799# 4799 4801# 4801 4803# 4803
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5364# 5364 5366# 5366 5368# 5368 5370# 5370 5372# 5372 5374# 5374 5376# 5376
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5616# 5616 5618# 5618 5620# 5620 5622# 5622 5627# 5627 5629# 5629 5631# 5631
5633# 5633 5635# 5635 5637# 5637 5639# 5639 5644# 5644 5646# 5646 5651# 5651
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5667# 5667 5773# 5773 5775# 5775 5777# 5777 5779# 5779 5781# 5781 6038# 6038
6040# 6040 6042# 6042 6044# 6044 6049# 6049 6051# 6051 6053# 6053 6055# 6055
6057# 6057 6059# 6059 6061# 6061 6063# 6063 6068# 6068 6070# 6070 6072# 6072
6077# 6077 6079# 6079 6084# 6084 6086# 6086 6088# 6088 6090# 6090 6092# 6092
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6364# 6364 6369# 6369 6371# 6371 6373# 6373 6375# 6375 6377# 6377 6379# 6379
6381# 6381 6383# 6383 6388# 6388 6390# 6390 6392# 6392 6394# 6394 6396# 6396
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6418# 6418 6420# 6420 6422# 6422 6424# 6424 6426# 6426 6428# 6428 6684# 6684
6686# 6686 6688# 6688 6690# 6690 6695# 6695 6697# 6697 6699# 6699 6701# 6701
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7027# 7027 7029# 7029 7031# 7031 7033# 7033 7035# 7035 7037# 7037 7042# 7042
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7078# 7078 7080# 7080 7082# 7082 7340# 7340 7342# 7342 7344# 7344 7346# 7346
7351# 7351 7353# 7353 7355# 7355 7357# 7357 7359# 7359 7361# 7361 7363# 7363
7365# 7365 7370# 7370 7372# 7372 7374# 7374 7376# 7376 7378# 7378 7380# 7380
7382# 7382 7387# 7387 7389# 7389 7394# 7394 7396# 7396 7398# 7398 7400# 7400
7402# 7402 7404# 7404 7406# 7406 7408# 7408 7410# 7410 7632# 7632 7634# 7634
7636# 7636 7638# 7638 7643# 7643 7645# 7645 7647# 7647 7649# 7649 7651# 7651
7653# 7653 7655# 7655 7657# 7657 7662# 7662 7664# 7664 7666# 7666 7668# 7668
7670# 7670 7672# 7672 7674# 7674 7679# 7679 7681# 7681 7686# 7686 7688# 7688
7690# 7690 7692# 7692 7694# 7694 7696# 7696 7698# 7698 7700# 7700 7702# 7702
7923# 7923 7925# 7925 7927# 7927 7929# 7929 7934# 7934 7936# 7936 7938# 7938
7940# 7940 7942# 7942 7944# 7944 7946# 7946 7948# 7948 7953# 7953 7955# 7955
7957# 7957 7959# 7959 7961# 7961 7963# 7963 7965# 7965 7970# 7970 7972# 7972
7977# 7977 7979# 7979 7981# 7981 7983# 7983 7985# 7985 7987# 7987 7989# 7989
7991# 7991 7993# 7993 8213# 8213 8215# 8215 8217# 8217 8219# 8219 8224# 8224
8226# 8226 8228# 8228 8230# 8230 8232# 8232 8234# 8234 8236# 8236 8238# 8238
8243# 8243 8245# 8245 8247# 8247 8249# 8249 8251# 8251 8253# 8253 8255# 8255 SEQ 1843
8260# 8260 8262# 8262 8267# 8267 8269# 8269 8271# 8271 8273# 8273 8275# 8275
8277# 8277 8279# 8279 8281# 8281 8283# 8283 8502# 8502 8504# 8504 8506# 8506
8508# 8508 8513# 8513 8515# 8515 8517# 8517 8519# 8519 8521# 8521 8523# 8523
8525# 8525 8527# 8527 8532# 8532 8534# 8534 8536# 8536 8538# 8538 8540# 8540
8542# 8542 8544# 8544 8549# 8549 8551# 8551 8556# 8556 8558# 8558 8560# 8560
8562# 8562 8564# 8564 8566# 8566 8568# 8568 8570# 8570 8572# 8572 8757# 8757
8759# 8759 8761# 8761 8763# 8763 8765# 8765 8767# 8767 8769# 8769 8771# 8771
8773# 8773 8775# 8775 8777# 8777 8779# 8779 8781# 8781 8783# 8783 8785# 8785
8790# 8790 8792# 8792 8794# 8794 8796# 8796 8798# 8798 8800# 8800 8802# 8802
8804# 8804 8809# 8809 8811# 8811 8813# 8813 8818# 8818 8820# 8820 8822# 8822
8824# 8824 8829# 8829 8831# 8831 8836# 8836 8838# 8838 8840# 8840 8842# 8842
8844# 8844 8846# 8846 8848# 8848 8850# 8850 8852# 8852 8857# 8857 8859# 8859
8861# 8861 8863# 8863 8865# 8865 8867# 8867 8869# 8869 8871# 8871 8873# 8873
.LA 274 281 288 297 306 315 324 333 342 351 360 369 378 387
396 405 414 423 432 441 450 459 468 477 486 495 504 513
522 531 540 549 558 567 576 585 594 596 598 608 610 614
741 748 755 764 773 782 791 800 809 821 823 829 1111 1117
1119 1331 1333 1335 1342 1357 1374 1380 1382 1429 1436 1443 1739 1741
1743 1760 1786 1792 1794 1801 1983 1991 2011 2017 2019 2071 2093 2271
2311 2317 2319 2371 2393 2902 2904 2910 2912 3212 3214 3220 3222 3537
3539 3545 3547 3860 3862 3868 3870 4183 4185 4191 4193 4507 4509 4515
4517 4795 4797 4803 4805 5082 5084 5090 5092 5368 5370 5376 5378 5657
5659 5665 5667 6090 6092 6098 6100 6418 6420 6426 6428 6744 6746 6752
6754 7072 7074 7080 7082 7400 7402 7408 7410 7692 7694 7700 7702 7983
7985 7991 7993 8273 8275 8281 8283 8562 8564 8570 8572 8779 8804 8818
8822 8842 8844 8850 8852 8863 8865 8871 8873
.LADDR 193 272 279 286 295 304 313 322 331 340 349 358 367 376
385 394 403 412 421 430 439 448 457 466 475 484 493 502
511 520 529 538 547 556 565 574 583 592 603 608 716 739
746 753 762 771 780 789 798 807 816 821 937 970 1061 1126
1329 1391 1436 1443 1450 1455 1585 1675 1690 1705 1801 1808 1817 1822
1974 2026 2069 2079 2106 2268 2326 2369 2379 2406 2484 2593 2854 2865
2880 2884 2889 2896 3164 3175 3190 3194 3199 3206 3481 3492 3507 3519
3524 3531 3804 3815 3830 3842 3847 3854 4127 4138 4153 4165 4170 4177
4451 4462 4477 4489 4494 4501 4739 4750 4765 4777 4782 4789 5026 5037
5052 5064 5069 5076 5312 5323 5338 5350 5355 5362 5601 5612 5627 5639
5644 5651 5773 6038 6049 6068 6072 6077 6084 6358 6369 6388 6400 6405
6412 6684 6695 6714 6726 6731 6738 7012 7023 7042 7054 7059 7066 7340
7351 7370 7382 7387 7394 7632 7643 7662 7674 7679 7686 7923 7934 7953
7965 7970 7977 8213 8224 8243 8255 8260 8267 8502 8513 8532 8544 8549
8556 8757 8790 8809 8813 8818 8829 8836 8857
.LAND 272 279 286 295 304 313 322 331 340 349 358 367 376 385
394 403 412 421 430 439 448 457 466 475 484 493 502 511
520 529 538 547 556 565 574 583 592 603 739 746 753 762
771 780 789 798 807 816 937 1061 1063 1333 1403 1409 1675 1690
2101 2268 2401 2896 3206 3531 3854 4177 4501 4789 5076 5362 5651 6084
6412 6738 7066 7394 7686 7977 8267 8556 8757 8836 8857
.LB 272 274 279 281 286 288 295 297 304 306 313 315 322 324
331 333 340 342 349 351 358 360 367 369 376 378 385 387
394 396 403 405 412 414 421 423 430 432 439 441 448 450
457 459 466 468 475 477 484 486 493 495 502 504 511 513
520 522 529 531 538 540 547 549 556 558 565 567 574 576
583 585 592 594 596 598 603 608 612 739 741 746 748 753 SEQ 1844
755 762 764 771 773 780 782 789 791 798 800 807 809 816
821 827 1107 1109 1331 1333 1335 1342 1346 1348 1370 1372 1403 1405
1407 1409 1587 1589 1591 1675 1677 1679 1683 1690 1692 1694 1698 1707
1709 1711 1715 1719 1723 1727 1731 1735 1737 1739 1741 1743 1762 1764
1782 1784 1980 1983 1985 1993 2007 2009 2071 2091 2093 2095 2097 2101
2268 2271 2273 2279 2286 2291 2307 2309 2371 2391 2393 2395 2397 2401
2858 2873 2896 2898 2902 3168 3183 3206 3208 3212 3485 3500 3531 3533
3537 3808 3823 3854 3856 3860 4131 4146 4177 4179 4183 4455 4470 4501
4503 4507 4743 4758 4789 4791 4795 5030 5045 5076 5078 5082 5316 5331
5362 5364 5368 5605 5620 5651 5653 5657 6042 6061 6084 6086 6090 6362
6381 6412 6414 6418 6688 6707 6738 6740 6744 7016 7035 7066 7068 7072
7344 7363 7394 7396 7400 7636 7655 7686 7688 7692 7927 7946 7977 7979
7983 8217 8236 8267 8269 8273 8506 8525 8556 8558 8562 8757 8761 8777
8779 8802 8804 8836 8838 8842 8857 8859 8863
.LBAD 2601 5781
.LCCCA 947 1080 1092 1397 1754 1974 2085 2282 2385 2867 3177 3494 3817 4140
4464 4752 5039 5325 5614 6051 6371 6697 7025 7353 7645 7936 8226 8515
8792
.LCCCE 1411 1750
.LCCCP 1413 1752
.LCCER 1987 2275
.LCCFZ 1342 1764 2597 5777 8779
.LCCGC 1113 1376 1788 2013 2313 2906 3216 3541 3864 4187 4511 4799 5086 5372
5661 6094 6422 6748 7076 7404 7696 7987 8277 8566 8846 8867
.LCCLW 1407
.LCCMB 1348
.LCENA 947 1080 1092 1113 1342 1348 1376 1397 1407 1411 1413 1750 1752 1754
1764 1788 1974 1987 2013 2085 2275 2282 2313 2385 2597 2867 2906 3177
3216 3494 3541 3817 3864 4140 4187 4464 4511 4752 4799 5039 5086 5325
5372 5614 5661 5777 6051 6094 6371 6422 6697 6748 7025 7076 7353 7404
7645 7696 7936 7987 8226 8277 8515 8566 8779 8792 8846 8867
.LCJP 947 1080 1092 1113 1342 1348 1376 1397 1407 1411 1413 1750 1752 1754
1764 1788 1974 1987 2013 2085 2275 2282 2313 2385 2597 2867 2906 3177
3216 3494 3541 3817 3864 4140 4187 4464 4511 4752 4799 5039 5086 5325
5372 5614 5661 5777 6051 6094 6371 6422 6697 6748 7025 7076 7353 7404
7645 7696 7936 7987 8226 8277 8515 8566 8779 8792 8846 8867
.LCJS 1329 1340 1748 1993 2288
.LCONT 272 279 286 295 304 313 322 331 340 349 358 367 376 385
394 403 412 421 430 439 448 457 466 475 484 493 502 511
520 529 538 547 556 565 574 583 592 610 612 614 739 746
753 762 771 780 789 798 807 823 825 827 829 942 954 956
958 963 1070 1075 1087 1099 1111 1117 1119 1331 1333 1335 1346 1355
1357 1364 1374 1380 1382 1391 1401 1403 1405 1409 1420 1427 1429 1587
1589 1591 1707 1709 1711 1737 1739 1741 1743 1758 1760 1762 1776 1786
1792 1794 1978 1980 1983 1985 1991 2001 2011 2017 2019 2026 2028 2030
2032 2034 2036 2038 2040 2042 2044 2046 2048 2050 2052 2054 2056 2058
2060 2062 2089 2091 2093 2099 2271 2273 2279 2286 2301 2311 2317 2319
2326 2328 2330 2332 2334 2336 2338 2340 2342 2344 2346 2348 2350 2352
2354 2356 2358 2360 2362 2371 2389 2391 2393 2399 2595 2599 2856 2858
2871 2873 2896 2898 2904 2910 3166 3168 3181 3183 3206 3208 3214 3220
3483 3485 3498 3500 3509 3515 3531 3533 3539 3545 3806 3808 3821 3823
3832 3838 3854 3856 3862 3868 4129 4131 4144 4146 4155 4161 4177 4179
4185 4191 4453 4455 4468 4470 4479 4485 4501 4503 4509 4515 4741 4743 SEQ 1845
4756 4758 4767 4773 4789 4791 4797 4803 5028 5030 5043 5045 5054 5060
5076 5078 5084 5090 5314 5316 5329 5331 5340 5346 5362 5364 5370 5376
5603 5605 5618 5620 5629 5635 5651 5653 5659 5665 5775 5779 6040 6042
6055 6057 6059 6061 6084 6086 6092 6098 6360 6362 6375 6377 6379 6381
6390 6396 6412 6414 6420 6426 6686 6688 6701 6703 6705 6707 6716 6722
6738 6740 6746 6752 7014 7016 7029 7031 7033 7035 7044 7050 7066 7068
7074 7080 7342 7344 7357 7359 7361 7363 7372 7378 7394 7396 7402 7408
7634 7636 7649 7651 7653 7655 7664 7670 7686 7688 7694 7700 7925 7927
7940 7942 7944 7946 7955 7961 7977 7979 7985 7991 8215 8217 8230 8232
8234 8236 8245 8251 8267 8269 8275 8281 8504 8506 8519 8521 8523 8525
8534 8540 8556 8558 8564 8570 8761 8763 8765 8767 8769 8771 8773 8775
8777 8796 8798 8800 8802 8836 8838 8844 8850 8857 8859 8865 8871
.LCRTN 1415 1812 2064 2364
.LCRY 281 288 297 306 315 324 333 342 351 360 369 378 387 396
405 414 423 432 441 450 459 468 477 486 495 504 513 522
531 540 549 558 567 576 585 594 748 755 764 773 782 791
800 809 1335 1346 1762 1985 1993 2273 2291 2898 3208 3533 3856 4179
4503 4791 5078 5364 5653 6086 6414 6740 7068 7396 7688 7979 8269 8558
8761 8779 8838 8859
.LD 272 274 279 281 286 288 295 297 304 306 313 315 322 324
331 333 340 342 349 351 358 360 367 369 376 378 385 387
394 396 403 405 412 414 421 423 430 432 439 441 448 450
457 459 466 468 475 477 484 486 493 495 502 504 511 513
520 522 529 531 538 540 547 549 556 558 565 567 574 576
583 585 592 594 596 598 603 608 610 612 614 739 741 746
748 753 755 762 764 771 773 780 782 789 791 798 800 807
809 816 821 823 825 827 829 937 942 947 949 954 956 958
1061 1063 1065 1070 1075 1080 1082 1087 1092 1094 1107 1109 1111 1117
1119 1329 1331 1333 1335 1340 1342 1346 1348 1357 1370 1372 1374 1380
1382 1403 1405 1407 1409 1429 1436 1443 1585 1587 1589 1591 1675 1677
1679 1681 1683 1690 1692 1694 1696 1698 1705 1707 1709 1711 1713 1715
1717 1719 1721 1723 1725 1727 1729 1731 1733 1735 1737 1739 1741 1743
1760 1762 1764 1782 1784 1786 1792 1794 1801 1808 1810 1980 1983 1985
1991 1993 2007 2009 2011 2017 2019 2071 2091 2093 2095 2097 2101 2268
2271 2273 2279 2286 2288 2291 2307 2309 2311 2317 2319 2371 2391 2393
2395 2397 2401 2484 2486 2593 2595 2597 2599 2854 2856 2858 2860 2867
2869 2871 2873 2882 2896 2898 2902 2904 2906 2908 2910 2912 3164 3166
3168 3170 3177 3179 3181 3183 3192 3206 3208 3212 3214 3216 3218 3220
3222 3481 3483 3485 3487 3494 3496 3498 3500 3509 3511 3513 3515 3517
3531 3533 3537 3539 3541 3543 3545 3547 3804 3806 3808 3810 3817 3819
3821 3823 3832 3834 3836 3838 3840 3854 3856 3860 3862 3864 3866 3868
3870 4127 4129 4131 4133 4140 4142 4144 4146 4155 4157 4159 4161 4163
4177 4179 4183 4185 4187 4189 4191 4193 4451 4453 4455 4457 4464 4466
4468 4470 4479 4481 4483 4485 4487 4501 4503 4507 4509 4511 4513 4515
4517 4739 4741 4743 4745 4752 4754 4756 4758 4767 4769 4771 4773 4775
4789 4791 4795 4797 4799 4801 4803 4805 5026 5028 5030 5032 5039 5041
5043 5045 5054 5056 5058 5060 5062 5076 5078 5082 5084 5086 5088 5090
5092 5312 5314 5316 5318 5325 5327 5329 5331 5340 5342 5344 5346 5348
5362 5364 5368 5370 5372 5374 5376 5378 5601 5603 5605 5607 5614 5616
5618 5620 5629 5631 5633 5635 5637 5651 5653 5657 5659 5661 5663 5665
5667 5773 5775 5777 5779 6038 6040 6042 6044 6051 6053 6055 6057 6059
6061 6070 6084 6086 6090 6092 6094 6096 6098 6100 6358 6360 6362 6364
6371 6373 6375 6377 6379 6381 6390 6392 6394 6396 6398 6412 6414 6418 SEQ 1846
6420 6422 6424 6426 6428 6684 6686 6688 6690 6697 6699 6701 6703 6705
6707 6716 6718 6720 6722 6724 6738 6740 6744 6746 6748 6750 6752 6754
7012 7014 7016 7018 7025 7027 7029 7031 7033 7035 7044 7046 7048 7050
7052 7066 7068 7072 7074 7076 7078 7080 7082 7340 7342 7344 7346 7353
7355 7357 7359 7361 7363 7372 7374 7376 7378 7380 7394 7396 7400 7402
7404 7406 7408 7410 7632 7634 7636 7638 7645 7647 7649 7651 7653 7655
7664 7666 7668 7670 7672 7686 7688 7692 7694 7696 7698 7700 7702 7923
7925 7927 7929 7936 7938 7940 7942 7944 7946 7955 7957 7959 7961 7963
7977 7979 7983 7985 7987 7989 7991 7993 8213 8215 8217 8219 8226 8228
8230 8232 8234 8236 8245 8247 8249 8251 8253 8267 8269 8273 8275 8277
8279 8281 8283 8502 8504 8506 8508 8515 8517 8519 8521 8523 8525 8534
8536 8538 8540 8542 8556 8558 8562 8564 8566 8568 8570 8572 8757 8761
8777 8779 8781 8785 8792 8794 8796 8798 8800 8802 8804 8811 8818 8822
8836 8838 8842 8844 8846 8848 8850 8852 8857 8859 8863 8865 8867 8869
8871 8873
.LJ 193 195 197 199 201 203 205 207 209 211 213 215 217 219
221 223 225 227 229 231 233 235 237 239 241 243 245 247
249 251 253 255 257 259 261 263 265 267 274 281 288 290
297 299 306 308 315 317 324 326 333 335 342 344 351 353
360 362 369 371 378 380 387 389 396 398 405 407 414 416
423 425 432 434 441 443 450 452 459 461 468 470 477 479
486 488 495 497 504 506 513 515 522 524 531 533 540 542
549 551 558 560 567 569 576 578 585 587 594 596 598 603
608 616 716 718 720 722 724 726 728 730 732 734 741 748
755 757 764 766 773 775 782 784 791 793 800 802 809 811
816 821 831 937 947 949 965 970 972 1061 1063 1065 1080 1082
1092 1094 1101 1107 1109 1113 1115 1121 1126 1128 1329 1340 1342 1344
1348 1350 1359 1370 1372 1376 1378 1384 1393 1395 1397 1399 1407 1411
1413 1422 1431 1436 1438 1443 1445 1455 1457 1585 1675 1677 1679 1681
1683 1690 1692 1694 1696 1698 1705 1713 1715 1717 1719 1721 1723 1725
1727 1729 1731 1733 1735 1748 1750 1752 1754 1756 1764 1766 1772 1774
1782 1784 1788 1790 1796 1801 1803 1808 1810 1822 1824 1974 1987 1989
1993 1996 2007 2009 2013 2015 2021 2069 2071 2079 2081 2083 2085 2087
2095 2097 2101 2106 2108 2268 2275 2277 2282 2284 2288 2291 2297 2299
2307 2309 2313 2315 2321 2369 2379 2381 2383 2385 2387 2395 2397 2401
2406 2408 2484 2486 2593 2597 2601 2854 2860 2865 2867 2869 2880 2889
2900 2902 2906 2908 2912 3164 3170 3175 3177 3179 3190 3199 3210 3212
3216 3218 3222 3481 3487 3492 3494 3496 3507 3511 3513 3524 3535 3537
3541 3543 3547 3804 3810 3815 3817 3819 3830 3834 3836 3847 3858 3860
3864 3866 3870 4127 4133 4138 4140 4142 4153 4157 4159 4170 4181 4183
4187 4189 4193 4451 4457 4462 4464 4466 4477 4481 4483 4494 4505 4507
4511 4513 4517 4739 4745 4750 4752 4754 4765 4769 4771 4782 4793 4795
4799 4801 4805 5026 5032 5037 5039 5041 5052 5056 5058 5069 5080 5082
5086 5088 5092 5312 5318 5323 5325 5327 5338 5342 5344 5355 5366 5368
5372 5374 5378 5601 5607 5612 5614 5616 5627 5631 5633 5644 5655 5657
5661 5663 5667 5773 5777 5781 6038 6044 6049 6051 6053 6068 6077 6088
6090 6094 6096 6100 6358 6364 6369 6371 6373 6388 6392 6394 6405 6416
6418 6422 6424 6428 6684 6690 6695 6697 6699 6714 6718 6720 6731 6742
6744 6748 6750 6754 7012 7018 7023 7025 7027 7042 7046 7048 7059 7070
7072 7076 7078 7082 7340 7346 7351 7353 7355 7370 7374 7376 7387 7398
7400 7404 7406 7410 7632 7638 7643 7645 7647 7662 7666 7668 7679 7690
7692 7696 7698 7702 7923 7929 7934 7936 7938 7953 7957 7959 7970 7981
7983 7987 7989 7993 8213 8219 8224 8226 8228 8243 8247 8249 8260 8271 SEQ 1847
8273 8277 8279 8283 8502 8508 8513 8515 8517 8532 8536 8538 8549 8560
8562 8566 8568 8572 8757 8759 8779 8781 8783 8785 8790 8792 8794 8809
8818 8820 8822 8824 8829 8840 8842 8846 8848 8852 8861 8863 8867 8869
8873
.LJMAP 193 195 197 199 201 203 205 207 209 211 213 215 217 219
221 223 225 227 229 231 233 235 237 239 241 243 245 247
249 251 253 255 257 259 261 263 265 267 274 281 290 299
308 317 326 335 344 353 362 371 380 389 398 407 416 425
434 443 452 461 470 479 488 497 506 515 524 533 542 551
560 569 578 587 598 603 616 716 718 720 722 724 726 728
730 732 734 741 748 757 766 775 784 793 802 811 816 831
937 949 965 970 972 1061 1063 1065 1082 1094 1101 1115 1121 1126
1128 1344 1350 1359 1378 1384 1399 1422 1431 1436 1438 1443 1445 1455
1457 1585 1675 1690 1705 1756 1766 1790 1796 1801 1803 1822 1824 1989
2015 2021 2069 2079 2081 2083 2087 2101 2106 2108 2277 2284 2315 2321
2369 2379 2381 2383 2387 2401 2406 2408 2484 2486 2593 2601 2854 2860
2865 2869 2880 2889 2908 2912 3164 3170 3175 3179 3190 3199 3218 3222
3481 3487 3492 3496 3507 3524 3543 3547 3804 3810 3815 3819 3830 3847
3866 3870 4127 4133 4138 4142 4153 4170 4189 4193 4451 4457 4462 4466
4477 4494 4513 4517 4739 4745 4750 4754 4765 4782 4801 4805 5026 5032
5037 5041 5052 5069 5088 5092 5312 5318 5323 5327 5338 5355 5374 5378
5601 5607 5612 5616 5627 5644 5663 5667 5773 5781 6038 6044 6049 6053
6068 6077 6096 6100 6358 6364 6369 6373 6388 6405 6424 6428 6684 6690
6695 6699 6714 6731 6750 6754 7012 7018 7023 7027 7042 7059 7078 7082
7340 7346 7351 7355 7370 7387 7406 7410 7632 7638 7643 7647 7662 7679
7698 7702 7923 7929 7934 7938 7953 7970 7989 7993 8213 8219 8224 8228
8243 8260 8279 8283 8502 8508 8513 8517 8532 8549 8568 8572 8757 8781
8785 8790 8794 8809 8818 8820 8822 8824 8829 8848 8852 8869 8873
.LJZ 1450 1685 1700 1817 1976 2073 2373 2875 2882 2884 2891 3185 3192 3194
3201 3502 3517 3519 3526 3825 3840 3842 3849 4148 4163 4165 4172 4472
4487 4489 4496 4760 4775 4777 4784 5047 5062 5064 5071 5333 5348 5350
5357 5622 5637 5639 5646 6063 6070 6072 6079 6383 6398 6400 6407 6709
6724 6726 6733 7037 7052 7054 7061 7365 7380 7382 7389 7657 7672 7674
7681 7948 7963 7965 7972 8238 8253 8255 8262 8527 8542 8544 8551 8804
8811 8813 8831
.LLDCT 288 297 306 315 324 333 342 351 360 369 378 387 396 405
414 423 432 441 450 459 468 477 486 495 504 513 522 531
540 549 558 567 576 585 594 755 764 773 782 791 800 809
1107 1370 1393 1677 1681 1692 1696 1713 1717 1721 1725 1729 1733 1772
1782 1808 2007 2071 2095 2268 2297 2307 2395 2900 3210 3511 3535 3834
3858 4157 4181 4481 4505 4769 4793 5056 5080 5342 5366 5631 5655 6088
6392 6416 6718 6742 7046 7070 7374 7398 7666 7690 7957 7981 8247 8271
8536 8560 8759 8840 8861
.LMGC 610 612 614 823 825 827 829 942 954 956 958 963 970 972
1070 1075 1087 1099 1107 1111 1113 1117 1119 1126 1128 1355 1357 1364
1370 1374 1376 1380 1382 1391 1403 1405 1420 1427 1429 1436 1443 1450
1455 1457 1585 1587 1589 1591 1677 1692 1705 1707 1709 1711 1748 1760
1762 1776 1782 1786 1788 1792 1794 1801 1817 1822 1824 1978 1980 1983
1985 1991 1993 2001 2007 2011 2013 2017 2019 2069 2071 2073 2079 2081
2083 2089 2091 2095 2099 2106 2108 2271 2273 2279 2286 2288 2301 2307
2311 2313 2317 2319 2369 2371 2373 2379 2381 2383 2389 2391 2395 2399
2406 2408 2484 2486 2593 2595 2599 2856 2858 2871 2873 2880 2882 2889
2891 2904 2906 2910 2912 3166 3168 3181 3183 3190 3192 3199 3201 3214 SEQ 1848
3216 3220 3222 3483 3485 3498 3500 3507 3509 3511 3515 3517 3524 3526
3539 3541 3545 3547 3806 3808 3821 3823 3830 3832 3834 3838 3840 3847
3849 3862 3864 3868 3870 4129 4131 4144 4146 4153 4155 4157 4161 4163
4170 4172 4185 4187 4191 4193 4453 4455 4468 4470 4477 4479 4481 4485
4487 4494 4496 4509 4511 4515 4517 4741 4743 4756 4758 4765 4767 4769
4773 4775 4782 4784 4797 4799 4803 4805 5028 5030 5043 5045 5052 5054
5056 5060 5062 5069 5071 5084 5086 5090 5092 5314 5316 5329 5331 5338
5340 5342 5346 5348 5355 5357 5370 5372 5376 5378 5603 5605 5618 5620
5627 5629 5631 5635 5637 5644 5646 5659 5661 5665 5667 5773 5775 5779
6040 6042 6055 6057 6059 6061 6068 6070 6077 6079 6092 6094 6098 6100
6360 6362 6375 6377 6379 6381 6388 6390 6392 6396 6398 6405 6407 6420
6422 6426 6428 6686 6688 6701 6703 6705 6707 6714 6716 6718 6722 6724
6731 6733 6746 6748 6752 6754 7014 7016 7029 7031 7033 7035 7042 7044
7046 7050 7052 7059 7061 7074 7076 7080 7082 7342 7344 7357 7359 7361
7363 7370 7372 7374 7378 7380 7387 7389 7402 7404 7408 7410 7634 7636
7649 7651 7653 7655 7662 7664 7666 7670 7672 7679 7681 7694 7696 7700
7702 7925 7927 7940 7942 7944 7946 7953 7955 7957 7961 7963 7970 7972
7985 7987 7991 7993 8215 8217 8230 8232 8234 8236 8243 8245 8247 8251
8253 8260 8262 8275 8277 8281 8283 8504 8506 8519 8521 8523 8525 8532
8534 8536 8540 8542 8549 8551 8564 8566 8570 8572 8761 8763 8765 8767
8769 8771 8773 8775 8777 8796 8798 8800 8802 8809 8811 8818 8822 8829
8831 8844 8846 8850 8852 8865 8867 8871 8873
.LOENA 610 614 823 829 958 1070 1111 1119 1357 1374 1382 1429 1436 1443
1760 1786 1794 1801 1983 1991 2011 2019 2271 2286 2311 2319 2486 2599
2904 2912 3214 3222 3515 3539 3547 3838 3862 3870 4161 4185 4193 4485
4509 4517 4773 4797 4805 5060 5084 5092 5346 5370 5378 5635 5659 5667
5779 6092 6100 6396 6420 6428 6722 6746 6754 7050 7074 7082 7378 7402
7410 7670 7694 7702 7961 7985 7993 8251 8275 8283 8540 8564 8572 8818
8822 8844 8852 8865 8873
.LOR 823 827 956 958 1107 1109 1111 1117 1119 1331 1348 1357 1370 1372
1374 1380 1382 1405 1436 1443 1585 1587 1589 1591 1677 1679 1683 1692
1694 1698 1705 1707 1709 1711 1715 1719 1723 1727 1731 1735 1737 1739
1741 1743 1782 1784 1786 1792 1794 1801 1980 1983 1991 2007 2009 2011
2017 2019 2071 2091 2093 2095 2097 2271 2279 2286 2307 2309 2311 2317
2319 2371 2391 2393 2395 2397 2484 2486 2595 2597 2599 2858 2873 2904
2910 2912 3168 3183 3214 3220 3222 3485 3500 3511 3513 3515 3539 3545
3547 3808 3823 3834 3836 3838 3862 3868 3870 4131 4146 4157 4159 4161
4185 4191 4193 4455 4470 4481 4483 4485 4509 4515 4517 4743 4758 4769
4771 4773 4797 4803 4805 5030 5045 5056 5058 5060 5084 5090 5092 5316
5331 5342 5344 5346 5370 5376 5378 5605 5620 5631 5633 5635 5659 5665
5667 5775 5777 5779 6042 6061 6092 6098 6100 6362 6381 6392 6394 6396
6420 6426 6428 6688 6707 6718 6720 6722 6746 6752 6754 7016 7035 7046
7048 7050 7074 7080 7082 7344 7363 7374 7376 7378 7402 7408 7410 7636
7655 7666 7668 7670 7694 7700 7702 7927 7946 7957 7959 7961 7985 7991
7993 8217 8236 8247 8249 8251 8275 8281 8283 8506 8525 8536 8538 8540
8564 8570 8572 8777 8802 8804 8818 8822 8844 8850 8852 8865 8871 8873
.LPLUS 281 288 297 306 315 324 333 342 351 360 369 378 387 396
405 414 423 432 441 450 459 468 477 486 495 504 513 522
531 540 549 558 567 576 585 594 596 608 748 755 764 773
782 791 800 809 821 1335 1346 1762 1985 1993 2273 2291 2898 2902
3208 3212 3533 3537 3856 3860 4179 4183 4503 4507 4791 4795 5078 5082
5364 5368 5653 5657 6086 6090 6414 6418 6740 6744 7068 7072 7396 7400
7688 7692 7979 7983 8269 8273 8558 8562 8761 8838 8842 8859 8863 SEQ 1849
.LRPCT 596 608 821 1109 1372 1395 1679 1683 1694 1698 1715 1719 1723 1727
1731 1735 1774 1784 1810 1996 2009 2097 2291 2299 2309 2397 2902 3212
3513 3537 3836 3860 4159 4183 4483 4507 4771 4795 5058 5082 5344 5368
5633 5657 6090 6394 6418 6720 6744 7048 7072 7376 7400 7668 7692 7959
7983 8249 8273 8538 8562 8783 8842 8863
.LS0A 610 614 823 829 958 1070 1111 1117 1119 1331 1333 1335 1357 1374
1380 1382 1429 1436 1443 1737 1760 1786 1792 1794 1801 1991 2011 2017
2019 2071 2093 2311 2317 2319 2371 2393 2486 2593 2597 2599 2904 2910
2912 3214 3220 3222 3513 3515 3539 3545 3547 3836 3838 3862 3868 3870
4159 4161 4185 4191 4193 4483 4485 4509 4515 4517 4771 4773 4797 4803
4805 5058 5060 5084 5090 5092 5344 5346 5370 5376 5378 5633 5635 5659
5665 5667 5773 5777 5779 6092 6098 6100 6394 6396 6420 6426 6428 6720
6722 6746 6752 6754 7048 7050 7074 7080 7082 7376 7378 7402 7408 7410
7668 7670 7694 7700 7702 7959 7961 7985 7991 7993 8249 8251 8275 8281
8283 8538 8540 8564 8570 8572 8804 8818 8822 8844 8850 8852 8865 8871
8873
.LS0B 1109 1346 1348 1372 1403 1407 1409 1679 1683 1694 1698 1715 1719 1723
1727 1731 1735 1762 1764 1784 1985 1993 2009 2097 2101 2268 2273 2286
2291 2309 2397 2401 2898 3208 3533 3856 4179 4503 4791 5078 5364 5653
6086 6414 6740 7068 7396 7688 7979 8269 8558 8757 8761 8838 8859
.LSAB 274 281 288 297 306 315 324 333 342 351 360 369 378 387
396 405 414 423 432 441 450 459 468 477 486 495 504 513
522 531 540 549 558 567 576 585 594 596 598 608 741 748
755 764 773 782 791 800 809 821 1065 1342 1739 1741 1743 1983
2271 2902 3212 3537 3860 4183 4507 4795 5082 5368 5657 6090 6418 6744
7072 7400 7692 7983 8273 8562 8779 8842 8863
.LSD0 272 279 286 295 304 313 322 331 340 349 358 367 376 385
394 403 412 421 430 439 448 457 466 475 484 493 502 511
520 529 538 547 556 565 574 583 592 603 612 739 746 753
762 771 780 789 798 807 816 825 827 937 956 1061 1063 1107
1370 1405 1585 1587 1589 1591 1675 1677 1690 1692 1705 1707 1709 1711
1782 1980 2007 2091 2095 2279 2307 2391 2395 2484 2595 2858 2873 2896
3168 3183 3206 3485 3500 3511 3517 3531 3808 3823 3834 3840 3854 4131
4146 4157 4163 4177 4455 4470 4481 4487 4501 4743 4758 4769 4775 4789
5030 5045 5056 5062 5076 5316 5331 5342 5348 5362 5605 5620 5631 5637
5651 5775 6042 6061 6084 6362 6381 6392 6398 6412 6688 6707 6718 6724
6738 7016 7035 7046 7052 7066 7344 7363 7374 7380 7394 7636 7655 7666
7672 7686 7927 7946 7957 7963 7977 8217 8236 8247 8253 8267 8506 8525
8536 8542 8556 8777 8802 8836 8857
.LSELC 942 954 963 970 1075 1087 1099 1126 1355 1364 1391 1403 1420 1427
1455 1748 1762 1776 1822 1978 2001 2071 2073 2079 2083 2089 2099 2106
2288 2301 2371 2373 2379 2383 2389 2399 2406 2856 2871 2882 2889 3181
3192 3199 3498 3509 3524 3821 3832 3847 4144 4155 4170 4468 4479 4494
4756 4767 4782 5043 5054 5069 5329 5340 5355 5618 5629 5644 6059 6070
6077 6379 6390 6405 6705 6716 6731 7033 7044 7059 7361 7372 7387 7653
7664 7679 7944 7955 7970 8234 8245 8260 8523 8534 8549 8800 8811 8829
.LSELE 614 829 958 1111 1113 1117 1119 1357 1374 1376 1380 1382 1429 1436
1443 1786 1788 1792 1794 1801 1983 1985 1991 1993 2011 2013 2017 2019
2271 2273 2279 2311 2313 2317 2319 2486 2599 2904 2906 2910 2912 3214
3216 3220 3222 3539 3541 3545 3547 3862 3864 3868 3870 4185 4187 4191
4193 4509 4511 4515 4517 4797 4799 4803 4805 5084 5086 5090 5092 5370
5372 5376 5378 5659 5661 5665 5667 5779 6092 6094 6098 6100 6420 6422
6426 6428 6746 6748 6752 6754 7074 7076 7080 7082 7402 7404 7408 7410 SEQ 1850
7694 7696 7700 7702 7985 7987 7991 7993 8275 8277 8281 8283 8564 8566
8570 8572 8818 8822 8844 8846 8850 8852 8865 8867 8871 8873
.LSELF 610 1070 1760 2286 2593 3166 3483 3806 4129 4453 4741 5028 5314 5603
5773 6040 6055 6057 6360 6375 6377 6686 6701 6703 7014 7029 7031 7342
7357 7359 7634 7649 7651 7925 7940 7942 8215 8230 8232 8504 8519 8521
8761 8763 8765 8767 8769 8771 8773 8775 8796 8798
.LSELM 612 823 827 956 972 1128 1405 1450 1457 1817 1824 1980 2069 2081
2091 2108 2369 2381 2391 2408 2484 2595 2858 2873 2880 2891 3168 3183
3190 3201 3485 3500 3507 3515 3526 3808 3823 3830 3838 3849 4131 4146
4153 4161 4172 4455 4470 4477 4485 4496 4743 4758 4765 4773 4784 5030
5045 5052 5060 5071 5316 5331 5338 5346 5357 5605 5620 5627 5635 5646
5775 6042 6061 6068 6079 6362 6381 6388 6396 6407 6688 6707 6714 6722
6733 7016 7035 7042 7050 7061 7344 7363 7370 7378 7389 7636 7655 7662
7670 7681 7927 7946 7953 7961 7972 8217 8236 8243 8251 8262 8506 8525
8532 8540 8551 8777 8802 8809 8831
.LSELP 825 3517 3840 4163 4487 4775 5062 5348 5637 6398 6724 7052 7380 7672
7963 8253 8542
.LSKCN 1107 1370 1585 1587 1589 1591 1677 1692 1705 1707 1709 1711 1782 2007
2095 2307 2395 3511 3834 4157 4481 4769 5056 5342 5631 6392 6718 7046
7374 7666 7957 8247 8536
.LSMIN 1764 8779
.LXNOR 274 741 1065 1407 1429
.LXOR 1342
.MA 274 281 288 297 306 315 324 333 342 351 360 369 378 387
396 405 414 423 432 441 450 459 468 477 486 495 504 513
522 531 540 549 558 567 576 585 594 596 598 608 610 614
741 748 755 764 773 782 791 800 809 821 823 829 1111 1117
1119 1331 1333 1335 1342 1357 1374 1380 1382 1429 1436 1443 1739 1741
1743 1760 1786 1792 1794 1801 1983 1991 2011 2017 2019 2071 2093 2271
2311 2317 2319 2371 2393 2902 2904 2910 2912 3212 3214 3220 3222 3537
3539 3545 3547 3860 3862 3868 3870 4183 4185 4191 4193 4507 4509 4515
4517 4795 4797 4803 4805 5082 5084 5090 5092 5368 5370 5376 5378 5657
5659 5665 5667 6090 6092 6098 6100 6418 6420 6426 6428 6744 6746 6752
6754 7072 7074 7080 7082 7400 7402 7408 7410 7692 7694 7700 7702 7983
7985 7991 7993 8273 8275 8281 8283 8562 8564 8570 8572 8779 8804 8818
8822 8842 8844 8850 8852 8863 8865 8871 8873
.MAND 272 279 286 295 304 313 322 331 340 349 358 367 376 385
394 403 412 421 430 439 448 457 466 475 484 493 502 511
520 529 538 547 556 565 574 583 592 603 739 746 753 762
771 780 789 798 807 816 937 1061 1063 1333 1403 1409 1675 1690
2101 2268 2401 2896 3206 3531 3854 4177 4501 4789 5076 5362 5651 6084
6412 6738 7066 7394 7686 7977 8267 8556 8757 8836 8857
.MB 272 274 279 281 286 288 295 297 304 306 313 315 322 324
331 333 340 342 349 351 358 360 367 369 376 378 385 387
394 396 403 405 412 414 421 423 430 432 439 441 448 450
457 459 466 468 475 477 484 486 493 495 502 504 511 513
520 522 529 531 538 540 547 549 556 558 565 567 574 576
583 585 592 594 596 598 603 608 612 739 741 746 748 753
755 762 764 771 773 780 782 789 791 798 800 807 809 816
821 827 1107 1109 1331 1333 1335 1342 1346 1348 1370 1372 1403 1405
1407 1409 1587 1589 1591 1675 1677 1679 1683 1690 1692 1694 1698 1707
1709 1711 1715 1719 1723 1727 1731 1735 1737 1739 1741 1743 1762 1764
1782 1784 1980 1983 1985 1993 2007 2009 2071 2091 2093 2095 2097 2101 SEQ 1851
2268 2271 2273 2279 2286 2291 2307 2309 2371 2391 2393 2395 2397 2401
2858 2873 2896 2898 2902 3168 3183 3206 3208 3212 3485 3500 3531 3533
3537 3808 3823 3854 3856 3860 4131 4146 4177 4179 4183 4455 4470 4501
4503 4507 4743 4758 4789 4791 4795 5030 5045 5076 5078 5082 5316 5331
5362 5364 5368 5605 5620 5651 5653 5657 6042 6061 6084 6086 6090 6362
6381 6412 6414 6418 6688 6707 6738 6740 6744 7016 7035 7066 7068 7072
7344 7363 7394 7396 7400 7636 7655 7686 7688 7692 7927 7946 7977 7979
7983 8217 8236 8267 8269 8273 8506 8525 8556 8558 8562 8757 8761 8777
8779 8802 8804 8836 8838 8842 8857 8859 8863
.MBAD 2601 5781
.MCCCA 947 1080 1092 1397 1754 1974 2085 2282 2385 2867 3177 3494 3817 4140
4464 4752 5039 5325 5614 6051 6371 6697 7025 7353 7645 7936 8226 8515
8792
.MCCCE 1411 1750
.MCCCP 1413 1752
.MCCER 1987 2275
.MCCFZ 1342 1764 2597 5777 8779
.MCCGC 1113 1376 1788 2013 2313 2906 3216 3541 3864 4187 4511 4799 5086 5372
5661 6094 6422 6748 7076 7404 7696 7987 8277 8566 8846 8867
.MCCLW 1407
.MCCMB 1348
.MCENA 947 1080 1092 1113 1342 1348 1376 1397 1407 1411 1413 1750 1752 1754
1764 1788 1974 1987 2013 2085 2275 2282 2313 2385 2597 2867 2906 3177
3216 3494 3541 3817 3864 4140 4187 4464 4511 4752 4799 5039 5086 5325
5372 5614 5661 5777 6051 6094 6371 6422 6697 6748 7025 7076 7353 7404
7645 7696 7936 7987 8226 8277 8515 8566 8779 8792 8846 8867
.MCJP 947 1080 1092 1113 1342 1348 1376 1397 1407 1411 1413 1750 1752 1754
1764 1788 1974 1987 2013 2085 2275 2282 2313 2385 2597 2867 2906 3177
3216 3494 3541 3817 3864 4140 4187 4464 4511 4752 4799 5039 5086 5325
5372 5614 5661 5777 6051 6094 6371 6422 6697 6748 7025 7076 7353 7404
7645 7696 7936 7987 8226 8277 8515 8566 8779 8792 8846 8867
.MCJS 1329 1340 1748 1993 2288
.MCONT 272 279 286 295 304 313 322 331 340 349 358 367 376 385
394 403 412 421 430 439 448 457 466 475 484 493 502 511
520 529 538 547 556 565 574 583 592 610 612 614 739 746
753 762 771 780 789 798 807 823 825 827 829 942 954 956
958 963 1070 1075 1087 1099 1111 1117 1119 1331 1333 1335 1346 1355
1357 1364 1374 1380 1382 1391 1401 1403 1405 1409 1420 1427 1429 1587
1589 1591 1707 1709 1711 1737 1739 1741 1743 1758 1760 1762 1776 1786
1792 1794 1978 1980 1983 1985 1991 2001 2011 2017 2019 2026 2028 2030
2032 2034 2036 2038 2040 2042 2044 2046 2048 2050 2052 2054 2056 2058
2060 2062 2089 2091 2093 2099 2271 2273 2279 2286 2301 2311 2317 2319
2326 2328 2330 2332 2334 2336 2338 2340 2342 2344 2346 2348 2350 2352
2354 2356 2358 2360 2362 2371 2389 2391 2393 2399 2595 2599 2856 2858
2871 2873 2896 2898 2904 2910 3166 3168 3181 3183 3206 3208 3214 3220
3483 3485 3498 3500 3509 3515 3531 3533 3539 3545 3806 3808 3821 3823
3832 3838 3854 3856 3862 3868 4129 4131 4144 4146 4155 4161 4177 4179
4185 4191 4453 4455 4468 4470 4479 4485 4501 4503 4509 4515 4741 4743
4756 4758 4767 4773 4789 4791 4797 4803 5028 5030 5043 5045 5054 5060
5076 5078 5084 5090 5314 5316 5329 5331 5340 5346 5362 5364 5370 5376
5603 5605 5618 5620 5629 5635 5651 5653 5659 5665 5775 5779 6040 6042
6055 6057 6059 6061 6084 6086 6092 6098 6360 6362 6375 6377 6379 6381
6390 6396 6412 6414 6420 6426 6686 6688 6701 6703 6705 6707 6716 6722 SEQ 1852
6738 6740 6746 6752 7014 7016 7029 7031 7033 7035 7044 7050 7066 7068
7074 7080 7342 7344 7357 7359 7361 7363 7372 7378 7394 7396 7402 7408
7634 7636 7649 7651 7653 7655 7664 7670 7686 7688 7694 7700 7925 7927
7940 7942 7944 7946 7955 7961 7977 7979 7985 7991 8215 8217 8230 8232
8234 8236 8245 8251 8267 8269 8275 8281 8504 8506 8519 8521 8523 8525
8534 8540 8556 8558 8564 8570 8761 8763 8765 8767 8769 8771 8773 8775
8777 8796 8798 8800 8802 8836 8838 8844 8850 8857 8859 8865 8871
.MCRTN 1415 1812 2064 2364
.MCRY 281 288 297 306 315 324 333 342 351 360 369 378 387 396
405 414 423 432 441 450 459 468 477 486 495 504 513 522
531 540 549 558 567 576 585 594 748 755 764 773 782 791
800 809 1335 1346 1762 1985 1993 2273 2291 2898 3208 3533 3856 4179
4503 4791 5078 5364 5653 6086 6414 6740 7068 7396 7688 7979 8269 8558
8761 8779 8838 8859
.MD 272 274 279 281 286 288 295 297 304 306 313 315 322 324
331 333 340 342 349 351 358 360 367 369 376 378 385 387
394 396 403 405 412 414 421 423 430 432 439 441 448 450
457 459 466 468 475 477 484 486 493 495 502 504 511 513
520 522 529 531 538 540 547 549 556 558 565 567 574 576
583 585 592 594 596 598 603 608 610 612 614 739 741 746
748 753 755 762 764 771 773 780 782 789 791 798 800 807
809 816 821 823 825 827 829 937 942 947 949 954 956 958
1061 1063 1065 1070 1075 1080 1082 1087 1092 1094 1107 1109 1111 1117
1119 1329 1331 1333 1335 1340 1342 1346 1348 1357 1370 1372 1374 1380
1382 1403 1405 1407 1409 1429 1436 1443 1585 1587 1589 1591 1675 1677
1679 1681 1683 1690 1692 1694 1696 1698 1705 1707 1709 1711 1713 1715
1717 1719 1721 1723 1725 1727 1729 1731 1733 1735 1737 1739 1741 1743
1760 1762 1764 1782 1784 1786 1792 1794 1801 1808 1810 1980 1983 1985
1991 1993 2007 2009 2011 2017 2019 2071 2091 2093 2095 2097 2101 2268
2271 2273 2279 2286 2288 2291 2307 2309 2311 2317 2319 2371 2391 2393
2395 2397 2401 2484 2486 2593 2595 2597 2599 2854 2856 2858 2860 2867
2869 2871 2873 2882 2896 2898 2902 2904 2906 2908 2910 2912 3164 3166
3168 3170 3177 3179 3181 3183 3192 3206 3208 3212 3214 3216 3218 3220
3222 3481 3483 3485 3487 3494 3496 3498 3500 3509 3511 3513 3515 3517
3531 3533 3537 3539 3541 3543 3545 3547 3804 3806 3808 3810 3817 3819
3821 3823 3832 3834 3836 3838 3840 3854 3856 3860 3862 3864 3866 3868
3870 4127 4129 4131 4133 4140 4142 4144 4146 4155 4157 4159 4161 4163
4177 4179 4183 4185 4187 4189 4191 4193 4451 4453 4455 4457 4464 4466
4468 4470 4479 4481 4483 4485 4487 4501 4503 4507 4509 4511 4513 4515
4517 4739 4741 4743 4745 4752 4754 4756 4758 4767 4769 4771 4773 4775
4789 4791 4795 4797 4799 4801 4803 4805 5026 5028 5030 5032 5039 5041
5043 5045 5054 5056 5058 5060 5062 5076 5078 5082 5084 5086 5088 5090
5092 5312 5314 5316 5318 5325 5327 5329 5331 5340 5342 5344 5346 5348
5362 5364 5368 5370 5372 5374 5376 5378 5601 5603 5605 5607 5614 5616
5618 5620 5629 5631 5633 5635 5637 5651 5653 5657 5659 5661 5663 5665
5667 5773 5775 5777 5779 6038 6040 6042 6044 6051 6053 6055 6057 6059
6061 6070 6084 6086 6090 6092 6094 6096 6098 6100 6358 6360 6362 6364
6371 6373 6375 6377 6379 6381 6390 6392 6394 6396 6398 6412 6414 6418
6420 6422 6424 6426 6428 6684 6686 6688 6690 6697 6699 6701 6703 6705
6707 6716 6718 6720 6722 6724 6738 6740 6744 6746 6748 6750 6752 6754
7012 7014 7016 7018 7025 7027 7029 7031 7033 7035 7044 7046 7048 7050
7052 7066 7068 7072 7074 7076 7078 7080 7082 7340 7342 7344 7346 7353
7355 7357 7359 7361 7363 7372 7374 7376 7378 7380 7394 7396 7400 7402 SEQ 1853
7404 7406 7408 7410 7632 7634 7636 7638 7645 7647 7649 7651 7653 7655
7664 7666 7668 7670 7672 7686 7688 7692 7694 7696 7698 7700 7702 7923
7925 7927 7929 7936 7938 7940 7942 7944 7946 7955 7957 7959 7961 7963
7977 7979 7983 7985 7987 7989 7991 7993 8213 8215 8217 8219 8226 8228
8230 8232 8234 8236 8245 8247 8249 8251 8253 8267 8269 8273 8275 8277
8279 8281 8283 8502 8504 8506 8508 8515 8517 8519 8521 8523 8525 8534
8536 8538 8540 8542 8556 8558 8562 8564 8566 8568 8570 8572 8757 8761
8777 8779 8781 8785 8792 8794 8796 8798 8800 8802 8804 8811 8818 8822
8836 8838 8842 8844 8846 8848 8850 8852 8857 8859 8863 8865 8867 8869
8871 8873
.MJ 193 195 197 199 201 203 205 207 209 211 213 215 217 219
221 223 225 227 229 231 233 235 237 239 241 243 245 247
249 251 253 255 257 259 261 263 265 267 274 281 288 290
297 299 306 308 315 317 324 326 333 335 342 344 351 353
360 362 369 371 378 380 387 389 396 398 405 407 414 416
423 425 432 434 441 443 450 452 459 461 468 470 477 479
486 488 495 497 504 506 513 515 522 524 531 533 540 542
549 551 558 560 567 569 576 578 585 587 594 596 598 603
608 616 716 718 720 722 724 726 728 730 732 734 741 748
755 757 764 766 773 775 782 784 791 793 800 802 809 811
816 821 831 937 947 949 965 970 972 1061 1063 1065 1080 1082
1092 1094 1101 1107 1109 1113 1115 1121 1126 1128 1329 1340 1342 1344
1348 1350 1359 1370 1372 1376 1378 1384 1393 1395 1397 1399 1407 1411
1413 1422 1431 1436 1438 1443 1445 1455 1457 1585 1675 1677 1679 1681
1683 1690 1692 1694 1696 1698 1705 1713 1715 1717 1719 1721 1723 1725
1727 1729 1731 1733 1735 1748 1750 1752 1754 1756 1764 1766 1772 1774
1782 1784 1788 1790 1796 1801 1803 1808 1810 1822 1824 1974 1987 1989
1993 1996 2007 2009 2013 2015 2021 2069 2071 2079 2081 2083 2085 2087
2095 2097 2101 2106 2108 2268 2275 2277 2282 2284 2288 2291 2297 2299
2307 2309 2313 2315 2321 2369 2379 2381 2383 2385 2387 2395 2397 2401
2406 2408 2484 2486 2593 2597 2601 2854 2860 2865 2867 2869 2880 2889
2900 2902 2906 2908 2912 3164 3170 3175 3177 3179 3190 3199 3210 3212
3216 3218 3222 3481 3487 3492 3494 3496 3507 3511 3513 3524 3535 3537
3541 3543 3547 3804 3810 3815 3817 3819 3830 3834 3836 3847 3858 3860
3864 3866 3870 4127 4133 4138 4140 4142 4153 4157 4159 4170 4181 4183
4187 4189 4193 4451 4457 4462 4464 4466 4477 4481 4483 4494 4505 4507
4511 4513 4517 4739 4745 4750 4752 4754 4765 4769 4771 4782 4793 4795
4799 4801 4805 5026 5032 5037 5039 5041 5052 5056 5058 5069 5080 5082
5086 5088 5092 5312 5318 5323 5325 5327 5338 5342 5344 5355 5366 5368
5372 5374 5378 5601 5607 5612 5614 5616 5627 5631 5633 5644 5655 5657
5661 5663 5667 5773 5777 5781 6038 6044 6049 6051 6053 6068 6077 6088
6090 6094 6096 6100 6358 6364 6369 6371 6373 6388 6392 6394 6405 6416
6418 6422 6424 6428 6684 6690 6695 6697 6699 6714 6718 6720 6731 6742
6744 6748 6750 6754 7012 7018 7023 7025 7027 7042 7046 7048 7059 7070
7072 7076 7078 7082 7340 7346 7351 7353 7355 7370 7374 7376 7387 7398
7400 7404 7406 7410 7632 7638 7643 7645 7647 7662 7666 7668 7679 7690
7692 7696 7698 7702 7923 7929 7934 7936 7938 7953 7957 7959 7970 7981
7983 7987 7989 7993 8213 8219 8224 8226 8228 8243 8247 8249 8260 8271
8273 8277 8279 8283 8502 8508 8513 8515 8517 8532 8536 8538 8549 8560
8562 8566 8568 8572 8757 8759 8779 8781 8783 8785 8790 8792 8794 8809
8818 8820 8822 8824 8829 8840 8842 8846 8848 8852 8861 8863 8867 8869
8873
.MJMAP 193 195 197 199 201 203 205 207 209 211 213 215 217 219 SEQ 1854
221 223 225 227 229 231 233 235 237 239 241 243 245 247
249 251 253 255 257 259 261 263 265 267 274 281 290 299
308 317 326 335 344 353 362 371 380 389 398 407 416 425
434 443 452 461 470 479 488 497 506 515 524 533 542 551
560 569 578 587 598 603 616 716 718 720 722 724 726 728
730 732 734 741 748 757 766 775 784 793 802 811 816 831
937 949 965 970 972 1061 1063 1065 1082 1094 1101 1115 1121 1126
1128 1344 1350 1359 1378 1384 1399 1422 1431 1436 1438 1443 1445 1455
1457 1585 1675 1690 1705 1756 1766 1790 1796 1801 1803 1822 1824 1989
2015 2021 2069 2079 2081 2083 2087 2101 2106 2108 2277 2284 2315 2321
2369 2379 2381 2383 2387 2401 2406 2408 2484 2486 2593 2601 2854 2860
2865 2869 2880 2889 2908 2912 3164 3170 3175 3179 3190 3199 3218 3222
3481 3487 3492 3496 3507 3524 3543 3547 3804 3810 3815 3819 3830 3847
3866 3870 4127 4133 4138 4142 4153 4170 4189 4193 4451 4457 4462 4466
4477 4494 4513 4517 4739 4745 4750 4754 4765 4782 4801 4805 5026 5032
5037 5041 5052 5069 5088 5092 5312 5318 5323 5327 5338 5355 5374 5378
5601 5607 5612 5616 5627 5644 5663 5667 5773 5781 6038 6044 6049 6053
6068 6077 6096 6100 6358 6364 6369 6373 6388 6405 6424 6428 6684 6690
6695 6699 6714 6731 6750 6754 7012 7018 7023 7027 7042 7059 7078 7082
7340 7346 7351 7355 7370 7387 7406 7410 7632 7638 7643 7647 7662 7679
7698 7702 7923 7929 7934 7938 7953 7970 7989 7993 8213 8219 8224 8228
8243 8260 8279 8283 8502 8508 8513 8517 8532 8549 8568 8572 8757 8781
8785 8790 8794 8809 8818 8820 8822 8824 8829 8848 8852 8869 8873
.MJZ 1450 1685 1700 1817 1976 2073 2373 2875 2882 2884 2891 3185 3192 3194
3201 3502 3517 3519 3526 3825 3840 3842 3849 4148 4163 4165 4172 4472
4487 4489 4496 4760 4775 4777 4784 5047 5062 5064 5071 5333 5348 5350
5357 5622 5637 5639 5646 6063 6070 6072 6079 6383 6398 6400 6407 6709
6724 6726 6733 7037 7052 7054 7061 7365 7380 7382 7389 7657 7672 7674
7681 7948 7963 7965 7972 8238 8253 8255 8262 8527 8542 8544 8551 8804
8811 8813 8831
.MLDCT 288 297 306 315 324 333 342 351 360 369 378 387 396 405
414 423 432 441 450 459 468 477 486 495 504 513 522 531
540 549 558 567 576 585 594 755 764 773 782 791 800 809
1107 1370 1393 1677 1681 1692 1696 1713 1717 1721 1725 1729 1733 1772
1782 1808 2007 2071 2095 2268 2297 2307 2395 2900 3210 3511 3535 3834
3858 4157 4181 4481 4505 4769 4793 5056 5080 5342 5366 5631 5655 6088
6392 6416 6718 6742 7046 7070 7374 7398 7666 7690 7957 7981 8247 8271
8536 8560 8759 8840 8861
.MMGC 610 612 614 823 825 827 829 942 954 956 958 963 970 972
1070 1075 1087 1099 1107 1111 1113 1117 1119 1126 1128 1355 1357 1364
1370 1374 1376 1380 1382 1391 1403 1405 1420 1427 1429 1436 1443 1450
1455 1457 1585 1587 1589 1591 1677 1692 1705 1707 1709 1711 1748 1760
1762 1776 1782 1786 1788 1792 1794 1801 1817 1822 1824 1978 1980 1983
1985 1991 1993 2001 2007 2011 2013 2017 2019 2069 2071 2073 2079 2081
2083 2089 2091 2095 2099 2106 2108 2271 2273 2279 2286 2288 2301 2307
2311 2313 2317 2319 2369 2371 2373 2379 2381 2383 2389 2391 2395 2399
2406 2408 2484 2486 2593 2595 2599 2856 2858 2871 2873 2880 2882 2889
2891 2904 2906 2910 2912 3166 3168 3181 3183 3190 3192 3199 3201 3214
3216 3220 3222 3483 3485 3498 3500 3507 3509 3511 3515 3517 3524 3526
3539 3541 3545 3547 3806 3808 3821 3823 3830 3832 3834 3838 3840 3847
3849 3862 3864 3868 3870 4129 4131 4144 4146 4153 4155 4157 4161 4163
4170 4172 4185 4187 4191 4193 4453 4455 4468 4470 4477 4479 4481 4485
4487 4494 4496 4509 4511 4515 4517 4741 4743 4756 4758 4765 4767 4769 SEQ 1855
4773 4775 4782 4784 4797 4799 4803 4805 5028 5030 5043 5045 5052 5054
5056 5060 5062 5069 5071 5084 5086 5090 5092 5314 5316 5329 5331 5338
5340 5342 5346 5348 5355 5357 5370 5372 5376 5378 5603 5605 5618 5620
5627 5629 5631 5635 5637 5644 5646 5659 5661 5665 5667 5773 5775 5779
6040 6042 6055 6057 6059 6061 6068 6070 6077 6079 6092 6094 6098 6100
6360 6362 6375 6377 6379 6381 6388 6390 6392 6396 6398 6405 6407 6420
6422 6426 6428 6686 6688 6701 6703 6705 6707 6714 6716 6718 6722 6724
6731 6733 6746 6748 6752 6754 7014 7016 7029 7031 7033 7035 7042 7044
7046 7050 7052 7059 7061 7074 7076 7080 7082 7342 7344 7357 7359 7361
7363 7370 7372 7374 7378 7380 7387 7389 7402 7404 7408 7410 7634 7636
7649 7651 7653 7655 7662 7664 7666 7670 7672 7679 7681 7694 7696 7700
7702 7925 7927 7940 7942 7944 7946 7953 7955 7957 7961 7963 7970 7972
7985 7987 7991 7993 8215 8217 8230 8232 8234 8236 8243 8245 8247 8251
8253 8260 8262 8275 8277 8281 8283 8504 8506 8519 8521 8523 8525 8532
8534 8536 8540 8542 8549 8551 8564 8566 8570 8572 8761 8763 8765 8767
8769 8771 8773 8775 8777 8796 8798 8800 8802 8809 8811 8818 8822 8829
8831 8844 8846 8850 8852 8865 8867 8871 8873
.MOENA 610 614 823 829 958 1070 1111 1119 1357 1374 1382 1429 1436 1443
1760 1786 1794 1801 1983 1991 2011 2019 2271 2286 2311 2319 2486 2599
2904 2912 3214 3222 3515 3539 3547 3838 3862 3870 4161 4185 4193 4485
4509 4517 4773 4797 4805 5060 5084 5092 5346 5370 5378 5635 5659 5667
5779 6092 6100 6396 6420 6428 6722 6746 6754 7050 7074 7082 7378 7402
7410 7670 7694 7702 7961 7985 7993 8251 8275 8283 8540 8564 8572 8818
8822 8844 8852 8865 8873
.MOR 823 827 956 958 1107 1109 1111 1117 1119 1331 1348 1357 1370 1372
1374 1380 1382 1405 1436 1443 1585 1587 1589 1591 1677 1679 1683 1692
1694 1698 1705 1707 1709 1711 1715 1719 1723 1727 1731 1735 1737 1739
1741 1743 1782 1784 1786 1792 1794 1801 1980 1983 1991 2007 2009 2011
2017 2019 2071 2091 2093 2095 2097 2271 2279 2286 2307 2309 2311 2317
2319 2371 2391 2393 2395 2397 2484 2486 2595 2597 2599 2858 2873 2904
2910 2912 3168 3183 3214 3220 3222 3485 3500 3511 3513 3515 3539 3545
3547 3808 3823 3834 3836 3838 3862 3868 3870 4131 4146 4157 4159 4161
4185 4191 4193 4455 4470 4481 4483 4485 4509 4515 4517 4743 4758 4769
4771 4773 4797 4803 4805 5030 5045 5056 5058 5060 5084 5090 5092 5316
5331 5342 5344 5346 5370 5376 5378 5605 5620 5631 5633 5635 5659 5665
5667 5775 5777 5779 6042 6061 6092 6098 6100 6362 6381 6392 6394 6396
6420 6426 6428 6688 6707 6718 6720 6722 6746 6752 6754 7016 7035 7046
7048 7050 7074 7080 7082 7344 7363 7374 7376 7378 7402 7408 7410 7636
7655 7666 7668 7670 7694 7700 7702 7927 7946 7957 7959 7961 7985 7991
7993 8217 8236 8247 8249 8251 8275 8281 8283 8506 8525 8536 8538 8540
8564 8570 8572 8777 8802 8804 8818 8822 8844 8850 8852 8865 8871 8873
.MPLUS 281 288 297 306 315 324 333 342 351 360 369 378 387 396
405 414 423 432 441 450 459 468 477 486 495 504 513 522
531 540 549 558 567 576 585 594 596 608 748 755 764 773
782 791 800 809 821 1335 1346 1762 1985 1993 2273 2291 2898 2902
3208 3212 3533 3537 3856 3860 4179 4183 4503 4507 4791 4795 5078 5082
5364 5368 5653 5657 6086 6090 6414 6418 6740 6744 7068 7072 7396 7400
7688 7692 7979 7983 8269 8273 8558 8562 8761 8838 8842 8859 8863
.MRPCT 596 608 821 1109 1372 1395 1679 1683 1694 1698 1715 1719 1723 1727
1731 1735 1774 1784 1810 1996 2009 2097 2291 2299 2309 2397 2902 3212
3513 3537 3836 3860 4159 4183 4483 4507 4771 4795 5058 5082 5344 5368
5633 5657 6090 6394 6418 6720 6744 7048 7072 7376 7400 7668 7692 7959
7983 8249 8273 8538 8562 8783 8842 8863 SEQ 1856
.MS0A 610 614 823 829 958 1070 1111 1117 1119 1331 1333 1335 1357 1374
1380 1382 1429 1436 1443 1737 1760 1786 1792 1794 1801 1991 2011 2017
2019 2071 2093 2311 2317 2319 2371 2393 2486 2593 2597 2599 2904 2910
2912 3214 3220 3222 3513 3515 3539 3545 3547 3836 3838 3862 3868 3870
4159 4161 4185 4191 4193 4483 4485 4509 4515 4517 4771 4773 4797 4803
4805 5058 5060 5084 5090 5092 5344 5346 5370 5376 5378 5633 5635 5659
5665 5667 5773 5777 5779 6092 6098 6100 6394 6396 6420 6426 6428 6720
6722 6746 6752 6754 7048 7050 7074 7080 7082 7376 7378 7402 7408 7410
7668 7670 7694 7700 7702 7959 7961 7985 7991 7993 8249 8251 8275 8281
8283 8538 8540 8564 8570 8572 8804 8818 8822 8844 8850 8852 8865 8871
8873
.MS0B 1109 1346 1348 1372 1403 1407 1409 1679 1683 1694 1698 1715 1719 1723
1727 1731 1735 1762 1764 1784 1985 1993 2009 2097 2101 2268 2273 2286
2291 2309 2397 2401 2898 3208 3533 3856 4179 4503 4791 5078 5364 5653
6086 6414 6740 7068 7396 7688 7979 8269 8558 8757 8761 8838 8859
.MSAB 274 281 288 297 306 315 324 333 342 351 360 369 378 387
396 405 414 423 432 441 450 459 468 477 486 495 504 513
522 531 540 549 558 567 576 585 594 596 598 608 741 748
755 764 773 782 791 800 809 821 1065 1342 1739 1741 1743 1983
2271 2902 3212 3537 3860 4183 4507 4795 5082 5368 5657 6090 6418 6744
7072 7400 7692 7983 8273 8562 8779 8842 8863
.MSD0 272 279 286 295 304 313 322 331 340 349 358 367 376 385
394 403 412 421 430 439 448 457 466 475 484 493 502 511
520 529 538 547 556 565 574 583 592 603 612 739 746 753
762 771 780 789 798 807 816 825 827 937 956 1061 1063 1107
1370 1405 1585 1587 1589 1591 1675 1677 1690 1692 1705 1707 1709 1711
1782 1980 2007 2091 2095 2279 2307 2391 2395 2484 2595 2858 2873 2896
3168 3183 3206 3485 3500 3511 3517 3531 3808 3823 3834 3840 3854 4131
4146 4157 4163 4177 4455 4470 4481 4487 4501 4743 4758 4769 4775 4789
5030 5045 5056 5062 5076 5316 5331 5342 5348 5362 5605 5620 5631 5637
5651 5775 6042 6061 6084 6362 6381 6392 6398 6412 6688 6707 6718 6724
6738 7016 7035 7046 7052 7066 7344 7363 7374 7380 7394 7636 7655 7666
7672 7686 7927 7946 7957 7963 7977 8217 8236 8247 8253 8267 8506 8525
8536 8542 8556 8777 8802 8836 8857
.MSELC 942 954 963 970 1075 1087 1099 1126 1355 1364 1391 1403 1420 1427
1455 1748 1762 1776 1822 1978 2001 2071 2073 2079 2083 2089 2099 2106
2288 2301 2371 2373 2379 2383 2389 2399 2406 2856 2871 2882 2889 3181
3192 3199 3498 3509 3524 3821 3832 3847 4144 4155 4170 4468 4479 4494
4756 4767 4782 5043 5054 5069 5329 5340 5355 5618 5629 5644 6059 6070
6077 6379 6390 6405 6705 6716 6731 7033 7044 7059 7361 7372 7387 7653
7664 7679 7944 7955 7970 8234 8245 8260 8523 8534 8549 8800 8811 8829
.MSELE 614 829 958 1111 1113 1117 1119 1357 1374 1376 1380 1382 1429 1436
1443 1786 1788 1792 1794 1801 1983 1985 1991 1993 2011 2013 2017 2019
2271 2273 2279 2311 2313 2317 2319 2486 2599 2904 2906 2910 2912 3214
3216 3220 3222 3539 3541 3545 3547 3862 3864 3868 3870 4185 4187 4191
4193 4509 4511 4515 4517 4797 4799 4803 4805 5084 5086 5090 5092 5370
5372 5376 5378 5659 5661 5665 5667 5779 6092 6094 6098 6100 6420 6422
6426 6428 6746 6748 6752 6754 7074 7076 7080 7082 7402 7404 7408 7410
7694 7696 7700 7702 7985 7987 7991 7993 8275 8277 8281 8283 8564 8566
8570 8572 8818 8822 8844 8846 8850 8852 8865 8867 8871 8873
.MSELF 610 1070 1760 2286 2593 3166 3483 3806 4129 4453 4741 5028 5314 5603
5773 6040 6055 6057 6360 6375 6377 6686 6701 6703 7014 7029 7031 7342
7357 7359 7634 7649 7651 7925 7940 7942 8215 8230 8232 8504 8519 8521 SEQ 1857
8761 8763 8765 8767 8769 8771 8773 8775 8796 8798
.MSELM 612 823 827 956 972 1128 1405 1450 1457 1817 1824 1980 2069 2081
2091 2108 2369 2381 2391 2408 2484 2595 2858 2873 2880 2891 3168 3183
3190 3201 3485 3500 3507 3515 3526 3808 3823 3830 3838 3849 4131 4146
4153 4161 4172 4455 4470 4477 4485 4496 4743 4758 4765 4773 4784 5030
5045 5052 5060 5071 5316 5331 5338 5346 5357 5605 5620 5627 5635 5646
5775 6042 6061 6068 6079 6362 6381 6388 6396 6407 6688 6707 6714 6722
6733 7016 7035 7042 7050 7061 7344 7363 7370 7378 7389 7636 7655 7662
7670 7681 7927 7946 7953 7961 7972 8217 8236 8243 8251 8262 8506 8525
8532 8540 8551 8777 8802 8809 8831
.MSELP 825 3517 3840 4163 4487 4775 5062 5348 5637 6398 6724 7052 7380 7672
7963 8253 8542
.MSKCN 1107 1370 1585 1587 1589 1591 1677 1692 1705 1707 1709 1711 1782 2007
2095 2307 2395 3511 3834 4157 4481 4769 5056 5342 5631 6392 6718 7046
7374 7666 7957 8247 8536
.MSMIN 1764 8779
.MXNOR 274 741 1065 1407 1429
.MXOR 1342
.RA 274 281 288 297 306 315 324 333 342 351 360 369 378 387
396 405 414 423 432 441 450 459 468 477 486 495 504 513
522 531 540 549 558 567 576 585 594 596 598 608 610 614
741 748 755 764 773 782 791 800 809 821 823 829 1111 1117
1119 1331 1333 1335 1342 1357 1374 1380 1382 1429 1436 1443 1739 1741
1743 1760 1786 1792 1794 1801 1983 1991 2011 2017 2019 2071 2093 2271
2311 2317 2319 2371 2393 2902 2904 2910 2912 3212 3214 3220 3222 3537
3539 3545 3547 3860 3862 3868 3870 4183 4185 4191 4193 4507 4509 4515
4517 4795 4797 4803 4805 5082 5084 5090 5092 5368 5370 5376 5378 5657
5659 5665 5667 6090 6092 6098 6100 6418 6420 6426 6428 6744 6746 6752
6754 7072 7074 7080 7082 7400 7402 7408 7410 7692 7694 7700 7702 7983
7985 7991 7993 8273 8275 8281 8283 8562 8564 8570 8572 8779 8804 8818
8822 8842 8844 8850 8852 8863 8865 8871 8873
.RAND 272 279 286 295 304 313 322 331 340 349 358 367 376 385
394 403 412 421 430 439 448 457 466 475 484 493 502 511
520 529 538 547 556 565 574 583 592 603 739 746 753 762
771 780 789 798 807 816 937 1061 1063 1333 1403 1409 1675 1690
2101 2268 2401 2896 3206 3531 3854 4177 4501 4789 5076 5362 5651 6084
6412 6738 7066 7394 7686 7977 8267 8556 8757 8836 8857
.RB 272 274 279 281 286 288 295 297 304 306 313 315 322 324
331 333 340 342 349 351 358 360 367 369 376 378 385 387
394 396 403 405 412 414 421 423 430 432 439 441 448 450
457 459 466 468 475 477 484 486 493 495 502 504 511 513
520 522 529 531 538 540 547 549 556 558 565 567 574 576
583 585 592 594 596 598 603 608 612 739 741 746 748 753
755 762 764 771 773 780 782 789 791 798 800 807 809 816
821 827 1107 1109 1331 1333 1335 1342 1346 1348 1370 1372 1403 1405
1407 1409 1587 1589 1591 1675 1677 1679 1683 1690 1692 1694 1698 1707
1709 1711 1715 1719 1723 1727 1731 1735 1737 1739 1741 1743 1762 1764
1782 1784 1980 1983 1985 1993 2007 2009 2071 2091 2093 2095 2097 2101
2268 2271 2273 2279 2286 2291 2307 2309 2371 2391 2393 2395 2397 2401
2858 2873 2896 2898 2902 3168 3183 3206 3208 3212 3485 3500 3531 3533
3537 3808 3823 3854 3856 3860 4131 4146 4177 4179 4183 4455 4470 4501
4503 4507 4743 4758 4789 4791 4795 5030 5045 5076 5078 5082 5316 5331
5362 5364 5368 5605 5620 5651 5653 5657 6042 6061 6084 6086 6090 6362 SEQ 1858
6381 6412 6414 6418 6688 6707 6738 6740 6744 7016 7035 7066 7068 7072
7344 7363 7394 7396 7400 7636 7655 7686 7688 7692 7927 7946 7977 7979
7983 8217 8236 8267 8269 8273 8506 8525 8556 8558 8562 8757 8761 8777
8779 8802 8804 8836 8838 8842 8857 8859 8863
.RBAD 2601 5781
.RCCCA 947 1080 1092 1397 1754 1974 2085 2282 2385 2867 3177 3494 3817 4140
4464 4752 5039 5325 5614 6051 6371 6697 7025 7353 7645 7936 8226 8515
8792
.RCCCE 1411 1750
.RCCCP 1413 1752
.RCCER 1987 2275
.RCCFZ 1342 1764 2597 5777 8779
.RCCGC 1113 1376 1788 2013 2313 2906 3216 3541 3864 4187 4511 4799 5086 5372
5661 6094 6422 6748 7076 7404 7696 7987 8277 8566 8846 8867
.RCCLW 1407
.RCCMB 1348
.RCENA 947 1080 1092 1113 1342 1348 1376 1397 1407 1411 1413 1750 1752 1754
1764 1788 1974 1987 2013 2085 2275 2282 2313 2385 2597 2867 2906 3177
3216 3494 3541 3817 3864 4140 4187 4464 4511 4752 4799 5039 5086 5325
5372 5614 5661 5777 6051 6094 6371 6422 6697 6748 7025 7076 7353 7404
7645 7696 7936 7987 8226 8277 8515 8566 8779 8792 8846 8867
.RCJP 947 1080 1092 1113 1342 1348 1376 1397 1407 1411 1413 1750 1752 1754
1764 1788 1974 1987 2013 2085 2275 2282 2313 2385 2597 2867 2906 3177
3216 3494 3541 3817 3864 4140 4187 4464 4511 4752 4799 5039 5086 5325
5372 5614 5661 5777 6051 6094 6371 6422 6697 6748 7025 7076 7353 7404
7645 7696 7936 7987 8226 8277 8515 8566 8779 8792 8846 8867
.RCJS 1329 1340 1748 1993 2288
.RCONT 272 279 286 295 304 313 322 331 340 349 358 367 376 385
394 403 412 421 430 439 448 457 466 475 484 493 502 511
520 529 538 547 556 565 574 583 592 610 612 614 739 746
753 762 771 780 789 798 807 823 825 827 829 942 954 956
958 963 1070 1075 1087 1099 1111 1117 1119 1331 1333 1335 1346 1355
1357 1364 1374 1380 1382 1391 1401 1403 1405 1409 1420 1427 1429 1587
1589 1591 1707 1709 1711 1737 1739 1741 1743 1758 1760 1762 1776 1786
1792 1794 1978 1980 1983 1985 1991 2001 2011 2017 2019 2026 2028 2030
2032 2034 2036 2038 2040 2042 2044 2046 2048 2050 2052 2054 2056 2058
2060 2062 2089 2091 2093 2099 2271 2273 2279 2286 2301 2311 2317 2319
2326 2328 2330 2332 2334 2336 2338 2340 2342 2344 2346 2348 2350 2352
2354 2356 2358 2360 2362 2371 2389 2391 2393 2399 2595 2599 2856 2858
2871 2873 2896 2898 2904 2910 3166 3168 3181 3183 3206 3208 3214 3220
3483 3485 3498 3500 3509 3515 3531 3533 3539 3545 3806 3808 3821 3823
3832 3838 3854 3856 3862 3868 4129 4131 4144 4146 4155 4161 4177 4179
4185 4191 4453 4455 4468 4470 4479 4485 4501 4503 4509 4515 4741 4743
4756 4758 4767 4773 4789 4791 4797 4803 5028 5030 5043 5045 5054 5060
5076 5078 5084 5090 5314 5316 5329 5331 5340 5346 5362 5364 5370 5376
5603 5605 5618 5620 5629 5635 5651 5653 5659 5665 5775 5779 6040 6042
6055 6057 6059 6061 6084 6086 6092 6098 6360 6362 6375 6377 6379 6381
6390 6396 6412 6414 6420 6426 6686 6688 6701 6703 6705 6707 6716 6722
6738 6740 6746 6752 7014 7016 7029 7031 7033 7035 7044 7050 7066 7068
7074 7080 7342 7344 7357 7359 7361 7363 7372 7378 7394 7396 7402 7408
7634 7636 7649 7651 7653 7655 7664 7670 7686 7688 7694 7700 7925 7927
7940 7942 7944 7946 7955 7961 7977 7979 7985 7991 8215 8217 8230 8232
8234 8236 8245 8251 8267 8269 8275 8281 8504 8506 8519 8521 8523 8525 SEQ 1859
8534 8540 8556 8558 8564 8570 8761 8763 8765 8767 8769 8771 8773 8775
8777 8796 8798 8800 8802 8836 8838 8844 8850 8857 8859 8865 8871
.RCRTN 1415 1812 2064 2364
.RCRY 281 288 297 306 315 324 333 342 351 360 369 378 387 396
405 414 423 432 441 450 459 468 477 486 495 504 513 522
531 540 549 558 567 576 585 594 748 755 764 773 782 791
800 809 1335 1346 1762 1985 1993 2273 2291 2898 3208 3533 3856 4179
4503 4791 5078 5364 5653 6086 6414 6740 7068 7396 7688 7979 8269 8558
8761 8779 8838 8859
.RD 272 274 279 281 286 288 295 297 304 306 313 315 322 324
331 333 340 342 349 351 358 360 367 369 376 378 385 387
394 396 403 405 412 414 421 423 430 432 439 441 448 450
457 459 466 468 475 477 484 486 493 495 502 504 511 513
520 522 529 531 538 540 547 549 556 558 565 567 574 576
583 585 592 594 596 598 603 608 610 612 614 739 741 746
748 753 755 762 764 771 773 780 782 789 791 798 800 807
809 816 821 823 825 827 829 937 942 947 949 954 956 958
1061 1063 1065 1070 1075 1080 1082 1087 1092 1094 1107 1109 1111 1117
1119 1329 1331 1333 1335 1340 1342 1346 1348 1357 1370 1372 1374 1380
1382 1403 1405 1407 1409 1429 1436 1443 1585 1587 1589 1591 1675 1677
1679 1681 1683 1690 1692 1694 1696 1698 1705 1707 1709 1711 1713 1715
1717 1719 1721 1723 1725 1727 1729 1731 1733 1735 1737 1739 1741 1743
1760 1762 1764 1782 1784 1786 1792 1794 1801 1808 1810 1980 1983 1985
1991 1993 2007 2009 2011 2017 2019 2071 2091 2093 2095 2097 2101 2268
2271 2273 2279 2286 2288 2291 2307 2309 2311 2317 2319 2371 2391 2393
2395 2397 2401 2484 2486 2593 2595 2597 2599 2854 2856 2858 2860 2867
2869 2871 2873 2882 2896 2898 2902 2904 2906 2908 2910 2912 3164 3166
3168 3170 3177 3179 3181 3183 3192 3206 3208 3212 3214 3216 3218 3220
3222 3481 3483 3485 3487 3494 3496 3498 3500 3509 3511 3513 3515 3517
3531 3533 3537 3539 3541 3543 3545 3547 3804 3806 3808 3810 3817 3819
3821 3823 3832 3834 3836 3838 3840 3854 3856 3860 3862 3864 3866 3868
3870 4127 4129 4131 4133 4140 4142 4144 4146 4155 4157 4159 4161 4163
4177 4179 4183 4185 4187 4189 4191 4193 4451 4453 4455 4457 4464 4466
4468 4470 4479 4481 4483 4485 4487 4501 4503 4507 4509 4511 4513 4515
4517 4739 4741 4743 4745 4752 4754 4756 4758 4767 4769 4771 4773 4775
4789 4791 4795 4797 4799 4801 4803 4805 5026 5028 5030 5032 5039 5041
5043 5045 5054 5056 5058 5060 5062 5076 5078 5082 5084 5086 5088 5090
5092 5312 5314 5316 5318 5325 5327 5329 5331 5340 5342 5344 5346 5348
5362 5364 5368 5370 5372 5374 5376 5378 5601 5603 5605 5607 5614 5616
5618 5620 5629 5631 5633 5635 5637 5651 5653 5657 5659 5661 5663 5665
5667 5773 5775 5777 5779 6038 6040 6042 6044 6051 6053 6055 6057 6059
6061 6070 6084 6086 6090 6092 6094 6096 6098 6100 6358 6360 6362 6364
6371 6373 6375 6377 6379 6381 6390 6392 6394 6396 6398 6412 6414 6418
6420 6422 6424 6426 6428 6684 6686 6688 6690 6697 6699 6701 6703 6705
6707 6716 6718 6720 6722 6724 6738 6740 6744 6746 6748 6750 6752 6754
7012 7014 7016 7018 7025 7027 7029 7031 7033 7035 7044 7046 7048 7050
7052 7066 7068 7072 7074 7076 7078 7080 7082 7340 7342 7344 7346 7353
7355 7357 7359 7361 7363 7372 7374 7376 7378 7380 7394 7396 7400 7402
7404 7406 7408 7410 7632 7634 7636 7638 7645 7647 7649 7651 7653 7655
7664 7666 7668 7670 7672 7686 7688 7692 7694 7696 7698 7700 7702 7923
7925 7927 7929 7936 7938 7940 7942 7944 7946 7955 7957 7959 7961 7963
7977 7979 7983 7985 7987 7989 7991 7993 8213 8215 8217 8219 8226 8228
8230 8232 8234 8236 8245 8247 8249 8251 8253 8267 8269 8273 8275 8277 SEQ 1860
8279 8281 8283 8502 8504 8506 8508 8515 8517 8519 8521 8523 8525 8534
8536 8538 8540 8542 8556 8558 8562 8564 8566 8568 8570 8572 8757 8761
8777 8779 8781 8785 8792 8794 8796 8798 8800 8802 8804 8811 8818 8822
8836 8838 8842 8844 8846 8848 8850 8852 8857 8859 8863 8865 8867 8869
8871 8873
.RJ 193 195 197 199 201 203 205 207 209 211 213 215 217 219
221 223 225 227 229 231 233 235 237 239 241 243 245 247
249 251 253 255 257 259 261 263 265 267 274 281 288 290
297 299 306 308 315 317 324 326 333 335 342 344 351 353
360 362 369 371 378 380 387 389 396 398 405 407 414 416
423 425 432 434 441 443 450 452 459 461 468 470 477 479
486 488 495 497 504 506 513 515 522 524 531 533 540 542
549 551 558 560 567 569 576 578 585 587 594 596 598 603
608 616 716 718 720 722 724 726 728 730 732 734 741 748
755 757 764 766 773 775 782 784 791 793 800 802 809 811
816 821 831 937 947 949 965 970 972 1061 1063 1065 1080 1082
1092 1094 1101 1107 1109 1113 1115 1121 1126 1128 1329 1340 1342 1344
1348 1350 1359 1370 1372 1376 1378 1384 1393 1395 1397 1399 1407 1411
1413 1422 1431 1436 1438 1443 1445 1455 1457 1585 1675 1677 1679 1681
1683 1690 1692 1694 1696 1698 1705 1713 1715 1717 1719 1721 1723 1725
1727 1729 1731 1733 1735 1748 1750 1752 1754 1756 1764 1766 1772 1774
1782 1784 1788 1790 1796 1801 1803 1808 1810 1822 1824 1974 1987 1989
1993 1996 2007 2009 2013 2015 2021 2069 2071 2079 2081 2083 2085 2087
2095 2097 2101 2106 2108 2268 2275 2277 2282 2284 2288 2291 2297 2299
2307 2309 2313 2315 2321 2369 2379 2381 2383 2385 2387 2395 2397 2401
2406 2408 2484 2486 2593 2597 2601 2854 2860 2865 2867 2869 2880 2889
2900 2902 2906 2908 2912 3164 3170 3175 3177 3179 3190 3199 3210 3212
3216 3218 3222 3481 3487 3492 3494 3496 3507 3511 3513 3524 3535 3537
3541 3543 3547 3804 3810 3815 3817 3819 3830 3834 3836 3847 3858 3860
3864 3866 3870 4127 4133 4138 4140 4142 4153 4157 4159 4170 4181 4183
4187 4189 4193 4451 4457 4462 4464 4466 4477 4481 4483 4494 4505 4507
4511 4513 4517 4739 4745 4750 4752 4754 4765 4769 4771 4782 4793 4795
4799 4801 4805 5026 5032 5037 5039 5041 5052 5056 5058 5069 5080 5082
5086 5088 5092 5312 5318 5323 5325 5327 5338 5342 5344 5355 5366 5368
5372 5374 5378 5601 5607 5612 5614 5616 5627 5631 5633 5644 5655 5657
5661 5663 5667 5773 5777 5781 6038 6044 6049 6051 6053 6068 6077 6088
6090 6094 6096 6100 6358 6364 6369 6371 6373 6388 6392 6394 6405 6416
6418 6422 6424 6428 6684 6690 6695 6697 6699 6714 6718 6720 6731 6742
6744 6748 6750 6754 7012 7018 7023 7025 7027 7042 7046 7048 7059 7070
7072 7076 7078 7082 7340 7346 7351 7353 7355 7370 7374 7376 7387 7398
7400 7404 7406 7410 7632 7638 7643 7645 7647 7662 7666 7668 7679 7690
7692 7696 7698 7702 7923 7929 7934 7936 7938 7953 7957 7959 7970 7981
7983 7987 7989 7993 8213 8219 8224 8226 8228 8243 8247 8249 8260 8271
8273 8277 8279 8283 8502 8508 8513 8515 8517 8532 8536 8538 8549 8560
8562 8566 8568 8572 8757 8759 8779 8781 8783 8785 8790 8792 8794 8809
8818 8820 8822 8824 8829 8840 8842 8846 8848 8852 8861 8863 8867 8869
8873
.RJMAP 193 195 197 199 201 203 205 207 209 211 213 215 217 219
221 223 225 227 229 231 233 235 237 239 241 243 245 247
249 251 253 255 257 259 261 263 265 267 274 281 290 299
308 317 326 335 344 353 362 371 380 389 398 407 416 425
434 443 452 461 470 479 488 497 506 515 524 533 542 551
560 569 578 587 598 603 616 716 718 720 722 724 726 728 SEQ 1861
730 732 734 741 748 757 766 775 784 793 802 811 816 831
937 949 965 970 972 1061 1063 1065 1082 1094 1101 1115 1121 1126
1128 1344 1350 1359 1378 1384 1399 1422 1431 1436 1438 1443 1445 1455
1457 1585 1675 1690 1705 1756 1766 1790 1796 1801 1803 1822 1824 1989
2015 2021 2069 2079 2081 2083 2087 2101 2106 2108 2277 2284 2315 2321
2369 2379 2381 2383 2387 2401 2406 2408 2484 2486 2593 2601 2854 2860
2865 2869 2880 2889 2908 2912 3164 3170 3175 3179 3190 3199 3218 3222
3481 3487 3492 3496 3507 3524 3543 3547 3804 3810 3815 3819 3830 3847
3866 3870 4127 4133 4138 4142 4153 4170 4189 4193 4451 4457 4462 4466
4477 4494 4513 4517 4739 4745 4750 4754 4765 4782 4801 4805 5026 5032
5037 5041 5052 5069 5088 5092 5312 5318 5323 5327 5338 5355 5374 5378
5601 5607 5612 5616 5627 5644 5663 5667 5773 5781 6038 6044 6049 6053
6068 6077 6096 6100 6358 6364 6369 6373 6388 6405 6424 6428 6684 6690
6695 6699 6714 6731 6750 6754 7012 7018 7023 7027 7042 7059 7078 7082
7340 7346 7351 7355 7370 7387 7406 7410 7632 7638 7643 7647 7662 7679
7698 7702 7923 7929 7934 7938 7953 7970 7989 7993 8213 8219 8224 8228
8243 8260 8279 8283 8502 8508 8513 8517 8532 8549 8568 8572 8757 8781
8785 8790 8794 8809 8818 8820 8822 8824 8829 8848 8852 8869 8873
.RJZ 1450 1685 1700 1817 1976 2073 2373 2875 2882 2884 2891 3185 3192 3194
3201 3502 3517 3519 3526 3825 3840 3842 3849 4148 4163 4165 4172 4472
4487 4489 4496 4760 4775 4777 4784 5047 5062 5064 5071 5333 5348 5350
5357 5622 5637 5639 5646 6063 6070 6072 6079 6383 6398 6400 6407 6709
6724 6726 6733 7037 7052 7054 7061 7365 7380 7382 7389 7657 7672 7674
7681 7948 7963 7965 7972 8238 8253 8255 8262 8527 8542 8544 8551 8804
8811 8813 8831
.RLDCT 288 297 306 315 324 333 342 351 360 369 378 387 396 405
414 423 432 441 450 459 468 477 486 495 504 513 522 531
540 549 558 567 576 585 594 755 764 773 782 791 800 809
1107 1370 1393 1677 1681 1692 1696 1713 1717 1721 1725 1729 1733 1772
1782 1808 2007 2071 2095 2268 2297 2307 2395 2900 3210 3511 3535 3834
3858 4157 4181 4481 4505 4769 4793 5056 5080 5342 5366 5631 5655 6088
6392 6416 6718 6742 7046 7070 7374 7398 7666 7690 7957 7981 8247 8271
8536 8560 8759 8840 8861
.RMGC 610 612 614 823 825 827 829 942 954 956 958 963 970 972
1070 1075 1087 1099 1107 1111 1113 1117 1119 1126 1128 1355 1357 1364
1370 1374 1376 1380 1382 1391 1403 1405 1420 1427 1429 1436 1443 1450
1455 1457 1585 1587 1589 1591 1677 1692 1705 1707 1709 1711 1748 1760
1762 1776 1782 1786 1788 1792 1794 1801 1817 1822 1824 1978 1980 1983
1985 1991 1993 2001 2007 2011 2013 2017 2019 2069 2071 2073 2079 2081
2083 2089 2091 2095 2099 2106 2108 2271 2273 2279 2286 2288 2301 2307
2311 2313 2317 2319 2369 2371 2373 2379 2381 2383 2389 2391 2395 2399
2406 2408 2484 2486 2593 2595 2599 2856 2858 2871 2873 2880 2882 2889
2891 2904 2906 2910 2912 3166 3168 3181 3183 3190 3192 3199 3201 3214
3216 3220 3222 3483 3485 3498 3500 3507 3509 3511 3515 3517 3524 3526
3539 3541 3545 3547 3806 3808 3821 3823 3830 3832 3834 3838 3840 3847
3849 3862 3864 3868 3870 4129 4131 4144 4146 4153 4155 4157 4161 4163
4170 4172 4185 4187 4191 4193 4453 4455 4468 4470 4477 4479 4481 4485
4487 4494 4496 4509 4511 4515 4517 4741 4743 4756 4758 4765 4767 4769
4773 4775 4782 4784 4797 4799 4803 4805 5028 5030 5043 5045 5052 5054
5056 5060 5062 5069 5071 5084 5086 5090 5092 5314 5316 5329 5331 5338
5340 5342 5346 5348 5355 5357 5370 5372 5376 5378 5603 5605 5618 5620
5627 5629 5631 5635 5637 5644 5646 5659 5661 5665 5667 5773 5775 5779
6040 6042 6055 6057 6059 6061 6068 6070 6077 6079 6092 6094 6098 6100 SEQ 1862
6360 6362 6375 6377 6379 6381 6388 6390 6392 6396 6398 6405 6407 6420
6422 6426 6428 6686 6688 6701 6703 6705 6707 6714 6716 6718 6722 6724
6731 6733 6746 6748 6752 6754 7014 7016 7029 7031 7033 7035 7042 7044
7046 7050 7052 7059 7061 7074 7076 7080 7082 7342 7344 7357 7359 7361
7363 7370 7372 7374 7378 7380 7387 7389 7402 7404 7408 7410 7634 7636
7649 7651 7653 7655 7662 7664 7666 7670 7672 7679 7681 7694 7696 7700
7702 7925 7927 7940 7942 7944 7946 7953 7955 7957 7961 7963 7970 7972
7985 7987 7991 7993 8215 8217 8230 8232 8234 8236 8243 8245 8247 8251
8253 8260 8262 8275 8277 8281 8283 8504 8506 8519 8521 8523 8525 8532
8534 8536 8540 8542 8549 8551 8564 8566 8570 8572 8761 8763 8765 8767
8769 8771 8773 8775 8777 8796 8798 8800 8802 8809 8811 8818 8822 8829
8831 8844 8846 8850 8852 8865 8867 8871 8873
.ROENA 610 614 823 829 958 1070 1111 1119 1357 1374 1382 1429 1436 1443
1760 1786 1794 1801 1983 1991 2011 2019 2271 2286 2311 2319 2486 2599
2904 2912 3214 3222 3515 3539 3547 3838 3862 3870 4161 4185 4193 4485
4509 4517 4773 4797 4805 5060 5084 5092 5346 5370 5378 5635 5659 5667
5779 6092 6100 6396 6420 6428 6722 6746 6754 7050 7074 7082 7378 7402
7410 7670 7694 7702 7961 7985 7993 8251 8275 8283 8540 8564 8572 8818
8822 8844 8852 8865 8873
.ROR 823 827 956 958 1107 1109 1111 1117 1119 1331 1348 1357 1370 1372
1374 1380 1382 1405 1436 1443 1585 1587 1589 1591 1677 1679 1683 1692
1694 1698 1705 1707 1709 1711 1715 1719 1723 1727 1731 1735 1737 1739
1741 1743 1782 1784 1786 1792 1794 1801 1980 1983 1991 2007 2009 2011
2017 2019 2071 2091 2093 2095 2097 2271 2279 2286 2307 2309 2311 2317
2319 2371 2391 2393 2395 2397 2484 2486 2595 2597 2599 2858 2873 2904
2910 2912 3168 3183 3214 3220 3222 3485 3500 3511 3513 3515 3539 3545
3547 3808 3823 3834 3836 3838 3862 3868 3870 4131 4146 4157 4159 4161
4185 4191 4193 4455 4470 4481 4483 4485 4509 4515 4517 4743 4758 4769
4771 4773 4797 4803 4805 5030 5045 5056 5058 5060 5084 5090 5092 5316
5331 5342 5344 5346 5370 5376 5378 5605 5620 5631 5633 5635 5659 5665
5667 5775 5777 5779 6042 6061 6092 6098 6100 6362 6381 6392 6394 6396
6420 6426 6428 6688 6707 6718 6720 6722 6746 6752 6754 7016 7035 7046
7048 7050 7074 7080 7082 7344 7363 7374 7376 7378 7402 7408 7410 7636
7655 7666 7668 7670 7694 7700 7702 7927 7946 7957 7959 7961 7985 7991
7993 8217 8236 8247 8249 8251 8275 8281 8283 8506 8525 8536 8538 8540
8564 8570 8572 8777 8802 8804 8818 8822 8844 8850 8852 8865 8871 8873
.RPLUS 281 288 297 306 315 324 333 342 351 360 369 378 387 396
405 414 423 432 441 450 459 468 477 486 495 504 513 522
531 540 549 558 567 576 585 594 596 608 748 755 764 773
782 791 800 809 821 1335 1346 1762 1985 1993 2273 2291 2898 2902
3208 3212 3533 3537 3856 3860 4179 4183 4503 4507 4791 4795 5078 5082
5364 5368 5653 5657 6086 6090 6414 6418 6740 6744 7068 7072 7396 7400
7688 7692 7979 7983 8269 8273 8558 8562 8761 8838 8842 8859 8863
.RRPCT 596 608 821 1109 1372 1395 1679 1683 1694 1698 1715 1719 1723 1727
1731 1735 1774 1784 1810 1996 2009 2097 2291 2299 2309 2397 2902 3212
3513 3537 3836 3860 4159 4183 4483 4507 4771 4795 5058 5082 5344 5368
5633 5657 6090 6394 6418 6720 6744 7048 7072 7376 7400 7668 7692 7959
7983 8249 8273 8538 8562 8783 8842 8863
.RS0A 610 614 823 829 958 1070 1111 1117 1119 1331 1333 1335 1357 1374
1380 1382 1429 1436 1443 1737 1760 1786 1792 1794 1801 1991 2011 2017
2019 2071 2093 2311 2317 2319 2371 2393 2486 2593 2597 2599 2904 2910
2912 3214 3220 3222 3513 3515 3539 3545 3547 3836 3838 3862 3868 3870
4159 4161 4185 4191 4193 4483 4485 4509 4515 4517 4771 4773 4797 4803 SEQ 1863
4805 5058 5060 5084 5090 5092 5344 5346 5370 5376 5378 5633 5635 5659
5665 5667 5773 5777 5779 6092 6098 6100 6394 6396 6420 6426 6428 6720
6722 6746 6752 6754 7048 7050 7074 7080 7082 7376 7378 7402 7408 7410
7668 7670 7694 7700 7702 7959 7961 7985 7991 7993 8249 8251 8275 8281
8283 8538 8540 8564 8570 8572 8804 8818 8822 8844 8850 8852 8865 8871
8873
.RS0B 1109 1346 1348 1372 1403 1407 1409 1679 1683 1694 1698 1715 1719 1723
1727 1731 1735 1762 1764 1784 1985 1993 2009 2097 2101 2268 2273 2286
2291 2309 2397 2401 2898 3208 3533 3856 4179 4503 4791 5078 5364 5653
6086 6414 6740 7068 7396 7688 7979 8269 8558 8757 8761 8838 8859
.RSAB 274 281 288 297 306 315 324 333 342 351 360 369 378 387
396 405 414 423 432 441 450 459 468 477 486 495 504 513
522 531 540 549 558 567 576 585 594 596 598 608 741 748
755 764 773 782 791 800 809 821 1065 1342 1739 1741 1743 1983
2271 2902 3212 3537 3860 4183 4507 4795 5082 5368 5657 6090 6418 6744
7072 7400 7692 7983 8273 8562 8779 8842 8863
.RSD0 272 279 286 295 304 313 322 331 340 349 358 367 376 385
394 403 412 421 430 439 448 457 466 475 484 493 502 511
520 529 538 547 556 565 574 583 592 603 612 739 746 753
762 771 780 789 798 807 816 825 827 937 956 1061 1063 1107
1370 1405 1585 1587 1589 1591 1675 1677 1690 1692 1705 1707 1709 1711
1782 1980 2007 2091 2095 2279 2307 2391 2395 2484 2595 2858 2873 2896
3168 3183 3206 3485 3500 3511 3517 3531 3808 3823 3834 3840 3854 4131
4146 4157 4163 4177 4455 4470 4481 4487 4501 4743 4758 4769 4775 4789
5030 5045 5056 5062 5076 5316 5331 5342 5348 5362 5605 5620 5631 5637
5651 5775 6042 6061 6084 6362 6381 6392 6398 6412 6688 6707 6718 6724
6738 7016 7035 7046 7052 7066 7344 7363 7374 7380 7394 7636 7655 7666
7672 7686 7927 7946 7957 7963 7977 8217 8236 8247 8253 8267 8506 8525
8536 8542 8556 8777 8802 8836 8857
.RSELC 942 954 963 970 1075 1087 1099 1126 1355 1364 1391 1403 1420 1427
1455 1748 1762 1776 1822 1978 2001 2071 2073 2079 2083 2089 2099 2106
2288 2301 2371 2373 2379 2383 2389 2399 2406 2856 2871 2882 2889 3181
3192 3199 3498 3509 3524 3821 3832 3847 4144 4155 4170 4468 4479 4494
4756 4767 4782 5043 5054 5069 5329 5340 5355 5618 5629 5644 6059 6070
6077 6379 6390 6405 6705 6716 6731 7033 7044 7059 7361 7372 7387 7653
7664 7679 7944 7955 7970 8234 8245 8260 8523 8534 8549 8800 8811 8829
.RSELE 614 829 958 1111 1113 1117 1119 1357 1374 1376 1380 1382 1429 1436
1443 1786 1788 1792 1794 1801 1983 1985 1991 1993 2011 2013 2017 2019
2271 2273 2279 2311 2313 2317 2319 2486 2599 2904 2906 2910 2912 3214
3216 3220 3222 3539 3541 3545 3547 3862 3864 3868 3870 4185 4187 4191
4193 4509 4511 4515 4517 4797 4799 4803 4805 5084 5086 5090 5092 5370
5372 5376 5378 5659 5661 5665 5667 5779 6092 6094 6098 6100 6420 6422
6426 6428 6746 6748 6752 6754 7074 7076 7080 7082 7402 7404 7408 7410
7694 7696 7700 7702 7985 7987 7991 7993 8275 8277 8281 8283 8564 8566
8570 8572 8818 8822 8844 8846 8850 8852 8865 8867 8871 8873
.RSELF 610 1070 1760 2286 2593 3166 3483 3806 4129 4453 4741 5028 5314 5603
5773 6040 6055 6057 6360 6375 6377 6686 6701 6703 7014 7029 7031 7342
7357 7359 7634 7649 7651 7925 7940 7942 8215 8230 8232 8504 8519 8521
8761 8763 8765 8767 8769 8771 8773 8775 8796 8798
.RSELM 612 823 827 956 972 1128 1405 1450 1457 1817 1824 1980 2069 2081
2091 2108 2369 2381 2391 2408 2484 2595 2858 2873 2880 2891 3168 3183
3190 3201 3485 3500 3507 3515 3526 3808 3823 3830 3838 3849 4131 4146
4153 4161 4172 4455 4470 4477 4485 4496 4743 4758 4765 4773 4784 5030 SEQ 1864
5045 5052 5060 5071 5316 5331 5338 5346 5357 5605 5620 5627 5635 5646
5775 6042 6061 6068 6079 6362 6381 6388 6396 6407 6688 6707 6714 6722
6733 7016 7035 7042 7050 7061 7344 7363 7370 7378 7389 7636 7655 7662
7670 7681 7927 7946 7953 7961 7972 8217 8236 8243 8251 8262 8506 8525
8532 8540 8551 8777 8802 8809 8831
.RSELP 825 3517 3840 4163 4487 4775 5062 5348 5637 6398 6724 7052 7380 7672
7963 8253 8542
.RSKCN 1107 1370 1585 1587 1589 1591 1677 1692 1705 1707 1709 1711 1782 2007
2095 2307 2395 3511 3834 4157 4481 4769 5056 5342 5631 6392 6718 7046
7374 7666 7957 8247 8536
.RSMIN 1764 8779
.RXNOR 274 741 1065 1407 1429
.RXOR 1342
ATABLE 108 110 112 114 116 118 120 122 124 126 128 130 132 134
136 138 140 142 144 146 148 150 152 154 156 158 160 162 SEQ 1865
164 166 168 170 172 174 176 178 180 182 184 687 689 691
693 695 697 699 701 703 705 707 2473 2475
CALC 193 195 197 199 201 203 205 207 209 211 213 215 217 219
221 223 225 227 229 231 233 235 237 239 241 243 245 247
249 251 253 255 257 259 261 263 265 267 272 274 279 281
286 288 290 295 297 299 304 306 308 313 315 317 322 324
326 331 333 335 340 342 344 349 351 353 358 360 362 367
369 371 376 378 380 385 387 389 394 396 398 403 405 407
412 414 416 421 423 425 430 432 434 439 441 443 448 450
452 457 459 461 466 468 470 475 477 479 484 486 488 493
495 497 502 504 506 511 513 515 520 522 524 529 531 533
538 540 542 547 549 551 556 558 560 565 567 569 574 576
578 583 585 587 592 594 596 598 603 608 610 612 614 616
716 718 720 722 724 726 728 730 732 734 739 741 746 748
753 755 757 762 764 766 771 773 775 780 782 784 789 791
793 798 800 802 807 809 811 816 821 823 825 827 829 831
937 942 947 949 954 956 958 963 965 970 972 1061 1063 1065
1070 1075 1080 1082 1087 1092 1094 1099 1101 1107 1109 1111 1113 1115
1117 1119 1121 1126 1128 1329 1331 1333 1335 1340 1342 1344 1346 1348
1350 1355 1357 1359 1364 1370 1372 1374 1376 1378 1380 1382 1384 1391
1393 1395 1397 1399 1401 1403 1405 1407 1409 1411 1413 1415 1420 1422
1427 1429 1431 1436 1438 1443 1445 1450 1455 1457 1585 1587 1589 1591
1675 1677 1679 1681 1683 1685 1690 1692 1694 1696 1698 1700 1705 1707
1709 1711 1713 1715 1717 1719 1721 1723 1725 1727 1729 1731 1733 1735
1737 1739 1741 1743 1748 1750 1752 1754 1756 1758 1760 1762 1764 1766
1772 1774 1776 1782 1784 1786 1788 1790 1792 1794 1796 1801 1803 1808
1810 1812 1817 1822 1824 1974 1976 1978 1980 1983 1985 1987 1989 1991
1993 1996 2001 2007 2009 2011 2013 2015 2017 2019 2021 2026 2028 2030
2032 2034 2036 2038 2040 2042 2044 2046 2048 2050 2052 2054 2056 2058
2060 2062 2064 2069 2071 2073 2079 2081 2083 2085 2087 2089 2091 2093
2095 2097 2099 2101 2106 2108 2268 2271 2273 2275 2277 2279 2282 2284
2286 2288 2291 2297 2299 2301 2307 2309 2311 2313 2315 2317 2319 2321
2326 2328 2330 2332 2334 2336 2338 2340 2342 2344 2346 2348 2350 2352
2354 2356 2358 2360 2362 2364 2369 2371 2373 2379 2381 2383 2385 2387
2389 2391 2393 2395 2397 2399 2401 2406 2408 2484 2486 2593 2595 2597
2599 2601 2854 2856 2858 2860 2865 2867 2869 2871 2873 2875 2880 2882
2884 2889 2891 2896 2898 2900 2902 2904 2906 2908 2910 2912 3164 3166
3168 3170 3175 3177 3179 3181 3183 3185 3190 3192 3194 3199 3201 3206
3208 3210 3212 3214 3216 3218 3220 3222 3481 3483 3485 3487 3492 3494
3496 3498 3500 3502 3507 3509 3511 3513 3515 3517 3519 3524 3526 3531
3533 3535 3537 3539 3541 3543 3545 3547 3804 3806 3808 3810 3815 3817
3819 3821 3823 3825 3830 3832 3834 3836 3838 3840 3842 3847 3849 3854
3856 3858 3860 3862 3864 3866 3868 3870 4127 4129 4131 4133 4138 4140
4142 4144 4146 4148 4153 4155 4157 4159 4161 4163 4165 4170 4172 4177
4179 4181 4183 4185 4187 4189 4191 4193 4451 4453 4455 4457 4462 4464
4466 4468 4470 4472 4477 4479 4481 4483 4485 4487 4489 4494 4496 4501
4503 4505 4507 4509 4511 4513 4515 4517 4739 4741 4743 4745 4750 4752
4754 4756 4758 4760 4765 4767 4769 4771 4773 4775 4777 4782 4784 4789
4791 4793 4795 4797 4799 4801 4803 4805 5026 5028 5030 5032 5037 5039
5041 5043 5045 5047 5052 5054 5056 5058 5060 5062 5064 5069 5071 5076
5078 5080 5082 5084 5086 5088 5090 5092 5312 5314 5316 5318 5323 5325
5327 5329 5331 5333 5338 5340 5342 5344 5346 5348 5350 5355 5357 5362
5364 5366 5368 5370 5372 5374 5376 5378 5601 5603 5605 5607 5612 5614 SEQ 1866
5616 5618 5620 5622 5627 5629 5631 5633 5635 5637 5639 5644 5646 5651
5653 5655 5657 5659 5661 5663 5665 5667 5773 5775 5777 5779 5781 6038
6040 6042 6044 6049 6051 6053 6055 6057 6059 6061 6063 6068 6070 6072
6077 6079 6084 6086 6088 6090 6092 6094 6096 6098 6100 6358 6360 6362
6364 6369 6371 6373 6375 6377 6379 6381 6383 6388 6390 6392 6394 6396
6398 6400 6405 6407 6412 6414 6416 6418 6420 6422 6424 6426 6428 6684
6686 6688 6690 6695 6697 6699 6701 6703 6705 6707 6709 6714 6716 6718
6720 6722 6724 6726 6731 6733 6738 6740 6742 6744 6746 6748 6750 6752
6754 7012 7014 7016 7018 7023 7025 7027 7029 7031 7033 7035 7037 7042
7044 7046 7048 7050 7052 7054 7059 7061 7066 7068 7070 7072 7074 7076
7078 7080 7082 7340 7342 7344 7346 7351 7353 7355 7357 7359 7361 7363
7365 7370 7372 7374 7376 7378 7380 7382 7387 7389 7394 7396 7398 7400
7402 7404 7406 7408 7410 7632 7634 7636 7638 7643 7645 7647 7649 7651
7653 7655 7657 7662 7664 7666 7668 7670 7672 7674 7679 7681 7686 7688
7690 7692 7694 7696 7698 7700 7702 7923 7925 7927 7929 7934 7936 7938
7940 7942 7944 7946 7948 7953 7955 7957 7959 7961 7963 7965 7970 7972
7977 7979 7981 7983 7985 7987 7989 7991 7993 8213 8215 8217 8219 8224
8226 8228 8230 8232 8234 8236 8238 8243 8245 8247 8249 8251 8253 8255
8260 8262 8267 8269 8271 8273 8275 8277 8279 8281 8283 8502 8504 8506
8508 8513 8515 8517 8519 8521 8523 8525 8527 8532 8534 8536 8538 8540
8542 8544 8549 8551 8556 8558 8560 8562 8564 8566 8568 8570 8572 8757
8759 8761 8763 8765 8767 8769 8771 8773 8775 8777 8779 8781 8783 8785
8790 8792 8794 8796 8798 8800 8802 8804 8809 8811 8813 8818 8820 8822
8824 8829 8831 8836 8838 8840 8842 8844 8846 8848 8850 8852 8857 8859
8861 8863 8865 8867 8869 8871 8873
CONCAT 193 195 197 199 201 203 205 207 209 211 213 215 217 219
221 223 225 227 229 231 233 235 237 239 241 243 245 247
249 251 253 255 257 259 261 263 265 267 272 274 279 281
286 288 290 295 297 299 304 306 308 313 315 317 322 324
326 331 333 335 340 342 344 349 351 353 358 360 362 367
369 371 376 378 380 385 387 389 394 396 398 403 405 407
412 414 416 421 423 425 430 432 434 439 441 443 448 450
452 457 459 461 466 468 470 475 477 479 484 486 488 493
495 497 502 504 506 511 513 515 520 522 524 529 531 533
538 540 542 547 549 551 556 558 560 565 567 569 574 576
578 583 585 587 592 594 596 598 603 608 610 612 614 616
716 718 720 722 724 726 728 730 732 734 739 741 746 748
753 755 757 762 764 766 771 773 775 780 782 784 789 791
793 798 800 802 807 809 811 816 821 823 825 827 829 831
937 942 947 949 954 956 958 963 965 970 972 1061 1063 1065
1070 1075 1080 1082 1087 1092 1094 1099 1101 1107 1109 1111 1113 1115
1117 1119 1121 1126 1128 1329 1331 1333 1335 1340 1342 1344 1346 1348
1350 1355 1357 1359 1364 1370 1372 1374 1376 1378 1380 1382 1384 1391
1393 1395 1397 1399 1401 1403 1405 1407 1409 1411 1413 1415 1420 1422
1427 1429 1431 1436 1438 1443 1445 1450 1455 1457 1585 1587 1589 1591
1675 1677 1679 1681 1683 1685 1690 1692 1694 1696 1698 1700 1705 1707
1709 1711 1713 1715 1717 1719 1721 1723 1725 1727 1729 1731 1733 1735
1737 1739 1741 1743 1748 1750 1752 1754 1756 1758 1760 1762 1764 1766
1772 1774 1776 1782 1784 1786 1788 1790 1792 1794 1796 1801 1803 1808
1810 1812 1817 1822 1824 1974 1976 1978 1980 1983 1985 1987 1989 1991
1993 1996 2001 2007 2009 2011 2013 2015 2017 2019 2021 2026 2028 2030
2032 2034 2036 2038 2040 2042 2044 2046 2048 2050 2052 2054 2056 2058
2060 2062 2064 2069 2071 2073 2079 2081 2083 2085 2087 2089 2091 2093 SEQ 1867
2095 2097 2099 2101 2106 2108 2268 2271 2273 2275 2277 2279 2282 2284
2286 2288 2291 2297 2299 2301 2307 2309 2311 2313 2315 2317 2319 2321
2326 2328 2330 2332 2334 2336 2338 2340 2342 2344 2346 2348 2350 2352
2354 2356 2358 2360 2362 2364 2369 2371 2373 2379 2381 2383 2385 2387
2389 2391 2393 2395 2397 2399 2401 2406 2408 2484 2486 2593 2595 2597
2599 2601 2854 2856 2858 2860 2865 2867 2869 2871 2873 2875 2880 2882
2884 2889 2891 2896 2898 2900 2902 2904 2906 2908 2910 2912 3164 3166
3168 3170 3175 3177 3179 3181 3183 3185 3190 3192 3194 3199 3201 3206
3208 3210 3212 3214 3216 3218 3220 3222 3481 3483 3485 3487 3492 3494
3496 3498 3500 3502 3507 3509 3511 3513 3515 3517 3519 3524 3526 3531
3533 3535 3537 3539 3541 3543 3545 3547 3804 3806 3808 3810 3815 3817
3819 3821 3823 3825 3830 3832 3834 3836 3838 3840 3842 3847 3849 3854
3856 3858 3860 3862 3864 3866 3868 3870 4127 4129 4131 4133 4138 4140
4142 4144 4146 4148 4153 4155 4157 4159 4161 4163 4165 4170 4172 4177
4179 4181 4183 4185 4187 4189 4191 4193 4451 4453 4455 4457 4462 4464
4466 4468 4470 4472 4477 4479 4481 4483 4485 4487 4489 4494 4496 4501
4503 4505 4507 4509 4511 4513 4515 4517 4739 4741 4743 4745 4750 4752
4754 4756 4758 4760 4765 4767 4769 4771 4773 4775 4777 4782 4784 4789
4791 4793 4795 4797 4799 4801 4803 4805 5026 5028 5030 5032 5037 5039
5041 5043 5045 5047 5052 5054 5056 5058 5060 5062 5064 5069 5071 5076
5078 5080 5082 5084 5086 5088 5090 5092 5312 5314 5316 5318 5323 5325
5327 5329 5331 5333 5338 5340 5342 5344 5346 5348 5350 5355 5357 5362
5364 5366 5368 5370 5372 5374 5376 5378 5601 5603 5605 5607 5612 5614
5616 5618 5620 5622 5627 5629 5631 5633 5635 5637 5639 5644 5646 5651
5653 5655 5657 5659 5661 5663 5665 5667 5773 5775 5777 5779 5781 6038
6040 6042 6044 6049 6051 6053 6055 6057 6059 6061 6063 6068 6070 6072
6077 6079 6084 6086 6088 6090 6092 6094 6096 6098 6100 6358 6360 6362
6364 6369 6371 6373 6375 6377 6379 6381 6383 6388 6390 6392 6394 6396
6398 6400 6405 6407 6412 6414 6416 6418 6420 6422 6424 6426 6428 6684
6686 6688 6690 6695 6697 6699 6701 6703 6705 6707 6709 6714 6716 6718
6720 6722 6724 6726 6731 6733 6738 6740 6742 6744 6746 6748 6750 6752
6754 7012 7014 7016 7018 7023 7025 7027 7029 7031 7033 7035 7037 7042
7044 7046 7048 7050 7052 7054 7059 7061 7066 7068 7070 7072 7074 7076
7078 7080 7082 7340 7342 7344 7346 7351 7353 7355 7357 7359 7361 7363
7365 7370 7372 7374 7376 7378 7380 7382 7387 7389 7394 7396 7398 7400
7402 7404 7406 7408 7410 7632 7634 7636 7638 7643 7645 7647 7649 7651
7653 7655 7657 7662 7664 7666 7668 7670 7672 7674 7679 7681 7686 7688
7690 7692 7694 7696 7698 7700 7702 7923 7925 7927 7929 7934 7936 7938
7940 7942 7944 7946 7948 7953 7955 7957 7959 7961 7963 7965 7970 7972
7977 7979 7981 7983 7985 7987 7989 7991 7993 8213 8215 8217 8219 8224
8226 8228 8230 8232 8234 8236 8238 8243 8245 8247 8249 8251 8253 8255
8260 8262 8267 8269 8271 8273 8275 8277 8279 8281 8283 8502 8504 8506
8508 8513 8515 8517 8519 8521 8523 8525 8527 8532 8534 8536 8538 8540
8542 8544 8549 8551 8556 8558 8560 8562 8564 8566 8568 8570 8572 8757
8759 8761 8763 8765 8767 8769 8771 8773 8775 8777 8779 8781 8783 8785
8790 8792 8794 8796 8798 8800 8802 8804 8809 8811 8813 8818 8820 8822
8824 8829 8831 8836 8838 8840 8842 8844 8846 8848 8850 8852 8857 8859
8861 8863 8865 8867 8869 8871 8873
CTABLE 903 904 905 906 907 908 909 910 1045 1046 1047 1048 1049 1050
1051 1052 1213 1214 1215 1216 1217 1218 1219 1220 1533 1534 1535 1536
1537 1538 1539 1540 1934 1935 1936 1937 1938 1939 1940 1941 2217 2218
2219 2220 2221 2222 2223 2224 2225
FIELD 193 195 197 199 201 203 205 207 209 211 213 215 217 219 SEQ 1868
221 223 225 227 229 231 233 235 237 239 241 243 245 247
249 251 253 255 257 259 261 263 265 267 272 274 279 281
286 288 290 295 297 299 304 306 308 313 315 317 322 324
326 331 333 335 340 342 344 349 351 353 358 360 362 367
369 371 376 378 380 385 387 389 394 396 398 403 405 407
412 414 416 421 423 425 430 432 434 439 441 443 448 450
452 457 459 461 466 468 470 475 477 479 484 486 488 493
495 497 502 504 506 511 513 515 520 522 524 529 531 533
538 540 542 547 549 551 556 558 560 565 567 569 574 576
578 583 585 587 592 594 596 598 603 608 610 612 614 616
716 718 720 722 724 726 728 730 732 734 739 741 746 748
753 755 757 762 764 766 771 773 775 780 782 784 789 791
793 798 800 802 807 809 811 816 821 823 825 827 829 831
937 942 947 949 954 956 958 963 965 970 972 1061 1063 1065
1070 1075 1080 1082 1087 1092 1094 1099 1101 1107 1109 1111 1113 1115
1117 1119 1121 1126 1128 1329 1331 1333 1335 1340 1342 1344 1346 1348
1350 1355 1357 1359 1364 1370 1372 1374 1376 1378 1380 1382 1384 1391
1393 1395 1397 1399 1401 1403 1405 1407 1409 1411 1413 1415 1420 1422
1427 1429 1431 1436 1438 1443 1445 1450 1455 1457 1585 1587 1589 1591
1675 1677 1679 1681 1683 1685 1690 1692 1694 1696 1698 1700 1705 1707
1709 1711 1713 1715 1717 1719 1721 1723 1725 1727 1729 1731 1733 1735
1737 1739 1741 1743 1748 1750 1752 1754 1756 1758 1760 1762 1764 1766
1772 1774 1776 1782 1784 1786 1788 1790 1792 1794 1796 1801 1803 1808
1810 1812 1817 1822 1824 1974 1976 1978 1980 1983 1985 1987 1989 1991
1993 1996 2001 2007 2009 2011 2013 2015 2017 2019 2021 2026 2028 2030
2032 2034 2036 2038 2040 2042 2044 2046 2048 2050 2052 2054 2056 2058
2060 2062 2064 2069 2071 2073 2079 2081 2083 2085 2087 2089 2091 2093
2095 2097 2099 2101 2106 2108 2268 2271 2273 2275 2277 2279 2282 2284
2286 2288 2291 2297 2299 2301 2307 2309 2311 2313 2315 2317 2319 2321
2326 2328 2330 2332 2334 2336 2338 2340 2342 2344 2346 2348 2350 2352
2354 2356 2358 2360 2362 2364 2369 2371 2373 2379 2381 2383 2385 2387
2389 2391 2393 2395 2397 2399 2401 2406 2408 2484 2486 2593 2595 2597
2599 2601 2854 2856 2858 2860 2865 2867 2869 2871 2873 2875 2880 2882
2884 2889 2891 2896 2898 2900 2902 2904 2906 2908 2910 2912 3164 3166
3168 3170 3175 3177 3179 3181 3183 3185 3190 3192 3194 3199 3201 3206
3208 3210 3212 3214 3216 3218 3220 3222 3481 3483 3485 3487 3492 3494
3496 3498 3500 3502 3507 3509 3511 3513 3515 3517 3519 3524 3526 3531
3533 3535 3537 3539 3541 3543 3545 3547 3804 3806 3808 3810 3815 3817
3819 3821 3823 3825 3830 3832 3834 3836 3838 3840 3842 3847 3849 3854
3856 3858 3860 3862 3864 3866 3868 3870 4127 4129 4131 4133 4138 4140
4142 4144 4146 4148 4153 4155 4157 4159 4161 4163 4165 4170 4172 4177
4179 4181 4183 4185 4187 4189 4191 4193 4451 4453 4455 4457 4462 4464
4466 4468 4470 4472 4477 4479 4481 4483 4485 4487 4489 4494 4496 4501
4503 4505 4507 4509 4511 4513 4515 4517 4739 4741 4743 4745 4750 4752
4754 4756 4758 4760 4765 4767 4769 4771 4773 4775 4777 4782 4784 4789
4791 4793 4795 4797 4799 4801 4803 4805 5026 5028 5030 5032 5037 5039
5041 5043 5045 5047 5052 5054 5056 5058 5060 5062 5064 5069 5071 5076
5078 5080 5082 5084 5086 5088 5090 5092 5312 5314 5316 5318 5323 5325
5327 5329 5331 5333 5338 5340 5342 5344 5346 5348 5350 5355 5357 5362
5364 5366 5368 5370 5372 5374 5376 5378 5601 5603 5605 5607 5612 5614
5616 5618 5620 5622 5627 5629 5631 5633 5635 5637 5639 5644 5646 5651
5653 5655 5657 5659 5661 5663 5665 5667 5773 5775 5777 5779 5781 6038
6040 6042 6044 6049 6051 6053 6055 6057 6059 6061 6063 6068 6070 6072 SEQ 1869
6077 6079 6084 6086 6088 6090 6092 6094 6096 6098 6100 6358 6360 6362
6364 6369 6371 6373 6375 6377 6379 6381 6383 6388 6390 6392 6394 6396
6398 6400 6405 6407 6412 6414 6416 6418 6420 6422 6424 6426 6428 6684
6686 6688 6690 6695 6697 6699 6701 6703 6705 6707 6709 6714 6716 6718
6720 6722 6724 6726 6731 6733 6738 6740 6742 6744 6746 6748 6750 6752
6754 7012 7014 7016 7018 7023 7025 7027 7029 7031 7033 7035 7037 7042
7044 7046 7048 7050 7052 7054 7059 7061 7066 7068 7070 7072 7074 7076
7078 7080 7082 7340 7342 7344 7346 7351 7353 7355 7357 7359 7361 7363
7365 7370 7372 7374 7376 7378 7380 7382 7387 7389 7394 7396 7398 7400
7402 7404 7406 7408 7410 7632 7634 7636 7638 7643 7645 7647 7649 7651
7653 7655 7657 7662 7664 7666 7668 7670 7672 7674 7679 7681 7686 7688
7690 7692 7694 7696 7698 7700 7702 7923 7925 7927 7929 7934 7936 7938
7940 7942 7944 7946 7948 7953 7955 7957 7959 7961 7963 7965 7970 7972
7977 7979 7981 7983 7985 7987 7989 7991 7993 8213 8215 8217 8219 8224
8226 8228 8230 8232 8234 8236 8238 8243 8245 8247 8249 8251 8253 8255
8260 8262 8267 8269 8271 8273 8275 8277 8279 8281 8283 8502 8504 8506
8508 8513 8515 8517 8519 8521 8523 8525 8527 8532 8534 8536 8538 8540
8542 8544 8549 8551 8556 8558 8560 8562 8564 8566 8568 8570 8572 8757
8759 8761 8763 8765 8767 8769 8771 8773 8775 8777 8779 8781 8783 8785
8790 8792 8794 8796 8798 8800 8802 8804 8809 8811 8813 8818 8820 8822
8824 8829 8831 8836 8838 8840 8842 8844 8846 8848 8850 8852 8857 8859
8861 8863 8865 8867 8869 8871 8873
GO 76 78 84 90 655 657 663 669 870 872 884 885 1011 1013
1026 1027 1180 1182 1194 1195 1234 1246 1287 1290 1292 1294 1295 1298
1301 1303 1305 1306 1500 1502 1514 1515 1557 1580 1597 1631 1634 1636
1638 1639 1660 1667 1867 1869 1881 1884 1886 1896 1900 1904 1907 1909
1911 1915 1916 1952 1968 2150 2152 2164 2167 2169 2179 2183 2187 2190
2192 2194 2198 2199 2236 2262 2441 2443 2449 2455 2527 2529 2537 2541
2554 2555 2560 2561 2574 2580 2649 2651 2657 2672 2674 2676 2681 2685
2692 2694 2696 2698 2702 2819 2822 2824 2826 2961 2963 2969 2984 2986
2988 2993 2997 3004 3006 3008 3010 3014 3132 3134 3136 3275 3277 3283
3298 3300 3302 3307 3311 3318 3320 3322 3324 3328 3449 3451 3453 3600
3602 3608 3623 3625 3627 3632 3636 3643 3645 3647 3649 3653 3772 3774
3776 3923 3925 3931 3946 3948 3950 3955 3959 3966 3968 3970 3972 3976
4095 4097 4099 4245 4247 4253 4268 4270 4272 4277 4281 4288 4290 4292
4294 4298 4419 4421 4423 4568 4570 4576 4591 4593 4595 4600 4604 4611
4613 4615 4617 4621 4707 4709 4711 4857 4859 4865 4880 4882 4884 4889
4893 4900 4902 4904 4906 4910 4994 4996 4998 5143 5145 5151 5166 5168
5170 5175 5179 5186 5188 5190 5192 5196 5280 5282 5284 5430 5432 5438
5453 5455 5457 5462 5466 5473 5475 5477 5479 5483 5569 5571 5573 5707
5709 5717 5721 5734 5735 5740 5741 5754 5760 5830 5832 5838 5853 5855
5857 5862 5866 5873 5875 5877 5879 5883 6003 6006 6008 6010 6153 6155
6161 6176 6178 6180 6185 6189 6196 6198 6200 6202 6206 6326 6328 6330
6479 6481 6487 6502 6504 6506 6511 6515 6522 6524 6526 6528 6532 6652
6654 6656 6807 6809 6815 6830 6832 6834 6839 6843 6850 6852 6854 6856
6860 6980 6982 6984 7135 7137 7143 7158 7160 7162 7167 7171 7178 7180
7182 7184 7188 7308 7310 7312 7462 7464 7470 7485 7487 7489 7494 7498
7505 7507 7509 7511 7515 7600 7602 7604 7753 7755 7761 7776 7778 7780
7785 7789 7796 7798 7800 7802 7806 7891 7893 7895 8043 8045 8051 8066
8068 8070 8075 8079 8086 8088 8090 8092 8096 8181 8183 8185 8332 8334
8340 8355 8357 8359 8364 8368 8375 8377 8379 8381 8385 8470 8472 8474
8618 8620 8626 8641 8643 8645 8647 8652 8656 8663 8665 8667 8669 8673
8680 8683 8685 8687 8688 8692 8694 8696 8697 8733 8735 8737 8739 SEQ 1870
MFLD 193# 193 195# 195 197# 197 199# 199 201# 201 203# 203 205# 205
207# 207 209# 209 211# 211 213# 213 215# 215 217# 217 219# 219
221# 221 223# 223 225# 225 227# 227 229# 229 231# 231 233# 233
235# 235 237# 237 239# 239 241# 241 243# 243 245# 245 247# 247
249# 249 251# 251 253# 253 255# 255 257# 257 259# 259 261# 261
263# 263 265# 265 267# 267 272# 272 274# 274 279# 279 281# 281
286# 286 288# 288 290# 290 295# 295 297# 297 299# 299 304# 304
306# 306 308# 308 313# 313 315# 315 317# 317 322# 322 324# 324
326# 326 331# 331 333# 333 335# 335 340# 340 342# 342 344# 344
349# 349 351# 351 353# 353 358# 358 360# 360 362# 362 367# 367
369# 369 371# 371 376# 376 378# 378 380# 380 385# 385 387# 387
389# 389 394# 394 396# 396 398# 398 403# 403 405# 405 407# 407
412# 412 414# 414 416# 416 421# 421 423# 423 425# 425 430# 430
432# 432 434# 434 439# 439 441# 441 443# 443 448# 448 450# 450
452# 452 457# 457 459# 459 461# 461 466# 466 468# 468 470# 470
475# 475 477# 477 479# 479 484# 484 486# 486 488# 488 493# 493
495# 495 497# 497 502# 502 504# 504 506# 506 511# 511 513# 513
515# 515 520# 520 522# 522 524# 524 529# 529 531# 531 533# 533
538# 538 540# 540 542# 542 547# 547 549# 549 551# 551 556# 556
558# 558 560# 560 565# 565 567# 567 569# 569 574# 574 576# 576
578# 578 583# 583 585# 585 587# 587 592# 592 594# 594 596# 596
598# 598 603# 603 608# 608 610# 610 612# 612 614# 614 616# 616
716# 716 718# 718 720# 720 722# 722 724# 724 726# 726 728# 728
730# 730 732# 732 734# 734 739# 739 741# 741 746# 746 748# 748
753# 753 755# 755 757# 757 762# 762 764# 764 766# 766 771# 771
773# 773 775# 775 780# 780 782# 782 784# 784 789# 789 791# 791
793# 793 798# 798 800# 800 802# 802 807# 807 809# 809 811# 811
816# 816 821# 821 823# 823 825# 825 827# 827 829# 829 831# 831
937# 937 942# 942 947# 947 949# 949 954# 954 956# 956 958# 958
963# 963 965# 965 970# 970 972# 972 1061# 1061 1063# 1063 1065# 1065
1070# 1070 1075# 1075 1080# 1080 1082# 1082 1087# 1087 1092# 1092 1094# 1094
1099# 1099 1101# 1101 1107# 1107 1109# 1109 1111# 1111 1113# 1113 1115# 1115
1117# 1117 1119# 1119 1121# 1121 1126# 1126 1128# 1128 1329# 1329 1331# 1331
1333# 1333 1335# 1335 1340# 1340 1342# 1342 1344# 1344 1346# 1346 1348# 1348
1350# 1350 1355# 1355 1357# 1357 1359# 1359 1364# 1364 1370# 1370 1372# 1372
1374# 1374 1376# 1376 1378# 1378 1380# 1380 1382# 1382 1384# 1384 1391# 1391
1393# 1393 1395# 1395 1397# 1397 1399# 1399 1401# 1401 1403# 1403 1405# 1405
1407# 1407 1409# 1409 1411# 1411 1413# 1413 1415# 1415 1420# 1420 1422# 1422
1427# 1427 1429# 1429 1431# 1431 1436# 1436 1438# 1438 1443# 1443 1445# 1445
1450# 1450 1455# 1455 1457# 1457 1585# 1585 1587# 1587 1589# 1589 1591# 1591
1675# 1675 1677# 1677 1679# 1679 1681# 1681 1683# 1683 1685# 1685 1690# 1690
1692# 1692 1694# 1694 1696# 1696 1698# 1698 1700# 1700 1705# 1705 1707# 1707
1709# 1709 1711# 1711 1713# 1713 1715# 1715 1717# 1717 1719# 1719 1721# 1721
1723# 1723 1725# 1725 1727# 1727 1729# 1729 1731# 1731 1733# 1733 1735# 1735
1737# 1737 1739# 1739 1741# 1741 1743# 1743 1748# 1748 1750# 1750 1752# 1752
1754# 1754 1756# 1756 1758# 1758 1760# 1760 1762# 1762 1764# 1764 1766# 1766
1772# 1772 1774# 1774 1776# 1776 1782# 1782 1784# 1784 1786# 1786 1788# 1788
1790# 1790 1792# 1792 1794# 1794 1796# 1796 1801# 1801 1803# 1803 1808# 1808
1810# 1810 1812# 1812 1817# 1817 1822# 1822 1824# 1824 1974# 1974 1976# 1976
1978# 1978 1980# 1980 1983# 1983 1985# 1985 1987# 1987 1989# 1989 1991# 1991
1993# 1993 1996# 1996 2001# 2001 2007# 2007 2009# 2009 2011# 2011 2013# 2013
2015# 2015 2017# 2017 2019# 2019 2021# 2021 2026# 2026 2028# 2028 2030# 2030
2032# 2032 2034# 2034 2036# 2036 2038# 2038 2040# 2040 2042# 2042 2044# 2044 SEQ 1871
2046# 2046 2048# 2048 2050# 2050 2052# 2052 2054# 2054 2056# 2056 2058# 2058
2060# 2060 2062# 2062 2064# 2064 2069# 2069 2071# 2071 2073# 2073 2079# 2079
2081# 2081 2083# 2083 2085# 2085 2087# 2087 2089# 2089 2091# 2091 2093# 2093
2095# 2095 2097# 2097 2099# 2099 2101# 2101 2106# 2106 2108# 2108 2268# 2268
2271# 2271 2273# 2273 2275# 2275 2277# 2277 2279# 2279 2282# 2282 2284# 2284
2286# 2286 2288# 2288 2291# 2291 2297# 2297 2299# 2299 2301# 2301 2307# 2307
2309# 2309 2311# 2311 2313# 2313 2315# 2315 2317# 2317 2319# 2319 2321# 2321
2326# 2326 2328# 2328 2330# 2330 2332# 2332 2334# 2334 2336# 2336 2338# 2338
2340# 2340 2342# 2342 2344# 2344 2346# 2346 2348# 2348 2350# 2350 2352# 2352
2354# 2354 2356# 2356 2358# 2358 2360# 2360 2362# 2362 2364# 2364 2369# 2369
2371# 2371 2373# 2373 2379# 2379 2381# 2381 2383# 2383 2385# 2385 2387# 2387
2389# 2389 2391# 2391 2393# 2393 2395# 2395 2397# 2397 2399# 2399 2401# 2401
2406# 2406 2408# 2408 2484# 2484 2486# 2486 2593# 2593 2595# 2595 2597# 2597
2599# 2599 2601# 2601 2854# 2854 2856# 2856 2858# 2858 2860# 2860 2865# 2865
2867# 2867 2869# 2869 2871# 2871 2873# 2873 2875# 2875 2880# 2880 2882# 2882
2884# 2884 2889# 2889 2891# 2891 2896# 2896 2898# 2898 2900# 2900 2902# 2902
2904# 2904 2906# 2906 2908# 2908 2910# 2910 2912# 2912 3164# 3164 3166# 3166
3168# 3168 3170# 3170 3175# 3175 3177# 3177 3179# 3179 3181# 3181 3183# 3183
3185# 3185 3190# 3190 3192# 3192 3194# 3194 3199# 3199 3201# 3201 3206# 3206
3208# 3208 3210# 3210 3212# 3212 3214# 3214 3216# 3216 3218# 3218 3220# 3220
3222# 3222 3481# 3481 3483# 3483 3485# 3485 3487# 3487 3492# 3492 3494# 3494
3496# 3496 3498# 3498 3500# 3500 3502# 3502 3507# 3507 3509# 3509 3511# 3511
3513# 3513 3515# 3515 3517# 3517 3519# 3519 3524# 3524 3526# 3526 3531# 3531
3533# 3533 3535# 3535 3537# 3537 3539# 3539 3541# 3541 3543# 3543 3545# 3545
3547# 3547 3804# 3804 3806# 3806 3808# 3808 3810# 3810 3815# 3815 3817# 3817
3819# 3819 3821# 3821 3823# 3823 3825# 3825 3830# 3830 3832# 3832 3834# 3834
3836# 3836 3838# 3838 3840# 3840 3842# 3842 3847# 3847 3849# 3849 3854# 3854
3856# 3856 3858# 3858 3860# 3860 3862# 3862 3864# 3864 3866# 3866 3868# 3868
3870# 3870 4127# 4127 4129# 4129 4131# 4131 4133# 4133 4138# 4138 4140# 4140
4142# 4142 4144# 4144 4146# 4146 4148# 4148 4153# 4153 4155# 4155 4157# 4157
4159# 4159 4161# 4161 4163# 4163 4165# 4165 4170# 4170 4172# 4172 4177# 4177
4179# 4179 4181# 4181 4183# 4183 4185# 4185 4187# 4187 4189# 4189 4191# 4191
4193# 4193 4451# 4451 4453# 4453 4455# 4455 4457# 4457 4462# 4462 4464# 4464
4466# 4466 4468# 4468 4470# 4470 4472# 4472 4477# 4477 4479# 4479 4481# 4481
4483# 4483 4485# 4485 4487# 4487 4489# 4489 4494# 4494 4496# 4496 4501# 4501
4503# 4503 4505# 4505 4507# 4507 4509# 4509 4511# 4511 4513# 4513 4515# 4515
4517# 4517 4739# 4739 4741# 4741 4743# 4743 4745# 4745 4750# 4750 4752# 4752
4754# 4754 4756# 4756 4758# 4758 4760# 4760 4765# 4765 4767# 4767 4769# 4769
4771# 4771 4773# 4773 4775# 4775 4777# 4777 4782# 4782 4784# 4784 4789# 4789
4791# 4791 4793# 4793 4795# 4795 4797# 4797 4799# 4799 4801# 4801 4803# 4803
4805# 4805 5026# 5026 5028# 5028 5030# 5030 5032# 5032 5037# 5037 5039# 5039
5041# 5041 5043# 5043 5045# 5045 5047# 5047 5052# 5052 5054# 5054 5056# 5056
5058# 5058 5060# 5060 5062# 5062 5064# 5064 5069# 5069 5071# 5071 5076# 5076
5078# 5078 5080# 5080 5082# 5082 5084# 5084 5086# 5086 5088# 5088 5090# 5090
5092# 5092 5312# 5312 5314# 5314 5316# 5316 5318# 5318 5323# 5323 5325# 5325
5327# 5327 5329# 5329 5331# 5331 5333# 5333 5338# 5338 5340# 5340 5342# 5342
5344# 5344 5346# 5346 5348# 5348 5350# 5350 5355# 5355 5357# 5357 5362# 5362
5364# 5364 5366# 5366 5368# 5368 5370# 5370 5372# 5372 5374# 5374 5376# 5376
5378# 5378 5601# 5601 5603# 5603 5605# 5605 5607# 5607 5612# 5612 5614# 5614
5616# 5616 5618# 5618 5620# 5620 5622# 5622 5627# 5627 5629# 5629 5631# 5631
5633# 5633 5635# 5635 5637# 5637 5639# 5639 5644# 5644 5646# 5646 5651# 5651
5653# 5653 5655# 5655 5657# 5657 5659# 5659 5661# 5661 5663# 5663 5665# 5665
5667# 5667 5773# 5773 5775# 5775 5777# 5777 5779# 5779 5781# 5781 6038# 6038 SEQ 1872
6040# 6040 6042# 6042 6044# 6044 6049# 6049 6051# 6051 6053# 6053 6055# 6055
6057# 6057 6059# 6059 6061# 6061 6063# 6063 6068# 6068 6070# 6070 6072# 6072
6077# 6077 6079# 6079 6084# 6084 6086# 6086 6088# 6088 6090# 6090 6092# 6092
6094# 6094 6096# 6096 6098# 6098 6100# 6100 6358# 6358 6360# 6360 6362# 6362
6364# 6364 6369# 6369 6371# 6371 6373# 6373 6375# 6375 6377# 6377 6379# 6379
6381# 6381 6383# 6383 6388# 6388 6390# 6390 6392# 6392 6394# 6394 6396# 6396
6398# 6398 6400# 6400 6405# 6405 6407# 6407 6412# 6412 6414# 6414 6416# 6416
6418# 6418 6420# 6420 6422# 6422 6424# 6424 6426# 6426 6428# 6428 6684# 6684
6686# 6686 6688# 6688 6690# 6690 6695# 6695 6697# 6697 6699# 6699 6701# 6701
6703# 6703 6705# 6705 6707# 6707 6709# 6709 6714# 6714 6716# 6716 6718# 6718
6720# 6720 6722# 6722 6724# 6724 6726# 6726 6731# 6731 6733# 6733 6738# 6738
6740# 6740 6742# 6742 6744# 6744 6746# 6746 6748# 6748 6750# 6750 6752# 6752
6754# 6754 7012# 7012 7014# 7014 7016# 7016 7018# 7018 7023# 7023 7025# 7025
7027# 7027 7029# 7029 7031# 7031 7033# 7033 7035# 7035 7037# 7037 7042# 7042
7044# 7044 7046# 7046 7048# 7048 7050# 7050 7052# 7052 7054# 7054 7059# 7059
7061# 7061 7066# 7066 7068# 7068 7070# 7070 7072# 7072 7074# 7074 7076# 7076
7078# 7078 7080# 7080 7082# 7082 7340# 7340 7342# 7342 7344# 7344 7346# 7346
7351# 7351 7353# 7353 7355# 7355 7357# 7357 7359# 7359 7361# 7361 7363# 7363
7365# 7365 7370# 7370 7372# 7372 7374# 7374 7376# 7376 7378# 7378 7380# 7380
7382# 7382 7387# 7387 7389# 7389 7394# 7394 7396# 7396 7398# 7398 7400# 7400
7402# 7402 7404# 7404 7406# 7406 7408# 7408 7410# 7410 7632# 7632 7634# 7634
7636# 7636 7638# 7638 7643# 7643 7645# 7645 7647# 7647 7649# 7649 7651# 7651
7653# 7653 7655# 7655 7657# 7657 7662# 7662 7664# 7664 7666# 7666 7668# 7668
7670# 7670 7672# 7672 7674# 7674 7679# 7679 7681# 7681 7686# 7686 7688# 7688
7690# 7690 7692# 7692 7694# 7694 7696# 7696 7698# 7698 7700# 7700 7702# 7702
7923# 7923 7925# 7925 7927# 7927 7929# 7929 7934# 7934 7936# 7936 7938# 7938
7940# 7940 7942# 7942 7944# 7944 7946# 7946 7948# 7948 7953# 7953 7955# 7955
7957# 7957 7959# 7959 7961# 7961 7963# 7963 7965# 7965 7970# 7970 7972# 7972
7977# 7977 7979# 7979 7981# 7981 7983# 7983 7985# 7985 7987# 7987 7989# 7989
7991# 7991 7993# 7993 8213# 8213 8215# 8215 8217# 8217 8219# 8219 8224# 8224
8226# 8226 8228# 8228 8230# 8230 8232# 8232 8234# 8234 8236# 8236 8238# 8238
8243# 8243 8245# 8245 8247# 8247 8249# 8249 8251# 8251 8253# 8253 8255# 8255
8260# 8260 8262# 8262 8267# 8267 8269# 8269 8271# 8271 8273# 8273 8275# 8275
8277# 8277 8279# 8279 8281# 8281 8283# 8283 8502# 8502 8504# 8504 8506# 8506
8508# 8508 8513# 8513 8515# 8515 8517# 8517 8519# 8519 8521# 8521 8523# 8523
8525# 8525 8527# 8527 8532# 8532 8534# 8534 8536# 8536 8538# 8538 8540# 8540
8542# 8542 8544# 8544 8549# 8549 8551# 8551 8556# 8556 8558# 8558 8560# 8560
8562# 8562 8564# 8564 8566# 8566 8568# 8568 8570# 8570 8572# 8572 8757# 8757
8759# 8759 8761# 8761 8763# 8763 8765# 8765 8767# 8767 8769# 8769 8771# 8771
8773# 8773 8775# 8775 8777# 8777 8779# 8779 8781# 8781 8783# 8783 8785# 8785
8790# 8790 8792# 8792 8794# 8794 8796# 8796 8798# 8798 8800# 8800 8802# 8802
8804# 8804 8809# 8809 8811# 8811 8813# 8813 8818# 8818 8820# 8820 8822# 8822
8824# 8824 8829# 8829 8831# 8831 8836# 8836 8838# 8838 8840# 8840 8842# 8842
8844# 8844 8846# 8846 8848# 8848 8850# 8850 8852# 8852 8857# 8857 8859# 8859
8861# 8861 8863# 8863 8865# 8865 8867# 8867 8869# 8869 8871# 8871 8873# 8873
MWORD 193 195 197 199 201 203 205 207 209 211 213 215 217 219
221 223 225 227 229 231 233 235 237 239 241 243 245 247
249 251 253 255 257 259 261 263 265 267 272 274 279 281
286 288 290 295 297 299 304 306 308 313 315 317 322 324
326 331 333 335 340 342 344 349 351 353 358 360 362 367
369 371 376 378 380 385 387 389 394 396 398 403 405 407
412 414 416 421 423 425 430 432 434 439 441 443 448 450
452 457 459 461 466 468 470 475 477 479 484 486 488 493 SEQ 1873
495 497 502 504 506 511 513 515 520 522 524 529 531 533
538 540 542 547 549 551 556 558 560 565 567 569 574 576
578 583 585 587 592 594 596 598 603 608 610 612 614 616
716 718 720 722 724 726 728 730 732 734 739 741 746 748
753 755 757 762 764 766 771 773 775 780 782 784 789 791
793 798 800 802 807 809 811 816 821 823 825 827 829 831
937 942 947 949 954 956 958 963 965 970 972 1061 1063 1065
1070 1075 1080 1082 1087 1092 1094 1099 1101 1107 1109 1111 1113 1115
1117 1119 1121 1126 1128 1329 1331 1333 1335 1340 1342 1344 1346 1348
1350 1355 1357 1359 1364 1370 1372 1374 1376 1378 1380 1382 1384 1391
1393 1395 1397 1399 1401 1403 1405 1407 1409 1411 1413 1415 1420 1422
1427 1429 1431 1436 1438 1443 1445 1450 1455 1457 1585 1587 1589 1591
1675 1677 1679 1681 1683 1685 1690 1692 1694 1696 1698 1700 1705 1707
1709 1711 1713 1715 1717 1719 1721 1723 1725 1727 1729 1731 1733 1735
1737 1739 1741 1743 1748 1750 1752 1754 1756 1758 1760 1762 1764 1766
1772 1774 1776 1782 1784 1786 1788 1790 1792 1794 1796 1801 1803 1808
1810 1812 1817 1822 1824 1974 1976 1978 1980 1983 1985 1987 1989 1991
1993 1996 2001 2007 2009 2011 2013 2015 2017 2019 2021 2026 2028 2030
2032 2034 2036 2038 2040 2042 2044 2046 2048 2050 2052 2054 2056 2058
2060 2062 2064 2069 2071 2073 2079 2081 2083 2085 2087 2089 2091 2093
2095 2097 2099 2101 2106 2108 2268 2271 2273 2275 2277 2279 2282 2284
2286 2288 2291 2297 2299 2301 2307 2309 2311 2313 2315 2317 2319 2321
2326 2328 2330 2332 2334 2336 2338 2340 2342 2344 2346 2348 2350 2352
2354 2356 2358 2360 2362 2364 2369 2371 2373 2379 2381 2383 2385 2387
2389 2391 2393 2395 2397 2399 2401 2406 2408 2484 2486 2593 2595 2597
2599 2601 2854 2856 2858 2860 2865 2867 2869 2871 2873 2875 2880 2882
2884 2889 2891 2896 2898 2900 2902 2904 2906 2908 2910 2912 3164 3166
3168 3170 3175 3177 3179 3181 3183 3185 3190 3192 3194 3199 3201 3206
3208 3210 3212 3214 3216 3218 3220 3222 3481 3483 3485 3487 3492 3494
3496 3498 3500 3502 3507 3509 3511 3513 3515 3517 3519 3524 3526 3531
3533 3535 3537 3539 3541 3543 3545 3547 3804 3806 3808 3810 3815 3817
3819 3821 3823 3825 3830 3832 3834 3836 3838 3840 3842 3847 3849 3854
3856 3858 3860 3862 3864 3866 3868 3870 4127 4129 4131 4133 4138 4140
4142 4144 4146 4148 4153 4155 4157 4159 4161 4163 4165 4170 4172 4177
4179 4181 4183 4185 4187 4189 4191 4193 4451 4453 4455 4457 4462 4464
4466 4468 4470 4472 4477 4479 4481 4483 4485 4487 4489 4494 4496 4501
4503 4505 4507 4509 4511 4513 4515 4517 4739 4741 4743 4745 4750 4752
4754 4756 4758 4760 4765 4767 4769 4771 4773 4775 4777 4782 4784 4789
4791 4793 4795 4797 4799 4801 4803 4805 5026 5028 5030 5032 5037 5039
5041 5043 5045 5047 5052 5054 5056 5058 5060 5062 5064 5069 5071 5076
5078 5080 5082 5084 5086 5088 5090 5092 5312 5314 5316 5318 5323 5325
5327 5329 5331 5333 5338 5340 5342 5344 5346 5348 5350 5355 5357 5362
5364 5366 5368 5370 5372 5374 5376 5378 5601 5603 5605 5607 5612 5614
5616 5618 5620 5622 5627 5629 5631 5633 5635 5637 5639 5644 5646 5651
5653 5655 5657 5659 5661 5663 5665 5667 5773 5775 5777 5779 5781 6038
6040 6042 6044 6049 6051 6053 6055 6057 6059 6061 6063 6068 6070 6072
6077 6079 6084 6086 6088 6090 6092 6094 6096 6098 6100 6358 6360 6362
6364 6369 6371 6373 6375 6377 6379 6381 6383 6388 6390 6392 6394 6396
6398 6400 6405 6407 6412 6414 6416 6418 6420 6422 6424 6426 6428 6684
6686 6688 6690 6695 6697 6699 6701 6703 6705 6707 6709 6714 6716 6718
6720 6722 6724 6726 6731 6733 6738 6740 6742 6744 6746 6748 6750 6752
6754 7012 7014 7016 7018 7023 7025 7027 7029 7031 7033 7035 7037 7042
7044 7046 7048 7050 7052 7054 7059 7061 7066 7068 7070 7072 7074 7076 SEQ 1874
7078 7080 7082 7340 7342 7344 7346 7351 7353 7355 7357 7359 7361 7363
7365 7370 7372 7374 7376 7378 7380 7382 7387 7389 7394 7396 7398 7400
7402 7404 7406 7408 7410 7632 7634 7636 7638 7643 7645 7647 7649 7651
7653 7655 7657 7662 7664 7666 7668 7670 7672 7674 7679 7681 7686 7688
7690 7692 7694 7696 7698 7700 7702 7923 7925 7927 7929 7934 7936 7938
7940 7942 7944 7946 7948 7953 7955 7957 7959 7961 7963 7965 7970 7972
7977 7979 7981 7983 7985 7987 7989 7991 7993 8213 8215 8217 8219 8224
8226 8228 8230 8232 8234 8236 8238 8243 8245 8247 8249 8251 8253 8255
8260 8262 8267 8269 8271 8273 8275 8277 8279 8281 8283 8502 8504 8506
8508 8513 8515 8517 8519 8521 8523 8525 8527 8532 8534 8536 8538 8540
8542 8544 8549 8551 8556 8558 8560 8562 8564 8566 8568 8570 8572 8757
8759 8761 8763 8765 8767 8769 8771 8773 8775 8777 8779 8781 8783 8785
8790 8792 8794 8796 8798 8800 8802 8804 8809 8811 8813 8818 8820 8822
8824 8829 8831 8836 8838 8840 8842 8844 8846 8848 8850 8852 8857 8859
8861 8863 8865 8867 8869 8871 8873
PDEC 1272 1275 1622 1625
PNTDEC 1281 1317 2848 3158 3475 3798 4121 4445 4733 5020 5306 5595 6032 6352
6678 7006 7334 7626 7917 8207 8496
PNTHW 1321 1324 1650 1653 2588 2845 3155 3472 3795 4118 4442 4730 5017 5303
5592 5768 6029 6349 6675 7003 7331 7623 7914 8204 8493 8750
PNTMSG 1270 1271 1273 1274 1276 1278 1282 1314 1318 1319 1322 1620 1621 1623
1624 1626 1647 1648 1651 2586 2842 2846 2849 3152 3156 3159 3469 3473
3476 3792 3796 3799 4115 4119 4122 4439 4443 4446 4727 4731 4734 5014
5018 5021 5300 5304 5307 5589 5593 5596 5766 6026 6030 6033 6346 6350
6353 6672 6676 6679 7000 7004 7007 7328 7332 7335 7620 7624 7627 7911
7915 7918 8201 8205 8208 8490 8494 8497 8747 8751 8752
RTN 79 104 658 683 873 899 915 922 928 1014 1041 1183 1209 1229
1242 1255 1313 1325 1503 1529 1553 1583 1606 1654 1664 1669 1870 1930
1947 1955 1964 1970 2153 2213 2231 2239 2249 2258 2264 2444 2469 2530
2567 2581 2589 2652 2716 2800 2827 2833 2850 2964 3028 3112 3137 3143
3160 3278 3342 3426 3454 3460 3477 3603 3667 3751 3777 3783 3800 3926
3990 4074 4100 4106 4123 4248 4312 4396 4424 4430 4447 4571 4635 4684
4712 4718 4735 4860 4924 4973 4999 5005 5022 5146 5210 5259 5285 5291
5308 5433 5497 5546 5574 5580 5597 5710 5747 5761 5769 5833 5897 5981
6011 6017 6034 6156 6220 6304 6331 6337 6354 6482 6546 6630 6657 6663
6680 6810 6874 6958 6985 6991 7008 7138 7202 7286 7313 7319 7336 7465
7529 7578 7605 7611 7628 7756 7820 7869 7896 7902 7919 8046 8110 8159
8186 8192 8209 8335 8399 8448 8475 8481 8498 8621 8709 8723 8740 8753
SCOPER 97 676 892 1034 1202 1522 1923 2206 2462 2545 2563 2709 3021 3335
3660 3983 4305 4628 4917 5203 5490 5725 5743 5890 6213 6539 6867 7195
7522 7813 8103 8392 8702
TMSG 1273 1276 1282 1318 1623 1626 2846 2849 3156 3159 3473 3476 3796 3799
4119 4122 4443 4446 4731 4734 5018 5021 5304 5307 5593 5596 6030 6033
6350 6353 6676 6679 7004 7007 7332 7335 7624 7627 7915 7918 8205 8208
8494 8497 8751
TMSGC 1270 1271 1274 1278 1314 1319 1322 1620 1621 1624 1647 1648 1651 2586
2842 3152 3469 3792 4115 4439 4727 5014 5300 5589 5766 6026 6346 6672
7000 7328 7620 7911 8201 8490 8747 8752
TTABLE 2720 2721 2725 2726 2727 2728 2732 2733 2734 2735 2739 2740 2741 2742
2746 2747 2748 2749 2754 2755 2756 2757 2761 2762 2763 2764 2768 2769
2770 2771 2775 2776 2777 2778 2782 2783 2784 2785 2789 2790 2791 2792
2793 2794 3032 3033 3037 3038 3039 3040 3044 3045 3046 3047 3051 3052
3053 3054 3058 3059 3060 3061 3066 3067 3068 3069 3073 3074 3075 3076 SEQ 1875
3080 3081 3082 3083 3087 3088 3089 3090 3094 3095 3096 3097 3101 3102
3103 3104 3105 3106 3346 3347 3351 3352 3353 3354 3358 3359 3360 3361
3365 3366 3367 3368 3372 3373 3374 3375 3380 3381 3382 3383 3387 3388
3389 3390 3394 3395 3396 3397 3401 3402 3403 3404 3408 3409 3410 3411
3415 3416 3417 3418 3419 3420 3671 3672 3676 3677 3678 3679 3683 3684
3685 3686 3690 3691 3692 3693 3697 3698 3699 3700 3705 3706 3707 3708
3712 3713 3714 3715 3719 3720 3721 3722 3726 3727 3728 3729 3733 3734
3735 3736 3740 3741 3742 3743 3744 3745 3994 3995 3999 4000 4001 4002
4006 4007 4008 4009 4013 4014 4015 4016 4020 4021 4022 4023 4028 4029
4030 4031 4035 4036 4037 4038 4042 4043 4044 4045 4049 4050 4051 4052
4056 4057 4058 4059 4063 4064 4065 4066 4067 4068 4316 4317 4321 4322
4323 4324 4328 4329 4330 4331 4335 4336 4337 4338 4342 4343 4344 4345
4350 4351 4352 4353 4357 4358 4359 4360 4364 4365 4366 4367 4371 4372
4373 4374 4378 4379 4380 4381 4385 4386 4387 4388 4389 4390 4639 4640
4644 4645 4646 4647 4651 4652 4653 4654 4659 4660 4661 4662 4666 4667
4668 4669 4673 4674 4675 4676 4677 4678 4928 4929 4933 4934 4935 4936
4940 4941 4942 4943 4947 4948 4949 4950 4955 4956 4957 4958 4962 4963
4964 4965 4966 4967 5214 5215 5219 5220 5221 5222 5226 5227 5228 5229
5233 5234 5235 5236 5240 5241 5242 5243 5248 5249 5250 5251 5252 5253
5501 5502 5506 5507 5508 5509 5513 5514 5515 5516 5520 5521 5522 5523
5527 5528 5529 5530 5535 5536 5537 5538 5539 5540 5901 5902 5906 5907
5908 5909 5913 5914 5915 5916 5920 5921 5922 5923 5927 5928 5929 5930
5935 5936 5937 5938 5942 5943 5944 5945 5949 5950 5951 5952 5956 5957
5958 5959 5963 5964 5965 5966 5970 5971 5972 5973 5974 5975 6224 6225
6229 6230 6231 6232 6236 6237 6238 6239 6243 6244 6245 6246 6250 6251
6252 6253 6257 6258 6259 6260 6265 6266 6267 6268 6272 6273 6274 6275
6279 6280 6281 6282 6286 6287 6288 6289 6293 6294 6295 6296 6297 6298
6550 6551 6555 6556 6557 6558 6562 6563 6564 6565 6569 6570 6571 6572
6576 6577 6578 6579 6584 6585 6586 6587 6591 6592 6593 6594 6598 6599
6600 6601 6605 6606 6607 6608 6612 6613 6614 6615 6619 6620 6621 6622
6623 6624 6878 6879 6883 6884 6885 6886 6890 6891 6892 6893 6897 6898
6899 6900 6904 6905 6906 6907 6912 6913 6914 6915 6919 6920 6921 6922
6926 6927 6928 6929 6933 6934 6935 6936 6940 6941 6942 6943 6947 6948
6949 6950 6951 6952 7206 7207 7211 7212 7213 7214 7218 7219 7220 7221
7225 7226 7227 7228 7232 7233 7234 7235 7239 7240 7241 7242 7247 7248
7249 7250 7254 7255 7256 7257 7261 7262 7263 7264 7268 7269 7270 7271
7275 7276 7277 7278 7279 7280 7533 7534 7538 7539 7540 7541 7545 7546
7547 7548 7552 7553 7554 7555 7559 7560 7561 7562 7567 7568 7569 7570
7571 7572 7824 7825 7829 7830 7831 7832 7836 7837 7838 7839 7843 7844
7845 7846 7850 7851 7852 7853 7857 7858 7859 7860 7861 7862 8114 8115
8119 8120 8121 8122 8126 8127 8128 8129 8133 8134 8135 8136 8140 8141
8142 8143 8148 8149 8150 8151 8152 8153 8403 8404 8408 8409 8410 8411
8415 8416 8417 8418 8422 8423 8424 8425 8429 8430 8431 8432 8437 8438
8439 8440 8441 8442 8713 8714 8715 8716 8717 8718 8719
.MAIN MACRO %53A(1152) 10:53 16-Oct-84 Page 1
DFPTAA MAC 19-Feb-83 23:12 CBUS MODULE TESTS SEQ 1876
1 SUBTTL CBUS MODULE TESTS
2
3 SALL
4
5 SEARCH DFPTA,MONSYM
6
7 ; INTERN's
8
9 ENTRY TSTC40,TSTC41,TSTC42,TSTC43,TSTC44,TSTC45,TSTC46,TSTC47,TSTC50
10 ENTRY TSTC51,TSTC52,TSTC53,TSTC54,TSTC55,TSTC56,TSTC57,TSTC60
11
12 ; EXTERN's located in DFPTA1.MAC (Mainline code..)
13
14 EXTERN UDEBUG,BUFF,CBUF,TLOAD,TRACE,TSTFLG,TSTSUB,ODELAY
15 EXTERN BEXEC,BBPNT,TEXEC,TTPNT,CEXEC,CCPNT,CSTATF,CEBUFA
16
17 ; EXTERN's located in DFPTAI.MAC (Port Device Handling Routines module)
18
19 EXTERN LDRAR,LDCSR,RDEBUF,IPACLR,CHINIT,GENCCW,GETLOG,LOGBUF
20
21 ; EXTERN's located in DFPTAU.MAC (Utility Routines module)
22
23 EXTERN PATBUF,BUFCOM,SCOSW
24
25
26 ;#********************************************************************
27 ; ZA - Address for use in DDT
28 ;#********************************************************************
29
30 000000' ZA: ; address of 00000'
.MAIN MACRO %53A(1152) 10:53 16-Oct-84 Page 2
DFPTAA MAC 19-Feb-83 23:12 CBUS MODULE TESTS SEQ 1877
31
32 ;#********************************************************************
33 ;* Test 40 - CMUX Selected by PLINTOCMUX
34 ;
35 ; Description: This test verifies the PLINTOCMUX select line.
36 ; First the PLIN is loaded with 377 and the FMTR is
37 ; loaded with 777777,,777400. Then the PLIN is read
38 ; and verified and the formatter read and verified.
39 ;
40 ; Procedure: KL> Port Clear
41 ; KL> Load test microcode
42 ;
43 ; KL> Start microcode at location 0
44 ; UC> Load PLIN with 377
45 ; UC> Load FMTR with 777777,,777400
46 ; UC> Read PLIN through CMUX with PLINTOCMUX
47 ; signal asserted
48 ; UC> Verify data is 000000,,000377
49 ; UC> if passed - set bit 12 (DISABLE Complete)
50 ; UC> if failed - set bit 13 (ENABLE Complete)
51 ;
52 ; KL> Start microcode at location 100
53 ; UC> Load PLIN with 377
54 ; UC> Load FMTR with 777777,,777400
55 ; UC> Read PLIN through CMUX with PLINTOCMUX
56 ; signal not asserted
57 ; UC> Verify data is 777777,,777400
58 ; UC> if passed - set bit 12 (DISABLE Complete)
59 ; UC> if failed - set bit 13 (ENABLE Complete)
60 ;
61 ; Failure: ---
62 ;#********************************************************************
63
64 ; Test data
65
66 000000' 254 00 0 00 000011' TSTC40: JRST TG40 ; go start test
67 000001' 100604 000040 CBUS!NDMP!NDCB!ZCBUS!40 ; test mask
68 000002' 000052' 004735' T40M,,[ASCIZ ^CMUX Selected by PLINTOCMUX^]
69 000003' 004743' 000000 [EXP C8,MLAST!C23],,0
70 000004' 000000 000163' TSTC41 ; failure test table
71 000005' 000000 000413' TSTC42 ; ...
72 000006' 000000 000503' TSTC43
73 000007' 000000 000572' TSTC44
74 000010' 777777 777777 -1
75
76 ; Start test
77
78 000011' 201 00 0 00 000000' TG40: MOVEI ZA ; get address of module start
79 000012' 260 17 0 00 000000* GO TRACE ; handle trace output
80 000013' 201 01 0 00 000052' MOVEI 1,T40M ; set up microcode address
81 000014' 260 17 0 00 000000* GO TLOAD ; load/verify it
82 000015' 263 17 0 00 000000 RTN ; failed - exit test
.MAIN MACRO %53A(1152) 10:53 16-Oct-84 Page 3
DFPTAA MAC 19-Feb-83 23:12 CBUS MODULE TESTS SEQ 1878
83
84 ; Initialization
85
86 000016' 400 15 0 00 000000 TL40: SETZ ERFLG, ; clear error flag
87 000017' 260 17 0 00 000000* GO IPACLR ; clear port
88 000020' 402 00 0 00 000000* SETZM TSTSUB ; initialize subtest number
89 000021' 201 06 0 00 000034' MOVEI 6,TS40 ; get sstep table address
90
91 ; Loop on test execute table entries
92
93 000022' 260 17 0 00 000017* TA40: GO IPACLR ; clear port
94 000023' 260 17 0 00 000000* TB40: GO TEXEC ; execute table entry
95 000024' 254 00 0 00 000033' JRST TX40 ; end of sstep table
96 000025' 254 00 0 00 000023' JRST TB40 ; keep looping after call
97 000026' 474 15 0 00 000000 SETO ERFLG, ; error occurred
98
99 ; Handle error printouts and scope looping
100
101 000027' 027 00 0 00 000043' SCOPER MA40 ; print error message
102 000030' 254 00 0 00 000016' JRST TL40 ; loop on error
103 000031' 254 00 0 00 000033' JRST TX40 ; altmode exit
104 000032' 322 15 0 00 000022' JUMPE ERFLG,TA40 ; do next sstep table entry
105
106 ; End of test
107
108 000033' 263 17 0 00 000000 TX40: RTN ; return
109
110 ; Test Execute Table, as: (CMD,parameters)
111
112 ; PLINTOCMUX set
113
114 000034' 040000 000000 TS40: TTABLE (TSTART,0) ; start up port
115 000035' 240001 004745' TTABLE (TCHECK,1,[377]) ; check if completed
116 000036' 340000 000000 TTABLE (TEXIT) ; exit if error yet
117
118 ; PLINTOCMUX not set
119
120 000037' 040000 000100 TTABLE (TSTART,100) ; start up port
121 000040' 240001 004746' TTABLE (TCHECK,1,[777777777400]) ; check if completed
122 000041' 340000 000000 TTABLE (TEXIT) ; exit if error yet
123 000042' 000000 000000 TTABLE (TLAST) ; done
124
125 ; Error messages
126
127 000043' 240000 000045' MA40: CALL!TXNOT!MA40LP ; print subtest description
128 000044' 000000000000# LAST!CALL!TXALL!TTPNT ; print test data
129
130 000045' 200 01 0 00 000020* MA40LP: MOVE 1,TSTSUB ; get subtest number
131 000046' 256 00 0 01 000047' XCT MA40L-1(1) ; print message
132 000047' 263 17 0 00 000000 RTN ; return
133
134 000050' 037 00 0 00 004747' MA40L: TMSGC <PLIN not read correctly with PLINTOCMUX asserted>
135 000051' 037 00 0 00 004762' TMSGC <FMTR not read correctly with PLINTOCMUX not asserted>
.MAIN MACRO %53A(1152) 10:53 16-Oct-84 Page 4
DFPTAA MAC 19-Feb-83 23:12 CBUS MODULE TESTS SEQ 1879
136
137 ; Microcode:
138
139 ; Read PLIN with PLINTOCMUX asserted
140
141 000052' 000000 010000 T40M: MWORD <ADDR=0,JMAP,J=1,D=1> ; 0
142 000053' 001000 000040
143 000054' 000100 310377 MWORD <LDCT,J=31,SD0,OR,D=2,SKCN,MGC=377> ; 1
144 000055' 732000 240300
145 000056' 000200 020000 MWORD <RPCT,J=2,S0A,OR,D=5> ; 2
146 000057' 435000 000220
147 000060' 000300 002040 MWORD <CONT,S0A,XNOR,B=1,D=3,OENA,SELF,MGC=40> ; 3
148 000061' 473000 403340
149 000062' 000400 002040 MWORD <CONT,S0A,OR,D=1,OENA,SELM,MGC=40> ; 4
150 000063' 431000 002340
151 000064' 000500 000006 MWORD <CONT,SD0,D=1,SELP,MGC=6> ; 5
152 000065' 701000 001340
153 000066' 000600 000300 MWORD <CONT,SD0,OR,B=12,D=2,SELM,MGC=300> ; 6
154 000067' 732005 002340
155 000070' 000751 000000 MWORD <CJP,J=5100,SAB,A=0,B=12,RMIN,D=1,CRY,CENA,CCFZ>; 7
156 000071' 121405 020460
157 000072' 001052 000000 MWORD <JMAP,J=5200,D=1> ; 10
158 000073' 001000 000040
159
160 ; Read PLIN without PLINTOCMUX asserted
161
162 000074' 010001 010000 MWORD <ADDR=100,JMAP,J=101,D=1> ; 100
163 000075' 001000 000040
164 000076' 010100 310377 MWORD <LDCT,J=31,SD0,OR,D=2,SKCN,MGC=377> ; 101
165 000077' 732000 240300
166 000100' 010201 020000 MWORD <RPCT,J=102,S0A,OR,D=5> ; 102
167 000101' 435000 000220
168 000102' 010300 002040 MWORD <CONT,S0A,XNOR,B=1,D=3,OENA,SELF,MGC=40> ; 103
169 000103' 473000 403340
170 000104' 010400 002040 MWORD <CONT,S0A,OR,D=1,OENA,SELM,MGC=40> ; 104
171 000105' 431000 002340
172 000106' 010500 000006 MWORD <CONT,SD0,D=1,SELP,MGC=6> ; 105
173 000107' 701000 001340
174 000110' 010600 000200 MWORD <CONT,SD0,OR,B=12,D=2,SELM,MGC=200> ; 106
175 000111' 732005 002340
176 000112' 010751 000000 MWORD <CJP,J=5100,SAB,A=1,B=12,RMIN,D=1,CRY,CENA,CCFZ>; 107
177 000113' 121415 020460
178 000114' 011052 000000 MWORD <JMAP,J=5200,D=1> ; 110
179 000115' 001000 000040
180
181 ; Subroutine - Passed - Write 1 to bit 12 of CSR register
182
183 000116' 510000 000000 MWORD <ADDR=5100,CONT,SD0,AND,B=2,D=2> ; 5100
184 000117' 742001 000340
185 000120' 510100 000000 MWORD <CONT,S0B,PLUS,B=2,D=2,CRY> ; 5101
186 000121' 302001 000740
187 000122' 510200 260000 MWORD <LDCT,J=26> ; 5102
188 000123' 000000 000300
189 000124' 510351 030000 MWORD <RPCT,J=5103,SAB,PLUS,A=2,B=2,D=2> ; 5103
190 000125' 102021 000220
.MAIN MACRO %53A(1152) 10:53 16-Oct-84 Page 4-1
DFPTAA MAC 19-Feb-83 23:12 CBUS MODULE TESTS SEQ 1880
191 000126' 510400 002004 MWORD <CONT,S0A,A=2,OR,D=1,OENA,SELE,MGC=4> ; 5104
192 000127' 431020 005340
193 000130' 510551 070040 MWORD <CJP,J=5107,CENA,CCGC,D=1,SELE,MGC=40> ; 5105
194 000131' 001400 015060
195 000132' 510651 050000 MWORD <JMAP,J=5105,D=1> ; 5106
196 000133' 001000 000040
197 000134' 510700 000200 MWORD <CONT,S0A,A=1,OR,D=1,SELE,MGC=200> ; 5107
198 000135' 431010 005340
199 000136' 511051 102004 MWORD <JMAP,J=5110,S0A,A=12,OR,D=1,OENA,SELE,MGC=4> ; 5110
200 000137' 431120 005040
201
202 ; Subroutine - Failed - Write 1 to bit 13 of CSR register
203
204 000140' 520000 000000 MWORD <ADDR=5200,CONT,SD0,AND,B=2,D=2> ; 5200
205 000141' 742001 000340
206 000142' 520100 000000 MWORD <CONT,S0B,PLUS,B=2,D=2,CRY> ; 5201
207 000143' 302001 000740
208 000144' 520200 250000 MWORD <LDCT,J=25> ; 5202
209 000145' 000000 000300
210 000146' 520352 030000 MWORD <RPCT,J=5203,SAB,PLUS,A=2,B=2,D=2> ; 5203
211 000147' 102021 000220
212 000150' 520400 002004 MWORD <CONT,S0A,A=2,OR,D=1,OENA,SELE,MGC=4> ; 5204
213 000151' 431020 005340
214 000152' 520552 070040 MWORD <CJP,J=5207,CENA,CCGC,D=1,SELE,MGC=40> ; 5205
215 000153' 001400 015060
216 000154' 520652 050000 MWORD <JMAP,J=5205,D=1> ; 5206
217 000155' 001000 000040
218 000156' 520700 000200 MWORD <CONT,S0A,A=1,OR,D=1,SELE,MGC=200> ; 5207
219 000157' 431010 005340
220 000160' 521052 102004 MWORD <JMAP,J=5210,S0A,A=12,OR,D=1,OENA,SELE,MGC=4> ; 5210
221 000161' 431120 005040
222 000162' 777777 777777 -1
.MAIN MACRO %53A(1152) 10:53 16-Oct-84 Page 5
DFPTAA MAC 19-Feb-83 23:12 CBUS MODULE TESTS SEQ 1881
223
224 ;#********************************************************************
225 ;* Test 41 - CBUF Loaded Correctly
226 ;
227 ; Description: This test verifies that the CBUF is loaded
228 ; correctly at full speed. The formatter is loaded
229 ; alternately with data from local storage, and the
230 ; 2901's. After each load the data is read back
231 ; and verified.
232 ;
233 ; Procedure: KL> Port Clear
234 ; KL> Load test microcode
235 ;
236 ; KL> Start microcode at location 0
237 ; UC> Load 2901 R10 with 525252525252
238 ; UC> Load LS location 111 with 252525252525
239 ;
240 ; UC> Load formatter with 2901 R10 data, then
241 ; read it back and verify the data
242 ; UC> Load formatter with LS data, then read
243 ; it back and verify the data
244 ;
245 ; Repeat the above 512 times, on any error set bit
246 ; 13 (ENABLE Complete) in the CSR register, load
247 ; R11 with type of data (0=R10,1=LS), and load
248 ; R12 and R13 with correct/actual.
249 ;
250 ; If no error - set bit 12 (DISABLE Complete)
251 ;
252 ; Failure: ---
253 ;#********************************************************************
254
255 ; Test data
256
257 000163' 254 00 0 00 000173' TSTC41: JRST TG41 ; go start test
258 000164' 100604 000041 CBUS!NDMP!NDCB!ZCBUS!41 ; test mask
259 000165' 000272' 004775' T41M,,[ASCIZ ^CBUF Loaded Correctly^]
260 000166' 005002' 005003' [EXP MLAST!C24],,[EXP C18,MLAST!C22]
261 000167' 000000 000413' TSTC42 ; failure test table
262 000170' 000000 000503' TSTC43 ; ...
263 000171' 000000 000572' TSTC44
264 000172' 777777 777777 -1
265
266 ; Start test
267
268 000173' 201 00 0 00 000000' TG41: MOVEI ZA ; get address of module start
269 000174' 260 17 0 00 000012* GO TRACE ; handle trace output
270 000175' 201 01 0 00 000272' MOVEI 1,T41M ; set up microcode address
271 000176' 260 17 0 00 000014* GO TLOAD ; load/verify it
272 000177' 263 17 0 00 000000 RTN ; failed - exit test
.MAIN MACRO %53A(1152) 10:53 16-Oct-84 Page 6
DFPTAA MAC 19-Feb-83 23:12 CBUS MODULE TESTS SEQ 1882
273
274 ; Initialization
275
276 000200' 400 15 0 00 000000 TL41: SETZ ERFLG, ; clear error flag
277 000201' 260 17 0 00 000022* GO IPACLR ; clear port
278 000202' 402 00 0 00 000045* SETZM TSTSUB ; initialize subtest number
279 000203' 201 06 0 00 000216' MOVEI 6,TS41 ; get sstep table address
280
281 ; Loop on test execute table entries
282
283 000204' 260 17 0 00 000201* TA41: GO IPACLR ; clear port
284 000205' 260 17 0 00 000023* TB41: GO TEXEC ; execute table entry
285 000206' 254 00 0 00 000215' JRST TX41 ; end of sstep table
286 000207' 254 00 0 00 000205' JRST TB41 ; keep looping after call
287 000210' 474 15 0 00 000000 SETO ERFLG, ; error occurred
288
289 ; Handle error printouts and scope looping
290
291 000211' 027 00 0 00 000222' SCOPER MA41 ; print error message
292 000212' 254 00 0 00 000200' JRST TL41 ; loop on error
293 000213' 254 00 0 00 000215' JRST TX41 ; altmode exit
294 000214' 322 15 0 00 000204' JUMPE ERFLG,TA41 ; do next sstep table entry
295
296 ; End of test
297
298 000215' 263 17 0 00 000000 TX41: RTN ; return
299
300 ; Test Execute Table, as: (CMD,parameters)
301
302 000216' 040000 000000 TS41: TTABLE (TSTART,0) ; start up port
303 000217' 240040 000000 TTABLE (TCHECK,40) ; check if completed
304 000220' 340000 000000 TTABLE (TEXIT) ; exit if error yet
305 000221' 000000 000000 TTABLE (TLAST) ; done
306
307 ; Error messages
308
309 000222' 240000 000224' MA41: CALL!TXNOT!MA41LP ; print subtest description
310 000223' 000000000000# LAST!CALL!TXALL!TTPNT ; print test data
311
312 000224' 400 01 0 00 000000 MA41LP: SETZ 1, ; clear AC1
313 000225' 260 17 0 00 000000* GO LDCSR ; clear CSR register
314 000226' 201 01 0 00 005000 MOVEI 1,5000 ; get address to read registers
315 000227' 242 01 0 00 000001 LSH 1,1 ; position properly
316 000230' 260 17 0 00 000000* GO LDRAR ; write to RAR
317 000231' 201 01 0 00 220010 MOVEI 1,MPRUN!SINCYC!TSTEBF ; set up single step data
318 000232' 260 17 0 00 000225* GO LDCSR ; write to CSR register
319 000233' 260 17 0 00 000000* GO RDEBUF ; read EBUF data
320 000234' 202 01 0 00 005725' MOVEM 1,SAVR11# ; save R11 data
.MAIN MACRO %53A(1152) 10:53 16-Oct-84 Page 7
DFPTAA MAC 19-Feb-83 23:12 CBUS MODULE TESTS SEQ 1883
321
322 000235' 400 01 0 00 000000 SETZ 1, ; clear AC1
323 000236' 260 17 0 00 000232* GO LDCSR ; clear CSR register
324 000237' 201 01 0 00 005000 MOVEI 1,5000 ; get address to read registers
325 000240' 242 01 0 00 000001 LSH 1,1 ; position properly
326 000241' 260 17 0 00 000230* GO LDRAR ; write to RAR
327 000242' 201 01 0 00 220010 MOVEI 1,MPRUN!SINCYC!TSTEBF ; set up single step data
328 000243' 260 17 0 00 000236* GO LDCSR ; write to CSR register
329 000244' 260 17 0 00 000233* GO RDEBUF ; read EBUF data
330 000245' 202 01 0 00 005726' MOVEM 1,SAVR12# ; save R11 data
331
332 000246' 400 01 0 00 000000 SETZ 1, ; clear AC1
333 000247' 260 17 0 00 000243* GO LDCSR ; clear CSR register
334 000250' 201 01 0 00 005000 MOVEI 1,5000 ; get address to read registers
335 000251' 242 01 0 00 000001 LSH 1,1 ; position properly
336 000252' 260 17 0 00 000241* GO LDRAR ; write to RAR
337 000253' 201 01 0 00 220010 MOVEI 1,MPRUN!SINCYC!TSTEBF ; set up single step data
338 000254' 260 17 0 00 000247* GO LDCSR ; write to CSR register
339 000255' 260 17 0 00 000244* GO RDEBUF ; read EBUF data
340 000256' 202 01 0 00 005727' MOVEM 1,SAVR13# ; save R11 data
341 000257' 331 01 0 00 005725' SKIPL 1,SAVR11 ; within range 0-1?
342 000260' 303 01 0 00 000001 CAILE 1,1
343 000261' 263 17 0 00 000000 RTN ; no - exit
344 XCT [TMSGC <Failing write - 2901 R10 to FMTR>
345 000262' 256 00 0 01 005023' TMSGC <Failing write - LS111 to FMTR>](1)
346 000263' 037 00 0 00 005025' TMSGC <FMTR Correct: >
347 000264' 200 00 0 00 005726' MOVE SAVR12
348 000265' 037 13 0 00 000000 PNTHW
349 000266' 037 00 0 00 005031' TMSGC < Actual: >
350 000267' 200 00 0 00 005727' MOVE SAVR13
351 000270' 037 13 0 00 000000 PNTHW
352 000271' 263 17 0 00 000000 RTN ; return
353
354 ; Microcode:
355
356 ; Load 2901 R10 with 525252525252
357 ; Load LS location 40 with 252525252525
358
359 000272' 000000 010777 T41M: MWORD <ADDR=0,JMAP,J=1,SD0,OR,D=2,B=11,SKCN,MGC=777> ; 0
360 000273' 732004 640040
361 000274' 000100 210000 MWORD <LDCT,J=21,S0A,AND,D=2,B=10> ; 1
362 000275' 442004 000300
363 000276' 000200 000000 MWORD <CONT,S0B,B=10,PLUS,D=7,CRY> ; 2
364 000277' 307004 000740
365 000300' 000300 020000 MWORD <RPCT,J=2,S0B,B=10,OR,D=7> ; 3
366 000301' 337004 000220
367 000302' 000410 000000 MWORD <LDCT,J=1000,S0B,PLUS,B=10,CRY,D=7> ; 4
368 000303' 307004 000700
369
370 000304' 000500 002040 MWORD <CONT,S0A,XNOR,A=10,D=1,OENA,LDLM,MGC=40> ; 5
371 000305' 471100 230340
372
373 ; Load formatter with 2901 R10 data, then read and verify
374
375 000306' 000600 002040 MWORD <CONT,S0A,OR,A=10,B=12,D=3,OENA,SELF,MGC=40> ; 6
.MAIN MACRO %53A(1152) 10:53 16-Oct-84 Page 7-1
DFPTAA MAC 19-Feb-83 23:12 CBUS MODULE TESTS SEQ 1884
376 000307' 433105 003340
377 000310' 000700 000200 MWORD <CONT,SD0,OR,B=13,D=2,SELM,MGC=200> ; 7
378 000311' 732005 402340
379 000312' 001000 120000 MWORD <CJP,J=12,SAB,A=12,B=13,SMIN,CRY,CENA,CCFZ> ; 10
380 000313' 110525 420460
381 000314' 001101 000000 MWORD <JMAP,J=100,D=1> ; 11
382 000315' 001000 000040
383
384 ; Load formatter with LS data, then read read and verify
385
386 000316' 001200 000040 MWORD <CONT,SD0,OR,B=12,D=2,RDLM,SELF,MGC=40> ; 12
387 000317' 732005 223340
388 000320' 001300 000200 MWORD <CONT,SD0,OR,B=13,D=2,SELM,MGC=200> ; 13
389 000321' 732005 402340
390 000322' 001400 160000 MWORD <CJP,J=16,SAB,A=12,B=13,SMIN,CRY,CENA,CCFZ> ; 14
391 000323' 110525 420460
392 000324' 001501 010000 MWORD <JMAP,J=101,D=1> ; 15
393 000325' 001000 000040
394
395 ; Now loop till done
396
397 000326' 001600 050000 MWORD <RPCT,J=5,D=1> ; 16
398 000327' 001000 000220
399 000330' 001751 000000 MWORD <JMAP,J=5100,D=1> ; 17
400 000331' 001000 000040
401
402 ; Failed loading with R10 data (100)
403 ; Failed loading with LS data (101)
404
405 000332' 010052 000000 MWORD <ADDR=100,JMAP,J=5200,S0A,AND,B=11,D=2> ; 100
406 000333' 442004 400040
407 000334' 010100 000000 MWORD <CONT,S0A,AND,B=11,D=2> ; 101
408 000335' 442004 400340
409 000336' 010252 000000 MWORD <JMAP,J=5200,S0B,PLUS,D=2,B=11,CRY> ; 102
410 000337' 302004 400440
411
412 ; Routine to read 2901 Register 11,12,13
413
414 000340' 500050 012004 MWORD <ADDR=5000,JMAP,J=5001,S0A,A=11,OR,D=1,OENA,SELE,MGC=4>
415 000341' 431110 005040
416 000342' 500150 022004 MWORD <JMAP,J=5002,S0A,A=12,OR,D=1,OENA,SELE,MGC=4>
417 000343' 431120 005040
418 000344' 500250 022004 MWORD <JMAP,J=5002,S0A,A=13,OR,D=1,OENA,SELE,MGC=4>
419 000345' 431130 005040
420
421 ; Subroutine - Passed - Write 1 to bit 12 of CSR register
422
423 000346' 510000 000000 MWORD <ADDR=5100,CONT,SD0,AND,B=2,D=2> ; 5100
424 000347' 742001 000340
425 000350' 510100 000000 MWORD <CONT,S0B,PLUS,B=2,D=2,CRY> ; 5101
426 000351' 302001 000740
427 000352' 510200 260000 MWORD <LDCT,J=26> ; 5102
428 000353' 000000 000300
429 000354' 510351 030000 MWORD <RPCT,J=5103,SAB,PLUS,A=2,B=2,D=2> ; 5103
430 000355' 102021 000220
.MAIN MACRO %53A(1152) 10:53 16-Oct-84 Page 7-2
DFPTAA MAC 19-Feb-83 23:12 CBUS MODULE TESTS SEQ 1885
431 000356' 510400 002004 MWORD <CONT,S0A,A=2,OR,D=1,OENA,SELE,MGC=4> ; 5104
432 000357' 431020 005340
433 000360' 510551 070040 MWORD <CJP,J=5107,CENA,CCGC,D=1,SELE,MGC=40> ; 5105
434 000361' 001400 015060
435 000362' 510651 050000 MWORD <JMAP,J=5105,D=1> ; 5106
436 000363' 001000 000040
437 000364' 510700 000200 MWORD <CONT,S0A,A=1,OR,D=1,SELE,MGC=200> ; 5107
438 000365' 431010 005340
439 000366' 511051 100000 MWORD <JMAP,J=5110,D=1> ; 5110
440 000367' 001000 000040
441
442 ; Subroutine - Failed - Write 1 to bit 13 of CSR register
443
444 000370' 520000 000000 MWORD <ADDR=5200,CONT,SD0,AND,B=2,D=2> ; 5200
445 000371' 742001 000340
446 000372' 520100 000000 MWORD <CONT,S0B,PLUS,B=2,D=2,CRY> ; 5201
447 000373' 302001 000740
448 000374' 520200 250000 MWORD <LDCT,J=25> ; 5202
449 000375' 000000 000300
450 000376' 520352 030000 MWORD <RPCT,J=5203,SAB,PLUS,A=2,B=2,D=2> ; 5203
451 000377' 102021 000220
452 000400' 520400 002004 MWORD <CONT,S0A,A=2,OR,D=1,OENA,SELE,MGC=4> ; 5204
453 000401' 431020 005340
454 000402' 520552 070040 MWORD <CJP,J=5207,CENA,CCGC,D=1,SELE,MGC=40> ; 5205
455 000403' 001400 015060
456 000404' 520652 050000 MWORD <JMAP,J=5205,D=1> ; 5206
457 000405' 001000 000040
458 000406' 520700 000200 MWORD <CONT,S0A,A=1,OR,D=1,SELE,MGC=200> ; 5207
459 000407' 431010 005340
460 000410' 521052 100000 MWORD <JMAP,J=5210,D=1> ; 5210
461 000411' 001000 000040
462 000412' 777777 777777 -1
.MAIN MACRO %53A(1152) 10:53 16-Oct-84 Page 8
DFPTAA MAC 19-Feb-83 23:12 CBUS MODULE TESTS SEQ 1886
463
464 ;#********************************************************************
465 ;* Test 42 - PMUX Selected by MPCBUFTOPLOUT
466 ;
467 ; Description: This test verifies the select line of the PMUX.
468 ; A data pattern is written to the formatter and
469 ; the complement of that data pattern is written to
470 ; the PLOUT with MPCBUFTOPLOUT signal asserted. The
471 ; data written to the PLOUT is then verified.
472 ;
473 ; Procedure: KL> Port Clear
474 ; KL> Load test microcode
475 ;
476 ; KL> Single step 5 times from location 0
477 ; UC> Load formatter with 0's
478 ; UC> Load PLOUT with 1's
479 ; UC> Read PLOUT and put into EBUF
480 ; KL> Verify EBUF data
481 ;
482 ; KL> Single step 6 times from location 10
483 ; UC> Load formatter with 1's
484 ; UC> Load PLOUT with 0's
485 ; UC> Read PLOUT and put into EBUF
486 ; KL> Verify EBUF data
487 ;
488 ; Failure: ---
489 ;#********************************************************************
490
491 ; Test data
492
493 000413' 254 00 0 00 000423' TSTC42: JRST TG42 ; go start test
494 000414' 100604 000042 CBUS!NDMP!NDCB!ZCBUS!42 ; test mask
495 000415' 000454' 005035' T42M,,[ASCIZ ^PMUX Selected by MPCBUFTOPLOUT^]
496 000416' 005044' 000000 [EXP C8,MLAST!C22],,0
497 000417' 000000 000503' TSTC43 ; failure test table
498 000420' 000000 000572' TSTC44 ; ...
499 000421' 000000 002141' TSTC52
500 000422' 777777 777777 -1
501
502 ; Start test
503
504 000423' 201 00 0 00 000000' TG42: MOVEI ZA ; get address of module start
505 000424' 260 17 0 00 000174* GO TRACE ; handle trace output
506 000425' 201 01 0 00 000454' MOVEI 1,T42M ; set up microcode address
507 000426' 260 17 0 00 000176* GO TLOAD ; load/verify it
508 000427' 263 17 0 00 000000 RTN ; failed - exit test
509
510 ; Initialization
511
512 000430' 400 15 0 00 000000 TL42: SETZ ERFLG, ; clear error flag
513 000431' 260 17 0 00 000204* GO IPACLR ; clear port
514 000432' 402 00 0 00 000202* SETZM TSTSUB ; initialize subtest number
515 000433' 201 06 0 00 000445' MOVEI 6,TS42 ; get sstep table address
.MAIN MACRO %53A(1152) 10:53 16-Oct-84 Page 9
DFPTAA MAC 19-Feb-83 23:12 CBUS MODULE TESTS SEQ 1887
516
517 ; Loop on single step table entries
518
519 000434' 260 17 0 00 000000* TA42: GO BEXEC ; execute table entry
520 000435' 254 00 0 00 000444' JRST TX42 ; end of sstep table
521 000436' 254 00 0 00 000434' JRST TA42 ; keep looping after call
522 000437' 474 15 0 00 000000 SETO ERFLG, ; error - EBUF data incorrect
523
524 ; Handle error printouts and scope looping
525
526 000440' 027 00 0 00 000452' SCOPER MA42 ; print error message
527 000441' 254 00 0 00 000430' JRST TL42 ; loop on error
528 000442' 254 00 0 00 000444' JRST TX42 ; altmode exit
529 000443' 322 15 0 00 000434' JUMPE ERFLG,TA42 ; do next sstep table entry
530
531 ; End of test
532
533 000444' 263 17 0 00 000000 TX42: RTN ; return
534
535 ; Sstep table, with EBUF data, as: (CMD,#Steps,Start addr,End Addr,EBUF data)
536
537 000445' 100500 000004 TS42: ATABLE (SSSTRT,5,0,4,377)
538 000446' 000000 000377
539 000447' 100600 100015 ATABLE (SSSTRT,6,10,15,0)
540 000450' 000000 000000
541 000451' 000000 000000 ATABLE (SSLAST)
542
543 ; Error messages
544
545 000452' 140000 005046' MA42: MSG!TXNOT![ASCIZ /Incorrect data loaded into PLOUT (read and put into EBUF)/]
546 000453' 000000000000# LAST!CALL!TXALL!BBPNT ; print sequencer data
547
548 ; Microcode:
549
550 000454' 000000 012040 T42M: MWORD <ADDR=0,JMAP,J=1,S0A,AND,D=3,OENA,SELF,MGC=40> ; 0
551 000455' 443000 003040
552 000456' 000100 002040 MWORD <CONT,S0A,XNOR,D=1,OENA,SELM,MGC=40> ; 1
553 000457' 471000 002340
554 000460' 000200 000006 MWORD <CONT,SD0,D=1,SELP,MGC=6> ; 2
555 000461' 701000 001340
556 000462' 000300 000300 MWORD <CONT,SD0,OR,B=2,D=2,SELM,MGC=300> ; 3
557 000463' 732001 002340
558 000464' 000400 042004 MWORD <JMAP,J=4,S0A,A=2,D=1,OENA,SELE,MGC=4> ; 4
559 000465' 401020 005040
560
561 000466' 001000 110000 MWORD <ADDR=10,JMAP,J=11,S0A,AND,D=2> ; 10
562 000467' 442000 000040
563 000470' 001100 002040 MWORD <CONT,S0A,XNOR,D=3,OENA,SELF,MGC=40> ; 11
564 000471' 473000 003340
565 000472' 001200 002040 MWORD <CONT,S0A,XNOR,D=1,OENA,SELM,MGC=40> ; 12
566 000473' 471000 002340
567 000474' 001300 000006 MWORD <CONT,SD0,D=1,SELP,MGC=6> ; 13
568 000475' 701000 001340
569 000476' 001400 000300 MWORD <CONT,SD0,OR,B=2,D=2,SELM,MGC=300> ; 14
570 000477' 732001 002340
.MAIN MACRO %53A(1152) 10:53 16-Oct-84 Page 9-1
DFPTAA MAC 19-Feb-83 23:12 CBUS MODULE TESTS SEQ 1888
571 000500' 001500 152004 MWORD <JMAP,J=15,S0A,A=2,D=1,OENA,SELE,MGC=4> ; 15
572 000501' 401020 005040
573 000502' 777777 777777 -1
.MAIN MACRO %53A(1152) 10:53 16-Oct-84 Page 10
DFPTAA MAC 19-Feb-83 23:12 CBUS MODULE TESTS SEQ 1889
574
575 ;#********************************************************************
576 ;* Test 43 - PMUX Selected by MPCBUFTOPLOUT/MPZEROLFTNIB
577 ;
578 ; Description: This test verifies the select line of the PMUX.
579 ; A data pattern is written to the formatter and
580 ; the complement of that data pattern is written to
581 ; the PLOUT with MPCBUFTOPLOUT and MPZEROLFTNIB
582 ; signals asserted. The data written to the PLOUT
583 ; is then verified.
584 ;
585 ; Procedure: KL> Port Clear
586 ; KL> Load test microcode
587 ;
588 ; KL> Single step 5 times from location 0
589 ; UC> Load formatter with 0's
590 ; UC> Load PLOUT with 1's
591 ; UC> Read PLOUT and put into EBUF
592 ; KL> Verify EBUF data
593 ;
594 ; KL> Single step 6 times from location 10
595 ; UC> Load formatter with 1's
596 ; UC> Load PLOUT with 0's
597 ; UC> Read PLOUT and put into EBUF
598 ; KL> Verify EBUF data
599 ;
600 ; Failure: ---
601 ;#********************************************************************
602
603 ; Test data
604
605 000503' 254 00 0 00 000512' TSTC43: JRST TG43 ; go start test
606 000504' 100604 000043 CBUS!NDMP!NDCB!ZCBUS!43 ; test mask
607 000505' 000543' 005062' T43M,,[ASCIZ ^PMUX Selected by MPCBUFTOPLOUT/MPZEROLFTNIB^]
608 000506' 005044' 000000 [EXP C8,MLAST!C22],,0
609 000507' 000000 000572' TSTC44 ; failure test table
610 000510' 000000 002141' TSTC52 ; ...
611 000511' 777777 777777 -1
612
613 ; Start test
614
615 000512' 201 00 0 00 000000' TG43: MOVEI ZA ; get address of module start
616 000513' 260 17 0 00 000424* GO TRACE ; handle trace output
617 000514' 201 01 0 00 000543' MOVEI 1,T43M ; set up microcode address
618 000515' 260 17 0 00 000426* GO TLOAD ; load/verify it
619 000516' 263 17 0 00 000000 RTN ; failed - exit test
620
621 ; Initialization
622
623 000517' 400 15 0 00 000000 TL43: SETZ ERFLG, ; clear error flag
624 000520' 260 17 0 00 000431* GO IPACLR ; clear port
625 000521' 402 00 0 00 000432* SETZM TSTSUB ; initialize subtest number
626 000522' 201 06 0 00 000534' MOVEI 6,TS43 ; get sstep table address
.MAIN MACRO %53A(1152) 10:53 16-Oct-84 Page 11
DFPTAA MAC 19-Feb-83 23:12 CBUS MODULE TESTS SEQ 1890
627
628 ; Loop on single step table entries
629
630 000523' 260 17 0 00 000434* TA43: GO BEXEC ; execute table entry
631 000524' 254 00 0 00 000533' JRST TX43 ; end of sstep table
632 000525' 254 00 0 00 000523' JRST TA43 ; keep looping after call
633 000526' 474 15 0 00 000000 SETO ERFLG, ; error - EBUF data incorrect
634
635 ; Handle error printouts and scope looping
636
637 000527' 027 00 0 00 000541' SCOPER MA43 ; print error message
638 000530' 254 00 0 00 000517' JRST TL43 ; loop on error
639 000531' 254 00 0 00 000533' JRST TX43 ; altmode exit
640 000532' 322 15 0 00 000523' JUMPE ERFLG,TA43 ; do next sstep table entry
641
642 ; End of test
643
644 000533' 263 17 0 00 000000 TX43: RTN ; return
645
646 ; Sstep table, with EBUF data, as: (CMD,#Steps,Start addr,End Addr,EBUF data)
647
648 000534' 100500 000004 TS43: ATABLE (SSSTRT,5,0,4,377)
649 000535' 000000 000377
650 000536' 100600 100015 ATABLE (SSSTRT,6,10,15,0)
651 000537' 000000 000000
652 000540' 000000 000000 ATABLE (SSLAST)
653
654 ; Error messages
655
656 000541' 140000 005046' MA43: MSG!TXNOT![ASCIZ /Incorrect data loaded into PLOUT (read and put into EBUF)/]
657 000542' 000000000000# LAST!CALL!TXALL!BBPNT ; print sequencer data
658
659 ; Microcode:
660
661 000543' 000000 012041 T43M: MWORD <ADDR=0,JMAP,J=1,S0A,AND,D=3,OENA,SELF,MGC=41> ; 0
662 000544' 443000 003040
663 000545' 000100 002040 MWORD <CONT,S0A,XNOR,D=1,OENA,SELM,MGC=40> ; 1
664 000546' 471000 002340
665 000547' 000200 000006 MWORD <CONT,SD0,D=1,SELP,MGC=6> ; 2
666 000550' 701000 001340
667 000551' 000300 000300 MWORD <CONT,SD0,OR,B=2,D=2,SELM,MGC=300> ; 3
668 000552' 732001 002340
669 000553' 000400 042004 MWORD <JMAP,J=4,S0A,A=2,D=1,OENA,SELE,MGC=4> ; 4
670 000554' 401020 005040
671
672 000555' 001000 110000 MWORD <ADDR=10,JMAP,J=11,S0A,AND,D=2> ; 10
673 000556' 442000 000040
674 000557' 001100 002041 MWORD <CONT,S0A,XNOR,D=3,OENA,SELF,MGC=41> ; 11
675 000560' 473000 003340
676 000561' 001200 002040 MWORD <CONT,S0A,XNOR,D=1,OENA,SELM,MGC=40> ; 12
677 000562' 471000 002340
678 000563' 001300 000006 MWORD <CONT,SD0,D=1,SELP,MGC=6> ; 13
679 000564' 701000 001340
680 000565' 001400 000300 MWORD <CONT,SD0,OR,B=2,D=2,SELM,MGC=300> ; 14
681 000566' 732001 002340
.MAIN MACRO %53A(1152) 10:53 16-Oct-84 Page 11-1
DFPTAA MAC 19-Feb-83 23:12 CBUS MODULE TESTS SEQ 1891
682 000567' 001500 152004 MWORD <JMAP,J=15,S0A,A=2,D=1,OENA,SELE,MGC=4> ; 15
683 000570' 401020 005040
684 000571' 777777 777777 -1
.MAIN MACRO %53A(1152) 10:53 16-Oct-84 Page 12
DFPTAA MAC 19-Feb-83 23:12 CBUS MODULE TESTS SEQ 1892
685
686 ;#********************************************************************
687 ;* Test 44 - DMUX Selected Correctly
688 ;
689 ; Description: Verify that the DMUX can be selected correctly by
690 ; either asserting or not asserting 'MPCBUFTOFMTR'
691 ; signal.
692 ;
693 ; Procedure: KL> Port Clear
694 ; KL> Set up a CCW list to transfer 2 words
695 ; KL> Start up port
696 ;
697 ; UC> Read word from CBUS into CBIN
698 ; UC> Put 0's on the MBUS and load the formatter
699 ; UC> Verify data 0's
700 ; UC> Put 0's on the MBUS and load the formatter
701 ; with 'MPCBUFTOFMTR' set
702 ; UC> Verify data 1's
703 ;
704 ; UC> Read word from CBUS into CBIN
705 ; UC> Put 1's on the MBUS and load the formatter
706 ; UC> Verify data 1's
707 ; UC> Put 1's on the MBUS and load the formatter
708 ; with 'MPCBUFTOFMTR' set
709 ; UC> Verify data 0's
710 ;
711 ; UC> if passed - set bit 12 (DISABLE Complete)
712 ; UC> if failed - set bit 13 (ENABLE Complete)
713 ; Read CSR and determine test disposition
714 ;
715 ; Failure: ---
716 ;#********************************************************************
717
718 ; Test data
719
720 000572' 254 00 0 00 000603' TSTC44: JRST TG44 ; go start test
721 000573' 100604 000044 CBUS!NDMP!NDCB!ZCBUS!44 ; test mask
722 000574' 000654' 005073' T44M,,[ASCIZ ^DMUX Selected Correctly^]
723 000575' 005100' 005102' [EXP C8,MLAST!C18],,[EXP MLAST!C20]
724 000576' 000000 001005' TSTC45 ; failure test table
725 000577' 000000 001172' TSTC46 ; ...
726 000600' 000000 001326' TSTC47
727 000601' 000000 002141' TSTC52
728 000602' 777777 777777 -1
729
730 ; Start test
731
732 000603' 201 00 0 00 000000' TG44: MOVEI ZA ; get address of module start
733 000604' 260 17 0 00 000513* GO TRACE ; handle trace output
734 000605' 201 01 0 00 000654' MOVEI 1,T44M ; set up microcode address
735 000606' 260 17 0 00 000515* GO TLOAD ; load/verify it
736 000607' 263 17 0 00 000000 RTN ; failed - exit test
.MAIN MACRO %53A(1152) 10:53 16-Oct-84 Page 13
DFPTAA MAC 19-Feb-83 23:12 CBUS MODULE TESTS SEQ 1893
737
738 ; Initialization
739
740 000610' 400 15 0 00 000000 TL44: SETZ ERFLG, ; clear error flag
741 000611' 201 06 0 00 000626' MOVEI 6,TS44 ; get test table address
742 000612' 402 00 0 00 000521* SETZM TSTSUB ; initialize subtest number
743 000613' 402 00 0 00 000000* SETZM CSTATF ; clear check logout status flag
744
745 ; Loop on test execute table entries
746
747 000614' 260 17 0 00 000520* TA44: GO IPACLR ; clear port
748 000615' 260 17 0 00 000205* TB44: GO TEXEC ; execute table entry
749 000616' 254 00 0 00 000625' JRST TX44 ; end of test execute table
750 000617' 254 00 0 00 000615' JRST TB44 ; keep looping after call
751 000620' 474 15 0 00 000000 SETO ERFLG, ; error occurred
752
753 ; Handle error printouts and scope looping
754
755 000621' 027 00 0 00 000652' SCOPER MA44 ; print error message
756 000622' 254 00 0 00 000610' JRST TL44 ; loop on error
757 000623' 254 00 0 00 000625' JRST TX44 ; altmode exit
758 000624' 322 15 0 00 000614' JUMPE ERFLG,TA44 ; do next test execute table entry
759
760 ; End of test
761
762 000625' 263 17 0 00 000000 TX44: RTN ; return
763
764 ; Test Execute Table, as: (CMD,parameters)
765
766 000626' 140000 000633' TS44: TTABLE (TCALL,TS44DA) ; set up data transfer
767 000627' 040000 005002 TTABLE (TSTART,5002) ; start up port
768 000630' 240002 000000 TTABLE (TCHECK,2) ; check if completed
769 000631' 340000 000000 TTABLE (TEXIT) ; exit if error yet
770 000632' 000000 000000 TTABLE (TLAST) ; end of table
771
772 ; Set up data transfer
773
774 000633' 201 01 0 00 005000 TS44DA: MOVEI 1,5000 ; get start address
775 000634' 242 01 0 00 000001 LSH 1,1 ; position correctly
776 000635' 260 17 0 00 000252* GO LDRAR ; load the register
777 000636' 201 01 0 00 020010 MOVEI 1,SINCYC!MPRUN ; get single step data
778 000637' 260 17 0 00 000254* GO LDCSR ; single step once
779 000640' 260 17 0 00 000637* GO LDCSR ; single step once more
780 000641' 476 00 0 00 000000* SETOM BUFF ; initialize data words
781 000642' 402 00 0 00 000000# SETZM BUFF+1 ; ...
782 000643' 200 01 0 00 005103' MOVE 1,[CBUFSZ,,CBUF] ; get pointer to control buffer
783 000644' 260 17 0 00 000000* GO CHINIT ; initialize software
784 000645' 551 01 0 00 000641* HRRZI 1,BUFF ; buffer address
785 000646' 201 02 0 00 000002 MOVEI 2,2 ; word count
786 000647' 400 03 0 00 000000 SETZ 3, ; clear zero fill specifier
787 000650' 260 17 0 00 000000* GO GENCCW ; generate a CCW list
788 000651' 263 17 0 00 000000 RTN ; return
.MAIN MACRO %53A(1152) 10:53 16-Oct-84 Page 14
DFPTAA MAC 19-Feb-83 23:12 CBUS MODULE TESTS SEQ 1894
789
790 ; Error messages
791
792 000652' 140000 005104' MA44: MSG!TXNOT![ASCIZ /Formatter not loaded correctly through DMUX/]
793 000653' 000000000000# LAST!CALL!TXALL!TTPNT ; print test data
794
795 ; Microcode
796
797 ; Load fmtr through CBUF 0's, read fmtr and verify
798
799 000654' 000001 000000 T44M: MWORD <ADDR=0,CJS,J=100,S0A,AND,B=3,D=2> ; 0
800 000655' 442001 400020
801 000656' 000100 002040 MWORD <CONT,S0A,OR,A=3,D=1,OENA,SELF,MGC=40> ; 1
802 000657' 431030 003340
803 000660' 000200 000200 MWORD <CONT,SD0,OR,B=2,D=2,SELM,MGC=200> ; 2
804 000661' 732001 002340
805 000662' 000300 050000 MWORD <CJP,J=5,S0A,A=2,OR,D=1,CENA,CCFZ> ; 3
806 000663' 431420 020060
807 000664' 000452 000000 MWORD <JMAP,J=5200,D=1> ; 4
808 000665' 001000 000040
809
810 ; Put 0's on MBUS, load fmtr with CBIN, read fmtr and verify
811
812 000666' 000500 002004 MWORD <CONT,S0A,OR,A=3,D=1,OENA,SELC,MGC=4> ; 5
813 000667' 431030 004340
814 000670' 000600 000200 MWORD <CONT,SD0,OR,B=2,D=2,SELM,MGC=200> ; 6
815 000671' 732001 002340
816 000672' 000700 110000 MWORD <CJP,J=11,S0A,A=2,XNOR,D=1,CENA,CCFZ> ; 7
817 000673' 471420 020060
818 000674' 001052 000000 MWORD <JMAP,J=5200,D=1> ; 10
819 000675' 001000 000040
820
821 ; Load fmtr through CBUF 1's, read fmtr and verify
822
823 000676' 001101 010000 MWORD <CJS,J=101,S0B,XNOR,B=3,D=2> ; 11
824 000677' 372001 400020
825 000700' 001200 002040 MWORD <CONT,S0A,OR,A=3,D=1,OENA,SELF,MGC=40> ; 12
826 000701' 431030 003340
827 000702' 001300 000200 MWORD <CONT,SD0,OR,B=2,D=2,SELM,MGC=200> ; 13
828 000703' 732001 002340
829 000704' 001400 160000 MWORD <CJP,J=16,S0A,A=2,XNOR,D=1,CENA,CCFZ> ; 14
830 000705' 471420 020060
831 000706' 001552 000000 MWORD <JMAP,J=5200,D=1> ; 15
832 000707' 001000 000040
833
834 ; Put 1's on MBUS, load fmtr with CBIN, read fmtr and verify
835
836 000710' 001600 002004 MWORD <CONT,S0A,XNOR,A=3,D=1,OENA,SELC,MGC=4> ; 16
837 000711' 471030 004340
838 000712' 001700 000200 MWORD <CONT,SD0,OR,B=2,D=2,SELM,MGC=200> ; 17
839 000713' 732001 002340
840 000714' 002000 220000 MWORD <CJP,J=22,S0A,A=2,OR,D=1,CENA,CCFZ> ; 20
841 000715' 431420 020060
842 000716' 002152 000000 MWORD <JMAP,J=5200,D=1> ; 21
843 000717' 001000 000040
.MAIN MACRO %53A(1152) 10:53 16-Oct-84 Page 14-1
DFPTAA MAC 19-Feb-83 23:12 CBUS MODULE TESTS SEQ 1895
844
845 ; All done
846
847 000720' 002251 000000 MWORD <JMAP,J=5100,D=1> ; 22
848 000721' 001000 000040
849
850 ; Read a word from CBUS into CBIN
851
852 000722' 010000 000200 MWORD <ADDR=100,CONT,D=1,SELC,MGC=200> ; 100
853 000723' 001000 004340
854 000724' 010101 030000 MWORD <CJP,J=103,D=1,CENA,CCCA> ; 101
855 000725' 001400 000060
856 000726' 010201 010000 MWORD <JMAP,J=101,D=1> ; 102
857 000727' 001000 000040
858 000730' 010300 000000 MWORD <CRTN,D=1> ; 103
859 000731' 001000 000240
860
861 ; Initialization steps
862
863 000732' 500050 010100 MWORD <ADDR=5000,JMAP,J=5001,SELC,MGC=100> ; 5000
864 000733' 000000 004040
865 000734' 500150 010020 MWORD <JMAP,J=5001,SELM,MGC=20> ; 5001
866 000735' 000000 002040
867
868 000736' 500200 000000 MWORD <JZ> ; 5002
869 000737' 000000 000000
870
871 ; Subroutine - Passed - Write 1 to bit 12 of CSR register
872
873 000740' 510000 000000 MWORD <ADDR=5100,CONT,SD0,AND,B=2,D=2> ; 5100
874 000741' 742001 000340
875 000742' 510100 000000 MWORD <CONT,S0B,PLUS,B=2,D=2,CRY> ; 5101
876 000743' 302001 000740
877 000744' 510200 260000 MWORD <LDCT,J=26> ; 5102
878 000745' 000000 000300
879 000746' 510351 030000 MWORD <RPCT,J=5103,SAB,PLUS,A=2,B=2,D=2> ; 5103
880 000747' 102021 000220
881 000750' 510400 002004 MWORD <CONT,S0A,A=2,OR,D=1,OENA,SELE,MGC=4> ; 5104
882 000751' 431020 005340
883 000752' 510551 070040 MWORD <CJP,J=5107,CENA,CCGC,D=1,SELE,MGC=40> ; 5105
884 000753' 001400 015060
885 000754' 510651 050000 MWORD <JMAP,J=5105,D=1> ; 5106
886 000755' 001000 000040
887 000756' 510700 000200 MWORD <CONT,S0A,A=1,OR,D=1,SELE,MGC=200> ; 5107
888 000757' 431010 005340
889 000760' 511051 100000 MWORD <JMAP,J=5110,D=1> ; 5110
890 000761' 001000 000040
891
892 ; Subroutine - Failed - Write 1 to bit 13 of CSR register
893
894 000762' 520000 000000 MWORD <ADDR=5200,CONT,SD0,AND,B=2,D=2> ; 5200
895 000763' 742001 000340
896 000764' 520100 000000 MWORD <CONT,S0B,PLUS,B=2,D=2,CRY> ; 5201
897 000765' 302001 000740
898 000766' 520200 250000 MWORD <LDCT,J=25> ; 5202
.MAIN MACRO %53A(1152) 10:53 16-Oct-84 Page 14-2
DFPTAA MAC 19-Feb-83 23:12 CBUS MODULE TESTS SEQ 1896
899 000767' 000000 000300
900 000770' 520352 030000 MWORD <RPCT,J=5203,SAB,PLUS,A=2,B=2,D=2> ; 5203
901 000771' 102021 000220
902 000772' 520400 002004 MWORD <CONT,S0A,A=2,OR,D=1,OENA,SELE,MGC=4> ; 5204
903 000773' 431020 005340
904 000774' 520552 070040 MWORD <CJP,J=5207,CENA,CCGC,D=1,SELE,MGC=40> ; 5205
905 000775' 001400 015060
906 000776' 520652 050000 MWORD <JMAP,J=5205,D=1> ; 5206
907 000777' 001000 000040
908 001000' 520700 000200 MWORD <CONT,S0A,A=1,OR,D=1,SELE,MGC=200> ; 5207
909 001001' 431010 005340
910 001002' 521052 100000 MWORD <JMAP,J=5210,D=1> ; 5210
911 001003' 001000 000040
912 001004' 777777 777777 -1
.MAIN MACRO %53A(1152) 10:53 16-Oct-84 Page 15
DFPTAA MAC 19-Feb-83 23:12 CBUS MODULE TESTS SEQ 1897
913
914 ;#********************************************************************
915 ;* Test 45 - CBUS Parity Checking - CBUS to CBUS Module
916 ;
917 ; Description: This test reads a pattern of floating 1's over
918 ; the CBUS from KL memory, verifying with each word
919 ; transfered that a parity error has not occurred.
920 ;
921 ; Procedure: KL> Port Clear
922 ; KL> Set up a CCW list to transfer 36 words
923 ; KL> Start up port
924 ; UC> Initialize word count
925 ; UC> Read a word from CBUS and put in 2901 R3
926 ; UC> Repeat until 'Last Wd' is seen:
927 ; Read a word
928 ; Verify that a parity error has not occurred
929 ; If error - put word in error into R3
930 ; - put word count in EBUF
931 ; - abort test
932 ; If ok - do next word
933 ; UC> Assert STOP and STORE and put word count into EBUF
934 ; KL> Stop microcode, read EBUF - verify word count
935 ; KL> If stopped at wrong location, read R3 to get
936 ; actual data that resulted in parity error.
937 ; KL> Verify data transfer completed ok.
938 ;
939 ; Failure: ---
940 ;#********************************************************************
941
942 ; Test data
943
944 001005' 254 00 0 00 001014' TSTC45: JRST TG45 ; go start test
945 001006' 100604 000045 CBUS!NDMP!NDCB!ZCBUS!45 ; test mask
946 001007' 001111' 005115' T45M,,[ASCIZ ^CBUS Parity Checking - CBUS to CBUS Module^]
947 001010' 005126' 005130' [EXP C17,MLAST!C9],,[EXP MLAST!C7]
948 001011' 000000 001172' TSTC46 ; failure test table
949 001012' 000000 001326' TSTC47 ; ...
950 001013' 777777 777777 -1
951
952 ; Start test
953
954 001014' 201 00 0 00 000000' TG45: MOVEI ZA ; get address of module start
955 001015' 260 17 0 00 000604* GO TRACE ; handle trace output
956 001016' 201 01 0 00 001111' MOVEI 1,T45M ; set up microcode address
957 001017' 260 17 0 00 000606* GO TLOAD ; load/verify it
958 001020' 263 17 0 00 000000 RTN ; failed - exit test
959
960 ; Initialization
961
962 001021' 400 15 0 00 000000 TL45: SETZ ERFLG, ; clear error flag
963 001022' 201 06 0 00 001036' MOVEI 6,TS45 ; get test table address
964 001023' 402 00 0 00 000612* SETZM TSTSUB ; initialize subtest number
.MAIN MACRO %53A(1152) 10:53 16-Oct-84 Page 16
DFPTAA MAC 19-Feb-83 23:12 CBUS MODULE TESTS SEQ 1898
965
966 ; Loop on test execute table entries
967
968 001024' 260 17 0 00 000614* TA45: GO IPACLR ; clear port
969 001025' 260 17 0 00 000000* TB45: GO CEXEC ; execute table entry
970 001026' 254 00 0 00 001035' JRST TX45 ; end of test execute table
971 001027' 254 00 0 00 001025' JRST TB45 ; keep looping after call
972 001030' 474 15 0 00 000000 SETO ERFLG, ; error occurred
973
974 ; Handle error printouts and scope looping
975
976 001031' 027 00 0 00 001052' SCOPER MA45 ; print error message
977 001032' 254 00 0 00 001021' JRST TL45 ; loop on error
978 001033' 254 00 0 00 001035' JRST TX45 ; altmode exit
979 001034' 322 15 0 00 001024' JUMPE ERFLG,TA45 ; do next test execute table entry
980
981 ; End of test
982
983 001035' 263 17 0 00 000000 TX45: RTN ; return
984
985 ; Data Test Execute Table, as: (CMD,parameters)
986
987 001036' 100120 000044 TS45: CTABLE (CSETWR,120,^D36) ; set up write (36 words)
988 001037' 200000 001000 CTABLE (CSTART,1000) ; start up port
989 001040' 340010 000000 CTABLE (CWAIT,10,0) ; check if completed
990 001041' 240000 001043' CTABLE (CCALL,TS45CH) ; check results
991 001042' 000000 000000 CTABLE (CLAST) ; end of table
992
993 ; Check results
994
995 001043' 260 17 0 00 001055' TS45CH: GO MA45CH ; get additional data
996 001044' 200 01 0 00 000000* MOVE 1,CEBUFA ; get word count
997 001045' 302 01 0 00 000044 CAIE 1,^D36 ; correct?
998 001046' 474 15 0 00 000000 SETO ERFLG, ; no - set error flag
999 001047' 350 00 0 17 777772 AOS -6(P) ; set up error return
1000 001050' 350 00 0 17 777772 AOS -6(P) ; set up error return
1001 001051' 263 17 0 00 000000 RTN ; return
1002
1003 ; Error messages
1004
1005 001052' 140000 005131' MA45: MSG!TXNOT![ASCIZ /Parity error detected in data transfer/]
1006 001053' 240000 001055' CALL!TXNOT!MA45CH ; check other results
1007 001054' 000000000000# LAST!CALL!TXALL!CCPNT ; print test data
.MAIN MACRO %53A(1152) 10:53 16-Oct-84 Page 17
DFPTAA MAC 19-Feb-83 23:12 CBUS MODULE TESTS SEQ 1899
1008
1009 ; Check results - first the word count left in the EBUF
1010
1011 001055' 322 15 0 00 001067' MA45CH: JUMPE ERFLG,MA45C0 ; no error yet? - continue
1012 001056' 200 01 0 00 001044* MOVE 1,CEBUFA ; get word count
1013 001057' 306 01 0 00 000044 CAIN 1,^D36 ; correct?
1014 001060' 254 00 0 00 001055' JRST MA45CH0 ; yes - continue
1015 001061' 331 00 0 00 001056* SKIPL CEBUFA
1016 JRST [TMSGC <Port word count error: >
1017 TMSGC < Correct: 36.>
1018 TMSGC < Actual:>
1019 PDEC 6,CEBUFA ; print it
1020 TMSG <.>
1021 001062' 254 00 0 00 005157' JRST MA45C0]
1022 001063' 037 00 0 00 005165' TMSGC <Parity error occurred on word #>
1023 001064' 210 00 0 00 001061* MOVN CEBUFA
1024 001065' 037 15 0 00 000000 PNTDEC
1025 001066' 037 00 0 00 005156' TMSG <.>
1026
1027 ; Then the correct/actual data being read
1028
1029 001067' 400 01 0 00 000000 MA45C0: SETZ 1, ; ensure the port is
1030 001070' 260 17 0 00 000640* GO LDCSR ; stopped
1031 001071' 201 01 0 00 000200 MOVEI 1,200 ; get address to get R3
1032 001072' 242 01 0 00 000001 LSH 1,1 ; position correctly
1033 001073' 260 17 0 00 000635* GO LDRAR ; load RAR register
1034 001074' 201 01 0 00 000010 MOVEI 1,MPRUN ; set up initial CSR data
1035 001075' 260 17 0 00 001070* GO LDCSR ; write CSR register
1036 001076' 201 01 0 00 200000 MOVEI 1,TSTEBF ; set up CSR to read EBUF
1037 001077' 260 17 0 00 001075* GO LDCSR ; write it
1038 001100' 260 17 0 00 000255* GO RDEBUF ; get EBUF data (actual)
1039 001101' 202 01 0 00 005722' MOVEM 1,SAVDA1# ; save it
1040 001102' 400 01 0 00 000000 SETZ 1, ; ensure the port is
1041 001103' 260 17 0 00 001077* GO LDCSR ; stopped
1042 001104' 322 15 0 00 005174' JUMPE ERFLG,[RTN] ; no error yet? - continue
1043 001105' 037 00 0 00 005175' TMSGC <Word with parity error: >
1044 001106' 200 00 0 00 005722' MOVE SAVDA1 ; get data
1045 001107' 037 13 0 00 000000 PNTHW ; print it
1046 001110' 263 17 0 00 000000 RTN ; return
.MAIN MACRO %53A(1152) 10:53 16-Oct-84 Page 18
DFPTAA MAC 19-Feb-83 23:12 CBUS MODULE TESTS SEQ 1900
1047
1048 ; Microcode - Read each word
1049
1050 001111' 000000 010000 T45M: MWORD <ADDR=0,JMAP,J=1,S0B,AND,B=5,D=2> ; 0
1051 001112' 342002 400040
1052 001113' 000101 000000 MWORD <CJS,J=100,D=1> ; 1
1053 001114' 001000 000020
1054 001115' 000200 040000 MWORD <JMAP,J=4,D=1> ; 2
1055 001116' 001000 000040
1056 001117' 000301 010000 MWORD <CJS,J=101,D=1> ; 3
1057 001120' 001000 000020
1058 001121' 000400 070000 MWORD <CJP,J=7,D=1,CENA,CCCP> ; 4
1059 001122' 001400 140060
1060 001123' 000500 120000 MWORD <CJP,J=12,D=1,CENA,CCLW> ; 5
1061 001124' 001400 170060
1062 001125' 000600 030000 MWORD <JMAP,J=3> ; 6
1063 001126' 000000 000040
1064
1065 ; Parity error occurred - set STOP and STORE and write word count to EBUF
1066
1067 001127' 000700 000140 MWORD <CONT,SELC,MGC=140> ; 7
1068 001130' 000000 004340
1069 001131' 001000 002004 MWORD <CONT,S0A,XNOR,A=5,D=1,OENA,SELE,MGC=4> ; 10
1070 001132' 471050 005340
1071 001133' 001100 110000 MWORD <JMAP,J=11> ; 11
1072 001134' 000000 000040
1073
1074 ; All done - set STOP and STORE and write word count to EBUF
1075
1076 001135' 001200 000140 MWORD <CONT,SELC,MGC=140> ; 12
1077 001136' 000000 004340
1078 001137' 001300 002004 MWORD <CONT,S0A,OR,A=5,D=1,OENA,SELE,MGC=4> ; 13
1079 001140' 431050 005340
1080 001141' 001400 140000 MWORD <JMAP,J=14> ; 14
1081 001142' 000000 000040
1082
1083 ; Routine to read a word from CBUS, through formatter into R3
1084 ; (If this routine is started at 101, then the next word from
1085 ; the CBUS is read).
1086
1087 001143' 010000 000200 MWORD <ADDR=100,CONT,D=1,SELC,MGC=200> ; 100
1088 001144' 001000 004340
1089 001145' 010101 030000 MWORD <CJP,J=103,D=1,CENA,CCCA> ; 101
1090 001146' 001400 000060
1091 001147' 010201 010000 MWORD <JMAP,J=101,D=1> ; 102
1092 001150' 001000 000040
1093 001151' 010300 000004 MWORD <CONT,D=1,SELC,MGC=4> ; 103
1094 001152' 001000 004340
1095 001153' 010400 000200 MWORD <CONT,SD0,OR,B=3,D=2,SELM,MGC=200> ; 104
1096 001154' 732001 402340
1097 001155' 010500 000000 MWORD <CRTN,S0B,B=5,PLUS,CRY,D=2> ; 105
1098 001156' 302002 400640
1099
1100 ; Routine to read R3 and place in EBUF
1101
.MAIN MACRO %53A(1152) 10:53 16-Oct-84 Page 18-1
DFPTAA MAC 19-Feb-83 23:12 CBUS MODULE TESTS SEQ 1901
1102 001157' 020002 012004 MWORD <ADDR=200,JMAP,J=201,S0A,A=3,OR,OENA,D=1,SELE,MGC=4>
1103 001160' 431030 005040
1104 001161' 020102 010000 MWORD <JMAP,J=201> ; 201
1105 001162' 000000 000040
1106
1107 ; Initialization
1108
1109 001163' 100000 000020 MWORD <ADDR=1000,JZ,SELM,MGC=20> ; 1000
1110 001164' 000000 002000
1111
1112 ; Initialization step
1113
1114 001165' 500050 010100 MWORD <ADDR=5000,JMAP,J=5001,SELC,MGC=100> ; 5000
1115 001166' 000000 004040
1116 001167' 500150 010020 MWORD <JMAP,J=5001,SELM,MGC=20> ; 5001
1117 001170' 000000 002040
1118 001171' 777777 777777 -1
.MAIN MACRO %53A(1152) 10:53 16-Oct-84 Page 19
DFPTAA MAC 19-Feb-83 23:12 CBUS MODULE TESTS SEQ 1902
1119
1120 ;#********************************************************************
1121 ;* Test 46 - CBUS Parity Checking - CBUS Module to CBUS
1122 ;
1123 ; Description: This test writes a pattern of floating 1's over
1124 ; the CBUS, verifying with each word transfered
1125 ; that a parity error has not occurred.
1126 ;
1127 ; Procedure: KL> Port Clear
1128 ; KL> Set up a CCW list to transfer 36 words
1129 ; KL> Start up port
1130 ; UC> Initialize word count/data pattern
1131 ; UC> Write 36 words over CBUS to KL10 memory
1132 ; UC> Assert STOP and STORE and put word count into EBUF
1133 ; KL> Stop microcode, read EBUF - verify word count
1134 ; KL> If stopped at wrong location, read R3 to get
1135 ; actual data that resulted in parity error.
1136 ; KL> Verify data transfer completed ok, particularly
1137 ; the MB PE bit that should not be set in the channel
1138 ; status word.
1139 ;
1140 ; Failure: ---
1141 ;#********************************************************************
1142
1143 ; Test data
1144
1145 001172' 254 00 0 00 001200' TSTC46: JRST TG46 ; go start test
1146 001173' 100604 000046 CBUS!NDMP!NDCB!ZCBUS!46 ; test mask
1147 001174' 001265' 005203' T46M,,[ASCIZ ^CBUS Parity Checking - CBUS Module to CBUS^]
1148 001175' 005126' 005130' [EXP C17,MLAST!C9],,[EXP MLAST!C7]
1149 001176' 000000 001326' TSTC47 ; failure test table
1150 001177' 777777 777777 -1 ; ...
1151
1152 ; Start test
1153
1154 001200' 201 00 0 00 000000' TG46: MOVEI ZA ; get address of module start
1155 001201' 260 17 0 00 001015* GO TRACE ; handle trace output
1156 001202' 201 01 0 00 001265' MOVEI 1,T46M ; set up microcode address
1157 001203' 260 17 0 00 001017* GO TLOAD ; load/verify it
1158 001204' 263 17 0 00 000000 RTN ; failed - exit test
1159
1160 ; Initialization
1161
1162 001205' 400 15 0 00 000000 TL46: SETZ ERFLG, ; clear error flag
1163 001206' 201 06 0 00 001222' MOVEI 6,TS46 ; get test table address
1164 001207' 402 00 0 00 001023* SETZM TSTSUB ; initialize subtest number
.MAIN MACRO %53A(1152) 10:53 16-Oct-84 Page 20
DFPTAA MAC 19-Feb-83 23:12 CBUS MODULE TESTS SEQ 1903
1165
1166 ; Loop on test execute table entries
1167
1168 001210' 260 17 0 00 001024* TA46: GO IPACLR ; clear port
1169 001211' 260 17 0 00 001025* TB46: GO CEXEC ; execute table entry
1170 001212' 254 00 0 00 001221' JRST TX46 ; end of test execute table
1171 001213' 254 00 0 00 001211' JRST TB46 ; keep looping after call
1172 001214' 474 15 0 00 000000 SETO ERFLG, ; error occurred
1173
1174 ; Handle error printouts and scope looping
1175
1176 001215' 027 00 0 00 001236' SCOPER MA46 ; print error message
1177 001216' 254 00 0 00 001205' JRST TL46 ; loop on error
1178 001217' 254 00 0 00 001221' JRST TX46 ; altmode exit
1179 001220' 322 15 0 00 001210' JUMPE ERFLG,TA46 ; do next test execute table entry
1180
1181 ; End of test
1182
1183 001221' 263 17 0 00 000000 TX46: RTN ; return
1184
1185 ; Data Test Execute Table, as: (CMD,parameters)
1186
1187 001222' 040120 000044 TS46: CTABLE (CSETRD,120,^D36) ; set up write (36 words)
1188 001223' 200000 001000 CTABLE (CSTART,1000) ; start up port
1189 001224' 340010 000000 CTABLE (CWAIT,10,0) ; check if completed
1190 001225' 240000 001227' CTABLE (CCALL,TS46CH) ; check results
1191 001226' 000000 000000 CTABLE (CLAST) ; end of table
1192
1193 ; Check results
1194
1195 001227' 260 17 0 00 001241' TS46CH: GO MA46CH ; get additional data
1196 001230' 200 01 0 00 001064* MOVE 1,CEBUFA ; get word count
1197 001231' 302 01 0 00 000044 CAIE 1,^D36 ; correct?
1198 001232' 474 15 0 00 000000 SETO ERFLG, ; no - set error flag
1199 001233' 350 00 0 17 777772 AOS -6(P) ; set up error return
1200 001234' 350 00 0 17 777772 AOS -6(P) ; set up error return
1201 001235' 263 17 0 00 000000 RTN ; return
1202
1203 ; Error messages
1204
1205 001236' 140000 005214' MA46: MSG!TXNOT![ASCIZ /Data transfer test error detected/]
1206 001237' 240000 001241' CALL!TXNOT!MA46CH ; check other results
1207 001240' 000000000000# LAST!CALL!TXALL!CCPNT ; print test data
.MAIN MACRO %53A(1152) 10:53 16-Oct-84 Page 21
DFPTAA MAC 19-Feb-83 23:12 CBUS MODULE TESTS SEQ 1904
1208
1209 ; Check results - first the word count left in the EBUF
1210
1211 001241' 322 15 0 00 001252' MA46CH: JUMPE ERFLG,MA46C0 ; no error yet? - continue
1212 001242' 200 01 0 00 001230* MOVE 1,CEBUFA ; get word count
1213 001243' 306 01 0 00 000044 CAIN 1,^D36 ; correct?
1214 001244' 254 00 0 00 001252' JRST MA46C0 ; yes - continue
1215 001245' 037 00 0 00 005141' TMSGC <Port word count error: >
1216 001246' 037 00 0 00 005147' TMSGC < Correct: 36.>
1217 001247' 037 00 0 00 005153' TMSGC < Actual:>
1218 001250' 006 06 0 00 001242* PDEC 6,CEBUFA ; print it
1219 001251' 037 00 0 00 005156' TMSG <.>
1220
1221 ; Check for data buffer compare error
1222
1223 001252' 200 01 0 00 005223' MA46C0: MOVE 1,[-1] ; set to 'read - don't report errors'
1224 001253' 201 02 0 00 000044 MOVEI 2,^D36 ; get buffer length
1225 001254' 260 17 0 00 000000* GO BUFCOM ; do the compare
1226 001255' 202 01 0 00 005724' MOVEM 1,SAVNUM# ; save number of data compare errors
1227 001256' 332 00 0 00 000015 SKIPE ERFLG ; error yet?
1228 001257' 336 00 0 00 000001 SKIPN 1 ; any words in error?
1229 001260' 263 17 0 00 000000 RTN ; no - return
1230 001261' 201 01 0 00 000001 MOVEI 1,1 ; set to 'read - report errors'
1231 001262' 201 02 0 00 000044 MOVEI 2,^D36 ; get buffer length
1232 001263' 260 17 0 00 001254* GO BUFCOM ; do the compare/print errors
1233 001264' 263 17 0 00 000000 RTN ; done - return
.MAIN MACRO %53A(1152) 10:53 16-Oct-84 Page 22
DFPTAA MAC 19-Feb-83 23:12 CBUS MODULE TESTS SEQ 1905
1234
1235 ; Microcode
1236
1237 ; Init word count and data pattern
1238
1239 001265' 000000 010000 T46M: MWORD <ADDR=0,JMAP,J=1,S0B,AND,B=5,D=2> ; 0
1240 001266' 342002 400040
1241 001267' 000100 000000 MWORD <CONT,S0A,A=5,B=4,PLUS,CRY,D=2> ; 1
1242 001270' 402052 000740
1243
1244 ; Write all the words specified by the CCW list
1245
1246 001271' 000200 000220 MWORD <CONT,D=1,SELC,MGC=220> ; 2
1247 001272' 001000 004340
1248 001273' 000300 050000 MWORD <CJP,J=5,D=1,CENA,CCCA> ; 3
1249 001274' 001400 000060
1250 001275' 000400 030000 MWORD <JMAP,J=3,D=1> ; 4
1251 001276' 001000 000040
1252 001277' 000500 002040 MWORD <CONT,S0A,OR,A=4,D=1,OENA,SELF,MGC=40> ; 5
1253 001300' 431040 003340
1254 001301' 000600 000002 MWORD <CONT,S0B,PLUS,B=5,D=2,CRY,SELC,MGC=2> ; 6
1255 001302' 302002 404740
1256 001303' 000700 000000 MWORD <CONT,S0B,OR,B=4,D=7> ; 7
1257 001304' 337002 000340
1258 001305' 001000 120000 MWORD <CJP,J=12,S0B,OR,B=4,D=1,CENA,CCFZ> ; 10
1259 001306' 331402 020060
1260 001307' 001100 030000 MWORD <JMAP,J=3> ; 11
1261 001310' 000000 000040
1262
1263 ; All done - set STOP and STORE
1264
1265 001311' 001200 000140 MWORD <CONT,SELC,MGC=140> ; 12
1266 001312' 000000 004340
1267 001313' 001300 142004 MWORD <JMAP,J=14,S0A,A=5,OR,OENA,D=1,SELE,MGC=4> ; 13
1268 001314' 431050 005040
1269 001315' 001400 140000 MWORD <JMAP,J=14> ; 14
1270 001316' 000000 000040
1271
1272 ; Initialization
1273
1274 001317' 100000 000020 MWORD <ADDR=1000,JZ,SELM,MGC=20> ; 1000
1275 001320' 000000 002000
1276
1277 ; Initialization step
1278
1279 001321' 500050 010100 MWORD <ADDR=5000,JMAP,J=5001,SELC,MGC=100> ; 5000
1280 001322' 000000 004040
1281 001323' 500150 010020 MWORD <JMAP,J=5001,SELM,MGC=20> ; 5001
1282 001324' 000000 002040
1283 001325' 777777 777777 -1
.MAIN MACRO %53A(1152) 10:53 16-Oct-84 Page 23
DFPTAA MAC 19-Feb-83 23:12 CBUS MODULE TESTS SEQ 1906
1284
1285 ;#********************************************************************
1286 ;* Test 47 - CBUS Parity Checking - CBUS to CBUS Module
1287 ;
1288 ; Description: This test reads a pattern of floating 1's over
1289 ; the CBUS from KL memory, verifying with each word
1290 ; transfered that a parity error has occurred.
1291 ;
1292 ; Procedure: KL> Port Clear
1293 ; KL> Set up a CCW list to transfer 36 words
1294 ; KL> Start up port
1295 ; UC> Initialize word count
1296 ; UC> Read a word from CBUS and put in 2901 R3
1297 ; UC> Repeat until 'Last Wd' is seen:
1298 ; Read a word
1299 ; Verify that a parity error has occurred
1300 ; If no - put word in error into R3
1301 ; - put word count in EBUF
1302 ; - abort test
1303 ; If yes - do next word
1304 ; UC> Assert STOP and STORE and put word count into EBUF
1305 ; KL> Stop microcode, read EBUF - verify word count
1306 ; KL> If stopped at wrong location, read R3 to get
1307 ; actual data that resulted in no parity error.
1308 ; KL> Verify data transfer completed ok.
1309 ;
1310 ; Failure: ---
1311 ;#********************************************************************
1312
1313 ; Test data
1314
1315 001326' 254 00 0 00 001334' TSTC47: JRST TG47 ; go start test
1316 001327' 100604 000047 CBUS!NDMP!NDCB!ZCBUS!47 ; test mask
1317 001330' 001470' 005115' T47M,,[ASCIZ ^CBUS Parity Checking - CBUS to CBUS Module^]
1318 001331' 005126' 005130' [EXP C17,MLAST!C9],,[EXP MLAST!C7]
1319 001332' 000000 002141' TSTC52 ; failure test table
1320 001333' 777777 777777 -1 ; ...
.MAIN MACRO %53A(1152) 10:53 16-Oct-84 Page 24
DFPTAA MAC 19-Feb-83 23:12 CBUS MODULE TESTS SEQ 1907
1321
1322 ; Start test
1323
1324 001334' 402 00 0 00 005715' TG47: SETZM SAVAPR# ; clear APR data
1325 001335' 332 00 0 00 030037 SKIPE USER ; user mode?
1326 JRST [MOVE TSTFLG ; yes - ensure this test does not
1327 TLO (TUSER) ; get run (but only if not in
1328 SKIPN UDEBUG ; debug mode)
1329 MOVEM TSTFLG
1330 001336' 254 00 0 00 005224' JRST TG47A]
1331 001337' 7 000 24 0 00 000001 CONI APR,1 ; get processor flags
1332 001340' 202 01 0 00 005715' MOVEM 1,SAVAPR ; save flags
1333 001341' 7 000 20 0 00 065400 CONO APR,65400 ; prevent MB parity error interrupts
1334 001342' 201 00 0 00 000000' TG47A: MOVEI ZA ; get address of module start
1335 001343' 260 17 0 00 001201* GO TRACE ; handle trace output
1336 001344' 201 01 0 00 001470' MOVEI 1,T47M ; set up microcode address
1337 001345' 260 17 0 00 001203* GO TLOAD ; load/verify it
1338 001346' 254 00 0 00 001363' JRST TX47 ; failed - exit test
1339
1340 ; Initialization
1341
1342 001347' 400 15 0 00 000000 TL47: SETZ ERFLG, ; clear error flag
1343 001350' 201 06 0 00 001373' MOVEI 6,TS47 ; get test table address
1344 001351' 402 00 0 00 001207* SETZM TSTSUB ; initialize subtest number
1345
1346 ; Loop on test execute table entries
1347
1348 001352' 260 17 0 00 001210* TA47: GO IPACLR ; clear port
1349 001353' 260 17 0 00 001211* TB47: GO CEXEC ; execute table entry
1350 001354' 254 00 0 00 001363' JRST TX47 ; end of test execute table
1351 001355' 254 00 0 00 001353' JRST TB47 ; keep looping after call
1352 001356' 474 15 0 00 000000 SETO ERFLG, ; error occurred
1353
1354 ; Handle error printouts and scope looping
1355
1356 001357' 027 00 0 00 001431' SCOPER MA47 ; print error message
1357 001360' 254 00 0 00 001347' JRST TL47 ; loop on error
1358 001361' 254 00 0 00 001363' JRST TX47 ; altmode exit
1359 001362' 322 15 0 00 001352' JUMPE ERFLG,TA47 ; do next test execute table entry
1360
1361 ; End of test
1362
1363 001363' 336 00 0 00 005715' TX47: SKIPN SAVAPR ; need to restore APR flags?
1364 001364' 263 17 0 00 000000 RTN ; no - just return
1365 001365' 7 000 20 0 00 027700 CONO APR,27700 ; clear flags
1366 001366' 135 01 0 00 005231' LDB 1,[POINT 8,SAVAPR,13] ; get original flags
1367 001367' 242 01 0 00 000004 LSH 1,4 ; position properly
1368 001370' 660 01 0 00 100000 TRO 1,100000 ; set enable bit
1369 001371' 7 000 20 0 01 000000 CONO APR,(1) ; set the flags
1370 001372' 263 17 0 00 000000 RTN ; exit
.MAIN MACRO %53A(1152) 10:53 16-Oct-84 Page 25
DFPTAA MAC 19-Feb-83 23:12 CBUS MODULE TESTS SEQ 1908
1371
1372 ; Data Test Execute Table, as: (CMD,parameters)
1373
1374 001373' 100120 000044 TS47: CTABLE (CSETWR,120,^D36) ; set up write (36 words)
1375 001374' 240000 001401' CTABLE (CCALL,TS47DA) ; set up data patterns correctly
1376 001375' 200000 001000 CTABLE (CSTART,1000) ; start up port
1377 001376' 340010 000000 CTABLE (CWAIT,10,0) ; check if completed
1378 001377' 240000 001416' CTABLE (CCALL,TS47CH) ; check results
1379 001400' 000000 000000 CTABLE (CLAST) ; end of table
1380
1381 ; Set up data pattern - make each word have bad parity
1382
1383 001401' 200 00 0 00 005232' TS47DA: MOVE [BUFF,,BUFF+^D36] ; build BLT word, save copy of the
1384 001402' 251 00 0 00 000000# BLT BUFF+^D71 ; data later in the buffer
1385 001403' 201 01 0 00 000645* MOVEI 1,BUFF ; get buffer address
1386 001404' 200 00 0 01 000000 TS47D0: MOVE (1) ; get data word
1387 001405' 336 00 0 00 030037 SKIPN USER ; user mode?
1388 001406' 7 004 20 0 00 200000 CONO PI,200000 ; no - set up for bad parity
1389 001407' 202 00 0 01 000000 MOVEM (1) ; write the word back
1390 001410' 336 00 0 00 030037 SKIPN USER ; user mode?
1391 001411' 7 004 20 0 00 000000 CONO PI,0 ; no - reset bad parity flag
1392 001412' 350 00 0 00 000001 AOS 1 ; point to next address
1393 001413' 307 01 0 00 000000# CAIG 1,BUFF+^D35 ; done yet?
1394 001414' 254 00 0 00 001404' JRST TS47D0 ; no - loop till done
1395 001415' 263 17 0 00 000000 RTN ; yes - return
1396
1397 ; Check results
1398
1399 001416' 200 01 0 00 005233' TS47CH: MOVE 1,[-^D36,,BUFF] ; build AOBJN word to rewrite
1400 001417' 550 02 0 00 000001 HRRZ 2,1 ; each word in the buffer
1401 001420' 402 00 0 01 000000 SETZM (1) ; with correct parity, and
1402 001421' 253 01 0 00 001417' AOBJN 1,.-2 ; do so
1403 001422' 260 17 0 00 001434' GO MA47CH ; get additional data
1404 001423' 200 01 0 00 001250* MOVE 1,CEBUFA ; get word count
1405 001424' 302 01 0 00 000044 CAIE 1,^D36 ; correct?
1406 001425' 474 15 0 00 000000 SETO ERFLG, ; no - set error flag
1407 001426' 350 00 0 17 777772 AOS -6(P) ; set up error return
1408 001427' 350 00 0 17 777772 AOS -6(P) ; set up error return
1409 001430' 263 17 0 00 000000 RTN ; return
1410
1411 ; Error messages
1412
1413 001431' 140000 005234' MA47: MSG!TXNOT![ASCIZ /Parity error not detected in data transfer/]
1414 001432' 240000 001434' CALL!TXNOT!MA47CH ; check other results
1415 001433' 000000000000# LAST!CALL!TXALL!CCPNT ; print test data
.MAIN MACRO %53A(1152) 10:53 16-Oct-84 Page 26
DFPTAA MAC 19-Feb-83 23:12 CBUS MODULE TESTS SEQ 1909
1416
1417 ; Check results - first the word count left in the EBUF
1418
1419 001434' 322 15 0 00 001446' MA47CH: JUMPE ERFLG,MA47C0 ; no error yet? - continue
1420 001435' 200 01 0 00 001423* MOVE 1,CEBUFA ; get word count
1421 001436' 306 01 0 00 000044 CAIN 1,^D36 ; correct?
1422 001437' 254 00 0 00 001434' JRST MA47CH0 ; yes - continue
1423 001440' 331 00 0 00 001435* SKIPL CEBUFA
1424 JRST [TMSGC <Port word count error: >
1425 TMSGC < Correct: 36.>
1426 TMSGC < Actual:>
1427 PDEC 6,CEBUFA ; print it
1428 TMSG <.>
1429 001441' 254 00 0 00 005245' JRST MA47C0]
1430 001442' 037 00 0 00 005253' TMSGC <Parity error did not occur on word #>
1431 001443' 210 00 0 00 001440* MOVN CEBUFA
1432 001444' 037 15 0 00 000000 PNTDEC
1433 001445' 037 00 0 00 005156' TMSG <.>
1434
1435 ; Then the correct/actual data being read
1436
1437 001446' 400 01 0 00 000000 MA47C0: SETZ 1, ; ensure the port is
1438 001447' 260 17 0 00 001103* GO LDCSR ; stopped
1439 001450' 201 01 0 00 000200 MOVEI 1,200 ; get address to get R3
1440 001451' 242 01 0 00 000001 LSH 1,1 ; position correctly
1441 001452' 260 17 0 00 001073* GO LDRAR ; load RAR register
1442 001453' 201 01 0 00 000010 MOVEI 1,MPRUN ; set up initial CSR data
1443 001454' 260 17 0 00 001447* GO LDCSR ; write CSR register
1444 001455' 201 01 0 00 200000 MOVEI 1,TSTEBF ; set up CSR to read EBUF
1445 001456' 260 17 0 00 001454* GO LDCSR ; write it
1446 001457' 260 17 0 00 001100* GO RDEBUF ; get EBUF data (actual)
1447 001460' 202 01 0 00 005722' MOVEM 1,SAVDA1# ; save it
1448 001461' 400 01 0 00 000000 SETZ 1, ; ensure the port is
1449 001462' 260 17 0 00 001456* GO LDCSR ; stopped
1450 001463' 322 15 0 00 005174' JUMPE ERFLG,[RTN] ; no error yet? - continue
1451 001464' 037 00 0 00 005263' TMSGC <Word without parity error: >
1452 001465' 200 00 0 00 005722' MOVE SAVDA1 ; get data
1453 001466' 037 13 0 00 000000 PNTHW ; print it
1454 001467' 263 17 0 00 000000 RTN ; return
.MAIN MACRO %53A(1152) 10:53 16-Oct-84 Page 27
DFPTAA MAC 19-Feb-83 23:12 CBUS MODULE TESTS SEQ 1910
1455
1456 ; Microcode - Read each word
1457
1458 001470' 000000 010000 T47M: MWORD <ADDR=0,JMAP,J=1,S0B,AND,B=5,D=2> ; 0
1459 001471' 342002 400040
1460 001472' 000101 000000 MWORD <CJS,J=100,D=1> ; 1
1461 001473' 001000 000020
1462 001474' 000200 040000 MWORD <JMAP,J=4,D=1> ; 2
1463 001475' 001000 000040
1464 001476' 000301 010000 MWORD <CJS,J=101,D=1> ; 3
1465 001477' 001000 000020
1466 001500' 000400 060000 MWORD <CJP,J=6,D=1,CENA,CCCP> ; 4
1467 001501' 001400 140060
1468 001502' 000500 100000 MWORD <JMAP,J=10,D=1> ; 5
1469 001503' 001000 000040
1470 001504' 000600 130000 MWORD <CJP,J=13,D=1,CENA,CCLW> ; 6
1471 001505' 001400 170060
1472 001506' 000700 030000 MWORD <JMAP,J=3> ; 7
1473 001507' 000000 000040
1474
1475 ; Parity error did not occur - set STOP and STORE and write
1476 ; word count to EBUF
1477
1478 001510' 001000 000140 MWORD <CONT,SELC,MGC=140> ; 10
1479 001511' 000000 004340
1480 001512' 001100 002004 MWORD <CONT,S0A,XNOR,A=5,D=1,OENA,SELE,MGC=4> ; 11
1481 001513' 471050 005340
1482 001514' 001200 120000 MWORD <JMAP,J=12> ; 12
1483 001515' 000000 000040
1484
1485 ; All done - set STOP and STORE and write word count to EBUF
1486
1487 001516' 001300 000140 MWORD <CONT,SELC,MGC=140> ; 13
1488 001517' 000000 004340
1489 001520' 001400 002004 MWORD <CONT,S0A,OR,A=5,D=1,OENA,SELE,MGC=4> ; 14
1490 001521' 431050 005340
1491 001522' 001500 150000 MWORD <JMAP,J=15> ; 15
1492 001523' 000000 000040
1493
1494 ; Routine to read a word from CBUS, through formatter into R3
1495 ; (If this routine is started at 101, then the next word from
1496 ; the CBUS is read).
1497
1498 001524' 010000 000200 MWORD <ADDR=100,CONT,D=1,SELC,MGC=200> ; 100
1499 001525' 001000 004340
1500 001526' 010101 030000 MWORD <CJP,J=103,D=1,CENA,CCCA> ; 101
1501 001527' 001400 000060
1502 001530' 010201 010000 MWORD <JMAP,J=101,D=1> ; 102
1503 001531' 001000 000040
1504 001532' 010300 000004 MWORD <CONT,D=1,SELC,MGC=4> ; 103
1505 001533' 001000 004340
1506 001534' 010400 000200 MWORD <CONT,SD0,OR,B=3,D=2,SELM,MGC=200> ; 104
1507 001535' 732001 402340
1508 001536' 010500 000000 MWORD <CRTN,S0B,B=5,PLUS,CRY,D=2> ; 105
1509 001537' 302002 400640
.MAIN MACRO %53A(1152) 10:53 16-Oct-84 Page 27-1
DFPTAA MAC 19-Feb-83 23:12 CBUS MODULE TESTS SEQ 1911
1510
1511 ; Routine to read R3 and place in EBUF
1512
1513 001540' 020002 012004 MWORD <ADDR=200,JMAP,J=201,S0A,A=3,OR,OENA,D=1,SELE,MGC=4>
1514 001541' 431030 005040
1515 001542' 020102 010000 MWORD <JMAP,J=201> ; 201
1516 001543' 000000 000040
1517
1518 ; Initialization
1519
1520 001544' 100000 000020 MWORD <ADDR=1000,JZ,SELM,MGC=20> ; 1000
1521 001545' 000000 002000
1522
1523 ; Initialization step
1524
1525 001546' 500050 010100 MWORD <ADDR=5000,JMAP,J=5001,SELC,MGC=100> ; 5000
1526 001547' 000000 004040
1527 001550' 500150 010020 MWORD <JMAP,J=5001,SELM,MGC=20> ; 5001
1528 001551' 000000 002040
1529 001552' 777777 777777 -1
.MAIN MACRO %53A(1152) 10:53 16-Oct-84 Page 28
DFPTAA MAC 19-Feb-83 23:12 CBUS MODULE TESTS SEQ 1912
1530
1531 ;#********************************************************************
1532 ;* Test 50 - T Field Timing Test
1533 ;
1534 ; Description: Verify that setting the Time Field bit in each
1535 ; microword causes the microsequencer to operate
1536 ; about 33% slower.
1537 ;
1538 ; Procedure: KL> Port Clear
1539 ; KL> Load microcode
1540 ; KL> Start the port at location 0
1541 ; KL> Wait 10ms then stop the port and read 2901
1542 ; register 1 which contains the number of
1543 ; instructions executed (each with T field
1544 ; not set)
1545 ; KL> Start the port at location 10
1546 ; KL> Wait 10ms then stop the port and read 2901
1547 ; register 1 which contains the number of
1548 ; instructions executed (each with T field
1549 ; set)
1550 ;
1551 ; KL> Compare the instruction counts expecting a
1552 ; ratio of 3 to 2 +- 10%
1553 ;
1554 ; KL> In user mode repeat up to 2 more times if the
1555 ; ratio is not correct (it is more difficult to
1556 ; exactly time how long the wait is being done).
1557 ;
1558 ; Failure: ---
1559 ;#********************************************************************
1560
1561 ; Test data
1562
1563 001553' 254 00 0 00 001560' TSTC50: JRST TG50 ; go start test
1564 001554' 100604 000050 CBUS!NDMP!NDCB!ZCBUS!50 ; test mask
1565 001555' 001657' 005272' T50M,,[ASCIZ ^T Field Timing^]
1566 001556' 005275' 000000 [EXP MLAST!C1],,0
1567 001557' 777777 777777 -1 ; failure test table
.MAIN MACRO %53A(1152) 10:53 16-Oct-84 Page 29
DFPTAA MAC 19-Feb-83 23:12 CBUS MODULE TESTS SEQ 1913
1568
1569 ; Start test
1570
1571 001560' 332 00 0 00 030037 TG50: SKIPE USER ; user mode?
1572 GO [MOVE TSTFLG ; yes - ensure this test does not
1573 TLO (TUSER) ; get run (but only if not in
1574 SKIPN UDEBUG ; debug mode)
1575 MOVEM TSTFLG
1576 001561' 260 17 0 00 005276' RTN]
1577 001562' 201 00 0 00 000000' MOVEI ZA ; get address of module start
1578 001563' 260 17 0 00 001343* GO TRACE ; handle trace output
1579 001564' 201 01 0 00 001657' MOVEI 1,T50M ; set up microcode address
1580 001565' 260 17 0 00 001345* GO TLOAD ; load/verify it
1581 001566' 263 17 0 00 000000 RTN ; failed - exit test
1582
1583 ; Do the test
1584
1585 001567' 400 15 0 00 000000 TA50: SETZ ERFLG, ; clear error flag
1586 001570' 400 01 0 00 000000 SETZ 1, ; set start address to 0
1587 001571' 260 17 0 00 001616' GO T50SS ; do a test segment
1588 001572' 202 01 0 00 005716' MOVEM 1,SAVCN1# ; save count
1589
1590 001573' 201 01 0 00 000010 MOVEI 1,10 ; set start address to 10
1591 001574' 260 17 0 00 001616' GO T50SS ; do a test segment
1592 001575' 202 01 0 00 005717' MOVEM 1,SAVCN2# ; save count
1593
1594 ; Check results
1595
1596 001576' 200 04 0 00 005716' MOVE 4,SAVCN1 ; get count without T field set
1597 001577' 221 04 0 00 000012 IMULI 4,^D10 ; calculate 1.4 times the count
1598 001600' 231 04 0 00 000016 IDIVI 4,^D14 ; as the maximum limit
1599 001601' 202 04 0 00 005720' MOVEM 4,SAVCN3# ; save it
1600 001602' 317 04 0 00 005717' CAMG 4,SAVCN2 ; in range?
1601 001603' 474 15 0 00 000000 SETO ERFLG, ; no - set error flag
1602 001604' 200 04 0 00 005716' MOVE 4,SAVCN1 ; get count without T field set
1603 001605' 221 04 0 00 000012 IMULI 4,^D10 ; calculate 1.6 times the count
1604 001606' 231 04 0 00 000020 IDIVI 4,^D16 ; as the minimum limit
1605 001607' 202 04 0 00 005721' MOVEM 4,SAVCN4# ; save it
1606 001610' 311 04 0 00 005717' CAML 4,SAVCN2 ; in range?
1607 001611' 474 15 0 00 000000 SETO ERFLG, ; no - set error flag
1608
1609 ; Handle error printouts and scope looping
1610
1611 001612' 027 00 0 00 001631' SCOPER MA50 ; print error message
1612 001613' 254 00 0 00 001567' JRST TA50 ; loop on error
1613 001614' 254 00 0 00 001615' JRST TX50 ; altmode exit
1614
1615 ; End of test
1616
1617 001615' 263 17 0 00 000000 TX50: RTN ; return
.MAIN MACRO %53A(1152) 10:53 16-Oct-84 Page 30
DFPTAA MAC 19-Feb-83 23:12 CBUS MODULE TESTS SEQ 1914
1618
1619 ; Routine to start port, wait 20 msec, then read count
1620
1621 001616' 260 17 0 00 001352* T50SS: GO IPACLR ; do a 'port clear'
1622 001617' 242 01 0 00 000001 LSH 1,1 ; position start address
1623 001620' 260 17 0 00 001452* GO LDRAR ; set up start address
1624 001621' 201 01 0 00 000010 MOVEI 1,MPRUN ; get MPRUN bit
1625 001622' 260 17 0 00 001462* GO LDCSR ; start the port
1626 001623' 201 00 0 00 000024 MOVEI ^D20 ; set up for 20 msec
1627 001624' 260 17 0 00 000000* GO ODELAY ; do the wait
1628 001625' 201 01 0 00 200000 MOVEI 1,TSTEBF ; set up to read EBUF
1629 001626' 260 17 0 00 001622* GO LDCSR ; stop the port
1630 001627' 260 17 0 00 001457* GO RDEBUF ; read EBUF data
1631 001630' 263 17 0 00 000000 RTN ; return
1632
1633 ; Error messages
1634
1635 001631' 270000 001632' MA50: LAST!CALL!TXALL!MA50PN ; print timing data
1636
1637 001632' 037 00 0 00 005303' MA50PN: TMSGC <T field set did not slow port by 33%>
1638 001633' 200 00 0 00 000000* MOVE SCOSW ; get switches
1639 001634' 603 00 0 00 000200 TLNE TXTINH ; inhibit text?
1640 001635' 263 17 0 00 000000 RTN ; yes - exit
1641 001636' 037 00 0 00 005313' TMSGC <Count (TFld=0): >
1642 001637' 200 00 0 00 005716' MOVE SAVCN1 ; get count
1643 001640' 037 15 0 00 000000 PNTDEC ; print it
1644 001641' 037 00 0 00 005156' TMSG <.>
1645 001642' 037 00 0 00 005317' TMSGC <Count (TFld=1) minimum: >
1646 001643' 200 00 0 00 005721' MOVE SAVCN4 ; get count
1647 001644' 037 15 0 00 000000 PNTDEC ; print it
1648 001645' 037 00 0 00 005156' TMSG <.>
1649 001646' 037 00 0 00 005325' TMSGC <Count (TFld=1) maximum: >
1650 001647' 200 00 0 00 005720' MOVE SAVCN3 ; get count
1651 001650' 037 15 0 00 000000 PNTDEC ; print it
1652 001651' 037 00 0 00 005156' TMSG <.>
1653 001652' 037 00 0 00 005333' TMSGC <Count (TFld=1) actual: >
1654 001653' 200 00 0 00 005717' MOVE SAVCN2 ; get count
1655 001654' 037 15 0 00 000000 PNTDEC ; print it
1656 001655' 037 00 0 00 005156' TMSG <.>
1657 001656' 263 17 0 00 000000 RTN ; return
1658
1659 ; Microcode:
1660
1661 001657' 000000 010000 T50M: MWORD <ADDR=0,JMAP,J=1,S0A,AND,D=2> ; 0
1662 001660' 442000 000040
1663 001661' 000100 012004 MWORD <JMAP,J=1,S0B,PLUS,D=2,CRY,OENA,SELE,MGC=4> ; 1
1664 001662' 302000 005440
1665
1666 001663' 001000 110000 MWORD <ADDR=10,JMAP,J=11,S0A,AND,D=2,TIM=1> ; 10
1667 001664' 442000 000050
1668 001665' 001100 112004 MWORD <JMAP,J=11,S0B,PLUS,D=2,CRY,TIM=1,OENA,SELE,MGC=4> ; 11
1669 001666' 302000 005450
1670 001667' 777777 777777 -1
.MAIN MACRO %53A(1152) 10:53 16-Oct-84 Page 31
DFPTAA MAC 19-Feb-83 23:12 CBUS MODULE TESTS SEQ 1915
1671
1672 ;#********************************************************************
1673 ;* Test 51 - CBUS Store
1674 ;
1675 ; Description: Verify that the microcode command 'MPSTORECBUS'
1676 ; does indeed cause the logout data to be stored
1677 ; when the command is issued.
1678 ;
1679 ; Procedure: KL> Port Clear
1680 ; KL> Set up a CCW list to transfer 1 word
1681 ; KL> Start up port
1682 ; UC> Start data transfer
1683 ; UC> Read a word and assert 'MPSTORECBUS' and 'MPSTOPCBUS'
1684 ; KL> Read logout data and verify correct
1685 ;
1686 ; Failure: ---
1687 ;#********************************************************************
1688
1689 ; Test data
1690
1691 001670' 254 00 0 00 001676' TSTC51: JRST TG51 ; go start test
1692 001671' 100604 000051 CBUS!NDMP!NDCB!ZCBUS!51 ; test mask
1693 001672' 002116' 005341' T51M,,[ASCIZ ^CBUS Store^]
1694 001673' 005275' 000000 [EXP MLAST!C1],,0
1695 001674' 000000 002141' TSTC52 ; failure test table
1696 001675' 777777 777777 -1 ; ...
1697
1698 ; Start test
1699
1700 001676' 201 00 0 00 000000' TG51: MOVEI ZA ; get address of module start
1701 001677' 260 17 0 00 001563* GO TRACE ; handle trace output
1702 001700' 201 01 0 00 002116' MOVEI 1,T51M ; set up microcode address
1703 001701' 260 17 0 00 001565* GO TLOAD ; load/verify it
1704 001702' 263 17 0 00 000000 RTN ; failed - exit test
1705 001703' 200 00 0 00 005344' MOVE [TS51CD,,TS51TC] ; set up correct logout data
1706 001704' 251 00 0 00 002011' BLT TS51TC+2
1707
1708 ; Initialization
1709
1710 001705' 400 15 0 00 000000 TL51: SETZ ERFLG, ; clear error flag
1711 001706' 201 06 0 00 001722' MOVEI 6,TS51 ; get test table address
1712 001707' 402 00 0 00 001351* SETZM TSTSUB ; initialize subtest number
1713
1714 ; Loop on test execute table entries
1715
1716 001710' 260 17 0 00 001616* TA51: GO IPACLR ; clear port
1717 001711' 260 17 0 00 000615* TB51: GO TEXEC ; execute table entry
1718 001712' 254 00 0 00 001721' JRST TX51 ; end of sstep table
1719 001713' 254 00 0 00 001711' JRST TB51 ; keep looping after call
1720 001714' 474 15 0 00 000000 SETO ERFLG, ; error occurred
.MAIN MACRO %53A(1152) 10:53 16-Oct-84 Page 32
DFPTAA MAC 19-Feb-83 23:12 CBUS MODULE TESTS SEQ 1916
1721
1722 ; Handle error printouts and scope looping
1723
1724 001715' 027 00 0 00 002017' SCOPER MA51 ; print error message
1725 001716' 254 00 0 00 001705' JRST TL51 ; loop on error
1726 001717' 254 00 0 00 001721' JRST TX51 ; altmode exit
1727 001720' 322 15 0 00 001710' JUMPE ERFLG,TA51 ; do next sstep table entry
1728
1729 ; End of test
1730
1731 001721' 263 17 0 00 000000 TX51: RTN ; return
1732
1733 ; Test Execute Table, as: (CMD,parameters)
1734
1735 001722' 140000 001727' TS51: TTABLE (TCALL,TS51IN) ; initialize data transfer
1736 001723' 040000 000000 TTABLE (TSTART,0) ; start up port
1737 001724' 140000 001747' TTABLE (TCALL,TS51CH) ; check if completed
1738 001725' 340000 000000 TTABLE (TEXIT) ; exit if error yet
1739 001726' 000000 000000 TTABLE (TLAST) ; end of table
1740
1741 ; Initialize data transfer
1742
1743 001727' 201 01 0 00 005000 TS51IN: MOVEI 1,5000 ; get start address
1744 001730' 242 01 0 00 000001 LSH 1,1 ; position correctly
1745 001731' 260 17 0 00 001620* GO LDRAR ; load the register
1746 001732' 201 01 0 00 000010 MOVEI 1,MPRUN ; get CSR data
1747 001733' 260 17 0 00 001626* GO LDCSR ; start up the port
1748 001734' 200 01 0 00 005103' MOVE 1,[CBUFSZ,,CBUF] ; get pointer to control buffer
1749 001735' 260 17 0 00 000644* GO CHINIT ; initialize software
1750 001736' 551 01 0 00 001403* HRRZI 1,BUFF ; buffer address
1751 001737' 201 02 0 00 000001 MOVEI 2,1 ; word count
1752 001740' 400 03 0 00 000000 SETZ 3, ; clear zero fill specifier
1753 001741' 260 17 0 00 000650* GO GENCCW ; generate a CCW list
1754 001742' 201 00 0 00 123456 MOVEI 123456 ; initialize buffer
1755 001743' 202 00 0 00 001736* MOVEM BUFF ; contents
1756 001744' 400 01 0 00 000000 SETZ 1, ; clear CSR data
1757 001745' 260 17 0 00 001733* GO LDCSR ; stop the port
1758 001746' 263 17 0 00 000000 RTN ; return
1759
1760 ; Inspect logout data to see if correct
1761
1762 001747' 201 00 0 00 000001 TS51CH: MOVEI 1 ; set up a small delay of 1
1763 001750' 260 17 0 00 001624* GO ODELAY ; millisecond
1764 001751' 260 17 0 00 000000* GO GETLOG ; get channel status words
1765 001752' 200 01 0 00 005345' MOVE 1,[LOGBUF,,TS51TB] ; transfer to TS51TB
1766 001753' 251 01 0 00 002005' BLT 1,TS51TB+2
1767 001754' 336 00 0 00 030037 SKIPN USER ; user mode?
1768 001755' 254 00 0 00 001766' JRST TS51C0 ; no - continue
.MAIN MACRO %53A(1152) 10:53 16-Oct-84 Page 33
DFPTAA MAC 19-Feb-83 23:12 CBUS MODULE TESTS SEQ 1917
1769
1770 ; Set up correct data in user mode
1771
1772 001756' 135 00 0 00 005346' LDB [POINT 22,TS51TB+1,35] ; yes - ignore the CLP
1773 001757' 137 00 0 00 005347' DPB [POINT 22,TS51TC+1,35] ; save the correct CLP address
1774 001760' 370 00 0 00 000000 SOS ; subtract 1
1775 001761' 137 00 0 00 005350' DPB [POINT 22,TS51TC,35] ; save the correct ICW address
1776 001762' 201 01 0 00 000000# MOVEI 1,BUFF+1 ; get correct buffer address
1777 001763' 336 00 0 00 000000* SKIPN UDEBUG ; debug mode?
1778 001764' 257 01 0 01 000000 MAP 1,(1) ; no - map to physical
1779 001765' 137 01 0 00 005351' DPB 1,[POINT 22,TS51TC+2,35]; save it in correct location
1780
1781 ; Now do the compare
1782
1783 001766' 200 01 0 00 002003' TS51C0: MOVE 1,TS51TB ; get ICWA
1784 001767' 312 01 0 00 002007' CAME 1,TS51TC ; correct?
1785 001770' 474 15 0 00 000000 SETO ERFLG, ; no - flag error
1786 001771' 200 01 0 00 002004' MOVE 1,TS51TB+1 ; get status word 1
1787 001772' 312 01 0 00 002010' CAME 1,TS51TC+1 ; correct?
1788 001773' 474 15 0 00 000000 SETO ERFLG, ; no - flag error
1789 001774' 200 01 0 00 002005' MOVE 1,TS51TB+2 ; get status word 2
1790 001775' 312 01 0 00 002011' CAME 1,TS51TC+2 ; correct?
1791 001776' 474 15 0 00 000000 SETO ERFLG, ; no - flag error
1792 001777' 336 00 0 00 000015 SKIPN ERFLG ; error flag set?
1793 002000' 350 00 0 17 777772 AOS -6(P) ; no - set up good return
1794 002001' 350 00 0 17 777772 AOS -6(P) ; set up return
1795 002002' 263 17 0 00 000000 RTN ; return
1796
1797 002003' TS51TB: BLOCK 4 ; actual data
1798 002007' TS51TC: BLOCK 4 ; correct data
1799
1800 002013' 200000 000000* TS51CD: 200000,,CBUF ; initialization data
1801 002014' 500000 000000# 500000,,CBUF+1
1802 002015' 600000 000000# 600000,,BUFF+1
1803 002016' 000000 000000 0
1804
1805 ; Error messages
1806
1807 002017' 140000 005352' MA51: MSG!TXNOT![ASCIZ /'MPSTORECBUS' did not cause logout data to be updated/]
1808 002020' 270000 002021' LAST!CALL!TXALL!MA51PN ; print logout data
1809
1810 002021' 200 01 0 00 001633* MA51PN: MOVE 1,SCOSW ; get switches
1811 002022' 603 01 0 00 000200 TLNE 1,TXTINH ; full printout?
1812 002023' 037 00 0 00 005365' TMSGC <Logout (C):> ; no
1813 002024' 607 01 0 00 000200 TLNN 1,TXTINH ; full printout?
1814 002025' 037 00 0 00 005370' TMSGC <Logout Data (Correct):>; yes
1815 002026' 201 03 0 00 002007' MOVEI 3,TS51TC ; get address of correct data
1816 002027' 260 17 0 00 002037' GO MA51LG ; print it
.MAIN MACRO %53A(1152) 10:53 16-Oct-84 Page 34
DFPTAA MAC 19-Feb-83 23:12 CBUS MODULE TESTS SEQ 1918
1817 002030' 603 01 0 00 000200 TLNE 1,TXTINH ; full printout?
1818 002031' 037 00 0 00 005375' TMSGC <Logout (A):> ; no
1819 002032' 607 01 0 00 000200 TLNN 1,TXTINH ; full printout?
1820 002033' 037 00 0 00 005400' TMSGC <Logout Data (Actual):> ; yes
1821 002034' 201 03 0 00 002003' MOVEI 3,TS51TB ; get address of actual data
1822 002035' 260 17 0 00 002037' GO MA51LG ; print it
1823 002036' 263 17 0 00 000000 RTN ; return
1824
1825 ; Print logout data
1826
1827 002037' 607 01 0 00 000200 MA51LG: TLNN 1,TXTINH ; full printout
1828 002040' 254 00 0 00 002053' JRST MA51LA ; yes - continue
1829 002041' 037 00 0 00 005405' TMSGC < ICW: >
1830 002042' 200 00 0 03 000000 MOVE (3) ; get initial CW
1831 002043' 037 13 0 00 000000 PNTHW ; print it
1832 002044' 037 00 0 00 005407' TMSGC < SW1: >
1833 002045' 200 00 0 03 000001 MOVE 1(3) ; get status word 1
1834 002046' 037 13 0 00 000000 PNTHW ; print it
1835 002047' 037 00 0 00 005411' TMSGC < SW2: >
1836 002050' 200 00 0 03 000002 MOVE 2(3) ; get last CCW
1837 002051' 037 13 0 00 000000 PNTHW ; print it
1838 002052' 263 17 0 00 000000 RTN ; done - return
1839
1840 002053' 037 00 0 00 005413' MA51LA: TMSGC < ICW: >
1841 002054' 200 00 0 03 000000 MOVE (3) ; get initial CW
1842 002055' 037 13 0 00 000000 PNTHW ; print it
1843 002056' 037 00 0 00 005416' TMSGC < SW1: >
1844 002057' 200 02 0 03 000001 MOVE 2,1(3) ; get status word
1845 002060' 603 02 0 00 200000 TLNE 2,(1B1) ; MEM PE?
1846 002061' 037 00 0 00 005420' TMSG < MEM.PE> ; yes - print it
1847 002062' 607 02 0 00 100000 TLNN 2,(1B2) ; ADR PE?
1848 002063' 037 00 0 00 005422' TMSG < ADR.PE> ; yes - print it
1849 002064' 607 02 0 00 040000 TLNN 2,(1B3) ; WC0?
1850 002065' 037 00 0 00 005424' TMSG < WC0> ; yes - print it
1851 002066' 603 02 0 00 020000 TLNE 2,(1B4) ; NXM?
1852 002067' 037 00 0 00 005425' TMSG < NXM> ; yes - print it
1853 002070' 603 02 0 00 000400 TLNE 2,(1B9) ; LAST XFER ERROR?
1854 002071' 037 00 0 00 005426' TMSG < LST.XFR.ERR> ; yes - print it
1855 002072' 603 02 0 00 000200 TLNE 2,(1B10) ; DEVICE ERROR?
1856 002073' 037 00 0 00 005431' TMSG < DEV.ERR> ; yes - print it
1857 002074' 603 02 0 00 000100 TLNE 2,(1B11) ; LONG WC?
1858 002075' 037 00 0 00 005433' TMSG < LG.WC> ; yes - print it
1859 002076' 603 02 0 00 000040 TLNE 2,(1B12) ; SHORT WC?
1860 002077' 037 00 0 00 005435' TMSG < SH.WC> ; yes - print it
1861 002100' 603 02 0 00 000020 TLNE 2,(1B13) ; OVERRUN?
1862 002101' 037 00 0 00 005437' TMSG < OVR> ; yes - print it
1863 002102' 037 00 0 00 005440' TMSG < CLP points to: >
1864 002103' 135 00 0 00 005444' LDB [POINT 22,2,35] ; fetch the actual clp address
1865 002104' 037 16 0 00 000003 PNTOCS ; print in octal
.MAIN MACRO %53A(1152) 10:53 16-Oct-84 Page 35
DFPTAA MAC 19-Feb-83 23:12 CBUS MODULE TESTS SEQ 1919
1866 002105' 037 00 0 00 005445' TMSGC < SW2 (Last Updated CCW): >
1867 002106' 037 00 0 00 005453' TMSG < WC = >
1868 002107' 200 02 0 03 000002 MOVE 2,2(3) ; fetch last CCW
1869 002110' 135 00 0 00 005455' LDB [POINT 11,2,13] ; gets word count
1870 002111' 037 15 0 00 000000 PNTDEC ; print it in decimal
1871 002112' 037 00 0 00 005456' TMSG <. ADR = >
1872 002113' 135 00 0 00 005444' LDB [POINT 22,2,35] ; gets address
1873 002114' 037 16 0 00 000003 PNTOCS ; print it in octal
1874 002115' 263 17 0 00 000000 RTN ; and exit
1875
1876 ; Microcode
1877
1878 002116' 000000 010200 T51M: MWORD <ADDR=0,JMAP,J=1,SELC,MGC=200> ; 0
1879 002117' 000000 004040
1880 002120' 000100 030000 MWORD <CJP,J=3,D=1,CENA,CCCA> ; 1
1881 002121' 001400 000060
1882 002122' 000200 010000 MWORD <JMAP,J=1,D=1> ; 2
1883 002123' 001000 000040
1884 002124' 000300 000004 MWORD <CONT,D=1,SELC,MGC=4> ; 3
1885 002125' 001000 004340
1886 002126' 000400 000200 MWORD <CONT,SD0,OR,B=3,D=2,SELM,MGC=200> ; 4
1887 002127' 732001 402340
1888 002130' 000500 000140 MWORD <CONT,SELC,MGC=140> ; 5
1889 002131' 000000 004340
1890 002132' 000600 060000 MWORD <JMAP,J=6> ; 6
1891 002133' 000000 000040
1892
1893 ; Initialization steps
1894
1895 002134' 500050 010100 MWORD <ADDR=5000,JMAP,J=5001,SELC,MGC=100> ; 5000
1896 002135' 000000 004040
1897 002136' 500150 010020 MWORD <JMAP,J=5001,SELM,MGC=20> ; 5001
1898 002137' 000000 002040
1899 002140' 777777 777777 -1
.MAIN MACRO %53A(1152) 10:53 16-Oct-84 Page 36
DFPTAA MAC 19-Feb-83 23:12 CBUS MODULE TESTS SEQ 1920
1900
1901 ;#********************************************************************
1902 ;* Test 52 - CBUS Input Buffer
1903 ;
1904 ; Description: Verify that the CBUS Input Buffer is cleared by a
1905 ; 'Port Clear'.
1906 ;
1907 ; Procedure: KL> Port Clear
1908 ; KL> Load microcode
1909 ;
1910 ; KL> Single step 3 times to read the formatter into
1911 ; the EBUF. Verify that the EBUF contains 0's.
1912 ;
1913 ; Failure: ---
1914 ;#********************************************************************
1915
1916 ; Test data
1917
1918 002141' 254 00 0 00 002146' TSTC52: JRST TG52 ; go start test
1919 002142' 100604 000052 CBUS!NDMP!NDCB!ZCBUS!52 ; test mask
1920 002143' 002200' 005460' T52M,,[ASCIZ ^CBUS Input Buffer^]
1921 002144' 005464' 005466' [EXP C14,MLAST!C4],,[EXP C20,MLAST!C7]
1922 002145' 777777 777777 -1 ; failure test table
1923
1924 ; Start test
1925
1926 002146' 201 00 0 00 000000' TG52: MOVEI ZA ; get address of module start
1927 002147' 260 17 0 00 001677* GO TRACE ; handle trace output
1928 002150' 201 01 0 00 002200' MOVEI 1,T52M ; set up microcode address
1929 002151' 260 17 0 00 001701* GO TLOAD ; load/verify it
1930 002152' 263 17 0 00 000000 RTN ; failed - exit test
1931
1932 ; Initialization
1933
1934 002153' 400 15 0 00 000000 TL52: SETZ ERFLG, ; clear error flag
1935 002154' 260 17 0 00 001710* GO IPACLR ; clear port
1936 002155' 402 00 0 00 001707* SETZM TSTSUB ; initialize subtest number
1937 002156' 201 06 0 00 002170' MOVEI 6,TS52 ; get sstep table address
1938
1939 ; Loop on single step table entries
1940
1941 002157' 260 17 0 00 000523* TA52: GO BEXEC ; execute table entry
1942 002160' 254 00 0 00 002167' JRST TX52 ; end of sstep table
1943 002161' 254 00 0 00 002157' JRST TA52 ; keep looping after call
1944 002162' 474 15 0 00 000000 SETO ERFLG, ; error - EBUF data incorrect
.MAIN MACRO %53A(1152) 10:53 16-Oct-84 Page 37
DFPTAA MAC 19-Feb-83 23:12 CBUS MODULE TESTS SEQ 1921
1945
1946 ; Handle error printouts and scope looping
1947
1948 002163' 027 00 0 00 002176' SCOPER MA52 ; print error message
1949 002164' 254 00 0 00 002153' JRST TL52 ; loop on error
1950 002165' 254 00 0 00 002167' JRST TX52 ; altmode exit
1951 002166' 322 15 0 00 002157' JUMPE ERFLG,TA52 ; do next sstep table entry
1952
1953 ; End of test
1954
1955 002167' 263 17 0 00 000000 TX52: RTN ; return
1956
1957 ; Sstep table, with EBUF data, as: (CMD,#Steps,Start addr,End Addr,EBUF data)
1958
1959 002170' 100200 030004 TS52: ATABLE (SSSTRT,2,3,4,0)
1960 002171' 000000 000000
1961 002172' 000000000000# ATABLE (SSCALL,IPACLR)
1962 002173' 100300 000002 ATABLE (SSSTRT,3,0,2,0)
1963 002174' 000000 000000
1964 002175' 000000 000000 ATABLE (SSLAST)
1965
1966 ; Error messages
1967
1968 002176' MA52: MSG!TXNOT![ASCIZ /CBUS Input Buffer (read into EBUF) not cleared by a 'PORT CLEAR'/]
1969 002176' 140000 005470'
1970 002177' 000000000000# LAST!CALL!TXALL!BBPNT ; print sequencer data
1971
1972 ; Microcode:
1973
1974 002200' 000000 010004 T52M: MWORD <ADDR=0,JMAP,J=1,D=1,SELC,MGC=4> ; 0
1975 002201' 001000 004040
1976 002202' 000100 000200 MWORD <CONT,SD0,OR,D=2,SELM,MGC=200> ; 1
1977 002203' 732000 002340
1978 002204' 000200 022004 MWORD <JMAP,J=2,S0A,OR,D=1,OENA,SELE,MGC=4> ; 2
1979 002205' 431000 005040
1980
1981 002206' 000300 040100 MWORD <JMAP,J=4,SELC,MGC=100> ; 3
1982 002207' 000000 004040
1983 002210' 000400 042004 MWORD <JMAP,J=4,S0A,D=1,AND,OENA,SELE,MGC=4> ; 4
1984 002211' 441000 005040
1985 002212' 777777 777777 -1
.MAIN MACRO %53A(1152) 10:53 16-Oct-84 Page 38
DFPTAA MAC 19-Feb-83 23:12 CBUS MODULE TESTS SEQ 1922
1986
1987 ;#********************************************************************
1988 ;* Test 53 - Parity Predictor - CBIN to Fmtr/MPINDSTCOMP=0
1989 ;
1990 ; Description: Verify that the parity predictor works correctly
1991 ; when moving data from CBIN to the formatter with
1992 ; 'MPINDSTCOMP' not asserted. This verifies one
1993 ; half of the predictor.
1994 ;
1995 ; Procedure: KL> Port Clear
1996 ; KL> Set up a CCW list to transfer 60 words
1997 ; KL> Start up port
1998 ;
1999 ; UC> Read word from CBUS into CBIN
2000 ; UC> Load formatter with word from CBIN
2001 ; UC> Test leftmost bit of data word - this should
2002 ; be the setting of 'CCMVRPARCHK'.
2003 ; UC> if correct - set bit 12 (DISABLE Complete)
2004 ; UC> if not correct - set bit 13 (ENABLE Complete)
2005 ; Read CSR and determine test disposition
2006 ;
2007 ; Repeat the above steps for each of the 60 data
2008 ; words.
2009 ;
2010 ; Failure: ---
2011 ;#********************************************************************
2012
2013 ; Test data
2014
2015 002213' 254 00 0 00 002225' TSTC53: JRST TG53 ; go start test
2016 002214' 100604 000053 CBUS!NDMP!NDCB!ZCBUS!53 ; test mask
2017 002215' 002445' 005505' T53M,,[ASCIZ ^Parity Predictor - CBIN to Fmtr/MPINDSTCOMP=0^]
2018 002216' 005517' 005520' [EXP MLAST!C11],,[EXP C12,C14,MLAST!C21]
2019 002217' 000000 002600' TSTC54 ; failure test table
2020 002220' 000000 003150' TSTC55 ; ...
2021 002221' 000000 003471' TSTC56
2022 002222' 000000 004013' TSTC57
2023 002223' 000000 004352' TSTC60
2024 002224' 777777 777777 -1
2025
2026 ; Start test
2027
2028 002225' 201 00 0 00 000000' TG53: MOVEI ZA ; get address of module start
2029 002226' 260 17 0 00 002147* GO TRACE ; handle trace output
2030 002227' 201 01 0 00 002445' MOVEI 1,T53M ; set up microcode address
2031 002230' 260 17 0 00 002151* GO TLOAD ; load/verify it
2032 002231' 263 17 0 00 000000 RTN ; failed - exit test
.MAIN MACRO %53A(1152) 10:53 16-Oct-84 Page 39
DFPTAA MAC 19-Feb-83 23:12 CBUS MODULE TESTS SEQ 1923
2033
2034 ; Initialization
2035
2036 002232' 400 15 0 00 000000 TL53: SETZ ERFLG, ; clear error flag
2037 002233' 260 17 0 00 002154* GO IPACLR ; clear port
2038 002234' 402 00 0 00 002155* SETZM TSTSUB ; initialize subtest number
2039 002235' 201 06 0 00 002267' MOVEI 6,TS53 ; get test table address
2040
2041 ; Loop on test execute table entries
2042
2043 002236' 260 17 0 00 001711* TA53: GO TEXEC ; execute table entry
2044 002237' 254 00 0 00 002266' JRST TX53 ; end of test execute table
2045 002240' 254 00 0 00 002236' JRST TA53 ; keep looping after call
2046 002241' 474 15 0 00 000000 SETO ERFLG, ; error occurred
2047
2048 ; Get miscellaneous data
2049
2050 002242' 201 01 0 00 000300 MOVEI 1,300 ; get start address
2051 002243' 242 01 0 00 000001 LSH 1,1 ; position correctly
2052 002244' 260 17 0 00 001731* GO LDRAR ; load the register
2053 002245' 201 01 0 00 220010 MOVEI 1,TSTEBF!MPRUN!SINCYC ; get start data
2054 002246' 260 17 0 00 001745* GO LDCSR ; start up the port
2055 002247' 260 17 0 00 001627* GO RDEBUF ; read EBUF data
2056 002250' 202 01 0 00 005730' MOVEM 1,SAVSEG ; save segment number
2057 002251' 202 01 0 00 002234* MOVEM 1,TSTSUB ; set up subtest number
2058 002252' 350 00 0 00 002251* AOS TSTSUB ; ...
2059
2060 002253' 201 01 0 00 000200 MOVEI 1,200 ; get start address
2061 002254' 242 01 0 00 000001 LSH 1,1 ; position correctly
2062 002255' 260 17 0 00 002244* GO LDRAR ; load the register
2063 002256' 201 01 0 00 220010 MOVEI 1,TSTEBF!MPRUN!SINCYC ; get start data
2064 002257' 260 17 0 00 002246* GO LDCSR ; start up the port
2065 002260' 260 17 0 00 002247* GO RDEBUF ; read EBUF data
2066 002261' 202 01 0 00 005723' MOVEM 1,SAVDAT# ; save data read
2067
2068 ; Handle error printouts and scope looping
2069
2070 002262' 027 00 0 00 002430' SCOPER MA53 ; print error message
2071 002263' 254 00 0 00 002232' JRST TL53 ; loop on error
2072 002264' 254 00 0 00 002266' JRST TX53 ; altmode exit
2073 002265' 322 15 0 00 002236' JUMPE ERFLG,TA53 ; do next test execute table entry
2074
2075 ; End of test
2076
2077 002266' 263 17 0 00 000000 TX53: RTN ; return
2078
2079 ; Test Execute Table, as: (CMD,parameters)
2080
2081 002267' 140000 002273' TS53: TTABLE (TCALL,TS53DA) ; set up data transfer
2082 002270' 040000 001000 TTABLE (TSTART,1000) ; start up port
2083 002271' 240002 000000 TTABLE (TCHECK,2) ; check if completed
2084 002272' 000000 000000 TTABLE (TLAST) ; end of table
2085
.MAIN MACRO %53A(1152) 10:53 16-Oct-84 Page 40
DFPTAA MAC 19-Feb-83 23:12 CBUS MODULE TESTS SEQ 1924
2086
2087 ; Set up data transfer
2088
2089 002273' 400 01 0 00 000000 TS53DA: SETZ 1, ; clear CSR data
2090 002274' 260 17 0 00 002257* GO LDCSR ; write CSR register
2091 002275' 201 01 0 00 005000 MOVEI 1,5000 ; get start address
2092 002276' 242 01 0 00 000001 LSH 1,1 ; position correctly
2093 002277' 260 17 0 00 002255* GO LDRAR ; load the register
2094 002300' 201 01 0 00 000010 MOVEI 1,MPRUN ; get start data
2095 002301' 260 17 0 00 002274* GO LDCSR ; start up the port
2096 002302' 201 00 0 00 000001 MOVEI 1 ; wait a bit (1 msec)
2097 002303' 260 17 0 00 001750* GO ODELAY
2098 002304' 400 01 0 00 000000 SETZ 1, ; clear CSR data
2099 002305' 260 17 0 00 002301* GO LDCSR ; stop the port
2100 002306' 200 01 0 00 005103' MOVE 1,[CBUFSZ,,CBUF] ; get pointer to control buffer
2101 002307' 260 17 0 00 001735* GO CHINIT ; initialize software
2102 002310' 551 01 0 00 001743* HRRZI 1,BUFF ; buffer address
2103 002311' 201 02 0 00 000110 MOVEI 2,^D72 ; word count
2104 002312' 400 03 0 00 000000 SETZ 3, ; clear zero fill specifier
2105 002313' 260 17 0 00 001741* GO GENCCW ; generate a CCW list
2106 002314' 200 01 0 00 005523' MOVE 1,[TS53BU,,BUFF] ; copy the data for this test
2107 002315' 251 01 0 00 000000# BLT 1,BUFF+^D71 ; into the data buffer
2108 002316' 476 00 0 00 005730' SETOM SAVSEG# ; initialize test segment
2109 002317' 263 17 0 00 000000 RTN ; return
2110
2111 ; Data
2112
2113 002320' 000000 000000 TS53BU: 0
2114 002321' 000000 000000 0
2115 002322' 400001 000020 400001,,20
2116 002323' 000000 000020 20
2117 002324' 400003 000000 400003,,0
2118 002325' 000001 000000 1,,0
2119 002326' 000001 000020 1,,20
2120 002327' 000001 000020 1,,20
2121 002330' 000000 000000 0
2122 002331' 400001 000020 400001,,20
2123 002332' 000001 000000 1,,0
2124 002333' 000001 000020 1,,20
2125
2126 002334' 400001 000001 400001,,1
2127 002335' 000000 000001 1
2128 002336' 000000 000021 21
2129 002337' 000000 000021 21
2130 002340' 000001 000001 1,,1
2131 002341' 000001 000001 1,,1
2132 002342' 400003 000021 400003,,21
2133 002343' 000001 000021 1,,21
2134 002344' 400001 000001 400001,,1
2135 002345' 400001 000021 400001,,21
2136 002346' 400003 000001 400003,,1
2137 002347' 000001 000021 1,,21
.MAIN MACRO %53A(1152) 10:53 16-Oct-84 Page 41
DFPTAA MAC 19-Feb-83 23:12 CBUS MODULE TESTS SEQ 1925
2138
2139 002350' 400001 000002 400001,,2
2140 002351' 000000 000002 2
2141 002352' 000000 000022 22
2142 002353' 000000 000022 22
2143 002354' 000001 000002 1,,2
2144 002355' 000001 000002 1,,2
2145 002356' 400003 000022 400003,,22
2146 002357' 000001 000022 1,,22
2147 002360' 400001 000002 400001,,2
2148 002361' 400001 000022 400001,,22
2149 002362' 400003 000002 400003,,2
2150 002363' 000001 000022 1,,22
2151
2152 002364' 400001 000004 400001,,4
2153 002365' 000000 000004 4
2154 002366' 000000 000024 24
2155 002367' 000000 000024 24
2156 002370' 000001 000004 1,,4
2157 002371' 000001 000004 1,,4
2158 002372' 400003 000024 400003,,24
2159 002373' 000001 000024 1,,24
2160 002374' 400001 000004 400001,,4
2161 002375' 400001 000024 400001,,24
2162 002376' 400003 000004 400003,,4
2163 002377' 000001 000024 1,,24
2164
2165 002400' 400001 000010 400001,,10
2166 002401' 000000 000010 10
2167 002402' 000000 000030 30
2168 002403' 000000 000030 30
2169 002404' 000001 000010 1,,10
2170 002405' 000001 000010 1,,10
2171 002406' 400003 000030 400003,,30
2172 002407' 000001 000030 1,,30
2173 002410' 400001 000010 400001,,10
2174 002411' 400001 000030 400001,,30
2175 002412' 400003 000010 400003,,10
2176 002413' 000001 000030 1,,30
2177
2178 002414' 000000 000003 3
2179 002415' 000000 000003 3
2180 002416' 400001 000023 400001,,23
2181 002417' 000000 000023 23
2182 002420' 400003 000003 400003,,3
2183 002421' 000001 000003 1,,3
2184 002422' 000001 000023 1,,23
2185 002423' 000001 000023 1,,23
2186 002424' 000000 000003 3
2187 002425' 400001 000023 400001,,23
2188 002426' 000001 000003 1,,3
2189 002427' 000001 000023 1,,23
.MAIN MACRO %53A(1152) 10:53 16-Oct-84 Page 42
DFPTAA MAC 19-Feb-83 23:12 CBUS MODULE TESTS SEQ 1926
2190
2191 ; Error messages
2192
2193 002430' 140000 005524' MA53: MSG!TXNOT![ASCIZ /Parity Predictor produced incorrect result:/]
2194 002431' 240000 002433' CALL!TXNOT!MA53PN ; print result
2195 002432' 000000000000# LAST!CALL!TXALL!TTPNT ; print test data
2196
2197 002433' 200 01 0 00 005730' MA53PN: MOVE 1,SAVSEG ; get test segment
2198 002434' 037 00 0 00 005535' TMSGC < Data in CBIN: >
2199 002435' 200 00 0 01 002320' MOVE TS53BU(1) ; get data word
2200 002436' 037 13 0 00 000000 PNTHW ; print it
2201 002437' 200 01 0 01 002320' MOVE 1,TS53BU(1) ; get data word
2202 002440' 607 01 0 00 400000 TLNN 1,400000 ; should be cleared?
2203 002441' 037 00 0 00 005541' TMSGC < 'CCMVPARCHK' should not be asserted, but is>
2204 002442' 603 01 0 00 400000 TLNE 1,400000 ; should be set?
2205 002443' 037 00 0 00 005553' TMSGC < 'CCMVPARCHK' should be asserted, but isn't>
2206 002444' 263 17 0 00 000000 RTN ; return
2207
2208 ; Microcode
2209
2210 ; Read 1st word
2211
2212 002445' 100000 000030 T53M: MWORD <ADDR=1000,JZ,SELM,MGC=30> ; 1000
2213 002446' 000000 002000
2214 002447' 000000 100000 MWORD <ADDR=0,LDCT,J=10> ; 0
2215 002450' 000000 000300
2216 002451' 000100 010000 MWORD <RPCT,J=1> ; 1
2217 002452' 000000 000220
2218 002453' 000200 000000 MWORD <CONT,S0B,AND,B=5,D=2> ; 2
2219 002454' 342002 400340
2220 002455' 000301 000000 MWORD <CJS,J=100,D=1> ; 3
2221 002456' 001000 000020
2222 002457' 000400 060000 MWORD <JMAP,J=6> ; 4
2223 002460' 000000 000040
2224
2225 ; Read 2nd through nth words
2226
2227 002461' 000501 030000 MWORD <CJS,J=103,D=1> ; 5
2228 002462' 001000 000020
2229 002463' 000600 110000 MWORD <CJP,J=11,S0A,OR,A=3,D=1,CENA,CCMB> ; 6
2230 002464' 431430 120060
2231 002465' 000752 000000 MWORD <CJP,J=5200,D=1,CENA,CCMP> ; 7
2232 002466' 001400 130060
2233 002467' 001000 130000 MWORD <JMAP,J=13,D=1> ; 10
2234 002470' 001000 000040
2235 002471' 001100 130000 MWORD <CJP,J=13,D=1,CENA,CCMP> ; 11
2236 002472' 001400 130060
2237 002473' 001252 000000 MWORD <JMAP,J=5200,D=1> ; 12
2238 002474' 001000 000040
2239 002475' 001300 150000 MWORD <CJP,J=15,S0A,PLUS,A=5,B=5,D=2,CRY,CENA,CCLW> ; 13
2240 002476' 402452 570460
2241 002477' 001400 050000 MWORD <JMAP,J=5> ; 14
2242 002500' 000000 000040
2243
2244 ; All done - set STOP and STORE
.MAIN MACRO %53A(1152) 10:53 16-Oct-84 Page 42-1
DFPTAA MAC 19-Feb-83 23:12 CBUS MODULE TESTS SEQ 1927
2245
2246 002501' 001551 000140 MWORD <JMAP,J=5100,SELC,MGC=140> ; 15
2247 002502' 000000 004040
2248
2249 ; Routine to read a word from CBUS, through formatter into R3
2250 ; (If this routine is started at 101, then the next word from
2251 ; the CBUS is read).
2252
2253 002503' 010000 000200 MWORD <ADDR=100,CONT,D=1,SELC,MGC=200> ; 100
2254 002504' 001000 004340
2255 002505' 010100 100000 MWORD <LDCT,J=10,D=1> ; 101
2256 002506' 001000 000300
2257 002507' 010201 020000 MWORD <RPCT,J=102,D=1> ; 102
2258 002510' 001000 000220
2259 002511' 010301 050000 MWORD <CJP,J=105,D=1,CENA,CCCA> ; 103
2260 002512' 001400 000060
2261 002513' 010401 030000 MWORD <JMAP,J=103,D=1> ; 104
2262 002514' 001000 000040
2263 002515' 010500 000004 MWORD <CONT,D=1,SELC,MGC=4> ; 105
2264 002516' 001000 004340
2265 002517' 010600 000200 MWORD <CONT,SD0,OR,B=3,D=2,SELM,MGC=200> ; 106
2266 002520' 732001 402340
2267 002521' 010700 000000 MWORD <CRTN,D=1> ; 107
2268 002522' 001000 000240
2269
2270 ; Routine to read R3 and place in EBUF
2271
2272 002523' 020002 002004 MWORD <ADDR=200,JMAP,J=200,S0A,A=3,OR,OENA,D=1,SELE,MGC=4>
2273 002524' 431030 005040
2274
2275 ; Routine to read R5 and place in EBUF
2276
2277 002525' 030003 002004 MWORD <ADDR=300,JMAP,J=300,S0A,A=5,OR,OENA,D=1,SELE,MGC=4>
2278 002526' 431050 005040
2279
2280 ; Initialization step
2281
2282 002527' 500050 010100 MWORD <ADDR=5000,JMAP,J=5001,SELC,MGC=100> ; 5000
2283 002530' 000000 004040
2284 002531' 500150 010020 MWORD <JMAP,J=5001,SELM,MGC=20> ; 5001
2285 002532' 000000 002040
2286
2287 ; Subroutine - Passed - Write 1 to bit 12 of CSR register
2288
2289 002533' 510000 000000 MWORD <ADDR=5100,CONT,SD0,AND,B=2,D=2> ; 5100
2290 002534' 742001 000340
2291 002535' 510100 000000 MWORD <CONT,S0B,PLUS,B=2,D=2,CRY> ; 5101
2292 002536' 302001 000740
2293 002537' 510200 260000 MWORD <LDCT,J=26> ; 5102
2294 002540' 000000 000300
2295 002541' 510351 030000 MWORD <RPCT,J=5103,SAB,PLUS,A=2,B=2,D=2> ; 5103
2296 002542' 102021 000220
2297 002543' 510400 002004 MWORD <CONT,S0A,A=2,OR,D=1,OENA,SELE,MGC=4> ; 5104
2298 002544' 431020 005340
2299 002545' 510551 070040 MWORD <CJP,J=5107,CENA,CCGC,D=1,SELE,MGC=40> ; 5105
.MAIN MACRO %53A(1152) 10:53 16-Oct-84 Page 42-2
DFPTAA MAC 19-Feb-83 23:12 CBUS MODULE TESTS SEQ 1928
2300 002546' 001400 015060
2301 002547' 510651 050000 MWORD <JMAP,J=5105,D=1> ; 5106
2302 002550' 001000 000040
2303 002551' 510700 000200 MWORD <CONT,S0A,A=1,OR,D=1,SELE,MGC=200> ; 5107
2304 002552' 431010 005340
2305 002553' 511051 100000 MWORD <JMAP,J=5110,D=1> ; 5110
2306 002554' 001000 000040
2307
2308 ; Subroutine - Failed - Write 1 to bit 13 of CSR register
2309
2310 002555' 520000 000000 MWORD <ADDR=5200,CONT,SD0,AND,B=2,D=2> ; 5200
2311 002556' 742001 000340
2312 002557' 520100 000000 MWORD <CONT,S0B,PLUS,B=2,D=2,CRY> ; 5201
2313 002560' 302001 000740
2314 002561' 520200 250000 MWORD <LDCT,J=25> ; 5202
2315 002562' 000000 000300
2316 002563' 520352 030000 MWORD <RPCT,J=5203,SAB,PLUS,A=2,B=2,D=2> ; 5203
2317 002564' 102021 000220
2318 002565' 520400 002004 MWORD <CONT,S0A,A=2,OR,D=1,OENA,SELE,MGC=4> ; 5204
2319 002566' 431020 005340
2320 002567' 520552 070040 MWORD <CJP,J=5207,CENA,CCGC,D=1,SELE,MGC=40> ; 5205
2321 002570' 001400 015060
2322 002571' 520652 050000 MWORD <JMAP,J=5205,D=1> ; 5206
2323 002572' 001000 000040
2324 002573' 520700 000200 MWORD <CONT,S0A,A=1,OR,D=1,SELE,MGC=200> ; 5207
2325 002574' 431010 005340
2326 002575' 521052 100000 MWORD <JMAP,J=5210,D=1> ; 5210
2327 002576' 001000 000040
2328 002577' 777777 777777 -1
.MAIN MACRO %53A(1152) 10:53 16-Oct-84 Page 43
DFPTAA MAC 19-Feb-83 23:12 CBUS MODULE TESTS SEQ 1929
2329
2330 ;#********************************************************************
2331 ;* Test 54 - Parity Predictor - CBIN to Fmtr/MPINDSTCOMP=1
2332 ;
2333 ; Description: Verify that the parity predictor works correctly
2334 ; when moving data from CBIN to the formatter with
2335 ; 'MPINDSTCOMP' asserted. This verifies one half
2336 ; of the predictor.
2337 ;
2338 ; Procedure: KL> Port Clear
2339 ; KL> Set up a CCW list to transfer 16 words
2340 ; KL> Start up port
2341 ;
2342 ; UC> Read word from CBUS into CBIN
2343 ; UC> Load formatter with word from CBIN
2344 ; UC> Test leftmost bit of data word - this should
2345 ; be the setting of 'CCMVRPARCHK'.
2346 ; UC> if correct - set bit 12 (DISABLE Complete)
2347 ; UC> if not correct - set bit 13 (ENABLE Complete)
2348 ; Read CSR and determine test disposition
2349 ;
2350 ; Repeat the above steps for each of the 16 data
2351 ; words.
2352 ;
2353 ; Failure: ---
2354 ;#********************************************************************
2355
2356 ; Test data
2357
2358 002600' 254 00 0 00 002611' TSTC54: JRST TG54 ; go start test
2359 002601' 100604 000054 CBUS!NDMP!NDCB!ZCBUS!54 ; test mask
2360 002602' 003015' 005565' T54M,,[ASCIZ ^Parity Predictor - CBIN to Fmtr/MPINDSTCOMP=1^]
2361 002603' 005517' 005520' [EXP MLAST!C11],,[EXP C12,C14,MLAST!C21]
2362 002604' 000000 003150' TSTC55 ; failure test table
2363 002605' 000000 003471' TSTC56 ; ...
2364 002606' 000000 004013' TSTC57
2365 002607' 000000 004352' TSTC60
2366 002610' 777777 777777 -1
2367
2368 ; Start test
2369
2370 002611' 201 00 0 00 000000' TG54: MOVEI ZA ; get address of module start
2371 002612' 260 17 0 00 002226* GO TRACE ; handle trace output
2372 002613' 201 01 0 00 003015' MOVEI 1,T54M ; set up microcode address
2373 002614' 260 17 0 00 002230* GO TLOAD ; load/verify it
2374 002615' 263 17 0 00 000000 RTN ; failed - exit test
.MAIN MACRO %53A(1152) 10:53 16-Oct-84 Page 44
DFPTAA MAC 19-Feb-83 23:12 CBUS MODULE TESTS SEQ 1930
2375
2376 ; Initialization
2377
2378 002616' 400 15 0 00 000000 TL54: SETZ ERFLG, ; clear error flag
2379 002617' 260 17 0 00 002233* GO IPACLR ; clear port
2380 002620' 402 00 0 00 002252* SETZM TSTSUB ; initialize subtest number
2381 002621' 201 06 0 00 002653' MOVEI 6,TS54 ; get test table address
2382
2383 ; Loop on test execute table entries
2384
2385 002622' 260 17 0 00 002236* TA54: GO TEXEC ; execute table entry
2386 002623' 254 00 0 00 002652' JRST TX54 ; end of test execute table
2387 002624' 254 00 0 00 002622' JRST TA54 ; keep looping after call
2388 002625' 474 15 0 00 000000 SETO ERFLG, ; error occurred
2389
2390 ; Get miscellaneous data
2391
2392 002626' 201 01 0 00 000300 MOVEI 1,300 ; get start address
2393 002627' 242 01 0 00 000001 LSH 1,1 ; position correctly
2394 002630' 260 17 0 00 002277* GO LDRAR ; load the register
2395 002631' 201 01 0 00 220010 MOVEI 1,TSTEBF!MPRUN!SINCYC ; get start data
2396 002632' 260 17 0 00 002305* GO LDCSR ; start up the port
2397 002633' 260 17 0 00 002260* GO RDEBUF ; read EBUF data
2398 002634' 202 01 0 00 005730' MOVEM 1,SAVSEG ; save segment number
2399 002635' 202 01 0 00 002620* MOVEM 1,TSTSUB ; set up subtest number
2400 002636' 350 00 0 00 002635* AOS TSTSUB ; ...
2401
2402 002637' 201 01 0 00 000200 MOVEI 1,200 ; get start address
2403 002640' 242 01 0 00 000001 LSH 1,1 ; position correctly
2404 002641' 260 17 0 00 002630* GO LDRAR ; load the register
2405 002642' 201 01 0 00 220010 MOVEI 1,TSTEBF!MPRUN!SINCYC ; get start data
2406 002643' 260 17 0 00 002632* GO LDCSR ; start up the port
2407 002644' 260 17 0 00 002633* GO RDEBUF ; read EBUF data
2408 002645' 202 01 0 00 005723' MOVEM 1,SAVDAT ; save data read
2409
2410 ; Handle error printouts and scope looping
2411
2412 002646' 027 00 0 00 003000' SCOPER MA54 ; print error message
2413 002647' 254 00 0 00 002616' JRST TL54 ; loop on error
2414 002650' 254 00 0 00 002652' JRST TX54 ; altmode exit
2415 002651' 322 15 0 00 002622' JUMPE ERFLG,TA54 ; do next test execute table entry
2416
2417 ; End of test
2418
2419 002652' 263 17 0 00 000000 TX54: RTN ; return
2420
2421 ; Test Execute Table, as: (CMD,parameters)
2422
2423 002653' 140000 002657' TS54: TTABLE (TCALL,TS54DA) ; set up data transfer
2424 002654' 040000 001000 TTABLE (TSTART,1000) ; start up port
2425 002655' 240002 000000 TTABLE (TCHECK,2) ; check if completed
2426 002656' 000000 000000 TTABLE (TLAST) ; end of table
2427
.MAIN MACRO %53A(1152) 10:53 16-Oct-84 Page 45
DFPTAA MAC 19-Feb-83 23:12 CBUS MODULE TESTS SEQ 1931
2428
2429 ; Set up data transfer
2430
2431 002657' 400 01 0 00 000000 TS54DA: SETZ 1, ; clear CSR data
2432 002660' 260 17 0 00 002643* GO LDCSR ; write CSR register
2433 002661' 201 01 0 00 005000 MOVEI 1,5000 ; get start address
2434 002662' 242 01 0 00 000001 LSH 1,1 ; position correctly
2435 002663' 260 17 0 00 002641* GO LDRAR ; load the register
2436 002664' 201 01 0 00 000010 MOVEI 1,MPRUN ; get start data
2437 002665' 260 17 0 00 002660* GO LDCSR ; start up the port
2438 002666' 201 00 0 00 000001 MOVEI 1 ; wait a bit (1 msec)
2439 002667' 260 17 0 00 002303* GO ODELAY
2440 002670' 400 01 0 00 000000 SETZ 1, ; clear CSR data
2441 002671' 260 17 0 00 002665* GO LDCSR ; stop the port
2442 002672' 200 01 0 00 005103' MOVE 1,[CBUFSZ,,CBUF] ; get pointer to control buffer
2443 002673' 260 17 0 00 002307* GO CHINIT ; initialize software
2444 002674' 551 01 0 00 002310* HRRZI 1,BUFF ; buffer address
2445 002675' 201 02 0 00 000074 MOVEI 2,^D60 ; word count
2446 002676' 400 03 0 00 000000 SETZ 3, ; clear zero fill specifier
2447 002677' 260 17 0 00 002313* GO GENCCW ; generate a CCW list
2448 002700' 200 01 0 00 005577' MOVE 1,[TS54BU,,BUFF] ; copy the data for this test
2449 002701' 251 01 0 00 000000# BLT 1,BUFF+^D59 ; into the data buffer
2450 002702' 476 00 0 00 005730' SETOM SAVSEG# ; initialize test segment
2451 002703' 263 17 0 00 000000 RTN ; return
2452
2453 ; Data
2454
2455 002704' 400001 000000 TS54BU: 400001,,0
2456 002705' 000000 000000 0
2457 002706' 000000 000020 20
2458 002707' 000000 000020 20
2459 002710' 000001 000000 1,,0
2460 002711' 000001 000000 1,,0
2461 002712' 400003 000020 400003,,20
2462 002713' 000001 000020 1,,20
2463 002714' 400001 000000 400001,,0
2464 002715' 400001 000020 400001,,20
2465 002716' 400003 000000 400003,,0
2466 002717' 000001 000020 1,,20
2467
2468 002720' 400001 000001 400001,,1
2469 002721' 000000 000001 1
2470 002722' 000000 000021 21
2471 002723' 000000 000021 21
2472 002724' 000001 000001 1,,1
2473 002725' 000001 000001 1,,1
2474 002726' 400003 000021 400003,,21
2475 002727' 000001 000021 1,,21
2476 002730' 400001 000001 400001,,1
2477 002731' 400001 000021 400001,,21
2478 002732' 400003 000001 400003,,1
2479 002733' 000001 000021 1,,21
.MAIN MACRO %53A(1152) 10:53 16-Oct-84 Page 46
DFPTAA MAC 19-Feb-83 23:12 CBUS MODULE TESTS SEQ 1932
2480
2481 002734' 400001 000002 400001,,2
2482 002735' 000000 000002 2
2483 002736' 000000 000022 22
2484 002737' 000000 000022 22
2485 002740' 000001 000002 1,,2
2486 002741' 000001 000002 1,,2
2487 002742' 400003 000022 400003,,22
2488 002743' 000001 000022 1,,22
2489 002744' 400001 000002 400001,,2
2490 002745' 400001 000022 400001,,22
2491 002746' 400003 000002 400003,,2
2492 002747' 000001 000022 1,,22
2493
2494 002750' 400001 000004 400001,,4
2495 002751' 000000 000004 4
2496 002752' 000000 000024 24
2497 002753' 000000 000024 24
2498 002754' 000001 000004 1,,4
2499 002755' 000001 000004 1,,4
2500 002756' 400003 000024 400003,,24
2501 002757' 000001 000024 1,,24
2502 002760' 400001 000004 400001,,4
2503 002761' 400001 000024 400001,,24
2504 002762' 400003 000004 400003,,4
2505 002763' 000001 000024 1,,24
2506
2507 002764' 400001 000010 400001,,10
2508 002765' 000000 000010 10
2509 002766' 000000 000030 30
2510 002767' 000000 000030 30
2511 002770' 000001 000010 1,,10
2512 002771' 000001 000010 1,,10
2513 002772' 400003 000030 400003,,30
2514 002773' 000001 000030 1,,30
2515 002774' 400001 000010 400001,,10
2516 002775' 400001 000030 400001,,30
2517 002776' 400003 000010 400003,,10
2518 002777' 000001 000030 1,,30
.MAIN MACRO %53A(1152) 10:53 16-Oct-84 Page 47
DFPTAA MAC 19-Feb-83 23:12 CBUS MODULE TESTS SEQ 1933
2519
2520 ; Error messages
2521
2522 003000' 140000 005524' MA54: MSG!TXNOT![ASCIZ /Parity Predictor produced incorrect result:/]
2523 003001' 240000 003003' CALL!TXNOT!MA54PN ; print result
2524 003002' 000000000000# LAST!CALL!TXALL!TTPNT ; print test data
2525
2526 003003' 200 01 0 00 005730' MA54PN: MOVE 1,SAVSEG ; get test segment
2527 003004' 037 00 0 00 005535' TMSGC < Data in CBIN: >
2528 003005' 200 00 0 01 002704' MOVE TS54BU(1) ; get data word
2529 003006' 037 13 0 00 000000 PNTHW ; print it
2530 003007' 200 01 0 01 002704' MOVE 1,TS54BU(1) ; get data word
2531 003010' 607 01 0 00 400000 TLNN 1,400000 ; should be cleared?
2532 003011' 037 00 0 00 005541' TMSGC < 'CCMVPARCHK' should not be asserted, but is>
2533 003012' 603 01 0 00 400000 TLNE 1,400000 ; should be set?
2534 003013' 037 00 0 00 005553' TMSGC < 'CCMVPARCHK' should be asserted, but isn't>
2535 003014' 263 17 0 00 000000 RTN ; return
2536
2537 ; Microcode
2538
2539 ; Read 1st word
2540
2541 003015' 100000 000030 T54M: MWORD <ADDR=1000,JZ,SELM,MGC=30> ; 1000
2542 003016' 000000 002000
2543 003017' 000000 100000 MWORD <ADDR=0,LDCT,J=10> ; 0
2544 003020' 000000 000300
2545 003021' 000100 010000 MWORD <RPCT,J=1> ; 1
2546 003022' 000000 000220
2547 003023' 000200 000000 MWORD <CONT,S0B,AND,B=5,D=2> ; 2
2548 003024' 342002 400340
2549 003025' 000301 000000 MWORD <CJS,J=100,D=1> ; 3
2550 003026' 001000 000020
2551 003027' 000400 060000 MWORD <JMAP,J=6> ; 4
2552 003030' 000000 000040
2553
2554 ; Read 2nd through nth words
2555
2556 003031' 000501 030000 MWORD <CJS,J=103,D=1> ; 5
2557 003032' 001000 000020
2558 003033' 000600 110000 MWORD <CJP,J=11,S0A,OR,A=3,D=1,CENA,CCMB> ; 6
2559 003034' 431430 120060
2560 003035' 000752 000000 MWORD <CJP,J=5200,D=1,CENA,CCMP> ; 7
2561 003036' 001400 130060
2562 003037' 001000 130000 MWORD <JMAP,J=13,D=1> ; 10
2563 003040' 001000 000040
2564 003041' 001100 130000 MWORD <CJP,J=13,D=1,CENA,CCMP> ; 11
2565 003042' 001400 130060
2566 003043' 001252 000000 MWORD <JMAP,J=5200,D=1> ; 12
2567 003044' 001000 000040
2568 003045' 001300 150000 MWORD <CJP,J=15,S0A,PLUS,A=5,B=5,D=2,CRY,CENA,CCLW> ; 13
2569 003046' 402452 570460
2570 003047' 001400 050000 MWORD <JMAP,J=5> ; 14
2571 003050' 000000 000040
2572
2573 ; All done - set STOP and STORE
.MAIN MACRO %53A(1152) 10:53 16-Oct-84 Page 47-1
DFPTAA MAC 19-Feb-83 23:12 CBUS MODULE TESTS SEQ 1934
2574
2575 003051' 001551 000140 MWORD <JMAP,J=5100,SELC,MGC=140> ; 15
2576 003052' 000000 004040
2577
2578 ; Routine to read a word from CBUS, through formatter into R3
2579 ; (If this routine is started at 101, then the next word from
2580 ; the CBUS is read).
2581
2582 003053' 010000 000200 MWORD <ADDR=100,CONT,D=1,SELC,MGC=200> ; 100
2583 003054' 001000 004340
2584 003055' 010100 100000 MWORD <LDCT,J=10,D=1> ; 101
2585 003056' 001000 000300
2586 003057' 010201 020000 MWORD <RPCT,J=102,D=1> ; 102
2587 003060' 001000 000220
2588 003061' 010301 050000 MWORD <CJP,J=105,D=1,CENA,CCCA> ; 103
2589 003062' 001400 000060
2590 003063' 010401 030000 MWORD <JMAP,J=103,D=1> ; 104
2591 003064' 001000 000040
2592 003065' 010500 000014 MWORD <CONT,D=1,SELC,MGC=14> ; 105
2593 003066' 001000 004340
2594 003067' 010600 000200 MWORD <CONT,SD0,OR,B=3,D=2,SELM,MGC=200> ; 106
2595 003070' 732001 402340
2596 003071' 010700 000000 MWORD <CRTN,D=1> ; 107
2597 003072' 001000 000240
2598
2599 ; Routine to read R3 and place in EBUF
2600
2601 003073' 020002 002004 MWORD <ADDR=200,JMAP,J=200,S0A,A=3,OR,OENA,D=1,SELE,MGC=4>
2602 003074' 431030 005040
2603
2604 ; Routine to read R5 and place in EBUF
2605
2606 003075' 030003 002004 MWORD <ADDR=300,JMAP,J=300,S0A,A=5,OR,OENA,D=1,SELE,MGC=4>
2607 003076' 431050 005040
2608
2609 ; Initialization step
2610
2611 003077' 500050 010100 MWORD <ADDR=5000,JMAP,J=5001,SELC,MGC=100> ; 5000
2612 003100' 000000 004040
2613 003101' 500150 010020 MWORD <JMAP,J=5001,SELM,MGC=20> ; 5001
2614 003102' 000000 002040
2615
2616 ; Subroutine - Passed - Write 1 to bit 12 of CSR register
2617
2618 003103' 510000 000000 MWORD <ADDR=5100,CONT,SD0,AND,B=2,D=2> ; 5100
2619 003104' 742001 000340
2620 003105' 510100 000000 MWORD <CONT,S0B,PLUS,B=2,D=2,CRY> ; 5101
2621 003106' 302001 000740
2622 003107' 510200 260000 MWORD <LDCT,J=26> ; 5102
2623 003110' 000000 000300
2624 003111' 510351 030000 MWORD <RPCT,J=5103,SAB,PLUS,A=2,B=2,D=2> ; 5103
2625 003112' 102021 000220
2626 003113' 510400 002004 MWORD <CONT,S0A,A=2,OR,D=1,OENA,SELE,MGC=4> ; 5104
2627 003114' 431020 005340
2628 003115' 510551 070040 MWORD <CJP,J=5107,CENA,CCGC,D=1,SELE,MGC=40> ; 5105
.MAIN MACRO %53A(1152) 10:53 16-Oct-84 Page 47-2
DFPTAA MAC 19-Feb-83 23:12 CBUS MODULE TESTS SEQ 1935
2629 003116' 001400 015060
2630 003117' 510651 050000 MWORD <JMAP,J=5105,D=1> ; 5106
2631 003120' 001000 000040
2632 003121' 510700 000200 MWORD <CONT,S0A,A=1,OR,D=1,SELE,MGC=200> ; 5107
2633 003122' 431010 005340
2634 003123' 511051 100000 MWORD <JMAP,J=5110,D=1> ; 5110
2635 003124' 001000 000040
2636
2637 ; Subroutine - Failed - Write 1 to bit 13 of CSR register
2638
2639 003125' 520000 000000 MWORD <ADDR=5200,CONT,SD0,AND,B=2,D=2> ; 5200
2640 003126' 742001 000340
2641 003127' 520100 000000 MWORD <CONT,S0B,PLUS,B=2,D=2,CRY> ; 5201
2642 003130' 302001 000740
2643 003131' 520200 250000 MWORD <LDCT,J=25> ; 5202
2644 003132' 000000 000300
2645 003133' 520352 030000 MWORD <RPCT,J=5203,SAB,PLUS,A=2,B=2,D=2> ; 5203
2646 003134' 102021 000220
2647 003135' 520400 002004 MWORD <CONT,S0A,A=2,OR,D=1,OENA,SELE,MGC=4> ; 5204
2648 003136' 431020 005340
2649 003137' 520552 070040 MWORD <CJP,J=5207,CENA,CCGC,D=1,SELE,MGC=40> ; 5205
2650 003140' 001400 015060
2651 003141' 520652 050000 MWORD <JMAP,J=5205,D=1> ; 5206
2652 003142' 001000 000040
2653 003143' 520700 000200 MWORD <CONT,S0A,A=1,OR,D=1,SELE,MGC=200> ; 5207
2654 003144' 431010 005340
2655 003145' 521052 100000 MWORD <JMAP,J=5210,D=1> ; 5210
2656 003146' 001000 000040
2657 003147' 777777 777777 -1
.MAIN MACRO %53A(1152) 10:53 16-Oct-84 Page 48
DFPTAA MAC 19-Feb-83 23:12 CBUS MODULE TESTS SEQ 1936
2658
2659 ;#********************************************************************
2660 ;* Test 55 - Parity Predictor - Fmtr to PLOUT
2661 ;
2662 ; Description: Verify that the parity predictor works correctly
2663 ; when moving data from formatter to PLOUT.
2664 ;
2665 ; Procedure: KL> Port Clear
2666 ; KL> Set up a CCW list to transfer 8 words
2667 ; KL> Start up port
2668 ; UC> Read words from CBUS into CBIN to formatter
2669 ; then to local storage locations 0-7.
2670 ; UC> Initialize parity predictor with 'MPCLRPARCHK'
2671 ;
2672 ; UC> Load formatter with word from local storage
2673 ; UC> Assert 'MPFMTRTOPLOUT'
2674 ; UC> Test leftmost bit of data word - this should
2675 ; be the setting of 'CCMVRPARCHK'.
2676 ; UC> if correct - set bit 12 (DISABLE Complete)
2677 ; UC> if not correct - set bit 13 (ENABLE Complete)
2678 ; Read CSR and determine test disposition
2679 ;
2680 ; Repeat the above steps for each of the 8 data
2681 ; words.
2682 ;
2683 ; Failure: ---
2684 ;#********************************************************************
2685
2686 ; Test data
2687
2688 003150' 254 00 0 00 003160' TSTC55: JRST TG55 ; go start test
2689 003151' 100604 000055 CBUS!NDMP!NDCB!ZCBUS!55 ; test mask
2690 003152' 003300' 005600' T55M,,[ASCIZ ^Parity Predictor - Fmtr to PLOUT^]
2691 003153' 005517' 005520' [EXP MLAST!C11],,[EXP C12,C14,MLAST!C21]
2692 003154' 000000 003471' TSTC56 ; failure test table
2693 003155' 000000 004013' TSTC57 ; ...
2694 003156' 000000 004352' TSTC60
2695 003157' 777777 777777 -1
2696
2697 ; Start test
2698
2699 003160' 201 00 0 00 000000' TG55: MOVEI ZA ; get address of module start
2700 003161' 260 17 0 00 002612* GO TRACE ; handle trace output
2701 003162' 201 01 0 00 003300' MOVEI 1,T55M ; set up microcode address
2702 003163' 260 17 0 00 002614* GO TLOAD ; load/verify it
2703 003164' 263 17 0 00 000000 RTN ; failed - exit test
2704
2705 ; Initialization
2706
2707 003165' 400 15 0 00 000000 TL55: SETZ ERFLG, ; clear error flag
2708 003166' 260 17 0 00 002617* GO IPACLR ; clear port
2709 003167' 402 00 0 00 002636* SETZM TSTSUB ; initialize subtest number
2710 003170' 201 06 0 00 003202' MOVEI 6,TS55 ; get test table address
.MAIN MACRO %53A(1152) 10:53 16-Oct-84 Page 49
DFPTAA MAC 19-Feb-83 23:12 CBUS MODULE TESTS SEQ 1937
2711
2712 ; Loop on test execute table entries
2713
2714 003171' 260 17 0 00 002622* TA55: GO TEXEC ; execute table entry
2715 003172' 254 00 0 00 003201' JRST TX55 ; end of test execute table
2716 003173' 254 00 0 00 003171' JRST TA55 ; keep looping after call
2717 003174' 474 15 0 00 000000 SETO ERFLG, ; error occurred
2718
2719 ; Handle error printouts and scope looping
2720
2721 003175' 027 00 0 00 003263' SCOPER MA55 ; print error message
2722 003176' 254 00 0 00 003165' JRST TL55 ; loop on error
2723 003177' 254 00 0 00 003201' JRST TX55 ; altmode exit
2724 003200' 322 15 0 00 003171' JUMPE ERFLG,TA55 ; do next test execute table entry
2725
2726 ; End of test
2727
2728 003201' 263 17 0 00 000000 TX55: RTN ; return
2729
2730 ; Test Execute Table, as: (CMD,parameters)
2731
2732 003202' 140000 003212' TS55: TTABLE (TCALL,TS55DA) ; set up data transfer
2733 003203' 140000 003243' TTABLE (TCALL,TS55IN) ; initialize counter
2734 003204' 200000 003245' TS55A: TTABLE (TCALLC,TS55NE) ; set up next test segment
2735 003205' 400000 000010 TTABLE (TSSTAR,10) ; start up port (read a word)
2736 003206' 240002 000000 TTABLE (TCHECK,2) ; check if completed
2737 003207' 340000 000000 TTABLE (TEXIT) ; exit if error yet
2738 003210' 300000 003204' TTABLE (TJRST,TS55A) ; loop till done
2739 003211' 000000 000000 TTABLE (TLAST) ; end of table
2740
2741 ; Set up data transfer
2742
2743 003212' 201 01 0 00 000200 TS55DA: MOVEI 1,200 ; get start address
2744 003213' 242 01 0 00 000001 LSH 1,1 ; position correctly
2745 003214' 260 17 0 00 002663* GO LDRAR ; load the register
2746 003215' 201 01 0 00 000010 MOVEI 1,MPRUN ; get start data
2747 003216' 260 17 0 00 002671* GO LDCSR ; start up the port
2748 003217' 200 01 0 00 005103' MOVE 1,[CBUFSZ,,CBUF] ; get pointer to control buffer
2749 003220' 260 17 0 00 002673* GO CHINIT ; initialize software
2750 003221' 551 01 0 00 002674* HRRZI 1,BUFF ; buffer address
2751 003222' 201 02 0 00 000010 MOVEI 2,^D8 ; word count
2752 003223' 400 03 0 00 000000 SETZ 3, ; clear zero fill specifier
2753 003224' 260 17 0 00 002677* GO GENCCW ; generate a CCW list
2754 003225' 200 01 0 00 005607' MOVE 1,[TS55BU,,BUFF] ; copy the data for this test
2755 003226' 251 01 0 00 000000# BLT 1,BUFF+7 ; into the data buffer
2756 003227' 400 01 0 00 000000 SETZ 1, ; clear CSR data
2757 003230' 260 17 0 00 003216* GO LDCSR ; write CSR register
2758 003231' 201 01 0 00 005000 MOVEI 1,5000 ; get start address
2759 003232' 242 01 0 00 000001 LSH 1,1 ; position correctly
2760 003233' 260 17 0 00 003214* GO LDRAR ; load the register
.MAIN MACRO %53A(1152) 10:53 16-Oct-84 Page 50
DFPTAA MAC 19-Feb-83 23:12 CBUS MODULE TESTS SEQ 1938
2761 003234' 201 01 0 00 000010 MOVEI 1,MPRUN ; get start data
2762 003235' 260 17 0 00 003230* GO LDCSR ; start up the port
2763 003236' 201 00 0 00 000001 MOVEI 1 ; ensure the port has enough
2764 003237' 260 17 0 00 002667* GO ODELAY ; time to initialize
2765 003240' 400 01 0 00 000000 SETZ 1, ; clear CSR data
2766 003241' 260 17 0 00 003235* GO LDCSR ; stop the port
2767 003242' 263 17 0 00 000000 RTN ; return
2768
2769 ; Initialize test segment
2770
2771 003243' 476 00 0 00 005730' TS55IN: SETOM SAVSEG# ; initialize test segment
2772 003244' 263 17 0 00 000000 RTN ; return
2773
2774 ; Point to next test segment
2775
2776 003245' 350 01 0 00 005730' TS55NE: AOS 1,SAVSEG ; point to next test segment
2777 003246' 307 01 0 00 000007 CAIG 1,^D7 ; done yet?
2778 003247' 350 00 0 17 000000 AOS (P) ; no - set up proper return
2779 003250' 271 01 0 00 000010 ADDI 1,10 ; point to starting address
2780 003251' 542 01 0 00 003205' HRRM 1,TS55A+1 ; set up starting address
2781 003252' 263 17 0 00 000000 RTN ; return
2782
2783 ; Data
2784
2785 003253' 400000 000000 TS55BU: 400000,,0
2786 003254' 000000 000003 0,,3
2787 003255' 400000 000005 400000,,5
2788 003256' 000000 000011 0,,11
2789 003257' 400000 000001 400000,,1
2790 003260' 000000 000002 0,,2
2791 003261' 400000 000004 400000,,4
2792 003262' 000000 000010 0,,10
2793
2794 ; Error messages
2795
2796 003263' 140000 005524' MA55: MSG!TXNOT![ASCIZ /Parity Predictor produced incorrect result:/]
2797 003264' 240000 003266' CALL!TXNOT!MA55PN ; print result
2798 003265' 000000000000# LAST!CALL!TXALL!TTPNT ; print test data
2799
2800 003266' 200 01 0 00 005730' MA55PN: MOVE 1,SAVSEG ; get test segment
2801 003267' 037 00 0 00 005610' TMSGC < Data in FMTR: >
2802 003270' 200 00 0 01 003253' MOVE TS55BU(1) ; get data word
2803 003271' 037 13 0 00 000000 PNTHW ; print it
2804 003272' 200 01 0 01 003253' MOVE 1,TS55BU(1) ; get data word
2805 003273' 607 01 0 00 400000 TLNN 1,400000 ; should be cleared?
2806 003274' 037 00 0 00 005541' TMSGC < 'CCMVPARCHK' should not be asserted, but is>
2807 003275' 603 01 0 00 400000 TLNE 1,400000 ; should be set?
2808 003276' 037 00 0 00 005553' TMSGC < 'CCMVPARCHK' should be asserted, but isn't>
2809 003277' 263 17 0 00 000000 RTN ; return
.MAIN MACRO %53A(1152) 10:53 16-Oct-84 Page 51
DFPTAA MAC 19-Feb-83 23:12 CBUS MODULE TESTS SEQ 1939
2810
2811 ; Microcode
2812
2813 ; Read local storage location
2814
2815 003300' 001000 270000 T55M: MWORD <ADDR=10,JMAP,J=27,SD0,OR,B=3,D=2,RDLM,MGC=0>
2816 003301' 732001 620040
2817 003302' 001100 300001 MWORD <JMAP,J=30,SD0,OR,B=3,D=2,RDLM,MGC=1> ; 11
2818 003303' 732001 620040
2819 003304' 001200 300002 MWORD <JMAP,J=30,SD0,OR,B=3,D=2,RDLM,MGC=2> ; 12
2820 003305' 732001 620040
2821 003306' 001300 300003 MWORD <JMAP,J=30,SD0,OR,B=3,D=2,RDLM,MGC=3> ; 13
2822 003307' 732001 620040
2823 003310' 001400 300004 MWORD <JMAP,J=30,SD0,OR,B=3,D=2,RDLM,MGC=4> ; 14
2824 003311' 732001 620040
2825 003312' 001500 300005 MWORD <JMAP,J=30,SD0,OR,B=3,D=2,RDLM,MGC=5> ; 15
2826 003313' 732001 620040
2827 003314' 001600 300006 MWORD <JMAP,J=30,SD0,OR,B=3,D=2,RDLM,MGC=6> ; 16
2828 003315' 732001 620040
2829 003316' 001700 300007 MWORD <JMAP,J=30,SD0,OR,B=3,D=2,RDLM,MGC=7> ; 17
2830 003317' 732001 620040
2831
2832 ; Do a test segment
2833
2834 003320' 002700 000030 MWORD <ADDR=27,CONT,D=1,SELM,MGC=30> ; 27
2835 003321' 001000 002340
2836 003322' 003000 002040 MWORD <CONT,S0A,A=3,D=1,OENA,SELF,MGC=40> ; 30
2837 003323' 401030 003340
2838 003324' 003100 000010 MWORD <CONT,D=1,SELF,MGC=10> ; 31
2839 003325' 001000 003340
2840 003326' 003200 350000 MWORD <CJP,J=35,S0A,A=3,D=1,CENA,CCMB> ; 32
2841 003327' 401430 120060
2842 003330' 003352 000000 MWORD <CJP,J=5200,D=1,CENA,CCMP> ; 33
2843 003331' 001400 130060
2844 003332' 003451 000000 MWORD <JMAP,J=5100,D=1> ; 34
2845 003333' 001000 000040
2846 003334' 003551 000000 MWORD <CJP,J=5100,D=1,CENA,CCMP> ; 35
2847 003335' 001400 130060
2848 003336' 003652 000000 MWORD <JMAP,J=5200,D=1> ; 36
2849 003337' 001000 000040
2850
2851 ; Read a word from CBUS into CBIN
2852
2853 003340' 010001 010200 MWORD <ADDR=100,JMAP,J=101,D=1,SELC,MGC=200> ; 100
2854 003341' 001000 004040
2855 003342' 010101 030000 MWORD <CJP,J=103,D=1,CENA,CCCA> ; 101
2856 003343' 001400 000060
2857 003344' 010201 010000 MWORD <JMAP,J=101,D=1> ; 102
2858 003345' 001000 000040
2859 003346' 010300 000004 MWORD <CONT,D=1,SELC,MGC=4> ; 103
2860 003347' 001000 004340
2861 003350' 010400 000200 MWORD <CRTN,SD0,OR,B=3,D=2,SELM,MGC=200> ; 104
2862 003351' 732001 402240
2863
2864 ; Ensure CBUS is stopped
.MAIN MACRO %53A(1152) 10:53 16-Oct-84 Page 51-1
DFPTAA MAC 19-Feb-83 23:12 CBUS MODULE TESTS SEQ 1940
2865
2866 003352' 020000 000120 MWORD <ADDR=200,JZ,SELC,MGC=120> ; 200
2867 003353' 000000 004000
2868
2869 ; Initialization steps
2870
2871 003354' 500050 010100 MWORD <ADDR=5000,JMAP,J=5001,SELC,MGC=100> ; 5000
2872 003355' 000000 004040
2873 003356' 500100 000020 MWORD <CONT,SELM,MGC=20> ; 5001
2874 003357' 000000 002340
2875 003360' 500201 000000 MWORD <CJS,J=100,D=1> ; 5002
2876 003361' 001000 000020
2877 003362' 500300 002000 MWORD <CONT,S0A,A=3,D=1,OENA,LDLM,MGC=0> ; 5003
2878 003363' 401030 230340
2879 003364' 500401 010000 MWORD <CJS,J=101,D=1> ; 5004
2880 003365' 001000 000020
2881 003366' 500500 002001 MWORD <CONT,S0A,A=3,D=1,OENA,LDLM,MGC=1> ; 5005
2882 003367' 401030 230340
2883 003370' 500601 010000 MWORD <CJS,J=101,D=1> ; 5006
2884 003371' 001000 000020
2885 003372' 500700 002002 MWORD <CONT,S0A,A=3,D=1,OENA,LDLM,MGC=2> ; 5007
2886 003373' 401030 230340
2887 003374' 501001 010000 MWORD <CJS,J=101,D=1> ; 5010
2888 003375' 001000 000020
2889 003376' 501100 002003 MWORD <CONT,S0A,A=3,D=1,OENA,LDLM,MGC=3> ; 5011
2890 003377' 401030 230340
2891 003400' 501201 010000 MWORD <CJS,J=101,D=1> ; 5012
2892 003401' 001000 000020
2893 003402' 501300 002004 MWORD <CONT,S0A,A=3,D=1,OENA,LDLM,MGC=4> ; 5013
2894 003403' 401030 230340
2895 003404' 501401 010000 MWORD <CJS,J=101,D=1> ; 5014
2896 003405' 001000 000020
2897 003406' 501500 002005 MWORD <CONT,S0A,A=3,D=1,OENA,LDLM,MGC=5> ; 5015
2898 003407' 401030 230340
2899 003410' 501601 010000 MWORD <CJS,J=101,D=1> ; 5016
2900 003411' 001000 000020
2901 003412' 501700 002006 MWORD <CONT,S0A,A=3,D=1,OENA,LDLM,MGC=6> ; 5017
2902 003413' 401030 230340
2903 003414' 502001 010000 MWORD <CJS,J=101,D=1> ; 5020
2904 003415' 001000 000020
2905 003416' 502100 002007 MWORD <CONT,S0A,A=3,D=1,OENA,LDLM,MGC=7> ; 5021
2906 003417' 401030 230340
2907 003420' 502200 000000 MWORD <JZ> ; 5022
2908 003421' 000000 000000
2909 003422' 000000 000000 MWORD <ADDR=0,JZ> ; 5023
2910 003423' 000000 000000
2911
2912 ; Subroutine - Passed - Write 1 to bit 12 of CSR register
2913
2914 003424' 510000 000000 MWORD <ADDR=5100,CONT,SD0,AND,B=2,D=2> ; 5100
2915 003425' 742001 000340
2916 003426' 510100 000000 MWORD <CONT,S0B,PLUS,B=2,D=2,CRY> ; 5101
2917 003427' 302001 000740
2918 003430' 510200 260000 MWORD <LDCT,J=26> ; 5102
2919 003431' 000000 000300
.MAIN MACRO %53A(1152) 10:53 16-Oct-84 Page 51-2
DFPTAA MAC 19-Feb-83 23:12 CBUS MODULE TESTS SEQ 1941
2920 003432' 510351 030000 MWORD <RPCT,J=5103,SAB,PLUS,A=2,B=2,D=2> ; 5103
2921 003433' 102021 000220
2922 003434' 510400 002004 MWORD <CONT,S0A,A=2,OR,D=1,OENA,SELE,MGC=4> ; 5104
2923 003435' 431020 005340
2924 003436' 510551 070040 MWORD <CJP,J=5107,CENA,CCGC,D=1,SELE,MGC=40> ; 5105
2925 003437' 001400 015060
2926 003440' 510651 050000 MWORD <JMAP,J=5105,D=1> ; 5106
2927 003441' 001000 000040
2928 003442' 510700 000200 MWORD <CONT,S0A,A=1,OR,D=1,SELE,MGC=200> ; 5107
2929 003443' 431010 005340
2930 003444' 511051 100000 MWORD <JMAP,J=5110,D=1> ; 5110
2931 003445' 001000 000040
2932
2933 ; Subroutine - Failed - Write 1 to bit 13 of CSR register
2934
2935 003446' 520000 000000 MWORD <ADDR=5200,CONT,SD0,AND,B=2,D=2> ; 5200
2936 003447' 742001 000340
2937 003450' 520100 000000 MWORD <CONT,S0B,PLUS,B=2,D=2,CRY> ; 5201
2938 003451' 302001 000740
2939 003452' 520200 250000 MWORD <LDCT,J=25> ; 5202
2940 003453' 000000 000300
2941 003454' 520352 030000 MWORD <RPCT,J=5203,SAB,PLUS,A=2,B=2,D=2> ; 5203
2942 003455' 102021 000220
2943 003456' 520400 002004 MWORD <CONT,S0A,A=2,OR,D=1,OENA,SELE,MGC=4> ; 5204
2944 003457' 431020 005340
2945 003460' 520552 070040 MWORD <CJP,J=5207,CENA,CCGC,D=1,SELE,MGC=40> ; 5205
2946 003461' 001400 015060
2947 003462' 520652 050000 MWORD <JMAP,J=5205,D=1> ; 5206
2948 003463' 001000 000040
2949 003464' 520700 000200 MWORD <CONT,S0A,A=1,OR,D=1,SELE,MGC=200> ; 5207
2950 003465' 431010 005340
2951 003466' 521052 100000 MWORD <JMAP,J=5210,D=1> ; 5210
2952 003467' 001000 000040
2953 003470' 777777 777777 -1
.MAIN MACRO %53A(1152) 10:53 16-Oct-84 Page 52
DFPTAA MAC 19-Feb-83 23:12 CBUS MODULE TESTS SEQ 1942
2954
2955 ;#********************************************************************
2956 ;* Test 56 - Parity Predictor - PLIN to Fmtr/MPCOREDUMP=0
2957 ;
2958 ; Description: Verify that the parity predictor works correctly
2959 ; when moving data from PLIN to formatter with
2960 ; 'MPCOREDUMP' not asserted. This verifies one half
2961 ; of the parity predictor
2962 ;
2963 ; Procedure: KL> Port Clear
2964 ; KL> Set up a CCW list to transfer 8 words
2965 ; KL> Start up port
2966 ; UC> Read words from CBUS into CBIN to formatter
2967 ; then to local storage locations 0-7.
2968 ; UC> Initialize parity predictor with 'MPCLRPARCHK'
2969 ;
2970 ; UC> Load PLOUT with word from local storage
2971 ; UC> Load PLIN with word from PLOUT
2972 ; UC> Assert 'MPPLINTOFMTR'
2973 ; UC> Test leftmost bit of data word - this should
2974 ; be the setting of 'CCMVRPARCHK'.
2975 ; UC> if correct - set bit 12 (DISABLE Complete)
2976 ; UC> if not correct - set bit 13 (ENABLE Complete)
2977 ; Read CSR and determine test disposition
2978 ;
2979 ; Repeat the above steps for each of the 8 data
2980 ; words.
2981 ;
2982 ; Failure: ---
2983 ;#********************************************************************
2984
2985 ; Test data
2986
2987 003471' 254 00 0 00 003500' TSTC56: JRST TG56 ; go start test
2988 003472' 100604 000056 CBUS!NDMP!NDCB!ZCBUS!56 ; test mask
2989 003473' 003620' 005614' T56M,,[ASCIZ ^Parity Predictor - PLIN to Fmtr/MPCOREDUMP=0^]
2990 003474' 005517' 005625' [EXP MLAST!C11],,[EXP C8,C12,C14,MLAST!C21]
2991 003475' 000000 004013' TSTC57 ; failure test table
2992 003476' 000000 004352' TSTC60 ; ...
2993 003477' 777777 777777 -1
2994
2995 ; Start test
2996
2997 003500' 201 00 0 00 000000' TG56: MOVEI ZA ; get address of module start
2998 003501' 260 17 0 00 003161* GO TRACE ; handle trace output
2999 003502' 201 01 0 00 003620' MOVEI 1,T56M ; set up microcode address
3000 003503' 260 17 0 00 003163* GO TLOAD ; load/verify it
3001 003504' 263 17 0 00 000000 RTN ; failed - exit test
.MAIN MACRO %53A(1152) 10:53 16-Oct-84 Page 53
DFPTAA MAC 19-Feb-83 23:12 CBUS MODULE TESTS SEQ 1943
3002
3003 ; Initialization
3004
3005 003505' 400 15 0 00 000000 TL56: SETZ ERFLG, ; clear error flag
3006 003506' 260 17 0 00 003166* GO IPACLR ; clear port
3007 003507' 402 00 0 00 003167* SETZM TSTSUB ; initialize subtest number
3008 003510' 201 06 0 00 003522' MOVEI 6,TS56 ; get test table address
3009
3010 ; Loop on test execute table entries
3011
3012 003511' 260 17 0 00 003171* TA56: GO TEXEC ; execute table entry
3013 003512' 254 00 0 00 003521' JRST TX56 ; end of test execute table
3014 003513' 254 00 0 00 003511' JRST TA56 ; keep looping after call
3015 003514' 474 15 0 00 000000 SETO ERFLG, ; error occurred
3016
3017 ; Handle error printouts and scope looping
3018
3019 003515' 027 00 0 00 003603' SCOPER MA56 ; print error message
3020 003516' 254 00 0 00 003505' JRST TL56 ; loop on error
3021 003517' 254 00 0 00 003521' JRST TX56 ; altmode exit
3022 003520' 322 15 0 00 003511' JUMPE ERFLG,TA56 ; do next test execute table entry
3023
3024 ; End of test
3025
3026 003521' 263 17 0 00 000000 TX56: RTN ; return
3027
3028 ; Test Execute Table, as: (CMD,parameters)
3029
3030 003522' 140000 003532' TS56: TTABLE (TCALL,TS56DA) ; set up data transfer
3031 003523' 140000 003563' TTABLE (TCALL,TS56IN) ; initialize counter
3032 003524' 200000 003565' TS56A: TTABLE (TCALLC,TS56NE) ; set up next test segment
3033 003525' 400000 000010 TTABLE (TSSTAR,10) ; start up port (read a word)
3034 003526' 240002 000000 TTABLE (TCHECK,2) ; check if completed
3035 003527' 340000 000000 TTABLE (TEXIT) ; exit if error yet
3036 003530' 300000 003524' TTABLE (TJRST,TS56A) ; loop till done
3037 003531' 000000 000000 TTABLE (TLAST) ; end of table
3038
3039 ; Set up data transfer
3040
3041 003532' 201 01 0 00 000200 TS56DA: MOVEI 1,200 ; get start address
3042 003533' 242 01 0 00 000001 LSH 1,1 ; position correctly
3043 003534' 260 17 0 00 003233* GO LDRAR ; load the register
3044 003535' 201 01 0 00 000010 MOVEI 1,MPRUN ; get start data
3045 003536' 260 17 0 00 003241* GO LDCSR ; start up the port
3046 003537' 200 01 0 00 005103' MOVE 1,[CBUFSZ,,CBUF] ; get pointer to control buffer
3047 003540' 260 17 0 00 003220* GO CHINIT ; initialize software
3048 003541' 551 01 0 00 003221* HRRZI 1,BUFF ; buffer address
3049 003542' 201 02 0 00 000010 MOVEI 2,^D8 ; word count
3050 003543' 400 03 0 00 000000 SETZ 3, ; clear zero fill specifier
3051 003544' 260 17 0 00 003224* GO GENCCW ; generate a CCW list
.MAIN MACRO %53A(1152) 10:53 16-Oct-84 Page 54
DFPTAA MAC 19-Feb-83 23:12 CBUS MODULE TESTS SEQ 1944
3052 003545' 200 01 0 00 005631' MOVE 1,[TS56BU,,BUFF] ; copy the data for this test
3053 003546' 251 01 0 00 000000# BLT 1,BUFF+7 ; into the data buffer
3054 003547' 400 01 0 00 000000 SETZ 1, ; clear CSR data
3055 003550' 260 17 0 00 003536* GO LDCSR ; write CSR register
3056 003551' 201 01 0 00 005000 MOVEI 1,5000 ; get start address
3057 003552' 242 01 0 00 000001 LSH 1,1 ; position correctly
3058 003553' 260 17 0 00 003534* GO LDRAR ; load the register
3059 003554' 201 01 0 00 000010 MOVEI 1,MPRUN ; get start data
3060 003555' 260 17 0 00 003550* GO LDCSR ; start up the port
3061 003556' 201 00 0 00 000001 MOVEI 1 ; ensure the port has enough
3062 003557' 260 17 0 00 003237* GO ODELAY ; time to initialize
3063 003560' 400 01 0 00 000000 SETZ 1, ; clear CSR data
3064 003561' 260 17 0 00 003555* GO LDCSR ; stop the port
3065 003562' 263 17 0 00 000000 RTN ; return
3066
3067 ; Initialize test segment
3068
3069 003563' 476 00 0 00 005730' TS56IN: SETOM SAVSEG# ; initialize test segment
3070 003564' 263 17 0 00 000000 RTN ; return
3071
3072 ; Point to next test segment
3073
3074 003565' 350 01 0 00 005730' TS56NE: AOS 1,SAVSEG ; point to next test segment
3075 003566' 307 01 0 00 000007 CAIG 1,^D7 ; done yet?
3076 003567' 350 00 0 17 000000 AOS (P) ; no - set up proper return
3077 003570' 271 01 0 00 000010 ADDI 1,10 ; point to starting address
3078 003571' 542 01 0 00 003525' HRRM 1,TS56A+1 ; set up starting address
3079 003572' 263 17 0 00 000000 RTN ; return
3080
3081 ; Data
3082
3083 003573' 400000 000000 TS56BU: 400000,,0
3084 003574' 000000 000000 0,,0
3085 003575' 400000 000000 400000,,0
3086 003576' 000000 000000 0,,0
3087 003577' 000000 000001 0,,1
3088 003600' 400000 000001 400000,,1
3089 003601' 000000 000001 0,,1
3090 003602' 400000 000001 400000,,1
.MAIN MACRO %53A(1152) 10:53 16-Oct-84 Page 55
DFPTAA MAC 19-Feb-83 23:12 CBUS MODULE TESTS SEQ 1945
3091
3092 ; Error messages
3093
3094 003603' 140000 005524' MA56: MSG!TXNOT![ASCIZ /Parity Predictor produced incorrect result:/]
3095 003604' 240000 003606' CALL!TXNOT!MA56PN ; print result
3096 003605' 000000000000# LAST!CALL!TXALL!TTPNT ; print test data
3097
3098 003606' 200 01 0 00 005730' MA56PN: MOVE 1,SAVSEG ; get test segment
3099 003607' 037 00 0 00 005632' TMSGC < Data in PLIN: >
3100 003610' 550 00 0 01 003573' HRRZ TS56BU(1) ; get data word
3101 003611' 037 03 0 00 000000 PNT3 ; print it
3102 003612' 200 01 0 01 003573' MOVE 1,TS56BU(1) ; get data word
3103 003613' 607 01 0 00 400000 TLNN 1,400000 ; should be cleared?
3104 003614' 037 00 0 00 005541' TMSGC < 'CCMVPARCHK' should not be asserted, but is>
3105 003615' 603 01 0 00 400000 TLNE 1,400000 ; should be set?
3106 003616' 037 00 0 00 005553' TMSGC < 'CCMVPARCHK' should be asserted, but isn't>
3107 003617' 263 17 0 00 000000 RTN ; return
3108
3109 ; Microcode
3110
3111 ; Read local storage location
3112
3113 003620' 001000 270000 T56M: MWORD <ADDR=10,JMAP,J=27,SD0,OR,B=3,D=2,RDLM,MGC=0>
3114 003621' 732001 620040
3115 003622' 001100 300001 MWORD <JMAP,J=30,SD0,OR,B=3,D=2,RDLM,MGC=1> ; 11
3116 003623' 732001 620040
3117 003624' 001200 300002 MWORD <JMAP,J=30,SD0,OR,B=3,D=2,RDLM,MGC=2> ; 12
3118 003625' 732001 620040
3119 003626' 001300 300003 MWORD <JMAP,J=30,SD0,OR,B=3,D=2,RDLM,MGC=3> ; 13
3120 003627' 732001 620040
3121 003630' 001400 300004 MWORD <JMAP,J=30,SD0,OR,B=3,D=2,RDLM,MGC=4> ; 14
3122 003631' 732001 620040
3123 003632' 001500 300005 MWORD <JMAP,J=30,SD0,OR,B=3,D=2,RDLM,MGC=5> ; 15
3124 003633' 732001 620040
3125 003634' 001600 300006 MWORD <JMAP,J=30,SD0,OR,B=3,D=2,RDLM,MGC=6> ; 16
3126 003635' 732001 620040
3127 003636' 001700 300007 MWORD <JMAP,J=30,SD0,OR,B=3,D=2,RDLM,MGC=7> ; 17
3128 003637' 732001 620040
3129
3130 ; Do a test segment
3131
3132 003640' 002700 000030 MWORD <ADDR=27,CONT,D=1,SELM,MGC=30> ; 27
3133 003641' 001000 002340
3134 003642' 003000 002040 MWORD <CONT,S0A,A=3,D=1,OENA,SELM,MGC=40> ; 30
3135 003643' 401030 002340
3136 003644' 003100 000006 MWORD <CONT,SD0,D=1,SELP,MGC=6> ; 31
3137 003645' 701000 001340
3138 003646' 003200 000020 MWORD <CONT,D=1,SELF,MGC=20> ; 32
3139 003647' 001000 003340
3140 003650' 003300 350000 MWORD <CJP,J=35,S0A,A=3,D=1,CENA,CCMB> ; 32
3141 003651' 401430 120060
3142 003652' 003452 000000 MWORD <CJP,J=5200,D=1,CENA,CCMP> ; 33
3143 003653' 001400 130060
3144 003654' 003551 000000 MWORD <JMAP,J=5100,D=1> ; 34
3145 003655' 001000 000040
.MAIN MACRO %53A(1152) 10:53 16-Oct-84 Page 55-1
DFPTAA MAC 19-Feb-83 23:12 CBUS MODULE TESTS SEQ 1946
3146 003656' 003651 000000 MWORD <CJP,J=5100,D=1,CENA,CCMP> ; 35
3147 003657' 001400 130060
3148 003660' 003752 000000 MWORD <JMAP,J=5200,D=1> ; 36
3149 003661' 001000 000040
3150
3151 ; Read a word from CBUS into CBIN
3152
3153 003662' 010001 010200 MWORD <ADDR=100,JMAP,J=101,D=1,SELC,MGC=200> ; 100
3154 003663' 001000 004040
3155 003664' 010101 030000 MWORD <CJP,J=103,D=1,CENA,CCCA> ; 101
3156 003665' 001400 000060
3157 003666' 010201 010000 MWORD <JMAP,J=101,D=1> ; 102
3158 003667' 001000 000040
3159 003670' 010300 000004 MWORD <CONT,D=1,SELC,MGC=4> ; 103
3160 003671' 001000 004340
3161 003672' 010400 000200 MWORD <CRTN,SD0,OR,B=3,D=2,SELM,MGC=200> ; 104
3162 003673' 732001 402240
3163
3164 ; Ensure CBUS is stopped
3165
3166 003674' 020000 000120 MWORD <ADDR=200,JZ,SELC,MGC=120> ; 200
3167 003675' 000000 004000
3168
3169 ; Initialization steps
3170
3171 003676' 500050 010100 MWORD <ADDR=5000,JMAP,J=5001,SELC,MGC=100> ; 5000
3172 003677' 000000 004040
3173 003700' 500100 000020 MWORD <CONT,SELM,MGC=20> ; 5001
3174 003701' 000000 002340
3175 003702' 500201 000000 MWORD <CJS,J=100,D=1> ; 5002
3176 003703' 001000 000020
3177 003704' 500300 002000 MWORD <CONT,S0A,A=3,D=1,OENA,LDLM,MGC=0> ; 5003
3178 003705' 401030 230340
3179 003706' 500401 010000 MWORD <CJS,J=101,D=1> ; 5004
3180 003707' 001000 000020
3181 003710' 500500 002001 MWORD <CONT,S0A,A=3,D=1,OENA,LDLM,MGC=1> ; 5005
3182 003711' 401030 230340
3183 003712' 500601 010000 MWORD <CJS,J=101,D=1> ; 5006
3184 003713' 001000 000020
3185 003714' 500700 002002 MWORD <CONT,S0A,A=3,D=1,OENA,LDLM,MGC=2> ; 5007
3186 003715' 401030 230340
3187 003716' 501001 010000 MWORD <CJS,J=101,D=1> ; 5010
3188 003717' 001000 000020
3189 003720' 501100 002003 MWORD <CONT,S0A,A=3,D=1,OENA,LDLM,MGC=3> ; 5011
3190 003721' 401030 230340
3191 003722' 501201 010000 MWORD <CJS,J=101,D=1> ; 5012
3192 003723' 001000 000020
3193 003724' 501300 002004 MWORD <CONT,S0A,A=3,D=1,OENA,LDLM,MGC=4> ; 5013
3194 003725' 401030 230340
3195 003726' 501401 010000 MWORD <CJS,J=101,D=1> ; 5014
3196 003727' 001000 000020
3197 003730' 501500 002005 MWORD <CONT,S0A,A=3,D=1,OENA,LDLM,MGC=5> ; 5015
3198 003731' 401030 230340
3199 003732' 501601 010000 MWORD <CJS,J=101,D=1> ; 5016
3200 003733' 001000 000020
.MAIN MACRO %53A(1152) 10:53 16-Oct-84 Page 55-2
DFPTAA MAC 19-Feb-83 23:12 CBUS MODULE TESTS SEQ 1947
3201 003734' 501700 002006 MWORD <CONT,S0A,A=3,D=1,OENA,LDLM,MGC=6> ; 5017
3202 003735' 401030 230340
3203 003736' 502001 010000 MWORD <CJS,J=101,D=1> ; 5020
3204 003737' 001000 000020
3205 003740' 502100 002007 MWORD <CONT,S0A,A=3,D=1,OENA,LDLM,MGC=7> ; 5021
3206 003741' 401030 230340
3207 003742' 502200 000000 MWORD <JZ> ; 5022
3208 003743' 000000 000000
3209 003744' 000000 000000 MWORD <ADDR=0,JZ> ; 5023
3210 003745' 000000 000000
3211
3212 ; Subroutine - Passed - Write 1 to bit 12 of CSR register
3213
3214 003746' 510000 000000 MWORD <ADDR=5100,CONT,SD0,AND,B=2,D=2> ; 5100
3215 003747' 742001 000340
3216 003750' 510100 000000 MWORD <CONT,S0B,PLUS,B=2,D=2,CRY> ; 5101
3217 003751' 302001 000740
3218 003752' 510200 260000 MWORD <LDCT,J=26> ; 5102
3219 003753' 000000 000300
3220 003754' 510351 030000 MWORD <RPCT,J=5103,SAB,PLUS,A=2,B=2,D=2> ; 5103
3221 003755' 102021 000220
3222 003756' 510400 002004 MWORD <CONT,S0A,A=2,OR,D=1,OENA,SELE,MGC=4> ; 5104
3223 003757' 431020 005340
3224 003760' 510551 070040 MWORD <CJP,J=5107,CENA,CCGC,D=1,SELE,MGC=40> ; 5105
3225 003761' 001400 015060
3226 003762' 510651 050000 MWORD <JMAP,J=5105,D=1> ; 5106
3227 003763' 001000 000040
3228 003764' 510700 000200 MWORD <CONT,S0A,A=1,OR,D=1,SELE,MGC=200> ; 5107
3229 003765' 431010 005340
3230 003766' 511051 100000 MWORD <JMAP,J=5110,D=1> ; 5110
3231 003767' 001000 000040
3232
3233 ; Subroutine - Failed - Write 1 to bit 13 of CSR register
3234
3235 003770' 520000 000000 MWORD <ADDR=5200,CONT,SD0,AND,B=2,D=2> ; 5200
3236 003771' 742001 000340
3237 003772' 520100 000000 MWORD <CONT,S0B,PLUS,B=2,D=2,CRY> ; 5201
3238 003773' 302001 000740
3239 003774' 520200 250000 MWORD <LDCT,J=25> ; 5202
3240 003775' 000000 000300
3241 003776' 520352 030000 MWORD <RPCT,J=5203,SAB,PLUS,A=2,B=2,D=2> ; 5203
3242 003777' 102021 000220
3243 004000' 520400 002004 MWORD <CONT,S0A,A=2,OR,D=1,OENA,SELE,MGC=4> ; 5204
3244 004001' 431020 005340
3245 004002' 520552 070040 MWORD <CJP,J=5207,CENA,CCGC,D=1,SELE,MGC=40> ; 5205
3246 004003' 001400 015060
3247 004004' 520652 050000 MWORD <JMAP,J=5205,D=1> ; 5206
3248 004005' 001000 000040
3249 004006' 520700 000200 MWORD <CONT,S0A,A=1,OR,D=1,SELE,MGC=200> ; 5207
3250 004007' 431010 005340
3251 004010' 521052 100000 MWORD <JMAP,J=5210,D=1> ; 5210
3252 004011' 001000 000040
3253 004012' 777777 777777 -1
.MAIN MACRO %53A(1152) 10:53 16-Oct-84 Page 56
DFPTAA MAC 19-Feb-83 23:12 CBUS MODULE TESTS SEQ 1948
3254
3255 ;#********************************************************************
3256 ;* Test 57 - Parity Predictor - PLIN to Fmtr/MPCOREDUMP=1
3257 ;
3258 ; Description: Verify that the parity predictor works correctly
3259 ; when moving data from PLIN to formatter with
3260 ; 'MPCOREDUMP' asserted.
3261 ;
3262 ; Procedure: KL> Port Clear
3263 ; KL> Set up a CCW list to transfer 10 words
3264 ; KL> Start up port
3265 ; UC> Read words from CBUS into CBIN to formatter
3266 ; then to local storage locations 0-11
3267 ; UC> Initialize parity predictor with 'MPCLRPARCHK'
3268 ;
3269 ; UC> Load PLOUT with word from local storage
3270 ; UC> Load PLIN with word from PLOUT
3271 ; UC> Assert 'MPPLINTOFMTR'
3272 ; UC> Test leftmost bit of data word - this should
3273 ; be the setting of 'CCMVRPARCHK'.
3274 ; UC> if correct - set bit 12 (DISABLE Complete)
3275 ; UC> if not correct - set bit 13 (ENABLE Complete)
3276 ; Read CSR and determine test disposition
3277 ;
3278 ; Repeat the above steps for each of the 10 data
3279 ; words.
3280 ;
3281 ; Failure: ---
3282 ;#********************************************************************
3283
3284 ; Test data
3285
3286 004013' 254 00 0 00 004021' TSTC57: JRST TG57 ; go start test
3287 004014' 100604 000057 CBUS!NDMP!NDCB!ZCBUS!57 ; test mask
3288 004015' 004143' 005636' T57M,,[ASCIZ ^Parity Predictor - PLIN to Fmtr/MPCOREDUMP=1^]
3289 004016' 005517' 005625' [EXP MLAST!C11],,[EXP C8,C12,C14,MLAST!C21]
3290 004017' 000000 004352' TSTC60 ; failure test table
3291 004020' 777777 777777 -1 ; ...
3292
3293 ; Start test
3294
3295 004021' 201 00 0 00 000000' TG57: MOVEI ZA ; get address of module start
3296 004022' 260 17 0 00 003501* GO TRACE ; handle trace output
3297 004023' 201 01 0 00 004143' MOVEI 1,T57M ; set up microcode address
3298 004024' 260 17 0 00 003503* GO TLOAD ; load/verify it
3299 004025' 263 17 0 00 000000 RTN ; failed - exit test
.MAIN MACRO %53A(1152) 10:53 16-Oct-84 Page 57
DFPTAA MAC 19-Feb-83 23:12 CBUS MODULE TESTS SEQ 1949
3300
3301 ; Initialization
3302
3303 004026' 400 15 0 00 000000 TL57: SETZ ERFLG, ; clear error flag
3304 004027' 260 17 0 00 003506* GO IPACLR ; clear port
3305 004030' 402 00 0 00 003507* SETZM TSTSUB ; initialize subtest number
3306 004031' 201 06 0 00 004043' MOVEI 6,TS57 ; get test table address
3307
3308 ; Loop on test execute table entries
3309
3310 004032' 260 17 0 00 003511* TA57: GO TEXEC ; execute table entry
3311 004033' 254 00 0 00 004042' JRST TX57 ; end of test execute table
3312 004034' 254 00 0 00 004032' JRST TA57 ; keep looping after call
3313 004035' 474 15 0 00 000000 SETO ERFLG, ; error occurred
3314
3315 ; Handle error printouts and scope looping
3316
3317 004036' 027 00 0 00 004126' SCOPER MA57 ; print error message
3318 004037' 254 00 0 00 004026' JRST TL57 ; loop on error
3319 004040' 254 00 0 00 004042' JRST TX57 ; altmode exit
3320 004041' 322 15 0 00 004032' JUMPE ERFLG,TA57 ; do next test execute table entry
3321
3322 ; End of test
3323
3324 004042' 263 17 0 00 000000 TX57: RTN ; return
3325
3326 ; Test Execute Table, as: (CMD,parameters)
3327
3328 004043' 140000 004053' TS57: TTABLE (TCALL,TS57DA) ; set up data transfer
3329 004044' 140000 004104' TTABLE (TCALL,TS57IN) ; initialize counter
3330 004045' 200000 004106' TS57A: TTABLE (TCALLC,TS57NE) ; set up next test segment
3331 004046' 400000 000010 TTABLE (TSSTAR,10) ; start up port (read a word)
3332 004047' 240002 000000 TTABLE (TCHECK,2) ; check if completed
3333 004050' 340000 000000 TTABLE (TEXIT) ; exit if error yet
3334 004051' 300000 004045' TTABLE (TJRST,TS57A) ; loop till done
3335 004052' 000000 000000 TTABLE (TLAST) ; end of table
3336
3337 ; Set up data transfer
3338
3339 004053' 201 01 0 00 000200 TS57DA: MOVEI 1,200 ; get start address
3340 004054' 242 01 0 00 000001 LSH 1,1 ; position correctly
3341 004055' 260 17 0 00 003553* GO LDRAR ; load the register
3342 004056' 201 01 0 00 000010 MOVEI 1,MPRUN ; get start data
3343 004057' 260 17 0 00 003561* GO LDCSR ; start up the port
3344 004060' 200 01 0 00 005103' MOVE 1,[CBUFSZ,,CBUF] ; get pointer to control buffer
3345 004061' 260 17 0 00 003540* GO CHINIT ; initialize software
3346 004062' 551 01 0 00 003541* HRRZI 1,BUFF ; buffer address
3347 004063' 201 02 0 00 000012 MOVEI 2,^D10 ; word count
3348 004064' 400 03 0 00 000000 SETZ 3, ; clear zero fill specifier
3349 004065' 260 17 0 00 003544* GO GENCCW ; generate a CCW list
.MAIN MACRO %53A(1152) 10:53 16-Oct-84 Page 58
DFPTAA MAC 19-Feb-83 23:12 CBUS MODULE TESTS SEQ 1950
3350 004066' 200 01 0 00 005647' MOVE 1,[TS57BU,,BUFF] ; copy the data for this test
3351 004067' 251 01 0 00 000000# BLT 1,BUFF+^D9 ; into the data buffer
3352 004070' 400 01 0 00 000000 SETZ 1, ; clear CSR data
3353 004071' 260 17 0 00 004057* GO LDCSR ; write CSR register
3354 004072' 201 01 0 00 005000 MOVEI 1,5000 ; get start address
3355 004073' 242 01 0 00 000001 LSH 1,1 ; position correctly
3356 004074' 260 17 0 00 004055* GO LDRAR ; load the register
3357 004075' 201 01 0 00 000010 MOVEI 1,MPRUN ; get start data
3358 004076' 260 17 0 00 004071* GO LDCSR ; start up the port
3359 004077' 201 00 0 00 000001 MOVEI 1 ; ensure the port has enough
3360 004100' 260 17 0 00 003557* GO ODELAY ; time to initialize
3361 004101' 400 01 0 00 000000 SETZ 1, ; clear CSR data
3362 004102' 260 17 0 00 004076* GO LDCSR ; stop the port
3363 004103' 263 17 0 00 000000 RTN ; return
3364
3365 ; Initialize test segment
3366
3367 004104' 476 00 0 00 005730' TS57IN: SETOM SAVSEG# ; initialize test segment
3368 004105' 263 17 0 00 000000 RTN ; return
3369
3370 ; Point to next test segment
3371
3372 004106' 350 01 0 00 005730' TS57NE: AOS 1,SAVSEG ; point to next test segment
3373 004107' 307 01 0 00 000011 CAIG 1,^D9 ; done yet?
3374 004110' 350 00 0 17 000000 AOS (P) ; no - set up proper return
3375 004111' 271 01 0 00 000010 ADDI 1,10 ; point to starting address
3376 004112' 542 01 0 00 004046' HRRM 1,TS57A+1 ; set up starting address
3377 004113' 263 17 0 00 000000 RTN ; return
3378
3379 ; Data
3380
3381 004114' 400000 000000 TS57BU: 400000,,0
3382 004115' 400000 000001 400000,,1
3383 004116' 400000 000020 400000,,20
3384 004117' 400000 000021 400000,,21
3385 004120' 400000 000040 400000,,40
3386 004121' 400000 000041 400000,,41
3387 004122' 400000 000100 400000,,100
3388 004123' 400000 000101 400000,,101
3389 004124' 400000 000200 400000,,200
3390 004125' 400000 000201 400000,,201
.MAIN MACRO %53A(1152) 10:53 16-Oct-84 Page 59
DFPTAA MAC 19-Feb-83 23:12 CBUS MODULE TESTS SEQ 1951
3391
3392 ; Error messages
3393
3394 004126' 140000 005524' MA57: MSG!TXNOT![ASCIZ /Parity Predictor produced incorrect result:/]
3395 004127' 240000 004131' CALL!TXNOT!MA57PN ; print result
3396 004130' 000000000000# LAST!CALL!TXALL!TTPNT ; print test data
3397
3398 004131' 200 01 0 00 005730' MA57PN: MOVE 1,SAVSEG ; get test segment
3399 004132' 037 00 0 00 005632' TMSGC < Data in PLIN: >
3400 004133' 550 00 0 01 004114' HRRZ TS57BU(1) ; get data word
3401 004134' 037 03 0 00 000000 PNT3 ; print it
3402 004135' 200 01 0 01 004114' MOVE 1,TS57BU(1) ; get data word
3403 004136' 607 01 0 00 400000 TLNN 1,400000 ; should be cleared?
3404 004137' 037 00 0 00 005541' TMSGC < 'CCMVPARCHK' should not be asserted, but is>
3405 004140' 603 01 0 00 400000 TLNE 1,400000 ; should be set?
3406 004141' 037 00 0 00 005553' TMSGC < 'CCMVPARCHK' should be asserted, but isn't>
3407 004142' 263 17 0 00 000000 RTN ; return
3408
3409 ; Microcode
3410
3411 ; Read local storage location
3412
3413 004143' 001000 270000 T57M: MWORD <ADDR=10,JMAP,J=27,SD0,OR,B=3,D=2,RDLM,MGC=0>
3414 004144' 732001 620040
3415 004145' 001100 300001 MWORD <JMAP,J=30,SD0,OR,B=3,D=2,RDLM,MGC=1> ; 11
3416 004146' 732001 620040
3417 004147' 001200 300002 MWORD <JMAP,J=30,SD0,OR,B=3,D=2,RDLM,MGC=2> ; 12
3418 004150' 732001 620040
3419 004151' 001300 300003 MWORD <JMAP,J=30,SD0,OR,B=3,D=2,RDLM,MGC=3> ; 13
3420 004152' 732001 620040
3421 004153' 001400 300004 MWORD <JMAP,J=30,SD0,OR,B=3,D=2,RDLM,MGC=4> ; 14
3422 004154' 732001 620040
3423 004155' 001500 300005 MWORD <JMAP,J=30,SD0,OR,B=3,D=2,RDLM,MGC=5> ; 15
3424 004156' 732001 620040
3425 004157' 001600 300006 MWORD <JMAP,J=30,SD0,OR,B=3,D=2,RDLM,MGC=6> ; 16
3426 004160' 732001 620040
3427 004161' 001700 300007 MWORD <JMAP,J=30,SD0,OR,B=3,D=2,RDLM,MGC=7> ; 17
3428 004162' 732001 620040
3429 004163' 002000 300010 MWORD <JMAP,J=30,SD0,OR,B=3,D=2,RDLM,MGC=10> ; 20
3430 004164' 732001 620040
3431 004165' 002100 300011 MWORD <JMAP,J=30,SD0,OR,B=3,D=2,RDLM,MGC=11> ; 21
3432 004166' 732001 620040
3433
3434 ; Do a test segment
3435
3436 004167' 002700 000030 MWORD <ADDR=27,CONT,D=1,SELM,MGC=30> ; 27
3437 004170' 001000 002340
3438 004171' 003000 002040 MWORD <CONT,S0A,A=3,D=1,OENA,SELM,MGC=40> ; 30
3439 004172' 401030 002340
3440 004173' 003100 000006 MWORD <CONT,SD0,D=1,SELP,MGC=6> ; 31
3441 004174' 701000 001340
3442 004175' 003200 000020 MWORD <CONT,D=1,SELF,MGC=20> ; 32
3443 004176' 001000 003340
3444 004177' 003300 350000 MWORD <CJP,J=35,S0A,A=3,D=1,CENA,CCMB> ; 32
3445 004200' 401430 120060
.MAIN MACRO %53A(1152) 10:53 16-Oct-84 Page 59-1
DFPTAA MAC 19-Feb-83 23:12 CBUS MODULE TESTS SEQ 1952
3446 004201' 003452 000000 MWORD <CJP,J=5200,D=1,CENA,CCMP> ; 33
3447 004202' 001400 130060
3448 004203' 003551 000000 MWORD <JMAP,J=5100,D=1> ; 34
3449 004204' 001000 000040
3450 004205' 003651 000000 MWORD <CJP,J=5100,D=1,CENA,CCMP> ; 35
3451 004206' 001400 130060
3452 004207' 003752 000000 MWORD <JMAP,J=5200,D=1> ; 36
3453 004210' 001000 000040
3454
3455 ; Read a word from CBUS into CBIN
3456
3457 004211' 010001 010200 MWORD <ADDR=100,JMAP,J=101,D=1,SELC,MGC=200> ; 100
3458 004212' 001000 004040
3459 004213' 010101 030000 MWORD <CJP,J=103,D=1,CENA,CCCA> ; 101
3460 004214' 001400 000060
3461 004215' 010201 010000 MWORD <JMAP,J=101,D=1> ; 102
3462 004216' 001000 000040
3463 004217' 010300 000004 MWORD <CONT,D=1,SELC,MGC=4> ; 103
3464 004220' 001000 004340
3465 004221' 010400 000200 MWORD <CRTN,SD0,OR,B=3,D=2,SELM,MGC=200> ; 104
3466 004222' 732001 402240
3467
3468 ; Ensure CBUS is stopped
3469
3470 004223' 020000 000120 MWORD <ADDR=200,JZ,SELC,MGC=120> ; 200
3471 004224' 000000 004000
3472
3473 ; Initialization steps
3474
3475 004225' 500050 010100 MWORD <ADDR=5000,JMAP,J=5001,SELC,MGC=100> ; 5000
3476 004226' 000000 004040
3477 004227' 500100 000020 MWORD <CONT,SELM,MGC=20> ; 5001
3478 004230' 000000 002340
3479 004231' 500201 000000 MWORD <CJS,J=100,D=1> ; 5002
3480 004232' 001000 000020
3481 004233' 500300 002000 MWORD <CONT,S0A,A=3,D=1,OENA,LDLM,MGC=0> ; 5003
3482 004234' 401030 230340
3483 004235' 500401 010000 MWORD <CJS,J=101,D=1> ; 5004
3484 004236' 001000 000020
3485 004237' 500500 002001 MWORD <CONT,S0A,A=3,D=1,OENA,LDLM,MGC=1> ; 5005
3486 004240' 401030 230340
3487 004241' 500601 010000 MWORD <CJS,J=101,D=1> ; 5006
3488 004242' 001000 000020
3489 004243' 500700 002002 MWORD <CONT,S0A,A=3,D=1,OENA,LDLM,MGC=2> ; 5007
3490 004244' 401030 230340
3491 004245' 501001 010000 MWORD <CJS,J=101,D=1> ; 5010
3492 004246' 001000 000020
3493 004247' 501100 002003 MWORD <CONT,S0A,A=3,D=1,OENA,LDLM,MGC=3> ; 5011
3494 004250' 401030 230340
3495 004251' 501201 010000 MWORD <CJS,J=101,D=1> ; 5012
3496 004252' 001000 000020
3497 004253' 501300 002004 MWORD <CONT,S0A,A=3,D=1,OENA,LDLM,MGC=4> ; 5013
3498 004254' 401030 230340
3499 004255' 501401 010000 MWORD <CJS,J=101,D=1> ; 5014
3500 004256' 001000 000020
.MAIN MACRO %53A(1152) 10:53 16-Oct-84 Page 59-2
DFPTAA MAC 19-Feb-83 23:12 CBUS MODULE TESTS SEQ 1953
3501 004257' 501500 002005 MWORD <CONT,S0A,A=3,D=1,OENA,LDLM,MGC=5> ; 5015
3502 004260' 401030 230340
3503 004261' 501601 010000 MWORD <CJS,J=101,D=1> ; 5016
3504 004262' 001000 000020
3505 004263' 501700 002006 MWORD <CONT,S0A,A=3,D=1,OENA,LDLM,MGC=6> ; 5017
3506 004264' 401030 230340
3507 004265' 502001 010000 MWORD <CJS,J=101,D=1> ; 5020
3508 004266' 001000 000020
3509 004267' 502100 002007 MWORD <CONT,S0A,A=3,D=1,OENA,LDLM,MGC=7> ; 5021
3510 004270' 401030 230340
3511 004271' 502201 010000 MWORD <CJS,J=101,D=1> ; 5022
3512 004272' 001000 000020
3513 004273' 502300 002010 MWORD <CONT,S0A,A=3,D=1,OENA,LDLM,MGC=10> ; 5023
3514 004274' 401030 230340
3515 004275' 502401 010000 MWORD <CJS,J=101,D=1> ; 5024
3516 004276' 001000 000020
3517 004277' 502500 002011 MWORD <CONT,S0A,A=3,D=1,OENA,LDLM,MGC=11> ; 5025
3518 004300' 401030 230340
3519 004301' 502600 000000 MWORD <JZ> ; 5026
3520 004302' 000000 000000
3521 004303' 000000 000000 MWORD <ADDR=0,JZ> ; 5027
3522 004304' 000000 000000
3523
3524 ; Subroutine - Passed - Write 1 to bit 12 of CSR register
3525
3526 004305' 510000 000000 MWORD <ADDR=5100,CONT,SD0,AND,B=2,D=2> ; 5100
3527 004306' 742001 000340
3528 004307' 510100 000000 MWORD <CONT,S0B,PLUS,B=2,D=2,CRY> ; 5101
3529 004310' 302001 000740
3530 004311' 510200 260000 MWORD <LDCT,J=26> ; 5102
3531 004312' 000000 000300
3532 004313' 510351 030000 MWORD <RPCT,J=5103,SAB,PLUS,A=2,B=2,D=2> ; 5103
3533 004314' 102021 000220
3534 004315' 510400 002004 MWORD <CONT,S0A,A=2,OR,D=1,OENA,SELE,MGC=4> ; 5104
3535 004316' 431020 005340
3536 004317' 510551 070040 MWORD <CJP,J=5107,CENA,CCGC,D=1,SELE,MGC=40> ; 5105
3537 004320' 001400 015060
3538 004321' 510651 050000 MWORD <JMAP,J=5105,D=1> ; 5106
3539 004322' 001000 000040
3540 004323' 510700 000200 MWORD <CONT,S0A,A=1,OR,D=1,SELE,MGC=200> ; 5107
3541 004324' 431010 005340
3542 004325' 511051 100000 MWORD <JMAP,J=5110,D=1> ; 5110
3543 004326' 001000 000040
3544
3545 ; Subroutine - Failed - Write 1 to bit 13 of CSR register
3546
3547 004327' 520000 000000 MWORD <ADDR=5200,CONT,SD0,AND,B=2,D=2> ; 5200
3548 004330' 742001 000340
3549 004331' 520100 000000 MWORD <CONT,S0B,PLUS,B=2,D=2,CRY> ; 5201
3550 004332' 302001 000740
3551 004333' 520200 250000 MWORD <LDCT,J=25> ; 5202
3552 004334' 000000 000300
3553 004335' 520352 030000 MWORD <RPCT,J=5203,SAB,PLUS,A=2,B=2,D=2> ; 5203
3554 004336' 102021 000220
3555 004337' 520400 002004 MWORD <CONT,S0A,A=2,OR,D=1,OENA,SELE,MGC=4> ; 5204
.MAIN MACRO %53A(1152) 10:53 16-Oct-84 Page 59-3
DFPTAA MAC 19-Feb-83 23:12 CBUS MODULE TESTS SEQ 1954
3556 004340' 431020 005340
3557 004341' 520552 070040 MWORD <CJP,J=5207,CENA,CCGC,D=1,SELE,MGC=40> ; 5205
3558 004342' 001400 015060
3559 004343' 520652 050000 MWORD <JMAP,J=5205,D=1> ; 5206
3560 004344' 001000 000040
3561 004345' 520700 000200 MWORD <CONT,S0A,A=1,OR,D=1,SELE,MGC=200> ; 5207
3562 004346' 431010 005340
3563 004347' 521052 100000 MWORD <JMAP,J=5210,D=1> ; 5210
3564 004350' 001000 000040
3565 004351' 777777 777777 -1
.MAIN MACRO %53A(1152) 10:53 16-Oct-84 Page 60
DFPTAA MAC 19-Feb-83 23:12 CBUS MODULE TESTS SEQ 1955
3566
3567 ;#********************************************************************
3568 ;* Test 60 - Parity Predictor - Fmtr to CBOUT
3569 ;
3570 ; Description: Verify that the parity predictor works correctly
3571 ; when moving data from formatter to CBOUT.
3572 ;
3573 ; Procedure: KL> Port Clear
3574 ; KL> Set up a CCW list to transfer 12 words
3575 ; KL> Start up port
3576 ; UC> Read words from CBUS into CBIN to formatter
3577 ; then to local storage locations 0-13
3578 ; UC> Initialize parity predictor with 'MPCLRPARCHK'
3579 ;
3580 ; UC> Load formatter with word from local storage
3581 ; UC> Assert 'MPCBUSTOFMTR'
3582 ; UC> Test leftmost bit of data word - this should
3583 ; be the setting of 'CCMVRPARCHK'.
3584 ; UC> if correct - set bit 12 (DISABLE Complete)
3585 ; UC> if not correct - set bit 13 (ENABLE Complete)
3586 ; Read CSR and determine test disposition
3587 ;
3588 ; Repeat the above steps for each of the 12 data
3589 ; words.
3590 ;
3591 ; Failure: ---
3592 ;#********************************************************************
3593
3594 ; Test data
3595
3596 004352' 254 00 0 00 004357' TSTC60: JRST TG60 ; go start test
3597 004353' 100604 000060 CBUS!NDMP!NDCB!ZCBUS!60 ; test mask
3598 004354' 004514' 005650' T60M,,[ASCIZ ^Parity Predictor - Fmtr to CBOUT^]
3599 004355' 005517' 005625' [EXP MLAST!C11],,[EXP C8,C12,C14,MLAST!C21]
3600 004356' 777777 777777 -1 ; failure test table
3601
3602 ; Start test
3603
3604 004357' 201 00 0 00 000000' TG60: MOVEI ZA ; get address of module start
3605 004360' 260 17 0 00 004022* GO TRACE ; handle trace output
3606 004361' 201 01 0 00 004514' MOVEI 1,T60M ; set up microcode address
3607 004362' 260 17 0 00 004024* GO TLOAD ; load/verify it
3608 004363' 263 17 0 00 000000 RTN ; failed - exit test
.MAIN MACRO %53A(1152) 10:53 16-Oct-84 Page 61
DFPTAA MAC 19-Feb-83 23:12 CBUS MODULE TESTS SEQ 1956
3609
3610 ; Initialization
3611
3612 004364' 400 15 0 00 000000 TL60: SETZ ERFLG, ; clear error flag
3613 004365' 260 17 0 00 004027* GO IPACLR ; clear port
3614 004366' 402 00 0 00 004030* SETZM TSTSUB ; initialize subtest number
3615 004367' 201 06 0 00 004401' MOVEI 6,TS60 ; get test table address
3616
3617 ; Loop on test execute table entries
3618
3619 004370' 260 17 0 00 004032* TA60: GO TEXEC ; execute table entry
3620 004371' 254 00 0 00 004400' JRST TX60 ; end of test execute table
3621 004372' 254 00 0 00 004370' JRST TA60 ; keep looping after call
3622 004373' 474 15 0 00 000000 SETO ERFLG, ; error occurred
3623
3624 ; Handle error printouts and scope looping
3625
3626 004374' 027 00 0 00 004477' SCOPER MA60 ; print error message
3627 004375' 254 00 0 00 004364' JRST TL60 ; loop on error
3628 004376' 254 00 0 00 004400' JRST TX60 ; altmode exit
3629 004377' 322 15 0 00 004370' JUMPE ERFLG,TA60 ; do next test execute table entry
3630
3631 ; End of test
3632
3633 004400' 263 17 0 00 000000 TX60: RTN ; return
3634
3635 ; Test Execute Table, as: (CMD,parameters)
3636
3637 004401' 140000 004411' TS60: TTABLE (TCALL,TS60DA) ; set up data transfer
3638 004402' 140000 004442' TTABLE (TCALL,TS60IN) ; initialize counter
3639 004403' 200000 004455' TS60A: TTABLE (TCALLC,TS60NE) ; set up next test segment
3640 004404' 400000 000010 TTABLE (TSSTAR,10) ; start up port (read a word)
3641 004405' 240002 000000 TTABLE (TCHECK,2) ; check if completed
3642 004406' 340000 000000 TTABLE (TEXIT) ; exit if error yet
3643 004407' 300000 004403' TTABLE (TJRST,TS60A) ; loop till done
3644 004410' 000000 000000 TTABLE (TLAST) ; end of table
3645
3646 ; Set up data transfer
3647
3648 004411' 201 01 0 00 000200 TS60DA: MOVEI 1,200 ; get start address
3649 004412' 242 01 0 00 000001 LSH 1,1 ; position correctly
3650 004413' 260 17 0 00 004074* GO LDRAR ; load the register
3651 004414' 201 01 0 00 000010 MOVEI 1,MPRUN ; get start data
3652 004415' 260 17 0 00 004102* GO LDCSR ; start up the port
3653 004416' 200 01 0 00 005103' MOVE 1,[CBUFSZ,,CBUF] ; get pointer to control buffer
3654 004417' 260 17 0 00 004061* GO CHINIT ; initialize software
3655 004420' 551 01 0 00 004062* HRRZI 1,BUFF ; buffer address
3656 004421' 201 02 0 00 000014 MOVEI 2,^D12 ; word count
3657 004422' 400 03 0 00 000000 SETZ 3, ; clear zero fill specifier
3658 004423' 260 17 0 00 004065* GO GENCCW ; generate a CCW list
.MAIN MACRO %53A(1152) 10:53 16-Oct-84 Page 62
DFPTAA MAC 19-Feb-83 23:12 CBUS MODULE TESTS SEQ 1957
3659 004424' 200 01 0 00 005657' MOVE 1,[TS60BU,,BUFF] ; copy the data for this test
3660 004425' 251 01 0 00 000000# BLT 1,BUFF+^D11 ; into the data buffer
3661 004426' 400 01 0 00 000000 SETZ 1, ; clear CSR data
3662 004427' 260 17 0 00 004415* GO LDCSR ; write CSR register
3663 004430' 201 01 0 00 005000 MOVEI 1,5000 ; get start address
3664 004431' 242 01 0 00 000001 LSH 1,1 ; position correctly
3665 004432' 260 17 0 00 004413* GO LDRAR ; load the register
3666 004433' 201 01 0 00 000010 MOVEI 1,MPRUN ; get start data
3667 004434' 260 17 0 00 004427* GO LDCSR ; start up the port
3668 004435' 201 00 0 00 000001 MOVEI 1 ; ensure the port has enough
3669 004436' 260 17 0 00 004100* GO ODELAY ; time to initialize
3670 004437' 400 01 0 00 000000 SETZ 1, ; clear CSR data
3671 004440' 260 17 0 00 004434* GO LDCSR ; stop the port
3672 004441' 263 17 0 00 000000 RTN ; return
3673
3674 ; Initialize test segment
3675
3676 004442' 476 00 0 00 005730' TS60IN: SETOM SAVSEG# ; initialize test segment
3677 004443' 400 01 0 00 000000 SETZ 1, ; clear CSR data
3678 004444' 260 17 0 00 004440* GO LDCSR ; write CSR register
3679 004445' 201 01 0 00 000200 MOVEI 1,200 ; get start address
3680 004446' 242 01 0 00 000001 LSH 1,1 ; position correctly
3681 004447' 260 17 0 00 004432* GO LDRAR ; load the register
3682 004450' 201 01 0 00 000010 MOVEI 1,MPRUN ; get start data
3683 004451' 260 17 0 00 004444* GO LDCSR ; start up the port
3684 004452' 400 01 0 00 000000 SETZ 1, ; clear CSR data
3685 004453' 260 17 0 00 004451* GO LDCSR ; stop the port
3686 004454' 263 17 0 00 000000 RTN ; return
3687
3688 ; Point to next test segment
3689
3690 004455' 350 01 0 00 005730' TS60NE: AOS 1,SAVSEG ; point to next test segment
3691 004456' 307 01 0 00 000013 CAIG 1,^D11 ; done yet?
3692 004457' 350 00 0 17 000000 AOS (P) ; no - set up proper return
3693 004460' 271 01 0 00 000010 ADDI 1,10 ; point to starting address
3694 004461' 542 01 0 00 004404' HRRM 1,TS60A+1 ; set up starting address
3695 004462' 263 17 0 00 000000 RTN ; return
3696
3697 ; Data
3698
3699 004463' 400000 000000 TS60BU: 400000,,0
3700 004464' 000001 000000 1,,0
3701 004465' 400000 000000 400000,,0
3702 004466' 400000 000020 400000,,20
3703 004467' 000000 000020 0,,20
3704 004470' 400001 000020 400001,,20
3705 004471' 400001 000000 400001,,0
3706 004472' 400001 000000 400001,,0
3707 004473' 400001 000000 400001,,0
3708 004474' 400003 000020 400003,,20
3709 004475' 400003 000020 400003,,20
3710 004476' 400003 000020 400003,,20
.MAIN MACRO %53A(1152) 10:53 16-Oct-84 Page 63
DFPTAA MAC 19-Feb-83 23:12 CBUS MODULE TESTS SEQ 1958
3711
3712 ; Error messages
3713
3714 004477' 140000 005524' MA60: MSG!TXNOT![ASCIZ /Parity Predictor produced incorrect result:/]
3715 004500' 240000 004502' CALL!TXNOT!MA60PN ; print result
3716 004501' 000000000000# LAST!CALL!TXALL!TTPNT ; print test data
3717
3718 004502' 200 01 0 00 005730' MA60PN: MOVE 1,SAVSEG ; get test segment
3719 004503' 037 00 0 00 005660' TMSGC < Data in Fmtr: >
3720 004504' 550 00 0 01 004463' HRRZ TS60BU(1) ; get data word
3721 004505' 037 16 0 00 000003 PNTOCS ; print it
3722 004506' 200 01 0 01 004463' MOVE 1,TS60BU(1) ; get data word
3723 004507' 607 01 0 00 400000 TLNN 1,400000 ; should be cleared?
3724 004510' 037 00 0 00 005541' TMSGC < 'CCMVPARCHK' should not be asserted, but is>
3725 004511' 603 01 0 00 400000 TLNE 1,400000 ; should be set?
3726 004512' 037 00 0 00 005553' TMSGC < 'CCMVPARCHK' should be asserted, but isn't>
3727 004513' 263 17 0 00 000000 RTN ; return
3728
3729 ; Microcode
3730
3731 ; Read local storage location
3732
3733 004514' 001000 270000 T60M: MWORD <ADDR=10,JMAP,J=27,SD0,OR,B=3,D=2,RDLM,MGC=0>
3734 004515' 732001 620040
3735 004516' 001100 300001 MWORD <JMAP,J=30,SD0,OR,B=3,D=2,RDLM,MGC=1> ; 11
3736 004517' 732001 620040
3737 004520' 001200 300002 MWORD <JMAP,J=30,SD0,OR,B=3,D=2,RDLM,MGC=2> ; 12
3738 004521' 732001 620040
3739 004522' 001300 300003 MWORD <JMAP,J=30,SD0,OR,B=3,D=2,RDLM,MGC=3> ; 13
3740 004523' 732001 620040
3741 004524' 001400 300004 MWORD <JMAP,J=30,SD0,OR,B=3,D=2,RDLM,MGC=4> ; 14
3742 004525' 732001 620040
3743 004526' 001500 300005 MWORD <JMAP,J=30,SD0,OR,B=3,D=2,RDLM,MGC=5> ; 15
3744 004527' 732001 620040
3745 004530' 001600 300006 MWORD <JMAP,J=30,SD0,OR,B=3,D=2,RDLM,MGC=6> ; 16
3746 004531' 732001 620040
3747 004532' 001700 300007 MWORD <JMAP,J=30,SD0,OR,B=3,D=2,RDLM,MGC=7> ; 17
3748 004533' 732001 620040
3749 004534' 002000 300010 MWORD <JMAP,J=30,SD0,OR,B=3,D=2,RDLM,MGC=10> ; 20
3750 004535' 732001 620040
3751 004536' 002100 300011 MWORD <JMAP,J=30,SD0,OR,B=3,D=2,RDLM,MGC=11> ; 21
3752 004537' 732001 620040
3753 004540' 002200 300012 MWORD <JMAP,J=30,SD0,OR,B=3,D=2,RDLM,MGC=12> ; 22
3754 004541' 732001 620040
3755 004542' 002300 300013 MWORD <JMAP,J=30,SD0,OR,B=3,D=2,RDLM,MGC=13> ; 23
3756 004543' 732001 620040
3757
3758 ; Do a test segment
3759
3760 004544' 002700 000030 MWORD <ADDR=27,CONT,D=1,SELM,MGC=30> ; 27
3761 004545' 001000 002340
3762 004546' 003000 002040 MWORD <CONT,S0A,A=3,D=1,OENA,SELF,MGC=40> ; 30
3763 004547' 401030 003340
3764 004550' 003100 000002 MWORD <CONT,D=1,SELC,MGC=2> ; 31
3765 004551' 001000 004340
.MAIN MACRO %53A(1152) 10:53 16-Oct-84 Page 63-1
DFPTAA MAC 19-Feb-83 23:12 CBUS MODULE TESTS SEQ 1959
3766 004552' 003200 350000 MWORD <CJP,J=35,S0A,A=3,D=1,CENA,CCMB> ; 32
3767 004553' 401430 120060
3768 004554' 003352 000000 MWORD <CJP,J=5200,D=1,CENA,CCMP> ; 33
3769 004555' 001400 130060
3770 004556' 003451 000000 MWORD <JMAP,J=5100,D=1> ; 34
3771 004557' 001000 000040
3772 004560' 003551 000000 MWORD <CJP,J=5100,D=1,CENA,CCMP> ; 35
3773 004561' 001400 130060
3774 004562' 003652 000000 MWORD <JMAP,J=5200,D=1> ; 36
3775 004563' 001000 000040
3776
3777 ; Read a word from CBUS into CBIN
3778
3779 004564' 010001 010200 MWORD <ADDR=100,JMAP,J=101,D=1,SELC,MGC=200> ; 100
3780 004565' 001000 004040
3781 004566' 010101 030000 MWORD <CJP,J=103,D=1,CENA,CCCA> ; 101
3782 004567' 001400 000060
3783 004570' 010201 010000 MWORD <JMAP,J=101,D=1> ; 102
3784 004571' 001000 000040
3785 004572' 010300 000004 MWORD <CONT,D=1,SELC,MGC=4> ; 103
3786 004573' 001000 004340
3787 004574' 010400 000200 MWORD <CRTN,SD0,OR,B=3,D=2,SELM,MGC=200> ; 104
3788 004575' 732001 402240
3789
3790 ; Ensure CBUS is stopped
3791
3792 004576' 020000 000120 MWORD <ADDR=200,JZ,SELC,MGC=120> ; 200
3793 004577' 000000 004000
3794
3795 ; Initialization steps
3796
3797 004600' 500050 010100 MWORD <ADDR=5000,JMAP,J=5001,SELC,MGC=100> ; 5000
3798 004601' 000000 004040
3799 004602' 500100 000020 MWORD <CONT,SELM,MGC=20> ; 5001
3800 004603' 000000 002340
3801 004604' 500201 000000 MWORD <CJS,J=100,D=1> ; 5002
3802 004605' 001000 000020
3803 004606' 500300 002000 MWORD <CONT,S0A,A=3,D=1,OENA,LDLM,MGC=0> ; 5003
3804 004607' 401030 230340
3805 004610' 500401 010000 MWORD <CJS,J=101,D=1> ; 5004
3806 004611' 001000 000020
3807 004612' 500500 002001 MWORD <CONT,S0A,A=3,D=1,OENA,LDLM,MGC=1> ; 5005
3808 004613' 401030 230340
3809 004614' 500601 010000 MWORD <CJS,J=101,D=1> ; 5006
3810 004615' 001000 000020
3811 004616' 500700 002002 MWORD <CONT,S0A,A=3,D=1,OENA,LDLM,MGC=2> ; 5007
3812 004617' 401030 230340
3813 004620' 501001 010000 MWORD <CJS,J=101,D=1> ; 5010
3814 004621' 001000 000020
3815 004622' 501100 002003 MWORD <CONT,S0A,A=3,D=1,OENA,LDLM,MGC=3> ; 5011
3816 004623' 401030 230340
3817 004624' 501201 010000 MWORD <CJS,J=101,D=1> ; 5012
3818 004625' 001000 000020
3819 004626' 501300 002004 MWORD <CONT,S0A,A=3,D=1,OENA,LDLM,MGC=4> ; 5013
3820 004627' 401030 230340
.MAIN MACRO %53A(1152) 10:53 16-Oct-84 Page 63-2
DFPTAA MAC 19-Feb-83 23:12 CBUS MODULE TESTS SEQ 1960
3821 004630' 501401 010000 MWORD <CJS,J=101,D=1> ; 5014
3822 004631' 001000 000020
3823 004632' 501500 002005 MWORD <CONT,S0A,A=3,D=1,OENA,LDLM,MGC=5> ; 5015
3824 004633' 401030 230340
3825 004634' 501601 010000 MWORD <CJS,J=101,D=1> ; 5016
3826 004635' 001000 000020
3827 004636' 501700 002006 MWORD <CONT,S0A,A=3,D=1,OENA,LDLM,MGC=6> ; 5017
3828 004637' 401030 230340
3829 004640' 502001 010000 MWORD <CJS,J=101,D=1> ; 5020
3830 004641' 001000 000020
3831 004642' 502100 002007 MWORD <CONT,S0A,A=3,D=1,OENA,LDLM,MGC=7> ; 5021
3832 004643' 401030 230340
3833 004644' 502201 010000 MWORD <CJS,J=101,D=1> ; 5022
3834 004645' 001000 000020
3835 004646' 502300 002010 MWORD <CONT,S0A,A=3,D=1,OENA,LDLM,MGC=10> ; 5023
3836 004647' 401030 230340
3837 004650' 502401 010000 MWORD <CJS,J=101,D=1> ; 5024
3838 004651' 001000 000020
3839 004652' 502500 002011 MWORD <CONT,S0A,A=3,D=1,OENA,LDLM,MGC=11> ; 5025
3840 004653' 401030 230340
3841 004654' 502601 010000 MWORD <CJS,J=101,D=1> ; 5026
3842 004655' 001000 000020
3843 004656' 502700 002012 MWORD <CONT,S0A,A=3,D=1,OENA,LDLM,MGC=12> ; 5027
3844 004657' 401030 230340
3845 004660' 503001 010000 MWORD <CJS,J=101,D=1> ; 5030
3846 004661' 001000 000020
3847 004662' 503100 002013 MWORD <CONT,S0A,A=3,D=1,OENA,LDLM,MGC=13> ; 5031
3848 004663' 401030 230340
3849 004664' 503200 000000 MWORD <JZ> ; 5032
3850 004665' 000000 000000
3851 004666' 000000 000000 MWORD <ADDR=0,JZ> ; 5023
3852 004667' 000000 000000
3853
3854 ; Subroutine - Passed - Write 1 to bit 12 of CSR register
3855
3856 004670' 510000 000000 MWORD <ADDR=5100,CONT,SD0,AND,B=2,D=2> ; 5100
3857 004671' 742001 000340
3858 004672' 510100 000000 MWORD <CONT,S0B,PLUS,B=2,D=2,CRY> ; 5101
3859 004673' 302001 000740
3860 004674' 510200 260000 MWORD <LDCT,J=26> ; 5102
3861 004675' 000000 000300
3862 004676' 510351 030000 MWORD <RPCT,J=5103,SAB,PLUS,A=2,B=2,D=2> ; 5103
3863 004677' 102021 000220
3864 004700' 510400 002004 MWORD <CONT,S0A,A=2,OR,D=1,OENA,SELE,MGC=4> ; 5104
3865 004701' 431020 005340
3866 004702' 510551 070040 MWORD <CJP,J=5107,CENA,CCGC,D=1,SELE,MGC=40> ; 5105
3867 004703' 001400 015060
3868 004704' 510651 050000 MWORD <JMAP,J=5105,D=1> ; 5106
3869 004705' 001000 000040
3870 004706' 510700 000200 MWORD <CONT,S0A,A=1,OR,D=1,SELE,MGC=200> ; 5107
3871 004707' 431010 005340
3872 004710' 511051 100000 MWORD <JMAP,J=5110,D=1> ; 5110
3873 004711' 001000 000040
3874
3875 ; Subroutine - Failed - Write 1 to bit 13 of CSR register
.MAIN MACRO %53A(1152) 10:53 16-Oct-84 Page 63-3
DFPTAA MAC 19-Feb-83 23:12 CBUS MODULE TESTS SEQ 1961
3876
3877 004712' 520000 000000 MWORD <ADDR=5200,CONT,SD0,AND,B=2,D=2> ; 5200
3878 004713' 742001 000340
3879 004714' 520100 000000 MWORD <CONT,S0B,PLUS,B=2,D=2,CRY> ; 5201
3880 004715' 302001 000740
3881 004716' 520200 250000 MWORD <LDCT,J=25> ; 5202
3882 004717' 000000 000300
3883 004720' 520352 030000 MWORD <RPCT,J=5203,SAB,PLUS,A=2,B=2,D=2> ; 5203
3884 004721' 102021 000220
3885 004722' 520400 002004 MWORD <CONT,S0A,A=2,OR,D=1,OENA,SELE,MGC=4> ; 5204
3886 004723' 431020 005340
3887 004724' 520552 070040 MWORD <CJP,J=5207,CENA,CCGC,D=1,SELE,MGC=40> ; 5205
3888 004725' 001400 015060
3889 004726' 520652 050000 MWORD <JMAP,J=5205,D=1> ; 5206
3890 004727' 001000 000040
3891 004730' 520700 000200 MWORD <CONT,S0A,A=1,OR,D=1,SELE,MGC=200> ; 5207
3892 004731' 431010 005340
3893 004732' 521052 100000 MWORD <JMAP,J=5210,D=1> ; 5210
3894 004733' 001000 000040
3895 004734' 777777 777777 -1
3896
3897
3898 ;#********************************************************************
3899 ; End of CBUS Module Tests
3900 ;#********************************************************************
3901
3902 XLIST
3903
NO ERRORS DETECTED
PROGRAM BREAK IS 005731
CPU TIME USED 04:31.100
143P CORE USED
.MAIN MACRO %53A(1152) 10:53 16-Oct-84 Page S-1
DFPTAA MAC 19-Feb-83 23:12 SYMBOL TABLE SEQ 1962
APR 000000 spd MA46 001236' SCOSW 002021' ext TG43 000512'
BBPNT 000000 ext MA46C0 001252' SINCYC 020000 spd TG44 000603'
BEXEC 002157' ext MA46CH 001241' SSCALL 000003 spd TG45 001014'
BUFCOM 001263' ext MA47 001431' SSLAST 000000 spd TG46 001200'
BUFF 005657' ext MA47C0 001446' SSSTRT 000001 spd TG47 001334'
C1 000054 spd MA47CH 001434' T40M 000052' TG47A 001342'
C11 000066 spd MA50 001631' T41M 000272' TG50 001560'
C12 000067 spd MA50PN 001632' T42M 000454' TG51 001676'
C14 000071 spd MA51 002017' T43M 000543' TG52 002146'
C17 000074 spd MA51LA 002053' T44M 000654' TG53 002225'
C18 000075 spd MA51LG 002037' T45M 001111' TG54 002611'
C20 000077 spd MA51PN 002021' T46M 001265' TG55 003160'
C21 000100 spd MA52 002176' T47M 001470' TG56 003500'
C22 000101 spd MA53 002430' T50M 001657' TG57 004021'
C23 000102 spd MA53PN 002433' T50SS 001616' TG60 004357'
C24 000103 spd MA54 003000' T51M 002116' TJRST 000006 spd
C4 000057 spd MA54PN 003003' T52M 002200' TL40 000016'
C7 000062 spd MA55 003263' T53M 002445' TL41 000200'
C8 000063 spd MA55PN 003266' T54M 003015' TL42 000430'
C9 000064 spd MA56 003603' T55M 003300' TL43 000517'
CALL 200000 000000 spd MA56PN 003606' T56M 003620' TL44 000610'
CBUF 005103' ext MA57 004126' T57M 004143' TL45 001021'
CBUFSZ 000315 spd MA57PN 004131' T60M 004514' TL46 001205'
CBUS 100000 000000 spd MA60 004477' TA40 000022' TL47 001347'
CCALL 000005 spd MA60PN 004502' TA41 000204' TL51 001705'
CCPNT 000000 ext MLAST 400000 000000 spd TA42 000434' TL52 002153'
CEBUFA 005250' ext MPRUN 000010 spd TA43 000523' TL53 002232'
CEXEC 001353' ext MSG 100000 000000 spd TA44 000614' TL54 002616'
CHINIT 004417' ext NDCB 000200 000000 spd TA45 001024' TL55 003165'
CLAST 000000 spd NDMP 000400 000000 spd TA46 001210' TL56 003505'
CSETRD 000001 spd ODELAY 004436' ext TA47 001352' TL57 004026'
CSETWR 000002 spd P 000017 TA50 001567' TL60 004364'
CSTART 000004 spd PATBUF 000000 ext TA51 001710' TLAST 000000 spd
CSTATF 000613' ext PDEC 006000 000000 TA52 002157' TLOAD 004362' ext
CWAIT 000007 spd PI 000004 spd TA53 002236' TRACE 004360' ext
ERFLG 000015 PNT3 037140 000000 TA54 002622' TS40 000034'
GENCCW 004423' ext PNTDEC 037640 000000 TA55 003171' TS41 000216'
GETLOG 001751' ext PNTHW 037540 000000 TA56 003511' TS42 000445'
GO 260740 000000 PNTMSG 037000 000000 TA57 004032' TS43 000534'
IPACLR 004365' ext PNTOCS 037700 000003 TA60 004370' TS44 000626'
LAST 010000 000000 spd RDEBUF 002644' ext TB40 000023' TS44DA 000633'
LDCSR 004453' ext RTN 263740 000000 TB41 000205' TS45 001036'
LDRAR 004447' ext SAVAPR 005715' TB44 000615' TS45CH 001043'
LOGBUF 000000 ext SAVCN1 005716' TB45 001025' TS46 001222'
MA40 000043' SAVCN2 005717' TB46 001211' TS46CH 001227'
MA40L 000050' SAVCN3 005720' TB47 001353' TS47 001373'
MA40LP 000045' SAVCN4 005721' TB51 001711' TS47CH 001416'
MA41 000222' SAVDA1 005722' TCALL 000003 spd TS47D0 001404'
MA41LP 000224' SAVDAT 005723' TCALLC 000004 spd TS47DA 001401'
MA42 000452' SAVNUM 005724' TCHECK 000005 spd TS51 001722'
MA43 000541' SAVR11 005725' TEXEC 004370' ext TS51C0 001766'
MA44 000652' SAVR12 005726' TEXIT 000007 spd TS51CD 002013'
MA45 001052' SAVR13 005727' TG40 000011' TS51CH 001747'
MA45C0 001067' SAVSEG 005730' TG41 000173' TS51IN 001727'
MA45CH 001055' SCOPER 027000 000000 TG42 000423' TS51TB 002003'
.MAIN MACRO %53A(1152) 10:53 16-Oct-84 Page S-2
DFPTAA MAC 19-Feb-83 23:12 SYMBOL TABLE SEQ 1963
TS51TC 002007' TUSER 001000 000000 spd .LMGC 000001 spd .MSELF 000007 spd
TS52 002170' TX40 000033' .LOENA 002000 spd .MSELM 000007 spd
TS53 002267' TX41 000215' .LOR 000000 spd .MSELP 000007 spd
TS53BU 002320' TX42 000444' .LPLUS 000000 spd .MSKCN 000037 spd
TS53DA 002273' TX43 000533' .LRDLM 000000 spd .MSMIN 000007 spd
TS54 002653' TX44 000625' .LRMIN 000000 spd .MTIM 000001 spd
TS54BU 002704' TX45 001035' .LRPCT 000000 spd .MXNOR 000007 spd
TS54DA 002657' TX46 001221' .LS0A 000000 spd .RA 000010 000000 spd
TS55 003202' TX47 001363' .LS0B 000000 spd .RAND 040000 000000 spd
TS55A 003204' TX50 001615' .LSAB 000000 spd .RB 400000 spd
TS55BU 003253' TX51 001721' .LSD0 000000 spd .RCCCA 000000 spd
TS55DA 003212' TX52 002167' .LSELC 000000 spd .RCCCP 140000 spd
TS55IN 003243' TX53 002266' .LSELE 000000 spd .RCCFZ 020000 spd
TS55NE 003245' TX54 002652' .LSELF 000000 spd .RCCGC 010000 spd
TS56 003522' TX55 003201' .LSELM 000000 spd .RCCLW 170000 spd
TS56A 003524' TX56 003521' .LSELP 000000 spd .RCCMB 120000 spd
TS56BU 003573' TX57 004042' .LSKCN 000000 spd .RCCMP 130000 spd
TS56DA 003532' TX60 004400' .LSMIN 000000 spd .RCENA 000400 000000 spd
TS56IN 003563' TXALL 060000 000000 spd .LTIM 000000 spd .RCJP 000060 spd
TS56NE 003565' TXNOT 040000 000000 spd .LXNOR 000000 spd .RCJS 000020 spd
TS57 004043' TXTINH 000200 spd .MA 000017 spd .RCONT 000340 spd
TS57A 004045' UDEBUG 005300' ext .MAND 000007 spd .RCRTN 000240 spd
TS57BU 004114' USER 030037 .MB 000017 spd .RCRY 000400 spd
TS57DA 004053' ZA 000000' .MCCCA 000037 spd .RD 001000 000000 spd
TS57IN 004104' ZCBUS 000004 000000 spd .MCCCP 000037 spd .RJ 000000 spd
TS57NE 004106' $ARG2 000001 .MCCFZ 000037 spd .RJMAP 000040 spd
TS60 004401' $B 000044 .MCCGC 000037 spd .RJZ 000000 spd
TS60A 004403' $CHR 000044 .MCCLW 000037 spd .RLDCT 000300 spd
TS60BU 004463' $GARG 000001 .MCCMB 000037 spd .RLDLM 230000 spd
TS60DA 004411' %ADDR 005211 spd .MCCMP 000037 spd .RMGC 000000 spd
TS60IN 004442' %ML 521052 100000 spd .MCENA 000001 spd .ROENA 000000 spd
TS60NE 004455' %MR 001000 000040 spd .MCJP 000017 spd .ROR 030000 000000 spd
TSSTAR 000010 spd .LA 000000 spd .MCJS 000017 spd .RPLUS 000000 spd
TSTART 000001 spd .LADDR 000100 000000 spd .MCONT 000017 spd .RRDLM 220000 spd
TSTC40 000000' ent .LAND 000000 spd .MCRTN 000017 spd .RRMIN 020000 000000 spd
TSTC41 000163' ent .LB 000000 spd .MCRY 000001 spd .RRPCT 000220 spd
TSTC42 000413' ent .LCCCA 000000 spd .MD 000007 spd .RS0A 400000 000000 spd
TSTC43 000503' ent .LCCCP 000000 spd .MJ 007777 spd .RS0B 300000 000000 spd
TSTC44 000572' ent .LCCFZ 000000 spd .MJMAP 000017 spd .RSAB 100000 000000 spd
TSTC45 001005' ent .LCCGC 000000 spd .MJZ 000017 spd .RSD0 700000 000000 spd
TSTC46 001172' ent .LCCLW 000000 spd .MLDCT 000017 spd .RSELC 004000 spd
TSTC47 001326' ent .LCCMB 000000 spd .MLDLM 000037 spd .RSELE 005000 spd
TSTC50 001553' ent .LCCMP 000000 spd .MMGC 001777 spd .RSELF 003000 spd
TSTC51 001670' ent .LCENA 000000 spd .MOENA 000001 spd .RSELM 002000 spd
TSTC52 002141' ent .LCJP 000000 spd .MOR 000007 spd .RSELP 001000 spd
TSTC53 002213' ent .LCJS 000000 spd .MPLUS 000007 spd .RSKCN 240000 spd
TSTC54 002600' ent .LCONT 000000 spd .MRDLM 000037 spd .RSMIN 010000 000000 spd
TSTC55 003150' ent .LCRTN 000000 spd .MRMIN 000007 spd .RTIM 000010 spd
TSTC56 003471' ent .LCRY 000000 spd .MRPCT 000017 spd .RXNOR 070000 000000 spd
TSTC57 004013' ent .LD 000000 spd .MS0A 000007 spd
TSTC60 004352' ent .LJ 010000 spd .MS0B 000007 spd
TSTEBF 200000 spd .LJMAP 000000 spd .MSAB 000007 spd
TSTFLG 005301' ext .LJZ 000000 spd .MSD0 000007 spd
TSTSUB 004366' ext .LLDCT 000000 spd .MSELC 000007 spd
TTPNT 000000 ext .LLDLM 000000 spd .MSELE 000007 spd
APR 1331 1333 1365 1369
BBPNT 15# 546 657 1970 SEQ 1964
BEXEC 15# 519 630 1941
BUFCOM 23# 1225 1232
BUFF 14# 780 781 784 1383 1384 1385 1393 1399 1750 1755 1776 1802 2102
2106 2107 2444 2448 2449 2750 2754 2755 3048 3052 3053 3346 3350 3351
3655 3659 3660
C1 1566 1694
C11 2018 2361 2691 2990 3289 3599
C12 2018 2361 2691 2990 3289 3599
C14 1921 2018 2361 2691 2990 3289 3599
C17 947 1148 1318
C18 260 723
C20 723 1921
C21 2018 2361 2691 2990 3289 3599
C22 260 496 608
C23 69
C24 260
C4 1921
C7 947 1148 1318 1921
C8 69 496 608 723 2990 3289 3599
C9 947 1148 1318
CALL 127 128 309 310 546 657 793 1006 1007 1206 1207 1414 1415 1635
1808 1970 2194 2195 2523 2524 2797 2798 3095 3096 3395 3396 3715 3716
CBUF 14# 782 1748 1800 1801 2100 2442 2748 3046 3344 3653
CBUFSZ 782 1748 2100 2442 2748 3046 3344 3653
CBUS 67 258 494 606 721 945 1146 1316 1564 1692 1919 2016 2359 2689
2988 3287 3597
CCALL 990 991 1190 1191 1375 1376 1378 1379
CCPNT 15# 1007 1207 1415
CEBUFA 15# 996 1012 1015 1019 1023 1196 1212 1218 1404 1420 1423 1427 1431
CEXEC 15# 969 1169 1349
CHINIT 19# 783 1749 2101 2443 2749 3047 3345 3654
CLAST 991 992 1191 1192 1379 1380
CSETRD 1187 1188
CSETWR 987 988 1374 1375
CSTART 988 989 1188 1189 1376 1377
CSTATF 15# 743
CWAIT 989 990 1189 1190 1377 1378
ERFLG 86 97 104 276 287 294 512 522 529 623 633 640 740 751
758 962 972 979 998 1011 1042 1162 1172 1179 1198 1211 1227 1342
1352 1359 1406 1419 1450 1585 1601 1607 1710 1720 1727 1785 1788 1791
1792 1934 1944 1951 2036 2046 2073 2378 2388 2415 2707 2717 2724 3005
3015 3022 3303 3313 3320 3612 3622 3629
GENCCW 19# 787 1753 2105 2447 2753 3051 3349 3658
GETLOG 19# 1764
IPACLR 19# 87 93 277 283 513 624 747 968 1168 1348 1621 1716 1935
1961 2037 2379 2708 3006 3304 3613
LAST 128 310 546 657 793 1007 1207 1415 1635 1808 1970 2195 2524 2798
3096 3396 3716
LDCSR 19# 313 318 323 328 333 338 778 779 1030 1035 1037 1041 1438
1443 1445 1449 1625 1629 1747 1757 2054 2064 2090 2095 2099 2396 2406
2432 2437 2441 2747 2757 2762 2766 3045 3055 3060 3064 3343 3353 3358
3362 3652 3662 3667 3671 3678 3683 3685
LDRAR 19# 316 326 336 776 1033 1441 1623 1745 2052 2062 2093 2394 2404 SEQ 1965
2435 2745 2760 3043 3058 3341 3356 3650 3665 3681
LOGBUF 19# 1765
MA40 101 127#
MA40L 131 134#
MA40LP 127 130#
MA41 291 309#
MA41LP 309 312#
MA42 526 545#
MA43 637 656#
MA44 755 792#
MA45 976 1005#
MA45C0 1011 1021 1029#
MA45CH 995 1006 1011# 1014
MA46 1176 1205#
MA46C0 1211 1214 1223#
MA46CH 1195 1206 1211#
MA47 1356 1413#
MA47C0 1419 1429 1437#
MA47CH 1403 1414 1419# 1422
MA50 1611 1635#
MA50PN 1635 1637#
MA51 1724 1807#
MA51LA 1828 1840#
MA51LG 1816 1822 1827#
MA51PN 1808 1810#
MA52 1948 1968#
MA53 2070 2193#
MA53PN 2194 2197#
MA54 2412 2522#
MA54PN 2523 2526#
MA55 2721 2796#
MA55PN 2797 2800#
MA56 3019 3094#
MA56PN 3095 3098#
MA57 3317 3394#
MA57PN 3395 3398#
MA60 3626 3714#
MA60PN 3715 3718#
MLAST 69 260 496 608 723 947 1148 1318 1566 1694 1921 2018 2361 2691
2990 3289 3599
MPRUN 317 327 337 777 1034 1442 1624 1746 2053 2063 2094 2395 2405 2436
2746 2761 3044 3059 3342 3357 3651 3666 3682
MSG 545 656 792 1005 1205 1413 1807 1968 2193 2522 2796 3094 3394 3714
NDCB 67 258 494 606 721 945 1146 1316 1564 1692 1919 2016 2359 2689
2988 3287 3597
NDMP 67 258 494 606 721 945 1146 1316 1564 1692 1919 2016 2359 2689
2988 3287 3597
ODELAY 14# 1627 1763 2097 2439 2764 3062 3360 3669
P 999 1000 1199 1200 1407 1408 1793 1794 2778 3076 3374 3692
PATBUF 23#
PI 1388 1391
RDEBUF 19# 319 329 339 1038 1446 1630 2055 2065 2397 2407
SAVAPR 1324# 1324 1332 1363 1366 SEQ 1966
SAVCN1 1588# 1588 1596 1602 1642
SAVCN2 1592# 1592 1600 1606 1654
SAVCN3 1599# 1599 1650
SAVCN4 1605# 1605 1646
SAVDA1 1039# 1039 1044 1447# 1447 1452
SAVDAT 2066# 2066 2408
SAVNUM 1226# 1226
SAVR11 320# 320 341
SAVR12 330# 330 347
SAVR13 340# 340 350
SAVSEG 2056 2108# 2108 2197 2398 2450# 2450 2526 2771# 2771 2776 2800 3069# 3069
3074 3098 3367# 3367 3372 3398 3676# 3676 3690 3718
SCOSW 23# 1638 1810
SINCYC 317 327 337 777 2053 2063 2395 2405
SSCALL 1961 1962
SSLAST 541 542 652 653 1964 1965
SSSTRT 537 538 539 540 541 648 649 650 651 652 1959 1960 1961 1962
1963 1964
T40M 68 80 141#
T41M 259 270 359#
T42M 495 506 550#
T43M 607 617 661#
T44M 722 734 799#
T45M 946 956 1050#
T46M 1147 1156 1239#
T47M 1317 1336 1458#
T50M 1565 1579 1661#
T50SS 1587 1591 1621#
T51M 1693 1702 1878#
T52M 1920 1928 1974#
T53M 2017 2030 2212#
T54M 2360 2372 2541#
T55M 2690 2701 2815#
T56M 2989 2999 3113#
T57M 3288 3297 3413#
T60M 3598 3606 3733#
TA40 93# 104
TA41 283# 294
TA42 519# 521 529
TA43 630# 632 640
TA44 747# 758
TA45 968# 979
TA46 1168# 1179
TA47 1348# 1359
TA50 1585# 1612
TA51 1716# 1727
TA52 1941# 1943 1951
TA53 2043# 2045 2073
TA54 2385# 2387 2415
TA55 2714# 2716 2724
TA56 3012# 3014 3022
TA57 3310# 3312 3320
TA60 3619# 3621 3629 SEQ 1967
TB40 94# 96
TB41 284# 286
TB44 748# 750
TB45 969# 971
TB46 1169# 1171
TB47 1349# 1351
TB51 1717# 1719
TCALL 766 767 1735 1736 1737 1738 2081 2082 2423 2424 2732 2733 2734 3030
3031 3032 3328 3329 3330 3637 3638 3639
TCALLC 2734 2735 3032 3033 3330 3331 3639 3640
TCHECK 115 116 121 122 303 304 768 769 2083 2084 2425 2426 2736 2737
3034 3035 3332 3333 3641 3642
TEXEC 15# 94 284 748 1717 2043 2385 2714 3012 3310 3619
TEXIT 116 117 122 123 304 305 769 770 1738 1739 2737 2738 3035 3036
3333 3334 3642 3643
TG40 66 78#
TG41 257 268#
TG42 493 504#
TG43 605 615#
TG44 720 732#
TG45 944 954#
TG46 1145 1154#
TG47 1315 1324#
TG47A 1330 1334#
TG50 1563 1571#
TG51 1691 1700#
TG52 1918 1926#
TG53 2015 2028#
TG54 2358 2370#
TG55 2688 2699#
TG56 2987 2997#
TG57 3286 3295#
TG60 3596 3604#
TJRST 2738 2739 3036 3037 3334 3335 3643 3644
TL40 86# 102
TL41 276# 292
TL42 512# 527
TL43 623# 638
TL44 740# 756
TL45 962# 977
TL46 1162# 1177
TL47 1342# 1357
TL51 1710# 1725
TL52 1934# 1949
TL53 2036# 2071
TL54 2378# 2413
TL55 2707# 2722
TL56 3005# 3020
TL57 3303# 3318
TL60 3612# 3627
TLAST 123 124 305 306 770 771 1739 1740 2084 2085 2426 2427 2739 2740
3037 3038 3335 3336 3644 3645
TLOAD 14# 81 271 507 618 735 957 1157 1337 1580 1703 1929 2031 2373 SEQ 1968
2702 3000 3298 3607
TRACE 14# 79 269 505 616 733 955 1155 1335 1578 1701 1927 2029 2371
2700 2998 3296 3605
TS40 89 114#
TS41 279 302#
TS42 515 537#
TS43 626 648#
TS44 741 766#
TS44DA 766 774#
TS45 963 987#
TS45CH 990 995#
TS46 1163 1187#
TS46CH 1190 1195#
TS47 1343 1374#
TS47CH 1378 1399#
TS47D0 1386# 1394
TS47DA 1375 1383#
TS51 1711 1735#
TS51C0 1768 1783#
TS51CD 1705 1800#
TS51CH 1737 1762#
TS51IN 1735 1743#
TS51TB 1765 1766 1772 1783 1786 1789 1797# 1821
TS51TC 1705 1706 1773 1775 1779 1784 1787 1790 1798# 1815
TS52 1937 1959#
TS53 2039 2081#
TS53BU 2106 2113# 2199 2201
TS53DA 2081 2089#
TS54 2381 2423#
TS54BU 2448 2455# 2528 2530
TS54DA 2423 2431#
TS55 2710 2732#
TS55A 2734# 2738 2780
TS55BU 2754 2785# 2802 2804
TS55DA 2732 2743#
TS55IN 2733 2771#
TS55NE 2734 2776#
TS56 3008 3030#
TS56A 3032# 3036 3078
TS56BU 3052 3083# 3100 3102
TS56DA 3030 3041#
TS56IN 3031 3069#
TS56NE 3032 3074#
TS57 3306 3328#
TS57A 3330# 3334 3376
TS57BU 3350 3381# 3400 3402
TS57DA 3328 3339#
TS57IN 3329 3367#
TS57NE 3330 3372#
TS60 3615 3637#
TS60A 3639# 3643 3694
TS60BU 3659 3699# 3720 3722
TS60DA 3637 3648# SEQ 1969
TS60IN 3638 3676#
TS60NE 3639 3690#
TSSTAR 2735 3033 3331 3640
TSTART 114 115 120 121 302 303 767 768 1736 1737 2082 2083 2424 2425
TSTC40 9 66#
TSTC41 9 70 257#
TSTC42 9 71 261 493#
TSTC43 9 72 262 497 605#
TSTC44 9 73 263 498 609 720#
TSTC45 9 724 944#
TSTC46 9 725 948 1145#
TSTC47 9 726 949 1149 1315#
TSTC50 9 1563#
TSTC51 10 1691#
TSTC52 10 499 610 727 1319 1695 1918#
TSTC53 10 2015#
TSTC54 10 2019 2358#
TSTC55 10 2020 2362 2688#
TSTC56 10 2021 2363 2692 2987#
TSTC57 10 2022 2364 2693 2991 3286#
TSTC60 10 2023 2365 2694 2992 3290 3596#
TSTEBF 317 327 337 1036 1444 1628 2053 2063 2395 2405
TSTFLG 14# 1326 1329 1572 1575
TSTSUB 14# 88 130 278 514 625 742 964 1164 1344 1712 1936 2038 2057
2058 2380 2399 2400 2709 3007 3305 3614
TTPNT 15# 128 310 793 2195 2524 2798 3096 3396 3716
TUSER 1327 1573
TX40 95 103 108#
TX41 285 293 298#
TX42 520 528 533#
TX43 631 639 644#
TX44 749 757 762#
TX45 970 978 983#
TX46 1170 1178 1183#
TX47 1338 1350 1358 1363#
TX50 1613 1617#
TX51 1718 1726 1731#
TX52 1942 1950 1955#
TX53 2044 2072 2077#
TX54 2386 2414 2419#
TX55 2715 2723 2728#
TX56 3013 3021 3026#
TX57 3311 3319 3324#
TX60 3620 3628 3633#
TXALL 128 310 546 657 793 1007 1207 1415 1635 1808 1970 2195 2524 2798
3096 3396 3716
TXNOT 127 309 545 656 792 1005 1006 1205 1206 1413 1414 1807 1968 2193
2194 2522 2523 2796 2797 3094 3095 3394 3395 3714 3715
TXTINH 1639 1811 1813 1817 1819 1827
UDEBUG 14# 1328 1574 1777
USER 1325 1387 1390 1571 1767
ZA 30# 78 268 504 615 732 954 1154 1334 1577 1700 1926 2028 2370
2699 2997 3295 3604 SEQ 1970
ZCBUS 67 258 494 606 721 945 1146 1316 1564 1692 1919 2016 2359 2689
2988 3287 3597
$ARG2 141# 141 143# 143 145# 145 147# 147 149# 149 151# 151 153# 153
155# 155 157# 157 162# 162 164# 164 166# 166 168# 168 170# 170
172# 172 174# 174 176# 176 178# 178 183# 183 185# 185 187# 187
189# 189 191# 191 193# 193 195# 195 197# 197 199# 199 204# 204
206# 206 208# 208 210# 210 212# 212 214# 214 216# 216 218# 218
220# 220 359# 359 361# 361 363# 363 365# 365 367# 367 370# 370
375# 375 377# 377 379# 379 381# 381 386# 386 388# 388 390# 390
392# 392 397# 397 399# 399 405# 405 407# 407 409# 409 414# 414
416# 416 418# 418 423# 423 425# 425 427# 427 429# 429 431# 431
433# 433 435# 435 437# 437 439# 439 444# 444 446# 446 448# 448
450# 450 452# 452 454# 454 456# 456 458# 458 460# 460 550# 550
552# 552 554# 554 556# 556 558# 558 561# 561 563# 563 565# 565
567# 567 569# 569 571# 571 661# 661 663# 663 665# 665 667# 667
669# 669 672# 672 674# 674 676# 676 678# 678 680# 680 682# 682
799# 799 801# 801 803# 803 805# 805 807# 807 812# 812 814# 814
816# 816 818# 818 823# 823 825# 825 827# 827 829# 829 831# 831
836# 836 838# 838 840# 840 842# 842 847# 847 852# 852 854# 854
856# 856 858# 858 863# 863 865# 865 868# 868 873# 873 875# 875
877# 877 879# 879 881# 881 883# 883 885# 885 887# 887 889# 889
894# 894 896# 896 898# 898 900# 900 902# 902 904# 904 906# 906
908# 908 910# 910 1050# 1050 1052# 1052 1054# 1054 1056# 1056 1058# 1058
1060# 1060 1062# 1062 1067# 1067 1069# 1069 1071# 1071 1076# 1076 1078# 1078
1080# 1080 1087# 1087 1089# 1089 1091# 1091 1093# 1093 1095# 1095 1097# 1097
1102# 1102 1104# 1104 1109# 1109 1114# 1114 1116# 1116 1239# 1239 1241# 1241
1246# 1246 1248# 1248 1250# 1250 1252# 1252 1254# 1254 1256# 1256 1258# 1258
1260# 1260 1265# 1265 1267# 1267 1269# 1269 1274# 1274 1279# 1279 1281# 1281
1458# 1458 1460# 1460 1462# 1462 1464# 1464 1466# 1466 1468# 1468 1470# 1470
1472# 1472 1478# 1478 1480# 1480 1482# 1482 1487# 1487 1489# 1489 1491# 1491
1498# 1498 1500# 1500 1502# 1502 1504# 1504 1506# 1506 1508# 1508 1513# 1513
1515# 1515 1520# 1520 1525# 1525 1527# 1527 1661# 1661 1663# 1663 1666# 1666
1668# 1668 1878# 1878 1880# 1880 1882# 1882 1884# 1884 1886# 1886 1888# 1888
1890# 1890 1895# 1895 1897# 1897 1974# 1974 1976# 1976 1978# 1978 1981# 1981
1983# 1983 2212# 2212 2214# 2214 2216# 2216 2218# 2218 2220# 2220 2222# 2222
2227# 2227 2229# 2229 2231# 2231 2233# 2233 2235# 2235 2237# 2237 2239# 2239
2241# 2241 2246# 2246 2253# 2253 2255# 2255 2257# 2257 2259# 2259 2261# 2261
2263# 2263 2265# 2265 2267# 2267 2272# 2272 2277# 2277 2282# 2282 2284# 2284
2289# 2289 2291# 2291 2293# 2293 2295# 2295 2297# 2297 2299# 2299 2301# 2301
2303# 2303 2305# 2305 2310# 2310 2312# 2312 2314# 2314 2316# 2316 2318# 2318
2320# 2320 2322# 2322 2324# 2324 2326# 2326 2541# 2541 2543# 2543 2545# 2545
2547# 2547 2549# 2549 2551# 2551 2556# 2556 2558# 2558 2560# 2560 2562# 2562
2564# 2564 2566# 2566 2568# 2568 2570# 2570 2575# 2575 2582# 2582 2584# 2584
2586# 2586 2588# 2588 2590# 2590 2592# 2592 2594# 2594 2596# 2596 2601# 2601
2606# 2606 2611# 2611 2613# 2613 2618# 2618 2620# 2620 2622# 2622 2624# 2624
2626# 2626 2628# 2628 2630# 2630 2632# 2632 2634# 2634 2639# 2639 2641# 2641
2643# 2643 2645# 2645 2647# 2647 2649# 2649 2651# 2651 2653# 2653 2655# 2655
2815# 2815 2817# 2817 2819# 2819 2821# 2821 2823# 2823 2825# 2825 2827# 2827
2829# 2829 2834# 2834 2836# 2836 2838# 2838 2840# 2840 2842# 2842 2844# 2844
2846# 2846 2848# 2848 2853# 2853 2855# 2855 2857# 2857 2859# 2859 2861# 2861
2866# 2866 2871# 2871 2873# 2873 2875# 2875 2877# 2877 2879# 2879 2881# 2881
2883# 2883 2885# 2885 2887# 2887 2889# 2889 2891# 2891 2893# 2893 2895# 2895
2897# 2897 2899# 2899 2901# 2901 2903# 2903 2905# 2905 2907# 2907 2909# 2909 SEQ 1971
2914# 2914 2916# 2916 2918# 2918 2920# 2920 2922# 2922 2924# 2924 2926# 2926
2928# 2928 2930# 2930 2935# 2935 2937# 2937 2939# 2939 2941# 2941 2943# 2943
2945# 2945 2947# 2947 2949# 2949 2951# 2951 3113# 3113 3115# 3115 3117# 3117
3119# 3119 3121# 3121 3123# 3123 3125# 3125 3127# 3127 3132# 3132 3134# 3134
3136# 3136 3138# 3138 3140# 3140 3142# 3142 3144# 3144 3146# 3146 3148# 3148
3153# 3153 3155# 3155 3157# 3157 3159# 3159 3161# 3161 3166# 3166 3171# 3171
3173# 3173 3175# 3175 3177# 3177 3179# 3179 3181# 3181 3183# 3183 3185# 3185
3187# 3187 3189# 3189 3191# 3191 3193# 3193 3195# 3195 3197# 3197 3199# 3199
3201# 3201 3203# 3203 3205# 3205 3207# 3207 3209# 3209 3214# 3214 3216# 3216
3218# 3218 3220# 3220 3222# 3222 3224# 3224 3226# 3226 3228# 3228 3230# 3230
3235# 3235 3237# 3237 3239# 3239 3241# 3241 3243# 3243 3245# 3245 3247# 3247
3249# 3249 3251# 3251 3413# 3413 3415# 3415 3417# 3417 3419# 3419 3421# 3421
3423# 3423 3425# 3425 3427# 3427 3429# 3429 3431# 3431 3436# 3436 3438# 3438
3440# 3440 3442# 3442 3444# 3444 3446# 3446 3448# 3448 3450# 3450 3452# 3452
3457# 3457 3459# 3459 3461# 3461 3463# 3463 3465# 3465 3470# 3470 3475# 3475
3477# 3477 3479# 3479 3481# 3481 3483# 3483 3485# 3485 3487# 3487 3489# 3489
3491# 3491 3493# 3493 3495# 3495 3497# 3497 3499# 3499 3501# 3501 3503# 3503
3505# 3505 3507# 3507 3509# 3509 3511# 3511 3513# 3513 3515# 3515 3517# 3517
3519# 3519 3521# 3521 3526# 3526 3528# 3528 3530# 3530 3532# 3532 3534# 3534
3536# 3536 3538# 3538 3540# 3540 3542# 3542 3547# 3547 3549# 3549 3551# 3551
3553# 3553 3555# 3555 3557# 3557 3559# 3559 3561# 3561 3563# 3563 3733# 3733
3735# 3735 3737# 3737 3739# 3739 3741# 3741 3743# 3743 3745# 3745 3747# 3747
3749# 3749 3751# 3751 3753# 3753 3755# 3755 3760# 3760 3762# 3762 3764# 3764
3766# 3766 3768# 3768 3770# 3770 3772# 3772 3774# 3774 3779# 3779 3781# 3781
3783# 3783 3785# 3785 3787# 3787 3792# 3792 3797# 3797 3799# 3799 3801# 3801
3803# 3803 3805# 3805 3807# 3807 3809# 3809 3811# 3811 3813# 3813 3815# 3815
3817# 3817 3819# 3819 3821# 3821 3823# 3823 3825# 3825 3827# 3827 3829# 3829
3831# 3831 3833# 3833 3835# 3835 3837# 3837 3839# 3839 3841# 3841 3843# 3843
3845# 3845 3847# 3847 3849# 3849 3851# 3851 3856# 3856 3858# 3858 3860# 3860
3862# 3862 3864# 3864 3866# 3866 3868# 3868 3870# 3870 3872# 3872 3877# 3877
3879# 3879 3881# 3881 3883# 3883 3885# 3885 3887# 3887 3889# 3889 3891# 3891
3893# 3893
$B 141# 141 143# 143 145# 145 147# 147 149# 149 151# 151 153# 153
155# 155 157# 157 162# 162 164# 164 166# 166 168# 168 170# 170
172# 172 174# 174 176# 176 178# 178 183# 183 185# 185 187# 187
189# 189 191# 191 193# 193 195# 195 197# 197 199# 199 204# 204
206# 206 208# 208 210# 210 212# 212 214# 214 216# 216 218# 218
220# 220 359# 359 361# 361 363# 363 365# 365 367# 367 370# 370
375# 375 377# 377 379# 379 381# 381 386# 386 388# 388 390# 390
392# 392 397# 397 399# 399 405# 405 407# 407 409# 409 414# 414
416# 416 418# 418 423# 423 425# 425 427# 427 429# 429 431# 431
433# 433 435# 435 437# 437 439# 439 444# 444 446# 446 448# 448
450# 450 452# 452 454# 454 456# 456 458# 458 460# 460 550# 550
552# 552 554# 554 556# 556 558# 558 561# 561 563# 563 565# 565
567# 567 569# 569 571# 571 661# 661 663# 663 665# 665 667# 667
669# 669 672# 672 674# 674 676# 676 678# 678 680# 680 682# 682
799# 799 801# 801 803# 803 805# 805 807# 807 812# 812 814# 814
816# 816 818# 818 823# 823 825# 825 827# 827 829# 829 831# 831
836# 836 838# 838 840# 840 842# 842 847# 847 852# 852 854# 854
856# 856 858# 858 863# 863 865# 865 868# 868 873# 873 875# 875
877# 877 879# 879 881# 881 883# 883 885# 885 887# 887 889# 889
894# 894 896# 896 898# 898 900# 900 902# 902 904# 904 906# 906
908# 908 910# 910 1050# 1050 1052# 1052 1054# 1054 1056# 1056 1058# 1058 SEQ 1972
1060# 1060 1062# 1062 1067# 1067 1069# 1069 1071# 1071 1076# 1076 1078# 1078
1080# 1080 1087# 1087 1089# 1089 1091# 1091 1093# 1093 1095# 1095 1097# 1097
1102# 1102 1104# 1104 1109# 1109 1114# 1114 1116# 1116 1239# 1239 1241# 1241
1246# 1246 1248# 1248 1250# 1250 1252# 1252 1254# 1254 1256# 1256 1258# 1258
1260# 1260 1265# 1265 1267# 1267 1269# 1269 1274# 1274 1279# 1279 1281# 1281
1458# 1458 1460# 1460 1462# 1462 1464# 1464 1466# 1466 1468# 1468 1470# 1470
1472# 1472 1478# 1478 1480# 1480 1482# 1482 1487# 1487 1489# 1489 1491# 1491
1498# 1498 1500# 1500 1502# 1502 1504# 1504 1506# 1506 1508# 1508 1513# 1513
1515# 1515 1520# 1520 1525# 1525 1527# 1527 1661# 1661 1663# 1663 1666# 1666
1668# 1668 1878# 1878 1880# 1880 1882# 1882 1884# 1884 1886# 1886 1888# 1888
1890# 1890 1895# 1895 1897# 1897 1974# 1974 1976# 1976 1978# 1978 1981# 1981
1983# 1983 2212# 2212 2214# 2214 2216# 2216 2218# 2218 2220# 2220 2222# 2222
2227# 2227 2229# 2229 2231# 2231 2233# 2233 2235# 2235 2237# 2237 2239# 2239
2241# 2241 2246# 2246 2253# 2253 2255# 2255 2257# 2257 2259# 2259 2261# 2261
2263# 2263 2265# 2265 2267# 2267 2272# 2272 2277# 2277 2282# 2282 2284# 2284
2289# 2289 2291# 2291 2293# 2293 2295# 2295 2297# 2297 2299# 2299 2301# 2301
2303# 2303 2305# 2305 2310# 2310 2312# 2312 2314# 2314 2316# 2316 2318# 2318
2320# 2320 2322# 2322 2324# 2324 2326# 2326 2541# 2541 2543# 2543 2545# 2545
2547# 2547 2549# 2549 2551# 2551 2556# 2556 2558# 2558 2560# 2560 2562# 2562
2564# 2564 2566# 2566 2568# 2568 2570# 2570 2575# 2575 2582# 2582 2584# 2584
2586# 2586 2588# 2588 2590# 2590 2592# 2592 2594# 2594 2596# 2596 2601# 2601
2606# 2606 2611# 2611 2613# 2613 2618# 2618 2620# 2620 2622# 2622 2624# 2624
2626# 2626 2628# 2628 2630# 2630 2632# 2632 2634# 2634 2639# 2639 2641# 2641
2643# 2643 2645# 2645 2647# 2647 2649# 2649 2651# 2651 2653# 2653 2655# 2655
2815# 2815 2817# 2817 2819# 2819 2821# 2821 2823# 2823 2825# 2825 2827# 2827
2829# 2829 2834# 2834 2836# 2836 2838# 2838 2840# 2840 2842# 2842 2844# 2844
2846# 2846 2848# 2848 2853# 2853 2855# 2855 2857# 2857 2859# 2859 2861# 2861
2866# 2866 2871# 2871 2873# 2873 2875# 2875 2877# 2877 2879# 2879 2881# 2881
2883# 2883 2885# 2885 2887# 2887 2889# 2889 2891# 2891 2893# 2893 2895# 2895
2897# 2897 2899# 2899 2901# 2901 2903# 2903 2905# 2905 2907# 2907 2909# 2909
2914# 2914 2916# 2916 2918# 2918 2920# 2920 2922# 2922 2924# 2924 2926# 2926
2928# 2928 2930# 2930 2935# 2935 2937# 2937 2939# 2939 2941# 2941 2943# 2943
2945# 2945 2947# 2947 2949# 2949 2951# 2951 3113# 3113 3115# 3115 3117# 3117
3119# 3119 3121# 3121 3123# 3123 3125# 3125 3127# 3127 3132# 3132 3134# 3134
3136# 3136 3138# 3138 3140# 3140 3142# 3142 3144# 3144 3146# 3146 3148# 3148
3153# 3153 3155# 3155 3157# 3157 3159# 3159 3161# 3161 3166# 3166 3171# 3171
3173# 3173 3175# 3175 3177# 3177 3179# 3179 3181# 3181 3183# 3183 3185# 3185
3187# 3187 3189# 3189 3191# 3191 3193# 3193 3195# 3195 3197# 3197 3199# 3199
3201# 3201 3203# 3203 3205# 3205 3207# 3207 3209# 3209 3214# 3214 3216# 3216
3218# 3218 3220# 3220 3222# 3222 3224# 3224 3226# 3226 3228# 3228 3230# 3230
3235# 3235 3237# 3237 3239# 3239 3241# 3241 3243# 3243 3245# 3245 3247# 3247
3249# 3249 3251# 3251 3413# 3413 3415# 3415 3417# 3417 3419# 3419 3421# 3421
3423# 3423 3425# 3425 3427# 3427 3429# 3429 3431# 3431 3436# 3436 3438# 3438
3440# 3440 3442# 3442 3444# 3444 3446# 3446 3448# 3448 3450# 3450 3452# 3452
3457# 3457 3459# 3459 3461# 3461 3463# 3463 3465# 3465 3470# 3470 3475# 3475
3477# 3477 3479# 3479 3481# 3481 3483# 3483 3485# 3485 3487# 3487 3489# 3489
3491# 3491 3493# 3493 3495# 3495 3497# 3497 3499# 3499 3501# 3501 3503# 3503
3505# 3505 3507# 3507 3509# 3509 3511# 3511 3513# 3513 3515# 3515 3517# 3517
3519# 3519 3521# 3521 3526# 3526 3528# 3528 3530# 3530 3532# 3532 3534# 3534
3536# 3536 3538# 3538 3540# 3540 3542# 3542 3547# 3547 3549# 3549 3551# 3551
3553# 3553 3555# 3555 3557# 3557 3559# 3559 3561# 3561 3563# 3563 3733# 3733
3735# 3735 3737# 3737 3739# 3739 3741# 3741 3743# 3743 3745# 3745 3747# 3747
3749# 3749 3751# 3751 3753# 3753 3755# 3755 3760# 3760 3762# 3762 3764# 3764 SEQ 1973
3766# 3766 3768# 3768 3770# 3770 3772# 3772 3774# 3774 3779# 3779 3781# 3781
3783# 3783 3785# 3785 3787# 3787 3792# 3792 3797# 3797 3799# 3799 3801# 3801
3803# 3803 3805# 3805 3807# 3807 3809# 3809 3811# 3811 3813# 3813 3815# 3815
3817# 3817 3819# 3819 3821# 3821 3823# 3823 3825# 3825 3827# 3827 3829# 3829
3831# 3831 3833# 3833 3835# 3835 3837# 3837 3839# 3839 3841# 3841 3843# 3843
3845# 3845 3847# 3847 3849# 3849 3851# 3851 3856# 3856 3858# 3858 3860# 3860
3862# 3862 3864# 3864 3866# 3866 3868# 3868 3870# 3870 3872# 3872 3877# 3877
3879# 3879 3881# 3881 3883# 3883 3885# 3885 3887# 3887 3889# 3889 3891# 3891
3893# 3893
$CHR 141# 141 143# 143 145# 145 147# 147 149# 149 151# 151 153# 153
155# 155 157# 157 162# 162 164# 164 166# 166 168# 168 170# 170
172# 172 174# 174 176# 176 178# 178 183# 183 185# 185 187# 187
189# 189 191# 191 193# 193 195# 195 197# 197 199# 199 204# 204
206# 206 208# 208 210# 210 212# 212 214# 214 216# 216 218# 218
220# 220 359# 359 361# 361 363# 363 365# 365 367# 367 370# 370
375# 375 377# 377 379# 379 381# 381 386# 386 388# 388 390# 390
392# 392 397# 397 399# 399 405# 405 407# 407 409# 409 414# 414
416# 416 418# 418 423# 423 425# 425 427# 427 429# 429 431# 431
433# 433 435# 435 437# 437 439# 439 444# 444 446# 446 448# 448
450# 450 452# 452 454# 454 456# 456 458# 458 460# 460 550# 550
552# 552 554# 554 556# 556 558# 558 561# 561 563# 563 565# 565
567# 567 569# 569 571# 571 661# 661 663# 663 665# 665 667# 667
669# 669 672# 672 674# 674 676# 676 678# 678 680# 680 682# 682
799# 799 801# 801 803# 803 805# 805 807# 807 812# 812 814# 814
816# 816 818# 818 823# 823 825# 825 827# 827 829# 829 831# 831
836# 836 838# 838 840# 840 842# 842 847# 847 852# 852 854# 854
856# 856 858# 858 863# 863 865# 865 868# 868 873# 873 875# 875
877# 877 879# 879 881# 881 883# 883 885# 885 887# 887 889# 889
894# 894 896# 896 898# 898 900# 900 902# 902 904# 904 906# 906
908# 908 910# 910 1050# 1050 1052# 1052 1054# 1054 1056# 1056 1058# 1058
1060# 1060 1062# 1062 1067# 1067 1069# 1069 1071# 1071 1076# 1076 1078# 1078
1080# 1080 1087# 1087 1089# 1089 1091# 1091 1093# 1093 1095# 1095 1097# 1097
1102# 1102 1104# 1104 1109# 1109 1114# 1114 1116# 1116 1239# 1239 1241# 1241
1246# 1246 1248# 1248 1250# 1250 1252# 1252 1254# 1254 1256# 1256 1258# 1258
1260# 1260 1265# 1265 1267# 1267 1269# 1269 1274# 1274 1279# 1279 1281# 1281
1458# 1458 1460# 1460 1462# 1462 1464# 1464 1466# 1466 1468# 1468 1470# 1470
1472# 1472 1478# 1478 1480# 1480 1482# 1482 1487# 1487 1489# 1489 1491# 1491
1498# 1498 1500# 1500 1502# 1502 1504# 1504 1506# 1506 1508# 1508 1513# 1513
1515# 1515 1520# 1520 1525# 1525 1527# 1527 1661# 1661 1663# 1663 1666# 1666
1668# 1668 1878# 1878 1880# 1880 1882# 1882 1884# 1884 1886# 1886 1888# 1888
1890# 1890 1895# 1895 1897# 1897 1974# 1974 1976# 1976 1978# 1978 1981# 1981
1983# 1983 2212# 2212 2214# 2214 2216# 2216 2218# 2218 2220# 2220 2222# 2222
2227# 2227 2229# 2229 2231# 2231 2233# 2233 2235# 2235 2237# 2237 2239# 2239
2241# 2241 2246# 2246 2253# 2253 2255# 2255 2257# 2257 2259# 2259 2261# 2261
2263# 2263 2265# 2265 2267# 2267 2272# 2272 2277# 2277 2282# 2282 2284# 2284
2289# 2289 2291# 2291 2293# 2293 2295# 2295 2297# 2297 2299# 2299 2301# 2301
2303# 2303 2305# 2305 2310# 2310 2312# 2312 2314# 2314 2316# 2316 2318# 2318
2320# 2320 2322# 2322 2324# 2324 2326# 2326 2541# 2541 2543# 2543 2545# 2545
2547# 2547 2549# 2549 2551# 2551 2556# 2556 2558# 2558 2560# 2560 2562# 2562
2564# 2564 2566# 2566 2568# 2568 2570# 2570 2575# 2575 2582# 2582 2584# 2584
2586# 2586 2588# 2588 2590# 2590 2592# 2592 2594# 2594 2596# 2596 2601# 2601
2606# 2606 2611# 2611 2613# 2613 2618# 2618 2620# 2620 2622# 2622 2624# 2624
2626# 2626 2628# 2628 2630# 2630 2632# 2632 2634# 2634 2639# 2639 2641# 2641 SEQ 1974
2643# 2643 2645# 2645 2647# 2647 2649# 2649 2651# 2651 2653# 2653 2655# 2655
2815# 2815 2817# 2817 2819# 2819 2821# 2821 2823# 2823 2825# 2825 2827# 2827
2829# 2829 2834# 2834 2836# 2836 2838# 2838 2840# 2840 2842# 2842 2844# 2844
2846# 2846 2848# 2848 2853# 2853 2855# 2855 2857# 2857 2859# 2859 2861# 2861
2866# 2866 2871# 2871 2873# 2873 2875# 2875 2877# 2877 2879# 2879 2881# 2881
2883# 2883 2885# 2885 2887# 2887 2889# 2889 2891# 2891 2893# 2893 2895# 2895
2897# 2897 2899# 2899 2901# 2901 2903# 2903 2905# 2905 2907# 2907 2909# 2909
2914# 2914 2916# 2916 2918# 2918 2920# 2920 2922# 2922 2924# 2924 2926# 2926
2928# 2928 2930# 2930 2935# 2935 2937# 2937 2939# 2939 2941# 2941 2943# 2943
2945# 2945 2947# 2947 2949# 2949 2951# 2951 3113# 3113 3115# 3115 3117# 3117
3119# 3119 3121# 3121 3123# 3123 3125# 3125 3127# 3127 3132# 3132 3134# 3134
3136# 3136 3138# 3138 3140# 3140 3142# 3142 3144# 3144 3146# 3146 3148# 3148
3153# 3153 3155# 3155 3157# 3157 3159# 3159 3161# 3161 3166# 3166 3171# 3171
3173# 3173 3175# 3175 3177# 3177 3179# 3179 3181# 3181 3183# 3183 3185# 3185
3187# 3187 3189# 3189 3191# 3191 3193# 3193 3195# 3195 3197# 3197 3199# 3199
3201# 3201 3203# 3203 3205# 3205 3207# 3207 3209# 3209 3214# 3214 3216# 3216
3218# 3218 3220# 3220 3222# 3222 3224# 3224 3226# 3226 3228# 3228 3230# 3230
3235# 3235 3237# 3237 3239# 3239 3241# 3241 3243# 3243 3245# 3245 3247# 3247
3249# 3249 3251# 3251 3413# 3413 3415# 3415 3417# 3417 3419# 3419 3421# 3421
3423# 3423 3425# 3425 3427# 3427 3429# 3429 3431# 3431 3436# 3436 3438# 3438
3440# 3440 3442# 3442 3444# 3444 3446# 3446 3448# 3448 3450# 3450 3452# 3452
3457# 3457 3459# 3459 3461# 3461 3463# 3463 3465# 3465 3470# 3470 3475# 3475
3477# 3477 3479# 3479 3481# 3481 3483# 3483 3485# 3485 3487# 3487 3489# 3489
3491# 3491 3493# 3493 3495# 3495 3497# 3497 3499# 3499 3501# 3501 3503# 3503
3505# 3505 3507# 3507 3509# 3509 3511# 3511 3513# 3513 3515# 3515 3517# 3517
3519# 3519 3521# 3521 3526# 3526 3528# 3528 3530# 3530 3532# 3532 3534# 3534
3536# 3536 3538# 3538 3540# 3540 3542# 3542 3547# 3547 3549# 3549 3551# 3551
3553# 3553 3555# 3555 3557# 3557 3559# 3559 3561# 3561 3563# 3563 3733# 3733
3735# 3735 3737# 3737 3739# 3739 3741# 3741 3743# 3743 3745# 3745 3747# 3747
3749# 3749 3751# 3751 3753# 3753 3755# 3755 3760# 3760 3762# 3762 3764# 3764
3766# 3766 3768# 3768 3770# 3770 3772# 3772 3774# 3774 3779# 3779 3781# 3781
3783# 3783 3785# 3785 3787# 3787 3792# 3792 3797# 3797 3799# 3799 3801# 3801
3803# 3803 3805# 3805 3807# 3807 3809# 3809 3811# 3811 3813# 3813 3815# 3815
3817# 3817 3819# 3819 3821# 3821 3823# 3823 3825# 3825 3827# 3827 3829# 3829
3831# 3831 3833# 3833 3835# 3835 3837# 3837 3839# 3839 3841# 3841 3843# 3843
3845# 3845 3847# 3847 3849# 3849 3851# 3851 3856# 3856 3858# 3858 3860# 3860
3862# 3862 3864# 3864 3866# 3866 3868# 3868 3870# 3870 3872# 3872 3877# 3877
3879# 3879 3881# 3881 3883# 3883 3885# 3885 3887# 3887 3889# 3889 3891# 3891
3893# 3893
$GARG 141# 141 143# 143 145# 145 147# 147 149# 149 151# 151 153# 153
155# 155 157# 157 162# 162 164# 164 166# 166 168# 168 170# 170
172# 172 174# 174 176# 176 178# 178 183# 183 185# 185 187# 187
189# 189 191# 191 193# 193 195# 195 197# 197 199# 199 204# 204
206# 206 208# 208 210# 210 212# 212 214# 214 216# 216 218# 218
220# 220 359# 359 361# 361 363# 363 365# 365 367# 367 370# 370
375# 375 377# 377 379# 379 381# 381 386# 386 388# 388 390# 390
392# 392 397# 397 399# 399 405# 405 407# 407 409# 409 414# 414
416# 416 418# 418 423# 423 425# 425 427# 427 429# 429 431# 431
433# 433 435# 435 437# 437 439# 439 444# 444 446# 446 448# 448
450# 450 452# 452 454# 454 456# 456 458# 458 460# 460 550# 550
552# 552 554# 554 556# 556 558# 558 561# 561 563# 563 565# 565
567# 567 569# 569 571# 571 661# 661 663# 663 665# 665 667# 667
669# 669 672# 672 674# 674 676# 676 678# 678 680# 680 682# 682 SEQ 1975
799# 799 801# 801 803# 803 805# 805 807# 807 812# 812 814# 814
816# 816 818# 818 823# 823 825# 825 827# 827 829# 829 831# 831
836# 836 838# 838 840# 840 842# 842 847# 847 852# 852 854# 854
856# 856 858# 858 863# 863 865# 865 868# 868 873# 873 875# 875
877# 877 879# 879 881# 881 883# 883 885# 885 887# 887 889# 889
894# 894 896# 896 898# 898 900# 900 902# 902 904# 904 906# 906
908# 908 910# 910 1050# 1050 1052# 1052 1054# 1054 1056# 1056 1058# 1058
1060# 1060 1062# 1062 1067# 1067 1069# 1069 1071# 1071 1076# 1076 1078# 1078
1080# 1080 1087# 1087 1089# 1089 1091# 1091 1093# 1093 1095# 1095 1097# 1097
1102# 1102 1104# 1104 1109# 1109 1114# 1114 1116# 1116 1239# 1239 1241# 1241
1246# 1246 1248# 1248 1250# 1250 1252# 1252 1254# 1254 1256# 1256 1258# 1258
1260# 1260 1265# 1265 1267# 1267 1269# 1269 1274# 1274 1279# 1279 1281# 1281
1458# 1458 1460# 1460 1462# 1462 1464# 1464 1466# 1466 1468# 1468 1470# 1470
1472# 1472 1478# 1478 1480# 1480 1482# 1482 1487# 1487 1489# 1489 1491# 1491
1498# 1498 1500# 1500 1502# 1502 1504# 1504 1506# 1506 1508# 1508 1513# 1513
1515# 1515 1520# 1520 1525# 1525 1527# 1527 1661# 1661 1663# 1663 1666# 1666
1668# 1668 1878# 1878 1880# 1880 1882# 1882 1884# 1884 1886# 1886 1888# 1888
1890# 1890 1895# 1895 1897# 1897 1974# 1974 1976# 1976 1978# 1978 1981# 1981
1983# 1983 2212# 2212 2214# 2214 2216# 2216 2218# 2218 2220# 2220 2222# 2222
2227# 2227 2229# 2229 2231# 2231 2233# 2233 2235# 2235 2237# 2237 2239# 2239
2241# 2241 2246# 2246 2253# 2253 2255# 2255 2257# 2257 2259# 2259 2261# 2261
2263# 2263 2265# 2265 2267# 2267 2272# 2272 2277# 2277 2282# 2282 2284# 2284
2289# 2289 2291# 2291 2293# 2293 2295# 2295 2297# 2297 2299# 2299 2301# 2301
2303# 2303 2305# 2305 2310# 2310 2312# 2312 2314# 2314 2316# 2316 2318# 2318
2320# 2320 2322# 2322 2324# 2324 2326# 2326 2541# 2541 2543# 2543 2545# 2545
2547# 2547 2549# 2549 2551# 2551 2556# 2556 2558# 2558 2560# 2560 2562# 2562
2564# 2564 2566# 2566 2568# 2568 2570# 2570 2575# 2575 2582# 2582 2584# 2584
2586# 2586 2588# 2588 2590# 2590 2592# 2592 2594# 2594 2596# 2596 2601# 2601
2606# 2606 2611# 2611 2613# 2613 2618# 2618 2620# 2620 2622# 2622 2624# 2624
2626# 2626 2628# 2628 2630# 2630 2632# 2632 2634# 2634 2639# 2639 2641# 2641
2643# 2643 2645# 2645 2647# 2647 2649# 2649 2651# 2651 2653# 2653 2655# 2655
2815# 2815 2817# 2817 2819# 2819 2821# 2821 2823# 2823 2825# 2825 2827# 2827
2829# 2829 2834# 2834 2836# 2836 2838# 2838 2840# 2840 2842# 2842 2844# 2844
2846# 2846 2848# 2848 2853# 2853 2855# 2855 2857# 2857 2859# 2859 2861# 2861
2866# 2866 2871# 2871 2873# 2873 2875# 2875 2877# 2877 2879# 2879 2881# 2881
2883# 2883 2885# 2885 2887# 2887 2889# 2889 2891# 2891 2893# 2893 2895# 2895
2897# 2897 2899# 2899 2901# 2901 2903# 2903 2905# 2905 2907# 2907 2909# 2909
2914# 2914 2916# 2916 2918# 2918 2920# 2920 2922# 2922 2924# 2924 2926# 2926
2928# 2928 2930# 2930 2935# 2935 2937# 2937 2939# 2939 2941# 2941 2943# 2943
2945# 2945 2947# 2947 2949# 2949 2951# 2951 3113# 3113 3115# 3115 3117# 3117
3119# 3119 3121# 3121 3123# 3123 3125# 3125 3127# 3127 3132# 3132 3134# 3134
3136# 3136 3138# 3138 3140# 3140 3142# 3142 3144# 3144 3146# 3146 3148# 3148
3153# 3153 3155# 3155 3157# 3157 3159# 3159 3161# 3161 3166# 3166 3171# 3171
3173# 3173 3175# 3175 3177# 3177 3179# 3179 3181# 3181 3183# 3183 3185# 3185
3187# 3187 3189# 3189 3191# 3191 3193# 3193 3195# 3195 3197# 3197 3199# 3199
3201# 3201 3203# 3203 3205# 3205 3207# 3207 3209# 3209 3214# 3214 3216# 3216
3218# 3218 3220# 3220 3222# 3222 3224# 3224 3226# 3226 3228# 3228 3230# 3230
3235# 3235 3237# 3237 3239# 3239 3241# 3241 3243# 3243 3245# 3245 3247# 3247
3249# 3249 3251# 3251 3413# 3413 3415# 3415 3417# 3417 3419# 3419 3421# 3421
3423# 3423 3425# 3425 3427# 3427 3429# 3429 3431# 3431 3436# 3436 3438# 3438
3440# 3440 3442# 3442 3444# 3444 3446# 3446 3448# 3448 3450# 3450 3452# 3452
3457# 3457 3459# 3459 3461# 3461 3463# 3463 3465# 3465 3470# 3470 3475# 3475
3477# 3477 3479# 3479 3481# 3481 3483# 3483 3485# 3485 3487# 3487 3489# 3489 SEQ 1976
3491# 3491 3493# 3493 3495# 3495 3497# 3497 3499# 3499 3501# 3501 3503# 3503
3505# 3505 3507# 3507 3509# 3509 3511# 3511 3513# 3513 3515# 3515 3517# 3517
3519# 3519 3521# 3521 3526# 3526 3528# 3528 3530# 3530 3532# 3532 3534# 3534
3536# 3536 3538# 3538 3540# 3540 3542# 3542 3547# 3547 3549# 3549 3551# 3551
3553# 3553 3555# 3555 3557# 3557 3559# 3559 3561# 3561 3563# 3563 3733# 3733
3735# 3735 3737# 3737 3739# 3739 3741# 3741 3743# 3743 3745# 3745 3747# 3747
3749# 3749 3751# 3751 3753# 3753 3755# 3755 3760# 3760 3762# 3762 3764# 3764
3766# 3766 3768# 3768 3770# 3770 3772# 3772 3774# 3774 3779# 3779 3781# 3781
3783# 3783 3785# 3785 3787# 3787 3792# 3792 3797# 3797 3799# 3799 3801# 3801
3803# 3803 3805# 3805 3807# 3807 3809# 3809 3811# 3811 3813# 3813 3815# 3815
3817# 3817 3819# 3819 3821# 3821 3823# 3823 3825# 3825 3827# 3827 3829# 3829
3831# 3831 3833# 3833 3835# 3835 3837# 3837 3839# 3839 3841# 3841 3843# 3843
3845# 3845 3847# 3847 3849# 3849 3851# 3851 3856# 3856 3858# 3858 3860# 3860
3862# 3862 3864# 3864 3866# 3866 3868# 3868 3870# 3870 3872# 3872 3877# 3877
3879# 3879 3881# 3881 3883# 3883 3885# 3885 3887# 3887 3889# 3889 3891# 3891
3893# 3893
%ADDR 141# 141 143 143# 145 145# 147 147# 149 149# 151 151# 153 153#
155 155# 157 157# 162# 162 164 164# 166 166# 168 168# 170 170#
172 172# 174 174# 176 176# 178 178# 183# 183 185 185# 187 187#
189 189# 191 191# 193 193# 195 195# 197 197# 199 199# 204# 204
206 206# 208 208# 210 210# 212 212# 214 214# 216 216# 218 218#
220 220# 359# 359 361 361# 363 363# 365 365# 367 367# 370 370#
375 375# 377 377# 379 379# 381 381# 386 386# 388 388# 390 390#
392 392# 397 397# 399 399# 405# 405 407 407# 409 409# 414# 414
416 416# 418 418# 423# 423 425 425# 427 427# 429 429# 431 431#
433 433# 435 435# 437 437# 439 439# 444# 444 446 446# 448 448#
450 450# 452 452# 454 454# 456 456# 458 458# 460 460# 550# 550
552 552# 554 554# 556 556# 558 558# 561# 561 563 563# 565 565#
567 567# 569 569# 571 571# 661# 661 663 663# 665 665# 667 667#
669 669# 672# 672 674 674# 676 676# 678 678# 680 680# 682 682#
799# 799 801 801# 803 803# 805 805# 807 807# 812 812# 814 814#
816 816# 818 818# 823 823# 825 825# 827 827# 829 829# 831 831#
836 836# 838 838# 840 840# 842 842# 847 847# 852# 852 854 854#
856 856# 858 858# 863# 863 865 865# 868 868# 873# 873 875 875#
877 877# 879 879# 881 881# 883 883# 885 885# 887 887# 889 889#
894# 894 896 896# 898 898# 900 900# 902 902# 904 904# 906 906#
908 908# 910 910# 1050# 1050 1052 1052# 1054 1054# 1056 1056# 1058 1058#
1060 1060# 1062 1062# 1067 1067# 1069 1069# 1071 1071# 1076 1076# 1078 1078#
1080 1080# 1087# 1087 1089 1089# 1091 1091# 1093 1093# 1095 1095# 1097 1097#
1102# 1102 1104 1104# 1109# 1109 1114# 1114 1116 1116# 1239# 1239 1241 1241#
1246 1246# 1248 1248# 1250 1250# 1252 1252# 1254 1254# 1256 1256# 1258 1258#
1260 1260# 1265 1265# 1267 1267# 1269 1269# 1274# 1274 1279# 1279 1281 1281#
1458# 1458 1460 1460# 1462 1462# 1464 1464# 1466 1466# 1468 1468# 1470 1470#
1472 1472# 1478 1478# 1480 1480# 1482 1482# 1487 1487# 1489 1489# 1491 1491#
1498# 1498 1500 1500# 1502 1502# 1504 1504# 1506 1506# 1508 1508# 1513# 1513
1515 1515# 1520# 1520 1525# 1525 1527 1527# 1661# 1661 1663 1663# 1666# 1666
1668 1668# 1878# 1878 1880 1880# 1882 1882# 1884 1884# 1886 1886# 1888 1888#
1890 1890# 1895# 1895 1897 1897# 1974# 1974 1976 1976# 1978 1978# 1981 1981#
1983 1983# 2212# 2212 2214# 2214 2216 2216# 2218 2218# 2220 2220# 2222 2222#
2227 2227# 2229 2229# 2231 2231# 2233 2233# 2235 2235# 2237 2237# 2239 2239#
2241 2241# 2246 2246# 2253# 2253 2255 2255# 2257 2257# 2259 2259# 2261 2261#
2263 2263# 2265 2265# 2267 2267# 2272# 2272 2277# 2277 2282# 2282 2284 2284#
2289# 2289 2291 2291# 2293 2293# 2295 2295# 2297 2297# 2299 2299# 2301 2301# SEQ 1977
2303 2303# 2305 2305# 2310# 2310 2312 2312# 2314 2314# 2316 2316# 2318 2318#
2320 2320# 2322 2322# 2324 2324# 2326 2326# 2541# 2541 2543# 2543 2545 2545#
2547 2547# 2549 2549# 2551 2551# 2556 2556# 2558 2558# 2560 2560# 2562 2562#
2564 2564# 2566 2566# 2568 2568# 2570 2570# 2575 2575# 2582# 2582 2584 2584#
2586 2586# 2588 2588# 2590 2590# 2592 2592# 2594 2594# 2596 2596# 2601# 2601
2606# 2606 2611# 2611 2613 2613# 2618# 2618 2620 2620# 2622 2622# 2624 2624#
2626 2626# 2628 2628# 2630 2630# 2632 2632# 2634 2634# 2639# 2639 2641 2641#
2643 2643# 2645 2645# 2647 2647# 2649 2649# 2651 2651# 2653 2653# 2655 2655#
2815# 2815 2817 2817# 2819 2819# 2821 2821# 2823 2823# 2825 2825# 2827 2827#
2829 2829# 2834# 2834 2836 2836# 2838 2838# 2840 2840# 2842 2842# 2844 2844#
2846 2846# 2848 2848# 2853# 2853 2855 2855# 2857 2857# 2859 2859# 2861 2861#
2866# 2866 2871# 2871 2873 2873# 2875 2875# 2877 2877# 2879 2879# 2881 2881#
2883 2883# 2885 2885# 2887 2887# 2889 2889# 2891 2891# 2893 2893# 2895 2895#
2897 2897# 2899 2899# 2901 2901# 2903 2903# 2905 2905# 2907 2907# 2909# 2909
2914# 2914 2916 2916# 2918 2918# 2920 2920# 2922 2922# 2924 2924# 2926 2926#
2928 2928# 2930 2930# 2935# 2935 2937 2937# 2939 2939# 2941 2941# 2943 2943#
2945 2945# 2947 2947# 2949 2949# 2951 2951# 3113# 3113 3115 3115# 3117 3117#
3119 3119# 3121 3121# 3123 3123# 3125 3125# 3127 3127# 3132# 3132 3134 3134#
3136 3136# 3138 3138# 3140 3140# 3142 3142# 3144 3144# 3146 3146# 3148 3148#
3153# 3153 3155 3155# 3157 3157# 3159 3159# 3161 3161# 3166# 3166 3171# 3171
3173 3173# 3175 3175# 3177 3177# 3179 3179# 3181 3181# 3183 3183# 3185 3185#
3187 3187# 3189 3189# 3191 3191# 3193 3193# 3195 3195# 3197 3197# 3199 3199#
3201 3201# 3203 3203# 3205 3205# 3207 3207# 3209# 3209 3214# 3214 3216 3216#
3218 3218# 3220 3220# 3222 3222# 3224 3224# 3226 3226# 3228 3228# 3230 3230#
3235# 3235 3237 3237# 3239 3239# 3241 3241# 3243 3243# 3245 3245# 3247 3247#
3249 3249# 3251 3251# 3413# 3413 3415 3415# 3417 3417# 3419 3419# 3421 3421#
3423 3423# 3425 3425# 3427 3427# 3429 3429# 3431 3431# 3436# 3436 3438 3438#
3440 3440# 3442 3442# 3444 3444# 3446 3446# 3448 3448# 3450 3450# 3452 3452#
3457# 3457 3459 3459# 3461 3461# 3463 3463# 3465 3465# 3470# 3470 3475# 3475
3477 3477# 3479 3479# 3481 3481# 3483 3483# 3485 3485# 3487 3487# 3489 3489#
3491 3491# 3493 3493# 3495 3495# 3497 3497# 3499 3499# 3501 3501# 3503 3503#
3505 3505# 3507 3507# 3509 3509# 3511 3511# 3513 3513# 3515 3515# 3517 3517#
3519 3519# 3521# 3521 3526# 3526 3528 3528# 3530 3530# 3532 3532# 3534 3534#
3536 3536# 3538 3538# 3540 3540# 3542 3542# 3547# 3547 3549 3549# 3551 3551#
3553 3553# 3555 3555# 3557 3557# 3559 3559# 3561 3561# 3563 3563# 3733# 3733
3735 3735# 3737 3737# 3739 3739# 3741 3741# 3743 3743# 3745 3745# 3747 3747#
3749 3749# 3751 3751# 3753 3753# 3755 3755# 3760# 3760 3762 3762# 3764 3764#
3766 3766# 3768 3768# 3770 3770# 3772 3772# 3774 3774# 3779# 3779 3781 3781#
3783 3783# 3785 3785# 3787 3787# 3792# 3792 3797# 3797 3799 3799# 3801 3801#
3803 3803# 3805 3805# 3807 3807# 3809 3809# 3811 3811# 3813 3813# 3815 3815#
3817 3817# 3819 3819# 3821 3821# 3823 3823# 3825 3825# 3827 3827# 3829 3829#
3831 3831# 3833 3833# 3835 3835# 3837 3837# 3839 3839# 3841 3841# 3843 3843#
3845 3845# 3847 3847# 3849 3849# 3851# 3851 3856# 3856 3858 3858# 3860 3860#
3862 3862# 3864 3864# 3866 3866# 3868 3868# 3870 3870# 3872 3872# 3877# 3877
3879 3879# 3881 3881# 3883 3883# 3885 3885# 3887 3887# 3889 3889# 3891 3891#
3893 3893#
%ML 141# 141 143# 143 145# 145 147# 147 149# 149 151# 151 153# 153
155# 155 157# 157 162# 162 164# 164 166# 166 168# 168 170# 170
172# 172 174# 174 176# 176 178# 178 183# 183 185# 185 187# 187
189# 189 191# 191 193# 193 195# 195 197# 197 199# 199 204# 204
206# 206 208# 208 210# 210 212# 212 214# 214 216# 216 218# 218
220# 220 359# 359 361# 361 363# 363 365# 365 367# 367 370# 370
375# 375 377# 377 379# 379 381# 381 386# 386 388# 388 390# 390 SEQ 1978
392# 392 397# 397 399# 399 405# 405 407# 407 409# 409 414# 414
416# 416 418# 418 423# 423 425# 425 427# 427 429# 429 431# 431
433# 433 435# 435 437# 437 439# 439 444# 444 446# 446 448# 448
450# 450 452# 452 454# 454 456# 456 458# 458 460# 460 550# 550
552# 552 554# 554 556# 556 558# 558 561# 561 563# 563 565# 565
567# 567 569# 569 571# 571 661# 661 663# 663 665# 665 667# 667
669# 669 672# 672 674# 674 676# 676 678# 678 680# 680 682# 682
799# 799 801# 801 803# 803 805# 805 807# 807 812# 812 814# 814
816# 816 818# 818 823# 823 825# 825 827# 827 829# 829 831# 831
836# 836 838# 838 840# 840 842# 842 847# 847 852# 852 854# 854
856# 856 858# 858 863# 863 865# 865 868# 868 873# 873 875# 875
877# 877 879# 879 881# 881 883# 883 885# 885 887# 887 889# 889
894# 894 896# 896 898# 898 900# 900 902# 902 904# 904 906# 906
908# 908 910# 910 1050# 1050 1052# 1052 1054# 1054 1056# 1056 1058# 1058
1060# 1060 1062# 1062 1067# 1067 1069# 1069 1071# 1071 1076# 1076 1078# 1078
1080# 1080 1087# 1087 1089# 1089 1091# 1091 1093# 1093 1095# 1095 1097# 1097
1102# 1102 1104# 1104 1109# 1109 1114# 1114 1116# 1116 1239# 1239 1241# 1241
1246# 1246 1248# 1248 1250# 1250 1252# 1252 1254# 1254 1256# 1256 1258# 1258
1260# 1260 1265# 1265 1267# 1267 1269# 1269 1274# 1274 1279# 1279 1281# 1281
1458# 1458 1460# 1460 1462# 1462 1464# 1464 1466# 1466 1468# 1468 1470# 1470
1472# 1472 1478# 1478 1480# 1480 1482# 1482 1487# 1487 1489# 1489 1491# 1491
1498# 1498 1500# 1500 1502# 1502 1504# 1504 1506# 1506 1508# 1508 1513# 1513
1515# 1515 1520# 1520 1525# 1525 1527# 1527 1661# 1661 1663# 1663 1666# 1666
1668# 1668 1878# 1878 1880# 1880 1882# 1882 1884# 1884 1886# 1886 1888# 1888
1890# 1890 1895# 1895 1897# 1897 1974# 1974 1976# 1976 1978# 1978 1981# 1981
1983# 1983 2212# 2212 2214# 2214 2216# 2216 2218# 2218 2220# 2220 2222# 2222
2227# 2227 2229# 2229 2231# 2231 2233# 2233 2235# 2235 2237# 2237 2239# 2239
2241# 2241 2246# 2246 2253# 2253 2255# 2255 2257# 2257 2259# 2259 2261# 2261
2263# 2263 2265# 2265 2267# 2267 2272# 2272 2277# 2277 2282# 2282 2284# 2284
2289# 2289 2291# 2291 2293# 2293 2295# 2295 2297# 2297 2299# 2299 2301# 2301
2303# 2303 2305# 2305 2310# 2310 2312# 2312 2314# 2314 2316# 2316 2318# 2318
2320# 2320 2322# 2322 2324# 2324 2326# 2326 2541# 2541 2543# 2543 2545# 2545
2547# 2547 2549# 2549 2551# 2551 2556# 2556 2558# 2558 2560# 2560 2562# 2562
2564# 2564 2566# 2566 2568# 2568 2570# 2570 2575# 2575 2582# 2582 2584# 2584
2586# 2586 2588# 2588 2590# 2590 2592# 2592 2594# 2594 2596# 2596 2601# 2601
2606# 2606 2611# 2611 2613# 2613 2618# 2618 2620# 2620 2622# 2622 2624# 2624
2626# 2626 2628# 2628 2630# 2630 2632# 2632 2634# 2634 2639# 2639 2641# 2641
2643# 2643 2645# 2645 2647# 2647 2649# 2649 2651# 2651 2653# 2653 2655# 2655
2815# 2815 2817# 2817 2819# 2819 2821# 2821 2823# 2823 2825# 2825 2827# 2827
2829# 2829 2834# 2834 2836# 2836 2838# 2838 2840# 2840 2842# 2842 2844# 2844
2846# 2846 2848# 2848 2853# 2853 2855# 2855 2857# 2857 2859# 2859 2861# 2861
2866# 2866 2871# 2871 2873# 2873 2875# 2875 2877# 2877 2879# 2879 2881# 2881
2883# 2883 2885# 2885 2887# 2887 2889# 2889 2891# 2891 2893# 2893 2895# 2895
2897# 2897 2899# 2899 2901# 2901 2903# 2903 2905# 2905 2907# 2907 2909# 2909
2914# 2914 2916# 2916 2918# 2918 2920# 2920 2922# 2922 2924# 2924 2926# 2926
2928# 2928 2930# 2930 2935# 2935 2937# 2937 2939# 2939 2941# 2941 2943# 2943
2945# 2945 2947# 2947 2949# 2949 2951# 2951 3113# 3113 3115# 3115 3117# 3117
3119# 3119 3121# 3121 3123# 3123 3125# 3125 3127# 3127 3132# 3132 3134# 3134
3136# 3136 3138# 3138 3140# 3140 3142# 3142 3144# 3144 3146# 3146 3148# 3148
3153# 3153 3155# 3155 3157# 3157 3159# 3159 3161# 3161 3166# 3166 3171# 3171
3173# 3173 3175# 3175 3177# 3177 3179# 3179 3181# 3181 3183# 3183 3185# 3185
3187# 3187 3189# 3189 3191# 3191 3193# 3193 3195# 3195 3197# 3197 3199# 3199
3201# 3201 3203# 3203 3205# 3205 3207# 3207 3209# 3209 3214# 3214 3216# 3216 SEQ 1979
3218# 3218 3220# 3220 3222# 3222 3224# 3224 3226# 3226 3228# 3228 3230# 3230
3235# 3235 3237# 3237 3239# 3239 3241# 3241 3243# 3243 3245# 3245 3247# 3247
3249# 3249 3251# 3251 3413# 3413 3415# 3415 3417# 3417 3419# 3419 3421# 3421
3423# 3423 3425# 3425 3427# 3427 3429# 3429 3431# 3431 3436# 3436 3438# 3438
3440# 3440 3442# 3442 3444# 3444 3446# 3446 3448# 3448 3450# 3450 3452# 3452
3457# 3457 3459# 3459 3461# 3461 3463# 3463 3465# 3465 3470# 3470 3475# 3475
3477# 3477 3479# 3479 3481# 3481 3483# 3483 3485# 3485 3487# 3487 3489# 3489
3491# 3491 3493# 3493 3495# 3495 3497# 3497 3499# 3499 3501# 3501 3503# 3503
3505# 3505 3507# 3507 3509# 3509 3511# 3511 3513# 3513 3515# 3515 3517# 3517
3519# 3519 3521# 3521 3526# 3526 3528# 3528 3530# 3530 3532# 3532 3534# 3534
3536# 3536 3538# 3538 3540# 3540 3542# 3542 3547# 3547 3549# 3549 3551# 3551
3553# 3553 3555# 3555 3557# 3557 3559# 3559 3561# 3561 3563# 3563 3733# 3733
3735# 3735 3737# 3737 3739# 3739 3741# 3741 3743# 3743 3745# 3745 3747# 3747
3749# 3749 3751# 3751 3753# 3753 3755# 3755 3760# 3760 3762# 3762 3764# 3764
3766# 3766 3768# 3768 3770# 3770 3772# 3772 3774# 3774 3779# 3779 3781# 3781
3783# 3783 3785# 3785 3787# 3787 3792# 3792 3797# 3797 3799# 3799 3801# 3801
3803# 3803 3805# 3805 3807# 3807 3809# 3809 3811# 3811 3813# 3813 3815# 3815
3817# 3817 3819# 3819 3821# 3821 3823# 3823 3825# 3825 3827# 3827 3829# 3829
3831# 3831 3833# 3833 3835# 3835 3837# 3837 3839# 3839 3841# 3841 3843# 3843
3845# 3845 3847# 3847 3849# 3849 3851# 3851 3856# 3856 3858# 3858 3860# 3860
3862# 3862 3864# 3864 3866# 3866 3868# 3868 3870# 3870 3872# 3872 3877# 3877
3879# 3879 3881# 3881 3883# 3883 3885# 3885 3887# 3887 3889# 3889 3891# 3891
3893# 3893
%MR 141# 141 143# 143 145# 145 147# 147 149# 149 151# 151 153# 153
155# 155 157# 157 162# 162 164# 164 166# 166 168# 168 170# 170
172# 172 174# 174 176# 176 178# 178 183# 183 185# 185 187# 187
189# 189 191# 191 193# 193 195# 195 197# 197 199# 199 204# 204
206# 206 208# 208 210# 210 212# 212 214# 214 216# 216 218# 218
220# 220 359# 359 361# 361 363# 363 365# 365 367# 367 370# 370
375# 375 377# 377 379# 379 381# 381 386# 386 388# 388 390# 390
392# 392 397# 397 399# 399 405# 405 407# 407 409# 409 414# 414
416# 416 418# 418 423# 423 425# 425 427# 427 429# 429 431# 431
433# 433 435# 435 437# 437 439# 439 444# 444 446# 446 448# 448
450# 450 452# 452 454# 454 456# 456 458# 458 460# 460 550# 550
552# 552 554# 554 556# 556 558# 558 561# 561 563# 563 565# 565
567# 567 569# 569 571# 571 661# 661 663# 663 665# 665 667# 667
669# 669 672# 672 674# 674 676# 676 678# 678 680# 680 682# 682
799# 799 801# 801 803# 803 805# 805 807# 807 812# 812 814# 814
816# 816 818# 818 823# 823 825# 825 827# 827 829# 829 831# 831
836# 836 838# 838 840# 840 842# 842 847# 847 852# 852 854# 854
856# 856 858# 858 863# 863 865# 865 868# 868 873# 873 875# 875
877# 877 879# 879 881# 881 883# 883 885# 885 887# 887 889# 889
894# 894 896# 896 898# 898 900# 900 902# 902 904# 904 906# 906
908# 908 910# 910 1050# 1050 1052# 1052 1054# 1054 1056# 1056 1058# 1058
1060# 1060 1062# 1062 1067# 1067 1069# 1069 1071# 1071 1076# 1076 1078# 1078
1080# 1080 1087# 1087 1089# 1089 1091# 1091 1093# 1093 1095# 1095 1097# 1097
1102# 1102 1104# 1104 1109# 1109 1114# 1114 1116# 1116 1239# 1239 1241# 1241
1246# 1246 1248# 1248 1250# 1250 1252# 1252 1254# 1254 1256# 1256 1258# 1258
1260# 1260 1265# 1265 1267# 1267 1269# 1269 1274# 1274 1279# 1279 1281# 1281
1458# 1458 1460# 1460 1462# 1462 1464# 1464 1466# 1466 1468# 1468 1470# 1470
1472# 1472 1478# 1478 1480# 1480 1482# 1482 1487# 1487 1489# 1489 1491# 1491
1498# 1498 1500# 1500 1502# 1502 1504# 1504 1506# 1506 1508# 1508 1513# 1513
1515# 1515 1520# 1520 1525# 1525 1527# 1527 1661# 1661 1663# 1663 1666# 1666 SEQ 1980
1668# 1668 1878# 1878 1880# 1880 1882# 1882 1884# 1884 1886# 1886 1888# 1888
1890# 1890 1895# 1895 1897# 1897 1974# 1974 1976# 1976 1978# 1978 1981# 1981
1983# 1983 2212# 2212 2214# 2214 2216# 2216 2218# 2218 2220# 2220 2222# 2222
2227# 2227 2229# 2229 2231# 2231 2233# 2233 2235# 2235 2237# 2237 2239# 2239
2241# 2241 2246# 2246 2253# 2253 2255# 2255 2257# 2257 2259# 2259 2261# 2261
2263# 2263 2265# 2265 2267# 2267 2272# 2272 2277# 2277 2282# 2282 2284# 2284
2289# 2289 2291# 2291 2293# 2293 2295# 2295 2297# 2297 2299# 2299 2301# 2301
2303# 2303 2305# 2305 2310# 2310 2312# 2312 2314# 2314 2316# 2316 2318# 2318
2320# 2320 2322# 2322 2324# 2324 2326# 2326 2541# 2541 2543# 2543 2545# 2545
2547# 2547 2549# 2549 2551# 2551 2556# 2556 2558# 2558 2560# 2560 2562# 2562
2564# 2564 2566# 2566 2568# 2568 2570# 2570 2575# 2575 2582# 2582 2584# 2584
2586# 2586 2588# 2588 2590# 2590 2592# 2592 2594# 2594 2596# 2596 2601# 2601
2606# 2606 2611# 2611 2613# 2613 2618# 2618 2620# 2620 2622# 2622 2624# 2624
2626# 2626 2628# 2628 2630# 2630 2632# 2632 2634# 2634 2639# 2639 2641# 2641
2643# 2643 2645# 2645 2647# 2647 2649# 2649 2651# 2651 2653# 2653 2655# 2655
2815# 2815 2817# 2817 2819# 2819 2821# 2821 2823# 2823 2825# 2825 2827# 2827
2829# 2829 2834# 2834 2836# 2836 2838# 2838 2840# 2840 2842# 2842 2844# 2844
2846# 2846 2848# 2848 2853# 2853 2855# 2855 2857# 2857 2859# 2859 2861# 2861
2866# 2866 2871# 2871 2873# 2873 2875# 2875 2877# 2877 2879# 2879 2881# 2881
2883# 2883 2885# 2885 2887# 2887 2889# 2889 2891# 2891 2893# 2893 2895# 2895
2897# 2897 2899# 2899 2901# 2901 2903# 2903 2905# 2905 2907# 2907 2909# 2909
2914# 2914 2916# 2916 2918# 2918 2920# 2920 2922# 2922 2924# 2924 2926# 2926
2928# 2928 2930# 2930 2935# 2935 2937# 2937 2939# 2939 2941# 2941 2943# 2943
2945# 2945 2947# 2947 2949# 2949 2951# 2951 3113# 3113 3115# 3115 3117# 3117
3119# 3119 3121# 3121 3123# 3123 3125# 3125 3127# 3127 3132# 3132 3134# 3134
3136# 3136 3138# 3138 3140# 3140 3142# 3142 3144# 3144 3146# 3146 3148# 3148
3153# 3153 3155# 3155 3157# 3157 3159# 3159 3161# 3161 3166# 3166 3171# 3171
3173# 3173 3175# 3175 3177# 3177 3179# 3179 3181# 3181 3183# 3183 3185# 3185
3187# 3187 3189# 3189 3191# 3191 3193# 3193 3195# 3195 3197# 3197 3199# 3199
3201# 3201 3203# 3203 3205# 3205 3207# 3207 3209# 3209 3214# 3214 3216# 3216
3218# 3218 3220# 3220 3222# 3222 3224# 3224 3226# 3226 3228# 3228 3230# 3230
3235# 3235 3237# 3237 3239# 3239 3241# 3241 3243# 3243 3245# 3245 3247# 3247
3249# 3249 3251# 3251 3413# 3413 3415# 3415 3417# 3417 3419# 3419 3421# 3421
3423# 3423 3425# 3425 3427# 3427 3429# 3429 3431# 3431 3436# 3436 3438# 3438
3440# 3440 3442# 3442 3444# 3444 3446# 3446 3448# 3448 3450# 3450 3452# 3452
3457# 3457 3459# 3459 3461# 3461 3463# 3463 3465# 3465 3470# 3470 3475# 3475
3477# 3477 3479# 3479 3481# 3481 3483# 3483 3485# 3485 3487# 3487 3489# 3489
3491# 3491 3493# 3493 3495# 3495 3497# 3497 3499# 3499 3501# 3501 3503# 3503
3505# 3505 3507# 3507 3509# 3509 3511# 3511 3513# 3513 3515# 3515 3517# 3517
3519# 3519 3521# 3521 3526# 3526 3528# 3528 3530# 3530 3532# 3532 3534# 3534
3536# 3536 3538# 3538 3540# 3540 3542# 3542 3547# 3547 3549# 3549 3551# 3551
3553# 3553 3555# 3555 3557# 3557 3559# 3559 3561# 3561 3563# 3563 3733# 3733
3735# 3735 3737# 3737 3739# 3739 3741# 3741 3743# 3743 3745# 3745 3747# 3747
3749# 3749 3751# 3751 3753# 3753 3755# 3755 3760# 3760 3762# 3762 3764# 3764
3766# 3766 3768# 3768 3770# 3770 3772# 3772 3774# 3774 3779# 3779 3781# 3781
3783# 3783 3785# 3785 3787# 3787 3792# 3792 3797# 3797 3799# 3799 3801# 3801
3803# 3803 3805# 3805 3807# 3807 3809# 3809 3811# 3811 3813# 3813 3815# 3815
3817# 3817 3819# 3819 3821# 3821 3823# 3823 3825# 3825 3827# 3827 3829# 3829
3831# 3831 3833# 3833 3835# 3835 3837# 3837 3839# 3839 3841# 3841 3843# 3843
3845# 3845 3847# 3847 3849# 3849 3851# 3851 3856# 3856 3858# 3858 3860# 3860
3862# 3862 3864# 3864 3866# 3866 3868# 3868 3870# 3870 3872# 3872 3877# 3877
3879# 3879 3881# 3881 3883# 3883 3885# 3885 3887# 3887 3889# 3889 3891# 3891
3893# 3893 SEQ 1981
.LA 155 176 189 191 197 199 210 212 218 220 370 375 379 390
414 416 418 429 431 437 450 452 458 558 571 669 682 801
805 812 816 825 829 836 840 879 881 887 900 902 908 1069
1078 1102 1241 1252 1267 1480 1489 1513 2229 2239 2272 2277 2295 2297
2303 2316 2318 2324 2558 2568 2601 2606 2624 2626 2632 2645 2647 2653
2836 2840 2877 2881 2885 2889 2893 2897 2901 2905 2920 2922 2928 2941
2943 2949 3134 3140 3177 3181 3185 3189 3193 3197 3201 3205 3220 3222
3228 3241 3243 3249 3438 3444 3481 3485 3489 3493 3497 3501 3505 3509
3513 3517 3532 3534 3540 3553 3555 3561 3762 3766 3803 3807 3811 3815
3819 3823 3827 3831 3835 3839 3843 3847 3862 3864 3870 3883 3885 3891
.LADDR 141 162 183 204 359 405 414 423 444 550 561 661 672 799
852 863 873 894 1050 1087 1102 1109 1114 1239 1274 1279 1458 1498
1513 1520 1525 1661 1666 1878 1895 1974 2212 2214 2253 2272 2277 2282
2289 2310 2541 2543 2582 2601 2606 2611 2618 2639 2815 2834 2853 2866
2871 2909 2914 2935 3113 3132 3153 3166 3171 3209 3214 3235 3413 3436
3457 3470 3475 3521 3526 3547 3733 3760 3779 3792 3797 3851 3856 3877
.LAND 183 204 361 405 407 423 444 550 561 661 672 799 873 894
1050 1239 1458 1661 1666 1983 2218 2289 2310 2547 2618 2639 2914 2935
3214 3235 3526 3547 3856 3877
.LB 147 153 155 168 174 176 183 185 189 204 206 210 359 361
363 365 367 375 377 379 386 388 390 405 407 409 423 425
429 444 446 450 556 569 667 680 799 803 814 823 827 838
873 875 879 894 896 900 1050 1095 1097 1239 1241 1254 1256 1258
1458 1506 1508 1886 2218 2239 2265 2289 2291 2295 2310 2312 2316 2547
2568 2594 2618 2620 2624 2639 2641 2645 2815 2817 2819 2821 2823 2825
2827 2829 2861 2914 2916 2920 2935 2937 2941 3113 3115 3117 3119 3121
3123 3125 3127 3161 3214 3216 3220 3235 3237 3241 3413 3415 3417 3419
3421 3423 3425 3427 3429 3431 3465 3526 3528 3532 3547 3549 3553 3733
3735 3737 3739 3741 3743 3745 3747 3749 3751 3753 3755 3787 3856 3858
3862 3877 3879 3883
.LCCCA 854 1089 1248 1500 1880 2259 2588 2855 3155 3459 3781
.LCCCP 1058 1466
.LCCFZ 155 176 379 390 805 816 829 840 1258
.LCCGC 193 214 433 454 883 904 2299 2320 2628 2649 2924 2945 3224 3245
3536 3557 3866 3887
.LCCLW 1060 1470 2239 2568
.LCCMB 2229 2558 2840 3140 3444 3766
.LCCMP 2231 2235 2560 2564 2842 2846 3142 3146 3446 3450 3768 3772
.LCENA 155 176 193 214 379 390 433 454 805 816 829 840 854 883
904 1058 1060 1089 1248 1258 1466 1470 1500 1880 2229 2231 2235 2239
2259 2299 2320 2558 2560 2564 2568 2588 2628 2649 2840 2842 2846 2855
2924 2945 3140 3142 3146 3155 3224 3245 3444 3446 3450 3459 3536 3557
3766 3768 3772 3781 3866 3887
.LCJP 155 176 193 214 379 390 433 454 805 816 829 840 854 883
904 1058 1060 1089 1248 1258 1466 1470 1500 1880 2229 2231 2235 2239
2259 2299 2320 2558 2560 2564 2568 2588 2628 2649 2840 2842 2846 2855
2924 2945 3140 3142 3146 3155 3224 3245 3444 3446 3450 3459 3536 3557
3766 3768 3772 3781 3866 3887
.LCJS 799 823 1052 1056 1460 1464 2220 2227 2549 2556 2875 2879 2883 2887
2891 2895 2899 2903 3175 3179 3183 3187 3191 3195 3199 3203 3479 3483
3487 3491 3495 3499 3503 3507 3511 3515 3801 3805 3809 3813 3817 3821
3825 3829 3833 3837 3841 3845
.LCONT 147 149 151 153 168 170 172 174 183 185 191 197 204 206 SEQ 1982
212 218 363 370 375 377 386 388 407 423 425 431 437 444
446 452 458 552 554 556 563 565 567 569 663 665 667 674
676 678 680 801 803 812 814 825 827 836 838 852 873 875
881 887 894 896 902 908 1067 1069 1076 1078 1087 1093 1095 1241
1246 1252 1254 1256 1265 1478 1480 1487 1489 1498 1504 1506 1884 1886
1888 1976 2218 2253 2263 2265 2289 2291 2297 2303 2310 2312 2318 2324
2547 2582 2592 2594 2618 2620 2626 2632 2639 2641 2647 2653 2834 2836
2838 2859 2873 2877 2881 2885 2889 2893 2897 2901 2905 2914 2916 2922
2928 2935 2937 2943 2949 3132 3134 3136 3138 3159 3173 3177 3181 3185
3189 3193 3197 3201 3205 3214 3216 3222 3228 3235 3237 3243 3249 3436
3438 3440 3442 3463 3477 3481 3485 3489 3493 3497 3501 3505 3509 3513
3517 3526 3528 3534 3540 3547 3549 3555 3561 3760 3762 3764 3785 3799
3803 3807 3811 3815 3819 3823 3827 3831 3835 3839 3843 3847 3856 3858
3864 3870 3877 3879 3885 3891
.LCRTN 858 1097 1508 2267 2596 2861 3161 3465 3787
.LCRY 155 176 185 206 363 367 379 390 409 425 446 875 896 1097
1241 1254 1508 1663 1668 2239 2291 2312 2568 2620 2641 2916 2937 3216
3237 3528 3549 3858 3879
.LD 141 143 145 147 149 151 153 155 157 162 164 166 168 170
172 174 176 178 183 185 189 191 193 195 197 199 204 206
210 212 214 216 218 220 359 361 363 365 367 370 375 377
381 386 388 392 397 399 405 407 409 414 416 418 423 425
429 431 433 435 437 439 444 446 450 452 454 456 458 460
550 552 554 556 558 561 563 565 567 569 571 661 663 665
667 669 672 674 676 678 680 682 799 801 803 805 807 812
814 816 818 823 825 827 829 831 836 838 840 842 847 852
854 856 858 873 875 879 881 883 885 887 889 894 896 900
902 904 906 908 910 1050 1052 1054 1056 1058 1060 1069 1078 1087
1089 1091 1093 1095 1097 1102 1239 1241 1246 1248 1250 1252 1254 1256
1258 1267 1458 1460 1462 1464 1466 1468 1470 1480 1489 1498 1500 1502
1504 1506 1508 1513 1661 1663 1666 1668 1880 1882 1884 1886 1974 1976
1978 1983 2218 2220 2227 2229 2231 2233 2235 2237 2239 2253 2255 2257
2259 2261 2263 2265 2267 2272 2277 2289 2291 2295 2297 2299 2301 2303
2305 2310 2312 2316 2318 2320 2322 2324 2326 2547 2549 2556 2558 2560
2562 2564 2566 2568 2582 2584 2586 2588 2590 2592 2594 2596 2601 2606
2618 2620 2624 2626 2628 2630 2632 2634 2639 2641 2645 2647 2649 2651
2653 2655 2815 2817 2819 2821 2823 2825 2827 2829 2834 2836 2838 2840
2842 2844 2846 2848 2853 2855 2857 2859 2861 2875 2877 2879 2881 2883
2885 2887 2889 2891 2893 2895 2897 2899 2901 2903 2905 2914 2916 2920
2922 2924 2926 2928 2930 2935 2937 2941 2943 2945 2947 2949 2951 3113
3115 3117 3119 3121 3123 3125 3127 3132 3134 3136 3138 3140 3142 3144
3146 3148 3153 3155 3157 3159 3161 3175 3177 3179 3181 3183 3185 3187
3189 3191 3193 3195 3197 3199 3201 3203 3205 3214 3216 3220 3222 3224
3226 3228 3230 3235 3237 3241 3243 3245 3247 3249 3251 3413 3415 3417
3419 3421 3423 3425 3427 3429 3431 3436 3438 3440 3442 3444 3446 3448
3450 3452 3457 3459 3461 3463 3465 3479 3481 3483 3485 3487 3489 3491
3493 3495 3497 3499 3501 3503 3505 3507 3509 3511 3513 3515 3517 3526
3528 3532 3534 3536 3538 3540 3542 3547 3549 3553 3555 3557 3559 3561
3563 3733 3735 3737 3739 3741 3743 3745 3747 3749 3751 3753 3755 3760
3762 3764 3766 3768 3770 3772 3774 3779 3781 3783 3785 3787 3801 3803
3805 3807 3809 3811 3813 3815 3817 3819 3821 3823 3825 3827 3829 3831
3833 3835 3837 3839 3841 3843 3845 3847 3856 3858 3862 3864 3866 3868
3870 3872 3877 3879 3883 3885 3887 3889 3891 3893 SEQ 1983
.LJ 141 143 145 155 157 162 164 166 176 178 187 189 193 195
199 208 210 214 216 220 359 361 365 367 379 381 390 392
397 399 405 409 414 416 418 427 429 433 435 439 448 450
454 456 460 550 558 561 571 661 669 672 682 799 805 807
816 818 823 829 831 840 842 847 854 856 863 865 877 879
883 885 889 898 900 904 906 910 1050 1052 1054 1056 1058 1060
1062 1071 1080 1089 1091 1102 1104 1114 1116 1239 1248 1250 1258 1260
1267 1269 1279 1281 1458 1460 1462 1464 1466 1468 1470 1472 1482 1491
1500 1502 1513 1515 1525 1527 1661 1663 1666 1668 1878 1880 1882 1890
1895 1897 1974 1978 1981 1983 2214 2216 2220 2222 2227 2229 2231 2233
2235 2237 2239 2241 2246 2255 2257 2259 2261 2272 2277 2282 2284 2293
2295 2299 2301 2305 2314 2316 2320 2322 2326 2543 2545 2549 2551 2556
2558 2560 2562 2564 2566 2568 2570 2575 2584 2586 2588 2590 2601 2606
2611 2613 2622 2624 2628 2630 2634 2643 2645 2649 2651 2655 2815 2817
2819 2821 2823 2825 2827 2829 2840 2842 2844 2846 2848 2853 2855 2857
2871 2875 2879 2883 2887 2891 2895 2899 2903 2918 2920 2924 2926 2930
2939 2941 2945 2947 2951 3113 3115 3117 3119 3121 3123 3125 3127 3140
3142 3144 3146 3148 3153 3155 3157 3171 3175 3179 3183 3187 3191 3195
3199 3203 3218 3220 3224 3226 3230 3239 3241 3245 3247 3251 3413 3415
3417 3419 3421 3423 3425 3427 3429 3431 3444 3446 3448 3450 3452 3457
3459 3461 3475 3479 3483 3487 3491 3495 3499 3503 3507 3511 3515 3530
3532 3536 3538 3542 3551 3553 3557 3559 3563 3733 3735 3737 3739 3741
3743 3745 3747 3749 3751 3753 3755 3766 3768 3770 3772 3774 3779 3781
3783 3797 3801 3805 3809 3813 3817 3821 3825 3829 3833 3837 3841 3845
3860 3862 3866 3868 3872 3881 3883 3887 3889 3893
.LJMAP 141 157 162 178 195 199 216 220 359 381 392 399 405 409
414 416 418 435 439 456 460 550 558 561 571 661 669 672
682 807 818 831 842 847 856 863 865 885 889 906 910 1050
1054 1062 1071 1080 1091 1102 1104 1114 1116 1239 1250 1260 1267 1269
1279 1281 1458 1462 1468 1472 1482 1491 1502 1513 1515 1525 1527 1661
1663 1666 1668 1878 1882 1890 1895 1897 1974 1978 1981 1983 2222 2233
2237 2241 2246 2261 2272 2277 2282 2284 2301 2305 2322 2326 2551 2562
2566 2570 2575 2590 2601 2606 2611 2613 2630 2634 2651 2655 2815 2817
2819 2821 2823 2825 2827 2829 2844 2848 2853 2857 2871 2926 2930 2947
2951 3113 3115 3117 3119 3121 3123 3125 3127 3144 3148 3153 3157 3171
3226 3230 3247 3251 3413 3415 3417 3419 3421 3423 3425 3427 3429 3431
3448 3452 3457 3461 3475 3538 3542 3559 3563 3733 3735 3737 3739 3741
3743 3745 3747 3749 3751 3753 3755 3770 3774 3779 3783 3797 3868 3872
3889 3893
.LJZ 868 1109 1274 1520 2212 2541 2866 2907 2909 3166 3207 3209 3470 3519
3521 3792 3849 3851
.LLDCT 143 164 187 208 361 367 427 448 877 898 2214 2255 2293 2314
2543 2584 2622 2643 2918 2939 3218 3239 3530 3551 3860 3881
.LLDLM 370 2877 2881 2885 2889 2893 2897 2901 2905 3177 3181 3185 3189 3193
3197 3201 3205 3481 3485 3489 3493 3497 3501 3505 3509 3513 3517 3803
3807 3811 3815 3819 3823 3827 3831 3835 3839 3843 3847
.LMGC 143 147 149 151 153 164 168 170 172 174 191 193 197 199
212 214 218 220 359 370 375 377 386 388 414 416 418 431
433 437 452 454 458 550 552 554 556 558 563 565 567 569
571 661 663 665 667 669 674 676 678 680 682 801 803 812
814 825 827 836 838 852 863 865 881 883 887 902 904 908
1067 1069 1076 1078 1087 1093 1095 1102 1109 1114 1116 1246 1252 1254
1265 1267 1274 1279 1281 1478 1480 1487 1489 1498 1504 1506 1513 1520 SEQ 1984
1525 1527 1663 1668 1878 1884 1886 1888 1895 1897 1974 1976 1978 1981
1983 2212 2246 2253 2263 2265 2272 2277 2282 2284 2297 2299 2303 2318
2320 2324 2541 2575 2582 2592 2594 2601 2606 2611 2613 2626 2628 2632
2647 2649 2653 2815 2817 2819 2821 2823 2825 2827 2829 2834 2836 2838
2853 2859 2861 2866 2871 2873 2877 2881 2885 2889 2893 2897 2901 2905
2922 2924 2928 2943 2945 2949 3113 3115 3117 3119 3121 3123 3125 3127
3132 3134 3136 3138 3153 3159 3161 3166 3171 3173 3177 3181 3185 3189
3193 3197 3201 3205 3222 3224 3228 3243 3245 3249 3413 3415 3417 3419
3421 3423 3425 3427 3429 3431 3436 3438 3440 3442 3457 3463 3465 3470
3475 3477 3481 3485 3489 3493 3497 3501 3505 3509 3513 3517 3534 3536
3540 3555 3557 3561 3733 3735 3737 3739 3741 3743 3745 3747 3749 3751
3753 3755 3760 3762 3764 3779 3785 3787 3792 3797 3799 3803 3807 3811
3815 3819 3823 3827 3831 3835 3839 3843 3847 3864 3866 3870 3885 3887
3891
.LOENA 147 149 168 170 191 199 212 220 370 375 414 416 418 431
452 550 552 558 563 565 571 661 663 669 674 676 682 801
812 825 836 881 902 1069 1078 1102 1252 1267 1480 1489 1513 1663
1668 1978 1983 2272 2277 2297 2318 2601 2606 2626 2647 2836 2877 2881
2885 2889 2893 2897 2901 2905 2922 2943 3134 3177 3181 3185 3189 3193
3197 3201 3205 3222 3243 3438 3481 3485 3489 3493 3497 3501 3505 3509
3513 3517 3534 3555 3762 3803 3807 3811 3815 3819 3823 3827 3831 3835
3839 3843 3847 3864 3885
.LOR 143 145 149 153 164 166 170 174 191 197 199 212 218 220
359 365 375 377 386 388 414 416 418 431 437 452 458 556
569 667 680 801 803 805 812 814 825 827 838 840 881 887
902 908 1078 1095 1102 1252 1256 1258 1267 1489 1506 1513 1886 1976
1978 2229 2265 2272 2277 2297 2303 2318 2324 2558 2594 2601 2606 2626
2632 2647 2653 2815 2817 2819 2821 2823 2825 2827 2829 2861 2922 2928
2943 2949 3113 3115 3117 3119 3121 3123 3125 3127 3161 3222 3228 3243
3249 3413 3415 3417 3419 3421 3423 3425 3427 3429 3431 3465 3534 3540
3555 3561 3733 3735 3737 3739 3741 3743 3745 3747 3749 3751 3753 3755
3787 3864 3870 3885 3891
.LPLUS 185 189 206 210 363 367 409 425 429 446 450 875 879 896
900 1097 1241 1254 1508 1663 1668 2239 2291 2295 2312 2316 2568 2620
2624 2641 2645 2916 2920 2937 2941 3216 3220 3237 3241 3528 3532 3549
3553 3858 3862 3879 3883
.LRDLM 386 2815 2817 2819 2821 2823 2825 2827 2829 3113 3115 3117 3119 3121
3123 3125 3127 3413 3415 3417 3419 3421 3423 3425 3427 3429 3431 3733
3735 3737 3739 3741 3743 3745 3747 3749 3751 3753 3755
.LRMIN 155 176
.LRPCT 145 166 189 210 365 397 429 450 879 900 2216 2257 2295 2316
2545 2586 2624 2645 2920 2941 3220 3241 3532 3553 3862 3883
.LS0A 145 147 149 166 168 170 191 197 199 212 218 220 361 370
375 405 407 414 416 418 431 437 452 458 550 552 558 561
563 565 571 661 663 669 672 674 676 682 799 801 805 812
816 825 829 836 840 881 887 902 908 1069 1078 1102 1241 1252
1267 1480 1489 1513 1661 1666 1978 1983 2229 2239 2272 2277 2297 2303
2318 2324 2558 2568 2601 2606 2626 2632 2647 2653 2836 2840 2877 2881
2885 2889 2893 2897 2901 2905 2922 2928 2943 2949 3134 3140 3177 3181
3185 3189 3193 3197 3201 3205 3222 3228 3243 3249 3438 3444 3481 3485
3489 3493 3497 3501 3505 3509 3513 3517 3534 3540 3555 3561 3762 3766
3803 3807 3811 3815 3819 3823 3827 3831 3835 3839 3843 3847 3864 3870
3885 3891 SEQ 1985
.LS0B 185 206 363 365 367 409 425 446 823 875 896 1050 1097 1239
1254 1256 1258 1458 1508 1663 1668 2218 2291 2312 2547 2620 2641 2916
2937 3216 3237 3528 3549 3858 3879
.LSAB 155 176 189 210 379 390 429 450 879 900 2295 2316 2624 2645
2920 2941 3220 3241 3532 3553 3862 3883
.LSD0 143 151 153 164 172 174 183 204 359 377 386 388 423 444
554 556 567 569 665 667 678 680 803 814 827 838 873 894
1095 1506 1886 1976 2265 2289 2310 2594 2618 2639 2815 2817 2819 2821
2823 2825 2827 2829 2861 2914 2935 3113 3115 3117 3119 3121 3123 3125
3127 3136 3161 3214 3235 3413 3415 3417 3419 3421 3423 3425 3427 3429
3431 3440 3465 3526 3547 3733 3735 3737 3739 3741 3743 3745 3747 3749
3751 3753 3755 3787 3856 3877
.LSELC 812 836 852 863 1067 1076 1087 1093 1114 1246 1254 1265 1279 1478
1487 1498 1504 1525 1878 1884 1888 1895 1974 1981 2246 2253 2263 2282
2575 2582 2592 2611 2853 2859 2866 2871 3153 3159 3166 3171 3457 3463
3470 3475 3764 3779 3785 3792 3797
.LSELE 191 193 197 199 212 214 218 220 414 416 418 431 433 437
452 454 458 558 571 669 682 881 883 887 902 904 908 1069
1078 1102 1267 1480 1489 1513 1663 1668 1978 1983 2272 2277 2297 2299
2303 2318 2320 2324 2601 2606 2626 2628 2632 2647 2649 2653 2922 2924
2928 2943 2945 2949 3222 3224 3228 3243 3245 3249 3534 3536 3540 3555
3557 3561 3864 3866 3870 3885 3887 3891
.LSELF 147 168 375 386 550 563 661 674 801 825 1252 2836 2838 3138
3442 3762
.LSELM 149 153 170 174 377 388 552 556 565 569 663 667 676 680
803 814 827 838 865 1095 1109 1116 1274 1281 1506 1520 1527 1886
1897 1976 2212 2265 2284 2541 2594 2613 2834 2861 2873 3132 3134 3161
3173 3436 3438 3465 3477 3760 3787 3799
.LSELP 151 172 554 567 665 678 3136 3440
.LSKCN 143 164 359
.LSMIN 379 390
.LTIM 1666 1668
.LXNOR 147 168 370 552 563 565 663 674 676 816 823 829 836 1069
1480
.MA 155 176 189 191 197 199 210 212 218 220 370 375 379 390
414 416 418 429 431 437 450 452 458 558 571 669 682 801
805 812 816 825 829 836 840 879 881 887 900 902 908 1069
1078 1102 1241 1252 1267 1480 1489 1513 2229 2239 2272 2277 2295 2297
2303 2316 2318 2324 2558 2568 2601 2606 2624 2626 2632 2645 2647 2653
2836 2840 2877 2881 2885 2889 2893 2897 2901 2905 2920 2922 2928 2941
2943 2949 3134 3140 3177 3181 3185 3189 3193 3197 3201 3205 3220 3222
3228 3241 3243 3249 3438 3444 3481 3485 3489 3493 3497 3501 3505 3509
3513 3517 3532 3534 3540 3553 3555 3561 3762 3766 3803 3807 3811 3815
3819 3823 3827 3831 3835 3839 3843 3847 3862 3864 3870 3883 3885 3891
.MAND 183 204 361 405 407 423 444 550 561 661 672 799 873 894
1050 1239 1458 1661 1666 1983 2218 2289 2310 2547 2618 2639 2914 2935
3214 3235 3526 3547 3856 3877
.MB 147 153 155 168 174 176 183 185 189 204 206 210 359 361
363 365 367 375 377 379 386 388 390 405 407 409 423 425
429 444 446 450 556 569 667 680 799 803 814 823 827 838
873 875 879 894 896 900 1050 1095 1097 1239 1241 1254 1256 1258
1458 1506 1508 1886 2218 2239 2265 2289 2291 2295 2310 2312 2316 2547
2568 2594 2618 2620 2624 2639 2641 2645 2815 2817 2819 2821 2823 2825 SEQ 1986
2827 2829 2861 2914 2916 2920 2935 2937 2941 3113 3115 3117 3119 3121
3123 3125 3127 3161 3214 3216 3220 3235 3237 3241 3413 3415 3417 3419
3421 3423 3425 3427 3429 3431 3465 3526 3528 3532 3547 3549 3553 3733
3735 3737 3739 3741 3743 3745 3747 3749 3751 3753 3755 3787 3856 3858
3862 3877 3879 3883
.MCCCA 854 1089 1248 1500 1880 2259 2588 2855 3155 3459 3781
.MCCCP 1058 1466
.MCCFZ 155 176 379 390 805 816 829 840 1258
.MCCGC 193 214 433 454 883 904 2299 2320 2628 2649 2924 2945 3224 3245
3536 3557 3866 3887
.MCCLW 1060 1470 2239 2568
.MCCMB 2229 2558 2840 3140 3444 3766
.MCCMP 2231 2235 2560 2564 2842 2846 3142 3146 3446 3450 3768 3772
.MCENA 155 176 193 214 379 390 433 454 805 816 829 840 854 883
904 1058 1060 1089 1248 1258 1466 1470 1500 1880 2229 2231 2235 2239
2259 2299 2320 2558 2560 2564 2568 2588 2628 2649 2840 2842 2846 2855
2924 2945 3140 3142 3146 3155 3224 3245 3444 3446 3450 3459 3536 3557
3766 3768 3772 3781 3866 3887
.MCJP 155 176 193 214 379 390 433 454 805 816 829 840 854 883
904 1058 1060 1089 1248 1258 1466 1470 1500 1880 2229 2231 2235 2239
2259 2299 2320 2558 2560 2564 2568 2588 2628 2649 2840 2842 2846 2855
2924 2945 3140 3142 3146 3155 3224 3245 3444 3446 3450 3459 3536 3557
3766 3768 3772 3781 3866 3887
.MCJS 799 823 1052 1056 1460 1464 2220 2227 2549 2556 2875 2879 2883 2887
2891 2895 2899 2903 3175 3179 3183 3187 3191 3195 3199 3203 3479 3483
3487 3491 3495 3499 3503 3507 3511 3515 3801 3805 3809 3813 3817 3821
3825 3829 3833 3837 3841 3845
.MCONT 147 149 151 153 168 170 172 174 183 185 191 197 204 206
212 218 363 370 375 377 386 388 407 423 425 431 437 444
446 452 458 552 554 556 563 565 567 569 663 665 667 674
676 678 680 801 803 812 814 825 827 836 838 852 873 875
881 887 894 896 902 908 1067 1069 1076 1078 1087 1093 1095 1241
1246 1252 1254 1256 1265 1478 1480 1487 1489 1498 1504 1506 1884 1886
1888 1976 2218 2253 2263 2265 2289 2291 2297 2303 2310 2312 2318 2324
2547 2582 2592 2594 2618 2620 2626 2632 2639 2641 2647 2653 2834 2836
2838 2859 2873 2877 2881 2885 2889 2893 2897 2901 2905 2914 2916 2922
2928 2935 2937 2943 2949 3132 3134 3136 3138 3159 3173 3177 3181 3185
3189 3193 3197 3201 3205 3214 3216 3222 3228 3235 3237 3243 3249 3436
3438 3440 3442 3463 3477 3481 3485 3489 3493 3497 3501 3505 3509 3513
3517 3526 3528 3534 3540 3547 3549 3555 3561 3760 3762 3764 3785 3799
3803 3807 3811 3815 3819 3823 3827 3831 3835 3839 3843 3847 3856 3858
3864 3870 3877 3879 3885 3891
.MCRTN 858 1097 1508 2267 2596 2861 3161 3465 3787
.MCRY 155 176 185 206 363 367 379 390 409 425 446 875 896 1097
1241 1254 1508 1663 1668 2239 2291 2312 2568 2620 2641 2916 2937 3216
3237 3528 3549 3858 3879
.MD 141 143 145 147 149 151 153 155 157 162 164 166 168 170
172 174 176 178 183 185 189 191 193 195 197 199 204 206
210 212 214 216 218 220 359 361 363 365 367 370 375 377
381 386 388 392 397 399 405 407 409 414 416 418 423 425
429 431 433 435 437 439 444 446 450 452 454 456 458 460
550 552 554 556 558 561 563 565 567 569 571 661 663 665
667 669 672 674 676 678 680 682 799 801 803 805 807 812 SEQ 1987
814 816 818 823 825 827 829 831 836 838 840 842 847 852
854 856 858 873 875 879 881 883 885 887 889 894 896 900
902 904 906 908 910 1050 1052 1054 1056 1058 1060 1069 1078 1087
1089 1091 1093 1095 1097 1102 1239 1241 1246 1248 1250 1252 1254 1256
1258 1267 1458 1460 1462 1464 1466 1468 1470 1480 1489 1498 1500 1502
1504 1506 1508 1513 1661 1663 1666 1668 1880 1882 1884 1886 1974 1976
1978 1983 2218 2220 2227 2229 2231 2233 2235 2237 2239 2253 2255 2257
2259 2261 2263 2265 2267 2272 2277 2289 2291 2295 2297 2299 2301 2303
2305 2310 2312 2316 2318 2320 2322 2324 2326 2547 2549 2556 2558 2560
2562 2564 2566 2568 2582 2584 2586 2588 2590 2592 2594 2596 2601 2606
2618 2620 2624 2626 2628 2630 2632 2634 2639 2641 2645 2647 2649 2651
2653 2655 2815 2817 2819 2821 2823 2825 2827 2829 2834 2836 2838 2840
2842 2844 2846 2848 2853 2855 2857 2859 2861 2875 2877 2879 2881 2883
2885 2887 2889 2891 2893 2895 2897 2899 2901 2903 2905 2914 2916 2920
2922 2924 2926 2928 2930 2935 2937 2941 2943 2945 2947 2949 2951 3113
3115 3117 3119 3121 3123 3125 3127 3132 3134 3136 3138 3140 3142 3144
3146 3148 3153 3155 3157 3159 3161 3175 3177 3179 3181 3183 3185 3187
3189 3191 3193 3195 3197 3199 3201 3203 3205 3214 3216 3220 3222 3224
3226 3228 3230 3235 3237 3241 3243 3245 3247 3249 3251 3413 3415 3417
3419 3421 3423 3425 3427 3429 3431 3436 3438 3440 3442 3444 3446 3448
3450 3452 3457 3459 3461 3463 3465 3479 3481 3483 3485 3487 3489 3491
3493 3495 3497 3499 3501 3503 3505 3507 3509 3511 3513 3515 3517 3526
3528 3532 3534 3536 3538 3540 3542 3547 3549 3553 3555 3557 3559 3561
3563 3733 3735 3737 3739 3741 3743 3745 3747 3749 3751 3753 3755 3760
3762 3764 3766 3768 3770 3772 3774 3779 3781 3783 3785 3787 3801 3803
3805 3807 3809 3811 3813 3815 3817 3819 3821 3823 3825 3827 3829 3831
3833 3835 3837 3839 3841 3843 3845 3847 3856 3858 3862 3864 3866 3868
3870 3872 3877 3879 3883 3885 3887 3889 3891 3893
.MJ 141 143 145 155 157 162 164 166 176 178 187 189 193 195
199 208 210 214 216 220 359 361 365 367 379 381 390 392
397 399 405 409 414 416 418 427 429 433 435 439 448 450
454 456 460 550 558 561 571 661 669 672 682 799 805 807
816 818 823 829 831 840 842 847 854 856 863 865 877 879
883 885 889 898 900 904 906 910 1050 1052 1054 1056 1058 1060
1062 1071 1080 1089 1091 1102 1104 1114 1116 1239 1248 1250 1258 1260
1267 1269 1279 1281 1458 1460 1462 1464 1466 1468 1470 1472 1482 1491
1500 1502 1513 1515 1525 1527 1661 1663 1666 1668 1878 1880 1882 1890
1895 1897 1974 1978 1981 1983 2214 2216 2220 2222 2227 2229 2231 2233
2235 2237 2239 2241 2246 2255 2257 2259 2261 2272 2277 2282 2284 2293
2295 2299 2301 2305 2314 2316 2320 2322 2326 2543 2545 2549 2551 2556
2558 2560 2562 2564 2566 2568 2570 2575 2584 2586 2588 2590 2601 2606
2611 2613 2622 2624 2628 2630 2634 2643 2645 2649 2651 2655 2815 2817
2819 2821 2823 2825 2827 2829 2840 2842 2844 2846 2848 2853 2855 2857
2871 2875 2879 2883 2887 2891 2895 2899 2903 2918 2920 2924 2926 2930
2939 2941 2945 2947 2951 3113 3115 3117 3119 3121 3123 3125 3127 3140
3142 3144 3146 3148 3153 3155 3157 3171 3175 3179 3183 3187 3191 3195
3199 3203 3218 3220 3224 3226 3230 3239 3241 3245 3247 3251 3413 3415
3417 3419 3421 3423 3425 3427 3429 3431 3444 3446 3448 3450 3452 3457
3459 3461 3475 3479 3483 3487 3491 3495 3499 3503 3507 3511 3515 3530
3532 3536 3538 3542 3551 3553 3557 3559 3563 3733 3735 3737 3739 3741
3743 3745 3747 3749 3751 3753 3755 3766 3768 3770 3772 3774 3779 3781
3783 3797 3801 3805 3809 3813 3817 3821 3825 3829 3833 3837 3841 3845
3860 3862 3866 3868 3872 3881 3883 3887 3889 3893 SEQ 1988
.MJMAP 141 157 162 178 195 199 216 220 359 381 392 399 405 409
414 416 418 435 439 456 460 550 558 561 571 661 669 672
682 807 818 831 842 847 856 863 865 885 889 906 910 1050
1054 1062 1071 1080 1091 1102 1104 1114 1116 1239 1250 1260 1267 1269
1279 1281 1458 1462 1468 1472 1482 1491 1502 1513 1515 1525 1527 1661
1663 1666 1668 1878 1882 1890 1895 1897 1974 1978 1981 1983 2222 2233
2237 2241 2246 2261 2272 2277 2282 2284 2301 2305 2322 2326 2551 2562
2566 2570 2575 2590 2601 2606 2611 2613 2630 2634 2651 2655 2815 2817
2819 2821 2823 2825 2827 2829 2844 2848 2853 2857 2871 2926 2930 2947
2951 3113 3115 3117 3119 3121 3123 3125 3127 3144 3148 3153 3157 3171
3226 3230 3247 3251 3413 3415 3417 3419 3421 3423 3425 3427 3429 3431
3448 3452 3457 3461 3475 3538 3542 3559 3563 3733 3735 3737 3739 3741
3743 3745 3747 3749 3751 3753 3755 3770 3774 3779 3783 3797 3868 3872
3889 3893
.MJZ 868 1109 1274 1520 2212 2541 2866 2907 2909 3166 3207 3209 3470 3519
3521 3792 3849 3851
.MLDCT 143 164 187 208 361 367 427 448 877 898 2214 2255 2293 2314
2543 2584 2622 2643 2918 2939 3218 3239 3530 3551 3860 3881
.MLDLM 370 2877 2881 2885 2889 2893 2897 2901 2905 3177 3181 3185 3189 3193
3197 3201 3205 3481 3485 3489 3493 3497 3501 3505 3509 3513 3517 3803
3807 3811 3815 3819 3823 3827 3831 3835 3839 3843 3847
.MMGC 143 147 149 151 153 164 168 170 172 174 191 193 197 199
212 214 218 220 359 370 375 377 386 388 414 416 418 431
433 437 452 454 458 550 552 554 556 558 563 565 567 569
571 661 663 665 667 669 674 676 678 680 682 801 803 812
814 825 827 836 838 852 863 865 881 883 887 902 904 908
1067 1069 1076 1078 1087 1093 1095 1102 1109 1114 1116 1246 1252 1254
1265 1267 1274 1279 1281 1478 1480 1487 1489 1498 1504 1506 1513 1520
1525 1527 1663 1668 1878 1884 1886 1888 1895 1897 1974 1976 1978 1981
1983 2212 2246 2253 2263 2265 2272 2277 2282 2284 2297 2299 2303 2318
2320 2324 2541 2575 2582 2592 2594 2601 2606 2611 2613 2626 2628 2632
2647 2649 2653 2815 2817 2819 2821 2823 2825 2827 2829 2834 2836 2838
2853 2859 2861 2866 2871 2873 2877 2881 2885 2889 2893 2897 2901 2905
2922 2924 2928 2943 2945 2949 3113 3115 3117 3119 3121 3123 3125 3127
3132 3134 3136 3138 3153 3159 3161 3166 3171 3173 3177 3181 3185 3189
3193 3197 3201 3205 3222 3224 3228 3243 3245 3249 3413 3415 3417 3419
3421 3423 3425 3427 3429 3431 3436 3438 3440 3442 3457 3463 3465 3470
3475 3477 3481 3485 3489 3493 3497 3501 3505 3509 3513 3517 3534 3536
3540 3555 3557 3561 3733 3735 3737 3739 3741 3743 3745 3747 3749 3751
3753 3755 3760 3762 3764 3779 3785 3787 3792 3797 3799 3803 3807 3811
3815 3819 3823 3827 3831 3835 3839 3843 3847 3864 3866 3870 3885 3887
3891
.MOENA 147 149 168 170 191 199 212 220 370 375 414 416 418 431
452 550 552 558 563 565 571 661 663 669 674 676 682 801
812 825 836 881 902 1069 1078 1102 1252 1267 1480 1489 1513 1663
1668 1978 1983 2272 2277 2297 2318 2601 2606 2626 2647 2836 2877 2881
2885 2889 2893 2897 2901 2905 2922 2943 3134 3177 3181 3185 3189 3193
3197 3201 3205 3222 3243 3438 3481 3485 3489 3493 3497 3501 3505 3509
3513 3517 3534 3555 3762 3803 3807 3811 3815 3819 3823 3827 3831 3835
3839 3843 3847 3864 3885
.MOR 143 145 149 153 164 166 170 174 191 197 199 212 218 220
359 365 375 377 386 388 414 416 418 431 437 452 458 556
569 667 680 801 803 805 812 814 825 827 838 840 881 887 SEQ 1989
902 908 1078 1095 1102 1252 1256 1258 1267 1489 1506 1513 1886 1976
1978 2229 2265 2272 2277 2297 2303 2318 2324 2558 2594 2601 2606 2626
2632 2647 2653 2815 2817 2819 2821 2823 2825 2827 2829 2861 2922 2928
2943 2949 3113 3115 3117 3119 3121 3123 3125 3127 3161 3222 3228 3243
3249 3413 3415 3417 3419 3421 3423 3425 3427 3429 3431 3465 3534 3540
3555 3561 3733 3735 3737 3739 3741 3743 3745 3747 3749 3751 3753 3755
3787 3864 3870 3885 3891
.MPLUS 185 189 206 210 363 367 409 425 429 446 450 875 879 896
900 1097 1241 1254 1508 1663 1668 2239 2291 2295 2312 2316 2568 2620
2624 2641 2645 2916 2920 2937 2941 3216 3220 3237 3241 3528 3532 3549
3553 3858 3862 3879 3883
.MRDLM 386 2815 2817 2819 2821 2823 2825 2827 2829 3113 3115 3117 3119 3121
3123 3125 3127 3413 3415 3417 3419 3421 3423 3425 3427 3429 3431 3733
3735 3737 3739 3741 3743 3745 3747 3749 3751 3753 3755
.MRMIN 155 176
.MRPCT 145 166 189 210 365 397 429 450 879 900 2216 2257 2295 2316
2545 2586 2624 2645 2920 2941 3220 3241 3532 3553 3862 3883
.MS0A 145 147 149 166 168 170 191 197 199 212 218 220 361 370
375 405 407 414 416 418 431 437 452 458 550 552 558 561
563 565 571 661 663 669 672 674 676 682 799 801 805 812
816 825 829 836 840 881 887 902 908 1069 1078 1102 1241 1252
1267 1480 1489 1513 1661 1666 1978 1983 2229 2239 2272 2277 2297 2303
2318 2324 2558 2568 2601 2606 2626 2632 2647 2653 2836 2840 2877 2881
2885 2889 2893 2897 2901 2905 2922 2928 2943 2949 3134 3140 3177 3181
3185 3189 3193 3197 3201 3205 3222 3228 3243 3249 3438 3444 3481 3485
3489 3493 3497 3501 3505 3509 3513 3517 3534 3540 3555 3561 3762 3766
3803 3807 3811 3815 3819 3823 3827 3831 3835 3839 3843 3847 3864 3870
3885 3891
.MS0B 185 206 363 365 367 409 425 446 823 875 896 1050 1097 1239
1254 1256 1258 1458 1508 1663 1668 2218 2291 2312 2547 2620 2641 2916
2937 3216 3237 3528 3549 3858 3879
.MSAB 155 176 189 210 379 390 429 450 879 900 2295 2316 2624 2645
2920 2941 3220 3241 3532 3553 3862 3883
.MSD0 143 151 153 164 172 174 183 204 359 377 386 388 423 444
554 556 567 569 665 667 678 680 803 814 827 838 873 894
1095 1506 1886 1976 2265 2289 2310 2594 2618 2639 2815 2817 2819 2821
2823 2825 2827 2829 2861 2914 2935 3113 3115 3117 3119 3121 3123 3125
3127 3136 3161 3214 3235 3413 3415 3417 3419 3421 3423 3425 3427 3429
3431 3440 3465 3526 3547 3733 3735 3737 3739 3741 3743 3745 3747 3749
3751 3753 3755 3787 3856 3877
.MSELC 812 836 852 863 1067 1076 1087 1093 1114 1246 1254 1265 1279 1478
1487 1498 1504 1525 1878 1884 1888 1895 1974 1981 2246 2253 2263 2282
2575 2582 2592 2611 2853 2859 2866 2871 3153 3159 3166 3171 3457 3463
3470 3475 3764 3779 3785 3792 3797
.MSELE 191 193 197 199 212 214 218 220 414 416 418 431 433 437
452 454 458 558 571 669 682 881 883 887 902 904 908 1069
1078 1102 1267 1480 1489 1513 1663 1668 1978 1983 2272 2277 2297 2299
2303 2318 2320 2324 2601 2606 2626 2628 2632 2647 2649 2653 2922 2924
2928 2943 2945 2949 3222 3224 3228 3243 3245 3249 3534 3536 3540 3555
3557 3561 3864 3866 3870 3885 3887 3891
.MSELF 147 168 375 386 550 563 661 674 801 825 1252 2836 2838 3138
3442 3762
.MSELM 149 153 170 174 377 388 552 556 565 569 663 667 676 680 SEQ 1990
803 814 827 838 865 1095 1109 1116 1274 1281 1506 1520 1527 1886
1897 1976 2212 2265 2284 2541 2594 2613 2834 2861 2873 3132 3134 3161
3173 3436 3438 3465 3477 3760 3787 3799
.MSELP 151 172 554 567 665 678 3136 3440
.MSKCN 143 164 359
.MSMIN 379 390
.MTIM 1666 1668
.MXNOR 147 168 370 552 563 565 663 674 676 816 823 829 836 1069
1480
.RA 155 176 189 191 197 199 210 212 218 220 370 375 379 390
414 416 418 429 431 437 450 452 458 558 571 669 682 801
805 812 816 825 829 836 840 879 881 887 900 902 908 1069
1078 1102 1241 1252 1267 1480 1489 1513 2229 2239 2272 2277 2295 2297
2303 2316 2318 2324 2558 2568 2601 2606 2624 2626 2632 2645 2647 2653
2836 2840 2877 2881 2885 2889 2893 2897 2901 2905 2920 2922 2928 2941
2943 2949 3134 3140 3177 3181 3185 3189 3193 3197 3201 3205 3220 3222
3228 3241 3243 3249 3438 3444 3481 3485 3489 3493 3497 3501 3505 3509
3513 3517 3532 3534 3540 3553 3555 3561 3762 3766 3803 3807 3811 3815
3819 3823 3827 3831 3835 3839 3843 3847 3862 3864 3870 3883 3885 3891
.RAND 183 204 361 405 407 423 444 550 561 661 672 799 873 894
1050 1239 1458 1661 1666 1983 2218 2289 2310 2547 2618 2639 2914 2935
3214 3235 3526 3547 3856 3877
.RB 147 153 155 168 174 176 183 185 189 204 206 210 359 361
363 365 367 375 377 379 386 388 390 405 407 409 423 425
429 444 446 450 556 569 667 680 799 803 814 823 827 838
873 875 879 894 896 900 1050 1095 1097 1239 1241 1254 1256 1258
1458 1506 1508 1886 2218 2239 2265 2289 2291 2295 2310 2312 2316 2547
2568 2594 2618 2620 2624 2639 2641 2645 2815 2817 2819 2821 2823 2825
2827 2829 2861 2914 2916 2920 2935 2937 2941 3113 3115 3117 3119 3121
3123 3125 3127 3161 3214 3216 3220 3235 3237 3241 3413 3415 3417 3419
3421 3423 3425 3427 3429 3431 3465 3526 3528 3532 3547 3549 3553 3733
3735 3737 3739 3741 3743 3745 3747 3749 3751 3753 3755 3787 3856 3858
3862 3877 3879 3883
.RCCCA 854 1089 1248 1500 1880 2259 2588 2855 3155 3459 3781
.RCCCP 1058 1466
.RCCFZ 155 176 379 390 805 816 829 840 1258
.RCCGC 193 214 433 454 883 904 2299 2320 2628 2649 2924 2945 3224 3245
3536 3557 3866 3887
.RCCLW 1060 1470 2239 2568
.RCCMB 2229 2558 2840 3140 3444 3766
.RCCMP 2231 2235 2560 2564 2842 2846 3142 3146 3446 3450 3768 3772
.RCENA 155 176 193 214 379 390 433 454 805 816 829 840 854 883
904 1058 1060 1089 1248 1258 1466 1470 1500 1880 2229 2231 2235 2239
2259 2299 2320 2558 2560 2564 2568 2588 2628 2649 2840 2842 2846 2855
2924 2945 3140 3142 3146 3155 3224 3245 3444 3446 3450 3459 3536 3557
3766 3768 3772 3781 3866 3887
.RCJP 155 176 193 214 379 390 433 454 805 816 829 840 854 883
904 1058 1060 1089 1248 1258 1466 1470 1500 1880 2229 2231 2235 2239
2259 2299 2320 2558 2560 2564 2568 2588 2628 2649 2840 2842 2846 2855
2924 2945 3140 3142 3146 3155 3224 3245 3444 3446 3450 3459 3536 3557
3766 3768 3772 3781 3866 3887
.RCJS 799 823 1052 1056 1460 1464 2220 2227 2549 2556 2875 2879 2883 2887
2891 2895 2899 2903 3175 3179 3183 3187 3191 3195 3199 3203 3479 3483 SEQ 1991
3487 3491 3495 3499 3503 3507 3511 3515 3801 3805 3809 3813 3817 3821
3825 3829 3833 3837 3841 3845
.RCONT 147 149 151 153 168 170 172 174 183 185 191 197 204 206
212 218 363 370 375 377 386 388 407 423 425 431 437 444
446 452 458 552 554 556 563 565 567 569 663 665 667 674
676 678 680 801 803 812 814 825 827 836 838 852 873 875
881 887 894 896 902 908 1067 1069 1076 1078 1087 1093 1095 1241
1246 1252 1254 1256 1265 1478 1480 1487 1489 1498 1504 1506 1884 1886
1888 1976 2218 2253 2263 2265 2289 2291 2297 2303 2310 2312 2318 2324
2547 2582 2592 2594 2618 2620 2626 2632 2639 2641 2647 2653 2834 2836
2838 2859 2873 2877 2881 2885 2889 2893 2897 2901 2905 2914 2916 2922
2928 2935 2937 2943 2949 3132 3134 3136 3138 3159 3173 3177 3181 3185
3189 3193 3197 3201 3205 3214 3216 3222 3228 3235 3237 3243 3249 3436
3438 3440 3442 3463 3477 3481 3485 3489 3493 3497 3501 3505 3509 3513
3517 3526 3528 3534 3540 3547 3549 3555 3561 3760 3762 3764 3785 3799
3803 3807 3811 3815 3819 3823 3827 3831 3835 3839 3843 3847 3856 3858
3864 3870 3877 3879 3885 3891
.RCRTN 858 1097 1508 2267 2596 2861 3161 3465 3787
.RCRY 155 176 185 206 363 367 379 390 409 425 446 875 896 1097
1241 1254 1508 1663 1668 2239 2291 2312 2568 2620 2641 2916 2937 3216
3237 3528 3549 3858 3879
.RD 141 143 145 147 149 151 153 155 157 162 164 166 168 170
172 174 176 178 183 185 189 191 193 195 197 199 204 206
210 212 214 216 218 220 359 361 363 365 367 370 375 377
381 386 388 392 397 399 405 407 409 414 416 418 423 425
429 431 433 435 437 439 444 446 450 452 454 456 458 460
550 552 554 556 558 561 563 565 567 569 571 661 663 665
667 669 672 674 676 678 680 682 799 801 803 805 807 812
814 816 818 823 825 827 829 831 836 838 840 842 847 852
854 856 858 873 875 879 881 883 885 887 889 894 896 900
902 904 906 908 910 1050 1052 1054 1056 1058 1060 1069 1078 1087
1089 1091 1093 1095 1097 1102 1239 1241 1246 1248 1250 1252 1254 1256
1258 1267 1458 1460 1462 1464 1466 1468 1470 1480 1489 1498 1500 1502
1504 1506 1508 1513 1661 1663 1666 1668 1880 1882 1884 1886 1974 1976
1978 1983 2218 2220 2227 2229 2231 2233 2235 2237 2239 2253 2255 2257
2259 2261 2263 2265 2267 2272 2277 2289 2291 2295 2297 2299 2301 2303
2305 2310 2312 2316 2318 2320 2322 2324 2326 2547 2549 2556 2558 2560
2562 2564 2566 2568 2582 2584 2586 2588 2590 2592 2594 2596 2601 2606
2618 2620 2624 2626 2628 2630 2632 2634 2639 2641 2645 2647 2649 2651
2653 2655 2815 2817 2819 2821 2823 2825 2827 2829 2834 2836 2838 2840
2842 2844 2846 2848 2853 2855 2857 2859 2861 2875 2877 2879 2881 2883
2885 2887 2889 2891 2893 2895 2897 2899 2901 2903 2905 2914 2916 2920
2922 2924 2926 2928 2930 2935 2937 2941 2943 2945 2947 2949 2951 3113
3115 3117 3119 3121 3123 3125 3127 3132 3134 3136 3138 3140 3142 3144
3146 3148 3153 3155 3157 3159 3161 3175 3177 3179 3181 3183 3185 3187
3189 3191 3193 3195 3197 3199 3201 3203 3205 3214 3216 3220 3222 3224
3226 3228 3230 3235 3237 3241 3243 3245 3247 3249 3251 3413 3415 3417
3419 3421 3423 3425 3427 3429 3431 3436 3438 3440 3442 3444 3446 3448
3450 3452 3457 3459 3461 3463 3465 3479 3481 3483 3485 3487 3489 3491
3493 3495 3497 3499 3501 3503 3505 3507 3509 3511 3513 3515 3517 3526
3528 3532 3534 3536 3538 3540 3542 3547 3549 3553 3555 3557 3559 3561
3563 3733 3735 3737 3739 3741 3743 3745 3747 3749 3751 3753 3755 3760
3762 3764 3766 3768 3770 3772 3774 3779 3781 3783 3785 3787 3801 3803 SEQ 1992
3805 3807 3809 3811 3813 3815 3817 3819 3821 3823 3825 3827 3829 3831
3833 3835 3837 3839 3841 3843 3845 3847 3856 3858 3862 3864 3866 3868
3870 3872 3877 3879 3883 3885 3887 3889 3891 3893
.RJ 141 143 145 155 157 162 164 166 176 178 187 189 193 195
199 208 210 214 216 220 359 361 365 367 379 381 390 392
397 399 405 409 414 416 418 427 429 433 435 439 448 450
454 456 460 550 558 561 571 661 669 672 682 799 805 807
816 818 823 829 831 840 842 847 854 856 863 865 877 879
883 885 889 898 900 904 906 910 1050 1052 1054 1056 1058 1060
1062 1071 1080 1089 1091 1102 1104 1114 1116 1239 1248 1250 1258 1260
1267 1269 1279 1281 1458 1460 1462 1464 1466 1468 1470 1472 1482 1491
1500 1502 1513 1515 1525 1527 1661 1663 1666 1668 1878 1880 1882 1890
1895 1897 1974 1978 1981 1983 2214 2216 2220 2222 2227 2229 2231 2233
2235 2237 2239 2241 2246 2255 2257 2259 2261 2272 2277 2282 2284 2293
2295 2299 2301 2305 2314 2316 2320 2322 2326 2543 2545 2549 2551 2556
2558 2560 2562 2564 2566 2568 2570 2575 2584 2586 2588 2590 2601 2606
2611 2613 2622 2624 2628 2630 2634 2643 2645 2649 2651 2655 2815 2817
2819 2821 2823 2825 2827 2829 2840 2842 2844 2846 2848 2853 2855 2857
2871 2875 2879 2883 2887 2891 2895 2899 2903 2918 2920 2924 2926 2930
2939 2941 2945 2947 2951 3113 3115 3117 3119 3121 3123 3125 3127 3140
3142 3144 3146 3148 3153 3155 3157 3171 3175 3179 3183 3187 3191 3195
3199 3203 3218 3220 3224 3226 3230 3239 3241 3245 3247 3251 3413 3415
3417 3419 3421 3423 3425 3427 3429 3431 3444 3446 3448 3450 3452 3457
3459 3461 3475 3479 3483 3487 3491 3495 3499 3503 3507 3511 3515 3530
3532 3536 3538 3542 3551 3553 3557 3559 3563 3733 3735 3737 3739 3741
3743 3745 3747 3749 3751 3753 3755 3766 3768 3770 3772 3774 3779 3781
3783 3797 3801 3805 3809 3813 3817 3821 3825 3829 3833 3837 3841 3845
3860 3862 3866 3868 3872 3881 3883 3887 3889 3893
.RJMAP 141 157 162 178 195 199 216 220 359 381 392 399 405 409
414 416 418 435 439 456 460 550 558 561 571 661 669 672
682 807 818 831 842 847 856 863 865 885 889 906 910 1050
1054 1062 1071 1080 1091 1102 1104 1114 1116 1239 1250 1260 1267 1269
1279 1281 1458 1462 1468 1472 1482 1491 1502 1513 1515 1525 1527 1661
1663 1666 1668 1878 1882 1890 1895 1897 1974 1978 1981 1983 2222 2233
2237 2241 2246 2261 2272 2277 2282 2284 2301 2305 2322 2326 2551 2562
2566 2570 2575 2590 2601 2606 2611 2613 2630 2634 2651 2655 2815 2817
2819 2821 2823 2825 2827 2829 2844 2848 2853 2857 2871 2926 2930 2947
2951 3113 3115 3117 3119 3121 3123 3125 3127 3144 3148 3153 3157 3171
3226 3230 3247 3251 3413 3415 3417 3419 3421 3423 3425 3427 3429 3431
3448 3452 3457 3461 3475 3538 3542 3559 3563 3733 3735 3737 3739 3741
3743 3745 3747 3749 3751 3753 3755 3770 3774 3779 3783 3797 3868 3872
3889 3893
.RJZ 868 1109 1274 1520 2212 2541 2866 2907 2909 3166 3207 3209 3470 3519
3521 3792 3849 3851
.RLDCT 143 164 187 208 361 367 427 448 877 898 2214 2255 2293 2314
2543 2584 2622 2643 2918 2939 3218 3239 3530 3551 3860 3881
.RLDLM 370 2877 2881 2885 2889 2893 2897 2901 2905 3177 3181 3185 3189 3193
3197 3201 3205 3481 3485 3489 3493 3497 3501 3505 3509 3513 3517 3803
3807 3811 3815 3819 3823 3827 3831 3835 3839 3843 3847
.RMGC 143 147 149 151 153 164 168 170 172 174 191 193 197 199
212 214 218 220 359 370 375 377 386 388 414 416 418 431
433 437 452 454 458 550 552 554 556 558 563 565 567 569
571 661 663 665 667 669 674 676 678 680 682 801 803 812 SEQ 1993
814 825 827 836 838 852 863 865 881 883 887 902 904 908
1067 1069 1076 1078 1087 1093 1095 1102 1109 1114 1116 1246 1252 1254
1265 1267 1274 1279 1281 1478 1480 1487 1489 1498 1504 1506 1513 1520
1525 1527 1663 1668 1878 1884 1886 1888 1895 1897 1974 1976 1978 1981
1983 2212 2246 2253 2263 2265 2272 2277 2282 2284 2297 2299 2303 2318
2320 2324 2541 2575 2582 2592 2594 2601 2606 2611 2613 2626 2628 2632
2647 2649 2653 2815 2817 2819 2821 2823 2825 2827 2829 2834 2836 2838
2853 2859 2861 2866 2871 2873 2877 2881 2885 2889 2893 2897 2901 2905
2922 2924 2928 2943 2945 2949 3113 3115 3117 3119 3121 3123 3125 3127
3132 3134 3136 3138 3153 3159 3161 3166 3171 3173 3177 3181 3185 3189
3193 3197 3201 3205 3222 3224 3228 3243 3245 3249 3413 3415 3417 3419
3421 3423 3425 3427 3429 3431 3436 3438 3440 3442 3457 3463 3465 3470
3475 3477 3481 3485 3489 3493 3497 3501 3505 3509 3513 3517 3534 3536
3540 3555 3557 3561 3733 3735 3737 3739 3741 3743 3745 3747 3749 3751
3753 3755 3760 3762 3764 3779 3785 3787 3792 3797 3799 3803 3807 3811
3815 3819 3823 3827 3831 3835 3839 3843 3847 3864 3866 3870 3885 3887
3891
.ROENA 147 149 168 170 191 199 212 220 370 375 414 416 418 431
452 550 552 558 563 565 571 661 663 669 674 676 682 801
812 825 836 881 902 1069 1078 1102 1252 1267 1480 1489 1513 1663
1668 1978 1983 2272 2277 2297 2318 2601 2606 2626 2647 2836 2877 2881
2885 2889 2893 2897 2901 2905 2922 2943 3134 3177 3181 3185 3189 3193
3197 3201 3205 3222 3243 3438 3481 3485 3489 3493 3497 3501 3505 3509
3513 3517 3534 3555 3762 3803 3807 3811 3815 3819 3823 3827 3831 3835
3839 3843 3847 3864 3885
.ROR 143 145 149 153 164 166 170 174 191 197 199 212 218 220
359 365 375 377 386 388 414 416 418 431 437 452 458 556
569 667 680 801 803 805 812 814 825 827 838 840 881 887
902 908 1078 1095 1102 1252 1256 1258 1267 1489 1506 1513 1886 1976
1978 2229 2265 2272 2277 2297 2303 2318 2324 2558 2594 2601 2606 2626
2632 2647 2653 2815 2817 2819 2821 2823 2825 2827 2829 2861 2922 2928
2943 2949 3113 3115 3117 3119 3121 3123 3125 3127 3161 3222 3228 3243
3249 3413 3415 3417 3419 3421 3423 3425 3427 3429 3431 3465 3534 3540
3555 3561 3733 3735 3737 3739 3741 3743 3745 3747 3749 3751 3753 3755
3787 3864 3870 3885 3891
.RPLUS 185 189 206 210 363 367 409 425 429 446 450 875 879 896
900 1097 1241 1254 1508 1663 1668 2239 2291 2295 2312 2316 2568 2620
2624 2641 2645 2916 2920 2937 2941 3216 3220 3237 3241 3528 3532 3549
3553 3858 3862 3879 3883
.RRDLM 386 2815 2817 2819 2821 2823 2825 2827 2829 3113 3115 3117 3119 3121
3123 3125 3127 3413 3415 3417 3419 3421 3423 3425 3427 3429 3431 3733
3735 3737 3739 3741 3743 3745 3747 3749 3751 3753 3755
.RRMIN 155 176
.RRPCT 145 166 189 210 365 397 429 450 879 900 2216 2257 2295 2316
2545 2586 2624 2645 2920 2941 3220 3241 3532 3553 3862 3883
.RS0A 145 147 149 166 168 170 191 197 199 212 218 220 361 370
375 405 407 414 416 418 431 437 452 458 550 552 558 561
563 565 571 661 663 669 672 674 676 682 799 801 805 812
816 825 829 836 840 881 887 902 908 1069 1078 1102 1241 1252
1267 1480 1489 1513 1661 1666 1978 1983 2229 2239 2272 2277 2297 2303
2318 2324 2558 2568 2601 2606 2626 2632 2647 2653 2836 2840 2877 2881
2885 2889 2893 2897 2901 2905 2922 2928 2943 2949 3134 3140 3177 3181
3185 3189 3193 3197 3201 3205 3222 3228 3243 3249 3438 3444 3481 3485 SEQ 1994
3489 3493 3497 3501 3505 3509 3513 3517 3534 3540 3555 3561 3762 3766
3803 3807 3811 3815 3819 3823 3827 3831 3835 3839 3843 3847 3864 3870
3885 3891
.RS0B 185 206 363 365 367 409 425 446 823 875 896 1050 1097 1239
1254 1256 1258 1458 1508 1663 1668 2218 2291 2312 2547 2620 2641 2916
2937 3216 3237 3528 3549 3858 3879
.RSAB 155 176 189 210 379 390 429 450 879 900 2295 2316 2624 2645
2920 2941 3220 3241 3532 3553 3862 3883
.RSD0 143 151 153 164 172 174 183 204 359 377 386 388 423 444
554 556 567 569 665 667 678 680 803 814 827 838 873 894
1095 1506 1886 1976 2265 2289 2310 2594 2618 2639 2815 2817 2819 2821
2823 2825 2827 2829 2861 2914 2935 3113 3115 3117 3119 3121 3123 3125
3127 3136 3161 3214 3235 3413 3415 3417 3419 3421 3423 3425 3427 3429
3431 3440 3465 3526 3547 3733 3735 3737 3739 3741 3743 3745 3747 3749
3751 3753 3755 3787 3856 3877
.RSELC 812 836 852 863 1067 1076 1087 1093 1114 1246 1254 1265 1279 1478
1487 1498 1504 1525 1878 1884 1888 1895 1974 1981 2246 2253 2263 2282
2575 2582 2592 2611 2853 2859 2866 2871 3153 3159 3166 3171 3457 3463
3470 3475 3764 3779 3785 3792 3797
.RSELE 191 193 197 199 212 214 218 220 414 416 418 431 433 437
452 454 458 558 571 669 682 881 883 887 902 904 908 1069
1078 1102 1267 1480 1489 1513 1663 1668 1978 1983 2272 2277 2297 2299
2303 2318 2320 2324 2601 2606 2626 2628 2632 2647 2649 2653 2922 2924
2928 2943 2945 2949 3222 3224 3228 3243 3245 3249 3534 3536 3540 3555
3557 3561 3864 3866 3870 3885 3887 3891
.RSELF 147 168 375 386 550 563 661 674 801 825 1252 2836 2838 3138
3442 3762
.RSELM 149 153 170 174 377 388 552 556 565 569 663 667 676 680
803 814 827 838 865 1095 1109 1116 1274 1281 1506 1520 1527 1886
1897 1976 2212 2265 2284 2541 2594 2613 2834 2861 2873 3132 3134 3161
3173 3436 3438 3465 3477 3760 3787 3799
.RSELP 151 172 554 567 665 678 3136 3440
.RSKCN 143 164 359
.RSMIN 379 390
.RTIM 1666 1668
.RXNOR 147 168 370 552 563 565 663 674 676 816 823 829 836 1069
1480
ATABLE 537 539 541 648 650 652 1959 1961 1962 1964
CALC 141 143 145 147 149 151 153 155 157 162 164 166 168 170 SEQ 1995
172 174 176 178 183 185 187 189 191 193 195 197 199 204
206 208 210 212 214 216 218 220 359 361 363 365 367 370
375 377 379 381 386 388 390 392 397 399 405 407 409 414
416 418 423 425 427 429 431 433 435 437 439 444 446 448
450 452 454 456 458 460 550 552 554 556 558 561 563 565
567 569 571 661 663 665 667 669 672 674 676 678 680 682
799 801 803 805 807 812 814 816 818 823 825 827 829 831
836 838 840 842 847 852 854 856 858 863 865 868 873 875
877 879 881 883 885 887 889 894 896 898 900 902 904 906
908 910 1050 1052 1054 1056 1058 1060 1062 1067 1069 1071 1076 1078
1080 1087 1089 1091 1093 1095 1097 1102 1104 1109 1114 1116 1239 1241
1246 1248 1250 1252 1254 1256 1258 1260 1265 1267 1269 1274 1279 1281
1458 1460 1462 1464 1466 1468 1470 1472 1478 1480 1482 1487 1489 1491
1498 1500 1502 1504 1506 1508 1513 1515 1520 1525 1527 1661 1663 1666
1668 1878 1880 1882 1884 1886 1888 1890 1895 1897 1974 1976 1978 1981
1983 2212 2214 2216 2218 2220 2222 2227 2229 2231 2233 2235 2237 2239
2241 2246 2253 2255 2257 2259 2261 2263 2265 2267 2272 2277 2282 2284
2289 2291 2293 2295 2297 2299 2301 2303 2305 2310 2312 2314 2316 2318
2320 2322 2324 2326 2541 2543 2545 2547 2549 2551 2556 2558 2560 2562
2564 2566 2568 2570 2575 2582 2584 2586 2588 2590 2592 2594 2596 2601
2606 2611 2613 2618 2620 2622 2624 2626 2628 2630 2632 2634 2639 2641
2643 2645 2647 2649 2651 2653 2655 2815 2817 2819 2821 2823 2825 2827
2829 2834 2836 2838 2840 2842 2844 2846 2848 2853 2855 2857 2859 2861
2866 2871 2873 2875 2877 2879 2881 2883 2885 2887 2889 2891 2893 2895
2897 2899 2901 2903 2905 2907 2909 2914 2916 2918 2920 2922 2924 2926
2928 2930 2935 2937 2939 2941 2943 2945 2947 2949 2951 3113 3115 3117
3119 3121 3123 3125 3127 3132 3134 3136 3138 3140 3142 3144 3146 3148
3153 3155 3157 3159 3161 3166 3171 3173 3175 3177 3179 3181 3183 3185
3187 3189 3191 3193 3195 3197 3199 3201 3203 3205 3207 3209 3214 3216
3218 3220 3222 3224 3226 3228 3230 3235 3237 3239 3241 3243 3245 3247
3249 3251 3413 3415 3417 3419 3421 3423 3425 3427 3429 3431 3436 3438
3440 3442 3444 3446 3448 3450 3452 3457 3459 3461 3463 3465 3470 3475
3477 3479 3481 3483 3485 3487 3489 3491 3493 3495 3497 3499 3501 3503
3505 3507 3509 3511 3513 3515 3517 3519 3521 3526 3528 3530 3532 3534
3536 3538 3540 3542 3547 3549 3551 3553 3555 3557 3559 3561 3563 3733
3735 3737 3739 3741 3743 3745 3747 3749 3751 3753 3755 3760 3762 3764
3766 3768 3770 3772 3774 3779 3781 3783 3785 3787 3792 3797 3799 3801
3803 3805 3807 3809 3811 3813 3815 3817 3819 3821 3823 3825 3827 3829
3831 3833 3835 3837 3839 3841 3843 3845 3847 3849 3851 3856 3858 3860
3862 3864 3866 3868 3870 3872 3877 3879 3881 3883 3885 3887 3889 3891
3893
CONCAT 141 143 145 147 149 151 153 155 157 162 164 166 168 170
172 174 176 178 183 185 187 189 191 193 195 197 199 204
206 208 210 212 214 216 218 220 359 361 363 365 367 370
375 377 379 381 386 388 390 392 397 399 405 407 409 414
416 418 423 425 427 429 431 433 435 437 439 444 446 448
450 452 454 456 458 460 550 552 554 556 558 561 563 565
567 569 571 661 663 665 667 669 672 674 676 678 680 682
799 801 803 805 807 812 814 816 818 823 825 827 829 831
836 838 840 842 847 852 854 856 858 863 865 868 873 875
877 879 881 883 885 887 889 894 896 898 900 902 904 906
908 910 1050 1052 1054 1056 1058 1060 1062 1067 1069 1071 1076 1078
1080 1087 1089 1091 1093 1095 1097 1102 1104 1109 1114 1116 1239 1241 SEQ 1996
1246 1248 1250 1252 1254 1256 1258 1260 1265 1267 1269 1274 1279 1281
1458 1460 1462 1464 1466 1468 1470 1472 1478 1480 1482 1487 1489 1491
1498 1500 1502 1504 1506 1508 1513 1515 1520 1525 1527 1661 1663 1666
1668 1878 1880 1882 1884 1886 1888 1890 1895 1897 1974 1976 1978 1981
1983 2212 2214 2216 2218 2220 2222 2227 2229 2231 2233 2235 2237 2239
2241 2246 2253 2255 2257 2259 2261 2263 2265 2267 2272 2277 2282 2284
2289 2291 2293 2295 2297 2299 2301 2303 2305 2310 2312 2314 2316 2318
2320 2322 2324 2326 2541 2543 2545 2547 2549 2551 2556 2558 2560 2562
2564 2566 2568 2570 2575 2582 2584 2586 2588 2590 2592 2594 2596 2601
2606 2611 2613 2618 2620 2622 2624 2626 2628 2630 2632 2634 2639 2641
2643 2645 2647 2649 2651 2653 2655 2815 2817 2819 2821 2823 2825 2827
2829 2834 2836 2838 2840 2842 2844 2846 2848 2853 2855 2857 2859 2861
2866 2871 2873 2875 2877 2879 2881 2883 2885 2887 2889 2891 2893 2895
2897 2899 2901 2903 2905 2907 2909 2914 2916 2918 2920 2922 2924 2926
2928 2930 2935 2937 2939 2941 2943 2945 2947 2949 2951 3113 3115 3117
3119 3121 3123 3125 3127 3132 3134 3136 3138 3140 3142 3144 3146 3148
3153 3155 3157 3159 3161 3166 3171 3173 3175 3177 3179 3181 3183 3185
3187 3189 3191 3193 3195 3197 3199 3201 3203 3205 3207 3209 3214 3216
3218 3220 3222 3224 3226 3228 3230 3235 3237 3239 3241 3243 3245 3247
3249 3251 3413 3415 3417 3419 3421 3423 3425 3427 3429 3431 3436 3438
3440 3442 3444 3446 3448 3450 3452 3457 3459 3461 3463 3465 3470 3475
3477 3479 3481 3483 3485 3487 3489 3491 3493 3495 3497 3499 3501 3503
3505 3507 3509 3511 3513 3515 3517 3519 3521 3526 3528 3530 3532 3534
3536 3538 3540 3542 3547 3549 3551 3553 3555 3557 3559 3561 3563 3733
3735 3737 3739 3741 3743 3745 3747 3749 3751 3753 3755 3760 3762 3764
3766 3768 3770 3772 3774 3779 3781 3783 3785 3787 3792 3797 3799 3801
3803 3805 3807 3809 3811 3813 3815 3817 3819 3821 3823 3825 3827 3829
3831 3833 3835 3837 3839 3841 3843 3845 3847 3849 3851 3856 3858 3860
3862 3864 3866 3868 3870 3872 3877 3879 3881 3883 3885 3887 3889 3891
3893
CTABLE 987 988 989 990 991 1187 1188 1189 1190 1191 1374 1375 1376 1377
1378 1379
FIELD 141 143 145 147 149 151 153 155 157 162 164 166 168 170
172 174 176 178 183 185 187 189 191 193 195 197 199 204
206 208 210 212 214 216 218 220 359 361 363 365 367 370
375 377 379 381 386 388 390 392 397 399 405 407 409 414
416 418 423 425 427 429 431 433 435 437 439 444 446 448
450 452 454 456 458 460 550 552 554 556 558 561 563 565
567 569 571 661 663 665 667 669 672 674 676 678 680 682
799 801 803 805 807 812 814 816 818 823 825 827 829 831
836 838 840 842 847 852 854 856 858 863 865 868 873 875
877 879 881 883 885 887 889 894 896 898 900 902 904 906
908 910 1050 1052 1054 1056 1058 1060 1062 1067 1069 1071 1076 1078
1080 1087 1089 1091 1093 1095 1097 1102 1104 1109 1114 1116 1239 1241
1246 1248 1250 1252 1254 1256 1258 1260 1265 1267 1269 1274 1279 1281
1458 1460 1462 1464 1466 1468 1470 1472 1478 1480 1482 1487 1489 1491
1498 1500 1502 1504 1506 1508 1513 1515 1520 1525 1527 1661 1663 1666
1668 1878 1880 1882 1884 1886 1888 1890 1895 1897 1974 1976 1978 1981
1983 2212 2214 2216 2218 2220 2222 2227 2229 2231 2233 2235 2237 2239
2241 2246 2253 2255 2257 2259 2261 2263 2265 2267 2272 2277 2282 2284
2289 2291 2293 2295 2297 2299 2301 2303 2305 2310 2312 2314 2316 2318
2320 2322 2324 2326 2541 2543 2545 2547 2549 2551 2556 2558 2560 2562
2564 2566 2568 2570 2575 2582 2584 2586 2588 2590 2592 2594 2596 2601 SEQ 1997
2606 2611 2613 2618 2620 2622 2624 2626 2628 2630 2632 2634 2639 2641
2643 2645 2647 2649 2651 2653 2655 2815 2817 2819 2821 2823 2825 2827
2829 2834 2836 2838 2840 2842 2844 2846 2848 2853 2855 2857 2859 2861
2866 2871 2873 2875 2877 2879 2881 2883 2885 2887 2889 2891 2893 2895
2897 2899 2901 2903 2905 2907 2909 2914 2916 2918 2920 2922 2924 2926
2928 2930 2935 2937 2939 2941 2943 2945 2947 2949 2951 3113 3115 3117
3119 3121 3123 3125 3127 3132 3134 3136 3138 3140 3142 3144 3146 3148
3153 3155 3157 3159 3161 3166 3171 3173 3175 3177 3179 3181 3183 3185
3187 3189 3191 3193 3195 3197 3199 3201 3203 3205 3207 3209 3214 3216
3218 3220 3222 3224 3226 3228 3230 3235 3237 3239 3241 3243 3245 3247
3249 3251 3413 3415 3417 3419 3421 3423 3425 3427 3429 3431 3436 3438
3440 3442 3444 3446 3448 3450 3452 3457 3459 3461 3463 3465 3470 3475
3477 3479 3481 3483 3485 3487 3489 3491 3493 3495 3497 3499 3501 3503
3505 3507 3509 3511 3513 3515 3517 3519 3521 3526 3528 3530 3532 3534
3536 3538 3540 3542 3547 3549 3551 3553 3555 3557 3559 3561 3563 3733
3735 3737 3739 3741 3743 3745 3747 3749 3751 3753 3755 3760 3762 3764
3766 3768 3770 3772 3774 3779 3781 3783 3785 3787 3792 3797 3799 3801
3803 3805 3807 3809 3811 3813 3815 3817 3819 3821 3823 3825 3827 3829
3831 3833 3835 3837 3839 3841 3843 3845 3847 3849 3851 3856 3858 3860
3862 3864 3866 3868 3870 3872 3877 3879 3881 3883 3885 3887 3889 3891
3893
GO 79 81 87 93 94 269 271 277 283 284 313 316 318 319
323 326 328 329 333 336 338 339 505 507 513 519 616 618
624 630 733 735 747 748 776 778 779 783 787 955 957 968
969 995 1030 1033 1035 1037 1038 1041 1155 1157 1168 1169 1195 1225
1232 1335 1337 1348 1349 1403 1438 1441 1443 1445 1446 1449 1572 1578
1580 1587 1591 1621 1623 1625 1627 1629 1630 1701 1703 1716 1717 1745
1747 1749 1753 1757 1763 1764 1816 1822 1927 1929 1935 1941 2029 2031
2037 2043 2052 2054 2055 2062 2064 2065 2090 2093 2095 2097 2099 2101
2105 2371 2373 2379 2385 2394 2396 2397 2404 2406 2407 2432 2435 2437
2439 2441 2443 2447 2700 2702 2708 2714 2745 2747 2749 2753 2757 2760
2762 2764 2766 2998 3000 3006 3012 3043 3045 3047 3051 3055 3058 3060
3062 3064 3296 3298 3304 3310 3341 3343 3345 3349 3353 3356 3358 3360
3362 3605 3607 3613 3619 3650 3652 3654 3658 3662 3665 3667 3669 3671
3678 3681 3683 3685
MFLD 141# 141 143# 143 145# 145 147# 147 149# 149 151# 151 153# 153
155# 155 157# 157 162# 162 164# 164 166# 166 168# 168 170# 170
172# 172 174# 174 176# 176 178# 178 183# 183 185# 185 187# 187
189# 189 191# 191 193# 193 195# 195 197# 197 199# 199 204# 204
206# 206 208# 208 210# 210 212# 212 214# 214 216# 216 218# 218
220# 220 359# 359 361# 361 363# 363 365# 365 367# 367 370# 370
375# 375 377# 377 379# 379 381# 381 386# 386 388# 388 390# 390
392# 392 397# 397 399# 399 405# 405 407# 407 409# 409 414# 414
416# 416 418# 418 423# 423 425# 425 427# 427 429# 429 431# 431
433# 433 435# 435 437# 437 439# 439 444# 444 446# 446 448# 448
450# 450 452# 452 454# 454 456# 456 458# 458 460# 460 550# 550
552# 552 554# 554 556# 556 558# 558 561# 561 563# 563 565# 565
567# 567 569# 569 571# 571 661# 661 663# 663 665# 665 667# 667
669# 669 672# 672 674# 674 676# 676 678# 678 680# 680 682# 682
799# 799 801# 801 803# 803 805# 805 807# 807 812# 812 814# 814
816# 816 818# 818 823# 823 825# 825 827# 827 829# 829 831# 831
836# 836 838# 838 840# 840 842# 842 847# 847 852# 852 854# 854
856# 856 858# 858 863# 863 865# 865 868# 868 873# 873 875# 875 SEQ 1998
877# 877 879# 879 881# 881 883# 883 885# 885 887# 887 889# 889
894# 894 896# 896 898# 898 900# 900 902# 902 904# 904 906# 906
908# 908 910# 910 1050# 1050 1052# 1052 1054# 1054 1056# 1056 1058# 1058
1060# 1060 1062# 1062 1067# 1067 1069# 1069 1071# 1071 1076# 1076 1078# 1078
1080# 1080 1087# 1087 1089# 1089 1091# 1091 1093# 1093 1095# 1095 1097# 1097
1102# 1102 1104# 1104 1109# 1109 1114# 1114 1116# 1116 1239# 1239 1241# 1241
1246# 1246 1248# 1248 1250# 1250 1252# 1252 1254# 1254 1256# 1256 1258# 1258
1260# 1260 1265# 1265 1267# 1267 1269# 1269 1274# 1274 1279# 1279 1281# 1281
1458# 1458 1460# 1460 1462# 1462 1464# 1464 1466# 1466 1468# 1468 1470# 1470
1472# 1472 1478# 1478 1480# 1480 1482# 1482 1487# 1487 1489# 1489 1491# 1491
1498# 1498 1500# 1500 1502# 1502 1504# 1504 1506# 1506 1508# 1508 1513# 1513
1515# 1515 1520# 1520 1525# 1525 1527# 1527 1661# 1661 1663# 1663 1666# 1666
1668# 1668 1878# 1878 1880# 1880 1882# 1882 1884# 1884 1886# 1886 1888# 1888
1890# 1890 1895# 1895 1897# 1897 1974# 1974 1976# 1976 1978# 1978 1981# 1981
1983# 1983 2212# 2212 2214# 2214 2216# 2216 2218# 2218 2220# 2220 2222# 2222
2227# 2227 2229# 2229 2231# 2231 2233# 2233 2235# 2235 2237# 2237 2239# 2239
2241# 2241 2246# 2246 2253# 2253 2255# 2255 2257# 2257 2259# 2259 2261# 2261
2263# 2263 2265# 2265 2267# 2267 2272# 2272 2277# 2277 2282# 2282 2284# 2284
2289# 2289 2291# 2291 2293# 2293 2295# 2295 2297# 2297 2299# 2299 2301# 2301
2303# 2303 2305# 2305 2310# 2310 2312# 2312 2314# 2314 2316# 2316 2318# 2318
2320# 2320 2322# 2322 2324# 2324 2326# 2326 2541# 2541 2543# 2543 2545# 2545
2547# 2547 2549# 2549 2551# 2551 2556# 2556 2558# 2558 2560# 2560 2562# 2562
2564# 2564 2566# 2566 2568# 2568 2570# 2570 2575# 2575 2582# 2582 2584# 2584
2586# 2586 2588# 2588 2590# 2590 2592# 2592 2594# 2594 2596# 2596 2601# 2601
2606# 2606 2611# 2611 2613# 2613 2618# 2618 2620# 2620 2622# 2622 2624# 2624
2626# 2626 2628# 2628 2630# 2630 2632# 2632 2634# 2634 2639# 2639 2641# 2641
2643# 2643 2645# 2645 2647# 2647 2649# 2649 2651# 2651 2653# 2653 2655# 2655
2815# 2815 2817# 2817 2819# 2819 2821# 2821 2823# 2823 2825# 2825 2827# 2827
2829# 2829 2834# 2834 2836# 2836 2838# 2838 2840# 2840 2842# 2842 2844# 2844
2846# 2846 2848# 2848 2853# 2853 2855# 2855 2857# 2857 2859# 2859 2861# 2861
2866# 2866 2871# 2871 2873# 2873 2875# 2875 2877# 2877 2879# 2879 2881# 2881
2883# 2883 2885# 2885 2887# 2887 2889# 2889 2891# 2891 2893# 2893 2895# 2895
2897# 2897 2899# 2899 2901# 2901 2903# 2903 2905# 2905 2907# 2907 2909# 2909
2914# 2914 2916# 2916 2918# 2918 2920# 2920 2922# 2922 2924# 2924 2926# 2926
2928# 2928 2930# 2930 2935# 2935 2937# 2937 2939# 2939 2941# 2941 2943# 2943
2945# 2945 2947# 2947 2949# 2949 2951# 2951 3113# 3113 3115# 3115 3117# 3117
3119# 3119 3121# 3121 3123# 3123 3125# 3125 3127# 3127 3132# 3132 3134# 3134
3136# 3136 3138# 3138 3140# 3140 3142# 3142 3144# 3144 3146# 3146 3148# 3148
3153# 3153 3155# 3155 3157# 3157 3159# 3159 3161# 3161 3166# 3166 3171# 3171
3173# 3173 3175# 3175 3177# 3177 3179# 3179 3181# 3181 3183# 3183 3185# 3185
3187# 3187 3189# 3189 3191# 3191 3193# 3193 3195# 3195 3197# 3197 3199# 3199
3201# 3201 3203# 3203 3205# 3205 3207# 3207 3209# 3209 3214# 3214 3216# 3216
3218# 3218 3220# 3220 3222# 3222 3224# 3224 3226# 3226 3228# 3228 3230# 3230
3235# 3235 3237# 3237 3239# 3239 3241# 3241 3243# 3243 3245# 3245 3247# 3247
3249# 3249 3251# 3251 3413# 3413 3415# 3415 3417# 3417 3419# 3419 3421# 3421
3423# 3423 3425# 3425 3427# 3427 3429# 3429 3431# 3431 3436# 3436 3438# 3438
3440# 3440 3442# 3442 3444# 3444 3446# 3446 3448# 3448 3450# 3450 3452# 3452
3457# 3457 3459# 3459 3461# 3461 3463# 3463 3465# 3465 3470# 3470 3475# 3475
3477# 3477 3479# 3479 3481# 3481 3483# 3483 3485# 3485 3487# 3487 3489# 3489
3491# 3491 3493# 3493 3495# 3495 3497# 3497 3499# 3499 3501# 3501 3503# 3503
3505# 3505 3507# 3507 3509# 3509 3511# 3511 3513# 3513 3515# 3515 3517# 3517
3519# 3519 3521# 3521 3526# 3526 3528# 3528 3530# 3530 3532# 3532 3534# 3534
3536# 3536 3538# 3538 3540# 3540 3542# 3542 3547# 3547 3549# 3549 3551# 3551 SEQ 1999
3553# 3553 3555# 3555 3557# 3557 3559# 3559 3561# 3561 3563# 3563 3733# 3733
3735# 3735 3737# 3737 3739# 3739 3741# 3741 3743# 3743 3745# 3745 3747# 3747
3749# 3749 3751# 3751 3753# 3753 3755# 3755 3760# 3760 3762# 3762 3764# 3764
3766# 3766 3768# 3768 3770# 3770 3772# 3772 3774# 3774 3779# 3779 3781# 3781
3783# 3783 3785# 3785 3787# 3787 3792# 3792 3797# 3797 3799# 3799 3801# 3801
3803# 3803 3805# 3805 3807# 3807 3809# 3809 3811# 3811 3813# 3813 3815# 3815
3817# 3817 3819# 3819 3821# 3821 3823# 3823 3825# 3825 3827# 3827 3829# 3829
3831# 3831 3833# 3833 3835# 3835 3837# 3837 3839# 3839 3841# 3841 3843# 3843
3845# 3845 3847# 3847 3849# 3849 3851# 3851 3856# 3856 3858# 3858 3860# 3860
3862# 3862 3864# 3864 3866# 3866 3868# 3868 3870# 3870 3872# 3872 3877# 3877
3879# 3879 3881# 3881 3883# 3883 3885# 3885 3887# 3887 3889# 3889 3891# 3891
3893# 3893
MWORD 141 143 145 147 149 151 153 155 157 162 164 166 168 170
172 174 176 178 183 185 187 189 191 193 195 197 199 204
206 208 210 212 214 216 218 220 359 361 363 365 367 370
375 377 379 381 386 388 390 392 397 399 405 407 409 414
416 418 423 425 427 429 431 433 435 437 439 444 446 448
450 452 454 456 458 460 550 552 554 556 558 561 563 565
567 569 571 661 663 665 667 669 672 674 676 678 680 682
799 801 803 805 807 812 814 816 818 823 825 827 829 831
836 838 840 842 847 852 854 856 858 863 865 868 873 875
877 879 881 883 885 887 889 894 896 898 900 902 904 906
908 910 1050 1052 1054 1056 1058 1060 1062 1067 1069 1071 1076 1078
1080 1087 1089 1091 1093 1095 1097 1102 1104 1109 1114 1116 1239 1241
1246 1248 1250 1252 1254 1256 1258 1260 1265 1267 1269 1274 1279 1281
1458 1460 1462 1464 1466 1468 1470 1472 1478 1480 1482 1487 1489 1491
1498 1500 1502 1504 1506 1508 1513 1515 1520 1525 1527 1661 1663 1666
1668 1878 1880 1882 1884 1886 1888 1890 1895 1897 1974 1976 1978 1981
1983 2212 2214 2216 2218 2220 2222 2227 2229 2231 2233 2235 2237 2239
2241 2246 2253 2255 2257 2259 2261 2263 2265 2267 2272 2277 2282 2284
2289 2291 2293 2295 2297 2299 2301 2303 2305 2310 2312 2314 2316 2318
2320 2322 2324 2326 2541 2543 2545 2547 2549 2551 2556 2558 2560 2562
2564 2566 2568 2570 2575 2582 2584 2586 2588 2590 2592 2594 2596 2601
2606 2611 2613 2618 2620 2622 2624 2626 2628 2630 2632 2634 2639 2641
2643 2645 2647 2649 2651 2653 2655 2815 2817 2819 2821 2823 2825 2827
2829 2834 2836 2838 2840 2842 2844 2846 2848 2853 2855 2857 2859 2861
2866 2871 2873 2875 2877 2879 2881 2883 2885 2887 2889 2891 2893 2895
2897 2899 2901 2903 2905 2907 2909 2914 2916 2918 2920 2922 2924 2926
2928 2930 2935 2937 2939 2941 2943 2945 2947 2949 2951 3113 3115 3117
3119 3121 3123 3125 3127 3132 3134 3136 3138 3140 3142 3144 3146 3148
3153 3155 3157 3159 3161 3166 3171 3173 3175 3177 3179 3181 3183 3185
3187 3189 3191 3193 3195 3197 3199 3201 3203 3205 3207 3209 3214 3216
3218 3220 3222 3224 3226 3228 3230 3235 3237 3239 3241 3243 3245 3247
3249 3251 3413 3415 3417 3419 3421 3423 3425 3427 3429 3431 3436 3438
3440 3442 3444 3446 3448 3450 3452 3457 3459 3461 3463 3465 3470 3475
3477 3479 3481 3483 3485 3487 3489 3491 3493 3495 3497 3499 3501 3503
3505 3507 3509 3511 3513 3515 3517 3519 3521 3526 3528 3530 3532 3534
3536 3538 3540 3542 3547 3549 3551 3553 3555 3557 3559 3561 3563 3733
3735 3737 3739 3741 3743 3745 3747 3749 3751 3753 3755 3760 3762 3764
3766 3768 3770 3772 3774 3779 3781 3783 3785 3787 3792 3797 3799 3801
3803 3805 3807 3809 3811 3813 3815 3817 3819 3821 3823 3825 3827 3829
3831 3833 3835 3837 3839 3841 3843 3845 3847 3849 3851 3856 3858 3860
3862 3864 3866 3868 3870 3872 3877 3879 3881 3883 3885 3887 3889 3891 SEQ 2000
3893
PDEC 1019 1218 1427
PNT3 3101 3401
PNTDEC 1024 1432 1643 1647 1651 1655 1870
PNTHW 348 351 1045 1453 1831 1834 1837 1842 2200 2529 2803
PNTMSG 134 135 344 345 346 349 1016 1017 1018 1020 1022 1025 1043 1215
1216 1217 1219 1424 1425 1426 1428 1430 1433 1451 1637 1641 1644 1645
1648 1649 1652 1653 1656 1812 1814 1818 1820 1829 1832 1835 1840 1843
1846 1848 1850 1852 1854 1856 1858 1860 1862 1863 1866 1867 1871 2198
2203 2205 2527 2532 2534 2801 2806 2808 3099 3104 3106 3399 3404 3406
3719 3724 3726
PNTOCS 1865 1873 3721
RTN 82 108 132 272 298 343 352 508 533 619 644 736 762 788
958 983 1001 1042 1046 1158 1183 1201 1229 1233 1364 1370 1395 1409
1450 1454 1576 1581 1617 1631 1640 1657 1704 1731 1758 1795 1823 1838
1874 1930 1955 2032 2077 2109 2206 2374 2419 2451 2535 2703 2728 2767
2772 2781 2809 3001 3026 3065 3070 3079 3107 3299 3324 3363 3368 3377
3407 3608 3633 3672 3686 3695 3727
SCOPER 101 291 526 637 755 976 1176 1356 1611 1724 1948 2070 2412 2721
3019 3317 3626
TMSG 1020 1025 1219 1428 1433 1644 1648 1652 1656 1846 1848 1850 1852 1854
1856 1858 1860 1862 1863 1867 1871
TMSGC 134 135 344 345 346 349 1016 1017 1018 1022 1043 1215 1216 1217
1424 1425 1426 1430 1451 1637 1641 1645 1649 1653 1812 1814 1818 1820
1829 1832 1835 1840 1843 1866 2198 2203 2205 2527 2532 2534 2801 2806
2808 3099 3104 3106 3399 3404 3406 3719 3724 3726
TTABLE 114 115 116 120 121 122 123 302 303 304 305 766 767 768
769 770 1735 1736 1737 1738 1739 2081 2082 2083 2084 2423 2424 2425
2426 2732 2733 2734 2735 2736 2737 2738 2739 3030 3031 3032 3033 3034
3035 3036 3037 3328 3329 3330 3331 3332 3333 3334 3335 3637 3638 3639
3640 3641 3642 3643 3644
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 1
DFPTAI MAC 24-Apr-84 10:48 Port Controller Utility Package SEQ 2001
1 SUBTTL Port Controller Utility Package
2
3 SALL
4
5 SEARCH DFPTA,MONSYM
6
7 ; Register Read/write routines
8
9 ENTRY .CONI,.CONO,.DATAO,.DATAI
10 ENTRY LDEBUF,LDRAR,LDCRAM,LDCSR
11 ENTRY RDEBUF,RDLAR,RDCRAM,RDCSR
12
13 ; Port specific utility routines
14
15 ENTRY SETEBU,SETLAR,CLREBU,CHKCSR
16 ENTRY IPACLR,IPASRT,IPASTP,ERESET,IPASST,ISTOP
17 INTERN SNEXT,SLAST,EADDR,AADDR,SDATA,HAVENI,HAVECI
18
19 ; PI system handling routines
20
21 ENTRY INITPI,INITPD,.PIOFF,.PION,PISYOF
22 ENTRY PISYON,SETVEC,.INPNT
23 INTERN INTNUM,INTPC,INTTYP,INTCON,INTAPR,INTTIM,INTUSE
24 INTERN INTCSR,INTEND,.INWD1,.INWD2,IDELAY
25
26 ; Channel handling routines
27
28 ENTRY CHINIT,GENCCW
29 ENTRY GETLOG,CCWPNT,LOGPNT,CHDATA
30 INTERN CBASE,LOGBUF
31
32 ; User mode support routines
33
34 ENTRY DSETUP,DEVREQ,DEVREL,REQ1,REQ2,REL
35 ENTRY USRION,USRIOF
36 INTERN SNARKF
37
38 ; Miscellaneous routines
39
40 ENTRY FFF ; fatal error routine
41 ENTRY PFSET,PFCLR ; page fail handling routines
42 INTERN PFAIL,PFAPR,PF500,PF501,PF502 ; page fail data
43
44 ; EXTERN's located in DFPTAU.MAC (Utility Routines module)
45
46 EXTERN .CLOSE,.EXIT,SWITT,RUNTME,DEBTIM,USTIM
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 2
DFPTAI MAC 24-Apr-84 10:48 Port Controller Utility Package SEQ 2002
47
48 ; EXTERN's located in DFPTA1.MAC (Mainline code..)
49
50 EXTERN UDEBUG,CBUF,CSTWRD,PORTNI,PORTCI,NISEL,CISEL
51 EXTERN PMODE,ODELAY
52
53
54 ;#********************************************************************
55 ; ZI - Address for use in DDT
56 ;#********************************************************************
57
58 000000' ZI: ; address of 00000'
59
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 3
DFPTAI MAC 24-Apr-84 10:48 Port Register Read/Write Routines SEQ 2003
60 SUBTTL Port Register Read/Write Routines
61
62 ;#*********************************************************************
63 ;* Notes On I/O Routine Design
64 ;
65 ; 1. All code in this file is re-entrant with the exception of the
66 ; user mode stuff which need not be since the PI system cannot
67 ; be used in user mode.
68 ;
69 ; 2. No AC's are modified unless they return data.
70 ;
71 ; 3. If in (exec mode) with a port it is necessary for the channel
72 ; routines to do a limited amount of paging, a location "CBASE"
73 ; must be set up as a paged address of "0". Then the routines
74 ; will then work properly.
75 ;
76 ; The following routines are given:
77 ;
78 ; Port Register Load/Read Routines:
79 ;
80 ; LDEBUF This is a DATAO with 'Diag Test EBUF' bit set
81 ; in the CSR Register.
82 ;
83 ; LDRAR This is a DATAO with 'Diag Test EBUF' bit not
84 ; set in the CSR Register, and Bit 0 set in the
85 ; data given. The address to put in the RAR is
86 ; in bits 1-13.
87 ;
88 ; LDCRAM This is a DATAO with 'Diag Test EBUF' bit not
89 ; set in the CSR Register, and Bit 0 zero in the
90 ; data given. The data to load in CRAM is in
91 ; bits 6-35.
92 ;
93 ; LDCSR This is simply a CONO.
94 ;
95 ; RDEBUF This is a DATAI with 'Diag Test EBUF' bit set
96 ; in the CSR Register.
97 ;
98 ; RDLAR This is a DATAI with 'Diag Test EBUF' bit not
99 ; set and 'Diag Sel LAR' set in CSR Register
100 ; Register. The data returned is in bits 1-12.
101 ; Bit 13 is returned as the corresponding bit
102 ; of the RAR.
103 ;
104 ; RDCRAM This is a DATAI with 'Diag Test EBUF' bit not
105 ; set and 'Diag Sel LAR' not set in CSR Regis-
106 ; ter. The data returned is in bits 6-35.
107 ;
108 ; RDCSR This is simply a CONI.
109 ;
110 ;#********************************************************************
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 4
DFPTAI MAC 24-Apr-84 10:48 Port Register Read/Write Routines SEQ 2004
111
112 ;#************************************************************
113 ;* Port Register Load Routines
114 ;
115 ; Port registers are loaded by a CONO or DATAO. The data to be
116 ; written is given right justified in AC1. Each routine will
117 ; will position the data correctly.
118 ;
119 ; Example: MOVE AC1,FOO ; data to write to register
120 ; GO LDXXXX ; XXXX (Register description)
121 ; Return ; no errors are possible
122 ;#************************************************************
123
124 ;#************************************************************
125 ;* LDEBUF - Load EBUF
126 ;
127 ; This routine assumes that 'Diag Test EBUF' bit is already set
128 ; in the CSR Register, so a simple DATAO will load the register.
129 ;#************************************************************
130
131 000000' 332 00 0 00 000000* LDEBUF: SKIPE UDEBUG ; debug mode?
132 000001' 263 17 0 00 000000 RTN ; yes - exit
133 000002' 261 17 0 00 000002 PUT 2 ; save AC2
134 000003' 200 02 0 00 003066' MOVE 2,[DATAO 0,1] ; build a DATAO
135 000004' 434 02 0 00 000016 IOR 2,MBCN ; include the device code
136 000005' 256 00 0 00 000002 XCT 2 ; do the DATAO
137 000006' 262 17 0 00 000002 GET 2 ; restore AC2
138 000007' 263 17 0 00 000000 RTN
139
140
141 ;#************************************************************
142 ;* LDCSR - Load CSR (This is simply a CONO).
143 ;#************************************************************
144
145 000010' 332 00 0 00 000000* LDCSR: SKIPE UDEBUG ; debug mode?
146 000011' 263 17 0 00 000000 RTN ; yes - exit
147 000012' 261 17 0 00 000002 PUT 2 ; save AC2
148 000013' 200 02 0 00 003067' MOVE 2,[CONO] ; build a CONO
149 000014' 434 02 0 00 000016 IOR 2,MBCN ; include the device code
150 000015' 540 02 0 00 000001 HRR 2,1 ; include data to write
151 000016' 256 00 0 00 000002 XCT 2 ; do the CONO
152 000017' 262 17 0 00 000002 GET 2 ; restore AC2
153 000020' 263 17 0 00 000000 RTN ; return
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 5
DFPTAI MAC 24-Apr-84 10:48 Port Register Read/Write Routines SEQ 2005
154
155 ;#************************************************************
156 ;* LDRAR - Load RAR
157 ;
158 ; This assumes that 'Diag Test EBUF' bit is not set in CSR, so a DATAO
159 ; loads the RAR). The sign bit set in the data specified in the DATAO
160 ; causes the RAR to be loaded instead of the CRAM.
161 ;
162 ; Data to load is in AC1: Bits 23-34 - CRAM Address
163 ; 35 - 0 - Left half of CRAM word
164 ; 1 - Right half of CRAM word
165 ;#************************************************************
166
167 000021' 332 00 0 00 000010* LDRAR: SKIPE UDEBUG ; debug mode?
168 000022' 263 17 0 00 000000 RTN ; yes - exit
169 000023' 261 17 0 00 000001 RPUT (1,2) ; save AC's
170
171 000025' 200 02 0 00 003066' MOVE 2,[DATAO 0,1] ; build a DATAO
172 000026' 434 02 0 00 000016 IOR 2,MBCN ; include the device code
173 000027' 242 01 0 00 000026 LSH 1,^D22 ; position data correctly
174 000030' 661 01 0 00 400000 TLO 1,400000 ; set sign bit
175 000031' 256 00 0 00 000002 XCT 2 ; do the DATAO
176 000032' 262 17 0 00 000002 RGET (2,1) ; restore AC's
177
178 000034' 263 17 0 00 000000 RTN
179
180
181 ;#************************************************************
182 ;* LDCRAM - Load CRAM
183 ;
184 ; This assumes that 'Diag Test EBUF' bit is not set in CSR, so a
185 ; DATAO loads the CRAM). The sign bit zero in the data specified
186 ; in the DATAO causes the CRAM to be loaded instead of the RAR.
187 ; The data to load is given right justified in AC1.
188 ;#************************************************************
189
190 000035' 332 00 0 00 000021* LDCRAM: SKIPE UDEBUG ; debug mode?
191 000036' 263 17 0 00 000000 RTN ; yes - exit
192 000037' 261 17 0 00 000001 RPUT (1,2) ; save AC's
193
194 000041' 200 02 0 00 003066' MOVE 2,[DATAO 0,1] ; build a DATAO
195 000042' 434 02 0 00 000016 IOR 2,MBCN ; include the device code
196 000043' 621 01 0 00 770000 TLZ 1,770000 ; ensure left 6 bits zero
197 000044' 256 00 0 00 000002 XCT 2 ; do the DATAO
198 000045' 262 17 0 00 000002 RGET (2,1) ; restore AC's
199
200 000047' 263 17 0 00 000000 RTN
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 6
DFPTAI MAC 24-Apr-84 10:48 Port Register Read/Write Routines SEQ 2006
201
202 ;#************************************************************
203 ;* Port Register Read Routines
204 ;
205 ; Port registers are read by a CONI or DATAI. The data is
206 ; returned right justified in AC1 with unused bits zero.
207 ;
208 ; Example: MOVE AC1,FOO ; some argument
209 ; GO RDXXXX ; XXXX (Register description)
210 ; Return+1 ; read failed
211 ; Return+2 ; read succeeded
212 ;
213 ; Note: It is not normally possible to tell if the read failed
214 ; or succeeded, except with the CSR register. Reading the CSR
215 ; is set up for a +1 and +2 return. The remaining routines
216 ; return +1 always.
217 ;#************************************************************
218
219 ;#************************************************************
220 ;* RDEBUF - Read EBUF
221 ;
222 ; This routine assumes that 'Diag Test EBUF' bit is already set
223 ; in CSR, so a simple DATAI will load the register.
224 ;#************************************************************
225
226 000050' 332 00 0 00 000035* RDEBUF: SKIPE UDEBUG ; debug mode?
227 000051' 263 17 0 00 000000 RTN ; yes - return
228 000052' 261 17 0 00 000002 PUT 2 ; save AC2
229 000053' 200 02 0 00 003070' MOVE 2,[DATAI 0,1] ; build a DATAI
230 000054' 434 02 0 00 000016 IOR 2,MBCN ; include the device code
231 000055' 256 00 0 00 000002 XCT 2 ; do the DATAI
232 000056' 262 17 0 00 000002 GET 2 ; restore AC2
233 000057' 263 17 0 00 000000 RTN ; return
234
235
236 ;#************************************************************
237 ;* RDCSR - Read CSR
238 ;#************************************************************
239
240 000060' 350 00 0 17 000000 RDCSR: AOS (P) ; set up return+2
241 000061' 332 00 0 00 000050* SKIPE UDEBUG ; debug mode?
242 000062' 263 17 0 00 000000 RTN ; yes - return
243 000063' 261 17 0 00 000002 PUT 2 ; save AC2
244 000064' 200 02 0 00 003071' MOVE 2,[CONI 0,1] ; build a CONI from AC1
245 000065' 434 02 0 00 000016 IOR 2,MBCN ; include the device code
246 000066' 256 00 0 00 000002 XCT 2 ; do the CONI
247 000067' 255 00 0 00 000000 JFCL
248 000070' 255 00 0 00 000000 JFCL
249 000071' 336 00 0 00 000001 SKIPN 1 ; succeeded?
250 000072' 370 00 0 17 777777 SOS -1(P) ; no - set up return+1
251 000073' 262 17 0 00 000002 GET 2 ; yes - error - restore AC2
252 000074' 263 17 0 00 000000 RTN ; and return
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 7
DFPTAI MAC 24-Apr-84 10:48 Port Register Read/Write Routines SEQ 2007
253
254 ;#************************************************************
255 ;* RDLAR - Read LAR
256 ;
257 ; This assumes that 'Diag Test EBUF' is not set and 'Diag Sel LAR' is
258 ; set in the CSR Register, so a DATAI can be used to load the CRAM).
259 ;
260 ; The data is returned right justified in AC1:
261 ;
262 ; Bits 23-34 - CRAM Address
263 ; 35 - 0 - Left half of CRAM word
264 ; 1 - Right half of CRAM word
265 ;#************************************************************
266
267 000075' 332 00 0 00 000061* RDLAR: SKIPE UDEBUG ; debug mode?
268 000076' 263 17 0 00 000000 RTN ; yes - return
269 000077' 261 17 0 00 000002 PUT 2 ; save AC2
270 000100' 200 02 0 00 003070' MOVE 2,[DATAI 0,1] ; build a DATAI from AC1
271 000101' 434 02 0 00 000016 IOR 2,MBCN ; include the device code
272 000102' 256 00 0 00 000002 XCT 2 ; do the DATAI
273 000103' 135 01 0 00 003072' LDB 1,[POINT 13,1,13] ; position correctly
274 000104' 262 17 0 00 000002 GET 2 ; restore AC2
275 000105' 263 17 0 00 000000 RTN ; return
276
277
278 ;#************************************************************
279 ;* RDCRAM - Read CRAM
280 ;
281 ; This assumes that 'Diag Test EBUF' and 'Diag Sel LAR' bits are
282 ; not set in the CSR Register, so a DATAI can be used to load the
283 ; CRAM). The data is returned in AC1.
284 ;#************************************************************
285
286 000106' 332 00 0 00 000075* RDCRAM: SKIPE UDEBUG ; debug mode?
287 000107' 263 17 0 00 000000 RTN ; yes - return
288 000110' 261 17 0 00 000002 PUT 2 ; save AC2
289 000111' 200 02 0 00 003070' MOVE 2,[DATAI 0,1] ; build a DATAI from AC1
290 000112' 434 02 0 00 000016 IOR 2,MBCN ; include the device code
291 000113' 256 00 0 00 000002 XCT 2 ; do the DATAI
292 000114' 621 01 0 00 770000 TLZ 1,770000 ; ensure leftmost 6 bits are zero
293 000115' 262 17 0 00 000002 GET 2 ; restore AC2
294 000116' 263 17 0 00 000000 RTN ; return
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 8
DFPTAI MAC 24-Apr-84 10:48 Port Register Read/Write Routines SEQ 2008
295
296 ;#************************************************************
297 ;* .CONI - Do a simple CONI (no error checking)
298 ;
299 ; Argument: MBCN - Contains RH number to do (left justified properly)
300 ; as 54000,,0, etc.
301 ;
302 ; Returns: AC1 - Contains result
303 ; +1 always
304 ;#************************************************************
305
306 000117' 332 00 0 00 000106* .CONI: SKIPE UDEBUG ; debug mode?
307 000120' 263 17 0 00 000000 RTN ; yes - exit
308 000121' 261 17 0 00 000002 PUT 2 ; save AC2
309 000122' 200 02 0 00 003071' MOVE 2,[CONI 0,1] ; build a CONI from AC1
310 000123' 434 02 0 00 000016 IOR 2,MBCN ; include the device code
311 000124' 256 00 0 00 000002 XCT 2 ; do the CONI
312 000125' 262 17 0 00 000002 GET 2 ; restore AC2
313 000126' 263 17 0 00 000000 RTN ; return
314
315
316 ;#************************************************************
317 ;* .CONO - Do a simple CONO
318 ;
319 ; Argument: MBCN - Contains RH number to do (left justified properly)
320 ; as 54000,,0, etc.
321 ;
322 ; Returns: AC1 - Contains data to write to RH or port
323 ; +1 always
324 ;#************************************************************
325
326 000127' 332 00 0 00 000117* .CONO: SKIPE UDEBUG ; debug mode?
327 000130' 263 17 0 00 000000 RTN ; yes - exit
328 000131' 261 17 0 00 000002 PUT 2 ; save AC2
329 000132' 200 02 0 00 003067' MOVE 2,[CONO] ; build a CONO
330 000133' 434 02 0 00 000016 IOR 2,MBCN ; include the device code
331 000134' 540 02 0 00 000001 HRR 2,1 ; include data to write
332 000135' 256 00 0 00 000002 XCT 2 ; do the CONO
333 000136' 262 17 0 00 000002 GET 2 ; restore AC2
334 000137' 263 17 0 00 000000 RTN ; return
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 9
DFPTAI MAC 24-Apr-84 10:48 Port Register Read/Write Routines SEQ 2009
335
336 ;#************************************************************
337 ;* .DATAI - Do a simple DATAI (no error checking)
338 ;
339 ; Argument: MBCN - Contains RH number to do (left justified properly)
340 ; as 54000,,0, etc.
341 ;
342 ; Returns: AC1 - Contains result
343 ; +1 always
344 ;#************************************************************
345
346 000140' 332 00 0 00 000127* .DATAI: SKIPE UDEBUG ; debug mode?
347 000141' 263 17 0 00 000000 RTN ; yes - exit
348 000142' 261 17 0 00 000002 PUT 2 ; save AC2
349 000143' 200 02 0 00 003070' MOVE 2,[DATAI 0,1] ; build a DATAI from AC1
350 000144' 434 02 0 00 000016 IOR 2,MBCN ; include the device code
351 000145' 256 00 0 00 000002 XCT 2 ; do the DATAI
352 000146' 262 17 0 00 000002 GET 2 ; restore AC2
353 000147' 263 17 0 00 000000 RTN ; return
354
355
356 ;#************************************************************
357 ;* .DATAO - Do a simple DATAO
358 ;
359 ; Argument: MBCN - Contains RH number to do (left justified properly)
360 ; as 54000,,0, etc.
361 ;
362 ; Returns: AC1 - Contains data to write to RH or IPA20
363 ; +1 always
364 ;#************************************************************
365
366 000150' 332 00 0 00 000140* .DATAO: SKIPE UDEBUG ; debug mode?
367 000151' 263 17 0 00 000000 RTN ; yes - exit
368 000152' 261 17 0 00 000002 PUT 2 ; save AC2
369 000153' 200 02 0 00 003066' MOVE 2,[DATAO 0,1] ; build a DATAO
370 000154' 434 02 0 00 000016 IOR 2,MBCN ; include the device code
371 000155' 256 00 0 00 000002 XCT 2 ; do the DATAO
372 000156' 262 17 0 00 000002 GET 2 ; restore AC2
373 000157' 263 17 0 00 000000 RTN ; return
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 10
DFPTAI MAC 24-Apr-84 10:48 Port Register Read/Write Routines SEQ 2010
374
375 ;#********************************************************************
376 ;* ERESET - Issue an EBUS reset
377 ;#********************************************************************
378
379 000160' 332 00 0 00 000150* ERESET: SKIPE UDEBUG ; debug mode?
380 000161' 263 17 0 00 000000 RTN ; yes - exit
381 000162' 336 00 0 00 030037 SKIPN USER ; user mode?
382 000163' 7 000 20 0 00 200000 CONO APR,200000 ; no - do an EBUS reset
383 000164' 332 00 0 00 030037 SKIPE USER ; user mode?
384 000165' 260 17 0 00 000243' GO IPACLR ; yes - do a 'port clear' instead
385 000166' 263 17 0 00 000000 RTN
386
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 11
DFPTAI MAC 24-Apr-84 10:48 Port Specific Utility Routines SEQ 2011
387 SUBTTL Port Specific Utility Routines
388
389 ;#********************************************************************
390 ;* ISTOP - Stop IPA either by a port clear or by clearing the CSR register
391 ;#********************************************************************
392
393 000167' 332 00 0 00 000160* ISTOP: SKIPE UDEBUG ; debug mode?
394 000170' 263 17 0 00 000000 RTN ; yes - return
395 000171' 261 17 0 00 000000 RPUT (0,1,2) ; save AC's
396
397 000174' 260 17 0 00 000060' GO RDCSR ; read CSR register
398 000175' 474 01 0 00 000000 SETO 1, ; error - ensure error bits are set
399 000176' 200 02 0 00 000001 MOVE 2,1 ; get into AC2
400 000177' 603 01 0 00 004000 TLNE 1,(CRAMPE) ; CRAM parity error bit set?
401 000200' 254 00 0 00 000203' JRST ISTOP0 ; yes - must clear it
402 000201' 606 01 0 00 000010 TRNN 1,MPRUN ; IPA running?
403 000202' 254 00 0 00 000235' JRST ISTOPX ; no - exit
404 000203' 200 00 0 00 000001 ISTOP0: MOVE 1 ; get into AC0
405 000204' 400 01 0 00 000000 SETZ 1, ; CSR data to clear 'MPRUN'
406 000205' 603 00 0 00 002000 TLNE (MBERR) ; MBUS error bit set?
407 000206' 254 00 0 00 000231' JRST ISTOPC ; yes - must do a port clear
408 000207' 603 00 0 00 004000 TLNE (CRAMPE) ; CRAM parity error bit set?
409 000210' 201 01 0 00 004000 MOVEI 1,EBUSPE ; yes - get 'EBUS PE' bit
410 000211' 260 17 0 00 000010' GO LDCSR ; write CSR
411 000212' 260 17 0 00 000060' GO RDCSR ; read CSR register
412 000213' 474 01 0 00 000000 SETO 1, ; error - ensure error bits are set
413 000214' 603 01 0 00 006000 TLNE 1,(CRAMPE!MBERR) ; error bits set?
414 000215' 254 00 0 00 000231' JRST ISTOPC ; yes - must do a port clear
415 000216' 602 01 0 00 000010 TRNE 1,MPRUN ; still running?
416 000217' 254 00 0 00 000231' JRST ISTOPC ; yes - must do a port clear
417 000220' 603 02 0 00 004000 TLNE 2,(CRAMPE) ; was CRAM PE set before?
418 000221' 332 00 0 00 000000* SKIPE PMODE ; yes - running a test?
419 000222' 334 00 0 00 000000 SKIPA ; yes - don't print anything
420 000223' 037 00 0 00 003073' TMSGCD <[CRAM PE cleared]> ; no - let operator know
421 000224' 607 02 0 00 004000 TLNN 2,(CRAMPE) ; was CRAM PE set before?
422 000225' 332 00 0 00 000221* SKIPE PMODE ; no - running a test?
423 000226' 334 00 0 00 000000 SKIPA ; yes - don't print anything
424 000227' 037 00 0 00 003100' TMSGCD <[Port stopped]> ; no - let operator know
425 000230' 254 00 0 00 000235' JRST ISTOPX ; no - exit
426 000231' 201 01 0 00 400000 ISTOPC: MOVEI 1,PCLEAR ; get 'port clear' bit
427 000232' 260 17 0 00 000010' GO LDCSR ; write the CSR register
428 000233' 336 00 0 00 000225* SKIPN PMODE ; no - running a test?
429 000234' 037 00 0 00 003104' TMSGCD <[Port Clear done]> ; let operator know
430 000235' 400 01 0 00 000000 ISTOPX: SETZ 1, ; clear AC1
431 000236' 260 17 0 00 000010' GO LDCSR ; clear CSR register
432 000237' 262 17 0 00 000002 RGET (2,1,0) ; restore AC's
433
434 000242' 263 17 0 00 000000 RTN ; return
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 12
DFPTAI MAC 24-Apr-84 10:48 Port Specific Utility Routines SEQ 2012
435
436 ;#********************************************************************
437 ;* IPACLR - Issue a port clear
438 ;#********************************************************************
439
440 000243' 261 17 0 00 000001 IPACLR: PUT 1 ; save AC1
441 000244' 201 01 0 00 400000 MOVEI 1,PCLEAR ; get 'port clear' bit
442 000245' 260 17 0 00 000010' GO LDCSR ; write the CSR register
443 000246' 262 17 0 00 000001 GET 1 ; restore AC1
444 000247' 263 17 0 00 000000 RTN ; return
445
446
447 ;#********************************************************************
448 ;* SETEBU - Check that 'Diag Test EBUF' bit is set in CSR and set if not.
449 ;
450 ; Return +1 - Error accessing CSR
451 ; +2 - Ok
452 ;#********************************************************************
453
454 000250' 261 17 0 00 000000 SETEBU: RPUT (0,1) ; save AC's
455
456 000252' 260 17 0 00 000060' GO RDCSR ; read CSR
457 000253' 254 00 0 00 000262' JRST SETEBE ; error return
458 000254' 200 00 0 00 000001 MOVE 1 ; get copy of AC1 into AC0
459 000255' 660 01 0 00 200000 TRO 1,TSTEBF ; set this bit
460 000256' 620 01 0 00 040000 TRZ 1,SELLAR ; clear this bit
461 000257' 312 00 0 00 000001 CAME 1 ; bits already set up ok?
462 000260' 260 17 0 00 000010' GO LDCSR ; no - set/clear them
463 000261' 350 00 0 17 777776 AOS -2(P) ; set up ok return
464 000262' 262 17 0 00 000001 SETEBE: RGET (1,0) ; restore AC's
465
466 000264' 263 17 0 00 000000 RTN ; return
467
468
469 ;#********************************************************************
470 ;* SETLAR - Check that 'Diag Sel LAR' bit is set in CSR and set if not.
471 ;
472 ; Return +1 - Error accessing CSR
473 ; +2 - Ok
474 ;#********************************************************************
475
476 000265' 261 17 0 00 000000 SETLAR: RPUT (0,1) ; save AC's
477
478 000267' 260 17 0 00 000060' GO RDCSR ; read CSR
479 000270' 254 00 0 00 000277' JRST SETLAE ; error return
480 000271' 200 00 0 00 000001 MOVE 1 ; get copy of AC1 into AC0
481 000272' 620 01 0 00 200000 TRZ 1,TSTEBF ; clear this bit
482 000273' 660 01 0 00 040000 TRO 1,SELLAR ; set this bit
483 000274' 312 00 0 00 000001 CAME 1 ; bits already set up ok?
484 000275' 260 17 0 00 000010' GO LDCSR ; is set in CSR Register
485 000276' 350 00 0 17 777776 AOS -2(P) ; set up ok return
486 000277' 262 17 0 00 000001 SETLAE: RGET (1,0) ; restore AC's
487
488 000301' 263 17 0 00 000000 RTN
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 13
DFPTAI MAC 24-Apr-84 10:48 Port Specific Utility Routines SEQ 2013
489
490 ;#********************************************************************
491 ;* CLREBU - Check that 'Diag Test EBUF' is not set in CSR and clear if is.
492 ;
493 ; Return +1 - Error accessing CSR
494 ; +2 - Ok
495 ;#********************************************************************
496
497 000302' 261 17 0 00 000000 CLREBU: RPUT (0,1) ; save AC's
498
499 000304' 260 17 0 00 000060' GO RDCSR ; read CSR
500 000305' 254 00 0 00 000313' JRST CLREBE ; error return
501 000306' 606 01 0 00 200000 TRNN 1,TSTEBF ; 'Diag Test EBUF' bit set?
502 000307' 254 00 0 00 000312' JRST CLREBX ; no - continue
503 000310' 620 01 0 00 200000 TRZ 1,TSTEBF ; make sure 'Diag Test EBUF' bit
504 000311' 260 17 0 00 000010' GO LDCSR ; is cleared in CSR Register
505 000312' 350 00 0 17 777776 CLREBX: AOS -2(P) ; set up ok return
506 000313' 262 17 0 00 000001 CLREBE: RGET (1,0) ; restore AC's
507
508 000315' 263 17 0 00 000000 RTN ; return
509
510
511 ;#********************************************************************
512 ;* CHKCSR - Check if error bits are set in the CSR register
513 ;
514 ; Also, stop the port if it is running, and announce the fact to the
515 ; user.
516 ;#********************************************************************
517
518 000316' 261 17 0 00 000001 CHKCSR: PUT 1 ; save AC1
519 000317' 260 17 0 00 000060' GO RDCSR ; read CSR register
520 000320' 334 00 0 00 000000 SKIPA ; error return
521 000321' 603 01 0 00 002000 TLNE 1,(MBERR) ; MBUS Error bit set?
522 000322' 254 00 0 00 000333' JRST CHKCSX ; yes - error exit
523 000323' 603 01 0 00 004000 TLNE 1,(CRAMPE) ; CRAM PE bit set?
524 GO [MOVEI 1,EBUSPE ; yes - clear it
525 GO LDCSR
526 TMSGCD <[CRAM PE cleared from CSR register]>
527 000324' 260 17 0 00 003121' RTN]
528 000325' 350 00 0 17 777777 AOS -1(P) ; no - set up RTN+2
529
530 ; Also, check to see if the port is running
531
532 000326' 606 01 0 00 000010 TRNN 1,MPRUN ; running?
533 000327' 254 00 0 00 000333' JRST CHKCSX ; no - continue
534 000330' 400 01 0 00 000000 SETZ 1, ; clear AC1
535 000331' 260 17 0 00 000010' GO LDCSR ; stop the port
536 000332' 037 00 0 00 003125' TMSGCD <[CSR cleared to stop the port]>
537 000333' 262 17 0 00 000001 CHKCSX: GET 1 ; restore AC1
538 000334' 263 17 0 00 000000 RTN ; return
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 14
DFPTAI MAC 24-Apr-84 10:48 Port Specific Utility Routines SEQ 2014
539
540 ;#********************************************************************
541 ;* IPASRT - Start the port at the address given in 'SADDR' and with
542 ;* initial parameters given in 'SDATA'.
543 ;
544 ; Arguments: SNEXT - Contains the start address desired.
545 ;
546 ; SDATA - Contains the data to be written to the CSR
547 ; registers to initialize everything correctly.
548 ;
549 ; Note: This routine is normally used in conjunction with IPASTP. IPASTP
550 ; saves the next address in SNEXT and the contents of CSR in SDATA.
551 ; Calling IPASRT after IPASTP has been called will leave the port in
552 ; the same state that it was, unless something is done to the port
553 ; between the calls.
554 ;
555 ; Procedure: (1) Obtain start address in 'SNEXT' and write it to the
556 ; RAR Register.
557 ;
558 ; (2) If SDATA is zero, no initial data is assumed. The
559 ; CSR is written as follows:
560 ;
561 ; Clear 'Single Cycle' - no single stepping apparently
562 ; is desired.
563 ; Set 'MPROC Run' - Start it up at address in RAR.
564 ; Set PIA bits to 4 - Allow interrupts on channel 4.
565 ; Clear all remaining bits.
566 ;
567 ; (3) If SDATA is non-zero, the initial data given in SDATA
568 ; is massaged to ensure that at least the following is
569 ; true of the data:
570 ;
571 ; 'Single Cycle' bit is cleared.
572 ; 'MPROC Run' bit is set.
573 ;
574 ; Return: +1 - Failed (Error reading/writing CSR Register).
575 ; +2 - Failed (Port already running).
576 ; +3 - Failed (Error bits set in CSR)
577 ; +4 - Ok
578 ;#********************************************************************
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 15
DFPTAI MAC 24-Apr-84 10:48 Port Specific Utility Routines SEQ 2015
579
580 000335' 261 17 0 00 000000 IPASRT: RPUT (0,1) ; save AC's
581
582
583 ; First check if the port is already running
584
585 000337' 260 17 0 00 000060' GO RDCSR ; read CSR
586 000340' 254 00 0 00 000364' JRST IPASR3 ; error accessing CSR register
587 000341' 602 01 0 00 000010 TRNE 1,MPRUN ; uproc already running?
588 000342' 254 00 0 00 000363' JRST IPASR2 ; yes - exit +2 (error)
589
590 ; Check for error bits set
591
592 000343' 603 01 0 00 006000 TLNE 1,(CRAMPE!MBERR) ; error bits set?
593 000344' 254 00 0 00 000362' JRST IPASR1 ; yes - error exit
594
595 ; Now handle start address
596
597 000345' 622 01 0 00 200000 TRZE 1,TSTEBF ; 'Diag Test EBUF' bit set?
598 000346' 260 17 0 00 000010' GO LDCSR ; yes - clear it
599 000347' 200 01 0 00 000417' MOVE 1,SNEXT ; get start address
600 000350' 242 01 0 00 000001 LSH 1,1 ; position correctly
601 000351' 260 17 0 00 000021' GO LDRAR ; load the register
602
603 ; Set up data to write to CSR
604
605 000352' 336 01 0 00 000421' IPASR0: SKIPN 1,SDATA ; any data given?
606 000353' 201 01 0 00 000014 MOVEI 1,MPRUN!4 ; no - set initial data
607 000354' 620 01 0 00 020000 TRZ 1,SINCYC ; ensure SINCYC are cleared
608 000355' 660 01 0 00 040010 TRO 1,MPRUN!SELLAR ; ensure MPRUN,SELLAR are set
609 000356' 332 00 0 00 030037 SKIPE USER ; user mode?
610 000357' 620 01 0 00 000007 TRZ 1,7 ; yes - clear PI level bits
611
612 ; Write the data to CSR
613
614 000360' 260 17 0 00 000010' GO LDCSR
615 000361' 350 00 0 17 777776 AOS -2(P) ; ok exit (+4)
616 000362' 350 00 0 17 777776 IPASR1: AOS -2(P) ; error exit (+3)
617 000363' 350 00 0 17 777776 IPASR2: AOS -2(P) ; error exit (+2)
618 000364' 262 17 0 00 000001 IPASR3: RGET (1,0) ; error exit (+1)
619
620 000366' 263 17 0 00 000000 RTN ; return
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 16
DFPTAI MAC 24-Apr-84 10:48 Port Specific Utility Routines SEQ 2016
621
622 ;#********************************************************************
623 ;* IPASTP - Stop the port
624 ;
625 ; Arguments: None
626 ;
627 ; Procedure: Read the CSR Register.
628 ; Clear 'MPROC Run' bit.
629 ; Write this data to CSR.
630 ; Read the CSR Register and save data in SDATA.
631 ; Write 'DIAG Sel LAR' bit in CSR.
632 ; Read the LAR and save data in SNEXT.
633 ;
634 ; Return: +1 - Failed (Error reading/writing CSR Register).
635 ; +2 - Failed (Port not running).
636 ; +3 - Failed (Error bits set in CSR)
637 ; +4 - Ok, SDATA and SADDR have data at stopping point.
638 ;#********************************************************************
639
640 000367' 261 17 0 00 000000 IPASTP: RPUT (0,1) ; save AC's
641
642
643 ; First read CSR and verify that 'MPRUN' is set.
644
645 000371' 260 17 0 00 000060' GO RDCSR ; read CSR
646 000372' 254 00 0 00 000414' JRST IPAST3 ; failed - exit +1
647 000373' 606 01 0 00 000010 TRNN 1,MPRUN ; uproc running?
648 000374' 254 00 0 00 000413' JRST IPAST2 ; no - failed - exit +2
649
650 ; Check for error bits set
651
652 000375' 603 01 0 00 006000 TLNE 1,(CRAMPE!MBERR) ; error bits set?
653 000376' 254 00 0 00 000412' JRST IPAST1 ; yes - error exit
654
655 ; Then clear 'MPRUN'.
656
657 000377' 620 01 0 00 000010 TRZ 1,MPRUN ; clear 'MPROC Run' bit
658 000400' 260 17 0 00 000010' GO LDCSR ; write the CSR
659 000401' 260 17 0 00 000060' GO RDCSR ; read CSR
660 000402' 254 00 0 00 000414' JRST IPAST3 ; failed - exit
661 000403' 202 01 0 00 000421' MOVEM 1,SDATA ; save CSR at halt
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 17
DFPTAI MAC 24-Apr-84 10:48 Port Specific Utility Routines SEQ 2017
662
663 ; Now read the stopping address (in LAR)
664
665 000404' 660 01 0 00 040000 TRO 1,SELLAR ; set 'Diag Sel LAR/SQR' bit
666 000405' 260 17 0 00 000010' GO LDCSR ; write it
667 000406' 260 17 0 00 000075' GO RDLAR ; read LAR
668 000407' 242 01 0 00 777777 LSH 1,-1 ; get LAR data
669 000410' 202 01 0 00 000417' MOVEM 1,SNEXT ; save the data
670
671 ; Exit
672
673 000411' 350 00 0 17 777776 AOS -2(P) ; ok exit (+4)
674 000412' 350 00 0 17 777776 IPAST1: AOS -2(P) ; error exit (+3)
675 000413' 350 00 0 17 777776 IPAST2: AOS -2(P) ; error exit (+2)
676 000414' 262 17 0 00 000001 IPAST3: RGET (1,0) ; error exit (+1)
677
678 000416' 263 17 0 00 000000 RTN ; return
679
680 ; Parameter locations
681
682 000417' 000000 000000 SNEXT: 0 ; next address
683 000420' 000000 000000 SLAST: 0 ; last address
684 000421' 000000 000000 SDATA: 0 ; contents of CSR at when stopped
685 000422' 000000 000000 EADDR: 0 ; correct stopping address
686 000423' 000000 000000 AADDR: 0 ; actual stopping address
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 18
DFPTAI MAC 24-Apr-84 10:48 Port Specific Utility Routines SEQ 2018
687
688 ;#********************************************************************
689 ;* IPASST - Single step the port at the address given in 'SNEXT' and
690 ;* with initial parameters given in 'SDATA'.
691 ;
692 ; Arguments: SADDR - Contains the start address desired.
693 ;
694 ; SDATA - Contains the data to be written to the CSR
695 ; registers to initialize everything correctly.
696 ;
697 ; AC1 - 0 - Don't preserve EBUF data
698 ; -1 - Preserve EBUF data
699 ;
700 ; Procedure: (1) Start the port exactly as IPASRT would have, except
701 ; that 'Single Cycle' is set at the same time as
702 ; 'MPRUN'.
703 ;
704 ; (2) Successive calls to IPASST do as in (1), except
705 ; that SDATA is already set up and SNEXT is being
706 ; continually copied to SLAST and new contents of
707 ; the LAR are being put into SNEXT.
708 ;
709 ; Return: +1 - Failed (Error reading/writing CSR Register).
710 ; +2 - Failed (Port already running).
711 ; +3 - Failed (Error bits set in CSR)
712 ; +4 - Ok
713 ;#********************************************************************
714
715 000424' 261 17 0 00 000000 IPASST: RPUT (0,1) ; save AC's
716
717 000426' 202 01 0 00 003060' MOVEM 1,PRSFLG# ; save 'Preserve EBUF' flag
718
719 ; First check if the port is already running
720
721 000427' 260 17 0 00 000060' GO RDCSR ; read CSR register
722 000430' 254 00 0 00 000505' JRST IPASS4 ; error accessing CSR register
723 000431' 602 01 0 00 000010 TRNE 1,MPRUN ; uproc already running?
724 000432' 254 00 0 00 000504' JRST IPASS3 ; yes - exit +2 (error)
725
726 ; Check for error bits set
727
728 000433' 603 01 0 00 006000 TLNE 1,(CRAMPE!MBERR) ; error bits set?
729 000434' 254 00 0 00 000503' JRST IPASS2 ; yes - error exit
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 19
DFPTAI MAC 24-Apr-84 10:48 Port Specific Utility Routines SEQ 2019
730
731 ; Now handle start address
732
733 000435' 606 01 0 00 200000 TRNN 1,TSTEBF ; 'Diag Test EBUF' bit set?
734 000436' 254 00 0 00 000441' JRST .+3 ; no - continue
735 000437' 620 01 0 00 200000 TRZ 1,TSTEBF ; make sure 'Diag Test EBUF' bit
736 000440' 260 17 0 00 000010' GO LDCSR ; is cleared in CSR Register
737 000441' 200 01 0 00 000417' MOVE 1,SNEXT ; get start address
738 000442' 242 01 0 00 000001 LSH 1,1 ; position correctly
739 000443' 260 17 0 00 000021' GO LDRAR ; load the register
740
741 ; Set up data to write to CSR
742
743 000444' 336 01 0 00 000421' IPASS0: SKIPN 1,SDATA ; any data given?
744 000445' 201 01 0 00 000014 MOVEI 1,MPRUN!4 ; no - set initial data
745 000446' 660 01 0 00 060010 TRO 1,SELLAR!MPRUN!SINCYC ; ensure MPRUN,SELLAR,SINCYC are set
746 000447' 332 00 0 00 030037 SKIPE USER ; user mode?
747 000450' 620 01 0 00 000007 TRZ 1,7 ; yes - clear PI level bits
748
749 ; Do the single step
750
751 000451' 260 17 0 00 000010' GO LDCSR ; write the data
752
753 ; Read CSR
754
755 000452' 260 17 0 00 000060' GO RDCSR ; read CSR
756 000453' 255 00 0 00 000000 JFCL ; ignore error
757 000454' 202 01 0 00 000421' MOVEM 1,SDATA ; save it
758
759 ; Save EBUF contents
760
761 000455' 331 00 0 00 003060' SKIPL PRSFLG ; preserve EBUF data?
762 000456' 254 00 0 00 000466' JRST IPASS1 ; no - continue
763 000457' 660 01 0 00 200000 TRO 1,TSTEBF ; set 'Diag Test EBUF'
764 000460' 260 17 0 00 000010' GO LDCSR ; write it
765 000461' 260 17 0 00 000050' GO RDEBUF ; read the EBUF
766 000462' 202 01 0 00 003062' MOVEM 1,SAVEBF# ; save EBUF data
767 000463' 200 01 0 00 000421' MOVE 1,SDATA ; get CSR data
768 000464' 620 01 0 00 200000 TRZ 1,TSTEBF ; set 'Diag Test EBUF'
769 000465' 260 17 0 00 000010' GO LDCSR ; write it
770
771 ; Read LAR
772
773 000466' 200 00 0 00 000417' IPASS1: MOVE SNEXT ; get original next address
774 000467' 202 00 0 00 000420' MOVEM SLAST ; save in last address
775 000470' 260 17 0 00 000075' GO RDLAR ; read LAR register
776 000471' 242 01 0 00 777777 LSH 1,-1 ; get LAR data
777 000472' 202 01 0 00 000417' MOVEM 1,SNEXT ; set up new next address
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 20
DFPTAI MAC 24-Apr-84 10:48 Port Specific Utility Routines SEQ 2020
778
779 ; Restore EBUF
780
781 000473' 200 01 0 00 000421' MOVE 1,SDATA ; get CSR data back
782 000474' 660 01 0 00 200000 TRO 1,TSTEBF ; set 'Diag Test EBUF'
783 000475' 260 17 0 00 000010' GO LDCSR ; write it
784 000476' 200 01 0 00 003062' MOVE 1,SAVEBF ; restore EBUF data
785 000477' 260 17 0 00 000000' GO LDEBUF ; write the EBUF
786 000500' 200 01 0 00 000421' MOVE 1,SDATA ; get CSR data back
787 000501' 260 17 0 00 000010' GO LDCSR ; write it
788
789 000502' 350 00 0 17 777776 AOS -2(P) ; ok exit (+4)
790 000503' 350 00 0 17 777776 IPASS2: AOS -2(P) ; error exit (+3)
791 000504' 350 00 0 17 777776 IPASS3: AOS -2(P) ; error exit (+2)
792 000505' 262 17 0 00 000001 IPASS4: RGET (1,0) ; error exit (+1)
793
794 000507' 263 17 0 00 000000 RTN ; return
795
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 21
DFPTAI MAC 24-Apr-84 10:48 PI System Routines SEQ 2021
796 SUBTTL PI System Routines
797
798 ;#********************************************************************
799 ;* INITPI - Initialize and Turn On PI System
800 ;
801 ; In exec mode only. Turn on PI system with all channels activated.
802 ; Also, write PI level bits to 0's for all other RH's to ensure that
803 ; only the port interrupts.
804 ;#********************************************************************
805
806 000510' 332 00 0 00 030037 INITPI: SKIPE USER ; user mode?
807 000511' 263 17 0 00 000000 RTN ; yes - exit
808 000512' 261 17 0 00 000001 PUT 1 ; save AC1
809 000513' 7 004 20 0 00 010000 CONO PI,PICLR ; clear PI system
810
811 ; Set PI level bits to zero for each RH slot
812
813 000514' 7 540 20 0 00 000000 CONO 540,0 ; set PIA level bits to 0
814 000515' 7 544 20 0 00 000000 CONO 544,0 ; set PIA level bits to 0
815 000516' 7 550 20 0 00 000000 CONO 550,0 ; set PIA level bits to 0
816 000517' 7 554 20 0 00 000000 CONO 554,0 ; set PIA level bits to 0
817 000520' 7 560 20 0 00 000000 CONO 560,0 ; set PIA level bits to 0
818 000521' 7 564 20 0 00 000000 CONO 564,0 ; set PIA level bits to 0
819 000522' 7 570 20 0 00 000000 CONO 570,0 ; set PIA level bits to 0
820 000523' 7 574 20 0 00 000000 CONO 574,0 ; set PIA level bits to 0
821
822 ; Finally activate all channels and turn on the PI system
823
824 000524' 7 004 20 0 00 002177 INITP0: CONO PI,2177 ; activate all channels
825 000525' 7 004 20 0 00 000200 CONO PI,PION ; turn on PI system
826 000526' 261 17 0 00 000000 PUT 0 ; save AC0
827 000527' 200 00 0 00 003134' MOVE [INTNUM,,INTNUM+1] ; build BLT pointer
828 000530' 251 00 0 00 001331' BLT INTEND ; clear interrupt history data
829 000531' 262 17 0 00 000000 RGET (0,1) ; restore AC's
830
831 000533' 263 17 0 00 000000 RTN ; return
832
833 ; Clear PI system after returning from DDT
834
835 000534' 332 00 0 00 030037 INITPD: SKIPE USER ; user mode?
836 000535' 263 17 0 00 000000 RTN ; yes - exit
837 000536' 7 004 20 0 00 010000 CONO PI,PICLR ; clear PI system
838 000537' 254 00 0 00 000524' JRST INITP0 ; continue
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 22
DFPTAI MAC 24-Apr-84 10:48 PI System Routines SEQ 2022
839
840 ;#********************************************************************
841 ;* .PIOFF - Detach port from PI system
842 ;#********************************************************************
843
844 000540' 332 00 0 00 030037 .PIOFF: SKIPE USER ; user mode?
845 000541' 263 17 0 00 000000 RTN ; yes - return
846 000542' 261 17 0 00 000001 PUT 1 ; save AC1
847 000543' 260 17 0 00 000566' GO PISYOF ; no - turn off PI system
848 000544' 260 17 0 00 000060' GO RDCSR ; read CSR
849 000545' 255 00 0 00 000000 JFCL ; error return
850 000546' 620 01 0 00 000007 TRZ 1,7 ; clear PIA bits in CSR
851 000547' 260 17 0 00 000010' GO LDCSR ; write the bit
852 000550' 262 17 0 00 000001 GET 1 ; restore AC1
853 000551' 263 17 0 00 000000 RTN ; exit
854
855
856 ;#********************************************************************
857 ;* .PION - Attach port to PI system (Channel 4)
858 ;#********************************************************************
859
860 000552' 332 00 0 00 030037 .PION: SKIPE USER ; user mode?
861 000553' 263 17 0 00 000000 RTN ; yes - exit
862 000554' 261 17 0 00 000001 PUT 1 ; save AC1
863 000555' 260 17 0 00 000566' GO PISYOF ; turn PI system off
864 000556' 260 17 0 00 000060' GO RDCSR ; read CSR
865 000557' 255 00 0 00 000000 JFCL ; error return
866 000560' 620 01 0 00 000007 TRZ 1,7 ; clear PIA bits
867 000561' 660 01 0 00 000004 TRO 1,4 ; set PI level 4
868 000562' 260 17 0 00 000010' GO LDCSR ; write the bit
869 000563' 260 17 0 00 000571' GO PISYON ; turn PI system back on
870 000564' 262 17 0 00 000001 GET 1 ; restore AC
871 000565' 263 17 0 00 000000 RTN ; exit
872
873
874 ;#********************************************************************
875 ;* PISYOF - Turn PI system off
876 ;#********************************************************************
877
878 000566' 336 00 0 00 030037 PISYOF: SKIPN USER ; user mode?
879 000567' 7 004 20 0 00 000400 CONO PI,PIOFF ; no - turn it off
880 000570' 263 17 0 00 000000 RTN ; exit
881
882
883 ;#********************************************************************
884 ;* PISYON - Turn PI system on
885 ;#********************************************************************
886
887 000571' 336 00 0 00 030037 PISYON: SKIPN USER ; user mode?
888 000572' 7 004 20 0 00 002300 CONO PI,2300 ; no - turn on PI system
889 000573' 263 17 0 00 000000 RTN ; and exit
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 23
DFPTAI MAC 24-Apr-84 10:48 PI System Routines SEQ 2023
890
891 ;#********************************************************************
892 ;* SETVEC - Set up interrupt vectors for an port under test
893 ;#********************************************************************
894
895 000574' 402 00 0 00 001361' SETVEC: SETZM .INWD1 ; clear special interrupt data
896 000575' 332 00 0 00 030037 SKIPE USER ; user mode?
897 000576' 263 17 0 00 000000 RTN ; yes - exit
898 000577' 261 17 0 00 000000 RPUT (0,1) ; save AC's
899
900 000601' 200 00 0 00 003135' MOVE [JSR VIINT] ; get trap instruction (Vectored Int)
901 000602' 200 01 0 00 002370' MOVE 1,ICWA0+5 ; get initial address of log area
902 000603' 271 01 0 00 000003 ADDI 1,3 ; calculate address of 4th word
903 000604' 270 01 0 00 002277' ADD 1,CBASE ; add special page number
904 000605' 202 00 0 01 000000 MOVEM (1) ; put in 4th word of logout area
905 000606' 200 01 0 00 002372' MOVE 1,ICWA0+7 ; get initial address of log area
906 000607' 271 01 0 00 000003 ADDI 1,3 ; calculate address of 4th word
907 000610' 270 01 0 00 002277' ADD 1,CBASE ; add special page number
908 000611' 202 00 0 01 000000 MOVEM (1) ; put in 4th word of logout area
909 000612' 260 17 0 00 000620' GO SET2N ; set up 40+2N transfer addresses
910 000613' 476 00 0 00 001070' SETOM INTNUM ; initialize interrupt count
911 000614' 402 00 0 00 001067' SETZM IDELAY ; clear delay time
912 000615' 262 17 0 00 000001 RGET (1,0) ; restore AC's
913
914 000617' 263 17 0 00 000000 RTN
915
916
917 ;#********************************************************************
918 ;* SET2N - Set up 40 + 2N locations with interrupt dispatch instruction
919 ;#********************************************************************
920
921 000620' 261 17 0 00 000000 SET2N: PUT ; save AC0
922 000621' 200 00 0 00 003136' MOVE [JSR NVIIN1] ; channel 1
923 000622' 202 00 0 00 000042 MOVEM 42
924 000623' 200 00 0 00 003137' MOVE [JSR NVIIN2] ; channel 2
925 000624' 202 00 0 00 000044 MOVEM 44
926 000625' 200 00 0 00 003140' MOVE [JSR NVIIN3] ; channel 3
927 000626' 202 00 0 00 000046 MOVEM 46
928 000627' 200 00 0 00 003141' MOVE [JSR NVIIN4] ; channel 4
929 000630' 202 00 0 00 000050 MOVEM 50
930 000631' 200 00 0 00 003142' MOVE [JSR NVIIN5] ; channel 5
931 000632' 202 00 0 00 000052 MOVEM 52
932 000633' 200 00 0 00 003143' MOVE [JSR NVIIN6] ; channel 6
933 000634' 202 00 0 00 000054 MOVEM 54
934 000635' 200 00 0 00 003144' MOVE [JSR NVIIN7] ; channel 7
935 000636' 202 00 0 00 000056 MOVEM 56
936 000637' 262 17 0 00 000000 GET ; restore AC0
937 000640' 263 17 0 00 000000 RTN
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 24
DFPTAI MAC 24-Apr-84 10:48 PI System Routines SEQ 2024
938
939 ;#********************************************************************
940 ;* VIINT - Vectored interrupt (Port)
941 ;
942 ; This routine (and NVIINx) do the following:
943 ;
944 ; - CONI PI and save it
945 ; - Shut off PI system
946 ; - Increment interrupt offset (not to exceed 20 interrupts)
947 ; - Save interrupt data
948 ; - Exit with a JEN after turning PI system back on
949 ;
950 ; Interrupt data maintained:
951 ;
952 ; INTPC - PC interrupted from
953 ; INTTYP - Type 0,,0 - Vectored (If overflow occurred
954 ; 0,,n - Non-vectored channel N the left half is -1)
955 ; INTCON - CONI PI data
956 ; INTAPR - CONI APR data
957 ; INTTIM - Time of interrupt (in usec)
958 ; INTUSE - Time of interrupt (addl time in usec)
959 ; INTCSR - CSR data on interrrupt
960 ; INTNNN - Interrupt #
961 ;
962 ; The index into these tables is saved in INTNUM.
963 ;#********************************************************************
964
965 000641' 000000 000000 VIINT: 0 ; flags and PC get stored here
966 000642' 7 004 24 0 00 003065' CONI PI,VIIPI# ; save CONI PI data
967 000643' 7 004 20 0 00 000400 CONO PI,PIOFF ; no - turn off PI system
968 000644' 261 17 0 00 000000 RPUT (0,1,2,3,$SVUUO,$SVUPC) ; save some stuff
969
970
971 ; Save interrupt data
972
973 000652' 400 00 0 00 000000 SETZ ; initialized interrupt type
974 000653' 350 01 0 00 001070' AOS 1,INTNUM ; increment interrupt number
975 000654' 301 01 0 00 000024 CAIL 1,^D20 ; exceed maximum?
976 000655' 505 00 0 00 777777 HRLI 777777 ; yes - flag such
977 000656' 301 01 0 00 000024 CAIL 1,^D20 ; exceed maximum?
978 000657' 201 01 0 00 000023 MOVEI 1,^D19 ; yes - limit to 20 entries
979 000660' 202 00 0 01 001115' MOVEM INTTYP(1) ; save interrupt type
980 000661' 200 00 0 00 001070' MOVE INTNUM ; get interrupt number
981 000662' 202 00 0 01 001305' MOVEM INTNNN(1) ; save it
982 000663' 200 00 0 00 000641' MOVE VIINT ; get interrupt PC
983 000664' 202 00 0 01 001071' MOVEM INTPC(1) ; save it
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 25
DFPTAI MAC 24-Apr-84 10:48 PI System Routines SEQ 2025
984 000665' 200 00 0 00 003065' MOVE VIIPI ; get CONI PI data
985 000666' 202 00 0 01 001141' MOVEM INTCON(1) ; save it
986 000667' 7 000 24 0 00 000000 CONI APR,0 ; get CONI APR data
987 000670' 202 00 0 01 001165' MOVEM INTAPR(1) ; save it
988 000671' 400 03 0 00 000000 SETZ 3, ; set up for getting time
989 000672' 260 17 0 00 000000* GO RUNTME ; get current time
990 000673' 200 00 0 00 000000* MOVE DEBTIM ; get time in milliseconds
991 000674' 202 00 0 01 001211' MOVEM INTTIM(1) ; save it
992 000675' 200 00 0 00 000000* MOVE USTIM ; get addl time in microseconds
993 000676' 202 00 0 01 001235' MOVEM INTUSE(1) ; save it
994
995 ; Exit after turning on PI system (if not refusing them anymore)
996
997 000677' 200 00 0 01 001305' MOVE INTNNN(1) ; get interrupt number
998 000700' 307 00 0 00 020000 CAIG 20000 ; more than 20000 interrupts?
999 000701' 260 17 0 00 000552' GO .PION ; no - turn on PI system
1000 000702' 303 00 0 00 020000 CAILE 20000 ; more than 20000 interrupts?
1001 000703' 476 00 0 00 001361' SETOM .INWD1 ; yes - indicate such
1002 000704' 262 17 0 00 030114 RGET ($SVUPC,$SVUUO,3,2,1,0) ; restore stuff
1003
1004 000712' 254 12 1 00 000641' JEN @VIINT ; release interrupt and return
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 26
DFPTAI MAC 24-Apr-84 10:48 PI System Routines SEQ 2026
1005
1006 ;#********************************************************************
1007 ;* NVIINx - Non-Vectored interrupt (Port)
1008 ;#********************************************************************
1009
1010 000713' 000000 000000 NVIIN1: 0 ; for PC+flags
1011 000714' 7 004 24 0 00 003065' CONI PI,VIIPI ; save CONI PI data
1012 000715' 7 004 20 0 00 000400 CONO PI,PIOFF ; turn off PI system
1013 000716' 261 17 0 00 000000 PUT 0 ; save AC0
1014 000717' 200 00 0 00 000713' MOVE NVIIN1 ; get interrupt PC
1015 000720' 202 00 0 00 001066' MOVEM NVJEN ; save it for JEN
1016 000721' 201 00 0 00 000001 MOVEI 1 ; set up interrupt type
1017 000722' 254 00 0 00 001003' JRST NVIINC ; go to common handling
1018
1019 000723' 000000 000000 NVIIN2: 0 ; for PC+flags
1020 000724' 7 004 24 0 00 003065' CONI PI,VIIPI ; save CONI PI data
1021 000725' 7 004 20 0 00 000400 CONO PI,PIOFF ; turn off PI system
1022 000726' 261 17 0 00 000000 PUT 0 ; save AC0
1023 000727' 200 00 0 00 000723' MOVE NVIIN2 ; get interrupt PC
1024 000730' 202 00 0 00 001066' MOVEM NVJEN ; save it for JEN
1025 000731' 201 00 0 00 000002 MOVEI 2 ; set up interrupt type
1026 000732' 254 00 0 00 001003' JRST NVIINC ; go to common handling
1027
1028 000733' 000000 000000 NVIIN3: 0 ; for PC+flags
1029 000734' 7 004 24 0 00 003065' CONI PI,VIIPI ; save CONI PI data
1030 000735' 7 004 20 0 00 000400 CONO PI,PIOFF ; turn off PI system
1031 000736' 261 17 0 00 000000 PUT 0 ; save AC0
1032 000737' 200 00 0 00 000733' MOVE NVIIN3 ; get interrupt PC
1033 000740' 202 00 0 00 001066' MOVEM NVJEN ; save it for JEN
1034 000741' 201 00 0 00 000003 MOVEI 3 ; set up interrupt type
1035 000742' 254 00 0 00 001003' JRST NVIINC ; go to common handling
1036
1037 000743' 000000 000000 NVIIN4: 0 ; for PC+flags
1038 000744' 7 004 24 0 00 003065' CONI PI,VIIPI ; save CONI PI data
1039 000745' 7 004 20 0 00 000400 CONO PI,PIOFF ; turn off PI system
1040 000746' 261 17 0 00 000000 PUT 0 ; save AC0
1041 000747' 200 00 0 00 000743' MOVE NVIIN4 ; get interrupt PC
1042 000750' 202 00 0 00 001066' MOVEM NVJEN ; save it for JEN
1043 000751' 201 00 0 00 000004 MOVEI 4 ; set up interrupt type
1044 000752' 254 00 0 00 001003' JRST NVIINC ; go to common handling
1045
1046 000753' 000000 000000 NVIIN5: 0 ; for PC+flags
1047 000754' 7 004 24 0 00 003065' CONI PI,VIIPI ; save CONI PI data
1048 000755' 7 004 20 0 00 000400 CONO PI,PIOFF ; turn off PI system
1049 000756' 261 17 0 00 000000 PUT 0 ; save AC0
1050 000757' 200 00 0 00 000753' MOVE NVIIN5 ; get interrupt PC
1051 000760' 202 00 0 00 001066' MOVEM NVJEN ; save it for JEN
1052 000761' 201 00 0 00 000005 MOVEI 5 ; set up interrupt type
1053 000762' 254 00 0 00 001003' JRST NVIINC ; go to common handling
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 27
DFPTAI MAC 24-Apr-84 10:48 PI System Routines SEQ 2027
1054
1055 000763' 000000 000000 NVIIN6: 0 ; for PC+flags
1056 000764' 7 004 24 0 00 003065' CONI PI,VIIPI ; save CONI PI data
1057 000765' 7 004 20 0 00 000400 CONO PI,PIOFF ; turn off PI system
1058 000766' 261 17 0 00 000000 PUT 0 ; save AC0
1059 000767' 200 00 0 00 000763' MOVE NVIIN6 ; get interrupt PC
1060 000770' 202 00 0 00 001066' MOVEM NVJEN ; save it for JEN
1061 000771' 201 00 0 00 000006 MOVEI 6 ; set up interrupt type
1062 000772' 254 00 0 00 001003' JRST NVIINC ; go to common handling
1063
1064 000773' 000000 000000 NVIIN7: 0 ; for PC+flags
1065 000774' 7 004 24 0 00 003065' CONI PI,VIIPI ; save CONI PI data
1066 000775' 7 004 20 0 00 000400 CONO PI,PIOFF ; turn off PI system
1067 000776' 261 17 0 00 000000 PUT 0 ; save AC0
1068 000777' 200 00 0 00 000773' MOVE NVIIN7 ; get interrupt PC
1069 001000' 202 00 0 00 001066' MOVEM NVJEN ; save it for JEN
1070 001001' 201 00 0 00 000007 MOVEI 7 ; set up interrupt type
1071 001002' 254 00 0 00 001003' JRST NVIINC ; go to common handling
1072
1073 ; Save AC's and calculate interrupt number
1074
1075 001003' 261 17 0 00 000001 NVIINC: RPUT (1,2,3,$SVUUO,$SVUPC) ; save some stuff
1076
1077 001010' 350 02 0 00 001070' AOS 2,INTNUM ; increment interrupt number
1078 001011' 301 02 0 00 000024 CAIL 2,^D20 ; exceed maximum?
1079 001012' 505 00 0 00 777777 HRLI 777777 ; yes - flag such
1080 001013' 301 02 0 00 000024 CAIL 2,^D20 ; exceed maximum?
1081 001014' 201 02 0 00 000023 MOVEI 2,^D19 ; yes - limit to 20 entries
1082
1083 ; Save interrupt data
1084
1085 001015' 202 00 0 02 001115' MOVEM INTTYP(2) ; save interrupt type
1086 001016' 200 00 0 00 001070' MOVE INTNUM ; get interrupt number
1087 001017' 202 00 0 02 001305' MOVEM INTNNN(2) ; save interrupt number
1088 001020' 200 00 0 00 001066' MOVE NVJEN ; get interrupt PC
1089 001021' 202 00 0 02 001071' MOVEM INTPC(2) ; save it
1090 001022' 200 00 0 00 003065' MOVE VIIPI ; get CONI PI data
1091 001023' 202 00 0 02 001141' MOVEM INTCON(2) ; save it
1092 001024' 7 000 24 0 00 000000 CONI APR,0 ; get CONI APR data
1093 001025' 202 00 0 02 001165' MOVEM INTAPR(2) ; save it
1094 001026' 260 17 0 00 000060' GO RDCSR ; read CSR register
1095 001027' 255 00 0 00 000000 JFCL ; ignore error
1096 001030' 202 01 0 02 001261' MOVEM 1,INTCSR(2) ; save data
1097 001031' 400 03 0 00 000000 SETZ 3, ; set up for getting time
1098 001032' 260 17 0 00 000672* GO RUNTME ; get current time
1099 001033' 200 00 0 00 000673* MOVE DEBTIM ; get time in milliseconds
1100 001034' 202 00 0 02 001211' MOVEM INTTIM(2) ; save it
1101 001035' 200 00 0 00 000675* MOVE USTIM ; get addl time in microseconds
1102 001036' 202 00 0 02 001235' MOVEM INTUSE(2) ; save it
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 28
DFPTAI MAC 24-Apr-84 10:48 PI System Routines SEQ 2028
1103
1104 ; Save special interrupt data if necessary
1105
1106 001037' 400 03 0 00 000000 SETZ 3, ; clear LAR data
1107 001040' 603 01 0 00 004000 TLNE 1,(CRAMPE) ; CRAM PE occurred?
1108 GO [TLZ 1,(CRAMPE) ; yes - clear it and read
1109 TRO 1,SELLAR!EBUSPE ; LAR
1110 GO LDCSR
1111 GO RDLAR
1112 MOVE 3,1
1113 001041' 260 17 0 00 003145' RTN]
1114 001042' 603 01 0 00 002000 TLNE 1,(MBERR) ; MBUS Error occurred?
1115 GO [GO IPACLR ; yes - clear it and read
1116 MOVEI 1,SELLAR ; LAR
1117 GO LDCSR
1118 GO RDLAR
1119 MOVE 3,1
1120 001043' 260 17 0 00 003153' RTN]
1121 001044' 607 01 0 00 006000 TLNN 1,(CRAMPE!MBERR) ; interrupt bits in CSR set?
1122 001045' 602 01 0 00 007200 TRNE 1,EBUSPE!FQUERR!MVRERR!RESQAV
1123 GO [MOVE 1,INTCSR(2) ; yes - save special interrupt data
1124 MOVEM 1,.INWD1
1125 MOVEM 3,.INWD2
1126 001046' 260 17 0 00 003161' RTN]
1127
1128 ; Turn back on PI system and dismiss interrupt
1129
1130 001047' 201 00 0 00 001067' MOVEI IDELAY ; get delay time
1131 001050' 332 00 0 00 001067' SKIPE IDELAY ; specified?
1132 001051' 260 17 0 00 000000* GO ODELAY ; yes - delay a bit
1133 001052' 200 00 0 02 001305' MOVE INTNNN(2) ; get interrupt number
1134 001053' 307 00 0 00 020000 CAIG 20000 ; more than 20000 interrupts?
1135 001054' 260 17 0 00 000552' GO .PION ; no - turn on PI system
1136 001055' 303 00 0 00 020000 CAILE 20000 ; more than 20000 interrupts?
1137 001056' 476 00 0 00 001361' SETOM .INWD1 ; yes - indicate such
1138 001057' 262 17 0 00 030114 RGET ($SVUPC,$SVUUO,3,2,1,0) ; restore stuff
1139
1140 001065' 254 12 1 00 001066' JEN @NVJEN ; release interrupt and return
1141
1142 001066' 000000 000000 NVJEN: 0
1143
1144 ; Interrupt data storage
1145
1146 001067' 000000 000000 IDELAY: 0
1147 001070' 000000 000000 INTNUM: 0
1148 001071' INTPC: BLOCK ^D20
1149 001115' INTTYP: BLOCK ^D20
1150 001141' INTCON: BLOCK ^D20
1151 001165' INTAPR: BLOCK ^D20
1152 001211' INTTIM: BLOCK ^D20
1153 001235' INTUSE: BLOCK ^D20
1154 001261' INTCSR: BLOCK ^D20
1155 001305' INTNNN: BLOCK ^D20
1156 001331' 000000 000000 INTEND: 0
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 29
DFPTAI MAC 24-Apr-84 10:48 PI System Routines SEQ 2029
1157
1158 ;#********************************************************************
1159 ;* .INPNT - Print special interrupt data
1160 ;#********************************************************************
1161
1162 001332' 336 00 0 00 001361' .INPNT: SKIPN .INWD1 ; any interrupt data saved yet?
1163 001333' 263 17 0 00 000000 RTN ; no - return
1164 001334' 261 17 0 00 000000 RPUT (0,1) ; save AC's
1165
1166 001336' 200 01 0 00 001361' MOVE 1,.INWD1 ; get CSR data
1167 001337' 316 01 0 00 003165' CAMN 1,[-1] ; over 20000 interrupts?
1168 JRST [TMSGCD <[More than 20000 interrupts - PI system shut off]>
1169 001340' 254 00 0 00 003201' JRST .INPNX]
1170 001341' 603 01 0 00 004000 TLNE 1,(CRAMPE) ; CRAM PE?
1171 JRST [TMSGC <[CRAM PE at > ; yes - print such
1172 MOVE .INWD2
1173 LSH -1
1174 PNTOCS
1175 TMSGD <]>
1176 001342' 254 00 0 00 003206' JRST .INPNX]
1177 001343' 603 01 0 00 002000 TLNE 1,(MBERR) ; MBUS Error?
1178 JRST [TMSGC <[MBUS ERR at > ; yes - print such
1179 MOVE .INWD2
1180 LSH -1
1181 PNTOCS
1182 TMSGD <]>
1183 001344' 254 00 0 00 003220' JRST .INPNX]
1184 001345' 602 01 0 00 004000 TRNE 1,EBUSPE ; EBUS PE?
1185 JRST [TMSGCD <[EBUS PE]> ; yes - print such
1186 001346' 254 00 0 00 003231' JRST .INPNX]
1187 001347' 602 01 0 00 002000 TRNE 1,FQUERR ; FQ Error?
1188 JRST [TMSGCD <[FreeQ Error]> ; yes - print such
1189 001350' 254 00 0 00 003237' JRST .INPNX]
1190 001351' 602 01 0 00 001000 TRNE 1,MVRERR ; DP Error?
1191 JRST [TMSGCD <[Data Path Error]> ; yes - print such
1192 001352' 254 00 0 00 003246' JRST .INPNX]
1193 001353' 602 01 0 00 000200 TRNE 1,RESQAV ; RESPQ AV?
1194 001354' 037 00 0 00 003250' TMSGCD <[RspQ Avail]> ; yes - print such
1195
1196 ; Exit
1197
1198 001355' 402 00 0 00 001361' .INPNX: SETZM .INWD1 ; clear initial word
1199 001356' 262 17 0 00 000001 RGET (1,0) ; restore AC's
1200
1201 001360' 263 17 0 00 000000 RTN ; return
1202
1203 ; Special interrupt data
1204
1205 001361' 000000 000000 .INWD1: 0 ; CSR data
1206 001362' 000000 000000 .INWD2: 0 ; LAR data
1207
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 30
DFPTAI MAC 24-Apr-84 10:48 Page Fail Handling Routines SEQ 2030
1208 SUBTTL Page Fail Handling Routines
1209
1210 ;#********************************************************************
1211 ;* PFSET - Set up EPT locations 500-502 to handle page fails
1212 ;#********************************************************************
1213
1214 001363' 332 00 0 00 030037 PFSET: SKIPE USER ; user mode?
1215 001364' 263 17 0 00 000000 RTN ; yes - return
1216 001365' 261 17 0 00 000000 PUT 0 ; save AC0
1217 001366' 402 00 0 00 000500 SETZM 500 ; clear error address
1218 001367' 402 00 0 00 000501 SETZM 501 ; clear error PC
1219 001370' 200 00 0 00 000502 MOVE 502 ; get original dispatch address
1220 001371' 202 00 0 00 001404' MOVEM PFDISP ; save it
1221 001372' 201 00 0 00 001424' MOVEI PFCHK ; get address of routine to handle
1222 001373' 202 00 0 00 000502 MOVEM 502 ; page fails and set up 502
1223 001374' 402 00 0 00 001412' SETZM PFAIL ; init 'page fail occurred' flag
1224 001375' 402 00 0 00 001405' SETZM PFAPR ; init APR status at page fail
1225 001376' 402 00 0 00 001406' SETZM PF500 ; init location 500 at page fail
1226 001377' 402 00 0 00 001407' SETZM PF501 ; init location 501 at page fail
1227 001400' 402 00 0 00 001410' SETZM PF502 ; init location 502 at page fail
1228 001401' 402 00 0 00 001411' SETZM PFAC0 ; init AC0 at page fail
1229 001402' 262 17 0 00 000000 GET 0 ; restore AC0
1230 001403' 263 17 0 00 000000 RTN ; return
1231
1232 ; Page fail data area
1233
1234 001404' 000000 000000 PFDISP: 0 ; original dispatch address
1235 001405' 000000 000000 PFAPR: 0 ; APR status at page fail
1236 001406' 000000 000000 PF500: 0 ; location 500 at page fail
1237 001407' 000000 000000 PF501: 0 ; location 501 at page fail
1238 001410' 000000 000000 PF502: 0 ; location 502 at page fail
1239 001411' 000000 000000 PFAC0: 0 ; AC0 at page fail
1240 001412' 000000 000000 PFAIL: 0 ; flag that a page fail has occurred
1241
1242
1243 ;#********************************************************************
1244 ;* PFCLR - Restore EPT locations 500-502 to original values
1245 ;#********************************************************************
1246
1247 001413' 332 00 0 00 030037 PFCLR: SKIPE USER ; user mode?
1248 001414' 263 17 0 00 000000 RTN ; yes - return
1249 001415' 261 17 0 00 000000 PUT 0 ; save AC0
1250 001416' 402 00 0 00 000500 SETZM 500 ; clear error address
1251 001417' 402 00 0 00 000501 SETZM 501 ; clear error PC
1252 001420' 200 00 0 00 001404' MOVE PFDISP ; get original dispatch address
1253 001421' 202 00 0 00 000502 MOVEM 502 ; save it
1254 001422' 262 17 0 00 000000 GET 0 ; restore AC0
1255 001423' 263 17 0 00 000000 RTN ; return
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 31
DFPTAI MAC 24-Apr-84 10:48 Page Fail Handling Routines SEQ 2031
1256
1257 ;#********************************************************************
1258 ;* PFCHK - Check reason for page fail and dispatch appropriately
1259 ;
1260 ; This routine determines if the page fail is caused by an AR/ARX Parity
1261 ; Error. If it is, set the PFAIL flag. If not, dispatch to the original
1262 ; dispatch location.
1263 ;#********************************************************************
1264
1265 001424' 202 00 0 00 001411' PFCHK: MOVEM PFAC0 ; save AC0
1266 001425' 7 000 24 0 00 001405' CONI APR,PFAPR ; get APR status
1267 001426' 200 00 0 00 000500 MOVE 500 ; get location 500
1268 001427' 202 00 0 00 001406' MOVEM PF500 ; save it
1269 001430' 200 00 0 00 000501 MOVE 501 ; get location 501
1270 001431' 202 00 0 00 001407' MOVEM PF501 ; save it
1271 001432' 200 00 0 00 000502 MOVE 502 ; get location 502
1272 001433' 202 00 0 00 001410' MOVEM PF502 ; save it
1273 001434' 135 00 0 00 003254' LDB [POINT 5,500,5]
1274 001435' 302 00 0 00 000036 CAIE 36
1275 001436' 306 00 0 00 000037 CAIN 37
1276 001437' 254 00 0 00 001442' JRST PFCHK0
1277
1278 ; Didn't get an AR/ARx Parity Error page fail as expected - exit to
1279 ; subroutine package page fail handler.
1280
1281 001440' 200 00 0 00 001411' MOVE PFAC0 ; restore AC0
1282 001441' 254 00 1 00 001404' JRST @PFDISP ; dispatch
1283
1284 ; Did get an AR/ARx Parity Error page fail - fix the location and exit
1285
1286 001442' 350 00 0 00 001412' PFCHK0: AOS PFAIL ; increment page fail count
1287 001443' 402 00 1 00 000500 SETZM @500 ; clear the location
1288 001444' 7 000 20 0 00 021400 CONO APR,21400 ; clear error bit
1289 001445' 200 00 0 00 001411' MOVE PFAC0 ; restore AC0
1290 001446' 350 00 0 00 000501 AOS 501 ; skip the failing instruction
1291 001447' 254 12 1 00 000501 JEN @501 ; exit
1292
1293
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 32
DFPTAI MAC 24-Apr-84 10:48 Channel Handling Routines SEQ 2032
1294 SUBTTL Channel Handling Routines
1295
1296 ;#*********************************************************************
1297 ;* Routines To Interface With A Channel
1298 ;
1299 ; There are 5 routines available for interfacing with a data channel
1300 ; whose characteristic differences become transparent to the user.
1301 ;
1302 ; NAME FUNCTION
1303 ; ---- --------
1304 ; CHINIT Initialize. re-sync hardware and software
1305 ; GENCCW Generate a list of CCW's in core
1306 ; GETLOG Snapshot logout data to a core buffer area
1307 ; LOGPNT Print channel logout data
1308 ; CCWPNT Print a CCW list from memory
1309 ;
1310 ;
1311 ; Notes On Initial Control Word Addr:
1312 ;
1313 ; With each controller is an associated channel #. The channel routines
1314 ; default to the following (exec mode) initial control word addresses
1315 ; for each of the channels.
1316 ;
1317 ; TYPE DEV. CODE CHAN # ICW-ADR
1318 ; ---- --------- ------ -------
1319 ; RH20 540 0 000(ICWA0)
1320 ; RH20 544 1 004(ICWA1)
1321 ; RH20 550 2 010(ICWA2)
1322 ; RH20 554 3 014(ICWA3)
1323 ; RH20 560 4 020(ICWA4)
1324 ; NIPort 564 5 024(ICWA5)
1325 ; RH20 570 6 030(ICWA6)
1326 ; CIPort 574 7 034(ICWA7)
1327 ;
1328 ; The RH20 zero fill words are located at EPT locations 060 thru 063
1329 ; these locations are set to zero by "CHINIT" if running in exec mode.
1330 ;#*********************************************************************
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 33
DFPTAI MAC 24-Apr-84 10:48 Channel Handling Routines SEQ 2033
1331
1332 ;#*********************************************************************
1333 ;* CHINIT - Channel Initialization Routine
1334 ;
1335 ; This routine synchronizes software and hardware channel logic.
1336 ;
1337 ; Ex: MOVE 1,ARG1 ; setup AC1
1338 ; GO CHINIT ; call the routine
1339 ; Return ; ICWA is in AC1
1340 ;
1341 ; AC1: Specify (AC1)r start addr of channel command buffer
1342 ; Specify (AC1)l size of the channel command buffer
1343 ;
1344 ; Note: For figuring out the size of the command word buffer it
1345 ; should be noted that the GENCCW routine will transfer a maximum
1346 ; of 512 words per CCW. Five additional words should be allowed
1347 ; for as overhead.
1348 ;
1349 ; 1. Sets up the initial control word with the proper jump
1350 ; 2. Sets up various software params for channel routines
1351 ;#************************************************************
1352
1353 001450' 261 17 0 00 000001 CHINIT: RPUT (1,2) ; save AC's
1354
1355 001452' 554 02 0 00 000001 HLRZ 2,1 ; make AC2/final adr,,start adr
1356 001453' 275 02 0 00 000001 SUBI 2,1
1357 001454' 270 02 0 00 000001 ADD 2,1
1358 001455' 504 01 0 00 000002 HRL 1,2
1359 001456' 261 17 0 00 000001 PUT 1 ; save AC1
1360 001457' 135 01 0 00 003255' LDB 1,[POINT 3,MBCN,9] ; get channel number
1361 001460' 200 02 0 00 000001 MOVE 2,1 ; now to AC2
1362 001461' 262 17 0 00 000001 GET 1 ; restore the AC
1363
1364 001462' 202 01 0 02 002311' MOVEM 1,CADTBL(2) ; save characteristics of CCW buffer
1365 001463' 552 01 0 02 002301' HRRZM 1,SCLP(2) ; set up software cmd list pointer
1366 001464' 200 02 0 02 002363' MOVE 2,ICWA0(2) ; AC2=ICWA
1367 001465' 270 02 0 00 002277' ADD 2,CBASE ; causes paging to occur
1368 001466' 202 02 0 17 777777 MOVEM 2,-1(P) ; becomes AC1 on return
1369 001467' 336 00 0 00 000167* SKIPN UDEBUG ; debug mode?
1370 001470' 332 00 0 00 030037 SKIPE USER ; user mode?
1371 001471' 254 00 0 00 001503' JRST CHINX ; yes - exit
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 34
DFPTAI MAC 24-Apr-84 10:48 Channel Handling Routines SEQ 2034
1372
1373 ; Clear 2nd and 3rd words of logout area if in exec mode and place a
1374 ; jump to command list in the EPT. And clear the zero fill locations
1375 ; of the EPT.
1376
1377 001472' 550 01 0 00 000001 CHIN0: HRRZ 1,1 ; AC1 ==> 0,,buffer address
1378 001473' 434 01 0 00 002300' IOR 1,JMPWD ; makes a jump CCW
1379 001474' 202 01 0 02 000000 MOVEM 1,(2) ; make ICW a jump to CCW buffer
1380 001475' 402 00 0 02 000001 SETZM 1(2) ; zero the term control word
1381 001476' 402 00 0 02 000002 SETZM 2(2) ; 2nd and 3rd words now cleared
1382 001477' 402 00 0 00 000060 SETZM 60
1383 001500' 402 00 0 00 000061 SETZM 61
1384 001501' 402 00 0 00 000062 SETZM 62
1385 001502' 402 00 0 00 000063 SETZM 63 ; clears the zero fill words
1386 001503' 262 17 0 00 000002 CHINX: RGET (2,1) ; restore AC's
1387
1388 001505' 263 17 0 00 000000 RTN ; return
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 35
DFPTAI MAC 24-Apr-84 10:48 Channel Handling Routines SEQ 2035
1389
1390 ;#************************************************************
1391 ;* GENCCW - Channel Command Word Generator
1392 ;
1393 ; This routine takes a PDP10 word count and core address and translates
1394 ; it to a list of CCW's in a command ring buffer defined at init time.
1395 ; It returns the starting address of the list within the ring, and the
1396 ; # of CCW's for this transfer.
1397 ;
1398 ; This routine has the following properties:
1399 ; - A maximum of 512 words per CCW is allowed (1 page).
1400 ; - No CCW will transfer accross a page boundry.
1401 ; - The address passed to this routine is the 1st addr in the user
1402 ; buffer that data will be transferred into or out of.
1403 ; - Buffers need not be page aligned in user program.
1404 ;
1405 ; Call sequence:
1406 ; MOVE AC3,ARG3 ; a zero fill specifier
1407 ; MOVE AC2,ARG2 ; pos or neg word count
1408 ; MOVE AC1,ARG1 ; an addr up to 22 bits
1409 ; GO GENCCW ; build the command list
1410 ; RETURN ; returns here
1411 ;
1412 ; AC1:
1413 ; Contains a 22 bit address specifying where transfer is to start.
1414 ;
1415 ; AC2:
1416 ; Positive or negative word count for # of words to go to or from
1417 ; the device. A negative word count on the RH20 will cause the
1418 ; routine to build a reverse CCW list (core addr decrements).
1419 ; appropriate command list will be generated.
1420 ;
1421 ; AC3:
1422 ; Not meaningfull except for disks. Other devices should zero AC3.
1423 ; In user mode under TOPS10, this routine will clear AC3 because
1424 ; zero fill is not allowed with TOPS10 DIAG UUO's. A positive,
1425 ; non-zero, word count will cause the routine to assume that zero
1426 ; fill command words are desired in the list and the appropriate
1427 ; zero fill words will be generated. Essentially, zero fill says
1428 ; that the size of the xfer is an even modulo of the value of AC3.
1429 ; Extra words are padded with zero's supplied by the channel on a
1430 ; device write and extra words are thrown away by the channel on
1431 ; a device read.
1432 ;
1433 ; The following method is used to calculate the number of words
1434 ; of fill: FILWDS = AC3 - remainder of [ABS(AC2)/AC3]
1435 ;
1436 ; RETURN:
1437 ; On return AC1 will contain the following:
1438 ; (AC1)L = # of command words generated by the routine
1439 ; (AC1)R = Points to the first word in the list.
1440 ;#********************************************************************
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 36
DFPTAI MAC 24-Apr-84 10:48 Channel Handling Routines SEQ 2036
1441
1442 ;#********************************************************************
1443 ; Functions of the AC's used in GENCCW routine
1444 ; AC FUNCTION
1445 ; -- --------
1446 ; 0 Holds remaining size in words
1447 ; 1 CCW's are manufactured in this AC
1448 ; 2 Holds the current core adr at any time
1449 ; 3 Holds the logical channel number (0-7)
1450 ; 4 Holds current software CLP
1451 ; 5 Holds last avail buffer addr
1452 ; 6 Holds (Start adr of CCW list,,# of wds in list)
1453 ; 7 Holds the read reverse flag
1454 ; 10 A scratch AC
1455 ; 11 A scratch AC
1456 ; 12 A scratch AC
1457 ;#********************************************************************
1458
1459 001506' 332 00 0 00 030037 GENCCW: SKIPE USER ; user mode?
1460 001507' 332 00 0 00 001467* SKIPE UDEBUG ; special debug mode?
1461 001510' 254 00 0 00 001516' JRST GENGO ; no - skip this special code
1462 001511' 332 00 0 00 003064' SKIPE SNARKF ; TOPS10 or TOPS20?
1463 001512' 254 00 0 00 001516' JRST GENGO ; TOPS20 - do normal code
1464 001513' 402 00 0 00 000003 SETZM 3 ; clear users AC3 (zero fill illegal)
1465 001514' 260 17 0 00 002220' GO CHP10 ; build a special CCW list for TOPS10
1466 001515' 263 17 0 00 000000 RTN ; get out - we are done
1467
1468 ; Here for either exec mode or user mode under TOPS20
1469
1470 001516' 570 02 0 00 000002 GENGO: HRRE 2,2 ; extend sign in case used immed mode
1471 001517' 261 17 0 00 003054' PUT FILWDS# ; preserve for re-entrant possibility
1472 001520' 261 17 0 00 000010 RPUT (10,11,12) ; save AC's
1473
1474 001523' 261 17 0 00 000000 RPUT (0,1,2,3,4,5,6,7) ; save AC's
1475
1476
1477 ; Set up read reverse flag and take the absolute value of size which
1478 ; will be used as the word count ...
1479
1480 001533' 200 00 0 00 000002 MOVE 2 ; get wc to AC0 where its needed later
1481 001534' 402 00 0 00 000007 SETZM 7 ; assume forward CCW list
1482 001535' 325 00 0 00 001540' JUMPGE 0,CZF ; jump if list was positive
1483 001536' 476 00 0 00 000007 SETOM 7 ; set flag for reverse CCW list
1484 001537' 213 00 0 00 000000 MOVNS ; makes the word count positive
1485
1486 ; Calculate the number of zero fill words required (if any)
1487
1488 001540' 402 00 0 00 003054' CZF: SETZM FILWDS ; assume no zero fill required
1489 001541' 322 03 0 00 001560' JUMPE 3,ACSET ; jump if not doing zero fill
1490 001542' 200 11 0 00 000000 MOVE 11,0 ; get +WC to AC11
1491 001543' 332 00 0 00 000011 SKIPE 11 ; is the numerator = 0?
1492 001544' 254 00 0 00 001553' JRST CZFD ; no - proceed with divide operation
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 37
DFPTAI MAC 24-Apr-84 10:48 Channel Handling Routines SEQ 2037
1493
1494 ; Here because the users WC=0 and must now check for and set up for the
1495 ; possibility that he wants to transfer no words to memory but instead
1496 ; do throw away operations using zero fill only.
1497
1498 001545' 336 00 0 00 000003 SKIPN 3 ; were both WC and zero fill spec = 0?
1499 001546' 260 17 0 00 003036' GO FFF ; yes - fatal pgm bug
1500 001547' 202 03 0 00 003054' MOVEM 3,FILWDS ; yes - force remainder = divisor
1501 001550' 200 00 0 00 000003 MOVE 3 ; use zero fill spec as WC
1502 001551' 402 00 0 00 000002 SETZM 2 ; set core addr=0
1503 001552' 254 00 0 00 001561' JRST ACSET1 ; go off and set up rest of AC's
1504
1505 ; This calculates the number of fill words (if any) when there is also
1506 ; some words being transferred. The users wc not 0.
1507
1508 001553' 230 11 0 00 000003 CZFD: IDIV 11,3 ; divide to get remainder in AC12
1509 001554' 322 12 0 00 001560' JUMPE 12,ACSET ; no fill words if remainder is zero
1510 001555' 200 11 0 00 000003 MOVE 11,3 ; get zero fill specifier to AC11
1511 001556' 274 11 0 00 000012 SUB 11,12 ; subtract remainder to get fill count
1512 001557' 202 11 0 00 003054' MOVEM 11,FILWDS ; now have number of zero fill words
1513
1514 ; Set up the rest of the AC's for use by this routine and those it calls
1515
1516 001560' 200 02 0 17 777772 ACSET: MOVE 2,-6(P) ; gets the core address
1517 001561' 135 01 0 00 003255' ACSET1: LDB 1,[POINT 3,MBCN,9] ; get channel number
1518 001562' 200 03 0 00 000001 MOVE 3,1 ; now to AC3
1519 001563' 200 04 0 03 002301' MOVE 4,SCLP(3) ; gets software CLP
1520 001564' 554 05 0 03 002311' HLRZ 5,CADTBL(3) ; gets final buffer addr
1521 001565' 514 06 0 00 000004 HRLZ 6,4 ; start of CCW list,,# of words
1522
1523 ; Check direction of transfer and branch to proper CCW builder routine
1524
1525 001566' 260 17 0 00 001612' GO GRINDF ; build CCW list
1526
1527 ; Done with the list. Time to clean up and exit.
1528
1529 001567' 202 04 0 03 002301' LSTDON: MOVEM 4,SCLP(3) ; save updated software CLP.
1530 001570' 206 06 0 17 777772 MOVSM 6,-6(P) ; so we can pass back to user
1531 001571' 262 17 0 00 000007 RGET (7,6,5,4,3,2,1,0) ; restore AC's
1532
1533 001601' 262 17 0 00 000012 RGET (12,11,10)
1534
1535 001604' 262 17 0 00 003054' GET FILWDS ; restore zero fill count
1536 001605' 332 00 0 00 001507* SKIPE UDEBUG ; special debug mode?
1537 001606' 263 17 0 00 000000 RTN ; yes - return
1538 001607' 332 00 0 00 030037 SKIPE USER ; user mode?
1539 001610' 260 17 0 00 002143' GO CHP20 ; yes - TOPS20 - build DIAG CCW list ..
1540 001611' 263 17 0 00 000000 RTN ; return
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 38
DFPTAI MAC 24-Apr-84 10:48 Channel Handling Routines SEQ 2038
1541
1542 ;#********************************************************************
1543 ;* GRINDF - Subroutine to build a forward transfer CCW list.
1544 ;
1545 ; This is called from GENCCW and uses the values already in AC's.
1546 ;
1547 ; 0 - Remaining size in words 5 - Last avail buffer addr
1548 ; 1 - Manufactured CCW's 6 - (Start adr of CCW list,,# wds)
1549 ; 2 - Current core adr at any time 7 - Scratch AC
1550 ; 3 - Logical channel number (0-7) 10 - Scratch AC
1551 ; 4 - Current software CLP 11 - Scratch AC
1552 ;#********************************************************************
1553
1554 001612' 552 02 0 00 000001 GRINDF: HRRZM 2,1 ; current addr goes into CCW(R)
1555
1556 ; Code to set AC3 to number of words that remain on the page
1557
1558 001613' 135 11 0 00 003256' LDB 11,[POINT 9,2,35] ; get the low order 9 bits of address
1559 001614' 201 07 0 00 001000 MOVEI 7,^D512 ; assume a full page remains
1560 001615' 322 11 0 00 001617' JUMPE 11,WCCHK ; page aligned. full page left.
1561 001616' 274 07 0 00 000011 SUB 7,11 ; not aligned - calc size remaining
1562
1563 ; See if words to go will fit in this CCW and process accordingly
1564
1565 001617' 317 00 0 00 000007 WCCHK: CAMG 7 ; will wc fit into current space?
1566 001620' 254 00 0 00 001624' JRST WFIT ; yes
1567 001621' 137 07 0 00 003257' DPB 7,[POINT 11,1,13] ; no - use AC7 for CCW(L)
1568 001622' 274 00 0 00 000007 SUB 7 ; decrement wc by amount just used
1569 ;********* Next 2 instructions are ommitted for DFPTA tests. ****************
1570 ; JUMPE 2,.+2 ; doing a zero fill CCW right now?
1571 ; ADD 2,7 ; no - adjust addr by value of AC7
1572 ;********* This causes every CCW to start at same memory location. **********
1573 001623' 254 00 0 00 001635' JRST STRE ; and off to common code
1574
1575 ; Here because number of wds left will fit in the remaining space
1576
1577 001624' 137 00 0 00 003257' WFIT: DPB [POINT 11,1,13] ; put wc into CCW(L)
1578 001625' 322 02 0 00 001633' JUMPE 2,WFIT1 ; jump if we're doing zero fill
1579 001626' 336 00 0 00 003054' SKIPN FILWDS ; no zero fill yet. Any to follow?
1580 001627' 254 00 0 00 001633' JRST WFIT1 ; no - Then this is last CCW
1581 001630' 200 00 0 00 003054' MOVE FILWDS ; yes - Get count for zero fill words
1582 001631' 402 00 0 00 000002 SETZM 2 ; zero fill uses an address of 0
1583 001632' 254 00 0 00 001635' JRST STRE ; off to common code
1584 001633' 661 01 0 00 200000 WFIT1: TLO 1,(1B1) ; sets the last transfer bit in the CCW
1585 001634' 402 00 0 00 000000 SETZM 0 ; no more words. WC=0
1586
1587 ; Store CCW from AC1 in buffer, see if done and branch accordingly
1588
1589 001635' 260 17 0 00 001640' STRE: GO CCWST ; puts CCW in buffer
1590 001636' 327 00 0 00 001612' JUMPG GRINDF ; done? no - loop till done
1591 001637' 263 17 0 00 000000 RTN ; yes - exit ... AC's are up to date.
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 39
DFPTAI MAC 24-Apr-84 10:48 Channel Handling Routines SEQ 2039
1592
1593 ;#************************************************************
1594 ;* CCWST - RH20 CCW Store Routine
1595 ;
1596 ; 1. Puts C(AC1) in CCW buffer
1597 ; 2. Does buffer management
1598 ; 3. Counts each CCW entered
1599 ;
1600 ; The CCW is returned an AC1 as received except for the "OP-DATA"
1601 ; bit (bit-0) which is set.
1602 ;#************************************************************
1603
1604 001640' 261 17 0 00 000001 CCWST: PUT 1 ; save AC1
1605 001641' 312 04 0 00 000005 CAME 4,5 ; are we at last buffer location?
1606 001642' 254 00 0 00 001650' JRST CCWST1 ; no - go store the word
1607 001643' 200 01 0 00 002300' MOVE 1,JMPWD ; yes - build a jump CCW
1608 001644' 540 01 0 03 002311' HRR 1,CADTBL(3) ; include start adr of buffer
1609 001645' 202 01 0 04 000000 MOVEM 1,(4) ; put in the last buffer loc
1610 001646' 350 00 0 00 000006 AOS 6 ; count the entry
1611 001647' 550 04 0 00 000001 HRRZ 4,1 ; reset the CLP to start of buffer
1612 001650' 262 17 0 00 000001 CCWST1: GET 1 ; recover original CCW
1613 001651' 661 01 0 00 400000 TLO 1,(1B0) ; set op-data bit
1614 001652' 202 01 0 04 000000 MOVEM 1,(4) ; put in the buffer
1615 001653' 271 04 0 00 000001 ADDI 4,1 ; update counter/pointer
1616 001654' 271 06 0 00 000001 ADDI 6,1
1617 001655' 263 17 0 00 000000 RTN ; and exit
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 40
DFPTAI MAC 24-Apr-84 10:48 Channel Handling Routines SEQ 2040
1618
1619 ;#*********************************************************************
1620 ;* GETLOG - Snapshot The Channel Logout Area
1621 ;
1622 ; This routine takes data from the channel logout area and places it in
1623 ; LOGBUF for LOGPNT to print it out. It zeros the logout area as it
1624 ; transfers also. This routine must be called before calling LOGPNT.
1625 ;#********************************************************************
1626
1627 001656' 332 00 0 00 001605* GETLOG: SKIPE UDEBUG ; debug mode?
1628 001657' 263 17 0 00 000000 RTN ; yes - exit
1629 001660' 261 17 0 00 000000 RPUT (0,1,2) ; save AC's
1630
1631 001663' 135 01 0 00 003255' LDB 1,[POINT 3,MBCN,9] ; get channel number
1632 001664' 200 01 0 01 002363' MOVE 1,ICWA0(1) ; get ICWA
1633 001665' 270 01 0 00 002277' ADD 1,CBASE ; get EPT address
1634 001666' 332 00 0 00 030037 SKIPE USER ; user mode?
1635 GO [MOVE DEVADR ; yes - get device address word
1636 MOVEM LOGARG+1 ; and put in argument list
1637 MOVE 1,[-^D66,,LOGARG]
1638 XCT .DIAG ; get logout data
1639 GO DIAGER ; error
1640 MOVEI 1,LOGARG+2 ; set up address of logout data
1641 001667' 260 17 0 00 003261' RTN]
1642 001670' 201 02 0 00 002321' MOVEI 2,LOGBUF ; get address to save logout data
1643 001671' 504 02 0 00 000001 HRL 2,1 ; build BLT word
1644 001672' 251 02 0 00 002324' BLT 2,LOGBUF+3 ; move the data
1645 001673' 262 17 0 00 000002 RGET (2,1,0) ; restore AC's
1646
1647 001676' 263 17 0 00 000000 RTN ; return
1648
1649 ; Argument list for channel status snapshot routine
1650
1651 001677' 000000 000006 LOGARG: 6 ; function
1652 001700' 000 00 0 00 000000 Z ; reserved for device addr word
1653 001701' BLOCK 4 ; reserved for logout data
1654 001705' PHYLST: BLOCK ^D60 ; room for physical I/O list
1655 002001' BLOCK 1 ; a spare location
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 41
DFPTAI MAC 24-Apr-84 10:48 Channel Handling Routines SEQ 2041
1656
1657 ;#*********************************************************************
1658 ;* LOGPNT - Channel Logout Printer
1659 ;
1660 ; Routine prints the status of the channel at logout time. Logout data
1661 ; is printed from a buffered area, therefore, GETLOG should be executed
1662 ; first.
1663 ;#********************************************************************
1664
1665 002002' 261 17 0 00 000000 LOGPNT: RPUT (0,1,2,3) ; save AC's
1666
1667 002006' 037 00 0 00 003270' TMSGC <Channel->
1668 002007' 135 01 0 00 003255' LDB 1,[POINT 3,MBCN,9] ; get channel number
1669 002010' 200 03 0 00 000001 MOVE 3,1 ; now to AC3
1670 002011' 200 00 0 00 000003 MOVE 3 ; ready to print
1671 002012' 037 01 0 00 000000 PNT1 ; print it
1672 TMSG <Logout Data
1673 002013' 037 00 0 00 003273' Loc Contents>
1674 002014' 260 17 0 00 002024' GO ICWPT ; print ICW data
1675 002015' 260 17 0 00 002030' GO LOSPT ; print SW1 data
1676 002016' 260 17 0 00 002045' GO TCWPT ; prints TCW status
1677 002017' 262 17 0 00 000003 RGET (3,2,1,0) ; restore the AC's
1678
1679 002023' 263 17 0 00 000000 RTN ; and exit
1680
1681 ; Printer for initial control word & pointer setup routine
1682
1683 002024' 037 00 0 00 003301' ICWPT: TMSGC < 1 ICW: >
1684 002025' 200 00 0 00 002321' MOVE LOGBUF ; fetch the initial CW
1685 002026' 037 13 0 00 000000 PNTHW ; and print it
1686 002027' 263 17 0 00 000000 RTN ; and exit
1687
1688 ; RH20 status word-1 printer
1689
1690 002030' 037 00 0 00 003304' LOSPT: TMSGC < 2 SW1: >
1691 002031' 200 01 0 00 002322' MOVE 1,LOGBUF+1 ; get SW1 word
1692 002032' 404 01 0 00 003307' AND 1,[777760,,0] ; mask off unwanted bits
1693 002033' 400 02 0 00 000000 SETZ 2, ; initialize text pointer
1694 002034' 603 01 0 00 400000 LOSPT1: TLNE 1,400000 ; bit set?
1695 XCT [TMSG < LOGOUT> ; yes - print text
1696 TMSG < M-PAR>
1697 TMSG < -ADRPE>
1698 TMSG < -WCZRO>
1699 TMSG < NXM>
1700 JFCL
1701 JFCL
1702 JFCL
1703 JFCL
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 42
DFPTAI MAC 24-Apr-84 10:48 Channel Handling Routines SEQ 2042
1704 1705 TMSG < LSTXER>
1706 TMSG < RH-ERR>
1707 TMSG < LNG-WC>
1708 TMSG < SHT-WC>
1709 002035' 256 00 0 02 003333' TMSG < OVRRUN>](2)
1710 002036' 242 01 0 00 000001 LSH 1,1 ; shift in next bit
1711 002037' 350 00 0 00 000002 AOS 2 ; point the next text
1712 002040' 326 01 0 00 002034' JUMPN 1,LOSPT1 ; loop till done
1713 002041' 037 00 0 00 003351' TMSG < CLP points to: >
1714 002042' 135 00 0 00 003355' LDB [POINT 22,LOGBUF+1,35] ; fetch the actual CLP address
1715 002043' 037 16 0 00 000003 PNTOCS ; print in octal
1716 002044' 263 17 0 00 000000 RTN ; and exit
1717
1718 ; Print termination word from the logout area
1719
1720 002045' 037 00 0 00 003356' TCWPT: TMSGC < 3 Last Updated CCW: >
1721 002046' 200 00 0 00 002323' MOVE LOGBUF+2 ; fetch last CCW
1722 002047' 037 13 0 00 000000 PNTHW ; print it
1723 002050' 037 00 0 00 003364' TMSG < WC=>
1724 002051' 135 00 0 00 003366' LDB [POINT 11,LOGBUF+2,13] ; gets word count
1725 002052' 037 15 0 00 000000 PNTDEC ; print it
1726 002053' 037 00 0 00 003367' TMSG <. ADR=>
1727 002054' 135 00 0 00 003371' LDB [POINT 22,LOGBUF+2,35] ; gets address
1728 002055' 037 16 0 00 000003 PNTOCS ; print it in octal
1729 002056' 263 17 0 00 000000 RTN
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 43
DFPTAI MAC 24-Apr-84 10:48 Channel Handling Routines SEQ 2043
1730
1731 ;#*********************************************************************
1732 ;* CCWPNT - Channel Command List Printer
1733 ;
1734 ; Address of the list is - CBUF (in exec mode)
1735 ; CHARG (under TOPS20)
1736 ; CHARG1 (under TOPS10)
1737 ;
1738 ; Calling Sequence: GO CCWPNT ; print
1739 ; Return ; and return
1740 ;#********************************************************************
1741
1742 002057' 261 17 0 00 000000 CCWPNT: RPUT (0,1,2,3,4) ; save the AC's
1743
1744 002064' 400 03 0 00 000000 SETZ 3, ; clear count of CCW's
1745
1746 ; Get address of list
1747
1748 002065' 201 04 0 00 000000* MOVEI 4,CBUF ; get address of CCW list
1749 002066' 336 00 0 00 030037 SKIPN USER ; user mode?
1750 002067' 254 00 0 00 002073' JRST .+4 ; no - continue
1751 002070' 201 04 0 00 002254' MOVEI 4,CHARG1+2 ; yes - get address of TOPS10 list
1752 002071' 332 00 0 00 003064' SKIPE SNARKF ; TOPS20?
1753 002072' 201 04 0 00 002206' MOVEI 4,CHARG+2 ; yes - get address of TOPS20 list
1754
1755 ; Print titles
1756
1757 002073' 037 00 0 00 003372' TMSGC <CCW List:>
1758 002074' 037 00 0 00 003375' TMSGC < # Op Code Word Cnt Buffer Adr>
1759 002075' 037 00 0 00 003405' TMSGC < - ------- -------- ---------->
1760
1761 ; Initialize last CCW printed and number of CCW's skipped - these will
1762 ; be used to determine what to print so as to shorten the CCW list.
1763
1764 002076' 402 00 0 00 003056' SETZM LSTCCW# ; clear 'last CCW' printed
1765 002077' 476 00 0 00 003063' SETOM SKPCCW# ; init 'number of CCW's skipped'
1766
1767 ; Loop on CCW's
1768
1769 002100' 336 01 0 04 000000 CCWPN0: SKIPN 1,(4) ; fetch current CCW - zero?
1770 002101' 254 00 0 00 002134' JRST CCWPNX ; yes - done printing
1771 002102' 350 00 0 00 000004 AOS 4 ; point to next word
1772 002103' 350 00 0 00 000003 AOS 3 ; increment CCW count
1773
1774 ; Check if have to skip a few of these
1775
1776 002104' 312 01 0 00 003056' CAME 1,LSTCCW ; same as 'last CCW printed'?
1777 002105' 254 00 0 00 002112' JRST CCWPN1 ; no - go print it
1778 002106' 350 00 0 00 003063' AOS SKPCCW ; update 'number of CCW's skipped'
1779 002107' 336 00 0 00 003063' SKIPN SKPCCW ; 'number of CCW's skipped' zero?
1780 002110' 037 00 0 00 003415' TMSGC < ..> ; yes - print this
1781 002111' 254 00 0 00 002100' JRST CCWPN0 ; loop till done
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 44
DFPTAI MAC 24-Apr-84 10:48 Channel Handling Routines SEQ 2044
1782
1783 ; Print the CCW word
1784
1785 002112' 202 01 0 00 003056' CCWPN1: MOVEM 1,LSTCCW ; update 'last CCW printed'
1786 002113' 476 00 0 00 003063' SETOM SKPCCW ; init 'number of CCW's skipped'
1787 002114' 037 00 0 00 030242 PCRL
1788 002115' 001 03 0 00 000003 PNTOCC 3,3 ; print CCW number
1789 002116' 135 01 0 00 003417' LDB 1,[POINT 3,LSTCCW,2] ; get op code
1790 XCT [TMSG < Halt > ; print it
1791 TMSG < ??1?? >
1792 TMSG < Jump >
1793 TMSG < ??3?? >
1794 TMSG < Dt-fwd >
1795 TMSG < Dt-rev >
1796 TMSG < Dt-fwd-hlt>
1797 002117' 256 00 0 01 003450' TMSG < Dt-rev-hlt>](1)
1798 002120' 135 00 0 00 003460' LDB [POINT 11,LSTCCW,13] ; get word count
1799 002121' 006 07 0 00 000000 PDEC 7,0 ; print it
1800 002122' 037 00 0 00 003461' TMSG < >
1801 002123' 135 00 0 00 003462' LDB [POINT 22,LSTCCW,35] ; get address
1802 002124' 037 10 0 00 000000 PNTADR ; print it
1803
1804 ; Check for end of list
1805
1806 002125' 135 00 0 00 003417' LDB [POINT 3,LSTCCW,2] ; fetch control part of the CCW
1807 002126' 306 00 0 00 000002 CAIN 2 ; is it a jump CCW?
1808 002127' 254 00 0 00 002100' JRST CCWPN0 ; no - keep looping
1809 002130' 322 00 0 00 002134' JUMPE CCWPNX ; (0-2)=000 means halt
1810 002131' 242 00 0 00 777777 LSH -1
1811 002132' 302 00 0 00 000003 CAIE 3 ; (0-2) 110 or 111 is lst xfer CCW
1812 002133' 254 00 0 00 002100' JRST CCWPN0 ; no - keep looping
1813
1814 ; Exit
1815
1816 002134' 037 00 0 00 030242 CCWPNX: PCRL ; final CRLF
1817 002135' 262 17 0 00 000004 RGET (4,3,2,1,0) ; restore the AC's
1818
1819 002142' 263 17 0 00 000000 RTN ; and exit
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 45
DFPTAI MAC 24-Apr-84 10:48 Channel Handling Routines SEQ 2045
1820
1821 ;#********************************************************************
1822 ;* CHP20 - Builds a TOPS20 User Mode Channel Program
1823 ;
1824 ; This routine is used to build a channel program using a diagnostic
1825 ; monitor call. This routine is set up to operate with up to 50 channel
1826 ; command words which is the TOPS20 limit. (1 page per CCW)
1827 ;
1828 ; This routine expects AC1 to be set up in the following way:
1829 ; AC1(R) = Pointer to first word
1830 ; AC1(L) = # of words in the list (50 or less)
1831 ;
1832 ; Calling sequence:
1833 ;
1834 ; MOVE 1,ARG ; # of words,,pointer to first
1835 ; GO CHP20 ; call the routine
1836 ; RETURN ; returns +1 always
1837 ;#********************************************************************
1838
1839 002143' 261 17 0 00 000004 CHP20: RPUT (4,3,2,0,1) ; save AC's
1840
1841
1842 ; Get the logical chan # to AC3
1843
1844 002150' 135 01 0 00 003255' LDB 1,[POINT 3,MBCN,9] ; get channel number
1845 002151' 200 03 0 00 000001 MOVE 3,1 ; now to AC3
1846
1847 ; Range check the word count
1848
1849 002152' 554 00 0 17 000000 HLRZ (P) ; get count
1850 002153' 303 00 0 00 000062 CAILE ^D50 ; less than or equal to 50
1851 002154' 260 17 0 00 003036' GO FFF ; fatal out
1852
1853 ; Word count ok. Set up pointer & xfer to argument list
1854
1855 002155' 402 00 0 00 000002 SETZM 2 ; clear index
1856 002156' 210 01 0 00 000000 MOVN 1,0 ; -CNT to AC1
1857 002157' 514 01 0 00 000001 HRLZ 1,1 ; -CNT to left half
1858 002160' 540 01 0 17 000000 HRR 1,(P) ; pointer to right half
1859 002161' 200 00 0 01 000000 CHPGM0: MOVE (1) ; fetch a CCW
1860 002162' 202 00 0 02 002206' CHPGM1: MOVEM CHARG+2(2) ; put in argument list
1861 002163' 402 00 0 02 002207' SETZM CHARG+3(2) ; zero next loc so end of list obvious
1862 002164' 350 00 0 00 000002 AOS 2 ; bump store pointer
1863 002165' 253 01 0 00 002161' AOBJN 1,CHPGM0 ; loop till done
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 46
DFPTAI MAC 24-Apr-84 10:48 Channel Handling Routines SEQ 2046
1864
1865 ; Set up an execute DIAG monitor call
1866
1867 002166' 200 01 0 00 003053' MOVE 1,DEVADR ; get device address word
1868 002167' 202 01 0 00 002205' MOVEM 1,CHARG+1 ; put in argument list
1869 002170' 271 02 0 00 000002 ADDI 2,2 ; AC2 now holds # of arguments
1870 002171' 210 02 0 00 000002 MOVN 2,2 ; make it negative
1871 002172' 514 01 0 00 000002 HRLZ 1,2 ; -count to left hand side AC1
1872 002173' 541 01 0 00 002204' HRRI 1,CHARG ; pointer to arglist
1873 002174' 256 00 0 00 002407' C20D: XCT .DIAG ; DIAG monitor call
1874 002175' 260 17 0 00 002256' GO DIAGER ; error
1875 002176' 262 17 0 00 000001 RGET (1,0,2,3,4) ; no error
1876
1877 002203' 263 17 0 00 000000 RTN
1878
1879 ; Argument list for channel program command
1880
1881 002204' 000000 000004 CHARG: 4 ; function code
1882 002205' 000 00 0 00 000000 Z ; reserved for device address word
1883 002206' BLOCK ^D10 ; reserved for CCW's
1884
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 47
DFPTAI MAC 24-Apr-84 10:48 Channel Handling Routines SEQ 2047
1885
1886 ;#********************************************************************
1887 ;* CHP10 - Builds a TOPS10 Channel Command List
1888 ;
1889 ; This routine is used to build a TOPS10 channel command list using the
1890 ; DIAG UUO monitor call. Both forward and read reverse command lists are
1891 ; supported.
1892 ;
1893 ; For a forward list TOPS10 expects 1 word of the form (-WC,,ADDR-1)
1894 ; where I/O is to take place. This is done with a DIAG function 4.
1895 ;
1896 ; For a read reverse list TOPS10 expects 1 word of the form (-WC,,ADDR)
1897 ; where I/O is to take place. This is done with a DIAG function 12.
1898 ;
1899 ; Calling sequence:
1900 ; MOVE AC1,ARG1 ; start addr of buffer (first location)
1901 ; MOVE AC2,ARG2 ; word count (+means FWD, -means REV)
1902 ; GO CHP10 ; call the routine
1903 ; RTN+1 ; RTN+1 always. AC1 contains # of wds in
1904 ; ; CCW list and pointer to the first
1905 ; ; for compatability with CCWPNT
1906 ;#********************************************************************
1907
1908 002220' 261 17 0 00 000000 CHP10: RPUT (0,1,2) ; save AC's
1909
1910 002223' 570 02 0 00 000002 HRRE 2,2 ; extend sign (user maybe used MOVEI)
1911 002224' 321 02 0 00 002233' JUMPL 2,CWBACK ; -WC means reverse list...
1912 002225' 201 00 0 00 000004 MOVEI 4 ; +WC means fwd. Get function code
1913 002226' 213 02 0 00 000002 MOVNS 2,2 ; make AC2/-WC,,ADDR-1
1914 002227' 504 02 0 00 000002 HRL 2,2
1915 002230' 540 02 0 00 000001 HRR 2,1
1916 002231' 275 02 0 00 000001 SUBI 2,1 ; AC2/-WC,,ADDR-1
1917 002232' 254 00 0 00 002236' JRST CP10C ; to common code
1918 002233' 201 00 0 00 000012 CWBACK: MOVEI 12 ; -WC means rev. Get function code
1919 002234' 504 02 0 00 000002 HRL 2,2 ; make AC2/-WC,,ADDR
1920 002235' 540 02 0 00 000001 HRR 2,1 ; AC2/-WC,,ADDR
1921 002236' 202 00 0 00 002252' CP10C: MOVEM CHARG1 ; put function code in table
1922 002237' 202 02 0 00 002254' MOVEM 2,CHARG1+2 ; put TOPS10 CCW in table
1923 002240' 200 01 0 00 003053' MOVE 1,DEVADR ; get device address word
1924 002241' 202 01 0 00 002253' MOVEM 1,CHARG1+1 ; put in argument table
1925 002242' 200 01 0 00 003463' MOVE 1,[-3,,CHARG1] ; get argument list pointer for DIAG
1926 002243' 256 00 0 00 002407' XCT .DIAG ; execute the monitor call
1927 002244' 260 17 0 00 002256' GO DIAGER ; error reporter ....
1928 002245' 262 17 0 00 000002 RGET (2,1,0) ; restore AC's
1929
1930 002250' 200 01 0 00 003464' MOVE 1,[1,,CHARG1+2] ; for compatability with CCWPNT
1931 002251' 263 17 0 00 000000 RTN ; exit
1932
1933 ; Argument list for TOPS10 DIAG CCW list builder
1934
1935 002252' 000 00 0 00 000000 CHARG1: Z ; function goes here
1936 002253' 000 00 0 00 000000 Z ; device addr goes here
1937 002254' 000 00 0 00 000000 Z ; single CCW goes here
1938 002255' 000 00 0 00 000000 Z ; a spare word
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 48
DFPTAI MAC 24-Apr-84 10:48 Channel Handling Routines SEQ 2048
1939
1940 ;#*********************************************************************
1941 ;* DIAGER - Report Monitor Call Error In User Mode
1942 ;
1943 ; This routine prints an error message stating where and why a
1944 ; diagnostic monitor call has failed.
1945 ;#*********************************************************************
1946
1947 002256' 261 17 0 00 000000 DIAGER: RPUT (0,1) ; save AC's
1948
1949 002260' 202 01 0 00 003061' MOVEM 1,SAC1# ; save the error number
1950 002261' 037 01 0 00 030242 PCRLF
1951 002262' 037 01 0 00 003465' FMSGC <? Error return from diagnostic monitor call at PC->
1952 002263' 540 00 0 17 777776 HRR -2(P) ; get pc
1953 002264' 037 17 0 00 000003 PNTOCF ; print it
1954 002265' 037 01 0 00 003500' FMSGC <? Error code=>
1955 002266' 200 00 0 00 003061' MOVE SAC1 ; get error code
1956 002267' 037 17 0 00 000003 PNTOCF ; print it
1957 002270' 037 01 0 00 003504' FMSG < - >
1958 002271' 260 17 0 00 002710' GO DGEPNT ; print DIAG error message
1959 002272' 037 01 0 00 030242 PCRLF
1960 002273' 262 17 0 00 000000 RGET (0,1) ; restore AC's
1961
1962 002275' 263 17 0 00 000000 RTN ; return
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 49
DFPTAI MAC 24-Apr-84 10:48 Channel Handling Routines SEQ 2049
1963
1964 ;#*********************************************************************
1965 ;* Some Channel Routine Variables
1966 ;
1967 ; Here are the conditional RH20 parameters necessary for use with the
1968 ; data channel routines.
1969 ;
1970 ; The # of words (maximum) that will be specified in a single
1971 ; channel control word.
1972 ;#********************************************************************
1973
1974 002276' 000000 001000 MAXWD: ^D512 ; default to 1 page per xfer word
1975 002277' 000000 000000 CBASE: 0 ; a base for computing ICWA in RH20
1976 ; the 340000 causes paging
1977 002300' 200000 000000 JMPWD: 1B1 ; a KL10 channel jump word
1978 002301' SCLP: BLOCK ^D8 ; 8 software clp's
1979 002311' CADTBL: BLOCK ^D8 ; CCW buff params last adr,,first adr
1980 002321' LOGBUF: BLOCK ^D32 ; buffered logout area
1981 002361' 000000 000004 CHK: 4 ; # of logout words per channel
1982 002362' 777774 002321' CHCNT: -4,,LOGBUF ; used by GETLOG
1983
1984 ;Defining initial control wd addr for each channel
1985
1986 002363' 000000 000000 ICWA0: 0
1987 002364' 000000 000004 ICWA1: 4
1988 002365' 000000 000010 ICWA2: 10
1989 002366' 000000 000014 ICWA3: 14
1990 002367' 000000 000020 ICWA4: 20
1991 002370' 000000 000024 ICWA5: 24
1992 002371' 000000 000030 ICWA6: 30
1993 002372' 000000 000034 ICWA7: 34
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 50
DFPTAI MAC 24-Apr-84 10:48 Channel Handling Routines SEQ 2050
1994
1995 ;#********************************************************************
1996 ;* CHDATA - Obtain channel logout data and inspect results
1997 ;
1998 ; Arguments: AC1 - Contains expected word count
1999 ;
2000 ; Returns: +1 - Error occurred
2001 ; +2 - No error occurred
2002 ;
2003 ; AC1 - Contains error flags
2004 ;#********************************************************************
2005
2006 002373' 261 17 0 00 000000 CHDATA: PUT 0 ; save AC0
2007 002374' 260 17 0 00 001656' GO GETLOG ; get logout data into LOGBUF
2008 002375' 200 01 0 00 003505' MOVE 1,[LOGBUF,,CSTWRD] ; move it from LOGBUF to
2009 002376' 251 01 0 00 000000# BLT 1,CSTWRD+3 ; CSTWRD
2010 002377' 200 01 0 00 000000# MOVE 1,CSTWRD+1 ; status in AC5
2011 002400' 621 01 0 00 400017 TLZ 1,400017 ; clear 'LOGO' bit / address bits
2012 002401' 620 01 0 00 777777 TRZ 1,777777 ; clear address
2013 002402' 430 01 0 00 003506' XOR 1,[ADRPE] ; complement parity error bit
2014 002403' 262 17 0 00 000000 GET 0 ; restore AC0
2015 002404' 263 17 0 00 000000 RTN ; return
2016
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 51
DFPTAI MAC 24-Apr-84 10:48 User Mode Support Routines SEQ 2051
2017 SUBTTL User Mode Support Routines
2018
2019 ;#************************************************************
2020 ;* DSETUP - Setup Routine For Diagnostic Function
2021 ;
2022 ; This routine sets up a location called ".DIAG" with the appropriate
2023 ; JSYS or UUO for a diagnostic monitor call. Two monitor types are
2024 ; presently known 1=TOPS, 4=SNARK. The monitor type is found in bits
2025 ; 21-23 of Monitor Table-11, Entry-112. This information is retrieved
2026 ; by executing a GETTAB UUO which never fails. ".DIAG" is set up so
2027 ; that the AC field is 1 (means AC1 is used for argument pointer).
2028 ;
2029 ; Calling sequence:
2030 ; GO DSETUP ; call the routine
2031 ; RETURN ; returns + 1 always>
2032 ;#************************************************************
2033
2034 002405' 047000 000163 .UUO: 047000,,163 ; CALLI AC,163 for TOPS
2035 002406' 104000 000530 .JSYS: 104000,,530 ; JSYS AC,530 for SNARK
2036 002407' 260 17 0 00 002470' .DIAG: GO NOSET ; a default error reporter
2037
2038 002410' 336 00 0 00 001656* DSETUP: SKIPN UDEBUG ; special debug mode?
2039 002411' 336 00 0 00 030037 SKIPN USER ; exec mode?
2040 002412' 263 17 0 00 000000 RTN ; yes - then exit
2041 002413' 402 00 0 00 003055' SETZM INDIAG# ; a flag used during request
2042 002414' 261 17 0 00 000000 PUT 0 ; save AC0
2043 002415' 200 00 0 00 003507' MOVE [112,,11] ; entry-112,,table-11
2044 002416' 047 00 0 00 000041 GETTAB ; a GETTAB UUO
2045 002417' 260 17 0 00 003036' GO FFF ; GETTABs can't fail
2046 002420' 135 00 0 00 003510' LDB [POINT 3,0,23] ; get monitor type field
2047 002421' 402 00 0 00 003064' SETZM SNARKF# ; init SNARK flag to 1
2048 002422' 350 00 0 00 003064' AOS SNARKF
2049 002423' 306 00 0 00 000001 CAIN 1 ; type = 1
2050 002424' 254 00 0 00 002437' JRST TPSMON ; yes - TOPS monitor
2051 002425' 306 00 0 00 000004 CAIN 4 ; type = 4
2052 002426' 254 00 0 00 002433' JRST SNKMON ; yes - SNARK monitor
2053
2054 ; Unrecognized monitor type
2055
2056 002427' 037 01 0 00 003511' FMSGC <Can't run under this monitor. Type = >
2057 002430' 037 01 0 00 000001 PNT1F
2058 002431' 037 01 0 00 003522' FMSGCD <Type comes from bits 21-23 of Table-11, Entry-112. (1&4) are allowed.>
2059 002432' 260 17 0 00 003036' GO FFF ; fatal out
2060
2061 ; SNARK monitor found (TOPS-20)
2062
2063 002433' 201 00 0 00 000002 SNKMON: MOVEI 2 ; request function for TOPS20
2064 002434' 202 00 0 00 002576' MOVEM REQARG ; save it in argument block
2065 002435' 200 00 0 00 002406' MOVE .JSYS ; get appropriate JSYS
2066 002436' 254 00 0 00 002444' JRST TPSM2 ; to common code
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 52
DFPTAI MAC 24-Apr-84 10:48 User Mode Support Routines SEQ 2052
2067
2068 ; TOPS monitor found (TOPS-10)
2069
2070 002437' 260 17 0 00 002474' TPSMON: GO CPUTST ; test for dual CPU
2071 002440' 201 00 0 00 000001 MOVEI 1 ; request function 1 for TOPS10
2072 002441' 202 00 0 00 002576' MOVEM REQARG ; save it in argument block
2073 002442' 402 00 0 00 003064' SETZM SNARKF ; clear SNARK flag
2074 002443' 200 00 0 00 002405' MOVE .UUO ; get appropriate UUO
2075 002444' 661 00 0 00 000040 TPSM2: TLO (1B12) ; 1 into AC field
2076 002445' 202 00 0 00 002407' MOVEM .DIAG ; move into execute location
2077 002446' 336 00 0 00 003064' SKIPN SNARKF ; TOPS-20 monitor?
2078 002447' 254 00 0 00 002455' JRST SMX ; no - exit
2079 002450' 260 17 0 00 003016' GO ENABLE ; yes - enable avail privileges
2080 002451' 104 00 0 00 000310 USRIO ; set USRIO bit to check privileges
2081 002452' 254 00 0 00 002457' JRST NOPRIV ; user has no privileges for diagnostic
2082 002453' 254 02 1 00 002454' JRSTF @.+1 ; now turn the IOT priv off
2083 002454' 010000 002455' 010000,,.+1 ; modifies the PC word
2084 002455' 262 17 0 00 000000 SMX: GET 0 ; restore the AC
2085 002456' 263 17 0 00 000000 RTN ; exit
2086
2087 002457' 037 01 0 00 003541' NOPRIV: FMSGCD <User does not have proper priviledges to run diagnostic!!>
2088 002460' 260 17 0 00 003036' GO FFF
2089 002461' 201 01 0 00 000101 MOVEI 1,101 ; specify terminal as destination
2090 002462' 200 02 0 00 003556' MOVE 2,[400000,,-1] ; specify the handle
2091 002463' 402 00 0 00 000003 SETZM 3 ; must be cleared
2092 002464' 104 00 0 00 000011 ERSTR ; does an ERSTR JSYS
2093 002465' 260 17 0 00 003036' GO FFF ; error rtn .... HALTF
2094 002466' 260 17 0 00 003036' GO FFF ; other error rtn .... HALTF
2095 002467' 260 17 0 00 003036' GO FFF ; then back to the monitor
2096
2097 ; Default error reporter if we try to execute a DIAG function with
2098 ; setting up.
2099
2100 002470' 332 00 0 00 002410* NOSET: SKIPE UDEBUG ; debug mode?
2101 JRST [AOS (P) ; yes - return
2102 002471' 254 00 0 00 003557' RTN]
2103 002472' 037 01 0 00 003561' FMSGCD <Diagnostic attempted a DIAG before initialization>
2104 002473' 260 17 0 00 003036' GO FFF
2105
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 53
DFPTAI MAC 24-Apr-84 10:48 User Mode Support Routines SEQ 2053
2106
2107 ;#************************************************************
2108 ;* CPUTST - Determine Which Of 2 CPU's To Run On
2109 ;
2110 ; Here if TOPS10 only. First find out if we have a dual CPU system.
2111 ; If so, ask user to select the proper one. You must test RH's only that
2112 ; are on the same CPU. This code also sets up to run on the correct one.
2113 ;
2114 ; Calling sequence:
2115 ; GO CPUTST ; call the routine
2116 ; RTN ; RTN+1 always
2117 ;#********************************************************************
2118
2119 002474' 336 00 0 00 030037 CPUTST: SKIPN USER ; user mode?
2120 002475' 263 17 0 00 000000 RTN ; no - exit
2121 002476' 261 17 0 00 000000 RPUT (0,1,2) ; yes - save AC's
2122
2123 002501' 200 00 0 00 003574' MOVE [17,,11] ; TABLE=11 ENTRY=17
2124 002502' 047 00 0 00 000041 GETTAB 0, ; table lookup
2125 002503' 260 17 0 00 003036' GO FFF ; fatal out
2126 002504' 607 00 0 00 000040 TLNN 40 ; dual CPU system?
2127 002505' 254 00 0 00 002525' JRST DPRCX ; no - then we can exit
2128 002506' 336 00 0 00 003057' SKIPN MCPUS# ; msg flag printed flag set?
2129 FMSGC <This is a multi-CPU system. You must choose only 1 to run in.
2130 002507' 037 01 0 00 003575' Furthermore, all the RH's you select "must" be on that CPU.>
2131 002510' 476 00 0 00 003057' SETOM MCPUS ; clear the flag
2132 002511' 037 01 0 00 003627' FMSGC <Select CPU 0 thru 5 <CR> - >
2133 002512' 037 04 0 00 000003 TTIDEC
2134 002513' 254 00 0 00 002512' JRST .-1 ; timeout
2135 002514' 331 00 0 00 000000 SKIPL ; less than 0?
2136 002515' 303 00 0 00 000005 CAILE 5 ; less than or equal 5?
2137 002516' 254 00 0 00 002511' JRST .-5 ; invalid - reask
2138 002517' 200 02 0 00 000000 MOVE 2,0 ; get # to AC for indexing later
2139 002520' 201 01 0 00 000001 MOVEI 1,1 ; set bit mask to assume CPU0
2140 002521' 242 01 0 02 000000 LSH 1,(2) ; shift into position for selected CPU
2141 002522' 505 01 0 00 000014 HRLI 1,14 ; set CPU is Function-14
2142 002523' 047 01 0 00 000075 SETUUO 1, ; set to proper CPU
2143 JRST [FMSGC <SETCPU UUO failed. Either wrong CPU selection or>
2144 FMSGCD <must have wheel privileges.>
2145 002524' 254 00 0 00 003657' GO FFF] ; fatal out
2146 002525' 262 17 0 00 000002 DPRCX: RGET (2,1,0) ; restore AC's
2147
2148 002530' 263 17 0 00 000000 RTN ; and exit
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 54
DFPTAI MAC 24-Apr-84 10:48 User Mode Support Routines SEQ 2054
2149
2150 ;#************************************************************
2151 ;* DEVREL - User Mode Release Routine
2152 ;
2153 ; In user mode, a DIAG, Function-3, is issued to return the port to the
2154 ; monitor. This routine is different in use from RH20 disk and tape uses
2155 ; in that the port is released only when exiting the diagnostic.
2156 ;
2157 ; Return: +1 always
2158 ;#************************************************************
2159
2160 002531' 336 00 0 00 002470* DEVREL: SKIPN UDEBUG ; special debug mode?
2161 002532' 336 00 0 00 030037 SKIPN USER ; or exec mode?
2162 002533' 263 17 0 00 000000 RTN ; yes - return
2163
2164 ; See if any port is specified
2165
2166 002534' 400 16 0 00 000000 SETZ MBCN, ; initialize MBCN
2167 002535' 332 00 0 00 002605' SKIPE HAVENI ; have the NI port?
2168 002536' 200 16 0 00 000000* MOVE MBCN,PORTNI ; yes - set up MBCN
2169 002537' 332 00 0 00 002604' SKIPE HAVECI ; have the CI port?
2170 002540' 200 16 0 00 000000* MOVE MBCN,PORTCI ; yes - set up MBCN
2171 002541' 322 16 0 00 003124' JUMPE MBCN,[RTN] ; any selected? no - return
2172
2173 ; Do the release
2174
2175 002542' 261 17 0 00 000001 RPUT (1,2) ; save AC's
2176
2177 002544' 260 17 0 00 000243' GO IPACLR ; do a port clear
2178
2179 ; Get device address
2180
2181 002545' 200 00 0 00 000016 MOVE MBCN ; get device code
2182 002546' 336 00 0 00 003064' SKIPN SNARKF ; TOPS-20 monitor?
2183 002547' 242 00 0 00 000003 LSH 3 ; no - position all the way left
2184 002550' 135 01 0 00 003255' LDB 1,[POINT 3,MBCN,9] ; get channel number
2185 002551' 137 01 0 00 003510' DPB 1,[POINT 3,0,23] ; put into device address
2186 002552' 202 00 0 00 003053' MOVEM DEVADR# ; save it
2187 002553' 202 00 0 00 002575' MOVEM RELARG+1 ; place in argument list
2188
2189 ; Do the DIAG
2190
2191 002554' 200 01 0 00 003662' MOVE 1,[-2,,RELARG] ; pointer used
2192 002555' 476 00 0 00 003055' SETOM INDIAG# ; useful for debugging crashes
2193 002556' 256 00 0 00 002407' REL: XCT .DIAG ; execute DIAG function
2194 GO [MOVEM 1,SAC1 ; error
2195 CAMN MBCN,PORTCI
2196 FMSGC <[Release of CI port failed - >
2197 CAMN MBCN,PORTNI
2198 FMSGC <[Release of NI port failed - >
2199 GO DGEPNT ; print error message
2200 PCRLF ; final CRLF
2201 002557' 260 17 0 00 003701' RTN] ; exit
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 55
DFPTAI MAC 24-Apr-84 10:48 User Mode Support Routines SEQ 2055
2202 002560' 402 00 0 00 003055' SETZM INDIAG ; no longer in DIAG JSYS
2203 002561' 316 16 0 00 002540* CAMN MBCN,PORTCI ; CI port?
2204 002562' 402 00 0 00 002604' SETZM HAVECI ; yes - clear flag
2205 002563' 316 16 0 00 002536* CAMN MBCN,PORTNI ; NI port?
2206 002564' 402 00 0 00 002605' SETZM HAVENI ; yes - clear flag
2207
2208 ; Clean up and exit
2209
2210 002565' 262 17 0 00 000002 RGET (2,1) ; restore AC's
2211
2212 002567' 336 00 0 00 003064' SKIPN SNARKF ; TOPS-20
2213 002570' 254 00 0 00 002573' JRST .+3 ; no - don't play with USRIOT bit
2214 002571' 254 02 1 00 002572' JRSTF @.+1 ; yes - turn off USER IOT
2215 002572' 010000 002573' 010000,,.+1 ; sets flags
2216 002573' 263 17 0 00 000000 RTN ; exit
2217
2218 ; Argument list for release command
2219
2220 002574' 000000 000003 RELARG: 3 ; function
2221 002575' 000 00 0 00 000000 Z ; reserved for device adr word
2222
2223 ; Argument list for request command
2224
2225 002576' 000 00 0 00 000000 REQARG: Z ; function
2226 002577' 000 00 0 00 000000 Z ; reserved for device address
2227 002600' 001623 416000 ^D1000*^D60*^D4000 ; 4000 minutes (in milleseconds)
2228
2229 ; Argument list for enable command
2230
2231 002601' 000000 000111 ENARG: 111 ; function
2232 002602' 000 00 0 00 000000 Z ; reserved for device address
2233 002603' 777777 777777 -1
2234
2235 ; Miscellaneous data
2236
2237 002604' 000000 000000 HAVECI: 0 ; 'have CI port' flag
2238 002605' 000000 000000 HAVENI: 0 ; 'have NI port' flag
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 56
DFPTAI MAC 24-Apr-84 10:48 User Mode Support Routines SEQ 2056
2239
2240 ;#************************************************************
2241 ;* DEVREQ - User Mode Request Routine
2242 ;
2243 ; Does nothing in exec mode. In user mode, this routine executes
2244 ; a diagnostic monitor call of Function 2 to request the port from
2245 ; the monitor. This routine is different in use from RH20 disk and
2246 ; tape uses in that the device (the port) is requested only when the
2247 ; diagnostic starts up.
2248 ;
2249 ; Return: +1 - failed (error message printed)
2250 ; +2 - succeeded
2251 ;#************************************************************
2252
2253 002606' 350 00 0 17 000000 DEVREQ: AOS (P) ; set up proper return
2254 002607' 336 00 0 00 002531* SKIPN UDEBUG ; special debug mode?
2255 002610' 336 00 0 00 030037 SKIPN USER ; or exec mode?
2256 002611' 263 17 0 00 000000 RTN ; yes - return
2257
2258 ; See if no port is specified
2259
2260 002612' 312 16 0 00 002561* CAME MBCN,PORTCI ; request either the CI port
2261 002613' 316 16 0 00 002563* CAMN MBCN,PORTNI ; or the NI port?
2262 002614' 334 00 0 00 000000 SKIPA ; yes - continue
2263 002615' 263 17 0 00 000000 RTN ; no - exit
2264
2265 ; See if any port is specified if already gotten from the system
2266
2267 002616' 316 16 0 00 002612* CAMN MBCN,PORTCI ; CI port?
2268 JRST [SKIPE HAVECI ; yes - if have the port then
2269 RTN ; just exit
2270 002617' 254 00 0 00 003711' JRST .+1]
2271 002620' 316 16 0 00 002613* CAMN MBCN,PORTNI ; NI port?
2272 JRST [SKIPE HAVENI ; yes - if have the port then
2273 RTN ; just exit
2274 002621' 254 00 0 00 003714' JRST .+1]
2275
2276 ; Release the other port if necessary
2277
2278 002622' 261 17 0 00 000016 PUT MBCN ; save MBCN
2279 002623' 336 00 0 00 002604' SKIPN HAVECI ; have the CI already?
2280 002624' 332 00 0 00 002605' SKIPE HAVENI ; have the NI already?
2281 002625' 260 17 0 00 002531' GO DEVREL ; yes - release the device
2282 002626' 262 17 0 00 000016 GET MBCN ; restore MBCN
2283 002627' 260 17 0 00 002770' GO USRION ; set USRIOT bit
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 57
DFPTAI MAC 24-Apr-84 10:48 User Mode Support Routines SEQ 2057
2284
2285 ; Get device address
2286
2287 002630' 261 17 0 00 000001 RPUT (1,0) ; save AC's
2288
2289 002632' 201 00 0 00 000002 MOVEI 2 ; set up function 2 (request
2290 002633' 202 00 0 00 002576' MOVEM REQARG ; channel and all devices)
2291 002634' 200 00 0 00 000016 MOVE MBCN ; get device code
2292 002635' 336 00 0 00 003064' SKIPN SNARKF ; TOPS-20 monitor?
2293 002636' 242 00 0 00 000003 LSH 3 ; no - position all the way left
2294 002637' 135 01 0 00 003255' LDB 1,[POINT 3,MBCN,9] ; get channel number
2295 002640' 137 01 0 00 003510' DPB 1,[POINT 3,0,23] ; put into device address
2296 002641' 202 00 0 00 003053' MOVEM DEVADR# ; save it
2297 002642' 202 00 0 00 002577' MOVEM REQARG+1 ; place in argument list
2298
2299 ; Do the request
2300
2301 002643' 200 01 0 00 003717' MOVE 1,[-3,,REQARG] ; pointer word
2302 002644' 476 00 0 00 003055' SETOM INDIAG ; entering DIAG JSYS
2303 002645' 256 00 0 00 002407' REQ1: XCT .DIAG ; a diagnostic call
2304 002646' 334 00 0 00 000000 SKIPA ; error
2305 002647' 254 00 0 00 002660' JRST REQOK ; continue
2306 002650' 550 01 0 00 000001 HRRZ 1,1 ; clear left half
2307 002651' 302 01 0 00 602712 CAIE 1,602712 ; port not enabled?
2308 002652' 254 00 0 00 002657' JRST .+5 ; no - another error - go handle
2309 002653' 037 01 0 00 030242 PCRLF
2310 002654' 037 01 0 00 003720' FMSGC <You must ask the Operator to do an OPR command to enable the NI/CI Port>
2311 002655' 037 01 0 00 030242 PCRLF
2312 002656' 255 00 0 00 000000 REQ2: JFCL
2313 JRST [MOVEM 1,SAC1 ; error
2314 CAMN MBCN,PORTCI
2315 FMSGC <[CI not selectable - >
2316 CAMN MBCN,PORTNI
2317 FMSGC <[NI not selectable - >
2318 GO DGEPNT ; print error message
2319 FMSGD <]>
2320 SOS -2(P) ; set up failed return
2321 002657' 254 00 0 00 003751' JRST DEVRQX] ; exit
2322 002660' 316 16 0 00 002616* REQOK: CAMN MBCN,PORTCI ; requested the CI port?
2323 002661' 476 00 0 00 002604' SETOM HAVECI ; yes - set the switch
2324 002662' 316 16 0 00 002620* CAMN MBCN,PORTNI ; requested the NI port?
2325 002663' 476 00 0 00 002605' SETOM HAVENI ; yes - set the switch
2326 002664' 260 17 0 00 000243' GO IPACLR ; do a port clear
2327 002665' 402 00 0 00 003055' DEVRQX: SETZM INDIAG ; no longer in DIAG JSYS
2328 002666' 262 17 0 00 000000 RGET (0,1) ; restore AC's
2329
2330 002670' 263 17 0 00 000000 RTN ; exit
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 58
DFPTAI MAC 24-Apr-84 10:48 User Mode Support Routines SEQ 2058
2331
2332 ;#********************************************************************
2333 ;* ENDIAG - Enable the NI/CI port
2334 ;#********************************************************************
2335
2336 002671' 261 17 0 00 000000 ENDIAG: RPUT (0,1,2) ; save AC's
2337
2338 002674' 200 00 0 00 000016 MOVE MBCN ; get device code
2339 002675' 336 00 0 00 003064' SKIPN SNARKF ; TOPS-20 monitor?
2340 002676' 242 00 0 00 000003 LSH 3 ; no - position all the way left
2341 002677' 135 00 0 00 003255' LDB [POINT 3,MBCN,9] ; get channel number
2342 002700' 202 00 0 00 002602' MOVEM ENARG+1 ; place in argument list
2343 002701' 200 01 0 00 003762' MOVE 1,[-3,,ENARG] ; pointer word
2344 002702' 256 00 0 00 002407' XCT .DIAG ; do the DIAG
2345 002703' 255 00 0 00 000000 JFCL ; error return
2346 002704' 262 17 0 00 000002 RGET (2,1,0) ; restore AC's
2347
2348 002707' 263 17 0 00 000000 RTN ; exit
2349
2350
2351 ;#********************************************************************
2352 ;* DGEPNT - Decode and print DIAG error
2353 ;#********************************************************************
2354
2355 002710' 261 17 0 00 000000 DGEPNT: RPUT (0,1,2) ; save AC's
2356
2357 002713' 201 02 0 00 002732' MOVEI 2,T10TAB-1 ; get address of TOPS-10 table
2358 002714' 332 00 0 00 003064' SKIPE SNARKF ; TOPS-20 monitor?
2359 002715' 201 02 0 00 002744' MOVEI 2,T20TAB-1 ; yes - get address of TOPS-20 table
2360 002716' 550 01 0 00 003061' HRRZ 1,SAC1 ; get error code
2361
2362 002717' 350 00 0 00 000002 DGEPN0: AOS 2 ; point to next entry
2363 002720' 554 00 0 02 000000 HLRZ (2) ; get entry
2364 002721' 316 00 0 00 003763' CAMN [777777] ; end of list?
2365 JRST [FMSG <Unrecognized error code - >
2366 MOVE SAC1
2367 PNTHW
2368 002722' 254 00 0 00 003772' JRST DGEPNX]
2369 002723' 312 00 0 00 000001 CAME 1 ; match?
2370 002724' 254 00 0 00 002717' JRST DGEPN0 ; no - keep looping
2371 002725' 550 00 0 02 000000 HRRZ (2)
2372 002726' 256 00 1 00 000000 XCT @0
2373
2374 002727' 262 17 0 00 000002 DGEPNX: RGET (2,1,0) ; restore AC's
2375
2376 002732' 263 17 0 00 000000 RTN ; return
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 59
DFPTAI MAC 24-Apr-84 10:48 User Mode Support Routines SEQ 2059
2377
2378 ; TOPS-10 Error Messages
2379
2380 002733' 601174 004006' T10TAB: 601174,,[FMSG <Argument count field is non negative>]
2381 002734' 601175 004016' 601175,,[FMSG <Device assigned to another job>]
2382 002735' 601176 004025' 601176,,[FMSG <Argument count is to small>]
2383 002736' 601177 004035' 601177,,[FMSG <Illegal MBC device code selected>]
2384 002737' 601200 004045' 601200,,[FMSG <Device not mounted in maint mode>]
2385 002740' 601201 004050' 601201,,[FMSG <Bad CCW>]
2386 002741' 601202 004063' 601202,,[FMSG <CCW indicates that xfer will cross page boundary>]
2387 002742' 601203 004070' 601203,,[FMSG <No such channel>]
2388 002743' 601204 004074' 601204,,[FMSG <No such drive>]
2389 002744' 777777 777777 -1
2390
2391 ; TOPS-20 Error Messages
2392
2393 002745' 601174 004101' T20TAB: 601174,,[FMSG <Invalid function>]
2394 002746' 601175 004107' 601175,,[FMSG <Device is not assigned>]
2395 002747' 601176 004115' 601176,,[FMSG <Argument block too small>]
2396 002750' 601177 004122' 601177,,[FMSG <Invalid device type>]
2397 002751' 601200 004135' 601200,,[FMSG <WHEEL, OPERATOR, or MAINT capability required>]
2398 002752' 601201 004144' 601201,,[FMSG <Invalid channel command list>]
2399 002753' 601202 004155' 601202,,[FMSG <Illegal to do I/O across page boundary>]
2400 002754' 601203 004161' 601203,,[FMSG <No such device>]
2401 002755' 601204 004166' 601204,,[FMSG <Unit does not exist>]
2402 002756' 601205 004174' 601205,,[FMSG <Subunit does not exist>]
2403 002757' 602406 004201' 602406,,[FMSG <Unit already online>]
2404 002760' 602407 004206' 602407,,[FMSG <Unit not online>]
2405 002761' 602614 004215' 602614,,[FMSG <Datagram buffer not available>]
2406 002762' 602705 004227' 602705,,[FMSG <Port does not exist or is not a NI/CI port>]
2407 002763' 602706 004236' 602706,,[FMSG <CI counters not available>]
2408 002764' 602707 004246' 602707,,[FMSG <Fork doesn't own NI/CI counters>]
2409 002765' 602712 004255' 602712,,[FMSG <NI/CI channel is not enabled>]
2410 002766' 602713 004264' 602713,,[FMSG <Diagnostic owns the channel>]
2411 002767' 777777 777777 -1
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 60
DFPTAI MAC 24-Apr-84 10:48 User Mode Support Routines SEQ 2060
2412
2413 ;#********************************************************************
2414 ;* USRION/USRIOF - Turn User I/O Privileges On/Off
2415 ;
2416 ; This routine does nothing in exec mode. Under TOPS-20 we do an enable
2417 ; of privileges and then a USER I/O JSYS to get User-IOT set. Under TOPS10,
2418 ; a TRPSET UUO gets us into User-IOT mode. USRION will fatal you out if you
2419 ; don't have User IOT privileges.
2420 ;#********************************************************************
2421
2422 002770' 336 00 0 00 002607* USRION: SKIPN UDEBUG ; special debug mode?
2423 002771' 336 00 0 00 030037 SKIPN USER ; exec mode?
2424 002772' 263 17 0 00 000000 RTN ; yes - return
2425 002773' 261 17 0 00 000000 RPUT (0,1) ; save AC's
2426
2427 002775' 336 00 0 00 030516 SKIPN MONTYP ; TOPS10?
2428 GO [MOVEI 1,0 ; yes - setup for RTTRP UUO
2429 TRPSET 1, ; and do it
2430 JFCL
2431 002776' 260 17 0 00 004265' RTN]
2432 002777' 332 00 0 00 030516 SKIPE MONTYP ; TOPS20?
2433 GO [GO ENABLE ; yes - enable available privileges
2434 USRIO ; and set the User I/O bit
2435 JFCL
2436 003000' 260 17 0 00 004271' RTN]
2437 003001' 260 17 0 00 003002' GO .+1 ; push PC onto stack
2438 003002' 262 17 0 00 000001 GET 1 ; pop it from stack into AC1
2439 003003' 607 01 0 00 004000 TLNN 1,(1B6) ; is USRIOT bit set?
2440 JRST [FMSGCD <User does not have sufficient privileges>
2441 003004' 254 00 0 00 004306' JRST FFF]
2442 003005' 262 17 0 00 000001 RGET (1,0) ; restore the AC's
2443
2444 003007' 263 17 0 00 000000 RTN
2445
2446 ; Code to turn User I/O off
2447
2448 003010' 336 00 0 00 002770* USRIOF: SKIPN UDEBUG ; special debug mode?
2449 003011' 336 00 0 00 030037 SKIPN USER ; exec mode?
2450 003012' 263 17 0 00 000000 RTN ; yes - return
2451 003013' 254 02 1 00 003014' JRSTF @.+1 ; turn off the privilege
2452 003014' 010000 003015' 010000,,.+1 ; modifies the PC word
2453 003015' 263 17 0 00 000000 USROFX: RTN
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 61
DFPTAI MAC 24-Apr-84 10:48 User Mode Support Routines SEQ 2061
2454
2455 ;#************************************************************
2456 ;* ENABLE - Enable Capabilities of This Process
2457 ;
2458 ; First read capabilities and then enable them. Same as typing "ENA"
2459 ; from exec level.
2460 ;#************************************************************
2461
2462 003016' 336 00 0 00 003010* ENABLE: SKIPN UDEBUG ; special debug mode?
2463 003017' 336 00 0 00 030037 SKIPN USER ; exec mode?
2464 003020' 263 17 0 00 000000 RTN ; yes - exit
2465 003021' 261 17 0 00 000001 RPUT (1,2,3) ; save AC's
2466
2467 003024' 201 01 0 00 400000 MOVEI 1,.FHSLF ; process handle
2468 003025' 104 00 0 00 000150 RPCAP ; read capabilities
2469 003026' 320 17 0 00 003124' ERCAL [RTN] ; ignore errors
2470 003027' 200 03 0 00 000002 MOVE 3,2 ; get capabilities to AC3
2471 003030' 104 00 0 00 000151 EPCAP ; now enable
2472 003031' 320 17 0 00 003124' ERCAL [RTN] ; ignore errors
2473 003032' 262 17 0 00 000003 RGET (3,2,1) ; restore AC's
2474
2475 003035' 263 17 0 00 000000 RTN ; exit
2476
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 62
DFPTAI MAC 24-Apr-84 10:48 Miscellaneous Routines SEQ 2062
2477 SUBTTL Miscellaneous Routines
2478
2479 ;#************************************************************
2480 ;* FFF - Routine To Handle Fatals
2481 ;
2482 ; There is no return from this call. You end up at DDT in exec mode
2483 ; or the monitor if in user mode.
2484 ;
2485 ; Calling sequence:
2486 ;
2487 ; GO FFF ; call routine
2488 ; ........... ; pgm has fataled out ....
2489 ;#************************************************************
2490
2491 003036' 260 17 0 00 002531' FFF: GO DEVREL ; release device if necessary
2492 003037' 037 01 0 00 004310' FMSGC <Fatal pgm error at PC - >
2493 003040' 550 00 0 17 000000 HRRZ (P) ; get calling PC
2494 003041' 275 00 0 00 000001 SUBI 1 ; gets correct PC
2495 003042' 037 06 0 00 000001 PNT6F ; print it
2496 003043' 037 01 0 00 030242 PCRLF
2497 003044' 332 00 0 00 030037 SKIPE USER ; user mode?
2498 003045' 254 00 0 00 003050' JRST .+3 ; yes
2499 003046' 254 04 0 00 000000* HALT START ; halt .. restart
2500 003047' 254 00 0 00 003046* JRST START ; to be sure
2501
2502 ; User mode fatal halt
2503
2504 003050' 260 17 0 00 000000* GO .CLOSE ; close output files
2505 003051' 260 17 0 00 000000* GO .EXIT ; exit the job
2506 003052' 254 00 0 00 003047* JRST START ; restart program
2507
2508
2509 ;#********************************************************************
2510 ; End of DFPTAI.MAC Module
2511 ;#********************************************************************
2512
2513 END
NO ERRORS DETECTED
PROGRAM BREAK IS 004316
CPU TIME USED 00:09.667
77P CORE USED
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page S-1
DFPTAI MAC 24-Apr-84 10:48 SYMBOL TABLE SEQ 2063
AADDR 000423' int ENDIAG 002671' IPAST2 000413' PFDISP 001404'
ACSET 001560' EPCAP 104000 000151 int IPAST3 000414' PFSET 001363' ent
ACSET1 001561' ERCAL 320740 000000 int IPASTP 000367' ent PHYLST 001705'
ADRPE 100000 000000 spd ERESET 000160' ent ISTOP 000167' ent PI 000004 spd
APR 000000 spd ERSTR 104000 000011 int ISTOP0 000203' PICLR 010000 spd
C20D 002174' FFF 003036' ent ISTOPC 000231' PIOFF 000400 spd
CADTBL 002311' FILWDS 003054' ISTOPX 000235' PION 000200 spd
CBASE 002277' int FQUERR 002000 spd JEN 254500 000000 PISYOF 000566' ent
CBUF 002065' ext GENCCW 001506' ent JMPWD 002300' PISYON 000571' ent
CCWPN0 002100' GENGO 001516' JRSTF 254100 000000 PMODE 000233' ext
CCWPN1 002112' GET 262740 000000 LDCRAM 000035' ent PNT1 037040 000000
CCWPNT 002057' ent GETLOG 001656' ent LDCSR 000010' ent PNT1F 037040 000001
CCWPNX 002134' GETTAB 047000 000041 LDEBUF 000000' ent PNT6F 037300 000001
CCWST 001640' GO 260740 000000 LDRAR 000021' ent PNTADR 037400 000000
CCWST1 001650' GRINDF 001612' LOGARG 001677' PNTDEC 037640 000000
CHARG 002204' HALT 254200 000000 LOGBUF 002321' int PNTHW 037540 000000
CHARG1 002252' HAVECI 002604' int LOGPNT 002002' ent PNTMSF 037040 000000
CHCNT 002362' HAVENI 002605' int LOSPT 002030' PNTMSG 037000 000000
CHDATA 002373' ent ICWA0 002363' LOSPT1 002034' PNTOCC 001000 000000
CHIN0 001472' ICWA1 002364' LSTCCW 003056' PNTOCF 037740 000003
CHINIT 001450' ent ICWA2 002365' LSTDON 001567' PNTOCS 037700 000003
CHINX 001503' ICWA3 002366' MAXWD 002276' PORTCI 003752' ext
CHK 002361' ICWA4 002367' MBCN 000016 PORTNI 003754' ext
CHKCSR 000316' ent ICWA5 002370' MBERR 002000 000000 spd PRSFLG 003060'
CHKCSX 000333' ICWA6 002371' MCPUS 003057' PUT 261740 000000
CHP10 002220' ICWA7 002372' MONTYP 030516 RDCRAM 000106' ent
CHP20 002143' ICWPT 002024' MPRUN 000010 spd RDCSR 000060' ent
CHPGM0 002161' IDELAY 001067' int MVRERR 001000 spd RDEBUF 000050' ent
CHPGM1 002162' INDIAG 003055' NISEL 000000 ext RDLAR 000075' ent
CISEL 000000 ext INITP0 000524' NOPRIV 002457' REL 002556' ent
CLREBE 000313' INITPD 000534' ent NOSET 002470' RELARG 002574'
CLREBU 000302' ent INITPI 000510' ent NVIIN1 000713' REQ1 002645' ent
CLREBX 000312' INTAPR 001165' int NVIIN2 000723' REQ2 002656' ent
CP10C 002236' INTCON 001141' int NVIIN3 000733' REQARG 002576'
CPUTST 002474' INTCSR 001261' int NVIIN4 000743' REQOK 002660'
CRAMPE 004000 000000 spd INTEND 001331' int NVIIN5 000753' RESQAV 000200 spd
CSTWRD 003505' ext INTNNN 001305' NVIIN6 000763' RPCAP 104000 000150 int
CWBACK 002233' INTNUM 001070' int NVIIN7 000773' RTN 263740 000000
CZF 001540' INTPC 001071' int NVIINC 001003' RUNTME 001032' ext
CZFD 001553' INTTIM 001211' int NVJEN 001066' SAC1 003061'
DEBTIM 001033' ext INTTYP 001115' int ODELAY 001051' ext SAVEBF 003062'
DEVADR 003053' INTUSE 001235' int P 000017 SCLP 002301'
DEVREL 002531' ent IPACLR 000243' ent PCLEAR 400000 spd SDATA 000421' int
DEVREQ 002606' ent IPASR0 000352' PCRL 037000 030242 SELLAR 040000 spd
DEVRQX 002665' IPASR1 000362' PCRLF 037040 030242 SET2N 000620'
DGEPN0 002717' IPASR2 000363' PDEC 006000 000000 SETEBE 000262'
DGEPNT 002710' IPASR3 000364' PF500 001406' int SETEBU 000250' ent
DGEPNX 002727' IPASRT 000335' ent PF501 001407' int SETLAE 000277'
DIAGER 002256' IPASS0 000444' PF502 001410' int SETLAR 000265' ent
DPRCX 002525' IPASS1 000466' PFAC0 001411' SETUUO 047000 000075
DSETUP 002410' ent IPASS2 000503' PFAIL 001412' int SETVEC 000574' ent
EADDR 000422' int IPASS3 000504' PFAPR 001405' int SINCYC 020000 spd
EBUSPE 004000 spd IPASS4 000505' PFCHK 001424' SKPCCW 003063'
ENABLE 003016' IPASST 000424' ent PFCHK0 001442' SLAST 000420' int
ENARG 002601' IPAST1 000412' PFCLR 001413' ent SMX 002455'
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page S-2
DFPTAI MAC 24-Apr-84 10:48 SYMBOL TABLE SEQ 2064
SNARKF 003064' int
SNEXT 000417' int
SNKMON 002433'
START 003052' ext
STRE 001635'
SWITT 000000 ext
T10TAB 002733'
T20TAB 002745'
TCWPT 002045'
TPSM2 002444'
TPSMON 002437'
TRPSET 047000 000025
TSTEBF 200000 spd
TTIDEC 037200 000003
UDEBUG 003016' ext
USER 030037
USRIO 104000 000310 int
USRIOF 003010' ent
USRION 002770' ent
USROFX 003015'
USTIM 001035' ext
VIINT 000641'
VIIPI 003065'
WCCHK 001617'
WFIT 001624'
WFIT1 001633'
ZI 000000'
$SVUPC 030114
$SVUUO 030113
.CLOSE 003050' ext
.CONI 000117' ent
.CONO 000127' ent
.DATAI 000140' ent
.DATAO 000150' ent
.DIAG 002407'
.EXIT 003051' ext
.FHSLF 400000 sin
.INPNT 001332' ent
.INPNX 001355'
.INWD1 001361' int
.INWD2 001362' int
.JSYS 002406'
.PIOFF 000540' ent
.PION 000552' ent
.UUO 002405'
AADDR 17 686#
ACSET 1489 1509 1516# SEQ 2065
ACSET1 1503 1517#
ADRPE 2013
APR 382 986 1092 1266 1288
C20D 1873#
CADTBL 1364 1520 1608 1979#
CBASE 30 903 907 1367 1633 1975#
CBUF 50# 1748
CCWPN0 1769# 1781 1808 1812
CCWPN1 1777 1785#
CCWPNT 29 1742#
CCWPNX 1770 1809 1816#
CCWST 1589 1604#
CCWST1 1606 1612#
CHARG 1753 1860 1861 1868 1872 1881#
CHARG1 1751 1921 1922 1924 1925 1930 1935#
CHCNT 1982#
CHDATA 29 2006#
CHIN0 1377#
CHINIT 28 1353#
CHINX 1371 1386#
CHK 1981#
CHKCSR 15 518#
CHKCSX 522 533 537#
CHP10 1465 1908#
CHP20 1539 1839#
CHPGM0 1859# 1863
CHPGM1 1860#
CISEL 50#
CLREBE 500 506#
CLREBU 15 497#
CLREBX 502 505#
CP10C 1917 1921#
CPUTST 2070 2119#
CRAMPE 400 408 413 417 421 523 592 652 728 1107 1108 1121 1170
CSTWRD 50# 2008 2009 2010
CWBACK 1911 1918#
CZF 1482 1488#
CZFD 1492 1508#
DEBTIM 46# 990 1099
DEVADR 1635 1867 1923 2186# 2186 2296# 2296
DEVREL 34 2160# 2281 2491
DEVREQ 34 2253#
DEVRQX 2321 2327#
DGEPN0 2362# 2370
DGEPNT 1958 2199 2318 2355#
DGEPNX 2368 2374#
DIAGER 1639 1874 1927 1947#
DPRCX 2127 2146#
DSETUP 34 2038#
EADDR 17 685#
EBUSPE 409 524 1109 1122 1184
ENABLE 2079 2433 2462#
ENARG 2231# 2342 2343 SEQ 2066
ENDIAG 2336#
ERESET 16 379#
FFF 40 1499 1851 2045 2059 2088 2093 2094 2095 2104 2125 2145 2441 2491#
FILWDS 1471# 1471 1488 1500 1512 1535 1579 1581
FQUERR 1122 1187
GENCCW 28 1459#
GENGO 1461 1463 1470#
GETLOG 29 1627# 2007
GRINDF 1525 1554# 1590
HAVECI 17 2169 2204 2237# 2268 2279 2323
HAVENI 17 2167 2206 2238# 2272 2280 2325
ICWA0 901 905 1366 1632 1986#
ICWA1 1987#
ICWA2 1988#
ICWA3 1989#
ICWA4 1990#
ICWA5 1991#
ICWA6 1992#
ICWA7 1993#
ICWPT 1674 1683#
IDELAY 24 911 1130 1131 1146#
INDIAG 2041# 2041 2192# 2192 2202 2302 2327
INITP0 824# 838
INITPD 21 835#
INITPI 21 806#
INTAPR 23 987 1093 1151#
INTCON 23 985 1091 1150#
INTCSR 24 1096 1123 1154#
INTEND 24 828 1156#
INTNNN 981 997 1087 1133 1155#
INTNUM 23 827 910 974 980 1077 1086 1147#
INTPC 23 983 1089 1148#
INTTIM 23 991 1100 1152#
INTTYP 23 979 1085 1149#
INTUSE 23 993 1102 1153#
IPACLR 16 384 440# 1115 2177 2326
IPASR0 605#
IPASR1 593 616#
IPASR2 588 617#
IPASR3 586 618#
IPASRT 16 580#
IPASS0 743#
IPASS1 762 773#
IPASS2 729 790#
IPASS3 724 791#
IPASS4 722 792#
IPASST 16 715#
IPAST1 653 674#
IPAST2 648 675#
IPAST3 646 660 676#
IPASTP 16 640#
ISTOP 16 393#
ISTOP0 401 404# SEQ 2067
ISTOPC 407 414 416 426#
ISTOPX 403 425 430#
JMPWD 1378 1607 1977#
LDCRAM 10 190#
LDCSR 10 145# 410 427 431 442 462 484 504 525 535 598 614 658
666 736 751 764 769 783 787 851 868 1110 1117
LDEBUF 10 131# 785
LDRAR 10 167# 601 739
LOGARG 1636 1637 1640 1651#
LOGBUF 30 1642 1644 1684 1691 1714 1721 1724 1727 1980# 1982 2008
LOGPNT 29 1665#
LOSPT 1675 1690#
LOSPT1 1694# 1712
LSTCCW 1764# 1764 1776 1785 1789 1798 1801 1806
LSTDON 1529#
MAXWD 1974#
MBCN 135 149 172 195 230 245 271 290 310 330 350 370 1360 1517
1631 1668 1844 2166 2168 2170 2171 2181 2184 2195 2197 2203 2205 2260
2261 2267 2271 2278 2282 2291 2294 2314 2316 2322 2324 2338 2341
MBERR 406 413 521 592 652 728 1114 1121 1177
MCPUS 2128# 2128 2131
MONTYP 2427 2432
MPRUN 402 415 532 587 606 608 647 657 723 744 745
MVRERR 1122 1190
NISEL 50#
NOPRIV 2081 2087#
NOSET 2036 2100#
NVIIN1 922 1010# 1014
NVIIN2 924 1019# 1023
NVIIN3 926 1028# 1032
NVIIN4 928 1037# 1041
NVIIN5 930 1046# 1050
NVIIN6 932 1055# 1059
NVIIN7 934 1064# 1068
NVIINC 1017 1026 1035 1044 1053 1062 1071 1075#
NVJEN 1015 1024 1033 1042 1051 1060 1069 1088 1140 1142#
ODELAY 51# 1132
P 240 250 463 485 505 528 615 616 617 673 674 675 789 790
791 1368 1516 1530 1849 1858 1952 2101 2253 2320 2493
PCLEAR 426 441
PF500 42 1225 1236# 1268
PF501 42 1226 1237# 1270
PF502 42 1227 1238# 1272
PFAC0 1228 1239# 1265 1281 1289
PFAIL 42 1223 1240# 1286
PFAPR 42 1224 1235# 1266
PFCHK 1221 1265#
PFCHK0 1276 1286#
PFCLR 41 1247#
PFDISP 1220 1234# 1252 1282
PFSET 41 1214#
PHYLST 1654#
PI 809 824 825 837 879 888 966 967 1011 1012 1020 1021 1029 1030 SEQ 2068
1038 1039 1047 1048 1056 1057 1065 1066
PICLR 809 837
PIOFF 879 967 1012 1021 1030 1039 1048 1057 1066
PION 825
PISYOF 21 847 863 878#
PISYON 22 869 887#
PMODE 51# 418 422 428
PORTCI 50# 2170 2195 2203 2260 2267 2314 2322
PORTNI 50# 2168 2197 2205 2261 2271 2316 2324
PRSFLG 717# 717 761
RDCRAM 11 286#
RDCSR 11 240# 397 411 456 478 499 519 585 645 659 721 755 848
864 1094
RDEBUF 11 226# 765
RDLAR 11 267# 667 775 1111 1118
REL 34 2193#
RELARG 2187 2191 2220#
REQ1 34 2303#
REQ2 34 2312#
REQARG 2064 2072 2225# 2290 2297 2301
REQOK 2305 2322#
RESQAV 1122 1193
RUNTME 46# 989 1098
SAC1 1949# 1949 1955 2194 2313 2360 2366
SAVEBF 766# 766 784
SCLP 1365 1519 1529 1978#
SDATA 17 605 661 684# 743 757 767 781 786
SELLAR 460 482 608 665 745 1109 1116
SET2N 909 921#
SETEBE 457 464#
SETEBU 15 454#
SETLAE 479 486#
SETLAR 15 476#
SETVEC 22 895#
SINCYC 607 745
SKPCCW 1765# 1765 1778 1779 1786
SLAST 17 683# 774
SMX 2078 2084#
SNARKF 36 1462 1752 2047# 2047 2048 2073 2077 2182 2212 2292 2339 2358
SNEXT 17 599 669 682# 737 773 777
SNKMON 2052 2063#
START 2499 2500 2506
STRE 1573 1583 1589#
SWITT 46#
T10TAB 2357 2380#
T20TAB 2359 2393#
TCWPT 1676 1720#
TPSM2 2066 2075#
TPSMON 2050 2070#
TSTEBF 459 481 501 503 597 733 735 763 768 782
UDEBUG 50# 131 145 167 190 226 241 267 286 306 326 346 366 379
393 1369 1460 1536 1627 2038 2100 2160 2254 2422 2448 2462
USER 381 383 609 746 806 835 844 860 878 887 896 1214 1247 1370 SEQ 2069
1459 1538 1634 1749 2039 2119 2161 2255 2423 2449 2463 2497
USRIOF 35 2448#
USRION 35 2283 2422#
USROFX 2453#
USTIM 46# 992 1101
VIINT 900 965# 982 1004
VIIPI 966# 966 984 1011 1020 1029 1038 1047 1056 1065 1090
WCCHK 1560 1565#
WFIT 1566 1577#
WFIT1 1578 1580 1584#
ZI 58#
$SVUPC 970 1002 1077 1138
$SVUUO 970 1004 1077 1140
.CLOSE 46# 2504
.CONI 9 306#
.CONO 9 326#
.DATAI 9 346#
.DATAO 9 366#
.DIAG 1638 1873 1926 2036# 2076 2193 2303 2344
.EXIT 46# 2505
.FHSLF 2467
.INPNT 22 1162#
.INPNX 1169 1176 1183 1186 1189 1192 1198#
.INWD1 24 895 1001 1124 1137 1162 1166 1198 1205#
.INWD2 24 1125 1172 1179 1206#
.JSYS 2035# 2065
.PIOFF 21 844#
.PION 21 860# 999 1135
.UUO 2034# 2074
EPCAP 2471
ERCAL 2469 2472 SEQ 2070
ERSTR 2092
FMSG 1957 2365 2380 2381 2382 2383 2384 2385 2386 2387 2388 2393 2394 2395
2396 2397 2398 2399 2400 2401 2402 2403 2404 2405 2406 2407 2408 2409
2410
FMSGC 1951 1954 2056 2129 2132 2143 2196 2198 2310 2315 2317 2492
FMSGCD 2058 2087 2103 2144 2440
FMSGD 2319
GET 137 152 176 178 198 200 232 251 274 293 312 333 352 372
432 434 443 464 466 486 488 506 508 537 618 620 676 678
792 794 829 831 852 870 912 914 936 1002 1004 1138 1140 1199
1201 1229 1254 1362 1386 1388 1531 1533 1535 1612 1645 1647 1677 1679
1817 1819 1875 1877 1928 1930 1960 1962 2014 2084 2146 2148 2210 2212
2282 2328 2330 2346 2348 2374 2376 2438 2442 2444 2473 2475
GETTAB 2044 2124
GO 384 397 410 411 427 431 442 456 462 478 484 499 504 519
524 525 535 585 598 601 614 645 658 659 666 667 721 736
739 751 755 764 765 769 775 783 785 787 847 848 851 863
864 868 869 909 989 999 1094 1098 1108 1110 1111 1115 1117 1118
1123 1132 1135 1465 1499 1525 1539 1589 1635 1639 1674 1675 1676 1851
1874 1927 1958 2007 2036 2045 2059 2070 2079 2088 2093 2094 2095 2104
2125 2145 2177 2194 2199 2281 2283 2318 2326 2428 2433 2437 2491 2504
2505
HALT 2499
JEN 1004 1140 1291
JRSTF 2082 2214 2451
PCRL 1787 1816
PCRLF 1950 1959 2200 2309 2311 2496
PDEC 1799
PNT1 1671
PNT1F 2057
PNT6F 2495
PNTADR 1802
PNTDEC 1725
PNTHW 1685 1722 2367
PNTMSF 1951 1954 1957 2056 2058 2087 2103 2130 2132 2143 2144 2196 2198 2310
2315 2317 2319 2365 2380 2381 2382 2383 2384 2385 2386 2387 2388 2393
2394 2395 2396 2397 2398 2399 2400 2401 2402 2403 2404 2405 2406 2407
2408 2409 2410 2440 2492
PNTMSG 420 424 429 526 536 1168 1171 1175 1178 1182 1185 1188 1191 1194
1667 1673 1683 1690 1695 1696 1697 1698 1699 1705 1706 1707 1708 1709
1713 1720 1723 1726 1757 1758 1759 1780 1790 1791 1792 1793 1794 1795
1796 1797 1800
PNTOCC 1788
PNTOCF 1953 1956
PNTOCS 1174 1181 1715 1728
PUT 133 147 169 171 192 194 228 243 269 288 308 328 348 368
395 397 440 454 456 476 478 497 499 518 580 582 640 642
715 717 808 826 846 862 898 900 921 968 970 1013 1022 1031
1040 1049 1058 1067 1075 1077 1164 1166 1216 1249 1353 1355 1359 1471
1472 1474 1476 1604 1629 1631 1665 1667 1742 1744 1839 1841 1908 1910
1947 1949 2006 2042 2121 2123 2175 2177 2278 2287 2289 2336 2338 2355
2357 2425 2427 2465 2467
RGET 176 198 432 464 486 506 618 676 792 829 912 1002 1138 1199 SEQ 2071
1386 1531 1533 1645 1677 1817 1875 1928 1960 2146 2210 2328 2346 2374
2442 2473
RPCAP 2468
RPUT 169 192 395 454 476 497 580 640 715 898 968 1075 1164 1353
1472 1474 1629 1665 1742 1839 1908 1947 2121 2175 2287 2336 2355 2425
2465
RTN 132 138 146 153 168 178 191 200 227 233 242 252 268 275
287 294 307 313 327 334 347 353 367 373 380 385 394 434
444 466 488 508 527 538 620 678 794 807 831 836 845 853
861 871 880 889 897 914 937 1113 1120 1126 1163 1201 1215 1230
1248 1255 1388 1466 1537 1540 1591 1617 1628 1641 1647 1679 1686 1716
1729 1819 1877 1931 1962 2015 2040 2085 2102 2120 2148 2162 2171 2201
2216 2256 2263 2269 2273 2330 2348 2376 2424 2431 2436 2444 2450 2453
2464 2469 2472 2475
SETUUO 2142
TMSG 1672 1695 1696 1697 1698 1699 1705 1706 1707 1708 1709 1713 1723 1726
1790 1791 1792 1793 1794 1795 1796 1797 1800
TMSGC 1171 1178 1667 1683 1690 1720 1757 1758 1759 1780
TMSGCD 420 424 429 526 536 1168 1185 1188 1191 1194
TMSGD 1175 1182
TRPSET 2429
TTIDEC 2133
USRIO 2080 2434
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 1
DFPTAU MAC 6-Aug-83 09:31 UTILITY Routines Module SEQ 2072
1 SUBTTL UTILITY Routines Module
2
3 SALL
4
5 SEARCH DFPTA,MONSYM
6
7 ; Typeout/typin routines
8
9 ENTRY CLRBUF,TTYYES,PNTDEV
10 ENTRY PPDEC,PPDECF,PSDN,ALTCHH,CONVSX,.PNTOC
11
12 ; Clock handling routines/variables
13
14 ENTRY STCLOK,MONTIM,PTIME,RUNTME,PSTAMP
15 INTERN CURTIM,MAXTIM,DEBTIM,USTIM,FORPNT,LCHAR
16
17 ; TOPS-10/20 miscellaneous routines
18
19 ENTRY .CLOSE,.RESET,.EXIT
20
21 ; File handling routines
22
23 ENTRY FINIT,FGETW,FINCMD,FOARG
24 INTERN UNAME
25
26 ; Data pattern routines
27
28 ENTRY BUFGEN,BUFCOM,PATPNT,PATBUF
29 INTERN WRDERR
30
31 ; Switch handling routines
32
33 ENTRY .SWCHP,SWITT,.ISWT,SWCHPT,SWCOM
34 INTERN .RSWIT,.LSWIT,SWRGT
35
36 ; Miscellaneous routines
37
38 ENTRY PARSER,.COMM,.SARG,.OARG,.DARG,CHKARG,LASARG,DECYN,FIOFF
39 INTERN .CGOT,ARGUM,ARGFLG
40
41 ; Scope routine
42
43 ENTRY SCOPE1
44 INTERN SCOSW,SCOOFF
45
46 ; EXTERN's located in DFPTA1.MAC
47
48 EXTERN UDEBUG,MDEBUG,BUFF,CADDR,CWORDL,CWORDR,UUT,SPREP2
49 EXTERN INDLIS,TSTCLS,TSTNUM,TSTSUB,TSTPC,TSTPNT,TSTREP,TSTOFF
50 EXTERN FINPUT,FINECH,TAKFIL,TPAT,PORTCI,PORTNI,NISEL,CISEL,PORSEL
51 EXTERN ALTF,TSTINH
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 2
DFPTAU MAC 6-Aug-83 09:31 UTILITY Routines Module SEQ 2073
52
53 ; EXTERN's located in DFPTAI.MAC (Port Device Handling Routines module)
54
55 EXTERN RDCSR,GETLOG,LOGPNT,FFF
56
57
58 ;#********************************************************************
59 ; ZU - Address for use in DDT
60 ;#********************************************************************
61
62 000000' ZU: ; address of 00000'
63
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 3
DFPTAU MAC 6-Aug-83 09:31 Printout/Typin Routines SEQ 2074
64 SUBTTL Printout/Typin Routines
65
66 ;#********************************************************************
67 ;* CONVSX - Convert sixbit to octal
68 ;
69 ; Argument: AC1 - Contains a word of sixbit (which may or may not
70 ; be an octal number).
71 ;
72 ; Return: +1 - Error - not a valid octal number
73 ; +2 - Ok - number converted ok - in AC1
74 ;#********************************************************************
75
76 000000' 261 17 0 00 000000 CONVSX: RPUT (0,2) ; save AC's
77
78 000002' 202 01 0 00 006112' MOVEM 1,CONVSS# ; save argument
79 000003' 200 01 0 00 003452' MOVE 1,[POINT 6,CONVSS] ; set to get sixbit char
80 000004' 202 01 0 00 000027' MOVEM 1,CONVSP ; save the pointer
81 000005' 400 02 0 00 000000 SETZ 2, ; clear result
82 000006' 134 01 0 00 000027' CONVS0: ILDB 1,CONVSP ; get a char
83 000007' 322 01 0 00 000022' JUMPE 1,CONVS1 ; zero - all done - exit
84 000010' 301 01 0 00 000020 CAIL 1,20 ; see if its in octal range
85 000011' 303 01 0 00 000027 CAILE 1,27
86 000012' 254 00 0 00 000017' JRST CONVSE ; no - error
87 000013' 405 01 0 00 000007 ANDI 1,7 ; yes - save only digit
88 000014' 242 02 0 00 000003 LSH 2,3 ; multiply by 8
89 000015' 272 01 0 00 000002 ADDM 1,2 ; insert in number
90 000016' 254 00 0 00 000006' JRST CONVS0 ; get next digit
91
92 ; Error
93
94 000017' 262 17 0 00 000002 CONVSE: RGET (2,0) ; restore AC's
95
96 000021' 263 17 0 00 000000 RTN ; return +1
97
98 ; Done - put result into AC1
99
100 000022' 200 01 0 00 000002 CONVS1: MOVE 1,2
101 000023' 262 17 0 00 000002 RGET (2,0) ; restore AC's
102
103 000025' 350 00 0 17 000000 AOS (P) ; set up return +2
104 000026' 263 17 0 00 000000 RTN ; exit
105
106 000027' 000000 000000 CONVSP: 0 ; number to convert
107 000030' 000000 000000 0 ; trailing zeros
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 4
DFPTAU MAC 6-Aug-83 09:31 Printout/Typin Routines SEQ 2075
108
109 ;#********************************************************************
110 ;* ALTCHH - Handle altmode intercept
111 ;
112 ; If an altmode has been typed in response to the question asked
113 ; immediately before this call - exit through ALTMGO.
114 ;
115 ; If an altmode has not been typed - exit to the address specified
116 ; by the right half of the UUO (in $SVUUO).
117 ;#********************************************************************
118
119 000031' 261 17 0 00 000000 ALTCHH: PUT 0 ; save AC0
120 000032' 200 00 0 00 030232 MOVE $CHRIN ; get last character typed
121 000033' 306 00 0 00 000033 CAIN 33 ; altmode?
122 000034' 254 00 0 00 000042' JRST ALTCHX ; yes - handle
123 000035' 302 00 0 00 000175 CAIE 175 ; altmode?
124 000036' 306 00 0 00 000176 CAIN 176 ; altmode?
125 000037' 254 00 0 00 000042' JRST ALTCHX ; yes - handle
126 000040' 262 17 0 00 000000 GET 0 ; no - restore AC0
127 000041' 254 00 1 00 030113 JRST @$SVUUO ; exit
128
129 000042' 262 17 0 00 000000 ALTCHX: GET 0 ; restore AC0
130 000043' 262 17 0 00 006135' GET XX# ; take off return address
131 000044' 254 00 1 00 030063 JRST @ALTMGO ; go to intercept address
132
133
134 ;#********************************************************************
135 ;* CLRBUF - Clear input buffer
136 ;#********************************************************************
137
138 000045' 336 00 0 00 030037 CLRBUF: SKIPN USER ; user mode?
139 000046' 263 17 0 00 000000 RTN ; no - return
140 000047' 261 17 0 00 000000 RPUT (0,1) ; save some AC's
141
142 000051' 201 01 0 00 000100 MOVEI 1,100 ; set up TOPS10 argument
143 000052' 332 00 0 00 030516 SKIPE MONTYP ; TOPS-20?
144 000053' 051 11 0 00 000000 CLRBFI ; yes - clear TTY input buffer
145 000054' 336 00 0 00 030516 SKIPN MONTYP ; TOPS-10?
146 000055' 104 00 0 00 000100 CFIBF ; yes - clear input buffer
147 000056' 262 17 0 00 000001 RGET (1,0) ; restore AC's
148
149 000060' 263 17 0 00 000000 RTN ; return
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 5
DFPTAU MAC 6-Aug-83 09:31 Printout/Typin Routines SEQ 2076
150
151 ;#********************************************************************
152 ;* TTYYES - Answer yes or no question
153 ;
154 ; Calling sequence: MOVE [FMSG <Question?>]
155 ; GO TTYYES
156 ; Return+1 ==> No
157 ; Return+2 ==> Yes
158 ;#********************************************************************
159
160 000061' 261 17 0 00 000000 TTYYES: RPUT (0,1,2) ; save AC's
161
162 000064' 202 00 0 00 000002 MOVEM 2 ; get printout in AC2
163 000065' 256 00 0 00 000002 TTYY0: XCT 2 ; print question
164 000066' 037 01 0 00 003453' FMSG < (Y or N) - > ; print Y or N section
165 000067' 037 10 0 00 000003 TTYY1: TTSIXB ; get it
166 ALTCHK [SKIPE $TWCNT ; did a timeout occur?
167 JRST TTYY0 ; no - error - reask question
168 000070' 007 00 0 00 003456' JRST TTYY1] ; yes - just keep looking for answer
169 000071' 404 00 0 00 003461' AND [770000,,0] ; mask out all but first character
170 000072' 241 00 0 00 000006 ROT 6 ; right justify byte
171 000073' 302 00 0 00 000071 CAIE 71 ; Y?
172 000074' 306 00 0 00 000056 CAIN 56 ; N?
173 000075' 334 00 0 00 000000 SKIPA ; yes - continue
174 000076' 254 00 0 00 000065' JRST TTYY0 ; neither - reask question
175 000077' 306 00 0 00 000071 CAIN 71 ; Y?
176 000100' 350 00 0 17 777775 AOS -3(P) ; increment return
177 000101' 262 17 0 00 000002 RGET (2,1,0) ; restore AC's
178
179 000104' 263 17 0 00 000000 RTN ; return
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 6
DFPTAU MAC 6-Aug-83 09:31 Printout/Typin Routines SEQ 2077
180
181 ;#*********************************************************************
182 ;* PSDN - Prints signed decimal numbers
183 ;
184 ; PSDN prints the contents of AC0 as a signed decimal number followed
185 ; by a period. Leading zeros are suppressed.
186 ;#*********************************************************************
187
188 000105' 261 17 0 00 000000 PSDN: PUT
189 JUMPL [TMSG <->
190 MOVN (P)
191 000106' 321 00 0 00 003463' JRST .+1]
192 000107' 037 15 0 00 000000 PNTDEC ; print the number
193 000110' 037 00 0 00 003466' TMSG <.> ; follow with a period
194 000111' 262 17 0 00 000000 GET
195 000112' 263 17 0 00 000000 RTN
196
197 000113' 261 17 0 00 000000 PSDNF: PUT
198 JUMPL [FMSG <->
199 MOVN (P)
200 000114' 321 00 0 00 003467' JRST .+1]
201 000115' 037 15 0 00 000001 PNTDCF
202 000116' 037 01 0 00 000056 PNTCIF "."
203 000117' 262 17 0 00 000000 GET
204 000120' 263 17 0 00 000000 RTN
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 7
DFPTAU MAC 6-Aug-83 09:31 Printout/Typin Routines SEQ 2078
205
206 ;#********************************************************************
207 ;* .PNTOC - Print n digit octal number with leading zeros suppressed
208 ;#********************************************************************
209
210 000121' 261 17 0 00 000000 .PNTOC: RPUT (0,1,2,3,4,$SVUUO,$SVUPC)
211
212 000130' 135 01 0 00 003472' LDB 1,[POINT 23,$SVUUO,35] ; get address portion
213 000131' 661 01 0 00 200040 TLO 1,200040 ; make into a "MOVE 1," instruction
214 000132' 261 17 0 00 000001 PUT 1 ; put on stack
215 000133' 200 01 0 17 777772 MOVE 1,-6(P) ; restore AC1
216 000134' 256 00 0 17 000000 XCT (P) ; get number into AC1
217 000135' 262 17 0 00 006135' GET XX# ; pop off temporary stack location
218 000136' 214 02 0 00 000001 MOVM 2,1 ; get absolute value
219 000137' 243 02 0 00 000141' JFFO 2,.+2 ; find out where number starts
220 000140' 201 03 0 00 000043 MOVEI 3,^D35 ; assume at least one bit set
221 000141' 231 03 0 00 000003 IDIVI 3,3 ; calculate # of leading 0's there are
222 000142' 135 02 0 00 003473' LDB 2,[POINT 4,$SVUUO,12] ; get AC field
223 000143' 270 02 0 00 000003 ADD 2,3 ; calculate number of spaces to
224 000144' 275 02 0 00 000014 SUBI 2,^D12 ; print
225 000145' 335 00 0 00 000001 SKIPGE 1 ; number is actually negative?
226 000146' 370 00 0 00 000002 SOS 2 ; yes - allow for minus sign
227 000147' 333 00 0 00 000002 SKIPLE 2 ; number of spaces still 1..n?
228 XCT [JFCL ; yes - print leading spaces
229 TMSG < > ; 1
230 TMSG < > ; 2
231 TMSG < > ; 3
232 TMSG < > ; 4
233 TMSG < > ; 5
234 TMSG < > ; 6
235 TMSG < > ; 7
236 TMSG < > ; 8
237 TMSG < > ; 9
238 TMSG < > ; 10
239 000150' 256 00 0 02 003520' TMSG < >](2)
240 000151' 200 00 0 00 000001 MOVE 1 ; get number
241 000152' 037 16 0 00 000003 PNTOCS ; print it
242 000153' 262 17 0 00 030114 RGET ($SVUPC,$SVUUO,4,3,2,1,0)
243
244 000162' 263 17 0 00 000000 RTN ; exit
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 8
DFPTAU MAC 6-Aug-83 09:31 Printout/Typin Routines SEQ 2079
245
246 ;#********************************************************************
247 ;* PPDEC - Print decimal number in a field of size x.
248 ;
249 ; Call is: PDEC X,ADR
250 ;#********************************************************************
251
252 000163' 261 17 0 00 000000 PPDEC: RPUT (0,1,$SVUUO,$SVUPC) ; save ACs
253
254 000167' 200 00 1 00 030113 MOVE @$SVUUO ; get number to print
255 000170' 135 01 0 00 003473' LDB 1,[POINT 4,$SVUUO,12] ; get size field
256 000171' 322 00 0 00 000202' JUMPE PDECSS ; special print
257 000172' 250 01 0 00 030264 PDEC0: EXCH 1,RADLSC ; put in position
258 000173' 037 16 0 00 000000 PNTDS ; no - print the number
259 000174' 202 01 0 00 030264 MOVEM 1,RADLSC ; restore old field size
260 000175' 262 17 0 00 030114 RGET ($SVUPC,$SVUUO,1,0) ; restore ACs
261
262 000201' 263 17 0 00 000000 RTN ; exit
263
264 000202' 322 01 0 00 000172' PDECSS: JUMPE 1,PDEC0 ; make sure length field is specified
265 XCT [TMSG <0> ; print a bunch of spaces
266 TMSG <0>
267 TMSG < 0>
268 TMSG < 0>
269 TMSG < 0>
270 TMSG < 0>
271 TMSG < 0>
272 TMSG < 0>
273 TMSG < 0>
274 TMSG < 0>
275 TMSG < 0>
276 TMSG < 0>
277 TMSG < 0>
278 TMSG < 0>
279 TMSG < 0>
280 000203' 256 00 0 01 003575' TMSG < 0>](1)
281 000204' 262 17 0 00 030114 RGET ($SVUPC,$SVUUO,1,0) ; restore ACs
282
283 000210' 263 17 0 00 000000 RTN ; exit
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 9
DFPTAU MAC 6-Aug-83 09:31 Printout/Typin Routines SEQ 2080
284
285 ;#********************************************************************
286 ;* PPDECF - Force print decimal number in a field of size x.
287 ;
288 ; Call is: PDECF X,ADR
289 ;#********************************************************************
290
291 000211' 261 17 0 00 000000 PPDECF: RPUT (0,1,$SVUUO,$SVUPC) ; save ACs
292
293 000215' 200 00 1 00 030113 MOVE @$SVUUO ; get number to print
294 000216' 135 01 0 00 003473' LDB 1,[POINT 4,$SVUUO,12] ; get size field
295 000217' 322 00 0 00 000230' JUMPE PDECFS ; special print
296 000220' 250 01 0 00 030264 PDECF0: EXCH 1,RADLSC ; put in position
297 000221' 037 16 0 00 000001 PNTDSF ; no - print the number
298 000222' 202 01 0 00 030264 MOVEM 1,RADLSC ; restore old field size
299 000223' 262 17 0 00 030114 RGET ($SVUPC,$SVUUO,1,0) ; restore ACs
300
301 000227' 263 17 0 00 000000 RTN ; exit
302
303 000230' 322 01 0 00 000220' PDECFS: JUMPE 1,PDECF0 ; make sure length field is specified
304 XCT [FMSG <0> ; print a bunch of spaces
305 FMSG <0>
306 FMSG < 0>
307 FMSG < 0>
308 FMSG < 0>
309 FMSG < 0>
310 FMSG < 0>
311 FMSG < 0>
312 FMSG < 0>
313 FMSG < 0>
314 FMSG < 0>
315 FMSG < 0>
316 FMSG < 0>
317 FMSG < 0>
318 FMSG < 0>
319 000231' 256 00 0 01 003615' FMSG < 0>](1)
320 000232' 262 17 0 00 030114 RGET ($SVUPC,$SVUUO,1,0) ; restore ACs
321
322 000236' 263 17 0 00 000000 RTN ; exit
323
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 10
DFPTAU MAC 6-Aug-83 09:31 Clock Handling Routines SEQ 2081
324 SUBTTL Clock Handling Routines
325
326 ;#********************************************************************
327 ;* STCLOK - Initialize program runtime clock
328 ;
329 ; This routine initializes the clock for the program. It is used in
330 ; conjunction with routine "RUNTME".
331 ;
332 ; In exec mode this routine resets, restarts and reads the current
333 ; microsecond time clock into memory for reference by the runtime
334 ; calculator "RUNTME". The clock is set up so it causes a hardware
335 ; interrupt, it merely free runs.
336 ;
337 ; In user mode the program run time is obtained in milliseconds with
338 ; a monitor call, converted to microseconds and stored for future
339 ; reference by the runtime calculator "RUNTME".
340 ;
341 ; This routine may be called anytime to reset the program runtime.
342 ;
343 ; Call Sequence: GO STCLOK ; calls the routine
344 ; RTN-1 ; always returns +1
345 ;#********************************************************************
346
347 000237' 261 17 0 00 000000 STCLOK: RPUT (0,1) ; save AC's
348
349 000241' 332 00 0 00 030037 SKIPE USER ; in user mode?
350 000242' 254 00 0 00 000251' JRST STCU ; yes
351 000243' 7 024 20 0 00 420000 CONO 24,1B18!1B22 ; stop and reset the clock
352 000244' 402 00 0 00 000510 SETZM 510 ; clear EPT locations
353 000245' 402 00 0 00 000511 SETZM 511 ; for timer data
354 000246' 7 024 20 0 00 002000 CONO 24,1B25 ; turns the meter on
355 000247' 7 020 04 0 00 000260' DATAI 20,TMRST1 ; save a double word
356 000250' 254 00 0 00 000255' JRST STCX ; done - exit
357 000251' 476 00 0 00 006123' STCU: SETOM INITM# ; invalidate initial time
358 000252' 260 17 0 00 000262' GO MONTIM ; get monitor time in microseconds
359 000253' 255 00 0 00 000000 JFCL ; in meter format
360 000254' 124 01 0 00 000260' DMOVEM 1,TMRST1 ; save a double word
361 000255' 262 17 0 00 000001 STCX: RGET (1,0) ; restore
362
363 000257' 263 17 0 00 000000 RTN ; exit
364
365 000260' TMRST1: BLOCK 2 ; 2 word initial time storage
366
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 11
DFPTAU MAC 6-Aug-83 09:31 Clock Handling Routines SEQ 2082
367
368 ;#********************************************************************
369 ;* MONTIM - Read program runtime from monitor
370 ;
371 ; Here is a subroutine called by both STCLOK and RUNTME. It reads
372 ; current program runtime in milliseconds from the monitor, converts
373 ; the time to microseconds and positions the microsecond count in AC2
374 ; and AC1 in the same 59 bit format you get when you read the meter
375 ; board microsecond clock. The microsecond count is then returned in
376 ; AC1 and AC2 .....
377 ;
378 ; Call: GO MONTIM ; call the routine
379 ; RTN+1 ; microsecond time in AC1 and AC2
380 ;#********************************************************************
381
382 000262' 261 17 0 00 000003 MONTIM: PUT 3 ; save AC3 (RUNTM JSYS destroys it)
383 000263' 332 00 0 00 030516 SKIPE MONTYP ; TOPS10?
384 000264' 254 00 0 00 000271' JRST MONTI0 ; no - go handle TOPS20
385 000265' 047 01 0 00 000022 CALLI 1,22 ; get current time in jiffies
386 000266' 400 02 0 00 000000 SETZ 2,
387 000267' 225 01 0 00 040433 MULI 1,^D16667
388 000270' 254 00 0 00 000274' JRST MONTI1
389 000271' 201 01 0 00 400000 MONTI0: MOVEI 1,.FHSLF ; get process handle
390 000272' 104 00 0 00 000014 TIME ; does a TIME JSYS
391 000273' 320 17 0 00 003635' ERCAL [RTN] ; error not likely
392 000274' 335 00 0 00 006123' MONTI1: SKIPGE INITM# ; initial time valid?
393 000275' 202 01 0 00 006123' MOVEM 1,INITM# ; no - set it up
394 000276' 274 01 0 00 006123' SUB 1,INITM# ; subtract initial time
395 000277' 400 02 0 00 000000 SETZ 2, ; clear AC2
396 000300' 225 01 0 00 001750 MULI 1,^D1000 ; converts ms to us
397 000301' 244 01 0 00 000014 ASHC 1,^D12 ; put data in proper microsecond format
398 000302' 262 17 0 00 000003 GET 3 ; restore AC3
399 000303' 263 17 0 00 000000 RTN ; and exit
400
401
402 ;#********************************************************************
403 ;* PTIME - Print time of day
404 ;#********************************************************************
405
406 000304' 261 17 0 00 000003 PTIME: PUT 3 ; save AC3
407 000305' 200 03 0 00 003520' MOVE 3,[JFCL] ; non-zero for RUNTME
408 000306' 402 00 0 00 006117' SETZM FORPNT# ; clear forced print flag
409 000307' 260 17 0 00 000320' GO RUNTME ; go print out time
410 000310' 262 17 0 00 000003 GET 3 ; restore AC3
411 000311' 263 17 0 00 000000 RTN ; return
412
413 000312' 261 17 0 00 000003 PTIMEF: PUT 3 ; save AC3
414 000313' 200 03 0 00 003520' MOVE 3,[JFCL] ; non-zero for RUNTME
415 000314' 476 00 0 00 006117' SETOM FORPNT ; set forced print flag
416 000315' 260 17 0 00 000320' GO RUNTME ; go print out time
417 000316' 262 17 0 00 000003 GET 3 ; restore AC3
418 000317' 263 17 0 00 000000 RTN ; return
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 12
DFPTAU MAC 6-Aug-83 09:31 Clock Handling Routines SEQ 2083
419
420 ;#********************************************************************
421 ;* RUNTME - Calculate and print program runtime
422 ;
423 ; This reports the elapsed time (exec or user mode) since the last
424 ; call to the initialize routine "STCLOK". The runtime is printed on the
425 ; current line and no line feed is printed at the end of the message.
426 ; It is printed as " 1h 20m 48s"
427 ;
428 ; In exec mode the time is calculated by using the microsecond clock
429 ; that was initialized in the call to "STCLOK". In user mode, "RUNTIME"
430 ; monitor calls are used and the difference is calculated from the last
431 ; call to "STCLOK".
432 ;
433 ; Arguments: AC3 - contains message to print - if zero then the time
434 ; is only calculated and the routine returns (in TMSG format). The
435 ; current time is always placed in CURTIM (in seconds).
436 ;
437 ; Call sequence: GO RUNTME ; call the routine
438 ; RTN+1 ; always returns +1
439 ;#********************************************************************
440
441 000320' 261 17 0 00 000000 RUNTME: RPUT (0,1,2,3) ; save AC's
442
443
444 ; Get the microsecond count
445
446 000324' 332 00 0 00 030037 SKIPE USER ; in user mode?
447 000325' 254 00 0 00 000330' JRST RUNTM0 ; yes
448 000326' 7 020 04 0 00 000410' DATAI 20,TMRUN1 ; exec mode. get dble word time
449 000327' 254 00 0 00 000332' JRST RUNTM1 ; go to common code
450 000330' 260 17 0 00 000262' RUNTM0: GO MONTIM ; get time from mon calls to AC1,AC2
451 000331' 124 01 0 00 000410' DMOVEM 1,TMRUN1 ; save microsecond count in double word
452
453 ; Calculate time
454
455 000332' 120 00 0 00 000410' RUNTM1: DMOVE TMRUN1 ; get current run time
456 000333' 115 00 0 00 000260' DSUB TMRST1 ; calculates actual run time
457 000334' 244 00 0 00 777764 ASHC -^D12 ; right justify
458 000335' 234 00 0 00 003636' DIV [^D1000] ; convert us to ms
459 000336' 202 00 0 00 000414' MOVEM DEBTIM ; save in debug time location
460 000337' 202 01 0 00 000415' MOVEM 1,USTIM ; save microseconds also
461 000340' 230 00 0 00 003636' IDIV [^D1000] ; convert ms to seconds
462 000341' 202 00 0 00 000412' MOVEM CURTIM ; save in current time location
463
464 ; Exit if not printing
465
466 000342' 336 00 0 00 000003 SKIPN 3 ; message to print?
467 JRST [RGET (3,2,1,0) ; no - restore AC's and
468 000343' 254 00 0 00 003637' RTN] ; return
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 13
DFPTAU MAC 6-Aug-83 09:31 Clock Handling Routines SEQ 2084
469
470 ; Print the time
471
472 000344' 256 00 0 00 000003 XCT 3 ; print the message
473 000345' 231 00 0 00 000074 IDIVI ^D60 ; compute minutes, seconds
474 000346' 202 01 0 00 000003 MOVEM 1,3 ; save seconds
475 000347' 231 00 0 00 000074 IDIVI ^D60 ; compute hours, minutes
476 000350' 322 00 0 00 000361' JUMPE RUNTM2 ; print hours if not zero
477
478 ; Print hours
479
480 000351' 332 00 0 00 006117' SKIPE FORPNT ; forced print?
481 000352' 037 15 0 00 000001 PNTDCF ; yes - print hours
482 000353' 336 00 0 00 006117' SKIPN FORPNT ; forced print?
483 000354' 037 15 0 00 000000 PNTDEC ; no - print hours
484
485 000355' 332 00 0 00 006117' SKIPE FORPNT ; forced print?
486 000356' 037 01 0 00 003644' FMSG <h > ; yes
487 000357' 336 00 0 00 006117' SKIPN FORPNT ; forced print?
488 000360' 037 00 0 00 003644' TMSG <h > ; no
489
490 ; Print minutes
491
492 000361' 200 00 0 00 000001 RUNTM2: MOVE 1
493 000362' 332 00 0 00 006117' SKIPE FORPNT ; forced print?
494 000363' 037 15 0 00 000001 PNTDCF ; yes - print minutes
495 000364' 336 00 0 00 006117' SKIPN FORPNT ; forced print?
496 000365' 037 15 0 00 000000 PNTDEC ; no - print minutes
497 000366' 332 00 0 00 006117' SKIPE FORPNT ; forced print?
498 000367' 037 01 0 00 003645' FMSG <m > ; yes
499 000370' 336 00 0 00 006117' SKIPN FORPNT ; forced print?
500 000371' 037 00 0 00 003645' TMSG <m > ; no
501
502 ; Print seconds
503
504 000372' 200 00 0 00 000003 MOVE 3
505 000373' 332 00 0 00 006117' SKIPE FORPNT ; forced print?
506 000374' 037 15 0 00 000001 PNTDCF ; yes - print seconds
507 000375' 336 00 0 00 006117' SKIPN FORPNT ; forced print?
508 000376' 037 15 0 00 000000 PNTDEC ; no - print seconds
509 000377' 332 00 0 00 006117' SKIPE FORPNT ; forced print?
510 000400' 037 01 0 00 003646' FMSG <s >
511 000401' 336 00 0 00 006117' SKIPN FORPNT ; forced print?
512 000402' 037 00 0 00 003647' TMSG <s>
513
514 000403' 262 17 0 00 000003 RUNTMX: RGET (3,2,1,0) ; restore AC's
515
516 000407' 263 17 0 00 000000 RTN ; and exit
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 14
DFPTAU MAC 6-Aug-83 09:31 Clock Handling Routines SEQ 2085
517
518 ; Timer routine storage
519
520 000410' TMRUN1: BLOCK 2 ; microsecond runtime saved here...
521
522 000412' 000000 000000 CURTIM: 0 ; current time in seconds
523 000413' 000000 000000 MAXTIM: 0 ; maximum wait time
524 000414' 000000 000000 DEBTIM: 0 ; current time in milliseconds
525 000415' 000000 000000 USTIM: 0 ; current usecs (additional to DEBTIM)
526
527
528 ;#********************************************************************
529 ;* PSTAMP - Check for an 'S' typed.
530 ;#********************************************************************
531
532 000416' 261 17 0 00 000000 PSTAMP: RPUT (0,1,2,3,4) ; save AC's
533
534 000423' 200 00 0 00 006124' MOVE LCHAR# ; get last character typed
535 000424' 306 00 0 00 000123 CAIN 123 ; was it an upper case-s?
536 000425' 254 00 0 00 000432' JRST PSTAM0 ; yes - print current statistics
537 000426' 306 00 0 00 000163 CAIN 163 ; lower case-s?
538 000427' 254 00 0 00 000432' JRST PSTAM0 ; yes - print current statistics
539 000430' 302 00 0 00 000023 CAIE 023 ; control-s?
540 000431' 254 00 0 00 000455' JRST PSTAMX ; no - exit
541
542 ; Print runtime data
543
544 000432' 037 01 0 00 003650' PSTAM0: FMSGC <** >
545 000433' 260 17 0 00 003434' GO PNTDEV ; print device name
546 000434' 037 01 0 00 003652' FMSG < Test >
547 000435' 200 01 0 00 000000* MOVE 1,TSTCLS ; get test class
548 000436' 200 00 0 01 000000* MOVE INDLIS(1) ; get class description
549 000437' 037 01 0 00 000002 PNTSXF ; print it
550 000440' 200 00 0 00 000000* MOVE TSTNUM ; get test number
551 000441' 037 17 0 00 000003 PNTOCF ; print it
552 000442' 200 00 0 00 000000* MOVE TSTSUB ; get subtest number
553 000443' 322 00 0 00 000446' JUMPE .+3 ; zero? yes - continue
554 000444' 037 01 0 00 003462' FMSG <-> ; no - print it
555 000445' 037 17 0 00 000003 PNTOCF
556 000446' 037 01 0 00 003654' FMSG < at >
557 000447' 260 17 0 00 000312' GO PTIMEF ; print current time
558 000450' 037 01 0 00 003655' FMSG < in Pass >
559 000451' 200 00 0 00 000000* MOVE TSTREP ; get pass count
560 000452' 350 00 0 00 000000 AOS
561 000453' 037 15 0 00 000001 PNTDCF ; print it
562 000454' 037 01 0 00 003657' FMSGD <. **>
563
564 000455' 402 00 0 00 006124' PSTAMX: SETZM LCHAR ; clear last character typed location
565 000456' 262 17 0 00 000004 RGET (4,3,2,1,0) ; restore AC's
566
567 000463' 263 17 0 00 000000 RTN ; return
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 15
DFPTAU MAC 6-Aug-83 09:31 Clock Handling Routines SEQ 2086
568
569 ;#********************************************************************
570 ;* LSTAMP - Check for an 'S' typed.
571 ;#********************************************************************
572
573 000464' 261 17 0 00 000000 LSTAMP: RPUT (0,1,2,3,4) ; save AC's
574
575 000471' 200 00 0 00 006124' MOVE LCHAR# ; get last character typed
576 000472' 306 00 0 00 000123 CAIN 123 ; was it an upper case-s?
577 000473' 254 00 0 00 000500' JRST LSTAM0 ; yes - print current statistics
578 000474' 306 00 0 00 000163 CAIN 163 ; lower case-s?
579 000475' 254 00 0 00 000500' JRST LSTAM0 ; yes - print current statistics
580 000476' 302 00 0 00 000023 CAIE 023 ; control-s?
581 000477' 254 00 0 00 000515' JRST LSTAMX ; no - exit
582
583 ; Print runtime data
584
585 000500' 037 01 0 00 003661' LSTAM0: FMSGC <** Looping on Test >
586 000501' 200 01 0 00 000435* MOVE 1,TSTCLS ; get test class
587 000502' 200 00 0 01 000436* MOVE INDLIS(1) ; get class description
588 000503' 037 01 0 00 000002 PNTSXF ; print it
589 000504' 200 00 0 00 000440* MOVE TSTNUM ; get test number
590 000505' 037 17 0 00 000003 PNTOCF ; print it
591 000506' 200 00 0 00 000442* MOVE TSTSUB ; get subtest number
592 000507' 322 00 0 00 000512' JUMPE .+3 ; zero? yes - continue
593 000510' 037 01 0 00 003462' FMSG <-> ; no - print it
594 000511' 037 17 0 00 000003 PNTOCF
595 000512' 037 01 0 00 003654' FMSG < at >
596 000513' 260 17 0 00 000312' GO PTIMEF ; print current time
597 000514' 037 01 0 00 003666' FMSGD < **>
598
599 000515' 402 00 0 00 006124' LSTAMX: SETZM LCHAR ; clear last character typed location
600 000516' 262 17 0 00 000004 RGET (4,3,2,1,0) ; restore AC's
601
602 000523' 263 17 0 00 000000 RTN ; return
603
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 16
DFPTAU MAC 6-Aug-83 09:31 TOPS10/20 Related Routines SEQ 2087
604 SUBTTL TOPS10/20 Related Routines
605
606 ;#********************************************************************
607 ;* .RESET - Subroutine to issue a RESET JSYS/UUO
608 ;
609 ; In exec mode it does nothing. In user mode it issues the appropriate
610 ; RESET UUO/JSYS that may be desirable at the start or end of a program.
611 ;#********************************************************************
612
613 000524' 336 00 0 00 030037 .RESET: SKIPN USER ; user mode?
614 000525' 263 17 0 00 000000 RTN ; no - exit
615 000526' 336 00 0 00 030516 SKIPN MONTYP ; TOPS20? (non-zero)
616 000527' 254 00 0 00 000533' JRST RST10 ; no - TOPS10
617 000530' 104 00 0 00 000147 RESET ; do a RESET
618 000531' 320 17 0 00 003635' ERCAL [RTN] ; error rtn
619 000532' 254 00 0 00 000535' JRST RSTX ; to exit code
620 000533' 047000 000000 RST10: 047000,,000000 ; RESET UUO, CALLI AC,0 ...
621 000534' 255 00 0 00 000000 JFCL ; error rtn
622 000535' 263 17 0 00 000000 RSTX: RTN ; exit
623
624
625 ;#********************************************************************
626 ;* .CLOSE - Subroutine to close opened files
627 ;
628 ; This does nothing in exec mode. In user mode under TOPS10 and
629 ; TOPS20 it takes the necessary steps to close the output file which
630 ; is necessary if you've been outputting to a disk file and wish to
631 ; leave the program ....
632 ;
633 ; Note *** Once you do a close from a Ctrl-C intercept the PNT File
634 ; gets closed correctly but if you continue, the SUBRTN PKG creates a
635 ; new PNT File and you lose the old one.
636 ;#********************************************************************
637
638 000536' 336 00 0 00 030037 .CLOSE: SKIPN USER ; skip if we're in user mode
639 000537' 263 17 0 00 000000 RTN ; exec mode
640 000540' 037 05 0 00 000002 DROPDV ; SUBRTN PKG UUO or it won't work ok
641 000541' 261 17 0 00 000001 PUT 1 ; save AC
642 000542' 336 00 0 00 030516 SKIPN MONTYP ; TOPS20?
643 000543' 254 00 0 00 000550' JRST CLS10 ; no - go handle TOPS10
644 000544' 201 01 0 00 400000 MOVEI 1,.FHSLF ; get fork handle
645 000545' 104 00 0 00 000034 CLZFF ; close all files JSYS ..
646 000546' 320 17 0 00 003635' ERCAL [RTN] ; error return
647 000547' 254 00 0 00 000552' JRST CLSX ; exit
648 000550' 070000 000000 CLS10: 070000,,000000 ; CLOSE D,0 UUO ... closes files
649 000551' 255 00 0 00 000000 JFCL
650 000552' 262 17 0 00 000001 CLSX: GET 1 ; restore AC
651 000553' 263 17 0 00 000000 RTN ; and exit
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 17
DFPTAU MAC 6-Aug-83 09:31 TOPS10/20 Related Routines SEQ 2088
652
653 ;#********************************************************************
654 ;* .EXIT - Subroutine to exit job in user mode
655 ;
656 ; In exec mode it does nothing. In user mode it issues the appropriate
657 ; EXIT UUO or HALTF JSYS getting you back to monitor level. This also
658 ; allows you to continue with a continue command.
659 ;
660 ; Call seq:
661 ; GO .EXIT ; the call
662 ; RTN1 ; rtn+1 always
663 ;#********************************************************************
664
665 000554' 336 00 0 00 030037 .EXIT: SKIPN USER ; user mode?
666 000555' 263 17 0 00 000000 RTN ; no - exec mode - exit
667
668 000556' 261 17 0 00 000001 PUT 1 ; save AC1
669 000557' 336 00 0 00 030516 SKIPN MONTYP ; TOPS20?
670 000560' 254 00 0 00 000565' JRST EXT10 ; no - TOPS10
671
672 000561' 201 01 0 00 400000 MOVEI 1,.FHSLF ; get fork handle
673 000562' 104 00 0 00 000170 HALTF ; halt... to monitor level
674 000563' 255 00 0 00 000000 JFCL ; here on a continue command
675 000564' 254 00 0 00 000567' JRST EXTX ; to exit code
676
677 000565' 047040 000012 EXT10: 047040,,000012 ; EXIT 1, UUO (CALLI 12 F=1)
678 000566' 255 00 0 00 000000 JFCL ; here on a continue command
679
680 000567' 262 17 0 00 000001 EXTX: GET 1 ; restore the AC
681 000570' 263 17 0 00 000000 RTN ; exit
682
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 18
DFPTAU MAC 6-Aug-83 09:31 File Handling Routines SEQ 2089
683 SUBTTL File Handling Routines
684
685 ;#********************************************************************
686 ;* FINIT - Initialize reading of microcode file
687 ;
688 ; Returns: +1 - Error occurred
689 ; +2 - OK
690 ;#********************************************************************
691
692 000571' 261 17 0 00 000000 FINIT: PUT 0
693 000572' 201 00 0 00 000652' MOVEI UNAME ; point to file name buffer
694 000573' 037 05 0 00 000004 FSELECT ; init the file
695 JRST [MOVEI 1,UNAME ; error - get pointer to file name
696 GO FFAIL ; report to opr
697 GET 0 ; restore AC0
698 000574' 254 00 0 00 003670' RTN] ; exit
699 000575' 037 00 0 00 003674' TMSGC <[Reading file: >
700 000576' 200 00 0 00 000652' MOVE UNAME ; get the selected file name
701 000577' 037 00 0 00 000002 PNTSIX ; print it
702 000600' 037 00 0 00 000056 PNTCI "."
703 000601' 200 00 0 00 000653' MOVE UNAME+1 ; get the extension of file
704 000602' 037 00 0 00 000002 PNTSIX ; print it
705 000603' 037 00 0 00 003700' TMSGD <]>
706 000604' 262 17 0 00 000000 GET 0 ; restore AC0
707 000605' 350 00 0 17 000000 AOS (P) ; set up RTN+2
708 000606' 263 17 0 00 000000 RTN ; return
709
710
711 ;#*********************************************************************
712 ;* CHRIN - Routine to read an ASCII character from the selected file.
713 ;#*********************************************************************
714
715 000607' 037 06 0 00 000004 CHRIN: FREAD ; tell DIAMON to get a file character
716 000610' 263 17 0 00 000000 RTN ; error or eof detected during reading
717 000611' 322 00 0 00 000607' JUMPE CHRIN ; eat all null characters
718 000612' 350 00 0 17 000000 AOS (P) ; normal exit +2
719 000613' 263 17 0 00 000000 RTN
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 19
DFPTAU MAC 6-Aug-83 09:31 File Handling Routines SEQ 2090
720
721 ;#*********************************************************************
722 ;* CHRINS - Routine to read an ASCII character from the selected file.
723 ;#*********************************************************************
724
725 000614' 261 17 0 00 000000 CHRINS: PUT 0 ; save AC0
726 000615' 037 06 0 00 000004 FREAD ; get a file character
727 000616' 254 00 0 00 000626' JRST CHRINX ; error or eof detected during reading
728 000617' 322 00 0 00 000615' JUMPE .-2 ; eat all null characters
729 000620' 350 00 0 17 777777 AOS -1(P) ; normal exit +2
730 000621' 202 00 0 17 000000 MOVEM (P) ; put character on stack
731 000622' 332 00 0 00 000000* SKIPE FINECH ; echo flag set?
732 000623' 037 12 0 00 000001 PNTCHF ; yes - echo the character
733 000624' 262 17 0 00 000000 GET 0 ; restore AC0
734 000625' 263 17 0 00 000000 RTN
735
736 000626' 037 01 0 00 003701' CHRINX: FMSGC <[End of > ; end of file
737 000627' 200 00 0 00 000000* MOVE TAKFIL ; print file name
738 000630' 037 01 0 00 000002 PNTSXF
739 000631' 037 01 0 00 000056 PNTCIF "."
740 000632' 200 00 0 00 000000# MOVE TAKFIL+1
741 000633' 037 01 0 00 000002 PNTSXF
742 000634' 037 01 0 00 003700' FMSGD <]>
743 000635' 402 00 0 00 000000* SETZM FINPUT ; clear 'file input' flag
744 000636' 262 17 0 00 000000 GET 0 ; restore AC0
745 000637' 263 17 0 00 000000 RTN
746
747
748 ;#*********************************************************************
749 ;* FFAIL - Routine to report "DIAMON" open failure on a selected file.
750 ;#*********************************************************************
751
752 000640' 261 17 0 00 000000 FFAIL: PUT 0 ; save AC0
753 000641' 037 01 0 00 003704' FMSGC <? Can't access ">
754 000642' 200 00 0 00 000652' MOVE UNAME ; get file name
755 000643' 037 01 0 00 000002 PNTSXF ; print it
756 000644' 037 01 0 00 000056 PNTCIF "."
757 000645' 200 00 0 00 000653' MOVE UNAME+1 ; get extension
758 000646' 037 01 0 00 000002 PNTSXF ; print it
759 000647' 037 01 0 00 003710' FMSGD <" on selected load device.>
760 000650' 262 17 0 00 000000 GET 0 ; restore AC0
761 000651' 263 17 0 00 000000 RTN ; return
762
763 000652' 43 51 22 20 00 00 UNAME: SIXBIT /CI20/
764 000653' 65 54 44 00 00 00 SIXBIT /ULD/
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 20
DFPTAU MAC 6-Aug-83 09:31 File Handling Routines SEQ 2091
765
766 ;#********************************************************************
767 ;* FGETW - Get microword entry from file
768 ;
769 ; Arguments: None (but file is already open and ready for use)
770 ;
771 ; Function: Read a file entry consisting of '[ADDR]=Microword Data'
772 ;
773 ; Returns: +1 - Error/EOF occurred
774 ; +2 - OK - Address is in CADDR
775 ; Microword is in CWORDL,CWORDR
776 ;#********************************************************************
777
778 000654' 261 17 0 00 000000 FGETW: RPUT (0,1,2) ; save AC's
779
780 000657' 402 00 0 00 000000* SETZM CADDR ; clear address
781 000660' 402 00 0 00 000000* SETZM CWORDL ; clear left half
782 000661' 402 00 0 00 000000* SETZM CWORDR ; clear right half
783 000662' 260 17 0 00 000721' GO FGETA ; get load address
784 000663' 254 00 0 00 000715' JRST FGETWE ; error/EOF occurred
785 000664' 202 01 0 00 000657* MOVEM 1,CADDR ; save address
786 000665' 260 17 0 00 000607' GO CHRIN ; search for the = sign
787 000666' 254 00 0 00 000715' JRST FGETWE ; error/EOF occurred
788 000667' 302 00 0 00 000075 CAIE "=" ; equal sign?
789 000670' 254 00 0 00 000665' JRST .-3 ; keep looking
790 000671' 260 17 0 00 000743' GO FGETD ; get a 4 digit number
791 000672' 254 00 0 00 000715' JRST FGETWE ; error/EOF occurred
792 000673' 137 01 0 00 003716' DPB 1,[POINT 12,CWORDL,17] ; save it
793 000674' 260 17 0 00 000743' GO FGETD ; get a 4 digit number
794 000675' 254 00 0 00 000715' JRST FGETWE ; error/EOF occurred
795 000676' 137 01 0 00 003717' DPB 1,[POINT 12,CWORDL,29] ; save it
796 000677' 260 17 0 00 000743' GO FGETD ; get a 4 digit number
797 000700' 254 00 0 00 000715' JRST FGETWE ; error/EOF occurred
798 000701' 246 01 0 00 777772 LSHC 1,-6 ; right shift 6 bits
799 000702' 137 01 0 00 003720' DPB 1,[POINT 6,CWORDL,35] ; save 6 of the bits
800 000703' 400 01 0 00 000000 SETZ 1, ; clear AC1
801 000704' 246 01 0 00 000006 LSHC 1,6 ; left shift 6 bits
802 000705' 137 01 0 00 003721' DPB 1,[POINT 6,CWORDR,11] ; save remaining 6 bits
803 000706' 260 17 0 00 000743' GO FGETD ; get a 4 digit number
804 000707' 254 00 0 00 000715' JRST FGETWE ; error/EOF occurred
805 000710' 137 01 0 00 003722' DPB 1,[POINT 12,CWORDR,23] ; save it
806 000711' 260 17 0 00 000743' GO FGETD ; get a 4 digit number
807 000712' 254 00 0 00 000715' JRST FGETWE ; error/EOF occurred
808 000713' 137 01 0 00 003723' DPB 1,[POINT 12,CWORDR,35] ; save it
809 000714' 350 00 0 17 777775 AOS -3(P) ; done - set up RTN+2
810 000715' 262 17 0 00 000002 FGETWE: RGET (2,1,0) ; restore AC's
811
812 000720' 263 17 0 00 000000 RTN ; return
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 21
DFPTAU MAC 6-Aug-83 09:31 File Handling Routines SEQ 2092
813
814 ;#********************************************************************
815 ;* FGETA - Obtain microcode load address 'ADDR:' from file
816 ;
817 ; Returns: +1 - Error/EOF occurred
818 ; +2 - OK - AC1 contains octal address
819 ;#********************************************************************
820
821 000721' 261 17 0 00 000000 FGETA: PUT 0 ; save AC0
822 000722' 260 17 0 00 000607' FGETA0: GO CHRIN ; get a character
823 000723' 254 00 0 00 000733' JRST FGETAE ; exit - error or EOF occurred
824 000724' 306 00 0 00 000073 CAIN ";" ; comment character?
825 000725' 260 17 0 00 000735' GO FSKIPC ; yes - go skip it
826 000726' 302 00 0 00 000133 CAIE "[" ; found beginning of address?
827 000727' 254 00 0 00 000722' JRST FGETA0 ; no - keep looking
828 000730' 260 17 0 00 000743' GO FGETD ; get up to 4 digit # ended by CR or ]
829 000731' 254 00 0 00 000733' JRST FGETAE ; exit - error or EOF occurred
830 000732' 350 00 0 17 777777 AOS -1(P)
831 000733' 262 17 0 00 000000 FGETAE: GET 0 ; restore AC0
832 000734' 263 17 0 00 000000 RTN ; return
833
834 000735' 260 17 0 00 000607' FSKIPC: GO CHRIN ; get a character
835 000736' 254 00 0 00 000733' JRST FGETAE ; exit - error or EOF occurred
836 000737' 302 00 0 00 000015 CAIE 15 ; CRLF yet?
837 000740' 306 00 0 00 000012 CAIN 12
838 000741' 263 17 0 00 000000 RTN ; yes - return
839 000742' 254 00 0 00 000735' JRST FSKIPC ; no - keep looking for it
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 22
DFPTAU MAC 6-Aug-83 09:31 File Handling Routines SEQ 2093
840
841 ;#********************************************************************
842 ;* FGETD - Obtain microcode data entry from file (4 digits).
843 ;
844 ; Returns: +1 - Error/EOF occurred
845 ; +2 - OK - AC1 contains octal data
846 ;#********************************************************************
847
848 000743' 261 17 0 00 000000 FGETD: RPUT (0,2) ; save AC's
849
850 000745' 400 01 0 00 000000 SETZ 1, ; clear result
851 000746' 201 02 0 00 000004 MOVEI 2,4 ; up to 4 digits
852 000747' 260 17 0 00 000607' FGETD0: GO CHRIN ; get a digit
853 000750' 254 00 0 00 000765' JRST FGETDE ; error - exit
854 000751' 306 00 0 00 000015 CAIN 15 ; carriage return?
855 000752' 254 00 0 00 000764' JRST FGETD1 ; yes - done - exit
856 000753' 306 00 0 00 000135 CAIN "]" ; end of address field?
857 000754' 254 00 0 00 000764' JRST FGETD1 ; yes - done - exit
858 000755' 301 00 0 00 000060 CAIL 60 ; is character between
859 000756' 303 00 0 00 000067 CAILE 67 ; 0 and 7?
860 000757' 254 00 0 00 000765' JRST FGETDE ; no - error - exit
861 000760' 275 00 0 00 000060 SUBI 60 ; normalize to 0-7
862 000761' 242 01 0 00 000003 LSH 1,3 ; multiply result so far by 8
863 000762' 272 00 0 00 000001 ADDM 1 ; add current digit
864 000763' 367 02 0 00 000747' SOJG 2,FGETD0 ; loop till done
865 000764' 350 00 0 17 777776 FGETD1: AOS -2(P) ; ok - set up RTN+2
866 000765' 262 17 0 00 000002 FGETDE: RGET (2,0) ; restore AC's
867
868 000767' 263 17 0 00 000000 RTN ; return
869
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 23
DFPTAU MAC 6-Aug-83 09:31 Data Pattern Generator/Compare Routines SEQ 2094
870 SUBTTL Data Pattern Generator/Compare Routines
871
872 ;#********************************************************************
873 ;* BUFGEN - Generate the specified data pattern in the data buffer.
874 ;* BUFCOM - Compare the data buffer with expected data
875 ;
876 ; Arguments: AC1 - Type: 1 read -1 read (don't report errors)
877 ; 2 write -2 write (don't report errors)
878 ; 3 read/write -3 read/write (don't report errors)
879 ; AC2 - Length in words
880 ; PAT - Data pattern
881 ;
882 ; Returns (BUFCOM): AC1 - Number of words in error
883 ;#********************************************************************
884
885 000770' 402 00 0 00 006134' BUFCOM: SETZM WRDERR ; clear words in error count
886 000771' 476 00 0 00 006120' SETOM GENFLG# ; set to 'compare data'
887 000772' 476 00 0 00 006121' SETOM GENREP# ; set 'report errors' flag
888 000773' 335 00 0 00 000001 SKIPGE 1 ; report errors?
889 000774' 402 00 0 00 006121' SETZM GENREP ; no - clear 'report errors' flag
890 000775' 217 00 0 00 000001 MOVMS 1 ; get absolute value
891 000776' 306 01 0 00 000003 CAIN 1,3 ; read/write transfer?
892 000777' 254 00 0 00 001077' JRST BUFCRW ; yes - go do the special compare
893 001000' 334 00 0 00 000000 SKIPA
894 001001' 402 00 0 00 006120' BUFGEN: SETZM GENFLG ; set to 'generate data'
895 001002' 202 01 0 00 006122' MOVEM 1,GENTYP# ; save type of transfer
896 001003' 322 14 0 00 003635' JUMPE PAT,[RTN] ; exit immediately if pat is zero
897 001004' 261 17 0 00 000000 RPUT (0,1,2,3,7,PAT) ; save some AC's
898
899
900 ; Find out fill pattern to use
901
902 001012' 201 00 0 00 000115 MOVEI FILLFP ; get fill pattern (fixed)
903 001013' 301 14 0 00 000116 CAIL PAT,VPATRN ; variable pattern?
904 001014' 201 00 0 00 000127 MOVEI FILLVP ; yes - get fill pattern (variable)
905 001015' 202 00 0 00 006126' MOVEM PATFLG# ; save it
906
907 ; Check if read - if so set up fill pattern
908
909 001016' 332 00 0 00 006120' SKIPE GENFLG ; compare data?
910 001017' 254 00 0 00 001022' JRST .+3 ; yes - continue
911 001020' 306 01 0 00 000001 CAIN 1,1 ; no - read?
912 001021' 200 14 0 00 006126' MOVE PAT,PATFLG ; yes - get fill pattern
913
914 ; Handle buffer length - cannot exceed 512 words (all the CCWs necessary
915 ; are generated by GENCCW, but they all start at the same address.
916
917 001022' 200 01 0 00 000002 MOVE 1,2 ; get number of full words in buffer
918 001023' 303 01 0 00 001000 CAILE 1,^D512 ; over 512 words?
919 001024' 201 01 0 00 001000 MOVEI 1,^D512 ; yes - limit to 512 words
920 001025' 201 02 0 00 000000* MOVEI 2,BUFF ; get buffer address
921 001026' 213 00 0 00 000001 MOVNS 1 ; generate AOBJN word to sequence
922 001027' 506 01 0 00 000002 HRLM 1,2 ; through the buffer
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 24
DFPTAU MAC 6-Aug-83 09:31 Data Pattern Generator/Compare Routines SEQ 2095
923
924 ; Now generate/compare the data (for a constant pattern)
925 ; ------------------------------------------------------
926
927 001030' 301 14 0 00 000116 CAIL PAT,VPATRN ; skip if a constant pattern
928 001031' 254 00 0 00 001041' JRST BUFG1 ; go generate variable pattern
929 001032' 200 07 0 14 001165' BUFG0: MOVE 7,PATBUF(PAT) ; get pattern
930 001033' 336 00 0 00 006120' SKIPN GENFLG ; compare data?
931 001034' 202 07 0 02 000000 MOVEM 7,(2) ; no - put into buffer
932 001035' 332 00 0 00 006120' SKIPE GENFLG ; compare data?
933 GO [CAME 7,(2) ; yes - compare it
934 GO DATMES ; error - go handle
935 001036' 260 17 0 00 003724' RTN]
936
937 ; Now do next word
938
939 001037' 253 02 0 00 001032' AOBJN 2,BUFG0 ; loop till done
940 001040' 254 00 0 00 001054' JRST BUFGX ; all done - exit
941
942 ; Now generate/compare the data (for a variable pattern)
943 ; ------------------------------------------------------
944
945 ; Generate first word of buffer
946
947 001041' 200 07 0 14 001165' BUFG1: MOVE 7,PATBUF(PAT) ; get pattern pointer word
948 001042' 552 07 0 00 006133' HRRZM 7,VARPAT# ; put adr of 2nd instruction in VARPAT
949 001043' 207 00 0 00 000007 MOVSS 7 ; swap address of pointer
950 001044' 256 00 0 07 000000 XCT (7) ; get first word of pattern
951 001045' 334 00 0 00 000000 SKIPA ; continue
952
953 ; Generate successive words of variable pattern
954
955 001046' 256 00 1 00 006133' BUFG2: XCT @VARPAT ; generate another word of pattern
956 001047' 336 00 0 00 006120' SKIPN GENFLG ; compare data?
957 001050' 202 07 0 02 000000 MOVEM 7,(2) ; no - put into buffer
958 001051' 332 00 0 00 006120' SKIPE GENFLG ; compare data?
959 GO [CAME 7,(2) ; yes - compare it
960 GO DATMES ; error - go handle
961 001052' 260 17 0 00 003724' RTN]
962
963 ; Now do next word
964
965 001053' 253 02 0 00 001046' AOBJN 2,BUFG2 ; loop till done
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 25
DFPTAU MAC 6-Aug-83 09:31 Data Pattern Generator/Compare Routines SEQ 2096
966
967 ; All done - exit
968
969 001054' 336 00 0 00 006120' BUFGX: SKIPN GENFLG ; compare data?
970 001055' 254 00 0 00 001070' JRST BUFGXZ ; no - exit
971 001056' 337 00 0 00 006134' SKIPG WRDERR# ; any compare errors?
972 001057' 254 00 0 00 001066' JRST BUFGXY ; no - return
973 001060' 336 00 0 00 006121' SKIPN GENREP ; report errors?
974 001061' 254 00 0 00 001066' JRST BUFGXY ; no - return
975 001062' 037 00 0 00 003727' TMSGC <Words in error = >
976 001063' 200 00 0 00 006134' MOVE WRDERR
977 001064' 037 15 0 00 000000 PNTDEC
978 001065' 037 00 0 00 003466' TMSG <.>
979 001066' 200 01 0 00 006134' BUFGXY: MOVE 1,WRDERR ; get number of errors
980 001067' 202 01 0 17 777774 MOVEM 1,-4(P) ; save it
981 001070' 262 17 0 00 000014 BUFGXZ: RGET (PAT,7,3,2,1,0) ; restore AC's
982
983 001076' 263 17 0 00 000000 RTN
984
985 ; Data compare for split buffer
986
987 001077' 261 17 0 00 000000 BUFCRW: RPUT (0,1,2,3,7,PAT,10) ; save some AC's
988
989 001106' 200 01 0 00 000002 MOVE 1,2 ; get number of full words in buffer
990 001107' 242 01 0 00 777777 LSH 1,-1 ; divide by 2
991 001110' 201 10 0 00 001025* MOVEI 10,BUFF ; get buffer address
992 001111' 270 10 0 00 000001 ADD 10,1 ; point to middle of buffer
993 001112' 201 02 0 00 001110* MOVEI 2,BUFF ; get buffer address
994 001113' 213 00 0 00 000001 MOVNS 1 ; generate AOBJN word to sequence
995 001114' 506 01 0 00 000002 HRLM 1,2 ; through the buffer
996
997 ; Do the data compare
998
999 001115' 550 07 0 00 000002 BUFCR1: HRRZ 7,2 ; get address portion
1000 001116' 200 07 0 10 000000 MOVE 7,(10) ; get word
1001 001117' 312 07 0 02 000000 CAME 7,(2) ; data compares?
1002 001120' 260 17 0 00 001125' GO DATMES ; no - go handle error
1003
1004 ; Now do next word
1005
1006 001121' 350 00 0 00 000010 AOS 10 ; point to next word
1007 001122' 253 02 0 00 001115' AOBJN 2,BUFCR1 ; loop till done
1008 001123' 262 17 0 00 000010 GET 10 ; restore AC10
1009 001124' 254 00 0 00 001054' JRST BUFGX ; all done - exit
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 26
DFPTAU MAC 6-Aug-83 09:31 Data Pattern Generator/Compare Routines SEQ 2097
1010
1011 ;#********************************************************************
1012 ;* DATMES - A data comparison error has been found. Report the error,
1013 ;* printing a maximum of three lines of errors.
1014 ;#********************************************************************
1015
1016 001125' 261 17 0 00 000000 DATMES: RPUT (0,1,2,3) ; save AC's
1017
1018 001131' 336 00 0 00 006121' SKIPN GENREP ; report errors?
1019 001132' 254 00 0 00 001133' JRST DATM0 ; no - skip this
1020 001133' 350 03 0 00 006134' DATM0: AOS 3,WRDERR ; increment error count
1021
1022 ; Now see if should be printed
1023
1024 001134' 336 00 0 00 006121' SKIPN GENREP ; report errors?
1025 001135' 254 00 0 00 001160' JRST DATMX ; no - exit
1026 001136' 307 03 0 00 000003 CAIG 3,3 ; already print 3 of them?
1027 001137' 254 00 0 00 001141' JRST DATM1 ; no - go print
1028 001140' 254 00 0 00 001160' JRST DATMX ; yes - exit
1029
1030 ; Now print
1031
1032 001141' 302 03 0 00 000001 DATM1: CAIE 3,1 ; first data error?
1033 001142' 254 00 0 00 001145' JRST .+3 ; no - don't print headers ...
1034 001143' 037 00 0 00 003733' TMSGC <Data Compare Error:>
1035 001144' 037 00 0 00 003740' TMSGC <Word ---Correct--- ---Actual---->
1036 001145' 550 00 0 00 000002 HRRZ 2 ; get word number, numbered
1037 001146' 275 00 0 00 000000# SUBI BUFF-1 ; from 1 ...
1038 001147' 202 00 0 00 006113' MOVEM CWORDN# ; save current word number
1039 001150' 037 00 0 00 030242 PCRL
1040 001151' 006 04 0 00 000000 PDEC 4,0 ; print it
1041 001152' 037 00 0 00 003476' TMSG < > ; print spaces
1042 001153' 200 00 0 00 000007 MOVE 7 ; get correct data
1043 001154' 037 13 0 00 000000 PNTHW ; print it
1044 001155' 037 00 0 00 003475' TMSG < > ; print some more spaces
1045 001156' 200 00 0 02 000000 MOVE (2) ; get actual data
1046 001157' 037 13 0 00 000000 PNTHW ; print it
1047
1048 ; Exit
1049
1050 001160' 262 17 0 00 000003 DATMX: RGET (3,2,1,0) ; restore AC's
1051
1052 001164' 263 17 0 00 000000 RTN ; return
1053
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 27
DFPTAU MAC 6-Aug-83 09:31 Data Patterns SEQ 2098
1054 SUBTTL Data Patterns
1055
1056 ;#********************************************************************
1057 ;* Data Patterns
1058 ;
1059 ; Here are the locations called by the BUFGEN and BUFCOM routines
1060 ; indexed by the pattern number.
1061 ;#********************************************************************
1062
1063 001165' 000000 000000 PATBUF: 0 ; unused
1064 001166' 000000 000000 0 ; 1 - zeros
1065 001167' 777777 777777 -1 ; 2 - ones
1066 001170' 525252 525252 525252525252 ; 3 - alternate bit in 36-bit word
1067 001171' 252525 252525 252525252525 ; 4 - alternate bit in 36-bit word
1068 001172' 000000 000001 1 ; 5 - floating 1's
1069 001173' 000000 000002 2 ; 6
1070 001174' 000000 000004 4 ; 7
1071 001175' 000000 000010 10 ; 10
1072 001176' 000000 000020 20 ; 11
1073 001177' 000000 000040 40 ; 12
1074 001200' 000000 000100 100 ; 13
1075 001201' 000000 000200 200 ; 14
1076 001202' 000000 000400 400 ; 15
1077 001203' 000000 001000 1000 ; 16
1078 001204' 000000 002000 2000 ; 17
1079 001205' 000000 004000 4000 ; 20
1080 001206' 000000 010000 10000 ; 21
1081 001207' 000000 020000 20000 ; 22
1082 001210' 000000 040000 40000 ; 23
1083 001211' 000000 100000 100000 ; 24
1084 001212' 000000 200000 200000 ; 25
1085 001213' 000000 400000 400000 ; 26
1086 001214' 000001 000000 1,,0 ; 27
1087 001215' 000002 000000 2,,0 ; 30
1088 001216' 000004 000000 4,,0 ; 31
1089 001217' 000010 000000 10,,0 ; 32
1090 001220' 000020 000000 20,,0 ; 33
1091 001221' 000040 000000 40,,0 ; 34
1092 001222' 000100 000000 100,,0 ; 35
1093 001223' 000200 000000 200,,0 ; 36
1094 001224' 000400 000000 400,,0 ; 37
1095 001225' 001000 000000 1000,,0 ; 40
1096 001226' 002000 000000 2000,,0 ; 41
1097 001227' 004000 000000 4000,,0 ; 42
1098 001230' 010000 000000 10000,,0 ; 43
1099 001231' 020000 000000 20000,,0 ; 44
1100 001232' 040000 000000 40000,,0 ; 45
1101 001233' 100000 000000 100000,,0 ; 46
1102 001234' 200000 000000 200000,,0 ; 47
1103 001235' 400000 000000 400000,,0 ; 50
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 28
DFPTAU MAC 6-Aug-83 09:31 Data Patterns SEQ 2099
1104 001236' 777777 777776 777777,,777776 ; 51 - floating 0's
1105 001237' 777777 777775 777777,,777775 ; 52
1106 001240' 777777 777773 777777,,777773 ; 53
1107 001241' 777777 777767 777777,,777767 ; 54
1108 001242' 777777 777757 777777,,777757 ; 55
1109 001243' 777777 777737 777777,,777737 ; 56
1110 001244' 777777 777677 777777,,777677 ; 57
1111 001245' 777777 777577 777777,,777577 ; 60
1112 001246' 777777 777377 777777,,777377 ; 61
1113 001247' 777777 776777 777777,,776777 ; 62
1114 001250' 777777 775777 777777,,775777 ; 63
1115 001251' 777777 773777 777777,,773777 ; 64
1116 001252' 777777 767777 777777,,767777 ; 65
1117 001253' 777777 757777 777777,,757777 ; 66
1118 001254' 777777 737777 777777,,737777 ; 67
1119 001255' 777777 677777 777777,,677777 ; 70
1120 001256' 777777 577777 777777,,577777 ; 71
1121 001257' 777777 377777 777777,,377777 ; 72
1122 001260' 777776 777777 777776,,777777 ; 73
1123 001261' 777775 777777 777775,,777777 ; 74
1124 001262' 777773 777777 777773,,777777 ; 75
1125 001263' 777767 777777 777767,,777777 ; 76
1126 001264' 777757 777777 777757,,777777 ; 77
1127 001265' 777737 777777 777737,,777777 ; 100
1128 001266' 777677 777777 777677,,777777 ; 101
1129 001267' 777577 777777 777577,,777777 ; 102
1130 001270' 777377 777777 777377,,777777 ; 103
1131 001271' 776777 777777 776777,,777777 ; 104
1132 001272' 775777 777777 775777,,777777 ; 105
1133 001273' 773777 777777 773777,,777777 ; 106
1134 001274' 767777 777777 767777,,777777 ; 107
1135 001275' 757777 777777 757777,,777777 ; 110
1136 001276' 737777 777777 737777,,777777 ; 111
1137 001277' 677777 777777 677777,,777777 ; 112
1138 001300' 577777 777777 577777,,777777 ; 113
1139 001301' 377777 777777 377777,,777777 ; 114
1140
1141 000115 FILLFP==.-PATBUF ; read fill pattern
1142
1143 001302' 400000 000001 400000,,000001 ; 115
1144
1145 ; Pattern codes from here require execution of special routines
1146
1147 000116 VPATRN==.-PATBUF
1148
1149 ; Each location contains addresses, the first address should be used
1150 ; to generate the first word in a buffer, the second should be used
1151 ; to generate each remaining word. An execute is performed on the
1152 ; instruction in the specified address. The data is returned in AC7.
1153
1154 001303' 003750' 003751' [GO PATRAN],,[GO PATRA1] ; 116 - random numbers
1155 001304' 003752' 003754' [GO PATADR],,[ADD 7,[1,,1]] ; 117 - memory address pattern
1156 001305' 003755' 003756' [MOVEI 7,1],,[ROT 7,1] ; 120 - floating ones
1157 001306' 003757' 003756' [SETCMI 7,1],,[ROT 7,1] ; 121 - floating zeros
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 29
DFPTAU MAC 6-Aug-83 09:31 Data Patterns SEQ 2100
1158
1159 003760' PATCN2==[BYTE (8)1,2,3,4]
1160 003761' PATCN3==[BYTE (7)1,2,3,4,5]
1161 003762' PATCN4==[BYTE (6)1,2,3,4,5,6]
1162
1163 001307' 003763' 003764' [MOVE 7,PATCN2],,[GO PATCN8] ; 122 - count pattern in 8-bit bytes
1164 001310' 003765' 003766' [MOVE 7,PATCN3],,[GO PATCN7] ; 123 - count pattern in 7-bit bytes
1165 001311' 003767' 003770' [MOVE 7,PATCN4],,[GO PATCN6] ; 124 - count pattern in 6-bit bytes
1166 001312' 003771' 003772' [MOVE 7,PATBUF+3],,[SETCA 7,] ; 125 - alternating 36-bit pattern
1167 001313' 003773' 003520' [MOVE 7,TPAT],,[JFCL] ; 126 - operator selected pattern
1168
1169 000127 FILLVP==.-PATBUF ; read fill pattern
1170
1171 001314' 003775' 003520' [MOVE 7,[400000,,1]],,[JFCL] ; 127 - read buffer fill pattern
1172
1173 000127 MAXPAT==.-PATBUF-1 ; maximum pattern number allowed
1174
1175 ; Random number generator
1176
1177 001315' 200 07 0 00 001316' PATRAN: MOVE 7,.+1 ; get base number
1178 001316' 202 07 0 00 006125' MOVEM 7,OLDRAN# ; save it
1179 001317' 263 17 0 00 000000 RTN
1180
1181 001320' 270 07 0 00 030022 PATRA1: ADD 7,RANDBS ; modify number in AC7
1182 001321' 241 07 0 00 777774 ROT 7,-4 ; to create a new number
1183 001322' 447 07 0 00 006125' EQVB 7,OLDRAN ; put result in AC7 and OLDRAN
1184 001323' 263 17 0 00 000000 RTN
1185
1186 ; Put address of data pattern in AC7
1187
1188 001324' 201 07 0 00 001112* PATADR: MOVEI 7,BUFF ; get buffer address
1189 001325' 504 07 0 00 000007 HRL 7,7 ; put in both halves
1190 001326' 263 17 0 00 000000 RTN
1191
1192 ; Count the number in AC7 in 8-bit bytes
1193
1194 001327' 261 17 0 00 000005 PATCN8: RPUT (5,6) ; save AC's
1195
1196 001331' 201 05 0 00 000004 MOVEI 5,4 ; set up to loop 4 times
1197 001332' 135 06 0 00 003776' LDB 6,[POINT 8,7,31] ; get last byte into AC6
1198 001333' 350 00 0 00 000006 AOS 6 ; increment byte number
1199 001334' 405 06 0 00 000377 ANDI 6,377 ; clear all but one byte
1200 001335' 242 07 0 00 000010 LSH 7,8 ; shift word
1201 001336' 436 06 0 00 000007 ORM 6,7 ; merge with new byte
1202 001337' 367 05 0 00 001333' SOJG 5,.-4 ; loop on 5 bytes
1203 001340' 242 07 0 00 000004 LSH 7,4 ; shift over and clear bit 32-35
1204 001341' 262 17 0 00 000006 RGET (6,5) ; restore AC's
1205
1206 001343' 263 17 0 00 000000 RTN ; return
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 30
DFPTAU MAC 6-Aug-83 09:31 Data Patterns SEQ 2101
1207
1208 ; Count the number in AC7 in 7-bit bytes
1209
1210 001344' 261 17 0 00 000005 PATCN7: RPUT (5,6) ; save AC's
1211
1212 001346' 201 05 0 00 000005 MOVEI 5,5 ; set up to loop 5 times
1213 001347' 135 06 0 00 003777' LDB 6,[POINT 7,7,34] ; get last byte into AC6
1214 001350' 350 00 0 00 000006 AOS 6 ; increment byte number
1215 001351' 405 06 0 00 000177 ANDI 6,177 ; clear all but one byte
1216 001352' 242 07 0 00 000007 LSH 7,7 ; shift word
1217 001353' 436 06 0 00 000007 ORM 6,7 ; merge with new byte
1218 001354' 367 05 0 00 001350' SOJG 5,.-4 ; loop on 5 bytes
1219 001355' 242 07 0 00 000001 LSH 7,1 ; shift over and clear bit 35
1220 001356' 262 17 0 00 000006 RGET (6,5) ; restore AC's
1221
1222 001360' 263 17 0 00 000000 RTN ; return
1223
1224 ; Count the number in AC7 in 6-bit bytes
1225
1226 001361' 261 17 0 00 000005 PATCN6: RPUT (5,6) ; save AC's
1227
1228 001363' 201 05 0 00 000006 MOVEI 5,6 ; set up to loop 6 times
1229 001364' 550 06 0 00 000007 HRRZ 6,7 ; get word into AC6
1230 001365' 350 00 0 00 000006 AOS 6 ; increment byte number
1231 001366' 405 06 0 00 000077 ANDI 6,77 ; clear all but one byte
1232 001367' 242 07 0 00 000006 LSH 7,6 ; shift word
1233 001370' 436 06 0 00 000007 ORM 6,7 ; merge with new byte
1234 001371' 367 05 0 00 001365' SOJG 5,.-4 ; loop on four bytes
1235 001372' 262 17 0 00 000006 RGET (6,5) ; restore AC's
1236
1237 001374' 263 17 0 00 000000 RTN ; return
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 31
DFPTAU MAC 6-Aug-83 09:31 Data Patterns SEQ 2102
1238
1239 ;#********************************************************************
1240 ;* PATPNT - Translate pattern number to description
1241 ;#********************************************************************
1242
1243 001375' 037 00 0 00 004000' PATPNT: TMSG <0 - Illegal> ; unused
1244 001376' 037 00 0 00 004003' TMSG <1 - zeros>
1245 001377' 037 00 0 00 004005' TMSG <2 - ones>
1246 001400' 037 00 0 00 004007' TMSG <3 - alternating 5252..>
1247 001401' 037 00 0 00 004014' TMSG <4 - alternating 2525..>
1248 001402' 037 00 0 00 004021' TMSG <5 - 0,,1>
1249 001403' 037 00 0 00 004023' TMSG <6 - 0,,2>
1250 001404' 037 00 0 00 004025' TMSG <7 - 0,,4>
1251 001405' 037 00 0 00 004027' TMSG <10 - 0,,10>
1252 001406' 037 00 0 00 004032' TMSG <11 - 0,,20>
1253 001407' 037 00 0 00 004035' TMSG <12 - 0,,40>
1254 001410' 037 00 0 00 004040' TMSG <13 - 0,,100>
1255 001411' 037 00 0 00 004043' TMSG <14 - 0,,200>
1256 001412' 037 00 0 00 004046' TMSG <15 - 0,,400>
1257 001413' 037 00 0 00 004051' TMSG <16 - 0,,1000>
1258 001414' 037 00 0 00 004054' TMSG <17 - 0,,2000>
1259 001415' 037 00 0 00 004057' TMSG <20 - 0,,4000>
1260 001416' 037 00 0 00 004062' TMSG <21 - 0,,10000>
1261 001417' 037 00 0 00 004065' TMSG <22 - 0,,20000>
1262 001420' 037 00 0 00 004070' TMSG <23 - 0,,40000>
1263 001421' 037 00 0 00 004073' TMSG <24 - 0,,100000>
1264 001422' 037 00 0 00 004076' TMSG <25 - 0,,200000>
1265 001423' 037 00 0 00 004101' TMSG <26 - 0,,400000>
1266 001424' 037 00 0 00 004104' TMSG <27 - 1,,0>
1267 001425' 037 00 0 00 004106' TMSG <30 - 2,,0>
1268 001426' 037 00 0 00 004110' TMSG <31 - 4,,0>
1269 001427' 037 00 0 00 004112' TMSG <32 - 10,,0>
1270 001430' 037 00 0 00 004115' TMSG <33 - 20,,0>
1271 001431' 037 00 0 00 004120' TMSG <34 - 40,,0>
1272 001432' 037 00 0 00 004123' TMSG <35 - 100,,0>
1273 001433' 037 00 0 00 004126' TMSG <36 - 200,,0>
1274 001434' 037 00 0 00 004131' TMSG <37 - 400,,0>
1275 001435' 037 00 0 00 004134' TMSG <40 - 1000,,0>
1276 001436' 037 00 0 00 004137' TMSG <41 - 2000,,0>
1277 001437' 037 00 0 00 004142' TMSG <42 - 4000,,0>
1278 001440' 037 00 0 00 004145' TMSG <43 - 10000,,0>
1279 001441' 037 00 0 00 004150' TMSG <44 - 20000,,0>
1280 001442' 037 00 0 00 004153' TMSG <45 - 40000,,0>
1281 001443' 037 00 0 00 004156' TMSG <46 - 100000,,0>
1282 001444' 037 00 0 00 004161' TMSG <47 - 200000,,0>
1283 001445' 037 00 0 00 004164' TMSG <50 - 400000,,0>
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 32
DFPTAU MAC 6-Aug-83 09:31 Data Patterns SEQ 2103
1284 001446' 037 00 0 00 004167' TMSG <51 - 777777,,777776>
1285 001447' 037 00 0 00 004173' TMSG <52 - 777777,,777775>
1286 001450' 037 00 0 00 004177' TMSG <53 - 777777,,777773>
1287 001451' 037 00 0 00 004203' TMSG <54 - 777777,,777767>
1288 001452' 037 00 0 00 004207' TMSG <55 - 777777,,777757>
1289 001453' 037 00 0 00 004213' TMSG <56 - 777777,,777737>
1290 001454' 037 00 0 00 004217' TMSG <57 - 777777,,777677>
1291 001455' 037 00 0 00 004223' TMSG <60 - 777777,,777577>
1292 001456' 037 00 0 00 004227' TMSG <61 - 777777,,777377>
1293 001457' 037 00 0 00 004233' TMSG <62 - 777777,,776777>
1294 001460' 037 00 0 00 004237' TMSG <63 - 777777,,775777>
1295 001461' 037 00 0 00 004243' TMSG <64 - 777777,,773777>
1296 001462' 037 00 0 00 004247' TMSG <65 - 777777,,767777>
1297 001463' 037 00 0 00 004253' TMSG <66 - 777777,,757777>
1298 001464' 037 00 0 00 004257' TMSG <67 - 777777,,737777>
1299 001465' 037 00 0 00 004263' TMSG <70 - 777777,,677777>
1300 001466' 037 00 0 00 004267' TMSG <71 - 777777,,577777>
1301 001467' 037 00 0 00 004273' TMSG <72 - 777777,,377777>
1302 001470' 037 00 0 00 004277' TMSG <73 - 777776,,777777>
1303 001471' 037 00 0 00 004303' TMSG <74 - 777775,,777777>
1304 001472' 037 00 0 00 004307' TMSG <75 - 777773,,777777>
1305 001473' 037 00 0 00 004313' TMSG <76 - 777767,,777777>
1306 001474' 037 00 0 00 004317' TMSG <77 - 777757,,777777>
1307 001475' 037 00 0 00 004323' TMSG <100 - 777737,,777777>
1308 001476' 037 00 0 00 004330' TMSG <101 - 777677,,777777>
1309 001477' 037 00 0 00 004335' TMSG <102 - 777577,,777777>
1310 001500' 037 00 0 00 004342' TMSG <103 - 777377,,777777>
1311 001501' 037 00 0 00 004347' TMSG <104 - 776777,,777777>
1312 001502' 037 00 0 00 004354' TMSG <105 - 775777,,777777>
1313 001503' 037 00 0 00 004361' TMSG <106 - 773777,,777777>
1314 001504' 037 00 0 00 004366' TMSG <107 - 767777,,777777>
1315 001505' 037 00 0 00 004373' TMSG <110 - 757777,,777777>
1316 001506' 037 00 0 00 004400' TMSG <111 - 737777,,777777>
1317 001507' 037 00 0 00 004405' TMSG <112 - 677777,,777777>
1318 001510' 037 00 0 00 004412' TMSG <113 - 577777,,777777>
1319 001511' 037 00 0 00 004417' TMSG <114 - 377777,,777777>
1320 001512' 037 00 0 00 004424' TMSG <115 - 400000,,1>
1321 001513' 037 00 0 00 004430' TMSG <116 - random numbers>
1322 001514' 037 00 0 00 004435' TMSG <117 - memory address pattern>
1323 001515' 037 00 0 00 004443' TMSG <120 - floating ones>
1324 001516' 037 00 0 00 004447' TMSG <121 - floating zeros>
1325 001517' 037 00 0 00 004454' TMSG <122 - count pattern in 8-bit bytes>
1326 001520' 037 00 0 00 004463' TMSG <123 - count pattern in 7-bit bytes>
1327 001521' 037 00 0 00 004472' TMSG <124 - count pattern in 6-bit bytes>
1328 001522' 037 00 0 00 004501' TMSG <125 - alternating 36-bit pattern>
1329 001523' 037 00 0 00 004510' TMSG <126 - opr select pattern>
1330 001524' 037 00 0 00 004515' TMSG <127 - 400000,,1>
1331
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 33
DFPTAU MAC 6-Aug-83 09:31 Switch Handling Routines SEQ 2104
1332 SUBTTL Switch Handling Routines
1333
1334 ;#********************************************************************
1335 ;* .SWCHP - Print switch settings in English
1336 ;#********************************************************************
1337
1338 001525' 261 17 0 00 000000 .SWCHP: RPUT (0,1,2,3,4) ; save AC's
1339
1340 001532' 037 01 0 00 004521' FMSGC <Switches: >
1341 001533' 403 02 0 00 000004 SETZB 2,4 ; init print, switch count AC's
1342 001534' 400 03 0 00 000000 SETZ 3, ; set up AC3 to point to
1343 001535' 661 03 0 00 400000 TLO 3,(1B0) ; the leftmost switch
1344 001536' 260 17 0 00 001564' GO SWITT ; get program switches
1345 001537' 037 13 0 00 000001 PNTHWF ; print in octal first
1346 001540' 037 01 0 00 003475' FMSG < >
1347 001541' 260 17 0 00 001564' GO SWITT ; get program switches
1348
1349 001542' 616 00 0 00 000003 .SWCH0: TDNN 3 ; this switch set?
1350 001543' 254 00 0 00 001552' JRST .SWCH1 ; no - continue
1351 001544' 271 04 0 00 000007 ADDI 4,7 ; 6 more characters printed
1352 001545' 303 04 0 00 000052 CAILE 4,^D42 ; print 42 characters yet?
1353 001546' 037 01 0 00 004524' FMSGC < > ; yes - continue on next line
1354 001547' 303 04 0 00 000052 CAILE 4,^D42 ; print 42 characters yet?
1355 001550' 201 04 0 00 000007 MOVEI 4,7 ; yes - reinit print counter
1356 XCT [FMSG <ABORT > ; 0
1357 FMSG <RSTART > ; 1
1358 FMSG <TOTALS > ; 2
1359 FMSG <NOPNT > ; 3
1360 FMSG <PNTLPT > ; 4
1361 FMSG <DING > ; 5
1362 FMSG <LOOPER > ; 6
1363 FMSG <ERSTOP > ; 7
1364 FMSG <PALERS > ; 8
1365 FMSG <RELIAB > ; 9
1366 FMSG <TXTINH > ; 10
1367 FMSG <PAGINH > ; 11
1368 FMSG <MODDVC > ; 12
1369 FMSG <CASINH > ; 13
1370 FMSG <OPRSEL > ; 14
1371 FMSG <CHAIN > ; 15
1372 FMSG <KA10 > ; 16
1373 JFCL
1374 FMSG <TRACE > ; 18
1375 FMSG <INHFLT > ; 19
1376 FMSG <INHMSG > ; 20
1377 FMSG <LOOPGM > ; 21
1378 FMSG <LOOPTS > ; 22
1379 FMSG <RUNALL > ; 23
1380 FMSG <DSPEAR > ; 24
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 34
DFPTAU MAC 6-Aug-83 09:31 Switch Handling Routines SEQ 2105
1381 1382 FMSG <UDEBUG > ; 25
1383 FMSG <MDEBUG > ; 26
1384 FMSG <SDEBUG > ; 27
1385 FMSG <LDEBUG > ; 28
1386 FMSG <IDEBUG > ; 29
1387 FMSG <NIPORT > ; 30
1388 FMSG <CIPORT > ; 31
1389 JFCL ; 32
1390 JFCL ; 33
1391 FMSG <MMPROC > ; 34
1392 001551' 256 00 0 02 004630' FMSG <MCBUS >](2) ; 35
1393 001552' 242 03 0 00 777777 .SWCH1: LSH 3,-1 ; right shift the switch pointer
1394 001553' 350 00 0 00 000002 AOS 2 ; increment text pointer
1395 001554' 326 03 0 00 001542' JUMPN 3,.SWCH0 ; done? no - continue
1396 001555' 037 01 0 00 030242 PCRLF
1397 001556' 262 17 0 00 000004 RGET (4,3,2,1,0) ; restore AC's
1398
1399 001563' 263 17 0 00 000000 RTN ; return
1400
1401
1402 ;#********************************************************************
1403 ;* SWITT - Get value of switches
1404 ;#********************************************************************
1405
1406 001564' 200 00 0 00 030046 SWITT: MOVE CONSW ; get switches
1407 001565' 336 00 0 00 030037 SKIPN USER ; user mode?
1408 001566' 037 10 0 00 000002 SWITCH ; no - get switches from KLDCP
1409 001567' 434 00 0 00 001571' IOR SWRGT ; insert addl right hand switches
1410 001570' 263 17 0 00 000000 RTN ; return
1411
1412 001571' 000000 000000 SWRGT: 0 ; right hand switches
1413
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 35
DFPTAU MAC 6-Aug-83 09:31 Switch Handling Routines SEQ 2106
1414
1415 ;#********************************************************************
1416 ;* .ISWT - Complete switch handling
1417 ;
1418 ; This routine will print out switches if desired, and then enter left
1419 ; hand switches (if user mode) and then enter right hand switches.
1420 ;
1421 ;#********************************************************************
1422
1423 ; Print program switches if desired
1424
1425 001572' 261 17 0 00 000000 .ISWT: RPUT (0,1) ; save AC's
1426
1427 001574' 260 17 0 00 001632' GO .SWPNT ; print switches if desired
1428
1429 ; Now look at switches and determine if we should enter them
1430
1431 001575' 260 17 0 00 001564' .ISWT2: GO SWITT ; get switches
1432 001576' 202 00 0 00 006127' MOVEM SAVSWW# ; save switches
1433 001577' 202 00 0 00 006111' MOVEM CONSWW# ; save in work location
1434 001600' 037 01 0 00 004674' FMSGC <Switches = >
1435 001601' 037 13 0 00 000001 PNTHWF
1436 001602' 037 01 0 00 030242 PCRLF
1437 001603' 476 00 0 00 006132' SETOM SWPSWW# ; set switches printed flag
1438 001604' 336 00 0 00 030037 SKIPN USER ; user mode?
1439 001605' 254 00 0 00 001607' JRST .ISWT7 ; no - don't ask for left hand switches
1440
1441 ; Now input the switches
1442
1443 001606' 260 17 0 00 001643' .ISWT6: GO .SLEFT ; get left hand switches
1444
1445 ; Now get right hand switches
1446
1447 001607' 332 00 0 00 030037 .ISWT7: SKIPE USER ; user mode?
1448 001610' 254 00 0 00 001613' JRST .ISWTB ; yes - go ask for them
1449
1450 ; In exec mode get switches which may have been entered already
1451
1452 001611' 260 17 0 00 001564' .ISWT8: GO SWITT ; get switches
1453 001612' 202 00 0 00 006111' MOVEM CONSWW ; save switches
1454
1455 ; Now input the switches
1456
1457 001613' 260 17 0 00 001744' .ISWTB: GO .SRIGT ; go get right hand switches
1458
1459 ; Now ensure right hand switches are saved and print out new switches
1460 ; if they changed.
1461
1462 001614' 200 00 0 00 006111' .ISWTX: MOVE CONSWW ; get switches
1463 001615' 552 00 0 00 001571' HRRZM SWRGT ; make sure right half is saved away
1464 001616' 202 00 0 00 030046 MOVEM CONSW ; save in real switches location also
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 36
DFPTAU MAC 6-Aug-83 09:31 Switch Handling Routines SEQ 2107
1465 001617' 260 17 0 00 001564' GO SWITT ; get switches
1466 001620' 312 00 0 00 006127' CAME SAVSWW ; same as original switches?
1467 001621' 254 00 0 00 001624' JRST .ISWTY ; no - go print them out
1468 001622' 332 00 0 00 006132' SKIPE SWPSWW# ; switches already printed?
1469 001623' 254 00 0 00 001627' JRST .ISWTZ ; yes - don't print them
1470 001624' 037 01 0 00 004677' .ISWTY: FMSGC <SWITCHES = >
1471 001625' 037 13 0 00 000001 PNTHWF
1472 001626' 037 01 0 00 030242 PCRLF
1473 001627' 262 17 0 00 000001 .ISWTZ: RGET (1,0) ; done with switch handling
1474
1475 001631' 263 17 0 00 000000 RTN ; return
1476
1477 ; Print switches available
1478
1479 001632' 037 01 0 00 000026 .SWPNT: PFORCE ; handle Control-O
1480 001633' 200 00 0 00 004712' MOVE [FMSGC <Print the selectable pgm switches?>]
1481 001634' 260 17 0 00 000061' GO TTYYES ; go get response
1482 001635' 263 17 0 00 000000 RTN ; no - return
1483 001636' 037 00 1 00 001640' PNTMSG @.SWTXT ; yes - print it
1484 001637' 263 17 0 00 000000 RTN ; return
1485
1486 001640' .SWTXT: [ASCII /
1487 ----Left Side Switches-------- ----Right Side Switches--------
1488
1489 SW KL10 11 Function SW Value Function
1490 -- ---- ---- -------- -- ----- --------
1491 0 400000 100000 Abort 18 400000 Program trace
1492 1 200000 040000 Restart 19 200000 Inhibit fault isolation
1493 2 100000 020000 Totals 20 100000 Inhibit error messages
1494 001640' 000000 004713' 3 040000 010000 No print 21 040000 Loop on program /]
1495 [ASCII /
1496 4 020000 004000 Print on LPT 22 020000 Loop on test
1497 5 010000 002000 Ding bell on err 23 010000 Run all test segments
1498 6 004000 001000 Loop on error 24 004000 Disable SPEAR reporting
1499 7 002000 000400 Halt on error 25 002000 User mode debug
1500 8 001000 000200 Print all errors 26 001000 Error message debug
1501 001641' 000000 005047' 9 000400 000100 Reliability mode 27 000400 Test debug /]
1502 [ASCIZ /
1503 10 000200 000040 Text inhibit 28 000200 Load microcode debug
1504 11 000100 000020 Inhibit paging 29 000100 Fault isolation debug
1505 12 000040 000010 Mod device codes 30 000040 NI port
1506 13 000020 000004 Inhibit cache 31 000020 CI port
1507 14 000010 000002 Operator select 34 000002 Missing MPROC module
1508 15 000004 000001 Chain.. (DIAMON) 35 000001 Missing CBUS module
1509 16 000002 KA10 50 Hertz
1510 001642' 000000 005172' /]
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 37
DFPTAU MAC 6-Aug-83 09:31 Switch Handling Routines SEQ 2108
1511
1512 ;#********************************************************************
1513 ;* .SLEFT - Input left hand switches
1514 ;#********************************************************************
1515
1516 001643' 261 17 0 00 000000 .SLEFT: RPUT (0,1,2,3,4,5,6) ; save AC's
1517
1518
1519 001652' 554 00 0 00 006111' .SLF1: HLRZ CONSWW ; print out left hand switches as
1520 001653' 037 01 0 00 030242 PCRLF ; they currently are
1521 001654' 037 17 0 00 000003 PNTOCF
1522 001655' 037 01 0 00 005323' FMSG < LH Switches <# or ?> - >
1523 001656' 260 17 0 00 002055' GO .SWIN ; go input switches
1524 001657' 254 00 0 00 001663' JRST .SLF2 ; typed a ?
1525 001660' 254 00 0 00 001652' JRST .SLF1 ; error - re-ask question
1526 001661' 506 01 0 00 006111' HRLM 1,CONSWW ; save left hand switches
1527 001662' 254 00 0 00 001734' JRST .SLFX ; exit
1528
1529 001663' 037 01 0 00 030242 .SLF2: PCRLF
1530 001664' 037 01 0 00 005331' PNTMSF [ASCIZ /Type Y,N,^,CR,^Z/]
1531 001665' 037 01 0 00 030243 PCRL2F
1532 001666' 201 05 0 00 000001 MOVEI 5,1 ; init pointer to switch to ask
1533 001667' 275 05 0 00 000002 .SLF3: SUBI 5,2 ; back up
1534 001670' 350 00 0 00 000005 .SLF4: AOS 5 ; forward
1535 001671' 335 00 0 00 000005 SKIPGE 5 ; backed up too much?
1536 001672' 400 05 0 00 000000 SETZ 5, ; yes - init pointer to first switch
1537 001673' 303 05 0 00 000015 CAILE 5,^D13 ; reach end yet?
1538 001674' 254 00 0 00 001734' JRST .SLFX ; yes - exit
1539
1540 001675' 200 04 0 05 002116' .SLF5: MOVE 4,.LSWTN(5) ; get proper bit in AC4
1541 001676' 200 00 0 00 006111' MOVE CONSWW ; get switches
1542 001677' 616 00 0 00 000004 TDNN 4
1543 001700' 037 01 0 00 005335' FMSG <N >
1544 001701' 612 00 0 00 000004 TDNE 4
1545 001702' 037 01 0 00 005336' FMSG <Y >
1546 001703' 200 00 0 05 002100' MOVE .LSWIT(5) ; get SIXBIT switch name
1547 001704' 037 01 0 00 000002 PNTSXF ; print it
1548 001705' 037 00 0 00 005337' TMSG < - >
1549 001706' 037 11 0 00 000003 TTYINP
1550 001707' 306 00 0 00 000015 CAIN 15 ; carraige return?
1551 001710' 260 17 0 00 000045' GO CLRBUF ; clear input buffer
1552 001711' 306 00 0 00 000015 CAIN 15 ; carraige return?
1553 001712' 254 00 0 00 001670' JRST .SLF4 ; yes - next switch
1554 001713' 037 01 0 00 030242 PCRLF
1555 001714' 306 00 0 00 000032 CAIN 32 ; Control-Z?
1556 001715' 254 00 0 00 001734' JRST .SLFX ; yes - exit
1557 001716' 306 00 0 00 000136 CAIN 136 ; ^ back up?
1558 001717' 254 00 0 00 001667' JRST .SLF3 ; yes - go back up
1559 001720' 306 00 0 00 000131 CAIN "Y" ; Y?
1560 001721' 254 00 0 00 001730' JRST .SLF6 ; yes - set switch
1561 001722' 302 00 0 00 000116 CAIE "N" ; N?
1562 001723' 254 00 0 00 001675' JRST .SLF5 ; no - unrecognizable - reask question
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 38
DFPTAU MAC 6-Aug-83 09:31 Switch Handling Routines SEQ 2109
1563 001724' 200 00 0 00 006111' MOVE CONSWW ; get switches
1564 001725' 412 00 0 00 000004 ANDCAM 4 ; clear switch
1565 001726' 202 00 0 00 006111' MOVEM CONSWW ; save switches
1566 001727' 254 00 0 00 001670' JRST .SLF4 ; continue
1567 001730' 200 00 0 00 006111' .SLF6: MOVE CONSWW ; get switches
1568 001731' 434 00 0 00 000004 IOR 4 ; set switch
1569 001732' 202 00 0 00 006111' MOVEM CONSWW ; save switches
1570 001733' 254 00 0 00 001670' JRST .SLF4 ; continue
1571
1572 001734' 262 17 0 00 000006 .SLFX: RGET (6,5,4,3,2,1,0) ; restore AC's
1573
1574 001743' 263 17 0 00 000000 RTN ; return
1575
1576
1577 ;#********************************************************************
1578 ;* .SRIGT - Enter right hand switches
1579 ;#********************************************************************
1580
1581 001744' 261 17 0 00 000000 .SRIGT: RPUT (0,1,2,3,4,5,6) ; save AC's
1582
1583
1584 001753' 550 00 0 00 006111' .SRG2: HRRZ CONSWW ; print out right hand switches as
1585 001754' 037 01 0 00 030242 PCRLF ; they currently are
1586 001755' 037 17 0 00 000003 PNTOCF
1587 001756' 037 01 0 00 005340' FMSG < RH Switches <# or ?> - >
1588 001757' 260 17 0 00 002055' GO .SWIN ; go input switches
1589 001760' 254 00 0 00 001764' JRST .SRG3 ; typed a ?
1590 001761' 254 00 0 00 001753' JRST .SRG2 ; error - re-ask question
1591 001762' 542 01 0 00 006111' HRRM 1,CONSWW ; save right hand switches
1592 001763' 254 00 0 00 002045' JRST .SRGX ; exit this switch handling
1593
1594 001764' 037 01 0 00 005331' .SRG3: PNTMSF [ASCIZ /Type Y,N,^,CR,^Z/]
1595 001765' 037 01 0 00 030243 PCRL2F
1596 001766' 201 05 0 00 000001 MOVEI 5,1 ; init pointer to switch to ask
1597 001767' 275 05 0 00 000002 .SRG4: SUBI 5,2 ; back up
1598 001770' 350 00 0 00 000005 .SRG5: AOS 5 ; forward
1599 001771' 335 00 0 00 000005 SKIPGE 5 ; backed up too much?
1600 001772' 400 05 0 00 000000 SETZ 5, ; yes - init pointer to first switch
1601 001773' 303 05 0 00 000021 CAILE 5,^D17 ; reach end yet?
1602 001774' 254 00 0 00 002045' JRST .SRGX ; yes
1603 001775' 336 00 0 05 002134' SKIPN .RSWIT(5) ; switch zero?
1604 001776' 254 00 0 00 001770' JRST .SRG5 ; yes - go handle next one
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 39
DFPTAU MAC 6-Aug-83 09:31 Switch Handling Routines SEQ 2110
1605
1606 001777' 201 04 0 00 400000 .SRG6: MOVEI 4,400000 ; get a bit set in AC4
1607 002000' 210 06 0 00 000005 MOVN 6,5 ; negate for shifting
1608 002001' 242 04 0 06 000000 LSH 4,(6) ; shift over properly
1609 002002' 200 00 0 00 006111' MOVE CONSWW ; get switches
1610 002003' 616 00 0 00 000004 TDNN 4
1611 002004' 037 01 0 00 005335' FMSG <N >
1612 002005' 612 00 0 00 000004 TDNE 4
1613 002006' 037 01 0 00 005336' FMSG <Y >
1614 002007' 200 00 0 05 002134' MOVE .RSWIT(5) ; get SIXBIT switch name
1615 002010' 037 01 0 00 000002 PNTSXF ; print it
1616 002011' 037 00 0 00 005337' TMSG < - >
1617 002012' 037 11 0 00 000003 TTYINP
1618 002013' 306 00 0 00 000015 CAIN 15 ; carraige return?
1619 002014' 260 17 0 00 000045' GO CLRBUF ; clear input buffer
1620 002015' 306 00 0 00 000015 CAIN 15 ; carraige return?
1621 002016' 254 00 0 00 001770' JRST .SRG5 ; yes - next switch
1622 002017' 037 01 0 00 030242 PCRLF
1623 002020' 306 00 0 00 000032 CAIN 32 ; Control-Z?
1624 002021' 254 00 0 00 002045' JRST .SRGX ; yes - exit
1625 002022' 302 00 0 00 000136 CAIE 136 ; ^ back up?
1626 002023' 254 00 0 00 002031' JRST .SRG6B ; no - continue
1627 002024' 322 05 0 00 001777' JUMPE 5,.SRG6 ; at first switch? - yes - reask
1628 002025' 370 00 0 00 000005 .SRG6A: SOS 5 ; decrement switch
1629 002026' 336 00 0 05 002134' SKIPN .RSWIT(5) ; this switch exists?
1630 002027' 254 00 0 00 002025' JRST .SRG6A ; no - try previous one
1631 002030' 254 00 0 00 001777' JRST .SRG6 ; yes - now continue
1632
1633 002031' 306 00 0 00 000131 .SRG6B: CAIN "Y" ; Y?
1634 002032' 254 00 0 00 002041' JRST .SRG7 ; yes - set switch
1635 002033' 302 00 0 00 000116 CAIE "N" ; N?
1636 002034' 254 00 0 00 001777' JRST .SRG6 ; no - unrecognizable - reask question
1637 002035' 200 00 0 00 006111' MOVE CONSWW ; get switches
1638 002036' 620 00 0 04 000000 TRZ (4) ; clear switch
1639 002037' 202 00 0 00 006111' MOVEM CONSWW ; save switches
1640 002040' 254 00 0 00 001770' JRST .SRG5 ; continue
1641 002041' 200 00 0 00 006111' .SRG7: MOVE CONSWW ; get switches
1642 002042' 660 00 0 04 000000 TRO (4) ; set switch
1643 002043' 202 00 0 00 006111' MOVEM CONSWW ; save switches
1644 002044' 254 00 0 00 001770' JRST .SRG5 ; continue
1645
1646 002045' 262 17 0 00 000006 .SRGX: RGET (6,5,4,3,2,1,0) ; restore AC's
1647
1648 002054' 263 17 0 00 000000 RTN ; return
1649
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 40
DFPTAU MAC 6-Aug-83 09:31 Switch Handling Routines SEQ 2111
1650
1651 ;#********************************************************************
1652 ; .SWIN - Input switches (either as # or ?)
1653 ;
1654 ; Return +1 - ? typed
1655 ; +2 - error
1656 ; +3 - # typed (in AC1)
1657 ; +4 - no change
1658 ;#********************************************************************
1659
1660 002055' 037 11 0 00 000003 .SWIN: TTYINP ; get image mode character
1661 002056' 306 00 0 00 000015 CAIN 15 ; CR typed?
1662 PJRST [GO CLRBUF ; clear input buffer
1663 AOS (P) ; increment return
1664 AOS (P) ; increment return
1665 AOS (P) ; increment return
1666 PCRLF
1667 002057' 254 00 0 00 005346' RTN]
1668 002060' 306 00 0 00 000077 CAIN "?" ; ? typed?
1669 PJRST [PCRL2F ; yes - exit
1670 002061' 254 00 0 00 005354' RTN]
1671 002062' 400 01 0 00 000000 SETZ 1, ; clear number for starters
1672 002063' 301 00 0 00 000060 .SWIN0: CAIL "0" ; number typed is in a valid
1673 002064' 303 00 0 00 000067 CAILE "7" ; range?
1674 PJRST [AOS (P) ; no - error return
1675 PCRLF
1676 002065' 254 00 0 00 005351' RTN]
1677 002066' 275 00 0 00 000060 SUBI 60 ; normalize to 0..7
1678 002067' 242 01 0 00 000003 LSH 1,3 ; shift over current copy of number
1679 002070' 270 01 0 00 000000 ADD 1,0 ; add in new digit
1680 002071' 037 11 0 00 000003 TTYINP ; get a new character
1681 002072' 302 00 0 00 000015 CAIE 15 ; carraige return?
1682 002073' 254 00 0 00 002063' JRST .SWIN0 ; no - go decode as a digit
1683 002074' 260 17 0 00 000045' GO CLRBUF ; clear out extra
1684 002075' 350 00 0 17 000000 AOS (P) ; set up return+2
1685 002076' 350 00 0 17 000000 AOS (P)
1686 002077' 263 17 0 00 000000 RTN ; return
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 41
DFPTAU MAC 6-Aug-83 09:31 Switch Handling Routines SEQ 2112
1687
1688 ;#********************************************************************
1689 ; .LSWIT - Table of left hand switch names
1690 ;#********************************************************************
1691
1692 002100' 41 42 57 62 64 00 .LSWIT: SIXBIT /ABORT /
1693 002101' 62 63 64 41 62 64 SIXBIT /RSTART/
1694 002102' 64 57 64 41 54 63 SIXBIT /TOTALS/
1695 002103' 56 57 60 56 64 00 SIXBIT /NOPNT /
1696 002104' 60 56 64 54 60 64 SIXBIT /PNTLPT/
1697 002105' 44 51 56 47 00 00 SIXBIT /DING /
1698 002106' 54 57 57 60 45 62 SIXBIT /LOOPER/
1699 002107' 45 62 63 64 57 60 SIXBIT /ERSTOP/
1700 002110' 60 41 54 45 62 63 SIXBIT /PALERS/
1701 002111' 62 45 54 51 41 42 SIXBIT /RELIAB/
1702 002112' 64 70 64 51 56 50 SIXBIT /TXTINH/
1703 002113' 55 57 44 44 66 43 SIXBIT /MODDVC/
1704 002114' 57 60 62 63 45 54 SIXBIT /OPRSEL/
1705 002115' 43 50 41 51 56 00 SIXBIT /CHAIN /
1706
1707 002116' 400000 000000 .LSWTN: 400000,,0 ; ABORT
1708 002117' 200000 000000 200000,,0 ; RSTART
1709 002120' 100000 000000 100000,,0 ; TOTALS
1710 002121' 040000 000000 040000,,0 ; NOPNT
1711 002122' 020000 000000 020000,,0 ; PNTLPT
1712 002123' 010000 000000 010000,,0 ; DING
1713 002124' 004000 000000 004000,,0 ; LOOPER
1714 002125' 002000 000000 002000,,0 ; ERSTOP
1715 002126' 001000 000000 001000,,0 ; PALERS
1716 002127' 000400 000000 000400,,0 ; RELIAB
1717 002130' 000200 000000 000200,,0 ; TXTINH
1718 002131' 000040 000000 000040,,0 ; MODDVC
1719 002132' 000010 000000 000010,,0 ; OPRSEL
1720 002133' 000004 000000 000004,,0 ; CHAIN
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 42
DFPTAU MAC 6-Aug-83 09:31 Switch Handling Routines SEQ 2113
1721
1722 ;#********************************************************************
1723 ; .RSWIT - Table of right hand switch names
1724 ;#********************************************************************
1725
1726 ; Here is the switch prompt table of SIXBIT switch names to use
1727
1728 002134' 64 62 41 43 45 00 .RSWIT: SIXBIT /TRACE/ ; switch 18
1729 002135' 51 56 50 46 54 64 SIXBIT /INHFLT/ ; switch 19
1730 002136' 51 56 50 55 63 47 SIXBIT /INHMSG/ ; switch 20
1731 002137' 54 57 57 60 47 55 SIXBIT /LOOPGM/ ; switch 21
1732 002140' 54 57 57 60 64 63 SIXBIT /LOOPTS/ ; switch 22
1733 002141' 62 65 56 41 54 54 SIXBIT /RUNALL/ ; switch 23
1734 002142' 44 63 60 45 41 62 SIXBIT /DSPEAR/ ; switch 24
1735 002143' 65 44 45 42 65 47 SIXBIT /UDEBUG/ ; switch 25
1736 002144' 55 44 45 42 65 47 SIXBIT /MDEBUG/ ; switch 26
1737 002145' 63 44 45 42 65 47 SIXBIT /SDEBUG/ ; switch 27
1738 002146' 54 44 45 42 65 47 SIXBIT /LDEBUG/ ; switch 28
1739 002147' 51 44 45 42 65 47 SIXBIT /IDEBUG/ ; switch 29
1740 002150' 56 51 60 57 62 64 SIXBIT /NIPORT/ ; switch 30
1741 002151' 43 51 60 57 62 64 SIXBIT /CIPORT/ ; switch 31
1742 002152' 65 56 65 63 45 44 SIXBIT /UNUSED/ ; switch 32
1743 002153' 65 56 65 63 45 44 SIXBIT /UNUSED/ ; switch 33
1744 002154' 55 55 60 62 57 43 SIXBIT /MMPROC/ ; switch 34
1745 002155' 55 43 42 65 63 00 SIXBIT /MCBUS/ ; switch 35
1746
1747
1748 ;#*********************************************************************
1749 ;* SWCHPT - Prints current state of switches
1750 ;#*********************************************************************
1751
1752 002156' 261 17 0 00 000000 SWCHPT: PUT 0
1753 002157' 037 00 0 00 005356' TMSG <Switches - >
1754 002160' 200 00 0 00 030046 MOVE CONSW
1755 002161' 037 13 0 00 000001 PNTHWF
1756 002162' 037 00 0 00 005361' TMSGC <>
1757 002163' 262 17 0 00 000000 GET 0
1758 002164' 263 17 0 00 000000 RTN
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 43
DFPTAU MAC 6-Aug-83 09:31 Switch Handling Routines SEQ 2114
1759
1760 ;#********************************************************************
1761 ;* SWCOM - Switch complement routine (AC1 has switch command number 0-n)
1762 ;#********************************************************************
1763
1764 002165' 261 17 0 00 000000 SWCOM: RPUT (0,1,2) ; save AC's
1765
1766 002170' 200 02 0 01 002255' MOVE 2,SWCOMP(1) ; get text
1767 002171' 200 01 0 01 002224' MOVE 1,SWCOMT(1) ; get switch in octal
1768 002172' 336 00 0 00 030037 SKIPN USER ; user mode?
1769 002173' 607 01 0 00 777777 TLNN 1,777777 ; no - left hand switch set?
1770 002174' 254 00 0 00 002204' JRST SWCOM0 ; no - continue
1771
1772 ; Cannot complement
1773
1774 002175' 037 01 0 00 005362' FMSGC <[Alter >
1775 002176' 256 00 0 00 000002 XCT 2
1776 002177' 037 01 0 00 005364' FMSG < with PDP11 Switch >
1777 002200' 200 01 0 17 777777 MOVE 1,-1(P) ; get switch number
1778 XCT [FMSG <12> ; print it
1779 FMSG <11>
1780 FMSG <10>
1781 FMSG <9>
1782 FMSG <8>
1783 FMSG <7>
1784 FMSG <6>
1785 FMSG <5>
1786 002201' 256 00 0 01 005401' FMSG <1>](1)
1787 002202' 037 01 0 00 005412' FMSGD < only]>
1788 002203' 254 00 0 00 002220' JRST SWCOMX ; exit
1789
1790 ; Ok to complement
1791
1792 002204' 260 17 0 00 001564' SWCOM0: GO SWITT ; get switches
1793 002205' 430 00 0 00 000001 XOR 1 ; complement as specified
1794 002206' 202 00 0 00 030046 MOVEM CONSW ; save switches
1795 002207' 552 00 0 00 001571' HRRZM SWRGT ; save right hand switches
1796 002210' 037 01 0 00 005414' FMSGC <[>
1797 002211' 256 00 0 00 000002 XCT 2 ; print text
1798 002212' 260 17 0 00 001564' GO SWITT ; get switches
1799 002213' 404 00 0 00 000001 AND 1 ; get only this switch
1800 002214' 332 00 0 00 000000 SKIPE ; did it get set?
1801 002215' 037 01 0 00 005415' FMSGD < On]> ; yes
1802 002216' 336 00 0 00 000000 SKIPN ; did it get set?
1803 002217' 037 01 0 00 005417' FMSGD < Off]> ; no
1804 002220' 262 17 0 00 000002 SWCOMX: RGET (2,1,0) ; restore AC's
1805
1806 002223' 263 17 0 00 000000 RTN ; continue
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 44
DFPTAU MAC 6-Aug-83 09:31 Switch Handling Routines SEQ 2115
1807
1808 ; Switches in octal
1809
1810 002224' 040000 000000 SWCOMT: 040000,,0 ; NOPNT
1811 002225' 020000 000000 020000,,0 ; PNTLPT
1812 002226' 010000 000000 010000,,0 ; DING
1813 002227' 004000 000000 004000,,0 ; LOOPER
1814 002230' 002000 000000 002000,,0 ; ERSTOP
1815 002231' 001000 000000 001000,,0 ; PALERS
1816 002232' 000400 000000 000400,,0 ; RELIAB
1817 002233' 000200 000000 000200,,0 ; TXTINH
1818 002234' 000010 000000 000010,,0 ; OPRSEL
1819 002235' 000000 400000 0,,400000 ; TRACE
1820 002236' 000000 200000 0,,200000 ; INHFLT
1821 002237' 000000 100000 0,,100000 ; INHMSG
1822 002240' 000000 040000 0,,040000 ; LOOPGM
1823 002241' 000000 020000 0,,020000 ; LOOPTS
1824 002242' 000000 010000 0,,010000 ; RUNALL
1825 002243' 000000 004000 0,,004000 ; DSPEAR
1826 002244' 000000 002000 0,,002000 ; UDEBUG
1827 002245' 000000 001000 0,,001000 ; MDEBUG
1828 002246' 000000 000400 0,,000400 ; SDEBUG
1829 002247' 000000 000200 0,,000200 ; LDEBUG
1830 002250' 000000 000100 0,,000100 ; IDEBUG
1831 002251' 000000 000040 0,,000040 ; NIPORT
1832 002252' 000000 000020 0,,000020 ; CIPORT
1833 002253' 000000 000002 0,,000002 ; MMPROC
1834 002254' 000000 000001 0,,000001 ; MCBUS
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 45
DFPTAU MAC 6-Aug-83 09:31 Switch Handling Routines SEQ 2116
1835
1836 ; Switch text
1837
1838 002255' 037 01 0 00 005421' SWCOMP: FMSG <NOPNT>
1839 002256' 037 01 0 00 005423' FMSG <PNTLPT>
1840 002257' 037 01 0 00 005425' FMSG <DING>
1841 002260' 037 01 0 00 005426' FMSG <LOOPER>
1842 002261' 037 01 0 00 005430' FMSG <ERSTOP>
1843 002262' 037 01 0 00 005432' FMSG <PALERS>
1844 002263' 037 01 0 00 005434' FMSG <RELIAB>
1845 002264' 037 01 0 00 005436' FMSG <TXTINH>
1846 002265' 037 01 0 00 005440' FMSG <OPRSEL>
1847 002266' 037 01 0 00 005442' FMSG <TRACE>
1848 002267' 037 01 0 00 005444' FMSG <INHFLT>
1849 002270' 037 01 0 00 005446' FMSG <INHMSG>
1850 002271' 037 01 0 00 005450' FMSG <LOOPGM>
1851 002272' 037 01 0 00 005452' FMSG <LOOPTS>
1852 002273' 037 01 0 00 005454' FMSG <RUNALL>
1853 002274' 037 01 0 00 005456' FMSG <DSPEAR>
1854 002275' 037 01 0 00 005460' FMSG <UDEBUG>
1855 002276' 037 01 0 00 005462' FMSG <MDEBUG>
1856 002277' 037 01 0 00 005464' FMSG <SDEBUG>
1857 002300' 037 01 0 00 005466' FMSG <LDEBUG>
1858 002301' 037 01 0 00 005470' FMSG <IDEBUG>
1859 002302' 037 01 0 00 005472' FMSG <NIPORT>
1860 002303' 037 01 0 00 005474' FMSG <CIPORT>
1861 002304' 037 01 0 00 005476' FMSG <MMPROC>
1862 002305' 037 01 0 00 005500' FMSG <MCBUS>
1863
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 46
DFPTAU MAC 6-Aug-83 09:31 Miscellaneous Routines SEQ 2117
1864 SUBTTL Miscellaneous Routines
1865
1866 ;#********************************************************************
1867 ;* PARSER - Additional CPU parity error service
1868 ;
1869 ; This routine is called by the subroutine package automatically when the
1870 ; processor is interrupted with a memory parity error. It furnishes some
1871 ; additional useful information. (A) IPA status (B) Channel status. If
1872 ; running on a KL10 in exec mode, and the parity error occurs not in the
1873 ; program area but the data buffer, the error will be cleared and the
1874 ; diagnostic will be forced to loop on the error.
1875 ;#********************************************************************
1876
1877 002306' 332 00 0 00 030037 PARSER: SKIPE USER ; user mode?
1878 002307' 260 17 0 00 000000* GO FFF ; yes - fatal error
1879 002310' 261 17 0 00 000000 RPUT (0,1) ; save AC's
1880
1881 002312' 402 00 0 00 000001 SETZM 1
1882 002313' 260 17 0 00 000000* GO RDCSR ; read CSR register
1883 002314' 255 00 0 00 000000 JFCL ; error return
1884 002315' 037 01 0 00 005502' FMSGC <************* Memory Parity Error Occurred *************>
1885 002316' 037 01 0 00 005516' FMSGC <CSR: >
1886 002317' 200 00 0 00 000001 MOVE 1
1887 002320' 037 13 0 00 000001 PNTHWF
1888 002321' 260 17 0 00 000000* GO GETLOG ; get logout area for channel
1889 002322' 260 17 0 00 000000* GO LOGPNT ; print logout data
1890 002323' 336 00 0 00 030041 SKIPN KLFLG ; KL-PROCESSOR?
1891 002324' 260 17 0 00 002307* GO FFF ; no - fatal error
1892 002325' 255 00 0 00 000000 JFCL ; yes
1893 002326' 256 00 0 00 005520' XCT [700400,,0] ; read error addr register
1894 002327' 404 00 0 00 005521' AND 0,[17,777777] ; save 22 bit address
1895 002330' 202 00 0 00 006137' MOVEM XYZ# ; save
1896 002331' 311 00 1 00 006110' CAML 0,@ABUFF# ; in buffer area
1897 002332' 254 00 0 00 002335' JRST CORECT ; yes. we can continue
1898 002333' 037 01 0 00 005522' FMSGCD <Error not in data buffer area, cannot continue>
1899 002334' 260 17 0 00 002324* GO FFF ; fatal out
1900
1901 002335' 037 01 0 00 005535' CORECT: FMSGCD <Error is in the data buffer, diag will continue>
1902 002336' 256 00 0 00 005550' XCT [700240,,0] ; CONI APR
1903 002337' 554 00 0 00 000000 HLRZ 0,0 ; swaps flags to right
1904 002340' 435 00 0 00 000001 IORI 0,1 ; include PI channel
1905 002341' 405 00 0 00 007777 ANDI 0,7777 ; save FLAGS and PI
1906 002342' 434 00 0 00 005551' IOR 0,[700200,,120000] ; clr and re-enable
1907 002343' 256 00 0 00 000000 XCT 0 ; does the CONO
1908 002344' 256 00 0 00 005550' XCT [700240,,0] ; another CONI
1909 002345' 262 17 0 00 000001 GET 1
1910 002346' 262 17 0 00 000000 GET 0
1911 002347' 254 12 1 00 030104 JEN @ITRCH1 ; dismiss the interrupt
1912
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 47
DFPTAU MAC 6-Aug-83 09:31 Miscellaneous Routines SEQ 2118
1913
1914 ;#********************************************************************
1915 ;* .COMM - Match a command entered against a command table.
1916 ;
1917 ; Handle erroneous input by returning to re-ask question.
1918 ;
1919 ; Arguments: AC1 - Contains the SIXBIT command entered
1920 ; AC2 - Contains address of command table
1921 ;
1922 ; Returns: RTN+1 - Return error address (for re-asking question)
1923 ; RTN+2 - Valid command recognized, offset in command
1924 ; table is returned in AC1
1925 ;
1926 ;#********************************************************************
1927
1928 002350' 261 17 0 00 000000 .COMM: RPUT (0,2,3) ; save some AC's
1929
1930 002353' 202 01 0 00 002375' MOVEM 1,.CTYP ; save command typed
1931
1932 ; Now look through each command
1933
1934 002354' 474 03 0 00 000000 SETO 3, ; init test check pointer
1935 002355' 350 00 0 00 000003 .COMM0: AOS 3 ; point to next command
1936 002356' 260 17 0 00 002401' GO .COMM2 ; see if this is the test selected
1937 002357' 254 00 0 00 002355' JRST .COMM0 ; no - try next command
1938 002360' 254 00 0 00 002365' JRST .COMM1 ; yes - go handle
1939
1940 ; Error exit
1941
1942 002361' 262 17 0 00 000003 RGET (3,2,0) ; restore AC's
1943
1944 002364' 263 17 0 00 000000 RTN ; return + 1 (error)
1945
1946 ; Found a valid command
1947
1948 002365' 202 03 0 00 002374' .COMM1: MOVEM 3,.CGOT ; save command number
1949 002366' 202 03 0 00 000001 MOVEM 3,1 ; put into AC1
1950 002367' 262 17 0 00 000003 RGET (3,2,0) ; restore AC's
1951
1952 002372' 350 00 0 17 000000 AOS (P) ; set up return + 2 (valid return)
1953 002373' 263 17 0 00 000000 RTN
1954
1955 ; Storage areas
1956
1957 002374' 000000 000000 .CGOT: 0 ; command number
1958
1959 002375' 000000 000000 .CTYP: 0 ; command typed (SIXBIT)
1960 002376' 000000 000000 0
1961
1962 002377' 000000 000000 .CTBL: 0 ; command to compare
1963 002400' 000000 000000 0
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 48
DFPTAU MAC 6-Aug-83 09:31 Miscellaneous Routines SEQ 2119
1964
1965 ;#********************************************************************
1966 ;* .COMM2 - Compare command typed to table to see if valid
1967 ;
1968 ; AC2 - Contains address of sixbit command table
1969 ; AC3 - Contains current command number (0..)
1970 ;#********************************************************************
1971
1972 002401' 261 17 0 00 000000 .COMM2: RPUT (0,1,2,3) ; save AC's
1973
1974 002405' 270 02 0 00 000003 ADD 2,3 ; calculate address of entry to compare
1975 002406' 200 00 0 02 000000 MOVE (2) ; get cmd table entry
1976 002407' 322 00 0 00 002436' JUMPE .COMM6 ; reached end of table? - yes - exit
1977 002410' 202 00 0 00 002377' MOVEM .CTBL ; save cmd table entry
1978 002411' 200 02 0 00 005552' MOVE 2,[POINT 6,.CTYP,5] ; set up byte pointers
1979 002412' 200 03 0 00 005553' MOVE 3,[POINT 6,.CTBL,5] ; ...
1980 002413' 135 00 0 00 000002 .COMM3: LDB 0,2 ; get character of typed
1981 002414' 135 01 0 00 000003 LDB 1,3 ; get character of table
1982 002415' 322 00 0 00 002423' JUMPE .COMM4 ; end of typed? yes - done
1983 002416' 312 00 0 00 000001 CAME 1 ; no - same as table?
1984 002417' 254 00 0 00 002431' JRST .COMM5 ; no - no match - exit
1985 002420' 133 00 0 00 000002 IBP 2 ; increment byte pointers
1986 002421' 133 00 0 00 000003 IBP 3 ; ...
1987 002422' 254 00 0 00 002413' JRST .COMM3 ; end of table entry? no - keep looping
1988 002423' 262 17 0 00 000003 .COMM4: RGET (3,2,1,0) ; yes - match - done
1989
1990 002427' 350 00 0 17 000000 AOS (P) ; set up return+2
1991 002430' 263 17 0 00 000000 RTN ; return+2
1992 002431' 262 17 0 00 000003 .COMM5: RGET (3,2,1,0) ; no match
1993
1994 002435' 263 17 0 00 000000 RTN ; return+1
1995 002436' 262 17 0 00 000003 .COMM6: RGET (3,2,1,0) ; return as end of list
1996
1997 002442' 350 00 0 17 000000 AOS (P) ; set up return+2
1998 002443' 350 00 0 17 000000 AOS (P) ; set up return+3
1999 002444' 263 17 0 00 000000 RTN ; return+3
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 49
DFPTAU MAC 6-Aug-83 09:31 Miscellaneous Routines SEQ 2120
2000
2001 ;#********************************************************************
2002 ;* .SARG - Obtain SIXBIT argument
2003 ;
2004 ; Arguments: ARGFLG - 0 - No more arguments
2005 ; -1 - More arguments have been given
2006 ; AC1 - Contains executable help message
2007 ;
2008 ; Returns: ARGUM - Contains SIXBIT argument
2009 ; ARGFLG - Updated
2010 ; +1 - Error occurred/Altmode typed/Question mark typed
2011 ; +2 - No argument
2012 ; +3 - Ok
2013 ;#********************************************************************
2014
2015 002445' 261 17 0 00 000000 .SARG: RPUT (0,1,2,3,ALTMGO) ; save AC's
2016
2017 MOVEI [SETOM ALTF ; set up altmode handling to exit
2018 PCRL ; +1 after setting altmode flag
2019 002452' 201 00 0 00 005554' JRST .SARX1] ; and skipping a line
2020 002453' 202 00 0 00 030063 MOVEM ALTMGO
2021
2022 ; Check if any arguments were given at all
2023
2024 002454' 336 00 0 00 002666' SKIPN ARGFLG ; any arguments?
2025 002455' 254 00 0 00 002476' JRST .SARX2 ; no - exit 'no argument'
2026
2027 ; Check for file input
2028
2029 002456' 332 00 0 00 000635* SKIPE FINPUT ; file input?
2030 JRST [GO FSARG ; yes - input octal argument
2031 JRST .SARX1 ; error or EOF occurred
2032 002457' 254 00 0 00 005557' JRST .SARG1] ; continue
2033
2034 ; Input SIXBIT argument
2035
2036 002460' 037 10 0 00 000003 .SARG0: TTSIXB ; get argument
2037 002461' 007 00 0 00 002505' ALTCHK .SARGA ; error - go handle
2038
2039 ; Check result
2040
2041 .SARG1: JUMPE [MOVE $TTCHR ; anything typed? if a space, keep
2042 CAIN 40 ; looking for an argument, if not
2043 JRST .SARG0 ; exit
2044 002462' 322 00 0 00 005562' JRST .SARX2]
2045 002463' 202 00 0 00 002665' MOVEM ARGUM ; save argument
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 50
DFPTAU MAC 6-Aug-83 09:31 Miscellaneous Routines SEQ 2121
2046
2047 ; Check for last argument
2048
2049 002464' 402 00 0 00 002666' SETZM ARGFLG ; clear 'argument typed' flag
2050 002465' 200 01 0 00 030231 MOVE 1,$TTCHR ; get last character typed
2051 002466' 302 01 0 00 000015 CAIE 1,15 ; CR? (end of line)
2052 002467' 476 00 0 00 002666' SETOM ARGFLG ; no - set 'argument typed' flag
2053
2054 ; Check if this should have been the last argument
2055
2056 002470' 331 00 0 17 777775 SKIPL -3(P) ; help message negative?
2057 002471' 254 00 0 00 002475' JRST .+4 ; no - exit
2058 002472' 260 17 0 00 002713' GO LASARG ; check for last argument
2059 002473' 254 00 0 00 002477' JRST .SARX1 ; error - exit +1
2060 JRST [MOVM 1,-3(P) ; any help here?
2061 JUMPE 1,.SARX1 ; no - continue
2062 XCT 1 ; yes - execute it
2063 002474' 254 00 0 00 005566' JRST .SARX1] ; yes - handle
2064 002475' 350 00 0 17 777773 AOS -5(P) ; adjust return
2065 002476' 350 00 0 17 777773 .SARX2: AOS -5(P) ; adjust return
2066
2067 ; Exit
2068
2069 002477' 262 17 0 00 030063 .SARX1: RGET (ALTMGO,3,2,1,0) ; restore AC's
2070
2071 002504' 263 17 0 00 000000 RTN ; return
2072
2073 ; Altmode typed
2074
2075 002505' 262 17 0 00 006136' .SARGA: GET XXT# ; adjust stack properly
2076 002506' 336 00 0 00 030225 SKIPN $TWCNT ; did a timeout occur?
2077 002507' 254 00 0 00 002476' JRST .SARX2 ; yes - assume 'no argument'
2078 002510' 200 01 0 00 030231 MOVE 1,$TTCHR ; no - get character typed
2079 002511' 306 01 0 00 000077 CAIN 1,77 ; was a question mark typed?
2080 JRST [MOVM 1,-3(P) ; yes - any help here?
2081 JUMPE 1,.SARX1 ; no - exit
2082 XCT 1 ; yes - execute it
2083 002512' 254 00 0 00 005566' JRST .SARX1] ; exit
2084 002513' 302 01 0 00 000040 CAIE 1,40 ; space (delimiter character) typed?
2085 JRST [FMSGCD <? Argument error> ; no - error - exit
2086 002514' 254 00 0 00 005577' JRST .SARX1]
2087 002515' 254 00 0 00 002462' JRST .SARG1 ; continue
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 51
DFPTAU MAC 6-Aug-83 09:31 Miscellaneous Routines SEQ 2122
2088
2089 ;#********************************************************************
2090 ;* .OARG - Obtain octal argument
2091 ;
2092 ; Arguments: ARGFLG - 0 - No more arguments
2093 ; -1 - More arguments have been given
2094 ; AC1 - Contains executable help message
2095 ;
2096 ; Returns: ARGUM - Contains octal argument
2097 ; ARGFLG - Updated
2098 ;
2099 ; +1 - Error occurred/Altmode typed/Question mark typed
2100 ; +2 - No argument
2101 ; +3 - Ok
2102 ;#********************************************************************
2103
2104 002516' 261 17 0 00 000000 .OARG: RPUT (0,1,2,3,ALTMGO) ; save AC's
2105
2106 MOVEI [SETOM ALTF ; set up altmode handling to exit
2107 PCRL ; +1 after setting altmode flag
2108 002523' 201 00 0 00 005601' JRST .OARX1] ; and skipping a line
2109 002524' 202 00 0 00 030063 MOVEM ALTMGO
2110
2111 ; Check if any arguments were given at all
2112
2113 002525' 336 00 0 00 002666' SKIPN ARGFLG ; any arguments?
2114 002526' 254 00 0 00 002550' JRST .OARX2 ; no - exit 'no argument'
2115
2116 ; Check for file input
2117
2118 002527' 332 00 0 00 002456* SKIPE FINPUT ; file input?
2119 JRST [GO FOARG ; yes - input octal argument
2120 JRST .OARX1 ; error or EOF occurred
2121 002530' 254 00 0 00 005604' JRST .OARG1] ; continue
2122
2123 ; Input octal argument
2124
2125 002531' 037 03 0 00 000003 .OARG0: TTIOCT ; get a number
2126 002532' 007 00 0 00 002557' ALTCHK .OARGA ; error - go handle
2127
2128 ; Check result
2129
2130 002533' 202 00 0 00 002665' .OARG1: MOVEM ARGUM ; save argument
2131 002534' 336 00 0 00 030510 SKIPN TTNBRF ; any number typed?
2132 JRST [MOVE 1,$TTCHR ; anything typed? if a space, keep
2133 CAIN 1,40 ; looking for an argument, if not
2134 JRST .OARG0 ; exit
2135 002535' 254 00 0 00 005607' JRST .OARX2]
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 52
DFPTAU MAC 6-Aug-83 09:31 Miscellaneous Routines SEQ 2123
2136
2137 ; Check for last argument
2138
2139 002536' 402 00 0 00 002666' SETZM ARGFLG ; clear 'argument typed' flag
2140 002537' 200 01 0 00 030231 MOVE 1,$TTCHR ; get last character typed
2141 002540' 302 01 0 00 000015 CAIE 1,15 ; CR? (end of line)
2142 002541' 476 00 0 00 002666' SETOM ARGFLG ; no - set 'argument typed' flag
2143
2144 ; Check if this should have been the last argument
2145
2146 002542' 331 00 0 17 777775 SKIPL -3(P) ; help message negative?
2147 002543' 254 00 0 00 002547' JRST .+4 ; no - exit
2148 002544' 260 17 0 00 002713' GO LASARG ; check for last argument
2149 002545' 254 00 0 00 002551' JRST .OARX1 ; error - exit +1
2150 JRST [MOVM 1,-3(P) ; any help here?
2151 JUMPE 1,.OARX1 ; no - continue
2152 XCT 1 ; yes - execute it
2153 002546' 254 00 0 00 005613' JRST .OARX1] ; yes - handle
2154 002547' 350 00 0 17 777773 AOS -5(P) ; adjust return
2155 002550' 350 00 0 17 777773 .OARX2: AOS -5(P) ; adjust return
2156
2157 ; Exit
2158
2159 002551' 262 17 0 00 030063 .OARX1: RGET (ALTMGO,3,2,1,0) ; restore AC's
2160
2161 002556' 263 17 0 00 000000 RTN ; return
2162
2163 ; Altmode typed
2164
2165 002557' 262 17 0 00 006136' .OARGA: GET XXT# ; adjust stack properly
2166 002560' 336 00 0 00 030225 SKIPN $TWCNT ; did a timeout occur?
2167 002561' 254 00 0 00 002550' JRST .OARX2 ; yes - assume 'no argument'
2168 002562' 200 01 0 00 030231 MOVE 1,$TTCHR ; no - get character typed
2169 002563' 306 01 0 00 000077 CAIN 1,77 ; was a question mark typed?
2170 JRST [MOVM 1,-3(P) ; yes - any help here?
2171 JUMPE 1,.OARX1 ; no - exit
2172 XCT 1 ; yes - execute it
2173 002564' 254 00 0 00 005613' JRST .OARX1] ; exit
2174 002565' 302 01 0 00 000040 CAIE 1,40 ; space (delimiter character) typed?
2175 JRST [FMSGCD <? Argument error> ; no - error - exit
2176 002566' 254 00 0 00 005617' JRST .OARX1]
2177 002567' 200 00 0 00 030233 MOVE $TYPNB ; get number typed
2178 002570' 254 00 0 00 002533' JRST .OARG1 ; and exit
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 53
DFPTAU MAC 6-Aug-83 09:31 Miscellaneous Routines SEQ 2124
2179
2180 ;#********************************************************************
2181 ;* DECYN - Decode an argument which should be NO or YES
2182 ;
2183 ; Arguments: ARGUM - Contains sixbit argument
2184 ;
2185 ; Return: +1 - Unrecognizable (print message also)
2186 ; +2 - No
2187 ; +3 - Yes
2188 ;#********************************************************************
2189
2190 002571' 261 17 0 00 000000 DECYN: RPUT (0,1,2) ; save AC's
2191
2192 002574' 200 01 0 00 002665' MOVE 1,ARGUM ; get command into AC1
2193 002575' 201 02 0 00 002607' MOVEI 2,DECLIS ; get address of cmd list
2194 002576' 260 17 0 00 002350' GO .COMM ; handle command decoding
2195 JRST [FMSGCD <? Unrecognized argument>
2196 002577' 254 00 0 00 005627' JRST DECERR]
2197 002600' 332 00 0 00 000001 SKIPE 1 ; NO typed?
2198 002601' 350 00 0 17 777775 AOS -3(P) ; increment return
2199 002602' 350 00 0 17 777775 AOS -3(P) ; increment return
2200 002603' 262 17 0 00 000002 DECERR: RGET (2,1,0) ; restore AC's
2201
2202 002606' 263 17 0 00 000000 RTN ; return
2203
2204 002607' 56 57 00 00 00 00 DECLIS: SIXBIT /NO/
2205 002610' 71 45 63 00 00 00 SIXBIT /YES/
2206 002611' 000 00 0 00 000000 Z
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 54
DFPTAU MAC 6-Aug-83 09:31 Miscellaneous Routines SEQ 2125
2207
2208 ;#********************************************************************
2209 ;* .DARG - Obtain octal/decimal argument
2210 ;
2211 ; Arguments: ARGFLG - 0 - No more arguments
2212 ; -1 - More arguments have been given
2213 ; AC1 - Contains executable help message
2214 ;
2215 ; Returns: ARGUM - Contains octal argument
2216 ; ARGFLG - Updated
2217 ;
2218 ; +1 - Error occurred/Altmode typed/Question mark typed
2219 ; +2 - No argument
2220 ; +3 - Ok
2221 ;#********************************************************************
2222
2223 002612' 261 17 0 00 000000 .DARG: RPUT (0,1,2,3,ALTMGO) ; save AC's
2224
2225 MOVEI [SETOM ALTF ; set up altmode handling to exit
2226 PCRL ; +1 after setting altmode flag
2227 002617' 201 00 0 00 005631' JRST .DARX1] ; and skipping a line
2228 002620' 202 00 0 00 030063 MOVEM ALTMGO
2229
2230 ; Check if any arguments were given at all
2231
2232 002621' 336 00 0 00 002666' SKIPN ARGFLG ; any arguments?
2233 002622' 254 00 0 00 002644' JRST .DARX2 ; no - exit 'no argument'
2234
2235 ; Check for file input
2236
2237 002623' 332 00 0 00 002527* SKIPE FINPUT ; file input?
2238 JRST [GO FOARG ; yes - input octal argument
2239 JRST .DARX1 ; error or EOF occurred
2240 002624' 254 00 0 00 005634' JRST .DARG1] ; continue
2241
2242 ; Input octal/decimal argument
2243
2244 002625' 037 05 0 00 000003 .DARG0: TTICNV ; get a number
2245 002626' 007 00 0 00 002653' ALTCHK .DARGA ; error - go handle
2246
2247 ; Check result
2248
2249 002627' 202 00 0 00 002665' .DARG1: MOVEM ARGUM ; save argument
2250 002630' 336 00 0 00 030510 SKIPN TTNBRF ; any number typed?
2251 JRST [MOVE 1,$TTCHR ; anything typed? if a space, keep
2252 CAIN 1,40 ; looking for an argument, if not
2253 JRST .DARG0 ; exit
2254 002631' 254 00 0 00 005637' JRST .DARX2]
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 55
DFPTAU MAC 6-Aug-83 09:31 Miscellaneous Routines SEQ 2126
2255
2256 ; Check for last argument
2257
2258 002632' 402 00 0 00 002666' SETZM ARGFLG ; clear 'argument typed' flag
2259 002633' 200 01 0 00 030231 MOVE 1,$TTCHR ; get last character typed
2260 002634' 302 01 0 00 000015 CAIE 1,15 ; CR? (end of line)
2261 002635' 476 00 0 00 002666' SETOM ARGFLG ; no - set 'argument typed' flag
2262
2263 ; Check if this should have been the last argument
2264
2265 002636' 331 00 0 17 777775 SKIPL -3(P) ; help message negative?
2266 002637' 254 00 0 00 002643' JRST .+4 ; no - exit
2267 002640' 260 17 0 00 002713' GO LASARG ; check for last argument
2268 002641' 254 00 0 00 002645' JRST .DARX1 ; error - exit +1
2269 JRST [MOVM 1,-3(P) ; any help here?
2270 JUMPE 1,.DARX1 ; no - continue
2271 XCT 1 ; yes - execute it
2272 002642' 254 00 0 00 005643' JRST .DARX1] ; yes - handle
2273 002643' 350 00 0 17 777773 AOS -5(P) ; adjust return
2274 002644' 350 00 0 17 777773 .DARX2: AOS -5(P) ; adjust return
2275
2276 ; Exit
2277
2278 002645' 262 17 0 00 030063 .DARX1: RGET (ALTMGO,3,2,1,0) ; restore AC's
2279
2280 002652' 263 17 0 00 000000 RTN ; return
2281
2282 002653' 262 17 0 00 006136' .DARGA: GET XXT# ; adjust stack properly
2283 002654' 336 00 0 00 030225 SKIPN $TWCNT ; did a timeout occur?
2284 002655' 254 00 0 00 002644' JRST .DARX2 ; yes - assume 'no argument'
2285 002656' 200 01 0 00 030231 MOVE 1,$TTCHR ; no - get character typed
2286 002657' 306 01 0 00 000077 CAIN 1,77 ; was a question mark typed?
2287 JRST [MOVM 1,-3(P) ; yes - any help here?
2288 JUMPE 1,.DARX1 ; no - exit
2289 XCT 1 ; yes - execute it
2290 002660' 254 00 0 00 005643' JRST .DARX1] ; exit
2291 002661' 302 01 0 00 000040 CAIE 1,40 ; space (delimiter character) typed?
2292 JRST [FMSGCD <? Argument error> ; no - error - exit
2293 002662' 254 00 0 00 005647' JRST .DARX1]
2294 002663' 200 00 0 00 030233 MOVE $TYPNB ; get number typed
2295 002664' 254 00 0 00 002627' JRST .DARG1 ; and exit
2296
2297 ; Argument variables
2298
2299 002665' 000000 000000 ARGUM: 0
2300 002666' 000000 000000 ARGFLG: 0
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 56
DFPTAU MAC 6-Aug-83 09:31 Miscellaneous Routines SEQ 2127
2301
2302 ;#********************************************************************
2303 ;* CHKARG - Check for argument when there shouldn't be any
2304 ;
2305 ; Arguments: AC1 - Contains confirmation message
2306 ;
2307 ; Return: +1 - An argument was typed
2308 ; +2 - No argument was typed
2309 ;#********************************************************************
2310
2311 002667' 261 17 0 00 000000 CHKARG: RPUT (0,1,ALTMGO) ; save AC's
2312
2313 002672' 336 00 0 00 002666' SKIPN ARGFLG ; any argument at all?
2314 002673' 254 00 0 00 002706' JRST CHKARX ; no - exit +2
2315 MOVEI [SETOM ALTF ; set up altmode handling to exit
2316 PCRL ; +1 after setting altmode flag
2317 002674' 201 00 0 00 005651' JRST CHKARA] ; and skipping a line
2318 002675' 202 00 0 00 030063 MOVEM ALTMGO
2319
2320 ; Input argument to see if ? typed
2321
2322 002676' 332 00 0 00 002623* SKIPE FINPUT ; file input switch set?
2323 JRST [GO FEOL ; yes - move to end of line
2324 002677' 254 00 0 00 005654' JRST CHKARX]
2325 002700' 037 05 0 00 000003 CHKAR0: TTICNV ; get a number
2326 ALTCHK [GET XXT# ; adjust stack properly
2327 SKIPN $TWCNT ; did a timeout occur?
2328 JRST CHKARY ; yes - error
2329 MOVE 1,$TTCHR ; no - get character typed
2330 CAIE 1,77 ; was a question mark typed?
2331 JRST .+1 ; no - error
2332 XCT -1(P) ; print help message
2333 002701' 007 00 0 00 005656' JRST CHKARA] ; and exit
2334 002702' 336 00 0 00 030510 SKIPN TTNBRF ; any number typed?
2335 JRST [MOVE $TTCHR ; anything typed? if a space, keep
2336 CAIN 40 ; looking for an argument, if not
2337 JRST CHKAR0 ; exit
2338 CAIN 15
2339 JRST CHKARX
2340 002703' 254 00 0 00 005666' JRST CHKARY]
2341
2342 002704' 037 01 0 00 005674' CHKARY: FMSGCD <? No argument expected>
2343 002705' 334 00 0 00 000000 SKIPA
2344 002706' 350 00 0 17 777775 CHKARX: AOS -3(P) ; adjust stack
2345 002707' 262 17 0 00 030063 CHKARA: RGET (ALTMGO,1,0) ; restore AC's
2346
2347 002712' 263 17 0 00 000000 RTN ; return
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 57
DFPTAU MAC 6-Aug-83 09:31 Miscellaneous Routines SEQ 2128
2348
2349 ;#********************************************************************
2350 ;* LASARG - Check for last argument when there shouldn't be any more
2351 ;
2352 ; Return: +1 - Error - more arguments
2353 ; +2 - Question mark typed
2354 ; +3 - No more arguments typed
2355 ;#********************************************************************
2356
2357 002713' 261 17 0 00 000000 LASARG: RPUT (0,1,ALTMGO) ; save AC's
2358
2359 002716' 336 00 0 00 002666' SKIPN ARGFLG ; any argument at all?
2360 002717' 254 00 0 00 002732' JRST LASARX ; no - exit +3
2361 MOVEI [SETOM ALTF ; set up altmode handling to exit
2362 PCRL ; +1 after setting altmode flag
2363 002720' 201 00 0 00 005702' JRST LASARA] ; and skipping a line
2364 002721' 202 00 0 00 030063 MOVEM ALTMGO
2365 002722' 332 00 0 00 002676* SKIPE FINPUT ; file input switch set?
2366 JRST [GO FEOL ; yes - move to end of line
2367 002723' 254 00 0 00 005705' JRST LASARX]
2368 002724' 037 05 0 00 000003 LASAR0: TTICNV ; get a number
2369 ALTCHK [GET XXT# ; adjust stack properly
2370 SKIPN $TWCNT ; did a timeout occur?
2371 JRST LASAR1 ; yes - error
2372 MOVE 1,$TTCHR ; get character typed
2373 CAIE 1,77 ; question mark?
2374 JRST .+1 ; yes - continue
2375 002725' 007 00 0 00 005707' JRST LASARX+1] ; no - handle
2376 002726' 336 00 0 00 030510 SKIPN TTNBRF ; any number typed?
2377 JRST [MOVE $TTCHR ; anything typed? if a space, keep
2378 CAIN 40 ; looking for an argument, if not
2379 JRST LASAR0 ; exit
2380 CAIN 15
2381 JRST LASARX
2382 002727' 254 00 0 00 005716' JRST LASAR1]
2383
2384 002730' 037 01 0 00 005724' LASAR1: FMSGCD <? Too many arguments>
2385 002731' 254 00 0 00 002734' JRST .+3
2386 002732' 350 00 0 17 777775 LASARX: AOS -3(P) ; adjust stack
2387 002733' 350 00 0 17 777775 AOS -3(P)
2388 002734' 262 17 0 00 030063 LASARA: RGET (ALTMGO,1,0) ; restore AC's
2389
2390 002737' 263 17 0 00 000000 RTN ; return
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 58
DFPTAU MAC 6-Aug-83 09:31 Miscellaneous Routines SEQ 2129
2391
2392 ;#********************************************************************
2393 ;* FIOFF - Routine to turn off the 'file input' switch
2394 ;#********************************************************************
2395
2396 002740' 336 00 0 00 002722* FIOFF: SKIPN FINPUT ; switch set?
2397 002741' 263 17 0 00 000000 RTN ; no - return
2398 002742' 261 17 0 00 000000 PUT 0 ; yes - save AC0
2399 002743' 037 01 0 00 005731' FMSGC <[Input from > ; print message
2400 002744' 200 00 0 00 000627* MOVE TAKFIL ; print file name
2401 002745' 037 01 0 00 000002 PNTSXF
2402 002746' 037 01 0 00 000056 PNTCIF "."
2403 002747' 200 00 0 00 000000# MOVE TAKFIL+1
2404 002750' 037 01 0 00 000002 PNTSXF
2405 002751' 037 01 0 00 005734' FMSGD < aborted]>
2406 002752' 402 00 0 00 002740* SETZM FINPUT ; clear 'file input' flag
2407 002753' 262 17 0 00 000000 GET 0 ; restore AC0
2408 002754' 263 17 0 00 000000 RTN ; return
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 59
DFPTAU MAC 6-Aug-83 09:31 Miscellaneous Routines SEQ 2130
2409
2410 ;#********************************************************************
2411 ;* FINCMD - Input a sixbit command from a file
2412 ;
2413 ; Return +1 - Error/EOF
2414 ; +2 - Sixbit word in AC0
2415 ;#********************************************************************
2416
2417 002755' 261 17 0 00 000001 FINCMD: RPUT (1,2) ; save AC's
2418
2419 002757' 402 00 0 00 006115' SETZM FINSIX# ; initialize word
2420 002760' 400 01 0 00 000000 SETZ 1, ; byte count
2421 002761' 200 02 0 00 005737' MOVE 2,[POINT 6,FINSIX] ; initial byte pointer
2422
2423 002762' 260 17 0 00 000614' FINCM0: GO CHRINS ; get a character
2424 002763' 254 00 0 00 003011' JRST FINCMX ; exit - error or EOF occurred
2425 002764' 306 00 0 00 000040 CAIN " " ; space typed?
2426 002765' 254 00 0 00 003001' JRST FINCMC ; yes - exit valid command in AC0
2427 002766' 306 00 0 00 000054 CAIN "," ; comma typed?
2428 002767' 254 00 0 00 003001' JRST FINCMC ; yes - exit valid command in AC0
2429 002770' 306 00 0 00 000015 CAIN 15 ; carriage return typed?
2430 002771' 254 00 0 00 003001' JRST FINCMC ; yes - exit valid command in AC0
2431 002772' 350 00 0 00 000001 AOS 1 ; increment byte count
2432 002773' 303 00 0 00 000140 CAILE 140 ; lowercase?
2433 002774' 275 00 0 00 000040 SUBI 40 ; yes - make into upper case
2434 002775' 275 00 0 00 000040 SUBI 40 ; convert to sixbit
2435 002776' 307 01 0 00 000006 CAIG 1,6 ; exceed 6 characters?
2436 002777' 136 00 0 00 000002 IDPB 2 ; no - save sixbit byte
2437 003000' 254 00 0 00 002762' JRST FINCM0 ; get next character
2438
2439 ; Exit with command in AC0
2440
2441 003001' 202 00 0 00 030231 FINCMC: MOVEM $TTCHR ; save last character typed
2442 003002' 306 00 0 00 000015 CAIN 15 ; carriage return?
2443 GO [GO CHRINS ; yes - strip off the line feed also
2444 JFCL
2445 003003' 260 17 0 00 005740' RTN]
2446 003004' 200 00 0 00 006115' MOVE FINSIX ; get sixbit command
2447 003005' 350 00 0 17 777776 AOS -2(P) ; set up return + 1
2448 003006' 262 17 0 00 000002 RGET (2,1) ; restore AC's
2449
2450 003010' 263 17 0 00 000000 RTN ; return
2451
2452 ; Exit with error or EOF condition
2453
2454 003011' 260 17 0 00 002740' FINCMX: GO FIOFF ; clear 'file input' switch
2455 003012' 400 00 0 00 000000 SETZ 0, ; clear command typed
2456 003013' 262 17 0 00 000002 RGET (2,1) ; restore AC's
2457
2458 003015' 263 17 0 00 000000 RTN ; return
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 60
DFPTAU MAC 6-Aug-83 09:31 Miscellaneous Routines SEQ 2131
2459
2460 ;#********************************************************************
2461 ;* FSARG - Input a sixbit argument from a file
2462 ;
2463 ; Return +1 - Error/EOF
2464 ; +2 - Sixbit word in AC0
2465 ;#********************************************************************
2466
2467 003016' 261 17 0 00 000001 FSARG: RPUT (1,2) ; save AC's
2468
2469 003020' 402 00 0 00 006115' SETZM FINSIX ; initialize word
2470 003021' 400 01 0 00 000000 SETZ 1, ; byte count
2471 003022' 200 02 0 00 005737' MOVE 2,[POINT 6,FINSIX] ; initial byte pointer
2472
2473 003023' 260 17 0 00 000614' FSARG0: GO CHRINS ; get a character
2474 003024' 254 00 0 00 003052' JRST FSARGX ; exit - error or EOF occurred
2475 003025' 306 00 0 00 000040 CAIN " " ; space typed?
2476 003026' 254 00 0 00 003042' JRST FSARGC ; yes - exit valid command in AC0
2477 003027' 306 00 0 00 000054 CAIN "," ; comma typed?
2478 003030' 254 00 0 00 003042' JRST FSARGC ; yes - exit valid command in AC0
2479 003031' 306 00 0 00 000015 CAIN 15 ; carriage return typed?
2480 003032' 254 00 0 00 003042' JRST FSARGC ; yes - exit valid command in AC0
2481 003033' 350 00 0 00 000001 AOS 1 ; increment byte count
2482 003034' 303 00 0 00 000140 CAILE 140 ; lowercase?
2483 003035' 275 00 0 00 000040 SUBI 40 ; yes - make into upper case
2484 003036' 275 00 0 00 000040 SUBI 40 ; convert to sixbit
2485 003037' 307 01 0 00 000006 CAIG 1,6 ; exceed 6 characters?
2486 003040' 136 00 0 00 000002 IDPB 2 ; no - save sixbit byte
2487 003041' 254 00 0 00 003023' JRST FSARG0 ; get next character
2488
2489 ; Exit with command in AC0
2490
2491 003042' 202 00 0 00 030231 FSARGC: MOVEM $TTCHR ; save last character typed
2492 003043' 306 00 0 00 000015 CAIN 15 ; carriage return?
2493 GO [GO CHRINS ; yes - strip off the line feed also
2494 JFCL
2495 003044' 260 17 0 00 005740' RTN]
2496 003045' 200 00 0 00 006115' MOVE FINSIX ; get sixbit command
2497 003046' 350 00 0 17 777776 AOS -2(P) ; set up return + 1
2498 003047' 262 17 0 00 000002 RGET (2,1) ; restore AC's
2499
2500 003051' 263 17 0 00 000000 RTN ; return
2501
2502 ; Exit with error or EOF condition
2503
2504 003052' 260 17 0 00 002740' FSARGX: GO FIOFF ; clear 'file input' switch
2505 003053' 400 00 0 00 000000 SETZ 0, ; clear command typed
2506 003054' 262 17 0 00 000002 RGET (2,1) ; restore AC's
2507
2508 003056' 263 17 0 00 000000 RTN ; return
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 61
DFPTAU MAC 6-Aug-83 09:31 Miscellaneous Routines SEQ 2132
2509
2510 ;#********************************************************************
2511 ;* FOARG - Input a octal argument from a file
2512 ;
2513 ; Return +1 - Error/EOF
2514 ; +2 - Octal data in AC0
2515 ;#********************************************************************
2516
2517 003057' 261 17 0 00 000001 FOARG: RPUT (1,2,3) ; save AC's
2518
2519 003062' 400 01 0 00 000000 SETZ 1, ; initialize byte count
2520 003063' 403 02 0 00 000003 SETZB 2,3 ; initialize octal and decimal result
2521 003064' 476 00 0 00 006116' SETOM FOFLAG# ; set 'octal' flag
2522 003065' 260 17 0 00 000614' FOARG0: GO CHRINS ; get a character
2523 003066' 254 00 0 00 003133' JRST FOARGX ; exit - error or EOF occurred
2524 003067' 306 00 0 00 000040 CAIN " " ; space typed?
2525 003070' 254 00 0 00 003117' JRST FOARGC ; yes - exit valid command in AC0
2526 003071' 306 00 0 00 000054 CAIN "," ; comma typed?
2527 003072' 254 00 0 00 003117' JRST FOARGC ; yes - exit valid command in AC0
2528 003073' 306 00 0 00 000015 CAIN 15 ; carriage return typed?
2529 003074' 254 00 0 00 003117' JRST FOARGC ; yes - exit valid command in AC0
2530 003075' 306 00 0 00 000056 CAIN "." ; decimal point typed?
2531 003076' 402 00 0 00 006116' SETZM FOFLAG ; yes - clear octal flag
2532 003077' 306 00 0 00 000056 CAIN "." ; decimal point typed?
2533 003100' 254 00 0 00 003065' JRST FOARG0 ; yes - keep looking for delimiter
2534 003101' 350 00 0 00 000001 AOS 1 ; increment byte count
2535 003102' 303 01 0 00 000014 CAILE 1,^D12 ; exceed 12 digits?
2536 003103' 254 00 0 00 003133' JRST FOARGX ; yes - exit - error
2537 003104' 275 00 0 00 000060 SUBI 60 ; convert to octal 0..n
2538 003105' 331 00 0 00 000000 SKIPL 0 ; decimal or octal?
2539 003106' 303 00 0 00 000011 CAILE ^D9 ; (between 0 and 9)
2540 003107' 254 00 0 00 003133' JRST FOARGX ; no - exit - error
2541 003110' 221 02 0 00 000012 IMULI 2,^D10 ; update decimal number
2542 003111' 272 00 0 00 000002 ADDM 2 ; ...
2543 003112' 242 03 0 00 000003 LSH 3,3 ; update octal number
2544 003113' 272 00 0 00 000003 ADDM 3 ; ...
2545 003114' 303 00 0 00 000007 CAILE 7 ; decimal number?
2546 003115' 402 00 0 00 006116' SETZM FOFLAG ; yes - clear octal flag
2547 003116' 254 00 0 00 003065' JRST FOARG0 ; get next character
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 62
DFPTAU MAC 6-Aug-83 09:31 Miscellaneous Routines SEQ 2133
2548
2549 ; Exit with command in AC0
2550
2551 003117' 476 00 0 00 030510 FOARGC: SETOM TTNBRF ; indicate that a number was typed
2552 003120' 202 00 0 00 030231 MOVEM $TTCHR ; save last character typed
2553 003121' 306 00 0 00 000015 CAIN 15 ; carriage return?
2554 GO [GO CHRINS ; yes - strip off the line feed also
2555 JFCL
2556 003122' 260 17 0 00 005740' RTN]
2557 003123' 200 00 0 00 000002 MOVE 2 ; get decimal number
2558 003124' 332 00 0 00 006116' SKIPE FOFLAG ; octal number?
2559 003125' 200 00 0 00 000003 MOVE 3 ; yes - get octal number
2560 003126' 350 00 0 17 777775 AOS -3(P) ; set up return + 1
2561 003127' 262 17 0 00 000003 RGET (3,2,1) ; restore AC's
2562
2563 003132' 263 17 0 00 000000 RTN ; return
2564
2565 ; Exit with error or EOF condition
2566
2567 003133' 260 17 0 00 002740' FOARGX: GO FIOFF ; clear 'file input' switch
2568 003134' 400 00 0 00 000000 SETZ 0, ; clear command typed
2569 003135' 262 17 0 00 000003 RGET (3,2,1) ; restore AC's
2570
2571 003140' 263 17 0 00 000000 RTN ; return
2572
2573
2574 ;#********************************************************************
2575 ;* FEOL - Skip characters until end of line is reached
2576 ;#********************************************************************
2577
2578 003141' 261 17 0 00 000000 FEOL: PUT 0 ; save AC0
2579 003142' 260 17 0 00 000614' FEOL0: GO CHRINS ; get a character
2580 003143' 254 00 0 00 003146' JRST FEOLX ; error/EOF - exit
2581 003144' 302 00 0 00 000012 CAIE 12 ; LF yet?
2582 003145' 254 00 0 00 003142' JRST FEOL0 ; no - keep looking
2583 003146' 262 17 0 00 000000 FEOLX: GET 0 ; restore AC0
2584 003147' 263 17 0 00 000000 RTN ; return
2585
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 63
DFPTAU MAC 6-Aug-83 09:31 Scope Looping And Error Reporting Routine SEQ 2134
2586 SUBTTL Scope Looping And Error Reporting Routine
2587
2588 ;#*********************************************************************
2589 ;* SCOPE1 - Error reporter and scope loop controller
2590 ;
2591 ; This routine is responsible for error reporting and scope looping.
2592 ; Error looping and print options are controlled by switches.
2593 ;
2594 ; Switch Options:
2595 ; --------------
2596 ;
2597 ; DING - 0 No bell on error
2598 ; 1 Ring bell on error (forced)
2599 ;
2600 ; LOOPER - 0 Proceed on error
2601 ; 1 Loop on first occurence of an error
2602 ;
2603 ; ERSTOP - 0 Don't halt on error
2604 ; 1 Halt on error (exec mode only)
2605 ;
2606 ; PALERS - 0 Print error data on first occurance of error only
2607 ; 1 Print error data for all repetitive errors
2608 ;
2609 ; The following two locations should be initialized by the mainline to 0
2610 ; at the start of each test: ERFLG Error/no-error flag
2611 ; ERCNT A local error counter
2612 ; ERRPC PC of last error
2613 ;
2614 ; The scope/error handler is called by executing a UUO whose E-field is a
2615 ; pointer to additional error information. The UUO has a skip and non-skip
2616 ; return to provide the necessary looping capabilities. The non-skip
2617 ; return is the loop on error return and the skip return is the continue
2618 ; test (or no error) return. Pgm branching is accomplished by placing
2619 ; appropriate JRSTs in the return locations.
2620 ;
2621 ; Example: CONSZ DEV,ARG ; test instruction
2622 ; ------- SETOM ERFLG ; detected an error
2623 ; SCOPE TAG ; call the routine via UUO
2624 ; JRST ERADR ; loop return
2625 ; JRST OKADR ; continue return
2626 ;
2627 ; TAG: Cntrl Bits,,ADDR ; variable # of error descriptor
2628 ; Cntrl Bits,,ADDR ; entries
2629 ; ...
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 64
DFPTAU MAC 6-Aug-83 09:31 Scope Looping And Error Reporting Routine SEQ 2135
2630
2631 ; Each word specifies messages or print routines. Each message printed
2632 ; is followed by a CRLF. The right half of each word is a pointer to the
2633 ; start of the ASCIZ message or print routine. The left half furnishes
2634 ; message control information to SCOPE, decoded as follows:
2635 ;
2636 ; 1B2 (MSG) - Right half of word is address of an ASCIZ message.
2637 ;
2638 ; 2B2 (CALL) - Right half of word is address of a special print
2639 ; routine. SCOPE saves AC's 0,1,2,3 so this routine
2640 ; does not have to preserve these.
2641 ;
2642 ; 3B2 (GOTO) - Right half of word is address where to resume this
2643 ; error descriptor table.
2644 ;
2645 ; 1B3 (TXNOT) - Print/call entry if TXTINH not set
2646 ;
2647 ; 1B4 (TXYES) - Print/call entry if TXTINH set
2648 ;
2649 ; 3B4 (TXALL) - Print/call entry always
2650 ;
2651 ; 1B5 (LAST) - Right half of word is address of an ASCIZ message.
2652 ;
2653 ; These bits allows short and normal printout modes, branching, and two
2654 ; level module callout priority.
2655 ;
2656 ; Example: (TXTINH is not set)
2657 ;
2658 ; +-+-+-+-+-+-+
2659 ; ERROR: TEST-XXX (Ebus test)
2660 ; SCOPE PC = XXXXXX TEST PC = XXXXXX SWITCHES = XXXXXX XXXXXX
2661 ; Error description ...
2662 ; Error description ...
2663 ; ...
2664 ; -------------
2665 ;
2666 ; Example: (TXTINH is set)
2667 ;
2668 ; +-+-+-+-+-+-+
2669 ; ERROR: TST-XXX SCOPE PC-XXXXXX SW-XXXXXX XXXXXX
2670 ; Error description ...
2671 ; Error description ...
2672 ; ...
2673 ; -------------
2674 ;
2675 ; NOTE: If the diagnostic is in debug mode (UDEBUG switch set), no error
2676 ; messages are normally printed. With MDEBUG switch set, the error flag
2677 ; is set thereby causing each error message to be printed.
2678 ;#*********************************************************************
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 65
DFPTAU MAC 6-Aug-83 09:31 Scope Looping And Error Reporting Routine SEQ 2136
2679
2680 003150' 261 17 0 00 030114 SCOPE1: PUT $SVUPC ; save the UUO PC
2681 003151' 261 17 0 00 030113 PUT $SVUUO ; save the actual UUO
2682 003152' 261 17 0 00 000000 RPUT (0,1,2) ; save some AC's
2683
2684
2685 ; The stack now looks like this:
2686 ;
2687 ; -5(P) The return addr for SCOPE UUO
2688 ; -4(P) The address from which the SCOPE UUO was called
2689 ; -3(P) The actual UUO that was executed "SCOPE"
2690 ; -2(P) AC0 from before the UUO
2691 ; -1(P) AC1 from before the UUO
2692 ; 0(P) AC2 from before the UUO
2693
2694 ; Get switches
2695
2696 003155' 260 17 0 00 001564' GO SWITT ; get switches
2697 003156' 202 00 0 00 006131' MOVEM SCOSW# ; save switches
2698
2699 ; Handle SPEAR error report
2700
2701 003157' 332 00 0 00 000015 SKIPE ERFLG ; error occurred?
2702 003160' 260 17 0 00 000000* GO SPREP2 ; yes - report it
2703
2704 ; Handle debug printout / error handling
2705
2706 003161' 332 00 0 00 000000* SKIPE UDEBUG ; no-port debug mode?
2707 003162' 400 15 0 00 000000 SETZ ERFLG, ; yes - clear error flag
2708 003163' 332 00 0 00 000000* SKIPE MDEBUG ; error message debug mode?
2709 003164' 474 15 0 00 000000 SETO ERFLG, ; yes - set error flag
2710
2711 ; Update scope PC
2712
2713 003165' 550 00 0 17 777774 HRRZ -4(P) ; get PC of the scope call
2714 003166' 202 00 0 00 006130' MOVEM SCOPC# ; save it (scope PC)
2715
2716 ; Error occurred?
2717
2718 003167' 322 15 0 00 003224' JUMPE ERFLG,SCOP4 ; an error occurred? - no check looping
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 66
DFPTAU MAC 6-Aug-83 09:31 Scope Looping And Error Reporting Routine SEQ 2137
2719
2720 ; Error did occur - update error PC / print error message
2721
2722 003170' 316 00 0 00 030052 CAMN ERRPC ; error has already occurred here?
2723 003171' 254 00 0 00 003177' JRST SCOP0 ; yes - go check if print
2724 003172' 200 00 0 00 006130' MOVE SCOPC ; get scope PC
2725 003173' 202 00 0 00 030052 MOVEM ERRPC ; save as error PC
2726 003174' 200 00 0 00 000506* MOVE TSTSUB ; get current offset
2727 003175' 202 00 0 00 003451' MOVEM SCOOFF ; save as error offset
2728 003176' 254 00 0 00 003205' JRST SCOP2 ; go print error
2729
2730 ; Must also check if this is a multiple error from a execute table. Check
2731 ; TSTSUB against SCOOFF - if different then it is not a repeat error.
2732
2733 003177' 200 00 0 00 003451' SCOP0: MOVE SCOOFF ; last offset presented to SCOPE
2734 003200' 312 00 0 00 003174* CAME TSTSUB ; same as current offset?
2735 003201' 254 00 0 00 003205' JRST SCOP2 ; yes - go check if print
2736
2737 ; This is a repeat error here, check if print all errors
2738
2739 003202' 200 00 0 00 006131' SCOP1: MOVE SCOSW ; get switches
2740 003203' 607 00 0 00 001000 TLNN PALERS ; print all errors?
2741 003204' 254 00 0 00 003215' JRST SCOP3 ; no - go ring bell/error halt
2742
2743 ; Print error message
2744
2745 003205' 200 00 0 00 006131' SCOP2: MOVE SCOSW ; get switches
2746 003206' 602 00 0 00 100000 TRNE INHMSG ; inhibit error messages?
2747 003207' 254 00 0 00 003215' JRST SCOP3 ; yes - skip this
2748 003210' 260 17 0 00 003312' GO ERHDR ; print the standard error heading
2749 003211' 550 01 0 17 777775 HRRZ 1,-3(P) ; get the e-field of the UUO
2750 003212' 332 00 0 00 000001 SKIPE 1 ; table address given?
2751 003213' 260 17 0 00 003365' GO ERPNT ; yes - go handle error table
2752 003214' 037 00 0 00 005743' TMSGCD <------------->
2753
2754 ; Handle bell and error halt functions.
2755
2756 003215' 200 00 0 00 006131' SCOP3: MOVE SCOSW ; get switches
2757 003216' 603 00 0 00 010000 TLNE DING ; ding set?
2758 003217' 037 01 0 00 000007 PBELL ; yes - do it
2759 003220' 200 00 0 00 006131' MOVE SCOSW ; get switches
2760 003221' 607 00 0 00 002000 TLNN ERSTOP ; halt on error?
2761 003222' 254 00 0 00 003224' JRST SCOP4 ; no - continue
2762 003223' 476 00 0 00 000000* SETOM ALTF ; yes - set abort flag
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 67
DFPTAU MAC 6-Aug-83 09:31 Scope Looping And Error Reporting Routine SEQ 2138
2763
2764 ; Error reporting (if any) is done. Now check loop on error switch.
2765
2766 003224' 200 00 0 00 006131' SCOP4: MOVE SCOSW ; get switches
2767 003225' 607 00 0 00 004000 TLNN LOOPER ; loop on error?
2768 003226' 254 00 0 00 003255' JRST SCOPXX ; no - exit +2/3
2769 003227' 326 15 0 00 003235' JUMPN ERFLG,SCOPX1 ; yes - error - yes - exit +1 (loop)
2770
2771 ; Error looping is enabled, but error flag was not set. First check if we
2772 ; are at the same place as the last error - if not, exit +3 because it is
2773 ; not yet time to loop. If yes, exit +1, loop on error.
2774
2775 003230' 200 00 0 00 006130' MOVE SCOPC ; get scope PC and see if this is
2776 003231' 315 00 0 00 030052 CAMGE ERRPC ; earlier than the error PC?
2777 003232' 254 00 0 00 003255' JRST SCOPXX ; earlier - exit +3
2778 003233' 336 00 0 00 030052 SKIPN ERRPC ; no error yet at all?
2779 003234' 254 00 0 00 003255' JRST SCOPXX ; no - exit +3
2780
2781 ; Exit +1 (loop return)
2782
2783 003235' 037 07 0 00 000003 SCOPX1: TTALTM ; see if opr wants to abort
2784 003236' 334 00 0 00 000000 SKIPA ; no - continue
2785 003237' 254 00 0 00 003262' JRST SCOPX2 ; yes - altmode exit
2786 003240' 332 00 0 00 003223* SKIPE ALTF ; 'altmode typed' flag set?
2787 003241' 254 00 0 00 003262' JRST SCOPX2 ; yes - altmode exit
2788 003242' 336 00 0 00 006124' SKIPN LCHAR ; last character in here already?
2789 003243' 202 00 0 00 006124' MOVEM LCHAR ; no - save 'last char typed'
2790 003244' 260 17 0 00 000464' GO LSTAMP ; check for S typed
2791 003245' 200 00 0 00 006130' MOVE SCOPC ; get scope PC
2792 003246' 202 00 0 00 030052 MOVEM ERRPC ; update error PC
2793 003247' 262 17 0 00 000002 RGET (2,1,0,$SVUUO,$SVUPC) ; restore things
2794
2795 003254' 263 17 0 00 000000 RTN ; exit
2796
2797 ; Exit +2/3 (altmode return / normal return)
2798
2799 003255' 037 07 0 00 000003 SCOPXX: TTALTM ; see if opr wants to abort
2800 003256' 334 00 0 00 000000 SKIPA ; no - continue
2801 003257' 254 00 0 00 003262' JRST SCOPX2 ; yes - altmode exit
2802 003260' 336 00 0 00 003240* SKIPN ALTF ; 'altmode typed' flag set?
2803 003261' 254 00 0 00 003272' JRST SCOPX3 ; no - exit +3 (normal return)
2804
2805 ; Altmode return
2806
2807 003262' 262 17 0 00 000002 SCOPX2: RGET (2,1,0,$SVUUO,$SVUPC) ; restore things
2808
2809 003267' 350 00 0 17 000000 AOS (P) ; set up return +1
2810 003270' 476 00 0 00 003260* SETOM ALTF ; set 'altmode typed' flag
2811 003271' 263 17 0 00 000000 RTN ; exit
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 68
DFPTAU MAC 6-Aug-83 09:31 Scope Looping And Error Reporting Routine SEQ 2139
2812
2813 ; Normal return - also check for S typed
2814
2815 003272' 336 00 0 00 006124' SCOPX3: SKIPN LCHAR ; last character in here already?
2816 003273' 202 00 0 00 006124' MOVEM LCHAR ; no - save 'last char typed'
2817 003274' 260 17 0 00 000416' GO PSTAMP ; check for S typed
2818 003275' 200 00 0 00 006131' MOVE SCOSW ; get switches
2819 003276' 602 00 0 00 010000 TRNE RUNALL ; run all test segments?
2820 003277' 400 15 0 00 000000 SETZ ERFLG, ; yes - clear error flag
2821 003300' 602 00 0 00 001000 TRNE DEBUG2 ; error message debug?
2822 003301' 400 15 0 00 000000 SETZ ERFLG, ; yes - clear error flag
2823 003302' 262 17 0 00 000002 RGET (2,1,0,$SVUUO,$SVUPC) ; restore things
2824
2825 003307' 350 00 0 17 000000 AOS (P) ; set up return +3
2826 003310' 350 00 0 17 000000 AOS (P) ; set up return +3
2827 003311' 263 17 0 00 000000 RTN ; exit
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 69
DFPTAU MAC 6-Aug-83 09:31 Scope Looping And Error Reporting Routine SEQ 2140
2828
2829 ;#********************************************************************
2830 ; ERHDR - Print the standard header messages
2831 ;#********************************************************************
2832
2833 003312' 037 01 0 00 000026 ERHDR: PFORCE ; handle Control-O
2834 003313' 037 00 0 00 005747' TMSGCD <+-+-+-+-+-+-+>
2835 003314' 260 17 0 00 003434' GO PNTDEV ; print device type
2836 003315' 037 00 0 00 005753' TMSG < Error: TEST >
2837 003316' 260 17 0 00 000000* GO TSTPNT ; print test name
2838 003317' 200 00 0 00 006131' MOVE SCOSW ; get switches
2839 003320' 603 00 0 00 000200 TLNE TXTINH ; short printout desired?
2840 003321' 254 00 0 00 003346' JRST ERSHRT ; yes - go handle
2841
2842 ; Regular format error header
2843
2844 003322' 037 00 0 00 005756' ERNRML: TMSGC <Test PC = >
2845 003323' 200 00 0 00 000000* MOVE TSTPC ; get the address of start of test
2846 003324' 274 00 0 00 000000* SUB TSTOFF ; normalize to relocatable address
2847 003325' 037 16 0 00 000003 PNTOCS ; print it
2848 003326' 037 00 0 00 005761' TMSG <' Scope PC = >
2849 003327' 550 00 0 17 777772 HRRZ -6(P) ; get adr where SCOPE was called
2850 003330' 274 00 0 00 003324* SUB TSTOFF ; normalize to relocatable address
2851 003331' 037 16 0 00 000003 PNTOCS ; print it
2852 003332' 037 00 0 00 005764' TMSG <'>
2853 003333' 336 00 0 00 000451* SKIPN TSTREP ; pass 1?
2854 003334' 254 00 0 00 003342' JRST ERNRM0 ; yes - don't print pass #
2855 003335' 037 00 0 00 005765' TMSG < Pass >
2856 003336' 200 00 0 00 003333* MOVE TSTREP ; get pass count
2857 003337' 350 00 0 00 000000 AOS
2858 003340' 037 15 0 00 000000 PNTDEC ; print it
2859 003341' 037 00 0 00 003466' TMSG <.>
2860 003342' 037 00 0 00 005767' ERNRM0: TMSG < Switches = >
2861 003343' 200 00 0 00 006131' MOVE SCOSW ; get switches
2862 003344' 037 13 0 00 000000 PNTHW ; print
2863 003345' 263 17 0 00 000000 RTN ; exit
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 70
DFPTAU MAC 6-Aug-83 09:31 Scope Looping And Error Reporting Routine SEQ 2141
2864
2865 ; Short format error header
2866
2867 003346' 037 00 0 00 005772' ERSHRT: TMSG < Scope PC >
2868 003347' 550 00 0 17 777772 HRRZ -6(P) ; pick up error PC
2869 003350' 274 00 0 00 003330* SUB TSTOFF ; normalize to relocatable address
2870 003351' 037 16 0 00 000003 PNTOCS ; print the error PC
2871 003352' 037 00 0 00 005764' TMSG <'>
2872 003353' 336 00 0 00 003336* SKIPN TSTREP ; pass 1?
2873 003354' 254 00 0 00 003361' JRST ERSHR0 ; yes - don't print pass #
2874 003355' 037 00 0 00 005765' TMSG < Pass >
2875 003356' 200 00 0 00 003353* MOVE TSTREP ; get pass count
2876 003357' 350 00 0 00 000000 AOS
2877 003360' 037 15 0 00 000000 PNTDEC ; print it
2878 003361' 037 00 0 00 005775' ERSHR0: TMSG < SW >
2879 003362' 200 00 0 00 006131' MOVE SCOSW ; get switches
2880 003363' 037 13 0 00 000000 PNTHW ; print
2881 003364' 263 17 0 00 000000 RTN ; exit
2882
2883
2884 ;#********************************************************************
2885 ; ERPNT - Print error description based on error descriptor table
2886 ;#********************************************************************
2887
2888 003365' 202 01 0 00 006114' ERPNT: MOVEM 1,ERDES# ; save addr of error descriptor table
2889 003366' 336 01 1 00 006114' ERPN0: SKIPN 1,@ERDES ; get entry - zero?
2890 003367' 263 17 0 00 000000 RTN ; yes - exit
2891
2892 003370' 350 00 0 00 006114' AOS ERDES ; update to point at next one
2893 003371' 135 02 0 00 005777' LDB 2,[POINT 3,1,2] ; get entry type
2894 GO @[ERPNE ; yes - dispatch
2895 ERPNM ; handle message
2896 ERPNC ; handle call
2897 ERPNG ; handle goto
2898 ERPNE ; out of range
2899 ERPNE ; out of range
2900 ERPNE ; out of range
2901 003372' 260 17 1 02 006000' ERPNE](2) ; out of range
2902 003373' 607 01 0 00 010000 TLNN 1,(LAST) ; last entry?
2903 003374' 254 00 0 00 003366' JRST ERPN0 ; no - get next entry
2904 003375' 263 17 0 00 000000 RTN ; yes - return
2905
2906 ; Error (entry type out of range)
2907
2908 003376' 037 00 0 00 006010' ERPNE: TMSGC <? Error descriptor entry type out of range>
2909 003377' 263 17 0 00 000000 RTN ; return
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 71
DFPTAU MAC 6-Aug-83 09:31 Scope Looping And Error Reporting Routine SEQ 2142
2910
2911 ; Handle message
2912
2913 003400' 200 00 0 00 006131' ERPNM: MOVE SCOSW ; get switches
2914 003401' 603 00 0 00 000200 TLNE TXTINH ; text inhibit set?
2915 PJRST [TLNN 1,(TXYES) ; yes - print it?
2916 JRST .+1 ; no - exit
2917 PCRL ; yes - print it
2918 PNTMSG @1 ; and return
2919 003402' 254 00 0 00 006021' RTN]
2920 003403' 607 00 0 00 000200 TLNN TXTINH ; text inhibit set?
2921 PJRST [TLNN 1,(TXNOT) ; no - print it?
2922 RTN ; no - return
2923 PCRL ; yes - print it
2924 PNTMSG @1 ; and return
2925 003404' 254 00 0 00 006026' RTN]
2926 003405' 263 17 0 00 000000 RTN ; return
2927
2928 ; Handle goto
2929
2930 003406' 552 02 0 00 006114' ERPNG: HRRZM 2,ERDES ; update table address
2931 003407' 263 17 0 00 000000 RTN ; exit
2932
2933 ; Handle call
2934
2935 003410' 200 00 0 00 006131' ERPNC: MOVE SCOSW ; get switches
2936 003411' 603 00 0 00 000200 TLNE TXTINH ; text inhibit set?
2937 JRST [TLNN 1,(TXYES) ; yes - call routine?
2938 JRST .+1 ; no - exit
2939 003412' 254 00 0 00 006033' JRST ERPNCG] ; yes - call routine
2940 003413' 607 00 0 00 000200 TLNN TXTINH ; text inhibit set?
2941 PJRST [TLNN 1,(TXNOT) ; no - call routine?
2942 RTN ; no - return
2943 003414' 254 00 0 00 006036' JRST ERPNCG] ; yes - call routine
2944 003415' 263 17 0 00 000000 RTN ; return
2945 003416' 261 17 0 00 000000 ERPNCG: RPUT (0,1,2,3,4,5) ; save some AC's
2946
2947 003424' 260 17 1 00 000001 GO @1 ; call the routine
2948 003425' 262 17 0 00 000005 RGET (5,4,3,2,1,0) ; restore AC's
2949
2950 003433' 263 17 0 00 000000 RTN ; exit
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page 72
DFPTAU MAC 6-Aug-83 09:31 Scope Looping And Error Reporting Routine SEQ 2143
2951
2952 ;#********************************************************************
2953 ; PNTDEV - Print device name
2954 ;#********************************************************************
2955
2956 003434' 135 01 0 00 006041' PNTDEV: LDB 1,[POINT 3,UUT,9] ; get channel number
2957 XCT [TMSG <RH0>
2958 TMSG <RH1>
2959 TMSG <RH2>
2960 TMSG <RH3>
2961 TMSG <RH4>
2962 GO PNTDNI
2963 TMSG <RH6>
2964 003435' 256 00 0 01 006050' GO PNTDCI](1)
2965 003436' 263 17 0 00 000000 RTN
2966
2967 003437' 332 00 0 00 000000* PNTDNI: SKIPE NISEL ; NI exists?
2968 003440' 037 00 0 00 006060' TMSG <NI> ; yes - print such
2969 003441' 336 00 0 00 003437* SKIPN NISEL ; NI exists?
2970 003442' 037 00 0 00 006061' TMSG <RH5> ; no - print such
2971 003443' 263 17 0 00 000000 RTN
2972
2973 003444' 332 00 0 00 000000* PNTDCI: SKIPE CISEL ; CI exists?
2974 003445' 037 00 0 00 006062' TMSG <CI> ; yes - print such
2975 003446' 336 00 0 00 003444* SKIPN CISEL ; CI exists?
2976 003447' 037 00 0 00 006063' TMSG <RH7> ; no - print such
2977 003450' 263 17 0 00 000000 RTN
2978
2979 ; Miscellaneous (used for tests that have an execute table)
2980
2981 003451' 000000 000000 SCOOFF: 0 ; error offset
2982
2983
2984 ;#********************************************************************
2985 ; End Stmt for DFPTAU.MAC module
2986 ;#********************************************************************
2987
2988 XLIST
2989
NO ERRORS DETECTED
PROGRAM BREAK IS 006140
CPU TIME USED 00:12.805
81P CORE USED
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page S-1
DFPTAU MAC 6-Aug-83 09:31 SYMBOL TABLE SEQ 2144
ABUFF 006110' DECLIS 002607' FSARG 003016' PATRAN 001315'
ALTCHH 000031' ent DECYN 002571' ent FSARG0 003023' PBELL 037040 000007
ALTCHK 007000 000000 DING 010000 spd FSARGC 003042' PCRL 037000 030242
ALTCHX 000042' DROPDV 037240 000002 FSARGX 003052' PCRL2F 037040 030243
ALTF 005702' ext ERCAL 320740 000000 int FSELEC 037240 000004 PCRLF 037040 030242
ALTMGO 030063 ERDES 006114' FSKIPC 000735' PDEC 006000 000000
ARGFLG 002666' int ERFLG 000015 GENFLG 006120' PDEC0 000172'
ARGUM 002665' int ERHDR 003312' GENREP 006121' PDECF0 000220'
BUFCOM 000770' ent ERNRM0 003342' GENTYP 006122' PDECFS 000230'
BUFCR1 001115' ERNRML 003322' GET 262740 000000 PDECSS 000202'
BUFCRW 001077' ERPN0 003366' GETLOG 002321' ext PFORCE 037040 000026
BUFF 001324' ext ERPNC 003410' GO 260740 000000 PJRST 254000 000000
BUFG0 001032' ERPNCG 003416' HALTF 104000 000170 int PNTCHF 037500 000001
BUFG1 001041' ERPNE 003376' INDLIS 000502' ext PNTCI 037000 000000
BUFG2 001046' ERPNG 003406' INHMSG 100000 spd PNTCIF 037040 000000
BUFGEN 001001' ent ERPNM 003400' INITM 006123' PNTDCF 037640 000001
BUFGX 001054' ERPNT 003365' ITRCH1 030104 PNTDCI 003444'
BUFGXY 001066' ERRPC 030052 JEN 254500 000000 PNTDEC 037640 000000
BUFGXZ 001070' ERSHR0 003361' KLFLG 030041 PNTDEV 003434' ent
CADDR 000664' ext ERSHRT 003346' LASAR0 002724' PNTDNI 003437'
CFIBF 104000 000100 ERSTOP 002000 spd LASAR1 002730' PNTDS 037700 000000
CHKAR0 002700' EXT10 000565' LASARA 002734' PNTDSF 037700 000001
CHKARA 002707' EXTX 000567' LASARG 002713' ent PNTHW 037540 000000
CHKARG 002667' ent FEOL 003141' LASARX 002732' PNTHWF 037540 000001
CHKARX 002706' FEOL0 003142' LAST 010000 000000 spd PNTMSF 037040 000000
CHKARY 002704' FEOLX 003146' LCHAR 006124' int PNTMSG 037000 000000
CHRIN 000607' FFAIL 000640' LOGPNT 002322' ext PNTOCF 037740 000003
CHRINS 000614' FFF 002334' ext LOOPER 004000 spd PNTOCS 037700 000003
CHRINX 000626' FGETA 000721' LSTAM0 000500' PNTSIX 037000 000002
CISEL 003446' ext FGETA0 000722' LSTAMP 000464' PNTSXF 037040 000002
CLRBFI 051440 000000 FGETAE 000733' LSTAMX 000515' PORSEL 000000 ext
CLRBUF 000045' ent FGETD 000743' MAXPAT 000127 spd PORTCI 000000 ext
CLS10 000550' FGETD0 000747' MAXTIM 000413' int PORTNI 000000 ext
CLSX 000552' FGETD1 000764' MDEBUG 003163' ext PPDEC 000163' ent
CLZFF 104000 000034 int FGETDE 000765' MONTI0 000271' PPDECF 000211' ent
CONSW 030046 FGETW 000654' ent MONTI1 000274' PSDN 000105' ent
CONSWW 006111' FGETWE 000715' MONTIM 000262' ent PSDNF 000113'
CONVS0 000006' FILLFP 000115 spd MONTYP 030516 PSTAM0 000432'
CONVS1 000022' FILLVP 000127 spd NISEL 003441' ext PSTAMP 000416' ent
CONVSE 000017' FINCM0 002762' OLDRAN 006125' PSTAMX 000455'
CONVSP 000027' FINCMC 003001' P 000017 PTIME 000304' ent
CONVSS 006112' FINCMD 002755' ent PALERS 001000 spd PTIMEF 000312'
CONVSX 000000' ent FINCMX 003011' PARSER 002306' ent PUT 261740 000000
CORECT 002335' FINECH 000622' ext PAT 000014 RADLSC 030264
CURTIM 000412' int FINIT 000571' ent PATADR 001324' RANDBS 030022
CWORDL 003720' ext FINPUT 002752' ext PATBUF 001165' ent RDCSR 002313' ext
CWORDN 006113' FINSIX 006115' PATCN2 003760' spd RESET 104000 000147 int
CWORDR 003723' ext FIOFF 002740' ent PATCN3 003761' spd RST10 000533'
DATM0 001133' FOARG 003057' ent PATCN4 003762' spd RSTX 000535'
DATM1 001141' FOARG0 003065' PATCN6 001361' RTN 263740 000000
DATMES 001125' FOARGC 003117' PATCN7 001344' RUNALL 010000 spd
DATMX 001160' FOARGX 003133' PATCN8 001327' RUNTM0 000330'
DEBTIM 000414' int FOFLAG 006116' PATFLG 006126' RUNTM1 000332'
DEBUG2 001000 spd FORPNT 006117' int PATPNT 001375' ent RUNTM2 000361'
DECERR 002603' FREAD 037300 000004 PATRA1 001320' RUNTME 000320' ent
.MAIN MACRO %53A(1152) 11:01 16-Oct-84 Page S-2
DFPTAU MAC 6-Aug-83 09:31 SYMBOL TABLE SEQ 2145
RUNTMX 000403' UNAME 000652' int .RESET 000524' ent
SAVSWW 006127' USER 030037 .RSWIT 002134' int
SCOOFF 003451' int USTIM 000415' int .SARG 002445' ent
SCOP0 003177' UUT 006041' ext .SARG0 002460'
SCOP1 003202' VARPAT 006133' .SARG1 002462'
SCOP2 003205' VPATRN 000116 spd .SARGA 002505'
SCOP3 003215' WRDERR 006134' int .SARX1 002477'
SCOP4 003224' XX 006135' .SARX2 002476'
SCOPC 006130' XXT 006136' .SLEFT 001643'
SCOPE1 003150' ent XYZ 006137' .SLF1 001652'
SCOPX1 003235' ZU 000000' .SLF2 001663'
SCOPX2 003262' $CHRIN 030232 .SLF3 001667'
SCOPX3 003272' $SVUPC 030114 .SLF4 001670'
SCOPXX 003255' $SVUUO 030113 .SLF5 001675'
SCOSW 006131' int $TTCHR 030231 .SLF6 001730'
SPREP2 003160' ext $TWCNT 030225 .SLFX 001734'
STCLOK 000237' ent $TYPNB 030233 .SRG2 001753'
STCU 000251' .CGOT 002374' int .SRG3 001764'
STCX 000255' .CLOSE 000536' ent .SRG4 001767'
SWCHPT 002156' ent .COMM 002350' ent .SRG5 001770'
SWCOM 002165' ent .COMM0 002355' .SRG6 001777'
SWCOM0 002204' .COMM1 002365' .SRG6A 002025'
SWCOMP 002255' .COMM2 002401' .SRG6B 002031'
SWCOMT 002224' .COMM3 002413' .SRG7 002041'
SWCOMX 002220' .COMM4 002423' .SRGX 002045'
SWITCH 037400 000002 .COMM5 002431' .SRIGT 001744'
SWITT 001564' ent .COMM6 002436' .SWCH0 001542'
SWPSWW 006132' .CTBL 002377' .SWCH1 001552'
SWRGT 001571' int .CTYP 002375' .SWCHP 001525' ent
TAKFIL 002744' ext .DARG 002612' ent .SWIN 002055'
TIME 104000 000014 int .DARG0 002625' .SWIN0 002063'
TMRST1 000260' .DARG1 002627' .SWPNT 001632'
TMRUN1 000410' .DARGA 002653' .SWTXT 001640'
TPAT 003773' ext .DARX1 002645'
TSTCLS 000501' ext .DARX2 002644'
TSTINH 000000 ext .EXIT 000554' ent
TSTNUM 000504' ext .FHSLF 400000 sin
TSTOFF 003350' ext .ISWT 001572' ent
TSTPC 003323' ext .ISWT2 001575'
TSTPNT 003316' ext .ISWT6 001606'
TSTREP 003356' ext .ISWT7 001607'
TSTSUB 003200' ext .ISWT8 001611'
TTALTM 037340 000003 .ISWTB 001613'
TTICNV 037240 000003 .ISWTX 001614'
TTIOCT 037140 000003 .ISWTY 001624'
TTNBRF 030510 .ISWTZ 001627'
TTSIXB 037400 000003 .LSWIT 002100' int
TTYINP 037440 000003 .LSWTN 002116'
TTYY0 000065' .OARG 002516' ent
TTYY1 000067' .OARG0 002531'
TTYYES 000061' ent .OARG1 002533'
TXNOT 040000 000000 spd .OARGA 002557'
TXTINH 000200 spd .OARX1 002551'
TXYES 020000 000000 spd .OARX2 002550'
UDEBUG 003161' ext .PNTOC 000121' ent
ABUFF 1896# 1896
ALTCHH 10 119# SEQ 2146
ALTCHX 122 125 129#
ALTF 51# 2017 2106 2225 2315 2361 2762 2786 2802 2810
ALTMGO 131 2017 2020 2069 2106 2109 2159 2225 2228 2278 2313 2318 2345 2359
2364 2388
ARGFLG 39 2024 2049 2052 2113 2139 2142 2232 2258 2261 2300# 2313 2359
ARGUM 39 2045 2130 2192 2249 2299#
BUFCOM 28 885#
BUFCR1 999# 1007
BUFCRW 892 987#
BUFF 48# 920 991 993 1037 1188
BUFG0 929# 939
BUFG1 928 947#
BUFG2 955# 965
BUFGEN 28 894#
BUFGX 940 969# 1009
BUFGXY 972 974 979#
BUFGXZ 970 981#
CADDR 48# 780 785
CHKAR0 2325# 2337
CHKARA 2317 2333 2345#
CHKARG 38 2311#
CHKARX 2314 2324 2339 2344#
CHKARY 2328 2340 2342#
CHRIN 715# 717 786 822 834 852
CHRINS 725# 2423 2443 2473 2493 2522 2554 2579
CHRINX 727 736#
CISEL 50# 2973 2975
CLRBUF 9 138# 1551 1619 1662 1683
CLS10 643 648#
CLSX 647 650#
CONSW 1406 1464 1754 1794
CONSWW 1433# 1433 1453 1462 1519 1526 1541 1563 1565 1567 1569 1584 1591 1609
1637 1639 1641 1643
CONVS0 82# 90
CONVS1 83 100#
CONVSE 86 94#
CONVSP 80 82 106#
CONVSS 78# 78 79
CONVSX 10 76#
CORECT 1897 1901#
CURTIM 15 462 522#
CWORDL 48# 781 792 795 799
CWORDN 1038# 1038
CWORDR 48# 782 802 805 808
DATM0 1019 1020#
DATM1 1027 1032#
DATMES 934 960 1002 1016#
DATMX 1025 1028 1050#
DEBTIM 15 459 524#
DEBUG2 2821
DECERR 2196 2200#
DECLIS 2193 2204#
DECYN 38 2190# SEQ 2147
DING 2757
ERDES 2888# 2888 2889 2892 2930
ERFLG 2701 2707 2709 2718 2769 2820 2822
ERHDR 2748 2833#
ERNRM0 2854 2860#
ERNRML 2844#
ERPN0 2889# 2903
ERPNC 2896 2935#
ERPNCG 2939 2943 2945#
ERPNE 2894 2898 2899 2900 2901 2908#
ERPNG 2897 2930#
ERPNM 2895 2913#
ERPNT 2751 2888#
ERRPC 2722 2725 2776 2778 2792
ERSHR0 2873 2878#
ERSHRT 2840 2867#
ERSTOP 2760
EXT10 670 677#
EXTX 675 680#
FEOL 2323 2366 2578#
FEOL0 2579# 2582
FEOLX 2580 2583#
FFAIL 696 752#
FFF 55# 1878 1891 1899
FGETA 783 821#
FGETA0 822# 827
FGETAE 823 829 831# 835
FGETD 790 793 796 803 806 828 848#
FGETD0 852# 864
FGETD1 855 857 865#
FGETDE 853 860 866#
FGETW 23 778#
FGETWE 784 787 791 794 797 804 807 810#
FILLFP 902 1141#
FILLVP 904 1169#
FINCM0 2423# 2437
FINCMC 2426 2428 2430 2441#
FINCMD 23 2417#
FINCMX 2424 2454#
FINECH 50# 731
FINIT 23 692#
FINPUT 50# 743 2029 2118 2237 2322 2365 2396 2406
FINSIX 2419# 2419 2421 2446 2469 2471 2496
FIOFF 38 2396# 2454 2504 2567
FOARG 23 2119 2238 2517#
FOARG0 2522# 2533 2547
FOARGC 2525 2527 2529 2551#
FOARGX 2523 2536 2540 2567#
FOFLAG 2521# 2521 2531 2546 2558
FORPNT 15 408# 408 415 480 482 485 487 493 495 497 499 505 507
509 511
FSARG 2030 2467#
FSARG0 2473# 2487 SEQ 2148
FSARGC 2476 2478 2480 2491#
FSARGX 2474 2504#
FSKIPC 825 834# 839
GENFLG 886# 886 894 909 930 932 956 958 969
GENREP 887# 887 889 973 1018 1024
GENTYP 895# 895
GETLOG 55# 1888
INDLIS 49# 548 587
INHMSG 2746
INITM 357# 357 392# 392 393# 393 394# 394
ITRCH1 1911
KLFLG 1890
LASAR0 2368# 2379
LASAR1 2371 2382 2384#
LASARA 2363 2388#
LASARG 38 2058 2148 2267 2357#
LASARX 2360 2367 2375 2381 2386#
LAST 2902
LCHAR 15 534# 534 564 575# 575 599 2788 2789 2815 2816
LOGPNT 55# 1889
LOOPER 2767
LSTAM0 577 579 585#
LSTAMP 573# 2790
LSTAMX 581 599#
MAXPAT 1173#
MAXTIM 15 523#
MDEBUG 48# 2708
MONTI0 384 389#
MONTI1 388 392#
MONTIM 14 358 382# 450
MONTYP 143 145 383 615 642 669
NISEL 50# 2967 2969
OLDRAN 1178# 1178 1183
P 103 176 190 199 215 216 707 718 729 730 809 830 865 980
1663 1664 1665 1674 1684 1685 1777 1952 1990 1997 1998 2056 2060 2064
2065 2080 2146 2150 2154 2155 2170 2198 2199 2265 2269 2273 2274 2287
2332 2344 2386 2387 2447 2497 2560 2713 2749 2809 2825 2826 2849 2868
PALERS 2740
PARSER 38 1877#
PAT 896 899 903 912 927 929 947 981 989
PATADR 1155 1188#
PATBUF 28 929 947 1063# 1141 1147 1166 1169 1173
PATCN2 1159# 1163
PATCN3 1160# 1164
PATCN4 1161# 1165
PATCN6 1165 1226#
PATCN7 1164 1210#
PATCN8 1163 1194#
PATFLG 905# 905 912
PATPNT 28 1243#
PATRA1 1154 1181#
PATRAN 1154 1177#
PDEC0 257# 264 SEQ 2149
PDECF0 296# 303
PDECFS 295 303#
PDECSS 256 264#
PNTDCI 2964 2973#
PNTDEV 9 545 2835 2956#
PNTDNI 2962 2967#
PORSEL 50#
PORTCI 50#
PORTNI 50#
PPDEC 10 252#
PPDECF 10 291#
PSDN 10 188#
PSDNF 197#
PSTAM0 536 538 544#
PSTAMP 14 532# 2817
PSTAMX 540 564#
PTIME 14 406#
PTIMEF 413# 557 596
RADLSC 257 259 296 298
RANDBS 1181
RDCSR 55# 1882
RST10 616 620#
RSTX 619 622#
RUNALL 2819
RUNTM0 447 450#
RUNTM1 449 455#
RUNTM2 476 492#
RUNTME 14 409 416 441#
RUNTMX 514#
SAVSWW 1432# 1432 1466
SCOOFF 44 2727 2733 2981#
SCOP0 2723 2733#
SCOP1 2739#
SCOP2 2728 2735 2745#
SCOP3 2741 2747 2756#
SCOP4 2718 2761 2766#
SCOPC 2714# 2714 2724 2775 2791
SCOPE1 43 2680#
SCOPX1 2769 2783#
SCOPX2 2785 2787 2801 2807#
SCOPX3 2803 2815#
SCOPXX 2768 2777 2779 2799#
SCOSW 44 2697# 2697 2739 2745 2756 2759 2766 2818 2838 2861 2879 2913 2935
SPREP2 48# 2702
STCLOK 14 347#
STCU 350 357#
STCX 356 361#
SWCHPT 33 1752#
SWCOM 33 1764#
SWCOM0 1770 1792#
SWCOMP 1766 1838#
SWCOMT 1767 1810#
SWCOMX 1788 1804# SEQ 2150
SWITT 33 1344 1347 1406# 1431 1452 1465 1792 1798 2696
SWPSWW 1437# 1437 1468# 1468
SWRGT 34 1409 1412# 1463 1795
TAKFIL 50# 737 740 2400 2403
TMRST1 355 360 365# 456
TMRUN1 448 451 455 520#
TPAT 50# 1167
TSTCLS 49# 547 586
TSTINH 51#
TSTNUM 49# 550 589
TSTOFF 49# 2846 2850 2869
TSTPC 49# 2845
TSTPNT 49# 2837
TSTREP 49# 559 2853 2856 2872 2875
TSTSUB 49# 552 591 2726 2734
TTNBRF 2131 2250 2334 2376 2551
TTYY0 163# 167 174
TTYY1 165# 168
TTYYES 9 160# 1481
TXNOT 2921 2941
TXTINH 2839 2914 2920 2936 2940
TXYES 2915 2937
UDEBUG 48# 2706
UNAME 24 693 695 700 703 754 757 763#
USER 138 349 446 613 638 665 1407 1438 1447 1768 1877
USTIM 15 460 525#
UUT 48# 2956
VARPAT 948# 948 955
VPATRN 903 927 1147#
WRDERR 29 885 971# 971 976 979 1020
XX 130# 130 217# 217
XXT 2075# 2075 2165# 2165 2282# 2282 2326# 2326 2369# 2369
XYZ 1895# 1895
ZU 62#
$CHRIN 120
$SVUPC 212 242 254 260 281 293 299 320 2680 2795 2809 2825
$SVUUO 127 212 222 244 254 255 262 283 293 294 301 322 2681 2795
2809 2825
$TTCHR 2041 2050 2078 2132 2140 2168 2251 2259 2285 2329 2335 2372 2377 2441
2491 2552
$TWCNT 166 2076 2166 2283 2327 2370
$TYPNB 2177 2294
.CGOT 39 1948 1957#
.CLOSE 19 638#
.COMM 38 1928# 2194
.COMM0 1935# 1937
.COMM1 1938 1948#
.COMM2 1936 1972#
.COMM3 1980# 1987
.COMM4 1982 1988#
.COMM5 1984 1992#
.COMM6 1976 1995#
.CTBL 1962# 1977 1979 SEQ 2151
.CTYP 1930 1959# 1978
.DARG 38 2223#
.DARG0 2244# 2253
.DARG1 2240 2249# 2295
.DARGA 2245 2282#
.DARX1 2227 2239 2268 2270 2272 2278# 2288 2290 2293
.DARX2 2233 2254 2274# 2284
.EXIT 19 665#
.FHSLF 389 644 672
.ISWT 33 1425#
.ISWT2 1431#
.ISWT6 1443#
.ISWT7 1439 1447#
.ISWT8 1452#
.ISWTB 1448 1457#
.ISWTX 1462#
.ISWTY 1467 1470#
.ISWTZ 1469 1473#
.LSWIT 34 1546 1692#
.LSWTN 1540 1707#
.OARG 38 2104#
.OARG0 2125# 2134
.OARG1 2121 2130# 2178
.OARGA 2126 2165#
.OARX1 2108 2120 2149 2151 2153 2159# 2171 2173 2176
.OARX2 2114 2135 2155# 2167
.PNTOC 10 210#
.RESET 19 613#
.RSWIT 34 1603 1614 1629 1728#
.SARG 38 2015#
.SARG0 2036# 2043
.SARG1 2032 2041# 2087
.SARGA 2037 2075#
.SARX1 2019 2031 2059 2061 2063 2069# 2081 2083 2086
.SARX2 2025 2044 2065# 2077
.SLEFT 1443 1516#
.SLF1 1519# 1525
.SLF2 1524 1529#
.SLF3 1533# 1558
.SLF4 1534# 1553 1566 1570
.SLF5 1540# 1562
.SLF6 1560 1567#
.SLFX 1527 1538 1556 1572#
.SRG2 1584# 1590
.SRG3 1589 1594#
.SRG4 1597#
.SRG5 1598# 1604 1621 1640 1644
.SRG6 1606# 1627 1631 1636
.SRG6A 1628# 1630
.SRG6B 1626 1633#
.SRG7 1634 1641#
.SRGX 1592 1602 1624 1646#
.SRIGT 1457 1581# SEQ 2152
.SWCH0 1349# 1395
.SWCH1 1350 1393#
.SWCHP 33 1338#
.SWIN 1523 1588 1660#
.SWIN0 1672# 1682
.SWPNT 1427 1479#
.SWTXT 1483 1486#
ALTCHK 166 2037 2126 2245 2326 2369
CFIBF 146 SEQ 2153
CLRBFI 144
CLZFF 645
DROPDV 640
ERCAL 391 618 646
FMSG 164 198 304 305 306 307 308 309 310 311 312 313 314 315
316 317 318 319 486 498 510 546 554 556 558 593 595 1346
1356 1357 1358 1359 1360 1361 1362 1363 1364 1365 1366 1367 1368 1369
1370 1371 1372 1374 1375 1376 1377 1378 1379 1380 1382 1383 1384 1385
1386 1387 1388 1391 1392 1522 1543 1545 1587 1611 1613 1776 1778 1779
1780 1781 1782 1783 1784 1785 1786 1838 1839 1840 1841 1842 1843 1844
1845 1846 1847 1848 1849 1850 1851 1852 1853 1854 1855 1856 1857 1858
1859 1860 1861 1862
FMSGC 544 585 736 753 1340 1353 1434 1470 1480 1774 1796 1884 1885 2399
FMSGCD 1898 1901 2085 2175 2195 2292 2342 2384
FMSGD 562 597 742 759 1787 1801 1803 2405
FREAD 715 726
FSELEC 694
GET 94 96 101 103 126 129 130 147 149 177 179 194 203 217
242 244 260 262 281 283 299 301 320 322 361 363 398 410
417 467 514 516 565 567 600 602 650 680 697 706 733 744
760 810 812 831 866 868 981 983 1008 1050 1052 1204 1206 1220
1222 1235 1237 1397 1399 1473 1475 1572 1574 1646 1648 1757 1804 1806
1909 1910 1942 1944 1950 1952 1988 1990 1992 1994 1995 1997 2069 2071
2075 2159 2161 2165 2200 2202 2278 2280 2282 2326 2345 2347 2369 2388
2390 2407 2448 2450 2456 2458 2498 2500 2506 2508 2561 2563 2569 2571
2583 2793 2795 2807 2809 2823 2825 2948 2950
GO 358 409 416 450 545 557 596 696 783 786 790 793 796 803
806 822 825 828 834 852 933 934 959 960 1002 1154 1155 1163
1164 1165 1344 1347 1427 1431 1443 1452 1457 1465 1481 1523 1551 1588
1619 1662 1683 1792 1798 1878 1882 1888 1889 1891 1899 1936 2030 2058
2119 2148 2194 2238 2267 2323 2366 2423 2443 2454 2473 2493 2504 2522
2554 2567 2579 2696 2702 2748 2751 2790 2817 2835 2837 2894 2947 2962
2964
HALTF 673
JEN 1911
PBELL 2758
PCRL 1039 2018 2107 2226 2316 2362 2917 2923
PCRL2F 1531 1595 1669
PCRLF 1396 1436 1472 1520 1529 1554 1585 1622 1666 1675
PDEC 1040
PFORCE 1479 2833
PJRST 1662 1669 1674 2915 2921 2941
PNTCHF 732
PNTCI 702
PNTCIF 202 739 756 2402
PNTDCF 201 481 494 506 561
PNTDEC 192 483 496 508 977 2858 2877
PNTDS 258
PNTDSF 297
PNTHW 1043 1046 2862 2880
PNTHWF 1345 1435 1471 1755 1887
PNTMSF 164 198 304 305 306 307 308 309 310 311 312 313 314 315
316 317 318 319 486 498 510 544 546 554 556 558 562 585 SEQ 2154
593 595 597 736 742 753 759 1340 1346 1353 1356 1357 1358 1359
1360 1361 1362 1363 1364 1365 1366 1367 1368 1369 1370 1371 1372 1374
1375 1376 1377 1378 1379 1380 1382 1383 1384 1385 1386 1387 1388 1391
1392 1434 1470 1480 1522 1530 1543 1545 1587 1594 1611 1613 1774 1776
1778 1779 1780 1781 1782 1783 1784 1785 1786 1787 1796 1801 1803 1838
1839 1840 1841 1842 1843 1844 1845 1846 1847 1848 1849 1850 1851 1852
1853 1854 1855 1856 1857 1858 1859 1860 1861 1862 1884 1885 1898 1901
2085 2175 2195 2292 2342 2384 2399 2405
PNTMSG 189 193 229 230 231 232 233 234 235 236 237 238 239 265
266 267 268 269 270 271 272 273 274 275 276 277 278 279
280 488 500 512 699 705 975 978 1034 1035 1041 1044 1243 1244
1245 1246 1247 1248 1249 1250 1251 1252 1253 1254 1255 1256 1257 1258
1259 1260 1261 1262 1263 1264 1265 1266 1267 1268 1269 1270 1271 1272
1273 1274 1275 1276 1277 1278 1279 1280 1281 1282 1283 1284 1285 1286
1287 1288 1289 1290 1291 1292 1293 1294 1295 1296 1297 1298 1299 1300
1301 1302 1303 1304 1305 1306 1307 1308 1309 1310 1311 1312 1313 1314
1315 1316 1317 1318 1319 1320 1321 1322 1323 1324 1325 1326 1327 1328
1329 1330 1483 1548 1616 1753 1756 2752 2834 2836 2844 2848 2852 2855
2859 2860 2867 2871 2874 2878 2908 2918 2924 2957 2958 2959 2960 2961
2963 2968 2970 2974 2976
PNTOCF 551 555 590 594 1521 1586
PNTOCS 241 2847 2851 2870
PNTSIX 701 704
PNTSXF 549 588 738 741 755 758 1547 1615 2401 2404
PUT 76 78 119 140 142 160 162 188 197 210 212 214 252 254
291 293 347 349 382 406 413 441 443 532 534 573 575 641
668 692 725 752 778 780 821 848 850 897 899 987 989 1016
1018 1194 1196 1210 1212 1226 1228 1338 1340 1425 1427 1516 1518 1581
1583 1752 1764 1766 1879 1881 1928 1930 1972 1974 2015 2017 2104 2106
2190 2192 2223 2225 2311 2313 2357 2359 2398 2417 2419 2467 2469 2517
2519 2578 2680 2681 2682 2684 2945 2947
RESET 617
RGET 94 101 147 177 242 260 281 299 320 361 467 514 565 600
810 866 981 1050 1204 1220 1235 1397 1473 1572 1646 1804 1942 1950
1988 1992 1995 2069 2159 2200 2278 2345 2388 2448 2456 2498 2506 2561
2569 2793 2807 2823 2948
RPUT 76 140 160 210 252 291 347 441 532 573 778 848 897 987
1016 1194 1210 1226 1338 1425 1516 1581 1764 1879 1928 1972 2015 2104
2190 2223 2311 2357 2417 2467 2517 2682 2945
RTN 96 104 139 149 179 195 204 244 262 283 301 322 363 391
399 411 418 468 516 567 602 614 618 622 639 646 651 666
681 698 708 716 719 734 745 761 812 832 838 868 896 935
961 983 1052 1179 1184 1190 1206 1222 1237 1399 1410 1475 1482 1484
1574 1648 1667 1670 1676 1686 1758 1806 1944 1953 1991 1994 1999 2071
2161 2202 2280 2347 2390 2397 2408 2445 2450 2458 2495 2500 2508 2556
2563 2571 2584 2795 2811 2827 2863 2881 2890 2904 2909 2919 2922 2925
2926 2931 2942 2944 2950 2965 2971 2977
SWITCH 1408
TIME 390
TMSG 189 193 229 230 231 232 233 234 235 236 237 238 239 265
266 267 268 269 270 271 272 273 274 275 276 277 278 279
280 488 500 512 978 1041 1044 1243 1244 1245 1246 1247 1248 1249
1250 1251 1252 1253 1254 1255 1256 1257 1258 1259 1260 1261 1262 1263 SEQ 2155
1264 1265 1266 1267 1268 1269 1270 1271 1272 1273 1274 1275 1276 1277
1278 1279 1280 1281 1282 1283 1284 1285 1286 1287 1288 1289 1290 1291
1292 1293 1294 1295 1296 1297 1298 1299 1300 1301 1302 1303 1304 1305
1306 1307 1308 1309 1310 1311 1312 1313 1314 1315 1316 1317 1318 1319
1320 1321 1322 1323 1324 1325 1326 1327 1328 1329 1330 1548 1616 1753
2836 2848 2852 2855 2859 2860 2867 2871 2874 2878 2957 2958 2959 2960
2961 2963 2968 2970 2974 2976
TMSGC 699 975 1034 1035 1756 2844 2908
TMSGCD 2752 2834
TMSGD 705
TTALTM 2783 2799
TTICNV 2244 2325 2368
TTIOCT 2125
TTSIXB 165 2036
TTYINP 1549 1617 1660 1680
LINK symbol map of DFPTA version (1) page 1
Produced by LINK version 5A(1775) on 16-Oct-84 at 11:02:26 SEQ 2156
Low segment starts at 0 ends at 240030 length 240031 = 161P
487 words free in Low segment
519 Global symbols loaded, therefore min. hash size is 577
Start address is 30000, located in program DFPTA
*************
JOBDAT-INITIAL-SYMBOLS
Zero length module
*************
DFPTA from XTRA:DFPTAT.REL created by MACRO on 16-Oct-84 at 9:26:24
Low segment starts at 140 ends at 30740 length 30601 (octal), 12673. (decimal)
*************
DFPTA from DSK:DFPTA1.REL created by MACRO on 16-Oct-84 at 9:28:33
Low segment starts at 30741 ends at 115360 length 64420 (octal), 26896. (decimal)
AAPNT 44226 Entry Absolute AEBUF 44435 Global Absolute
AEXEC 44113 Entry Absolute ALACT 44221 Global Absolute
ALCOR 44220 Global Absolute ALCSR 44215 Global Absolute
ALEBF 44216 Global Absolute ALERR 44217 Global Absolute
ALFLC 44224 Global Absolute ALFLE 44223 Global Absolute
ALFLS 44222 Global Absolute ALFLT 44225 Global Absolute
ALSRT 44214 Global Absolute ALTF 115267 Global Relocatable
ALTIM 44213 Global Absolute BBPNT 44440 Entry Absolute
BEXEC 44264 Entry Absolute BUFF 47000 Global Absolute
CADDR 37255 Global Absolute CALPAR 43125 Entry Absolute
CBUF 51003 Entry Absolute CCPNT 45340 Entry Absolute
CCSR 45323 Global Absolute CDERR 45330 Global Absolute
CEBUF 44436 Global Absolute CEBUFA 45326 Global Absolute
CEBUFC 45325 Global Absolute CEXEC 45006 Entry Absolute
CISEL 46300 Entry Absolute CLEN 45332 Global Absolute
CPAT 45331 Global Absolute CSRENG 43237 Entry Absolute
CSRPNT 43215 Entry Absolute CSTATF 45334 Global Absolute
CSTWRD 51320 Entry Absolute CWORDL 37256 Global Absolute
CWORDR 37257 Global Absolute DISMS 104000000167 Global Absolute
DRCRAM 37735 Entry Absolute DWCRAM 37703 Entry Absolute
FINECH 115301 Global Relocatable FINPUT 115302 Global Relocatable
GETJI 104000000507 Global Absolute GTAD 104000000227 Global Absolute
IADDR 46064 Global Absolute ICSR 46066 Global Absolute
IDEBUG 115305 Global Relocatable IEXEC 45442 Entry Absolute
IFLAG 46070 Global Absolute IIOPF 46071 Global Absolute
IIPNT 46104 Entry Absolute INDLIS 31123 Entry Absolute
IPRINT 42145 Entry Absolute LDEBUG 115307 Global Relocatable
MDEBUG 115313 Global Relocatable MLOADN 42507 Entry Absolute
MLOADY 42511 Entry Absolute NISEL 46277 Entry Absolute
NSSTEP 44044 Global Absolute ODELAY 42430 Entry Absolute
PARFLG 35271 Global Absolute PGMNAM 30600 Global Absolute
LINK symbol map of DFPTA version (1) page 2
DFPTA SEQ 2157
PMODE 46330 Global Absolute PORSEL 46301 Entry Absolute
PORTCI 46276 Entry Absolute PORTNI 46275 Entry Absolute
QADDR 45321 Global Absolute QADDRF 45322 Global Absolute
SAADDR 44047 Global Absolute SDEBUG 115340 Global Relocatable
SEADDR 44046 Global Absolute SEXEC 43712 Entry Absolute
SPEAR2 115343 Entry Relocatable SPREP2 43532 Entry Absolute
SSADDR 44045 Global Absolute SSPNT 44050 Entry Absolute
START 30610 Entry Absolute STARTA 30711 Entry Absolute
SYERR 104000000527 Global Absolute TADDR 44724 Global Absolute
TADDRF 44725 Global Absolute TAKFIL 32564 Global Absolute
TCSRF 44726 Global Absolute TEBUFA 44731 Global Absolute
TEBUFC 44730 Global Absolute TEXEC 44523 Entry Absolute
TLOAD 43161 Entry Absolute TPAT 51002 Global Absolute
TRACE 42224 Entry Absolute TSLOD1 115345 Global Relocatable
TSLOD2 115346 Global Relocatable TSTADD 46311 Entry Absolute
TSTCLS 46304 Entry Absolute TSTFLG 46310 Entry Absolute
TSTINH 46317 Global Absolute TSTMIC 46312 Entry Absolute
TSTMSK 46313 Entry Absolute TSTNAM 46303 Entry Absolute
TSTNUM 46305 Entry Absolute TSTOFF 46322 Entry Absolute
TSTPC 46307 Entry Absolute TSTPNT 42405 Entry Absolute
TSTREP 46314 Entry Absolute TSTSUB 46306 Entry Absolute
TTPNT 44734 Entry Absolute TWORD 51000 Global Absolute
UDEBUG 115354 Global Relocatable UUT 46302 Entry Absolute
*************
.MAIN from DSK:DFPTA2.REL created by MACRO on 16-Oct-84 at 9:33:50
Low segment starts at 115361 ends at 131255 length 13675 (octal), 6077. (decimal)
TSTE1 115361 Entry Relocatable TSTE10 116177 Entry Relocatable
TSTE11 116265 Entry Relocatable TSTE12 116316 Entry Relocatable
TSTE13 116354 Entry Relocatable TSTE14 116467 Entry Relocatable
TSTE15 116543 Entry Relocatable TSTE16 116601 Entry Relocatable
TSTE17 116757 Entry Relocatable TSTE2 115406 Entry Relocatable
TSTE20 117005 Entry Relocatable TSTE21 117034 Entry Relocatable
TSTE22 117067 Entry Relocatable TSTE23 117145 Entry Relocatable
TSTE24 117354 Entry Relocatable TSTE25 117424 Entry Relocatable
TSTE26 117514 Entry Relocatable TSTE27 117572 Entry Relocatable
TSTE3 115504 Entry Relocatable TSTE30 117653 Entry Relocatable
TSTE31 117730 Entry Relocatable TSTE32 120010 Entry Relocatable
TSTE33 120062 Entry Relocatable TSTE34 120135 Entry Relocatable
TSTE35 120225 Entry Relocatable TSTE36 120517 Entry Relocatable
TSTE37 120573 Entry Relocatable TSTE4 115575 Entry Relocatable
TSTE40 120622 Entry Relocatable TSTE41 120734 Entry Relocatable
TSTE42 121101 Entry Relocatable TSTE43 121153 Entry Relocatable
TSTE44 121224 Entry Relocatable TSTE45 121274 Entry Relocatable
TSTE46 121343 Entry Relocatable TSTE47 121414 Entry Relocatable
TSTE5 115670 Entry Relocatable TSTE50 121614 Entry Relocatable
TSTE51 122013 Entry Relocatable TSTE52 122211 Entry Relocatable
TSTE53 122216 Entry Relocatable TSTE54 122265 Entry Relocatable
TSTE55 122332 Entry Relocatable TSTE56 122406 Entry Relocatable
TSTE57 122457 Entry Relocatable TSTE6 115757 Entry Relocatable
TSTE60 122524 Entry Relocatable TSTE61 122701 Entry Relocatable
TSTE62 122762 Entry Relocatable TSTE63 123064 Entry Relocatable
LINK symbol map of DFPTA version (1) page 3
.MAIN SEQ 2158
TSTE64 123164 Entry Relocatable TSTE65 123411 Entry Relocatable
TSTE66 123635 Entry Relocatable TSTE67 123642 Entry Relocatable
TSTE7 116013 Entry Relocatable TSTE70 123647 Entry Relocatable
TSTE71 124103 Entry Relocatable TSTE72 124345 Entry Relocatable
TSTE73 124600 Entry Relocatable TSTE74 124763 Entry Relocatable
TSTE75 125174 Entry Relocatable TSTE76 125325 Entry Relocatable
*************
.MAIN from DSK:DFPTA3.REL created by MACRO on 16-Oct-84 at 9:41:48
Low segment starts at 131256 ends at 143473 length 12216 (octal), 5262. (decimal)
TSTS1 131256 Entry Relocatable TSTS10 132170 Entry Relocatable
TSTS11 132243 Entry Relocatable TSTS12 132311 Entry Relocatable
TSTS13 132371 Entry Relocatable TSTS14 132441 Entry Relocatable
TSTS15 132545 Entry Relocatable TSTS16 132737 Entry Relocatable
TSTS17 133131 Entry Relocatable TSTS2 131417 Entry Relocatable
TSTS20 133325 Entry Relocatable TSTS21 133515 Entry Relocatable
TSTS22 133711 Entry Relocatable TSTS23 133767 Entry Relocatable
TSTS24 134047 Entry Relocatable TSTS25 134131 Entry Relocatable
TSTS26 134215 Entry Relocatable TSTS27 134303 Entry Relocatable
TSTS3 131504 Entry Relocatable TSTS30 134310 Entry Relocatable
TSTS31 134400 Entry Relocatable TSTS32 134514 Entry Relocatable
TSTS33 134572 Entry Relocatable TSTS34 134636 Entry Relocatable
TSTS35 134722 Entry Relocatable TSTS36 135164 Entry Relocatable
TSTS37 135256 Entry Relocatable TSTS4 131605 Entry Relocatable
TSTS40 135354 Entry Relocatable TSTS41 135454 Entry Relocatable
TSTS42 135534 Entry Relocatable TSTS43 135633 Entry Relocatable
TSTS44 135725 Entry Relocatable TSTS45 136005 Entry Relocatable
TSTS46 136074 Entry Relocatable TSTS47 136170 Entry Relocatable
TSTS5 131706 Entry Relocatable TSTS50 136260 Entry Relocatable
TSTS51 136644 Entry Relocatable TSTS52 136734 Entry Relocatable
TSTS53 137131 Entry Relocatable TSTS54 137553 Entry Relocatable
TSTS55 137655 Entry Relocatable TSTS56 140165 Entry Relocatable
TSTS57 140255 Entry Relocatable TSTS6 132042 Entry Relocatable
TSTS60 140327 Entry Relocatable TSTS61 140405 Entry Relocatable
TSTS62 140501 Entry Relocatable TSTS63 140601 Entry Relocatable
TSTS64 140651 Entry Relocatable TSTS65 141021 Entry Relocatable
TSTS66 141166 Entry Relocatable TSTS67 141372 Entry Relocatable
TSTS7 132115 Entry Relocatable TSTS70 141551 Entry Relocatable
*************
.MAIN from DSK:DFPTA4.REL created by MACRO on 16-Oct-84 at 9:54:16
Low segment starts at 143474 ends at 153517 length 10024 (octal), 4116. (decimal)
TSTA1 143474 Entry Relocatable TSTA10 144706 Entry Relocatable
TSTA11 144770 Entry Relocatable TSTA12 145052 Entry Relocatable
TSTA13 145134 Entry Relocatable TSTA14 145573 Entry Relocatable
TSTA15 145654 Entry Relocatable TSTA16 146070 Entry Relocatable
TSTA17 146347 Entry Relocatable TSTA2 143747 Entry Relocatable
TSTA20 146624 Entry Relocatable TSTA21 147115 Entry Relocatable
TSTA22 147460 Entry Relocatable TSTA23 150141 Entry Relocatable
TSTA24 150446 Entry Relocatable TSTA25 150755 Entry Relocatable
LINK symbol map of DFPTA version (1) page 4
.MAIN SEQ 2159
TSTA26 151246 Entry Relocatable TSTA27 151511 Entry Relocatable
TSTA3 144332 Entry Relocatable TSTA30 152002 Entry Relocatable
TSTA4 144414 Entry Relocatable TSTA5 144467 Entry Relocatable
TSTA6 144542 Entry Relocatable TSTA7 144624 Entry Relocatable
*************
.MAIN from DSK:DFPTA5.REL created by MACRO on 16-Oct-84 at 10:03:54
Low segment starts at 153520 ends at 157431 length 3712 (octal), 1994. (decimal)
TSTA31 153520 Entry Relocatable
*************
.MAIN from DSK:DFPTA6.REL created by MACRO on 16-Oct-84 at 10:20:42
Low segment starts at 157432 ends at 164013 length 4362 (octal), 2290. (decimal)
TSTA32 157432 Entry Relocatable
*************
.MAIN from DSK:DFPTA7.REL created by MACRO on 16-Oct-84 at 10:27:55
Low segment starts at 164014 ends at 167711 length 3676 (octal), 1982. (decimal)
TSTA33 164014 Entry Relocatable TSTA34 164151 Entry Relocatable
TSTA35 164313 Entry Relocatable TSTA36 165347 Entry Relocatable
TSTA37 166032 Entry Relocatable TSTA40 166260 Entry Relocatable
TSTA41 166503 Entry Relocatable TSTA42 166723 Entry Relocatable
*************
.MAIN from DSK:DFPTA8.REL created by MACRO on 16-Oct-84 at 10:39:03
Low segment starts at 167712 ends at 203334 length 13423 (octal), 5907. (decimal)
TSTU1 167712 Entry Relocatable TSTU10 171237 Entry Relocatable
TSTU11 171343 Entry Relocatable TSTU12 171421 Entry Relocatable
TSTU13 171555 Entry Relocatable TSTU14 171645 Entry Relocatable
TSTU15 172143 Entry Relocatable TSTU16 172401 Entry Relocatable
TSTU17 173227 Entry Relocatable TSTU2 170066 Entry Relocatable
TSTU20 173437 Entry Relocatable TSTU21 173611 Entry Relocatable
TSTU22 174002 Entry Relocatable TSTU23 174173 Entry Relocatable
TSTU24 174364 Entry Relocatable TSTU25 174557 Entry Relocatable
TSTU26 174747 Entry Relocatable TSTU27 175130 Entry Relocatable
TSTU3 170142 Entry Relocatable TSTU30 175424 Entry Relocatable
TSTU31 175661 Entry Relocatable TSTU32 176221 Entry Relocatable
TSTU33 176515 Entry Relocatable TSTU34 176737 Entry Relocatable
TSTU35 177051 Entry Relocatable TSTU36 200240 Entry Relocatable
TSTU37 200433 Entry Relocatable TSTU4 170217 Entry Relocatable
TSTU40 200521 Entry Relocatable TSTU41 200603 Entry Relocatable
TSTU5 170316 Entry Relocatable TSTU6 170422 Entry Relocatable
TSTU7 170731 Entry Relocatable
*************
LINK symbol map of DFPTA version (1) page 5
SEQ 2160
.MAIN from DSK:DFPTA9.REL created by MACRO on 16-Oct-84 at 10:52:11
Low segment starts at 203335 ends at 217421 length 14065 (octal), 6197. (decimal)
TSTC1 203335 Entry Relocatable TSTC10 206054 Entry Relocatable
TSTC11 206371 Entry Relocatable TSTC12 206436 Entry Relocatable
TSTC13 206545 Entry Relocatable TSTC14 207045 Entry Relocatable
TSTC15 207344 Entry Relocatable TSTC16 207657 Entry Relocatable
TSTC17 210170 Entry Relocatable TSTC2 204174 Entry Relocatable
TSTC20 210501 Entry Relocatable TSTC21 211013 Entry Relocatable
TSTC22 211273 Entry Relocatable TSTC23 211552 Entry Relocatable
TSTC24 212030 Entry Relocatable TSTC25 212311 Entry Relocatable
TSTC26 212417 Entry Relocatable TSTC27 212727 Entry Relocatable
TSTC3 204401 Entry Relocatable TSTC30 213245 Entry Relocatable
TSTC31 213561 Entry Relocatable TSTC32 214077 Entry Relocatable
TSTC33 214415 Entry Relocatable TSTC34 214701 Entry Relocatable
TSTC35 215164 Entry Relocatable TSTC36 215446 Entry Relocatable
TSTC37 215727 Entry Relocatable TSTC4 204507 Entry Relocatable
TSTC5 204632 Entry Relocatable TSTC6 205147 Entry Relocatable
TSTC7 205552 Entry Relocatable
*************
.MAIN from DSK:DFPTAA.REL created by MACRO on 16-Oct-84 at 11:00:32
Low segment starts at 217422 ends at 225352 length 5731 (octal), 3033. (decimal)
TSTC40 217422 Entry Relocatable TSTC41 217605 Entry Relocatable
TSTC42 220035 Entry Relocatable TSTC43 220125 Entry Relocatable
TSTC44 220214 Entry Relocatable TSTC45 220427 Entry Relocatable
TSTC46 220614 Entry Relocatable TSTC47 220750 Entry Relocatable
TSTC50 221175 Entry Relocatable TSTC51 221312 Entry Relocatable
TSTC52 221563 Entry Relocatable TSTC53 221635 Entry Relocatable
TSTC54 222222 Entry Relocatable TSTC55 222572 Entry Relocatable
TSTC56 223113 Entry Relocatable TSTC57 223435 Entry Relocatable
TSTC60 223774 Entry Relocatable
*************
.MAIN from DSK:DFPTAI.REL created by MACRO on 16-Oct-84 at 11:01:42
Low segment starts at 225353 ends at 231670 length 4316 (octal), 2254. (decimal)
AADDR 225776 Global Relocatable CBASE 227652 Global Relocatable
CCWPNT 227432 Entry Relocatable CHDATA 227746 Entry Relocatable
CHINIT 227023 Entry Relocatable CHKCSR 225671 Entry Relocatable
CLREBU 225655 Entry Relocatable DEVREL 230104 Entry Relocatable
DEVREQ 230161 Entry Relocatable DSETUP 227763 Entry Relocatable
EADDR 225775 Global Relocatable EPCAP 104000000151 Global Absolute
ERCAL 320740000000 Global Absolute ERESET 225533 Entry Relocatable
ERSTR 104000000011 Global Absolute FFF 230411 Entry Relocatable
GENCCW 227061 Entry Relocatable GETLOG 227231 Entry Relocatable
HAVECI 230157 Global Relocatable HAVENI 230160 Global Relocatable
IDELAY 226442 Global Relocatable INITPD 226107 Entry Relocatable
INITPI 226063 Entry Relocatable INTAPR 226540 Global Relocatable
INTCON 226514 Global Relocatable INTCSR 226634 Global Relocatable
LINK symbol map of DFPTA version (1) page 6
.MAIN SEQ 2161
INTEND 226704 Global Relocatable INTNUM 226443 Global Relocatable
INTPC 226444 Global Relocatable INTTIM 226564 Global Relocatable
INTTYP 226470 Global Relocatable INTUSE 226610 Global Relocatable
IPACLR 225616 Entry Relocatable IPASRT 225710 Entry Relocatable
IPASST 225777 Entry Relocatable IPASTP 225742 Entry Relocatable
ISTOP 225542 Entry Relocatable LDCRAM 225410 Entry Relocatable
LDCSR 225363 Entry Relocatable LDEBUF 225353 Entry Relocatable
LDRAR 225374 Entry Relocatable LOGBUF 227674 Global Relocatable
LOGPNT 227355 Entry Relocatable PF500 226761 Global Relocatable
PF501 226762 Global Relocatable PF502 226763 Global Relocatable
PFAIL 226765 Global Relocatable PFAPR 226760 Global Relocatable
PFCLR 226766 Entry Relocatable PFSET 226736 Entry Relocatable
PISYOF 226141 Entry Relocatable PISYON 226144 Entry Relocatable
RDCRAM 225461 Entry Relocatable RDCSR 225433 Entry Relocatable
RDEBUF 225423 Entry Relocatable RDLAR 225450 Entry Relocatable
REL 230131 Entry Relocatable REQ1 230220 Entry Relocatable
REQ2 230231 Entry Relocatable RPCAP 104000000150 Global Absolute
SDATA 225774 Global Relocatable SETEBU 225623 Entry Relocatable
SETLAR 225640 Entry Relocatable SETVEC 226147 Entry Relocatable
SLAST 225773 Global Relocatable SNARKF 230437 Global Relocatable
SNEXT 225772 Global Relocatable USRIO 104000000310 Global Absolute
USRIOF 230363 Entry Relocatable USRION 230343 Entry Relocatable
.CONI 225472 Entry Relocatable .CONO 225502 Entry Relocatable
.DATAI 225513 Entry Relocatable .DATAO 225523 Entry Relocatable
.FHSLF 400000 Global Absolute Suppressed .INPNT 226705 Entry Relocatable
.INWD1 226734 Global Relocatable .INWD2 226735 Global Relocatable
.PIOFF 226113 Entry Relocatable .PION 226125 Entry Relocatable
*************
.MAIN from DSK:DFPTAU.REL created by MACRO on 16-Oct-84 at 11:02:01
Low segment starts at 231671 ends at 240030 length 6140 (octal), 3168. (decimal)
ALTCHH 231722 Entry Relocatable ARGFLG 234557 Global Relocatable
ARGUM 234556 Global Relocatable BUFCOM 232661 Entry Relocatable
BUFGEN 232672 Entry Relocatable CHKARG 234560 Entry Relocatable
CLRBUF 231736 Entry Relocatable CLZFF 104000000034 Global Absolute
CONVSX 231671 Entry Relocatable CURTIM 232303 Global Relocatable
DEBTIM 232305 Global Relocatable DECYN 234462 Entry Relocatable
FGETW 232545 Entry Relocatable FINCMD 234646 Entry Relocatable
FINIT 232462 Entry Relocatable FIOFF 234631 Entry Relocatable
FOARG 234750 Entry Relocatable FORPNT 240010 Global Relocatable
HALTF 104000000170 Global Absolute LASARG 234604 Entry Relocatable
LCHAR 240015 Global Relocatable MAXTIM 232304 Global Relocatable
MONTIM 232153 Entry Relocatable PARSER 234177 Entry Relocatable
PATBUF 233056 Entry Relocatable PATPNT 233266 Entry Relocatable
PNTDEV 235325 Entry Relocatable PPDEC 232054 Entry Relocatable
PPDECF 232102 Entry Relocatable PSDN 231776 Entry Relocatable
PSTAMP 232307 Entry Relocatable PTIME 232175 Entry Relocatable
RESET 104000000147 Global Absolute RUNTME 232211 Entry Relocatable
SCOOFF 235342 Global Relocatable SCOPE1 235041 Entry Relocatable
SCOSW 240022 Global Relocatable STCLOK 232130 Entry Relocatable
SWCHPT 234047 Entry Relocatable SWCOM 234056 Entry Relocatable
SWITT 233455 Entry Relocatable SWRGT 233462 Global Relocatable
LINK symbol map of DFPTA version (1) page 7
.MAIN SEQ 2162
TIME 104000000014 Global Absolute TTYYES 231752 Entry Relocatable
UNAME 232543 Global Relocatable USTIM 232306 Global Relocatable
WRDERR 240025 Global Relocatable .CGOT 234265 Global Relocatable
.CLOSE 232427 Entry Relocatable .COMM 234241 Entry Relocatable
.DARG 234503 Entry Relocatable .EXIT 232445 Entry Relocatable
.ISWT 233463 Entry Relocatable .LSWIT 233771 Global Relocatable
.OARG 234407 Entry Relocatable .PNTOC 232012 Entry Relocatable
.RESET 232415 Entry Relocatable .RSWIT 234025 Global Relocatable
.SARG 234336 Entry Relocatable .SWCHP 233416 Entry Relocatable
*************
Index to LINK symbol map of DFPTA version (1) page 8
SEQ 2163
Name Page Name Page Name Page Name Page
DFPTA 1 .MAIN 3 .MAIN 4 .MAIN 5
DFPTA 1 .MAIN 4 .MAIN 4 .MAIN 5
.MAIN 2 .MAIN 4 .MAIN 5 .MAIN 6
.MAIN 3
[End of LINK map of DFPTA]