; KL10 Microcode for TOPS-20 4 February 1985 V1(357) MICRO %34(270) Page TOC-1 ; Table of Contents ; 1 KLX.MIC[4,30] 17:12 9-Aug-84 ; 22 EDHIS.MIC[4,30] 13:59 4-Feb-85 ; 39 REVISION HISTORY ; 1029 DEFINE.MIC[4,30] 17:12 9-Aug-84 ; 1030 CONDITIONAL ASSEMBLY VARIABLE DEFINITIONS ; 1191 HOW TO READ THE MICROCODE -- FORMATS & CONSTRUCTS ; 1394 MICROCODE LISTING TEMPLATE ; 1445 KL10 INSTRUCTION OPCODE MAP ; 1501 CONTROL RAM DEFINITIONS -- J, AD ; 1557 CONTROL RAM DEFINITIONS -- DATA PATH MIXERS ; 1630 CONTROL RAM DEFINITIONS -- 10-BIT LOGIC ; 1663 CONTROL RAM DEFINITIONS -- SHIFT, ARMM, VMA, TIME ; 1697 CONTROL RAM DEFINITIONS -- MEM SPECIAL FUNCTIONS ; 1726 CONTROL RAM DEFINITIONS -- SKIP/COND SPECIAL FUNCTIONS ; 1818 CONTROL RAM DEFINITIONS -- DISP/SPEC SPECIAL FUNCTIONS ; 1870 CONTROL RAM DEFINITIONS -- MAGIC NUMBER FIELD ; 2189 DISPATCH RAM DEFINITIONS ; 2235 MACRO.MIC[4,30] 17:12 9-Aug-84 ; 2236 CRAM Macros--Miscellaneous and A ; 2286 CRAM Macros--AR ; 2512 CRAM Macros--AR Miscellaneous, ARL, and ARR ; 2584 CRAM Macros--ARX ; 2684 CRAM Macros--B, C, D ; 2791 CRAM Macros--E, F ; 2895 CRAM Macros--G, H, I, J, L ; 3008 CRAM Macros--M, N, O, P ; 3119 CRAM Macros--R ; 3179 CRAM Macros--S ; 3431 CRAM Macros--T, U, V, W, X ; 3541 DRAM Macros ; 3625 BASIC.MIC[4,30] 17:12 9-Aug-84 ; 3626 THE INSTRUCTION LOOP ; 3722 NEXT INSTRUCTION DISPATCH ; 3857 EFFECTIVE ADDRESS COMPUTATION AND OPERAND FETCH ; 3923 WAIT FOR (E) ; 3991 TERMINATION ; 4050 MOVE GROUP, EXCH, BLT ; 4093 XMOVEI, XHLLI, MOVEM, EXCH, BLT ; 4124 HALFWORD GROUP ; 4271 DMOVE, DMOVN, DMOVEM, DMOVNM ; 4312 BOOLEAN GROUP ; 4469 SKPJMP.MIC[4,30] 17:12 9-Aug-84 ; 4470 TEST GROUP ; 4579 COMPARE -- CAI, CAM ; 4605 ARITHMETIC SKIPS -- AOS, SOS, SKIP ; 4654 CONDITIONAL JUMPS -- JUMP, AOJ, SOJ, AOBJ ; 4710 AC DECODE JUMPS -- JRST, JFCL ; 4850 HALT LOOP ; 4879 MAP, XCT ; 4908 STACK INSTRUCTIONS -- PUSHJ, PUSH, POP, POPJ ; 5006 SUBROUTINE CALL/RETURN -- JSR, JSP, JSA, JRA ; 5056 UUO'S ; 5286 JSYS, ADJSP ; 5328 XCT, PXCT, SXCT ; 5402 SHIFT.MIC[4,30] 17:12 9-Aug-84 ; KL10 Microcode for TOPS-20 4 February 1985 V1(357) MICRO %34(270) Page TOC-2 ; Table of Contents ; 5403 ROTATES AND LOGICAL SHIFTS -- ROT, LSH, JFFO ; 5458 ROTATE AND LOGICAL SHIFT COMBINED -- ROTC, LSHC ; 5492 ARITHMETIC SHIFTS -- ASH, ASHC ; 5541 ARITH.MIC[4,30] 17:12 9-Aug-84 ; 5542 ADD, SUB ; 5567 MUL, IMUL ; 5618 MULTIPLY SUBROUTINE ; 5672 DIV, IDIV ; 5731 INTEGER DIVIDE SUBROUTINE ; 5771 BASIC DIVIDE LOOP ; 5820 DOUBLE INTEGER ARITHMETIC -- DADD, DSUB, DMUL, DDIV ; 5945 FP.MIC[4,30] 17:13 9-Aug-84 ; 5946 SINGLE FLOATING ADD & SUB -- FAD, FADR, FSB, FSBR ; 6024 SINGLE FLOATING MULTIPLY -- FMP, FMPR ; 6053 SINGLE FLOATING DIVIDE -- FDV, FDVR ; 6181 UFA, DFN, FSC, IBP ; 6250 FIX, FIXR, FLTR, EXTEND ; 6320 SINGLE PRECISION FLOATING NORMALIZATION ; 6461 DOUBLE FLOATING ARITHMETIC -- DFAD, DFSB, DFMP, DFDV ; 6612 DOUBLE PRECISION NORMALIZATION ; 6674 EXTEXP.MIC[4,30] 17:12 9-Aug-84 ; 6675 GFLT DOUBLE PRECISION ARITHMETIC ; 6794 GFLT MULTIPLY ; 6841 GFLT DIVIDE ; 6884 GFLT NORMALIZATION ; 7027 GFLT TO INTEGER CONVERSION ; 7153 GFLT DATA CONVERSION INSTRUCTIONS ; 7381 BYTE.MIC[4,30] 17:12 9-Aug-84 ; 7382 BYTE GROUP -- IBP, ILDB, LDB, IDPB, DPB ; 7510 INCREMENT BYTE POINTER SUBROUTINE ; 7634 BYTE EFFECTIVE ADDRESS EVALUATOR FOR XADDR SMP LDB ; 7685 LOAD BYTE SUBROUTINE ; 7708 DEPOSIT BYTE SUBROUTINE ; 7739 IBP, ADJBP ; 8006 BLT.MIC[4,30] 17:12 9-Aug-84 ; 8007 XBLT ; 8057 BLT ; 8145 EXTENDED ADDRESSING CODE FOR PXCT OF BLT ; 8182 IO.MIC[4,30] 17:12 9-Aug-84 ; 8183 I/O INSTRUCTIONS ; 8282 EXTERNAL DEVICE I/O INSTRUCTIONS ; 8376 INTERNAL DEVICE FUNCTIONS -- APR, CCA ; 8430 INTERNAL DEVICE FUNCTIONS -- PI ; 8485 TRACKS SUPPORT ; 8742 INTERNAL DEVICE FUNCTIONS -- PAG ; 8865 INTERNAL DEVICE FUNCTIONS -- TIM & MTR ; 8970 PRIORITY INTERRUPT PROCESSING ; 9146 KL-MODE PAGE REFILL LOGIC ; 9536 KI-MODE PAGE FAIL HANDLING ; 9686 PAGE FAIL/INTERRUPT CLEANUP FOR SPECIAL INSTRUCTIONS ; 9759 EIS.MIC[4,30] 17:12 9-Aug-84 ; 9760 EXTENDED INSTRUCTION SET DECODING ; 9929 ONE WORD GLOBAL BYTE POINTER SUBROUTINES FOR EXTEND ; 9984 EIS -- STRING MOVE ; 10104 EIS -- STRING COMPARE ; KL10 Microcode for TOPS-20 4 February 1985 V1(357) MICRO %34(270) Page TOC-3 ; Table of Contents ; 10177 EIS -- DECIMAL TO BINARY CONVERSION ; 10244 EIS -- BINARY TO DECIMAL CONVERSION ; 10402 EIS -- SRCMOD SUBROUTINE TO GET MODIFIED SOURCE BYTE ; 10607 EIS -- EDIT FUNCTION ; Cross Reference Index ; DCODE Location / Line Number Index ; UCODE Location / Line Number Index ; KL10 Microcode for TOPS-20 4 February 1985 V1(357) MICRO %34(270) Page 1 ; KLX.MIC[4,30] 17:12 9-Aug-84 KLX.MIC[4,30] 17:12 9-Aug-84 ; 1 ;PARAMETER CHANGES FOR KL10 20-SERIES MICROCODE, no common file system ; 2 ;MODEL B MACHINE EXTENDED ADDRESSING ; 3 ; 4 .SET/SNORM.OPT=1 ; 5 .SET/XADDR=1 ; 6 .SET/EPT540=1 ; 7 .SET/LONG.PC=1 ; 8 .SET/MODEL.B=1 ; 9 .SET/KLPAGE=1 ; 10 .SET/FPLONG=0 ; 11 .SET/BLT.PXCT=1 ; 12 .SET/SMP=0 ;No SMP (DOES RPW instead of RW FOR DPB, IDPB) ; 13 .SET/EXTEXP=1 ; 14 .SET/MULTI=1 ;DOES NOT CACHE PAGE TABLE DATA ; 15 .SET/NOCST=1 ;DOES NOT DO AGE UPDATES, ETC. WITH CST = 0 ; 16 .SET/OWGBP=1 ;ONE WORD GLOBAL BYTE POINTERS ; 17 .SET/IPA20=1 ;IPA20-L ; 18 .SET/GFTCNV=0 ;DO NOT DO GFLOAT CONVERSION INSTRUCTIONS [273] ; 19 ;SAVES 75 WORDS. MONITOR WILL TAKE CARE OF THEM. ; 20 .set/cst.write=0 ;No common file system support here ; 21 .set/ddt.bug=1 ;For now, hack the big page table APRID bit ; 22 ; KL10 Microcode for TOPS-20 4 February 1985 V1(357) MICRO %34(270) Page 1 ; EDHIS.MIC[4,30] 13:59 4-Feb-85 KLX.MIC[4,30] 17:12 9-Aug-84 ; 23 .NOBIN ; 24 ; 25 ; THE INFORMATION IN THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT ; 26 ; NOTICE AND SHOULD NOT BE CONSTRUED AS A COMMITMENT BY DIGITAL ; 27 ; EQUIPMENT CORPORATION. DIGITAL EQUIPMENT CORPORATION ASSUMES NO ; 28 ; RESPONSIBITY FOR ANY ERRORS THAT MAY APPEAR IN THIS DOCUMENT. ; 29 ; THE SOFTWARE DESCRIBED IN THIS DOCUMENT IS FURNISHED TO THE ; 30 ; PURCHASER UNDER A LICENSE FOR USE ON A SINGLE COMPUTER SYSTEM AND ; 31 ; CAN BE COPIED (WITH INCLUSION OF DIGITAL'S COPYRIGHT NOTICE) ONLY ; 32 ; FOR USE IN SUCH SYSTEM, EXCEPT AS MAY OTHERWISE BE PROVIDED IN WRITING ; 33 ; BY DIGITAL. ; 34 ; DIGITAL EQUIPMENT CORPORATION ASSUMES NO RESPONSIBILITY FOR THE ; 35 ; USE OR RELIABILITY OF ITS SOFTWARE ON EQUIPMENT THAT IS NOT SUPPLIED ; 36 ; BY DIGITAL. ; 37 ; COPYRIGHT (C) 1984,1985 DIGITAL EQUIPMENT CORPORATION ; 38 ; 39 .TOC "REVISION HISTORY" ; 40 ; 41 ; The following collection of people have contributed to the ; 42 ; production and maintenance of this code. In reverse chronological ; 43 ; order: ; 44 ; ; 45 ; QQSV (Dick Wagman) -- beginning with edit 301 ; 46 ; Sean Keenan ; 47 ; Don Dossa ; 48 ; Mike Newman ; 49 ; Jud Leonard ; 50 ; ; 51 ; ; 52 .TITLE "KL10 Microcode for TOPS-20 4 February 1985" ; 53 .VERSION/MAJOR=1/MINOR=0/EDIT=357/WHO=0 ; 54 ;REV WHY ; 55 ; ; 56 ;357 9 Aug 84--Add the 136 location constraint (forgotten in 356). ; 57 ;356 8 Aug 84--Make the # field of location 136 contain the major and ; 58 ; minor version numbers. Grab a random instruction with no # field ; 59 ; in use to do this. ; 60 ;353 21 May 84--LDB and DPB in version 1 were leaving state register bit ; 61 ; 3 set when the byte word was loaded, resulting in the page fault ; 62 ; handler treating it as if it were a string instruction and trying ; 63 ; to back up a byte pointer in AC1 when the reference page faulted. ; 64 ; Cure it by reseting the state register in GBYTE. (Sure hope this ; 65 ; is the last bug in version 1!) ; 66 ;347 20 Jan 84--Rewrite the MVST and CMPS dispatches to test for illegal ; 67 ; bits in the lengths before BRX gets smashed. UUO was reporting a ; 68 ; bogus op code in these situations. ; 69 ; Turn on BIG.PT by default, since it should work with both old and ; 70 ; new software and hardware. ; 71 ;346 18 Jan 84--Fix the .IFNOT variation of BIG.PT to clear the Keep ; 72 ; bit if anybody sets it. This was introduced in 343. ; 73 ; Add the DDT.BUG conditional. Under it, rewrite APRID to move ; 74 ; bit 23 to bit 5 if it is set in the serial number. This is a ; 75 ; piece of garbage which I hope can disappear soon (it seems EDDT ; 76 ; used the serial number to test for a KS-10!). ; 77 ; Fix the time field on the page map word type dispatch (the assembler ; 78 ; default was too high). Also make the PAGCNT conditional hang on ; KL10 Microcode for TOPS-20 4 February 1985 V1(357) MICRO %34(270) Page 1-1 ; EDHIS.MIC[4,30] 13:59 4-Feb-85 REVISION HISTORY ; 79 ; to the original AR value after it counts the PFH entry (this would ; 80 ; only matter for an AR parity error). ; 81 ;344 1 Dec 83--Save CVTBDx fill character address, which was getting lost ; 82 ; if OWGBPs were in use, in a manner similar to that used in CMPSx ; 83 ; (see edit 310). Also, fix some conditionals for EXPMSK constant ; 84 ; generation, so that OWGBPs will assemble with EXTEXP off. ; 85 ;342 8 Nov 83--Change definition of CLR PT LINE to be consistent with ; 86 ; new paging board (see also 333). Also, redefine bit 3 of effective ; 87 ; word to reverse keep sense (so unkept only pages are cleared when ; 88 ; bit 3 is set). ; 89 ;336 9 Aug 83--Back off 330 for a bit, since TOPS-10 7.02 must be tested ; 90 ; and OWGs in section 0 fail for string instructions (they get converted ; 91 ; to TWGs, which are illegal in section 0). For now, we will maintain ; 92 ; both sources. ; 93 ;335 Force memory to be released for SMP case of DPB if P > 36 causes no ; 94 ; actual data to be stored. Make an OWG reference to an address > ; 95 ; 37,,777777 cause a page fail (GBYTE was stripping the excess bits). ; 96 ;334 Fix conflict generated in CLRPT by 333 by creating new subroutine ; 97 ; ARSWAP which is just AR_AR SWAP. Make several other routines call it, ; 98 ; thus saving a few words. ; 99 ;333 Add new conditional BIG.PT. Under it, add code to implement the "Keep ; 100 ; me" bit for paging as bit 5 of the page table, and to move it to page ; 101 ; map bit 23 during page refill. Also make DATAO PAG not clear Kept ; 102 ; pages if bit 3 of the word is off. ; 103 ;332 Redefine all bank 7 ACs as R0,...,R17, and all bank 6 ACs as P0,..., ; 104 ; P17. Change all other alias definitions to refer to these. This ; 105 ; gives us a uniform cross reference for all scratch register references. ; 106 ; Put all macro definitions into alphabetical order, making it easier ; 107 ; to look up a macro definition. Split the edit history into its own ; 108 ; file. There are no functional changes from 331. ; 109 ;331 Allow XSFM anywhere. Clean up the code a bit in the process. There ; 110 ; still remain a number of references to XSFM or XPCW distinctions, ; 111 ; and these could almost certainly be cleaned up further. ; 112 ;330 Allow one word global byte pointers in section zero. This includes ; 113 ; changes in BYTE, EIS, and FP. Change GBYTE and CNV2WD to return 2; ; 114 ; eliminate GTST as obsolete. Also shuffle the calls to these routines ; 115 ; to conform to the new calling conventions, and put the OWG test at ; 116 ; the beginning of IBP, ILDB, IDBP, LDB, DPB, and ADJBP. ; 117 ;327 Add PAGCNT conditional. Under it, include control to count entry ; 118 ; into PFH code and DATAO PAG with bit 2 set. ; 119 ;326 Change VMA restoration in INC2WD and CNV2WD (see edits 320 and 307) ; 120 ; to use RSTR VMA_MQ in order to keep the global/local sense of the ; 121 ; reference. This was causing ILDBs of OWGs in shadow memory to ; 122 ; save the incremented byte pointer in the ACs instead of memory. ; 123 ;325 Add VMA/LOAD to local indexed EA computation for EXTEND E1 to make ; 124 ; it read the section number from VMA instead of PCS (!) if the index ; 125 ; is section local. ; 126 ;324 Force the XADDR conditional to use RPW type references for DPB and ; 127 ; IDPB if the SMP conditional is on, even if one word globals are not ; 128 ; active. ; 129 ;323 Add missing constraint near NOT.WR, accidentally broken by 322. ; 130 ;322 Generate the A(cessible) bit in a page fail word caused by a read ; 131 ; violation if the page is otherwise accessible and if no CST is present. ; 132 ; This could be fixed for the CST present case as well, but has been ; 133 ; deferred since we are tight on space and no one seems to need it ; 134 ; anyway. ; KL10 Microcode for TOPS-20 4 February 1985 V1(357) MICRO %34(270) Page 1-2 ; EDHIS.MIC[4,30] 13:59 4-Feb-85 REVISION HISTORY ; 135 ;321 Prevent statistics microcode from losing traps by forcing NICOND ; 136 ; dispatch 11 to ignore the statistics and take the trap. ; 137 ;320 Restore the VMA again in INC2WD (broken by 307), since the state ; 138 ; register bits may have changed in the interim. This was causing ; 139 ; PXCT to do surprising things (mostly bad). ; 140 ;317 Originally, this was an attempt to uncount multiply counted op ; 141 ; codes which resulted from interrupts during long instructions. ; 142 ; That project has been shelved for now. Instead, the second ; 143 ; NICOND dispatch during op code counting has had its final constraint ; 144 ; fixed. ; 145 ;316 Make counting only version compatible with time and counting by making ; 146 ; counting only version use TRX2 and TRX3, removing physical contiguity ; 147 ; requirement. ; 148 ;315 Op code counting lives again! The setup code activated by DATAO PI ; 149 ; was attempting to write the TRX registers with data fresh from memory, ; 150 ; resulting in parity checks when it was used (see edit 73, for example). ; 151 ; Juggle code to overlap next address calculation with parity wait. ; 152 ;314 Add CST.WRITE conditional to facilitate assembly of microcode ; 153 ; without the CST writable bit (see edit 303). ; 154 ;313 Put TIME/3T on XFERW, as the assembler was getting the wrong ; 155 ; value with both AR_MEM and ARX_MEM macros present. ; 156 ;312 Fix definition of BYTE RPW to include a write test. This was ; 157 ; causing the SMP version of DPB to hang when memory was readable ; 158 ; but not writable. ; 159 ;311 Make all IOP function 7 style of references look in the cache. ; 160 ;310 Improve the fix in 307 to save the computed E0+1 in FILL during ; 161 ; OWGBP conversion and to restore the VMA from there when done. ; 162 ; Also, make sure that the VMA is initialized to PC for all cases ; 163 ; when doing effective address calculations for two word globals ; 164 ; in string instructions. 307 was not enough to clean up the ; 165 ; CMPSx fill problem, since VMA HELD was never loaded. ; 166 ; Force EXT2WD to prereference AC4 and AC5 so that glitch discovered ; 167 ; for second edit 210 will not be activated. ; 168 ;307 Restore VMA from MQ at end of CNV2WD (and remove it from INC2WD, ; 169 ; saving a word in the process). This was causing CMPSx to load ; 170 ; a random fill word and MOVSLJ to store to a random place when the ; 171 ; source length was zero if one word globals were in use. ; 172 ; Force page fail code to look for ARX as well as AR parity errors ; 173 ; (now possible with BYTE RPW implemented). ; 174 ; Make sign extension of E1 go to right place in EXTEND decoding of ; 175 ; offset instructions (broken in 301). ; 176 ;306 Add University of Essex code to statistics (TRACKS) code to make ; 177 ; it work with address break enabled. ; 178 ;305 Fix CST write bit logic to not test bit 18 when reading. ; 179 ;304 Switch byte read interlock from LDB to DPB (broken in 303). ; 180 ;303 Implement bit 18 of a CST entry as a write enable bit in addition ; 181 ; to all the other write enable functions. ; 182 ; Knock one cycle out of byte deposit where the byte is being ; 183 ; deposited into the high order byte of a word. ; 184 ; Implement the SMP conditional for extended addressing by ; 185 ; replicating all the byte effective address calculation code for ; 186 ; DPB. This is unfortunate, but necessary due to the huge dispatch ; 187 ; table that ends this subroutine. ; 188 ;302 Move XFERW out of EIS (which no longer absolutely requires it ; 189 ; in line) into SKPJMP (more in the heart of things). Also ; 190 ; juggle comment lines and code layout to reduce the listing ; KL10 Microcode for TOPS-20 4 February 1985 V1(357) MICRO %34(270) Page 1-3 ; EDHIS.MIC[4,30] 13:59 4-Feb-85 REVISION HISTORY ; 191 ; size a bit and to force some of the .TOC lines into the table ; 192 ; of contents (even though the code nearby may be suppressed). ; 193 ;301 Fix ADJBP so that instructions which occur at the last word on ; 194 ; a page do not cause a page failure of some random type (one cycle ; 195 ; too many between I FETCH and NICOND). ; 196 ; Fix effective address calculation for EXTEND so that only offset ; 197 ; instructions (and not GSNGL, for example) will have E1 sign ; 198 ; smeared. ; 199 ; Implement XJRST. Also force JSP and JSR to do full 30 bit ; 200 ; effective address calculations. ; 201 ;300 ADD LOAD OF VMA FROM PC IN PUTDST TO GET THE SECTION ADDRESS ; 202 ; CORRECT ON THE STRING INSTRUCTIONS. ; 203 ;277 Add EA CALC table for SMP configurations of extended addressing ; 204 ; for TOPS-10. (TOPS-20 paging) ; 205 ;276 Force global EA CALC for EXTEND instructions in PUTDST. ; 206 ;275 FIX THE ERROR CODE IN STRING COMPARE FOR ILLEGAL BITS IN THE ; 207 ; LENGTH FIELD. WAS CAUSING AR PARITY ERRORS. ; 208 ;274 SAVE THE API FUNCTION WORD ON AN IO PAGE FAIL INSTEAD OF THE ; 209 ; PAGE FAIL WORD. THIS TAKES PLACE IN BOTH THE AC BLK 7 AC 2 ; 210 ; AND THE MONITOR. ; 211 ;273 PUT CONDITIONALS AROUND 4 GFLOAT CONVERSION INSTRUCTIONS. ; 212 ; THEY WILL ACT AS MUUO'S AND MONITOR WILL TAKE CARE OF THEM. ; 213 ;272 CONO APR 200000 AT TIMES WAS NOT GENERATING EBUS RESET OF A ; 214 ; SUFFICIENT LENGTH TO CLEAR DTE REGISTERS. ADDED ANOTHER ; 215 ; MICROWORD SO THAT CONO APR IS NOW UP FOR TWO FULL WORDS WHICH ; 216 ; GETS AROUND THE HARDWARE PROBLEM. ; 217 ;271 ILLEGAL INDIRECT PAGE FAIL (24) WAS NOT ALLOWING USER TO BE SET. ; 218 ;270 WHEN IN SECTIONS > 1, AN UPDATED OWGBP WOULD BE WRITTEN INTO ; 219 ; MEMORY INSTEAD OF THE AC'S. ; 220 ;267 CHANGED TESTS FOR OWGBP TO TEST FOR PC SEC0 FIRST. SAVES 33 NS. ; 221 ;266 CONDITIONALS ON FOR TOPS-20 DEVELOPMENT. ; 222 ;265 REMOVED EDIT 244. SOFTWARE ENGINEERING WILL SUPPLY MONITOR ; 223 ; CODE TO TAKE CARE OF PROBLEM. CODE COSTS TOO MUCH TIME IN ; 224 ; THE INSTRUCTION EXECUTION. ; 225 ;264 ADDED CONDITIONALS TO CODE FOR IPA20, OWGBP AND NO CST UPDATE IF ; 226 ; CBR IS ZERO. THIS IS FOR RELEASE 5 OF TOPS-20. ; 227 ;263 IBP DID NOT CLEAR FPD ON EXIT. ; 228 ;262 ALLOW XBLT TO BE VALID IN SECTION 0. ; 229 ;261 FIX CODE AT END OF ADJBP CODE TO CLEAR STATE REG. IF ILDB ; 230 ; WITH 2 WD GLOBAL POINTER POINTING TO ADDRESS NOT IN CORE ; 231 ; CLEAN DISPATCHES TO WRONG CODE BECAUSE SR LEFT OVER FROM ; 232 ; ADJBP. ; 233 ;260 FIX FM PARITY ERRORS AT MVF1: ADDED NULL CALL TO RET2: ; 234 ; AT MVST: TO TAKE CARE OF EXTRA TICK FOR PARITY. ; 235 ;257 MAKE SURE THAT THE UPDATED ONE WORD GLOBAL BYTE POINTER IS ; 236 ; WRITTEN BACK INTO THE CORRECT CONTEXT. ; 237 ;256 MAKE ANOTHER ATTEMPT TO FIX PXCT OF ONE WORD GLOBAL BYTE POINTERS. ; 238 ; THE GIBP CODE GETS THE SAME CHANGES AS EDIT 255. ; 239 ;255 MAKE ONE WORD GLOBAL BYTE POINTERS WORK WITH PXCT. THE STATE ; 240 ; REGISTER BITS ON MCL4 (NOT TO BE CONFUSED WITH CON3), WERE NOT ; 241 ; BEING SET PROPERLY TO ALLOW PREVIOUS ENA AND USER ENA TO BE SET. ; 242 ; GUARANTEE THAT THESE SR BITS ARE SET PRIOR TO THE LOAD OF THE VMA. ; 243 ;254 FIX PROBLEM WITH OWGBP WHERE FPD DOES NOT EFFECT ; 244 ; INC OF POINTER AFTER PAGE FAIL ; 245 ;253 FIXED ADDRESSING FOR SH DISP AT GADJL0: ; 246 ;252 MOVE STRING INSTRUCTIONS DO NOT GET THE CORRECT DATA ON ; KL10 Microcode for TOPS-20 4 February 1985 V1(357) MICRO %34(270) Page 1-4 ; EDHIS.MIC[4,30] 13:59 4-Feb-85 REVISION HISTORY ; 247 ; LOCAL POINTERS IN NON 0 SECTIONS ; 248 ;251 ADD CODE FOR ONE WORD GLOBAL BYTE POINTERS. ; 249 ; TOOK OUT EDITS 243 AND 250 TO GET ENOUGH SPACE IN CRAM ; 250 ; FOR THIS EDIT. OWGBP WITH EXTEND INSTRUCTIONS WILL NOT ; 251 ; RETURN A OWGBP. THEY WILL RETURN A TWO WORD GLOBAL BP. ; 252 ;250 ALLOW SMP SWITCH TO EFFECT TOPS-20 MODEL B TO DO RPW IN ; 253 ; BYTE INSTRUCTIONS. ; 254 ;247 DO NOT DO A CST UPDATE OR AGE UPDATE IF THE CBR IS ZERO. ; 255 ;246 EXTEND OP CODE DECODE FOR MODEL A WAS ACCEPTING MODEL B ; 256 ; OP CODES (20-31). ADDED CONDITIONALS TO CODE TO FIX. ; 257 ;245 FIX 2 WORD GLOBAL BYTE POINTER BUG WITH IBP INSTRUCTION ; 258 ; WITH EXTENDED ADDRESSING OUT OF SECTION 0 ; 259 ;244 FIX MOVST EXTEND INST. SO THAT ILLEGAL (> 36) S FIELD ; 260 ; DOES NOT CAUSE STOP CODE TO CRASH SYSTEM FOR TOPS-10 MODEL B. ; 261 ;243 WRTIME TRIED TO DO MEM WRITE EVEN THOUGH THE INSTRUCTION ; 262 ; DOES NOT DO ANYTHING TO MEMORY. CAUSED PROBLEMS IF THE MEMORY ; 263 ; LOCATION WAS NOT WRITABLE. ; 264 ;242 FIX CODE FROM EDIT 234 TO GET PF CODE OF 24. ; 265 ;241 FIX DFAD AND DFMP FOR ROUNDING OCCURS PROPERLY. ADDED STICKY ; 266 ; BIT FOR LEAST SIGNIFICANT BITS OF THE RESULT. ; 267 ;240 FIX GFLT INSTRUCTIONS GFIX AND DGFIX SO THEY WILL TRUNCATE NEGATIVE ; 268 ; NUMBERS IN THE CORRECT DIRECTION. THE MQ MUST BE ZERO BEFORE ; 269 ; THE ARX_2 MACRO IS INVOKED OR THE ARX MIGHT GET A 3 FROM MQ00. ; 270 ;237 ADD OPTION BIT FOR PV CPU IN THE APRID WORD AS IT IS DOCUMENTED ; 271 ; IN ALL OF THE HARDWARE DOCUMENTATION. SET THE BIT ACCORDING ; 272 ; TO THE MODEL.B OPTION SWITCH. IT WILL BE MAGIC NUMBER BIT 3. ; 273 ;236 ALLOW THE INTEGER DIVIDE OF THE LARGEST NEGATIVE NUMBER BY ; 274 ; PLUS ONE TO SUCCEED. THIS USED TO BE A DOCUMENTED RESTRICTION ; 275 ; THAT THIS OPERATION WOULD CAUSE AN OVERFLOW AND NO DIVIDE. ; 276 ;235 FIX JRA SO IT DOESN'T FALL INTO SECTION ZERO FROM A NON-ZERO ; 277 ; SECTION EVERY TIME BY WRITING THE PC SECTION INTO THE VMAX. ; 278 ;234 BUILD A PAGE FAIL CODE OF 24 WHEN AN ILLEGAL INDIRECT WORD ; 279 ; IS FOUND DURING THE EFFECTIVE ADDRESS CALCULATION IN ; 280 ; A NON-ZERO SECTION. THE PAGE FAIL CODE WAS PREVIOUSLY NOT ; 281 ; BEING REPORTED. ; 282 ;233 SAVE THE IOP FUNCTION WORD THAT APPEARS ON THE EBUS WHEN AN ; 283 ; EXTERNAL DEVICE INTERRUPTS THE CPU. SAVE THIS INFORMATION ; 284 ; ON EVERY INTERRUPT IN AC BLOCK 7, AC 3. THE CONTENTS ; 285 ; OF THIS AC WILL BE PRESERVED UNTIL THE NEXT INTERRUPT. ; 286 ; OPERATING SYSTEMS SHOULD SAVE THIS INFORMATION AS SOON AS POSSIBLE ; 287 ; IF ITS CONTENTS ARE TO BE RELIABLE AND MEANINGFUL. ; 288 ;232 ADDS 13 NEW INSRUCTIONS FOR SUPPORTING FORTRAN78 ON MODEL ; 289 ; B MACHINES. THESE INSTRUCTIONS ARE: ; 290 ; OPCODE SYMBOL ; 291 ; ====== ====== ; 292 ; 102 GFAD AC,E ; 293 ; 103 GFSB AC,E ; 294 ; 106 GFMP AC,E ; 295 ; 107 GFDV AC,E ; 296 ; EXTEND INSTRUCTIONS EXTEND OPCODE ; 297 ; ====== ============ ====== ====== ; 298 ; EXTEND AC,[GSNGL 0,E] 21 ; 299 ; EXTEND AC,[GDBLE 0,E] 22 ; 300 ; EXTEND AC,[DGFIX 0,E] 23 ; 301 ; EXTEND AC,[GFIX 0,E] 24 ; 302 ; EXTEND AC,[DGFIXR 0,E] 25 ; KL10 Microcode for TOPS-20 4 February 1985 V1(357) MICRO %34(270) Page 1-5 ; EDHIS.MIC[4,30] 13:59 4-Feb-85 REVISION HISTORY ; 303 ; EXTEND AC,[GFIXR 0,E] 26 ; 304 ; EXTEND AC,[DGFLTR 0,E] 27 ; 305 ; EXTEND AC,[GFLTR 0,E] 30 ; 306 ; EXTEND AC,[GFSC 0,E] 31 ; 307 ;231 FIX IN PROBLEM IN EDIT 215 TO XDPB THAT PREVENTED THE KL ; 308 ; FROM HANDLING INTERRUPTS WHILE EVALUTAING AN INDEXED INDIRECT CHAIN. ; 309 ; AN "=0" WAS MISSING BY BYTEIP. ; 310 ;230 TO PRESERVE COMPATABILITY WITH THE KS10 AND BECAUSE OF SPACE ; 311 ; LIMITATIONS IN TOPS20 MODEL A, THE SPECIFICATION FOR THE ; 312 ; CVTDBX INSTRUCTIONS HAVE BEEN CHANGED TO ELIMINATE THE NEED ; 313 ; FOR AN OVERFLOW TEST DURING THE CONVERSION. THIS CHANGE ; 314 ; EFFECTIVELY REMOVES EDIT 221. ; 315 ;227 DELETE EDIT 222 AND RETURN THE CVTBDX INSTRUCTIONS TO THEIR ; 316 ; OLD, BROKEN FUNCTIONALITY SINCE ANY ATTEMPT TO PREVENT THE ; 317 ; FLAGS FROM BEING CHANGED PREMATURELY HAS TO CONTEND WITH ; 318 ; INTERRUPTABILITY PROBLEMS. THE HARDWARE REFERENCE MANUAL ; 319 ; HAS A FOOTNOTE ABOUT THE FLAG PROBLEM SO THE CURRENT FUNCTIONALITY ; 320 ; IS DOCUMENTED FOR USERS. ; 321 ;226 PREVENT AR PARITY ERRORS WHEN INCREMENTING BYTE POINTERS IN THE ACS. ; 322 ;225 THE CODE TO SUPPORT THE MX20 VIA THE SBUS DIAG LOOP MECHANISM ; 323 ; DOES NOT TIME OUT CORRECTLY BECAUSE THE LOOP COUNTER IS BEING ; 324 ; REINITIALIZED EVERY TIME THROUGH THE LOOP. FIX THIS PROBLEM ; 325 ; EVEN THOUGH THE CODE IS NOT ASSEMBLED IN CURRENT RELEASES. ; 326 ;224 FIX BUG IN EDIT 223 THAT CAUSED THE WRONG PAGE FAIL ; 327 ; WORD TO BE WRITTEN WHEN AN I/O PAGE FAIL OCCURS. ; 328 ;223 WHEN A MEMORY PARITY ERROR OCCURRS AT PI LEVEL, AS EVIDENCED ; 329 ; BY AN AR DATA PARITY ERROR, THE DTE MAY BE WAITING FOR A ; 330 ; RESPONSE. IF IT IS, A DEX FAILURE WILL OCCUR UNLESS WE CAUSE ; 331 ; DEMAND TO WIGGLE. WE CAN DO THIS BY FORCING THE DATA IN THE ; 332 ; AR OVER THE EBUS. ; 333 ;222 CVTBDX IS NOT SUPPOSED TO CHANGE THE CONTENTS OF THE ACS ; 334 ; OR MEMORY IF THE CONVERTED NUMBER WILL NOT FIT INTO THE ; 335 ; DESTINATION FIELD. IT WAS, HOWEVER, CHANGING THE FLAGS ; 336 ; BEFORE IT KNEW IF THE NUMBER WOULD FIT. ; 337 ;221 THE CVTDBX WERE FAILING TO SET OV AND TRAP1 WHEN THE ; 338 ; CONVERTED DECIMAL NUMBER WOULD NOT FIT INTO A ; 339 ; DOUBLE WORD. ; 340 ;220 THE TRANSLATE INSTRUCTIONS WERE USING A 15 BIT WIDE ; 341 ; FIELD FOR THE REPLACEMENT BYTE IN THE TRANSLATE TABLE ; 342 ; WHILE THE SPECIFICATION STATED THAT THE TRANSLATE ; 343 ; INSTRUCTIONS WOULD USE ONLY 12 BITS. ; 344 ;217 PREVENT CRAM PARITY ERRORS CAUSED BY DISPATCHING TO LOCATION ; 345 ; 3042 WHEN INDEXING IS SPECIFIED IN THE EFFECTIVE ADDDRESS ; 346 ; CALCULATION OF E1 WHEN THE EXTEDED OPCODE IS ZERO (ILLEGAL). ; 347 ; THE FIX IS TO PUT A JUMP TO UUO AT 3042. ; 348 ;216 CHANGE THE DEFAULT VALUE FOR THE SMP SWITCH TO BE ONE. THIS ; 349 ; CAUSES THE MICROCODE TO INCLUDE SMP SUPPORT BY DEFAULT. ; 350 ;215 CHANGES DPB INSTRUCTION TO R-P-W CYCLE ON DATA FETCH PORTION OF ; 351 ; INSTRUCTION TO SOLVE AN INTERACTION PROBLEM IN AN SMP OPERATING ; 352 ; SYSTEM. THIS CHANGE ONLY APPLIES TO MICROCODES FOR TOPS-10 ; 353 ; AND TOPS-20, MODEL A. ; 354 ;214 ADDED CHANGES FOR XADR, RELEASE 4 AS FOLLOWS. ; 355 ; STORE PREVIOUS CONTEXT SECTION (PCS) IN FLAGS WORD (BITS 31-35) ; 356 ; IF EXEC MODE AND XSFM OR XPCW INSTRUCTION,MUUO OR PAGE FAIL. ; 357 ; RESTORE PCS FROM FLAGS WORDS (BITS 31-35) WHEN XJRSTF OR XJEN ; 358 ; IS EXECUTED IN EXEC MODE AND THE NEW PC IS ALSO IN EXEC MODE. ; KL10 Microcode for TOPS-20 4 February 1985 V1(357) MICRO %34(270) Page 1-6 ; EDHIS.MIC[4,30] 13:59 4-Feb-85 REVISION HISTORY ; 359 ;213 SET/FPLONG=0 PARAMETER ADDED TO TOPS-10 MICROCODE FOR KL MODEL ; 360 ; A AND MODEL B. ; 361 ;212 CHANGE THE CODE AT LDIND: TO TEST FOR USER MODE IF USER MODE ; 362 ; TURN OFF SPECIAL CYCLE THAT MAY STILL BE ON. THE MICROCODE WILL DEPEND ; 363 ; ON KERNAL PROGRAMS TO NOT GET IN PAGE POINTER ; 364 ; LOOPS. INSTRUCTIONS EXECUTED FROM THE CONSOLE WILL NOT WORK. ; 365 ; PI INSTRUCTIONS GET A RESTRICTION TO NOT GET INDIRECT PAGE POINTERS ; 366 ; IN THEIR PAGING CHAIN AS DO EXAMINES AND DEPOSITS AND BYTE TRANSFERS. ; 367 ;211 CHANGE THE TEST FOR INDIRECT POINTERS TO NOT HAPPEN ON SECTION ; 368 ; POINTERS AND JUST ON INDIRECT PAGE POINTERS. AT LDIND:+1 AND LDIMM:+2 ; 369 ;210 MAKE ALL AC+# MICROINSTRUCTIONS HAVE THE # FIELD THE SAME IN THE ; 370 ; PREVIOUS MICROINSTRUCTION TO SOLVE A TIMONG GLITCH IN THE HARDWARE. ; 371 ; MAKE EXCHANG MARK AND DESTINATION POINTERS UUO IF THEY DO NOT ; 372 ; HAVE BYTE POINTERS OF EQUAL LENGTH. CHANGES PERVASIVE IN EIS ALSO IN PF ; 373 ; RECOVERY IN IO. ; 374 ; MAKE THE LOAD OF AN INDIRECT POINTER CLEAR PI CYCLE IF SET. ; 375 ; THIS MEANS THAT THE MONITOR CANNOT USE KERNAL CYCLE, INSTR ABORT ; 376 ; INH PC+1 OR HALT IN A PI CYCLE IF AN INDIRECT POINTER CAN ; 377 ; BE A PART OF THE REFILL. ALSO NOTE THE POSSIBILITY OF GETTING AN ; 378 ; INTERUPT BEFOR THE PI INSTRUCTION COMPLETES. (NEVER CONTINUES PI ; 379 ; INSTRUCTION) CHANGES AT LDIND. ; 380 ;207 CHANGE SBUS DIAG CODE FOR MOS PUT IT IN MOS CONDITIONAL /MOS=1 ; 381 ; IF ON SBUS DIAG TRIES AT LEAST 8 TIMES TO GET A RESPONSE ; 382 ; OTHER THAN -1 IF IT GOT -1 ALL THOSE TIMES THE MICROCODE ; 383 ; GIVES UP AND RETURNS 0 ; 384 ;206 FINAL FIXES TO PUSHM AND POPM ; 385 ;205 FIX BUG IN INDEX CALCULATION OF E1 FOR EXTENDED ADDRESSING. ; 386 ; INDEXING REQUIRED THAT AN AREAD BE PERFORMED IN ORDER TO LOAD ; 387 ; THE AR WITH A CORRECT FINAL RESULT. THE EFFECTIVE ADDRESS CALCULATION ; 388 ; AROUND EXTLA: GOT A NEW MACRO ADDED FOR INDEXING THAT DOES THE AREAD. ; 389 ; ABSOLUTE LOCATIONS IN THE RANGE 3040 GET USED AS TARGETS FOR THIS ; 390 ; AREAD THEN THE CODE REJOINS THE OLD CODE AT EXT2: ; 391 ; THE AREAD WAS NECESSARY FOR THE HARDWARE MAGIC TO LOAD PARTS OF THE ; 392 ; AR DEPENDING ON THE INDEX REGISTER AND OTHER EXTENDED ADRESSING ; 393 ; PARAMETERS. ; 394 ;204 ADD AUTOMATIC VERSION NUMBER ; 395 ; ADD CODE TO DO SBUS DIAG TESTING REQUIRED BY MOS ; 396 ;203 PUT THE BLKO PAG, CHANGE IN 201 IN A KLPAGING CONDITIONAL ; 397 ; KIPAGING GETS TANGLED IN AR PARITY ERRORS AND IN GENERAL DOES ; 398 ; THE WRONG THINGS ; 399 ;202 TURN OFF IMULI OPTIMIZATION IT GETS THE SIGN BIT AND THE OVERFLOW ; 400 ; FOULED UP (TURNED OFF FOR MODEL B ONLY WAS OFF IN MODEL A) ; 401 ;201 CHANGE BLKO PAG, TO INVALIDATE ONLY ONE ENTRY BY CLEARING IT ; 402 ; CHANGES AT PAGBO PAGBO+1 AND CLRPT+3 CLRPT+3 GETS SETUP THAT USED ; 403 ; TO BE AT PAGBO+1, PAGBO+1 NOW CLEARS ENTRY AND QUITS ; 404 ; KLPAGE ERROR CHECK FOR TOPS 10 MODEL A TO CAUSE ERROR ; 405 ; IF SWITCH SETTINGS ARE IN CONFLICT DIDDLED ; 406 ;200 CHANGE ALL EXEC REF TRACKS FEATURES BACK TO PHYS REF ; 407 ; ON SUSPICION THAT PAGE FAULTS ARE NOT HANDLED PROPERLY ; 408 ; MAKE NON TRACKS INSTR STAT FEATURES GET FOUR PHYSICAL ; 409 ; PAGE NUMBERS FROM FIRST FOUR LOCATIONS IN THE PAGE PRESENTED ; 410 ; IN THE DATAO PI, THE CODE ALSO USES THAT PAGE FIRST ; 411 ; LOCATION TO PUT THE INITIAL JUNK INTO ON STARTUP ; 412 ;177 FIX SOME BUGS IN OPCODE TIMING CODE AT OPTM0: AND BEYOND ; 413 ;176 ADD TO THE TIME COUNTING CODE CODE THAT COUNTS FREQUENCY ; 414 ; OF EACH OPCODE IN PAGE+2 AND PAGE+3 ; KL10 Microcode for TOPS-20 4 February 1985 V1(357) MICRO %34(270) Page 1-7 ; EDHIS.MIC[4,30] 13:59 4-Feb-85 REVISION HISTORY ; 415 ;175 FIX TIME COUNTING CODE TO ACOUNT FOR EACH OPCODE IN THE ; 416 ; USER OR EXEC MODE IT WAS SEEN IN, EDGE COUNTS WERE DONE IN ; 417 ; WRONG MODE CHANGES UNDER OP.TIME CONDITONALS (PERVASIVE) ; 418 ;174 CHANGE TRACKS AND TIME COUNTING TO USE EXEC VIRTUAL SPACE ; 419 ; INSTEAD OF PHYSICAL SPACE ; 420 ;173 SEPERATE OUT THE DISMISS AT 626: BECAUSE OF SUSPECTED BUG ; 421 ;172 THE FACT THAT XJEN DISMISSES BEFORE READING NEW PC WORDS CAUSES ; 422 ; A PROBLEM FOR TOPS 20. REHASH THE CODE AT 600: TO 637: TO MAKE ; 423 ; XJEN READ THE TWO WORDS FIRST AND THEN DISMISS. ; 424 ;171 CAUSE IO PAGE FAIL FIX IN 170 TO SHIFT AT END GETTING CORRECT ; 425 ; PAGE FAIL WORD CHANGE AT IOPGF: ; 426 ;170 MAKE CLRFPD: GO DIRECT TO FINI: INSTEAD OF THROUGH NOP: THIS WAS ; 427 ; COSTING 2 TICS IN BYTE INSTRUCTIONS ; 428 ; CHANGE IO PAGE FAIL TO SAVE A VIRTUAL ADDRESS IN THE AC BLOCK 7 ; 429 ; LOCATION 2 INSTEAD OF THE DATA THAT WAS ON THE EBUS CHANGES AT ; 430 ; PGF4:+1 AND IOPGF: ; 431 ;167 CHANGE DEFAULT ON ADB MIXER SELECTS. NO DEFAULT NOW SUBFIELD U23 ; 432 ; IS DEFAULTED TO 1 TO AVOID SELECTING FM AND NEEDING TO WAIT FOR PARITY. ; 433 ; THIS LEAVES THE OTHER BIT OF THE FIELD AVAILABLE FOR PARITY ; 434 ; EPT MOVED TO 540 USING SWITCH IN KLX,KLL (KLA,KLB NOW DEFUNCT) ; 435 ;166 CHANGE FIELD DEFINITION FORMAT CHANGE THE WAY THE OPTIONS FIELD ; 436 ; GETS ITS VALUES ASSIGNED. EACH BIT GETS A FIELD DEFINITION. ; 437 ;165 BUG IN 161 TO 164 WAS MISSING AC0 AT POP2: PARITY BIT WAS PUT THERE ; 438 ; IN THE NEWER MICROCODES ; 439 ; INSTALL MANY THINGS TO MAKE WORD STRING MOVES WORK START AT ; 440 ; MOVWD1 AND UNTILL BMVWD1 ALSO ASSORTED MACROS ARE ADDED ; 441 ; THESE ARE INSTALLED IN A SEPERATED EIS FILE (WDEIS) FOR THE MOST PART ; 442 ; THERE ARE SOME NEW MACROS AND THE CLEAN+17 LOCATION IS USED FOR ; 443 ; THIS CASE UNDER MODEL B CONDITIONAL INTERRUPTS DO NOT WORK YET ; 444 ; IN THIS CODE BUT ALL DATA TRANSFERS ARE CORRECT. INTERRUPTS ARE ; 445 ; TAKEN SO SUSPECT THE PROBLEM IS IN THE CLEANUP CODE. ; 446 ;164 LEAVE IN ONLY MAP FIX ; 447 ;163 TAKE OUT MAP FIX LEAVING XHLLI IN AND JRSTF IN ; 448 ;162 PUT XHLLI BACK IN TAKE OUT JRSTF ONLY IN SEC 0 CODE ; 449 ;161 XHLLI OUT TO DEBUG ADD RSTF0: TO MAKE TEST FOR JRSTF IN NON ; 450 ; 0 SECTIONS TEST IN ALL CASES ; 451 ;157 INSTALL XHLLI MAKE JRSTF UUO ON NON ZERO SECTIONS ; 452 ; ALSO MAKE MAP DOING A REFILL PAGE FAIL RIGHT THIS MEANS THAT AFTER ; 453 ; CLEAN IT CANNOT DO ANYTHING INTERESTING IF AN INTERRUPT IS PENDING ; 454 ; CHANGES AT MAP2: ; 455 ;156 REINSERT A SKP INTRPT IN THE PAGE FAULT HANDLER TO HAVE INDIRECT ; 456 ; POINTER CHAINS INTERRUPTABLE. AT PGRF6:+6 ; 457 ;155 ABORTIVE MAP FIX FIX REMOVED PROBLEM MUST BE FIXED IN HARDWARE. ; 458 ;154 ADD TESTS FOR AC'S IN PHYSICAL REFERENCES FOR EXAMINES AND DEPOSITS ; 459 ; PHYS REFS GO TO MEMORY, NOT AC'S AFTER PROBLEM SHEET 1675 ; 460 ; CHANGES AT PILD+3 PIFET+2 PSTOR PHYS1 PHYS2 PHYS3 ; 461 ; ADD CHANGES IN TRACKS TO MAKE MODEL A WORK AT TRK2+2 AND +3 ; 462 ;153 ADD SPECIAL CODE FOR PXCT OF BLT THIS HOPEFULLY CAN GO AWAY ; 463 ; WHEN THE EXTENDED ADDRESSING MONITOR DOES NOT USE PXCT ANYMORE ; 464 ; IT IS UNDER .IF/BLT.PXCT CONDITIONAL AND COSTS 12 WORDS ; 465 ;152 CHANGE WHAT BLT DOES TO MATCH THE SPEC SR_BLT(XXX) IS CHANGED TO ; 466 ; NOT FORCE GLOBAL ADDRESSING THE LOAD VMA(EA)_ARX+BR AND ; 467 ; STORE VMA(EA)_ARX MACROS ARE ADDED TO FORCE THE GLOBAL/LOCAL PARAMETERS ; 468 ; TO BE THE SAME AS THOSE OF THE EFFECTIVE ADDRESS ; 469 ;151 PUT THE EPT AND UPT AT 540 UNDER SWITCH CONTROL .IF/EPT540 ; 470 ;150 VERSION NUMBER BACKED UP TO PRESERVE SPACE IN VERSION NUMBER FIELD ; KL10 Microcode for TOPS-20 4 February 1985 V1(357) MICRO %34(270) Page 1-8 ; EDHIS.MIC[4,30] 13:59 4-Feb-85 REVISION HISTORY ; 471 ;304 EXTEND 0 WOULD GET A JUMP TO AN UNUSED MICROLOCATION IN MODEL.B ; 472 ; ONLY THIS WAS BECAUSE LOCATION 2002: IN MODEL.A SHOULD BE AT 3002: ; 473 ; IN MODEL.B 3002: AND 3003: PUT IN WHERE 2002: AND 2003: ARE UNDER ; 474 ; CONDITIONALS. ; 475 ;303 CHANGE THE NUMBER FIELD OF THE SR_BLT(XXX) MACROS TO GIVE THE ; 476 ; BIT 0 OFF ALL THE TIME. THIS GIVES BLT MORE THE FORM OF THE OTHER ; 477 ; EXTENDED ADDRESSING STUFF IN HOW IT REFERS TO THE SHADOW AC'S. ; 478 ; IT IS STILL BELIEVED TO BE BROKEN BUT IS BETTER THAN IT WAS. ; 479 ;302 ADD LONGER ADDRESS CONSTRAINTS FOR THE NEW MICROASSEMBLER. EVERY ; 480 ; LOCATION THAT THE DISPATCH RAM CAN JUMP TO IS EFFECTED. THE ; 481 ; CONSTRAINTS THATUSED TO LOOK LIKE =00**** MUST NOW LOOK LIKE ; 482 ; =0****00**** THIS IS BECAUSE THE MODEL B MACHINE CAN AND DID ; 483 ; REALLY SET THAT BIT. THE CHANGE MAKES THE MICROCODE INCOMPATIBLE ; 484 ; WITH THE OLD ASSEMBLER. ; 485 ;301 HALT IS CLEARING THE RUN FLOP WITH HARDWARE MUST CHECK FOR ; 486 ; KERNAL MODE BEFOR THE HALT MACRO SO USER IOT MODE WILL ; 487 ; NOT BE ABLE TO HALT. THIS TAKES ONE MICROWORD AT 1017: ; 488 ; THE SENSE OF THE SKIP IS REVERSED AGAIN SO 1016: IS BACK TO ; 489 ; BEING THE UUO AND CHALT: IS NOW A SEPERATE WORD AFTER 1017:. ; 490 ;300 REPLACE HALT CODE AGAIN BUT THIS TIME GET THE SENSE OF THE ; 491 ; SKIP RIGHT BY SWAPPING THE CONTENTS OF LOCATIONS 1016: AND 1017: ; 492 ; PUT THE 1: ADDRESS CONSTRAINT ON CONT:. ; 493 ;277 PUT HALT BACK THE WAY IT WAS SKP USER HAS THE INVERSE SKIP SENSE ; 494 ; AND HENCE DOES THE WRONG THING. HALT TO BE FIXED LATER. ; 495 ;276 YET ANOTHER TRY AT THE BLKO PROBLEM BLK1: SHOULD HAVE HAD A ; 496 ; J/BLK2. ; 497 ;275 THE LONG PC CHANGES HAD XSFM1: BEFOR THE ADDRESS CONSTRAINT THUS ; 498 ; GIVEING THE WRONG ADDRESS. THE =0 IS PUT BEFOR THE LABEL. ; 499 ;274 FIX THE DIAG.INST CONDITIONALS TO BEHAVE PROPERLY WITH THE ; 500 ; CONSTRAINTS OF DRAM LOCATIONS MAP DIED BECAUSE IT NEVER WAS ; 501 ; REACHED OUT OF A DISPATCH. ; 502 ;273 INSERT THE DIAG.INST FEATURE FOR THE DIAGNOSTICS PEOPLE. ; 503 ; CHANGES AT DCODE 104:, 106: AND AT XCT: SHOULD NOT EFFECT OTHER ; 504 ; ASSEMBLIES. ; 505 ;272 THE FIX TO THE GARBAGE IN THE LEFT HALF OF VMA IN 265 FORGOT TO ; 506 ; LOAD THE VMA IN BLK3:+1 PUT THAT IN. ALSO ON JUD'S RECOMENDATION ; 507 ; PUT A COPY OF THE NOP MICROINSTRUCTION AFTER CLRFPD: TO MAKE ; 508 ; ENOUGH TIME IN THE SKIP CASE. IT SEEMED TO WORK WITHOUT THIS ; 509 ; AND IF SPACE GETS TIGHT IT SOULD BE REMOVED. ; 510 ;271 FIX IN 267 PGF4:+4 DOES NOT WORK, CANNOT PUT VMA_# THERE. POSSIBLY BECAUSE ; 511 ; VMA_# CONFLICTS IN SOME ESOTERIC WAY WITH STORE? THAT CHANGE ; 512 ; IS TAKEN OUT AND AT PGF1 THE VMA IS GIVEN 500 OR 501. THIS IS SLIGHTLY ; 513 ; LESS DESIREABLE AND FURTHER EFFORT COULD BE SPENT IN THE UCODE TO ; 514 ; MAKE PAGE FAILS LESS UNWEILDY FOR THE SOFTWARE ROUTINE THAT CONVERTS ; 515 ; THEM TO MODEL B FORM. ; 516 ;270 CHANGE HALT TO CHECK FOR USER MODE INSTEAD OF IO LEGAL. A JOB ; 517 ; IN USER IOT SHOULD NOT BE ABLE TO HALT THE MACHINE. ; 518 ;267 ADD NEW CONDITIONAL SHIFT.MUUO TO PROVIDE THE SHIFTED DOWN MUUO ; 519 ; DATA BLOCKS MORE SIMILAR TO THE XADDR TYPES. CONDITIONAL IS USED ; 520 ; AT 1003: AND PGF4:+4 TO PROVIDE A DIFFERENT STARTING ADDRESS. ; 521 ;266 FIX PILD+3 TO LOAD THE VMA AT THE SAME TIME THUS ENABLING ; 522 ; THE MODEL HACK FIX TO LOAD THE LONG VMA. ; 523 ;265 HAIR UP THE ALREADY HAIRY BLKXX CODE TO CLOBBER THE LEFT HALF OF AR ; 524 ; BEFOR USING IT AS AN ADDRESS. CLOBBERED ARL AT BLK2 AND LOADED ; 525 ; VMA AT BLK3. ; 526 ;264 ADD J/CLRFPD AT BFIN TO MAKE IT THE SAME AS IT WAS. BFIN GOT ; KL10 Microcode for TOPS-20 4 February 1985 V1(357) MICRO %34(270) Page 1-9 ; EDHIS.MIC[4,30] 13:59 4-Feb-85 REVISION HISTORY ; 527 ; MOVED TO A DIFFERENT PLACE IN THE LAST EDIT AND THIS J FIELD ; 528 ; WAS NOT FIXED. ; 529 ;263 ADD THE MIT FIXES. IOTEND AND THE BLK1 TO BLK4 GROUP ARE CHANGED ; 530 ; EXTENSIVELY. CLRFPD IS PUT JUST BEFORE FINI CONSTRAINT ON IOFET ; 531 ; IS CHANGED. ; 532 ; ADD THE LONG PC FORMAT UNDER A NEW CONDITIONAL LONG.PC THE ; 533 ; CONDITIONAL IS TURNED ON BY XADDR. CONDITIONALS ARE ADDED TO THE ; 534 ; LONG PC CODE TO MAKE IT SMALLER WHEN ONLY SECTION 0 IS POSSIBLE. ; 535 ; ADD COMMENTS TO THE MICROCODE OPTIONS FIELD. ; 536 ; RESTORE SXCT CODE FROM VERSION 131. TO BE USED ONLY IN MODEL A ; 537 ; NON KLPAGING CODE. ; 538 ;262 PUT WORD AT INDR1+1 UNDER SXCT CONDITIONAL SO WHEN SXCT IS OFF WE ; 539 ; GET AN ADDITIONAL SAVINGS OF ONE WORD. ; 540 ;261 ADD PHYS REFS AT PGRF6+4 AND PIDISP+4 TO MAKE MODEL.A LOAD A LONG ; 541 ; VMA. PART OF THIS CODE IS NOT UNDER CONDITIONAL BECAUSE IT SHOULD NOT MATTER ; 542 ; TO A MODEL.B MACHINE. PIDISP+4 ALSO GETS THE LOAD OF THE SAME DATA ; 543 ; REPEATED SO THE PHYS REF HAS SOMETHING TO WORK ON. ; 544 ; FLUSH THE NOW USELESS CODE AT CHALT TO GENERATE THE LD AR.PHYS ; 545 ; CONSTANTS. ; 546 ; CURRENTLY THERE IS SORT OF A BUG IN THAT THE SBR AND THE CBR ; 547 ; CAN NOT BE ABOVE 256K IN A MODEL.A MACHINE. THIS DOES NOT BOTHER ; 548 ; THE CURRENT MONITORS AT ALL IN THAT THESE TABLES ARE IN VERY LOW CORE. ; 549 ; IF THAT CHANGES THE LOCATIONS SECIMM+3 SECIMM+7, LDIND, PGRF5, LDSHR ; 550 ; AND LDPT1+1 MUST ALL GET FIXED UP. THE GENERAL FIX IS TO GET A PHYS REF ; 551 ; IN THE MICROINSTRUCTION THAT LOADS THE VMA. THIS CAN BE DONE BY ; 552 ; POSTPONING THE LOAD OF THE VMA ONE MICROINSTRUCTION IN ALL OF THESE ; 553 ; PLACES, BUT, SINCE THAT CAUSES A PERFORMANCE DEGRADATION IT WAS NOT ; 554 ; DONE. ; 555 ;260 DIVERGANT CHANGES TO MAKE KLPAGING PHYS REFS THE OLD WAY ; 556 ; CAUSE ALL CASES OF VMA_XXX+LD AR.PHYS TO GO BACK TO THE ; 557 ; OLD PHYS REF WAY ; 558 ;257 IN MODEL B MACHINES AT LDPT+1 THE VMA IS GETTING GARBAGE IN THE ; 559 ; LEFT HALF BECAUSE IT ADDED IN JUNK THAT WAS IN AR LEFT. FIX IS TO ; 560 ; CLEAR ARL AFTER LDPT AND TO DO THE SHUFFLE PERFORMED THERE ONE ; 561 ; MICROINSTRUCTION LATER. ; 562 ;****** A HACK FIX IS USED HERE THAT TAKES TWO WORDS. THIS WAS DONE BECAUSE ; 563 ; OF EXTREEM TIME PRESSURE TO DEBUG >256K MODEL B. THERE OUGHT TO BE ; 564 ; A WAY TO REDUCE THIS FIX TO ONLY ONE WORD IN SPACE AND TIME, OR ; 565 ; EVEN LESS. ; 566 ;256 EDIT JUMPED TO RANDOMNESS WITH AN EXTRA RETURN. THIS HAPPENED ; 567 ; BECAUSE THERE WAS NO CALL AT EDSFLT IN THE MODEL B NON XADDR CODE ; 568 ; ADDED CALL TO EDSFLT. ; 569 ;255 SAVE EDIT FROM GETTING AN EXTRA STORE CYCLE AT EDSSIG BY SENDING ; 570 ; IT ALWAYS TO THE EDFLT1 LOCATION INSTEAD OF EDFLT THIS ONLY ; 571 ; CHANGES WHAT HAPPENS IN MODEL B NON XADDR BECAUSE IN MODEL A ; 572 ; EDFLT AND EDFLT1 ARE THE SAME LOCATION ANYWAY ; 573 ;254 CAUSE THE A INDRCT CHANGE IN 253 TO BE ONLY FOR NON EXTENDED ; 574 ; ADDRESSING MACHINES. THIS THROWS DOUBT ON THE WORD SAVINGS ; 575 ; THAT MIGHT HAVE BEEN POSSIBLE ; 576 ;253 CHANGE A INDRCT TO LOAD BOTH THE AR AND ARX, IN THE EXTENDED ; 577 ; INSTRUCTION SET THIS HAPPENED TO BE DEPENDED ON AT EXT2+2 AND ; 578 ; EXT2+3. THE DEFINITION OF A IND IN EA CALC/ WAS FIXED TO ; 579 ; LOAD THE AR AND THE ARX ; 580 ; I THINK THIS PERMITS THE SAVINGS OF AN EXTRA WORD AND SOME ; 581 ; TIME ON ALL INDIRECTS. CHECK OUT FLUSHING INDR1 AND MAKING INDRCT ; 582 ; DO THE DISPATCH AND GO TO COMPEA ; KL10 Microcode for TOPS-20 4 February 1985 V1(357) MICRO %34(270) Page 1-10 ; EDHIS.MIC[4,30] 13:59 4-Feb-85 REVISION HISTORY ; 583 ; FORCE ADB TO GENERATE AR*4 AS DEFAULT THIS DISABLES PARITY ; 584 ; CHECKING ON THE FM WHEN IT IS NOT BEING READ FIXED IN ; 585 ; DEFINITION OF ADB THIS WILL ALSO SPEED UP THE MACHINE BY SOME ; 586 ; BECAUSE THE ADB FIELD CAN NO LONGER FORCE 3 TICS WITHOUT REALLY ; 587 ; NEEDING THAT LONG ; 588 ;252 SAVE A WORD AT IOPGF+1 BY MAKING IT PILD+3 THIS ADDS THE SET ; 589 ; ACCOUNT ENABLE TO AN UNDEFINED CASE. ; 590 ;251 TURNING ON PAGING CAUSED A HANG THIS WAS BECAUSE OF A MISIMPLIMENTED ; 591 ; FIX IN 250. THE ATTEMPT TO PUT THAT FIX IN NO SPACE FAILED AND IT TOOK ; 592 ; ONE WORD. AT LDPT+1 ADD BR/AR AT GTCST1 RECOVER THE AR FROM THE BR ; 593 ; THIS SEEMS LIKE IT SHOULD BE ABLE TO BE BUMMED BUT I CANNOT ; 594 ; FIGURE OUT HOW ; 595 ; ALSO FIX A PLACE WHERE A PHYS REF WAS LEFT IN THE MODEL A CODE ; 596 ; AT PGRF6+4 MODEL B CONDITIONAL IS AS IT WAS MODEL A IS NEW TO USE ; 597 ; LD AR.PHYS MECHANISM ; 598 ;250 LOADING HIGH ORDER GARBAGE TO THE VMA WITH THE FIX FOR ; 599 ; >256K CAUSES FUNNY THINGS TO HAPPEN. BITS GET CLOBBERED ; 600 ; WITH AR0-8_SCAD 14 LINES AFTER SECIMM. ACTUALLY IS MORE ; 601 ; HAIR BECAUSE OF CONFLICTING FIELDS. CODE ABOVE AND BELOW ; 602 ; THAT GOT REARRANGED TO SIMPLER MODEL A AND MODEL B CONDITIONALS ; 603 ; SINCE NOW ALL LINES ARE DIFFERENT. SHUFFLING OF FE IS DONE ; 604 ; TO PROVIDE ROOM FOR A CONSTANT ON THE CORRECT SIDE OF THE SCAD ; 605 ; AT LDPT A SIMILAR ; 606 ; RECODING IS NEEDED. 4 LINES OF CODE ARE REDONE IN MODEL ; 607 ; A CONDITIONAL AND CONDITIONALS ARE RESHUFFLED TO HAVE ; 608 ; SIMPLER FORMAT ; 609 ; NEW MACROS ARE ADDED GEN AR0-8, GEN FE AND AR0-8 ; 610 ; VMA_AR+LD AR.PHYS AND ITS FRIENDS ARE TAKEN OUT OF KLPAGING ; 611 ; CONDITIONAL THEY ARE USED TO DO EXAMINES AND DEPOSITS NOW ; 612 ;247 FIX ST AR.PHYS TO GIVE BIT 4 INSTEAD OF BIT 5 AT CHALT ; 613 ; AT PSTORE CHECK FOR AC REF AND IF SO WRITE FM MUST DO THIS ; 614 ; BECAUSE LOAD AD FUNC DOES NOT SET MCL STORE AR ; 615 ;246 FIX MUUO, IN EXTENDED ADDRESSING, TO GET NEW PC BEFORE CLOBBERING ; 616 ; THE USER AND PUBLIC FLAGS THAT TELL WHERE TO GET IT. FIX CONDITIONAL ; 617 ; ASSEMBLY AT INDRCT TO DO EA TYPE DISP IN MODEL A, NOT MODEL B. ; 618 ;245 ADDITIONAL FIXES FOR THE 256K PROBLEM, TO MAKE EXAMINE AND ; 619 ; DEPOSIT WORK. CHANGES AT CHALT TO CREATE CONSTANT "ST AR.PHYS", ; 620 ; AND EXTENSIVELY NEAR PICYC1, PIDATI, AND PIDATO. CHANGES ARE ALL ; 621 ; UNDER MODEL B CONDITIONAL, BECAUSE MODEL B HARDWARE WORKS OK, AND ; 622 ; THE FIX IS REGARDED AS CROCKISH. ; 623 ;244 WAIT FOR COMPLETION OF INDIRECT REFERENCE AT BYTEI+1 AND EXTI+1 ; 624 ; EVEN THOUGH INTERRUPT REQUEST HAS BEEN SEEN, SO AS NOT TO CONFUSE MBOX. ; 625 ;243 VARIOUS FIXES TO MAKE THESE SOURCES WITH MODEL.B SWITCH OFF ; 626 ; EQUIVALENT TO MODEL A SOURCES, SO WE CAN DISCARD MODEL A SOURCES ; 627 ; THE FIXES ARE: ; 628 ; 1) SWITCH SNORM.OPT, TO SAVE SPACE IN SINGLE PRECISION ; 629 ; FLOATING NORMALIZATION. ; 630 ; 2) CREATION OF LD AR.PHYS MAGIC CONSTANT, TO SOLVE HARDWARE ; 631 ; PROBLEMS GENERATING ADDRESSES ABOVE 256K. ; 632 ;242 FIX AT SECPTR+1 TO PRESERVE AR LEFT UNTIL WE CAN CHECK ; 633 ; FOR BITS 12-17 NON ZERO CORRECT ADDRESS CONSTRAINTS AT ; 634 ; SECIMM+1 & +2 TO GET BRANCHING RIGHT FOR SHARED AND INDIRECT ; 635 ; SECTION POINTERS. FIX AT LDIMM+1 TO CLEAR LH OF AR BEFORE ; 636 ; LOADING VMA WITH SPT ADDRESS, TO PREVENT PAGE FAULT ON SPT ; 637 ; REFERENCE. ; 638 ;241 MORE FIXES AT START: AND NEWPC:, FOR SAME PROBLEM AS 240. ; KL10 Microcode for TOPS-20 4 February 1985 V1(357) MICRO %34(270) Page 1-11 ; EDHIS.MIC[4,30] 13:59 4-Feb-85 REVISION HISTORY ; 639 ; MUST LOAD FLAGS AND CLEAR VMAX, THEN LOAD VMA INTO PC TO CLEAR ; 640 ; PCX, THEN RELOAD VMA TO GET EFFECT OF NEW FLAGS AND CLEARED ; 641 ; PCX. (MODEL A ONLY). ; 642 ;240 FIXES AT START: AND NEWPC: TO LOAD 23-BIT ADDRESS RATHER ; 643 ; THAN 30-BIT, SINCE OTHER BITS ARE PC FLAGS. AT SAME TIME AND ; 644 ; PLACE, FIX MODEL A CODE TO CLEAR PC SECTION NUMBER. ; 645 ;237 CHANGE CONDITIONALS AROUND PUSH AND POP CODE FROM XADDR TO ; 646 ; MODEL.B. COULD SIMPLIFY IFNOT XADDR. ; 647 ;236 FIX ADDRESS CONSTRAINTS ON USES OF EA MOD DISP IN MODEL ; 648 ; B MACHINE WITH EXTENDED ADDRESSING OFF. PROBLEMS AT COMPEA, ; 649 ; BFETCH, AND EXT2. ; 650 ;235 SLIGHTLY CLEANER FIXES FOR PROBLEMS IN 234 TO AVOID WASTING TIME ; 651 ; AND SPACE. BYTE READ MACRO NEEDS TO SET VMA/LOAD, AND VMA_VMA ; 652 ; HELD MACRO DOESN'T USE MEM FIELD UNLESS MODEL B AND KL PAGING. ; 653 ; ALSO FIX CONDITIONAL ASSEMBLY STUFF TO AVOID SPURIOUS ERRORS. ; 654 ;234 INSTALL FIXES FOR SOME PLACES WHERE MODEL B CODE CAUSES CONFLICT ; 655 ; WITH THE OLD NON KLPAGING NON EXTENDED ADDRESSING CODE ; 656 ; THESE ARE AT BFETCH, PGF3-1, PGF6, EXT1+2 ; 657 ;233 FIX THE FOLLOWING PROBLEMS: ; 658 ; KL PAGING SHOULD PRODUCE A PAGE FAILURE WHEN BITS ; 659 ; 12-17 OF A PRIVATE SECTION POINTER ARE NON 0 ; 660 ; FIXED AT SECPTR ETC. ; 661 ; EDIT DOES NOT ALLOW INTERUPTS ; 662 ; FIXED AT EDNXT1 AND AFTER THAT ; 663 ; MAP SHOULD NOT BE LEGAL IN USER MODE ; 664 ; FIXED AT MAP2 AND CLEAN+15 ; 665 ; MOVMI IS SHORTENED BY MAKING IT THE SAME AS MOVEI ; 666 ; AT DON LEWINES SUGGESTION THIS IS IN DCODE 215 ; 667 ;232 MERGE THE SECOND ORDER STATISTICS GATHERING CODE WITH THIS ; 668 ; CODE INTENT IS TO KEEP IT HERE ; 669 ;231 CHANGE THE LOAD CCA DEFINITION TO REFLECT THE NEW HARDWARE ; 670 ; THIS IS ENABLED WHEN THE MODEL.B ASSEMBLY SWITCH IS ON ; 671 ;230 THIS IS THE POINT WHERE MICHAEL NEWMAN TAKES OVER THE MICROCODE ; 672 ; MAINTENCE SEVERAL BUG FIXES GET EDITED INTO 126 AT THIS POINT ; 673 ; TWO SETS OF PARALLEL CODE WILL BE MAINTAINED FOR A WHILE. ; 674 ; FIX THE CMPS PARODY ERROR PROBLEM WHEN ILLEGAL BITS ARE FOUND IN ; 675 ; THE LENGTHS. ; 676 ;227 FIX PIBYTE TO GET DTE# CORRECT ON TO-10 TRANSFERS. FIX MTRREQ ; 677 ; CYCLES TO WAIT FOR STORE TO FINISH BEFORE RE-ENABLING ACCOUNT. ; 678 ; FIX ADJSP OF LONG STACK POINTERS TO FETCH NEXT INSTR. ; 679 ;226 FIX EXMD TO LOAD AR, RATHER THAN ARX, WITH MARK POINTER, AS ; 680 ; EXPECTED BY THE HANDLER. FIX EDIT, SEVERAL PLACES, TO IGNORE ; 681 ; LEFT HALF OF MARK & PATTERN ADDRESSES WHEN PC SECTION IS ZERO. ; 682 ; FIX EDIT TO MAKE EXTENDED REFERENCE FOR PATTERN BYTES. ; 683 ; FIX ADJSP TO BE MEANINGFUL WITH LONG STACK POINTERS ; 684 ;225 FIX BYTEA NOT TO CLOBBER FE ON INDIRECTS, FIX EXMD TO BACK ; 685 ; UP VMA AFTER STORING DSTP2 AND BEFORE STORING DSTP. FIX EDIT TO ; 686 ; COUNT THE WHOLE PATTERN ADDRESS IF PC SECTION NOT ZERO. ; 687 ;224 FIX EXTEND ADDRESS CALCULATION TO RECOVER E0 FROM MQ, AND ; 688 ; FIX EXTEND OPCODE TEST TO DISALLOW OPS >20. ; 689 ; FIXES TO HANDLE NEW ENCODING OF AC-OP ON APR BOARD. ; 690 ;223 COMPLETE 222. P HAS TO GO TO SC AS WELL AS AR0-5. CREATE ; 691 ; SUBROUTINE RESETP TO DO IT. GET CODE IN SYNC WITH HARDWARE AND ; 692 ; MOST RECENT SPEC FOR MEANING OF PXCT AC BITS IN EXTEND. THUS ; 693 ; UNDO COMMENT IN 221: WE SHOULD LOOK AT PXCT B11. ALSO FIX ; 694 ; EXTEND TO USE CORRECT ENCODING OF BITS 9, 11, AND 12 FOR PXCT ; KL10 Microcode for TOPS-20 4 February 1985 V1(357) MICRO %34(270) Page 1-12 ; EDHIS.MIC[4,30] 13:59 4-Feb-85 REVISION HISTORY ; 695 ; OF STRING OPERATIONS. FIX DATAI PAG SO IT DOESN'T LOSE THE ; 696 ; PREVIOUS CONTEXT AC BLOCK WHEN LOADING PREVIOUS SECTION #. ; 697 ; INSERT CHANGE CLAIMED FOR EDIT 55, TO INHIBIT INTERRUPT DURING ; 698 ; PI CYCLES. ; 699 ;222 FIX BYTE POINTER UPDATE ROUTINES GSRC & IDST IN EIS CODE ; 700 ; TO UPDATE P WHEN INCREMENTING SECOND WORD. JUST FORGOT TO. TRY ; 701 ; AGAIN TO CONTROL EIS REFERENCES OFF E0, FOR EXTENDED OR NOT. ; 702 ;221 COMPLETE FIX OF 220, TO KEEP SR CORRECT THROUGH RELOAD OF IR ; 703 ; IN EXTEND DECODING, AND TO CONTROL SR CORRECTLY FOR XBLT DST ; 704 ; REFERENCES. (WE WERE LOOKING AT PXCT B11, SHOULD BE B12). ; 705 ;220 FIXES SEVERAL PLACES TO USE "EA" IN DRAM A FIELD INSTEAD OF "I", ; 706 ; NOTABLY BLT, WHICH WAS USING WRONG SECTION. FIX EXTEND TO ; 707 ; CONTROL VMA EXTENDED BEFORE FETCHING EXTEND-OP, SO AS NOT TO ; 708 ; LOOK "UNDER" THE AC'S. FIX XBLT FOREWARD TO STOP WHEN AC GOES ; 709 ; TO ZERO, NOT -1. ALSO CONTROL SR BEFORE INITIAL STORE TO GET ; 710 ; CORRECT CONTEXT. ; 711 ;217 CODE CHANGES TO MAKE SECOND WORD OF BYTE POINTER WORK RIGHT ; 712 ; WHETHER EFIW OR IFIW, BY CONTROLLING CRY18 OR CRY6. ; 713 ;216 RECODE EXTENDED INSTRUCTION SET DECODING & EFFECTIVE ADDRESS ; 714 ; CALCULATION. FIX UUO CODE TO INCREMENT VMA AFTER STORING PC. ; 715 ; FIX ADJBP TO GET 36 BIT ADDRESS ADJUSTMENT IF B12 SET. ; 716 ;215 REARRANGE CONDITIONAL ASSEMBLY DEFAULTS TO BE MORE LOGICAL ; 717 ; INSERT FORM FEEDS AND COMMENTS TO HELP BEAUTIFY THE LISTING. ; 718 ; REWORK THE NEW JRST'S, TO MAKE THEM SMALLER, FASTER, AND TEST ; 719 ; IO LEGAL BEFORE DISMISSING. PUT IN XBLT. ; 720 ;214 MODIFY ADJBP AND UUO'S FOR EXTENDED ADDRESSING. REWORK PARITY ; 721 ; ERROR HANDLING, IN A FRUITLESS ATTEMPT TO MAKE IT SMALLER, ; 722 ; BUT SUCCESSFULLY MAKING IT CLEARER. FIX ASSEMBLY ERRORS IN EIS ; 723 ; DUE TO AC4 CHANGES, AND ADD CODE TO HANDLE LONG BYTE POINTERS ; 724 ; IN AC'S. PUT IN CODE TO GIVE PAGE FAIL 24 ON ILLEGAL FORMAT ; 725 ; INDIRECT WORD. ; 726 ;213 FIX LDB & DPB TO TEST POINTER BIT 12 ON CALL TO BYTEA. ; 727 ;212 MODIFY JSP, JSR TO STORE FULL PC WITHOUT FLAGS IN NON-ZERO SEC ; 728 ; SEPARATE CONDITIONALS FOR "MODEL B" MACHINE FROM THOSE FOR ; 729 ; EXTENDED ADDRESSING MICROCODE. ; 730 ;211 REMOVE UNNECESSARY DIDDLING OF VMA USER BIT DURING PAGE REFILL, ; 731 ; AND ELIMINATE SPECIAL CASE FOR MAP INSTRUCTION, WHEN EXTENDED ; 732 ; ADDRESSING HARDWARE EXISTS TO SOLVE THESE PROBLEMS. ; 733 ; FIX SEVERAL CASES OF SIGNS DISP WITH INADEQUATE CONSTRAINT. ; 734 ;210 FIX DEFINITION OF "SKP LOCAL AC REF", WHICH CONFUSED "AC ; 735 ; REF" WITH "LOCAL AC REF". ; 736 ;207 FIX JRSTF (AND ITS DERIVATIVES) TO LOAD FLAGS INTO AR AFTER ; 737 ; DOING EA MOD DISP, WHICH WOULD OTHERWISE CLOBBER THEM. FIX ; 738 ; COMPEA CODE TO LET AREAD HARDWARE LOAD AR. OTHERWISE GET SEC #. ; 739 ;206 FIX PCTXT ROUTINE TO GET PREVIOUS CONTEXT SECTION. ; 740 ;205 FIX POPJ TO LOAD HALFWORD OR FULLWORD PC ACCORDING TO PC SECT ; 741 ;204 FIX CONDITIONALS AROUND LOC 47, WRONG IN 202. FIX DEFINITION ; 742 ; OF A INDRCT, DOESN'T NEED #07. FIX STACK INSTRUCTIONS FOR ; 743 ; EXTENDED ADDRESSING. MUST NOT LOAD VMA FROM FULL AD. ; 744 ;203 INCLUDE CODE AT NEXT+2 TO GENERATE ADDRESS MASK (LOW 23 BITS) ; 745 ; AT HALT TIME, AND CODE IN PICYCLE TO USE IT TO GET 23 BIT ADDR ; 746 ; OUT OF IOP FUNCTION WORD. ; 747 ;202 MOVE "40+A" LOCATIONS TO "A" UNDER EXTENDED ADDRESSING. CHANGE ; 748 ; ALL CALL MACROS TO GENERATE CALL BIT INSTEAD OF SPECIAL FUNC'S. ; 749 ;201 BEGIN EXTENDED ADDRESSING CHANGES IN EARNEST. INTEGRATE NEW ; 750 ; EFFECTIVE ADDRESS COMPUTATION CODE, AND REVISE INSTRUCTION ; KL10 Microcode for TOPS-20 4 February 1985 V1(357) MICRO %34(270) Page 1-13 ; EDHIS.MIC[4,30] 13:59 4-Feb-85 REVISION HISTORY ; 751 ; ROUTINES AS NECESSARY. ; 752 ;126 FIX STRAC3-2, WHERE COMMA GOT LEFT OFF WHEN IFETCH MOVED ; 753 ;125 REMOVE NXT INSTR FROM STAC1, STRAC3, & STAC4, MAKING THEM JUMP ; 754 ; TO FINI INSTEAD. PROBLEM INVOLVES A RACE IF PAGE FAIL OCCURS ; 755 ; WHILE WRITING FM. IF FM ADDRESS CHANGES BEFORE COND/FM WRITE ; 756 ; GOES FALSE, APR BOARD MAY GRONK PARITY BIT OF SOME FM LOC'N. ; 757 ; THIS RESULTS IN SOME SOME PATHS FROM FETCH TO NICOND BECOMING ; 758 ; LONGER THAN 6 TICKS, SO THE FETCHES GOT SHUFFLED IN SOME PLACES. ; 759 ; MICROCODE PATCH ELIMINATES MOST PROBABLE CAUSE, WHICH IS PAGE ; 760 ; FAIL AT NICOND TIME WHILE WRITING AC OTHER THAN 0. IT DOES NOT ; 761 ; TAKE CARE OF THE POSSIBILITY THAT COND/FM WRITE WILL GLITCH AT ; 762 ; INSTR 1777 TIME. ; 763 ;124 FIXES IN SEVERAL PLACES TO SET AND CLEAR ACCOUNT ENABLE SO AS ; 764 ; TO GET REPEATABLE ACCOUNTING MEASURES OF USEFUL WORK DONE. THE ; 765 ; ENABLE IS NOW CLEARED FOR METER UPDATE CYCLES AND KL PAGE REFILL ; 766 ; CYCLES. THE HARDWARE ALREADY TAKES CARE OF PI CYCLES. ; 767 ;123 CORRECT 122 TO CONSTRAIN LOC "UNHALT", AND TO LOAD ARX FROM AR, ; 768 ; SO AS TO LET "SKP AR EQ" WORK. PROBLEM AROSE BECAUSE MACRO ALSO ; 769 ; TESTS ARX00-01. FIX EDIT, WHEN STORING DEST POINTER ON SELECT ; 770 ; SIGNIFICANCE START, TO ELIMINATE AMBIGUITY IN DEST P FIELD. ; 771 ;122 SPEC CHANGE TO EXIT FROM HALT LOOP, SO THAT AR0-8=0 WITH AR9-35 ; 772 ; NON-ZERO LOADS AR INTO PC TO START PROCESSOR. THIS IS DIFFERENT ; 773 ; FROM EXECUTING JRST BECAUSE PC FLAGS ARE CLEARED. ; 774 ;121 FIX TO 120 TO ALLOW A CYCLE BETWEEN FILLER FROM MEMORY AND ; 775 ; WRITING IT INTO FM (THUS PARITY CAN BE COMPUTED). ALSO CLEAR ; 776 ; STATE REGISTER IN EDIT BEFORE GETTING NEXT PATTERN BYTE. ; 777 ;120 FIX EIS TO TOLERATE PAGE FAIL ON READ OF FILL BYTE IN MOVSRJ ; 778 ; OR B2D CONVERSION. REQUIRES GETTING FILLER BEFORE STORING DLEN ; 779 ; ALSO INTEGRATE OPCODE COUNTING/TIMING CODE UNDER CONDITIONALS ; 780 ;117 FIX PARITY ERROR CODE TO WRITEBACK AR ON RPW ERROR. ; 781 ;116 REWRITE OF DDIV, SO THAT THE NO-DIVIDE TEST IS ON THE MOST ; 782 ; SIGNIFICANT HALF OF THE MAGNITUDE OF THE DIVIDEND, RATHER THAN ; 783 ; THE MAGNITUDE OF THE MOST SIGNIFICANT HALF. IN THE PROCESS, ; 784 ; SAVE TIME AND SPACE. ALSO PUT IN CONDITIONAL ASSEMBLY VARIABLE ; 785 ; "WRTST" TO INHIBIT WRITE TEST CYCLE FOR INSTRUCTIONS WHICH ; 786 ; APPEAR NOT TO NEED IT, AND THUS TO SPEED THEM UP. ; 787 ;115 FIX SBDIAG TO SET MCL REG FUNC TO INHIBIT EBOX MAY BE PAGED. ; 788 ;114 RECODE STRING COMPARE TO SAVE SPACE AND TIME. CHANGE DEFAULTS ; 789 ; FOR KLPAGING TO INCLUDE EIS, EXCLUDE TRACKS FEATURE. CHANGE ; 790 ; KLPAGING (NEW SPEC) TO KEEP "LOGICALLY WRITABLE" IN SOFTWARE BIT ; 791 ;113 RECODE KL PAGING TO ELIMINATE PROBLEM OF WRITING HARDWARE ; 792 ; PAGE TABLE BEFORE CHECKING FOR AGE TRAP, AND THEREFORE LEAVING ; 793 ; THE PAGE ACCESSIBLE AFTER THE TRAP. THE RECODING ALSO IMPROVES ; 794 ; THE ALGORITHM IN THAT THE HARDWARE ENTRY INCLUDES THE W BIT SET ; 795 ; IF THE CORE TABLES ALLOWED WRITE AND THE CST INDICATES WRITTEN, ; 796 ; EVEN IF THE CURRENT REFERENCE WAS NOT A WRITE. ; 797 ; ALSO FIX CODE WHICH WRITES PT DIR, TO GET WRITE REF BIT FROM ; 798 ; VMA HELD INTO BIT 5 OF SAVED PAGE FAIL WORD. ; 799 ;112 FIX PAGE FAIL CODE FOR USE WITH PROB SHEET 1396, WHICH LOADS ; 800 ; PC IF PAGE FAIL OCCURS ON NICOND. THUS CODE NEEDN'T CHECK FOR ; 801 ; FETCH AT CLEAN, WHICH CAUSED OTHER PROBLEMS ON PARITY ERRORS. ; 802 ; CLEAR FE AND SC IN NXT INSTR MACRO (JUST CLEANLINESS). ; 803 ;111 PATCH SEVERAL ROUTINES WITH THE FOLLOWING MACRO -- ; 804 ; FETCH WAIT "MEM/MB WAIT" ; 805 ; TO PREVENT SEQUENCES IN WHICH PAGE FAIL INFO CAN GET LOST ; 806 ; BECAUSE OF LONG TIME FROM REQUEST TO MB WAIT. THESE PATCHES ; KL10 Microcode for TOPS-20 4 February 1985 V1(357) MICRO %34(270) Page 1-14 ; EDHIS.MIC[4,30] 13:59 4-Feb-85 REVISION HISTORY ; 807 ; SHOULD BE REMOVED AFTER AN ECO HAS BEEN INSTALLED TO FIX. ; 808 ; IN ADDITION, EBUSX SUBROUTINE HAS BEEN MODIFIED TO PREVENT RACE ; 809 ; CONDITION WHEN SETTING UP IO FUNCTION WITH COND/EBUS CTL AND ; 810 ; MAGIC # BIT 4. MUST NOT CHANGE #5 THROUGH #8 ON NEXT CYCLE. ; 811 ; FIX KLPAGING CODE TO GO BACK TO AREAD ON MAP REF, BECAUSE ; 812 ; MEM/AD FUNC DOESN'T CORRECTLY RESTORE APR REG FUNC. ALSO MAKE ; 813 ; THE CODE SMARTER ON NO MATCH CONDITION, SO REQUEST DOESN'T HAVE ; 814 ; TO BE RESTARTED AND IMMEDIATELY FAIL AGAIN. ; 815 ;110 GIVE UP ON THE OLD STRING COMPARE CODE, INSTALLING MIKE NEWMAN'S ; 816 ; VERSION. SOMEWHAT SLOWER, BUT GIVES THE RIGHT ANSWERS. ; 817 ; FIX LDB CODE TO WAIT FOR MEM WORD EVEN IF INTERRUPT REQUEST ; 818 ; SEEN, SO AS NOT TO GET CONFUSED WHEN IT ARRIVES OR PAGE FAILS. ; 819 ; ALSO IMPROVE CLRPT ROUTINE USED BY CONO AND DATAO PAG TO START ; 820 ; LOOP WITH VMA CLEARED AND PT WR SELECTION SETUP CORRECTLY. ; 821 ;107 FIX STRING COMPARES TO CHECK FOR INTERRUPT. THIS INVOLVED ; 822 ; CHECKING DURING GSRC ROUTINE, WHICH ELIMINATES NEED FOR CHECK ; 823 ; IN SRCMOD (WHICH CALLS GSRC). IT ALSO REQUIRED CLEARING SFLGS ; 824 ; AT STARTUP, AND ADJUSTING DLEN UPDATE CODE IN DEST FILL TO GET ; 825 ; VALID LENGTH STORED ON INTERRUPT. ; 826 ;106 ELIMINATE RACE IN DECODING OF # FIELD ON MTR BOARD BY HOLDING ; 827 ; LOW 3 BITS THROUGH NEXT MICROINSTRUCTION. ; 828 ; FIX LUUO AND MUUO TO ALLOW INTERRUPTS. ; 829 ; FIX B2D OFFSET TO SIGN-EXTEND E1 AFTER INTERRUPT. FINISH 105, ; 830 ; TO GET ENTIRE AR LOADED WHILE CLEARING MQ (ARL WAS HOLDING). ; 831 ; FIX KL PAGING TO USE VMA/1 INSTEAD OF VMA/AD WHEN RESTORING VMA ; 832 ; FROM VMA HELD OR COPIES THEREOF. ; 833 ; FIX UFA NOT TO ALWAYS GET UNDERFLOW ON NEGATIVE RESULTS. ; 834 ; SAME FIX AS EDIT 103 OF BREADBOARD. WHERE DID IT GET LOST? ; 835 ;105 FIX KL PAGING AS REVISED BY EDIT 103 TO CORRECTLY RESTORE ; 836 ; BR ON NO-MATCH CONDITION ; 837 ; ANOTHER FIX TO B2D, TO CLEAR MQ ON ENTRY. BUG INVOLVED GARBAGE ; 838 ; FROM MQ SHIFTING INTO ARX DURING DEVELOPMENT OF POWER OF TEN. ; 839 ;104 FIX BINARY TO DECIMAL CONVERSION, WHICH WAS NOT GOING TO CLEAN ; 840 ; ON FINDING AN INTERRUPT, AND ON RESTART WITH FPD SET, WAS NOT ; 841 ; SETTING UP SLEN. TSK, TSK. CORRECT CLEANUP FOR DEST FILL IN ; 842 ; MOVSRJ, WHICH WAS INCREMENTING BOTH SLEN AND DLEN, SHOULD ; 843 ; HAVE BEEN NEITHER. FIX JSR, BROKEN BY EDIT 103. JUMP MUST BE ; 844 ; TO E+1, NOT E. ; 845 ;103 CREATE CONDITIONAL ASSEMBLY FOR EXTENDED ADDRESSING. UNDER IT, ; 846 ; CREATE MEM FIELD DEFINITIONS, SUPPRESS SXCT. ; 847 ; SAVE A WORD IN JSR BY USING JSTAC IN COMMON WITH PUSHJ. ; 848 ; FORCE TIME FIELD IN CASES WHERE ASSEMBLER DEFAULT SCREWS UP. ; 849 ; ADD INTERRUPT TESTS IN KL PAGING CODE TO PREVENT HANGS, AND ; 850 ; REVISE PAGE FAIL WORD TO ELIMINATE THE NEW FAIL CODES. ; 851 ;102 ATTEMPT ANOTHER FIX OF MOVSRJ, CVTBDX FILL. EDIT 71 LOSES ; 852 ; DUE TO INCONSISTENCY -- DLEN UPDATE MUST NOT PRECEED CLEANUP. ; 853 ; CREATE CONDITIONAL ASSEMBLY SWITCHES TO CONTROL EXTENDED ; 854 ; INSTRUCTION SET, DOUBLE INTEGER ARITHMETIC, AND ADJBP. CHANGE ; 855 ; DEFAULT OF IMULI.OPT, WHICH CAN GET SIGN WRONG ON OVERFLOW. ; 856 ;101 FIX METER REQUEST CODE TO "ABORT INSTR" EVEN IF NOT SETTING ; 857 ; PI CYCLE. THIS SHOULD FIX OCCASIONAL LOSS OF TRAPS PROBLEM. ; 858 ;100 FIXES TO KL PAGING CODE TO PREVENT LOADING VMA FROM AD WHILE ; 859 ; REQUESTING PHYSICAL REF. FIX JSR TO PREVENT FM PARITY STOP ; 860 ; ON STORE TO AC. FIX 1777 TO FORCE RECIRCULATION OF AR/ARX, ; 861 ; EVEN IF MBOX RESP STILL TRUE. ; 862 ;77 FIX DDIV TO GET MQ SHIFTED LEFT ONE PLACE, WITHOUT INTRODUCING ; KL10 Microcode for TOPS-20 4 February 1985 V1(357) MICRO %34(270) Page 1-15 ; EDHIS.MIC[4,30] 13:59 4-Feb-85 REVISION HISTORY ; 863 ; AN EXTRA BIT, AT DDVX1. THIS INVOLVES INHIBITING ADA TO PREVENT ; 864 ; AD CRY0 FROM COMMING INTO MQ35. ; 865 ;76 FIX UFA TO ALLOW AN EBOX CYCLE BETWEEN FETCH AND NICOND WHEN ; 866 ; FRACTION SUM IS ZERO, AT UFA3. ; 867 ;75 PUT BACK INSTRUCTION "MBREL" REMOVED BY EDIT 64. NECESSARY TO ; 868 ; ENSURE THAT EBOX REQUEST FOR FETCH DOESN'T COME UP WHILE ; 869 ; REGISTER FUNCTION IS IN PROGRESS, WHICH WOULD CONFUSE MBOX ON ; 870 ; STARTING THE FETCH. ; 871 ;74 CHANGES TO EIS FOR NEW-SPEC AC USAGE. CHANGES TO KL PAGING FOR ; 872 ; INDIRECT, IMMEDIATE SECTION POINTERS ; 873 ;73 FIX JRA TO PREVENT WRITING AC WITH DATA FRESH FROM MEMORY (ALLOW ; 874 ; A CYCLE FOR PARITY CHECK). FIX DPB CODE TAKE ONLY 3 TICKS ON ; 875 ; RETURN FROM BYTEA, SO THAT CACHE DATA DOESN'T ARRIVE INTO AR ; 876 ; AND ARX UNTIL DPB1, WHEN THE BYTE HAS GOTTEN OUT TO MQ. ; 877 ;72 FIX DEFINITION OF SP MEM/UNPAGED TO INHIBIT VMA USER. FIX ; 878 ; PAGE FAIL CODE TO CHECK FOR VMA FETCH BEFORE LOOKING AT ; 879 ; INTERRUPT REQUEST. PROBLEM WAS INTERRUPT CONCURRENT WITH ; 880 ; PAGE FAIL ON JRSTF TO USER. PC FLAGS GOT RESTORED, BUT VMA ; 881 ; NEVER COPIED TO PC BECAUSE PAGE FAIL INHIBITED NICOND, AND ; 882 ; INTERRUPT ABORTED PAGE FAIL HANDLING TO LOAD PC. ; 883 ;71 DEFINE FMADR/AC4=6. FIX MOVFIL ROUTINE TO PUT AWAY UPDATED ; 884 ; LENGTH DIFFERENCE WHEN INTERRUPTED, THUS AVOIDING RANDOMNESS ; 885 ; IN MOVSRJ, CVTBDX. FIX CVTBD CALL TO MOVFIL TO PRESERVE SR. ; 886 ; CHANGE STMAC AND PIDONE FROM "FIN XFER" TO "FIN STORE", BECAUSE ; 887 ; STORE WAS IN PROGRESS, WHICH CAUSED FM WRITE IF AC REF, AND ; 888 ; GOT A PARITY ERROR DUE TO ADB/FM. ; 889 ;70 FIX PXCT 4,[POP ...], WHICH DIDN'T GET DEST CONTEXT SET FOR ; 890 ; STORE. MUST USE SR_100 TO SET IT. ; 891 ;67 FIX PROBLEM IN ADJBP BY WHICH BYTES/WORD WAS GETTING LOST ; 892 ; WHEN DIVIDE ROUTINE LOADED REMAINDER INTO BR. SOLVED BY ; 893 ; SAVING BYTES/WORD IN T1. ; 894 ;66 FIX KL PAGING TO RESTORE VMA ON TRAP, SAVE ADDRESS OF POINTER ; 895 ; CAUSING TRAP, AND NOT RESTORE ARX EXCEPT FOR BLT PAGE FAIL. ; 896 ; ALSO SET TIME PARAMETER ON ADB/FM TO ALLOW TIME FOR PARITY ; 897 ; CHECKING OF FM. ; 898 ;65 FIX KL PAGING CODE TO DO MBWAIT AFTER DETERMINING THAT PARITY ; 899 ; ERROR HAS NOT OCCURRED, SO AS TO GET CORRECT VMA TO SAVE. ; 900 ; CREATE SYMBOLS FOR KL PAGE FAIL CODES. PUT CONDITIONAL ; 901 ; ASSEMBLY AROUND IMULI OPTIMIZATION CODE, AND SXCT. CREATE ; 902 ; SYMBOL "OPTIONS" IN # FIELD FOR MICROCODE OPTIONS. ; 903 ;64 MICROCODE FOR KL10 PAGING (PAGE REFILL, MAP INSTR)... ; 904 ; REMOVE UNNECESSARY INSTRUCTION MBREL: FROM SWEEP AND APRBO ; 905 ; COSMETIC CHANGES TO KEEP COMMENTS & MACRO DEFINITIONS FROM ; 906 ; OVERFLOWING LINE OF LISTING, AND INSERTION OF CONDITIONAL ; 907 ; ASSEMBLY CONTROL OF LONG FLOATING POINT INSTRUCTIONS. ; 908 ;63 IN MTR REQUEST ROUTINE, DON'T DISMISS WHEN PI CYCLE HASN'T ; 909 ; BEEN SET. ; 910 ;62 FIX RDMTR CODE TO PUT 35 IN SC BEFORE GOING TO DMOVEM CODE. ; 911 ;61 FIX PIIBP ROUTINE TO USE CALL.M INSTEAD OF SPEC/CALL, ; 912 ; WHICH GETS OVERRIDDEN BY P_P-S... IN MTR REQUEST SERVICE ; 913 ; ROUTINE, DON'T SET PI CYCLE UNLESS REQUEST IS FOR VECTOR. ; 914 ;60 FIX DATAO PAG TO DO MB WAIT AFTER STORING EBOX ACCT AND ; 915 ; BEFORE CHANGING VMA. ; 916 ;57 RE-CODE USES OF A@, B@ TO USE VMA/1, RATHER THAN VMA/AD, ; 917 ; IN ORDER TO GET CORRECT CONTEXT ON INDIRECT WORD. SEE MCL4 ; 918 ;56 FIX SECOND PART OF PICYCLE (TAG NEXT:) TO ENSURE THAT ; KL10 Microcode for TOPS-20 4 February 1985 V1(357) MICRO %34(270) Page 1-16 ; EDHIS.MIC[4,30] 13:59 4-Feb-85 REVISION HISTORY ; 919 ; PC+1 INH, KERNEL CYCLE, ETC REMAIN UP DURING 2ND PART. ; 920 ; ALSO CHANGE SPEC/FLAG CTL FOR ECO 1261, WHICH REQUIRES ; 921 ; #07 TO BE OPPOSITE OF #04 TO GENERATE SCD LEAVE USER. ; 922 ;55 FIX SPEC INSTR/SET PI CYCLE TO INHIBIT INTERRUPTS ; 923 ; (IN PARTICULAR, METER UPDATE REQUESTS). MAKE SURE VALID ; 924 ; DATA SAVED ON IO PAGE FAIL AND PARITY ERRORS. REMOVE ; 925 ; BACKWARDS BLT... IT BROKE TOO MANY PROGRAMS. ; 926 ;54 FIX OVERFLOW CHECK IN IMULI OPTIMIZATION TO INH CRY 18 ; 927 ; UPDATE TO USE CONDITIONAL ASSEMBLY IN MICRO VERS 20. ; 928 ;53 FIX T1,T2 PARAMETERS ON BYTE DISP, SIGNS DISP ; 929 ;52 CORRECT SHIFT AMOUNT FOR IMULI OPTIMIZATION, AND FIX MACRO ; 930 ; DEFINITIONS FOR SET SR?, WHICH WERE ALWAYS SETTING SR0. ; 931 ;51 OPTIMIZE IMULI OF TWO POSITIVE OPERANDS (TO SPEED UP SUBSCRIPT ; 932 ; CALCULATIONS) BY TAKING ONLY 9 MULTIPLY STEPS AND STARTING ; 933 ; NEXT INSTRUCTION FETCH EARLIER. OPTIMIZATION CAN BE REMOVED ; 934 ; BY COMMENTING OUT TWO INSTRUCTIONS AT IMULI, AND ONE FOLLOWING ; 935 ; IMUL. ALSO FIX APRBI/UVERS TO KEEP SERIAL # OUT OF LH. ; 936 ;50 INTRODUCE SKIP/FETCH AND CODE IN PAGE FAIL RECOVERY TO LOAD ; 937 ; PC FROM VMA IF PAGE FAIL OCCURED ON FETCH, BECAUSE NICOND ; 938 ; CYCLE, WHICH SHOULD HAVE LOADED PC, GETS INHIBITED BY INSTR 1777 ; 939 ; ALSO INCLUDE EXTENDED INSTRUCTION SET. ; 940 ;47 UNDO XCT CHANGES OF EDIT 46, WHICH BROKE XCT DUE TO INSUFFICIENT ; 941 ; TIME FOR DRAM HOLD BEFORE USING "A READ". ALSO FIX VECTOR ; 942 ; INTERRUPT CODE TO LOOK AT CORRECT BITS FOR CONTROLLER NUMBER. ; 943 ;46 FOLLOW-ON TO EDIT 45, SAVING 2 WORDS AND A CYCLE ; 944 ; ALSO MOVE JRST TO 600, JFCL TO 700, UUO'S TO 100X AS PREPARATION ; 945 ; FOR EXTENDED INSTRUCTION SET ; 946 ;45 FIX SXCT TO LOOK AT AC FIELD OF SXCT, NOT SUBJECT INSTRUCTION, ; 947 ; WHEN DECIDING WHETHER TO USE BASE-TYPE ADDRESS CALCULATION. ; 948 ;44 FIX PAGE FAIL LOGIC TO WORK FOR EITHER PAGE FAIL OR PARITY ; 949 ; ERROR. EDITS 42 AND 43 BOTH WRONG. ALSO CORRECT RACE IN ; 950 ; WRITING PERFORMANCE ANALYSIS ENABLES TO PREVENT SPURIOUS COUNTS. ; 951 ;43 CORRECT USE OF PF DISP BY EDIT 42. LOW BITS ARE INVERTED ; 952 ;42 FIX BUGS INTRODUCED BY EDIT 40, WHICH MADE FLTR OF 1B0 HANG ; 953 ; TRYING TO NEGATE IT, AND FIX UP EXPONENT CORRECTION ON LONG ; 954 ; SHIFT LEFT. ALSO PUT IN CODE TO HANDLE PARITY ERROR PAGE ; 955 ; FAILURES, AND SET TIME CONTROLS ON 43-47. ; 956 ;41 REWRITE OF VECTOR INTERRUPT PROCESSING TO MAKE DTE VECTORS ; 957 ; GO TO 142+8N, WHERE N IS DTE#. RH20 GO TO PROGRAMMED ADDRESS ; 958 ; IN EPT, EXTERNAL DEVICES USE EXEC VIRTUAL ADDRESSES. ; 959 ;40 IMPROVEMENTS TO FLOATING NORMALIZATION TO MAKE LONG SHIFTS ; 960 ; FASTER, PRIMARILY TO HELP FLTR ; 961 ;37 FIX FLOATING DIVIDE SO THAT THE TRUNCATED FORM OF A NEGATIVE ; 962 ; QUOTIENT IS EQUAL TO THE HIGH-ORDER PART OF THE INFINITE- ; 963 ; PRECISION QUOTIENT. SEE COMMENTS IN THE CODE. ALSO BUM ; 964 ; A CYCLE OUT OF FLOATING DIVIDE BY STARTING THE NORMALIZE ; 965 ; WHILE MOVING THE QUOTIENT INTO AR. ; 966 ; SEVERAL CHANGES TO MAKE TRACKS FEATURE WORK ; 967 ;36 FIX CONO MTR TO PUT DATA ON BOTH HALVES, SO PI CAN SEE PIA ; 968 ;35 FIX CONI PI TO READ BACK WRITE EVEN PARITY ENABLES ; 969 ;34 FIX BLT USE OF SR, SO NO CORRECTION OF ARX NECESSARY ; 970 ;33 FIX PAGE TABLE REFERENCES TO FORCE UNPAGED REF. FIX TRAP ; 971 ; TO SET PC+1 INHIBIT. ; 972 ;32 CORRECT SETTING OF SC FOR SHIFTING METER COUNTERS, TO GET ; 973 ; 12 BITS UNUSED AT RIGHT WHEN IT GETS TO CORE. ; 974 ;31 RECODE ASH AND ASHC TO SAVE SPACE ; KL10 Microcode for TOPS-20 4 February 1985 V1(357) MICRO %34(270) Page 1-17 ; EDHIS.MIC[4,30] 13:59 4-Feb-85 REVISION HISTORY ; 975 ;30 FIX JFFO TO SHIFT AR CORRECTLY AT JFFO2. BUM ADJSP TO USE ; 976 ; STMAC FOR UPDATING PDL POINTER. ; 977 ;27 FIX CONI PAG TO READ EBUS. CORRECT DEFINITIONS OF MBOX ; 978 ; REGISTER FUNCTIONS, WHICH HAD BITS 0 AND 3 INVERTED. ; 979 ;26 FIX DEFINITIONS OF DIAG FUNC CONO MTR AND CONO TIM, WHICH ; 980 ; WERE REVERSED ; 981 ;25 FIX DECODING OF PHYSICAL DEVICE NUMBER IN PI FUNCTION CODE ; 982 ; AND RE-CODE JFCL FOR FEWER MICROWORDS ; 983 ;24 FIX JFFO TO SHIFT ON FIRST 6-BIT TEST STEP, AND JRSTF TO ; 984 ; KEEP E AND XR DISTINCT. ALSO SET LOAD-ENABLE BITS IN ; 985 ; DATAI PAG, WORD. ; 986 ;23 FIX CONO PI, TO HOLD AR ONTO EBUS THRU REL EBUS, BECAUSE ; 987 ; PI BOARD DELAYS CONO PI TO GET CONO SET EQUIVALENT. ; 988 ;22 MORE JFCL FIXES. MUST USE FLAG CTL/JFCL WHILE CLEARING BITS, ; 989 ; AS WELL AS WHILE TESTING THEM. BUM A WORD OUT OF JFFO BY ; 990 ; MAKING THE SIXBIT COUNT NEGATIVE. CHANGES SO SHIFT SUBR ; 991 ; RETURNS 2, BYTEA 1. FIX SETMB TO STORE BACK AND FETCH. ; 992 ;21 RE-WRITE JFCL TO KEEP LOW OPCODE BITS OUT OF AR0-1, BECAUSE ; 993 ; PC00 GETS PROPAGATED LEFT TO ADA -1 AND -2. ; 994 ;20 FIX BLT TO LOAD BR WITH SRC-DST ADDR ; 995 ; ALSO SET TIME PARAMETERS ON CONDITIONAL FETCH FUNCTIONS ; 996 ;17 CHANGE SWEEP ONE PAGE TO PUT PAGE # IN E, RATHER THAN ADDR. ; 997 ; ALSO CHANGE COND/FM WRITE TO MATCH ECO #1068. ; 998 ;16 FIX JUMP FETCH MACRO TO LOAD VMA FROM PC+1 (TEST SATISFIED ; 999 ; OVERRIDES THIS TO HOLD VMA). ALSO BUM ONE MICROWORD FROM MUUO. ; 1000 ;15 INCLUDE PAGE FAIL DISP IN DISP/ FIELD ; 1001 ; ALSO MAKE MUUO STORE PROCESS CONTEXT WORD AT 426, AND SETUP ; 1002 ; PCS FROM PC EXTENSION, CWSX FROM SXCT ; 1003 ;14 FIX DEFINITIONS OF SKIP/IO LEGAL, AC#0, SC0, EVEN PAR ; 1004 ; ALSO FIX DATAO PAG, TO SEND LH DATA ON BOTH HALVES OF EBUS ; 1005 ;13 ALIGN SETEBR SO CALL TO SHIFT RETURNS CORRECTLY ; 1006 ;12 MAKE SURE AD COPIES AR DURING DATAO, CONO, AND CLEAR AR AT ; 1007 ; SET DATAI TIME. ; 1008 ;11 FIXES TO CONTINUE CODE SO CONSOLE WORKS, AND CORRECTIONS TO ; 1009 ; PROTECTED DEP/EXAM SO PROTECTION PROTECTS. ; 1010 ;10 FIX A READ MACRO TO VMA/PC+1. AD OVERRIDES UNLESS DRAM A=1 ; 1011 ;07 RE-WRITE OF PI CYCLE CODE TO RECOGNIZE NEW EBUS SPEC. ; 1012 ;06 FIX DEFINITIONS OF SKIPS 40-57 BY COMPLEMENTING 3 LOW ORDER BITS ; 1013 ; FIX MULSUB TO CORRESPOND TO NEW CRA LOGIC ; 1014 ;05 FIX EBUS CTL DEFINITIONS TO GET F01 CORRECT. CORRECT FLAG CTL ; 1015 ; DEFINITIONS TO PREVENT LEAVE USER WHEN NOT WANTED, AND FIX ; 1016 ; JRST/JFCL TO HAVE FLAGS IN AR WHEN NEEDED. ; 1017 ;04 FIX RETURNS FROM MULSUB, PUT BETTER COMMENTS ON SNORM CODE, ; 1018 ; IMPROVE SNORM ALGORITHM TO MINIMIZE WORST-CASE TIME. ; 1019 ;03 FIX DISPATCH ADDRESS PROBLEMS, MOSTLY JRST/JFCL AND UUO'S. ; 1020 ;02 CHANGES PER INSTRUCTION SET REVIEW -- DELETE USE OF BIT12 OF ; 1021 ; BYTE POINTERS, CHANGE BLT TO PUT FINAL SRC,DST ADDRESSES IN AC, ; 1022 ; MAKE TRUNCATE FORM FLOATING POINT REALLY TRUNCATE, ELIMINATE ; 1023 ; LOCAL JSYS SUPPORT, DELETE PXCT OPCODE (XCT W/ NON-ZERO AC IN ; 1024 ; EXEC MODE), LUUO'S GO TO 40/41 OF CURRENT SPACE. ; 1025 ;01 UPDATES FOR .TITLE AND .TOC PSEUDO OPS, ; 1026 ; AND VARIOUS CHANGES FOR PROTO HARDWARE ; 1027 ;00 CREATION, BASED ON BREADBOARD AS OF EDIT 66 ; 1028 .BIN ; 1029 ; KL10 Microcode for TOPS-20 4 February 1985 V1(357) MICRO %34(270) Page 1 ; DEFINE.MIC[4,30] 17:12 9-Aug-84 CONDITIONAL ASSEMBLY VARIABLE DEFINITIONS ; 1030 .TOC "CONDITIONAL ASSEMBLY VARIABLE DEFINITIONS" ; 1031 .NOBIN ; 1032 ; 1033 ; [COST ESTIMATES IN BRACKETS INDICATE NUMBER OF ADDITIONAL ; 1034 ; MICROINSTRUCTIONS REQUIRED BY TURNING ON THE FEATURE SWITCH] ; 1035 ; 1036 .DEFAULT/TRACKS=0 ;1 ENABLES STORING PC AFTER EVERY INSTRUCTION, ; 1037 ; & CREATES DATAI/O PI TO READ/SETUP PC BUFFER ; 1038 ;ADDRESS. [COST = 21 WDS] ; 1039 ; 1040 .DEFAULT/OP.CNT=0 ;1 ENABLES CODE TO BUILD A HISTOGRAM IN CORE ; 1041 ; COUNTING USES OF EACH OPCODE IN USER & EXEC ; 1042 ; 1043 .DEFAULT/OP.TIME=0 ;1 ENABLES CODE TO ACCUMULATE TIME SPENT BY ; 1044 ; EACH OPCODE ; 1045 ; 1046 .DEFAULT/SO.CNT=0 ;SECOND ORDER COUNTING IN 128K STARTING AT LOC ; 1047 ; 400000 NOT DEBUGED [COST = 28 WDS] ; 1048 ; 1049 .DEFAULT/SO2.CNT=0 ;SECOND ORDER COUNTING IN 128K STARTING AT LOC ; 1050 ; PRESENTED AT START DOES ONE MORE ADD THAN ; 1051 ; SO.CNT AND HENCE AN INSTRUCTION TAKES ; 1052 ; 120 NS LONGER THAN SO.CNT [COST = 28 WDS] ; 1053 ; 1054 .DEFAULT/PAGCNT=0 ;Enable code to count entries into the PFH and ; 1055 ; number of DATAO PAGs with bit 2 set. [Cost = ; 1056 ; 6 words] [327] ; 1057 ; 1058 .DEFAULT/FPLONG=1 ;1 ENABLES KA-STYLE DOUBLE PRECISION FLOATING ; 1059 ;POINT INSTRUCTIONS: FADL, FSBL, FMPL, FDVL, ; 1060 ; UFA, DFN. [COST = 49 WDS] ; 1061 ; 1062 .DEFAULT/MULTI=0 ;1 IF MULTIPROCESSOR SYSTEM, TO SUPPRESS CACHE ; 1063 ;ON UNPAGED REF'S. PAGED REF'S ARE UP TO EXEC. ; 1064 ; 1065 .DEFAULT/KLPAGE=0 ;1 ENABLES KL-MODE PAGING. [COST = 85 WDS] ; 1066 ; 1067 .DEFAULT/SHIFT.MUUO=0 ;ENABLES A DIFFERENT MUUO FORMAT FOR MODEL A ; 1068 ;THAT IS SLIGHTLY CLOSER TO THE XADDR FORMAT ; 1069 ;EXPECTED TO BE USED IN CONJUNCTION WITH LONG.PC ; 1070 ;BUT THEY DO NOT DEPEND ON EACH OTHER ; 1071 ; 1072 .DEFAULT/MODEL.B=0 ;1 INDICATES EXTENDED ADDRESSING HARDWARE, ; 1073 ;PRIMARILY 2K (RATHER THAN 1280) CONTROL RAM, ; 1074 ;NEW MCL, CTL, AND APR BOARDS. ; 1075 ; 1076 .DEFAULT/BLT.PXCT=0 ;1ENABLES SPECIAL BLT CODE FOR EXTENDED ADDRESSING ; 1077 ;THIS IS SUPPOSED TO GO AWAY IN THE FUTURE ; 1078 ;WHEN PXCT OF BLT IS NO LONGER USED BY TOPS-20 ; 1079 ;THIS SHOULD ONLY BE USED BY KLX XADDR MICROCODE ; 1080 ;[COST 12 WORDS] ; 1081 ; 1082 .IF/KLPAGE ;;1083 .IFNOT/MODEL.B ;;1084 .SET/XADDR=0 ;CAN'T DO EXTENDED ADDRESSING WITHOUT MODEL B ;;1085 .set/extexp=0 ;No room in TOPS20 Model A machine for extended exp. ; KL10 Microcode for TOPS-20 4 February 1985 V1(357) MICRO %34(270) Page 1-1 ; DEFINE.MIC[4,30] 17:12 9-Aug-84 CONDITIONAL ASSEMBLY VARIABLE DEFINITIONS ; 1086 .ENDIF/MODEL.B ; 1087 ;;1088 .IFNOT/KLPAGE ;;1089 .SET/XADDR=0 ;CAN'T HAVE EXTENDED ADDRESSING WITHOUT KL PAGE ; 1090 .ENDIF/KLPAGE ; 1091 ; 1092 .DEFAULT/IMULI.OPT=0 ;1 ENABLES OPTIMIZATION OF IMULI TO TAKE ONLY ; 1093 ;NINE MULTIPLY STEPS [COST = 3 WDS] ; 1094 ; 1095 .IF/MODEL.B ; [COST = 19 WDS] ; 1096 .SET/SXCT=0 ;DONT NEED SXCT WITH EXTENDED ADDRESSING ; 1097 ;CAN'T DO IT IN MODEL B HARDWARE ; 1098 .ENDIF/MODEL.B ; 1099 .DEFAULT/SXCT=0 ;1 ENABLES SPECIAL XCT INSTR, WHICH ALLOWS ; 1100 ; DIAGNOSTICS TO GENERATE LARGE ADDRESSES. ; 1101 ; 1102 ; 1103 .DEFAULT/SNORM.OPT=0 ;1 ENABLES FASTER NORMALIZATION OF SINGLE- ; 1104 ; PRECISION RESULTS WHICH HAVE SEVERE LOSS OF ; 1105 ; SIGNIFICANCE [COST = 4 WDS] ; 1106 ;;1107 .IFNOT/MODEL.B ;;1108 .SET/PUSHM=0 ;CODE ONLY WORKS FOR MODEL B ; 1109 .ENDIF/MODEL.B ; 1110 ; 1111 .DEFAULT/PUSHM=0 ;ENABLES THE PUSHM AND POPM INSTRUCTIONS ; 1112 ; [COST = ??? WDS] ; 1113 .DEFAULT/EXTEND=1 ;1 ENABLES EXTENDED INSTRUCTION SET ; 1114 ; [COST = 290 WDS] ; 1115 ; 1116 .DEFAULT/DBL.INT=1 ;1 ENABLES DOUBLE INTEGER INSTRUCTIONS ; 1117 ; [COST = 59 WDS] ; 1118 ; 1119 .DEFAULT/ADJBP=1 ;1 ENABLES ADJUST BYTE POINTER ; 1120 ; [COST = 24 WDS] ; 1121 ; 1122 .DEFAULT/RPW=1 ;1 ENABLES READ-PAUSE-WRITE CYCLES FOR ; 1123 ;NON-CACHED REFERENCES BY CERTAIN INSTRUCTIONS. ; 1124 ; [COST = 0] ; 1125 ; 1126 .DEFAULT/WRTST=0 ;1 ENABLES WRITE-TEST CYCLES AT AREAD TIME FOR ; 1127 ;INSTRUCTIONS LIKE MOVEM AND SETZM. [COST = 0] ; 1128 ; 1129 .DEFAULT/BACK.BLT=0 ;1 ENABLES BLT TO DECREMENT ADDRESSES ON EACH ; 1130 ;STEP IF E < RH(AC). BREAKS MANY PROGRAMS. ; 1131 ; [COST = 9 WDS] ; 1132 ;;1133 .IF/TRACKS ;SETUP CONTROL FOR COMMON CODE ;;1134 .SET/INSTR.STAT=1 ; 1135 .ENDIF/TRACKS ; 1136 ;;1137 .IF/OP.CNT ;;1138 .SET/INSTR.STAT=1 ;ENABLE COMMON CODE, ERROR IF TRACKS TOO ; 1139 .ENDIF/OP.CNT ; 1140 ;;1141 .IF/OP.TIME ; KL10 Microcode for TOPS-20 4 February 1985 V1(357) MICRO %34(270) Page 1-2 ; DEFINE.MIC[4,30] 17:12 9-Aug-84 CONDITIONAL ASSEMBLY VARIABLE DEFINITIONS ;;1142 .SET/INSTR.STAT=1 ;ERROR IF TRACKS OR OP.CNT ALSO SET ; 1143 .ENDIF/OP.TIME ; 1144 ;;1145 .IF/SO.CNT ;;1146 .SET/INSTR.STAT=1 ; 1147 .ENDIF/SO.CNT ; 1148 ;;1149 .IF/SO2.CNT ;;1150 .SET/INSTR.STAT=1 ; 1151 .ENDIF/SO2.CNT ; 1152 ; 1153 .DEFAULT/INSTR.STAT=0 ;IF NO STATISTICS, TURN OFF COMMON CODE ; 1154 ;;1155 .IF/INSTR.STAT ;;1156 .SET/NONSTD=1 ;STATISTICS CODE IS NONSTANDARD ;;1157 .SET/TRXDEF=1 ;Make sure TRX registers get defined [327] ; 1158 .ENDIF/INSTR.STAT ; 1159 ;;1160 .IF/PAGCNT ;;1161 .SET/NONSTD=1 ;All statistics are nonstandard ;;1162 .SET/TRXDEF=1 ;We need the TRX registers ; 1163 .ENDIF/PAGCNT ; 1164 ; 1165 .DEFAULT/TRXDEF=0 ;Normally no TRX registers needed ; 1166 ; 1167 .DEFAULT/LONG.PC=0 ;LONG PC FORMAT [COST 9 WORDS 11 WORDS IF XADDR] ; 1168 ; 1169 .DEFAULT/EPT540=0 ;PUT EPT AND UPT SECTION TABLES AT 540 IF ON ; 1170 ; 440 IF OFF ; 1171 ; 1172 .DEFAULT/DIAG.INST=0 ;UNSUPPORTED DIAGNOSTIC MICROCODE ; 1173 ;;1174 .IF/DIAG.INST ;;1175 .SET/NONSTD=1 ;NONSTANDARD MICROCODE ; 1176 .ENDIF/DIAG.INST ; 1177 ; 1178 .DEFAULT/NONSTD=0 ;NONSTANDARD MICROCODE IS NORMALLY OFF ; 1179 .DEFAULT/SMP=1 ;[216]1 IF SYMMETRIC MULTIPROCESSOR ; 1180 ;SYSTEM. ; 1181 ;TO ENABLE RPW ON DPB INSTRUCTION. ; 1182 ;[COST=9 WORDS if not XADDR, more if XADDR] ; 1183 .DEFAULT/OWGBP=0 ;[264] ; 1184 .DEFAULT/IPA20=0 ;[264] ; 1185 .DEFAULT/NOCST=0 ;[264] ; 1186 .DEFAULT/CST.WRITE=1 ;[314] Enable CST writable bit ; 1187 .DEFAULT/BIG.PT=1 ;[333][347] Special code for big page table and Keep bit ; 1188 .DEFAULT/DDT.BUG=0 ;[346] If on, enable APRID hack to move bit 23 ; 1189 .DEFAULT/GFTCNV=1 ;[273] GFLOAT CONVERSION INST. ; 1190 ; KL10 Microcode for TOPS-20 4 February 1985 V1(357) MICRO %34(270) Page 2 ; DEFINE.MIC[4,30] 17:12 9-Aug-84 HOW TO READ THE MICROCODE -- FORMATS & CONSTRUCTS ; 1191 .TOC "HOW TO READ THE MICROCODE -- FORMATS & CONSTRUCTS" ; 1192 ; 1193 ;(1) FIELD DEFINITIONS ; 1194 ; THESE OCCUR AT THE BEGINNING OF THE LISTING, IN THE SOURCE FILE ; 1195 ; DEFINE.MIC (CONTROL AND DISPATCH RAM DEFINITIONS). ; 1196 ; THEY HAVE THE FORM: ; 1197 ; SYMBOL/=M,J ; 1198 ;ANOTHER FORM ACCEPTED BY THE ASSEMBLER (FOR HISTORIC REASONS) IS: ; 1199 ; SYMBOL/=J,K,R,M ;THIS FORM HAS BEEN REMOVED FROM THIS CODE ; 1200 ; THE PARAMETER (J) IS MEANINGFUL ONLY WHEN "D" IS SPECIFIED ; 1201 ; AS THE DEFAULT MECHANISM, AND IN THAT CASE, GIVES THE DEFAULT VALUE OF ; 1202 ; THE FIELD IN OCTAL. ; 1203 ; THE PARAMETER (K) GIVES THE FIELD SIZE IN (DECIMAL) NUMBER ; 1204 ; OF BITS. THIS IS USED ONLY IN THE OUTDATED FORMAT. ; 1205 ; THE PARAMETER (L) GIVES THE BIT POSITION OF THE LEFTMOST BIT ; 1206 ;IN THE FIELD. THE SAME METHOD IS USED AS FOR (R) BELOW. ; 1207 ; THE PARAMETER (R) GIVES THE FIELD POSITION IN DECIMAL ; 1208 ; AS THE BIT NUMBER OF THE RIGHTMOST BIT OF THE FIELD. BITS ARE NUMBERED ; 1209 ; FROM 0 ON THE LEFT. NOTE THAT THE POSITION OF BITS IN THE MICROWORD ; 1210 ; SHOWN IN THE LISTING BEARS NO RELATION TO THE ORDERING OF BITS IN THE ; 1211 ; HARDWARE MICROWORD, WHERE FIELDS ARE OFTEN BROKEN UP AND SCATTERED. ; 1212 ; THE PARAMETER (M) IS OPTIONAL, AND SELECTS A DEFAULT ; 1213 ; MECHANISM FOR THE FIELD. THE LEGAL VALUES OF THIS PARAMETER ARE THE ; 1214 ; CHARACTERS "D", "T", "P", OR "+". ; 1215 ; "D" MEANS (J) IS THE DEFAULT VALUE OF THE FIELD IF NO EXPLICIT ; 1216 ; VALUE IS SPECIFIED. ; 1217 ; "T" IS USED ON THE TIME FIELD TO SPECIFY THAT THE VALUE OF THE ; 1218 ; FIELD DEPENDS ON THE TIME PARAMETERS SELECTED FOR OTHER FIELDS. ; 1219 ; THE VALUE OF A FIELD WITH THIS SPECIFICATION DEFAULTS TO THE ; 1220 ; MAX OF , , . ; 1223 ; WITHIN THE KL10 MICROCODE, T1 PARAMETERS ARE USED TO SPECIFY ; 1224 ; FUNCTIONS WHICH DEPEND ON THE ADDER SETUP TIME, AND T2 PARAMETERS ; 1225 ; ARE USED FOR FUNCTIONS WHICH REQUIRE ADDITIONAL TIME FOR CORRECT ; 1226 ; SELECTION OF THE NEXT MICROINSTRUCTION ADDRESS. ; 1227 ; "P" IS USED ON THE PARITY FIELD TO SPECIFY THAT THE VALUE OF THE ; 1228 ; FIELD SHOULD DEFAULT SUCH THAT PARITY OF THE ENTIRE WORD ; 1229 ; IS ODD. IF THIS OPTION IS SELECTED ON A FIELD WHOSE SIZE (K) IS ; 1230 ; ZERO, THE MICRO ASSEMBLER WILL ATTEMPT TO FIND A BIT SOMEWHERE ; 1231 ; IN THE WORD FOR WHICH NO VALUE IS SPECIFIED OR DEFAULTED. ; 1232 ; "+" IS USED ON THE JUMP ADDRESS FIELD TO SPECIFY THAT THE DEFAULT ; 1233 ; JUMP ADDRESS IS THE ADDRESS OF THE NEXT INSTRUCTION ASSEMBLED (NOT, ; 1234 ; IN GENERAL, THE CURRENT LOCATION +1). ; 1235 ; IN GENERAL, A FIELD CORRESPONDS TO THE SET OF BITS WHICH PROVIDE ; 1236 ; SELECT INPUTS FOR MIXERS OR DECODERS, OR CONTROLS FOR ALU'S. ; 1237 ; EXAMPLES: ; 1238 ; AR/=<24:26>D,0 OR AR/=0,3,26,D ; 1239 ; THE MICROCODE FIELD WHICH CONTROLS THE AR MIXER (AND THEREFORE ; 1240 ; THE DATA TO BE LOADED INTO AR ON EACH EBOX CLOCK) IS THREE BITS WIDE ; 1241 ; AND THE RIGHTMOST BIT IS SHOWN IN THE LISTING AS BIT 26 OF THE ; 1242 ; MICROINSTRUCTION. IF NO VALUE IS SPECIFICALLY REQUESTED FOR THE FIELD, ; 1243 ; THE MICROASSEMBLER WILL ENSURE THAT THE FIELD IS 0. ; 1244 ; AD/=<12:17> OR AD/=0,6,17 ; 1245 ; THE FIELD WHICH CONTROLS THE AD IS 6 BITS WIDE, ENDING ON ; 1246 ; BIT 17. THE FOURTH PARAMETER OF THE FIELD IS OMITTED, SO THE FIELD ; KL10 Microcode for TOPS-20 4 February 1985 V1(357) MICRO %34(270) Page 2-1 ; DEFINE.MIC[4,30] 17:12 9-Aug-84 HOW TO READ THE MICROCODE -- FORMATS & CONSTRUCTS ; 1247 ; IS AVAILABLE TO THE MICROASSEMBLER (IF NO VALUE IS EXPLICITLY ; 1248 ; CALLED OUT FOR THE FIELD) FOR MODIFICATION TO ENSURE ODD PARITY IN THE ; 1249 ; ENTIRE WORD. ; 1250 ; ; 1251 ;(2) VALUE DEFINITIONS ; 1252 ; FOLLOWING A FIELD DEFINITION, SYMBOLS MAY BE CREATED IN THAT ; 1253 ; FIELD TO CORRESPOND TO VALUES OF THE FIELD. THE FORM IS: ; 1254 ; SYMBOL=N,T1,T2 ; 1255 ; "N" IS, IN OCTAL, THE VALUE OF SYMBOL WHEN USED IN THE FIELD. ; 1256 ; T1 AND T2 ARE OPTIONAL, AND SPECIFY PARAMETERS IN THE TIME FIELD ; 1257 ; CALCULATION FOR MICROINSTRUCTIONS IN WHICH THIS FIELD/SYMBOL IS USED. ; 1258 ; THE MICROASSEMBLER COMPUTES THE SUMS OF ALL THE T1'S AND ALL THE T2'S ; 1259 ; SPECIFIED FOR FIELD/SYMBOL SPECIFICATIONS IN A WORD, AND USES THE MAX ; 1260 ; OF THE TWO SUMS AS THE DEFAULT VALUE FOR THE FIELD WHOSE DEFAULT ; 1261 ; MECHANISM IS "T". EXAMPLES: ; 1262 ; AD/=<12:17> ;FIELD DEFINITION IN WHICH FOLLOWING SYMBOLS EXIST ; 1263 ; XOR=31 ; 1264 ; A+B=6,1 ; 1265 ; HERE THE SYMBOLS "XOR" AND "A+B" ARE DEFINED FOR THE "AD" FIELD. ; 1266 ; TO THE ASSEMBLER, THEREFORE, WRITING "AD/XOR" MEANS PUT THE VALUE 31 ; 1267 ; INTO THE 6-BIT FIELD ENDING ON BIT 17 OF THE MICROWORD. THE SYMBOLS ; 1268 ; ARE CHOSEN FOR MNEMONIC SIGNIFICANCE, OF COURSE, SO ONE READING ; 1269 ; THE MICROCODE WOULD INTERPRET "AD/XOR" AS "THE OUTPUT OF AD SHALL BE THE ; 1270 ; EXCLUSIVE OR OF ITS A AND B INPUTS". SIMILIARLY, "AD/A+B" IS READ AS ; 1271 ; "AD PRODUCES THE SUM OF A AND B". THE SECOND PARAMETER IN THE DEFINITION ; 1272 ; OF "A+B" IS A CONTROL TO THE MICRO ASSEMBLER'S TIME-FIELD CALCULATION, ; 1273 ; WHICH TELLS THE ASSEMBLER THAT THIS OPERATION TAKES LONGER THAN THE ; 1274 ; BASIC CYCLE, AND THEREFORE THAT THE TIME FIELD SHOULD BE INCREASED. ; 1275 ; AR/=<24:26>D,0 ;FIELD DEFINITION FOR FOLLOWING SYMBOLS ; 1276 ; AR=0 ; 1277 ; AD=2 ; 1278 ; HERE THE SYMBOLS "AR" AND "AD" ARE DEFINED FOR THE FIELD NAMED ; 1279 ; "AR", WHICH CONTROLS THE AR MIXER. WE COULD WRITE AR/AR TO MEAN THAT ; 1280 ; THE AR MIXER SELECT INPUTS WOULD BE 0, WHICH IN THE ; 1281 ; HARDWARE SELECTS THE AR OUTPUT FOR RECIRCULATION TO THE REGISTER. IN ; 1282 ; PRACTICE, HOWEVER, WE WANT THIS TO BE THE DEFAULT CASE, SO THAT AR ; 1283 ; DOES NOT CHANGE UNLESS WE SPECIFICALLY REQUEST IT, SO THE FIELD ; 1284 ; DEFINITION SPECIFIES 0 AS THE DEFAULT VALUE OF THE FIELD. IF WE ; 1285 ; WANT AR LOADED FROM THE AD OUTPUT, WE WRITE "AR/AD" TO SET THE ; 1286 ; MIXER SELECTS TO PASS THE AD OUTPUT INTO THE AR. ; 1287 ; ; 1288 ;(3) LABEL DEFINITIONS ; 1289 ; A MICRO INSTRUCTION MAY BE LABELLED BY A SYMBOL FOLLOWED BY COLON ; 1290 ; PRECEDING THE MICROINSTRUCTION DEFINITION. THE ADDRESS OF THE ; 1291 ; MICROINSTRUCTION BECOMES THE VALUE OF THE SYMBOL IN THE FIELD NAMED "J". ; 1292 ; EXAMPLE: ; 1293 ; FOO: J/FOO ; 1294 ; THIS IS A MICROINSTRUCTION WHOSE "J" FIELD (JUMP ADDRESS) CONTAINS ; 1295 ; THE VALUE "FOO". IT ALSO DEFINES THE SYMBOL "FOO" TO BE THE ADDRESS ; 1296 ; OF ITSELF. THEREFORE, IF EXECUTED BY THE MICROPROCESSOR, IT WOULD ; 1297 ; LOOP ON ITSELF. ; 1298 ; ; 1299 ;(4) COMMENTS ; 1300 ; A SEMICOLON ANYWHERE ON A LINE CAUSES THE REST OF THE LINE ; 1301 ; TO BE IGNORED BY THE ASSEMBLER. THIS TEXT IS AN EXAMPLE OF COMMENTS. ; 1302 ; ; KL10 Microcode for TOPS-20 4 February 1985 V1(357) MICRO %34(270) Page 2-2 ; DEFINE.MIC[4,30] 17:12 9-Aug-84 HOW TO READ THE MICROCODE -- FORMATS & CONSTRUCTS ; 1303 ;(5) MICROINSTRUCTION DEFINITION ; 1304 ; A WORD OF MICROCODE IS DEFINED BY SPECIFYING A FIELD NAME, ; 1305 ; FOLLOWED BY SLASH (/), FOLLOWED BY A VALUE. THE VALUE MAY BE A ; 1306 ; SYMBOL DEFINED FOR THAT FIELD, AN OCTAL DIGIT STRING, OR A DECIMAL ; 1307 ; DIGIT STRING (DISTINGUISHED BY THE FACT THAT IT CONTAINS "8" AND/OR ; 1308 ; "9" AND/OR IS TERMINATED BY A PERIOD). SEVERAL FIELDS MAY BE SPECIFIED ; 1309 ; IN ONE MICROINSTRUCTION BY SEPARATING FIELD/VALUE SPECIFICATIONS WITH ; 1310 ; COMMAS. EXAMPLE: ; 1311 ; ADB/BR,ADA/AR,AD/A+B,AR/AD ; 1312 ; THE FIELD NAMED "ADB" IS GIVEN THE VALUE NAMED "BR" (TO ; 1313 ; CAUSE THE MIXER ON THE B SIDE OF AD TO SELECT BR), FIELD "ADA" HAS VALUE ; 1314 ; "AR", FIELD "AD" HAS VALUE "A+B", AND FIELD "AR" HAS VALUE "AD". ; 1315 ; ; 1316 ;(6) CONTINUATION ; 1317 ; THE DEFINITION OF A MICROINSTRUCTION MAY CONTINUED ONTO TWO OR ; 1318 ; MORE LINES BY BREAKING IT AFTER ANY COMMA. IN OTHER WORDS, IF THE ; 1319 ; LAST NON-BLANK, NON-COMMENT CHARACTER ON A LINE IS A COMMA, THE ; 1320 ; INSTRUCTION SPECIFICATION IS CONTINUED ON THE FOLLOWING LINE. ; 1321 ; EXAMPLE: ; 1322 ; ADB/BR,ADA/AR, ;SELECT AR & BR AS AD INPUTS ; 1323 ; AD/A+B,AR/AD ;TAKE THE SUM INTO AR ; 1324 ; BY CONVENTION, CONTINUATION LINES ARE INDENTED AN EXTRA TAB. ; 1325 ; ; 1326 ;(7) MACROS ; 1327 ; A MACRO IS A SYMBOL WHOSE VALUE IS ONE OR MORE FIELD/VALUE ; 1328 ; SPECIFICATIONS AND/OR MACROS. A MACRO DEFINITION IS A LINE CONTAINING ; 1329 ; THE MACRO NAME FOLLOWED BY A QUOTED STRING WHICH IS THE VALUE OF THE ; 1330 ; MACRO. EXAMPLE: ; 1331 ; AR_AR+BR "ADB/BR,ADA/AR,AD/A+B,AR/AD" ; 1332 ; THE APPEARANCE OF A MACRO IN A MICROINSTRUCTION DEFINITION IS EQUIVALENT ; 1333 ; TO THE APPEARANCE OF ITS VALUE. MACROS FOR VARIOUS FUNCTIONS ; 1334 ; ARE DEFINED IN "MACRO.MIC". ; 1335 ; ; 1336 ;(8) PSEUDO OPS ; 1337 ; THE MICRO ASSEMBLER HAS 10 PSEUDO-OPERATORS: ; 1338 ;.DCODE AND .UCODE SELECT THE RAM INTO WHICH SUBSEQUENT MICROCODE WILL ; 1339 ;BE LOADED, AND THEREFORE THE FIELD DEFINITIONS AND MACROS WHICH ARE ; 1340 ;MEANINGFUL IN SUBSEQUENT MICROCODE ; 1341 ;.TITLE DEFINES A STRING OF TEXT TO APPEAR IN THE PAGE HEADER, AND ; 1342 ;.TOC DEFINES AN ENTRY FOR THE TABLE OF CONTENTS AT THE BEGINNING. ; 1343 ;.SET DEFINES THE VALUE OF A CONDITIONAL ASSEMBLY PARAMETER, ; 1344 ;.CHANGE REDEFINES A CONDITIONAL ASSEMBLY PARAMETER, ; 1345 ;.DEFAULT ASSIGNS A VALUE TO AN UNDEFINED PARAMETER. ; 1346 ;.IF ENABLES ASSEMBLY IF THE VALUE OF THE PARAMETER IS NOT ZERO, ; 1347 ;.IFNOT ENABLES ASSEMBLY IF THE PARAMETER VALUE IS ZERO, AND ; 1348 ;.ENDIF RE-ENABLES ASSEMBLY IF SUPPRESSED BY THE PARAMETER NAMED. ; 1349 ; ; 1350 ;(9) LOCATION CONTROL ; 1351 ; A MICROINSTRUCTION "LABELLED" WITH A NUMBER IS ASSIGNED TO THAT ; 1352 ; ADDRESS. ; 1353 ; THE CHARACTER "=" AT THE BEGINNING OF A LINE, FOLLOWED BY ; 1354 ; A STRING OF 0'S, 1'S, AND/OR *'S, SPECIFIES A CONSTRAINT ON THE ; 1355 ; ADDRESS OF FOLLOWING MICROINSTRUCTIONS. THE NUMBER OF CHARACTERS ; 1356 ; IN THE CONSTRAINT STRING (EXCLUDING THE "=") IS THE NUMBER OF LOW-ORDER ; 1357 ; BITS CONSTRAINED IN THE ADDRESS. THE MICROASSEMBLER ATTEMPTS TO FIND ; 1358 ; AN UNUSED LOCATION WHOSE ADDRESS HAS 0 BITS IN THE POSITIONS ; KL10 Microcode for TOPS-20 4 February 1985 V1(357) MICRO %34(270) Page 2-3 ; DEFINE.MIC[4,30] 17:12 9-Aug-84 HOW TO READ THE MICROCODE -- FORMATS & CONSTRUCTS ; 1359 ; CORRESPONDING TO 0'S IN THE CONSTRAINT STRING AND 1 BITS WHERE THE ; 1360 ; CONSTRAINT HAS 1'S. ASTERISKS DENOTE "DON'T CARE" BIT POSITIONS. ; 1361 ; IF THERE ARE ANY 0'S IN THE CONSTRAINT STRING, THE CONSTRAINT ; 1362 ; IMPLIES A BLOCK OF <2**N> MICROWORDS, WHERE N IS THE NUMBER OF 0'S ; 1363 ; IN THE STRING. ALL LOCATIONS IN THE BLOCK WILL HAVE 1'S IN THE ADDRESS ; 1364 ; BITS CORRESPONDING TO 1'S IN THE STRING, AND BIT POSITIONS DENOTED BY *'S ; 1365 ; WILL BE THE SAME IN ALL LOCATIONS OF THE BLOCK. ; 1366 ; IN SUCH A CONSTRAINT BLOCK, THE DEFAULT ADDRESS PROGRESSION IS ; 1367 ; COUNTING IN THE "0" POSITIONS OF THE CONSTRAINT STRING, BUT A NEW ; 1368 ; CONSTRAINT STRING OCCURING WITHIN A BLOCK MAY FORCE SKIPPING OVER ; 1369 ; SOME LOCATIONS OF THE BLOCK. WITHIN A BLOCK, A NEW CONSTRAINT ; 1370 ; STRING DOES NOT CHANGE THE PATTERN OF DEFAULT ADDRESS PROGRESSION, IT ; 1371 ; MERELY ADVANCES THE LOCATION COUNTER OVER THOSE LOCATIONS. THE ; 1372 ; MICROASSEMBLER WILL LATER FILL THEM IN. ; 1373 ; A NULL CONSTRAINT STRING ("=" FOLLOWED BY ANYTHING BUT "0", ; 1374 ; "1", OR "*") SERVES TO TERMINATE A CONSTRAINT BLOCK. ; 1375 ; EXAMPLES: ; 1376 ; =0 ; 1377 ; THIS SPECIFIES THAT THE LOW-ORDER ADDRESS BIT MUST BE ZERO-- ; 1378 ; THE MICROASSEMBLER FINDS AN EVEN-ODD PAIR OF LOCATIONS, AND PUTS ; 1379 ; THE NEXT TWO MICROINSTRUCTIONS INTO THEM. ; 1380 ; =11 ; 1381 ; THIS SPECIFIES THAT THE TWO LOW-ORDER BITS OF THE ADDRESS MUST ; 1382 ; BOTH BE ONES. SINCE THERE ARE NO 0'S IN THIS CONSTRAINT, THE ; 1383 ; ASSEMBLER FINDS ONLY ONE LOCATION MEETING THE CONSTRAINT. ; 1384 ; =0***** ; 1385 ; THIS SPECIFIES AN ADDRESS IN WHICH THE "40" BIT IS ZERO. DUE ; 1386 ; TO THE IMPLEMENTATION OF THIS FEATURE IN THE ASSEMBLER, THE DEFAULT ; 1387 ; ADDRESS PROGRESSION APPLIES ONLY TO THE LOW-ORDER 5 BITS, SO THIS ; 1388 ; CONSTRAINT FINDS ONE WORD IN WHICH THE "40" BIT IS ZERO, AND DOES ; 1389 ; NOT ATTEMPT TO FIND ONE IN WHICH THAT BIT IS A ONE. ; 1390 ;THIS LIMITATION HAS BEEN CHANGED WITH NEWER ASSEMBLER VERSIONS. ; 1391 ;HOWEVER NONE OF THE LOCATIONS IN THE MICROCODE REQUIRE ANYTHING BUT THE ; 1392 ;CONSTRAINT MENTIONED ABOVE. ; 1393 ; KL10 Microcode for TOPS-20 4 February 1985 V1(357) MICRO %34(270) Page 3 ; DEFINE.MIC[4,30] 17:12 9-Aug-84 MICROCODE LISTING TEMPLATE ; 1394 .TOC "MICROCODE LISTING TEMPLATE" ; 1395 ;HERE IS A TEMPLATE WHICH CAN BE USED WITH THE MICROCODE ; 1396 ; LISTING TO IDENTIFY FIELDS IN THE OUTPUT -- ; 1397 ; 1398 ; 1399 ; ---- ---- ---- ---- ---- ---- ---- ---- ; 1400 ; [--] [--] []!! !!!! !!!! !![] [][] ![-] ; 1401 ; ! ! !!! !!!! !!!! !! ! ! ! ! + # = MAGIC NUMBERS ; 1402 ; ! ! !!! !!!! !!!! !! ! ! ! + MARK = SCOPE SYNC ; 1403 ; ! ! !!! !!!! !!!! !! ! ! ! ; 1404 ; ! ! !!! !!!! !!!! !! ! ! + CALL, DISP/SPEC = SPEC FUNCTIONS ; 1405 ; ! ! !!! !!!! !!!! !! ! + SKIP/COND = SPECIAL FUNCTIONS ; 1406 ; ! ! !!! !!!! !!!! !! ! ; 1407 ; ! ! !!! !!!! !!!! !! + TIME, MEM = UINST TIME & MEM FUNCTION ; 1408 ; ! ! !!! !!!! !!!! !+ VMA = VMA INPUT SELECT ; 1409 ; ! ! !!! !!!! !!!! + SH/ARMM = SH FUNCTION / ARMM SELECT ; 1410 ; ! ! !!! !!!! !!!! ; 1411 ; ! ! !!! !!!! !!!+ SC, FE = SC INPUT SELECT & FE LOAD ; 1412 ; ! ! !!! !!!! !!+ SCADB = SELECT FOR SCAD "B" INPUT ; 1413 ; ! ! !!! !!!! !+ SCADA = ENABLE AND SELECT FOR SCAD "A" INPUT ; 1414 ; ! ! !!! !!!! + SCAD = SC/FE ADDER FUNCTION ; 1415 ; ! ! !!! !!!! ; 1416 ; ! ! !!! !!!+ FM ADR = FAST MEMORY ADDRESS SELECT ; 1417 ; ! ! !!! !!+ BR, BRX, MQ = LOAD BR & BRX, SEL FOR MQ ; 1418 ; ! ! !!! !+ ARX = SELECT FOR ARX INPUT ; 1419 ; ! ! !!! + AR = SELECT FOR AR INPUT ; 1420 ; ! ! !!! ; 1421 ; ! ! !!+ ADB = SELECT FOR ADDER "B" INPUT ; 1422 ; ! ! !+ ADA = SELECT AND ENABLE FOR ADDER "A" INPUT ; 1423 ; ! ! + AD = OPERATION IN ADDER AND ADDER EXTENSION ; 1424 ; ! ! ; 1425 ; ! + J = BASE ADDRESS TO WHICH THIS MICROINSTRUCTION JUMPS ; 1426 ; ! ; 1427 ; + LOCATION IN CRAM INTO WHICH THIS WORD IS LOADED ; 1428 ; ; 1429 ; U/V = MICRO INSTRUCTION FOR CRAM ; 1430 ; 1431 ;******************************************************************* ; 1432 ; 1433 ; D = WORD FOR DRAM ; 1434 ; ; 1435 ; + LOCATION IN DRAM INTO WHICH THIS WORD IS LOADED ; 1436 ; ! ; 1437 ; ! + A = OPERAND ACCESS CONTROL ; 1438 ; ! !+ B = INSTRUCTION "MODE" ; 1439 ; ! !! + P = PARITY FOR THIS WORD ; 1440 ; ! !! ! ; 1441 ; ! !! ! + J = ADDRESS OF HANDLER FOR THIS INSTRUCTION ; 1442 ; [--] !! ! [--] ; 1443 ; ---- ---- ---- ; 1444 ; KL10 Microcode for TOPS-20 4 February 1985 V1(357) MICRO %34(270) Page 4 ; DEFINE.MIC[4,30] 17:12 9-Aug-84 KL10 INSTRUCTION OPCODE MAP ; 1445 .TOC "KL10 INSTRUCTION OPCODE MAP" ; 1446 ; 1447 ; 0 1 2 3 4 5 6 7 ; 1448 ;100 UUO UUO EFAD EFSB JSYS ADJSP EFMP EFDV ; 1449 ;110 DFAD DFSB DFMP DFDV DADD DSUB DMUL DDIV ; 1450 ;120 DMOVE DMOVN FIX EXTEND DMOVEM DMOVNM FIXR FLTR ; 1451 ;130 UFA DFN FSC IBP ILDB LDB IDPB DPB ; 1452 ;140 FAD FADL FADM FADB FADR FADRI FADRM FADRB ; 1453 ;150 FSB FSBL FSBM FSBB FSBR FSBRI FSBRM FSBRB ; 1454 ;160 FMP FMPL FMPM FMPB FMPR FMPRI FMPRM FMPRB ; 1455 ;170 FDV FDVL FDVM FDVB FDVR FDVRI FDVRM FDVRB ; 1456 ; 0 1 2 3 4 5 6 7 ; 1457 ;200 MOVE MOVEI MOVEM MOVES MOVS MOVSI MOVSM MOVSS ; 1458 ;210 MOVN MOVNI MOVNM MOVNS MOVM MOVMI MOVMM MOVMS ; 1459 ;220 IMUL IMULI IMULM IMULB MUL MULI MULM MULB ; 1460 ;230 IDIV IDIVI IDIVM IDIVB DIV DIVI DIVM DIVB ; 1461 ;240 ASH ROT LSH JFFO ASHC ROTC LSHC UUO ; 1462 ;250 EXCH BLT AOBJP AOBJN JRST JFCL XCT MAP ; 1463 ;260 PUSHJ PUSH POP POPJ JSR JSP JSA JRA ; 1464 ;270 ADD ADDI ADDM ADDB SUB SUBI SUBM SUBB ; 1465 ; 0 1 2 3 4 5 6 7 ; 1466 ;300 CAI CAIL CAIE CAILE CAIA CAIGE CAIN CAIG ; 1467 ;310 CAM CAML CAME CAMLE CAMA CAMGE CAMN CAMG ; 1468 ;320 JUMP JUMPL JUMPE JUMPLE JUMPA JUMPGE JUMPN JUMPG ; 1469 ;330 SKIP SKIPL SKIPE SKIPLE SKIPA SKIPGE SKIPN SKIPG ; 1470 ;340 AOJ AOJL AOJE AOJLE AOJA AOJGE AOJN AOJG ; 1471 ;350 AOS AOSL AOSE AOSLE AOSA AOSGE AOSN AOSG ; 1472 ;360 SOJ SOJL SOJE SOJLE SOJA SOJGE SOJN SOJG ; 1473 ;370 SOS SOSL SOSE SOSLE SOSA SOSGE SOSN SOSG ; 1474 ; 0 1 2 3 4 5 6 7 ; 1475 ;400 SETZ SETZI SETZM SETZB AND ANDI ANDM ANDB ; 1476 ;410 ANDCA ANDCAI ANDCAM ANDCAB SETM SETMI SETMM SETMB ; 1477 ;420 ANDCM ANDCMI ANDCMM ANDCMB SETA SETAI SETAM SETAB ; 1478 ;430 XOR XORI XORM XORB IOR IORI IORM IORB ; 1479 ;440 ANDCB ANDCBI ANDCBM ANDCBB EQV EQVI EQVM EQVB ; 1480 ;450 SETCA SETCAI SETCAM SETCAB ORCA ORCAI ORCAM ORCAB ; 1481 ;460 SETCM SETCMI SETCMM SETCMB ORCM ORCMI ORCMM ORCMB ; 1482 ;470 ORCB ORCBI ORCBM ORCBB SETO SETOI SETOM SETOB ; 1483 ; 0 1 2 3 4 5 6 7 ; 1484 ;500 HLL HLLI HLLM HLLS HRL HRLI HRLM HRLS ; 1485 ;510 HLLZ HLLZI HLLZM HLLZS HRLZ HRLZI HRLZM HRLZS ; 1486 ;520 HLLO HLLOI HLLOM HLLOS HRLO HRLOI HRLOM HRLOS ; 1487 ;530 HLLE HLLEI HLLEM HLLES HRLE HRLEI HRLEM HRLES ; 1488 ;540 HRR HRRI HRRM HRRS HLR HLRI HLRM HLRS ; 1489 ;550 HRRZ HRRZI HRRZM HRRZS HLRZ HLRZI HLRZM HLRZS ; 1490 ;560 HRRO HRROI HRROM HRROS HLRO HLROI HLROM HLROS ; 1491 ;570 HRRE HRREI HRREM HRRES HLRE HLREI HLREM HLRES ; 1492 ; 0 1 2 3 4 5 6 7 ; 1493 ;600 TRN TLN TRNE TLNE TRNA TLNA TRNN TLNN ; 1494 ;610 TDN TSN TDNE TSNE TDNA TSNA TDNN TSNN ; 1495 ;620 TRZ TLZ TRZE TLZE TRZA TLZA TRZN TLZN ; 1496 ;630 TDZ TSZ TDZE TSZE TDZA TSZA TDZN TSZN ; 1497 ;640 TRC TLC TRCE TLCE TRCA TLCA TRCN TLCN ; 1498 ;650 TDC TSC TDCE TSCE TDCA TSCA TDCN TSCN ; 1499 ;660 TRO TLO TROE TLOE TROA TLOA TRON TLON ; 1500 ;670 TDO TSO TDOE TSOE TDOA TSOA TDON TSON ; KL10 Microcode for TOPS-20 4 February 1985 V1(357) MICRO %34(270) Page 5 ; DEFINE.MIC[4,30] 17:12 9-Aug-84 CONTROL RAM DEFINITIONS -- J, AD ; 1501 .TOC "CONTROL RAM DEFINITIONS -- J, AD" ; 1502 ;FIELDS ARRANGED FOR READABILITY, NOT COMPACTNESS ; 1503 ; IN THE PROCESSOR, BITS ARE SCATTERED IN ANOTHER ORDER ; 1504 ; 1505 U0/=<0:0>D,0 ;BIT 0 UNUSED ; 1506 J/=<1:11>+ ;SYMBOLS WILL BE DEFINED BY TAGS (CRA1&CRA2) ; 1507 ; 1508 ;MAIN ADDER CONTROLS. Bit 0 = carry in, bit 1 = boolean operation ; 1509 ; Bits 2-5 are S8-S1 of the 10181 ALU chip. For normal arithmetic, ; 1510 ; the AD and ADX are separated unless SPEC/AD LONG or equivalent is given. ; 1511 ; 1512 ; 1513 AD/=<12:17> ; (EDP3, EXCEPT CARRY IN, ON CTL1) ; 1514 A+1=40,1 ; 1515 A+XCRY=00,1 ; 1516 ; A+ANDCB=01,1 ; 1517 ; A+AND=02,1 ; 1518 A*2=03,1 ; 1519 A*2+1=43,1 ; 1520 ; OR+1=44,1 ; 1521 ; OR+ANDCB=05,1 ; 1522 A+B=06,1 ; 1523 A+B+1=46,1 ; 1524 ; A+OR=07,1 ; 1525 ORCB+1=50,1 ; 1526 A-B-1=11,1 ; 1527 A-B=51,1 ; 1528 ; AND+ORCB=52,1 ; 1529 ; A+ORCB=53,1 ; 1530 XCRY-1=54,1 ; 1531 ; ANDCB-1=15,1 ; 1532 ; AND-1=16,1 ; 1533 A-1=17,1 ; 1534 ;ADDER LOGICAL FUNCTIONS ; 1535 SETCA=20 ; 1536 ORC=21 ;NAND ; 1537 ORCA=22 ; 1538 1S=23 ; 1539 ANDC=24 ;NOR ; 1540 NOR=24 ; 1541 SETCB=25 ; 1542 EQV=26 ; 1543 ORCB=27 ; 1544 ANDCA=30 ; 1545 XOR=31 ; 1546 B=32 ; 1547 OR=33 ; 1548 0S=34 ; 1549 ANDCB=35 ; 1550 AND=36 ; 1551 A=37 ; 1552 ;BOOLEAN FUNCTIONS FOR WHICH CRY0 IS INTERESTING ; 1553 CRY A EQ -1=60,1 ;GENERATE CRY0 IF A=1S, AD=SETCA ; 1554 CRY A.B#0=36,1 ;CRY 0 IF A&B NON-ZERO, AD=AND ; 1555 CRY A#0=37,1 ;GENERATE CRY0 IF A .NE. 0, AD=A ; 1556 CRY A GE B=71,1 ;CRY0 IF A .GE. B, UNSIGNED; AD=XOR ; KL10 Microcode for TOPS-20 4 February 1985 V1(357) MICRO %34(270) Page 6 ; DEFINE.MIC[4,30] 17:12 9-Aug-84 CONTROL RAM DEFINITIONS -- DATA PATH MIXERS ; 1557 .TOC "CONTROL RAM DEFINITIONS -- DATA PATH MIXERS" ; 1558 ; 1559 ADA/=<18:20> ; (EDP3) ; 1560 AR=0 ; 1561 ARX=1 ; 1562 MQ=2 ; 1563 PC=3 ; 1564 ADA EN/=<18:18> ;ADA ENABLE ALSO ENABLES ADXA (EDP3) ; 1565 EN=0 ; 1566 0S=1 ; 1567 U21/=<21:21>D,0 ;BIT 21 UNUSED ; 1568 ADB/=<22:23> ;CONTROLS ADB AND ADXB (EDP3) ; 1569 FM=0,,1 ;MUST HAVE TIME FOR PARITY CHECK ; 1570 BR*2=1 ; 1571 BR=2 ; 1572 AR*4=3 ; 1573 U23/=<23:23>D,1 ;PREVENT DEFAULT SELECTION OF FM ; 1574 ;FORCE IT TO TAKE ONE OF THE SHORTER ; 1575 ;PATHS IF FM NOT NEEDED ALSO DISABLES ; 1576 ;PARITY CHECKING LOGIC ; 1577 ; 1578 ;REGISTER INPUTS ; 1579 ; 1580 AR/=<24:26>D,0 ; (EDP1) ; 1581 AR=0 ; 1582 ARMM=0 ;REQUIRES SPECIAL FUNCTION ; 1583 MEM=0 ;[346] MB WAIT will poke to 1 (CACHE) or 2 (AD) ; 1584 CACHE=1 ;ORDINARILY SELECTED BY HWARE ; 1585 AD=2 ; 1586 EBUS=3 ; 1587 SH=4 ; 1588 AD*2=5 ;Low bit from ADX0 ; 1589 ADX=6 ; 1590 AD*.25=7 ; 1591 ARX/=<27:29>D,0 ; (EDP2) ; 1592 ARX=0 ;[345] BY DEFAULT ; 1593 MEM=0 ;[346] Gets poked by MB WAIT to 1 or 2 ; 1594 CACHE=1 ;ORDINARILY BY MBOX RESP ; 1595 AD=2 ; 1596 MQ=3 ; 1597 SH=4 ; 1598 ADX*2=5 ;Low bit from MQ0 ; 1599 ADX=6 ; 1600 ADX*.25=7 ; 1601 BR/=<30:30>D,0 ;DEFAULT TO RECIRCULATE (EDP4) ; 1602 AR=1 ; 1603 BRX/=<31:31>D,0 ;DEFAULT TO RECIRCULATE (EDP4) ; 1604 ARX=1 ; 1605 MQ/=<32:32>D,0 ;DEFAULT TO RECIRCULATE (EDP2) ; 1606 SH=1 ;LOAD FROM SHIFT MATRIX ; 1607 MQ*2=0 ;With SPEC/MQ SHIFT--Low bit from AD CRY -2 ; 1608 MQ*.25=1 ;With SPEC/MQ SHIFT--High bits from ADX34, ADX35 ; 1609 MQ SEL=0 ;WITH COND/REG CTL ; 1610 MQM SEL=1 ;WITH COND/REG CTL ; 1611 ; KL10 Microcode for TOPS-20 4 February 1985 V1(357) MICRO %34(270) Page 7 ; DEFINE.MIC[4,30] 17:12 9-Aug-84 CONTROL RAM DEFINITIONS -- DATA PATH MIXERS ; 1612 ;FMADR SELECTS THE SOURCE OF THE FAST MEMORY ADDRESS, ; 1613 ; RATHER THAN PROVIDING THE ADDRESS ITSELF ; 1614 ; 1615 FMADR/=<33:35> ; (APR4&APR5) ; 1616 AC0=0 ;IR 9-12 ; 1617 AC1=1 ;+1 MOD 16 ; 1618 XR=2 ;ARX 14-17 ; 1619 VMA=3 ;VMA 32-35 ; 1620 AC2=4 ;+2 MOD 16 ; 1621 AC3=5 ;+3 MOD 16 ;;1622 .IFNOT/MODEL.B ;;1623 AC4=6 ;CURRENT BLOCK, AC+4 ;;1624 ac5=7 ;current block, ac+5 ; 1625 .IF/MODEL.B ; 1626 AC+#=6 ;CURRENT BLOCK, AC+ MAGIC # ; 1627 .ENDIF/MODEL.B ; 1628 #B#=7 ;BLOCK AND AC SELECTED BY # FIELD ; 1629 ; 1630 .TOC "CONTROL RAM DEFINITIONS -- 10-BIT LOGIC" ; 1631 ; 1632 SCAD/=<36:38> ; (SCD1) ; 1633 A=0 ; 1634 A-B-1=1 ; 1635 A+B=2 ; 1636 A-1=3 ; 1637 A+1=4 ; 1638 A-B=5 ; 1639 OR=6 ; 1640 AND=7 ; 1641 SCADA/=<39:41> ; (SCD1) ; 1642 FE=0 ; 1643 AR0-5=1 ;BYTE POINTER P FIELD ; 1644 AR EXP=2 ; XOR ; 1645 #=3 ;SIGN EXTENDED WITH #00 ; 1646 SCADA EN/=<39:39> ; (SCD1) ; 1647 0S=1 ; 1648 U42/=<42:42>D,0 ;BIT 42 UNUSED ; 1649 SCADB/=<43:44> ; (SCD1) ; 1650 SC=0 ; 1651 AR6-11=1 ;BYTE POINTER S FIELD ; 1652 AR0-8=2 ; 1653 #=3 ;NO SIGN EXTENSION ; 1654 U45/=<45:45>D,0 ;BIT 45 UNUSED ; 1655 SC/=<46:46>D,0 ;RECIRCULATE BY DEFAULT (SCD2) ; 1656 FE=0 ;WITH SCM ALT ; 1657 SCAD=1 ; 1658 AR SHIFT=1 ;WITH SCM ALT ;AR 18, 28-35 ; 1659 FE/=<47:47>D,0 ;RECIRCULATE BY DEFAULT (SCD2) ; 1660 SCAD=1 ; 1661 U48/=<48:48>D,0 ;BIT 48 UNUSED ; 1662 ; KL10 Microcode for TOPS-20 4 February 1985 V1(357) MICRO %34(270) Page 8 ; DEFINE.MIC[4,30] 17:12 9-Aug-84 CONTROL RAM DEFINITIONS -- SHIFT, ARMM, VMA, TIME ; 1663 .TOC "CONTROL RAM DEFINITIONS -- SHIFT, ARMM, VMA, TIME" ; 1664 ; 1665 SH/=<49:50> ; (SH1) ; 1666 SHIFT AR!ARX=0 ;LEFT BY (SC) ; 1667 AR=1 ; 1668 ARX=2 ; 1669 AR SWAP=3 ;HALVES SWAPPED ; 1670 ARMM/=<49:50> ;SAME BITS AS SH CONTROL (SCD3) ; 1671 #=0 ;MAGIC # 0-8 TO AR 0-8 ; 1672 EXP_SIGN=1 ;AR1-8 _ AR0 ; 1673 SCAD EXP=2 ;AR0-8_SCAD ; 1674 SCAD POS=3 ;AR0-5_SCAD ; 1675 .IF/MODEL.B ; 1676 VMAX/=<49:50> ;SAME BITS AS SH CONTROL (VMA4) ; 1677 VMAX=0 ;VMA SECTION # ; 1678 PC SEC=1 ;PC SECTION # ; 1679 PREV SEC=2 ;PREVIOUS CONTEXT SECT ; 1680 AD12-17=3 ; 1681 .ENDIF/MODEL.B ; 1682 U51/=<51:51>D,0 ;BIT 51 UNUSED ; 1683 VMA/=<52:53>D,0 ;ALSO CONTROLLED BY SPECIAL FUNCTIONS ; 1684 VMA=0 ;BY DEFAULT ; 1685 PC=1 ;MAY BE OVERRIDDEN BY MCL LOGIC TO LOAD FROM AD ; 1686 LOAD=1 ; IF WE KNOW IT WILL BE OVERRIDDEN, USE THIS ; 1687 PC+1=2 ; 1688 AD=3 ;ENTIRE VMA, INCLUDING SECTION ; 1689 TIME/=<54:55>T ;CONTROLS MINIMUM MICROINSTRUCTION EXECUTION ; 1690 ; TIME, COUNTING MBOX CLOCK TICKS (CLK) ; 1691 ;ASSEMBLER GENERALLY TAKES CARE OF THIS ; 1692 2T=0 ;2 TICKS ; 1693 3T=1 ;3 TICKS ; 1694 4T=2 ;4 TICKS ; 1695 5T=3 ;5 TICKS (COND/DIAG FUNC & #00, --> .5 USEC) ; 1696 ; KL10 Microcode for TOPS-20 4 February 1985 V1(357) MICRO %34(270) Page 9 ; DEFINE.MIC[4,30] 17:12 9-Aug-84 CONTROL RAM DEFINITIONS -- MEM SPECIAL FUNCTIONS ; 1697 .TOC "CONTROL RAM DEFINITIONS -- MEM SPECIAL FUNCTIONS" ; 1698 ; 1699 MEM/=<56:59>D,0 ; (MCL1) ; 1700 ; NOP=0 ;DEFAULT ; 1701 ARL IND=1 ;CONTROL AR LEFT MUX FROM # FIELD ; 1702 MB WAIT=2 ;WAIT FOR MBOX RESP IF PENDING ; 1703 A RD=4 ;OPERAND READ and load PXCT bits (model B) ; 1704 B WRITE=5 ;CONDITIONAL WRITE ON DRAM B 01 ; 1705 FETCH=6 ;LOAD NEXT INSTR TO ARX (CONTROL BY #) ; 1706 REG FUNC=7 ;MBOX REGISTER FUNCTIONS ; 1707 LOAD AR=12 ; 1708 LOAD ARX=13 ; 1709 WRITE=16 ;FROM AR TO MEMORY ; 1710 .IF/MODEL.B ; 1711 RESTORE VMA=3 ;AD FUNC WITHOUT GENERATING A REQUEST ; 1712 AD FUNC=10 ;FUNCTION LOADED FROM AD LEFT ; 1713 EA CALC=11 ;FUNCTION DECODED FROM # FIELD ; 1714 RW=14 ;READ, TEST WRITABILITY ; 1715 RPW=15 ;READ-PAUSE-WRITE ; 1716 IFET=17 ;UNCONDITIONAL FETCH ;;1717 .IFNOT/MODEL.B ;OLD-STYLE MCL BOARD ;;1718 SEC 0=3 ;CLEAR VMAX ;;1719 A IND=10 ;A-TYPE INDIRECT ;;1720 BYTE IND=11 ;BYTE-TYPE INDIRECT ;;1721 AD FUNC=14 ;FUNCTION FROM AD LEFT ;;1722 BYTE RD=15 ;BYTE READ TO BOTH AR AND ARX ;;1723 RPW=17 ;LOAD AR WITH RPW CYCLE ; 1724 .ENDIF/MODEL.B ; 1725 ; KL10 Microcode for TOPS-20 4 February 1985 V1(357) MICRO %34(270) Page 10 ; DEFINE.MIC[4,30] 17:12 9-Aug-84 CONTROL RAM DEFINITIONS -- SKIP/COND SPECIAL FUNCTIONS ; 1726 .TOC "CONTROL RAM DEFINITIONS -- SKIP/COND SPECIAL FUNCTIONS" ; 1727 ; 1728 SKIP/=<60:65>D,0 ;MICRO-PROGRAM SKIPS ; 1729 ; 40-57 DECODED ON (CRA2) ; 1730 ; SPARE=40 ; 1731 EVEN PAR=41,,1 ;AR PARITY IS EVEN ; 1732 BR0=42 ;BR BIT 00 ; 1733 ARX0=43 ;ARX BIT 00 ; 1734 AR18=44 ;AR BIT 18 ; 1735 AR0=45 ;AR BIT 00 ; 1736 AC#0=46 ;IR9-12 .EQ. 0 ; 1737 SC0=47 ;SC BIT 00 ;;1738 .IFNOT/MODEL.B ;;1739 SC .LT. 36=50 ; 1740 .IF/MODEL.B ; 1741 PC SEC0=50 ; 1742 .ENDIF/MODEL.B ; 1743 SCAD0=51,,1 ;SIGN OF SCAD OUTPUT ; 1744 SCAD#0=52,,1 ;SCAD OUTPUT IS NON-ZERO ; 1745 ADX0=53,1 ;ADDER EXTENSION BIT 00 ; 1746 AD CRY0=54,1 ;CARRY OUT OF AD BIT -2 (BOOLE IGNORED) ; 1747 AD0=55,1 ;ADDER BIT 00 ; 1748 AD#0=56,1 ;AD BITS 00-35 CONTAIN SOME ONES ; 1749 .IF/MODEL.B ; 1750 -LOCAL AC ADDR=57 ;VMA18-31 =0 ON LOCAL REF IN SEC >1 ; 1751 .ENDIF/MODEL.B ; 1752 ; 60-77 DECODED ON (CON2) ; 1753 FETCH=60 ;VMA FETCH (LAST CYCLE WAS A FETCH) ; 1754 KERNEL=61 ;PC IS IN KERNEL MODE ; 1755 USER=62 ;PC IS IN USER MODE ; 1756 PUBLIC=63 ;PC IS PUBLIC (INCLUDING SUPER) ; 1757 RPW REF=64 ;MIDDLE OF READ-PAUSE-WRITE CYCLE ; 1758 PI CYCLE=65 ;PI CYCLE IN PROGRESS ; 1759 -EBUS GRANT=66 ;PI HASN'T RELEASED BUS FOR CPU USE ; 1760 -EBUS XFER=67 ;NO TRANSFER RECIEVED FROM DEVICE ; 1761 INTRPT=70 ;AN INTERRUPT REQUEST WAITING FOR SERVICE ; 1762 -START=71 ;NO CONTINUE BUTTON ; 1763 RUN=72 ;PROCESSOR NOT HALTED ; 1764 IO LEGAL=73 ;KERNEL, PI CYCLE, USER IOT, OR DEVICE .GE. 740 ; 1765 P!S XCT=74 ;PXCT OR SXCT ; 1766 .IF/MODEL.B ; 1767 -VMA SEC0=75 ;VMA SECTION NUMBER (13-17) IS NOT ZERO ; 1768 .ENDIF/MODEL.B ; 1769 AC REF=76,,1 ;VMA .LT.20 ON READ OR WRITE ; 1770 -MTR REQ=77 ;INTERRUPT REQUEST NOT DUE TO METER ; 1771 ; KL10 Microcode for TOPS-20 4 February 1985 V1(357) MICRO %34(270) Page 11 ; DEFINE.MIC[4,30] 17:12 9-Aug-84 CONTROL RAM DEFINITIONS -- SKIP/COND SPECIAL FUNCTIONS ; 1772 ;SKIP/COND FIELD CONTINUED ; 1773 ; 1774 COND/=<60:65>D,0 ;NON-SKIP SPECIAL FUNCTIONS ; 1775 ;0-7 DECODED ON (CTL2) ; 1776 ; NOP=0 ;BY DEFAULT ; 1777 LD AR0-8=1 ; 1778 LD AR9-17=2 ;Gates VMAX into ARMM (see VMA4) ; 1779 LD AR18-35=3 ; 1780 AR CLR=4 ; 1781 ARX CLR=5 ; 1782 ARL IND=6 ;CONTROL AR LEFT, CALL, AND CLEAR BITS FROM # ; 1783 REG CTL=7 ;CONTROL AR LOAD, EXP TST, AND MQ FROM # ; 1784 ; 10-37 DECODED ON (CON1) ; 1785 FM WRITE=10 ;WRITE AR INTO CURRENTLY ADDRESSED FM LOC ; 1786 PCF_#=11 ;SET PC FLAGS FROM # FIELD ; 1787 FE SHRT=12 ;SHIFT FE RIGHT 1 ; 1788 AD FLAGS=13 ;SET PC CRY0, CRY1, OVRFLO, TRAP1 AS APPROPRIATE ; 1789 LOAD IR=14 ;LATCH AD OR CACHE DATA INTO IR, load PXCT bits ; 1790 SPEC INSTR=15 ;SET/CLR SXCT, PXCT, PICYC, TRAP INSTR FLAGS ; 1791 SR_#=16 ;CONTROL FOR STATE REGISTER and PXCT bits (CON3, MCL4) ; 1792 SEL VMA=17 ;READ VMA THROUGH ADA/PC ; 1793 DIAG FUNC=20 ;SELECT DIAGNOSTIC INFO ONTO EBUS ; 1794 EBOX STATE=21 ;SET STATE FLOPS ; 1795 EBUS CTL=22 ;I/O FUNCTIONS ; 1796 MBOX CTL=23 ; 1797 ; SPARE=24 ; 1798 .IF/MODEL.B ; 1799 LONG EN=25 ;THIS WORD CAN BE INTERPRETED AS LONG INDIRECT ; 1800 .ENDIF/MODEL.B ; 1801 ; SPARE=26 ; 1802 ; SPARE=27 ; 1803 VMA_#=30 ; 1804 VMA_#+TRAP=31 ; 1805 VMA_#+MODE=32 ; 1806 VMA_#+AR32-35=33 ; 1807 VMA_#+PI*2=34 ; 1808 VMA DEC=35 ;VMA_VMA-1 ; 1809 VMA INC=36 ;VMA_VMA+1 ; 1810 LD VMA HELD=37 ;HOLD VMA ON SIDE ;;1811 .IFNOT/MODEL.B ;;1812 U66/=<66:66>D,0 ;BIT 66 UNUSED ; 1813 .IF/MODEL.B ; 1814 CALL/=<66:66>D,0 ;CALL FUNCTION ; 1815 CALL=1 ;GOOD TO 15 LEVELS IN MODEL B ; 1816 .ENDIF/MODEL.B ; 1817 ; KL10 Microcode for TOPS-20 4 February 1985 V1(357) MICRO %34(270) Page 12 ; DEFINE.MIC[4,30] 17:12 9-Aug-84 CONTROL RAM DEFINITIONS -- DISP/SPEC SPECIAL FUNCTIONS ; 1818 .TOC "CONTROL RAM DEFINITIONS -- DISP/SPEC SPECIAL FUNCTIONS" ; 1819 ; 1820 DISP/=<67:71>D,10 ;0-7 AND 30-37 ARE DISPATCHES (CRA1&CRA2) ; 1821 DIAG=0 ; 1822 DRAM J=1 ; 1823 DRAM A RD=2 ;IMPLIES INH CRY18 ; 1824 RETURN=3 ;POPJ RETURN ; 1825 PG FAIL=4 ;PAGE FAIL TYPE DISP ; 1826 SR=5 ;16 WAYS ON STATE REGISTER ; 1827 NICOND=6 ;NEXT INSTRUCTION CONDITION (see NEXT for detail) ; 1828 SH0-3=7,,1 ;[337] 16 WAYS ON HIGH-ORDER BITS OF SHIFTER ; 1829 MUL=30 ;FE0*4 + MQ34*2 + MQ35; implies MQ SHIFT, AD LONG ; 1830 DIV=31,,1 ;FE0*4 + BR0*2 + AD CRY0; implies MQ SHIFT, AD LONG ; 1831 SIGNS=32,1 ;ARX0*8 + AR0*4 + BR0*2 + AD0 ; 1832 DRAM B=33 ;8 WAYS ON DRAM B FIELD ; 1833 BYTE=34,,1 ;FPD*4 + AR12*2 + SCAD0 ; 1834 NORM=35,2 ;See normalization for details. Implies AD LONG ; 1835 EA MOD=36 ;(ARX0 or -LONG EN)*8 + -(LONG EN and ARX1)*4 + ; 1836 ;ARX13*2 + (ARX2-5) or (ARX14-17) non zero; enable ; 1837 ;is (ARX0 or -LONG EN) for second case. If ARX18 ; 1838 ;is 0, clear AR left; otherwise, poke ARL select ; 1839 ;to set bit 2 (usually gates AD left into ARL) ;;1840 .IFNOT/MODEL.B ;;1841 EA TYPE=37 ; 1842 .ENDIF/MODEL.B ; 1843 ; 1844 SPEC/=<67:71>D,10 ;NON-DISPATCH SPECIAL FUNCTIONS (CTL1) ; 1845 ; NOP=10 ;DEFAULT ; 1846 INH CRY18=11 ; 1847 MQ SHIFT=12 ;ENABLE MQ*2, MQ SHRT2 ; 1848 SCM ALT=13 ;ENABLE FE, ARSHIFT ; 1849 CLR FPD=14 ; 1850 LOAD PC=15 ; 1851 XCRY AR0=16 ;CARRY INTO AD IS XOR'D WITH AR00 ; 1852 GEN CRY18=17 ;;1853 .IFNOT/MODEL.B ;;1854 SEC HOLD=20 ;INHIBIT LOADING VMAX ;;1855 CALL=21 ;MAX DEPTH 4, INCLUDING PAGE REFILL ; 1856 .IF/MODEL.B ; 1857 STACK UPDATE=20 ;CONTROL CRY18 IF LOCAL STACK ; 1858 .ENDIF/MODEL.B ; 1859 ARL IND=22 ;# SPECIFIES ARL MIX, ENABLES, & CALL ; 1860 MTR CTL=23 ;# CONTROLS METERS ; 1861 FLAG CTL=24 ;FUNCTION ENCODED IN # FIELD ; 1862 SAVE FLAGS=25 ;TELLS PI CYCLE TO HOLD INTRPT ; 1863 SP MEM CYCLE=26 ;MEM REQUEST IS MODIFIED BY # ; 1864 AD LONG=27 ;AD BECOMES 72 BIT ALU ; 1865 ; 1866 U73/=<72:73>D,0 ;BITS 72-73 UNUSED ; 1867 ; 1868 MARK/=<74:74>D,0 ;FIELD SERVICE "MARK" BIT ; 1869 ; KL10 Microcode for TOPS-20 4 February 1985 V1(357) MICRO %34(270) Page 13 ; DEFINE.MIC[4,30] 17:12 9-Aug-84 CONTROL RAM DEFINITIONS -- MAGIC NUMBER FIELD ; 1870 .TOC "CONTROL RAM DEFINITIONS -- MAGIC NUMBER FIELD" ; 1871 ; 1872 #/=<75:83>D,0 ;THE INFAMOUS "MAGIC NUMBERS" ; 1873 ; 1874 MAJVER/=<75:80> ;[356] Major version number ; 1875 MINVER/=<81:83> ;[356] Minor version number ; 1876 ; 1877 ;THE OPTIONS DESIGNATE CERTAIN ASSEMBLIES FROM THE SAME ; 1878 ;MICROCODE SOURCES ; 1879 ;# BIT 0 INDICATES KLPAGING ; 1880 ;# BIT 1 INDICATES EXTENDED ADDRESSING ; 1881 ;# BIT 2 INDICATES NONSTANDARD MICROCODE ; 1882 ;# BIT 3 INDICATES A CPU WITH THE PV KIT. (MODEL B) ; 1883 ;# BIT 8 INDICATES INSTRUCTION STATISTICS GATHERING ; 1884 ; (I.E. TRACKS) ; 1885 ;EACH OPTION BIT IS GIVEN A SEPARATE FIELD DEFINITION ; 1886 ; 1887 KLPAGE/=<75:75> ;KLPAGING ; 1888 .IF/KLPAGE ; 1889 OPTIONS=1 ;;1890 .IFNOT/KLPAGE ;;1891 OPTIONS=0 ; 1892 .ENDIF/KLPAGE ; 1893 ; 1894 LONGPC/=<76:76> ;LONG PC FORMAT AS IN EXTENDED ADDRESSING ; 1895 .IF/LONG.PC ; THIS IS A SLIGHTLY BASTARDIZED FORMAT IN ; 1896 OPTIONS=1 ; MODEL A MACHINES DUE TO SPACE LIMITATIONS ;;1897 .IFNOT/LONG.PC ;;1898 OPTIONS=0 ; 1899 .ENDIF/LONG.PC ; 1900 ; 1901 NONSTD/=<77:77> ;NONSTANDARD MICROCODE (EG DIAGNOSTIC MICROCODE) ;;1902 .IF/NONSTD ;;1903 OPTIONS=1 ; 1904 .IFNOT/NONSTD ; 1905 OPTIONS=0 ; 1906 .ENDIF/NONSTD ; 1907 ; 1908 PV/=<78:78> ;MODEL B - PV CPU ; 1909 .IF/MODEL.B ; 1910 OPTIONS=1 ;;1911 .IFNOT/MODEL.B ;;1912 OPTIONS=0 ; 1913 .ENDIF/MODEL.B ; 1914 ; 1915 ISTAT/=<83:83> ;STATISTICS GATHERING CODE (IE TRACKS) ;;1916 .IF/INSTR.STAT ;;1917 OPTIONS=1 ; 1918 .IFNOT/INSTR.STAT ; 1919 OPTIONS=0 ; 1920 .ENDIF/INSTR.STAT ; 1921 ; 1922 ACB/=<77:79> ;AC block number. Used with FMADR/#B# ; 1923 PAGB=6 ;AC block used for KL paging registers ; 1924 MICROB=7 ;AC block for general microcode scratch ; 1925 ; KL10 Microcode for TOPS-20 4 February 1985 V1(357) MICRO %34(270) Page 13-1 ; DEFINE.MIC[4,30] 17:12 9-Aug-84 CONTROL RAM DEFINITIONS -- MAGIC NUMBER FIELD ; 1926 AC#/=<80:83> ;AC number used with ACB or AC-OP (below) ; 1927 ; 1928 .IF/MODEL.B ; 1929 PXCT/=<75:77> ;(MCL4) Loaded by CON/SR_#, CON/LOAD IR, and MEM/A RD ; 1930 ;Bit 0 enables the VMAX to not come from the AD when ; 1931 ; VMA/AD (allowing local AC refs, for example). Bits ; 1932 ; 1 and 2 select which PXCT bits a memory reference ; 1933 ; will select for possible previous context. ; 1934 ; ; 1935 ; WARNING !!! BECAUSE OF A TIMING PROBLEM IN THE HARDWARE ALL AC-OPS ; 1936 ; MUST HAVE THE NUMBER FIELD THE SAME IN THE PREVIOUS ; 1937 ; MICROINSTRUCTION. THE SYMPTOM WILL BE GARBAGE WRITTEN IN A ; 1938 ; DIFFERENT AC AS THE ADDRESS LINES DON'T MAKE IT IN TIME ; 1939 ; FOR THE WRITE PULSE. ; 1940 ; ; 1941 AC-OP/=<75:79> ;CONTROLS OPERATION ON AC AND AC# ; 1942 AC+#=6 ; 1943 #=32 ;JUST AC# ; 1944 OR=33 ;AC AC# ; 1945 ;ALL AD/ FUNCTIONS <40 WORK ; 1946 .ENDIF/MODEL.B ; 1947 ; KL10 Microcode for TOPS-20 4 February 1985 V1(357) MICRO %34(270) Page 14 ; DEFINE.MIC[4,30] 17:12 9-Aug-84 CONTROL RAM DEFINITIONS -- MAGIC NUMBER FIELD ; 1948 ;VARIOUS SPECIAL FUNCTIONS ENABLE SPECIAL DECODING OF THE ; 1949 ; "MAGIC #" FIELD, AS FOLLOWS: ; 1950 ; 1951 ;SPECIAL DATA PATH CONTROLS ; 1952 ;;1953 .IFNOT/MODEL.B ;;1954 CALL/=<75:75> ;ENABLED BY ARL IND (CTL2) ;;1955 CALL=1 ; 1956 .ENDIF/MODEL.B ; 1957 AR0-8/=<76:76> ;ENABLED BY ARL IND (CTL2) ; 1958 LOAD=1 ; 1959 CLR/=<77:80> ;ENABLED BY ARL IND (CTL2) ; 1960 MQ=10 ; 1961 ARX=4 ; 1962 ARL=2 ; 1963 ARR=1 ; 1964 AR=3 ; 1965 AR+ARX=7 ; 1966 AR+MQ=13 ; 1967 ARX+MQ=14 ; 1968 AR+ARX+MQ=17 ; 1969 ARL+ARX=6 ; 1970 ARL+ARX+MQ=16 ; 1971 ARR+MQ=11 ; 1972 ARL/=<81:83> ;ENABLED BY ARL IND (CTL2) ; 1973 ARL=0 ; 1974 ARMM=0 ;REQUIRES SPECIAL FUNCTION ; 1975 CACHE=1 ;ORDINARILY SELECTED BY HWARE ; 1976 AD=2 ; 1977 EBUS=3 ; 1978 SH=4 ; 1979 AD*2=5 ; 1980 ADX=6 ; 1981 AD*.25=7 ; 1982 AR CTL/=<75:77> ;ENABLED BY COND/REG CTL (CTL2) ; 1983 AR0-8 LOAD=4 ; 1984 AR9-17 LOAD=2 ;Gates VMAX into ARMM (see VMA4) ; 1985 ARR LOAD=1 ; 1986 ARL LOAD=6 ; 1987 EXP TST/=<80:80> ;ENABLED BY COND/REG CTL (CTL1) ; 1988 AR_EXP=1 ; 1989 MQ CTL/=<82:83> ;ENABLED BY COND/REG CTL (CTL2) ; 1990 ; MQ=0 ;WITH MQ/MQ SEL ; 1991 MQ*2=1 ;WITH MQ/MQ SEL--Low bit is ADX0 ; 1992 ; MQ*.5=2 ; " (DROPS BITS 0,6,12,18,24,30) ; 1993 0S=3 ; " ; 1994 SH=0 ;WITH MQ/MQM SEL ; 1995 MQ*.25=1 ;WITH MQ/MQM SEL--High bits are ADX34, ADX35 ; 1996 1S=2 ; " ; 1997 AD=3 ; " ; 1998 ; KL10 Microcode for TOPS-20 4 February 1985 V1(357) MICRO %34(270) Page 15 ; DEFINE.MIC[4,30] 17:12 9-Aug-84 CONTROL RAM DEFINITIONS -- MAGIC NUMBER FIELD ; 1999 ;SPECIAL CONTROL OF EBOX FLAGS & FUNCTIONS ; 2000 ; 2001 PC FLAGS/=<75:83> ;ENABLED BY COND/PCF_# (SCD4) ; 2002 AROV=420 ;SET ARITH OVFLO & TRAP1 ; 2003 FLOV=620 ;SAME, PLUS FLOATING OVFLO ; 2004 FPD=100 ;SET FIRST PART DONE ; 2005 TRAP2=40 ;SET TRAP2 (PDL OVFLO) ; 2006 TRAP1=20 ;SET TRAP1 (ARITH OVFLO) ; 2007 FXU=630 ;FLOV + EXP UNDERFLOW ; 2008 DIV CHK=424 ;NO DIVIDE + AROV ; 2009 FDV CHK=624 ;FLOATING NO DIVIDE ; 2010 FLAG CTL/=<75:83> ;ENABLED BY SPEC/FLAG CTL (SCD5) ; 2011 RSTR FLAGS=420 ;AS IN JRSTF ; 2012 JFCL=602 ;FORCE PC 00 = AROV ; 2013 JFCL+LD=622 ;SECOND PART OF JFCL -- CLEAR TESTED FLAGS ; 2014 DISMISS=502 ;CLEAR PI CYCLE IF SET (CON5) ; 2015 ; ELSE DISMISS HIGHEST PI HOLD ; 2016 DISMISS+LD=522 ;LOAD FLAGS AND DISMISS ; 2017 HALT=442 ;STOP PROCESSOR IF LEGAL (CON2) ; 2018 SET FLAGS=20 ;AS IN MUUO ; 2019 PORTAL=412 ;CLEAR PUBLIC IF PRIVATE INSTR ; 2020 SPEC INSTR/=<75:83> ;ENABLED BY COND/SPEC INSTR ; 2021 SET PI CYCLE=714; (CON5) ; 2022 KERNEL CYCLE=200;MAKE IO LEGAL, EXEC ADDR SPACE (CON4) ; 2023 INH PC+1=100 ;TO MAKE JSR WORK IN TRAP, INTRPT (CON4) ; 2024 SXCT=40 ;START SECTION XCT (MCL4) ; 2025 PXCT=20 ;START PREV CONTXT XCT (MCL4) ; 2026 INTRPT INH=10 ;INHIBIT INTERRUPTS (CON4) ; 2027 INSTR ABORT=4 ; (CON2) ; 2028 HALTED=302 ;TELL CONSOLE WE'RE HALTED (CON4) ; 2029 CONS XCT=310 ;FLAGS FOR INSTR XCT'D FROM CONSOLE ; 2030 CONT=0 ;RESTORE NORMAL STATE FOR CONTINUE ; 2031 FETCH/=<75:83> ;ENABLED BY MEM/FETCH ; 2032 UNCOND=400 ; 2033 ;LOW 2 BITS DECODED ON (IR3) ; 2034 COMP=201,2 ;DEPENDING ON AD AND DRAM B ; 2035 SKIP=202,2 ; 2036 TEST=203,1 ; 2037 JUMP=502,2 ;AS IN JUMPX, ON AD AND DRAM B ; 2038 JFCL=503,1 ;JUMP ON TEST CONDITION ; 2039 ; KL10 Microcode for TOPS-20 4 February 1985 V1(357) MICRO %34(270) Page 16 ; DEFINE.MIC[4,30] 17:12 9-Aug-84 CONTROL RAM DEFINITIONS -- MAGIC NUMBER FIELD ; 2040 ;SPECIAL MEMORY REQUEST FUNCTIONS ; 2041 ; 2042 .IF/MODEL.B ; 2043 EA CALC/=<75:83> ;SPECIFIC CONTROLS FOR MEM/EA CALC ; 2044 ; LOAD AR=400 ; 2045 ; LOAD ARX=200 ; 2046 ; PAUSE=100 ;Freeze memory--always use with 040 ; 2047 ; WRITE=040 ;SET VMA WRITE ; 2048 ; PREV EN=20 ;PREV CONTXT SELECTED BY SR AND PXCT ; 2049 ; INDIRECT=10 ;PREV CONTXT FOR EA CALC ; 2050 ; EA=2 ;RESTORATION OF ORIGINAL EA CONDITIONS ; 2051 ; STACK=1 ;PREV CONTXT SELECTED BY PXCT B12 ; 2052 .IF/XADDR ;JUST TO ARX FOR EXTENDED ADDRESSING ; 2053 A IND=230 ;INDIRECT AT FIRST EA CALC TIME ;;2054 .IFNOT/XADDR ;TO BOTH AR AND ARX AS IN MODEL A ;;2055 A IND=630 ;INDIRECT AT FIRST EA CALC TIME ; 2056 .ENDIF/XADDR ; 2057 BYTE LD=420 ;Read byte data to AR only [337] ; 2058 BYTE RD=620 ;READ BYTE DATA TO AR & ARX ; 2059 BYTE RD PC=621 ;READ BYTE DATA TO AR & ARX WITH PC SECTION ; 2060 BYTE RPW=760 ;Read byte data to AR, ARX, write test, pause [312] ; 2061 BYTE IND=610 ;INDIRECT AT BYTE EA CALC TIME ; 2062 PUSH=041 ;STORE TO STACK ; 2063 POP AR=421 ;READ FROM STACK TO AR ; 2064 POP ARX=221 ;READ FROM STACK TO ARX ; 2065 POP AR-ARX=621 ;POP TO BOTH ; 2066 WRITE(E)=042 ; 2067 LD AR(EA)=402 ;LOAD AR GLOBAL/LOCAL AS IN EA ; 2068 LD AR+WR=440 ;LOAD AR, TEST WRITABILITY ; 2069 LD ARX+WR=240 ;LOAD ARX, TEST WRITABILITY ; 2070 .ENDIF/MODEL.B ; 2071 ; 2072 SP MEM/=<75:83> ;ENABLED BY SPEC/SP MEM CYCLE ; 2073 FETCH=400 ;LOAD IR WHEN DATA ARRIVES (MCL5) ; 2074 USER=200 ;FORCE USER OR UPT (MCL2) ; 2075 EXEC=100 ;FORCE EXEC OR EPT (MCL3) ; 2076 SEC 0=40 ;CLEAR VMAX (MCL4) ; 2077 UPT EN=20 ;UPT IF USER EN (MCL3) ; 2078 EPT EN=10 ;EPT IF NOT USER EN (MCL3) ; 2079 CACHE INH=2 ; (MCL6) ; 2080 UNCSH+UNPAGE=103;UNCACHED AND UNPAGED ; 2081 UNPAGED+CACHED=101 ;physical reference with cache enabled. ;;2082 .IFNOT/MULTI ;;2083 UNPAGED=101 ; (MCL6) ;;2084 EPT=111 ;;2085 EPT CACHE=111 ;[260] ;;2086 EPT FETCH=511 ;;2087 UPT=221 ;;2088 UPT FETCH=621 ;;2089 PT=31 ;;2090 PT FETCH=431 ; 2091 .IF/MULTI ; 2092 UNPAGED=103 ; (MCL6) ; 2093 EPT=113 ; 2094 EPT CACHE=111 ;[260] ; 2095 EPT FETCH=513 ; KL10 Microcode for TOPS-20 4 February 1985 V1(357) MICRO %34(270) Page 16-1 ; DEFINE.MIC[4,30] 17:12 9-Aug-84 CONTROL RAM DEFINITIONS -- MAGIC NUMBER FIELD ; 2096 UPT=223 ; 2097 UPT FETCH=623 ; 2098 PT=33 ; 2099 PT FETCH=433 ; 2100 .ENDIF/MULTI ; 2101 ; KL10 Microcode for TOPS-20 4 February 1985 V1(357) MICRO %34(270) Page 17 ; DEFINE.MIC[4,30] 17:12 9-Aug-84 CONTROL RAM DEFINITIONS -- MAGIC NUMBER FIELD ; 2102 ;MBOX CONTROLS ; 2103 ; 2104 MREG FNC/=<75:83> ;ENABLED BY MEM/REG FUNC (APR6) ; 2105 SBUS DIAG=407 ;PERFORM SBUS DIAGNOSTIC CYCLE ; 2106 READ UBR=502 ;ASK MBOX TO LOAD UBR INTO EBUS REG ; 2107 READ EBR=503 ;PUT EBR INTO EBUS REG ; 2108 READ ERA=504 ; 2109 WR REFILL RAM=505 ;DISGUISED AS A "READ REG" FUNCTION ; 2110 .IF/MODEL.B ;THIS GOT CHANGED IN THE GENERAL SPEEDUP (APR6) ; 2111 LOAD CCA=606 ;START A SWEEP ;;2112 .IFNOT/MODEL.B ;HERE IS WHAT IT USED TO BE ;;2113 LOAD CCA=601 ;START A SWEEP ; 2114 .ENDIF/MODEL.B ; 2115 LOAD UBR=602 ;SETUP UBR FROM VMA ; 2116 LOAD EBR=603 ;SETUP EBR FROM VMA ; 2117 MAP=140 ;GET PHYS ADDR CORRESPONDING TO VMA (MCL6) ; 2118 MBOX CTL/=<75:83> ;ENABLED BY COND/MBOX CTL (APR5) ; 2119 SET PAGE FAIL=200 ; 2120 SET IO PF ERR=100 ; 2121 CLR PT LINE(NK)=61,,1;[333] Clear valid if no Keep bit set ; 2122 PT DIR CLR(NK)=41;Enable clear of PT DIR for non keep entries ; 2123 CLR PT LINE=31,,1;CLEAR VALID FOR 4 ENTRIES (new pager board) [342] ; 2124 PT DIR WR=20,1 ;WRITE PAGE TABLE DIRECTORY ; 2125 PT WR=10,1 ;WRITE PAGE TABLE ENTRY SELECTED BY VMA ; 2126 PT DIR CLR=1 ;SELECT FOR CLEARING PT DIR (PAG3) ; 2127 NORMAL=0 ;RESET PT WR SELECTION ; 2128 MTR CTL/=<81:83> ;FUNCTION DECODING FOR METERS (MTR3) ; 2129 CLR TIME=0 ; USUALLY USED WITH DIAG FUNC ; 2130 CLR PERF=1 ; 2131 CLR E CNT=2 ; 2132 CLR M CNT=3 ; 2133 LD PA LH=4 ; 2134 LD PA RH=5 ; 2135 CONO MTR=6 ; 2136 CONO TIM=7 ; 2137 ; KL10 Microcode for TOPS-20 4 February 1985 V1(357) MICRO %34(270) Page 18 ; DEFINE.MIC[4,30] 17:12 9-Aug-84 CONTROL RAM DEFINITIONS -- MAGIC NUMBER FIELD ; 2138 ;I/O FUNCTIONS ; 2139 ; 2140 EBUS CTL/=<75:83> ;ENABLED BY COND/EBUS CTL (APR3) ; 2141 GRAB EEBUS=400 ;"EBUS RETURN" TAKES ECL EBUS FOR EBOX ; 2142 REQ EBUS=200 ; 2143 REL EBUS=100 ; (CON3) ; 2144 EBUS DEMAND=60 ;ASSERT DEMAND, KEEP CS, FUNC ; 2145 EBUS NODEMAND=20;DROP DEMAND, KEEP CS, FUNC ; 2146 ; CTL_IR=10 ;SELECT F01 & F02 FROM IR ; 2147 ; DISABLE CS=4 ;TURN OFF CONTROLLER SELECT ; 2148 ; DATAIO=2 ;0 FOR CONI/O ; 2149 ; INPUT=1 ;0 FOR OUTPUT ; 2150 IO INIT=30 ;ENABLE IR3-9 TO EBUS CONTROLLER SELECT, ; 2151 ; IR10-12 (DECODED) TO FUNCTION ; 2152 ; AND AR ONTO EBUS IF FUNCTION IS OUTPUT ; 2153 DATAO=26 ;0'S TO CS, DATAO TO FCN, AND AR TO EBUS ; 2154 DATAI=27 ;0'S TO CS, DATAI TO FCN ; 2155 REL EEBUS=0 ;LEGGO ; 2156 DIAG FUNC/=<75:83> ;ENABLED BY COND/DIAG FUNC (CTL3) ; 2157 .5 USEC=400,3 ;STRETCH CLOCK TO LET EBUS SETTLE (CON?) ; 2158 LD PA LEFT=404,3 ;LH PERF ANAL CONTROLS FROM RH (MTR) ; 2159 LD PA RIGHT=405,3 ;RH PA CONTROLS FROM RH (MTR) ; 2160 CONO MTR=406,3 ;ACCOUNTING CONTROLS (MTR) ; 2161 CONO TIM=407,3 ;INTERVAL TIMER CONTROLS (MTR) ; 2162 CONO APR=414,3 ; (CON3) ; 2163 CONO PI=415,3 ; (CON3) ; 2164 CONO PAG=416,3 ;CACHE & PAGING CTL (CON3) ; 2165 DATAO APR=417,3 ;ADDRESS BREAK (CON3) ; 2166 DATAO PAG=620,3 ;AC BLOCKS & PREV CONTXT (CON3) ; 2167 LD AC BLKS=425,3 ;FORCE LOADING AC BLOCKS ; 2168 LD PCS+CWSX=426,3 ;FORCE LOADING PREV CONTXT SEC, CWSX ; 2169 CONI PI(R)=500,3 ;PI HOLD & ACTIVE TO LH (PI) ; 2170 CONI PI(L)=501,3 ;PI GEN TO LH (PI) ; 2171 CONI APR(R)=510,3 ;APR INTERRUPT & PIA TO LH (APR6) ; 2172 RD TIME=510,3 ;TIME BASE TO RH (MTR5) ; 2173 DATAI PAG(L)=511,3 ;AC BLOCKS, PREV CONTXT TO LH (APR6) ; 2174 RD PERF CNT=511,3 ;PERFORMANCE COUNT TO RH (MTR5) ; 2175 CONI APR(L)=512,3 ;APR INTERRUPT ENABLES TO LH (APR6) ; 2176 RD EBOX CNT=512,3 ;EBOX COUNT TO RH (MTR5) ; 2177 DATAI APR=513,3 ;ADDR BREAK CONDITIONS TO LH (APR6) ; 2178 RD CACHE CNT=513,3 ;CACHE COUNT TO RH (MTR5) ; 2179 RD INTRVL=514,3 ;INTERVAL TIMER TO RH (MTR5) ; 2180 RD PERIOD=515,3 ;PERIOD REGISTER TO RH (MTR5) ; 2181 CONI MTR=516,3 ;CONTROLS & PIA TO RH (MTR5) ; 2182 RD MTR REQ=517,3 ;ENCODED UPDATE REQUEST TO 20-22 (MTR5) ; 2183 CONI PI(PAR)=530,3 ;WRITE EVEN PARITY ENABLES TO RH (CON1) ; 2184 CONI PAG=531,3 ;CACHE & TRAP CTL TO RH (CON1) ; 2185 RD EBUS REG=567,3 ;EBUS REGISTER IN MBOX (MBZ1 & MBC1) ; 2186 ; 2187 PARITY/=0,0,0,P ;USE ANY AVAILABLE FIELD FOR PARITY ; 2188 ; KL10 Microcode for TOPS-20 4 February 1985 V1(357) MICRO %34(270) Page 19 ; DEFINE.MIC[4,30] 17:12 9-Aug-84 DISPATCH RAM DEFINITIONS ; 2189 .TOC "DISPATCH RAM DEFINITIONS" ; 2190 ;FIELDS ARE ARRANGED FOR EASY READING, NOT COMPACTNESS ; 2191 ; 2192 .DCODE ; 2193 A/=<0:2> ;OPERAND FETCH MODE ; 2194 IMMED=0 ;IMMEDIATE ; 2195 IMMED-PF=1 ;IMMEDIATE, START PREFETCH ; 2196 .IF/MODEL.B ; 2197 ADDR=2 ;FULL EFFECTIVE ADDRESS ; 2198 .ENDIF/MODEL.B ; 2199 WR-TST=3 ;TEST WRITABILITY ; 2200 READ=4 ;READ ONLY ; 2201 READ-PF=5 ;READ, THEN PREFETCH ; 2202 RD-WR=6 ;READ WRITE (SEPARATE CYCLES) ; 2203 RD-P-WR=7 ;READ PAUSE WRITE ; 2204 ; 2205 B/=<3:5> ;STORE RESULTS AT-- ; 2206 DBL AC=1 ;DOUBLE RESULT TO AC & AC+1 ; 2207 DBL BOTH=2 ;MULB, DIVB, ETC ; 2208 SELF=3 ;SELF MODE INSTRUCTIONS ; 2209 AC=5 ;SINGLE RESULT TO AC, PREFETCH IN PROG ; 2210 MEM=6 ;RESULT TO MEMORY ; 2211 BOTH=7 ;SINGLE RESULT TO MEMORY AND AC ; 2212 ; 2213 SJC-=3 ;SKIP JUMP COMPARE CONTROLS ; 2214 SJCL=2 ; 2215 SJCE=1 ; 2216 SJCLE=0 ; 2217 SJCA=7 ; 2218 SJCGE=6 ; 2219 SJCN=5 ; 2220 SJCG=4 ; 2221 B0/=<3:3> ;INVERTS VARIOUS TEST, SKIP, AND JUMP CONTROLS ; 2222 CRY0(0)=0 ;TEST TST CAUSES PC SKIP IF CRY0=0 ; 2223 CRY0(1)=1 ; SAME IF CRY0=1 ; 2224 B1-2/=<4:5> ;FLOATING RESULT STORE MODE ; 2225 AC=1 ;RESULT TO AC ; 2226 MEM=2 ;RESULT JUST TO MEM ; 2227 BOTH=3 ;RESULT TO BOTH ; 2228 ; 2229 PARITY/=<11:11>P ; 2230 ; 2231 J/=<14:23> ;EXECUTOR (40&20-BITS ALWAYS 0) ; 2232 .UCODE ; 2233 ; 2234 .BIN ; 2235 ; KL10 Microcode for TOPS-20 4 February 1985 V1(357) MICRO %34(270) Page 1 ; MACRO.MIC[4,30] 17:12 9-Aug-84 CRAM Macros--Miscellaneous and A ; 2236 .TOC "CRAM Macros--Miscellaneous and A" ; 2237 .NOBIN ; 2238 ; ; 2239 ; All the CRAM macros have been alphabetized for easy reference. We have ; 2240 ; defined "_" to be alphabetically lower than the alphabet (although its ; 2241 ; ASCII representation makes it higher) so that macros such as AR_AR+1 ; 2242 ; will precede ARX_AR+1, for example (this seems more intuitive). ; 2243 ; ; 2244 []_[]*[] "@1/AD, ADA/@2, ADB/@3" ; 2245 []_[]*FM[] "@3, ADA/@2, ADB/FM, @1/AD" ; 2246 []_[]-FM[] "@3, ADA/@2, ADB/FM, @1/AD, AD/A-B" ; 2247 []_#[] "@1_#,#/@2" ; 2248 []_ADA[] "@1/AD, ADA/@2, AD/A" ; 2249 []_ADB[] "@1/AD, ADA EN/0S, ADB/@2, AD/B" ; 2250 []_FM[] "@1/AD, ADA EN/0S, ADB/FM, @2, AD/B" ; 2251 ; 2252 (AR+ARX+MQ)*.25 "ADA/AR,AD/A,AR/AD*.25,ARX/ADX*.25,(MQ)*.25" ; 2253 (AR+ARX+MQ)*2 "ADA/AR,AD/A,AR/AD*2,ARX/ADX*2,(MQ)*2" ; 2254 (MQ)*.25 "COND/REG CTL,MQ/MQM SEL,MQ CTL/MQ*.25" ; 2255 (MQ)*2 "COND/REG CTL,MQ/MQ SEL,MQ CTL/MQ*2" ; 2256 ; 2257 .IF/MODEL.B ; 2258 A INDRCT "MEM/EA CALC,EA CALC/A IND,VMA/LOAD" ; 2259 A READ "VMA/PC+1,DISP/DRAM A RD,MEM/A RD,#/300,J/0" ;;2260 .IFNOT/MODEL.B ;;2261 A INDRCT "MEM/A IND,VMA/LOAD" ;;2262 A READ "VMA/PC+1,DISP/DRAM A RD,MEM/A RD,#/0,J/0" ; 2263 .ENDIF/MODEL.B ; 2264 ABORT INSTR "COND/SPEC INSTR,SPEC INSTR/INSTR ABORT" ; 2265 AC0 "FMADR/AC0" ; 2266 AC0_AR "FMADR/AC0,COND/FM WRITE" ; 2267 AC1_AR "FMADR/AC1,COND/FM WRITE" ; 2268 AC2_AR "FMADR/AC2,COND/FM WRITE" ; 2269 AC3_AR "FMADR/AC3,COND/FM WRITE" ; 2270 .IF/MODEL.B ; 2271 AC4 "FMADR/AC+#,AC-OP/AC+#,AC#/4" ;;2272 .IFNOT/MODEL.B ;;2273 AC4 "FMADR/AC4" ; 2274 .ENDIF/MODEL.B ; 2275 AC4_AR "AC4,COND/FM WRITE" ; 2276 .IF/MODEL.B ; 2277 AC5 "FMADR/AC+#,AC-OP/AC+#,AC#/5" ;;2278 .IFNOT/MODEL.B ;;2279 AC5 "FMADR/AC5" ; 2280 .ENDIF/MODEL.B ; 2281 AC5_AR "AC5,COND/FM WRITE" ; 2282 AD FLAGS "COND/AD FLAGS" ; 2283 AD LONG "SPEC/AD LONG" ; 2284 ADMSK "R15" ;23 ONES ; 2285 ; KL10 Microcode for TOPS-20 4 February 1985 V1(357) MICRO %34(270) Page 2 ; MACRO.MIC[4,30] 17:12 9-Aug-84 CRAM Macros--AR ; 2286 .TOC "CRAM Macros--AR" ; 2287 ; 2288 AR_[] AND FM[] "ADA/@1,ADB/FM,@2,AD/AND,AR/AD" ; 2289 ; 2290 AR_(AR+2BR)*.25 "ADA/AR,ADB/BR*2,AD/A+B,AR/AD*.25" ; 2291 AR_(AR+BR)*.25 "ADA/AR,ADB/BR,AD/A+B,AR/AD*.25" ; 2292 AR_(AR-2BR)*.25 "ADA/AR,ADB/BR*2,AD/A-B,AR/AD*.25" ; 2293 AR_(AR-BR)*.25 "ADA/AR,ADB/BR,AD/A-B,AR/AD*.25" ; 2294 AR_(ARX OR AR*4)*.25 "ADA/ARX,ADB/AR*4,AD/OR,AR/AD*.25" ; 2295 AR_-AC0 "FMADR/AC0,ADB/FM,ADA EN/0S,AD/A-B,AR/AD" ; 2296 AR_-AR "ADA EN/0S,ADB/AR*4,AD/A-B,AR/AD*.25" ; 2297 AR_-AR LONG "GEN -AR LONG,AR_AD*.25 LONG" ; 2298 AR_-BR "ADB/BR,ADA EN/0S,AD/A-B,AR/AD" ; 2299 AR_-BR LONG "ADA EN/0S,ADB/BR,AD/A-B,AR/AD,ARX/ADX,SPEC/AD LONG" ; 2300 AR_-BR*2 LONG "ADA EN/0S,ADB/BR*2,AD/A-B,AR/AD,ARX/ADX,SPEC/AD LONG" ; 2301 AR_-BRX "ADB/BR,ADA EN/0S,AD/A-B,AR/ADX" ; 2302 AR_-DLEN "DLEN,ADB/FM,ADA EN/0S,AD/A-B,AR/AD" ; 2303 AR_-SLEN "SLEN,ADB/FM,ADA EN/0S,AD/A-B,AR/AD" ; 2304 AR_0.C "COND/ARL IND,CLR/AR" ; 2305 AR_0.M "MEM/ARL IND,CLR/AR" ; 2306 AR_0.S "SPEC/ARL IND,CLR/AR" ; 2307 AR_0S "AD/0S,AR/AD" ; 2308 AR_1 "ADA EN/0S,AD/A+1,AR/AD" ; 2309 AR_1 LONG "ADA EN/0S,AD/A+1,AR/AD*.25,ARX/ADX" ; 2310 AR_1S "AD/1S,AR/AD" ; 2311 AR_2 "ADA EN/0S,AD/A+1,AR/AD*2" ; 2312 AR_2(AR*BR) "ADA/AR,ADB/BR,AR/AD*2" ; 2313 AR_2(AR+1) "ADA/AR,AD/A+1,AR/AD*2" ; 2314 AR_2(AR+BR) "AR_2(AR*BR),AD/A+B" ; 2315 AR_2(AR+BR) LONG "AR_2(AR*BR),AD/A+B,ARX/ADX*2,SPEC/AD LONG" ; 2316 AR_2(AR-BR) "AR_2(AR*BR),AD/A-B" ; 2317 ; 2318 AR_AC0 "FMADR/AC0,ADB/FM,AD/B,AR/AD" ; 2319 AR_AC0 COMP "FMADR/AC0,ADB/FM,AD/SETCB,AR/AD" ; 2320 AR_AC0+1 "ADA EN/0S,ADB/FM,FMADR/AC0,AD/A+B+1,AR/AD" ; 2321 AR_AC1 "FMADR/AC1,ADB/FM,AD/B,AR/AD" ; 2322 AR_AC1 COMP "FMADR/AC1,ADB/FM,AD/SETCB,AR/AD" ; 2323 AR_AC1*2 "FMADR/AC1,ADB/FM,AD/B,AR/AD*2" ; 2324 AR_AC2 "FMADR/AC2,ADB/FM,AD/B,AR/AD" ; 2325 AR_AC3 "FMADR/AC3,ADB/FM,AD/B,AR/AD" ; 2326 AR_AC3*2 "FMADR/AC3,ADB/FM,AD/B,AR/AD*2" ; 2327 AR_AC4 "AC4,ADB/FM,AD/B,AR/AD" ; 2328 AR_AD*.25 LONG "AR/AD*.25,ARX/ADX*.25,SPEC/AD LONG" ; 2329 AR_ADMSK AND VMA HELD "COND/SEL VMA,ADA/PC,ADB/FM,ADMSK,AD/AND,AR/AD" ; 2330 ; 2331 AR_AR AND ADMSK "ADMSK,ADB/FM,ADA/AR,AD/AND,AR/AD" ; 2332 .IF/KLPAGE ; 2333 AR_AR AND CSMSK "CSMSK,ADB/FM,ADA/AR,AD/AND,AR/AD" ; 2334 AR_AR OR PUR "PUR,ADB/FM,ADA/AR,AD/OR,AR/AD" ; 2335 .ENDIF/KLPAGE ; 2336 AR_AR SWAP "SH/AR SWAP,AR/SH" ; 2337 ; 2338 AR_AR*.25 "ADA/AR,AD/A,AR/AD*.25" ; 2339 AR_AR*.25 LONG "ADA/AR,AD/A,AR/AD*.25,ARX/ADX*.25" ; 2340 AR_AR*.5 "ADA/AR,AD/A*2,AR/AD*.25" ; 2341 AR_AR*.5 LONG "ADA/AR,AD/A*2,SPEC/AD LONG,AR/AD*.25,ARX/ADX*.25" ; KL10 Microcode for TOPS-20 4 February 1985 V1(357) MICRO %34(270) Page 2-1 ; MACRO.MIC[4,30] 17:12 9-Aug-84 CRAM Macros--AR ; 2342 AR_AR*1.25 LONG "ADA/AR,ADB/AR*4,AD/A+B,AR_AD*.25 LONG" ; 2343 AR_AR*10 "ADA/AR,ADB/AR*4,AD/A+B,AR/AD*2" ; 2344 AR_AR*10 LONG "ADA/AR,ADB/AR*4,AD/A+B,AR/AD*2,ARX/ADX*2,SPEC/AD LONG" ; 2345 AR_AR*2 "ADA/AR,AD/A,AR/AD*2" ; 2346 AR_AR*2 LONG "ADA/AR,AD/A,AR/AD*2,ARX/ADX*2" ; 2347 AR_AR*4 "ADB/AR*4,AD/B,AR/AD" ; 2348 AR_AR*4 LONG "ADB/AR*4,AD/B,AR/AD,ARX/ADX" ; 2349 AR_AR*5 LONG "ADA/AR,ADB/AR*4,AD/A+B,AR/AD,ARX/ADX,SPEC/AD LONG" ; 2350 AR_AR*8 "ADB/AR*4,AD/B,AR/AD*2" ; 2351 AR_AR*8 LONG "ADB/AR*4,AD/B,AR/AD*2,ARX/ADX*2" ; 2352 AR_AR*AC0 "FMADR/AC0,ADB/FM,ADA/AR,AR/AD" ;GENERAL BINARY OPERATION ; 2353 AR_AR*AC1 "FMADR/AC1,ADB/FM,ADA/AR,AR/AD" ; 2354 AR_AR*BR "ADA/AR,ADB/BR,AR/AD" ; 2355 AR_AR*EXPMSK "EXPMSK,ADB/FM,ADA/AR,AR/AD" ;[224] ; 2356 AR_AR*MSK "MSK,ADB/FM,ADA/AR,AR/AD" ; 2357 AR_AR*SFLGS "SFLGS,ADB/FM,ADA/AR,AR/AD" ; 2358 AR_AR*SLEN "SLEN,ADB/FM,ADA/AR,AR/AD" ; 2359 AR_AR*T0 "T0,ADB/FM,ADA/AR,AR/AD" ; 2360 ; 2361 AR_AR+1 "ADA/AR,AD/A+1,AR/AD" ; 2362 AR_AR+1 LONG "AR_AR+1,ARX/ADX,SPEC/AD LONG" ; 2363 AR_AR+1-AR0 "ADA/AR,AD/A+1,AR/AD,SPEC/XCRY AR0" ; 2364 AR_AR+BR "ADA/AR,ADB/BR,AD/A+B,AR/AD" ; 2365 AR_AR+BR LONG "AR_AR+BR,ARX/ADX,SPEC/AD LONG" ; 2366 AR_AR+E1 "E1,ADB/FM,ADA/AR,AD/A+B,AR/AD" ; 2367 AR_AR+FM[] "ADA/AR,ADB/FM,@1,AD/A+B,AR/AD";[343] ; 2368 .IF/KLPAGE ; 2369 AR_AR+SBR "SBR,ADB/FM,ADA/AR,AD/A+B,AR/AD" ; 2370 .ENDIF/KLPAGE ; 2371 AR_AR+T0 "T0,ADB/FM,ADA/AR,AD/A+B,AR/AD" ; 2372 AR_AR+T1 "T1,ADB/FM,ADA/AR,AD/A+B,AR/AD" ;;2373 .IF/TRXDEF ;;2374 AR_AR+TRB "TRB,ADB/FM,ADA/AR,AD/A+B,AR/AD" ;;2375 AR_AR+TRX "TRX,ADB/FM,ADA/AR,AD/A+B,AR/AD" ; 2376 .ENDIF/TRXDEF ; 2377 AR_AR+XR "GEN AR+XR,AR/AD" ; 2378 ; 2379 AR_AR-1 "ADA/AR,AD/A-1,AR/AD" ; 2380 AR_AR-BR "ADA/AR,ADB/BR,AD/A-B,AR/AD" ; 2381 AR_AR-BR LONG "AR_AR-BR,ARX/ADX,SPEC/AD LONG" ; 2382 AR_