; KL10 Microcode for TOPS-10 and TOPS-20 -- 18 Nov 1983 COPYRIGHT (C) 1984 DIGITAL EQUIPMENT CORPORATION V1(336) MICRO %34(270) Page TOC-1 ; Table of Contents ; 1 UB.MIC[10,5351] 18:39 20-Apr-83 ; 21 EDHIS.MIC[10,5351] 22:44 29-Nov-83 ; 41 REVISION HISTORY ; 995 DEFINE.MIC[10,5351] 23:19 23-Nov-83 ; 996 CONDITIONAL ASSEMBLY VARIABLE DEFINITIONS ; 1156 HOW TO READ THE MICROCODE -- FORMATS & CONSTRUCTS ; 1359 MICROCODE LISTING TEMPLATE ; 1410 KL10 INSTRUCTION OPCODE MAP ; 1466 CONTROL RAM DEFINITIONS -- J, AD ; 1522 CONTROL RAM DEFINITIONS -- DATA PATH MIXERS ; 1593 CONTROL RAM DEFINITIONS -- 10-BIT LOGIC ; 1626 CONTROL RAM DEFINITIONS -- SHIFT, ARMM, VMA, TIME ; 1660 CONTROL RAM DEFINITIONS -- MEM SPECIAL FUNCTIONS ; 1689 CONTROL RAM DEFINITIONS -- SKIP/COND SPECIAL FUNCTIONS ; 1781 CONTROL RAM DEFINITIONS -- DISP/SPEC SPECIAL FUNCTIONS ; 1833 CONTROL RAM DEFINITIONS -- MAGIC NUMBER FIELD ; 2151 DISPATCH RAM DEFINITIONS ; 2197 MACRO.MIC[10,5351] 21:14 28-Nov-83 ; 2198 CRAM Macros--Miscellaneous and A ; 2248 CRAM Macros--AR ; 2471 CRAM Macros--AR Miscellaneous, ARL, and ARR ; 2540 CRAM Macros--ARX ; 2633 CRAM Macros--B, C, D ; 2739 CRAM Macros--E, F ; 2839 CRAM Macros--G, H, I, J, L ; 2950 CRAM Macros--M, N, O, P ; 3058 CRAM Macros--R ; 3115 CRAM Macros--S ; 3359 CRAM Macros--T, U, V, W, X ; 3468 DRAM Macros ; 3552 BASIC.MIC[10,5351] 19:05 28-Nov-83 ; 3553 THE INSTRUCTION LOOP ; 3647 NEXT INSTRUCTION DISPATCH ; 3773 EFFECTIVE ADDRESS COMPUTATION AND OPERAND FETCH ; 3839 WAIT FOR (E) ; 3907 TERMINATION ; 3957 MOVE GROUP, EXCH, BLT ; 4000 XMOVEI, XHLLI, MOVEM, EXCH, BLT ; 4031 HALFWORD GROUP ; 4178 DMOVE, DMOVN, DMOVEM, DMOVNM ; 4218 BOOLEAN GROUP ; 4375 SKPJMP.MIC[10,5351] 21:45 19-Sep-83 ; 4376 TEST GROUP ; 4485 COMPARE -- CAI, CAM ; 4511 ARITHMETIC SKIPS -- AOS, SOS, SKIP ; 4560 CONDITIONAL JUMPS -- JUMP, AOJ, SOJ, AOBJ ; 4616 AC DECODE JUMPS -- JRST, JFCL ; 4756 HALT LOOP ; 4785 MAP, XCT ; 4814 STACK INSTRUCTIONS -- PUSHJ, PUSH, POP, POPJ ; 4912 SUBROUTINE CALL/RETURN -- JSR, JSP, JSA, JRA ; 4962 UUO'S ; 5195 JSYS, ADJSP ; 5237 XCT, PXCT, SXCT ; 5311 SHIFT.MIC[10,5351] 16:00 16-Mar-78 ; KL10 Microcode for TOPS-10 and TOPS-20 -- 18 Nov 1983 COPYRIGHT (C) 1984 DIGITAL EQUIPMENT CORPORATION V1(336) MICRO %34(270) Page TOC-2 ; Table of Contents ; 5312 ROTATES AND LOGICAL SHIFTS -- ROT, LSH, JFFO ; 5367 ROTATE AND LOGICAL SHIFT COMBINED -- ROTC, LSHC ; 5401 ARITHMETIC SHIFTS -- ASH, ASHC ; 5450 ARITH.MIC[10,5351] 19:59 21-Jun-83 ; 5451 ADD, SUB ; 5476 MUL, IMUL ; 5527 MULTIPLY SUBROUTINE ; 5581 DIV, IDIV ; 5640 INTEGER DIVIDE SUBROUTINE ; 5680 BASIC DIVIDE LOOP ; 5729 DOUBLE INTEGER ARITHMETIC -- DADD, DSUB, DMUL, DDIV ; 5854 FP.MIC[10,5351] 19:08 8-Oct-81 ; 5855 SINGLE FLOATING ADD & SUB -- FAD, FADR, FSB, FSBR ; 5933 SINGLE FLOATING MULTIPLY -- FMP, FMPR ; 5962 SINGLE FLOATING DIVIDE -- FDV, FDVR ; 6090 UFA, DFN, FSC, IBP ; 6159 FIX, FIXR, FLTR, EXTEND ; 6229 SINGLE PRECISION FLOATING NORMALIZATION ; 6370 DOUBLE FLOATING ARITHMETIC -- DFAD, DFSB, DFMP, DFDV ; 6521 DOUBLE PRECISION NORMALIZATION ; 6588 BYTE.MIC[10,5351] 15:09 9-Aug-83 ; 6589 BYTE GROUP -- IBP, ILDB, LDB, IDPB, DPB ; 6716 INCREMENT BYTE POINTER SUBROUTINE ; 6840 BYTE EFFECTIVE ADDRESS EVALUATOR FOR XADDR SMP LDB ; 6891 LOAD BYTE SUBROUTINE ; 6914 DEPOSIT BYTE SUBROUTINE ; 6945 IBP, ADJBP ; 7212 EXTEXP.MIC[10,5351] 22:20 31-Aug-82 ; 7213 GFLT DOUBLE PRECISION ARITHMETIC ; 7331 GFLT MULTIPLY ; 7376 GFLT DIVIDE ; 7418 GFLT NORMALIZATION ; 7561 GFLT TO INTEGER CONVERSION ; 7686 GFLT DATA CONVERSION INSTRUCTIONS ; 7909 IO.MIC[10,5351] 14:31 29-Nov-83 ; 7910 I/O INSTRUCTIONS ; 8008 EXTERNAL DEVICE I/O INSTRUCTIONS ; 8102 INTERNAL DEVICE FUNCTIONS -- APR, CCA ; 8141 INTERNAL DEVICE FUNCTIONS -- PI ; 8196 TRACKS SUPPORT ; 8453 INTERNAL DEVICE FUNCTIONS -- PAG ; 8577 INTERNAL DEVICE FUNCTIONS -- TIM & MTR ; 8682 PRIORITY INTERRUPT PROCESSING ; 8858 KL-MODE PAGE REFILL LOGIC ; 9238 KI-MODE PAGE FAIL HANDLING ; 9388 PAGE FAIL/INTERRUPT CLEANUP FOR SPECIAL INSTRUCTIONS ; 9461 EIS.MIC[10,5351] 18:59 19-May-83 ; 9462 EXTENDED INSTRUCTION SET DECODING ; 9621 ONE WORD GLOBAL BYTE POINTER SUBROUTINES FOR EXTEND ; 9676 EIS -- STRING MOVE ; 9799 EIS -- STRING COMPARE ; 9876 EIS -- DECIMAL TO BINARY CONVERSION ; 9943 EIS -- BINARY TO DECIMAL CONVERSION ; 10101 EIS -- SRCMOD SUBROUTINE TO GET MODIFIED SOURCE BYTE ; 10306 EIS -- EDIT FUNCTION ; KL10 Microcode for TOPS-10 and TOPS-20 -- 18 Nov 1983 COPYRIGHT (C) 1984 DIGITAL EQUIPMENT CORPORATION V1(336) MICRO %34(270) Page TOC-3 ; Table of Contents ; 10565 BLT.MIC[10,5351] 17:35 6-Jul-83 ; 10566 XBLT ; 10616 BLT ; 10704 EXTENDED ADDRESSING CODE FOR PXCT OF BLT ; Cross Reference Index ; DCODE Location / Line Number Index ; UCODE Location / Line Number Index ; KL10 Microcode for TOPS-10 and TOPS-20 -- 18 Nov 1983 COPYRIGHT (C) 1984 DIGITAL EQUIPMENT CORPORATION V1(336) MICRO %34(270) Page 1 ; UB.MIC[10,5351] 18:39 20-Apr-83 UB.MIC[10,5351] 18:39 20-Apr-83 ; 1 ;PARAMETER CHANGES FOR KL10 TOPS-10 MICROCODE ; 2 ;MODEL B MACHINE EXTENDED ADDRESSING with KL style paging ; 3 ; 4 .SET/SNORM.OPT=1 ; 5 .SET/XADDR=1 ; 6 .SET/EPT540=1 ; 7 .SET/LONG.PC=1 ; 8 .SET/MODEL.B=1 ; 9 .SET/KLPAGE=1 ; 10 .SET/FPLONG=0 ; 11 .SET/BLT.PXCT=1 ; 12 .SET/SMP=1 ;SMP- DOES RPW FOR DPB, IDPB INSTEAD OF READ, WRITE ; 13 .SET/EXTEXP=1 ; 14 .SET/MULTI=1 ;DOES NOT CACHE PAGE TABLE DATA ; 15 .SET/NOCST=1 ;DOES NOT DO AGE UPDATES, ETC. WITH CST = 0 ; 16 .SET/OWGBP=0 ;No ONE WORD GLOBAL BYTE POINTERS ; 17 .SET/IPA20=0 ;No IPA20-L ; 18 .SET/GFTCNV=0 ;DO NOT DO GFLOAT CONVERSION INSTRUCTIONS [273] ; 19 ;SAVES 75 WORDS. MONITOR WILL TAKE CARE OF THEM. ; 20 .set/cst.write=0 ;No common file system on TOPS-10 ; 21 ; KL10 Microcode for TOPS-10 and TOPS-20 -- 18 Nov 1983 COPYRIGHT (C) 1984 DIGITAL EQUIPMENT CORPORATION V1(336) MICRO %34(270) Page 1 ; EDHIS.MIC[10,5351] 22:44 29-Nov-83 UB.MIC[10,5351] 18:39 20-Apr-83 ; 22 .TITLE "KL10 Microcode for TOPS-10 and TOPS-20 -- 18 Nov 1983 COPYRIGHT (C) 1984 DIGITAL EQUIPMENT CORPORATION" ; 23 .VERSION/MAJOR=1/MINOR=0/EDIT=336/WHO=0 ; 24 .NOBIN ; 25 ; 26 ; THE INFORMATION IN THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT ; 27 ; NOTICE AND SHOULD NOT BE CONSTRUED AS A COMMITMENT BY DIGITAL ; 28 ; EQUIPMENT CORPORATION. DIGITAL EQUIPMENT CORPORATION ASSUMES NO ; 29 ; RESPONSIBITY FOR ANY ERRORS THAT MAY APPEAR IN THIS DOCUMENT. ; 30 ; THE SOFTWARE DESCRIBED IN THIS DOCUMENT IS FURNISHED TO THE ; 31 ; PURCHASER UNDER A LICENSE FOR USE ON A SINGLE COMPUTER SYSTEM AND ; 32 ; CAN BE COPIED (WITH INCLUSION OF DIGITAL'S COPYRIGHT NOTICE) ONLY ; 33 ; FOR USE IN SUCH SYSTEM, EXCEPT AS MAY OTHERWISE BE PROVIDED IN WRITING ; 34 ; BY DIGITAL. ; 35 ; DIGITAL EQUIPMENT CORPORATION ASSUMES NO RESPONSIBILITY FOR THE ; 36 ; USE OR RELIABILITY OF ITS SOFTWARE ON EQUIPMENT THAT IS NOT SUPPLIED ; 37 ; BY DIGITAL. ; 38 ; COPYRIGHT (C) 1975,1976,1977,1978,1979,1980,1981,1982,1983,1984 DIGITAL EQUIPMENT CORPORATION ; 39 ; 40 ; 41 .TOC "REVISION HISTORY" ; 42 ; 43 ; The following collection of people have contributed to the ; 44 ; production and maintenance of this code. In reverse chronological ; 45 ; order: ; 46 ; ; 47 ; QQSV (Dick Wagman) -- beginning with edit 301 ; 48 ; Sean Keenan ; 49 ; Don Dossa ; 50 ; Mike Newman ; 51 ; Jud Leonard ; 52 ; ; 53 ;REV WHY ; 54 ; ; 55 ;336 Back off 330 for a bit, since TOPS-10 7.02 must be tested and ; 56 ; OWGs in section 0 fail for string instructions (they get converted ; 57 ; to TWGs, which are illegal in section 0). For now, we will maintain ; 58 ; both sources. ; 59 ;335 Force memory to be released for SMP case of DPB if P > 36 causes no ; 60 ; actual data to be stored. Make an OWG reference to an address > ; 61 ; 37,,777777 cause a page fail (GBYTE was stripping the excess bits). ; 62 ;334 Fix conflict generated in CLRPT by 333 by creating new subroutine ; 63 ; ARSWAP which is just AR_AR SWAP. Make several other routines call it, ; 64 ; thus saving a few words. ; 65 ;333 Add new conditional BIG.PT. Under it, add code to implement the "Keep ; 66 ; me" bit for paging as bit 5 of the page table, and to move it to page ; 67 ; map bit 23 during page refill. Also make DATAO PAG not clear Kept ; 68 ; pages if bit 3 of the word is off. ; 69 ;332 Redefine all bank 7 ACs as R0,...,R17, and all bank 6 ACs as P0,..., ; 70 ; P17. Change all other alias definitions to refer to these. This ; 71 ; gives us a uniform cross reference for all scratch register references. ; 72 ; Put all macro definitions into alphabetical order, making it easier ; 73 ; to look up a macro definition. Split the edit history into its own ; 74 ; file. There are no functional changes from 331. ; 75 ;331 Allow XSFM anywhere. Clean up the code a bit in the process. There ; 76 ; still remain a number of references to XSFM or XPCW distinctions, ; 77 ; and these could almost certainly be cleaned up further. ; KL10 Microcode for TOPS-10 and TOPS-20 -- 18 Nov 1983 COPYRIGHT (C) 1984 DIGITAL EQUIPMENT CORPORATION V1(336) MICRO %34(270) Page 1-1 ; EDHIS.MIC[10,5351] 22:44 29-Nov-83 REVISION HISTORY ; 78 ;330 Allow one word global byte pointers in section zero. This includes ; 79 ; changes in BYTE, EIS, and FP. Change GBYTE and CNV2WD to return 2; ; 80 ; eliminate GTST as obsolete. Also shuffle the calls to these routines ; 81 ; to conform to the new calling conventions, and put the OWG test at ; 82 ; the beginning of IBP, ILDB, IDBP, LDB, DPB, and ADJBP. ; 83 ;327 Add PAGCNT conditional. Under it, include control to count entry ; 84 ; into PFH code and DATAO PAG with bit 2 set. ; 85 ;326 Change VMA restoration in INC2WD and CNV2WD (see edits 320 and 307) ; 86 ; to use RSTR VMA_MQ in order to keep the global/local sense of the ; 87 ; reference. This was causing ILDBs of OWGs in shadow memory to ; 88 ; save the incremented byte pointer in the ACs instead of memory. ; 89 ;325 Add VMA/LOAD to local indexed EA computation for EXTEND E1 to make ; 90 ; it read the section number from VMA instead of PCS (!) if the index ; 91 ; is section local. ; 92 ;324 Force the XADDR conditional to use RPW type references for DPB and ; 93 ; IDPB if the SMP conditional is on, even if one word globals are not ; 94 ; active. ; 95 ;323 Add missing constraint near NOT.WR, accidentally broken by 322. ; 96 ;322 Generate the A(cessible) bit in a page fail word caused by a read ; 97 ; violation if the page is otherwise accessible and if no CST is present. ; 98 ; This could be fixed for the CST present case as well, but has been ; 99 ; deferred since we are tight on space and no one seems to need it ; 100 ; anyway. ; 101 ;321 Prevent statistics microcode from losing traps by forcing NICOND ; 102 ; dispatch 11 to ignore the statistics and take the trap. ; 103 ;320 Restore the VMA again in INC2WD (broken by 307), since the state ; 104 ; register bits may have changed in the interim. This was causing ; 105 ; PXCT to do surprising things (mostly bad). ; 106 ;317 Originally, this was an attempt to uncount multiply counted op ; 107 ; codes which resulted from interrupts during long instructions. ; 108 ; That project has been shelved for now. Instead, the second ; 109 ; NICOND dispatch during op code counting has had its final constraint ; 110 ; fixed. ; 111 ;316 Make counting only version compatible with time and counting by making ; 112 ; counting only version use TRX2 and TRX3, removing physical contiguity ; 113 ; requirement. ; 114 ;315 Op code counting lives again! The setup code activated by DATAO PI ; 115 ; was attempting to write the TRX registers with data fresh from memory, ; 116 ; resulting in parity checks when it was used (see edit 73, for example). ; 117 ; Juggle code to overlap next address calculation with parity wait. ; 118 ;314 Add CST.WRITE conditional to facilitate assembly of microcode ; 119 ; without the CST writable bit (see edit 303). ; 120 ;313 Put TIME/3T on XFERW, as the assembler was getting the wrong ; 121 ; value with both AR_MEM and ARX_MEM macros present. ; 122 ;312 Fix definition of BYTE RPW to include a write test. This was ; 123 ; causing the SMP version of DPB to hang when memory was readable ; 124 ; but not writable. ; 125 ;311 Make all IOP function 7 style of references look in the cache. ; 126 ;310 Improve the fix in 307 to save the computed E0+1 in FILL during ; 127 ; OWGBP conversion and to restore the VMA from there when done. ; 128 ; Also, make sure that the VMA is initialized to PC for all cases ; 129 ; when doing effective address calculations for two word globals ; 130 ; in string instructions. 307 was not enough to clean up the ; 131 ; CMPSx fill problem, since VMA HELD was never loaded. ; 132 ; Force EXT2WD to prereference AC4 and AC5 so that glitch discovered ; 133 ; for second edit 210 will not be activated. ; KL10 Microcode for TOPS-10 and TOPS-20 -- 18 Nov 1983 COPYRIGHT (C) 1984 DIGITAL EQUIPMENT CORPORATION V1(336) MICRO %34(270) Page 1-2 ; EDHIS.MIC[10,5351] 22:44 29-Nov-83 REVISION HISTORY ; 134 ;307 Restore VMA from MQ at end of CNV2WD (and remove it from INC2WD, ; 135 ; saving a word in the process). This was causing CMPSx to load ; 136 ; a random fill word and MOVSLJ to store to a random place when the ; 137 ; source length was zero if one word globals were in use. ; 138 ; Force page fail code to look for ARX as well as AR parity errors ; 139 ; (now possible with BYTE RPW implemented). ; 140 ; Make sign extension of E1 go to right place in EXTEND decoding of ; 141 ; offset instructions (broken in 301). ; 142 ;306 Add University of Essex code to statistics (TRACKS) code to make ; 143 ; it work with address break enabled. ; 144 ;305 Fix CST write bit logic to not test bit 18 when reading. ; 145 ;304 Switch byte read interlock from LDB to DPB (broken in 303). ; 146 ;303 Implement bit 18 of a CST entry as a write enable bit in addition ; 147 ; to all the other write enable functions. ; 148 ; Knock one cycle out of byte deposit where the byte is being ; 149 ; deposited into the high order byte of a word. ; 150 ; Implement the SMP conditional for extended addressing by ; 151 ; replicating all the byte effective address calculation code for ; 152 ; DPB. This is unfortunate, but necessary due to the huge dispatch ; 153 ; table that ends this subroutine. ; 154 ;302 Move XFERW out of EIS (which no longer absolutely requires it ; 155 ; in line) into SKPJMP (more in the heart of things). Also ; 156 ; juggle comment lines and code layout to reduce the listing ; 157 ; size a bit and to force some of the .TOC lines into the table ; 158 ; of contents (even though the code nearby may be suppressed). ; 159 ;301 Fix ADJBP so that instructions which occur at the last word on ; 160 ; a page do not cause a page failure of some random type (one cycle ; 161 ; too many between I FETCH and NICOND). ; 162 ; Fix effective address calculation for EXTEND so that only offset ; 163 ; instructions (and not GSNGL, for example) will have E1 sign ; 164 ; smeared. ; 165 ; Implement XJRST. Also force JSP and JSR to do full 30 bit ; 166 ; effective address calculations. ; 167 ;300 ADD LOAD OF VMA FROM PC IN PUTDST TO GET THE SECTION ADDRESS ; 168 ; CORRECT ON THE STRING INSTRUCTIONS. ; 169 ;277 Add EA CALC table for SMP configurations of extended addressing ; 170 ; for TOPS-10. (TOPS-20 paging) ; 171 ;276 Force global EA CALC for EXTEND instructions in PUTDST. ; 172 ;275 FIX THE ERROR CODE IN STRING COMPARE FOR ILLEGAL BITS IN THE ; 173 ; LENGTH FIELD. WAS CAUSING AR PARITY ERRORS. ; 174 ;274 SAVE THE API FUNCTION WORD ON AN IO PAGE FAIL INSTEAD OF THE ; 175 ; PAGE FAIL WORD. THIS TAKES PLACE IN BOTH THE AC BLK 7 AC 2 ; 176 ; AND THE MONITOR. ; 177 ;273 PUT CONDITIONALS AROUND 4 GFLOAT CONVERSION INSTRUCTIONS. ; 178 ; THEY WILL ACT AS MUUO'S AND MONITOR WILL TAKE CARE OF THEM. ; 179 ;272 CONO APR 200000 AT TIMES WAS NOT GENERATING EBUS RESET OF A ; 180 ; SUFFICIENT LENGTH TO CLEAR DTE REGISTERS. ADDED ANOTHER ; 181 ; MICROWORD SO THAT CONO APR IS NOW UP FOR TWO FULL WORDS WHICH ; 182 ; GETS AROUND THE HARDWARE PROBLEM. ; 183 ;271 ILLEGAL INDIRECT PAGE FAIL (24) WAS NOT ALLOWING USER TO BE SET. ; 184 ;270 WHEN IN SECTIONS > 1, AN UPDATED OWGBP WOULD BE WRITTEN INTO ; 185 ; MEMORY INSTEAD OF THE AC'S. ; 186 ;267 CHANGED TESTS FOR OWGBP TO TEST FOR PC SEC0 FIRST. SAVES 33 NS. ; 187 ;266 CONDITIONALS ON FOR TOPS-20 DEVELOPMENT. ; 188 ;265 REMOVED EDIT 244. SOFTWARE ENGINEERING WILL SUPPLY MONITOR ; 189 ; CODE TO TAKE CARE OF PROBLEM. CODE COSTS TOO MUCH TIME IN ; KL10 Microcode for TOPS-10 and TOPS-20 -- 18 Nov 1983 COPYRIGHT (C) 1984 DIGITAL EQUIPMENT CORPORATION V1(336) MICRO %34(270) Page 1-3 ; EDHIS.MIC[10,5351] 22:44 29-Nov-83 REVISION HISTORY ; 190 ; THE INSTRUCTION EXECUTION. ; 191 ;264 ADDED CONDITIONALS TO CODE FOR IPA20, OWGBP AND NO CST UPDATE IF ; 192 ; CBR IS ZERO. THIS IS FOR RELEASE 5 OF TOPS-20. ; 193 ;263 IBP DID NOT CLEAR FPD ON EXIT. ; 194 ;262 ALLOW XBLT TO BE VALID IN SECTION 0. ; 195 ;261 FIX CODE AT END OF ADJBP CODE TO CLEAR STATE REG. IF ILDB ; 196 ; WITH 2 WD GLOBAL POINTER POINTING TO ADDRESS NOT IN CORE ; 197 ; CLEAN DISPATCHES TO WRONG CODE BECAUSE SR LEFT OVER FROM ; 198 ; ADJBP. ; 199 ;260 FIX FM PARITY ERRORS AT MVF1: ADDED NULL CALL TO RET2: ; 200 ; AT MVST: TO TAKE CARE OF EXTRA TICK FOR PARITY. ; 201 ;257 MAKE SURE THAT THE UPDATED ONE WORD GLOBAL BYTE POINTER IS ; 202 ; WRITTEN BACK INTO THE CORRECT CONTEXT. ; 203 ;256 MAKE ANOTHER ATTEMPT TO FIX PXCT OF ONE WORD GLOBAL BYTE POINTERS. ; 204 ; THE GIBP CODE GETS THE SAME CHANGES AS EDIT 255. ; 205 ;255 MAKE ONE WORD GLOBAL BYTE POINTERS WORK WITH PXCT. THE STATE ; 206 ; REGISTER BITS ON MCL4 (NOT TO BE CONFUSED WITH CON3), WERE NOT ; 207 ; BEING SET PROPERLY TO ALLOW PREVIOUS ENA AND USER ENA TO BE SET. ; 208 ; GUARANTEE THAT THESE SR BITS ARE SET PRIOR TO THE LOAD OF THE VMA. ; 209 ;254 FIX PROBLEM WITH OWGBP WHERE FPD DOES NOT EFFECT ; 210 ; INC OF POINTER AFTER PAGE FAIL ; 211 ;253 FIXED ADDRESSING FOR SH DISP AT GADJL0: ; 212 ;252 MOVE STRING INSTRUCTIONS DO NOT GET THE CORRECT DATA ON ; 213 ; LOCAL POINTERS IN NON 0 SECTIONS ; 214 ;251 ADD CODE FOR ONE WORD GLOBAL BYTE POINTERS. ; 215 ; TOOK OUT EDITS 243 AND 250 TO GET ENOUGH SPACE IN CRAM ; 216 ; FOR THIS EDIT. OWGBP WITH EXTEND INSTRUCTIONS WILL NOT ; 217 ; RETURN A OWGBP. THEY WILL RETURN A TWO WORD GLOBAL BP. ; 218 ;250 ALLOW SMP SWITCH TO EFFECT TOPS-20 MODEL B TO DO RPW IN ; 219 ; BYTE INSTRUCTIONS. ; 220 ;247 DO NOT DO A CST UPDATE OR AGE UPDATE IF THE CBR IS ZERO. ; 221 ;246 EXTEND OP CODE DECODE FOR MODEL A WAS ACCEPTING MODEL B ; 222 ; OP CODES (20-31). ADDED CONDITIONALS TO CODE TO FIX. ; 223 ;245 FIX 2 WORD GLOBAL BYTE POINTER BUG WITH IBP INSTRUCTION ; 224 ; WITH EXTENDED ADDRESSING OUT OF SECTION 0 ; 225 ;244 FIX MOVST EXTEND INST. SO THAT ILLEGAL (> 36) S FIELD ; 226 ; DOES NOT CAUSE STOP CODE TO CRASH SYSTEM FOR TOPS-10 MODEL B. ; 227 ;243 WRTIME TRIED TO DO MEM WRITE EVEN THOUGH THE INSTRUCTION ; 228 ; DOES NOT DO ANYTHING TO MEMORY. CAUSED PROBLEMS IF THE MEMORY ; 229 ; LOCATION WAS NOT WRITABLE. ; 230 ;242 FIX CODE FROM EDIT 234 TO GET PF CODE OF 24. ; 231 ;241 FIX DFAD AND DFMP FOR ROUNDING OCCURS PROPERLY. ADDED STICKY ; 232 ; BIT FOR LEAST SIGNIFICANT BITS OF THE RESULT. ; 233 ;240 FIX GFLT INSTRUCTIONS GFIX AND DGFIX SO THEY WILL TRUNCATE NEGATIVE ; 234 ; NUMBERS IN THE CORRECT DIRECTION. THE MQ MUST BE ZERO BEFORE ; 235 ; THE ARX_2 MACRO IS INVOKED OR THE ARX MIGHT GET A 3 FROM MQ00. ; 236 ;237 ADD OPTION BIT FOR PV CPU IN THE APRID WORD AS IT IS DOCUMENTED ; 237 ; IN ALL OF THE HARDWARE DOCUMENTATION. SET THE BIT ACCORDING ; 238 ; TO THE MODEL.B OPTION SWITCH. IT WILL BE MAGIC NUMBER BIT 3. ; 239 ;236 ALLOW THE INTEGER DIVIDE OF THE LARGEST NEGATIVE NUMBER BY ; 240 ; PLUS ONE TO SUCCEED. THIS USED TO BE A DOCUMENTED RESTRICTION ; 241 ; THAT THIS OPERATION WOULD CAUSE AN OVERFLOW AND NO DIVIDE. ; 242 ;235 FIX JRA SO IT DOESN'T FALL INTO SECTION ZERO FROM A NON-ZERO ; 243 ; SECTION EVERY TIME BY WRITING THE PC SECTION INTO THE VMAX. ; 244 ;234 BUILD A PAGE FAIL CODE OF 24 WHEN AN ILLEGAL INDIRECT WORD ; 245 ; IS FOUND DURING THE EFFECTIVE ADDRESS CALCULATION IN ; KL10 Microcode for TOPS-10 and TOPS-20 -- 18 Nov 1983 COPYRIGHT (C) 1984 DIGITAL EQUIPMENT CORPORATION V1(336) MICRO %34(270) Page 1-4 ; EDHIS.MIC[10,5351] 22:44 29-Nov-83 REVISION HISTORY ; 246 ; A NON-ZERO SECTION. THE PAGE FAIL CODE WAS PREVIOUSLY NOT ; 247 ; BEING REPORTED. ; 248 ;233 SAVE THE IOP FUNCTION WORD THAT APPEARS ON THE EBUS WHEN AN ; 249 ; EXTERNAL DEVICE INTERRUPTS THE CPU. SAVE THIS INFORMATION ; 250 ; ON EVERY INTERRUPT IN AC BLOCK 7, AC 3. THE CONTENTS ; 251 ; OF THIS AC WILL BE PRESERVED UNTIL THE NEXT INTERRUPT. ; 252 ; OPERATING SYSTEMS SHOULD SAVE THIS INFORMATION AS SOON AS POSSIBLE ; 253 ; IF ITS CONTENTS ARE TO BE RELIABLE AND MEANINGFUL. ; 254 ;232 ADDS 13 NEW INSRUCTIONS FOR SUPPORTING FORTRAN78 ON MODEL ; 255 ; B MACHINES. THESE INSTRUCTIONS ARE: ; 256 ; OPCODE SYMBOL ; 257 ; ====== ====== ; 258 ; 102 GFAD AC,E ; 259 ; 103 GFSB AC,E ; 260 ; 106 GFMP AC,E ; 261 ; 107 GFDV AC,E ; 262 ; EXTEND INSTRUCTIONS EXTEND OPCODE ; 263 ; ====== ============ ====== ====== ; 264 ; EXTEND AC,[GSNGL 0,E] 21 ; 265 ; EXTEND AC,[GDBLE 0,E] 22 ; 266 ; EXTEND AC,[DGFIX 0,E] 23 ; 267 ; EXTEND AC,[GFIX 0,E] 24 ; 268 ; EXTEND AC,[DGFIXR 0,E] 25 ; 269 ; EXTEND AC,[GFIXR 0,E] 26 ; 270 ; EXTEND AC,[DGFLTR 0,E] 27 ; 271 ; EXTEND AC,[GFLTR 0,E] 30 ; 272 ; EXTEND AC,[GFSC 0,E] 31 ; 273 ;231 FIX IN PROBLEM IN EDIT 215 TO XDPB THAT PREVENTED THE KL ; 274 ; FROM HANDLING INTERRUPTS WHILE EVALUTAING AN INDEXED INDIRECT CHAIN. ; 275 ; AN "=0" WAS MISSING BY BYTEIP. ; 276 ;230 TO PRESERVE COMPATABILITY WITH THE KS10 AND BECAUSE OF SPACE ; 277 ; LIMITATIONS IN TOPS20 MODEL A, THE SPECIFICATION FOR THE ; 278 ; CVTDBX INSTRUCTIONS HAVE BEEN CHANGED TO ELIMINATE THE NEED ; 279 ; FOR AN OVERFLOW TEST DURING THE CONVERSION. THIS CHANGE ; 280 ; EFFECTIVELY REMOVES EDIT 221. ; 281 ;227 DELETE EDIT 222 AND RETURN THE CVTBDX INSTRUCTIONS TO THEIR ; 282 ; OLD, BROKEN FUNCTIONALITY SINCE ANY ATTEMPT TO PREVENT THE ; 283 ; FLAGS FROM BEING CHANGED PREMATURELY HAS TO CONTEND WITH ; 284 ; INTERRUPTABILITY PROBLEMS. THE HARDWARE REFERENCE MANUAL ; 285 ; HAS A FOOTNOTE ABOUT THE FLAG PROBLEM SO THE CURRENT FUNCTIONALITY ; 286 ; IS DOCUMENTED FOR USERS. ; 287 ;226 PREVENT AR PARITY ERRORS WHEN INCREMENTING BYTE POINTERS IN THE ACS. ; 288 ;225 THE CODE TO SUPPORT THE MX20 VIA THE SBUS DIAG LOOP MECHANISM ; 289 ; DOES NOT TIME OUT CORRECTLY BECAUSE THE LOOP COUNTER IS BEING ; 290 ; REINITIALIZED EVERY TIME THROUGH THE LOOP. FIX THIS PROBLEM ; 291 ; EVEN THOUGH THE CODE IS NOT ASSEMBLED IN CURRENT RELEASES. ; 292 ;224 FIX BUG IN EDIT 223 THAT CAUSED THE WRONG PAGE FAIL ; 293 ; WORD TO BE WRITTEN WHEN AN I/O PAGE FAIL OCCURS. ; 294 ;223 WHEN A MEMORY PARITY ERROR OCCURRS AT PI LEVEL, AS EVIDENCED ; 295 ; BY AN AR DATA PARITY ERROR, THE DTE MAY BE WAITING FOR A ; 296 ; RESPONSE. IF IT IS, A DEX FAILURE WILL OCCUR UNLESS WE CAUSE ; 297 ; DEMAND TO WIGGLE. WE CAN DO THIS BY FORCING THE DATA IN THE ; 298 ; AR OVER THE EBUS. ; 299 ;222 CVTBDX IS NOT SUPPOSED TO CHANGE THE CONTENTS OF THE ACS ; 300 ; OR MEMORY IF THE CONVERTED NUMBER WILL NOT FIT INTO THE ; 301 ; DESTINATION FIELD. IT WAS, HOWEVER, CHANGING THE FLAGS ; KL10 Microcode for TOPS-10 and TOPS-20 -- 18 Nov 1983 COPYRIGHT (C) 1984 DIGITAL EQUIPMENT CORPORATION V1(336) MICRO %34(270) Page 1-5 ; EDHIS.MIC[10,5351] 22:44 29-Nov-83 REVISION HISTORY ; 302 ; BEFORE IT KNEW IF THE NUMBER WOULD FIT. ; 303 ;221 THE CVTDBX WERE FAILING TO SET OV AND TRAP1 WHEN THE ; 304 ; CONVERTED DECIMAL NUMBER WOULD NOT FIT INTO A ; 305 ; DOUBLE WORD. ; 306 ;220 THE TRANSLATE INSTRUCTIONS WERE USING A 15 BIT WIDE ; 307 ; FIELD FOR THE REPLACEMENT BYTE IN THE TRANSLATE TABLE ; 308 ; WHILE THE SPECIFICATION STATED THAT THE TRANSLATE ; 309 ; INSTRUCTIONS WOULD USE ONLY 12 BITS. ; 310 ;217 PREVENT CRAM PARITY ERRORS CAUSED BY DISPATCHING TO LOCATION ; 311 ; 3042 WHEN INDEXING IS SPECIFIED IN THE EFFECTIVE ADDDRESS ; 312 ; CALCULATION OF E1 WHEN THE EXTEDED OPCODE IS ZERO (ILLEGAL). ; 313 ; THE FIX IS TO PUT A JUMP TO UUO AT 3042. ; 314 ;216 CHANGE THE DEFAULT VALUE FOR THE SMP SWITCH TO BE ONE. THIS ; 315 ; CAUSES THE MICROCODE TO INCLUDE SMP SUPPORT BY DEFAULT. ; 316 ;215 CHANGES DPB INSTRUCTION TO R-P-W CYCLE ON DATA FETCH PORTION OF ; 317 ; INSTRUCTION TO SOLVE AN INTERACTION PROBLEM IN AN SMP OPERATING ; 318 ; SYSTEM. THIS CHANGE ONLY APPLIES TO MICROCODES FOR TOPS-10 ; 319 ; AND TOPS-20, MODEL A. ; 320 ;214 ADDED CHANGES FOR XADR, RELEASE 4 AS FOLLOWS. ; 321 ; STORE PREVIOUS CONTEXT SECTION (PCS) IN FLAGS WORD (BITS 31-35) ; 322 ; IF EXEC MODE AND XSFM OR XPCW INSTRUCTION,MUUO OR PAGE FAIL. ; 323 ; RESTORE PCS FROM FLAGS WORDS (BITS 31-35) WHEN XJRSTF OR XJEN ; 324 ; IS EXECUTED IN EXEC MODE AND THE NEW PC IS ALSO IN EXEC MODE. ; 325 ;213 SET/FPLONG=0 PARAMETER ADDED TO TOPS-10 MICROCODE FOR KL MODEL ; 326 ; A AND MODEL B. ; 327 ;212 CHANGE THE CODE AT LDIND: TO TEST FOR USER MODE IF USER MODE ; 328 ; TURN OFF SPECIAL CYCLE THAT MAY STILL BE ON. THE MICROCODE WILL DEPEND ; 329 ; ON KERNAL PROGRAMS TO NOT GET IN PAGE POINTER ; 330 ; LOOPS. INSTRUCTIONS EXECUTED FROM THE CONSOLE WILL NOT WORK. ; 331 ; PI INSTRUCTIONS GET A RESTRICTION TO NOT GET INDIRECT PAGE POINTERS ; 332 ; IN THEIR PAGING CHAIN AS DO EXAMINES AND DEPOSITS AND BYTE TRANSFERS. ; 333 ;211 CHANGE THE TEST FOR INDIRECT POINTERS TO NOT HAPPEN ON SECTION ; 334 ; POINTERS AND JUST ON INDIRECT PAGE POINTERS. AT LDIND:+1 AND LDIMM:+2 ; 335 ;210 MAKE ALL AC+# MICROINSTRUCTIONS HAVE THE # FIELD THE SAME IN THE ; 336 ; PREVIOUS MICROINSTRUCTION TO SOLVE A TIMONG GLITCH IN THE HARDWARE. ; 337 ; MAKE EXCHANG MARK AND DESTINATION POINTERS UUO IF THEY DO NOT ; 338 ; HAVE BYTE POINTERS OF EQUAL LENGTH. CHANGES PERVASIVE IN EIS ALSO IN PF ; 339 ; RECOVERY IN IO. ; 340 ; MAKE THE LOAD OF AN INDIRECT POINTER CLEAR PI CYCLE IF SET. ; 341 ; THIS MEANS THAT THE MONITOR CANNOT USE KERNAL CYCLE, INSTR ABORT ; 342 ; INH PC+1 OR HALT IN A PI CYCLE IF AN INDIRECT POINTER CAN ; 343 ; BE A PART OF THE REFILL. ALSO NOTE THE POSSIBILITY OF GETTING AN ; 344 ; INTERUPT BEFOR THE PI INSTRUCTION COMPLETES. (NEVER CONTINUES PI ; 345 ; INSTRUCTION) CHANGES AT LDIND. ; 346 ;207 CHANGE SBUS DIAG CODE FOR MOS PUT IT IN MOS CONDITIONAL /MOS=1 ; 347 ; IF ON SBUS DIAG TRIES AT LEAST 8 TIMES TO GET A RESPONSE ; 348 ; OTHER THAN -1 IF IT GOT -1 ALL THOSE TIMES THE MICROCODE ; 349 ; GIVES UP AND RETURNS 0 ; 350 ;206 FINAL FIXES TO PUSHM AND POPM ; 351 ;205 FIX BUG IN INDEX CALCULATION OF E1 FOR EXTENDED ADDRESSING. ; 352 ; INDEXING REQUIRED THAT AN AREAD BE PERFORMED IN ORDER TO LOAD ; 353 ; THE AR WITH A CORRECT FINAL RESULT. THE EFFECTIVE ADDRESS CALCULATION ; 354 ; AROUND EXTLA: GOT A NEW MACRO ADDED FOR INDEXING THAT DOES THE AREAD. ; 355 ; ABSOLUTE LOCATIONS IN THE RANGE 3040 GET USED AS TARGETS FOR THIS ; 356 ; AREAD THEN THE CODE REJOINS THE OLD CODE AT EXT2: ; 357 ; THE AREAD WAS NECESSARY FOR THE HARDWARE MAGIC TO LOAD PARTS OF THE ; KL10 Microcode for TOPS-10 and TOPS-20 -- 18 Nov 1983 COPYRIGHT (C) 1984 DIGITAL EQUIPMENT CORPORATION V1(336) MICRO %34(270) Page 1-6 ; EDHIS.MIC[10,5351] 22:44 29-Nov-83 REVISION HISTORY ; 358 ; AR DEPENDING ON THE INDEX REGISTER AND OTHER EXTENDED ADRESSING ; 359 ; PARAMETERS. ; 360 ;204 ADD AUTOMATIC VERSION NUMBER ; 361 ; ADD CODE TO DO SBUS DIAG TESTING REQUIRED BY MOS ; 362 ;203 PUT THE BLKO PAG, CHANGE IN 201 IN A KLPAGING CONDITIONAL ; 363 ; KIPAGING GETS TANGLED IN AR PARITY ERRORS AND IN GENERAL DOES ; 364 ; THE WRONG THINGS ; 365 ;202 TURN OFF IMULI OPTIMIZATION IT GETS THE SIGN BIT AND THE OVERFLOW ; 366 ; FOULED UP (TURNED OFF FOR MODEL B ONLY WAS OFF IN MODEL A) ; 367 ;201 CHANGE BLKO PAG, TO INVALIDATE ONLY ONE ENTRY BY CLEARING IT ; 368 ; CHANGES AT PAGBO PAGBO+1 AND CLRPT+3 CLRPT+3 GETS SETUP THAT USED ; 369 ; TO BE AT PAGBO+1, PAGBO+1 NOW CLEARS ENTRY AND QUITS ; 370 ; KLPAGE ERROR CHECK FOR TOPS 10 MODEL A TO CAUSE ERROR ; 371 ; IF SWITCH SETTINGS ARE IN CONFLICT DIDDLED ; 372 ;200 CHANGE ALL EXEC REF TRACKS FEATURES BACK TO PHYS REF ; 373 ; ON SUSPICION THAT PAGE FAULTS ARE NOT HANDLED PROPERLY ; 374 ; MAKE NON TRACKS INSTR STAT FEATURES GET FOUR PHYSICAL ; 375 ; PAGE NUMBERS FROM FIRST FOUR LOCATIONS IN THE PAGE PRESENTED ; 376 ; IN THE DATAO PI, THE CODE ALSO USES THAT PAGE FIRST ; 377 ; LOCATION TO PUT THE INITIAL JUNK INTO ON STARTUP ; 378 ;177 FIX SOME BUGS IN OPCODE TIMING CODE AT OPTM0: AND BEYOND ; 379 ;176 ADD TO THE TIME COUNTING CODE CODE THAT COUNTS FREQUENCY ; 380 ; OF EACH OPCODE IN PAGE+2 AND PAGE+3 ; 381 ;175 FIX TIME COUNTING CODE TO ACOUNT FOR EACH OPCODE IN THE ; 382 ; USER OR EXEC MODE IT WAS SEEN IN, EDGE COUNTS WERE DONE IN ; 383 ; WRONG MODE CHANGES UNDER OP.TIME CONDITONALS (PERVASIVE) ; 384 ;174 CHANGE TRACKS AND TIME COUNTING TO USE EXEC VIRTUAL SPACE ; 385 ; INSTEAD OF PHYSICAL SPACE ; 386 ;173 SEPERATE OUT THE DISMISS AT 626: BECAUSE OF SUSPECTED BUG ; 387 ;172 THE FACT THAT XJEN DISMISSES BEFORE READING NEW PC WORDS CAUSES ; 388 ; A PROBLEM FOR TOPS 20. REHASH THE CODE AT 600: TO 637: TO MAKE ; 389 ; XJEN READ THE TWO WORDS FIRST AND THEN DISMISS. ; 390 ;171 CAUSE IO PAGE FAIL FIX IN 170 TO SHIFT AT END GETTING CORRECT ; 391 ; PAGE FAIL WORD CHANGE AT IOPGF: ; 392 ;170 MAKE CLRFPD: GO DIRECT TO FINI: INSTEAD OF THROUGH NOP: THIS WAS ; 393 ; COSTING 2 TICS IN BYTE INSTRUCTIONS ; 394 ; CHANGE IO PAGE FAIL TO SAVE A VIRTUAL ADDRESS IN THE AC BLOCK 7 ; 395 ; LOCATION 2 INSTEAD OF THE DATA THAT WAS ON THE EBUS CHANGES AT ; 396 ; PGF4:+1 AND IOPGF: ; 397 ;167 CHANGE DEFAULT ON ADB MIXER SELECTS. NO DEFAULT NOW SUBFIELD U23 ; 398 ; IS DEFAULTED TO 1 TO AVOID SELECTING FM AND NEEDING TO WAIT FOR PARITY. ; 399 ; THIS LEAVES THE OTHER BIT OF THE FIELD AVAILABLE FOR PARITY ; 400 ; EPT MOVED TO 540 USING SWITCH IN KLX,KLL (KLA,KLB NOW DEFUNCT) ; 401 ;166 CHANGE FIELD DEFINITION FORMAT CHANGE THE WAY THE OPTIONS FIELD ; 402 ; GETS ITS VALUES ASSIGNED. EACH BIT GETS A FIELD DEFINITION. ; 403 ;165 BUG IN 161 TO 164 WAS MISSING AC0 AT POP2: PARITY BIT WAS PUT THERE ; 404 ; IN THE NEWER MICROCODES ; 405 ; INSTALL MANY THINGS TO MAKE WORD STRING MOVES WORK START AT ; 406 ; MOVWD1 AND UNTILL BMVWD1 ALSO ASSORTED MACROS ARE ADDED ; 407 ; THESE ARE INSTALLED IN A SEPERATED EIS FILE (WDEIS) FOR THE MOST PART ; 408 ; THERE ARE SOME NEW MACROS AND THE CLEAN+17 LOCATION IS USED FOR ; 409 ; THIS CASE UNDER MODEL B CONDITIONAL INTERRUPTS DO NOT WORK YET ; 410 ; IN THIS CODE BUT ALL DATA TRANSFERS ARE CORRECT. INTERRUPTS ARE ; 411 ; TAKEN SO SUSPECT THE PROBLEM IS IN THE CLEANUP CODE. ; 412 ;164 LEAVE IN ONLY MAP FIX ; 413 ;163 TAKE OUT MAP FIX LEAVING XHLLI IN AND JRSTF IN ; KL10 Microcode for TOPS-10 and TOPS-20 -- 18 Nov 1983 COPYRIGHT (C) 1984 DIGITAL EQUIPMENT CORPORATION V1(336) MICRO %34(270) Page 1-7 ; EDHIS.MIC[10,5351] 22:44 29-Nov-83 REVISION HISTORY ; 414 ;162 PUT XHLLI BACK IN TAKE OUT JRSTF ONLY IN SEC 0 CODE ; 415 ;161 XHLLI OUT TO DEBUG ADD RSTF0: TO MAKE TEST FOR JRSTF IN NON ; 416 ; 0 SECTIONS TEST IN ALL CASES ; 417 ;157 INSTALL XHLLI MAKE JRSTF UUO ON NON ZERO SECTIONS ; 418 ; ALSO MAKE MAP DOING A REFILL PAGE FAIL RIGHT THIS MEANS THAT AFTER ; 419 ; CLEAN IT CANNOT DO ANYTHING INTERESTING IF AN INTERRUPT IS PENDING ; 420 ; CHANGES AT MAP2: ; 421 ;156 REINSERT A SKP INTRPT IN THE PAGE FAULT HANDLER TO HAVE INDIRECT ; 422 ; POINTER CHAINS INTERRUPTABLE. AT PGRF6:+6 ; 423 ;155 ABORTIVE MAP FIX FIX REMOVED PROBLEM MUST BE FIXED IN HARDWARE. ; 424 ;154 ADD TESTS FOR AC'S IN PHYSICAL REFERENCES FOR EXAMINES AND DEPOSITS ; 425 ; PHYS REFS GO TO MEMORY, NOT AC'S AFTER PROBLEM SHEET 1675 ; 426 ; CHANGES AT PILD+3 PIFET+2 PSTOR PHYS1 PHYS2 PHYS3 ; 427 ; ADD CHANGES IN TRACKS TO MAKE MODEL A WORK AT TRK2+2 AND +3 ; 428 ;153 ADD SPECIAL CODE FOR PXCT OF BLT THIS HOPEFULLY CAN GO AWAY ; 429 ; WHEN THE EXTENDED ADDRESSING MONITOR DOES NOT USE PXCT ANYMORE ; 430 ; IT IS UNDER .IF/BLT.PXCT CONDITIONAL AND COSTS 12 WORDS ; 431 ;152 CHANGE WHAT BLT DOES TO MATCH THE SPEC SR_BLT(XXX) IS CHANGED TO ; 432 ; NOT FORCE GLOBAL ADDRESSING THE LOAD VMA(EA)_ARX+BR AND ; 433 ; STORE VMA(EA)_ARX MACROS ARE ADDED TO FORCE THE GLOBAL/LOCAL PARAMETERS ; 434 ; TO BE THE SAME AS THOSE OF THE EFFECTIVE ADDRESS ; 435 ;151 PUT THE EPT AND UPT AT 540 UNDER SWITCH CONTROL .IF/EPT540 ; 436 ;150 VERSION NUMBER BACKED UP TO PRESERVE SPACE IN VERSION NUMBER FIELD ; 437 ;304 EXTEND 0 WOULD GET A JUMP TO AN UNUSED MICROLOCATION IN MODEL.B ; 438 ; ONLY THIS WAS BECAUSE LOCATION 2002: IN MODEL.A SHOULD BE AT 3002: ; 439 ; IN MODEL.B 3002: AND 3003: PUT IN WHERE 2002: AND 2003: ARE UNDER ; 440 ; CONDITIONALS. ; 441 ;303 CHANGE THE NUMBER FIELD OF THE SR_BLT(XXX) MACROS TO GIVE THE ; 442 ; BIT 0 OFF ALL THE TIME. THIS GIVES BLT MORE THE FORM OF THE OTHER ; 443 ; EXTENDED ADDRESSING STUFF IN HOW IT REFERS TO THE SHADOW AC'S. ; 444 ; IT IS STILL BELIEVED TO BE BROKEN BUT IS BETTER THAN IT WAS. ; 445 ;302 ADD LONGER ADDRESS CONSTRAINTS FOR THE NEW MICROASSEMBLER. EVERY ; 446 ; LOCATION THAT THE DISPATCH RAM CAN JUMP TO IS EFFECTED. THE ; 447 ; CONSTRAINTS THATUSED TO LOOK LIKE =00**** MUST NOW LOOK LIKE ; 448 ; =0****00**** THIS IS BECAUSE THE MODEL B MACHINE CAN AND DID ; 449 ; REALLY SET THAT BIT. THE CHANGE MAKES THE MICROCODE INCOMPATIBLE ; 450 ; WITH THE OLD ASSEMBLER. ; 451 ;301 HALT IS CLEARING THE RUN FLOP WITH HARDWARE MUST CHECK FOR ; 452 ; KERNAL MODE BEFOR THE HALT MACRO SO USER IOT MODE WILL ; 453 ; NOT BE ABLE TO HALT. THIS TAKES ONE MICROWORD AT 1017: ; 454 ; THE SENSE OF THE SKIP IS REVERSED AGAIN SO 1016: IS BACK TO ; 455 ; BEING THE UUO AND CHALT: IS NOW A SEPERATE WORD AFTER 1017:. ; 456 ;300 REPLACE HALT CODE AGAIN BUT THIS TIME GET THE SENSE OF THE ; 457 ; SKIP RIGHT BY SWAPPING THE CONTENTS OF LOCATIONS 1016: AND 1017: ; 458 ; PUT THE 1: ADDRESS CONSTRAINT ON CONT:. ; 459 ;277 PUT HALT BACK THE WAY IT WAS SKP USER HAS THE INVERSE SKIP SENSE ; 460 ; AND HENCE DOES THE WRONG THING. HALT TO BE FIXED LATER. ; 461 ;276 YET ANOTHER TRY AT THE BLKO PROBLEM BLK1: SHOULD HAVE HAD A ; 462 ; J/BLK2. ; 463 ;275 THE LONG PC CHANGES HAD XSFM1: BEFOR THE ADDRESS CONSTRAINT THUS ; 464 ; GIVEING THE WRONG ADDRESS. THE =0 IS PUT BEFOR THE LABEL. ; 465 ;274 FIX THE DIAG.INST CONDITIONALS TO BEHAVE PROPERLY WITH THE ; 466 ; CONSTRAINTS OF DRAM LOCATIONS MAP DIED BECAUSE IT NEVER WAS ; 467 ; REACHED OUT OF A DISPATCH. ; 468 ;273 INSERT THE DIAG.INST FEATURE FOR THE DIAGNOSTICS PEOPLE. ; 469 ; CHANGES AT DCODE 104:, 106: AND AT XCT: SHOULD NOT EFFECT OTHER ; KL10 Microcode for TOPS-10 and TOPS-20 -- 18 Nov 1983 COPYRIGHT (C) 1984 DIGITAL EQUIPMENT CORPORATION V1(336) MICRO %34(270) Page 1-8 ; EDHIS.MIC[10,5351] 22:44 29-Nov-83 REVISION HISTORY ; 470 ; ASSEMBLIES. ; 471 ;272 THE FIX TO THE GARBAGE IN THE LEFT HALF OF VMA IN 265 FORGOT TO ; 472 ; LOAD THE VMA IN BLK3:+1 PUT THAT IN. ALSO ON JUD'S RECOMENDATION ; 473 ; PUT A COPY OF THE NOP MICROINSTRUCTION AFTER CLRFPD: TO MAKE ; 474 ; ENOUGH TIME IN THE SKIP CASE. IT SEEMED TO WORK WITHOUT THIS ; 475 ; AND IF SPACE GETS TIGHT IT SOULD BE REMOVED. ; 476 ;271 FIX IN 267 PGF4:+4 DOES NOT WORK, CANNOT PUT VMA_# THERE. POSSIBLY BECAUSE ; 477 ; VMA_# CONFLICTS IN SOME ESOTERIC WAY WITH STORE? THAT CHANGE ; 478 ; IS TAKEN OUT AND AT PGF1 THE VMA IS GIVEN 500 OR 501. THIS IS SLIGHTLY ; 479 ; LESS DESIREABLE AND FURTHER EFFORT COULD BE SPENT IN THE UCODE TO ; 480 ; MAKE PAGE FAILS LESS UNWEILDY FOR THE SOFTWARE ROUTINE THAT CONVERTS ; 481 ; THEM TO MODEL B FORM. ; 482 ;270 CHANGE HALT TO CHECK FOR USER MODE INSTEAD OF IO LEGAL. A JOB ; 483 ; IN USER IOT SHOULD NOT BE ABLE TO HALT THE MACHINE. ; 484 ;267 ADD NEW CONDITIONAL SHIFT.MUUO TO PROVIDE THE SHIFTED DOWN MUUO ; 485 ; DATA BLOCKS MORE SIMILAR TO THE XADDR TYPES. CONDITIONAL IS USED ; 486 ; AT 1003: AND PGF4:+4 TO PROVIDE A DIFFERENT STARTING ADDRESS. ; 487 ;266 FIX PILD+3 TO LOAD THE VMA AT THE SAME TIME THUS ENABLING ; 488 ; THE MODEL HACK FIX TO LOAD THE LONG VMA. ; 489 ;265 HAIR UP THE ALREADY HAIRY BLKXX CODE TO CLOBBER THE LEFT HALF OF AR ; 490 ; BEFOR USING IT AS AN ADDRESS. CLOBBERED ARL AT BLK2 AND LOADED ; 491 ; VMA AT BLK3. ; 492 ;264 ADD J/CLRFPD AT BFIN TO MAKE IT THE SAME AS IT WAS. BFIN GOT ; 493 ; MOVED TO A DIFFERENT PLACE IN THE LAST EDIT AND THIS J FIELD ; 494 ; WAS NOT FIXED. ; 495 ;263 ADD THE MIT FIXES. IOTEND AND THE BLK1 TO BLK4 GROUP ARE CHANGED ; 496 ; EXTENSIVELY. CLRFPD IS PUT JUST BEFORE FINI CONSTRAINT ON IOFET ; 497 ; IS CHANGED. ; 498 ; ADD THE LONG PC FORMAT UNDER A NEW CONDITIONAL LONG.PC THE ; 499 ; CONDITIONAL IS TURNED ON BY XADDR. CONDITIONALS ARE ADDED TO THE ; 500 ; LONG PC CODE TO MAKE IT SMALLER WHEN ONLY SECTION 0 IS POSSIBLE. ; 501 ; ADD COMMENTS TO THE MICROCODE OPTIONS FIELD. ; 502 ; RESTORE SXCT CODE FROM VERSION 131. TO BE USED ONLY IN MODEL A ; 503 ; NON KLPAGING CODE. ; 504 ;262 PUT WORD AT INDR1+1 UNDER SXCT CONDITIONAL SO WHEN SXCT IS OFF WE ; 505 ; GET AN ADDITIONAL SAVINGS OF ONE WORD. ; 506 ;261 ADD PHYS REFS AT PGRF6+4 AND PIDISP+4 TO MAKE MODEL.A LOAD A LONG ; 507 ; VMA. PART OF THIS CODE IS NOT UNDER CONDITIONAL BECAUSE IT SHOULD NOT MATTER ; 508 ; TO A MODEL.B MACHINE. PIDISP+4 ALSO GETS THE LOAD OF THE SAME DATA ; 509 ; REPEATED SO THE PHYS REF HAS SOMETHING TO WORK ON. ; 510 ; FLUSH THE NOW USELESS CODE AT CHALT TO GENERATE THE LD AR.PHYS ; 511 ; CONSTANTS. ; 512 ; CURRENTLY THERE IS SORT OF A BUG IN THAT THE SBR AND THE CBR ; 513 ; CAN NOT BE ABOVE 256K IN A MODEL.A MACHINE. THIS DOES NOT BOTHER ; 514 ; THE CURRENT MONITORS AT ALL IN THAT THESE TABLES ARE IN VERY LOW CORE. ; 515 ; IF THAT CHANGES THE LOCATIONS SECIMM+3 SECIMM+7, LDIND, PGRF5, LDSHR ; 516 ; AND LDPT1+1 MUST ALL GET FIXED UP. THE GENERAL FIX IS TO GET A PHYS REF ; 517 ; IN THE MICROINSTRUCTION THAT LOADS THE VMA. THIS CAN BE DONE BY ; 518 ; POSTPONING THE LOAD OF THE VMA ONE MICROINSTRUCTION IN ALL OF THESE ; 519 ; PLACES, BUT, SINCE THAT CAUSES A PERFORMANCE DEGRADATION IT WAS NOT ; 520 ; DONE. ; 521 ;260 DIVERGANT CHANGES TO MAKE KLPAGING PHYS REFS THE OLD WAY ; 522 ; CAUSE ALL CASES OF VMA_XXX+LD AR.PHYS TO GO BACK TO THE ; 523 ; OLD PHYS REF WAY ; 524 ;257 IN MODEL B MACHINES AT LDPT+1 THE VMA IS GETTING GARBAGE IN THE ; 525 ; LEFT HALF BECAUSE IT ADDED IN JUNK THAT WAS IN AR LEFT. FIX IS TO ; KL10 Microcode for TOPS-10 and TOPS-20 -- 18 Nov 1983 COPYRIGHT (C) 1984 DIGITAL EQUIPMENT CORPORATION V1(336) MICRO %34(270) Page 1-9 ; EDHIS.MIC[10,5351] 22:44 29-Nov-83 REVISION HISTORY ; 526 ; CLEAR ARL AFTER LDPT AND TO DO THE SHUFFLE PERFORMED THERE ONE ; 527 ; MICROINSTRUCTION LATER. ; 528 ;****** A HACK FIX IS USED HERE THAT TAKES TWO WORDS. THIS WAS DONE BECAUSE ; 529 ; OF EXTREEM TIME PRESSURE TO DEBUG >256K MODEL B. THERE OUGHT TO BE ; 530 ; A WAY TO REDUCE THIS FIX TO ONLY ONE WORD IN SPACE AND TIME, OR ; 531 ; EVEN LESS. ; 532 ;256 EDIT JUMPED TO RANDOMNESS WITH AN EXTRA RETURN. THIS HAPPENED ; 533 ; BECAUSE THERE WAS NO CALL AT EDSFLT IN THE MODEL B NON XADDR CODE ; 534 ; ADDED CALL TO EDSFLT. ; 535 ;255 SAVE EDIT FROM GETTING AN EXTRA STORE CYCLE AT EDSSIG BY SENDING ; 536 ; IT ALWAYS TO THE EDFLT1 LOCATION INSTEAD OF EDFLT THIS ONLY ; 537 ; CHANGES WHAT HAPPENS IN MODEL B NON XADDR BECAUSE IN MODEL A ; 538 ; EDFLT AND EDFLT1 ARE THE SAME LOCATION ANYWAY ; 539 ;254 CAUSE THE A INDRCT CHANGE IN 253 TO BE ONLY FOR NON EXTENDED ; 540 ; ADDRESSING MACHINES. THIS THROWS DOUBT ON THE WORD SAVINGS ; 541 ; THAT MIGHT HAVE BEEN POSSIBLE ; 542 ;253 CHANGE A INDRCT TO LOAD BOTH THE AR AND ARX, IN THE EXTENDED ; 543 ; INSTRUCTION SET THIS HAPPENED TO BE DEPENDED ON AT EXT2+2 AND ; 544 ; EXT2+3. THE DEFINITION OF A IND IN EA CALC/ WAS FIXED TO ; 545 ; LOAD THE AR AND THE ARX ; 546 ; I THINK THIS PERMITS THE SAVINGS OF AN EXTRA WORD AND SOME ; 547 ; TIME ON ALL INDIRECTS. CHECK OUT FLUSHING INDR1 AND MAKING INDRCT ; 548 ; DO THE DISPATCH AND GO TO COMPEA ; 549 ; FORCE ADB TO GENERATE AR*4 AS DEFAULT THIS DISABLES PARITY ; 550 ; CHECKING ON THE FM WHEN IT IS NOT BEING READ FIXED IN ; 551 ; DEFINITION OF ADB THIS WILL ALSO SPEED UP THE MACHINE BY SOME ; 552 ; BECAUSE THE ADB FIELD CAN NO LONGER FORCE 3 TICS WITHOUT REALLY ; 553 ; NEEDING THAT LONG ; 554 ;252 SAVE A WORD AT IOPGF+1 BY MAKING IT PILD+3 THIS ADDS THE SET ; 555 ; ACCOUNT ENABLE TO AN UNDEFINED CASE. ; 556 ;251 TURNING ON PAGING CAUSED A HANG THIS WAS BECAUSE OF A MISIMPLIMENTED ; 557 ; FIX IN 250. THE ATTEMPT TO PUT THAT FIX IN NO SPACE FAILED AND IT TOOK ; 558 ; ONE WORD. AT LDPT+1 ADD BR/AR AT GTCST1 RECOVER THE AR FROM THE BR ; 559 ; THIS SEEMS LIKE IT SHOULD BE ABLE TO BE BUMMED BUT I CANNOT ; 560 ; FIGURE OUT HOW ; 561 ; ALSO FIX A PLACE WHERE A PHYS REF WAS LEFT IN THE MODEL A CODE ; 562 ; AT PGRF6+4 MODEL B CONDITIONAL IS AS IT WAS MODEL A IS NEW TO USE ; 563 ; LD AR.PHYS MECHANISM ; 564 ;250 LOADING HIGH ORDER GARBAGE TO THE VMA WITH THE FIX FOR ; 565 ; >256K CAUSES FUNNY THINGS TO HAPPEN. BITS GET CLOBBERED ; 566 ; WITH AR0-8_SCAD 14 LINES AFTER SECIMM. ACTUALLY IS MORE ; 567 ; HAIR BECAUSE OF CONFLICTING FIELDS. CODE ABOVE AND BELOW ; 568 ; THAT GOT REARRANGED TO SIMPLER MODEL A AND MODEL B CONDITIONALS ; 569 ; SINCE NOW ALL LINES ARE DIFFERENT. SHUFFLING OF FE IS DONE ; 570 ; TO PROVIDE ROOM FOR A CONSTANT ON THE CORRECT SIDE OF THE SCAD ; 571 ; AT LDPT A SIMILAR ; 572 ; RECODING IS NEEDED. 4 LINES OF CODE ARE REDONE IN MODEL ; 573 ; A CONDITIONAL AND CONDITIONALS ARE RESHUFFLED TO HAVE ; 574 ; SIMPLER FORMAT ; 575 ; NEW MACROS ARE ADDED GEN AR0-8, GEN FE AND AR0-8 ; 576 ; VMA_AR+LD AR.PHYS AND ITS FRIENDS ARE TAKEN OUT OF KLPAGING ; 577 ; CONDITIONAL THEY ARE USED TO DO EXAMINES AND DEPOSITS NOW ; 578 ;247 FIX ST AR.PHYS TO GIVE BIT 4 INSTEAD OF BIT 5 AT CHALT ; 579 ; AT PSTORE CHECK FOR AC REF AND IF SO WRITE FM MUST DO THIS ; 580 ; BECAUSE LOAD AD FUNC DOES NOT SET MCL STORE AR ; 581 ;246 FIX MUUO, IN EXTENDED ADDRESSING, TO GET NEW PC BEFORE CLOBBERING ; KL10 Microcode for TOPS-10 and TOPS-20 -- 18 Nov 1983 COPYRIGHT (C) 1984 DIGITAL EQUIPMENT CORPORATION V1(336) MICRO %34(270) Page 1-10 ; EDHIS.MIC[10,5351] 22:44 29-Nov-83 REVISION HISTORY ; 582 ; THE USER AND PUBLIC FLAGS THAT TELL WHERE TO GET IT. FIX CONDITIONAL ; 583 ; ASSEMBLY AT INDRCT TO DO EA TYPE DISP IN MODEL A, NOT MODEL B. ; 584 ;245 ADDITIONAL FIXES FOR THE 256K PROBLEM, TO MAKE EXAMINE AND ; 585 ; DEPOSIT WORK. CHANGES AT CHALT TO CREATE CONSTANT "ST AR.PHYS", ; 586 ; AND EXTENSIVELY NEAR PICYC1, PIDATI, AND PIDATO. CHANGES ARE ALL ; 587 ; UNDER MODEL B CONDITIONAL, BECAUSE MODEL B HARDWARE WORKS OK, AND ; 588 ; THE FIX IS REGARDED AS CROCKISH. ; 589 ;244 WAIT FOR COMPLETION OF INDIRECT REFERENCE AT BYTEI+1 AND EXTI+1 ; 590 ; EVEN THOUGH INTERRUPT REQUEST HAS BEEN SEEN, SO AS NOT TO CONFUSE MBOX. ; 591 ;243 VARIOUS FIXES TO MAKE THESE SOURCES WITH MODEL.B SWITCH OFF ; 592 ; EQUIVALENT TO MODEL A SOURCES, SO WE CAN DISCARD MODEL A SOURCES ; 593 ; THE FIXES ARE: ; 594 ; 1) SWITCH SNORM.OPT, TO SAVE SPACE IN SINGLE PRECISION ; 595 ; FLOATING NORMALIZATION. ; 596 ; 2) CREATION OF LD AR.PHYS MAGIC CONSTANT, TO SOLVE HARDWARE ; 597 ; PROBLEMS GENERATING ADDRESSES ABOVE 256K. ; 598 ;242 FIX AT SECPTR+1 TO PRESERVE AR LEFT UNTIL WE CAN CHECK ; 599 ; FOR BITS 12-17 NON ZERO CORRECT ADDRESS CONSTRAINTS AT ; 600 ; SECIMM+1 & +2 TO GET BRANCHING RIGHT FOR SHARED AND INDIRECT ; 601 ; SECTION POINTERS. FIX AT LDIMM+1 TO CLEAR LH OF AR BEFORE ; 602 ; LOADING VMA WITH SPT ADDRESS, TO PREVENT PAGE FAULT ON SPT ; 603 ; REFERENCE. ; 604 ;241 MORE FIXES AT START: AND NEWPC:, FOR SAME PROBLEM AS 240. ; 605 ; MUST LOAD FLAGS AND CLEAR VMAX, THEN LOAD VMA INTO PC TO CLEAR ; 606 ; PCX, THEN RELOAD VMA TO GET EFFECT OF NEW FLAGS AND CLEARED ; 607 ; PCX. (MODEL A ONLY). ; 608 ;240 FIXES AT START: AND NEWPC: TO LOAD 23-BIT ADDRESS RATHER ; 609 ; THAN 30-BIT, SINCE OTHER BITS ARE PC FLAGS. AT SAME TIME AND ; 610 ; PLACE, FIX MODEL A CODE TO CLEAR PC SECTION NUMBER. ; 611 ;237 CHANGE CONDITIONALS AROUND PUSH AND POP CODE FROM XADDR TO ; 612 ; MODEL.B. COULD SIMPLIFY IFNOT XADDR. ; 613 ;236 FIX ADDRESS CONSTRAINTS ON USES OF EA MOD DISP IN MODEL ; 614 ; B MACHINE WITH EXTENDED ADDRESSING OFF. PROBLEMS AT COMPEA, ; 615 ; BFETCH, AND EXT2. ; 616 ;235 SLIGHTLY CLEANER FIXES FOR PROBLEMS IN 234 TO AVOID WASTING TIME ; 617 ; AND SPACE. BYTE READ MACRO NEEDS TO SET VMA/LOAD, AND VMA_VMA ; 618 ; HELD MACRO DOESN'T USE MEM FIELD UNLESS MODEL B AND KL PAGING. ; 619 ; ALSO FIX CONDITIONAL ASSEMBLY STUFF TO AVOID SPURIOUS ERRORS. ; 620 ;234 INSTALL FIXES FOR SOME PLACES WHERE MODEL B CODE CAUSES CONFLICT ; 621 ; WITH THE OLD NON KLPAGING NON EXTENDED ADDRESSING CODE ; 622 ; THESE ARE AT BFETCH, PGF3-1, PGF6, EXT1+2 ; 623 ;233 FIX THE FOLLOWING PROBLEMS: ; 624 ; KL PAGING SHOULD PRODUCE A PAGE FAILURE WHEN BITS ; 625 ; 12-17 OF A PRIVATE SECTION POINTER ARE NON 0 ; 626 ; FIXED AT SECPTR ETC. ; 627 ; EDIT DOES NOT ALLOW INTERUPTS ; 628 ; FIXED AT EDNXT1 AND AFTER THAT ; 629 ; MAP SHOULD NOT BE LEGAL IN USER MODE ; 630 ; FIXED AT MAP2 AND CLEAN+15 ; 631 ; MOVMI IS SHORTENED BY MAKING IT THE SAME AS MOVEI ; 632 ; AT DON LEWINES SUGGESTION THIS IS IN DCODE 215 ; 633 ;232 MERGE THE SECOND ORDER STATISTICS GATHERING CODE WITH THIS ; 634 ; CODE INTENT IS TO KEEP IT HERE ; 635 ;231 CHANGE THE LOAD CCA DEFINITION TO REFLECT THE NEW HARDWARE ; 636 ; THIS IS ENABLED WHEN THE MODEL.B ASSEMBLY SWITCH IS ON ; 637 ;230 THIS IS THE POINT WHERE MICHAEL NEWMAN TAKES OVER THE MICROCODE ; KL10 Microcode for TOPS-10 and TOPS-20 -- 18 Nov 1983 COPYRIGHT (C) 1984 DIGITAL EQUIPMENT CORPORATION V1(336) MICRO %34(270) Page 1-11 ; EDHIS.MIC[10,5351] 22:44 29-Nov-83 REVISION HISTORY ; 638 ; MAINTENCE SEVERAL BUG FIXES GET EDITED INTO 126 AT THIS POINT ; 639 ; TWO SETS OF PARALLEL CODE WILL BE MAINTAINED FOR A WHILE. ; 640 ; FIX THE CMPS PARODY ERROR PROBLEM WHEN ILLEGAL BITS ARE FOUND IN ; 641 ; THE LENGTHS. ; 642 ;227 FIX PIBYTE TO GET DTE# CORRECT ON TO-10 TRANSFERS. FIX MTRREQ ; 643 ; CYCLES TO WAIT FOR STORE TO FINISH BEFORE RE-ENABLING ACCOUNT. ; 644 ; FIX ADJSP OF LONG STACK POINTERS TO FETCH NEXT INSTR. ; 645 ;226 FIX EXMD TO LOAD AR, RATHER THAN ARX, WITH MARK POINTER, AS ; 646 ; EXPECTED BY THE HANDLER. FIX EDIT, SEVERAL PLACES, TO IGNORE ; 647 ; LEFT HALF OF MARK & PATTERN ADDRESSES WHEN PC SECTION IS ZERO. ; 648 ; FIX EDIT TO MAKE EXTENDED REFERENCE FOR PATTERN BYTES. ; 649 ; FIX ADJSP TO BE MEANINGFUL WITH LONG STACK POINTERS ; 650 ;225 FIX BYTEA NOT TO CLOBBER FE ON INDIRECTS, FIX EXMD TO BACK ; 651 ; UP VMA AFTER STORING DSTP2 AND BEFORE STORING DSTP. FIX EDIT TO ; 652 ; COUNT THE WHOLE PATTERN ADDRESS IF PC SECTION NOT ZERO. ; 653 ;224 FIX EXTEND ADDRESS CALCULATION TO RECOVER E0 FROM MQ, AND ; 654 ; FIX EXTEND OPCODE TEST TO DISALLOW OPS >20. ; 655 ; FIXES TO HANDLE NEW ENCODING OF AC-OP ON APR BOARD. ; 656 ;223 COMPLETE 222. P HAS TO GO TO SC AS WELL AS AR0-5. CREATE ; 657 ; SUBROUTINE RESETP TO DO IT. GET CODE IN SYNC WITH HARDWARE AND ; 658 ; MOST RECENT SPEC FOR MEANING OF PXCT AC BITS IN EXTEND. THUS ; 659 ; UNDO COMMENT IN 221: WE SHOULD LOOK AT PXCT B11. ALSO FIX ; 660 ; EXTEND TO USE CORRECT ENCODING OF BITS 9, 11, AND 12 FOR PXCT ; 661 ; OF STRING OPERATIONS. FIX DATAI PAG SO IT DOESN'T LOSE THE ; 662 ; PREVIOUS CONTEXT AC BLOCK WHEN LOADING PREVIOUS SECTION #. ; 663 ; INSERT CHANGE CLAIMED FOR EDIT 55, TO INHIBIT INTERRUPT DURING ; 664 ; PI CYCLES. ; 665 ;222 FIX BYTE POINTER UPDATE ROUTINES GSRC & IDST IN EIS CODE ; 666 ; TO UPDATE P WHEN INCREMENTING SECOND WORD. JUST FORGOT TO. TRY ; 667 ; AGAIN TO CONTROL EIS REFERENCES OFF E0, FOR EXTENDED OR NOT. ; 668 ;221 COMPLETE FIX OF 220, TO KEEP SR CORRECT THROUGH RELOAD OF IR ; 669 ; IN EXTEND DECODING, AND TO CONTROL SR CORRECTLY FOR XBLT DST ; 670 ; REFERENCES. (WE WERE LOOKING AT PXCT B11, SHOULD BE B12). ; 671 ;220 FIXES SEVERAL PLACES TO USE "EA" IN DRAM A FIELD INSTEAD OF "I", ; 672 ; NOTABLY BLT, WHICH WAS USING WRONG SECTION. FIX EXTEND TO ; 673 ; CONTROL VMA EXTENDED BEFORE FETCHING EXTEND-OP, SO AS NOT TO ; 674 ; LOOK "UNDER" THE AC'S. FIX XBLT FOREWARD TO STOP WHEN AC GOES ; 675 ; TO ZERO, NOT -1. ALSO CONTROL SR BEFORE INITIAL STORE TO GET ; 676 ; CORRECT CONTEXT. ; 677 ;217 CODE CHANGES TO MAKE SECOND WORD OF BYTE POINTER WORK RIGHT ; 678 ; WHETHER EFIW OR IFIW, BY CONTROLLING CRY18 OR CRY6. ; 679 ;216 RECODE EXTENDED INSTRUCTION SET DECODING & EFFECTIVE ADDRESS ; 680 ; CALCULATION. FIX UUO CODE TO INCREMENT VMA AFTER STORING PC. ; 681 ; FIX ADJBP TO GET 36 BIT ADDRESS ADJUSTMENT IF B12 SET. ; 682 ;215 REARRANGE CONDITIONAL ASSEMBLY DEFAULTS TO BE MORE LOGICAL ; 683 ; INSERT FORM FEEDS AND COMMENTS TO HELP BEAUTIFY THE LISTING. ; 684 ; REWORK THE NEW JRST'S, TO MAKE THEM SMALLER, FASTER, AND TEST ; 685 ; IO LEGAL BEFORE DISMISSING. PUT IN XBLT. ; 686 ;214 MODIFY ADJBP AND UUO'S FOR EXTENDED ADDRESSING. REWORK PARITY ; 687 ; ERROR HANDLING, IN A FRUITLESS ATTEMPT TO MAKE IT SMALLER, ; 688 ; BUT SUCCESSFULLY MAKING IT CLEARER. FIX ASSEMBLY ERRORS IN EIS ; 689 ; DUE TO AC4 CHANGES, AND ADD CODE TO HANDLE LONG BYTE POINTERS ; 690 ; IN AC'S. PUT IN CODE TO GIVE PAGE FAIL 24 ON ILLEGAL FORMAT ; 691 ; INDIRECT WORD. ; 692 ;213 FIX LDB & DPB TO TEST POINTER BIT 12 ON CALL TO BYTEA. ; 693 ;212 MODIFY JSP, JSR TO STORE FULL PC WITHOUT FLAGS IN NON-ZERO SEC ; KL10 Microcode for TOPS-10 and TOPS-20 -- 18 Nov 1983 COPYRIGHT (C) 1984 DIGITAL EQUIPMENT CORPORATION V1(336) MICRO %34(270) Page 1-12 ; EDHIS.MIC[10,5351] 22:44 29-Nov-83 REVISION HISTORY ; 694 ; SEPARATE CONDITIONALS FOR "MODEL B" MACHINE FROM THOSE FOR ; 695 ; EXTENDED ADDRESSING MICROCODE. ; 696 ;211 REMOVE UNNECESSARY DIDDLING OF VMA USER BIT DURING PAGE REFILL, ; 697 ; AND ELIMINATE SPECIAL CASE FOR MAP INSTRUCTION, WHEN EXTENDED ; 698 ; ADDRESSING HARDWARE EXISTS TO SOLVE THESE PROBLEMS. ; 699 ; FIX SEVERAL CASES OF SIGNS DISP WITH INADEQUATE CONSTRAINT. ; 700 ;210 FIX DEFINITION OF "SKP LOCAL AC REF", WHICH CONFUSED "AC ; 701 ; REF" WITH "LOCAL AC REF". ; 702 ;207 FIX JRSTF (AND ITS DERIVATIVES) TO LOAD FLAGS INTO AR AFTER ; 703 ; DOING EA MOD DISP, WHICH WOULD OTHERWISE CLOBBER THEM. FIX ; 704 ; COMPEA CODE TO LET AREAD HARDWARE LOAD AR. OTHERWISE GET SEC #. ; 705 ;206 FIX PCTXT ROUTINE TO GET PREVIOUS CONTEXT SECTION. ; 706 ;205 FIX POPJ TO LOAD HALFWORD OR FULLWORD PC ACCORDING TO PC SECT ; 707 ;204 FIX CONDITIONALS AROUND LOC 47, WRONG IN 202. FIX DEFINITION ; 708 ; OF A INDRCT, DOESN'T NEED #07. FIX STACK INSTRUCTIONS FOR ; 709 ; EXTENDED ADDRESSING. MUST NOT LOAD VMA FROM FULL AD. ; 710 ;203 INCLUDE CODE AT NEXT+2 TO GENERATE ADDRESS MASK (LOW 23 BITS) ; 711 ; AT HALT TIME, AND CODE IN PICYCLE TO USE IT TO GET 23 BIT ADDR ; 712 ; OUT OF IOP FUNCTION WORD. ; 713 ;202 MOVE "40+A" LOCATIONS TO "A" UNDER EXTENDED ADDRESSING. CHANGE ; 714 ; ALL CALL MACROS TO GENERATE CALL BIT INSTEAD OF SPECIAL FUNC'S. ; 715 ;201 BEGIN EXTENDED ADDRESSING CHANGES IN EARNEST. INTEGRATE NEW ; 716 ; EFFECTIVE ADDRESS COMPUTATION CODE, AND REVISE INSTRUCTION ; 717 ; ROUTINES AS NECESSARY. ; 718 ;126 FIX STRAC3-2, WHERE COMMA GOT LEFT OFF WHEN IFETCH MOVED ; 719 ;125 REMOVE NXT INSTR FROM STAC1, STRAC3, & STAC4, MAKING THEM JUMP ; 720 ; TO FINI INSTEAD. PROBLEM INVOLVES A RACE IF PAGE FAIL OCCURS ; 721 ; WHILE WRITING FM. IF FM ADDRESS CHANGES BEFORE COND/FM WRITE ; 722 ; GOES FALSE, APR BOARD MAY GRONK PARITY BIT OF SOME FM LOC'N. ; 723 ; THIS RESULTS IN SOME SOME PATHS FROM FETCH TO NICOND BECOMING ; 724 ; LONGER THAN 6 TICKS, SO THE FETCHES GOT SHUFFLED IN SOME PLACES. ; 725 ; MICROCODE PATCH ELIMINATES MOST PROBABLE CAUSE, WHICH IS PAGE ; 726 ; FAIL AT NICOND TIME WHILE WRITING AC OTHER THAN 0. IT DOES NOT ; 727 ; TAKE CARE OF THE POSSIBILITY THAT COND/FM WRITE WILL GLITCH AT ; 728 ; INSTR 1777 TIME. ; 729 ;124 FIXES IN SEVERAL PLACES TO SET AND CLEAR ACCOUNT ENABLE SO AS ; 730 ; TO GET REPEATABLE ACCOUNTING MEASURES OF USEFUL WORK DONE. THE ; 731 ; ENABLE IS NOW CLEARED FOR METER UPDATE CYCLES AND KL PAGE REFILL ; 732 ; CYCLES. THE HARDWARE ALREADY TAKES CARE OF PI CYCLES. ; 733 ;123 CORRECT 122 TO CONSTRAIN LOC "UNHALT", AND TO LOAD ARX FROM AR, ; 734 ; SO AS TO LET "SKP AR EQ" WORK. PROBLEM AROSE BECAUSE MACRO ALSO ; 735 ; TESTS ARX00-01. FIX EDIT, WHEN STORING DEST POINTER ON SELECT ; 736 ; SIGNIFICANCE START, TO ELIMINATE AMBIGUITY IN DEST P FIELD. ; 737 ;122 SPEC CHANGE TO EXIT FROM HALT LOOP, SO THAT AR0-8=0 WITH AR9-35 ; 738 ; NON-ZERO LOADS AR INTO PC TO START PROCESSOR. THIS IS DIFFERENT ; 739 ; FROM EXECUTING JRST BECAUSE PC FLAGS ARE CLEARED. ; 740 ;121 FIX TO 120 TO ALLOW A CYCLE BETWEEN FILLER FROM MEMORY AND ; 741 ; WRITING IT INTO FM (THUS PARITY CAN BE COMPUTED). ALSO CLEAR ; 742 ; STATE REGISTER IN EDIT BEFORE GETTING NEXT PATTERN BYTE. ; 743 ;120 FIX EIS TO TOLERATE PAGE FAIL ON READ OF FILL BYTE IN MOVSRJ ; 744 ; OR B2D CONVERSION. REQUIRES GETTING FILLER BEFORE STORING DLEN ; 745 ; ALSO INTEGRATE OPCODE COUNTING/TIMING CODE UNDER CONDITIONALS ; 746 ;117 FIX PARITY ERROR CODE TO WRITEBACK AR ON RPW ERROR. ; 747 ;116 REWRITE OF DDIV, SO THAT THE NO-DIVIDE TEST IS ON THE MOST ; 748 ; SIGNIFICANT HALF OF THE MAGNITUDE OF THE DIVIDEND, RATHER THAN ; 749 ; THE MAGNITUDE OF THE MOST SIGNIFICANT HALF. IN THE PROCESS, ; KL10 Microcode for TOPS-10 and TOPS-20 -- 18 Nov 1983 COPYRIGHT (C) 1984 DIGITAL EQUIPMENT CORPORATION V1(336) MICRO %34(270) Page 1-13 ; EDHIS.MIC[10,5351] 22:44 29-Nov-83 REVISION HISTORY ; 750 ; SAVE TIME AND SPACE. ALSO PUT IN CONDITIONAL ASSEMBLY VARIABLE ; 751 ; "WRTST" TO INHIBIT WRITE TEST CYCLE FOR INSTRUCTIONS WHICH ; 752 ; APPEAR NOT TO NEED IT, AND THUS TO SPEED THEM UP. ; 753 ;115 FIX SBDIAG TO SET MCL REG FUNC TO INHIBIT EBOX MAY BE PAGED. ; 754 ;114 RECODE STRING COMPARE TO SAVE SPACE AND TIME. CHANGE DEFAULTS ; 755 ; FOR KLPAGING TO INCLUDE EIS, EXCLUDE TRACKS FEATURE. CHANGE ; 756 ; KLPAGING (NEW SPEC) TO KEEP "LOGICALLY WRITABLE" IN SOFTWARE BIT ; 757 ;113 RECODE KL PAGING TO ELIMINATE PROBLEM OF WRITING HARDWARE ; 758 ; PAGE TABLE BEFORE CHECKING FOR AGE TRAP, AND THEREFORE LEAVING ; 759 ; THE PAGE ACCESSIBLE AFTER THE TRAP. THE RECODING ALSO IMPROVES ; 760 ; THE ALGORITHM IN THAT THE HARDWARE ENTRY INCLUDES THE W BIT SET ; 761 ; IF THE CORE TABLES ALLOWED WRITE AND THE CST INDICATES WRITTEN, ; 762 ; EVEN IF THE CURRENT REFERENCE WAS NOT A WRITE. ; 763 ; ALSO FIX CODE WHICH WRITES PT DIR, TO GET WRITE REF BIT FROM ; 764 ; VMA HELD INTO BIT 5 OF SAVED PAGE FAIL WORD. ; 765 ;112 FIX PAGE FAIL CODE FOR USE WITH PROB SHEET 1396, WHICH LOADS ; 766 ; PC IF PAGE FAIL OCCURS ON NICOND. THUS CODE NEEDN'T CHECK FOR ; 767 ; FETCH AT CLEAN, WHICH CAUSED OTHER PROBLEMS ON PARITY ERRORS. ; 768 ; CLEAR FE AND SC IN NXT INSTR MACRO (JUST CLEANLINESS). ; 769 ;111 PATCH SEVERAL ROUTINES WITH THE FOLLOWING MACRO -- ; 770 ; FETCH WAIT "MEM/MB WAIT" ; 771 ; TO PREVENT SEQUENCES IN WHICH PAGE FAIL INFO CAN GET LOST ; 772 ; BECAUSE OF LONG TIME FROM REQUEST TO MB WAIT. THESE PATCHES ; 773 ; SHOULD BE REMOVED AFTER AN ECO HAS BEEN INSTALLED TO FIX. ; 774 ; IN ADDITION, EBUSX SUBROUTINE HAS BEEN MODIFIED TO PREVENT RACE ; 775 ; CONDITION WHEN SETTING UP IO FUNCTION WITH COND/EBUS CTL AND ; 776 ; MAGIC # BIT 4. MUST NOT CHANGE #5 THROUGH #8 ON NEXT CYCLE. ; 777 ; FIX KLPAGING CODE TO GO BACK TO AREAD ON MAP REF, BECAUSE ; 778 ; MEM/AD FUNC DOESN'T CORRECTLY RESTORE APR REG FUNC. ALSO MAKE ; 779 ; THE CODE SMARTER ON NO MATCH CONDITION, SO REQUEST DOESN'T HAVE ; 780 ; TO BE RESTARTED AND IMMEDIATELY FAIL AGAIN. ; 781 ;110 GIVE UP ON THE OLD STRING COMPARE CODE, INSTALLING MIKE NEWMAN'S ; 782 ; VERSION. SOMEWHAT SLOWER, BUT GIVES THE RIGHT ANSWERS. ; 783 ; FIX LDB CODE TO WAIT FOR MEM WORD EVEN IF INTERRUPT REQUEST ; 784 ; SEEN, SO AS NOT TO GET CONFUSED WHEN IT ARRIVES OR PAGE FAILS. ; 785 ; ALSO IMPROVE CLRPT ROUTINE USED BY CONO AND DATAO PAG TO START ; 786 ; LOOP WITH VMA CLEARED AND PT WR SELECTION SETUP CORRECTLY. ; 787 ;107 FIX STRING COMPARES TO CHECK FOR INTERRUPT. THIS INVOLVED ; 788 ; CHECKING DURING GSRC ROUTINE, WHICH ELIMINATES NEED FOR CHECK ; 789 ; IN SRCMOD (WHICH CALLS GSRC). IT ALSO REQUIRED CLEARING SFLGS ; 790 ; AT STARTUP, AND ADJUSTING DLEN UPDATE CODE IN DEST FILL TO GET ; 791 ; VALID LENGTH STORED ON INTERRUPT. ; 792 ;106 ELIMINATE RACE IN DECODING OF # FIELD ON MTR BOARD BY HOLDING ; 793 ; LOW 3 BITS THROUGH NEXT MICROINSTRUCTION. ; 794 ; FIX LUUO AND MUUO TO ALLOW INTERRUPTS. ; 795 ; FIX B2D OFFSET TO SIGN-EXTEND E1 AFTER INTERRUPT. FINISH 105, ; 796 ; TO GET ENTIRE AR LOADED WHILE CLEARING MQ (ARL WAS HOLDING). ; 797 ; FIX KL PAGING TO USE VMA/1 INSTEAD OF VMA/AD WHEN RESTORING VMA ; 798 ; FROM VMA HELD OR COPIES THEREOF. ; 799 ; FIX UFA NOT TO ALWAYS GET UNDERFLOW ON NEGATIVE RESULTS. ; 800 ; SAME FIX AS EDIT 103 OF BREADBOARD. WHERE DID IT GET LOST? ; 801 ;105 FIX KL PAGING AS REVISED BY EDIT 103 TO CORRECTLY RESTORE ; 802 ; BR ON NO-MATCH CONDITION ; 803 ; ANOTHER FIX TO B2D, TO CLEAR MQ ON ENTRY. BUG INVOLVED GARBAGE ; 804 ; FROM MQ SHIFTING INTO ARX DURING DEVELOPMENT OF POWER OF TEN. ; 805 ;104 FIX BINARY TO DECIMAL CONVERSION, WHICH WAS NOT GOING TO CLEAN ; KL10 Microcode for TOPS-10 and TOPS-20 -- 18 Nov 1983 COPYRIGHT (C) 1984 DIGITAL EQUIPMENT CORPORATION V1(336) MICRO %34(270) Page 1-14 ; EDHIS.MIC[10,5351] 22:44 29-Nov-83 REVISION HISTORY ; 806 ; ON FINDING AN INTERRUPT, AND ON RESTART WITH FPD SET, WAS NOT ; 807 ; SETTING UP SLEN. TSK, TSK. CORRECT CLEANUP FOR DEST FILL IN ; 808 ; MOVSRJ, WHICH WAS INCREMENTING BOTH SLEN AND DLEN, SHOULD ; 809 ; HAVE BEEN NEITHER. FIX JSR, BROKEN BY EDIT 103. JUMP MUST BE ; 810 ; TO E+1, NOT E. ; 811 ;103 CREATE CONDITIONAL ASSEMBLY FOR EXTENDED ADDRESSING. UNDER IT, ; 812 ; CREATE MEM FIELD DEFINITIONS, SUPPRESS SXCT. ; 813 ; SAVE A WORD IN JSR BY USING JSTAC IN COMMON WITH PUSHJ. ; 814 ; FORCE TIME FIELD IN CASES WHERE ASSEMBLER DEFAULT SCREWS UP. ; 815 ; ADD INTERRUPT TESTS IN KL PAGING CODE TO PREVENT HANGS, AND ; 816 ; REVISE PAGE FAIL WORD TO ELIMINATE THE NEW FAIL CODES. ; 817 ;102 ATTEMPT ANOTHER FIX OF MOVSRJ, CVTBDX FILL. EDIT 71 LOSES ; 818 ; DUE TO INCONSISTENCY -- DLEN UPDATE MUST NOT PRECEED CLEANUP. ; 819 ; CREATE CONDITIONAL ASSEMBLY SWITCHES TO CONTROL EXTENDED ; 820 ; INSTRUCTION SET, DOUBLE INTEGER ARITHMETIC, AND ADJBP. CHANGE ; 821 ; DEFAULT OF IMULI.OPT, WHICH CAN GET SIGN WRONG ON OVERFLOW. ; 822 ;101 FIX METER REQUEST CODE TO "ABORT INSTR" EVEN IF NOT SETTING ; 823 ; PI CYCLE. THIS SHOULD FIX OCCASIONAL LOSS OF TRAPS PROBLEM. ; 824 ;100 FIXES TO KL PAGING CODE TO PREVENT LOADING VMA FROM AD WHILE ; 825 ; REQUESTING PHYSICAL REF. FIX JSR TO PREVENT FM PARITY STOP ; 826 ; ON STORE TO AC. FIX 1777 TO FORCE RECIRCULATION OF AR/ARX, ; 827 ; EVEN IF MBOX RESP STILL TRUE. ; 828 ;77 FIX DDIV TO GET MQ SHIFTED LEFT ONE PLACE, WITHOUT INTRODUCING ; 829 ; AN EXTRA BIT, AT DDVX1. THIS INVOLVES INHIBITING ADA TO PREVENT ; 830 ; AD CRY0 FROM COMMING INTO MQ35. ; 831 ;76 FIX UFA TO ALLOW AN EBOX CYCLE BETWEEN FETCH AND NICOND WHEN ; 832 ; FRACTION SUM IS ZERO, AT UFA3. ; 833 ;75 PUT BACK INSTRUCTION "MBREL" REMOVED BY EDIT 64. NECESSARY TO ; 834 ; ENSURE THAT EBOX REQUEST FOR FETCH DOESN'T COME UP WHILE ; 835 ; REGISTER FUNCTION IS IN PROGRESS, WHICH WOULD CONFUSE MBOX ON ; 836 ; STARTING THE FETCH. ; 837 ;74 CHANGES TO EIS FOR NEW-SPEC AC USAGE. CHANGES TO KL PAGING FOR ; 838 ; INDIRECT, IMMEDIATE SECTION POINTERS ; 839 ;73 FIX JRA TO PREVENT WRITING AC WITH DATA FRESH FROM MEMORY (ALLOW ; 840 ; A CYCLE FOR PARITY CHECK). FIX DPB CODE TAKE ONLY 3 TICKS ON ; 841 ; RETURN FROM BYTEA, SO THAT CACHE DATA DOESN'T ARRIVE INTO AR ; 842 ; AND ARX UNTIL DPB1, WHEN THE BYTE HAS GOTTEN OUT TO MQ. ; 843 ;72 FIX DEFINITION OF SP MEM/UNPAGED TO INHIBIT VMA USER. FIX ; 844 ; PAGE FAIL CODE TO CHECK FOR VMA FETCH BEFORE LOOKING AT ; 845 ; INTERRUPT REQUEST. PROBLEM WAS INTERRUPT CONCURRENT WITH ; 846 ; PAGE FAIL ON JRSTF TO USER. PC FLAGS GOT RESTORED, BUT VMA ; 847 ; NEVER COPIED TO PC BECAUSE PAGE FAIL INHIBITED NICOND, AND ; 848 ; INTERRUPT ABORTED PAGE FAIL HANDLING TO LOAD PC. ; 849 ;71 DEFINE FMADR/AC4=6. FIX MOVFIL ROUTINE TO PUT AWAY UPDATED ; 850 ; LENGTH DIFFERENCE WHEN INTERRUPTED, THUS AVOIDING RANDOMNESS ; 851 ; IN MOVSRJ, CVTBDX. FIX CVTBD CALL TO MOVFIL TO PRESERVE SR. ; 852 ; CHANGE STMAC AND PIDONE FROM "FIN XFER" TO "FIN STORE", BECAUSE ; 853 ; STORE WAS IN PROGRESS, WHICH CAUSED FM WRITE IF AC REF, AND ; 854 ; GOT A PARITY ERROR DUE TO ADB/FM. ; 855 ;70 FIX PXCT 4,[POP ...], WHICH DIDN'T GET DEST CONTEXT SET FOR ; 856 ; STORE. MUST USE SR_100 TO SET IT. ; 857 ;67 FIX PROBLEM IN ADJBP BY WHICH BYTES/WORD WAS GETTING LOST ; 858 ; WHEN DIVIDE ROUTINE LOADED REMAINDER INTO BR. SOLVED BY ; 859 ; SAVING BYTES/WORD IN T1. ; 860 ;66 FIX KL PAGING TO RESTORE VMA ON TRAP, SAVE ADDRESS OF POINTER ; 861 ; CAUSING TRAP, AND NOT RESTORE ARX EXCEPT FOR BLT PAGE FAIL. ; KL10 Microcode for TOPS-10 and TOPS-20 -- 18 Nov 1983 COPYRIGHT (C) 1984 DIGITAL EQUIPMENT CORPORATION V1(336) MICRO %34(270) Page 1-15 ; EDHIS.MIC[10,5351] 22:44 29-Nov-83 REVISION HISTORY ; 862 ; ALSO SET TIME PARAMETER ON ADB/FM TO ALLOW TIME FOR PARITY ; 863 ; CHECKING OF FM. ; 864 ;65 FIX KL PAGING CODE TO DO MBWAIT AFTER DETERMINING THAT PARITY ; 865 ; ERROR HAS NOT OCCURRED, SO AS TO GET CORRECT VMA TO SAVE. ; 866 ; CREATE SYMBOLS FOR KL PAGE FAIL CODES. PUT CONDITIONAL ; 867 ; ASSEMBLY AROUND IMULI OPTIMIZATION CODE, AND SXCT. CREATE ; 868 ; SYMBOL "OPTIONS" IN # FIELD FOR MICROCODE OPTIONS. ; 869 ;64 MICROCODE FOR KL10 PAGING (PAGE REFILL, MAP INSTR)... ; 870 ; REMOVE UNNECESSARY INSTRUCTION MBREL: FROM SWEEP AND APRBO ; 871 ; COSMETIC CHANGES TO KEEP COMMENTS & MACRO DEFINITIONS FROM ; 872 ; OVERFLOWING LINE OF LISTING, AND INSERTION OF CONDITIONAL ; 873 ; ASSEMBLY CONTROL OF LONG FLOATING POINT INSTRUCTIONS. ; 874 ;63 IN MTR REQUEST ROUTINE, DON'T DISMISS WHEN PI CYCLE HASN'T ; 875 ; BEEN SET. ; 876 ;62 FIX RDMTR CODE TO PUT 35 IN SC BEFORE GOING TO DMOVEM CODE. ; 877 ;61 FIX PIIBP ROUTINE TO USE CALL.M INSTEAD OF SPEC/CALL, ; 878 ; WHICH GETS OVERRIDDEN BY P_P-S... IN MTR REQUEST SERVICE ; 879 ; ROUTINE, DON'T SET PI CYCLE UNLESS REQUEST IS FOR VECTOR. ; 880 ;60 FIX DATAO PAG TO DO MB WAIT AFTER STORING EBOX ACCT AND ; 881 ; BEFORE CHANGING VMA. ; 882 ;57 RE-CODE USES OF A@, B@ TO USE VMA/1, RATHER THAN VMA/AD, ; 883 ; IN ORDER TO GET CORRECT CONTEXT ON INDIRECT WORD. SEE MCL4 ; 884 ;56 FIX SECOND PART OF PICYCLE (TAG NEXT:) TO ENSURE THAT ; 885 ; PC+1 INH, KERNEL CYCLE, ETC REMAIN UP DURING 2ND PART. ; 886 ; ALSO CHANGE SPEC/FLAG CTL FOR ECO 1261, WHICH REQUIRES ; 887 ; #07 TO BE OPPOSITE OF #04 TO GENERATE SCD LEAVE USER. ; 888 ;55 FIX SPEC INSTR/SET PI CYCLE TO INHIBIT INTERRUPTS ; 889 ; (IN PARTICULAR, METER UPDATE REQUESTS). MAKE SURE VALID ; 890 ; DATA SAVED ON IO PAGE FAIL AND PARITY ERRORS. REMOVE ; 891 ; BACKWARDS BLT... IT BROKE TOO MANY PROGRAMS. ; 892 ;54 FIX OVERFLOW CHECK IN IMULI OPTIMIZATION TO INH CRY 18 ; 893 ; UPDATE TO USE CONDITIONAL ASSEMBLY IN MICRO VERS 20. ; 894 ;53 FIX T1,T2 PARAMETERS ON BYTE DISP, SIGNS DISP ; 895 ;52 CORRECT SHIFT AMOUNT FOR IMULI OPTIMIZATION, AND FIX MACRO ; 896 ; DEFINITIONS FOR SET SR?, WHICH WERE ALWAYS SETTING SR0. ; 897 ;51 OPTIMIZE IMULI OF TWO POSITIVE OPERANDS (TO SPEED UP SUBSCRIPT ; 898 ; CALCULATIONS) BY TAKING ONLY 9 MULTIPLY STEPS AND STARTING ; 899 ; NEXT INSTRUCTION FETCH EARLIER. OPTIMIZATION CAN BE REMOVED ; 900 ; BY COMMENTING OUT TWO INSTRUCTIONS AT IMULI, AND ONE FOLLOWING ; 901 ; IMUL. ALSO FIX APRBI/UVERS TO KEEP SERIAL # OUT OF LH. ; 902 ;50 INTRODUCE SKIP/FETCH AND CODE IN PAGE FAIL RECOVERY TO LOAD ; 903 ; PC FROM VMA IF PAGE FAIL OCCURED ON FETCH, BECAUSE NICOND ; 904 ; CYCLE, WHICH SHOULD HAVE LOADED PC, GETS INHIBITED BY INSTR 1777 ; 905 ; ALSO INCLUDE EXTENDED INSTRUCTION SET. ; 906 ;47 UNDO XCT CHANGES OF EDIT 46, WHICH BROKE XCT DUE TO INSUFFICIENT ; 907 ; TIME FOR DRAM HOLD BEFORE USING "A READ". ALSO FIX VECTOR ; 908 ; INTERRUPT CODE TO LOOK AT CORRECT BITS FOR CONTROLLER NUMBER. ; 909 ;46 FOLLOW-ON TO EDIT 45, SAVING 2 WORDS AND A CYCLE ; 910 ; ALSO MOVE JRST TO 600, JFCL TO 700, UUO'S TO 100X AS PREPARATION ; 911 ; FOR EXTENDED INSTRUCTION SET ; 912 ;45 FIX SXCT TO LOOK AT AC FIELD OF SXCT, NOT SUBJECT INSTRUCTION, ; 913 ; WHEN DECIDING WHETHER TO USE BASE-TYPE ADDRESS CALCULATION. ; 914 ;44 FIX PAGE FAIL LOGIC TO WORK FOR EITHER PAGE FAIL OR PARITY ; 915 ; ERROR. EDITS 42 AND 43 BOTH WRONG. ALSO CORRECT RACE IN ; 916 ; WRITING PERFORMANCE ANALYSIS ENABLES TO PREVENT SPURIOUS COUNTS. ; 917 ;43 CORRECT USE OF PF DISP BY EDIT 42. LOW BITS ARE INVERTED ; KL10 Microcode for TOPS-10 and TOPS-20 -- 18 Nov 1983 COPYRIGHT (C) 1984 DIGITAL EQUIPMENT CORPORATION V1(336) MICRO %34(270) Page 1-16 ; EDHIS.MIC[10,5351] 22:44 29-Nov-83 REVISION HISTORY ; 918 ;42 FIX BUGS INTRODUCED BY EDIT 40, WHICH MADE FLTR OF 1B0 HANG ; 919 ; TRYING TO NEGATE IT, AND FIX UP EXPONENT CORRECTION ON LONG ; 920 ; SHIFT LEFT. ALSO PUT IN CODE TO HANDLE PARITY ERROR PAGE ; 921 ; FAILURES, AND SET TIME CONTROLS ON 43-47. ; 922 ;41 REWRITE OF VECTOR INTERRUPT PROCESSING TO MAKE DTE VECTORS ; 923 ; GO TO 142+8N, WHERE N IS DTE#. RH20 GO TO PROGRAMMED ADDRESS ; 924 ; IN EPT, EXTERNAL DEVICES USE EXEC VIRTUAL ADDRESSES. ; 925 ;40 IMPROVEMENTS TO FLOATING NORMALIZATION TO MAKE LONG SHIFTS ; 926 ; FASTER, PRIMARILY TO HELP FLTR ; 927 ;37 FIX FLOATING DIVIDE SO THAT THE TRUNCATED FORM OF A NEGATIVE ; 928 ; QUOTIENT IS EQUAL TO THE HIGH-ORDER PART OF THE INFINITE- ; 929 ; PRECISION QUOTIENT. SEE COMMENTS IN THE CODE. ALSO BUM ; 930 ; A CYCLE OUT OF FLOATING DIVIDE BY STARTING THE NORMALIZE ; 931 ; WHILE MOVING THE QUOTIENT INTO AR. ; 932 ; SEVERAL CHANGES TO MAKE TRACKS FEATURE WORK ; 933 ;36 FIX CONO MTR TO PUT DATA ON BOTH HALVES, SO PI CAN SEE PIA ; 934 ;35 FIX CONI PI TO READ BACK WRITE EVEN PARITY ENABLES ; 935 ;34 FIX BLT USE OF SR, SO NO CORRECTION OF ARX NECESSARY ; 936 ;33 FIX PAGE TABLE REFERENCES TO FORCE UNPAGED REF. FIX TRAP ; 937 ; TO SET PC+1 INHIBIT. ; 938 ;32 CORRECT SETTING OF SC FOR SHIFTING METER COUNTERS, TO GET ; 939 ; 12 BITS UNUSED AT RIGHT WHEN IT GETS TO CORE. ; 940 ;31 RECODE ASH AND ASHC TO SAVE SPACE ; 941 ;30 FIX JFFO TO SHIFT AR CORRECTLY AT JFFO2. BUM ADJSP TO USE ; 942 ; STMAC FOR UPDATING PDL POINTER. ; 943 ;27 FIX CONI PAG TO READ EBUS. CORRECT DEFINITIONS OF MBOX ; 944 ; REGISTER FUNCTIONS, WHICH HAD BITS 0 AND 3 INVERTED. ; 945 ;26 FIX DEFINITIONS OF DIAG FUNC CONO MTR AND CONO TIM, WHICH ; 946 ; WERE REVERSED ; 947 ;25 FIX DECODING OF PHYSICAL DEVICE NUMBER IN PI FUNCTION CODE ; 948 ; AND RE-CODE JFCL FOR FEWER MICROWORDS ; 949 ;24 FIX JFFO TO SHIFT ON FIRST 6-BIT TEST STEP, AND JRSTF TO ; 950 ; KEEP E AND XR DISTINCT. ALSO SET LOAD-ENABLE BITS IN ; 951 ; DATAI PAG, WORD. ; 952 ;23 FIX CONO PI, TO HOLD AR ONTO EBUS THRU REL EBUS, BECAUSE ; 953 ; PI BOARD DELAYS CONO PI TO GET CONO SET EQUIVALENT. ; 954 ;22 MORE JFCL FIXES. MUST USE FLAG CTL/JFCL WHILE CLEARING BITS, ; 955 ; AS WELL AS WHILE TESTING THEM. BUM A WORD OUT OF JFFO BY ; 956 ; MAKING THE SIXBIT COUNT NEGATIVE. CHANGES SO SHIFT SUBR ; 957 ; RETURNS 2, BYTEA 1. FIX SETMB TO STORE BACK AND FETCH. ; 958 ;21 RE-WRITE JFCL TO KEEP LOW OPCODE BITS OUT OF AR0-1, BECAUSE ; 959 ; PC00 GETS PROPAGATED LEFT TO ADA -1 AND -2. ; 960 ;20 FIX BLT TO LOAD BR WITH SRC-DST ADDR ; 961 ; ALSO SET TIME PARAMETERS ON CONDITIONAL FETCH FUNCTIONS ; 962 ;17 CHANGE SWEEP ONE PAGE TO PUT PAGE # IN E, RATHER THAN ADDR. ; 963 ; ALSO CHANGE COND/FM WRITE TO MATCH ECO #1068. ; 964 ;16 FIX JUMP FETCH MACRO TO LOAD VMA FROM PC+1 (TEST SATISFIED ; 965 ; OVERRIDES THIS TO HOLD VMA). ALSO BUM ONE MICROWORD FROM MUUO. ; 966 ;15 INCLUDE PAGE FAIL DISP IN DISP/ FIELD ; 967 ; ALSO MAKE MUUO STORE PROCESS CONTEXT WORD AT 426, AND SETUP ; 968 ; PCS FROM PC EXTENSION, CWSX FROM SXCT ; 969 ;14 FIX DEFINITIONS OF SKIP/IO LEGAL, AC#0, SC0, EVEN PAR ; 970 ; ALSO FIX DATAO PAG, TO SEND LH DATA ON BOTH HALVES OF EBUS ; 971 ;13 ALIGN SETEBR SO CALL TO SHIFT RETURNS CORRECTLY ; 972 ;12 MAKE SURE AD COPIES AR DURING DATAO, CONO, AND CLEAR AR AT ; 973 ; SET DATAI TIME. ; KL10 Microcode for TOPS-10 and TOPS-20 -- 18 Nov 1983 COPYRIGHT (C) 1984 DIGITAL EQUIPMENT CORPORATION V1(336) MICRO %34(270) Page 1-17 ; EDHIS.MIC[10,5351] 22:44 29-Nov-83 REVISION HISTORY ; 974 ;11 FIXES TO CONTINUE CODE SO CONSOLE WORKS, AND CORRECTIONS TO ; 975 ; PROTECTED DEP/EXAM SO PROTECTION PROTECTS. ; 976 ;10 FIX A READ MACRO TO VMA/PC+1. AD OVERRIDES UNLESS DRAM A=1 ; 977 ;07 RE-WRITE OF PI CYCLE CODE TO RECOGNIZE NEW EBUS SPEC. ; 978 ;06 FIX DEFINITIONS OF SKIPS 40-57 BY COMPLEMENTING 3 LOW ORDER BITS ; 979 ; FIX MULSUB TO CORRESPOND TO NEW CRA LOGIC ; 980 ;05 FIX EBUS CTL DEFINITIONS TO GET F01 CORRECT. CORRECT FLAG CTL ; 981 ; DEFINITIONS TO PREVENT LEAVE USER WHEN NOT WANTED, AND FIX ; 982 ; JRST/JFCL TO HAVE FLAGS IN AR WHEN NEEDED. ; 983 ;04 FIX RETURNS FROM MULSUB, PUT BETTER COMMENTS ON SNORM CODE, ; 984 ; IMPROVE SNORM ALGORITHM TO MINIMIZE WORST-CASE TIME. ; 985 ;03 FIX DISPATCH ADDRESS PROBLEMS, MOSTLY JRST/JFCL AND UUO'S. ; 986 ;02 CHANGES PER INSTRUCTION SET REVIEW -- DELETE USE OF BIT12 OF ; 987 ; BYTE POINTERS, CHANGE BLT TO PUT FINAL SRC,DST ADDRESSES IN AC, ; 988 ; MAKE TRUNCATE FORM FLOATING POINT REALLY TRUNCATE, ELIMINATE ; 989 ; LOCAL JSYS SUPPORT, DELETE PXCT OPCODE (XCT W/ NON-ZERO AC IN ; 990 ; EXEC MODE), LUUO'S GO TO 40/41 OF CURRENT SPACE. ; 991 ;01 UPDATES FOR .TITLE AND .TOC PSEUDO OPS, ; 992 ; AND VARIOUS CHANGES FOR PROTO HARDWARE ; 993 ;00 CREATION, BASED ON BREADBOARD AS OF EDIT 66 ; 994 .BIN ; 995 ; KL10 Microcode for TOPS-10 and TOPS-20 -- 18 Nov 1983 COPYRIGHT (C) 1984 DIGITAL EQUIPMENT CORPORATION V1(336) MICRO %34(270) Page 1 ; DEFINE.MIC[10,5351] 23:19 23-Nov-83 CONDITIONAL ASSEMBLY VARIABLE DEFINITIONS ; 996 .TOC "CONDITIONAL ASSEMBLY VARIABLE DEFINITIONS" ; 997 .NOBIN ; 998 ; 999 ; [COST ESTIMATES IN BRACKETS INDICATE NUMBER OF ADDITIONAL ; 1000 ; MICROINSTRUCTIONS REQUIRED BY TURNING ON THE FEATURE SWITCH] ; 1001 ; 1002 .DEFAULT/TRACKS=0 ;1 ENABLES STORING PC AFTER EVERY INSTRUCTION, ; 1003 ; & CREATES DATAI/O PI TO READ/SETUP PC BUFFER ; 1004 ;ADDRESS. [COST = 21 WDS] ; 1005 ; 1006 .DEFAULT/OP.CNT=0 ;1 ENABLES CODE TO BUILD A HISTOGRAM IN CORE ; 1007 ; COUNTING USES OF EACH OPCODE IN USER & EXEC ; 1008 ; 1009 .DEFAULT/OP.TIME=0 ;1 ENABLES CODE TO ACCUMULATE TIME SPENT BY ; 1010 ; EACH OPCODE ; 1011 ; 1012 .DEFAULT/SO.CNT=0 ;SECOND ORDER COUNTING IN 128K STARTING AT LOC ; 1013 ; 400000 NOT DEBUGED [COST = 28 WDS] ; 1014 ; 1015 .DEFAULT/SO2.CNT=0 ;SECOND ORDER COUNTING IN 128K STARTING AT LOC ; 1016 ; PRESENTED AT START DOES ONE MORE ADD THAN ; 1017 ; SO.CNT AND HENCE AN INSTRUCTION TAKES ; 1018 ; 120 NS LONGER THAN SO.CNT [COST = 28 WDS] ; 1019 ; 1020 .DEFAULT/PAGCNT=0 ;Enable code to count entries into the PFH and ; 1021 ; number of DATAO PAGs with bit 2 set. [Cost = ; 1022 ; 6 words] [327] ; 1023 ; 1024 .DEFAULT/FPLONG=1 ;1 ENABLES KA-STYLE DOUBLE PRECISION FLOATING ; 1025 ;POINT INSTRUCTIONS: FADL, FSBL, FMPL, FDVL, ; 1026 ; UFA, DFN. [COST = 49 WDS] ; 1027 ; 1028 .DEFAULT/MULTI=0 ;1 IF MULTIPROCESSOR SYSTEM, TO SUPPRESS CACHE ; 1029 ;ON UNPAGED REF'S. PAGED REF'S ARE UP TO EXEC. ; 1030 ; 1031 .DEFAULT/KLPAGE=0 ;1 ENABLES KL-MODE PAGING. [COST = 85 WDS] ; 1032 ; 1033 .DEFAULT/SHIFT.MUUO=0 ;ENABLES A DIFFERENT MUUO FORMAT FOR MODEL A ; 1034 ;THAT IS SLIGHTLY CLOSER TO THE XADDR FORMAT ; 1035 ;EXPECTED TO BE USED IN CONJUNCTION WITH LONG.PC ; 1036 ;BUT THEY DO NOT DEPEND ON EACH OTHER ; 1037 ; 1038 .DEFAULT/MODEL.B=0 ;1 INDICATES EXTENDED ADDRESSING HARDWARE, ; 1039 ;PRIMARILY 2K (RATHER THAN 1280) CONTROL RAM, ; 1040 ;NEW MCL, CTL, AND APR BOARDS. ; 1041 ; 1042 .DEFAULT/BLT.PXCT=0 ;1ENABLES SPECIAL BLT CODE FOR EXTENDED ADDRESSING ; 1043 ;THIS IS SUPPOSED TO GO AWAY IN THE FUTURE ; 1044 ;WHEN PXCT OF BLT IS NO LONGER USED BY TOPS-20 ; 1045 ;THIS SHOULD ONLY BE USED BY KLX XADDR MICROCODE ; 1046 ;[COST 12 WORDS] ; 1047 ; 1048 .IF/KLPAGE ;;1049 .IFNOT/MODEL.B ;;1050 .SET/XADDR=0 ;CAN'T DO EXTENDED ADDRESSING WITHOUT MODEL B ;;1051 .set/extexp=0 ;No room in TOPS20 Model A machine for extended exp. ; KL10 Microcode for TOPS-10 and TOPS-20 -- 18 Nov 1983 COPYRIGHT (C) 1984 DIGITAL EQUIPMENT CORPORATION V1(336) MICRO %34(270) Page 1-1 ; DEFINE.MIC[10,5351] 23:19 23-Nov-83 CONDITIONAL ASSEMBLY VARIABLE DEFINITIONS ; 1052 .ENDIF/MODEL.B ; 1053 ;;1054 .IFNOT/KLPAGE ;;1055 .SET/XADDR=0 ;CAN'T HAVE EXTENDED ADDRESSING WITHOUT KL PAGE ; 1056 .ENDIF/KLPAGE ; 1057 ; 1058 .DEFAULT/IMULI.OPT=0 ;1 ENABLES OPTIMIZATION OF IMULI TO TAKE ONLY ; 1059 ;NINE MULTIPLY STEPS [COST = 3 WDS] ; 1060 ; 1061 .IF/MODEL.B ; [COST = 19 WDS] ; 1062 .SET/SXCT=0 ;DONT NEED SXCT WITH EXTENDED ADDRESSING ; 1063 ;CAN'T DO IT IN MODEL B HARDWARE ; 1064 .ENDIF/MODEL.B ; 1065 .DEFAULT/SXCT=0 ;1 ENABLES SPECIAL XCT INSTR, WHICH ALLOWS ; 1066 ; DIAGNOSTICS TO GENERATE LARGE ADDRESSES. ; 1067 ; 1068 ; 1069 .DEFAULT/SNORM.OPT=0 ;1 ENABLES FASTER NORMALIZATION OF SINGLE- ; 1070 ; PRECISION RESULTS WHICH HAVE SEVERE LOSS OF ; 1071 ; SIGNIFICANCE [COST = 4 WDS] ; 1072 ;;1073 .IFNOT/MODEL.B ;;1074 .SET/PUSHM=0 ;CODE ONLY WORKS FOR MODEL B ; 1075 .ENDIF/MODEL.B ; 1076 ; 1077 .DEFAULT/PUSHM=0 ;ENABLES THE PUSHM AND POPM INSTRUCTIONS ; 1078 ; [COST = ??? WDS] ; 1079 .DEFAULT/EXTEND=1 ;1 ENABLES EXTENDED INSTRUCTION SET ; 1080 ; [COST = 290 WDS] ; 1081 ; 1082 .DEFAULT/DBL.INT=1 ;1 ENABLES DOUBLE INTEGER INSTRUCTIONS ; 1083 ; [COST = 59 WDS] ; 1084 ; 1085 .DEFAULT/ADJBP=1 ;1 ENABLES ADJUST BYTE POINTER ; 1086 ; [COST = 24 WDS] ; 1087 ; 1088 .DEFAULT/RPW=1 ;1 ENABLES READ-PAUSE-WRITE CYCLES FOR ; 1089 ;NON-CACHED REFERENCES BY CERTAIN INSTRUCTIONS. ; 1090 ; [COST = 0] ; 1091 ; 1092 .DEFAULT/WRTST=0 ;1 ENABLES WRITE-TEST CYCLES AT AREAD TIME FOR ; 1093 ;INSTRUCTIONS LIKE MOVEM AND SETZM. [COST = 0] ; 1094 ; 1095 .DEFAULT/BACK.BLT=0 ;1 ENABLES BLT TO DECREMENT ADDRESSES ON EACH ; 1096 ;STEP IF E < RH(AC). BREAKS MANY PROGRAMS. ; 1097 ; [COST = 9 WDS] ; 1098 ;;1099 .IF/TRACKS ;SETUP CONTROL FOR COMMON CODE ;;1100 .SET/INSTR.STAT=1 ; 1101 .ENDIF/TRACKS ; 1102 ;;1103 .IF/OP.CNT ;;1104 .SET/INSTR.STAT=1 ;ENABLE COMMON CODE, ERROR IF TRACKS TOO ; 1105 .ENDIF/OP.CNT ; 1106 ;;1107 .IF/OP.TIME ; KL10 Microcode for TOPS-10 and TOPS-20 -- 18 Nov 1983 COPYRIGHT (C) 1984 DIGITAL EQUIPMENT CORPORATION V1(336) MICRO %34(270) Page 1-2 ; DEFINE.MIC[10,5351] 23:19 23-Nov-83 CONDITIONAL ASSEMBLY VARIABLE DEFINITIONS ;;1108 .SET/INSTR.STAT=1 ;ERROR IF TRACKS OR OP.CNT ALSO SET ; 1109 .ENDIF/OP.TIME ; 1110 ;;1111 .IF/SO.CNT ;;1112 .SET/INSTR.STAT=1 ; 1113 .ENDIF/SO.CNT ; 1114 ;;1115 .IF/SO2.CNT ;;1116 .SET/INSTR.STAT=1 ; 1117 .ENDIF/SO2.CNT ; 1118 ; 1119 .DEFAULT/INSTR.STAT=0 ;IF NO STATISTICS, TURN OFF COMMON CODE ; 1120 ;;1121 .IF/INSTR.STAT ;;1122 .SET/NONSTD=1 ;STATISTICS CODE IS NONSTANDARD ;;1123 .SET/TRXDEF=1 ;Make sure TRX registers get defined [327] ; 1124 .ENDIF/INSTR.STAT ; 1125 ;;1126 .IF/PAGCNT ;;1127 .SET/NONSTD=1 ;All statistics are nonstandard ;;1128 .SET/TRXDEF=1 ;We need the TRX registers ; 1129 .ENDIF/PAGCNT ; 1130 ; 1131 .DEFAULT/TRXDEF=0 ;Normally no TRX registers needed ; 1132 ; 1133 .DEFAULT/LONG.PC=0 ;LONG PC FORMAT [COST 9 WORDS 11 WORDS IF XADDR] ; 1134 ; 1135 .DEFAULT/EPT540=0 ;PUT EPT AND UPT SECTION TABLES AT 540 IF ON ; 1136 ; 440 IF OFF ; 1137 ; 1138 .DEFAULT/DIAG.INST=0 ;UNSUPPORTED DIAGNOSTIC MICROCODE ; 1139 ;;1140 .IF/DIAG.INST ;;1141 .SET/NONSTD=1 ;NONSTANDARD MICROCODE ; 1142 .ENDIF/DIAG.INST ; 1143 ; 1144 .DEFAULT/NONSTD=0 ;NONSTANDARD MICROCODE IS NORMALLY OFF ; 1145 .DEFAULT/SMP=1 ;[216]1 IF SYMMETRIC MULTIPROCESSOR ; 1146 ;SYSTEM. ; 1147 ;TO ENABLE RPW ON DPB INSTRUCTION. ; 1148 ;[COST=9 WORDS if not XADDR, more if XADDR] ; 1149 .DEFAULT/OWGBP=0 ;[264] ; 1150 .DEFAULT/IPA20=0 ;[264] ; 1151 .DEFAULT/NOCST=0 ;[264] ; 1152 .DEFAULT/CST.WRITE=1 ;[314] Enable CST writable bit ; 1153 .DEFAULT/BIG.PT=0 ;[333] Special code for big page table and Keep bit ; 1154 .DEFAULT/GFTCNV=1 ;[273] GFLOAT CONVERSION INST. ; 1155 ; KL10 Microcode for TOPS-10 and TOPS-20 -- 18 Nov 1983 COPYRIGHT (C) 1984 DIGITAL EQUIPMENT CORPORATION V1(336) MICRO %34(270) Page 2 ; DEFINE.MIC[10,5351] 23:19 23-Nov-83 HOW TO READ THE MICROCODE -- FORMATS & CONSTRUCTS ; 1156 .TOC "HOW TO READ THE MICROCODE -- FORMATS & CONSTRUCTS" ; 1157 ; 1158 ;(1) FIELD DEFINITIONS ; 1159 ; THESE OCCUR AT THE BEGINNING OF THE LISTING, IN THE SOURCE FILE ; 1160 ; DEFINE.MIC (CONTROL AND DISPATCH RAM DEFINITIONS). ; 1161 ; THEY HAVE THE FORM: ; 1162 ; SYMBOL/=M,J ; 1163 ;ANOTHER FORM ACCEPTED BY THE ASSEMBLER (FOR HISTORIC REASONS) IS: ; 1164 ; SYMBOL/=J,K,R,M ;THIS FORM HAS BEEN REMOVED FROM THIS CODE ; 1165 ; THE PARAMETER (J) IS MEANINGFUL ONLY WHEN "D" IS SPECIFIED ; 1166 ; AS THE DEFAULT MECHANISM, AND IN THAT CASE, GIVES THE DEFAULT VALUE OF ; 1167 ; THE FIELD IN OCTAL. ; 1168 ; THE PARAMETER (K) GIVES THE FIELD SIZE IN (DECIMAL) NUMBER ; 1169 ; OF BITS. THIS IS USED ONLY IN THE OUTDATED FORMAT. ; 1170 ; THE PARAMETER (L) GIVES THE BIT POSITION OF THE LEFTMOST BIT ; 1171 ;IN THE FIELD. THE SAME METHOD IS USED AS FOR (R) BELOW. ; 1172 ; THE PARAMETER (R) GIVES THE FIELD POSITION IN DECIMAL ; 1173 ; AS THE BIT NUMBER OF THE RIGHTMOST BIT OF THE FIELD. BITS ARE NUMBERED ; 1174 ; FROM 0 ON THE LEFT. NOTE THAT THE POSITION OF BITS IN THE MICROWORD ; 1175 ; SHOWN IN THE LISTING BEARS NO RELATION TO THE ORDERING OF BITS IN THE ; 1176 ; HARDWARE MICROWORD, WHERE FIELDS ARE OFTEN BROKEN UP AND SCATTERED. ; 1177 ; THE PARAMETER (M) IS OPTIONAL, AND SELECTS A DEFAULT ; 1178 ; MECHANISM FOR THE FIELD. THE LEGAL VALUES OF THIS PARAMETER ARE THE ; 1179 ; CHARACTERS "D", "T", "P", OR "+". ; 1180 ; "D" MEANS (J) IS THE DEFAULT VALUE OF THE FIELD IF NO EXPLICIT ; 1181 ; VALUE IS SPECIFIED. ; 1182 ; "T" IS USED ON THE TIME FIELD TO SPECIFY THAT THE VALUE OF THE ; 1183 ; FIELD DEPENDS ON THE TIME PARAMETERS SELECTED FOR OTHER FIELDS. ; 1184 ; THE VALUE OF A FIELD WITH THIS SPECIFICATION DEFAULTS TO THE ; 1185 ; MAX OF , , . ; 1188 ; WITHIN THE KL10 MICROCODE, T1 PARAMETERS ARE USED TO SPECIFY ; 1189 ; FUNCTIONS WHICH DEPEND ON THE ADDER SETUP TIME, AND T2 PARAMETERS ; 1190 ; ARE USED FOR FUNCTIONS WHICH REQUIRE ADDITIONAL TIME FOR CORRECT ; 1191 ; SELECTION OF THE NEXT MICROINSTRUCTION ADDRESS. ; 1192 ; "P" IS USED ON THE PARITY FIELD TO SPECIFY THAT THE VALUE OF THE ; 1193 ; FIELD SHOULD DEFAULT SUCH THAT PARITY OF THE ENTIRE WORD ; 1194 ; IS ODD. IF THIS OPTION IS SELECTED ON A FIELD WHOSE SIZE (K) IS ; 1195 ; ZERO, THE MICRO ASSEMBLER WILL ATTEMPT TO FIND A BIT SOMEWHERE ; 1196 ; IN THE WORD FOR WHICH NO VALUE IS SPECIFIED OR DEFAULTED. ; 1197 ; "+" IS USED ON THE JUMP ADDRESS FIELD TO SPECIFY THAT THE DEFAULT ; 1198 ; JUMP ADDRESS IS THE ADDRESS OF THE NEXT INSTRUCTION ASSEMBLED (NOT, ; 1199 ; IN GENERAL, THE CURRENT LOCATION +1). ; 1200 ; IN GENERAL, A FIELD CORRESPONDS TO THE SET OF BITS WHICH PROVIDE ; 1201 ; SELECT INPUTS FOR MIXERS OR DECODERS, OR CONTROLS FOR ALU'S. ; 1202 ; EXAMPLES: ; 1203 ; AR/=<24:26>D,0 OR AR/=0,3,26,D ; 1204 ; THE MICROCODE FIELD WHICH CONTROLS THE AR MIXER (AND THEREFORE ; 1205 ; THE DATA TO BE LOADED INTO AR ON EACH EBOX CLOCK) IS THREE BITS WIDE ; 1206 ; AND THE RIGHTMOST BIT IS SHOWN IN THE LISTING AS BIT 26 OF THE ; 1207 ; MICROINSTRUCTION. IF NO VALUE IS SPECIFICALLY REQUESTED FOR THE FIELD, ; 1208 ; THE MICROASSEMBLER WILL ENSURE THAT THE FIELD IS 0. ; 1209 ; AD/=<12:17> OR AD/=0,6,17 ; 1210 ; THE FIELD WHICH CONTROLS THE AD IS 6 BITS WIDE, ENDING ON ; 1211 ; BIT 17. THE FOURTH PARAMETER OF THE FIELD IS OMITTED, SO THE FIELD ; KL10 Microcode for TOPS-10 and TOPS-20 -- 18 Nov 1983 COPYRIGHT (C) 1984 DIGITAL EQUIPMENT CORPORATION V1(336) MICRO %34(270) Page 2-1 ; DEFINE.MIC[10,5351] 23:19 23-Nov-83 HOW TO READ THE MICROCODE -- FORMATS & CONSTRUCTS ; 1212 ; IS AVAILABLE TO THE MICROASSEMBLER (IF NO VALUE IS EXPLICITLY ; 1213 ; CALLED OUT FOR THE FIELD) FOR MODIFICATION TO ENSURE ODD PARITY IN THE ; 1214 ; ENTIRE WORD. ; 1215 ; ; 1216 ;(2) VALUE DEFINITIONS ; 1217 ; FOLLOWING A FIELD DEFINITION, SYMBOLS MAY BE CREATED IN THAT ; 1218 ; FIELD TO CORRESPOND TO VALUES OF THE FIELD. THE FORM IS: ; 1219 ; SYMBOL=N,T1,T2 ; 1220 ; "N" IS, IN OCTAL, THE VALUE OF SYMBOL WHEN USED IN THE FIELD. ; 1221 ; T1 AND T2 ARE OPTIONAL, AND SPECIFY PARAMETERS IN THE TIME FIELD ; 1222 ; CALCULATION FOR MICROINSTRUCTIONS IN WHICH THIS FIELD/SYMBOL IS USED. ; 1223 ; THE MICROASSEMBLER COMPUTES THE SUMS OF ALL THE T1'S AND ALL THE T2'S ; 1224 ; SPECIFIED FOR FIELD/SYMBOL SPECIFICATIONS IN A WORD, AND USES THE MAX ; 1225 ; OF THE TWO SUMS AS THE DEFAULT VALUE FOR THE FIELD WHOSE DEFAULT ; 1226 ; MECHANISM IS "T". EXAMPLES: ; 1227 ; AD/=<12:17> ;FIELD DEFINITION IN WHICH FOLLOWING SYMBOLS EXIST ; 1228 ; XOR=31 ; 1229 ; A+B=6,1 ; 1230 ; HERE THE SYMBOLS "XOR" AND "A+B" ARE DEFINED FOR THE "AD" FIELD. ; 1231 ; TO THE ASSEMBLER, THEREFORE, WRITING "AD/XOR" MEANS PUT THE VALUE 31 ; 1232 ; INTO THE 6-BIT FIELD ENDING ON BIT 17 OF THE MICROWORD. THE SYMBOLS ; 1233 ; ARE CHOSEN FOR MNEMONIC SIGNIFICANCE, OF COURSE, SO ONE READING ; 1234 ; THE MICROCODE WOULD INTERPRET "AD/XOR" AS "THE OUTPUT OF AD SHALL BE THE ; 1235 ; EXCLUSIVE OR OF ITS A AND B INPUTS". SIMILIARLY, "AD/A+B" IS READ AS ; 1236 ; "AD PRODUCES THE SUM OF A AND B". THE SECOND PARAMETER IN THE DEFINITION ; 1237 ; OF "A+B" IS A CONTROL TO THE MICRO ASSEMBLER'S TIME-FIELD CALCULATION, ; 1238 ; WHICH TELLS THE ASSEMBLER THAT THIS OPERATION TAKES LONGER THAN THE ; 1239 ; BASIC CYCLE, AND THEREFORE THAT THE TIME FIELD SHOULD BE INCREASED. ; 1240 ; AR/=<24:26>D,0 ;FIELD DEFINITION FOR FOLLOWING SYMBOLS ; 1241 ; AR=0 ; 1242 ; AD=2 ; 1243 ; HERE THE SYMBOLS "AR" AND "AD" ARE DEFINED FOR THE FIELD NAMED ; 1244 ; "AR", WHICH CONTROLS THE AR MIXER. WE COULD WRITE AR/AR TO MEAN THAT ; 1245 ; THE AR MIXER SELECT INPUTS WOULD BE 0, WHICH IN THE ; 1246 ; HARDWARE SELECTS THE AR OUTPUT FOR RECIRCULATION TO THE REGISTER. IN ; 1247 ; PRACTICE, HOWEVER, WE WANT THIS TO BE THE DEFAULT CASE, SO THAT AR ; 1248 ; DOES NOT CHANGE UNLESS WE SPECIFICALLY REQUEST IT, SO THE FIELD ; 1249 ; DEFINITION SPECIFIES 0 AS THE DEFAULT VALUE OF THE FIELD. IF WE ; 1250 ; WANT AR LOADED FROM THE AD OUTPUT, WE WRITE "AR/AD" TO SET THE ; 1251 ; MIXER SELECTS TO PASS THE AD OUTPUT INTO THE AR. ; 1252 ; ; 1253 ;(3) LABEL DEFINITIONS ; 1254 ; A MICRO INSTRUCTION MAY BE LABELLED BY A SYMBOL FOLLOWED BY COLON ; 1255 ; PRECEDING THE MICROINSTRUCTION DEFINITION. THE ADDRESS OF THE ; 1256 ; MICROINSTRUCTION BECOMES THE VALUE OF THE SYMBOL IN THE FIELD NAMED "J". ; 1257 ; EXAMPLE: ; 1258 ; FOO: J/FOO ; 1259 ; THIS IS A MICROINSTRUCTION WHOSE "J" FIELD (JUMP ADDRESS) CONTAINS ; 1260 ; THE VALUE "FOO". IT ALSO DEFINES THE SYMBOL "FOO" TO BE THE ADDRESS ; 1261 ; OF ITSELF. THEREFORE, IF EXECUTED BY THE MICROPROCESSOR, IT WOULD ; 1262 ; LOOP ON ITSELF. ; 1263 ; ; 1264 ;(4) COMMENTS ; 1265 ; A SEMICOLON ANYWHERE ON A LINE CAUSES THE REST OF THE LINE ; 1266 ; TO BE IGNORED BY THE ASSEMBLER. THIS TEXT IS AN EXAMPLE OF COMMENTS. ; 1267 ; ; KL10 Microcode for TOPS-10 and TOPS-20 -- 18 Nov 1983 COPYRIGHT (C) 1984 DIGITAL EQUIPMENT CORPORATION V1(336) MICRO %34(270) Page 2-2 ; DEFINE.MIC[10,5351] 23:19 23-Nov-83 HOW TO READ THE MICROCODE -- FORMATS & CONSTRUCTS ; 1268 ;(5) MICROINSTRUCTION DEFINITION ; 1269 ; A WORD OF MICROCODE IS DEFINED BY SPECIFYING A FIELD NAME, ; 1270 ; FOLLOWED BY SLASH (/), FOLLOWED BY A VALUE. THE VALUE MAY BE A ; 1271 ; SYMBOL DEFINED FOR THAT FIELD, AN OCTAL DIGIT STRING, OR A DECIMAL ; 1272 ; DIGIT STRING (DISTINGUISHED BY THE FACT THAT IT CONTAINS "8" AND/OR ; 1273 ; "9" AND/OR IS TERMINATED BY A PERIOD). SEVERAL FIELDS MAY BE SPECIFIED ; 1274 ; IN ONE MICROINSTRUCTION BY SEPARATING FIELD/VALUE SPECIFICATIONS WITH ; 1275 ; COMMAS. EXAMPLE: ; 1276 ; ADB/BR,ADA/AR,AD/A+B,AR/AD ; 1277 ; THE FIELD NAMED "ADB" IS GIVEN THE VALUE NAMED "BR" (TO ; 1278 ; CAUSE THE MIXER ON THE B SIDE OF AD TO SELECT BR), FIELD "ADA" HAS VALUE ; 1279 ; "AR", FIELD "AD" HAS VALUE "A+B", AND FIELD "AR" HAS VALUE "AD". ; 1280 ; ; 1281 ;(6) CONTINUATION ; 1282 ; THE DEFINITION OF A MICROINSTRUCTION MAY CONTINUED ONTO TWO OR ; 1283 ; MORE LINES BY BREAKING IT AFTER ANY COMMA. IN OTHER WORDS, IF THE ; 1284 ; LAST NON-BLANK, NON-COMMENT CHARACTER ON A LINE IS A COMMA, THE ; 1285 ; INSTRUCTION SPECIFICATION IS CONTINUED ON THE FOLLOWING LINE. ; 1286 ; EXAMPLE: ; 1287 ; ADB/BR,ADA/AR, ;SELECT AR & BR AS AD INPUTS ; 1288 ; AD/A+B,AR/AD ;TAKE THE SUM INTO AR ; 1289 ; BY CONVENTION, CONTINUATION LINES ARE INDENTED AN EXTRA TAB. ; 1290 ; ; 1291 ;(7) MACROS ; 1292 ; A MACRO IS A SYMBOL WHOSE VALUE IS ONE OR MORE FIELD/VALUE ; 1293 ; SPECIFICATIONS AND/OR MACROS. A MACRO DEFINITION IS A LINE CONTAINING ; 1294 ; THE MACRO NAME FOLLOWED BY A QUOTED STRING WHICH IS THE VALUE OF THE ; 1295 ; MACRO. EXAMPLE: ; 1296 ; AR_AR+BR "ADB/BR,ADA/AR,AD/A+B,AR/AD" ; 1297 ; THE APPEARANCE OF A MACRO IN A MICROINSTRUCTION DEFINITION IS EQUIVALENT ; 1298 ; TO THE APPEARANCE OF ITS VALUE. MACROS FOR VARIOUS FUNCTIONS ; 1299 ; ARE DEFINED IN "MACRO.MIC". ; 1300 ; ; 1301 ;(8) PSEUDO OPS ; 1302 ; THE MICRO ASSEMBLER HAS 10 PSEUDO-OPERATORS: ; 1303 ;.DCODE AND .UCODE SELECT THE RAM INTO WHICH SUBSEQUENT MICROCODE WILL ; 1304 ;BE LOADED, AND THEREFORE THE FIELD DEFINITIONS AND MACROS WHICH ARE ; 1305 ;MEANINGFUL IN SUBSEQUENT MICROCODE ; 1306 ;.TITLE DEFINES A STRING OF TEXT TO APPEAR IN THE PAGE HEADER, AND ; 1307 ;.TOC DEFINES AN ENTRY FOR THE TABLE OF CONTENTS AT THE BEGINNING. ; 1308 ;.SET DEFINES THE VALUE OF A CONDITIONAL ASSEMBLY PARAMETER, ; 1309 ;.CHANGE REDEFINES A CONDITIONAL ASSEMBLY PARAMETER, ; 1310 ;.DEFAULT ASSIGNS A VALUE TO AN UNDEFINED PARAMETER. ; 1311 ;.IF ENABLES ASSEMBLY IF THE VALUE OF THE PARAMETER IS NOT ZERO, ; 1312 ;.IFNOT ENABLES ASSEMBLY IF THE PARAMETER VALUE IS ZERO, AND ; 1313 ;.ENDIF RE-ENABLES ASSEMBLY IF SUPPRESSED BY THE PARAMETER NAMED. ; 1314 ; ; 1315 ;(9) LOCATION CONTROL ; 1316 ; A MICROINSTRUCTION "LABELLED" WITH A NUMBER IS ASSIGNED TO THAT ; 1317 ; ADDRESS. ; 1318 ; THE CHARACTER "=" AT THE BEGINNING OF A LINE, FOLLOWED BY ; 1319 ; A STRING OF 0'S, 1'S, AND/OR *'S, SPECIFIES A CONSTRAINT ON THE ; 1320 ; ADDRESS OF FOLLOWING MICROINSTRUCTIONS. THE NUMBER OF CHARACTERS ; 1321 ; IN THE CONSTRAINT STRING (EXCLUDING THE "=") IS THE NUMBER OF LOW-ORDER ; 1322 ; BITS CONSTRAINED IN THE ADDRESS. THE MICROASSEMBLER ATTEMPTS TO FIND ; 1323 ; AN UNUSED LOCATION WHOSE ADDRESS HAS 0 BITS IN THE POSITIONS ; KL10 Microcode for TOPS-10 and TOPS-20 -- 18 Nov 1983 COPYRIGHT (C) 1984 DIGITAL EQUIPMENT CORPORATION V1(336) MICRO %34(270) Page 2-3 ; DEFINE.MIC[10,5351] 23:19 23-Nov-83 HOW TO READ THE MICROCODE -- FORMATS & CONSTRUCTS ; 1324 ; CORRESPONDING TO 0'S IN THE CONSTRAINT STRING AND 1 BITS WHERE THE ; 1325 ; CONSTRAINT HAS 1'S. ASTERISKS DENOTE "DON'T CARE" BIT POSITIONS. ; 1326 ; IF THERE ARE ANY 0'S IN THE CONSTRAINT STRING, THE CONSTRAINT ; 1327 ; IMPLIES A BLOCK OF <2**N> MICROWORDS, WHERE N IS THE NUMBER OF 0'S ; 1328 ; IN THE STRING. ALL LOCATIONS IN THE BLOCK WILL HAVE 1'S IN THE ADDRESS ; 1329 ; BITS CORRESPONDING TO 1'S IN THE STRING, AND BIT POSITIONS DENOTED BY *'S ; 1330 ; WILL BE THE SAME IN ALL LOCATIONS OF THE BLOCK. ; 1331 ; IN SUCH A CONSTRAINT BLOCK, THE DEFAULT ADDRESS PROGRESSION IS ; 1332 ; COUNTING IN THE "0" POSITIONS OF THE CONSTRAINT STRING, BUT A NEW ; 1333 ; CONSTRAINT STRING OCCURING WITHIN A BLOCK MAY FORCE SKIPPING OVER ; 1334 ; SOME LOCATIONS OF THE BLOCK. WITHIN A BLOCK, A NEW CONSTRAINT ; 1335 ; STRING DOES NOT CHANGE THE PATTERN OF DEFAULT ADDRESS PROGRESSION, IT ; 1336 ; MERELY ADVANCES THE LOCATION COUNTER OVER THOSE LOCATIONS. THE ; 1337 ; MICROASSEMBLER WILL LATER FILL THEM IN. ; 1338 ; A NULL CONSTRAINT STRING ("=" FOLLOWED BY ANYTHING BUT "0", ; 1339 ; "1", OR "*") SERVES TO TERMINATE A CONSTRAINT BLOCK. ; 1340 ; EXAMPLES: ; 1341 ; =0 ; 1342 ; THIS SPECIFIES THAT THE LOW-ORDER ADDRESS BIT MUST BE ZERO-- ; 1343 ; THE MICROASSEMBLER FINDS AN EVEN-ODD PAIR OF LOCATIONS, AND PUTS ; 1344 ; THE NEXT TWO MICROINSTRUCTIONS INTO THEM. ; 1345 ; =11 ; 1346 ; THIS SPECIFIES THAT THE TWO LOW-ORDER BITS OF THE ADDRESS MUST ; 1347 ; BOTH BE ONES. SINCE THERE ARE NO 0'S IN THIS CONSTRAINT, THE ; 1348 ; ASSEMBLER FINDS ONLY ONE LOCATION MEETING THE CONSTRAINT. ; 1349 ; =0***** ; 1350 ; THIS SPECIFIES AN ADDRESS IN WHICH THE "40" BIT IS ZERO. DUE ; 1351 ; TO THE IMPLEMENTATION OF THIS FEATURE IN THE ASSEMBLER, THE DEFAULT ; 1352 ; ADDRESS PROGRESSION APPLIES ONLY TO THE LOW-ORDER 5 BITS, SO THIS ; 1353 ; CONSTRAINT FINDS ONE WORD IN WHICH THE "40" BIT IS ZERO, AND DOES ; 1354 ; NOT ATTEMPT TO FIND ONE IN WHICH THAT BIT IS A ONE. ; 1355 ;THIS LIMITATION HAS BEEN CHANGED WITH NEWER ASSEMBLER VERSIONS. ; 1356 ;HOWEVER NONE OF THE LOCATIONS IN THE MICROCODE REQUIRE ANYTHING BUT THE ; 1357 ;CONSTRAINT MENTIONED ABOVE. ; 1358 ; KL10 Microcode for TOPS-10 and TOPS-20 -- 18 Nov 1983 COPYRIGHT (C) 1984 DIGITAL EQUIPMENT CORPORATION V1(336) MICRO %34(270) Page 3 ; DEFINE.MIC[10,5351] 23:19 23-Nov-83 MICROCODE LISTING TEMPLATE ; 1359 .TOC "MICROCODE LISTING TEMPLATE" ; 1360 ;HERE IS A TEMPLATE WHICH CAN BE USED WITH THE MICROCODE ; 1361 ; LISTING TO IDENTIFY FIELDS IN THE OUTPUT -- ; 1362 ; 1363 ; 1364 ; ---- ---- ---- ---- ---- ---- ---- ---- ; 1365 ; [--] [--] []!! !!!! !!!! !![] [][] ![-] ; 1366 ; ! ! !!! !!!! !!!! !! ! ! ! ! + # = MAGIC NUMBERS ; 1367 ; ! ! !!! !!!! !!!! !! ! ! ! + MARK = SCOPE SYNC ; 1368 ; ! ! !!! !!!! !!!! !! ! ! ! ; 1369 ; ! ! !!! !!!! !!!! !! ! ! + CALL, DISP/SPEC = SPEC FUNCTIONS ; 1370 ; ! ! !!! !!!! !!!! !! ! + SKIP/COND = SPECIAL FUNCTIONS ; 1371 ; ! ! !!! !!!! !!!! !! ! ; 1372 ; ! ! !!! !!!! !!!! !! + TIME, MEM = UINST TIME & MEM FUNCTION ; 1373 ; ! ! !!! !!!! !!!! !+ VMA = VMA INPUT SELECT ; 1374 ; ! ! !!! !!!! !!!! + SH/ARMM = SH FUNCTION / ARMM SELECT ; 1375 ; ! ! !!! !!!! !!!! ; 1376 ; ! ! !!! !!!! !!!+ SC, FE = SC INPUT SELECT & FE LOAD ; 1377 ; ! ! !!! !!!! !!+ SCADB = SELECT FOR SCAD "B" INPUT ; 1378 ; ! ! !!! !!!! !+ SCADA = ENABLE AND SELECT FOR SCAD "A" INPUT ; 1379 ; ! ! !!! !!!! + SCAD = SC/FE ADDER FUNCTION ; 1380 ; ! ! !!! !!!! ; 1381 ; ! ! !!! !!!+ FM ADR = FAST MEMORY ADDRESS SELECT ; 1382 ; ! ! !!! !!+ BR, BRX, MQ = LOAD BR & BRX, SEL FOR MQ ; 1383 ; ! ! !!! !+ ARX = SELECT FOR ARX INPUT ; 1384 ; ! ! !!! + AR = SELECT FOR AR INPUT ; 1385 ; ! ! !!! ; 1386 ; ! ! !!+ ADB = SELECT FOR ADDER "B" INPUT ; 1387 ; ! ! !+ ADA = SELECT AND ENABLE FOR ADDER "A" INPUT ; 1388 ; ! ! + AD = OPERATION IN ADDER AND ADDER EXTENSION ; 1389 ; ! ! ; 1390 ; ! + J = BASE ADDRESS TO WHICH THIS MICROINSTRUCTION JUMPS ; 1391 ; ! ; 1392 ; + LOCATION IN CRAM INTO WHICH THIS WORD IS LOADED ; 1393 ; ; 1394 ; U/V = MICRO INSTRUCTION FOR CRAM ; 1395 ; 1396 ;******************************************************************* ; 1397 ; 1398 ; D = WORD FOR DRAM ; 1399 ; ; 1400 ; + LOCATION IN DRAM INTO WHICH THIS WORD IS LOADED ; 1401 ; ! ; 1402 ; ! + A = OPERAND ACCESS CONTROL ; 1403 ; ! !+ B = INSTRUCTION "MODE" ; 1404 ; ! !! + P = PARITY FOR THIS WORD ; 1405 ; ! !! ! ; 1406 ; ! !! ! + J = ADDRESS OF HANDLER FOR THIS INSTRUCTION ; 1407 ; [--] !! ! [--] ; 1408 ; ---- ---- ---- ; 1409 ; KL10 Microcode for TOPS-10 and TOPS-20 -- 18 Nov 1983 COPYRIGHT (C) 1984 DIGITAL EQUIPMENT CORPORATION V1(336) MICRO %34(270) Page 4 ; DEFINE.MIC[10,5351] 23:19 23-Nov-83 KL10 INSTRUCTION OPCODE MAP ; 1410 .TOC "KL10 INSTRUCTION OPCODE MAP" ; 1411 ; 1412 ; 0 1 2 3 4 5 6 7 ; 1413 ;100 UUO UUO EFAD EFSB JSYS ADJSP EFMP EFDV ; 1414 ;110 DFAD DFSB DFMP DFDV DADD DSUB DMUL DDIV ; 1415 ;120 DMOVE DMOVN FIX EXTEND DMOVEM DMOVNM FIXR FLTR ; 1416 ;130 UFA DFN FSC IBP ILDB LDB IDPB DPB ; 1417 ;140 FAD FADL FADM FADB FADR FADRI FADRM FADRB ; 1418 ;150 FSB FSBL FSBM FSBB FSBR FSBRI FSBRM FSBRB ; 1419 ;160 FMP FMPL FMPM FMPB FMPR FMPRI FMPRM FMPRB ; 1420 ;170 FDV FDVL FDVM FDVB FDVR FDVRI FDVRM FDVRB ; 1421 ; 0 1 2 3 4 5 6 7 ; 1422 ;200 MOVE MOVEI MOVEM MOVES MOVS MOVSI MOVSM MOVSS ; 1423 ;210 MOVN MOVNI MOVNM MOVNS MOVM MOVMI MOVMM MOVMS ; 1424 ;220 IMUL IMULI IMULM IMULB MUL MULI MULM MULB ; 1425 ;230 IDIV IDIVI IDIVM IDIVB DIV DIVI DIVM DIVB ; 1426 ;240 ASH ROT LSH JFFO ASHC ROTC LSHC UUO ; 1427 ;250 EXCH BLT AOBJP AOBJN JRST JFCL XCT MAP ; 1428 ;260 PUSHJ PUSH POP POPJ JSR JSP JSA JRA ; 1429 ;270 ADD ADDI ADDM ADDB SUB SUBI SUBM SUBB ; 1430 ; 0 1 2 3 4 5 6 7 ; 1431 ;300 CAI CAIL CAIE CAILE CAIA CAIGE CAIN CAIG ; 1432 ;310 CAM CAML CAME CAMLE CAMA CAMGE CAMN CAMG ; 1433 ;320 JUMP JUMPL JUMPE JUMPLE JUMPA JUMPGE JUMPN JUMPG ; 1434 ;330 SKIP SKIPL SKIPE SKIPLE SKIPA SKIPGE SKIPN SKIPG ; 1435 ;340 AOJ AOJL AOJE AOJLE AOJA AOJGE AOJN AOJG ; 1436 ;350 AOS AOSL AOSE AOSLE AOSA AOSGE AOSN AOSG ; 1437 ;360 SOJ SOJL SOJE SOJLE SOJA SOJGE SOJN SOJG ; 1438 ;370 SOS SOSL SOSE SOSLE SOSA SOSGE SOSN SOSG ; 1439 ; 0 1 2 3 4 5 6 7 ; 1440 ;400 SETZ SETZI SETZM SETZB AND ANDI ANDM ANDB ; 1441 ;410 ANDCA ANDCAI ANDCAM ANDCAB SETM SETMI SETMM SETMB ; 1442 ;420 ANDCM ANDCMI ANDCMM ANDCMB SETA SETAI SETAM SETAB ; 1443 ;430 XOR XORI XORM XORB IOR IORI IORM IORB ; 1444 ;440 ANDCB ANDCBI ANDCBM ANDCBB EQV EQVI EQVM EQVB ; 1445 ;450 SETCA SETCAI SETCAM SETCAB ORCA ORCAI ORCAM ORCAB ; 1446 ;460 SETCM SETCMI SETCMM SETCMB ORCM ORCMI ORCMM ORCMB ; 1447 ;470 ORCB ORCBI ORCBM ORCBB SETO SETOI SETOM SETOB ; 1448 ; 0 1 2 3 4 5 6 7 ; 1449 ;500 HLL HLLI HLLM HLLS HRL HRLI HRLM HRLS ; 1450 ;510 HLLZ HLLZI HLLZM HLLZS HRLZ HRLZI HRLZM HRLZS ; 1451 ;520 HLLO HLLOI HLLOM HLLOS HRLO HRLOI HRLOM HRLOS ; 1452 ;530 HLLE HLLEI HLLEM HLLES HRLE HRLEI HRLEM HRLES ; 1453 ;540 HRR HRRI HRRM HRRS HLR HLRI HLRM HLRS ; 1454 ;550 HRRZ HRRZI HRRZM HRRZS HLRZ HLRZI HLRZM HLRZS ; 1455 ;560 HRRO HRROI HRROM HRROS HLRO HLROI HLROM HLROS ; 1456 ;570 HRRE HRREI HRREM HRRES HLRE HLREI HLREM HLRES ; 1457 ; 0 1 2 3 4 5 6 7 ; 1458 ;600 TRN TLN TRNE TLNE TRNA TLNA TRNN TLNN ; 1459 ;610 TDN TSN TDNE TSNE TDNA TSNA TDNN TSNN ; 1460 ;620 TRZ TLZ TRZE TLZE TRZA TLZA TRZN TLZN ; 1461 ;630 TDZ TSZ TDZE TSZE TDZA TSZA TDZN TSZN ; 1462 ;640 TRC TLC TRCE TLCE TRCA TLCA TRCN TLCN ; 1463 ;650 TDC TSC TDCE TSCE TDCA TSCA TDCN TSCN ; 1464 ;660 TRO TLO TROE TLOE TROA TLOA TRON TLON ; 1465 ;670 TDO TSO TDOE TSOE TDOA TSOA TDON TSON ; KL10 Microcode for TOPS-10 and TOPS-20 -- 18 Nov 1983 COPYRIGHT (C) 1984 DIGITAL EQUIPMENT CORPORATION V1(336) MICRO %34(270) Page 5 ; DEFINE.MIC[10,5351] 23:19 23-Nov-83 CONTROL RAM DEFINITIONS -- J, AD ; 1466 .TOC "CONTROL RAM DEFINITIONS -- J, AD" ; 1467 ;FIELDS ARRANGED FOR READABILITY, NOT COMPACTNESS ; 1468 ; IN THE PROCESSOR, BITS ARE SCATTERED IN ANOTHER ORDER ; 1469 ; 1470 U0/=<0:0>D,0 ;BIT 0 UNUSED ; 1471 J/=<1:11>+ ;SYMBOLS WILL BE DEFINED BY TAGS (CRA1&CRA2) ; 1472 ; 1473 ;MAIN ADDER CONTROLS. Bit 0 = carry in, bit 1 = boolean operation ; 1474 ; Bits 2-5 are S8-S1 of the 10181 ALU chip. For normal arithmetic, ; 1475 ; the AD and ADX are separated unless SPEC/AD LONG or equivalent is given. ; 1476 ; 1477 ; 1478 AD/=<12:17> ; (EDP3, EXCEPT CARRY IN, ON CTL1) ; 1479 A+1=40,1 ; 1480 A+XCRY=00,1 ; 1481 ; A+ANDCB=01,1 ; 1482 ; A+AND=02,1 ; 1483 A*2=03,1 ; 1484 A*2+1=43,1 ; 1485 ; OR+1=44,1 ; 1486 ; OR+ANDCB=05,1 ; 1487 A+B=06,1 ; 1488 A+B+1=46,1 ; 1489 ; A+OR=07,1 ; 1490 ORCB+1=50,1 ; 1491 A-B-1=11,1 ; 1492 A-B=51,1 ; 1493 ; AND+ORCB=52,1 ; 1494 ; A+ORCB=53,1 ; 1495 XCRY-1=54,1 ; 1496 ; ANDCB-1=15,1 ; 1497 ; AND-1=16,1 ; 1498 A-1=17,1 ; 1499 ;ADDER LOGICAL FUNCTIONS ; 1500 SETCA=20 ; 1501 ORC=21 ;NAND ; 1502 ORCA=22 ; 1503 1S=23 ; 1504 ANDC=24 ;NOR ; 1505 NOR=24 ; 1506 SETCB=25 ; 1507 EQV=26 ; 1508 ORCB=27 ; 1509 ANDCA=30 ; 1510 XOR=31 ; 1511 B=32 ; 1512 OR=33 ; 1513 0S=34 ; 1514 ANDCB=35 ; 1515 AND=36 ; 1516 A=37 ; 1517 ;BOOLEAN FUNCTIONS FOR WHICH CRY0 IS INTERESTING ; 1518 CRY A EQ -1=60,1 ;GENERATE CRY0 IF A=1S, AD=SETCA ; 1519 CRY A.B#0=36,1 ;CRY 0 IF A&B NON-ZERO, AD=AND ; 1520 CRY A#0=37,1 ;GENERATE CRY0 IF A .NE. 0, AD=A ; 1521 CRY A GE B=71,1 ;CRY0 IF A .GE. B, UNSIGNED; AD=XOR ; KL10 Microcode for TOPS-10 and TOPS-20 -- 18 Nov 1983 COPYRIGHT (C) 1984 DIGITAL EQUIPMENT CORPORATION V1(336) MICRO %34(270) Page 6 ; DEFINE.MIC[10,5351] 23:19 23-Nov-83 CONTROL RAM DEFINITIONS -- DATA PATH MIXERS ; 1522 .TOC "CONTROL RAM DEFINITIONS -- DATA PATH MIXERS" ; 1523 ; 1524 ADA/=<18:20> ; (EDP3) ; 1525 AR=0 ; 1526 ARX=1 ; 1527 MQ=2 ; 1528 PC=3 ; 1529 ADA EN/=<18:18> ;ADA ENABLE ALSO ENABLES ADXA (EDP3) ; 1530 EN=0 ; 1531 0S=1 ; 1532 U21/=<21:21>D,0 ;BIT 21 UNUSED ; 1533 ADB/=<22:23> ;CONTROLS ADB AND ADXB (EDP3) ; 1534 FM=0,,1 ;MUST HAVE TIME FOR PARITY CHECK ; 1535 BR*2=1 ; 1536 BR=2 ; 1537 AR*4=3 ; 1538 U23/=<23:23>D,1 ;PREVENT DEFAULT SELECTION OF FM ; 1539 ;FORCE IT TO TAKE ONE OF THE SHORTER ; 1540 ;PATHS IF FM NOT NEEDED ALSO DISABLES ; 1541 ;PARITY CHECKING LOGIC ; 1542 ; 1543 ;REGISTER INPUTS ; 1544 ; 1545 AR/=<24:26>D,0 ; (EDP1) ; 1546 AR=0 ; 1547 ARMM=0 ;REQUIRES SPECIAL FUNCTION ; 1548 CACHE=1 ;ORDINARILY SELECTED BY HWARE ; 1549 AD=2 ; 1550 EBUS=3 ; 1551 SH=4 ; 1552 AD*2=5 ; 1553 ADX=6 ; 1554 AD*.25=7 ; 1555 ARX/=<27:29>D,0 ; (EDP2) ; 1556 ; ARX=0 ;BY DEFAULT ; 1557 CACHE=1 ;ORDINARILY BY MBOX RESP ; 1558 AD=2 ; 1559 MQ=3 ; 1560 SH=4 ; 1561 ADX*2=5 ; 1562 ADX=6 ; 1563 ADX*.25=7 ; 1564 BR/=<30:30>D,0 ;DEFAULT TO RECIRCULATE (EDP4) ; 1565 AR=1 ; 1566 BRX/=<31:31>D,0 ;DEFAULT TO RECIRCULATE (EDP4) ; 1567 ARX=1 ; 1568 MQ/=<32:32>D,0 ;DEFAULT TO RECIRCULATE (EDP2) ; 1569 SH=1 ;LOAD FROM SHIFT MATRIX ; 1570 MQ*2=0 ;WITH SPEC/MQ SHIFT ; 1571 MQ*.25=1 ;WITH SPEC/MQ SHIFT ; 1572 MQ SEL=0 ;WITH COND/REG CTL ; 1573 MQM SEL=1 ;WITH COND/REG CTL ; 1574 ; KL10 Microcode for TOPS-10 and TOPS-20 -- 18 Nov 1983 COPYRIGHT (C) 1984 DIGITAL EQUIPMENT CORPORATION V1(336) MICRO %34(270) Page 7 ; DEFINE.MIC[10,5351] 23:19 23-Nov-83 CONTROL RAM DEFINITIONS -- DATA PATH MIXERS ; 1575 ;FMADR SELECTS THE SOURCE OF THE FAST MEMORY ADDRESS, ; 1576 ; RATHER THAN PROVIDING THE ADDRESS ITSELF ; 1577 ; 1578 FMADR/=<33:35> ; (APR4&APR5) ; 1579 AC0=0 ;IR 9-12 ; 1580 AC1=1 ;+1 MOD 16 ; 1581 XR=2 ;ARX 14-17 ; 1582 VMA=3 ;VMA 32-35 ; 1583 AC2=4 ;+2 MOD 16 ; 1584 AC3=5 ;+3 MOD 16 ;;1585 .IFNOT/MODEL.B ;;1586 AC4=6 ;CURRENT BLOCK, AC+4 ;;1587 ac5=7 ;current block, ac+5 ; 1588 .IF/MODEL.B ; 1589 AC+#=6 ;CURRENT BLOCK, AC+ MAGIC # ; 1590 .ENDIF/MODEL.B ; 1591 #B#=7 ;BLOCK AND AC SELECTED BY # FIELD ; 1592 ; 1593 .TOC "CONTROL RAM DEFINITIONS -- 10-BIT LOGIC" ; 1594 ; 1595 SCAD/=<36:38> ; (SCD1) ; 1596 A=0 ; 1597 A-B-1=1 ; 1598 A+B=2 ; 1599 A-1=3 ; 1600 A+1=4 ; 1601 A-B=5 ; 1602 OR=6 ; 1603 AND=7 ; 1604 SCADA/=<39:41> ; (SCD1) ; 1605 FE=0 ; 1606 AR0-5=1 ;BYTE POINTER P FIELD ; 1607 AR EXP=2 ; XOR ; 1608 #=3 ;SIGN EXTENDED WITH #00 ; 1609 SCADA EN/=<39:39> ; (SCD1) ; 1610 0S=1 ; 1611 U42/=<42:42>D,0 ;BIT 42 UNUSED ; 1612 SCADB/=<43:44> ; (SCD1) ; 1613 SC=0 ; 1614 AR6-11=1 ;BYTE POINTER S FIELD ; 1615 AR0-8=2 ; 1616 #=3 ;NO SIGN EXTENSION ; 1617 U45/=<45:45>D,0 ;BIT 45 UNUSED ; 1618 SC/=<46:46>D,0 ;RECIRCULATE BY DEFAULT (SCD2) ; 1619 FE=0 ;WITH SCM ALT ; 1620 SCAD=1 ; 1621 AR SHIFT=1 ;WITH SCM ALT ;AR 18, 28-35 ; 1622 FE/=<47:47>D,0 ;RECIRCULATE BY DEFAULT (SCD2) ; 1623 SCAD=1 ; 1624 U48/=<48:48>D,0 ;BIT 48 UNUSED ; 1625 ; KL10 Microcode for TOPS-10 and TOPS-20 -- 18 Nov 1983 COPYRIGHT (C) 1984 DIGITAL EQUIPMENT CORPORATION V1(336) MICRO %34(270) Page 8 ; DEFINE.MIC[10,5351] 23:19 23-Nov-83 CONTROL RAM DEFINITIONS -- SHIFT, ARMM, VMA, TIME ; 1626 .TOC "CONTROL RAM DEFINITIONS -- SHIFT, ARMM, VMA, TIME" ; 1627 ; 1628 SH/=<49:50> ; (SH1) ; 1629 SHIFT AR!ARX=0 ;LEFT BY (SC) ; 1630 AR=1 ; 1631 ARX=2 ; 1632 AR SWAP=3 ;HALVES SWAPPED ; 1633 ARMM/=<49:50> ;SAME BITS AS SH CONTROL (SCD3) ; 1634 #=0 ;MAGIC # 0-8 TO AR 0-8 ; 1635 EXP_SIGN=1 ;AR1-8 _ AR0 ; 1636 SCAD EXP=2 ;AR0-8_SCAD ; 1637 SCAD POS=3 ;AR0-5_SCAD ; 1638 .IF/MODEL.B ; 1639 VMAX/=<49:50> ;SAME BITS AS SH CONTROL (VMA4) ; 1640 VMAX=0 ;VMA SECTION # ; 1641 PC SEC=1 ;PC SECTION # ; 1642 PREV SEC=2 ;PREVIOUS CONTEXT SECT ; 1643 AD12-17=3 ; 1644 .ENDIF/MODEL.B ; 1645 U51/=<51:51>D,0 ;BIT 51 UNUSED ; 1646 VMA/=<52:53>D,0 ;ALSO CONTROLLED BY SPECIAL FUNCTIONS ; 1647 VMA=0 ;BY DEFAULT ; 1648 PC=1 ;MAY BE OVERRIDDEN BY MCL LOGIC TO LOAD FROM AD ; 1649 LOAD=1 ; IF WE KNOW IT WILL BE OVERRIDDEN, USE THIS ; 1650 PC+1=2 ; 1651 AD=3 ;ENTIRE VMA, INCLUDING SECTION ; 1652 TIME/=<54:55>T ;CONTROLS MINIMUM MICROINSTRUCTION EXECUTION ; 1653 ; TIME, COUNTING MBOX CLOCK TICKS (CLK) ; 1654 ;ASSEMBLER GENERALLY TAKES CARE OF THIS ; 1655 2T=0 ;2 TICKS ; 1656 3T=1 ;3 TICKS ; 1657 4T=2 ;4 TICKS ; 1658 5T=3 ;5 TICKS (COND/DIAG FUNC & #00, --> .5 USEC) ; 1659 ; KL10 Microcode for TOPS-10 and TOPS-20 -- 18 Nov 1983 COPYRIGHT (C) 1984 DIGITAL EQUIPMENT CORPORATION V1(336) MICRO %34(270) Page 9 ; DEFINE.MIC[10,5351] 23:19 23-Nov-83 CONTROL RAM DEFINITIONS -- MEM SPECIAL FUNCTIONS ; 1660 .TOC "CONTROL RAM DEFINITIONS -- MEM SPECIAL FUNCTIONS" ; 1661 ; 1662 MEM/=<56:59>D,0 ; (MCL1) ; 1663 ; NOP=0 ;DEFAULT ; 1664 ARL IND=1 ;CONTROL AR LEFT MUX FROM # FIELD ; 1665 MB WAIT=2 ;WAIT FOR MBOX RESP IF PENDING ; 1666 A RD=4 ;OPERAND READ ; 1667 B WRITE=5 ;CONDITIONAL WRITE ON DRAM B 01 ; 1668 FETCH=6 ;LOAD NEXT INSTR TO ARX (CONTROL BY #) ; 1669 REG FUNC=7 ;MBOX REGISTER FUNCTIONS ; 1670 LOAD AR=12 ; 1671 LOAD ARX=13 ; 1672 WRITE=16 ;FROM AR TO MEMORY ; 1673 .IF/MODEL.B ; 1674 RESTORE VMA=3 ;AD FUNC WITHOUT GENERATING A REQUEST ; 1675 AD FUNC=10 ;FUNCTION LOADED FROM AD LEFT ; 1676 EA CALC=11 ;FUNCTION DECODED FROM # FIELD ; 1677 RW=14 ;READ, TEST WRITABILITY ; 1678 RPW=15 ;READ-PAUSE-WRITE ; 1679 IFET=17 ;UNCONDITIONAL FETCH ;;1680 .IFNOT/MODEL.B ;OLD-STYLE MCL BOARD ;;1681 SEC 0=3 ;CLEAR VMAX ;;1682 A IND=10 ;A-TYPE INDIRECT ;;1683 BYTE IND=11 ;BYTE-TYPE INDIRECT ;;1684 AD FUNC=14 ;FUNCTION FROM AD LEFT ;;1685 BYTE RD=15 ;BYTE READ TO BOTH AR AND ARX ;;1686 RPW=17 ;LOAD AR WITH RPW CYCLE ; 1687 .ENDIF/MODEL.B ; 1688 ; KL10 Microcode for TOPS-10 and TOPS-20 -- 18 Nov 1983 COPYRIGHT (C) 1984 DIGITAL EQUIPMENT CORPORATION V1(336) MICRO %34(270) Page 10 ; DEFINE.MIC[10,5351] 23:19 23-Nov-83 CONTROL RAM DEFINITIONS -- SKIP/COND SPECIAL FUNCTIONS ; 1689 .TOC "CONTROL RAM DEFINITIONS -- SKIP/COND SPECIAL FUNCTIONS" ; 1690 ; 1691 SKIP/=<60:65>D,0 ;MICRO-PROGRAM SKIPS ; 1692 ; 40-57 DECODED ON (CRA2) ; 1693 ; SPARE=40 ; 1694 EVEN PAR=41,,1 ;AR PARITY IS EVEN ; 1695 BR0=42 ;BR BIT 00 ; 1696 ARX0=43 ;ARX BIT 00 ; 1697 AR18=44 ;AR BIT 18 ; 1698 AR0=45 ;AR BIT 00 ; 1699 AC#0=46 ;IR9-12 .EQ. 0 ; 1700 SC0=47 ;SC BIT 00 ;;1701 .IFNOT/MODEL.B ;;1702 SC .LT. 36=50 ; 1703 .IF/MODEL.B ; 1704 PC SEC0=50 ; 1705 .ENDIF/MODEL.B ; 1706 SCAD0=51,,1 ;SIGN OF SCAD OUTPUT ; 1707 SCAD#0=52,,1 ;SCAD OUTPUT IS NON-ZERO ; 1708 ADX0=53,1 ;ADDER EXTENSION BIT 00 ; 1709 AD CRY0=54,1 ;CARRY OUT OF AD BIT -2 (BOOLE IGNORED) ; 1710 AD0=55,1 ;ADDER BIT 00 ; 1711 AD#0=56,1 ;AD BITS 00-35 CONTAIN SOME ONES ; 1712 .IF/MODEL.B ; 1713 -LOCAL AC ADDR=57 ;VMA18-31 =0 ON LOCAL REF IN SEC >1 ; 1714 .ENDIF/MODEL.B ; 1715 ; 60-77 DECODED ON (CON2) ; 1716 FETCH=60 ;VMA FETCH (LAST CYCLE WAS A FETCH) ; 1717 KERNEL=61 ;PC IS IN KERNEL MODE ; 1718 USER=62 ;PC IS IN USER MODE ; 1719 PUBLIC=63 ;PC IS PUBLIC (INCLUDING SUPER) ; 1720 RPW REF=64 ;MIDDLE OF READ-PAUSE-WRITE CYCLE ; 1721 PI CYCLE=65 ;PI CYCLE IN PROGRESS ; 1722 -EBUS GRANT=66 ;PI HASN'T RELEASED BUS FOR CPU USE ; 1723 -EBUS XFER=67 ;NO TRANSFER RECIEVED FROM DEVICE ; 1724 INTRPT=70 ;AN INTERRUPT REQUEST WAITING FOR SERVICE ; 1725 -START=71 ;NO CONTINUE BUTTON ; 1726 RUN=72 ;PROCESSOR NOT HALTED ; 1727 IO LEGAL=73 ;KERNEL, PI CYCLE, USER IOT, OR DEVICE .GE. 740 ; 1728 P!S XCT=74 ;PXCT OR SXCT ; 1729 .IF/MODEL.B ; 1730 -VMA SEC0=75 ;VMA SECTION NUMBER (13-17) IS NOT ZERO ; 1731 .ENDIF/MODEL.B ; 1732 AC REF=76,,1 ;VMA .LT.20 ON READ OR WRITE ; 1733 -MTR REQ=77 ;INTERRUPT REQUEST NOT DUE TO METER ; 1734 ; KL10 Microcode for TOPS-10 and TOPS-20 -- 18 Nov 1983 COPYRIGHT (C) 1984 DIGITAL EQUIPMENT CORPORATION V1(336) MICRO %34(270) Page 11 ; DEFINE.MIC[10,5351] 23:19 23-Nov-83 CONTROL RAM DEFINITIONS -- SKIP/COND SPECIAL FUNCTIONS ; 1735 ;SKIP/COND FIELD CONTINUED ; 1736 ; 1737 COND/=<60:65>D,0 ;NON-SKIP SPECIAL FUNCTIONS ; 1738 ;0-7 DECODED ON (CTL2) ; 1739 ; NOP=0 ;BY DEFAULT ; 1740 LD AR0-8=1 ; 1741 LD AR9-17=2 ; 1742 LD AR18-35=3 ; 1743 AR CLR=4 ; 1744 ARX CLR=5 ; 1745 ARL IND=6 ;CONTROL AR LEFT, CALL, AND CLEAR BITS FROM # ; 1746 REG CTL=7 ;CONTROL AR LOAD, EXP TST, AND MQ FROM # ; 1747 ; 10-37 DECODED ON (CON1) ; 1748 FM WRITE=10 ;WRITE AR INTO CURRENTLY ADDRESSED FM LOC ; 1749 PCF_#=11 ;SET PC FLAGS FROM # FIELD ; 1750 FE SHRT=12 ;SHIFT FE RIGHT 1 ; 1751 AD FLAGS=13 ;SET PC CRY0, CRY1, OVRFLO, TRAP1 AS APPROPRIATE ; 1752 LOAD IR=14 ;LATCH AD OR CACHE DATA INTO IR ; 1753 SPEC INSTR=15 ;SET/CLR SXCT, PXCT, PICYC, TRAP INSTR FLAGS ; 1754 SR_#=16 ;CONTROL FOR STATE REGISTER ; 1755 SEL VMA=17 ;READ VMA THROUGH ADA/PC ; 1756 DIAG FUNC=20 ;SELECT DIAGNOSTIC INFO ONTO EBUS ; 1757 EBOX STATE=21 ;SET STATE FLOPS ; 1758 EBUS CTL=22 ;I/O FUNCTIONS ; 1759 MBOX CTL=23 ; 1760 ; SPARE=24 ; 1761 .IF/MODEL.B ; 1762 LONG EN=25 ;THIS WORD CAN BE INTERPRETED AS LONG INDIRECT ; 1763 .ENDIF/MODEL.B ; 1764 ; SPARE=26 ; 1765 ; SPARE=27 ; 1766 VMA_#=30 ; 1767 VMA_#+TRAP=31 ; 1768 VMA_#+MODE=32 ; 1769 VMA_#+AR32-35=33 ; 1770 VMA_#+PI*2=34 ; 1771 VMA DEC=35 ;VMA_VMA-1 ; 1772 VMA INC=36 ;VMA_VMA+1 ; 1773 LD VMA HELD=37 ;HOLD VMA ON SIDE ;;1774 .IFNOT/MODEL.B ;;1775 U66/=<66:66>D,0 ;BIT 66 UNUSED ; 1776 .IF/MODEL.B ; 1777 CALL/=<66:66>D,0 ;CALL FUNCTION ; 1778 CALL=1 ;GOOD TO 15 LEVELS IN MODEL B ; 1779 .ENDIF/MODEL.B ; 1780 ; KL10 Microcode for TOPS-10 and TOPS-20 -- 18 Nov 1983 COPYRIGHT (C) 1984 DIGITAL EQUIPMENT CORPORATION V1(336) MICRO %34(270) Page 12 ; DEFINE.MIC[10,5351] 23:19 23-Nov-83 CONTROL RAM DEFINITIONS -- DISP/SPEC SPECIAL FUNCTIONS ; 1781 .TOC "CONTROL RAM DEFINITIONS -- DISP/SPEC SPECIAL FUNCTIONS" ; 1782 ; 1783 DISP/=<67:71>D,10 ;0-7 AND 30-37 ARE DISPATCHES (CRA1&CRA2) ; 1784 DIAG=0 ; 1785 DRAM J=1 ; 1786 DRAM A RD=2 ;IMPLIES INH CRY18 ; 1787 RETURN=3 ;POPJ RETURN ; 1788 PG FAIL=4 ;PAGE FAIL TYPE DISP ; 1789 SR=5 ;16 WAYS ON STATE REGISTER ; 1790 NICOND=6 ;NEXT INSTRUCTION CONDITION (see NEXT for detail) ; 1791 SH0-3=7,,2 ;16 WAYS ON HIGH-ORDER BITS OF SHIFTER ; 1792 MUL=30 ;FE0*4 + MQ34*2 + MQ35; implies MQ SHIFT, AD LONG ; 1793 DIV=31,,1 ;FE0*4 + BR0*2 + AD CRY0; implies MQ SHIFT, AD LONG ; 1794 SIGNS=32,1 ;ARX0*8 + AR0*4 + BR0*2 + AD0 ; 1795 DRAM B=33 ;8 WAYS ON DRAM B FIELD ; 1796 BYTE=34,,1 ;FPD*4 + AR12*2 + SCAD0 ; 1797 NORM=35,2 ;See normalization for details. Implies AD LONG ; 1798 EA MOD=36 ;(ARX0 or -LONG EN)*8 + -(LONG EN and ARX1)*4 + ; 1799 ;ARX13*2 + (ARX2-5) or (ARX14-17) non zero; enable ; 1800 ;is (ARX0 or -LONG EN) for second case. If ARX18 ; 1801 ;is 0, clear AR left; otherwise, poke ARL select ; 1802 ;to set bit 2 (usually gates AD left into ARL) ;;1803 .IFNOT/MODEL.B ;;1804 EA TYPE=37 ; 1805 .ENDIF/MODEL.B ; 1806 ; 1807 SPEC/=<67:71>D,10 ;NON-DISPATCH SPECIAL FUNCTIONS (CTL1) ; 1808 ; NOP=10 ;DEFAULT ; 1809 INH CRY18=11 ; 1810 MQ SHIFT=12 ;ENABLE MQ*2, MQ SHRT2 ; 1811 SCM ALT=13 ;ENABLE FE, ARSHIFT ; 1812 CLR FPD=14 ; 1813 LOAD PC=15 ; 1814 XCRY AR0=16 ;CARRY INTO AD IS XOR'D WITH AR00 ; 1815 GEN CRY18=17 ;;1816 .IFNOT/MODEL.B ;;1817 SEC HOLD=20 ;INHIBIT LOADING VMAX ;;1818 CALL=21 ;MAX DEPTH 4, INCLUDING PAGE REFILL ; 1819 .IF/MODEL.B ; 1820 STACK UPDATE=20 ;CONTROL CRY18 IF LOCAL STACK ; 1821 .ENDIF/MODEL.B ; 1822 ARL IND=22 ;# SPECIFIES ARL MIX, ENABLES, & CALL ; 1823 MTR CTL=23 ;# CONTROLS METERS ; 1824 FLAG CTL=24 ;FUNCTION ENCODED IN # FIELD ; 1825 SAVE FLAGS=25 ;TELLS PI CYCLE TO HOLD INTRPT ; 1826 SP MEM CYCLE=26 ;MEM REQUEST IS MODIFIED BY # ; 1827 AD LONG=27 ;AD BECOMES 72 BIT ALU ; 1828 ; 1829 U73/=<72:73>D,0 ;BITS 72-73 UNUSED ; 1830 ; 1831 MARK/=<74:74>D,0 ;FIELD SERVICE "MARK" BIT ; 1832 ; KL10 Microcode for TOPS-10 and TOPS-20 -- 18 Nov 1983 COPYRIGHT (C) 1984 DIGITAL EQUIPMENT CORPORATION V1(336) MICRO %34(270) Page 13 ; DEFINE.MIC[10,5351] 23:19 23-Nov-83 CONTROL RAM DEFINITIONS -- MAGIC NUMBER FIELD ; 1833 .TOC "CONTROL RAM DEFINITIONS -- MAGIC NUMBER FIELD" ; 1834 ; 1835 #/=<75:83>D,0 ;THE INFAMOUS "MAGIC NUMBERS" ; 1836 ; 1837 ;THE OPTIONS DESIGNATE CERTAIN ASSEMBLIES FROM THE SAME ; 1838 ;MICROCODE SOURCES ; 1839 ;# BIT 0 INDICATES KLPAGING ; 1840 ;# BIT 1 INDICATES EXTENDED ADDRESSING ; 1841 ;# BIT 2 INDICATES NONSTANDARD MICROCODE ; 1842 ;# BIT 3 INDICATES A CPU WITH THE PV KIT. (MODEL B) ; 1843 ;# BIT 8 INDICATES INSTRUCTION STATISTICS GATHERING ; 1844 ;(I.E. TRACKS) ; 1845 ;EACH OPTION BIT IS GIVEN A SEPERATE FIELD DEFINITION ; 1846 ; 1847 KLPAGE/=<75:75> ;KLPAGING ; 1848 ; 1849 .IF/KLPAGE ; 1850 OPTIONS=1 ;;1851 .IFNOT/KLPAGE ;;1852 OPTIONS=0 ; 1853 .ENDIF/KLPAGE ; 1854 ; 1855 ; 1856 LONGPC/=<76:76> ;LONG PC FORMAT AS IN EXTENDED ADDRESSING ; 1857 ; THIS IS A SLIGHTLY BASTARDIZED FORMAT IN ; 1858 .IF/LONG.PC ; MODEL A MACHINES DUE TO SPACE LIMITATIONS ; 1859 OPTIONS=1 ;;1860 .IFNOT/LONG.PC ;;1861 OPTIONS=0 ; 1862 .ENDIF/LONG.PC ; 1863 ; 1864 ; 1865 NONSTD/=<77:77> ;NONSTANDARD MICROCODE (IE DIAGNOSTIC MICROCODE) ; 1866 ;;1867 .IF/NONSTD ;;1868 OPTIONS=1 ; 1869 .IFNOT/NONSTD ; 1870 OPTIONS=0 ; 1871 .ENDIF/NONSTD ; 1872 ; 1873 PV/=<78:78> ;MODEL B - PV CPU ; 1874 ; 1875 .IF/MODEL.B ; 1876 OPTIONS=1 ;;1877 .IFNOT/MODEL.B ;;1878 OPTIONS=0 ; 1879 .ENDIF/MODEL.B ; 1880 ; 1881 ISTAT/=<83:83> ;STATISTICS GATHERING CODE (IE TRACKS) ; 1882 ;;1883 .IF/INSTR.STAT ;;1884 OPTIONS=1 ; 1885 .IFNOT/INSTR.STAT ; 1886 OPTIONS=0 ; 1887 .ENDIF/INSTR.STAT ; 1888 ; KL10 Microcode for TOPS-10 and TOPS-20 -- 18 Nov 1983 COPYRIGHT (C) 1984 DIGITAL EQUIPMENT CORPORATION V1(336) MICRO %34(270) Page 13-1 ; DEFINE.MIC[10,5351] 23:19 23-Nov-83 CONTROL RAM DEFINITIONS -- MAGIC NUMBER FIELD ; 1889 ACB/=<77:79> ;AC block number. Used with FMADR/#B# ; 1890 PAGB=6 ;AC block used for KL paging registers ; 1891 MICROB=7 ;AC block for general microcode scratch ; 1892 ; 1893 AC#/=<80:83> ;AC number used with ACB or AC-OP (below) ; 1894 ; 1895 .IF/MODEL.B ; 1896 ; ; 1897 ; WARNING !!! BECAUSE OF A TIMING PROBLEM IN THE HARDWARE ALL AC-OPS ; 1898 ; MUST HAVE THE NUMBER FIELD THE SAME IN THE PREVIOUS ; 1899 ; MICROINSTRUCTION. THE SYMPTOM WILL BE GARBAGE WRITTEN IN A ; 1900 ; DIFFERENT AC AS THE ADDRESS LINES DON'T MAKE IT IN TIME ; 1901 ; FOR THE WRITE PULSE. ; 1902 ; ; 1903 AC-OP/=<75:79> ;CONTROLS OPERATION ON AC AND AC# ; 1904 AC+#=6 ; 1905 #=32 ;JUST AC# ; 1906 OR=33 ;AC AC# ; 1907 ;ALL AD/ FUNCTIONS <40 WORK ; 1908 .ENDIF/MODEL.B ; 1909 ; KL10 Microcode for TOPS-10 and TOPS-20 -- 18 Nov 1983 COPYRIGHT (C) 1984 DIGITAL EQUIPMENT CORPORATION V1(336) MICRO %34(270) Page 14 ; DEFINE.MIC[10,5351] 23:19 23-Nov-83 CONTROL RAM DEFINITIONS -- MAGIC NUMBER FIELD ; 1910 ;VARIOUS SPECIAL FUNCTIONS ENABLE SPECIAL DECODING OF THE ; 1911 ; "MAGIC #" FIELD, AS FOLLOWS: ; 1912 ; 1913 ;SPECIAL DATA PATH CONTROLS ; 1914 ;;1915 .IFNOT/MODEL.B ;;1916 CALL/=<75:75> ;ENABLED BY ARL IND (CTL2) ;;1917 CALL=1 ; 1918 .ENDIF/MODEL.B ; 1919 AR0-8/=<76:76> ;ENABLED BY ARL IND (CTL2) ; 1920 LOAD=1 ; 1921 CLR/=<77:80> ;ENABLED BY ARL IND (CTL2) ; 1922 MQ=10 ; 1923 ARX=4 ; 1924 ARL=2 ; 1925 ARR=1 ; 1926 AR=3 ; 1927 AR+ARX=7 ; 1928 AR+MQ=13 ; 1929 ARX+MQ=14 ; 1930 AR+ARX+MQ=17 ; 1931 ARL+ARX=6 ; 1932 ARL+ARX+MQ=16 ; 1933 ARR+MQ=11 ; 1934 ARL/=<81:83> ;ENABLED BY ARL IND (CTL2) ; 1935 ARL=0 ; 1936 ARMM=0 ;REQUIRES SPECIAL FUNCTION ; 1937 CACHE=1 ;ORDINARILY SELECTED BY HWARE ; 1938 AD=2 ; 1939 EBUS=3 ; 1940 SH=4 ; 1941 AD*2=5 ; 1942 ADX=6 ; 1943 AD*.25=7 ; 1944 AR CTL/=<75:77> ;ENABLED BY COND/REG CTL (CTL2) ; 1945 AR0-8 LOAD=4 ; 1946 AR9-17 LOAD=2 ; 1947 ARR LOAD=1 ; 1948 ARL LOAD=6 ; 1949 EXP TST/=<80:80> ;ENABLED BY COND/REG CTL (CTL1) ; 1950 AR_EXP=1 ; 1951 MQ CTL/=<82:83> ;ENABLED BY COND/REG CTL (CTL2) ; 1952 ; MQ=0 ;WITH MQ/MQ SEL ; 1953 MQ*2=1 ; " ; 1954 ; MQ*.5=2 ; " (DROPS BITS 0,6,12,18,24,30) ; 1955 0S=3 ; " ; 1956 SH=0 ;WITH MQ/MQM SEL ; 1957 MQ*.25=1 ; " ; 1958 1S=2 ; " ; 1959 AD=3 ; " ; 1960 ; KL10 Microcode for TOPS-10 and TOPS-20 -- 18 Nov 1983 COPYRIGHT (C) 1984 DIGITAL EQUIPMENT CORPORATION V1(336) MICRO %34(270) Page 15 ; DEFINE.MIC[10,5351] 23:19 23-Nov-83 CONTROL RAM DEFINITIONS -- MAGIC NUMBER FIELD ; 1961 ;SPECIAL CONTROL OF EBOX FLAGS & FUNCTIONS ; 1962 ; 1963 PC FLAGS/=<75:83> ;ENABLED BY COND/PCF_# (SCD4) ; 1964 AROV=420 ;SET ARITH OVFLO & TRAP1 ; 1965 FLOV=620 ;SAME, PLUS FLOATING OVFLO ; 1966 FPD=100 ;SET FIRST PART DONE ; 1967 TRAP2=40 ;SET TRAP2 (PDL OVFLO) ; 1968 TRAP1=20 ;SET TRAP1 (ARITH OVFLO) ; 1969 FXU=630 ;FLOV + EXP UNDERFLOW ; 1970 DIV CHK=424 ;NO DIVIDE + AROV ; 1971 FDV CHK=624 ;FLOATING NO DIVIDE ; 1972 FLAG CTL/=<75:83> ;ENABLED BY SPEC/FLAG CTL (SCD5) ; 1973 RSTR FLAGS=420 ;AS IN JRSTF ; 1974 JFCL=602 ;FORCE PC 00 = AROV ; 1975 JFCL+LD=622 ;SECOND PART OF JFCL -- CLEAR TESTED FLAGS ; 1976 DISMISS=502 ;CLEAR PI CYCLE IF SET (CON5) ; 1977 ; ELSE DISMISS HIGHEST PI HOLD ; 1978 DISMISS+LD=522 ;LOAD FLAGS AND DISMISS ; 1979 HALT=442 ;STOP PROCESSOR IF LEGAL (CON2) ; 1980 SET FLAGS=20 ;AS IN MUUO ; 1981 PORTAL=412 ;CLEAR PUBLIC IF PRIVATE INSTR ; 1982 SPEC INSTR/=<75:83> ;ENABLED BY COND/SPEC INSTR ; 1983 SET PI CYCLE=714; (CON5) ; 1984 KERNEL CYCLE=200;MAKE IO LEGAL, EXEC ADDR SPACE (CON4) ; 1985 INH PC+1=100 ;TO MAKE JSR WORK IN TRAP, INTRPT (CON4) ; 1986 SXCT=40 ;START SECTION XCT (MCL4) ; 1987 PXCT=20 ;START PREV CONTXT XCT (MCL4) ; 1988 INTRPT INH=10 ;INHIBIT INTERRUPTS (CON4) ; 1989 INSTR ABORT=4 ; (CON2) ; 1990 HALTED=302 ;TELL CONSOLE WE'RE HALTED (CON4) ; 1991 CONS XCT=310 ;FLAGS FOR INSTR XCT'D FROM CONSOLE ; 1992 CONT=0 ;RESTORE NORMAL STATE FOR CONTINUE ; 1993 FETCH/=<75:83> ;ENABLED BY MEM/FETCH ; 1994 UNCOND=400 ; 1995 ;LOW 2 BITS DECODED ON (IR3) ; 1996 COMP=201,2 ;DEPENDING ON AD AND DRAM B ; 1997 SKIP=202,2 ; 1998 TEST=203,1 ; 1999 JUMP=502,2 ;AS IN JUMPX, ON AD AND DRAM B ; 2000 JFCL=503,1 ;JUMP ON TEST CONDITION ; 2001 ; KL10 Microcode for TOPS-10 and TOPS-20 -- 18 Nov 1983 COPYRIGHT (C) 1984 DIGITAL EQUIPMENT CORPORATION V1(336) MICRO %34(270) Page 16 ; DEFINE.MIC[10,5351] 23:19 23-Nov-83 CONTROL RAM DEFINITIONS -- MAGIC NUMBER FIELD ; 2002 ;SPECIAL MEMORY REQUEST FUNCTIONS ; 2003 ; 2004 .IF/MODEL.B ; 2005 EA CALC/=<75:83> ;SPECIFIC CONTROLS FOR MEM/EA CALC ; 2006 ; LOAD AR=400 ; 2007 ; LOAD ARX=200 ; 2008 ; PAUSE=100 ;Freeze memory--always use with 040 ; 2009 ; WRITE=040 ;SET VMA WRITE ; 2010 ; PREV EN=20 ;PREV CONTXT SELECTED BY SR AND PXCT ; 2011 ; INDIRECT=10 ;PREV CONTXT FOR EA CALC ; 2012 ; EA=2 ;RESTORATION OF ORIGINAL EA CONDITIONS ; 2013 ; STACK=1 ;PREV CONTXT SELECTED BY PXCT B12 ; 2014 .IF/XADDR ;JUST TO ARX FOR EXTENDED ADDRESSING ; 2015 A IND=230 ;INDIRECT AT FIRST EA CALC TIME ;;2016 .IFNOT/XADDR ;TO BOTH AR AND ARX AS IN MODEL A ;;2017 A IND=630 ;INDIRECT AT FIRST EA CALC TIME ; 2018 .ENDIF/XADDR ; 2019 BYTE LD=420 ;Read byte data to AR only [337] ; 2020 BYTE RD=620 ;READ BYTE DATA TO AR & ARX ; 2021 BYTE RD PC=621 ;READ BYTE DATA TO AR & ARX WITH PC SECTION ; 2022 BYTE RPW=760 ;Read byte data to AR, ARX, write test, pause [312] ; 2023 BYTE IND=610 ;INDIRECT AT BYTE EA CALC TIME ; 2024 PUSH=041 ;STORE TO STACK ; 2025 POP AR=421 ;READ FROM STACK TO AR ; 2026 POP ARX=221 ;READ FROM STACK TO ARX ; 2027 POP AR-ARX=621 ;POP TO BOTH ; 2028 WRITE(E)=042 ; 2029 LD AR(EA)=402 ;LOAD AR GLOBAL/LOCAL AS IN EA ; 2030 LD AR+WR=440 ;LOAD AR, TEST WRITABILITY ; 2031 LD ARX+WR=240 ;LOAD ARX, TEST WRITABILITY ; 2032 .ENDIF/MODEL.B ; 2033 ; 2034 SP MEM/=<75:83> ;ENABLED BY SPEC/SP MEM CYCLE ; 2035 FETCH=400 ;LOAD IR WHEN DATA ARRIVES (MCL5) ; 2036 USER=200 ;FORCE USER OR UPT (MCL2) ; 2037 EXEC=100 ;FORCE EXEC OR EPT (MCL3) ; 2038 SEC 0=40 ;CLEAR VMAX (MCL4) ; 2039 UPT EN=20 ;UPT IF USER EN (MCL3) ; 2040 EPT EN=10 ;EPT IF NOT USER EN (MCL3) ; 2041 CACHE INH=2 ; (MCL6) ; 2042 UNCSH+UNPAGE=103;UNCACHED AND UNPAGED ; 2043 UNPAGED+CACHED=101 ;physical reference with cache enabled. ;;2044 .IFNOT/MULTI ;;2045 UNPAGED=101 ; (MCL6) ;;2046 EPT=111 ;;2047 EPT CACHE=111 ;[260] ;;2048 EPT FETCH=511 ;;2049 UPT=221 ;;2050 UPT FETCH=621 ;;2051 PT=31 ;;2052 PT FETCH=431 ; 2053 .IF/MULTI ; 2054 UNPAGED=103 ; (MCL6) ; 2055 EPT=113 ; 2056 EPT CACHE=111 ;[260] ; 2057 EPT FETCH=513 ; KL10 Microcode for TOPS-10 and TOPS-20 -- 18 Nov 1983 COPYRIGHT (C) 1984 DIGITAL EQUIPMENT CORPORATION V1(336) MICRO %34(270) Page 16-1 ; DEFINE.MIC[10,5351] 23:19 23-Nov-83 CONTROL RAM DEFINITIONS -- MAGIC NUMBER FIELD ; 2058 UPT=223 ; 2059 UPT FETCH=623 ; 2060 PT=33 ; 2061 PT FETCH=433 ; 2062 .ENDIF/MULTI ; 2063 ; KL10 Microcode for TOPS-10 and TOPS-20 -- 18 Nov 1983 COPYRIGHT (C) 1984 DIGITAL EQUIPMENT CORPORATION V1(336) MICRO %34(270) Page 17 ; DEFINE.MIC[10,5351] 23:19 23-Nov-83 CONTROL RAM DEFINITIONS -- MAGIC NUMBER FIELD ; 2064 ;MBOX CONTROLS ; 2065 ; 2066 MREG FNC/=<75:83> ;ENABLED BY MEM/REG FUNC (APR6) ; 2067 SBUS DIAG=407 ;PERFORM SBUS DIAGNOSTIC CYCLE ; 2068 READ UBR=502 ;ASK MBOX TO LOAD UBR INTO EBUS REG ; 2069 READ EBR=503 ;PUT EBR INTO EBUS REG ; 2070 READ ERA=504 ; 2071 WR REFILL RAM=505 ;DISGUISED AS A "READ REG" FUNCTION ; 2072 .IF/MODEL.B ;THIS GOT CHANGED IN THE GENERAL SPEEDUP (APR6) ; 2073 LOAD CCA=606 ;START A SWEEP ;;2074 .IFNOT/MODEL.B ;HERE IS WHAT IT USED TO BE ;;2075 LOAD CCA=601 ;START A SWEEP ; 2076 .ENDIF/MODEL.B ; 2077 LOAD UBR=602 ;SETUP UBR FROM VMA ; 2078 LOAD EBR=603 ;SETUP EBR FROM VMA ; 2079 MAP=140 ;GET PHYS ADDR CORRESPONDING TO VMA (MCL6) ; 2080 MBOX CTL/=<75:83> ;ENABLED BY COND/MBOX CTL (APR5) ; 2081 SET PAGE FAIL=200 ; 2082 SET IO PF ERR=100 ; 2083 CLR PT LINE(NK)=61,,1;[333] Clear valid if no Keep bit set ; 2084 PT DIR CLR(NK)=41;Enable clear of PT DIR for non keep entries ; 2085 CLR PT LINE=21,,1;CLEAR VALID FOR 8 ENTRIES ; 2086 PT DIR WR=20,1 ;WRITE PAGE TABLE DIRECTORY ; 2087 PT WR=10,1 ;WRITE PAGE TABLE ENTRY SELECTED BY VMA ; 2088 PT DIR CLR=1 ;SELECT FOR CLEARING PT DIR (PAG3) ; 2089 NORMAL=0 ;RESET PT WR SELECTION ; 2090 MTR CTL/=<81:83> ;FUNCTION DECODING FOR METERS (MTR3) ; 2091 CLR TIME=0 ; USUALLY USED WITH DIAG FUNC ; 2092 CLR PERF=1 ; 2093 CLR E CNT=2 ; 2094 CLR M CNT=3 ; 2095 LD PA LH=4 ; 2096 LD PA RH=5 ; 2097 CONO MTR=6 ; 2098 CONO TIM=7 ; 2099 ; KL10 Microcode for TOPS-10 and TOPS-20 -- 18 Nov 1983 COPYRIGHT (C) 1984 DIGITAL EQUIPMENT CORPORATION V1(336) MICRO %34(270) Page 18 ; DEFINE.MIC[10,5351] 23:19 23-Nov-83 CONTROL RAM DEFINITIONS -- MAGIC NUMBER FIELD ; 2100 ;I/O FUNCTIONS ; 2101 ; 2102 EBUS CTL/=<75:83> ;ENABLED BY COND/EBUS CTL (APR3) ; 2103 GRAB EEBUS=400 ;"EBUS RETURN" TAKES ECL EBUS FOR EBOX ; 2104 REQ EBUS=200 ; 2105 REL EBUS=100 ; (CON3) ; 2106 EBUS DEMAND=60 ;ASSERT DEMAND, KEEP CS, FUNC ; 2107 EBUS NODEMAND=20;DROP DEMAND, KEEP CS, FUNC ; 2108 ; CTL_IR=10 ;SELECT F01 & F02 FROM IR ; 2109 ; DISABLE CS=4 ;TURN OFF CONTROLLER SELECT ; 2110 ; DATAIO=2 ;0 FOR CONI/O ; 2111 ; INPUT=1 ;0 FOR OUTPUT ; 2112 IO INIT=30 ;ENABLE IR3-9 TO EBUS CONTROLLER SELECT, ; 2113 ; IR10-12 (DECODED) TO FUNCTION ; 2114 ; AND AR ONTO EBUS IF FUNCTION IS OUTPUT ; 2115 DATAO=26 ;0'S TO CS, DATAO TO FCN, AND AR TO EBUS ; 2116 DATAI=27 ;0'S TO CS, DATAI TO FCN ; 2117 REL EEBUS=0 ;LEGGO ; 2118 DIAG FUNC/=<75:83> ;ENABLED BY COND/DIAG FUNC (CTL3) ; 2119 .5 USEC=400,3 ;STRETCH CLOCK TO LET EBUS SETTLE (CON?) ; 2120 LD PA LEFT=404,3 ;LH PERF ANAL CONTROLS FROM RH (MTR) ; 2121 LD PA RIGHT=405,3 ;RH PA CONTROLS FROM RH (MTR) ; 2122 CONO MTR=406,3 ;ACCOUNTING CONTROLS (MTR) ; 2123 CONO TIM=407,3 ;INTERVAL TIMER CONTROLS (MTR) ; 2124 CONO APR=414,3 ; (CON3) ; 2125 CONO PI=415,3 ; (CON3) ; 2126 CONO PAG=416,3 ;CACHE & PAGING CTL (CON3) ; 2127 DATAO APR=417,3 ;ADDRESS BREAK (CON3) ; 2128 DATAO PAG=620,3 ;AC BLOCKS & PREV CONTXT (CON3) ; 2129 LD AC BLKS=425,3 ;FORCE LOADING AC BLOCKS ; 2130 LD PCS+CWSX=426,3 ;FORCE LOADING PREV CONTXT SEC, CWSX ; 2131 CONI PI(R)=500,3 ;PI HOLD & ACTIVE TO LH (PI) ; 2132 CONI PI(L)=501,3 ;PI GEN TO LH (PI) ; 2133 CONI APR(R)=510,3 ;APR INTERRUPT & PIA TO LH (APR6) ; 2134 RD TIME=510,3 ;TIME BASE TO RH (MTR5) ; 2135 DATAI PAG(L)=511,3 ;AC BLOCKS, PREV CONTXT TO LH (APR6) ; 2136 RD PERF CNT=511,3 ;PERFORMANCE COUNT TO RH (MTR5) ; 2137 CONI APR(L)=512,3 ;APR INTERRUPT ENABLES TO LH (APR6) ; 2138 RD EBOX CNT=512,3 ;EBOX COUNT TO RH (MTR5) ; 2139 DATAI APR=513,3 ;ADDR BREAK CONDITIONS TO LH (APR6) ; 2140 RD CACHE CNT=513,3 ;CACHE COUNT TO RH (MTR5) ; 2141 RD INTRVL=514,3 ;INTERVAL TIMER TO RH (MTR5) ; 2142 RD PERIOD=515,3 ;PERIOD REGISTER TO RH (MTR5) ; 2143 CONI MTR=516,3 ;CONTROLS & PIA TO RH (MTR5) ; 2144 RD MTR REQ=517,3 ;ENCODED UPDATE REQUEST TO 20-22 (MTR5) ; 2145 CONI PI(PAR)=530,3 ;WRITE EVEN PARITY ENABLES TO RH (CON1) ; 2146 CONI PAG=531,3 ;CACHE & TRAP CTL TO RH (CON1) ; 2147 RD EBUS REG=567,3 ;EBUS REGISTER IN MBOX (MBZ1 & MBC1) ; 2148 ; 2149 PARITY/=0,0,0,P ;USE ANY AVAILABLE FIELD FOR PARITY ; 2150 ; KL10 Microcode for TOPS-10 and TOPS-20 -- 18 Nov 1983 COPYRIGHT (C) 1984 DIGITAL EQUIPMENT CORPORATION V1(336) MICRO %34(270) Page 19 ; DEFINE.MIC[10,5351] 23:19 23-Nov-83 DISPATCH RAM DEFINITIONS ; 2151 .TOC "DISPATCH RAM DEFINITIONS" ; 2152 ;FIELDS ARE ARRANGED FOR EASY READING, NOT COMPACTNESS ; 2153 ; 2154 .DCODE ; 2155 A/=<0:2> ;OPERAND FETCH MODE ; 2156 IMMED=0 ;IMMEDIATE ; 2157 IMMED-PF=1 ;IMMEDIATE, START PREFETCH ; 2158 .IF/MODEL.B ; 2159 ADDR=2 ;FULL EFFECTIVE ADDRESS ; 2160 .ENDIF/MODEL.B ; 2161 WR-TST=3 ;TEST WRITABILITY ; 2162 READ=4 ;READ ONLY ; 2163 READ-PF=5 ;READ, THEN PREFETCH ; 2164 RD-WR=6 ;READ WRITE (SEPARATE CYCLES) ; 2165 RD-P-WR=7 ;READ PAUSE WRITE ; 2166 ; 2167 B/=<3:5> ;STORE RESULTS AT-- ; 2168 DBL AC=1 ;DOUBLE RESULT TO AC & AC+1 ; 2169 DBL BOTH=2 ;MULB, DIVB, ETC ; 2170 SELF=3 ;SELF MODE INSTRUCTIONS ; 2171 AC=5 ;SINGLE RESULT TO AC, PREFETCH IN PROG ; 2172 MEM=6 ;RESULT TO MEMORY ; 2173 BOTH=7 ;SINGLE RESULT TO MEMORY AND AC ; 2174 ; 2175 SJC-=3 ;SKIP JUMP COMPARE CONTROLS ; 2176 SJCL=2 ; 2177 SJCE=1 ; 2178 SJCLE=0 ; 2179 SJCA=7 ; 2180 SJCGE=6 ; 2181 SJCN=5 ; 2182 SJCG=4 ; 2183 B0/=<3:3> ;INVERTS VARIOUS TEST, SKIP, AND JUMP CONTROLS ; 2184 CRY0(0)=0 ;TEST TST CAUSES PC SKIP IF CRY0=0 ; 2185 CRY0(1)=1 ; SAME IF CRY0=1 ; 2186 B1-2/=<4:5> ;FLOATING RESULT STORE MODE ; 2187 AC=1 ;RESULT TO AC ; 2188 MEM=2 ;RESULT JUST TO MEM ; 2189 BOTH=3 ;RESULT TO BOTH ; 2190 ; 2191 PARITY/=<11:11>P ; 2192 ; 2193 J/=<14:23> ;EXECUTOR (40&20-BITS ALWAYS 0) ; 2194 .UCODE ; 2195 ; 2196 .BIN ; 2197 ; KL10 Microcode for TOPS-10 and TOPS-20 -- 18 Nov 1983 COPYRIGHT (C) 1984 DIGITAL EQUIPMENT CORPORATION V1(336) MICRO %34(270) Page 1 ; MACRO.MIC[10,5351] 21:14 28-Nov-83 CRAM Macros--Miscellaneous and A ; 2198 .TOC "CRAM Macros--Miscellaneous and A" ; 2199 .NOBIN ; 2200 ; ; 2201 ; All the CRAM macros have been alphabetized for easy reference. We have ; 2202 ; defined "_" to be alphabetically lower than the alphabet (although its ; 2203 ; ASCII representation makes it higher) so that macros such as AR_AR+1 ; 2204 ; will precede ARX_AR+1, for example (this seems more intuitive). ; 2205 ; ; 2206 []_[]*[] "@1/AD, ADA/@2, ADB/@3" ; 2207 []_[]*FM[] "@3, ADA/@2, ADB/FM, @1/AD" ; 2208 []_[]-FM[] "@3, ADA/@2, ADB/FM, @1/AD, AD/A-B" ; 2209 []_#[] "@1_#,#/@2" ; 2210 []_ADA[] "@1/AD, ADA/@2, AD/A" ; 2211 []_ADB[] "@1/AD, ADA EN/0S, ADB/@2, AD/B" ; 2212 []_FM[] "@1/AD, ADA EN/0S, ADB/FM, @2, AD/B" ; 2213 ; 2214 (AR+ARX+MQ)*.25 "ADA/AR,AD/A,AR/AD*.25,ARX/ADX*.25,(MQ)*.25" ; 2215 (AR+ARX+MQ)*2 "ADA/AR,AD/A,AR/AD*2,ARX/ADX*2,(MQ)*2" ; 2216 (MQ)*.25 "COND/REG CTL,MQ/MQM SEL,MQ CTL/MQ*.25" ; 2217 (MQ)*2 "COND/REG CTL,MQ/MQ SEL,MQ CTL/MQ*2" ; 2218 ; 2219 .IF/MODEL.B ; 2220 A INDRCT "MEM/EA CALC,EA CALC/A IND,VMA/LOAD" ; 2221 A READ "VMA/PC+1,DISP/DRAM A RD,MEM/A RD,#/300,J/0" ;;2222 .IFNOT/MODEL.B ;;2223 A INDRCT "MEM/A IND,VMA/LOAD" ;;2224 A READ "VMA/PC+1,DISP/DRAM A RD,MEM/A RD,#/0,J/0" ; 2225 .ENDIF/MODEL.B ; 2226 ABORT INSTR "COND/SPEC INSTR,SPEC INSTR/INSTR ABORT" ; 2227 AC0 "FMADR/AC0" ; 2228 AC0_AR "FMADR/AC0,COND/FM WRITE" ; 2229 AC1_AR "FMADR/AC1,COND/FM WRITE" ; 2230 AC2_AR "FMADR/AC2,COND/FM WRITE" ; 2231 AC3_AR "FMADR/AC3,COND/FM WRITE" ; 2232 .IF/MODEL.B ; 2233 AC4 "FMADR/AC+#,AC-OP/AC+#,AC#/4" ;;2234 .IFNOT/MODEL.B ;;2235 AC4 "FMADR/AC4" ; 2236 .ENDIF/MODEL.B ; 2237 AC4_AR "AC4,COND/FM WRITE" ; 2238 .IF/MODEL.B ; 2239 AC5 "FMADR/AC+#,AC-OP/AC+#,AC#/5" ;;2240 .IFNOT/MODEL.B ;;2241 AC5 "FMADR/AC5" ; 2242 .ENDIF/MODEL.B ; 2243 AC5_AR "AC5,COND/FM WRITE" ; 2244 AD FLAGS "COND/AD FLAGS" ; 2245 AD LONG "SPEC/AD LONG" ; 2246 ADMSK "R15" ;23 ONES ; 2247 ; KL10 Microcode for TOPS-10 and TOPS-20 -- 18 Nov 1983 COPYRIGHT (C) 1984 DIGITAL EQUIPMENT CORPORATION V1(336) MICRO %34(270) Page 2 ; MACRO.MIC[10,5351] 21:14 28-Nov-83 CRAM Macros--AR ; 2248 .TOC "CRAM Macros--AR" ; 2249 ; 2250 AR_[] AND FM[] "ADA/@1,ADB/FM,@2,AD/AND,AR/AD" ; 2251 ; 2252 AR_(AR+2BR)*.25 "ADA/AR,ADB/BR*2,AD/A+B,AR/AD*.25" ; 2253 AR_(AR+BR)*.25 "ADA/AR,ADB/BR,AD/A+B,AR/AD*.25" ; 2254 AR_(AR-2BR)*.25 "ADA/AR,ADB/BR*2,AD/A-B,AR/AD*.25" ; 2255 AR_(AR-BR)*.25 "ADA/AR,ADB/BR,AD/A-B,AR/AD*.25" ; 2256 AR_(ARX OR AR*4)*.25 "ADA/ARX,ADB/AR*4,AD/OR,AR/AD*.25" ; 2257 AR_-AC0 "FMADR/AC0,ADB/FM,ADA EN/0S,AD/A-B,AR/AD" ; 2258 AR_-AR "ADA EN/0S,ADB/AR*4,AD/A-B,AR/AD*.25" ; 2259 AR_-AR LONG "GEN -AR LONG,AR_AD*.25 LONG" ; 2260 AR_-BR "ADB/BR,ADA EN/0S,AD/A-B,AR/AD" ; 2261 AR_-BR LONG "ADA EN/0S,ADB/BR,AD/A-B,AR/AD,ARX/ADX,SPEC/AD LONG" ; 2262 AR_-BR*2 LONG "ADA EN/0S,ADB/BR*2,AD/A-B,AR/AD,ARX/ADX,SPEC/AD LONG" ; 2263 AR_-BRX "ADB/BR,ADA EN/0S,AD/A-B,AR/ADX" ; 2264 AR_-DLEN "DLEN,ADB/FM,ADA EN/0S,AD/A-B,AR/AD" ; 2265 AR_-SLEN "SLEN,ADB/FM,ADA EN/0S,AD/A-B,AR/AD" ; 2266 AR_0.C "COND/ARL IND,CLR/AR" ; 2267 AR_0.M "MEM/ARL IND,CLR/AR" ; 2268 AR_0.S "SPEC/ARL IND,CLR/AR" ; 2269 AR_0S "AD/0S,AR/AD" ; 2270 AR_1 "ADA EN/0S,AD/A+1,AR/AD" ; 2271 AR_1 LONG "ADA EN/0S,AD/A+1,AR/AD*.25,ARX/ADX" ; 2272 AR_1S "AD/1S,AR/AD" ; 2273 AR_2 "ADA EN/0S,AD/A+1,AR/AD*2" ; 2274 AR_2(AR*BR) "ADA/AR,ADB/BR,AR/AD*2" ; 2275 AR_2(AR+1) "ADA/AR,AD/A+1,AR/AD*2" ; 2276 AR_2(AR+BR) "AR_2(AR*BR),AD/A+B" ; 2277 AR_2(AR+BR) LONG "AR_2(AR*BR),AD/A+B,ARX/ADX*2,SPEC/AD LONG" ; 2278 AR_2(AR-BR) "AR_2(AR*BR),AD/A-B" ; 2279 ; 2280 AR_AC0 "FMADR/AC0,ADB/FM,AD/B,AR/AD" ; 2281 AR_AC0 COMP "FMADR/AC0,ADB/FM,AD/SETCB,AR/AD" ; 2282 AR_AC0+1 "ADA EN/0S,ADB/FM,FMADR/AC0,AD/A+B+1,AR/AD" ; 2283 AR_AC1 "FMADR/AC1,ADB/FM,AD/B,AR/AD" ; 2284 AR_AC1 COMP "FMADR/AC1,ADB/FM,AD/SETCB,AR/AD" ; 2285 AR_AC1*2 "FMADR/AC1,ADB/FM,AD/B,AR/AD*2" ; 2286 AR_AC2 "FMADR/AC2,ADB/FM,AD/B,AR/AD" ; 2287 AR_AC3 "FMADR/AC3,ADB/FM,AD/B,AR/AD" ; 2288 AR_AC3*2 "FMAD