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KL MICROCODE RELEASE DOCUMENT -- V336
Digital Equipment Corporation, Maynard, Mass.
This software is furnished under a license for use only on a single
computer system and may be copied only with the inclusion of the above
copyright notice. This software, or any other copies thereof, may not
be provided or otherwise made available to any other person except for
use on such system and to one who agrees to these license terms.
Title to and ownership of the software shall at all times remain in
The information in this software is subject to change without notice
and should not be construed as a commitment by Digital Equipment
DEC assumes no responsibility for the use or reliability of its
software on equipment which is not supplied by DEC.
KL MICROCODE RELEASE DOCUMENT -- V336 Page 2
V336RG.DOC -- v336
1. Microcode version 336 is the eleventh release of the KL10
microcode. Microcode version 336 appears as UB.MCB only. It
supports a model B KL10 for TOPS-10 V7.02.
This is the sixth release of the KL10 microcode that supports
an 'Extended KL10' described in the Hardware Reference
Manual. Only KLX.RAM supports the 'Extended KL10'. (KLX.MCB
is derived from KLX.RAM and does support the 'Extended
The KL10 microcode is different for TOPS-10 and TOPS-20
systems. The KL10 microcode is different for model A and
model B processors. (What engineering calls a model B
processor is sometimes known as a KL10-PV.) The TOPS-10
microcode for model A processors is called U.RAM, for model B
processors it is UB.RAM. The TOPS-20 microcode for model A
processors is called KLL.RAM, for model B processors it is
called KLX.RAM. The PDP-11 front end requires different
formats of the microcode files. These translated files have
different names. TOPS-10 model A: UA.MCB. TOPS-10 model B:
UB.MCB. TOPS-20 model A: KLA.MCB. TOPS-20 model B:
2. The KL10 microcode is not dependent on any monitor, but
because of hardware differences between the various -10
processors, a monitor must be built specifically for the
KL10. KL10 microcode version 336 has been tested with the
TOPS-10 release 7.02 monitor.
See LCREV for information regarding microcode requirements for various
hardware revision levels.
2.0 KNOWN DEFICIENCIES
When executing a CVTBDO using a One Word Global Byte Pointer the
fill is taken from E0 rather than E0+1.
KL MICROCODE RELEASE DOCUMENT -- V336 Page 3
3.0 FIXED PROBLEMS
The following problems have been fixed:
336 Back off 330 for a bit, since TOPS-10 7.02 must be tested and
OWGs in section 0 fail for string instructions (they get converted
to TWGs, which are illegal in section 0). For now, we will maintain
335 Force memory to be released for SMP case of DPB if P > 36 causes no
actual data to be stored. Make an OWG reference to an address >
37,,777777 cause a page fail (GBYTE was stripping the excess bits).
334 Fix conflict generated in CLRPT by 333 by creating new subroutine
ARSWAP which is just AR_AR SWAP. Make several other routines call it,
thus saving a few words.
333 Add new conditional BIG.PT. Under it, add code to implement the "Keep
me" bit for paging as bit 5 of the page table, and to move it to page
map bit 23 during page refill. Also make DATAO PAG not clear Kept
pages if bit 3 of the word is off.
332 Redefine all bank 7 ACs as R0,...,R17, and all bank 6 ACs as P0,...,
P17. Change all other alias definitions to refer to these. This
gives us a uniform cross reference for all scratch register references.
Put all macro definitions into alphabetical order, making it easier
to look up a macro definition. Split the edit history into its own
file. There are no functional changes from 331.
331 Allow XSFM anywhere. Clean up the code a bit in the process. There
still remain a number of references to XSFM or XPCW distinctions,
and these could almost certainly be cleaned up further.
330 Allow one word global byte pointers in section zero. This includes
changes in BYTE, EIS, and FP. Change GBYTE and CNV2WD to return 2;
eliminate GTST as obsolete. Also shuffle the calls to these routines
to conform to the new calling conventions, and put the OWG test at
the beginning of IBP, ILDB, IDBP, LDB, DPB, and ADJBP.
327 Add PAGCNT conditional. Under it, include control to count entry
into PFH code and DATAO PAG with bit 2 set.
4.0 RELATED DOCUMENTATION
The microcode is implicitly documented in the System Reference Manual,
in that it is an implementation of a PDP-10. The only other
documentation is in the listing and prints of the KL10 processor.
5.0 FUNCTION OF THE DIFFERENT MICROCODE VERSIONS.
U.RAM is the microprogram which directs the operation of the KL10
model A hardware to emulate the behavior of a PDP-10 for a TOPS-10
system. UB.RAM is the microprogram which directs the operation of the
KL MICROCODE RELEASE DOCUMENT -- V336 Page 4
KL10 model B hardware (KL10-PV) to emulate the behavior of a PDP-10
for a TOPS-10 system. UB.RAM should look exactly like U.RAM to PDP-10
KLL.RAM is the microprogram which directs the operation of the KL10
model A hardware to emulate the behavior of a PDP-10 for a TOPS-20
system. KLX.RAM is the microprogram which directs the operation of
the KL10 model B hardware to emulate the behavior of a PDP-10 for a
TOPS-20 system. KLX.RAM implements the 'Extended KL10' explained in
the Hardware Reference Manual.