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; KL10 Microcode for TOPS-10 and TOPS-20 24 July 1985 V2(411) MICRO %34(270) Page TOC-1
; Table of Contents
; 1 KLX.MIC[10,5351] 19:52 24-Jul-85
; 1 KL10 Microcode with KL Paging
; 19 EDHIS.MIC[10,5351] 19:59 24-Jul-85
; 36 REVISION HISTORY
; 1086 DEFINE.MIC[10,5351] 19:52 24-Jul-85
; 1087 CONDITIONAL ASSEMBLY VARIABLE DEFINITIONS
; 1248 HOW TO READ THE MICROCODE -- FORMATS & CONSTRUCTS
; 1451 MICROCODE LISTING TEMPLATE
; 1502 KL10 INSTRUCTION OPCODE MAP
; 1558 CONTROL RAM DEFINITIONS -- J, AD
; 1614 CONTROL RAM DEFINITIONS -- DATA PATH MIXERS
; 1687 CONTROL RAM DEFINITIONS -- 10-BIT LOGIC
; 1720 CONTROL RAM DEFINITIONS -- SHIFT, ARMM, VMA, TIME
; 1754 CONTROL RAM DEFINITIONS -- MEM SPECIAL FUNCTIONS
; 1783 CONTROL RAM DEFINITIONS -- SKIP/COND SPECIAL FUNCTIONS
; 1875 CONTROL RAM DEFINITIONS -- DISP/SPEC SPECIAL FUNCTIONS
; 1927 CONTROL RAM DEFINITIONS -- MAGIC NUMBER FIELD
; 2246 DISPATCH RAM DEFINITIONS
; 2292 MACRO.MIC[10,5351] 19:52 24-Jul-85
; 2293 CRAM Macros--Miscellaneous and A
; 2343 CRAM Macros--AR
; 2576 CRAM Macros--AR Miscellaneous, ARL, and ARR
; 2652 CRAM Macros--ARX
; 2762 CRAM Macros--B, C, D
; 2869 CRAM Macros--E, F
; 2976 CRAM Macros--G, H, I, J, L
; 3093 CRAM Macros--M, N, O, P
; 3205 CRAM Macros--R
; 3266 CRAM Macros--S
; 3523 CRAM Macros--T, U, V, W, X
; 3633 DRAM Macros
; 3717 BASIC.MIC[10,5351] 19:52 24-Jul-85
; 3718 THE INSTRUCTION LOOP
; 3814 NEXT INSTRUCTION DISPATCH
; 3949 EFFECTIVE ADDRESS COMPUTATION AND OPERAND FETCH
; 4015 WAIT FOR (E)
; 4083 TERMINATION
; 4142 MOVE GROUP, EXCH, BLT
; 4185 XMOVEI, XHLLI, MOVEM, EXCH, BLT
; 4216 HALFWORD GROUP
; 4363 DMOVE, DMOVN, DMOVEM, DMOVNM
; 4404 BOOLEAN GROUP
; 4561 SKPJMP.MIC[10,5351] 19:52 24-Jul-85
; 4562 TEST GROUP
; 4671 COMPARE -- CAI, CAM
; 4697 ARITHMETIC SKIPS -- AOS, SOS, SKIP
; 4746 CONDITIONAL JUMPS -- JUMP, AOJ, SOJ, AOBJ
; 4802 AC DECODE JUMPS -- JRST, JFCL
; 4942 HALT LOOP
; 4971 MAP, XCT
; 5000 STACK INSTRUCTIONS -- PUSHJ, PUSH, POP, POPJ
; 5098 SUBROUTINE CALL/RETURN -- JSR, JSP, JSA, JRA
; 5148 UUO'S
; 5378 JSYS, ADJSP
; 5420 XCT, PXCT, SXCT
; KL10 Microcode for TOPS-10 and TOPS-20 24 July 1985 V2(411) MICRO %34(270) Page TOC-2
; Table of Contents
; 5494 SHIFT.MIC[10,5351] 19:52 24-Jul-85
; 5495 ROTATES AND LOGICAL SHIFTS -- ROT, LSH, JFFO
; 5550 ROTATE AND LOGICAL SHIFT COMBINED -- ROTC, LSHC
; 5584 ARITHMETIC SHIFTS -- ASH, ASHC
; 5633 ARITH.MIC[10,5351] 19:52 24-Jul-85
; 5634 ADD, SUB
; 5659 MUL, IMUL
; 5710 MULTIPLY SUBROUTINE
; 5764 DIV, IDIV
; 5823 INTEGER DIVIDE SUBROUTINE
; 5863 BASIC DIVIDE LOOP
; 5912 DOUBLE INTEGER ARITHMETIC -- DADD, DSUB, DMUL, DDIV
; 6037 FP.MIC[10,5351] 19:52 24-Jul-85
; 6038 SINGLE FLOATING ADD & SUB -- FAD, FADR, FSB, FSBR
; 6112 SINGLE FLOATING MULTIPLY -- FMP, FMPR
; 6141 SINGLE FLOATING DIVIDE -- FDV, FDVR
; 6269 UFA, DFN, FSC
; 6320 FIX, FIXR, FLTR, EXTEND
; 6390 SINGLE PRECISION FLOATING NORMALIZATION
; 6531 DOUBLE FLOATING ARITHMETIC -- DFAD, DFSB, DFMP, DFDV
; 6682 DOUBLE PRECISION NORMALIZATION
; 6744 EXTEXP.MIC[10,5351] 19:52 24-Jul-85
; 6745 GFLT DOUBLE PRECISION ARITHMETIC
; 6864 GFLT MULTIPLY
; 6911 GFLT DIVIDE
; 6954 GFLT NORMALIZATION
; 7097 GFLT TO INTEGER CONVERSION
; 7223 GFLT DATA CONVERSION INSTRUCTIONS
; 7451 BLT.MIC[10,5351] 19:52 24-Jul-85
; 7452 XBLT
; 7502 BLT
; 7590 EXTENDED ADDRESSING CODE FOR PXCT OF BLT
; 7627 BYTE.MIC[10,5351] 19:52 24-Jul-85
; 7628 Single Byte Instructions: ILDB, LDB
; 7740 Single Byte Instructions: DPB, IDPB
; 7847 Single Byte Instructions: IBP, ADJBP
; 8054 Subroutines for Single Byte Instructions
; 8220 BYTSUB.MIC[10,5351] 19:52 24-Jul-85
; 8221 BYTE GROUP -- Some Old Style Subroutines
; 8231 INCREMENT BYTE POINTER SUBROUTINE
; 8283 BYTE EFFECTIVE ADDRESS EVALUATOR - XADDR
; 8331 LOAD BYTE SUBROUTINE
; 8354 DEPOSIT BYTE SUBROUTINE
; 8417 EIS.MIC[10,5351] 19:52 24-Jul-85
; 8418 EXTENDED INSTRUCTION SET DECODING
; 8587 ONE WORD GLOBAL BYTE POINTER SUBROUTINES FOR EXTEND
; 8642 EIS -- STRING MOVE
; 8762 EIS -- STRING COMPARE
; 8835 EIS -- DECIMAL TO BINARY CONVERSION
; 8902 EIS -- BINARY TO DECIMAL CONVERSION
; 9060 EIS -- SRCMOD SUBROUTINE TO GET MODIFIED SOURCE BYTE
; 9266 EIS -- EDIT FUNCTION
; 9525 IO.MIC[10,5351] 19:56 24-Jul-85
; 9526 I/O INSTRUCTIONS
; 9625 EXTERNAL DEVICE I/O INSTRUCTIONS
; KL10 Microcode for TOPS-10 and TOPS-20 24 July 1985 V2(411) MICRO %34(270) Page TOC-3
; Table of Contents
; 9723 INTERNAL DEVICE FUNCTIONS -- APR, CCA
; 9777 INTERNAL DEVICE FUNCTIONS -- PI
; 9832 TRACKS SUPPORT
; 10089 INTERNAL DEVICE FUNCTIONS -- PAG
; 10212 INTERNAL DEVICE FUNCTIONS -- TIM & MTR
; 10317 PRIORITY INTERRUPT PROCESSING
; 10486 KL-MODE PAGE REFILL LOGIC
; 10876 KI-MODE PAGE FAIL HANDLING
; 11028 PAGE FAIL/INTERRUPT CLEANUP FOR SPECIAL INSTRUCTIONS
; Cross Reference Index
; DCODE Location / Line Number Index
; UCODE Location / Line Number Index
; KL10 Microcode for TOPS-10 and TOPS-20 24 July 1985 V2(411) MICRO %34(270) Page 1
; KLX.MIC[10,5351] 19:52 24-Jul-85 KLX.MIC[10,5351] 19:52 24-Jul-85
; 1 .TOC "KL10 Microcode with KL Paging"
; 2
; 3 .SET/SNORM.OPT=1
; 4 .SET/XADDR=1
; 5 .SET/EPT540=1
; 6 .SET/LONG.PC=1
; 7 .SET/MODEL.B=1
; 8 .SET/KLPAGE=1
; 9 .SET/FPLONG=0
; 10 .SET/BLT.PXCT=1
; 11 .SET/SMP=0 ;No SMP (DOES RPW instead of RW FOR DPB, IDPB)
; 12 .SET/EXTEXP=1
; 13 .SET/MULTI=1 ;DOES NOT CACHE PAGE TABLE DATA
; 14 .SET/NOCST=1 ;DOES NOT DO AGE UPDATES, ETC. WITH CST = 0
; 15 .SET/OWGBP=1 ;ONE WORD GLOBAL BYTE POINTERS
; 16 .SET/IPA20=1 ;IPA20-L
; 17 .SET/GFTCNV=0 ;DO NOT DO GFLOAT CONVERSION INSTRUCTIONS [273]
; 18 ;SAVES 75 WORDS. MONITOR WILL TAKE CARE OF THEM.
; 19
; KL10 Microcode for TOPS-10 and TOPS-20 24 July 1985 V2(411) MICRO %34(270) Page 1
; EDHIS.MIC[10,5351] 19:59 24-Jul-85 KLX.MIC[10,5351] 19:52 24-Jul-85
; 20 .NOBIN
; 21
; 22 ; THE INFORMATION IN THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT
; 23 ; NOTICE AND SHOULD NOT BE CONSTRUED AS A COMMITMENT BY DIGITAL
; 24 ; EQUIPMENT CORPORATION. DIGITAL EQUIPMENT CORPORATION ASSUMES NO
; 25 ; RESPONSIBITY FOR ANY ERRORS THAT MAY APPEAR IN THIS DOCUMENT.
; 26 ; THE SOFTWARE DESCRIBED IN THIS DOCUMENT IS FURNISHED TO THE
; 27 ; PURCHASER UNDER A LICENSE FOR USE ON A SINGLE COMPUTER SYSTEM AND
; 28 ; CAN BE COPIED (WITH INCLUSION OF DIGITAL'S COPYRIGHT NOTICE) ONLY
; 29 ; FOR USE IN SUCH SYSTEM, EXCEPT AS MAY OTHERWISE BE PROVIDED IN WRITING
; 30 ; BY DIGITAL.
; 31 ; DIGITAL EQUIPMENT CORPORATION ASSUMES NO RESPONSIBILITY FOR THE
; 32 ; USE OR RELIABILITY OF ITS SOFTWARE ON EQUIPMENT THAT IS NOT SUPPLIED
; 33 ; BY DIGITAL.
; 34 ; COPYRIGHT (C) 1975,1976,1977,1978,1979,1980,1981,1982,1983,1984,1985 DIGITAL EQUIPMENT CORPORATION
; 35
; 36 .TOC "REVISION HISTORY"
; 37
; 38 ; The following collection of people have contributed to the
; 39 ; production and maintenance of this code. In reverse chronological
; 40 ; order:
; 41 ;
; 42 ; QQSV (Dick Wagman) -- beginning with edit 301
; 43 ; Sean Keenan
; 44 ; Don Dossa
; 45 ; Mike Newman
; 46 ; Jud Leonard
; 47 ;
; 48 .TITLE "KL10 Microcode for TOPS-10 and TOPS-20 24 July 1985"
; 49 .VERSION/MAJOR=2/MINOR=0/EDIT=411/WHO=0
; 50 ;REV WHY
; 51 ;
; 52 ;411 24 July 85--Another try at the SMP fix. PI cycle 7 must go to
; 53 ; memory for interlock to work, so delete use of the cache on the
; 54 ; PHYS REF. This may have performance drawbacks for TOPS-20 and
; 55 ; TOPS-10 uniprocessor, so there may have to be two versions of
; 56 ; microcode (again!) to resolve this.
; 57 ;410 11 July 85--Force PI functions 3 and 7 to use RPW cycles, so
; 58 ; SMP will work properly. Save a couple words in the process.
; 59 ;407 18 June 85--Change macro ARX_2 to ARX_2+MQ0 and fix related bug
; 60 ; in ADJBP by clearing MQ on entry to instruction. This prevents
; 61 ; ADJBP from computing the wrong byte capacities for OWGs with
; 62 ; byte sizes of 6 and 18. Also reverse AC1 and AC2 in DB2WD.
; 63 ; That was causing CVTDBx to reverse the byte pointer halves if
; 64 ; an OWG was used, ruining things entirely.
; 65 ;406 11 Mar 85--Define R17 as HARDPFW, and save the hard page fail word
; 66 ; there for TOPS-10, thus protecting it from getting clobbered by a
; 67 ; later soft page fail.
; 68 ;400 9 Aug 84--Initial first edit number for releasable version 2.0.
; 69 ;377 9 Aug 84--All of these are reserved (somewhat paranoically, I think)
; 70 ; . for version 1 as well. The likelihood of them actually being used
; 71 ;360 is vanishingly small!
; 72 ;357 9 Aug 84--Add the 136 location constraint (forgotten in 356).
; 73 ;356 8 Aug 84--Make the # field of location 136 contain the major and
; 74 ; minor version numbers. Grab a random instruction with no # field
; 75 ; in use to do this.
; KL10 Microcode for TOPS-10 and TOPS-20 24 July 1985 V2(411) MICRO %34(270) Page 1-1
; EDHIS.MIC[10,5351] 19:59 24-Jul-85 REVISION HISTORY
; 76 ;353 21 May 84--LDB and DPB in version 1 were leaving state register bit
; 77 ; 3 set when the byte word was loaded, resulting in the page fault
; 78 ; handler treating it as if it were a string instruction and trying
; 79 ; to back up a byte pointer in AC1 when the reference page faulted.
; 80 ; Cure it by reseting the state register in GBYTE. (Sure hope this
; 81 ; is the last bug in version 1!)
; 82 ;352 4 Apr 84--It turns out that the string instructions had the same
; 83 ; problem as the byte instructions in 351! Copy AR to ARX one
; 84 ; cycle earlier in both GRSC2 and IDST to fix it. Also make sure
; 85 ; that all byte pointers default to PC section by initializing VMA
; 86 ; to PC on all calls to both of these routines. This cleans up edit
; 87 ; 300.
; 88 ;351 12 Mar 84--When ILDB or IDPB incremented a one word local pointer
; 89 ; in such a way that the low half word changed sign, the section
; 90 ; computation for the byte address would get screwed up if the
; 91 ; index AC had a global address. Fix this by copying the updated
; 92 ; pointer into ARX, thus forcing EA MOD DISP to look at the proper
; 93 ; bit in ARX18.
; 94 ;350 15 Feb 84--Fix indexed indirection byte pointer effective address
; 95 ; calculations to load the indirect word into both AR and ARX.
; 96 ;347 20 Jan 84--Rewrite the MVST and CMPS dispatches to test for illegal
; 97 ; bits in the lengths before BRX gets smashed. UUO was reporting a
; 98 ; bogus op code in these situations.
; 99 ; Turn on BIG.PT by default, since it should work with both old and
; 100 ; new software and hardware.
; 101 ;346 18 Jan 84--Fix the .IFNOT variation of BIG.PT to clear the Keep
; 102 ; bit if anybody sets it. This was introduced in 343.
; 103 ; Add the DDT.BUG conditional. Under it, rewrite APRID to move
; 104 ; bit 23 to bit 5 if it is set in the serial number. This is a
; 105 ; piece of garbage which I hope can disappear soon (it seems EDDT
; 106 ; used the serial number to test for a KS-10!).
; 107 ; Fix the time field on the page map word type dispatch (the assembler
; 108 ; default was too high). Also make the PAGCNT conditional hang on
; 109 ; to the original AR value after it counts the PFH entry (this would
; 110 ; only matter for an AR parity error). Rename AR and ARX defaults to
; 111 ; MEM for the AR_MEM and ARX_MEM macros, respectively.
; 112 ;345 6 Dec 83--Clean up all the pieces and integrate the new byte
; 113 ; instruction implementation into the rest of the microcode. Also
; 114 ; add the FIN LOAD macro (more mnemonic than FIN XFER, its equivalent)
; 115 ; and include AR/AR on AR_MEM and ARX/ARX on ARX_MEM, as those macros
; 116 ; really don't work unless those fields take their default. This
; 117 ; version marks the first time that major chunks of code have been
; 118 ; bodily replaced; accordingly, with this edit the major version has
; 119 ; been bumped to 2.
; 120 ;344 1 Dec 83--Save CVTBDx fill character address, which was getting lost
; 121 ; if OWGBPs were in use, in a manner similar to that used in CMPSx
; 122 ; (see edit 310). Also, fix some conditionals for EXPMSK constant
; 123 ; generation, so that OWGBPs will assemble with EXTEXP off.
; 124 ;343 18 Nov 83--Install new code for IBP and ADJBP, saving time and
; 125 ; microwords.
; 126 ;342 8 Nov 83--Change definition of CLR PT LINE to be consistent with
; 127 ; new paging board (see also 333). Also, redefine bit 3 of effective
; 128 ; word to reverse keep sense (so unkept only pages are cleared when
; 129 ; bit 3 is set).
; 130 ;341 28 Sep 83--Force the ARX to contain the first byte pointer word on
; 131 ; exit from INCRBP so that subsequent EA MOD DISP wil work. Force
; KL10 Microcode for TOPS-10 and TOPS-20 24 July 1985 V2(411) MICRO %34(270) Page 1-2
; EDHIS.MIC[10,5351] 19:59 24-Jul-85 REVISION HISTORY
; 132 ; OWGs to explicitly wait for store to complete after increment
; 133 ; (unfortunately there is no implicit MB WAIT in MEM/EA CALC. Sorry!).
; 134 ;340 The OWG/OWL test for the byte instructions had the sense of the
; 135 ; test backwards in several places. Rework LDBDSP, INCRBP, and
; 136 ; DPBDSP. This makes it impossible for DPEA to test for a byte
; 137 ; off the top of a word on its return, so it has been desubroutinized.
; 138 ;337 15 Sep 83--Start work on a complete rewrite of all byte and character
; 139 ; instructions. Begin by installing initial versions of LDB, ILDB,
; 140 ; DPB, and IDPB. All of these are designed to make one word global
; 141 ; byte pointers run faster by loading their shift counts from CRAM
; 142 ; dispatch tables. Also, reduce time for DISP/SH0-3 to three ticks.
; 143 ; Move CDBLST into FP to allow EXTEXP conditional to be turned off.
; 144 ; Also, shuffle conditional placement to prevent EXTEXP shutoff from
; 145 ; turning off XBLT as well.
; 146 ;336 9 Aug 83--Back off 330 for a bit, since TOPS-10 7.02 must be tested
; 147 ; and OWGs in section 0 fail for string instructions (they get converted
; 148 ; to TWGs, which are illegal in section 0). For now, we will maintain
; 149 ; both sources.
; 150 ;335 Force memory to be released for SMP case of DPB if P > 36 causes no
; 151 ; actual data to be stored. Make an OWG reference to an address >
; 152 ; 37,,777777 cause a page fail (GBYTE was stripping the excess bits).
; 153 ;334 Fix conflict generated in CLRPT by 333 by creating new subroutine
; 154 ; ARSWAP which is just AR_AR SWAP. Make several other routines call it,
; 155 ; thus saving a few words.
; 156 ;333 Add new conditional BIG.PT. Under it, add code to implement the "Keep
; 157 ; me" bit for paging as bit 5 of the page table, and to move it to page
; 158 ; map bit 23 during page refill. Also make DATAO PAG not clear Kept
; 159 ; pages if bit 3 of the word is off.
; 160 ;332 Redefine all bank 7 ACs as R0,...,R17, and all bank 6 ACs as P0,...,
; 161 ; P17. Change all other alias definitions to refer to these. This
; 162 ; gives us a uniform cross reference for all scratch register references.
; 163 ; Put all macro definitions into alphabetical order, making it easier
; 164 ; to look up a macro definition. Split the edit history into its own
; 165 ; file. There are no functional changes from 331.
; 166 ;331 Allow XSFM anywhere. Clean up the code a bit in the process. There
; 167 ; still remain a number of references to XSFM or XPCW distinctions,
; 168 ; and these could almost certainly be cleaned up further.
; 169 ;330 Allow one word global byte pointers in section zero. This includes
; 170 ; changes in BYTE, EIS, and FP. Change GBYTE and CNV2WD to return 2;
; 171 ; eliminate GTST as obsolete. Also shuffle the calls to these routines
; 172 ; to conform to the new calling conventions, and put the OWG test at
; 173 ; the beginning of IBP, ILDB, IDBP, LDB, DPB, and ADJBP.
; 174 ;327 Add PAGCNT conditional. Under it, include control to count entry
; 175 ; into PFH code and DATAO PAG with bit 2 set.
; 176 ;326 Change VMA restoration in INC2WD and CNV2WD (see edits 320 and 307)
; 177 ; to use RSTR VMA_MQ in order to keep the global/local sense of the
; 178 ; reference. This was causing ILDBs of OWGs in shadow memory to
; 179 ; save the incremented byte pointer in the ACs instead of memory.
; 180 ;325 Add VMA/LOAD to local indexed EA computation for EXTEND E1 to make
; 181 ; it read the section number from VMA instead of PCS (!) if the index
; 182 ; is section local.
; 183 ;324 Force the XADDR conditional to use RPW type references for DPB and
; 184 ; IDPB if the SMP conditional is on, even if one word globals are not
; 185 ; active.
; 186 ;323 Add missing constraint near NOT.WR, accidentally broken by 322.
; 187 ;322 Generate the A(cessible) bit in a page fail word caused by a read
; KL10 Microcode for TOPS-10 and TOPS-20 24 July 1985 V2(411) MICRO %34(270) Page 1-3
; EDHIS.MIC[10,5351] 19:59 24-Jul-85 REVISION HISTORY
; 188 ; violation if the page is otherwise accessible and if no CST is present.
; 189 ; This could be fixed for the CST present case as well, but has been
; 190 ; deferred since we are tight on space and no one seems to need it
; 191 ; anyway.
; 192 ;321 Prevent statistics microcode from losing traps by forcing NICOND
; 193 ; dispatch 11 to ignore the statistics and take the trap.
; 194 ;320 Restore the VMA again in INC2WD (broken by 307), since the state
; 195 ; register bits may have changed in the interim. This was causing
; 196 ; PXCT to do surprising things (mostly bad).
; 197 ;317 Originally, this was an attempt to uncount multiply counted op
; 198 ; codes which resulted from interrupts during long instructions.
; 199 ; That project has been shelved for now. Instead, the second
; 200 ; NICOND dispatch during op code counting has had its final constraint
; 201 ; fixed.
; 202 ;316 Make counting only version compatible with time and counting by making
; 203 ; counting only version use TRX2 and TRX3, removing physical contiguity
; 204 ; requirement.
; 205 ;315 Op code counting lives again! The setup code activated by DATAO PI
; 206 ; was attempting to write the TRX registers with data fresh from memory,
; 207 ; resulting in parity checks when it was used (see edit 73, for example).
; 208 ; Juggle code to overlap next address calculation with parity wait.
; 209 ;314 Add CST.WRITE conditional to facilitate assembly of microcode
; 210 ; without the CST writable bit (see edit 303).
; 211 ;313 Put TIME/3T on XFERW, as the assembler was getting the wrong
; 212 ; value with both AR_MEM and ARX_MEM macros present.
; 213 ;312 Fix definition of BYTE RPW to include a write test. This was
; 214 ; causing the SMP version of DPB to hang when memory was readable
; 215 ; but not writable.
; 216 ;311 Make all IOP function 7 style of references look in the cache.
; 217 ;310 Improve the fix in 307 to save the computed E0+1 in FILL during
; 218 ; OWGBP conversion and to restore the VMA from there when done.
; 219 ; Also, make sure that the VMA is initialized to PC for all cases
; 220 ; when doing effective address calculations for two word globals
; 221 ; in string instructions. 307 was not enough to clean up the
; 222 ; CMPSx fill problem, since VMA HELD was never loaded.
; 223 ; Force EXT2WD to prereference AC4 and AC5 so that glitch discovered
; 224 ; for second edit 210 will not be activated.
; 225 ;307 Restore VMA from MQ at end of CNV2WD (and remove it from INC2WD,
; 226 ; saving a word in the process). This was causing CMPSx to load
; 227 ; a random fill word and MOVSLJ to store to a random place when the
; 228 ; source length was zero if one word globals were in use.
; 229 ; Force page fail code to look for ARX as well as AR parity errors
; 230 ; (now possible with BYTE RPW implemented).
; 231 ; Make sign extension of E1 go to right place in EXTEND decoding of
; 232 ; offset instructions (broken in 301).
; 233 ;306 Add University of Essex code to statistics (TRACKS) code to make
; 234 ; it work with address break enabled.
; 235 ;305 Fix CST write bit logic to not test bit 18 when reading.
; 236 ;304 Switch byte read interlock from LDB to DPB (broken in 303).
; 237 ;303 Implement bit 18 of a CST entry as a write enable bit in addition
; 238 ; to all the other write enable functions.
; 239 ; Knock one cycle out of byte deposit where the byte is being
; 240 ; deposited into the high order byte of a word.
; 241 ; Implement the SMP conditional for extended addressing by
; 242 ; replicating all the byte effective address calculation code for
; 243 ; DPB. This is unfortunate, but necessary due to the huge dispatch
; KL10 Microcode for TOPS-10 and TOPS-20 24 July 1985 V2(411) MICRO %34(270) Page 1-4
; EDHIS.MIC[10,5351] 19:59 24-Jul-85 REVISION HISTORY
; 244 ; table that ends this subroutine.
; 245 ;302 Move XFERW out of EIS (which no longer absolutely requires it
; 246 ; in line) into SKPJMP (more in the heart of things). Also
; 247 ; juggle comment lines and code layout to reduce the listing
; 248 ; size a bit and to force some of the .TOC lines into the table
; 249 ; of contents (even though the code nearby may be suppressed).
; 250 ;301 Fix ADJBP so that instructions which occur at the last word on
; 251 ; a page do not cause a page failure of some random type (one cycle
; 252 ; too many between I FETCH and NICOND).
; 253 ; Fix effective address calculation for EXTEND so that only offset
; 254 ; instructions (and not GSNGL, for example) will have E1 sign
; 255 ; smeared.
; 256 ; Implement XJRST. Also force JSP and JSR to do full 30 bit
; 257 ; effective address calculations.
; 258 ;300 ADD LOAD OF VMA FROM PC IN PUTDST TO GET THE SECTION ADDRESS
; 259 ; CORRECT ON THE STRING INSTRUCTIONS.
; 260 ;277 Add EA CALC table for SMP configurations of extended addressing
; 261 ; for TOPS-10. (TOPS-20 paging)
; 262 ;276 Force global EA CALC for EXTEND instructions in PUTDST.
; 263 ;275 FIX THE ERROR CODE IN STRING COMPARE FOR ILLEGAL BITS IN THE
; 264 ; LENGTH FIELD. WAS CAUSING AR PARITY ERRORS.
; 265 ;274 SAVE THE API FUNCTION WORD ON AN IO PAGE FAIL INSTEAD OF THE
; 266 ; PAGE FAIL WORD. THIS TAKES PLACE IN BOTH THE AC BLK 7 AC 2
; 267 ; AND THE MONITOR.
; 268 ;273 PUT CONDITIONALS AROUND 4 GFLOAT CONVERSION INSTRUCTIONS.
; 269 ; THEY WILL ACT AS MUUO'S AND MONITOR WILL TAKE CARE OF THEM.
; 270 ;272 CONO APR 200000 AT TIMES WAS NOT GENERATING EBUS RESET OF A
; 271 ; SUFFICIENT LENGTH TO CLEAR DTE REGISTERS. ADDED ANOTHER
; 272 ; MICROWORD SO THAT CONO APR IS NOW UP FOR TWO FULL WORDS WHICH
; 273 ; GETS AROUND THE HARDWARE PROBLEM.
; 274 ;271 ILLEGAL INDIRECT PAGE FAIL (24) WAS NOT ALLOWING USER TO BE SET.
; 275 ;270 WHEN IN SECTIONS > 1, AN UPDATED OWGBP WOULD BE WRITTEN INTO
; 276 ; MEMORY INSTEAD OF THE AC'S.
; 277 ;267 CHANGED TESTS FOR OWGBP TO TEST FOR PC SEC0 FIRST. SAVES 33 NS.
; 278 ;266 CONDITIONALS ON FOR TOPS-20 DEVELOPMENT.
; 279 ;265 REMOVED EDIT 244. SOFTWARE ENGINEERING WILL SUPPLY MONITOR
; 280 ; CODE TO TAKE CARE OF PROBLEM. CODE COSTS TOO MUCH TIME IN
; 281 ; THE INSTRUCTION EXECUTION.
; 282 ;264 ADDED CONDITIONALS TO CODE FOR IPA20, OWGBP AND NO CST UPDATE IF
; 283 ; CBR IS ZERO. THIS IS FOR RELEASE 5 OF TOPS-20.
; 284 ;263 IBP DID NOT CLEAR FPD ON EXIT.
; 285 ;262 ALLOW XBLT TO BE VALID IN SECTION 0.
; 286 ;261 FIX CODE AT END OF ADJBP CODE TO CLEAR STATE REG. IF ILDB
; 287 ; WITH 2 WD GLOBAL POINTER POINTING TO ADDRESS NOT IN CORE
; 288 ; CLEAN DISPATCHES TO WRONG CODE BECAUSE SR LEFT OVER FROM
; 289 ; ADJBP.
; 290 ;260 FIX FM PARITY ERRORS AT MVF1: ADDED NULL CALL TO RET2:
; 291 ; AT MVST: TO TAKE CARE OF EXTRA TICK FOR PARITY.
; 292 ;257 MAKE SURE THAT THE UPDATED ONE WORD GLOBAL BYTE POINTER IS
; 293 ; WRITTEN BACK INTO THE CORRECT CONTEXT.
; 294 ;256 MAKE ANOTHER ATTEMPT TO FIX PXCT OF ONE WORD GLOBAL BYTE POINTERS.
; 295 ; THE GIBP CODE GETS THE SAME CHANGES AS EDIT 255.
; 296 ;255 MAKE ONE WORD GLOBAL BYTE POINTERS WORK WITH PXCT. THE STATE
; 297 ; REGISTER BITS ON MCL4 (NOT TO BE CONFUSED WITH CON3), WERE NOT
; 298 ; BEING SET PROPERLY TO ALLOW PREVIOUS ENA AND USER ENA TO BE SET.
; 299 ; GUARANTEE THAT THESE SR BITS ARE SET PRIOR TO THE LOAD OF THE VMA.
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; 300 ;254 FIX PROBLEM WITH OWGBP WHERE FPD DOES NOT EFFECT
; 301 ; INC OF POINTER AFTER PAGE FAIL
; 302 ;253 FIXED ADDRESSING FOR SH DISP AT GADJL0:
; 303 ;252 MOVE STRING INSTRUCTIONS DO NOT GET THE CORRECT DATA ON
; 304 ; LOCAL POINTERS IN NON 0 SECTIONS
; 305 ;251 ADD CODE FOR ONE WORD GLOBAL BYTE POINTERS.
; 306 ; TOOK OUT EDITS 243 AND 250 TO GET ENOUGH SPACE IN CRAM
; 307 ; FOR THIS EDIT. OWGBP WITH EXTEND INSTRUCTIONS WILL NOT
; 308 ; RETURN A OWGBP. THEY WILL RETURN A TWO WORD GLOBAL BP.
; 309 ;250 ALLOW SMP SWITCH TO EFFECT TOPS-20 MODEL B TO DO RPW IN
; 310 ; BYTE INSTRUCTIONS.
; 311 ;247 DO NOT DO A CST UPDATE OR AGE UPDATE IF THE CBR IS ZERO.
; 312 ;246 EXTEND OP CODE DECODE FOR MODEL A WAS ACCEPTING MODEL B
; 313 ; OP CODES (20-31). ADDED CONDITIONALS TO CODE TO FIX.
; 314 ;245 FIX 2 WORD GLOBAL BYTE POINTER BUG WITH IBP INSTRUCTION
; 315 ; WITH EXTENDED ADDRESSING OUT OF SECTION 0
; 316 ;244 FIX MOVST EXTEND INST. SO THAT ILLEGAL (> 36) S FIELD
; 317 ; DOES NOT CAUSE STOP CODE TO CRASH SYSTEM FOR TOPS-10 MODEL B.
; 318 ;243 WRTIME TRIED TO DO MEM WRITE EVEN THOUGH THE INSTRUCTION
; 319 ; DOES NOT DO ANYTHING TO MEMORY. CAUSED PROBLEMS IF THE MEMORY
; 320 ; LOCATION WAS NOT WRITABLE.
; 321 ;242 FIX CODE FROM EDIT 234 TO GET PF CODE OF 24.
; 322 ;241 FIX DFAD AND DFMP FOR ROUNDING OCCURS PROPERLY. ADDED STICKY
; 323 ; BIT FOR LEAST SIGNIFICANT BITS OF THE RESULT.
; 324 ;240 FIX GFLT INSTRUCTIONS GFIX AND DGFIX SO THEY WILL TRUNCATE NEGATIVE
; 325 ; NUMBERS IN THE CORRECT DIRECTION. THE MQ MUST BE ZERO BEFORE
; 326 ; THE ARX_2 MACRO IS INVOKED OR THE ARX MIGHT GET A 3 FROM MQ00.
; 327 ;237 ADD OPTION BIT FOR PV CPU IN THE APRID WORD AS IT IS DOCUMENTED
; 328 ; IN ALL OF THE HARDWARE DOCUMENTATION. SET THE BIT ACCORDING
; 329 ; TO THE MODEL.B OPTION SWITCH. IT WILL BE MAGIC NUMBER BIT 3.
; 330 ;236 ALLOW THE INTEGER DIVIDE OF THE LARGEST NEGATIVE NUMBER BY
; 331 ; PLUS ONE TO SUCCEED. THIS USED TO BE A DOCUMENTED RESTRICTION
; 332 ; THAT THIS OPERATION WOULD CAUSE AN OVERFLOW AND NO DIVIDE.
; 333 ;235 FIX JRA SO IT DOESN'T FALL INTO SECTION ZERO FROM A NON-ZERO
; 334 ; SECTION EVERY TIME BY WRITING THE PC SECTION INTO THE VMAX.
; 335 ;234 BUILD A PAGE FAIL CODE OF 24 WHEN AN ILLEGAL INDIRECT WORD
; 336 ; IS FOUND DURING THE EFFECTIVE ADDRESS CALCULATION IN
; 337 ; A NON-ZERO SECTION. THE PAGE FAIL CODE WAS PREVIOUSLY NOT
; 338 ; BEING REPORTED.
; 339 ;233 SAVE THE IOP FUNCTION WORD THAT APPEARS ON THE EBUS WHEN AN
; 340 ; EXTERNAL DEVICE INTERRUPTS THE CPU. SAVE THIS INFORMATION
; 341 ; ON EVERY INTERRUPT IN AC BLOCK 7, AC 3. THE CONTENTS
; 342 ; OF THIS AC WILL BE PRESERVED UNTIL THE NEXT INTERRUPT.
; 343 ; OPERATING SYSTEMS SHOULD SAVE THIS INFORMATION AS SOON AS POSSIBLE
; 344 ; IF ITS CONTENTS ARE TO BE RELIABLE AND MEANINGFUL.
; 345 ;232 ADDS 13 NEW INSRUCTIONS FOR SUPPORTING FORTRAN78 ON MODEL
; 346 ; B MACHINES. THESE INSTRUCTIONS ARE:
; 347 ; OPCODE SYMBOL
; 348 ; ====== ======
; 349 ; 102 GFAD AC,E
; 350 ; 103 GFSB AC,E
; 351 ; 106 GFMP AC,E
; 352 ; 107 GFDV AC,E
; 353 ; EXTEND INSTRUCTIONS EXTEND OPCODE
; 354 ; ====== ============ ====== ======
; 355 ; EXTEND AC,[GSNGL 0,E] 21
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; EDHIS.MIC[10,5351] 19:59 24-Jul-85 REVISION HISTORY
; 356 ; EXTEND AC,[GDBLE 0,E] 22
; 357 ; EXTEND AC,[DGFIX 0,E] 23
; 358 ; EXTEND AC,[GFIX 0,E] 24
; 359 ; EXTEND AC,[DGFIXR 0,E] 25
; 360 ; EXTEND AC,[GFIXR 0,E] 26
; 361 ; EXTEND AC,[DGFLTR 0,E] 27
; 362 ; EXTEND AC,[GFLTR 0,E] 30
; 363 ; EXTEND AC,[GFSC 0,E] 31
; 364 ;231 FIX IN PROBLEM IN EDIT 215 TO XDPB THAT PREVENTED THE KL
; 365 ; FROM HANDLING INTERRUPTS WHILE EVALUTAING AN INDEXED INDIRECT CHAIN.
; 366 ; AN "=0" WAS MISSING BY BYTEIP.
; 367 ;230 TO PRESERVE COMPATABILITY WITH THE KS10 AND BECAUSE OF SPACE
; 368 ; LIMITATIONS IN TOPS20 MODEL A, THE SPECIFICATION FOR THE
; 369 ; CVTDBX INSTRUCTIONS HAVE BEEN CHANGED TO ELIMINATE THE NEED
; 370 ; FOR AN OVERFLOW TEST DURING THE CONVERSION. THIS CHANGE
; 371 ; EFFECTIVELY REMOVES EDIT 221.
; 372 ;227 DELETE EDIT 222 AND RETURN THE CVTBDX INSTRUCTIONS TO THEIR
; 373 ; OLD, BROKEN FUNCTIONALITY SINCE ANY ATTEMPT TO PREVENT THE
; 374 ; FLAGS FROM BEING CHANGED PREMATURELY HAS TO CONTEND WITH
; 375 ; INTERRUPTABILITY PROBLEMS. THE HARDWARE REFERENCE MANUAL
; 376 ; HAS A FOOTNOTE ABOUT THE FLAG PROBLEM SO THE CURRENT FUNCTIONALITY
; 377 ; IS DOCUMENTED FOR USERS.
; 378 ;226 PREVENT AR PARITY ERRORS WHEN INCREMENTING BYTE POINTERS IN THE ACS.
; 379 ;225 THE CODE TO SUPPORT THE MX20 VIA THE SBUS DIAG LOOP MECHANISM
; 380 ; DOES NOT TIME OUT CORRECTLY BECAUSE THE LOOP COUNTER IS BEING
; 381 ; REINITIALIZED EVERY TIME THROUGH THE LOOP. FIX THIS PROBLEM
; 382 ; EVEN THOUGH THE CODE IS NOT ASSEMBLED IN CURRENT RELEASES.
; 383 ;224 FIX BUG IN EDIT 223 THAT CAUSED THE WRONG PAGE FAIL
; 384 ; WORD TO BE WRITTEN WHEN AN I/O PAGE FAIL OCCURS.
; 385 ;223 WHEN A MEMORY PARITY ERROR OCCURRS AT PI LEVEL, AS EVIDENCED
; 386 ; BY AN AR DATA PARITY ERROR, THE DTE MAY BE WAITING FOR A
; 387 ; RESPONSE. IF IT IS, A DEX FAILURE WILL OCCUR UNLESS WE CAUSE
; 388 ; DEMAND TO WIGGLE. WE CAN DO THIS BY FORCING THE DATA IN THE
; 389 ; AR OVER THE EBUS.
; 390 ;222 CVTBDX IS NOT SUPPOSED TO CHANGE THE CONTENTS OF THE ACS
; 391 ; OR MEMORY IF THE CONVERTED NUMBER WILL NOT FIT INTO THE
; 392 ; DESTINATION FIELD. IT WAS, HOWEVER, CHANGING THE FLAGS
; 393 ; BEFORE IT KNEW IF THE NUMBER WOULD FIT.
; 394 ;221 THE CVTDBX WERE FAILING TO SET OV AND TRAP1 WHEN THE
; 395 ; CONVERTED DECIMAL NUMBER WOULD NOT FIT INTO A
; 396 ; DOUBLE WORD.
; 397 ;220 THE TRANSLATE INSTRUCTIONS WERE USING A 15 BIT WIDE
; 398 ; FIELD FOR THE REPLACEMENT BYTE IN THE TRANSLATE TABLE
; 399 ; WHILE THE SPECIFICATION STATED THAT THE TRANSLATE
; 400 ; INSTRUCTIONS WOULD USE ONLY 12 BITS.
; 401 ;217 PREVENT CRAM PARITY ERRORS CAUSED BY DISPATCHING TO LOCATION
; 402 ; 3042 WHEN INDEXING IS SPECIFIED IN THE EFFECTIVE ADDDRESS
; 403 ; CALCULATION OF E1 WHEN THE EXTEDED OPCODE IS ZERO (ILLEGAL).
; 404 ; THE FIX IS TO PUT A JUMP TO UUO AT 3042.
; 405 ;216 CHANGE THE DEFAULT VALUE FOR THE SMP SWITCH TO BE ONE. THIS
; 406 ; CAUSES THE MICROCODE TO INCLUDE SMP SUPPORT BY DEFAULT.
; 407 ;215 CHANGES DPB INSTRUCTION TO R-P-W CYCLE ON DATA FETCH PORTION OF
; 408 ; INSTRUCTION TO SOLVE AN INTERACTION PROBLEM IN AN SMP OPERATING
; 409 ; SYSTEM. THIS CHANGE ONLY APPLIES TO MICROCODES FOR TOPS-10
; 410 ; AND TOPS-20, MODEL A.
; 411 ;214 ADDED CHANGES FOR XADR, RELEASE 4 AS FOLLOWS.
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; EDHIS.MIC[10,5351] 19:59 24-Jul-85 REVISION HISTORY
; 412 ; STORE PREVIOUS CONTEXT SECTION (PCS) IN FLAGS WORD (BITS 31-35)
; 413 ; IF EXEC MODE AND XSFM OR XPCW INSTRUCTION,MUUO OR PAGE FAIL.
; 414 ; RESTORE PCS FROM FLAGS WORDS (BITS 31-35) WHEN XJRSTF OR XJEN
; 415 ; IS EXECUTED IN EXEC MODE AND THE NEW PC IS ALSO IN EXEC MODE.
; 416 ;213 SET/FPLONG=0 PARAMETER ADDED TO TOPS-10 MICROCODE FOR KL MODEL
; 417 ; A AND MODEL B.
; 418 ;212 CHANGE THE CODE AT LDIND: TO TEST FOR USER MODE IF USER MODE
; 419 ; TURN OFF SPECIAL CYCLE THAT MAY STILL BE ON. THE MICROCODE WILL DEPEND
; 420 ; ON KERNAL PROGRAMS TO NOT GET IN PAGE POINTER
; 421 ; LOOPS. INSTRUCTIONS EXECUTED FROM THE CONSOLE WILL NOT WORK.
; 422 ; PI INSTRUCTIONS GET A RESTRICTION TO NOT GET INDIRECT PAGE POINTERS
; 423 ; IN THEIR PAGING CHAIN AS DO EXAMINES AND DEPOSITS AND BYTE TRANSFERS.
; 424 ;211 CHANGE THE TEST FOR INDIRECT POINTERS TO NOT HAPPEN ON SECTION
; 425 ; POINTERS AND JUST ON INDIRECT PAGE POINTERS. AT LDIND:+1 AND LDIMM:+2
; 426 ;210 MAKE ALL AC+# MICROINSTRUCTIONS HAVE THE # FIELD THE SAME IN THE
; 427 ; PREVIOUS MICROINSTRUCTION TO SOLVE A TIMONG GLITCH IN THE HARDWARE.
; 428 ; MAKE EXCHANG MARK AND DESTINATION POINTERS UUO IF THEY DO NOT
; 429 ; HAVE BYTE POINTERS OF EQUAL LENGTH. CHANGES PERVASIVE IN EIS ALSO IN PF
; 430 ; RECOVERY IN IO.
; 431 ; MAKE THE LOAD OF AN INDIRECT POINTER CLEAR PI CYCLE IF SET.
; 432 ; THIS MEANS THAT THE MONITOR CANNOT USE KERNAL CYCLE, INSTR ABORT
; 433 ; INH PC+1 OR HALT IN A PI CYCLE IF AN INDIRECT POINTER CAN
; 434 ; BE A PART OF THE REFILL. ALSO NOTE THE POSSIBILITY OF GETTING AN
; 435 ; INTERUPT BEFOR THE PI INSTRUCTION COMPLETES. (NEVER CONTINUES PI
; 436 ; INSTRUCTION) CHANGES AT LDIND.
; 437 ;207 CHANGE SBUS DIAG CODE FOR MOS PUT IT IN MOS CONDITIONAL /MOS=1
; 438 ; IF ON SBUS DIAG TRIES AT LEAST 8 TIMES TO GET A RESPONSE
; 439 ; OTHER THAN -1 IF IT GOT -1 ALL THOSE TIMES THE MICROCODE
; 440 ; GIVES UP AND RETURNS 0
; 441 ;206 FINAL FIXES TO PUSHM AND POPM
; 442 ;205 FIX BUG IN INDEX CALCULATION OF E1 FOR EXTENDED ADDRESSING.
; 443 ; INDEXING REQUIRED THAT AN AREAD BE PERFORMED IN ORDER TO LOAD
; 444 ; THE AR WITH A CORRECT FINAL RESULT. THE EFFECTIVE ADDRESS CALCULATION
; 445 ; AROUND EXTLA: GOT A NEW MACRO ADDED FOR INDEXING THAT DOES THE AREAD.
; 446 ; ABSOLUTE LOCATIONS IN THE RANGE 3040 GET USED AS TARGETS FOR THIS
; 447 ; AREAD THEN THE CODE REJOINS THE OLD CODE AT EXT2:
; 448 ; THE AREAD WAS NECESSARY FOR THE HARDWARE MAGIC TO LOAD PARTS OF THE
; 449 ; AR DEPENDING ON THE INDEX REGISTER AND OTHER EXTENDED ADRESSING
; 450 ; PARAMETERS.
; 451 ;204 ADD AUTOMATIC VERSION NUMBER
; 452 ; ADD CODE TO DO SBUS DIAG TESTING REQUIRED BY MOS
; 453 ;203 PUT THE BLKO PAG, CHANGE IN 201 IN A KLPAGING CONDITIONAL
; 454 ; KIPAGING GETS TANGLED IN AR PARITY ERRORS AND IN GENERAL DOES
; 455 ; THE WRONG THINGS
; 456 ;202 TURN OFF IMULI OPTIMIZATION IT GETS THE SIGN BIT AND THE OVERFLOW
; 457 ; FOULED UP (TURNED OFF FOR MODEL B ONLY WAS OFF IN MODEL A)
; 458 ;201 CHANGE BLKO PAG, TO INVALIDATE ONLY ONE ENTRY BY CLEARING IT
; 459 ; CHANGES AT PAGBO PAGBO+1 AND CLRPT+3 CLRPT+3 GETS SETUP THAT USED
; 460 ; TO BE AT PAGBO+1, PAGBO+1 NOW CLEARS ENTRY AND QUITS
; 461 ; KLPAGE ERROR CHECK FOR TOPS 10 MODEL A TO CAUSE ERROR
; 462 ; IF SWITCH SETTINGS ARE IN CONFLICT DIDDLED
; 463 ;200 CHANGE ALL EXEC REF TRACKS FEATURES BACK TO PHYS REF
; 464 ; ON SUSPICION THAT PAGE FAULTS ARE NOT HANDLED PROPERLY
; 465 ; MAKE NON TRACKS INSTR STAT FEATURES GET FOUR PHYSICAL
; 466 ; PAGE NUMBERS FROM FIRST FOUR LOCATIONS IN THE PAGE PRESENTED
; 467 ; IN THE DATAO PI, THE CODE ALSO USES THAT PAGE FIRST
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; EDHIS.MIC[10,5351] 19:59 24-Jul-85 REVISION HISTORY
; 468 ; LOCATION TO PUT THE INITIAL JUNK INTO ON STARTUP
; 469 ;177 FIX SOME BUGS IN OPCODE TIMING CODE AT OPTM0: AND BEYOND
; 470 ;176 ADD TO THE TIME COUNTING CODE CODE THAT COUNTS FREQUENCY
; 471 ; OF EACH OPCODE IN PAGE+2 AND PAGE+3
; 472 ;175 FIX TIME COUNTING CODE TO ACOUNT FOR EACH OPCODE IN THE
; 473 ; USER OR EXEC MODE IT WAS SEEN IN, EDGE COUNTS WERE DONE IN
; 474 ; WRONG MODE CHANGES UNDER OP.TIME CONDITONALS (PERVASIVE)
; 475 ;174 CHANGE TRACKS AND TIME COUNTING TO USE EXEC VIRTUAL SPACE
; 476 ; INSTEAD OF PHYSICAL SPACE
; 477 ;173 SEPERATE OUT THE DISMISS AT 626: BECAUSE OF SUSPECTED BUG
; 478 ;172 THE FACT THAT XJEN DISMISSES BEFORE READING NEW PC WORDS CAUSES
; 479 ; A PROBLEM FOR TOPS 20. REHASH THE CODE AT 600: TO 637: TO MAKE
; 480 ; XJEN READ THE TWO WORDS FIRST AND THEN DISMISS.
; 481 ;171 CAUSE IO PAGE FAIL FIX IN 170 TO SHIFT AT END GETTING CORRECT
; 482 ; PAGE FAIL WORD CHANGE AT IOPGF:
; 483 ;170 MAKE CLRFPD: GO DIRECT TO FINI: INSTEAD OF THROUGH NOP: THIS WAS
; 484 ; COSTING 2 TICS IN BYTE INSTRUCTIONS
; 485 ; CHANGE IO PAGE FAIL TO SAVE A VIRTUAL ADDRESS IN THE AC BLOCK 7
; 486 ; LOCATION 2 INSTEAD OF THE DATA THAT WAS ON THE EBUS CHANGES AT
; 487 ; PGF4:+1 AND IOPGF:
; 488 ;167 CHANGE DEFAULT ON ADB MIXER SELECTS. NO DEFAULT NOW SUBFIELD U23
; 489 ; IS DEFAULTED TO 1 TO AVOID SELECTING FM AND NEEDING TO WAIT FOR PARITY.
; 490 ; THIS LEAVES THE OTHER BIT OF THE FIELD AVAILABLE FOR PARITY
; 491 ; EPT MOVED TO 540 USING SWITCH IN KLX,KLL (KLA,KLB NOW DEFUNCT)
; 492 ;166 CHANGE FIELD DEFINITION FORMAT CHANGE THE WAY THE OPTIONS FIELD
; 493 ; GETS ITS VALUES ASSIGNED. EACH BIT GETS A FIELD DEFINITION.
; 494 ;165 BUG IN 161 TO 164 WAS MISSING AC0 AT POP2: PARITY BIT WAS PUT THERE
; 495 ; IN THE NEWER MICROCODES
; 496 ; INSTALL MANY THINGS TO MAKE WORD STRING MOVES WORK START AT
; 497 ; MOVWD1 AND UNTILL BMVWD1 ALSO ASSORTED MACROS ARE ADDED
; 498 ; THESE ARE INSTALLED IN A SEPERATED EIS FILE (WDEIS) FOR THE MOST PART
; 499 ; THERE ARE SOME NEW MACROS AND THE CLEAN+17 LOCATION IS USED FOR
; 500 ; THIS CASE UNDER MODEL B CONDITIONAL INTERRUPTS DO NOT WORK YET
; 501 ; IN THIS CODE BUT ALL DATA TRANSFERS ARE CORRECT. INTERRUPTS ARE
; 502 ; TAKEN SO SUSPECT THE PROBLEM IS IN THE CLEANUP CODE.
; 503 ;164 LEAVE IN ONLY MAP FIX
; 504 ;163 TAKE OUT MAP FIX LEAVING XHLLI IN AND JRSTF IN
; 505 ;162 PUT XHLLI BACK IN TAKE OUT JRSTF ONLY IN SEC 0 CODE
; 506 ;161 XHLLI OUT TO DEBUG ADD RSTF0: TO MAKE TEST FOR JRSTF IN NON
; 507 ; 0 SECTIONS TEST IN ALL CASES
; 508 ;157 INSTALL XHLLI MAKE JRSTF UUO ON NON ZERO SECTIONS
; 509 ; ALSO MAKE MAP DOING A REFILL PAGE FAIL RIGHT THIS MEANS THAT AFTER
; 510 ; CLEAN IT CANNOT DO ANYTHING INTERESTING IF AN INTERRUPT IS PENDING
; 511 ; CHANGES AT MAP2:
; 512 ;156 REINSERT A SKP INTRPT IN THE PAGE FAULT HANDLER TO HAVE INDIRECT
; 513 ; POINTER CHAINS INTERRUPTABLE. AT PGRF6:+6
; 514 ;155 ABORTIVE MAP FIX FIX REMOVED PROBLEM MUST BE FIXED IN HARDWARE.
; 515 ;154 ADD TESTS FOR AC'S IN PHYSICAL REFERENCES FOR EXAMINES AND DEPOSITS
; 516 ; PHYS REFS GO TO MEMORY, NOT AC'S AFTER PROBLEM SHEET 1675
; 517 ; CHANGES AT PILD+3 PIFET+2 PSTOR PHYS1 PHYS2 PHYS3
; 518 ; ADD CHANGES IN TRACKS TO MAKE MODEL A WORK AT TRK2+2 AND +3
; 519 ;153 ADD SPECIAL CODE FOR PXCT OF BLT THIS HOPEFULLY CAN GO AWAY
; 520 ; WHEN THE EXTENDED ADDRESSING MONITOR DOES NOT USE PXCT ANYMORE
; 521 ; IT IS UNDER .IF/BLT.PXCT CONDITIONAL AND COSTS 12 WORDS
; 522 ;152 CHANGE WHAT BLT DOES TO MATCH THE SPEC SR_BLT(XXX) IS CHANGED TO
; 523 ; NOT FORCE GLOBAL ADDRESSING THE LOAD VMA(EA)_ARX+BR AND
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; EDHIS.MIC[10,5351] 19:59 24-Jul-85 REVISION HISTORY
; 524 ; STORE VMA(EA)_ARX MACROS ARE ADDED TO FORCE THE GLOBAL/LOCAL PARAMETERS
; 525 ; TO BE THE SAME AS THOSE OF THE EFFECTIVE ADDRESS
; 526 ;151 PUT THE EPT AND UPT AT 540 UNDER SWITCH CONTROL .IF/EPT540
; 527 ;150 VERSION NUMBER BACKED UP TO PRESERVE SPACE IN VERSION NUMBER FIELD
; 528 ;304 EXTEND 0 WOULD GET A JUMP TO AN UNUSED MICROLOCATION IN MODEL.B
; 529 ; ONLY THIS WAS BECAUSE LOCATION 2002: IN MODEL.A SHOULD BE AT 3002:
; 530 ; IN MODEL.B 3002: AND 3003: PUT IN WHERE 2002: AND 2003: ARE UNDER
; 531 ; CONDITIONALS.
; 532 ;303 CHANGE THE NUMBER FIELD OF THE SR_BLT(XXX) MACROS TO GIVE THE
; 533 ; BIT 0 OFF ALL THE TIME. THIS GIVES BLT MORE THE FORM OF THE OTHER
; 534 ; EXTENDED ADDRESSING STUFF IN HOW IT REFERS TO THE SHADOW AC'S.
; 535 ; IT IS STILL BELIEVED TO BE BROKEN BUT IS BETTER THAN IT WAS.
; 536 ;302 ADD LONGER ADDRESS CONSTRAINTS FOR THE NEW MICROASSEMBLER. EVERY
; 537 ; LOCATION THAT THE DISPATCH RAM CAN JUMP TO IS EFFECTED. THE
; 538 ; CONSTRAINTS THATUSED TO LOOK LIKE =00**** MUST NOW LOOK LIKE
; 539 ; =0****00**** THIS IS BECAUSE THE MODEL B MACHINE CAN AND DID
; 540 ; REALLY SET THAT BIT. THE CHANGE MAKES THE MICROCODE INCOMPATIBLE
; 541 ; WITH THE OLD ASSEMBLER.
; 542 ;301 HALT IS CLEARING THE RUN FLOP WITH HARDWARE MUST CHECK FOR
; 543 ; KERNAL MODE BEFOR THE HALT MACRO SO USER IOT MODE WILL
; 544 ; NOT BE ABLE TO HALT. THIS TAKES ONE MICROWORD AT 1017:
; 545 ; THE SENSE OF THE SKIP IS REVERSED AGAIN SO 1016: IS BACK TO
; 546 ; BEING THE UUO AND CHALT: IS NOW A SEPERATE WORD AFTER 1017:.
; 547 ;300 REPLACE HALT CODE AGAIN BUT THIS TIME GET THE SENSE OF THE
; 548 ; SKIP RIGHT BY SWAPPING THE CONTENTS OF LOCATIONS 1016: AND 1017:
; 549 ; PUT THE 1: ADDRESS CONSTRAINT ON CONT:.
; 550 ;277 PUT HALT BACK THE WAY IT WAS SKP USER HAS THE INVERSE SKIP SENSE
; 551 ; AND HENCE DOES THE WRONG THING. HALT TO BE FIXED LATER.
; 552 ;276 YET ANOTHER TRY AT THE BLKO PROBLEM BLK1: SHOULD HAVE HAD A
; 553 ; J/BLK2.
; 554 ;275 THE LONG PC CHANGES HAD XSFM1: BEFOR THE ADDRESS CONSTRAINT THUS
; 555 ; GIVEING THE WRONG ADDRESS. THE =0 IS PUT BEFOR THE LABEL.
; 556 ;274 FIX THE DIAG.INST CONDITIONALS TO BEHAVE PROPERLY WITH THE
; 557 ; CONSTRAINTS OF DRAM LOCATIONS MAP DIED BECAUSE IT NEVER WAS
; 558 ; REACHED OUT OF A DISPATCH.
; 559 ;273 INSERT THE DIAG.INST FEATURE FOR THE DIAGNOSTICS PEOPLE.
; 560 ; CHANGES AT DCODE 104:, 106: AND AT XCT: SHOULD NOT EFFECT OTHER
; 561 ; ASSEMBLIES.
; 562 ;272 THE FIX TO THE GARBAGE IN THE LEFT HALF OF VMA IN 265 FORGOT TO
; 563 ; LOAD THE VMA IN BLK3:+1 PUT THAT IN. ALSO ON JUD'S RECOMENDATION
; 564 ; PUT A COPY OF THE NOP MICROINSTRUCTION AFTER CLRFPD: TO MAKE
; 565 ; ENOUGH TIME IN THE SKIP CASE. IT SEEMED TO WORK WITHOUT THIS
; 566 ; AND IF SPACE GETS TIGHT IT SOULD BE REMOVED.
; 567 ;271 FIX IN 267 PGF4:+4 DOES NOT WORK, CANNOT PUT VMA_# THERE. POSSIBLY BECAUSE
; 568 ; VMA_# CONFLICTS IN SOME ESOTERIC WAY WITH STORE? THAT CHANGE
; 569 ; IS TAKEN OUT AND AT PGF1 THE VMA IS GIVEN 500 OR 501. THIS IS SLIGHTLY
; 570 ; LESS DESIREABLE AND FURTHER EFFORT COULD BE SPENT IN THE UCODE TO
; 571 ; MAKE PAGE FAILS LESS UNWEILDY FOR THE SOFTWARE ROUTINE THAT CONVERTS
; 572 ; THEM TO MODEL B FORM.
; 573 ;270 CHANGE HALT TO CHECK FOR USER MODE INSTEAD OF IO LEGAL. A JOB
; 574 ; IN USER IOT SHOULD NOT BE ABLE TO HALT THE MACHINE.
; 575 ;267 ADD NEW CONDITIONAL SHIFT.MUUO TO PROVIDE THE SHIFTED DOWN MUUO
; 576 ; DATA BLOCKS MORE SIMILAR TO THE XADDR TYPES. CONDITIONAL IS USED
; 577 ; AT 1003: AND PGF4:+4 TO PROVIDE A DIFFERENT STARTING ADDRESS.
; 578 ;266 FIX PILD+3 TO LOAD THE VMA AT THE SAME TIME THUS ENABLING
; 579 ; THE MODEL HACK FIX TO LOAD THE LONG VMA.
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; EDHIS.MIC[10,5351] 19:59 24-Jul-85 REVISION HISTORY
; 580 ;265 HAIR UP THE ALREADY HAIRY BLKXX CODE TO CLOBBER THE LEFT HALF OF AR
; 581 ; BEFOR USING IT AS AN ADDRESS. CLOBBERED ARL AT BLK2 AND LOADED
; 582 ; VMA AT BLK3.
; 583 ;264 ADD J/CLRFPD AT BFIN TO MAKE IT THE SAME AS IT WAS. BFIN GOT
; 584 ; MOVED TO A DIFFERENT PLACE IN THE LAST EDIT AND THIS J FIELD
; 585 ; WAS NOT FIXED.
; 586 ;263 ADD THE MIT FIXES. IOTEND AND THE BLK1 TO BLK4 GROUP ARE CHANGED
; 587 ; EXTENSIVELY. CLRFPD IS PUT JUST BEFORE FINI CONSTRAINT ON IOFET
; 588 ; IS CHANGED.
; 589 ; ADD THE LONG PC FORMAT UNDER A NEW CONDITIONAL LONG.PC THE
; 590 ; CONDITIONAL IS TURNED ON BY XADDR. CONDITIONALS ARE ADDED TO THE
; 591 ; LONG PC CODE TO MAKE IT SMALLER WHEN ONLY SECTION 0 IS POSSIBLE.
; 592 ; ADD COMMENTS TO THE MICROCODE OPTIONS FIELD.
; 593 ; RESTORE SXCT CODE FROM VERSION 131. TO BE USED ONLY IN MODEL A
; 594 ; NON KLPAGING CODE.
; 595 ;262 PUT WORD AT INDR1+1 UNDER SXCT CONDITIONAL SO WHEN SXCT IS OFF WE
; 596 ; GET AN ADDITIONAL SAVINGS OF ONE WORD.
; 597 ;261 ADD PHYS REFS AT PGRF6+4 AND PIDISP+4 TO MAKE MODEL.A LOAD A LONG
; 598 ; VMA. PART OF THIS CODE IS NOT UNDER CONDITIONAL BECAUSE IT SHOULD NOT MATTER
; 599 ; TO A MODEL.B MACHINE. PIDISP+4 ALSO GETS THE LOAD OF THE SAME DATA
; 600 ; REPEATED SO THE PHYS REF HAS SOMETHING TO WORK ON.
; 601 ; FLUSH THE NOW USELESS CODE AT CHALT TO GENERATE THE LD AR.PHYS
; 602 ; CONSTANTS.
; 603 ; CURRENTLY THERE IS SORT OF A BUG IN THAT THE SBR AND THE CBR
; 604 ; CAN NOT BE ABOVE 256K IN A MODEL.A MACHINE. THIS DOES NOT BOTHER
; 605 ; THE CURRENT MONITORS AT ALL IN THAT THESE TABLES ARE IN VERY LOW CORE.
; 606 ; IF THAT CHANGES THE LOCATIONS SECIMM+3 SECIMM+7, LDIND, PGRF5, LDSHR
; 607 ; AND LDPT1+1 MUST ALL GET FIXED UP. THE GENERAL FIX IS TO GET A PHYS REF
; 608 ; IN THE MICROINSTRUCTION THAT LOADS THE VMA. THIS CAN BE DONE BY
; 609 ; POSTPONING THE LOAD OF THE VMA ONE MICROINSTRUCTION IN ALL OF THESE
; 610 ; PLACES, BUT, SINCE THAT CAUSES A PERFORMANCE DEGRADATION IT WAS NOT
; 611 ; DONE.
; 612 ;260 DIVERGANT CHANGES TO MAKE KLPAGING PHYS REFS THE OLD WAY
; 613 ; CAUSE ALL CASES OF VMA_XXX+LD AR.PHYS TO GO BACK TO THE
; 614 ; OLD PHYS REF WAY
; 615 ;257 IN MODEL B MACHINES AT LDPT+1 THE VMA IS GETTING GARBAGE IN THE
; 616 ; LEFT HALF BECAUSE IT ADDED IN JUNK THAT WAS IN AR LEFT. FIX IS TO
; 617 ; CLEAR ARL AFTER LDPT AND TO DO THE SHUFFLE PERFORMED THERE ONE
; 618 ; MICROINSTRUCTION LATER.
; 619 ;****** A HACK FIX IS USED HERE THAT TAKES TWO WORDS. THIS WAS DONE BECAUSE
; 620 ; OF EXTREEM TIME PRESSURE TO DEBUG >256K MODEL B. THERE OUGHT TO BE
; 621 ; A WAY TO REDUCE THIS FIX TO ONLY ONE WORD IN SPACE AND TIME, OR
; 622 ; EVEN LESS.
; 623 ;256 EDIT JUMPED TO RANDOMNESS WITH AN EXTRA RETURN. THIS HAPPENED
; 624 ; BECAUSE THERE WAS NO CALL AT EDSFLT IN THE MODEL B NON XADDR CODE
; 625 ; ADDED CALL TO EDSFLT.
; 626 ;255 SAVE EDIT FROM GETTING AN EXTRA STORE CYCLE AT EDSSIG BY SENDING
; 627 ; IT ALWAYS TO THE EDFLT1 LOCATION INSTEAD OF EDFLT THIS ONLY
; 628 ; CHANGES WHAT HAPPENS IN MODEL B NON XADDR BECAUSE IN MODEL A
; 629 ; EDFLT AND EDFLT1 ARE THE SAME LOCATION ANYWAY
; 630 ;254 CAUSE THE A INDRCT CHANGE IN 253 TO BE ONLY FOR NON EXTENDED
; 631 ; ADDRESSING MACHINES. THIS THROWS DOUBT ON THE WORD SAVINGS
; 632 ; THAT MIGHT HAVE BEEN POSSIBLE
; 633 ;253 CHANGE A INDRCT TO LOAD BOTH THE AR AND ARX, IN THE EXTENDED
; 634 ; INSTRUCTION SET THIS HAPPENED TO BE DEPENDED ON AT EXT2+2 AND
; 635 ; EXT2+3. THE DEFINITION OF A IND IN EA CALC/ WAS FIXED TO
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; EDHIS.MIC[10,5351] 19:59 24-Jul-85 REVISION HISTORY
; 636 ; LOAD THE AR AND THE ARX
; 637 ; I THINK THIS PERMITS THE SAVINGS OF AN EXTRA WORD AND SOME
; 638 ; TIME ON ALL INDIRECTS. CHECK OUT FLUSHING INDR1 AND MAKING INDRCT
; 639 ; DO THE DISPATCH AND GO TO COMPEA
; 640 ; FORCE ADB TO GENERATE AR*4 AS DEFAULT THIS DISABLES PARITY
; 641 ; CHECKING ON THE FM WHEN IT IS NOT BEING READ FIXED IN
; 642 ; DEFINITION OF ADB THIS WILL ALSO SPEED UP THE MACHINE BY SOME
; 643 ; BECAUSE THE ADB FIELD CAN NO LONGER FORCE 3 TICS WITHOUT REALLY
; 644 ; NEEDING THAT LONG
; 645 ;252 SAVE A WORD AT IOPGF+1 BY MAKING IT PILD+3 THIS ADDS THE SET
; 646 ; ACCOUNT ENABLE TO AN UNDEFINED CASE.
; 647 ;251 TURNING ON PAGING CAUSED A HANG THIS WAS BECAUSE OF A MISIMPLIMENTED
; 648 ; FIX IN 250. THE ATTEMPT TO PUT THAT FIX IN NO SPACE FAILED AND IT TOOK
; 649 ; ONE WORD. AT LDPT+1 ADD BR/AR AT GTCST1 RECOVER THE AR FROM THE BR
; 650 ; THIS SEEMS LIKE IT SHOULD BE ABLE TO BE BUMMED BUT I CANNOT
; 651 ; FIGURE OUT HOW
; 652 ; ALSO FIX A PLACE WHERE A PHYS REF WAS LEFT IN THE MODEL A CODE
; 653 ; AT PGRF6+4 MODEL B CONDITIONAL IS AS IT WAS MODEL A IS NEW TO USE
; 654 ; LD AR.PHYS MECHANISM
; 655 ;250 LOADING HIGH ORDER GARBAGE TO THE VMA WITH THE FIX FOR
; 656 ; >256K CAUSES FUNNY THINGS TO HAPPEN. BITS GET CLOBBERED
; 657 ; WITH AR0-8_SCAD 14 LINES AFTER SECIMM. ACTUALLY IS MORE
; 658 ; HAIR BECAUSE OF CONFLICTING FIELDS. CODE ABOVE AND BELOW
; 659 ; THAT GOT REARRANGED TO SIMPLER MODEL A AND MODEL B CONDITIONALS
; 660 ; SINCE NOW ALL LINES ARE DIFFERENT. SHUFFLING OF FE IS DONE
; 661 ; TO PROVIDE ROOM FOR A CONSTANT ON THE CORRECT SIDE OF THE SCAD
; 662 ; AT LDPT A SIMILAR
; 663 ; RECODING IS NEEDED. 4 LINES OF CODE ARE REDONE IN MODEL
; 664 ; A CONDITIONAL AND CONDITIONALS ARE RESHUFFLED TO HAVE
; 665 ; SIMPLER FORMAT
; 666 ; NEW MACROS ARE ADDED GEN AR0-8, GEN FE AND AR0-8
; 667 ; VMA_AR+LD AR.PHYS AND ITS FRIENDS ARE TAKEN OUT OF KLPAGING
; 668 ; CONDITIONAL THEY ARE USED TO DO EXAMINES AND DEPOSITS NOW
; 669 ;247 FIX ST AR.PHYS TO GIVE BIT 4 INSTEAD OF BIT 5 AT CHALT
; 670 ; AT PSTORE CHECK FOR AC REF AND IF SO WRITE FM MUST DO THIS
; 671 ; BECAUSE LOAD AD FUNC DOES NOT SET MCL STORE AR
; 672 ;246 FIX MUUO, IN EXTENDED ADDRESSING, TO GET NEW PC BEFORE CLOBBERING
; 673 ; THE USER AND PUBLIC FLAGS THAT TELL WHERE TO GET IT. FIX CONDITIONAL
; 674 ; ASSEMBLY AT INDRCT TO DO EA TYPE DISP IN MODEL A, NOT MODEL B.
; 675 ;245 ADDITIONAL FIXES FOR THE 256K PROBLEM, TO MAKE EXAMINE AND
; 676 ; DEPOSIT WORK. CHANGES AT CHALT TO CREATE CONSTANT "ST AR.PHYS",
; 677 ; AND EXTENSIVELY NEAR PICYC1, PIDATI, AND PIDATO. CHANGES ARE ALL
; 678 ; UNDER MODEL B CONDITIONAL, BECAUSE MODEL B HARDWARE WORKS OK, AND
; 679 ; THE FIX IS REGARDED AS CROCKISH.
; 680 ;244 WAIT FOR COMPLETION OF INDIRECT REFERENCE AT BYTEI+1 AND EXTI+1
; 681 ; EVEN THOUGH INTERRUPT REQUEST HAS BEEN SEEN, SO AS NOT TO CONFUSE MBOX.
; 682 ;243 VARIOUS FIXES TO MAKE THESE SOURCES WITH MODEL.B SWITCH OFF
; 683 ; EQUIVALENT TO MODEL A SOURCES, SO WE CAN DISCARD MODEL A SOURCES
; 684 ; THE FIXES ARE:
; 685 ; 1) SWITCH SNORM.OPT, TO SAVE SPACE IN SINGLE PRECISION
; 686 ; FLOATING NORMALIZATION.
; 687 ; 2) CREATION OF LD AR.PHYS MAGIC CONSTANT, TO SOLVE HARDWARE
; 688 ; PROBLEMS GENERATING ADDRESSES ABOVE 256K.
; 689 ;242 FIX AT SECPTR+1 TO PRESERVE AR LEFT UNTIL WE CAN CHECK
; 690 ; FOR BITS 12-17 NON ZERO CORRECT ADDRESS CONSTRAINTS AT
; 691 ; SECIMM+1 & +2 TO GET BRANCHING RIGHT FOR SHARED AND INDIRECT
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; EDHIS.MIC[10,5351] 19:59 24-Jul-85 REVISION HISTORY
; 692 ; SECTION POINTERS. FIX AT LDIMM+1 TO CLEAR LH OF AR BEFORE
; 693 ; LOADING VMA WITH SPT ADDRESS, TO PREVENT PAGE FAULT ON SPT
; 694 ; REFERENCE.
; 695 ;241 MORE FIXES AT START: AND NEWPC:, FOR SAME PROBLEM AS 240.
; 696 ; MUST LOAD FLAGS AND CLEAR VMAX, THEN LOAD VMA INTO PC TO CLEAR
; 697 ; PCX, THEN RELOAD VMA TO GET EFFECT OF NEW FLAGS AND CLEARED
; 698 ; PCX. (MODEL A ONLY).
; 699 ;240 FIXES AT START: AND NEWPC: TO LOAD 23-BIT ADDRESS RATHER
; 700 ; THAN 30-BIT, SINCE OTHER BITS ARE PC FLAGS. AT SAME TIME AND
; 701 ; PLACE, FIX MODEL A CODE TO CLEAR PC SECTION NUMBER.
; 702 ;237 CHANGE CONDITIONALS AROUND PUSH AND POP CODE FROM XADDR TO
; 703 ; MODEL.B. COULD SIMPLIFY IFNOT XADDR.
; 704 ;236 FIX ADDRESS CONSTRAINTS ON USES OF EA MOD DISP IN MODEL
; 705 ; B MACHINE WITH EXTENDED ADDRESSING OFF. PROBLEMS AT COMPEA,
; 706 ; BFETCH, AND EXT2.
; 707 ;235 SLIGHTLY CLEANER FIXES FOR PROBLEMS IN 234 TO AVOID WASTING TIME
; 708 ; AND SPACE. BYTE READ MACRO NEEDS TO SET VMA/LOAD, AND VMA_VMA
; 709 ; HELD MACRO DOESN'T USE MEM FIELD UNLESS MODEL B AND KL PAGING.
; 710 ; ALSO FIX CONDITIONAL ASSEMBLY STUFF TO AVOID SPURIOUS ERRORS.
; 711 ;234 INSTALL FIXES FOR SOME PLACES WHERE MODEL B CODE CAUSES CONFLICT
; 712 ; WITH THE OLD NON KLPAGING NON EXTENDED ADDRESSING CODE
; 713 ; THESE ARE AT BFETCH, PGF3-1, PGF6, EXT1+2
; 714 ;233 FIX THE FOLLOWING PROBLEMS:
; 715 ; KL PAGING SHOULD PRODUCE A PAGE FAILURE WHEN BITS
; 716 ; 12-17 OF A PRIVATE SECTION POINTER ARE NON 0
; 717 ; FIXED AT SECPTR ETC.
; 718 ; EDIT DOES NOT ALLOW INTERUPTS
; 719 ; FIXED AT EDNXT1 AND AFTER THAT
; 720 ; MAP SHOULD NOT BE LEGAL IN USER MODE
; 721 ; FIXED AT MAP2 AND CLEAN+15
; 722 ; MOVMI IS SHORTENED BY MAKING IT THE SAME AS MOVEI
; 723 ; AT DON LEWINES SUGGESTION THIS IS IN DCODE 215
; 724 ;232 MERGE THE SECOND ORDER STATISTICS GATHERING CODE WITH THIS
; 725 ; CODE INTENT IS TO KEEP IT HERE
; 726 ;231 CHANGE THE LOAD CCA DEFINITION TO REFLECT THE NEW HARDWARE
; 727 ; THIS IS ENABLED WHEN THE MODEL.B ASSEMBLY SWITCH IS ON
; 728 ;230 THIS IS THE POINT WHERE MICHAEL NEWMAN TAKES OVER THE MICROCODE
; 729 ; MAINTENCE SEVERAL BUG FIXES GET EDITED INTO 126 AT THIS POINT
; 730 ; TWO SETS OF PARALLEL CODE WILL BE MAINTAINED FOR A WHILE.
; 731 ; FIX THE CMPS PARODY ERROR PROBLEM WHEN ILLEGAL BITS ARE FOUND IN
; 732 ; THE LENGTHS.
; 733 ;227 FIX PIBYTE TO GET DTE# CORRECT ON TO-10 TRANSFERS. FIX MTRREQ
; 734 ; CYCLES TO WAIT FOR STORE TO FINISH BEFORE RE-ENABLING ACCOUNT.
; 735 ; FIX ADJSP OF LONG STACK POINTERS TO FETCH NEXT INSTR.
; 736 ;226 FIX EXMD TO LOAD AR, RATHER THAN ARX, WITH MARK POINTER, AS
; 737 ; EXPECTED BY THE HANDLER. FIX EDIT, SEVERAL PLACES, TO IGNORE
; 738 ; LEFT HALF OF MARK & PATTERN ADDRESSES WHEN PC SECTION IS ZERO.
; 739 ; FIX EDIT TO MAKE EXTENDED REFERENCE FOR PATTERN BYTES.
; 740 ; FIX ADJSP TO BE MEANINGFUL WITH LONG STACK POINTERS
; 741 ;225 FIX BYTEA NOT TO CLOBBER FE ON INDIRECTS, FIX EXMD TO BACK
; 742 ; UP VMA AFTER STORING DSTP2 AND BEFORE STORING DSTP. FIX EDIT TO
; 743 ; COUNT THE WHOLE PATTERN ADDRESS IF PC SECTION NOT ZERO.
; 744 ;224 FIX EXTEND ADDRESS CALCULATION TO RECOVER E0 FROM MQ, AND
; 745 ; FIX EXTEND OPCODE TEST TO DISALLOW OPS >20.
; 746 ; FIXES TO HANDLE NEW ENCODING OF AC-OP ON APR BOARD.
; 747 ;223 COMPLETE 222. P HAS TO GO TO SC AS WELL AS AR0-5. CREATE
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; EDHIS.MIC[10,5351] 19:59 24-Jul-85 REVISION HISTORY
; 748 ; SUBROUTINE RESETP TO DO IT. GET CODE IN SYNC WITH HARDWARE AND
; 749 ; MOST RECENT SPEC FOR MEANING OF PXCT AC BITS IN EXTEND. THUS
; 750 ; UNDO COMMENT IN 221: WE SHOULD LOOK AT PXCT B11. ALSO FIX
; 751 ; EXTEND TO USE CORRECT ENCODING OF BITS 9, 11, AND 12 FOR PXCT
; 752 ; OF STRING OPERATIONS. FIX DATAI PAG SO IT DOESN'T LOSE THE
; 753 ; PREVIOUS CONTEXT AC BLOCK WHEN LOADING PREVIOUS SECTION #.
; 754 ; INSERT CHANGE CLAIMED FOR EDIT 55, TO INHIBIT INTERRUPT DURING
; 755 ; PI CYCLES.
; 756 ;222 FIX BYTE POINTER UPDATE ROUTINES GSRC & IDST IN EIS CODE
; 757 ; TO UPDATE P WHEN INCREMENTING SECOND WORD. JUST FORGOT TO. TRY
; 758 ; AGAIN TO CONTROL EIS REFERENCES OFF E0, FOR EXTENDED OR NOT.
; 759 ;221 COMPLETE FIX OF 220, TO KEEP SR CORRECT THROUGH RELOAD OF IR
; 760 ; IN EXTEND DECODING, AND TO CONTROL SR CORRECTLY FOR XBLT DST
; 761 ; REFERENCES. (WE WERE LOOKING AT PXCT B11, SHOULD BE B12).
; 762 ;220 FIXES SEVERAL PLACES TO USE "EA" IN DRAM A FIELD INSTEAD OF "I",
; 763 ; NOTABLY BLT, WHICH WAS USING WRONG SECTION. FIX EXTEND TO
; 764 ; CONTROL VMA EXTENDED BEFORE FETCHING EXTEND-OP, SO AS NOT TO
; 765 ; LOOK "UNDER" THE AC'S. FIX XBLT FOREWARD TO STOP WHEN AC GOES
; 766 ; TO ZERO, NOT -1. ALSO CONTROL SR BEFORE INITIAL STORE TO GET
; 767 ; CORRECT CONTEXT.
; 768 ;217 CODE CHANGES TO MAKE SECOND WORD OF BYTE POINTER WORK RIGHT
; 769 ; WHETHER EFIW OR IFIW, BY CONTROLLING CRY18 OR CRY6.
; 770 ;216 RECODE EXTENDED INSTRUCTION SET DECODING & EFFECTIVE ADDRESS
; 771 ; CALCULATION. FIX UUO CODE TO INCREMENT VMA AFTER STORING PC.
; 772 ; FIX ADJBP TO GET 36 BIT ADDRESS ADJUSTMENT IF B12 SET.
; 773 ;215 REARRANGE CONDITIONAL ASSEMBLY DEFAULTS TO BE MORE LOGICAL
; 774 ; INSERT FORM FEEDS AND COMMENTS TO HELP BEAUTIFY THE LISTING.
; 775 ; REWORK THE NEW JRST'S, TO MAKE THEM SMALLER, FASTER, AND TEST
; 776 ; IO LEGAL BEFORE DISMISSING. PUT IN XBLT.
; 777 ;214 MODIFY ADJBP AND UUO'S FOR EXTENDED ADDRESSING. REWORK PARITY
; 778 ; ERROR HANDLING, IN A FRUITLESS ATTEMPT TO MAKE IT SMALLER,
; 779 ; BUT SUCCESSFULLY MAKING IT CLEARER. FIX ASSEMBLY ERRORS IN EIS
; 780 ; DUE TO AC4 CHANGES, AND ADD CODE TO HANDLE LONG BYTE POINTERS
; 781 ; IN AC'S. PUT IN CODE TO GIVE PAGE FAIL 24 ON ILLEGAL FORMAT
; 782 ; INDIRECT WORD.
; 783 ;213 FIX LDB & DPB TO TEST POINTER BIT 12 ON CALL TO BYTEA.
; 784 ;212 MODIFY JSP, JSR TO STORE FULL PC WITHOUT FLAGS IN NON-ZERO SEC
; 785 ; SEPARATE CONDITIONALS FOR "MODEL B" MACHINE FROM THOSE FOR
; 786 ; EXTENDED ADDRESSING MICROCODE.
; 787 ;211 REMOVE UNNECESSARY DIDDLING OF VMA USER BIT DURING PAGE REFILL,
; 788 ; AND ELIMINATE SPECIAL CASE FOR MAP INSTRUCTION, WHEN EXTENDED
; 789 ; ADDRESSING HARDWARE EXISTS TO SOLVE THESE PROBLEMS.
; 790 ; FIX SEVERAL CASES OF SIGNS DISP WITH INADEQUATE CONSTRAINT.
; 791 ;210 FIX DEFINITION OF "SKP LOCAL AC REF", WHICH CONFUSED "AC
; 792 ; REF" WITH "LOCAL AC REF".
; 793 ;207 FIX JRSTF (AND ITS DERIVATIVES) TO LOAD FLAGS INTO AR AFTER
; 794 ; DOING EA MOD DISP, WHICH WOULD OTHERWISE CLOBBER THEM. FIX
; 795 ; COMPEA CODE TO LET AREAD HARDWARE LOAD AR. OTHERWISE GET SEC #.
; 796 ;206 FIX PCTXT ROUTINE TO GET PREVIOUS CONTEXT SECTION.
; 797 ;205 FIX POPJ TO LOAD HALFWORD OR FULLWORD PC ACCORDING TO PC SECT
; 798 ;204 FIX CONDITIONALS AROUND LOC 47, WRONG IN 202. FIX DEFINITION
; 799 ; OF A INDRCT, DOESN'T NEED #07. FIX STACK INSTRUCTIONS FOR
; 800 ; EXTENDED ADDRESSING. MUST NOT LOAD VMA FROM FULL AD.
; 801 ;203 INCLUDE CODE AT NEXT+2 TO GENERATE ADDRESS MASK (LOW 23 BITS)
; 802 ; AT HALT TIME, AND CODE IN PICYCLE TO USE IT TO GET 23 BIT ADDR
; 803 ; OUT OF IOP FUNCTION WORD.
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; EDHIS.MIC[10,5351] 19:59 24-Jul-85 REVISION HISTORY
; 804 ;202 MOVE "40+A" LOCATIONS TO "A" UNDER EXTENDED ADDRESSING. CHANGE
; 805 ; ALL CALL MACROS TO GENERATE CALL BIT INSTEAD OF SPECIAL FUNC'S.
; 806 ;201 BEGIN EXTENDED ADDRESSING CHANGES IN EARNEST. INTEGRATE NEW
; 807 ; EFFECTIVE ADDRESS COMPUTATION CODE, AND REVISE INSTRUCTION
; 808 ; ROUTINES AS NECESSARY.
; 809 ;126 FIX STRAC3-2, WHERE COMMA GOT LEFT OFF WHEN IFETCH MOVED
; 810 ;125 REMOVE NXT INSTR FROM STAC1, STRAC3, & STAC4, MAKING THEM JUMP
; 811 ; TO FINI INSTEAD. PROBLEM INVOLVES A RACE IF PAGE FAIL OCCURS
; 812 ; WHILE WRITING FM. IF FM ADDRESS CHANGES BEFORE COND/FM WRITE
; 813 ; GOES FALSE, APR BOARD MAY GRONK PARITY BIT OF SOME FM LOC'N.
; 814 ; THIS RESULTS IN SOME SOME PATHS FROM FETCH TO NICOND BECOMING
; 815 ; LONGER THAN 6 TICKS, SO THE FETCHES GOT SHUFFLED IN SOME PLACES.
; 816 ; MICROCODE PATCH ELIMINATES MOST PROBABLE CAUSE, WHICH IS PAGE
; 817 ; FAIL AT NICOND TIME WHILE WRITING AC OTHER THAN 0. IT DOES NOT
; 818 ; TAKE CARE OF THE POSSIBILITY THAT COND/FM WRITE WILL GLITCH AT
; 819 ; INSTR 1777 TIME.
; 820 ;124 FIXES IN SEVERAL PLACES TO SET AND CLEAR ACCOUNT ENABLE SO AS
; 821 ; TO GET REPEATABLE ACCOUNTING MEASURES OF USEFUL WORK DONE. THE
; 822 ; ENABLE IS NOW CLEARED FOR METER UPDATE CYCLES AND KL PAGE REFILL
; 823 ; CYCLES. THE HARDWARE ALREADY TAKES CARE OF PI CYCLES.
; 824 ;123 CORRECT 122 TO CONSTRAIN LOC "UNHALT", AND TO LOAD ARX FROM AR,
; 825 ; SO AS TO LET "SKP AR EQ" WORK. PROBLEM AROSE BECAUSE MACRO ALSO
; 826 ; TESTS ARX00-01. FIX EDIT, WHEN STORING DEST POINTER ON SELECT
; 827 ; SIGNIFICANCE START, TO ELIMINATE AMBIGUITY IN DEST P FIELD.
; 828 ;122 SPEC CHANGE TO EXIT FROM HALT LOOP, SO THAT AR0-8=0 WITH AR9-35
; 829 ; NON-ZERO LOADS AR INTO PC TO START PROCESSOR. THIS IS DIFFERENT
; 830 ; FROM EXECUTING JRST BECAUSE PC FLAGS ARE CLEARED.
; 831 ;121 FIX TO 120 TO ALLOW A CYCLE BETWEEN FILLER FROM MEMORY AND
; 832 ; WRITING IT INTO FM (THUS PARITY CAN BE COMPUTED). ALSO CLEAR
; 833 ; STATE REGISTER IN EDIT BEFORE GETTING NEXT PATTERN BYTE.
; 834 ;120 FIX EIS TO TOLERATE PAGE FAIL ON READ OF FILL BYTE IN MOVSRJ
; 835 ; OR B2D CONVERSION. REQUIRES GETTING FILLER BEFORE STORING DLEN
; 836 ; ALSO INTEGRATE OPCODE COUNTING/TIMING CODE UNDER CONDITIONALS
; 837 ;117 FIX PARITY ERROR CODE TO WRITEBACK AR ON RPW ERROR.
; 838 ;116 REWRITE OF DDIV, SO THAT THE NO-DIVIDE TEST IS ON THE MOST
; 839 ; SIGNIFICANT HALF OF THE MAGNITUDE OF THE DIVIDEND, RATHER THAN
; 840 ; THE MAGNITUDE OF THE MOST SIGNIFICANT HALF. IN THE PROCESS,
; 841 ; SAVE TIME AND SPACE. ALSO PUT IN CONDITIONAL ASSEMBLY VARIABLE
; 842 ; "WRTST" TO INHIBIT WRITE TEST CYCLE FOR INSTRUCTIONS WHICH
; 843 ; APPEAR NOT TO NEED IT, AND THUS TO SPEED THEM UP.
; 844 ;115 FIX SBDIAG TO SET MCL REG FUNC TO INHIBIT EBOX MAY BE PAGED.
; 845 ;114 RECODE STRING COMPARE TO SAVE SPACE AND TIME. CHANGE DEFAULTS
; 846 ; FOR KLPAGING TO INCLUDE EIS, EXCLUDE TRACKS FEATURE. CHANGE
; 847 ; KLPAGING (NEW SPEC) TO KEEP "LOGICALLY WRITABLE" IN SOFTWARE BIT
; 848 ;113 RECODE KL PAGING TO ELIMINATE PROBLEM OF WRITING HARDWARE
; 849 ; PAGE TABLE BEFORE CHECKING FOR AGE TRAP, AND THEREFORE LEAVING
; 850 ; THE PAGE ACCESSIBLE AFTER THE TRAP. THE RECODING ALSO IMPROVES
; 851 ; THE ALGORITHM IN THAT THE HARDWARE ENTRY INCLUDES THE W BIT SET
; 852 ; IF THE CORE TABLES ALLOWED WRITE AND THE CST INDICATES WRITTEN,
; 853 ; EVEN IF THE CURRENT REFERENCE WAS NOT A WRITE.
; 854 ; ALSO FIX CODE WHICH WRITES PT DIR, TO GET WRITE REF BIT FROM
; 855 ; VMA HELD INTO BIT 5 OF SAVED PAGE FAIL WORD.
; 856 ;112 FIX PAGE FAIL CODE FOR USE WITH PROB SHEET 1396, WHICH LOADS
; 857 ; PC IF PAGE FAIL OCCURS ON NICOND. THUS CODE NEEDN'T CHECK FOR
; 858 ; FETCH AT CLEAN, WHICH CAUSED OTHER PROBLEMS ON PARITY ERRORS.
; 859 ; CLEAR FE AND SC IN NXT INSTR MACRO (JUST CLEANLINESS).
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; EDHIS.MIC[10,5351] 19:59 24-Jul-85 REVISION HISTORY
; 860 ;111 PATCH SEVERAL ROUTINES WITH THE FOLLOWING MACRO --
; 861 ; FETCH WAIT "MEM/MB WAIT"
; 862 ; TO PREVENT SEQUENCES IN WHICH PAGE FAIL INFO CAN GET LOST
; 863 ; BECAUSE OF LONG TIME FROM REQUEST TO MB WAIT. THESE PATCHES
; 864 ; SHOULD BE REMOVED AFTER AN ECO HAS BEEN INSTALLED TO FIX.
; 865 ; IN ADDITION, EBUSX SUBROUTINE HAS BEEN MODIFIED TO PREVENT RACE
; 866 ; CONDITION WHEN SETTING UP IO FUNCTION WITH COND/EBUS CTL AND
; 867 ; MAGIC # BIT 4. MUST NOT CHANGE #5 THROUGH #8 ON NEXT CYCLE.
; 868 ; FIX KLPAGING CODE TO GO BACK TO AREAD ON MAP REF, BECAUSE
; 869 ; MEM/AD FUNC DOESN'T CORRECTLY RESTORE APR REG FUNC. ALSO MAKE
; 870 ; THE CODE SMARTER ON NO MATCH CONDITION, SO REQUEST DOESN'T HAVE
; 871 ; TO BE RESTARTED AND IMMEDIATELY FAIL AGAIN.
; 872 ;110 GIVE UP ON THE OLD STRING COMPARE CODE, INSTALLING MIKE NEWMAN'S
; 873 ; VERSION. SOMEWHAT SLOWER, BUT GIVES THE RIGHT ANSWERS.
; 874 ; FIX LDB CODE TO WAIT FOR MEM WORD EVEN IF INTERRUPT REQUEST
; 875 ; SEEN, SO AS NOT TO GET CONFUSED WHEN IT ARRIVES OR PAGE FAILS.
; 876 ; ALSO IMPROVE CLRPT ROUTINE USED BY CONO AND DATAO PAG TO START
; 877 ; LOOP WITH VMA CLEARED AND PT WR SELECTION SETUP CORRECTLY.
; 878 ;107 FIX STRING COMPARES TO CHECK FOR INTERRUPT. THIS INVOLVED
; 879 ; CHECKING DURING GSRC ROUTINE, WHICH ELIMINATES NEED FOR CHECK
; 880 ; IN SRCMOD (WHICH CALLS GSRC). IT ALSO REQUIRED CLEARING SFLGS
; 881 ; AT STARTUP, AND ADJUSTING DLEN UPDATE CODE IN DEST FILL TO GET
; 882 ; VALID LENGTH STORED ON INTERRUPT.
; 883 ;106 ELIMINATE RACE IN DECODING OF # FIELD ON MTR BOARD BY HOLDING
; 884 ; LOW 3 BITS THROUGH NEXT MICROINSTRUCTION.
; 885 ; FIX LUUO AND MUUO TO ALLOW INTERRUPTS.
; 886 ; FIX B2D OFFSET TO SIGN-EXTEND E1 AFTER INTERRUPT. FINISH 105,
; 887 ; TO GET ENTIRE AR LOADED WHILE CLEARING MQ (ARL WAS HOLDING).
; 888 ; FIX KL PAGING TO USE VMA/1 INSTEAD OF VMA/AD WHEN RESTORING VMA
; 889 ; FROM VMA HELD OR COPIES THEREOF.
; 890 ; FIX UFA NOT TO ALWAYS GET UNDERFLOW ON NEGATIVE RESULTS.
; 891 ; SAME FIX AS EDIT 103 OF BREADBOARD. WHERE DID IT GET LOST?
; 892 ;105 FIX KL PAGING AS REVISED BY EDIT 103 TO CORRECTLY RESTORE
; 893 ; BR ON NO-MATCH CONDITION
; 894 ; ANOTHER FIX TO B2D, TO CLEAR MQ ON ENTRY. BUG INVOLVED GARBAGE
; 895 ; FROM MQ SHIFTING INTO ARX DURING DEVELOPMENT OF POWER OF TEN.
; 896 ;104 FIX BINARY TO DECIMAL CONVERSION, WHICH WAS NOT GOING TO CLEAN
; 897 ; ON FINDING AN INTERRUPT, AND ON RESTART WITH FPD SET, WAS NOT
; 898 ; SETTING UP SLEN. TSK, TSK. CORRECT CLEANUP FOR DEST FILL IN
; 899 ; MOVSRJ, WHICH WAS INCREMENTING BOTH SLEN AND DLEN, SHOULD
; 900 ; HAVE BEEN NEITHER. FIX JSR, BROKEN BY EDIT 103. JUMP MUST BE
; 901 ; TO E+1, NOT E.
; 902 ;103 CREATE CONDITIONAL ASSEMBLY FOR EXTENDED ADDRESSING. UNDER IT,
; 903 ; CREATE MEM FIELD DEFINITIONS, SUPPRESS SXCT.
; 904 ; SAVE A WORD IN JSR BY USING JSTAC IN COMMON WITH PUSHJ.
; 905 ; FORCE TIME FIELD IN CASES WHERE ASSEMBLER DEFAULT SCREWS UP.
; 906 ; ADD INTERRUPT TESTS IN KL PAGING CODE TO PREVENT HANGS, AND
; 907 ; REVISE PAGE FAIL WORD TO ELIMINATE THE NEW FAIL CODES.
; 908 ;102 ATTEMPT ANOTHER FIX OF MOVSRJ, CVTBDX FILL. EDIT 71 LOSES
; 909 ; DUE TO INCONSISTENCY -- DLEN UPDATE MUST NOT PRECEED CLEANUP.
; 910 ; CREATE CONDITIONAL ASSEMBLY SWITCHES TO CONTROL EXTENDED
; 911 ; INSTRUCTION SET, DOUBLE INTEGER ARITHMETIC, AND ADJBP. CHANGE
; 912 ; DEFAULT OF IMULI.OPT, WHICH CAN GET SIGN WRONG ON OVERFLOW.
; 913 ;101 FIX METER REQUEST CODE TO "ABORT INSTR" EVEN IF NOT SETTING
; 914 ; PI CYCLE. THIS SHOULD FIX OCCASIONAL LOSS OF TRAPS PROBLEM.
; 915 ;100 FIXES TO KL PAGING CODE TO PREVENT LOADING VMA FROM AD WHILE
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; EDHIS.MIC[10,5351] 19:59 24-Jul-85 REVISION HISTORY
; 916 ; REQUESTING PHYSICAL REF. FIX JSR TO PREVENT FM PARITY STOP
; 917 ; ON STORE TO AC. FIX 1777 TO FORCE RECIRCULATION OF AR/ARX,
; 918 ; EVEN IF MBOX RESP STILL TRUE.
; 919 ;77 FIX DDIV TO GET MQ SHIFTED LEFT ONE PLACE, WITHOUT INTRODUCING
; 920 ; AN EXTRA BIT, AT DDVX1. THIS INVOLVES INHIBITING ADA TO PREVENT
; 921 ; AD CRY0 FROM COMMING INTO MQ35.
; 922 ;76 FIX UFA TO ALLOW AN EBOX CYCLE BETWEEN FETCH AND NICOND WHEN
; 923 ; FRACTION SUM IS ZERO, AT UFA3.
; 924 ;75 PUT BACK INSTRUCTION "MBREL" REMOVED BY EDIT 64. NECESSARY TO
; 925 ; ENSURE THAT EBOX REQUEST FOR FETCH DOESN'T COME UP WHILE
; 926 ; REGISTER FUNCTION IS IN PROGRESS, WHICH WOULD CONFUSE MBOX ON
; 927 ; STARTING THE FETCH.
; 928 ;74 CHANGES TO EIS FOR NEW-SPEC AC USAGE. CHANGES TO KL PAGING FOR
; 929 ; INDIRECT, IMMEDIATE SECTION POINTERS
; 930 ;73 FIX JRA TO PREVENT WRITING AC WITH DATA FRESH FROM MEMORY (ALLOW
; 931 ; A CYCLE FOR PARITY CHECK). FIX DPB CODE TAKE ONLY 3 TICKS ON
; 932 ; RETURN FROM BYTEA, SO THAT CACHE DATA DOESN'T ARRIVE INTO AR
; 933 ; AND ARX UNTIL DPB1, WHEN THE BYTE HAS GOTTEN OUT TO MQ.
; 934 ;72 FIX DEFINITION OF SP MEM/UNPAGED TO INHIBIT VMA USER. FIX
; 935 ; PAGE FAIL CODE TO CHECK FOR VMA FETCH BEFORE LOOKING AT
; 936 ; INTERRUPT REQUEST. PROBLEM WAS INTERRUPT CONCURRENT WITH
; 937 ; PAGE FAIL ON JRSTF TO USER. PC FLAGS GOT RESTORED, BUT VMA
; 938 ; NEVER COPIED TO PC BECAUSE PAGE FAIL INHIBITED NICOND, AND
; 939 ; INTERRUPT ABORTED PAGE FAIL HANDLING TO LOAD PC.
; 940 ;71 DEFINE FMADR/AC4=6. FIX MOVFIL ROUTINE TO PUT AWAY UPDATED
; 941 ; LENGTH DIFFERENCE WHEN INTERRUPTED, THUS AVOIDING RANDOMNESS
; 942 ; IN MOVSRJ, CVTBDX. FIX CVTBD CALL TO MOVFIL TO PRESERVE SR.
; 943 ; CHANGE STMAC AND PIDONE FROM "FIN XFER" TO "FIN STORE", BECAUSE
; 944 ; STORE WAS IN PROGRESS, WHICH CAUSED FM WRITE IF AC REF, AND
; 945 ; GOT A PARITY ERROR DUE TO ADB/FM.
; 946 ;70 FIX PXCT 4,[POP ...], WHICH DIDN'T GET DEST CONTEXT SET FOR
; 947 ; STORE. MUST USE SR_100 TO SET IT.
; 948 ;67 FIX PROBLEM IN ADJBP BY WHICH BYTES/WORD WAS GETTING LOST
; 949 ; WHEN DIVIDE ROUTINE LOADED REMAINDER INTO BR. SOLVED BY
; 950 ; SAVING BYTES/WORD IN T1.
; 951 ;66 FIX KL PAGING TO RESTORE VMA ON TRAP, SAVE ADDRESS OF POINTER
; 952 ; CAUSING TRAP, AND NOT RESTORE ARX EXCEPT FOR BLT PAGE FAIL.
; 953 ; ALSO SET TIME PARAMETER ON ADB/FM TO ALLOW TIME FOR PARITY
; 954 ; CHECKING OF FM.
; 955 ;65 FIX KL PAGING CODE TO DO MBWAIT AFTER DETERMINING THAT PARITY
; 956 ; ERROR HAS NOT OCCURRED, SO AS TO GET CORRECT VMA TO SAVE.
; 957 ; CREATE SYMBOLS FOR KL PAGE FAIL CODES. PUT CONDITIONAL
; 958 ; ASSEMBLY AROUND IMULI OPTIMIZATION CODE, AND SXCT. CREATE
; 959 ; SYMBOL "OPTIONS" IN # FIELD FOR MICROCODE OPTIONS.
; 960 ;64 MICROCODE FOR KL10 PAGING (PAGE REFILL, MAP INSTR)...
; 961 ; REMOVE UNNECESSARY INSTRUCTION MBREL: FROM SWEEP AND APRBO
; 962 ; COSMETIC CHANGES TO KEEP COMMENTS & MACRO DEFINITIONS FROM
; 963 ; OVERFLOWING LINE OF LISTING, AND INSERTION OF CONDITIONAL
; 964 ; ASSEMBLY CONTROL OF LONG FLOATING POINT INSTRUCTIONS.
; 965 ;63 IN MTR REQUEST ROUTINE, DON'T DISMISS WHEN PI CYCLE HASN'T
; 966 ; BEEN SET.
; 967 ;62 FIX RDMTR CODE TO PUT 35 IN SC BEFORE GOING TO DMOVEM CODE.
; 968 ;61 FIX PIIBP ROUTINE TO USE CALL.M INSTEAD OF SPEC/CALL,
; 969 ; WHICH GETS OVERRIDDEN BY P_P-S... IN MTR REQUEST SERVICE
; 970 ; ROUTINE, DON'T SET PI CYCLE UNLESS REQUEST IS FOR VECTOR.
; 971 ;60 FIX DATAO PAG TO DO MB WAIT AFTER STORING EBOX ACCT AND
; KL10 Microcode for TOPS-10 and TOPS-20 24 July 1985 V2(411) MICRO %34(270) Page 1-17
; EDHIS.MIC[10,5351] 19:59 24-Jul-85 REVISION HISTORY
; 972 ; BEFORE CHANGING VMA.
; 973 ;57 RE-CODE USES OF A@, B@ TO USE VMA/1, RATHER THAN VMA/AD,
; 974 ; IN ORDER TO GET CORRECT CONTEXT ON INDIRECT WORD. SEE MCL4
; 975 ;56 FIX SECOND PART OF PICYCLE (TAG NEXT:) TO ENSURE THAT
; 976 ; PC+1 INH, KERNEL CYCLE, ETC REMAIN UP DURING 2ND PART.
; 977 ; ALSO CHANGE SPEC/FLAG CTL FOR ECO 1261, WHICH REQUIRES
; 978 ; #07 TO BE OPPOSITE OF #04 TO GENERATE SCD LEAVE USER.
; 979 ;55 FIX SPEC INSTR/SET PI CYCLE TO INHIBIT INTERRUPTS
; 980 ; (IN PARTICULAR, METER UPDATE REQUESTS). MAKE SURE VALID
; 981 ; DATA SAVED ON IO PAGE FAIL AND PARITY ERRORS. REMOVE
; 982 ; BACKWARDS BLT... IT BROKE TOO MANY PROGRAMS.
; 983 ;54 FIX OVERFLOW CHECK IN IMULI OPTIMIZATION TO INH CRY 18
; 984 ; UPDATE TO USE CONDITIONAL ASSEMBLY IN MICRO VERS 20.
; 985 ;53 FIX T1,T2 PARAMETERS ON BYTE DISP, SIGNS DISP
; 986 ;52 CORRECT SHIFT AMOUNT FOR IMULI OPTIMIZATION, AND FIX MACRO
; 987 ; DEFINITIONS FOR SET SR?, WHICH WERE ALWAYS SETTING SR0.
; 988 ;51 OPTIMIZE IMULI OF TWO POSITIVE OPERANDS (TO SPEED UP SUBSCRIPT
; 989 ; CALCULATIONS) BY TAKING ONLY 9 MULTIPLY STEPS AND STARTING
; 990 ; NEXT INSTRUCTION FETCH EARLIER. OPTIMIZATION CAN BE REMOVED
; 991 ; BY COMMENTING OUT TWO INSTRUCTIONS AT IMULI, AND ONE FOLLOWING
; 992 ; IMUL. ALSO FIX APRBI/UVERS TO KEEP SERIAL # OUT OF LH.
; 993 ;50 INTRODUCE SKIP/FETCH AND CODE IN PAGE FAIL RECOVERY TO LOAD
; 994 ; PC FROM VMA IF PAGE FAIL OCCURED ON FETCH, BECAUSE NICOND
; 995 ; CYCLE, WHICH SHOULD HAVE LOADED PC, GETS INHIBITED BY INSTR 1777
; 996 ; ALSO INCLUDE EXTENDED INSTRUCTION SET.
; 997 ;47 UNDO XCT CHANGES OF EDIT 46, WHICH BROKE XCT DUE TO INSUFFICIENT
; 998 ; TIME FOR DRAM HOLD BEFORE USING "A READ". ALSO FIX VECTOR
; 999 ; INTERRUPT CODE TO LOOK AT CORRECT BITS FOR CONTROLLER NUMBER.
; 1000 ;46 FOLLOW-ON TO EDIT 45, SAVING 2 WORDS AND A CYCLE
; 1001 ; ALSO MOVE JRST TO 600, JFCL TO 700, UUO'S TO 100X AS PREPARATION
; 1002 ; FOR EXTENDED INSTRUCTION SET
; 1003 ;45 FIX SXCT TO LOOK AT AC FIELD OF SXCT, NOT SUBJECT INSTRUCTION,
; 1004 ; WHEN DECIDING WHETHER TO USE BASE-TYPE ADDRESS CALCULATION.
; 1005 ;44 FIX PAGE FAIL LOGIC TO WORK FOR EITHER PAGE FAIL OR PARITY
; 1006 ; ERROR. EDITS 42 AND 43 BOTH WRONG. ALSO CORRECT RACE IN
; 1007 ; WRITING PERFORMANCE ANALYSIS ENABLES TO PREVENT SPURIOUS COUNTS.
; 1008 ;43 CORRECT USE OF PF DISP BY EDIT 42. LOW BITS ARE INVERTED
; 1009 ;42 FIX BUGS INTRODUCED BY EDIT 40, WHICH MADE FLTR OF 1B0 HANG
; 1010 ; TRYING TO NEGATE IT, AND FIX UP EXPONENT CORRECTION ON LONG
; 1011 ; SHIFT LEFT. ALSO PUT IN CODE TO HANDLE PARITY ERROR PAGE
; 1012 ; FAILURES, AND SET TIME CONTROLS ON 43-47.
; 1013 ;41 REWRITE OF VECTOR INTERRUPT PROCESSING TO MAKE DTE VECTORS
; 1014 ; GO TO 142+8N, WHERE N IS DTE#. RH20 GO TO PROGRAMMED ADDRESS
; 1015 ; IN EPT, EXTERNAL DEVICES USE EXEC VIRTUAL ADDRESSES.
; 1016 ;40 IMPROVEMENTS TO FLOATING NORMALIZATION TO MAKE LONG SHIFTS
; 1017 ; FASTER, PRIMARILY TO HELP FLTR
; 1018 ;37 FIX FLOATING DIVIDE SO THAT THE TRUNCATED FORM OF A NEGATIVE
; 1019 ; QUOTIENT IS EQUAL TO THE HIGH-ORDER PART OF THE INFINITE-
; 1020 ; PRECISION QUOTIENT. SEE COMMENTS IN THE CODE. ALSO BUM
; 1021 ; A CYCLE OUT OF FLOATING DIVIDE BY STARTING THE NORMALIZE
; 1022 ; WHILE MOVING THE QUOTIENT INTO AR.
; 1023 ; SEVERAL CHANGES TO MAKE TRACKS FEATURE WORK
; 1024 ;36 FIX CONO MTR TO PUT DATA ON BOTH HALVES, SO PI CAN SEE PIA
; 1025 ;35 FIX CONI PI TO READ BACK WRITE EVEN PARITY ENABLES
; 1026 ;34 FIX BLT USE OF SR, SO NO CORRECTION OF ARX NECESSARY
; 1027 ;33 FIX PAGE TABLE REFERENCES TO FORCE UNPAGED REF. FIX TRAP
; KL10 Microcode for TOPS-10 and TOPS-20 24 July 1985 V2(411) MICRO %34(270) Page 1-18
; EDHIS.MIC[10,5351] 19:59 24-Jul-85 REVISION HISTORY
; 1028 ; TO SET PC+1 INHIBIT.
; 1029 ;32 CORRECT SETTING OF SC FOR SHIFTING METER COUNTERS, TO GET
; 1030 ; 12 BITS UNUSED AT RIGHT WHEN IT GETS TO CORE.
; 1031 ;31 RECODE ASH AND ASHC TO SAVE SPACE
; 1032 ;30 FIX JFFO TO SHIFT AR CORRECTLY AT JFFO2. BUM ADJSP TO USE
; 1033 ; STMAC FOR UPDATING PDL POINTER.
; 1034 ;27 FIX CONI PAG TO READ EBUS. CORRECT DEFINITIONS OF MBOX
; 1035 ; REGISTER FUNCTIONS, WHICH HAD BITS 0 AND 3 INVERTED.
; 1036 ;26 FIX DEFINITIONS OF DIAG FUNC CONO MTR AND CONO TIM, WHICH
; 1037 ; WERE REVERSED
; 1038 ;25 FIX DECODING OF PHYSICAL DEVICE NUMBER IN PI FUNCTION CODE
; 1039 ; AND RE-CODE JFCL FOR FEWER MICROWORDS
; 1040 ;24 FIX JFFO TO SHIFT ON FIRST 6-BIT TEST STEP, AND JRSTF TO
; 1041 ; KEEP E AND XR DISTINCT. ALSO SET LOAD-ENABLE BITS IN
; 1042 ; DATAI PAG, WORD.
; 1043 ;23 FIX CONO PI, TO HOLD AR ONTO EBUS THRU REL EBUS, BECAUSE
; 1044 ; PI BOARD DELAYS CONO PI TO GET CONO SET EQUIVALENT.
; 1045 ;22 MORE JFCL FIXES. MUST USE FLAG CTL/JFCL WHILE CLEARING BITS,
; 1046 ; AS WELL AS WHILE TESTING THEM. BUM A WORD OUT OF JFFO BY
; 1047 ; MAKING THE SIXBIT COUNT NEGATIVE. CHANGES SO SHIFT SUBR
; 1048 ; RETURNS 2, BYTEA 1. FIX SETMB TO STORE BACK AND FETCH.
; 1049 ;21 RE-WRITE JFCL TO KEEP LOW OPCODE BITS OUT OF AR0-1, BECAUSE
; 1050 ; PC00 GETS PROPAGATED LEFT TO ADA -1 AND -2.
; 1051 ;20 FIX BLT TO LOAD BR WITH SRC-DST ADDR
; 1052 ; ALSO SET TIME PARAMETERS ON CONDITIONAL FETCH FUNCTIONS
; 1053 ;17 CHANGE SWEEP ONE PAGE TO PUT PAGE # IN E, RATHER THAN ADDR.
; 1054 ; ALSO CHANGE COND/FM WRITE TO MATCH ECO #1068.
; 1055 ;16 FIX JUMP FETCH MACRO TO LOAD VMA FROM PC+1 (TEST SATISFIED
; 1056 ; OVERRIDES THIS TO HOLD VMA). ALSO BUM ONE MICROWORD FROM MUUO.
; 1057 ;15 INCLUDE PAGE FAIL DISP IN DISP/ FIELD
; 1058 ; ALSO MAKE MUUO STORE PROCESS CONTEXT WORD AT 426, AND SETUP
; 1059 ; PCS FROM PC EXTENSION, CWSX FROM SXCT
; 1060 ;14 FIX DEFINITIONS OF SKIP/IO LEGAL, AC#0, SC0, EVEN PAR
; 1061 ; ALSO FIX DATAO PAG, TO SEND LH DATA ON BOTH HALVES OF EBUS
; 1062 ;13 ALIGN SETEBR SO CALL TO SHIFT RETURNS CORRECTLY
; 1063 ;12 MAKE SURE AD COPIES AR DURING DATAO, CONO, AND CLEAR AR AT
; 1064 ; SET DATAI TIME.
; 1065 ;11 FIXES TO CONTINUE CODE SO CONSOLE WORKS, AND CORRECTIONS TO
; 1066 ; PROTECTED DEP/EXAM SO PROTECTION PROTECTS.
; 1067 ;10 FIX A READ MACRO TO VMA/PC+1. AD OVERRIDES UNLESS DRAM A=1
; 1068 ;07 RE-WRITE OF PI CYCLE CODE TO RECOGNIZE NEW EBUS SPEC.
; 1069 ;06 FIX DEFINITIONS OF SKIPS 40-57 BY COMPLEMENTING 3 LOW ORDER BITS
; 1070 ; FIX MULSUB TO CORRESPOND TO NEW CRA LOGIC
; 1071 ;05 FIX EBUS CTL DEFINITIONS TO GET F01 CORRECT. CORRECT FLAG CTL
; 1072 ; DEFINITIONS TO PREVENT LEAVE USER WHEN NOT WANTED, AND FIX
; 1073 ; JRST/JFCL TO HAVE FLAGS IN AR WHEN NEEDED.
; 1074 ;04 FIX RETURNS FROM MULSUB, PUT BETTER COMMENTS ON SNORM CODE,
; 1075 ; IMPROVE SNORM ALGORITHM TO MINIMIZE WORST-CASE TIME.
; 1076 ;03 FIX DISPATCH ADDRESS PROBLEMS, MOSTLY JRST/JFCL AND UUO'S.
; 1077 ;02 CHANGES PER INSTRUCTION SET REVIEW -- DELETE USE OF BIT12 OF
; 1078 ; BYTE POINTERS, CHANGE BLT TO PUT FINAL SRC,DST ADDRESSES IN AC,
; 1079 ; MAKE TRUNCATE FORM FLOATING POINT REALLY TRUNCATE, ELIMINATE
; 1080 ; LOCAL JSYS SUPPORT, DELETE PXCT OPCODE (XCT W/ NON-ZERO AC IN
; 1081 ; EXEC MODE), LUUO'S GO TO 40/41 OF CURRENT SPACE.
; 1082 ;01 UPDATES FOR .TITLE AND .TOC PSEUDO OPS,
; 1083 ; AND VARIOUS CHANGES FOR PROTO HARDWARE
; KL10 Microcode for TOPS-10 and TOPS-20 24 July 1985 V2(411) MICRO %34(270) Page 1-19
; EDHIS.MIC[10,5351] 19:59 24-Jul-85 REVISION HISTORY
; 1084 ;00 CREATION, BASED ON BREADBOARD AS OF EDIT 66
; 1085 .BIN
; 1086
; KL10 Microcode for TOPS-10 and TOPS-20 24 July 1985 V2(411) MICRO %34(270) Page 1
; DEFINE.MIC[10,5351] 19:52 24-Jul-85 CONDITIONAL ASSEMBLY VARIABLE DEFINITIONS
; 1087 .TOC "CONDITIONAL ASSEMBLY VARIABLE DEFINITIONS"
; 1088 .NOBIN
; 1089
; 1090 ; [COST ESTIMATES IN BRACKETS INDICATE NUMBER OF ADDITIONAL
; 1091 ; MICROINSTRUCTIONS REQUIRED BY TURNING ON THE FEATURE SWITCH]
; 1092
; 1093 .DEFAULT/TRACKS=0 ;1 ENABLES STORING PC AFTER EVERY INSTRUCTION,
; 1094 ; & CREATES DATAI/O PI TO READ/SETUP PC BUFFER
; 1095 ;ADDRESS. [COST = 21 WDS]
; 1096
; 1097 .DEFAULT/OP.CNT=0 ;1 ENABLES CODE TO BUILD A HISTOGRAM IN CORE
; 1098 ; COUNTING USES OF EACH OPCODE IN USER & EXEC
; 1099
; 1100 .DEFAULT/OP.TIME=0 ;1 ENABLES CODE TO ACCUMULATE TIME SPENT BY
; 1101 ; EACH OPCODE
; 1102
; 1103 .DEFAULT/SO.CNT=0 ;SECOND ORDER COUNTING IN 128K STARTING AT LOC
; 1104 ; 400000 NOT DEBUGED [COST = 28 WDS]
; 1105
; 1106 .DEFAULT/SO2.CNT=0 ;SECOND ORDER COUNTING IN 128K STARTING AT LOC
; 1107 ; PRESENTED AT START DOES ONE MORE ADD THAN
; 1108 ; SO.CNT AND HENCE AN INSTRUCTION TAKES
; 1109 ; 120 NS LONGER THAN SO.CNT [COST = 28 WDS]
; 1110
; 1111 .DEFAULT/PAGCNT=0 ;Enable code to count entries into the PFH and
; 1112 ; number of DATAO PAGs with bit 2 set. [Cost =
; 1113 ; 6 words] [327]
; 1114
; 1115 .DEFAULT/FPLONG=1 ;1 ENABLES KA-STYLE DOUBLE PRECISION FLOATING
; 1116 ;POINT INSTRUCTIONS: FADL, FSBL, FMPL, FDVL,
; 1117 ; UFA, DFN. [COST = 49 WDS]
; 1118
; 1119 .DEFAULT/MULTI=0 ;1 IF MULTIPROCESSOR SYSTEM, TO SUPPRESS CACHE
; 1120 ;ON UNPAGED REF'S. PAGED REF'S ARE UP TO EXEC.
; 1121
; 1122 .DEFAULT/KLPAGE=0 ;1 ENABLES KL-MODE PAGING. [COST = 85 WDS]
; 1123
; 1124 .DEFAULT/SHIFT.MUUO=0 ;ENABLES A DIFFERENT MUUO FORMAT FOR MODEL A
; 1125 ;THAT IS SLIGHTLY CLOSER TO THE XADDR FORMAT
; 1126 ;EXPECTED TO BE USED IN CONJUNCTION WITH LONG.PC
; 1127 ;BUT THEY DO NOT DEPEND ON EACH OTHER
; 1128
; 1129 .DEFAULT/MODEL.B=0 ;1 INDICATES EXTENDED ADDRESSING HARDWARE,
; 1130 ;PRIMARILY 2K (RATHER THAN 1280) CONTROL RAM,
; 1131 ;NEW MCL, CTL, AND APR BOARDS.
; 1132
; 1133 .DEFAULT/BLT.PXCT=0 ;1ENABLES SPECIAL BLT CODE FOR EXTENDED ADDRESSING
; 1134 ;THIS IS SUPPOSED TO GO AWAY IN THE FUTURE
; 1135 ;WHEN PXCT OF BLT IS NO LONGER USED BY TOPS-20
; 1136 ;THIS SHOULD ONLY BE USED BY KLX XADDR MICROCODE
; 1137 ;[COST 12 WORDS]
; 1138
; 1139 .IF/KLPAGE
;;1140 .IFNOT/MODEL.B
;;1141 .SET/XADDR=0 ;CAN'T DO EXTENDED ADDRESSING WITHOUT MODEL B
;;1142 .set/extexp=0 ;No room in TOPS20 Model A machine for extended exp.
; KL10 Microcode for TOPS-10 and TOPS-20 24 July 1985 V2(411) MICRO %34(270) Page 1-1
; DEFINE.MIC[10,5351] 19:52 24-Jul-85 CONDITIONAL ASSEMBLY VARIABLE DEFINITIONS
; 1143 .ENDIF/MODEL.B
; 1144
;;1145 .IFNOT/KLPAGE
;;1146 .SET/XADDR=0 ;CAN'T HAVE EXTENDED ADDRESSING WITHOUT KL PAGE
; 1147 .ENDIF/KLPAGE
; 1148
; 1149 .DEFAULT/IMULI.OPT=0 ;1 ENABLES OPTIMIZATION OF IMULI TO TAKE ONLY
; 1150 ;NINE MULTIPLY STEPS [COST = 3 WDS]
; 1151
; 1152 .IF/MODEL.B ; [COST = 19 WDS]
; 1153 .SET/SXCT=0 ;DONT NEED SXCT WITH EXTENDED ADDRESSING
; 1154 ;CAN'T DO IT IN MODEL B HARDWARE
; 1155 .ENDIF/MODEL.B
; 1156 .DEFAULT/SXCT=0 ;1 ENABLES SPECIAL XCT INSTR, WHICH ALLOWS
; 1157 ; DIAGNOSTICS TO GENERATE LARGE ADDRESSES.
; 1158
; 1159
; 1160 .DEFAULT/SNORM.OPT=0 ;1 ENABLES FASTER NORMALIZATION OF SINGLE-
; 1161 ; PRECISION RESULTS WHICH HAVE SEVERE LOSS OF
; 1162 ; SIGNIFICANCE [COST = 4 WDS]
; 1163
;;1164 .IFNOT/MODEL.B
;;1165 .SET/PUSHM=0 ;CODE ONLY WORKS FOR MODEL B
; 1166 .ENDIF/MODEL.B
; 1167
; 1168 .DEFAULT/PUSHM=0 ;ENABLES THE PUSHM AND POPM INSTRUCTIONS
; 1169 ; [COST = ??? WDS]
; 1170 .DEFAULT/EXTEND=1 ;1 ENABLES EXTENDED INSTRUCTION SET
; 1171 ; [COST = 290 WDS]
; 1172
; 1173 .DEFAULT/DBL.INT=1 ;1 ENABLES DOUBLE INTEGER INSTRUCTIONS
; 1174 ; [COST = 59 WDS]
; 1175
; 1176 .DEFAULT/ADJBP=1 ;1 ENABLES ADJUST BYTE POINTER
; 1177 ; [COST = 24 WDS]
; 1178
; 1179 .DEFAULT/RPW=1 ;1 ENABLES READ-PAUSE-WRITE CYCLES FOR
; 1180 ;NON-CACHED REFERENCES BY CERTAIN INSTRUCTIONS.
; 1181 ; [COST = 0]
; 1182
; 1183 .DEFAULT/WRTST=0 ;1 ENABLES WRITE-TEST CYCLES AT AREAD TIME FOR
; 1184 ;INSTRUCTIONS LIKE MOVEM AND SETZM. [COST = 0]
; 1185
; 1186 .DEFAULT/BACK.BLT=0 ;1 ENABLES BLT TO DECREMENT ADDRESSES ON EACH
; 1187 ;STEP IF E < RH(AC). BREAKS MANY PROGRAMS.
; 1188 ; [COST = 9 WDS]
; 1189
;;1190 .IF/TRACKS ;SETUP CONTROL FOR COMMON CODE
;;1191 .SET/INSTR.STAT=1
; 1192 .ENDIF/TRACKS
; 1193
;;1194 .IF/OP.CNT
;;1195 .SET/INSTR.STAT=1 ;ENABLE COMMON CODE, ERROR IF TRACKS TOO
; 1196 .ENDIF/OP.CNT
; 1197
;;1198 .IF/OP.TIME
; KL10 Microcode for TOPS-10 and TOPS-20 24 July 1985 V2(411) MICRO %34(270) Page 1-2
; DEFINE.MIC[10,5351] 19:52 24-Jul-85 CONDITIONAL ASSEMBLY VARIABLE DEFINITIONS
;;1199 .SET/INSTR.STAT=1 ;ERROR IF TRACKS OR OP.CNT ALSO SET
; 1200 .ENDIF/OP.TIME
; 1201
;;1202 .IF/SO.CNT
;;1203 .SET/INSTR.STAT=1
; 1204 .ENDIF/SO.CNT
; 1205
;;1206 .IF/SO2.CNT
;;1207 .SET/INSTR.STAT=1
; 1208 .ENDIF/SO2.CNT
; 1209
; 1210 .DEFAULT/INSTR.STAT=0 ;IF NO STATISTICS, TURN OFF COMMON CODE
; 1211
;;1212 .IF/INSTR.STAT
;;1213 .SET/NONSTD=1 ;STATISTICS CODE IS NONSTANDARD
;;1214 .SET/TRXDEF=1 ;Make sure TRX registers get defined [327]
; 1215 .ENDIF/INSTR.STAT
; 1216
;;1217 .IF/PAGCNT
;;1218 .SET/NONSTD=1 ;All statistics are nonstandard
;;1219 .SET/TRXDEF=1 ;We need the TRX registers
; 1220 .ENDIF/PAGCNT
; 1221
; 1222 .DEFAULT/TRXDEF=0 ;Normally no TRX registers needed
; 1223
; 1224 .DEFAULT/LONG.PC=0 ;LONG PC FORMAT [COST 9 WORDS 11 WORDS IF XADDR]
; 1225
; 1226 .DEFAULT/EPT540=0 ;PUT EPT AND UPT SECTION TABLES AT 540 IF ON
; 1227 ; 440 IF OFF
; 1228
; 1229 .DEFAULT/DIAG.INST=0 ;UNSUPPORTED DIAGNOSTIC MICROCODE
; 1230
;;1231 .IF/DIAG.INST
;;1232 .SET/NONSTD=1 ;NONSTANDARD MICROCODE
; 1233 .ENDIF/DIAG.INST
; 1234
; 1235 .DEFAULT/NONSTD=0 ;NONSTANDARD MICROCODE IS NORMALLY OFF
; 1236 .DEFAULT/SMP=1 ;[216]1 IF SYMMETRIC MULTIPROCESSOR
; 1237 ;SYSTEM.
; 1238 ;TO ENABLE RPW ON DPB INSTRUCTION.
; 1239 ;[COST=9 WORDS if not XADDR, more if XADDR]
; 1240 .DEFAULT/OWGBP=0 ;[264]
; 1241 .DEFAULT/IPA20=0 ;[264]
; 1242 .DEFAULT/NOCST=0 ;[264]
; 1243 .DEFAULT/CST.WRITE=1 ;[314] Enable CST writable bit
; 1244 .DEFAULT/BIG.PT=1 ;[333][347] Special code for big page table and Keep bit
; 1245 .DEFAULT/DDT.BUG=0 ;[346] If on, enable APRID hack to move bit 23
; 1246 .DEFAULT/GFTCNV=1 ;[273] GFLOAT CONVERSION INST.
; 1247
; KL10 Microcode for TOPS-10 and TOPS-20 24 July 1985 V2(411) MICRO %34(270) Page 2
; DEFINE.MIC[10,5351] 19:52 24-Jul-85 HOW TO READ THE MICROCODE -- FORMATS & CONSTRUCTS
; 1248 .TOC "HOW TO READ THE MICROCODE -- FORMATS & CONSTRUCTS"
; 1249
; 1250 ;(1) FIELD DEFINITIONS
; 1251 ; THESE OCCUR AT THE BEGINNING OF THE LISTING, IN THE SOURCE FILE
; 1252 ; DEFINE.MIC (CONTROL AND DISPATCH RAM DEFINITIONS).
; 1253 ; THEY HAVE THE FORM:
; 1254 ; SYMBOL/=<L:R>M,J
; 1255 ;ANOTHER FORM ACCEPTED BY THE ASSEMBLER (FOR HISTORIC REASONS) IS:
; 1256 ; SYMBOL/=J,K,R,M ;THIS FORM HAS BEEN REMOVED FROM THIS CODE
; 1257 ; THE PARAMETER (J) IS MEANINGFUL ONLY WHEN "D" IS SPECIFIED
; 1258 ; AS THE DEFAULT MECHANISM, AND IN THAT CASE, GIVES THE DEFAULT VALUE OF
; 1259 ; THE FIELD IN OCTAL.
; 1260 ; THE PARAMETER (K) GIVES THE FIELD SIZE IN (DECIMAL) NUMBER
; 1261 ; OF BITS. THIS IS USED ONLY IN THE OUTDATED FORMAT.
; 1262 ; THE PARAMETER (L) GIVES THE BIT POSITION OF THE LEFTMOST BIT
; 1263 ;IN THE FIELD. THE SAME METHOD IS USED AS FOR (R) BELOW.
; 1264 ; THE PARAMETER (R) GIVES THE FIELD POSITION IN DECIMAL
; 1265 ; AS THE BIT NUMBER OF THE RIGHTMOST BIT OF THE FIELD. BITS ARE NUMBERED
; 1266 ; FROM 0 ON THE LEFT. NOTE THAT THE POSITION OF BITS IN THE MICROWORD
; 1267 ; SHOWN IN THE LISTING BEARS NO RELATION TO THE ORDERING OF BITS IN THE
; 1268 ; HARDWARE MICROWORD, WHERE FIELDS ARE OFTEN BROKEN UP AND SCATTERED.
; 1269 ; THE PARAMETER (M) IS OPTIONAL, AND SELECTS A DEFAULT
; 1270 ; MECHANISM FOR THE FIELD. THE LEGAL VALUES OF THIS PARAMETER ARE THE
; 1271 ; CHARACTERS "D", "T", "P", OR "+".
; 1272 ; "D" MEANS (J) IS THE DEFAULT VALUE OF THE FIELD IF NO EXPLICIT
; 1273 ; VALUE IS SPECIFIED.
; 1274 ; "T" IS USED ON THE TIME FIELD TO SPECIFY THAT THE VALUE OF THE
; 1275 ; FIELD DEPENDS ON THE TIME PARAMETERS SELECTED FOR OTHER FIELDS.
; 1276 ; THE VALUE OF A FIELD WITH THIS SPECIFICATION DEFAULTS TO THE
; 1277 ; MAX OF <SUM OF THE T1 PARAMETERS DEFINED FOR FIELD/VALUES
; 1278 ; SPECIFIED IN THIS MICROINSTRUCTION>, <SUM OF THE T2 PARAMETERS
; 1279 ; FOR THIS MICROINSTRUCTION>, <J PARAMETER OF THIS FIELD>.
; 1280 ; WITHIN THE KL10 MICROCODE, T1 PARAMETERS ARE USED TO SPECIFY
; 1281 ; FUNCTIONS WHICH DEPEND ON THE ADDER SETUP TIME, AND T2 PARAMETERS
; 1282 ; ARE USED FOR FUNCTIONS WHICH REQUIRE ADDITIONAL TIME FOR CORRECT
; 1283 ; SELECTION OF THE NEXT MICROINSTRUCTION ADDRESS.
; 1284 ; "P" IS USED ON THE PARITY FIELD TO SPECIFY THAT THE VALUE OF THE
; 1285 ; FIELD SHOULD DEFAULT SUCH THAT PARITY OF THE ENTIRE WORD
; 1286 ; IS ODD. IF THIS OPTION IS SELECTED ON A FIELD WHOSE SIZE (K) IS
; 1287 ; ZERO, THE MICRO ASSEMBLER WILL ATTEMPT TO FIND A BIT SOMEWHERE
; 1288 ; IN THE WORD FOR WHICH NO VALUE IS SPECIFIED OR DEFAULTED.
; 1289 ; "+" IS USED ON THE JUMP ADDRESS FIELD TO SPECIFY THAT THE DEFAULT
; 1290 ; JUMP ADDRESS IS THE ADDRESS OF THE NEXT INSTRUCTION ASSEMBLED (NOT,
; 1291 ; IN GENERAL, THE CURRENT LOCATION +1).
; 1292 ; IN GENERAL, A FIELD CORRESPONDS TO THE SET OF BITS WHICH PROVIDE
; 1293 ; SELECT INPUTS FOR MIXERS OR DECODERS, OR CONTROLS FOR ALU'S.
; 1294 ; EXAMPLES:
; 1295 ; AR/=<24:26>D,0 OR AR/=0,3,26,D
; 1296 ; THE MICROCODE FIELD WHICH CONTROLS THE AR MIXER (AND THEREFORE
; 1297 ; THE DATA TO BE LOADED INTO AR ON EACH EBOX CLOCK) IS THREE BITS WIDE
; 1298 ; AND THE RIGHTMOST BIT IS SHOWN IN THE LISTING AS BIT 26 OF THE
; 1299 ; MICROINSTRUCTION. IF NO VALUE IS SPECIFICALLY REQUESTED FOR THE FIELD,
; 1300 ; THE MICROASSEMBLER WILL ENSURE THAT THE FIELD IS 0.
; 1301 ; AD/=<12:17> OR AD/=0,6,17
; 1302 ; THE FIELD WHICH CONTROLS THE AD IS 6 BITS WIDE, ENDING ON
; 1303 ; BIT 17. THE FOURTH PARAMETER OF THE FIELD IS OMITTED, SO THE FIELD
; KL10 Microcode for TOPS-10 and TOPS-20 24 July 1985 V2(411) MICRO %34(270) Page 2-1
; DEFINE.MIC[10,5351] 19:52 24-Jul-85 HOW TO READ THE MICROCODE -- FORMATS & CONSTRUCTS
; 1304 ; IS AVAILABLE TO THE MICROASSEMBLER (IF NO VALUE IS EXPLICITLY
; 1305 ; CALLED OUT FOR THE FIELD) FOR MODIFICATION TO ENSURE ODD PARITY IN THE
; 1306 ; ENTIRE WORD.
; 1307 ;
; 1308 ;(2) VALUE DEFINITIONS
; 1309 ; FOLLOWING A FIELD DEFINITION, SYMBOLS MAY BE CREATED IN THAT
; 1310 ; FIELD TO CORRESPOND TO VALUES OF THE FIELD. THE FORM IS:
; 1311 ; SYMBOL=N,T1,T2
; 1312 ; "N" IS, IN OCTAL, THE VALUE OF SYMBOL WHEN USED IN THE FIELD.
; 1313 ; T1 AND T2 ARE OPTIONAL, AND SPECIFY PARAMETERS IN THE TIME FIELD
; 1314 ; CALCULATION FOR MICROINSTRUCTIONS IN WHICH THIS FIELD/SYMBOL IS USED.
; 1315 ; THE MICROASSEMBLER COMPUTES THE SUMS OF ALL THE T1'S AND ALL THE T2'S
; 1316 ; SPECIFIED FOR FIELD/SYMBOL SPECIFICATIONS IN A WORD, AND USES THE MAX
; 1317 ; OF THE TWO SUMS AS THE DEFAULT VALUE FOR THE FIELD WHOSE DEFAULT
; 1318 ; MECHANISM IS "T". EXAMPLES:
; 1319 ; AD/=<12:17> ;FIELD DEFINITION IN WHICH FOLLOWING SYMBOLS EXIST
; 1320 ; XOR=31
; 1321 ; A+B=6,1
; 1322 ; HERE THE SYMBOLS "XOR" AND "A+B" ARE DEFINED FOR THE "AD" FIELD.
; 1323 ; TO THE ASSEMBLER, THEREFORE, WRITING "AD/XOR" MEANS PUT THE VALUE 31
; 1324 ; INTO THE 6-BIT FIELD ENDING ON BIT 17 OF THE MICROWORD. THE SYMBOLS
; 1325 ; ARE CHOSEN FOR MNEMONIC SIGNIFICANCE, OF COURSE, SO ONE READING
; 1326 ; THE MICROCODE WOULD INTERPRET "AD/XOR" AS "THE OUTPUT OF AD SHALL BE THE
; 1327 ; EXCLUSIVE OR OF ITS A AND B INPUTS". SIMILIARLY, "AD/A+B" IS READ AS
; 1328 ; "AD PRODUCES THE SUM OF A AND B". THE SECOND PARAMETER IN THE DEFINITION
; 1329 ; OF "A+B" IS A CONTROL TO THE MICRO ASSEMBLER'S TIME-FIELD CALCULATION,
; 1330 ; WHICH TELLS THE ASSEMBLER THAT THIS OPERATION TAKES LONGER THAN THE
; 1331 ; BASIC CYCLE, AND THEREFORE THAT THE TIME FIELD SHOULD BE INCREASED.
; 1332 ; AR/=<24:26>D,0 ;FIELD DEFINITION FOR FOLLOWING SYMBOLS
; 1333 ; AR=0
; 1334 ; AD=2
; 1335 ; HERE THE SYMBOLS "AR" AND "AD" ARE DEFINED FOR THE FIELD NAMED
; 1336 ; "AR", WHICH CONTROLS THE AR MIXER. WE COULD WRITE AR/AR TO MEAN THAT
; 1337 ; THE AR MIXER SELECT INPUTS WOULD BE 0, WHICH IN THE
; 1338 ; HARDWARE SELECTS THE AR OUTPUT FOR RECIRCULATION TO THE REGISTER. IN
; 1339 ; PRACTICE, HOWEVER, WE WANT THIS TO BE THE DEFAULT CASE, SO THAT AR
; 1340 ; DOES NOT CHANGE UNLESS WE SPECIFICALLY REQUEST IT, SO THE FIELD
; 1341 ; DEFINITION SPECIFIES 0 AS THE DEFAULT VALUE OF THE FIELD. IF WE
; 1342 ; WANT AR LOADED FROM THE AD OUTPUT, WE WRITE "AR/AD" TO SET THE
; 1343 ; MIXER SELECTS TO PASS THE AD OUTPUT INTO THE AR.
; 1344 ;
; 1345 ;(3) LABEL DEFINITIONS
; 1346 ; A MICRO INSTRUCTION MAY BE LABELLED BY A SYMBOL FOLLOWED BY COLON
; 1347 ; PRECEDING THE MICROINSTRUCTION DEFINITION. THE ADDRESS OF THE
; 1348 ; MICROINSTRUCTION BECOMES THE VALUE OF THE SYMBOL IN THE FIELD NAMED "J".
; 1349 ; EXAMPLE:
; 1350 ; FOO: J/FOO
; 1351 ; THIS IS A MICROINSTRUCTION WHOSE "J" FIELD (JUMP ADDRESS) CONTAINS
; 1352 ; THE VALUE "FOO". IT ALSO DEFINES THE SYMBOL "FOO" TO BE THE ADDRESS
; 1353 ; OF ITSELF. THEREFORE, IF EXECUTED BY THE MICROPROCESSOR, IT WOULD
; 1354 ; LOOP ON ITSELF.
; 1355 ;
; 1356 ;(4) COMMENTS
; 1357 ; A SEMICOLON ANYWHERE ON A LINE CAUSES THE REST OF THE LINE
; 1358 ; TO BE IGNORED BY THE ASSEMBLER. THIS TEXT IS AN EXAMPLE OF COMMENTS.
; 1359 ;
; KL10 Microcode for TOPS-10 and TOPS-20 24 July 1985 V2(411) MICRO %34(270) Page 2-2
; DEFINE.MIC[10,5351] 19:52 24-Jul-85 HOW TO READ THE MICROCODE -- FORMATS & CONSTRUCTS
; 1360 ;(5) MICROINSTRUCTION DEFINITION
; 1361 ; A WORD OF MICROCODE IS DEFINED BY SPECIFYING A FIELD NAME,
; 1362 ; FOLLOWED BY SLASH (/), FOLLOWED BY A VALUE. THE VALUE MAY BE A
; 1363 ; SYMBOL DEFINED FOR THAT FIELD, AN OCTAL DIGIT STRING, OR A DECIMAL
; 1364 ; DIGIT STRING (DISTINGUISHED BY THE FACT THAT IT CONTAINS "8" AND/OR
; 1365 ; "9" AND/OR IS TERMINATED BY A PERIOD). SEVERAL FIELDS MAY BE SPECIFIED
; 1366 ; IN ONE MICROINSTRUCTION BY SEPARATING FIELD/VALUE SPECIFICATIONS WITH
; 1367 ; COMMAS. EXAMPLE:
; 1368 ; ADB/BR,ADA/AR,AD/A+B,AR/AD
; 1369 ; THE FIELD NAMED "ADB" IS GIVEN THE VALUE NAMED "BR" (TO
; 1370 ; CAUSE THE MIXER ON THE B SIDE OF AD TO SELECT BR), FIELD "ADA" HAS VALUE
; 1371 ; "AR", FIELD "AD" HAS VALUE "A+B", AND FIELD "AR" HAS VALUE "AD".
; 1372 ;
; 1373 ;(6) CONTINUATION
; 1374 ; THE DEFINITION OF A MICROINSTRUCTION MAY CONTINUED ONTO TWO OR
; 1375 ; MORE LINES BY BREAKING IT AFTER ANY COMMA. IN OTHER WORDS, IF THE
; 1376 ; LAST NON-BLANK, NON-COMMENT CHARACTER ON A LINE IS A COMMA, THE
; 1377 ; INSTRUCTION SPECIFICATION IS CONTINUED ON THE FOLLOWING LINE.
; 1378 ; EXAMPLE:
; 1379 ; ADB/BR,ADA/AR, ;SELECT AR & BR AS AD INPUTS
; 1380 ; AD/A+B,AR/AD ;TAKE THE SUM INTO AR
; 1381 ; BY CONVENTION, CONTINUATION LINES ARE INDENTED AN EXTRA TAB.
; 1382 ;
; 1383 ;(7) MACROS
; 1384 ; A MACRO IS A SYMBOL WHOSE VALUE IS ONE OR MORE FIELD/VALUE
; 1385 ; SPECIFICATIONS AND/OR MACROS. A MACRO DEFINITION IS A LINE CONTAINING
; 1386 ; THE MACRO NAME FOLLOWED BY A QUOTED STRING WHICH IS THE VALUE OF THE
; 1387 ; MACRO. EXAMPLE:
; 1388 ; AR_AR+BR "ADB/BR,ADA/AR,AD/A+B,AR/AD"
; 1389 ; THE APPEARANCE OF A MACRO IN A MICROINSTRUCTION DEFINITION IS EQUIVALENT
; 1390 ; TO THE APPEARANCE OF ITS VALUE. MACROS FOR VARIOUS FUNCTIONS
; 1391 ; ARE DEFINED IN "MACRO.MIC".
; 1392 ;
; 1393 ;(8) PSEUDO OPS
; 1394 ; THE MICRO ASSEMBLER HAS 10 PSEUDO-OPERATORS:
; 1395 ;.DCODE AND .UCODE SELECT THE RAM INTO WHICH SUBSEQUENT MICROCODE WILL
; 1396 ;BE LOADED, AND THEREFORE THE FIELD DEFINITIONS AND MACROS WHICH ARE
; 1397 ;MEANINGFUL IN SUBSEQUENT MICROCODE
; 1398 ;.TITLE DEFINES A STRING OF TEXT TO APPEAR IN THE PAGE HEADER, AND
; 1399 ;.TOC DEFINES AN ENTRY FOR THE TABLE OF CONTENTS AT THE BEGINNING.
; 1400 ;.SET DEFINES THE VALUE OF A CONDITIONAL ASSEMBLY PARAMETER,
; 1401 ;.CHANGE REDEFINES A CONDITIONAL ASSEMBLY PARAMETER,
; 1402 ;.DEFAULT ASSIGNS A VALUE TO AN UNDEFINED PARAMETER.
; 1403 ;.IF ENABLES ASSEMBLY IF THE VALUE OF THE PARAMETER IS NOT ZERO,
; 1404 ;.IFNOT ENABLES ASSEMBLY IF THE PARAMETER VALUE IS ZERO, AND
; 1405 ;.ENDIF RE-ENABLES ASSEMBLY IF SUPPRESSED BY THE PARAMETER NAMED.
; 1406 ;
; 1407 ;(9) LOCATION CONTROL
; 1408 ; A MICROINSTRUCTION "LABELLED" WITH A NUMBER IS ASSIGNED TO THAT
; 1409 ; ADDRESS.
; 1410 ; THE CHARACTER "=" AT THE BEGINNING OF A LINE, FOLLOWED BY
; 1411 ; A STRING OF 0'S, 1'S, AND/OR *'S, SPECIFIES A CONSTRAINT ON THE
; 1412 ; ADDRESS OF FOLLOWING MICROINSTRUCTIONS. THE NUMBER OF CHARACTERS
; 1413 ; IN THE CONSTRAINT STRING (EXCLUDING THE "=") IS THE NUMBER OF LOW-ORDER
; 1414 ; BITS CONSTRAINED IN THE ADDRESS. THE MICROASSEMBLER ATTEMPTS TO FIND
; 1415 ; AN UNUSED LOCATION WHOSE ADDRESS HAS 0 BITS IN THE POSITIONS
; KL10 Microcode for TOPS-10 and TOPS-20 24 July 1985 V2(411) MICRO %34(270) Page 2-3
; DEFINE.MIC[10,5351] 19:52 24-Jul-85 HOW TO READ THE MICROCODE -- FORMATS & CONSTRUCTS
; 1416 ; CORRESPONDING TO 0'S IN THE CONSTRAINT STRING AND 1 BITS WHERE THE
; 1417 ; CONSTRAINT HAS 1'S. ASTERISKS DENOTE "DON'T CARE" BIT POSITIONS.
; 1418 ; IF THERE ARE ANY 0'S IN THE CONSTRAINT STRING, THE CONSTRAINT
; 1419 ; IMPLIES A BLOCK OF <2**N> MICROWORDS, WHERE N IS THE NUMBER OF 0'S
; 1420 ; IN THE STRING. ALL LOCATIONS IN THE BLOCK WILL HAVE 1'S IN THE ADDRESS
; 1421 ; BITS CORRESPONDING TO 1'S IN THE STRING, AND BIT POSITIONS DENOTED BY *'S
; 1422 ; WILL BE THE SAME IN ALL LOCATIONS OF THE BLOCK.
; 1423 ; IN SUCH A CONSTRAINT BLOCK, THE DEFAULT ADDRESS PROGRESSION IS
; 1424 ; COUNTING IN THE "0" POSITIONS OF THE CONSTRAINT STRING, BUT A NEW
; 1425 ; CONSTRAINT STRING OCCURING WITHIN A BLOCK MAY FORCE SKIPPING OVER
; 1426 ; SOME LOCATIONS OF THE BLOCK. WITHIN A BLOCK, A NEW CONSTRAINT
; 1427 ; STRING DOES NOT CHANGE THE PATTERN OF DEFAULT ADDRESS PROGRESSION, IT
; 1428 ; MERELY ADVANCES THE LOCATION COUNTER OVER THOSE LOCATIONS. THE
; 1429 ; MICROASSEMBLER WILL LATER FILL THEM IN.
; 1430 ; A NULL CONSTRAINT STRING ("=" FOLLOWED BY ANYTHING BUT "0",
; 1431 ; "1", OR "*") SERVES TO TERMINATE A CONSTRAINT BLOCK.
; 1432 ; EXAMPLES:
; 1433 ; =0
; 1434 ; THIS SPECIFIES THAT THE LOW-ORDER ADDRESS BIT MUST BE ZERO--
; 1435 ; THE MICROASSEMBLER FINDS AN EVEN-ODD PAIR OF LOCATIONS, AND PUTS
; 1436 ; THE NEXT TWO MICROINSTRUCTIONS INTO THEM.
; 1437 ; =11
; 1438 ; THIS SPECIFIES THAT THE TWO LOW-ORDER BITS OF THE ADDRESS MUST
; 1439 ; BOTH BE ONES. SINCE THERE ARE NO 0'S IN THIS CONSTRAINT, THE
; 1440 ; ASSEMBLER FINDS ONLY ONE LOCATION MEETING THE CONSTRAINT.
; 1441 ; =0*****
; 1442 ; THIS SPECIFIES AN ADDRESS IN WHICH THE "40" BIT IS ZERO. DUE
; 1443 ; TO THE IMPLEMENTATION OF THIS FEATURE IN THE ASSEMBLER, THE DEFAULT
; 1444 ; ADDRESS PROGRESSION APPLIES ONLY TO THE LOW-ORDER 5 BITS, SO THIS
; 1445 ; CONSTRAINT FINDS ONE WORD IN WHICH THE "40" BIT IS ZERO, AND DOES
; 1446 ; NOT ATTEMPT TO FIND ONE IN WHICH THAT BIT IS A ONE.
; 1447 ;THIS LIMITATION HAS BEEN CHANGED WITH NEWER ASSEMBLER VERSIONS.
; 1448 ;HOWEVER NONE OF THE LOCATIONS IN THE MICROCODE REQUIRE ANYTHING BUT THE
; 1449 ;CONSTRAINT MENTIONED ABOVE.
; 1450
; KL10 Microcode for TOPS-10 and TOPS-20 24 July 1985 V2(411) MICRO %34(270) Page 3
; DEFINE.MIC[10,5351] 19:52 24-Jul-85 MICROCODE LISTING TEMPLATE
; 1451 .TOC "MICROCODE LISTING TEMPLATE"
; 1452 ;HERE IS A TEMPLATE WHICH CAN BE USED WITH THE MICROCODE
; 1453 ; LISTING TO IDENTIFY FIELDS IN THE OUTPUT --
; 1454
; 1455
; 1456 ; ---- ---- ---- ---- ---- ---- ---- ----
; 1457 ; [--] [--] []!! !!!! !!!! !![] [][] ![-]
; 1458 ; ! ! !!! !!!! !!!! !! ! ! ! ! + # = MAGIC NUMBERS
; 1459 ; ! ! !!! !!!! !!!! !! ! ! ! + MARK = SCOPE SYNC
; 1460 ; ! ! !!! !!!! !!!! !! ! ! !
; 1461 ; ! ! !!! !!!! !!!! !! ! ! + CALL, DISP/SPEC = SPEC FUNCTIONS
; 1462 ; ! ! !!! !!!! !!!! !! ! + SKIP/COND = SPECIAL FUNCTIONS
; 1463 ; ! ! !!! !!!! !!!! !! !
; 1464 ; ! ! !!! !!!! !!!! !! + TIME, MEM = UINST TIME & MEM FUNCTION
; 1465 ; ! ! !!! !!!! !!!! !+ VMA = VMA INPUT SELECT
; 1466 ; ! ! !!! !!!! !!!! + SH/ARMM = SH FUNCTION / ARMM SELECT
; 1467 ; ! ! !!! !!!! !!!!
; 1468 ; ! ! !!! !!!! !!!+ SC, FE = SC INPUT SELECT & FE LOAD
; 1469 ; ! ! !!! !!!! !!+ SCADB = SELECT FOR SCAD "B" INPUT
; 1470 ; ! ! !!! !!!! !+ SCADA = ENABLE AND SELECT FOR SCAD "A" INPUT
; 1471 ; ! ! !!! !!!! + SCAD = SC/FE ADDER FUNCTION
; 1472 ; ! ! !!! !!!!
; 1473 ; ! ! !!! !!!+ FM ADR = FAST MEMORY ADDRESS SELECT
; 1474 ; ! ! !!! !!+ BR, BRX, MQ = LOAD BR & BRX, SEL FOR MQ
; 1475 ; ! ! !!! !+ ARX = SELECT FOR ARX INPUT
; 1476 ; ! ! !!! + AR = SELECT FOR AR INPUT
; 1477 ; ! ! !!!
; 1478 ; ! ! !!+ ADB = SELECT FOR ADDER "B" INPUT
; 1479 ; ! ! !+ ADA = SELECT AND ENABLE FOR ADDER "A" INPUT
; 1480 ; ! ! + AD = OPERATION IN ADDER AND ADDER EXTENSION
; 1481 ; ! !
; 1482 ; ! + J = BASE ADDRESS TO WHICH THIS MICROINSTRUCTION JUMPS
; 1483 ; !
; 1484 ; + LOCATION IN CRAM INTO WHICH THIS WORD IS LOADED
; 1485 ;
; 1486 ; U/V = MICRO INSTRUCTION FOR CRAM
; 1487
; 1488 ;*******************************************************************
; 1489
; 1490 ; D = WORD FOR DRAM
; 1491 ;
; 1492 ; + LOCATION IN DRAM INTO WHICH THIS WORD IS LOADED
; 1493 ; !
; 1494 ; ! + A = OPERAND ACCESS CONTROL
; 1495 ; ! !+ B = INSTRUCTION "MODE"
; 1496 ; ! !! + P = PARITY FOR THIS WORD
; 1497 ; ! !! !
; 1498 ; ! !! ! + J = ADDRESS OF HANDLER FOR THIS INSTRUCTION
; 1499 ; [--] !! ! [--]
; 1500 ; ---- ---- ----
; 1501
; KL10 Microcode for TOPS-10 and TOPS-20 24 July 1985 V2(411) MICRO %34(270) Page 4
; DEFINE.MIC[10,5351] 19:52 24-Jul-85 KL10 INSTRUCTION OPCODE MAP
; 1502 .TOC "KL10 INSTRUCTION OPCODE MAP"
; 1503
; 1504 ; 0 1 2 3 4 5 6 7
; 1505 ;100 UUO UUO EFAD EFSB JSYS ADJSP EFMP EFDV
; 1506 ;110 DFAD DFSB DFMP DFDV DADD DSUB DMUL DDIV
; 1507 ;120 DMOVE DMOVN FIX EXTEND DMOVEM DMOVNM FIXR FLTR
; 1508 ;130 UFA DFN FSC IBP ILDB LDB IDPB DPB
; 1509 ;140 FAD FADL FADM FADB FADR FADRI FADRM FADRB
; 1510 ;150 FSB FSBL FSBM FSBB FSBR FSBRI FSBRM FSBRB
; 1511 ;160 FMP FMPL FMPM FMPB FMPR FMPRI FMPRM FMPRB
; 1512 ;170 FDV FDVL FDVM FDVB FDVR FDVRI FDVRM FDVRB
; 1513 ; 0 1 2 3 4 5 6 7
; 1514 ;200 MOVE MOVEI MOVEM MOVES MOVS MOVSI MOVSM MOVSS
; 1515 ;210 MOVN MOVNI MOVNM MOVNS MOVM MOVMI MOVMM MOVMS
; 1516 ;220 IMUL IMULI IMULM IMULB MUL MULI MULM MULB
; 1517 ;230 IDIV IDIVI IDIVM IDIVB DIV DIVI DIVM DIVB
; 1518 ;240 ASH ROT LSH JFFO ASHC ROTC LSHC UUO
; 1519 ;250 EXCH BLT AOBJP AOBJN JRST JFCL XCT MAP
; 1520 ;260 PUSHJ PUSH POP POPJ JSR JSP JSA JRA
; 1521 ;270 ADD ADDI ADDM ADDB SUB SUBI SUBM SUBB
; 1522 ; 0 1 2 3 4 5 6 7
; 1523 ;300 CAI CAIL CAIE CAILE CAIA CAIGE CAIN CAIG
; 1524 ;310 CAM CAML CAME CAMLE CAMA CAMGE CAMN CAMG
; 1525 ;320 JUMP JUMPL JUMPE JUMPLE JUMPA JUMPGE JUMPN JUMPG
; 1526 ;330 SKIP SKIPL SKIPE SKIPLE SKIPA SKIPGE SKIPN SKIPG
; 1527 ;340 AOJ AOJL AOJE AOJLE AOJA AOJGE AOJN AOJG
; 1528 ;350 AOS AOSL AOSE AOSLE AOSA AOSGE AOSN AOSG
; 1529 ;360 SOJ SOJL SOJE SOJLE SOJA SOJGE SOJN SOJG
; 1530 ;370 SOS SOSL SOSE SOSLE SOSA SOSGE SOSN SOSG
; 1531 ; 0 1 2 3 4 5 6 7
; 1532 ;400 SETZ SETZI SETZM SETZB AND ANDI ANDM ANDB
; 1533 ;410 ANDCA ANDCAI ANDCAM ANDCAB SETM SETMI SETMM SETMB
; 1534 ;420 ANDCM ANDCMI ANDCMM ANDCMB SETA SETAI SETAM SETAB
; 1535 ;430 XOR XORI XORM XORB IOR IORI IORM IORB
; 1536 ;440 ANDCB ANDCBI ANDCBM ANDCBB EQV EQVI EQVM EQVB
; 1537 ;450 SETCA SETCAI SETCAM SETCAB ORCA ORCAI ORCAM ORCAB
; 1538 ;460 SETCM SETCMI SETCMM SETCMB ORCM ORCMI ORCMM ORCMB
; 1539 ;470 ORCB ORCBI ORCBM ORCBB SETO SETOI SETOM SETOB
; 1540 ; 0 1 2 3 4 5 6 7
; 1541 ;500 HLL HLLI HLLM HLLS HRL HRLI HRLM HRLS
; 1542 ;510 HLLZ HLLZI HLLZM HLLZS HRLZ HRLZI HRLZM HRLZS
; 1543 ;520 HLLO HLLOI HLLOM HLLOS HRLO HRLOI HRLOM HRLOS
; 1544 ;530 HLLE HLLEI HLLEM HLLES HRLE HRLEI HRLEM HRLES
; 1545 ;540 HRR HRRI HRRM HRRS HLR HLRI HLRM HLRS
; 1546 ;550 HRRZ HRRZI HRRZM HRRZS HLRZ HLRZI HLRZM HLRZS
; 1547 ;560 HRRO HRROI HRROM HRROS HLRO HLROI HLROM HLROS
; 1548 ;570 HRRE HRREI HRREM HRRES HLRE HLREI HLREM HLRES
; 1549 ; 0 1 2 3 4 5 6 7
; 1550 ;600 TRN TLN TRNE TLNE TRNA TLNA TRNN TLNN
; 1551 ;610 TDN TSN TDNE TSNE TDNA TSNA TDNN TSNN
; 1552 ;620 TRZ TLZ TRZE TLZE TRZA TLZA TRZN TLZN
; 1553 ;630 TDZ TSZ TDZE TSZE TDZA TSZA TDZN TSZN
; 1554 ;640 TRC TLC TRCE TLCE TRCA TLCA TRCN TLCN
; 1555 ;650 TDC TSC TDCE TSCE TDCA TSCA TDCN TSCN
; 1556 ;660 TRO TLO TROE TLOE TROA TLOA TRON TLON
; 1557 ;670 TDO TSO TDOE TSOE TDOA TSOA TDON TSON
; KL10 Microcode for TOPS-10 and TOPS-20 24 July 1985 V2(411) MICRO %34(270) Page 5
; DEFINE.MIC[10,5351] 19:52 24-Jul-85 CONTROL RAM DEFINITIONS -- J, AD
; 1558 .TOC "CONTROL RAM DEFINITIONS -- J, AD"
; 1559 ;FIELDS ARRANGED FOR READABILITY, NOT COMPACTNESS
; 1560 ; IN THE PROCESSOR, BITS ARE SCATTERED IN ANOTHER ORDER
; 1561
; 1562 U0/=<0:0>D,0 ;BIT 0 UNUSED
; 1563 J/=<1:11>+ ;SYMBOLS WILL BE DEFINED BY TAGS (CRA1&CRA2)
; 1564
; 1565 ;MAIN ADDER CONTROLS. Bit 0 = carry in, bit 1 = boolean operation
; 1566 ; Bits 2-5 are S8-S1 of the 10181 ALU chip. For normal arithmetic,
; 1567 ; the AD and ADX are separated unless SPEC/AD LONG or equivalent is given.
; 1568
; 1569
; 1570 AD/=<12:17> ; (EDP3, EXCEPT CARRY IN, ON CTL1)
; 1571 A+1=40,1
; 1572 A+XCRY=00,1
; 1573 ; A+ANDCB=01,1
; 1574 ; A+AND=02,1
; 1575 A*2=03,1
; 1576 A*2+1=43,1
; 1577 ; OR+1=44,1
; 1578 ; OR+ANDCB=05,1
; 1579 A+B=06,1
; 1580 A+B+1=46,1
; 1581 ; A+OR=07,1
; 1582 ORCB+1=50,1
; 1583 A-B-1=11,1
; 1584 A-B=51,1
; 1585 ; AND+ORCB=52,1
; 1586 ; A+ORCB=53,1
; 1587 XCRY-1=54,1
; 1588 ; ANDCB-1=15,1
; 1589 ; AND-1=16,1
; 1590 A-1=17,1
; 1591 ;ADDER LOGICAL FUNCTIONS
; 1592 SETCA=20
; 1593 ORC=21 ;NAND
; 1594 ORCA=22
; 1595 1S=23
; 1596 ANDC=24 ;NOR
; 1597 NOR=24
; 1598 SETCB=25
; 1599 EQV=26
; 1600 ORCB=27
; 1601 ANDCA=30
; 1602 XOR=31
; 1603 B=32
; 1604 OR=33
; 1605 0S=34
; 1606 ANDCB=35
; 1607 AND=36
; 1608 A=37
; 1609 ;BOOLEAN FUNCTIONS FOR WHICH CRY0 IS INTERESTING
; 1610 CRY A EQ -1=60,1 ;GENERATE CRY0 IF A=1S, AD=SETCA
; 1611 CRY A.B#0=36,1 ;CRY 0 IF A&B NON-ZERO, AD=AND
; 1612 CRY A#0=37,1 ;GENERATE CRY0 IF A .NE. 0, AD=A
; 1613 CRY A GE B=71,1 ;CRY0 IF A .GE. B, UNSIGNED; AD=XOR
; KL10 Microcode for TOPS-10 and TOPS-20 24 July 1985 V2(411) MICRO %34(270) Page 6
; DEFINE.MIC[10,5351] 19:52 24-Jul-85 CONTROL RAM DEFINITIONS -- DATA PATH MIXERS
; 1614 .TOC "CONTROL RAM DEFINITIONS -- DATA PATH MIXERS"
; 1615
; 1616 ADA/=<18:20> ; (EDP3)
; 1617 AR=0
; 1618 ARX=1
; 1619 MQ=2
; 1620 PC=3
; 1621 ADA EN/=<18:18> ;ADA ENABLE ALSO ENABLES ADXA (EDP3)
; 1622 EN=0
; 1623 0S=1
; 1624 U21/=<21:21>D,0 ;BIT 21 UNUSED
; 1625 ADB/=<22:23> ;CONTROLS ADB AND ADXB (EDP3)
; 1626 FM=0,,1 ;MUST HAVE TIME FOR PARITY CHECK
; 1627 BR*2=1
; 1628 BR=2
; 1629 AR*4=3
; 1630 U23/=<23:23>D,1 ;PREVENT DEFAULT SELECTION OF FM
; 1631 ;FORCE IT TO TAKE ONE OF THE SHORTER
; 1632 ;PATHS IF FM NOT NEEDED ALSO DISABLES
; 1633 ;PARITY CHECKING LOGIC
; 1634
; 1635 ;REGISTER INPUTS
; 1636
; 1637 AR/=<24:26>D,0 ; (EDP1)
; 1638 AR=0
; 1639 ARMM=0 ;REQUIRES SPECIAL FUNCTION
; 1640 MEM=0 ;[346] MB WAIT will poke to 1 (CACHE) or 2 (AD)
; 1641 CACHE=1 ;ORDINARILY SELECTED BY HWARE
; 1642 AD=2
; 1643 EBUS=3
; 1644 SH=4
; 1645 AD*2=5 ;Low bit from ADX0
; 1646 ADX=6
; 1647 AD*.25=7
; 1648 ARX/=<27:29>D,0 ; (EDP2)
; 1649 ARX=0 ;[345] BY DEFAULT
; 1650 MEM=0 ;[346] Gets poked by MB WAIT to 1 or 2
; 1651 CACHE=1 ;ORDINARILY BY MBOX RESP
; 1652 AD=2
; 1653 MQ=3
; 1654 SH=4
; 1655 ADX*2=5 ;Low bit from MQ0
; 1656 ADX=6
; 1657 ADX*.25=7
; 1658 BR/=<30:30>D,0 ;DEFAULT TO RECIRCULATE (EDP4)
; 1659 AR=1
; 1660 BRX/=<31:31>D,0 ;DEFAULT TO RECIRCULATE (EDP4)
; 1661 ARX=1
; 1662 MQ/=<32:32>D,0 ;DEFAULT TO RECIRCULATE (EDP2)
; 1663 SH=1 ;LOAD FROM SHIFT MATRIX
; 1664 MQ*2=0 ;With SPEC/MQ SHIFT--Low bit from AD CRY -2
; 1665 MQ*.25=1 ;With SPEC/MQ SHIFT--High bits from ADX34, ADX35
; 1666 MQ SEL=0 ;WITH COND/REG CTL
; 1667 MQM SEL=1 ;WITH COND/REG CTL
; 1668
; KL10 Microcode for TOPS-10 and TOPS-20 24 July 1985 V2(411) MICRO %34(270) Page 7
; DEFINE.MIC[10,5351] 19:52 24-Jul-85 CONTROL RAM DEFINITIONS -- DATA PATH MIXERS
; 1669 ;FMADR SELECTS THE SOURCE OF THE FAST MEMORY ADDRESS,
; 1670 ; RATHER THAN PROVIDING THE ADDRESS ITSELF
; 1671
; 1672 FMADR/=<33:35> ; (APR4&APR5)
; 1673 AC0=0 ;IR 9-12
; 1674 AC1=1 ;<IR 9-12>+1 MOD 16
; 1675 XR=2 ;ARX 14-17
; 1676 VMA=3 ;VMA 32-35
; 1677 AC2=4 ;<IR 9-12>+2 MOD 16
; 1678 AC3=5 ;<IR 9-12>+3 MOD 16
;;1679 .IFNOT/MODEL.B
;;1680 AC4=6 ;CURRENT BLOCK, AC+4
;;1681 ac5=7 ;current block, ac+5
; 1682 .IF/MODEL.B
; 1683 AC+#=6 ;CURRENT BLOCK, AC+ MAGIC #
; 1684 .ENDIF/MODEL.B
; 1685 #B#=7 ;BLOCK AND AC SELECTED BY # FIELD
; 1686
; 1687 .TOC "CONTROL RAM DEFINITIONS -- 10-BIT LOGIC"
; 1688
; 1689 SCAD/=<36:38> ; (SCD1)
; 1690 A=0
; 1691 A-B-1=1
; 1692 A+B=2
; 1693 A-1=3
; 1694 A+1=4
; 1695 A-B=5
; 1696 OR=6
; 1697 AND=7
; 1698 SCADA/=<39:41> ; (SCD1)
; 1699 FE=0
; 1700 AR0-5=1 ;BYTE POINTER P FIELD
; 1701 AR EXP=2 ;<AR 01-08> XOR <AR 00>
; 1702 #=3 ;SIGN EXTENDED WITH #00
; 1703 SCADA EN/=<39:39> ; (SCD1)
; 1704 0S=1
; 1705 U42/=<42:42>D,0 ;BIT 42 UNUSED
; 1706 SCADB/=<43:44> ; (SCD1)
; 1707 SC=0
; 1708 AR6-11=1 ;BYTE POINTER S FIELD
; 1709 AR0-8=2
; 1710 #=3 ;NO SIGN EXTENSION
; 1711 U45/=<45:45>D,0 ;BIT 45 UNUSED
; 1712 SC/=<46:46>D,0 ;RECIRCULATE BY DEFAULT (SCD2)
; 1713 FE=0 ;WITH SCM ALT
; 1714 SCAD=1
; 1715 AR SHIFT=1 ;WITH SCM ALT ;AR 18, 28-35
; 1716 FE/=<47:47>D,0 ;RECIRCULATE BY DEFAULT (SCD2)
; 1717 SCAD=1
; 1718 U48/=<48:48>D,0 ;BIT 48 UNUSED
; 1719
; KL10 Microcode for TOPS-10 and TOPS-20 24 July 1985 V2(411) MICRO %34(270) Page 8
; DEFINE.MIC[10,5351] 19:52 24-Jul-85 CONTROL RAM DEFINITIONS -- SHIFT, ARMM, VMA, TIME
; 1720 .TOC "CONTROL RAM DEFINITIONS -- SHIFT, ARMM, VMA, TIME"
; 1721
; 1722 SH/=<49:50> ; (SH1)
; 1723 SHIFT AR!ARX=0 ;LEFT BY (SC)
; 1724 AR=1
; 1725 ARX=2
; 1726 AR SWAP=3 ;HALVES SWAPPED
; 1727 ARMM/=<49:50> ;SAME BITS AS SH CONTROL (SCD3)
; 1728 #=0 ;MAGIC # 0-8 TO AR 0-8
; 1729 EXP_SIGN=1 ;AR1-8 _ AR0
; 1730 SCAD EXP=2 ;AR0-8_SCAD
; 1731 SCAD POS=3 ;AR0-5_SCAD
; 1732 .IF/MODEL.B
; 1733 VMAX/=<49:50> ;SAME BITS AS SH CONTROL (VMA4)
; 1734 VMAX=0 ;VMA SECTION #
; 1735 PC SEC=1 ;PC SECTION #
; 1736 PREV SEC=2 ;PREVIOUS CONTEXT SECT
; 1737 AD12-17=3
; 1738 .ENDIF/MODEL.B
; 1739 U51/=<51:51>D,0 ;BIT 51 UNUSED
; 1740 VMA/=<52:53>D,0 ;ALSO CONTROLLED BY SPECIAL FUNCTIONS
; 1741 VMA=0 ;BY DEFAULT
; 1742 PC=1 ;MAY BE OVERRIDDEN BY MCL LOGIC TO LOAD FROM AD
; 1743 LOAD=1 ; IF WE KNOW IT WILL BE OVERRIDDEN, USE THIS
; 1744 PC+1=2
; 1745 AD=3 ;ENTIRE VMA, INCLUDING SECTION
; 1746 TIME/=<54:55>T ;CONTROLS MINIMUM MICROINSTRUCTION EXECUTION
; 1747 ; TIME, COUNTING MBOX CLOCK TICKS (CLK)
; 1748 ;ASSEMBLER GENERALLY TAKES CARE OF THIS
; 1749 2T=0 ;2 TICKS
; 1750 3T=1 ;3 TICKS
; 1751 4T=2 ;4 TICKS
; 1752 5T=3 ;5 TICKS (COND/DIAG FUNC & #00, --> .5 USEC)
; 1753
; KL10 Microcode for TOPS-10 and TOPS-20 24 July 1985 V2(411) MICRO %34(270) Page 9
; DEFINE.MIC[10,5351] 19:52 24-Jul-85 CONTROL RAM DEFINITIONS -- MEM SPECIAL FUNCTIONS
; 1754 .TOC "CONTROL RAM DEFINITIONS -- MEM SPECIAL FUNCTIONS"
; 1755
; 1756 MEM/=<56:59>D,0 ; (MCL1)
; 1757 ; NOP=0 ;DEFAULT
; 1758 ARL IND=1 ;CONTROL AR LEFT MUX FROM # FIELD
; 1759 MB WAIT=2 ;WAIT FOR MBOX RESP IF PENDING
; 1760 A RD=4 ;OPERAND READ and load PXCT bits (model B)
; 1761 B WRITE=5 ;CONDITIONAL WRITE ON DRAM B 01
; 1762 FETCH=6 ;LOAD NEXT INSTR TO ARX (CONTROL BY #)
; 1763 REG FUNC=7 ;MBOX REGISTER FUNCTIONS
; 1764 LOAD AR=12
; 1765 LOAD ARX=13
; 1766 WRITE=16 ;FROM AR TO MEMORY
; 1767 .IF/MODEL.B
; 1768 RESTORE VMA=3 ;AD FUNC WITHOUT GENERATING A REQUEST
; 1769 AD FUNC=10 ;FUNCTION LOADED FROM AD LEFT
; 1770 EA CALC=11 ;FUNCTION DECODED FROM # FIELD
; 1771 RW=14 ;READ, TEST WRITABILITY
; 1772 RPW=15 ;READ-PAUSE-WRITE
; 1773 IFET=17 ;UNCONDITIONAL FETCH
;;1774 .IFNOT/MODEL.B ;OLD-STYLE MCL BOARD
;;1775 SEC 0=3 ;CLEAR VMAX
;;1776 A IND=10 ;A-TYPE INDIRECT
;;1777 BYTE IND=11 ;BYTE-TYPE INDIRECT
;;1778 AD FUNC=14 ;FUNCTION FROM AD LEFT
;;1779 BYTE RD=15 ;BYTE READ TO BOTH AR AND ARX
;;1780 RPW=17 ;LOAD AR WITH RPW CYCLE
; 1781 .ENDIF/MODEL.B
; 1782
; KL10 Microcode for TOPS-10 and TOPS-20 24 July 1985 V2(411) MICRO %34(270) Page 10
; DEFINE.MIC[10,5351] 19:52 24-Jul-85 CONTROL RAM DEFINITIONS -- SKIP/COND SPECIAL FUNCTIONS
; 1783 .TOC "CONTROL RAM DEFINITIONS -- SKIP/COND SPECIAL FUNCTIONS"
; 1784
; 1785 SKIP/=<60:65>D,0 ;MICRO-PROGRAM SKIPS
; 1786 ; 40-57 DECODED ON (CRA2)
; 1787 ; SPARE=40
; 1788 EVEN PAR=41,,1 ;AR PARITY IS EVEN
; 1789 BR0=42 ;BR BIT 00
; 1790 ARX0=43 ;ARX BIT 00
; 1791 AR18=44 ;AR BIT 18
; 1792 AR0=45 ;AR BIT 00
; 1793 AC#0=46 ;IR9-12 .EQ. 0
; 1794 SC0=47 ;SC BIT 00
;;1795 .IFNOT/MODEL.B
;;1796 SC .LT. 36=50
; 1797 .IF/MODEL.B
; 1798 PC SEC0=50
; 1799 .ENDIF/MODEL.B
; 1800 SCAD0=51,,1 ;SIGN OF SCAD OUTPUT
; 1801 SCAD#0=52,,1 ;SCAD OUTPUT IS NON-ZERO
; 1802 ADX0=53,1 ;ADDER EXTENSION BIT 00
; 1803 AD CRY0=54,1 ;CARRY OUT OF AD BIT -2 (BOOLE IGNORED)
; 1804 AD0=55,1 ;ADDER BIT 00
; 1805 AD#0=56,1 ;AD BITS 00-35 CONTAIN SOME ONES
; 1806 .IF/MODEL.B
; 1807 -LOCAL AC ADDR=57 ;VMA18-31 =0 ON LOCAL REF IN SEC >1
; 1808 .ENDIF/MODEL.B
; 1809 ; 60-77 DECODED ON (CON2)
; 1810 FETCH=60 ;VMA FETCH (LAST CYCLE WAS A FETCH)
; 1811 KERNEL=61 ;PC IS IN KERNEL MODE
; 1812 USER=62 ;PC IS IN USER MODE
; 1813 PUBLIC=63 ;PC IS PUBLIC (INCLUDING SUPER)
; 1814 RPW REF=64 ;MIDDLE OF READ-PAUSE-WRITE CYCLE
; 1815 PI CYCLE=65 ;PI CYCLE IN PROGRESS
; 1816 -EBUS GRANT=66 ;PI HASN'T RELEASED BUS FOR CPU USE
; 1817 -EBUS XFER=67 ;NO TRANSFER RECIEVED FROM DEVICE
; 1818 INTRPT=70 ;AN INTERRUPT REQUEST WAITING FOR SERVICE
; 1819 -START=71 ;NO CONTINUE BUTTON
; 1820 RUN=72 ;PROCESSOR NOT HALTED
; 1821 IO LEGAL=73 ;KERNEL, PI CYCLE, USER IOT, OR DEVICE .GE. 740
; 1822 P!S XCT=74 ;PXCT OR SXCT
; 1823 .IF/MODEL.B
; 1824 -VMA SEC0=75 ;VMA SECTION NUMBER (13-17) IS NOT ZERO
; 1825 .ENDIF/MODEL.B
; 1826 AC REF=76,,1 ;VMA .LT.20 ON READ OR WRITE
; 1827 -MTR REQ=77 ;INTERRUPT REQUEST NOT DUE TO METER
; 1828
; KL10 Microcode for TOPS-10 and TOPS-20 24 July 1985 V2(411) MICRO %34(270) Page 11
; DEFINE.MIC[10,5351] 19:52 24-Jul-85 CONTROL RAM DEFINITIONS -- SKIP/COND SPECIAL FUNCTIONS
; 1829 ;SKIP/COND FIELD CONTINUED
; 1830
; 1831 COND/=<60:65>D,0 ;NON-SKIP SPECIAL FUNCTIONS
; 1832 ;0-7 DECODED ON (CTL2)
; 1833 ; NOP=0 ;BY DEFAULT
; 1834 LD AR0-8=1
; 1835 LD AR9-17=2 ;Gates VMAX into ARMM (see VMA4)
; 1836 LD AR18-35=3
; 1837 AR CLR=4
; 1838 ARX CLR=5
; 1839 ARL IND=6 ;CONTROL AR LEFT, CALL, AND CLEAR BITS FROM #
; 1840 REG CTL=7 ;CONTROL AR LOAD, EXP TST, AND MQ FROM #
; 1841 ; 10-37 DECODED ON (CON1)
; 1842 FM WRITE=10 ;WRITE AR INTO CURRENTLY ADDRESSED FM LOC
; 1843 PCF_#=11 ;SET PC FLAGS FROM # FIELD
; 1844 FE SHRT=12 ;SHIFT FE RIGHT 1
; 1845 AD FLAGS=13 ;SET PC CRY0, CRY1, OVRFLO, TRAP1 AS APPROPRIATE
; 1846 LOAD IR=14 ;LATCH AD OR CACHE DATA INTO IR, load PXCT bits
; 1847 SPEC INSTR=15 ;SET/CLR SXCT, PXCT, PICYC, TRAP INSTR FLAGS
; 1848 SR_#=16 ;CONTROL FOR STATE REGISTER and PXCT bits (CON3, MCL4)
; 1849 SEL VMA=17 ;READ VMA THROUGH ADA/PC
; 1850 DIAG FUNC=20 ;SELECT DIAGNOSTIC INFO ONTO EBUS
; 1851 EBOX STATE=21 ;SET STATE FLOPS
; 1852 EBUS CTL=22 ;I/O FUNCTIONS
; 1853 MBOX CTL=23
; 1854 ; SPARE=24
; 1855 .IF/MODEL.B
; 1856 LONG EN=25 ;THIS WORD CAN BE INTERPRETED AS LONG INDIRECT
; 1857 .ENDIF/MODEL.B
; 1858 ; SPARE=26
; 1859 ; SPARE=27
; 1860 VMA_#=30
; 1861 VMA_#+TRAP=31
; 1862 VMA_#+MODE=32
; 1863 VMA_#+AR32-35=33
; 1864 VMA_#+PI*2=34
; 1865 VMA DEC=35 ;VMA_VMA-1
; 1866 VMA INC=36 ;VMA_VMA+1
; 1867 LD VMA HELD=37 ;HOLD VMA ON SIDE
;;1868 .IFNOT/MODEL.B
;;1869 U66/=<66:66>D,0 ;BIT 66 UNUSED
; 1870 .IF/MODEL.B
; 1871 CALL/=<66:66>D,0 ;CALL FUNCTION
; 1872 CALL=1 ;GOOD TO 15 LEVELS IN MODEL B
; 1873 .ENDIF/MODEL.B
; 1874
; KL10 Microcode for TOPS-10 and TOPS-20 24 July 1985 V2(411) MICRO %34(270) Page 12
; DEFINE.MIC[10,5351] 19:52 24-Jul-85 CONTROL RAM DEFINITIONS -- DISP/SPEC SPECIAL FUNCTIONS
; 1875 .TOC "CONTROL RAM DEFINITIONS -- DISP/SPEC SPECIAL FUNCTIONS"
; 1876
; 1877 DISP/=<67:71>D,10 ;0-7 AND 30-37 ARE DISPATCHES (CRA1&CRA2)
; 1878 DIAG=0
; 1879 DRAM J=1
; 1880 DRAM A RD=2 ;IMPLIES INH CRY18
; 1881 RETURN=3 ;POPJ RETURN
; 1882 PG FAIL=4 ;PAGE FAIL TYPE DISP
; 1883 SR=5 ;16 WAYS ON STATE REGISTER
; 1884 NICOND=6 ;NEXT INSTRUCTION CONDITION (see NEXT for detail)
; 1885 SH0-3=7,,1 ;[337] 16 WAYS ON HIGH-ORDER BITS OF SHIFTER
; 1886 MUL=30 ;FE0*4 + MQ34*2 + MQ35; implies MQ SHIFT, AD LONG
; 1887 DIV=31,,1 ;FE0*4 + BR0*2 + AD CRY0; implies MQ SHIFT, AD LONG
; 1888 SIGNS=32,1 ;ARX0*8 + AR0*4 + BR0*2 + AD0
; 1889 DRAM B=33 ;8 WAYS ON DRAM B FIELD
; 1890 BYTE=34,,1 ;FPD*4 + AR12*2 + SCAD0
; 1891 NORM=35,2 ;See normalization for details. Implies AD LONG
; 1892 EA MOD=36 ;(ARX0 or -LONG EN)*8 + -(LONG EN and ARX1)*4 +
; 1893 ;ARX13*2 + (ARX2-5) or (ARX14-17) non zero; enable
; 1894 ;is (ARX0 or -LONG EN) for second case. If ARX18
; 1895 ;is 0, clear AR left; otherwise, poke ARL select
; 1896 ;to set bit 2 (usually gates AD left into ARL)
;;1897 .IFNOT/MODEL.B
;;1898 EA TYPE=37
; 1899 .ENDIF/MODEL.B
; 1900
; 1901 SPEC/=<67:71>D,10 ;NON-DISPATCH SPECIAL FUNCTIONS (CTL1)
; 1902 ; NOP=10 ;DEFAULT
; 1903 INH CRY18=11
; 1904 MQ SHIFT=12 ;ENABLE MQ*2, MQ SHRT2
; 1905 SCM ALT=13 ;ENABLE FE, ARSHIFT
; 1906 CLR FPD=14
; 1907 LOAD PC=15
; 1908 XCRY AR0=16 ;CARRY INTO AD IS XOR'D WITH AR00
; 1909 GEN CRY18=17
;;1910 .IFNOT/MODEL.B
;;1911 SEC HOLD=20 ;INHIBIT LOADING VMAX
;;1912 CALL=21 ;MAX DEPTH 4, INCLUDING PAGE REFILL
; 1913 .IF/MODEL.B
; 1914 STACK UPDATE=20 ;CONTROL CRY18 IF LOCAL STACK
; 1915 .ENDIF/MODEL.B
; 1916 ARL IND=22 ;# SPECIFIES ARL MIX, ENABLES, & CALL
; 1917 MTR CTL=23 ;# CONTROLS METERS
; 1918 FLAG CTL=24 ;FUNCTION ENCODED IN # FIELD
; 1919 SAVE FLAGS=25 ;TELLS PI CYCLE TO HOLD INTRPT
; 1920 SP MEM CYCLE=26 ;MEM REQUEST IS MODIFIED BY #
; 1921 AD LONG=27 ;AD BECOMES 72 BIT ALU
; 1922
; 1923 U73/=<72:73>D,0 ;BITS 72-73 UNUSED
; 1924
; 1925 MARK/=<74:74>D,0 ;FIELD SERVICE "MARK" BIT
; 1926
; KL10 Microcode for TOPS-10 and TOPS-20 24 July 1985 V2(411) MICRO %34(270) Page 13
; DEFINE.MIC[10,5351] 19:52 24-Jul-85 CONTROL RAM DEFINITIONS -- MAGIC NUMBER FIELD
; 1927 .TOC "CONTROL RAM DEFINITIONS -- MAGIC NUMBER FIELD"
; 1928
; 1929 #/=<75:83>D,0 ;THE INFAMOUS "MAGIC NUMBERS"
; 1930
; 1931 MAJVER/=<75:80> ;[356] Major version number
; 1932 MINVER/=<81:83> ;[356] Minor version number
; 1933
; 1934 ;THE OPTIONS DESIGNATE CERTAIN ASSEMBLIES FROM THE SAME
; 1935 ;MICROCODE SOURCES
; 1936 ;# BIT 0 INDICATES KLPAGING
; 1937 ;# BIT 1 INDICATES EXTENDED ADDRESSING
; 1938 ;# BIT 2 INDICATES NONSTANDARD MICROCODE
; 1939 ;# BIT 3 INDICATES A CPU WITH THE PV KIT. (MODEL B)
; 1940 ;# BIT 8 INDICATES INSTRUCTION STATISTICS GATHERING
; 1941 ; (I.E. TRACKS)
; 1942 ;EACH OPTION BIT IS GIVEN A SEPARATE FIELD DEFINITION
; 1943
; 1944 KLPAGE/=<75:75> ;KLPAGING
; 1945 .IF/KLPAGE
; 1946 OPTIONS=1
;;1947 .IFNOT/KLPAGE
;;1948 OPTIONS=0
; 1949 .ENDIF/KLPAGE
; 1950
; 1951 LONGPC/=<76:76> ;LONG PC FORMAT AS IN EXTENDED ADDRESSING
; 1952 .IF/LONG.PC ; THIS IS A SLIGHTLY BASTARDIZED FORMAT IN
; 1953 OPTIONS=1 ; MODEL A MACHINES DUE TO SPACE LIMITATIONS
;;1954 .IFNOT/LONG.PC
;;1955 OPTIONS=0
; 1956 .ENDIF/LONG.PC
; 1957
; 1958 NONSTD/=<77:77> ;NONSTANDARD MICROCODE (EG DIAGNOSTIC MICROCODE)
;;1959 .IF/NONSTD
;;1960 OPTIONS=1
; 1961 .IFNOT/NONSTD
; 1962 OPTIONS=0
; 1963 .ENDIF/NONSTD
; 1964
; 1965 PV/=<78:78> ;MODEL B - PV CPU
; 1966 .IF/MODEL.B
; 1967 OPTIONS=1
;;1968 .IFNOT/MODEL.B
;;1969 OPTIONS=0
; 1970 .ENDIF/MODEL.B
; 1971
; 1972 ISTAT/=<83:83> ;STATISTICS GATHERING CODE (IE TRACKS)
;;1973 .IF/INSTR.STAT
;;1974 OPTIONS=1
; 1975 .IFNOT/INSTR.STAT
; 1976 OPTIONS=0
; 1977 .ENDIF/INSTR.STAT
; 1978
; 1979 ACB/=<77:79> ;AC block number. Used with FMADR/#B#
; 1980 PAGB=6 ;AC block used for KL paging registers
; 1981 MICROB=7 ;AC block for general microcode scratch
; 1982
; KL10 Microcode for TOPS-10 and TOPS-20 24 July 1985 V2(411) MICRO %34(270) Page 13-1
; DEFINE.MIC[10,5351] 19:52 24-Jul-85 CONTROL RAM DEFINITIONS -- MAGIC NUMBER FIELD
; 1983 AC#/=<80:83> ;AC number used with ACB or AC-OP (below)
; 1984
; 1985 .IF/MODEL.B
; 1986 PXCT/=<75:77> ;(MCL4) Loaded by CON/SR_#, CON/LOAD IR, and MEM/A RD
; 1987 ;Bit 0 enables the VMAX to not come from the AD when
; 1988 ; VMA/AD (allowing local AC refs, for example). Bits
; 1989 ; 1 and 2 select which PXCT bits a memory reference
; 1990 ; will select for possible previous context.
; 1991 ;
; 1992 ; WARNING !!! BECAUSE OF A TIMING PROBLEM IN THE HARDWARE ALL AC-OPS
; 1993 ; MUST HAVE THE NUMBER FIELD THE SAME IN THE PREVIOUS
; 1994 ; MICROINSTRUCTION. THE SYMPTOM WILL BE GARBAGE WRITTEN IN A
; 1995 ; DIFFERENT AC AS THE ADDRESS LINES DON'T MAKE IT IN TIME
; 1996 ; FOR THE WRITE PULSE.
; 1997 ;
; 1998 AC-OP/=<75:79> ;CONTROLS OPERATION ON AC AND AC#
; 1999 AC+#=6
; 2000 #=32 ;JUST AC#
; 2001 OR=33 ;AC <OR> AC#
; 2002 ;ALL AD/ FUNCTIONS <40 WORK
; 2003 .ENDIF/MODEL.B
; 2004
; KL10 Microcode for TOPS-10 and TOPS-20 24 July 1985 V2(411) MICRO %34(270) Page 14
; DEFINE.MIC[10,5351] 19:52 24-Jul-85 CONTROL RAM DEFINITIONS -- MAGIC NUMBER FIELD
; 2005 ;VARIOUS SPECIAL FUNCTIONS ENABLE SPECIAL DECODING OF THE
; 2006 ; "MAGIC #" FIELD, AS FOLLOWS:
; 2007
; 2008 ;SPECIAL DATA PATH CONTROLS
; 2009
;;2010 .IFNOT/MODEL.B
;;2011 CALL/=<75:75> ;ENABLED BY ARL IND (CTL2)
;;2012 CALL=1
; 2013 .ENDIF/MODEL.B
; 2014 AR0-8/=<76:76> ;ENABLED BY ARL IND (CTL2)
; 2015 LOAD=1
; 2016 CLR/=<77:80> ;ENABLED BY ARL IND (CTL2)
; 2017 MQ=10
; 2018 ARX=4
; 2019 ARL=2
; 2020 ARR=1
; 2021 AR=3
; 2022 AR+ARX=7
; 2023 AR+MQ=13
; 2024 ARX+MQ=14
; 2025 AR+ARX+MQ=17
; 2026 ARL+ARX=6
; 2027 ARL+ARX+MQ=16
; 2028 ARR+MQ=11
; 2029 ARL/=<81:83> ;ENABLED BY ARL IND (CTL2)
; 2030 ARL=0
; 2031 ARMM=0 ;REQUIRES SPECIAL FUNCTION
; 2032 CACHE=1 ;ORDINARILY SELECTED BY HWARE
; 2033 AD=2
; 2034 EBUS=3
; 2035 SH=4
; 2036 AD*2=5
; 2037 ADX=6
; 2038 AD*.25=7
; 2039 AR CTL/=<75:77> ;ENABLED BY COND/REG CTL (CTL2)
; 2040 AR0-8 LOAD=4
; 2041 AR9-17 LOAD=2 ;Gates VMAX into ARMM (see VMA4)
; 2042 ARR LOAD=1
; 2043 ARL LOAD=6
; 2044 EXP TST/=<80:80> ;ENABLED BY COND/REG CTL (CTL1)
; 2045 AR_EXP=1
; 2046 MQ CTL/=<82:83> ;ENABLED BY COND/REG CTL (CTL2)
; 2047 ; MQ=0 ;WITH MQ/MQ SEL
; 2048 MQ*2=1 ;WITH MQ/MQ SEL--Low bit is ADX0
; 2049 ; MQ*.5=2 ; " (DROPS BITS 0,6,12,18,24,30)
; 2050 0S=3 ; "
; 2051 SH=0 ;WITH MQ/MQM SEL
; 2052 MQ*.25=1 ;WITH MQ/MQM SEL--High bits are ADX34, ADX35
; 2053 1S=2 ; "
; 2054 AD=3 ; "
; 2055
; KL10 Microcode for TOPS-10 and TOPS-20 24 July 1985 V2(411) MICRO %34(270) Page 15
; DEFINE.MIC[10,5351] 19:52 24-Jul-85 CONTROL RAM DEFINITIONS -- MAGIC NUMBER FIELD
; 2056 ;SPECIAL CONTROL OF EBOX FLAGS & FUNCTIONS
; 2057
; 2058 PC FLAGS/=<75:83> ;ENABLED BY COND/PCF_# (SCD4)
; 2059 AROV=420 ;SET ARITH OVFLO & TRAP1
; 2060 FLOV=620 ;SAME, PLUS FLOATING OVFLO
; 2061 FPD=100 ;SET FIRST PART DONE
; 2062 TRAP2=40 ;SET TRAP2 (PDL OVFLO)
; 2063 TRAP1=20 ;SET TRAP1 (ARITH OVFLO)
; 2064 FXU=630 ;FLOV + EXP UNDERFLOW
; 2065 DIV CHK=424 ;NO DIVIDE + AROV
; 2066 FDV CHK=624 ;FLOATING NO DIVIDE
; 2067 FLAG CTL/=<75:83> ;ENABLED BY SPEC/FLAG CTL (SCD5)
; 2068 RSTR FLAGS=420 ;AS IN JRSTF
; 2069 JFCL=602 ;FORCE PC 00 = AROV
; 2070 JFCL+LD=622 ;SECOND PART OF JFCL -- CLEAR TESTED FLAGS
; 2071 DISMISS=502 ;CLEAR PI CYCLE IF SET (CON5)
; 2072 ; ELSE DISMISS HIGHEST PI HOLD
; 2073 DISMISS+LD=522 ;LOAD FLAGS AND DISMISS
; 2074 HALT=442 ;STOP PROCESSOR IF LEGAL (CON2)
; 2075 SET FLAGS=20 ;AS IN MUUO
; 2076 PORTAL=412 ;CLEAR PUBLIC IF PRIVATE INSTR
; 2077 SPEC INSTR/=<75:83> ;ENABLED BY COND/SPEC INSTR
; 2078 SET PI CYCLE=714; (CON5)
; 2079 KERNEL CYCLE=200;MAKE IO LEGAL, EXEC ADDR SPACE (CON4)
; 2080 INH PC+1=100 ;TO MAKE JSR WORK IN TRAP, INTRPT (CON4)
; 2081 SXCT=40 ;START SECTION XCT (MCL4)
; 2082 PXCT=20 ;START PREV CONTXT XCT (MCL4)
; 2083 INTRPT INH=10 ;INHIBIT INTERRUPTS (CON4)
; 2084 INSTR ABORT=4 ; (CON2)
; 2085 HALTED=302 ;TELL CONSOLE WE'RE HALTED (CON4)
; 2086 CONS XCT=310 ;FLAGS FOR INSTR XCT'D FROM CONSOLE
; 2087 CONT=0 ;RESTORE NORMAL STATE FOR CONTINUE
; 2088 FETCH/=<75:83> ;ENABLED BY MEM/FETCH
; 2089 UNCOND=400
; 2090 ;LOW 2 BITS DECODED ON (IR3)
; 2091 COMP=201,2 ;DEPENDING ON AD AND DRAM B
; 2092 SKIP=202,2
; 2093 TEST=203,1
; 2094 JUMP=502,2 ;AS IN JUMPX, ON AD AND DRAM B
; 2095 JFCL=503,1 ;JUMP ON TEST CONDITION
; 2096
; KL10 Microcode for TOPS-10 and TOPS-20 24 July 1985 V2(411) MICRO %34(270) Page 16
; DEFINE.MIC[10,5351] 19:52 24-Jul-85 CONTROL RAM DEFINITIONS -- MAGIC NUMBER FIELD
; 2097 ;SPECIAL MEMORY REQUEST FUNCTIONS
; 2098
; 2099 .IF/MODEL.B
; 2100 EA CALC/=<75:83> ;SPECIFIC CONTROLS FOR MEM/EA CALC
; 2101 ; LOAD AR=400
; 2102 ; LOAD ARX=200
; 2103 ; PAUSE=100 ;Freeze memory--always use with 040
; 2104 ; WRITE=040 ;SET VMA WRITE
; 2105 ; PREV EN=20 ;PREV CONTXT SELECTED BY SR AND PXCT
; 2106 ; INDIRECT=10 ;PREV CONTXT FOR EA CALC
; 2107 ; EA=2 ;RESTORATION OF ORIGINAL EA CONDITIONS
; 2108 ; STACK=1 ;PREV CONTXT SELECTED BY PXCT B12
; 2109 .IF/XADDR ;JUST TO ARX FOR EXTENDED ADDRESSING
; 2110 A IND=230 ;INDIRECT AT FIRST EA CALC TIME
;;2111 .IFNOT/XADDR ;TO BOTH AR AND ARX AS IN MODEL A
;;2112 A IND=630 ;INDIRECT AT FIRST EA CALC TIME
; 2113 .ENDIF/XADDR
; 2114 BYTE LD=420 ;Read byte data to AR only [337]
; 2115 BYTE RD=620 ;READ BYTE DATA TO AR & ARX
; 2116 BYTE RD PC=621 ;READ BYTE DATA TO AR & ARX WITH PC SECTION
; 2117 BYTE RPW=760 ;Read byte data to AR, ARX, write test, pause [312]
; 2118 BYTE IND=610 ;INDIRECT AT BYTE EA CALC TIME
; 2119 PUSH=041 ;STORE TO STACK
; 2120 POP AR=421 ;READ FROM STACK TO AR
; 2121 POP ARX=221 ;READ FROM STACK TO ARX
; 2122 POP AR-ARX=621 ;POP TO BOTH
; 2123 WRITE(E)=042
; 2124 LD AR(EA)=402 ;LOAD AR GLOBAL/LOCAL AS IN EA
; 2125 LD AR+WR=440 ;LOAD AR, TEST WRITABILITY
; 2126 LD ARX+WR=240 ;LOAD ARX, TEST WRITABILITY
; 2127 .ENDIF/MODEL.B
; 2128
; 2129 SP MEM/=<75:83> ;ENABLED BY SPEC/SP MEM CYCLE
; 2130 FETCH=400 ;LOAD IR WHEN DATA ARRIVES (MCL5)
; 2131 USER=200 ;FORCE USER OR UPT (MCL2)
; 2132 EXEC=100 ;FORCE EXEC OR EPT (MCL3)
; 2133 SEC 0=40 ;CLEAR VMAX (MCL4)
; 2134 UPT EN=20 ;UPT IF USER EN (MCL3)
; 2135 EPT EN=10 ;EPT IF NOT USER EN (MCL3)
; 2136 CACHE INH=2 ; (MCL6)
; 2137 UNCSH+UNPAGE=103;UNCACHED AND UNPAGED
; 2138 UNPAGED+CACHED=101 ;physical reference with cache enabled.
;;2139 .IFNOT/MULTI
;;2140 UNPAGED=101 ; (MCL6)
;;2141 EPT=111
;;2142 EPT CACHE=111 ;[260]
;;2143 EPT FETCH=511
;;2144 UPT=221
;;2145 UPT FETCH=621
;;2146 PT=31
;;2147 PT FETCH=431
; 2148 .IF/MULTI
; 2149 UNPAGED=103 ; (MCL6)
; 2150 EPT=113
; 2151 EPT CACHE=111 ;[260]
; 2152 EPT FETCH=513
; KL10 Microcode for TOPS-10 and TOPS-20 24 July 1985 V2(411) MICRO %34(270) Page 16-1
; DEFINE.MIC[10,5351] 19:52 24-Jul-85 CONTROL RAM DEFINITIONS -- MAGIC NUMBER FIELD
; 2153 UPT=223
; 2154 UPT FETCH=623
; 2155 PT=33
; 2156 PT FETCH=433
; 2157 .ENDIF/MULTI
; 2158
; KL10 Microcode for TOPS-10 and TOPS-20 24 July 1985 V2(411) MICRO %34(270) Page 17
; DEFINE.MIC[10,5351] 19:52 24-Jul-85 CONTROL RAM DEFINITIONS -- MAGIC NUMBER FIELD
; 2159 ;MBOX CONTROLS
; 2160
; 2161 MREG FNC/=<75:83> ;ENABLED BY MEM/REG FUNC (APR6)
; 2162 SBUS DIAG=407 ;PERFORM SBUS DIAGNOSTIC CYCLE
; 2163 READ UBR=502 ;ASK MBOX TO LOAD UBR INTO EBUS REG
; 2164 READ EBR=503 ;PUT EBR INTO EBUS REG
; 2165 READ ERA=504
; 2166 WR REFILL RAM=505 ;DISGUISED AS A "READ REG" FUNCTION
; 2167 .IF/MODEL.B ;THIS GOT CHANGED IN THE GENERAL SPEEDUP (APR6)
; 2168 LOAD CCA=606 ;START A SWEEP
;;2169 .IFNOT/MODEL.B ;HERE IS WHAT IT USED TO BE
;;2170 LOAD CCA=601 ;START A SWEEP
; 2171 .ENDIF/MODEL.B
; 2172 LOAD UBR=602 ;SETUP UBR FROM VMA
; 2173 LOAD EBR=603 ;SETUP EBR FROM VMA
; 2174 MAP=140 ;GET PHYS ADDR CORRESPONDING TO VMA (MCL6)
; 2175 MBOX CTL/=<75:83> ;ENABLED BY COND/MBOX CTL (APR5)
; 2176 SET PAGE FAIL=200
; 2177 SET IO PF ERR=100
; 2178 CLR PT LINE(NK)=61,,1;[333] Clear valid if no Keep bit set
; 2179 PT DIR CLR(NK)=41;Enable clear of PT DIR for non keep entries
; 2180 CLR PT LINE=31,,1;CLEAR VALID FOR 4 ENTRIES (new pager board) [342]
; 2181 PT DIR WR=20,1 ;WRITE PAGE TABLE DIRECTORY
; 2182 PT WR=10,1 ;WRITE PAGE TABLE ENTRY SELECTED BY VMA
; 2183 PT DIR CLR=1 ;SELECT FOR CLEARING PT DIR (PAG3)
; 2184 NORMAL=0 ;RESET PT WR SELECTION
; 2185 MTR CTL/=<81:83> ;FUNCTION DECODING FOR METERS (MTR3)
; 2186 CLR TIME=0 ; USUALLY USED WITH DIAG FUNC
; 2187 CLR PERF=1
; 2188 CLR E CNT=2
; 2189 CLR M CNT=3
; 2190 LD PA LH=4
; 2191 LD PA RH=5
; 2192 CONO MTR=6
; 2193 CONO TIM=7
; 2194
; KL10 Microcode for TOPS-10 and TOPS-20 24 July 1985 V2(411) MICRO %34(270) Page 18
; DEFINE.MIC[10,5351] 19:52 24-Jul-85 CONTROL RAM DEFINITIONS -- MAGIC NUMBER FIELD
; 2195 ;I/O FUNCTIONS
; 2196
; 2197 EBUS CTL/=<75:83> ;ENABLED BY COND/EBUS CTL (APR3)
; 2198 GRAB EEBUS=400 ;"EBUS RETURN" TAKES ECL EBUS FOR EBOX
; 2199 REQ EBUS=200
; 2200 REL EBUS=100 ; (CON3)
; 2201 EBUS DEMAND=60 ;ASSERT DEMAND, KEEP CS, FUNC
; 2202 EBUS NODEMAND=20;DROP DEMAND, KEEP CS, FUNC
; 2203 ; CTL_IR=10 ;SELECT F01 & F02 FROM IR
; 2204 ; DISABLE CS=4 ;TURN OFF CONTROLLER SELECT
; 2205 ; DATAIO=2 ;0 FOR CONI/O
; 2206 ; INPUT=1 ;0 FOR OUTPUT
; 2207 IO INIT=30 ;ENABLE IR3-9 TO EBUS CONTROLLER SELECT,
; 2208 ; IR10-12 (DECODED) TO FUNCTION
; 2209 ; AND AR ONTO EBUS IF FUNCTION IS OUTPUT
; 2210 DATAO=26 ;0'S TO CS, DATAO TO FCN, AND AR TO EBUS
; 2211 DATAI=27 ;0'S TO CS, DATAI TO FCN
; 2212 REL EEBUS=0 ;LEGGO
; 2213 DIAG FUNC/=<75:83> ;ENABLED BY COND/DIAG FUNC (CTL3)
; 2214 .5 USEC=400,3 ;STRETCH CLOCK TO LET EBUS SETTLE (CON?)
; 2215 LD PA LEFT=404,3 ;LH PERF ANAL CONTROLS FROM RH (MTR)
; 2216 LD PA RIGHT=405,3 ;RH PA CONTROLS FROM RH (MTR)
; 2217 CONO MTR=406,3 ;ACCOUNTING CONTROLS (MTR)
; 2218 CONO TIM=407,3 ;INTERVAL TIMER CONTROLS (MTR)
; 2219 CONO APR=414,3 ; (CON3)
; 2220 CONO PI=415,3 ; (CON3)
; 2221 CONO PAG=416,3 ;CACHE & PAGING CTL (CON3)
; 2222 DATAO APR=417,3 ;ADDRESS BREAK (CON3)
; 2223 DATAO PAG=620,3 ;AC BLOCKS & PREV CONTXT (CON3)
; 2224 LD AC BLKS=425,3 ;FORCE LOADING AC BLOCKS
; 2225 LD PCS+CWSX=426,3 ;FORCE LOADING PREV CONTXT SEC, CWSX
; 2226 CONI PI(R)=500,3 ;PI HOLD & ACTIVE TO LH (PI)
; 2227 CONI PI(L)=501,3 ;PI GEN TO LH (PI)
; 2228 CONI APR(R)=51