.TITLE KMCMAC - KMC11-B MACRO DEFINITIONS PREFIX FILE .IDENT /V2.0/ ; ; COPYRIGHT (C) 1978 ; DIGITAL EQUIPMENT CORPORATION, MAYNARD, MASS. ; ; THIS SOFTWARE IS FURNISHED UNDER A LICENSE FOR USE ONLY ON A ; SINGLE COMPUTER SYSTEM AND MAY BE COPIED ONLY WITH THE ; INCLUSION OF THE ABOVE COPYRIGHT NOTICE. THIS SOFTWARE, OR ; ANY OTHER COPIES THEREOF, MAY NOT BE PROVIDED OR OTHERWISE ; MADE AVAILABLE TO ANY OTHER PERSON EXCEPT FOR USE ON SUCH ; SYSTEM AND TO ONE WHO AGREES TO THESE LICENSE TERMS. TITLE ; TO AND OWNERSHIP OF THE SOFTWARE SHALL AT ALL TIMES REMAIN ; IN DEC. ; ; THE INFORMATION IN THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT ; NOTICE AND SHOULD NOT BE CONSTRUED AS A COMMITMENT BY DIGITAL ; EQUIPMENT CORPORATION. ; ; DEC ASSUMES NO RESPONSIBILITY FOR THE USE OR RELIABILITY OF ; ITS SOFTWARE ON EQUIPMENT WHICH IS NOT SUPPLIED BY DEC. ; ; DATE: 14-FEB-78 ; ; VERSION: 2 KMC11-B ; ; DISTRIBUTED SYSTEMS SOFTWARE ENGINEERING ; ; LAST MODIFICATION: ; 8-MAR-78 FIX TYPO'S AND 4K CALL ; .NLIST .SBTTL MICROPROCESSOR REGISTER DEFINITIONS ; ; INBUS* ASSIGNMENTS ; INCON= 0!120000 ;IN CONTROL CSR MAIN= 20!120000 ;MAINTAINANCE REGISTER OCON= 40!120000 ;OUT CONTROL CSR LINENM= 60!120000 ;LINE NUMBER PORT1= 100!120000 ;CSR 4 PORT2= 120!120000 ;CSR 5 PORT3= 140!120000 ;CSR 6 PORT4= 160!120000 ;CSR 7 NPR= 200!120000 ;NPR CONTROL REGISTER UBBR= 220!120000 ;MISC CONTROL REGISTER PCLOW= 240!120000 ;PC LATCH REGISTER LOW BYTE PCHGH= 260!120000 ;PC LATCH REGISTER HIGH 4 BITS MARL= 300!120000 ;MAR LATCH REGISTER LOW BYTE MARH= 320!120000 ;MAR LATCH REGISTER HIGH 5 BITS BSEL0= 0!120000 ;BSEL0 BSEL1= 20!120000 ;BSEL1 BSEL2= 40!120000 ;BSEL2 BSEL3= 60!120000 ;BSEL3 BSEL4= 100!120000 ;BSEL4 BSEL5= 120!120000 ;BSEL5 BSEL6= 140!120000 ;BSEL6 BSEL7= 160!120000 ;BSEL7 ; INBUS ASSIGNMENTS INDAT1= 0!20000 ;INPUT DATA LOW BYTE INDAT2= 20!20000 ;INPUT DATA HIGH BYTE IODAT1= 40!20000 ;OUTPUT DATA LOW BYTE IODAT2= 60!20000 ;OUTPUT DATA HIGH BYTE IIBA1= 100!20000 ;INPUT BA LOW BYTE IIBA2= 120!20000 ;INPUT BA HIGH BYTE IOBA1= 140!20000 ;OUTPUT BA LOW BYTE IOBA2= 160!20000 ;OUTPUT BA HIGH BYTE XREG0= 200!20000 ;EXTERNAL DEVICE REGISTER 0 XREG1= 220!20000 ;EXTERNAL DEVICE REGISTER 1 XREG2= 240!20000 ;EXTERNAL DEVICE REGISTER 2 XREG3= 260!20000 ;EXTERNAL DEVICE REGISTER 3 XREG4= 300!20000 ;EXTERNAL DEVICE REGISTER 4 XREG5= 320!20000 ;EXTERNAL DEVICE REGISTER 5 XREG6= 340!20000 ;EXTERNAL DEVICE REGISTER 6 XREG7= 360!20000 ;EXTERNAL DEVICE REGISTER 7 ; OUTBUS* ASSIGNMENTS OINCON= 0!1000 ;IN CONTROL CSR OMAIN= 1!1000 ;MAINTAINTANCE REGISTER OOCON= 2!1000 ;OUT CONTROL CSR OLINEN= 3!1000 ;LINE NUMBER OPORT1= 4!1000 ;CSR 4 OPORT2= 5!1000 ;CSR 5 OPORT3= 6!1000 ;CSR 6 OPORT4= 7!1000 ;CSR 7 ONPR= 10!1000 ;NPR CONTROL OBR= 11!1000 ;MISC CONTROL OPCLOW= 12!1000 ;PC LATCH LOW BYTE OPCHGH= 13!1000 ;PC LATCH HIGH OMARL= 14!1000 ;MAR LATCH LOW OMARH= 15!1000 ;MAR LATCH HIGH OBSEL0= 0!1000 ;BSEL0 OBSEL1= 1!1000 ;BSEL1 OBSEL2= 2!1000 ;BSEL2 OBSEL3= 3!1000 ;BSEL3 OBSEL4= 4!1000 ;BSEL4 OBSEL5= 5!1000 ;BSEL5 OBSEL6= 6!1000 ;BSEL6 OBSEL7= 7!1000 ;BSEL7 ; OUTBUS ASSIGNMENTS OIDAT1= 0!2000 ;INPUT DATA LOW BYTE OIDAT2= 1!2000 ;INPUT DATA HIGH BYTE OUTDA1= 2!2000 ;OUTPUT DATA LOW BYTE OUTDA2= 3!2000 ;OUTPUT DATA HIGH BYTE IBA1= 4!2000 ;INPUT BA LOW BYTE IBA2= 5!2000 ;INPUT BA HIGH BYTE OBA1= 6!2000 ;OUTPUT BA LOW BYTE OBA2= 7!2000 ;OUTPUT BA HIGH BYTE OXREG0= 10!2000 ;EXTERNAL DEVICE REGISTER 0 OXREG1= 11!2000 ;EXTERNAL DEVICE REGISTER 1 OXREG2= 12!2000 ;EXTERNAL DEVICE REGISTER 2 OXREG3= 13!2000 ;EXTERNAL DEVICE REGISTER 3 OXREG4= 14!2000 ;EXTERNAL DEVICE REGISTER 4 OXREG5= 15!2000 ;EXTERNAL DEVICE REGISTER 5 OXREG6= 16!2000 ;EXTERNAL DEVICE REGISTER 6 OXREG7= 17!2000 ;EXTERNAL DEVICE REGISTER 7 ; ALU FUNCTIONS ADD= 0 ;ADD A+B ADDC= 20 ;ADD WITH CARRY -> A+B+C SUBC= 40 ;SUBTRACT WITH CARRY -> A-B-C INCA= 60!BR ;INCREMENT A -> A+1 (DEFAULT SOURCE IS BRG) APLUSC= 100!BR ;A PLUS CARRY -> A+C TWOA= 120!BR ;A PLUS A -> A+A TWOAC= 140!BR ;2*A PLUS CARRY -> A+A+C DECA= 160!BR ;DECREMENT A -> A-1 SELA= 200!BR ;SELECT A SELB= 220 ;SELECT B AORNB= 240 ;A OR NOT B -> A!-B AANDB= 260 ;A AND B -> A&B AORB= 300 ;A OR B -> A!B AXORB= 320 ;A XOR B SUB= 340 ;SUBTRACT -> A-B SUBOC= 360 ;SUBTRACT ONE'S COMPLEMENT -> A-B-1 ; SCRATCH PAD DEFINITIONS SP0=0 SP1=1 SP2=2 SP3=3 SP4=4 SP5=5 SP6=6 SP7=7 SP10=10 SP11=11 SP12=12 SP13=13 SP14=14 SP15=15 SP16=16 SP17=17 ; INSTRUCTION PAGE DEFINITIONS P0=0*4000 ;PAGE 0 P1=1*4000 ;PAGE 1 P2=2*4000 ;PAGE 2 P3=3*4000 ;PAGE 3 ; NPR BIT DEFINITIONS DATI=1 ;WORD INPUT NPR DATIH=3 ;WORD INPUT NPR WITH BUS HOLD DATO=21 ;WORD OUTPUT NPR DATOH=23 ;WORD OUTPUT NPR WITH BUS HOLD DATOB=221 ;BYTE OUTPUT NPR DATOBH=223 ;BYTE OUTPUT NPR WITH BUS HOLD .SBTTL MICRO-INSTRUCTION FIELD DEFINITIONS ; SOURCE FIELDS IMM=0 ;IMMEDIATE IBUS=20000 ;INPUT BUS MEMX=40000 ;MEMORY BR=60000 ;BRG ; DESTINATION FIELDS WRTEBR=400 ;WRITE THE BRG WROUTX=1000 ;EXTENDED OUTPUT BUS SHFTBR=1400 ;SHIFT THE BRG WROUT=2000 ;OUTPUT BUS WRMEM=2400 ;MEMORY SPX=3000 ;SCRATCH PAD SPBRX=3400 ;SRATCH PAD AND BRG ; JUMP CONDITIONS BRECON=0 ;JUMP EXTENDED ALCOND=400 ;JUMP ALWAYS CCOND=1000 ;JUMP IF ALU CARRY = 1 ZCOND=1400 ;JUMP IF ALU ZERO = 1 BR0CON=2000 ;JUMP IF BRG BIT 0 = 1 BR1CON=2400 ;JUMP IF BRG BIT 1 = 1 BR4CON=3000 ;JUMP IF BRG BIT 4 = 1 BR7CON=3400 ;JUMP IF BRG BIT 7 = 1 ; MAR FIELDS LDMAPG=4000 ;LOAD THE 4 MOST SIGNIFICANT BITS OF MAR LDMAR=10000 ;LOAD THE 8 LEAST SIGNIFICANT BITS OF MAR INCMAR=14000 ;INCREMENT MAR ; MEMI=MEMX!INCMAR ;READ FROM MEMORY AND INCREMENT THE MAR .SBTTL MICRO INSTRUCTION DEFINITIONS .SBTTL BRANCH INSTRUCTIONS ; JUMP=100000 ;JUMP OP CODE ; ; .MACRO BREXT ADDRES ;JUMP ALWAYS EXTENDED > .ENDM ; .MACRO ALWAYS ADDRES ;JUMP ALWAYS !> .ENDM ; .MACRO BR0 ADDRES ;JUMP IF BR0 SET !> .ENDM ; .MACRO BR1 ADDRES ;JUMP IF BR1 SET !> .ENDM ; .MACRO BR4 ADDRES ;JUMP IF BR4 SET !> .ENDM ; .MACRO BR7 ADDRES ;JUMP IF BR7 SET !> .ENDM ; .MACRO Z ADDRES ;JUMP IF Z BIT SET !> .ENDM ; .MACRO C ADDRES ;JUMP IF C BIT SET !> .ENDM .SBTTL INDEXED BRANCH INSTRUCTIONS ; ; ! [IBUS,] ADRI ! ; . !--! [SRC,] FUNC [,SPN] !-- ,PN ; ! IMM, DATA ! ; ; NOTE: BREXT DOES NOT USE THE PAGE FIELD ; .MACRO .BREXT SRC,FUNC,SPLOC ;INDEXED JUMP ALWAYS EXTENDED .IF NB,SPLOC .MEXIT .ENDC .ENDM ; .MACRO .ALWAY SRC,FUNC,SPLOC,OPARG1 ;INDEXED JUMP ALWAYS .IF NB,OPARG1 .MEXIT .ENDC .IF NB,SPLOC .MEXIT .ENDC .ENDM ; .MACRO .BR0 SRC,FUNC,SPLOC,OPARG1 ;INDEXED JUMP ON BR0 SET .IF NB,OPARG1 .MEXIT .ENDC .IF NB,SPLOC .MEXIT .ENDC .ENDM ; .MACRO .BR1 SRC,FUNC,SPLOC,OPARG1 ;INDEXED JUMP ON BR1 SET .IF NB,OPARG1 .MEXIT .ENDC .IF NB,SPLOC .MEXIT .ENDC .ENDM ; .MACRO .BR4 SRC,FUNC,SPLOC,OPARG1 ;INDEXED JUMP ON BR4 SET .IF NB,OPARG1 .MEXIT .ENDC .IF NB,SPLOC .MEXIT .ENDC .ENDM ; .MACRO .BR7 SRC,FUNC,SPLOC,OPARG1 ;INDEXED JUMP ON BR7 SET .IF NB,OPARG1 .MEXIT .ENDC .IF NB,SPLOC .MEXIT .ENDC .ENDM ; .MACRO .Z SRC,FUNC,SPLOC,OPARG1 ;INDEXED JUMP ON Z BIT SET .IF NB,OPARG1 .MEXIT .ENDC .IF NB,SPLOC .MEXIT .ENDC .ENDM ; .MACRO .C SRC,FUNC,SPLOC,OPARG1 ;INDEXED JUMP ON C BIT SET .IF NB,OPARG1 .MEXIT .ENDC .IF NB,SPLOC .MEXIT .ENDC .ENDM .SBTTL MOVE INSTRUCTIONS ; MOVE=0 ;MOVE OPCODE ; ; B SIDE DESTINATION GROUP ; NODST ! ! [IBUS,] ADRI ! ; BRWRTE !--! [SRC,] FUNC [,SPN] !--[,MAR] ; BRSHFT ! ! IMM,DATA ! ; MEM ! ; ; NOTE: NODST AND BRSHFT HAVE ZERO OPERAND FORMS EQUIVALENT TO IMM,0 ; .MACRO NODST SRC,FUNC,SPADDR,OPARG1 ;NO DESTINATION .IF NB,OPARG1 .MEXIT .ENDC .IF NB,SPADDR .IIF IDN,SRC,IMM,!SPADDR> .IIF DIF,SRC,IMM, .MEXIT .ENDC .IF NB,FUNC .IIF IDN,SRC,IMM,> .IIF DIF,SRC,IMM, .MEXIT .ENDC .IF NB,SRC .MEXIT .ENDC <0> .ENDM ; .MACRO BRWRTE SRC,DATA,OPARG1,OPARG2 ;MOVE TO BR .IF NB,OPARG2 .MEXIT .ENDC .IF NB,OPARG1 .IIF IDN,SRC,IMM,!OPARG1> .IIF DIF,SRC,IMM, .MEXIT .ENDC .IIF IDN,SRC,IMM,> .IIF DIF,SRC,IMM, .ENDM ; .MACRO BRSHFT SRC,DATA,OPARG1,OPARG2 ;BR SHIFT RIGHT .IF NB,OPARG2 .MEXIT .ENDC .IF NB,OPARG1 .IIF IDN,SRC,IMM,!OPARG1> .IIF DIF,SRC,IMM, .MEXIT .ENDC .IF NB,DATA .IIF IDN,SRC,IMM,> .IIF DIF,SRC,IMM, .MEXIT .ENDC .IF NB,SRC .MEXIT .ENDC .ENDM ; .MACRO MEM SRC,DATA,OPARG1,OPARG2 ;MOVE TO MEMORY .IF NB,OPARG2 .MEXIT .ENDC .IF NB,OPARG1 .IIF IDN,SRC,IMM,!OPARG1> .IIF DIF,SRC,IMM, .MEXIT .ENDC .IIF IDN,SRC,IMM,> .IIF DIF,SRC,IMM, .ENDM ; ; SP DESTINATION GROUP ; SP ! ! [IBUS,] ADRI ! ; SPBR !--! [SRC,] FUNC !--,SPN [,MAR] ; ! IMM, DATA ! ; .MACRO SP SRC,FUNC,SPLOC,OPARG1 ;LOAD SCRATCH-PAD .IF IDN,SRC,IMM .IIF NE,-SPLOC .ERROR ;ILLEGAL USE OF IMMEDIATE MODE .ENDC .IF NB,OPARG1 .IIF IDN,SRC,IMM,!SPLOC!OPARG1> .IIF DIF,SRC,IMM, .MEXIT .ENDC .IF NB,SPLOC .IIF IDN,SRC,IMM,!SPLOC> .IIF DIF,SRC,IMM, .MEXIT .ENDC .ENDM ; .MACRO SPBR SRC,FUNC,SPLOC,OPARG1 ;LOAD SP AND BR .IF IDN,SRC,IMM .IIF NE,-SPLOC .ERROR ;ILLEGAL USE OF IMMEDIATE MODE .ENDC .IF NB,OPARG1 .IIF IDN,SRC,IMM,!SPLOC!OPARG1> .IIF DIF,SRC,IMM, .MEXIT .ENDC .IF NB,SPLOC .IIF IDN,SRC,IMM,!SPLOC> .IIF DIF,SRC,IMM, .MEXIT .ENDC .ENDM ; ; OUTBUS/OUTBUS* DESTINATION ; ! [IBUS,] ADRI ! ; OUT !--! [SRC,] FUNC !--,ADRO [,MAR] ; ! IMM, DATA ! ; .MACRO OUT SRC,DATA,ADRO,OPARG1 ;WRITE TO OUTBUS/OUTBUS* .IF IDN,SRC,IMM .IIF NE,- .ERROR ;ILLEGAL USE OF IMMEDIATE MODE .ENDC .IF NB,OPARG1 .IIF IDN,SRC,IMM,!ADRO!OPARG1> .IIF DIF,SRC,IMM, .MEXIT .ENDC .IF NB,ADRO .IIF IDN,SRC,IMM,!ADRO> .IIF DIF,SRC,IMM, .MEXIT .ENDC .ENDM ; .MACRO OUTPUT SRC,DATA,ADRO,OPARG1 ;WRITE TO OUTBUS/OUTBUS* .IF IDN,SRC,IMM .IIF NE,- .ERROR ;ILLEGAL USE OF IMMEDIATE MODE .ENDC .IF NB,OPARG1 .IIF IDN,SRC,IMM,!ADRO!OPARG1> .IIF DIF,SRC,IMM, .MEXIT .ENDC .IF NB,ADRO .IIF IDN,SRC,IMM,!ADRO> .IIF DIF,SRC,IMM, .MEXIT .ENDC .ENDM ; ; IMPLICIT MAR FUNCTION GROUP ; MEMINC ! ! [IBUS,] ADRI ; LDMA !--! [SRC,] FUNC [,SPN] ; LDMAP ! ! IMM, DATA ; .MACRO MEMINC SRC,DATA,OPARG1 ;MOVE TO MEM, INCR MAR .IF NB,OPARG1 .MEXIT .ENDC .IIF IDN,SRC,IMM,> .IIF DIF,SRC,IMM, .ENDM ; .MACRO LDMA SRC,DATA,OPARG1 ;LOAD MEMORY ADDRESS REG .IF NB,OPARG1 .MEXIT .ENDC .IIF IDN,SRC,IMM,> .IIF DIF,SRC,IMM, .ENDM ; .MACRO LDMAP SRC,DATA,OPARG1 ;LOAD MEMORY PAGE NUMBER .IF NB,OPARG1 .MEXIT .ENDC .IIF IDN,SRC,IMM,> .IIF DIF,SRC,IMM, .ENDM ; ; GET ADDRESS GROUP ; BRADDR ! ; BRADRE !--! LABEL [,MAR] ; MEMADR ! ; MEMADE ! ; ; .MACRO BRADDR ADDRES,OPARG1 ;PUT ADDR (1 BYTE) IN BR .IF NB,OPARG1 !OPARG1> .IFF > .ENDC .ENDM ; .MACRO BRADRE ADDRES,OPARG1 ;PUT EXT ADDRES (UPPER 4 BITS) IN BR .IF NB,OPARG1 !OPARG1> .IFF > .ENDC .ENDM ; .MACRO MEMADR ADDRES,OPARG1 ;WRITE ADDRESS TO MEMORY .IF NB,OPARG1 !OPARG1> .IFF > .ENDC .ENDM ; .MACRO MEMADE ADDRES,OPARG1 ;WRITE EXTENDED ADDRESS TO MEMORY .IF NB,OPARG1 !OPARG1> .IFF > .ENDC .ENDM ; ; ; OTHER MISC HANDY COMBINATIONS ; ; .MACRO COMP SRC,SPADDR ;COMPARE SOURCE AND SP .ENDM ; .MACRO JMPEXT ADDRES ;LOAD PC PAGE AND BRANCH EXTENDED BRADRE ADDRES OUT BR,SELB,OPCHGH BREXT ADDRES .ENDM ; .MACRO INCMA ;INCREMENT THE MAR .ENDM ; .MACRO BROTAT ;BR ROTATE .ENDM ; .MACRO RSTATE ADDRES ;UPDATE RECIEVER STATE MEMADR ADDRES .ENDM ; ; SUBROUTINE CALLS ; .MACRO CALLSB REG,ADDRES,BRGVAL ;SUBROUTINE CALL DISP=<.-START>/2&377 .IF B BRGVAL BRWRTE IMM,DISP+3 .IFF BRWRTE IMM,DISP+4 .ENDC SP BR,SELB,REG .IIF NB,BRGVAL,BRWRTE IMM,BRGVAL ALWAYS ADDRES .ENDM ; ; .MACRO CALLSR REG,ADDRES,RADDR,BRGVAL ;SUBROUTINE CALL WITH SPECIAL RETURN ADDRESS BRADDR RADDR SP BR,SELB,REG .IIF NB,BRGVAL,BRWRTE IMM,BRGVAL ALWAYS ADDRES .ENDM ; ; .MACRO RTNSUB REG,PAGE ;SUBROUTINE RETURN .ALWAY SELA,REG,PAGE .ENDM ; ; 4K SUBROUTINE CALL ; NOTE: TWO (2)!!! SP'S ARE USED IN THIS CALL (IE. REG,REG+1) ; .MACRO CALLEX REG,ADDRES,BRGVAL ;SUBRTN CALL ACROSS 4K DISP=<.-START>/2+6 .IIF NB,BRGVAL,DISP=DISP+1 RPAGE=DISP/400&17 SPAGE=/1000&17 .IIF NE,-,DISP=DISP+2 BRWRTE IMM, SP BR,SELB,REG BRWRTE IMM, SP BR,SELB,REG'+1 .IF EQ,- .IIF NB,BRGVAL,BRWRTE IMM,BRGVAL ALWAYS ADDRES .IFF BRWRTE IMM,SPAGE OUT BR,SELB,OPCHGH .IIF NB,BRGVAL,BRWRTE IMM,BRGVAL BREXT ADDRES .ENDC .ENDM ; ; .MACRO CALREX REG,ADDRES,RADDR,BRGVAL ;CALL W/RETURN ADR EXTENDED BRADRE RADDR SP BR,SELB,REG BRADDR RADDR SP BR,SELB,REG'+1 .IF EQ,<<.-START>&6000>-<&6000> .IIF NB,BRGVAL,BRWRTE IMM,BRGVAL ALWAYS ADDRES .IFF BRADRP ADDRES OUT BR,SELB,OPCHGH .IIF NB,BRGVAL,BRWRTE IMM,BRGVAL BREXT ADDRES .ENDC .ENDM ; ; .MACRO RTNEX REG ;4K CALL RETURN BRWRTE SELA,REG OUT BR,SELB,OPCHGH .BREXT SELA,REG'+1 .ENDM ; .LIST START: .PAGE