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Trailing-Edge - PDP-10 Archives - BB-FI04A-DD_1986 - 6,10/switch.hlp
There are 5 other files named switch.hlp in the archive. Click here to see a list.
	DGKBD & DGKBE SINGLE-PULSE THRU MEMORY REFERENCES.  SINCE
THE DMA20 PERMITS THIS OPERATION ONLY IN ONE-BUS MODE, THE MEMORY
MUST BE PROPERLY SET-UP FOR THIS MODE OF OPERATION. SWITCHES NEED
NOT BE CHANGED ON AN ME-10 OR MF-10.   FOR AN MG-10 OR MH-10, THE
MEMORY RESPONDING TO THE LOWEST ADDRESSES MUST BE SET AS FOLLOWS:

	1)  ONLY ONE PORT SELECTION SWITCH SHOULD BE SET FOR THIS
	    PROCESSOR.

	2)  INLV/NORM 34 & 35 SWITCHES MUST BE DOWN.

CAREFULLY NOTE THE POSITION OF THE SWITCHES BEFORE ALTERING THEIR
SETTINGS, SINCE THEY MUST BE RESTORED TO THEIR PREVIOUS POSITIONS
FOR NORMAL OPERATION.