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rsx20f-swskit/documentation/klerr-changes.mem
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| d i g i t a l | I n t e r o f f i c e M e m o r a n d u m
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Subj: KLERR changes for KL Mini RAMP Project
This document describes the final changes that were made to KLERR
for the KL mini RAMP project. This version of KLERR is 2-06 and is
available with RSX-20F Version 13-26.
1.0 INTRODUCTION
As part of the KL mini RAMP project KLERR was modified to make it a
more useful tool in diagnosing KL10 hardware related problems.
Included in these modifications are:
1. Stop KL10 clock
2. Display DTE registers
3. Display EBUS parity error information
4. Display "good word" of EBUS parity errors
2.0 STOP KL10 CLOCK
On start-up KLERR will no longer attempt to force the KL10 into the
microcode halt-loop but will instead turn off the KL10 clock to
stop the machine and get it into a known state. This change was
requested by Field Service because they feel that forcing the KL10
into the halt-loop corrupts the state of the machine. As a result
of this forcing the snapshot gives an inaccurate description of the
machine at the time it crashed.
3.0 DISPLAY DTE REGISTERS
When KLERR is invoked it will produce on the CTY a dump of the
contents of the DTE-20 registers at the time of the crash. The
type out is in order from the first register to the 16th and each
has the following format:
name: oooooo
symbolic decoding
In the above description "name" is the symbolic name of the
particular register being typed out and "oooooo" is the octal
representation of the contents of the 16 bit register. The
symbolic decoding is only done for the KL10 data words, address
words, diagnostic word 1, status word, and diagnostic word 3.
For a complete description of the DTE-20 device including its
register content meanings on reads and writes consult the DTE-20
TEN-ELEVEN INTERFACE UNIT DESCRIPTION.
3.1 KL10 DATA WORDS - DEXWD3,DEXWD2,DEXWD1
The data words are converted into a 36 bit quantity and then typed
out in octal as two 18 bit quantities. The 36 bit quantity is
formed by concatonating DEXWD1 bits 0-3 (KL10 bits 0-3) with DEXWD2
bits 0-16 (KL10 bits 4-19) and DEXWD3 bits 0-16 (KL10 bits 20-35).
DEXWD1 bits 4-15 must be zero, if they aren't a message is typed.
3.2 KL10 ADDRESS WORDS - TENAD1,TENAD2
TENAD1 and TENAD2 are decoded to determine what addressing space is
being referenced (TENAD1 bits 13-15), whether a deposit or examine
is being done (TENAD1 bit 12), if protection and relocation is
enabled (TENAD1 bit 11), and what KL10 location is being addressed.
TENAD1 bit 6 is the KL10 address indirect bit, TENAD1 bits 2-5
specify the index register, and TENAD1 bits 0-1 (high order KL10
address bits) concatonated with TENAD2 bits 0-16 (low order KL10
address bits) make up the KL10 18 bit address. TENAD1 bits 7-10
must be zero, if they are not a message is typed.
3.3 DIAGNOSTICS Word 1 - DIAG1
Only the following conditions are decoded from the value of DIAG1:
KL clock error stop (bit 11), KL in run mode (bit 10), KL in halt
loop (bit 9), major state is deposit/examine (bit 8), major state
is TO-10 transfer (bit 7), major state is TO-11 transfer (bit 6),
and if the DTE is in 10/11 diagnostic mode (bit 5).
3.4 STATUS WORD - STATUS
Decoded from the STATUS word is the following status information:
TO-10 transfer normal termination (bit 15), 10 requested 11
interrupt (bit 11), 11 requests 10 interrupt (bit 8), TO-11
transfer done (bit 7), TO-11 transfer stopped because of receiving
a null (bit 5), attached PDP-11 is in restricted mode (bit 3), the
last deposit/examine is done (bit 2), and interrupts are on (bit
0).
Also decoded from the STATUS word are the following error
conditions: TO-10 error termination (bit 13), 11 memory parity
error (bit 9), EBUS parity error (bit 4), and TO-11 byte error
termination (bit 1).
For the purposes of diagnostics the following bits are decoded:
RAM is zeros (bit 12), DEX word 1 (bit 10), and E buffer select
(bit 6).
Of all the STATUS word bits only bit 14 is unused, if it is set a
message is typed.
3.5 DIAGNOSTICS WORD 3 - DIAG3
The only information decoded from DIAG3 is whether an NPR unibus
parity error (bit 1) condition has occured.
4.0 DISPLAY EBUS PARITY ERROR AND "GOOD WORD" INFORMATION
When an EBUS parity error occurs the Front End will attempt to get
the "good word" out of the DTE. This is accomplished by retrying
the operation that failed and then requesting KLERR to run. When
KLERR runs it will type out the contents of the DTE registers at
the time of the error and if the retry succeeded it would type out
the contents of the DTE registers after the retry. The first type
out would contain the failing operation and the second would
contain the "good word".
5.0 SAMPLE KLERR OUTPUT
KLERR -- VERSION V02-06 RUNNING
DLYCNT: 037777
DEXWD3: 000000
DEXWD2: 000000
DEXWD1: 000000
KL10 DATA=000000,,000000
TENAD1: 104000 TENAD2: 000000
ADDRESS SPACE=PHYSICAL
OPERATION=EXAMINE
PROTECTION-RELOCATION IS OFF
KL10 ADDRESS=000000
TO10BC: 010000 TO11BC: 130000
TO10AD: 071330 TO11AD: 071356
TO10DT: 000000 TO11DT: 005000
DIAG1 : 001400
KL IN HALT LOOP
MAJOR STATE IS DEPOSIT-EXAMINE
DIAG2 : 040000
STATUS: 002504
DEX WORD 1
11 REQUESTED 10 INTERRUPT
E BUFFER SELECT
DEPOSIT-EXAMINE DONE
DIAG3 : 004000
KLERR -- KL IN HALT LOOP
KLERR -- KL ERROR OTHER THAN CLOCK ERROR STOP
KLERR -- KL VMA: 000000 005202 PC: 000000 005202
KLERR -- PI STATE: OFF , PI ON: 177 , PI HLD: 020 , PI GEN: 000
KLERR -- EXIT FROM KLERR