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Trailing-Edge - PDP-10 Archives - decus_20tap2_198111 - decus/20-0027/rm08.mac
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TITLE	RM08 SERIAL MAGNETIC DRUM SYSTEM
SUBTTL	DON WITCRAFT	4-14-66


IFN DRM08,<PASS2
	END>

,DRUM REACHES ORIGIN WHEN REM(TIME/4*17300) IS MINIMUM.
,AT THAT TIME WORDS BEGIN TRANSFERRING AT A RATE OF 1 EVERY
,4*132 QUARTER MICROSECONDS VIA DATA BREAK.

;DRUM DATA BLOCK

ENTRY DMDATA,DICDATA,DOCDATA

DMDATA:	EXP	^D4*132
	Z
	XWD	DACTIV,0
	EXP	DRMXFR
DICDAT:	EXP	17
	SIXBIT	/DRM/
	Z
	Z
	EXP	DRMENT
	Z
	Z
	Z
	Z
	EXP	DRCOML

DOCDAT:	EXP	17
	SIXBIT	/DRM/
	Z
	Z
	EXP	DRMENT
	Z
	Z
	Z
	Z
	EXP	DRCOML

;DRUM CONTROL REGISTERS

INTERNAL DCL,DFB

DCL:	0	;A 15-BIT REGISTER WHICH ADDRESSES THE NEXT
		;CORE MEMORY LOC. TO OR FROM WHICH A WORD IS TO
		;BE TRANSFERRED.  AS A WORD IS TRANSFERRED, DCL
		;IS INCREMENTED BY ONE.
DAR:	0	;AN 11-BIT REGISTER WHICH ADDRESSES THE DRUM TRACK
		;AND SECTOR WHICH IS CURRENTLY TRANSFERRING DATA.
		;THE 8 MOST SIGNIFICANT BITS SELECT TRACK, 
		;3 LEAST SIGNIFICANT BITS SELECT SECTOR.  AT THE
		;COMPLETION OF A SUCCESSFUL SECTOR TRANSFER (ERROR
		;FLAG IS 0) DAR IS INCREMENTED BY ONE.
DFB:	0	;DRUM FINAL BUFFER - 12 BITS.
;DRUM INSTRUCTIONS

INTERNAL DRCR,DRCW,DRCF,DREF,DRTS,DRCN,DRSE,DRSC

DRCR:	TRO	FLAGS,DRRC	;LOAD DRUM CORE LOC. COUNTER AND READ
	TRZ	FLAGS,DRWC
	JRST	DRCW1

DRCW:	TRO	FLAGS,DRWC		;LOAD DRUM CORE LOC. COUNTER AND WRITE.
	TRZ	FLAGS,DRRC
DRCW1:	MOVEM	AC,DCL
	TRZ	AC,7777		;CLEAR AC
	POPJ	PDP,

DRCF:	TRZ	FLAGS,DRCFLG+DREFLG	;0=>COMPLETION FLAG
	POPJ	PDP,		;0=>ERROR FLAG

DREF:	TRZ	AC,600000	;PARITY ERROR=>AC0
	TRNE	FLAGS,DRMPER
	TRO	AC,4000
	TRNE	FLAGS,DRMDTE
	TRO 	AC,2000
	POPJ	PDP,

DRTS:	MOVE	AC0,AC		;AC1-11=>DAR
	ANDI	AC0,3777
	MOVEM	AC0,DAR
	TRZ	AC,7777		;CLEAR AC
DRCN:	TLO	FLAGS,DACTIV	;START TRANSFER
	PUSHJ	PDP,DRMSTR	;START DRUM TRANSFER.
	JRST	DRCF

DRSE:	TRNN	FLAGS,DREFLG	;IF ERROR FLAG=0,PC+1=>PC
	AOS	PC
	POPJ	PDP,

DRSC:	TRNE	FLAGS,DRCFLG	;IF COMPLETION FLAG=0,PC+1=>PC.
	AOS	PC
	POPJ	PDP,
;DRUM SIMULATION

;DRUM IS A DUMP FILE ON DECTAPE OR DISK
;SECTORS ARE VERTICALLY STORED THREE TO A BLOCK, IE THE FIRST
;SECTOR IN THE BLOCK OCCUPIES BITS 0-11, THE SECOND SECTOR
;OCCUPIES BITS 12-23 AND THE THIRD SECTOR OCCUPIES BITS 24-35.
;THE DRUM ADDRESS SPECIFIED BY DAR CORRESPONDS TO BLOCK
;DBLK+[(DAR)/3], SECTOR REM((DAR)/3), WHERE DBLK IS THE
;FIRST BLOCK NUMBER OF FILE DRUM.

DRMENT:	SIXBIT /DRUM/		;DRUM FILE ENTRY.
	SIXBIT /DMP/
	0
DRCOML:	IOWD 200,DBUF		;DUMP FILE COMMAND LIST
	0
SECTOR:	POINT 12,0,11		;SECTOR POINTERS
	POINT 12,0,23
	POINT 12,0,35
DBUF:	BLOCK	200	;DRUM BUFFER
;INITIALIZE DRUM BUFFERS

;CLEAR DRUM FILE
;CALLED FROM CONSOLE BY DRMCLR$G

DRMEND=<DSIZE+1>/3


INTERNAL DRMCLR,EFLG9,EFLG10,DMOUT0
EXTERNAL CONSOLE,ERROR,FOUT,FRELEA

DRMCLR:	MOVE AC0,[XWD DBUF,DBUF+1]	;CLEAR DRUM BUFFER
		SETZM DBUF
	BLT AC0,DBUF+177
	MOVEI	FDB,DICDAT
	JSP	SRR,FRELEA		;RELEASE DRUM TO FORCE LOOKUP
DRMCL1:	PUSHJ PDP,DMOUT
	HRRZ	AC0,CDBLOCK(FDB)
	HRRZ	AC1,DRMENT+1
	SUB	AC0,AC1
	CAIGE	AC0,DRMEND
	JRST	DRMCL1
	JSP	SRR,FRELEA
	PUSHJ	PDP,CONSOLE



;WRITE DRUM BUFFER

;CALL	PUSHJ PDP,DMOUT

EXTERNAL FCLOSE

DMOUT0:	MOVEI	FDB,DICDAT	;OUTPUT INCORE BLOCK
	HRR	AC0,CDBLOCK(FDB)
	MOVEI	FDB,DOCDAT
	HRLZM	AC0,CDBLOCK(FDB)
	MOVSI	AC0,ENTRB		;BYPASS ENTER
	ORM	AC0,CFSTAT(FDB)

DMOUT:	MOVEI	FDB,DOCDAT
	JSP	SRR,FOUT
DMCK:	HRRZ	AC0,CFSTAT(FDB)
	TRNE	AC0,-1			;SIMULATOR ERROR?
	PUSHJ	PDP,ERROR		;YES
EFLG9:	MOVE	AC0,CDSTAT(FDB)
	TRNE	AC0,ERRORS-IODERR	;SIMULATOR ERROR?
	PUSHJ 	PDP,ERROR		;YES
EFLG10:	POPJ	PDP,
;START DRUM TRANSFER

EXTERNAL TIME

DRMSTR:	MOVEI	FDB,DMDATA		;SET LATENCY.
	MOVE	AC0,TIME
	IDIVI	AC0,DRMROT*4
	MOVEM	AC0,DTIME(FDB)
	TLO	FLAGS,DACTIV+DRMLAT	;ACTIVATE DRUM
	SETZM	DFB			;CLEAR DFB
	MOVEI	FDB,DICDAT		;HAS DRUM BEEN INITED?
	MOVE	AC0,CFSTAT(FDB)
	TLNN	AC0,INITB
DRMST1:	PUSHJ	PDP,DMIN		;NO. READ FIRST BLOCK TO INITIALIZE
	MOVE	AC2,DAR			;GET DECTAPE BLOCK FOR THIS REFERENCE
	IDIVI	AC2,3
	HRRZ	AC0,DRMENT+1
	ADD	AC2,AC0			;RELATIVIZE TO START OF FILE
	HRRZ	AC0,CDBLOCK(FDB)	;BLOCK IN DBUF?
	CAMN	AC0,AC2
	POPJ	PDP,			;YES
	HRLM	AC2,CDBLOCK(FDB)	;NO. READ NEW BLOCK INTO DBUF
	JRST	DRMST1

DMIN:	JSP	SRR,FIN
	JRST	DMCK

;TRANSFER DRUM WORD

INTERNAL DRMXFR
EXTERNAL FIN,FCLOSE


DRMXFR:	MOVEI	FDB,DMDATA
	MOVE	AC0,DRATE(FDB)	;RESET TIME
	MOVEM	AC0,DTIME(FDB)
	MOVE	AC2,DAR	;AC2:=DECTAPE BLOCK ADDRESS
	IDIVI	AC2,3		;AC3:=SECTOR
	HRRZ	AC0,DRMENT+1
	ADD	AC2,AC0		;RELATIVIZE TO START OF FILE
	TLZN	FLAGS,DRMLAT	;JUST FINISHED LATENCY?
	JRST	DRMXF2		;NO
	HRRI	AC0,DBUF	;SETUP SECTOR BASE ADDRESS
	HRRM	AC0,SECTOR(AC3)
	TRNN	FLAGS,DRWC		;WRITE?
	JRST	DRMXF2		;NO. READ.
	TRO	FLAGS,BRQFLG	;YES. REQUEST BREAK.
	POPJ	PDP,
DRMXF2:	HRRZ	AC0,SECTOR(AC3)	;DONE?
	CAIL	AC0,DBUF+200
	JRST	DRMDON		;YES.
	TRNN	FLAGS,DRWC	;NO. WRITING?
	JRST	DRMXF3		;NO.
	TLZN	FLAGS,DFBCHG	;YES. IS DFB READY?
	TRO	FLAGS,DREFLG+DRMDTE	;NO. TIMING ERROR.
	MOVE	AC0,DFB
	DPB	AC0,SECTOR(AC3)	;WRITE WORD.
	AOS	DCL			;INCREMENT MEMORY ADDRESS
DRMXF4:	AOS	SECTOR(AC3)		;INCREMENT SECTOR POINTK	4>
LINES
;DISPATCH TO LTC AT END OF BAUD TIME

INTERNAL LTC
EXTERNAL SREAD,SWRITE

LTC:	MOVE AC3,LFLAG(DDB)
	SKIPN	AC2,LOASS(DDB)		;IS OUTPUT IN PROGRESS?
	JRST	LTC2			;NO
LTC1:	LSH	AC2,1		;YES, SHIFT LOASS LEFT ONE.
	TLOE	AC3,LBIT		;ASSEMBLE LBIT IN LOASS
	TRO	AC2,1
	MOVEM	AC2,LOASS(DDB)
	TLZ	AC3,LRWB+LWB
	MOVEM	AC3,LFLAG(DDB)
	CAIGE	AC2,(AC3)		;FULL CHARACTER?
	POPJ	PDP,		;NO

;OUTPUT A CHARACTER

LTC4:	ANDCAM	AC3,AC2		;YES. REMOVE STOP/START BITS
	SETZM	LOASS(DDB)		;CLEAR LOASS
	LSH	AC2,-1			;RIGHT JUSTIFY CHARACTER
	ADDI	DDB,LOCDAT		;OUTPUT FILE DATA BLOCK ADR
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8*D1 DF32 disk
PLOTTER

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#0
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	SOURCE 
FLAGS	
PC  AC    MAMBDMA   
MQIRSR  RUNNING TIME  SECONDS


	SIMULATED RUNTIME   ,25,5,75CYCLING IN MEMORYEAE INSTRUCTION(*lUNRECOGNIZABLE IOTROTATE BOTH RIGHT AND LEFT?EFLG3x*rEFLG4x*sEFLG5x*tEFLG6x*uEFLG7P*vEND OF FILE ON PTREXITIOINI*zPDP8 HALTEDUNRECOGNIZABLE EXIT	PC 	CFSTAT 	CDSTAT 

BREAK POINTx+EH?
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