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Trailing-Edge - PDP-10 Archives - -
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/THE SLOW ONE
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	PMODE
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	EJECT
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	DEFINE	FETCH X<
	JMS	FETCHM
	X>
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	DEFINE	MEMREF<
	JMS	MEMR>
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	DEFINE	GETD<
	JMS	DGET>
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	DEFINE	GETAC<
	JMS	AGET>
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	DEFINE	PUTAC<
	JMS	APUT>
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	DEFINE	END<
	JMS	EXIT>
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	DEFINE	PUTD<
	JMS	DPUT>
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	EJECT
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	*20
AC,	0
LINK,	0
MA,	0
MB,	0
TEMP,	0
INST,	0
PC,	0
LIOT,	0
LINT,	0
IDLE,	0
MEMORY,	0
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	EJECT
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	*400
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STARTI,	TAD	LIOT
	SZA CLA
	JMP	SNOINT
	TAD	LINT
	SNA
	JMP	SNOINT
	CLA CMA
	TAD	PC
	DCA	PC
	DCA	LINT
	CLA CLL CML RAR
	JMP	SGOTI
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SNOINT,	FETCH	PC
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SGOTI,	DCA	INST
	DCA	LIOT
	TAD	INST
	RTL
	RTL
	AND	(7
	TAD	(JMP I	STABLE
	DCA	.+1
	0
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STABLE,	IAND
	ITAD
	IISZ
	IDCA
	IJMS
	IJMP
	IIOT
	IOPR
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	EJECT
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	*600
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IAND,	MEMREF
	GETD
	GETAC
	AND	MB
	PUTAC
	END
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ITAD,	MEMREF
	GETD
	GETAC
	TAD	MB
	PUTAC
	END
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IISZ,	MEMREF
	GETD
	ISZ	MB
	SKP
	ISZ	PC
	NOP
	PUTD
	END
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IDCA,	MEMREF
	GETAC
	DCA	MB
	PUTAC
	PUTD
	END
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IJMS,	MEMREF
	CLA IAC
	TAD	PC
	DCA	MB
	PUTD
	ISZ	MA
	JMP	IJMP2
	JMP	IJMP2
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IJMP,	MEMREF
IJMP2,	TAD	MA
	DCA	PC
	END
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IIOT,	ISZ	LIOT
	TAD	INST
	TAD	(-6044
	SNA
	JMP	IOUT
	TAD	(6044-6046
	SZA CLA
	JMP	IGN
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IOUT,	GETAC
	TAD	(-311
	SZA CLA
	JMP	.+3
	CLA IAC
	DCA	IDLE
	GETAC
	TAD	(-302
	SNA CLA
	DCA	IDLE
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IGN,	TAD	INST
	DCA	IIOTAC
	GETAC
IIOTAC,	0
	SKP
	ISZ	PC
	NOP
	PUTAC
	END
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IOPR=IGN
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	EJECT
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	*1000
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MEMR,	0
	TAD	INST
	AND	(200
	SZA CLA
	TAD	PC
	AND	(7600
	DCA	MA
	TAD	INST
	AND	(177
	TAD	MA
	DCA	MA
	TAD	INST
	AND	(400
	SNA CLA
	JMP I	MEMR
	TAD	MA
	TAD	(-20
	SMA CLA
	JMP	MOK
	TAD	(-10
	TAD	MA
	SPA CLA
	JMP	MOK
	GETD
	ISZ	MB
	NOP
	PUTD
MOK,	TAD	MB
	DCA	MA
	JMP I	MEMR
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AGET,	0
	TAD	LINK
	CLL RAL
	TAD	AC
	JMP I	AGET
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APUT,	0
	DCA	AC
	RAR
	DCA	LINK
	JMP I	APUT
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	EJECT
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	*1200
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FETCHM,	0
	TAD I	FETCHM
	DCA	MEMORY
	ISZ	FETCHM
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	CDF	10
	TAD I	MEMORY
	CDF	0
	JMP I	FETCHM
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STOREM,	0
	DCA	STEMP
	TAD I	STOREM
	ISZ	STOREM
	DCA	MEMORY
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	CDF	10
	TAD	STEMP
	DCA I	MEMORY
	CDF	0
	JMP I	STOREM
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STEMP,	0
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EXIT,	0
	JMP	STARTI
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DPUT,	0
	TAD	MB
	JMS	STOREM
	MA
	JMP I	DPUT
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DGET,	0
	FETCH	MA
	JMP I	DGET
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	EJECT
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	@