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TITLE EXOSUP - Compiler execute only support code (TOPS-10)
;COPYRIGHT (c) DIGITAL EQUIPMENT CORPORATION 1981, 1987
;ALL RIGHTS RESERVED.
;THIS SOFTWARE IS FURNISHED UNDER A LICENSE AND MAY BE USED AND COPIED
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;INCLUSION OF THE ABOVE COPYRIGHT NOTICE. THIS SOFTWARE OR ANY OTHER
;COPIES THEREOF MAY NOT BE PROVIDED OR OTHERWISE MADE AVAILABLE TO ANY
;OTHER PERSON. NO TITLE TO AND OWNERSHIP OF THE SOFTWARE IS HEREBY
;THE INFORMATION IN THIS SOFTWARE IS SUBJECT TO CHANGE WITHOUT NOTICE
;AND SHOULD NOT BE CONSTRUED AS A COMMITMENT BY DIGITAL EQUIPMENT
;DIGITAL ASSUMES NO RESPONSIBILITY FOR THE USE OR RELIABILITY OF ITS
;SOFTWARE ON EQUIPMENT WHICH IS NOT SUPPLIED BY DIGITAL.
EXOSUV= BYTE (3)0(9)6(6)0(18)^D2 ; Version Date: 26-Aug-81
***** Begin Revision History *****
1 1047 EGM 21-Jan-81 Q10-05323
Create module for TOPS-10 execute only support.
2 1117 EGM 26-Aug-81 --------
Remove restrictions that the high seg startup routine appear first in
the high seg, and the high seg start at 400000. Also allow high seg
exit/re-entry routines to be called with arguments if needed.
***** End Revision History *****
; AC definitions for prolog/epilog.
; Dictated by the BLIS10 module head
; Changes must occur if any of the above change.
; New prologs/epilogs must be added if DREGS increases.
RSVD0==0 ;Reserved register 0
RSVD1==1 ;Reserved register 1
RSVD2==2 ;Reserved register 2
RSVD3==3 ;Reserved register 3
JSPREG==10 ;Temporary register for JSPs
DREG4==11 ;Savable register 4
DREG3==12 ;Savable register 3
DREG2==13 ;Savable register 2
DREG1==14 ;Savable register 1
VREG==15 ;Value register
FREG==16 ;Frame register
SREG==17 ;Stack register
; These prologs/epilogs are used only by the low seg
; and have been created expressly for the ability to run
; the compiler execute only on TOPS-10.
; These routines must reside in the low seg.
; The code has been derived directly from the BLIS10
; prolog/epilog code generated in module GLOBAL.
; Low segment prologs.
FORI.0: PUSH SREG,FREG
FORI.1: PUSH SREG,FREG
FORI.2: PUSH SREG,FREG
FORI.3: PUSH SREG,FREG
FORI.4: PUSH SREG,FREG
; Low segment epilogs.
FORO.4: POP SREG,DREG4
FORO.3: POP SREG,DREG3
FORO.2: POP SREG,DREG2
FORO.1: POP SREG,DREG1
FORO.0: POP SREG,FREG
; The following routines setup the proper PORTALs
; to allow calls into and from the high seg.
; The initial routine (HISEG) must appear at the
; same location in each high seg.
T1==RSVD1 ;Safe register to use for calls/returns
P==SREG ;Common stack pointer
ENTRY HISEG ;Common High seg entry
ENTRY XPHAZCONTROL ;Execute only call to PHAZCONTROL
ENTRY XNXFILG ;Execute only call to NXFILG
EXTERN PHAZCONTROL ;Segment control routine in low seg
EXTERN NXFILG ;Next file spec routine in low seg
INTERN HSGORG ;High seg origin, set by COMMAN
; The following routine is entered via a PUSHJ P,HISEG.
; It uses the 'safe' AC 1, which is of no value between phases.
HISEG: PORTAL .+1 ;Proper high seg entry
MOVE T1,HSGORG ;Get high seg origin
HRRZ T1,.JBHSA##(T1) ;Start address for this segment
JRST @T1 ;And start it
; The following routines allow hi seg exit/re-entry.
; Note that they will work for calls that pass arguments,
; since they effectively leave just one PC on the stack.
; Also note that they are used by all versions of the compiler.
XPHAZC: POP P,SPHAZC ;Save return address
PUSHJ P,PHAZCO ;Call segment control
PORTAL .+1 ;Proper high seg re-entry
PUSH P,SPHAZC ;Restore return address
POPJ P, ;Continue
XNXFIL: POP P,SNXFIL ;Save return address
PUSHJ P,NXFILG ;Call to get next file spec
PORTAL .+1 ;Proper return
PUSH P,SNXFIL ;Restore return address
POPJ P, ;Onward
RELOC ;Back to low seg
HSGORG: 0 ;Origin of high seg
SPHAZC: 0 ;XPHAZCO return PC
SNXFIL: 0 ;XNXFIL return PC