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klad.sources/dskah1.mac
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SUBTTL DIAGNOSTIC SECTION
START: SETZM USER# ;CLEAR USER CONTROL WORD
JSP 0,.+1 ;GET FLAGS
TLNE USERF ;IN USER MODE?
SETOM USER ;YES, SET USER CONTROL WORD
SKIPN MONFLG ;SPECIAL USER MODE?
SETZM USER ;YES, CLEAR USER CONTROL WORD
SKIPN USER
JRST STARTA
SKIPL MONCTL
TTCALL 3,PGMNAM
JRST STARTA
PGMNAM: ASCIZ/
DECSYSTEM-2020 BASIC INSTRUCTION DIAGNOSTIC (8) [DSKAH]
/
;BASIC INSTRUCTION TEST (8)
;THE TEST IS DESIGNED FOR INITIAL DEBUGGING OF
;PROCESSOR HARDWARE AND TO DETECT (SOLID) FAILURES
;IN THE FIELD.
STARTA: JRST .+1
SUBTTL PI/IOT/APR DIAGNOSTIC SECTION
BEGIOT: SETZM USER ;CLEAR USER CONTROL WORD
JSP 0,.+1 ;GET FLAGS
TLNE USERF ;IN USER MODE ?
SETOM USER ;YES, SET USER CONTROL WORD
SKIPN MONFLG ;SPECIAL USER MODE ?
SETZM USER ;YES, CLEAR USER CONTROL WORD
SKIPN USER
JRST IOT0 ;RUN IOT TEST ONLY IN EXEC MODE
JRST BEGEND ;OTHERWISE START OVER
SUBTTL MACRO'S OPDEFS AND SPECIAL FLAG DEFINITIONS
LALL
;OPERATOR DEFINITIONS
OPDEF TRPPI [JSR TRAPPI] ;FILL INTERRUPT LOCATIONS
OPDEF HALTPI [JSR HALTPI] ;FILL INT. LOC. WITH HALTS
OPDEF CLRTRP [JSR TRPCLR] ;CLEAR TRAPS
OPDEF CLRAPR [CONO APR,LIOCLR!LCNXER!LCPAER!LCPWRF!LDNXER!LDPAER!LDPWRF]
OPDEF CLRPI [CONO PI,LRQCLR!PICLR!CHNOFF!PIOFF!177]
;MACROS
DEFINE BLURB <
;LOCATIONS 40-60 CONTAIN A JSR TO A ROUTINE WHICH STORES
;THE CHANNEL NUMBER OF THE INTERRUPT INTO 0
;THEREFORE IF AN INTERRUPT OCCURS THEN LOCATION
;ZERO WILL CONTAIN THE NUMBER OF THE INTERRUPT CHANNEL TRAP ADRESS
>
DEFINE BLURB1 <
;LOCATIONS 40-60 CONTAIN A JSR TO A ROUTINE WHICH EXECUTES A HALT
;POINTING TO THE CHANNEL WHICH CAUSED THE REQUEST.
;OR THE CHANNEL WHICH CAUSED THE INCORRECT INTERRUPT. THE PARTICULAR
;INTERRUPT TRAP ADRESS FOR THE INTERRUPT LEVEL BEING TESTED MAY NOT
;ALWAYS HAVE A JSR TO A HALT IN CASE WE ARE TESTING FOR REAL
;INTERRUPTS ON THAT CHANNEL. IN THIS CASE ONLY THE TRAP FOR THAT
;PARTICULAR CHANNEL WILL BE LEGAL. ALL OTHERS WILL HALT.
>
DEFINE WATINT<
MOVEI 13,1000 ;SET UP LOOP OF TEN TO WAIT FOR INT.
SOJG 13,. ;AND WAIT>
DEFINE STOP2<
HALT .+1 ;HALT IF WE SHOULDN'T BE HERE
JRST .+1 ;WILD TRANSFER CAUSED THIS HALT.>
DEFINE TSET<
%X=. ;DEFINE %X TO SAVE
MOVEI %X ;SAVE THIS PC IN CASE OF WILD TRANSFER
MOVEM TNUMB# ;BECAUSE OF PC MOD OR INTERRUPT>
DEFINE TGET<
MOVE TNUMB ;GET LAST PC STORED AND CHECK TO SEE
CAIE %X ;IF ITS WHERE WE REALLY SHOULD BE
STOP2>
DEFINE TBOTH<
TGET
TSET>
DEFINE PINO (A,%NO)<
;ENABLE THE PI SYSTEM. AND EXPECT NO INTERRUPTS. THEN TEST THAT THE
;HOLD FLOP FOR EACH CHANNEL IS NOT SET.
TSET
%NO: CLRBTH
CONO PI,PION ;ENABLE PI AND ,EXPECT NO INTERRUPTS
WATINT
CONSZ PI,A ;CHECK WHY INT. IN PROGRESS IS SET.
STOP
TGET>
DEFINE PIYES (A,B,%YES)<
;SET REQUESTS FOR EACH CHANNEL BUT DO NOT SET PI ACTIVE.
;INTERRUPTS SHOULD NOT OCCUR, AND THE INTERRUPT IN PROGRESS
;FLAG SHOULD NOT BE SET FOR THE CHANNEL BEING TESTED
TSET
%YES: CLRBTH
CONO PI,REQSET+A ;SET CHANNEL REQUEST BUT NOT ACTIVE
WATINT
CONSZ PI,B ;CHECK WHY INT. IN PROGRESS IS SET.
STOP
TGET>
DEFINE PIHCLR (A,B,%HCLR)<
;CHECK THAT PICLR CLEARS THE HOLD FLOP
TSET
%HCLR: CLRBTH
CONO PI,REQSET+PION+A ;CAUSE INT. TO SET HOLD
WATINT
CONO PI,PICLR ;THEN CLEAR VIA PI RESET
CONSZ PI,B ;HOLD FLOP FAILED TO CLEAR.
STOP
TGET>
DEFINE PIONOF (A,%ONOF)<
;CHECK THAT PICLR CLEARS THE REQUEST FLOP
;AND THAT AN INTERUPT DOES NOT OCCUR
BLURB1
TSET
%ONOF: CLRBTH
CONO PI,REQSET+A ;SET REQ. BUT NOT ACTIVE
SETZ ;THEN CLEAR REQUEST THEN SET ACTIVE
CONO PI,PICLR+A ;PI RESET FAILED TO CLEAR PIR FLAG.
WATINT
SKIPE ;MOVEI EXEC OUT OF INTERRUPT CH.?
STOP
TGET>
DEFINE PIDIS (A,B,%PICHK)<
;CHECK THAT A JEN WILL DISMISS INTERUPTS ON ALL CHANNELS
TSET
%PICHK: MOVE [JSR .+6] ;PUT THE PI TRAP INSTRUCTION
MOVEM A ;INTO A
CONO PI,CHNON+PION+REQSET+B ;TURN ON PI AND REQEST ON CH B
WATINT
JRST .+4
0
CONO PI,CHNON+PION+LRQCLR+B ;TURN OF INTERRUPT REQUEST
JEN @.-2 ;DISMISS THE INTERRUPT
CONSZ PI,77400 ;NO REQUESTS SHOULD BE SET
STOP
TGET
CLRBTH>
DEFINE PITEST (A,%PITST)<
;TEST SETTING OF CHANNEL FLOP
TSET
%PITST: CLRBTH
CONO PI,CHNON+A ;PION FAILED TO SET
CONSO PI,A
STOP
TBOTH
CLRBTH
;TEST CLEARING OF CHANNEL FLOP
CONO PI,CHNON+A ;CHECK PIO CLR
CONO PI,CHNOFF+A ;TURN OFF CHANNELS
CONSZ PI,A ;CHECK WHY FLOP NOT CLEAR
STOP
TBOTH
CLRBTH
;CHECK RESETING OF PI SYSTEM
CONO PI,CHNON+A ;CHECK THAT PI RESET CLEARS
CONO PI,PICLR ;PI SYSTEM
CONSZ PI,A
STOP
TBOTH
CLRBTH
;TEST THAT CONO ONLY SETS PION
CONO PI,CHNON ;TEST PIO SET
CONSZ PI,A ;CHECK WHY CONO SET FLAGS WITHOUT AN IOB BIT
STOP
TBOTH
CLRBTH
;CHECK THAT CONO DOES NOT CLEAR ACTIVE
CONO PI,CHNON+A ;TEST PIO CLR
CONO PI,CHNOFF ;MAYBE RESET OCCURED - BIT SHOULD STILL
CONSO PI,A ;BE SET
STOP
TGET>
DEFINE EXECUT<
;FILL THE INTERRUPT LOCATIONS WITH "MOVEI'S"
MOVE 1,[MOVEI 42] ;STORE A MOVEI IN
MOVEM 1,(1) ;INTO 42-60
CAME 1,[MOVEI 57]
AOJA 1,.-2 ;LOOP>
DEFINE STOP<
HALT .+1 ;INSTRUCTION FAILED REPLACE
JRST .+1 ;WITH JRST BACK>
DEFINE STOP1<
HALT .+1 ;UUO FAILED TO STORE MA BITS
JRST .+1 ;INTO RIGHT HALF OF 40>
DEFINE XUUO (X,Y,%XUO)<
;EXECUTE AN LUUO AND CHECK THAT THE UUO AND PC STORED
;ARE CORRECT.
MLUUO==X ;THE UUO TO BE EXECUTED
TSET
%XUO: MOVE 0,[JSP 1,.+4] ;TRAP INSTRUCTION
MOVEM 0,41 ;IN TO 41
X ;EXECUTE A UUO
HALT .+1 ;UUO DID NOT TRAP TO FORTY
MOVEI 2,.-1 ;GET UUO PC
ANDI 1,-1 ;MASK FLAGS OUT
CAME 1,2 ;PC CORRECT ?
HALT .+1 ;PC OF UUO NOT = TO PC STORED
MOVE 0,40 ;GET UUO !
CAME 0,[X!0] ;CORRECT UUO STORED IN 40?
SKIPA ;NO
JRST Y ;TESTS OK !
STOP1
TGET>
DEFINE XUUOA (X,%UUPC,%XUPC0,%XUPC1)<
;CHECK THE "E" OF THE UUO STORED IS CORRECT.
EFIELD==X ;"E" WE ARE TESTING FOR
TSET
%UUPC: MOVE [JRST .+4] ;SET A TRAP INSTRUCTION
MOVEM 41 ;INTO 41
1B8!X ;EXECUTE A UUO
%XUPC0: HALT .+1 ;UUO DIDN'T TRAP TO 40
MOVE 0,40 ;GET UUO
ANDI 0,-1 ;MASK OUT UUO FOR MA BITS
CAIE X ;MA BITS CORRECT?
%XUPC1: STOP1
TGET>
DEFINE CLRBTH<
CLRAPR
CLRPI>
DEFINE CLRBT1<
CLRAPR
CLRPI>
DEFINE TRAP (A,B)<
MOVE [A] ;SET TRAP INSTRUCTION
MOVEM B ;INTO TRAP LOCATION>
DEFINE STUCK<
WATINT
JRST . ;LOOP ON SELF>
DEFINE SBWAIT (A,%CLKUP)<
%CLKUP: CONO APR,LEPSFT!LSPSFT!A
STUCK> ;WAIT FOR ERRORS
DEFINE TRPCHK (%TPC)<
%TPC: SKIPE MONFLG ;RESET FLAGS IF IN MONITOR
JRST .+3 ;DONT IF STAND ALONE
JRSTF @.+1 ;AND RESTORE THEM
USERF,.+1 ;NEW PC AND FLAGS>
DEFINE XCHN2 (A,B,C)<
;REQUEST INTERRUPTS ON 2 CHANNELS AT ONCE TO SEE IF THEY TRAP
;TO THE CORRECT (I.E. HIGHEST PRIORITY) CHANNEL.
;IF ERROR OCCURS CHECK "PIN" PRINT
TRPCHK
CLRBTH
HALTPI ;FILL INTERRUPT LOCATIONS WITH HALTS
MOVE [JSR A] ;SET UP FOR CORRECT
MOVEM B ;INTERRUPT TRAP
CONO PI,CHNON!PION!177 ;TURN ON PI SYSTEM
CONO PI,REQSET!C ;REQUEST INTERRUPT ON TWO CHANNELS
STUCK>
DEFINE FMUUO (A,%FMTST,%NOFM),<
;EXECUTE UUO'S OUT OF FAST MEMORY LOCATIONS 0,1,2,4,5,10,12, AND 17
;CHECK FIRST THAT THE UUO TRAPPED AND SECONDLY THAT IT STORED THE
;CORRECT PC.
AC=A ;TESTED AC
TSET
MOVE A,[XWD 1000,0] ;SET UP UUO INTO AC A TO EXECUTE
MOVE 13,[JSP 11,%FMTST] ;SET UP UUO TRAP INSTRUCTION
MOVEM 13,41 ;INTO LOCATION 41
MOVE A+1,[JRST %NOFM] ;SET UP TRAP INSTRUCTION INCASE UUO DOES NOT TRAP
JRST A ;GO EXECUTE UUO
%NOFM: HALT .+1 ;UUO DID NOT TRAP FROM FAST MEMORY
JRST .+1 ;LOOP TO %FMUUO IF ERROR
%FMTST: ANDI 11,-1 ;MASK FLAGS
CAIE 11,A+1 ;PC STORED SHOULD = A +1
STOP
TGET>
DEFINE INDPI (A,B,%XX),<
;GET OURSELVES INTO A TIGHT INDIRECT LOOP.
;AND SEE IF WE ARE ABLE TO INTERRUPT OUT OF IT.
;THE LOOP IS DONE TEN TIMES. EACH TIME THE INTERRUPT IS DISMISSED AND
;WE WILL RETURN TO THE "JRST @." INSTRUCTION.
TSET
MOVEI 10,^D10 ;TIMES TO DO THIS TEST
MOVEM 10,COUNTX# ;STORE IT
MOVE 10,[JSR %XX] ;INTERRUPT TRAP INSTRUCTION
MOVEM 10,A ;STORE FOR INTERRUPT REQUEST
CLRBT1
CONO PI,2377 ;TURN ON PI AND CHANNELS
CONO APR,LEPSFT!LSPSFT!B ;ENABLE AND SET ERRORS,ENABLE CH B
JRST @. ;LOOP
HALT .+1 ;ERROR IF HERE (GOT OUT OF INDIRECT LOOP)
%XX: 0
TGET
MOVE 1,%XX ;GET STORED PC
ANDI 1,-1 ;MASK PC BITS
CAIE 1,%XX-2 ;WAS CORRECT PC STORED?
STOP
SOSE COUNTX ;LOOP TEST
JEN @1 ;DISMISS INTERRUPT
CLRBTH>
SUBTTL IOT TESTING
;IF IOT HANGS - CHECK ARRT AND ARLT CLR
;AND OR AR SIGN SMEAR..
;TEST THE IOT'S
IOTXXX:
IOTXX:
IOT0: CLRAPR ;CLEAR APR
CLRPI ;CLEAR PI
CONO APR,60160 ;DISABLE SOFT,CLK,8080
JSR TRPSET ;FILL THE TRAP LOCATIONS
IOT2: MOVE 1,[123456654321] ;CHECK CONI STOR THE CONTENTS OF "E" NOT SET OR
CONI 1 ;SAC INH NOT SET - CONTENTS OF LOC 1
CAMN 1,[123456654321] ;NOT MODIFIED
STOP
IOT3: SETO ;CHECK SAC INH FOR
CONI 1 ;CONI LOC 0
CAME [-1] ;MODIFIED
STOP
TSET
IOT6: SETZ ;CONSZ FAILED TO SKIP
CONSZ ;CHECK PC CLOCK ENABLE AND AD=0 ON IOT CONSZ
STOP
IOT14: CONO PI,10000 ;CLR PI SYSTEM
CONO 77 ;SET SOME CPA BITS
CONI 0 ;IF FAILED EITHER CONO FAILED
SKIPN 0 ;IO SET OR CONI FAILED READ
STOP
;OR ARRT OR ARLT EN OR AR SIGN
;SMEAR OR CPA SELECT NOT ASSERTED
SUBTTL TEST APR FLAGS
IOT15: CONO ;APR CLOCK PIA FAILED EITHER
CONO 1 ;TO SET OR BE READ
CONI ;CHECK APR PIA 35 CLOCK
TRNN 1
STOP
IOT15A: CONO ;APR CLOCK PIA FAILED EITHER
CONO 2 ;TO SET OR BE READ
CONI ;CHECK APR PIA 34 CLOCK
TRNN 2
STOP
IOT16: CONO ;APR CLOCK PIA FAILED EITHER
CONO 4 ;TO SET OR BE READ
CONI ;CHECK APR PIA 33 CLOCK
TRNN 4 ;
STOP
IOT17: CLRAPR ;APR ERROR PIA FAILED EITHER
CONO APR,LSPWRF ;TO SET OR BE READ
CONI ;CHECK APR PIA 31 ERROR
TRNN LPWRFL
STOP
IOT18: CLRAPR
CONO APR,LSPAER
CONI APR,
TRNN LPARER
STOP
CLRAPR
CONO APR,LSNXER
CONI APR,
TRNN LNXMER
STOP
CLRAPR
CONO APR,LSPSFT
CONI APR,
TRNN LPSFTER
STOP
CLRAPR
IOT18A: CONO 1
CONO
CONI
TRNE 1
STOP
IOT19: CONO 2 ;APR PIA 34 CLOCK
CONO ;FAILED TO CLEAR
CONI
TRNE 2
STOP
IOT20: CONO 4 ;APR PIA 33 CLOCK
CONO ;FAILED TO CLEAR
CONI
TRNE 4
STOP
IOT22: CONO APR,LSPWRF ;APR PIA 31 ERROR
CONO APR,LCPWRF ;FAILED TO CLEAR
CONI
TRNE LPWRFL
STOP
CONO APR,LSPAER
CONO APR,LCPAER
CONI
TRNE LPARER
STOP
CONO APR,LSNXER
CONO APR,LCNXER
CONI
TRNE LNXMER
STOP
TBOTH
IOT24: CONO 7 ;SET SOME FLAGS
CONSO ;CONSO FAILED CK PC CLOCK ENABLE
SKIPA ;INH
STOP
TBOTH
IOT25: CONO 7 ;SET SOME FLAGS
CONI
TRNN 7 ;CONSO FAILED CH PC CLOCK ENABLE
STOP
TBOTH
IOT26: CONO 7 ;CONSZ FAILED
CONI
TRNE 7 ;CK PC CLOCK ENABLE IF AD=0
SKIPA ;AND IOT TIME
STOP
SUBTTL TEST PI FLAGS
IOT33B: CONO 7 ;CONO PI MODIFIED
CONO PI,0 ;CPU AS A DEVICE
CONI
TRNN 7 ;CPA SELECT IS CONFUSED
STOP
CONO 0 ;RESET BITS
IOT34: CONO PI,200 ;CHK WHY PI ON
CONI PI, ;FLOP NOT SET
TRNN 200
STOP
IOT35: CONO PI,200 ;CHK WHY PI ON
CONO PI,400 ;NOT CLEARED
CONI PI, ;
TRNE 200
STOP
IOT36:
SUBTTL BASIC PI SYSTEM TESTING
;BEGIN TESTING THE PI SYSTEM
BLURB
;AND THE PROGRAM WILL HALT POINTING TO THE INTERUPTED ADRESS.
HALTPI ;FILL INTERRUPT LOCATIONS WITH HALTS
IOT38: CONO PI,2001 ;PI CHANNEL 7
CONI PI, ;FAILED TO SET
TRNN 1 ;
STOP
IOT39: CONO PI,2001 ;PI CHANNEL 7
CONO PI,1001 ;FAILED TO CLEAR
CONI PI,
TRNE 1
STOP
IOT40: CONO PI,2002 ;PI CHANNEL 6
CONI PI, ;FAILED TO SET
TRNN 2
STOP
IOT41: CONO PI,2002 ;PI CHANNEL 6
CONO PI,1002 ;FAILED TO CLEAR
CONI PI,
TRNE 2
STOP
IOT42: CONO PI,2004 ;PI CHANNEL 5
CONI PI, ;FAILED TO SET
TRNN 4
STOP
IOT43: CONO PI,2004 ;PI CHANNEL 5
CONO PI,1004 ;FAILED TO CLEAR
CONI PI,
TRNE 4
STOP
IOT44: CONO PI,2010 ;PI CHANNEL 4
CONI PI, ;FAILED TO SET
TRNN 10
STOP
IOT45: CONO PI,2010 ;PI CHAN 4
CONO PI,1010 ;FAILED TO CLEAR
CONI PI,
TRNE 10
STOP
IOT46: CONO PI,2020 ;PI CHAN 3
CONI PI, ;FAILED TO SET
TRNN 20
STOP
IOT47: CONO PI,2020 ;PI CHAN 3
CONO PI,1020 ;FAILED TO CLEAR
CONI PI,
TRNE 10
STOP
IOT48: CONO PI,2040 ;PI CHAN 2
CONI PI, ;FAILED TO SET
TRNN 40
STOP
IOT49: CONO PI,2040 ;PI CHAN 2
CONO PI,1040 ;FAILED TO CLR
CONI PI,
TRNE 40
STOP
IOT50: CONO PI,2100 ;PI CHAN 1
CONI PI, ;FAILED TO SET
TRNN 100
STOP
IOT51: CONO PI,2100 ;PI CHAN 1
CONO PI,1100 ;FAILED TO CLEAR
CONI PI,
TRNE 100
STOP
IOTXYZ: JFCL
X=40000
BLURB
TRPPI ;FILL INTERRUPT LOCATIONS WITH TRAPS
PIOT00: REPEAT 7,
< PINO X
X=X_-1>
JFCL
BLURB
TRPPI ;FILL INTERRUPT LOCATIONS WITH TRAPS
X=40000
Y=100
PIOT01:
REPEAT 7,<
PIYES Y,X
X=X_-1
Y=Y_-1
>
JFCL
BLURB
TRPPI ;FILL INTERRUPT LOCATIONS WITH TRAPS
X=100
PIOT02:
REPEAT 7,<
PIONOF X
X=X_-1
>
JFCL
BLURB
;TEST THE SETTING AND CLEARING OF THE PI FLOPS WITHOUT CREATING INTERRUPTS
;THE TEST WILL HALT IF AN INTERRUPT OCCURS AND THE CHANNEL NUMBER OF THE
;INTERRUPT WILL BE STORED IN AC0
HALTPI ;FILL INTERRUPT LOCATIONS WITH HALTS
BIGPI1: PITEST 100
BIGPI2: PITEST 40
BIGPI3: PITEST 20
BIGPI4: PITEST 10
BIGPI5: PITEST 4
BIGPI6: PITEST 2
BIGPI7: PITEST 1
BIGPIX: PITEST 177
BIGPIY: PITEST 125
BIGPIZ: PITEST 52
JFCL
BLURB
;CHECK THE SETTING AND CLEARING OF THE HOLD FLOPS
TRPPI ;FILL INTERRUPT LOCATIONS WITH TRAPS
X=40000
Y=100
PIOT03: REPEAT 7,<
PIHCLR Y,X
X=X_-1
Y=Y_-1
>
JFCL
SUBTTL INTERRUPT TESTING WITH REAL INTERRUPTS
;TEST PROPER TRAP WHEN INTERRUPTING ON EACH CHANNEL
;VIA THE CACHE SWEEP DONE FLAG--ILLEGAL TRAPS HALT--NO TRAP LOOPS
;THE HALT POINTS TO THE CHANNEL THOUGHT TO BE REQUESTED
;IF PI HANGS OR BLOWS UP THEN SEE 'PII' PRINT OR 'PIR' PRINT
HALTPI ;FILL INTERRUPT LOCATIONS WITH HALTS
CLRPI
CLRAPR
MOVE [JSP UUO] ;SET TRAP TO HALT
MOVEM 41 ;IN THE UUO TRAP LOCATION
MOVE [JSR TRP0A] ;SET PROPER RECOVERY INST.
MOVEM 42 ;INTO CH1 TRAP
CONO PI,2300 ;TURN ON CHAN1
CONO APR,LENXER!LSNXER!LAPRP1 ;CAUSE CACHE SWP DONE AND CHAN
STUCK
TRP0A: 0
TRPCHK
CLRPI
CLRAPR
;IF PI HANGS OR BLOWS UP THEN SEE 'PII' PRINT OR 'PIR' PRINT
;TEST PROPER TRAP WHEN INTERRUPTING ON EACH CHANNEL
;VIA THE CACHE SWEEP DONE FLAG--ILLEGAL TRAPS HALT--NO TRAP LOOPS
;THE HALT POINTS TO THE CHANNEL THOUGHT TO BE REQUESTED
HALTPI ;FILL INTERRUPT LOCATIONS WITH HALTS
MOVE [JSR TRP1A] ;RECOVERY INSTRUCTION INTO
MOVEM 44 ;PROPER CHAN TRAP (2)
CONO PI,2240 ;TURN CHAN 2 ON
CONO APR,LEPSFT!LSPSFT!LAPRP2 ;CAUSE CACHE SWP DONE AND CHN ON
STUCK
TRP1A: 0
TRPCHK
CLRPI
CLRAPR
;IF PI HANGS OR BLOWS UP THEN SEE 'PII' PRINT OR 'PIR' PRINT
;TEST PROPER TRAP WHEN INTERRUPTING ON EACH CHANNEL
;VIA THE CACHE SWEEP DONE FLAG--ILLEGAL TRAPS HALT--NO TRAP LOOPS
;THE HALT POINTS TO THE CHANNEL THOUGHT TO BE REQUESTED
HALTPI ;FILL INTERRUPT LOCATIONS WITH HALTS
MOVE [JSR TRP2A] ;RECOVERY INSTRUCTION
MOVEM 46 ;INTO PROPER CHAN TRAP (3)
CONO PI,2220 ;TURN CHAN 3 ON
CONO APR,LEPAER!LSPAER!LAPRP3 ;CAUSE CACHE SWP DONE AND CHAN ON
STUCK
TRP2A: 0
TRPCHK
CLRPI
CLRAPR
;IF PI HANGS OR BLOWS UP THEN SEE 'PII' PRINT OR 'PIR' PRINT
;TEST PROPER TRAP WHEN INTERRUPTING ON EACH CHANNEL
;VIA THE CACHE SWEEP DONE FLAG--ILLEGAL TRAPS HALT--NO TRAP LOOPS
;THE HALT POINTS TO THE CHANNEL THOUGHT TO BE REQUESTED
HALTPI ;FILL INTERRUPT LOCATIONS WITH HALTS
MOVE [JSR TRP3A] ;RECOVERY INSTRUCTION
MOVEM 50 ;INTO PROPER CHAN TRAP (4)
CONO PI,2210 ;TURN CHAN 4 ON
CONO APR,LSPSFT!LSPSFT!LAPRP4 ;CAUSE CACHE SWP DONE AND CHAN ON
STUCK
TRP3A: 0
TRPCHK
CLRPI
CLRAPR
;IF PI HANGS OR BLOWS UP THEN SEE 'PII' PRINT OR 'PIR' PRINT
;TEST PROPER TRAP WHEN INTERRUPTING ON EACH CHANNEL
;VIA THE CACHE SWEEP DONE FLAG--ILLEGAL TRAPS HALT--NO TRAP LOOPS
;THE HALT POINTS TO THE CHANNEL THOUGHT TO BE REQUESTED
HALTPI ;FILL INTERRUPT LOCATIONS WITH HALTS
MOVE [JSR TRP4A] ;RECOVERY INSTRUCTION
MOVEM 52 ;INTO PROPER CHAN TRAP (5)
CONO PI,2204 ;TURN CHAN 5 ON
CONO APR,LEPSFT!LSPSFT!LAPRP5 ;CAUSE CACHE SWP DONE AND CHAN ON
STUCK
TRP4A: 0
TRPCHK
CLRPI
CLRAPR
;IF PI HANGS OR BLOWS UP THEN SEE 'PII' PRINT OR 'PIR' PRINT
;TEST PROPER TRAP WHEN INTERRUPTING ON EACH CHANNEL
;VIA THE CACHE SWEEP DONE FLAG--ILLEGAL TRAPS HALT--NO TRAP LOOPS
;THE HALT POINTS TO THE CHANNEL THOUGHT TO BE REQUESTED
HALTPI ;FILL INTERRUPT LOCATIONS WITH HALTS
MOVE [JSR TRP5A] ;RECOVERY INSTRUCTION
MOVEM 54 ;INTO PROPER CHAN TRAP (6)
CONO PI,2202 ;TURN CHAN 6 ON
CONO APR,LEPWRF!LSPWRF!LAPRP6 ;CAUSE CACHE SWP DONE AND CHAN ON
STUCK
TRP5A: 0
TRPCHK
CLRPI
CLRAPR
;IF PI HANGS OR BLOWS UP THEN SEE 'PII' PRINT OR 'PIR' PRINT
;TEST PROPER TRAP WHEN INTERRUPTING ON EACH CHANNEL
;VIA THE CACHE SWEEP DONE FLAG--ILLEGAL TRAPS HALT--NO TRAP LOOPS
;THE HALT POINTS TO THE CHANNEL THOUGHT TO BE REQUESTED
HALTPI ;FILL INTERRUPT LOCATIONS WITH HALTS
MOVE [JSR TRP6A] ;RECOVERY INSTRUCTION
MOVEM 56 ;INTO PROPER CHAN TRAP (7)
CONO PI,2201 ;TURN CHAN 7 ON
CONO APR,LEPWRF!LSPWRF!LAPRP7 ;CASUE CACHE SWP DONE AND CHAN ON
STUCK
TRP6A: 0
TRPCHK
JFCL
SUBTTL INTERNAL INTERRUPT REQUEST TESTING
;CHECK THE ABILITY TO GENERATE PI REQUESTS VIA PROGRAM REQEST ON ALL
;CHANNELS.
JSP .+1 ;GET FLAGS
TLNE USERF ;USER MODE BIT ON
JRST .+1 ;DONT DO IF USER MODE!
CLRBTH
;IF PI HANGS OR BLOWS UP THEN SEE 'PII' PRINT OR 'PIR' PRINT
HALTPI ;FILL INTERRUPT LOCATIONS WITH HALTS
CLRPI
CLRAPR
TRAP <JSR CKI01>,42
CONO PI,6300 ;INTERRUPT ON CH1
STUCK
;IF PI HANGS OR BLOWS UP THEN SEE 'PII' PRINT OR 'PIR' PRINT
CKI01: 0
TRPCHK
HALTPI ;FILL INTERRUPT LOCATIONS WITH HALTS
CLRPI
CLRAPR
TRAP <JSR CKI02>,44
CONO PI,6240 ;INTERRUPT ON CH 2
STUCK
;IF PI HANGS OR BLOWS UP THEN SEE 'PII' PRINT OR 'PIR' PRINT
CKI02: 0
TRPCHK
HALTPI ;FILL INTERRUPT LOCATIONS WITH HALTS
CLRPI
CLRAPR
TRAP <JSR CKI03>,46
CONO PI,6220 ;INTERRUPT ON CH 3
STUCK
;IF PI HANGS OR BLOWS UP THEN SEE 'PII' PRINT OR 'PIR' PRINT
CKI03: 0
TRPCHK
HALTPI ;FILL INTERRUPT LOCATIONS WITH HALTS
CLRPI
CLRAPR
TRAP <JSR CKI04>,50
CONO PI,6210 ;INTERRUPT ON CH 4
STUCK
;IF PI HANGS OR BLOWS UP THEN SEE 'PII' PRINT OR 'PIR' PRINT
CKI04: 0
TRPCHK
HALTPI ;FILL INTERRUPT LOCATIONS WITH HALTS
CLRPI
CLRAPR
TRAP <JSR CKI05>,52
CONO PI,6204 ;INTERRUPT ON CH 5
STUCK
;IF PI HANGS OR BLOWS UP THEN SEE 'PII' PRINT OR 'PIR' PRINT
CKI05: 0
TRPCHK
HALTPI ;FILL INTERRUPT LOCATIONS WITH HALTS
CLRPI
CLRAPR
TRAP <JSR CKI06>,54
CONO PI,6202 ;INTERRUPT ON CH 6
STUCK
;IF PI HANGS OR BLOWS UP THEN SEE 'PII' PRINT OR 'PIR' PRINT
CKI06: 0
TRPCHK
HALTPI ;FILL INTERRUPT LOCATIONS WITH HALTS
CLRPI
CLRAPR
TRAP <JSR CKI07>,56
CONO PI,6201 ;INTERRUPT ON CH 7
STUCK
;IF PI HANGS OR BLOWS UP THEN SEE 'PII' PRINT OR 'PIR' PRINT
CKI07: 0
TRPCHK
HALTPI ;FILL INTERRUPT LOCATIONS WITH HALTS
CLRTRP
CLRPI
CLRAPR
JFCL
SUBTTL PRIORITY TESTING
;THIS TEST CHECKS TO SEE IF INTERRUPTS RECOGNIZE THE PROPER PRIORITY
;IMPROPER TRAPS WILL HALT - NO TRAPS WILL CAUSE PROGRAM TO HANG
;IF PROGRAM STUCK THEN REPLACE "JRST ." WITH JRST BACK TO MULT7
;IF PROGRAM HALTS THEN REPLACE "JSR" IN INTERRUPT LOCATION
;TO "JSR" TO ROUTINE WHICH CAUSED THE TRAP +1
;FOR EXAMPLE IF ROUTINE TRAPPED TO LOCATION '50' IN 50
;YOU WOULD PUT A JSR TO "MULTX ROUTINE+3
MULTI: CLRBT1
HALTPI ;FILL INTERRUPT LOCATIONS WITH HALTS
TRAP <JSR MULT6>,56
CONO PI,CHNON+PION+177 ;TURN ON PI SYSTEM
SBWAIT 7
MULT6: 0
TRPCHK
HALTPI ;FILL INTERRUPT LOCATIONS WITH HALTS
TRAP <JSR MULT5>,54
CONO PI,CHNON+PION+177 ;TURN ON PI SYSTEM
SBWAIT 6
MULT5: 0
TRPCHK
HALTPI ;FILL INTERRUPT LOCATIONS WITH HALTS
TRAP <JSR MULT4>,52
CONO PI,CHNON+PION+177 ;TURN ON PI SYSTEM
SBWAIT 5
MULT4: 0
TRPCHK
HALTPI ;FILL INTERRUPT LOCATIONS WITH HALTS
TRAP <JSR MULT3>,50
CONO PI,CHNON+PION+177 ;TURN ON PI SYSTEM
SBWAIT 4
MULT3: 0
TRPCHK
HALTPI ;FILL INTERRUPT LOCATIONS WITH HALTS
TRAP <JSR MULT2>,46
CONO PI,CHNON+PION+177 ;TURN ON PI SYSTEM
SBWAIT 3
MULT2: 0
TRPCHK
HALTPI ;FILL INTERRUPT LOCATIONS WITH HALTS
TRAP <JSR MULT1>,44
CONO PI,CHNON+PION+177 ;TURN ON PI SYSTEM
SBWAIT 2
MULT1: 0
TRPCHK
HALTPI ;FILL INTERRUPT LOCATIONS WITH HALTS
TRAP <JSR MULT0>,42
CONO PI,CHNON+PION+177 ;TURN ON PI SYSTEM
SBWAIT 1
MULT0: 0
TRPCHK
HALTPI ;FILL INTERRUPT LOCATIONS WITH HALTS
CLRBTH
JFCL
SUBTTL DUAL REQUEST TESTING
;TEST THAT INTERRUPTING ON 2 CHANNELS AT ONCE TRAPS
;TO THE CORRECT TRAP. TEST IS DONE ON ALL POSSIBLE CHANNELS I.E.
;7,1 7,2 7,3 7,4 7,5 7,6 6,1 6,2...ETC
C2A: TSET
XCHN2 C2B,42,101
C2B: 0
TBOTH
XCHN2 C2C,44,41
C2C: 0
TBOTH
XCHN2 C2D,46,21
C2D: 0
TBOTH
XCHN2 C2E,50,11
C2E: 0
TBOTH
XCHN2 C2F,52,5
C2F: 0
TBOTH
XCHN2 C2G,54,3
C2G: 0
TBOTH
XCHN2 C2H,42,102
C2H: 0
TBOTH
XCHN2 C2I,44,42
C2I: 0
TBOTH
XCHN2 C2J,46,22
C2J: 0
TBOTH
XCHN2 C2K,50,12
C2K: 0
TBOTH
XCHN2 C2L,52,6
C2L: 0
TBOTH
XCHN2 C2M,42,104
C2M: 0
TBOTH
XCHN2 C2N,44,44
C2N: 0
TBOTH
XCHN2 C2O,46,24
C2O: 0
TBOTH
XCHN2 C2P,50,14
C2P: 0
TBOTH
XCHN2 C2Q,42,110
C2Q: 0
TBOTH
XCHN2 C2R,44,50
C2R: 0
TBOTH
XCHN2 C2S,46,30
C2S: 0
TBOTH
XCHN2 C2T,42,120
C2T: 0
TBOTH
XCHN2 C2U,44,60
C2U: 0
TBOTH
XCHN2 C2V,42,140
JFCL
C2V: 0
TGET
CLRBTH
SUBTTL TEST THE ABILITY TO DISMISS INTERRUPTS
;CHECK THAT "JEN" DISMISSES INTERRUPTS
X=42
Z1=100
JENDIS: REPEAT 7,<
PIDIS X,Z1
X=X+2
Z1=Z1_-1
>
JFCL
SUBTTL TICKLE THE INTERRUPT SYSTEM WITH THE APR SYSTEM
;TEST THAT THE APR SYSTEM WILL NOT CAUSE AN INTERRUPT WHEN ENABLED AND
;NO APR APR SYSTEM CHANNEL IS SET..
BLURB
CKCK0: CLRBTH
TRPPI ;FILL INTERRUPT LOCATIONS WITH TRAPS
SETZ ;CLEAR 0
CONO PI,CHNON!PION!177 ;TURN ON PI SYSTEM
CONO APR,LEPSFT!LSPSFT!LENXER!LSNXER!LEPWRF!LSPWRF!LEPAER!LSPAER ;ENABLE THE APR SYSTEM
WATINT
SKIPE ;AC0=0
STOP
;TEST THAT THE APR SYSTEM WILL NOT INTERRUPT WITHOUT APR SYSTEM ENABLE SET
;ON ALL CHANNELS
X=1
CKCK1: REPEAT 7,<
;THE PROGRAM WILL WAIT FOR THE APR SYSTEM TO INTERRUPT ON EACH CHANNEL
;WITHOUT APR SYSTEM ENABLE SET. IF AC0 BECOMES NON-ZERO THE PROGRAM WILL
;HALT AND AC0 HAS THE NUMBER OF THE CHANNEL THAT THE INTERRUPT OCCURED
;ON. NO INTERRUPTS SHOULD OCCUR DURING THIS TEST.
CLRBTH
TRPPI ;FILL INTERRUPT LOCATIONS WITH TRAPS
SETZ 0, ;INSURE ZERO AC0.
CONO PI,PION!CHNON!177 ;ENABLE PI'S
CONO APR,LSPSFT!LDNXER!LSNXER!LDPWRF!LSPWRF!LDPAER!LSPAER!X ;DISABLE THE APR SYSTEM AND SET CH X
WATINT
SKIPE ;AC0=0
STOP
X=X+1
>
SUBTTL TEST VARIOUS RESETS
;TRY TO RESET THE PI BITS VIA CONO RESET TO THE APR
RESET1: CLRBTH
CONO PI,PION!CHNON!177 ;TURN ON PI SYSTEM
CONO APR,IOCLR ;RESET THE I/O BUS
CONI PI,0
TRNN 0,PION!177 ;ALL PI BITS SHOULD STILL BE SET
STOP
;TRY TO RESET THE APR WITH A RESET TO THE PI.
RESET2: CLRBTH
CONO APR,7 ;SET CLOCK AND ERROR PIA'S
CONO PI,PICLR ;CLEAR THE PI SYSTEM
CONI APR,0
TRNN 0,7 ;AND APR BITS SHOULD STILL BE SET
STOP
SUBTTL INTERRUPT OUT OF INDIRECT LOOP
INDPI 42,1
INDPI 44,2
INDPI 46,3
INDPI 50,4
INDPI 52,5
INDPI 54,6
INDPI 56,7
SUBTTL LOCAL UUO TESTING (LUUO)
;TEST UUO'S IN RANGE 1-37
;TEST TO SEE THAT UUO TRAPS CORRECTLY AND THAT PC
;OF UUO IS CORRECT AND THAT UUO STORED IN 40 IS ALSO CORRECT
;MONITOR UUO'S ARE NOT TESTED.
UUO01: XUUO 1B8,UUO02
UUO02: XUUO 2B8,UUO03
UUO03: XUUO 3B8,UUO04
UUO04: XUUO 4B8,UUO05
UUO05: XUUO 5B8,UUO06
UUO06: XUUO 6B8,UUO07
UUO07: XUUO 7B8,UUO10
UUO10: XUUO 10B8,UUO11
UUO11: XUUO 11B8,UUO12
UUO12: XUUO 12B8,UUO13
UUO13: XUUO 13B8,UUO14
UUO14: XUUO 14B8,UUO15
UUO15: XUUO 15B8,UUO16
UUO16: XUUO 16B8,UUO17
UUO17: XUUO 17B8,UUO20
UUO20: XUUO 20B8,UUO21
UUO21: XUUO 21B8,UUO22
UUO22: XUUO 22B8,UUO23
UUO23: XUUO 23B8,UUO24
UUO24: XUUO 24B8,UUO25
UUO25: XUUO 25B8,UUO26
UUO26: XUUO 26B8,UUO27
UUO27: XUUO 27B8,UUO30
UUO30: XUUO 30B8,UUO31
UUO31: XUUO 31B8,UUO32
UUO32: XUUO 32B8,UUO33
UUO33: XUUO 33B8,UUO34
UUO34: XUUO 34B8,UUO35
UUO35: XUUO 35B8,UUO36
UUO36: XUUO 36B8,UUO37
UUO37: XUUO 37B8,UUOPC
JFCL
SUBTTL TEST UUO STORING CORRECTLY
;TEST THE MA PORTION OF THE UUO TO SEE IF BITS 18-35 ARE STORED CORRECTLY
;ROUTINE ROTATES A BIT LEFT THROUGH THE MA OF THE UUO
;THEN DOES ALTERNATING PATTERN, ALL ONES AND ALL ZEROS
X=1
UUOPC:
UUOPCA:
REPEAT ^D18,<
XUUOA X
X=X_1
>
X=777777
XUUOA X
X=0
XUUOA X
X=252525
XUUOA X
X=525252
XUUOA X
X=0
JFCL
SUBTTL TEST CLEARING OF INDEX AND INDIRECT BITS ON UUO
;TEST THAT THE INDEX BITS ARE CLEARED WHEN EXECUTING A UUO
UUOIND: CLRBTH
SETZ 17, ;CLEAR INDEX FIELD
MOVE [JRST .+4] ;SET UP UUO TRAP INSTR.
MOVEM 41 ;INTO TRAP LOCATION
1B8!(17) ;EXECUTE A UUO WITH INDEXING
HALT .+1 ;UUO DID NOT TRAP
MOVE 0,40 ;GET UUO
TLNE 0,17 ;INDEX FIELD CLEAR?
STOP
;TEST THAT THE INDIRECT BIT IS CLEARED WHEN EXECUTING A UUO
UUOINX: CLRBTH
SETZB 17,0 ;CLEAR INDEX FIELD
MOVE [JRST .+4] ;SET UUO TRAP INSTR.
MOVEM 41 ;INTO TRAP LOCATION
1B8!@17 ;EXECUTE A UUO WITH INDIRECTING
HALT .+1 ;UUO DID NOT TRAP
MOVE 0,40 ;GET UUO
TLNE 0,20 ;INDIRECT BIT CLEAR?
STOP
;TEST THAT BOTH INDEX AND INDIRECT BITS CLEAR WHEN EXECUTING A UUO
UUOBTH: CLRBTH
SETZB 17,0 ;CLEAR INDEX FIELD
MOVE [JRST .+4] ;SET UP TRAP INSTR.
MOVEM 41 ;INTO TRAP LOCATION
1B8!@17(17) ;EXECUTE WITH INDIRECT AND INDEX
HALT .+1 ;UUO DID NOT TRAP
MOVE 0,40 ;GET UUO
TLNE 0,37 ;INDIRECT OR INDEX BITS STILL SET?
STOP
SUBTTL TEST UUOS OUT OF FAST MEMORY
FMUUO 0
FMUUO 1
FMUUO 2
FMUUO 4
FMUUO 5
FMUUO 10
FMUUO 12
FMUUO 17
SUBTTL SIMPLE MUUO TEST
;TEST MONITOR UUO "0" TO SEE IF IT TRAPS AT ALL
;TRAPPING TO 40 CAUSES IT TO HALT. TRAPPING TO SUPERVISOR KERNAL PUBLIC
;OR CONCEALED IS ALLOWED AND IS CONSIDERED CORRECT.
TSET
JSP .+1 ;GET FLAGS
TLNE USERF ;IF USER MODE THEN EXIT
JRST USRIO0 ;SKIP IF USER MODE TO USER IO TEST
CLRBTH
XMUUO: MOVEI XMUPC ;SET UP A TRAP FOR MONITOR UUO
MOVEM KNTRP ;INTO A POSSIBLE TRAP LOCATIONS
MOVEM KTRP
MOVEM SNTRP
MOVEM STRP
MOVEM CNTRP
MOVEM CTRP
MOVEM PNTRP
MOVEM PTRP
SETOM MUUO ;SET THE TRAP LOCATIONS
SETOM MUUO+1 ;TO ENABLE CHECKING
MOVE [JRST MUHLT] ;SET UP A LUUO TRAP HALT
MOVEM 41
SETZM .+1 ;MAKE A MUUO IN THE NEXT LOCATION
XMUUO0: 0 ;THIS IS A MONITOR UUO
HALT .+1 ;THE UUO DIDN'T TRAP
HALT .+1 ;MUUO SKIPPED?
MUHLT: HALT .+1 ;UUO TRAPPED TO 40(DECODE AS LUUO?)
HALT .+1 ;SPARE HALT
XMUPC: TGET
SKIPE MUUO ;MON UUO "0" DIDN'T STORE A ZERO
STOP
HRRZ MUUO+1 ;GET THE STORED PC
CAIE XMUUO0+1 ;DID WE STORE THE CORRECT PC?
STOP
JFCL
TGET
SUBTTL TEST THE USER IOT BIT
;CHECK CLEARING AND SETTING OF THE USER IOT BIT
USRIO0: TSET
CLRBTH
SKIPN MONFLG ;IN SPECIAL USER MODE?
JRST ENDIT ;YES LOOP TEST
JRSTF @.+1 ;CLEAR BITS
0,,.+1 ;PC AND FLAGS
JSP .+1 ;CHECK WHY USER I/O FLAG IS SET
TLNE EXIOT ;SHOULD BE CLEAR VIA JRSTF
STOP
TGET
SKIPN MONFLG ;IN USER MODE?
JRST ENDIT ;YES CANNOT SET USER IO FLAG
;IN USER MODE
USRIO1: TSET
CLRBTH
SETZ 0 ;CLEAR 0
MOVE 1,[1B6!.+2] ;FLAGS AND PC
JRSTF (1) ;USER I/O FLAG DID
JSP .+1 ;NOT SET
TLNN EXIOT ;CHECK WHY BIT IS NOT SET
STOP
TGET
ENDIT: SETZM TNUMB ;CLEAR TEST NUMBER FLAG
JRST BEGEND ;GO TO BEG/END SEQUENCE
SUBTTL IOT/PI/APR SUBROUTINES
;HERE ARE SOME USEFUL SUBROUTINES FOR THE DIAGNOSTIC
;THIS ROUTINE CLEARS ALL THE TRAP LOCATIONS(42-56)
TRPCLR: 0 ;FOR PC RETURN
MOVEM 15,XAC15# ;SAVE AC15
MOVEI 15,42
SETZM @15 ;CLEAR LOCATION
ADDI 15,1 ;BUMP POINTER
CAIG 15,56 ;DONE LAST?
JRST .-3 ;LOOP
MOVE 15,XAC15 ;RESTORE AC15
JRST @TRPCLR
;THIS ROUTINE PUTS A JSR TO A HALT INTO EACH TRAP LOCATION (42-57)
HALTPI: 0 ;FOR RETURN PC
MOVEM 0,XAC0# ;SAVE AC0
MOVEM 1,XAC1# ;SAVE AC1
MOVE [JSR HLTCK] ;PUT JSR INTO EACH TRAP LOCATION
MOVEI 1,42 ;IN CASE INCORRECT INTERRUPT
MOVEM @1 ;STORE
ADDI 4
ADDI 1,2
CAIGE 1,60 ;DONE?
JRST .-4
MOVE 0,XAC0 ;RESTORE AC0
MOVE 1,XAC1 ;AND AC1
JRST @HALTPI ;RETURN
;THIS ROUTINE PUTS A JSR INTO EACH INTERRUPT LOCATION WHICH WILL
;IGNORE INTERRUPTS..
TRAPPI: 0 ;FOR JSR
MOVEM 0,XAC0# ;SAVE AC0
MOVEM 1,XAC1# ;SAVE AC1
MOVE [JSR TRPFIL] ;SET UP TRAP INSTRUCTION
MOVEI 1,42
MOVEM @1
ADDI 1,2
ADDI 0,4 ;STORAGE POINTER
CAIGE 1,60 ;DONE?
JRST .-4 ;NO LOOP
MOVE 0,XAC0 ;RESTORE AC0
MOVE 1,XAC1 ;AND AC1
JRST @TRAPPI ;RETURN
;THIS ROUTINE PLACES THE VALUE OF THE CHANNEL WHICH INTERRUPTED INTO
;AC0. IT DOES NOTHING ELSE (IT EFFECTIVLY IGNORES THE INTERRUPT).
TRPFIL: 0
MOVE 1,.-1
MOVEI 1 ;POINTER
JRST TPEND
0
MOVE 1,.-1
MOVEI 2
JRST TPEND
0
MOVE 1,.-1
MOVEI 3
JRST TPEND
0
MOVE 1,.-1
MOVEI 4
JRST TPEND
0
MOVE 1,.-1
MOVEI 5
JRST TPEND
0
MOVE 1,.-1
MOVEI 6
JRST TPEND
0
MOVE 1,.-1
MOVEI 7
JRST TPEND
HALT TPEND ;"JRST @" OR "JRSTF @" FAILS
TPEND: SKIPE MONFLG ;IN USER MODE?
JRST @1 ;RETURN
JRSTF @1 ;RESTORE FLAGS
HALT . ;JRST @ OR JRSTF FAILS ?
;THIS ROUTINE PLACES THE VALUE OF THE CHANNEL WHICH INTERRUPTED
;INTO AC0. AFTER WHICH IT WILL HALT. THIS ROUTINE IS CALLED WHENEVER AN
;INTERRUPT OCCURS ON AN INCORRECT CHANNEL.
HLTCK: 0
MOVE 1,.-1
MOVEI 1
HALT @1
0
MOVE 1,.-1
MOVEI 2
HALT @1
0
MOVE 1,.-1
MOVEI 3
HALT @1
0
MOVE 1,.-1
MOVEI 4
HALT @1
0
MOVE 1,.-1
MOVEI 5
HALT @1
0
MOVE 1,.-1
MOVEI 6
HALT @1
0
MOVE 1,.-1
MOVEI 7
HALT @7
0
MOVE 1,.-1
SETO 0
HALT . ;SHOULD NEVER GET HERE
SUBTTL IOT/PI/APR TRAP ROUTINES
;HERE LIE THE VARIOUS TRAPS TRAPS HERE REPRESENT ERRORS
;NOT CHECKED IN THE DIAGNOSTIC. THE LISTING SHOWS THE CAUSE OF THE
;TRAP.
UUO: HALT . ;ERROR-UUO (LOC 0 HAS PC OF UUO)
MACHTP: HALT @425 ;KERNAL NO TRAP
HALT @425 ;KERNAL TRAP
HALT @425 ;SUPERVISOR NO TRAP
HALT @425 ;SUPERVISOR TRAP
HALT @425 ;CONCEAL NO TRAP
HALT @425 ;CONCEAL TRAP
HALT @425 ;PUBLIC NO TRAP
HALT @425 ;PUBLIC TRAP
TABLE: HALT . ;PAGE FAILURE TRAP
JFCL ;IGNORE ARITHMETIC TRAPS
HALT .
HALT .
-1 ;IF UUO THEN NOT =O-1
-1
0
0
MACHTP
MACHTP+1
MACHTP+2
MACHTP+3
MACHTP+4
MACHTP+5
MACHTP+6
MACHTP+7
TRPSET: 0 ;FOR JSR
MOVEM 0,XAC0# ;SAVE AC0
MOVEM 1,XAC1# ;SAVE AC1
MOVEM 16,XAC16# ;SAVE AC16
MOVEI 0,TABLE ;TRAP TABLE POINTER
MOVEI 1,420 ;STORAGE ADRESS
MOVE 16,@0 ;PUT TRAP WORD INTO
MOVEM 16,(1) ;TRAP LOCATION
ADDI 0,1 ;BUMP
ADDI 1,1 ;POINTERS
CAIE 1,440 ;DONE LAST
JRST .-5 ;NO KEEP LOOPING
MOVE 0,XAC0 ;RESTORE AC0
MOVE 1,XAC1 ;AND AC1
MOVE 16,XAC16 ;AND AC16
JRST @TRPSET ;RETURN TO CALLER