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;DSKAI
IDENTIFICATION
--------------
PRODUCT CODE: AH-E313A-DD
DIAGNOSTIC CODE: DSKAI
PRODUCT NAME: DSKAIA0 DECSYSTEM 2020 BASIC
INSTRUCTION DIAGNOSTIC (9)
VERSION: 0.1
DATE RELEASED: MARCH 1978
MAINTAINED BY: DIAGNOSTIC ENGINEERING
AUTHOR: JOHN R. KIRCHOFF
COPYRIGHT (C) 1978
DIGITAL EQUIPMENT CORPORATION, MAYNARD, MASS.
THIS SOFTWARE IS FURNISHED UNDER A LICENSE FOR USE ONLY ON A
SINGLE COMPUTER SYSTEM AND MAY BE COPIED ONLY WITH THE INCLUSION
OF THE ABOVE COPYRIGHT NOTICE. THIS SOFTWARE, OR ANY OTHER
COPIES THEREOF, MAY NOT BE PROVIDED OR OTHERWISE MADE AVAILABLE
TO ANY OTHER PERSON EXCEPT FOR USE ON SUCH SYSTEM AND TO ONE WHO
AGREES TO THESE LICENSE TERMS. TITLE TO AND OWNERSHIP OF THE
SOFTWARE SHALL AT ALL TIMES REMAIN IN DIGITAL EQUIPMENT
CORPORATION.
THE INFORMATION IN THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT
NOTICE AND SHOULD NOT BE CONSTRUED AS A COMMITMENT BY DIGITAL
EQUIPMENT CORPORATION.
DIGITAL EQUIPMENT CORPORATION ASSUMES NO RESPONSIBILITY FOR THE
USE OR RELIABILITY OF ITS SOFTWARE IN EQUIPMENT WHICH IS NOT
SUPPLIED BY DIGITAL EQUIPMENT CORPORATION.
MAINDEC-10-DSKAI.TXT
PAGE 2 SEQ 0003
TABLE OF CONTENTS
-----------------
1.0 ABSTRACT
2.0 REQUIREMENTS
2.1 EQUIPMENT
2.2 STORAGE
2.3 PRELIMINARY PROGRAMS
3.0 PROGRAM PROCEDURES
3.1 LOADING PROCEDURE
3.2 STARTING PROCEDURE
3.3 OPERATING PROCEDURE
4.0 DATA SWITCH FUNCTIONS
5.0 ERRORS
6.0 ITERATION COUNTER
7.0 CYCLE TIME
8.0 OPERATIONAL VARIATIONS
9.0 MISCELLANEOUS
10.0 LISTING
MAINDEC-10-DSKAI.TXT
PAGE 3 SEQ 0004
1.0 ABSTRACT
THIS DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC IS THE
NINTH IN A SERIES OF DECSYSTEM 2020 PROCESSOR DIAGNOSTICS.
THE DIAGNOSTIC PERFORMS LOGIC TESTING OF THE PROCESSOR
AND MICRO-CODE SHIFT/ROTATE FUNCTIONS.
2.0 REQUIREMENTS
2.1 EQUIPMENT
A DECSYSTEM 2020 EQUIPPED WITH A MINIMUM OF 32K OF MEMORY
CONSOLE PROCESSOR
CONSOLE TELETYPE
LOAD DEVICE
2.2 STORAGE
THE PROGRAM RUNS WITHIN 32K OF MEMORY.
2.3 PRELIMINARY PROGRAMS
PREVIOUS PROCESSOR DIAGNOSTICS
3.0 PROGRAM PROCEDURES
3.1 LOADING PROCEDURE
****** NOTE ******
THIS DIAGNOSTIC REQUIRES THAT THE DECSYSTEM 2020 SUBROUTINE
PROGRAM BE RESIDENT IN THE DECSYSTEM 2020.
FOLLOW THE APPROPRIATE DIAGNOSTIC LOADING PROCEDURES.
MAINDEC-10-DSKAI.TXT
PAGE 4 SEQ 0005
3.2 STARTING PROCEDURE
A. SELECT OPERATIONAL CONSOLE DATA SWITCH SETTINGS (REFER TO
4.0 DATA SWITCH FUNCTIONS).
RUN UNDER "SMMON".
THE FOLLOWING QUESTIONS WILL BE ASKED TO
SELECT THE OPERATIONAL SWITCHES:
TELETYPE SWITCH CONTROL ? 0,S OR Y (CR) -
IF THE OPERATOR TYPES "Y", THE FOLLOWING QUESTIONS
ARE ASKED AND THE OPERATOR RESPONDS BY TYPING
THE ANSWER AS SIX OCTAL DIGITS REPRESENTING
THE DESIRED SWITCH SETTINGS.
SPECIFY LH SWITCHES IN OCTAL-
SPECIFY RH SWITCHES IN OCTAL-
IF THE OPERATOR TYPES "0", ZERO'S ARE USED FOR
THE SWITCH SETTINGS.
IF THE OPERATOR TYPES "S", PREVIOUSLY SET SWITCHES
ARE USED. THIS IS ONLY VALID UPON RESTARTING
OF AN INTERRUPTED PROGRAM.
MAINDEC-10-DSKAI.TXT
PAGE 5 SEQ 0006
3.3 OPERATING PROCEDURE
A. TO THROUGHLY TEST ALL HARDWARE, ALL TEST CONTROL DATA
SWITCHES SHOULD BE SET TO 0.
B. WHEN DEBUGGING HARDWARE, SET SWITCHES TO 0. ALLOW THE
TELETYPE TO PRINT THE ERROR MESSAGES. THIS ALLOWS THE
PROGRAM TO RUN A COMPLETE PASS AND THEN THE ERROR MESSAGES
MAY BE CORRELATED TO QUICKLY DIAGNOSE THE FAILURE. IF A
HARDWARE PROBLEM IS SUCH THAT THE ERROR MESSAGES, AFTER THE
FIRST ONE, HAVE NO MEANING (FIRST ERROR CAUSES ALL FOLLOWING
TESTS TO FAIL) SET THE LOOP ON ERROR SWITCH AND RESTART THE
TEST FROM THE BEGINNING. THE FIRST FAILURE WILL THEN CAUSE
THE PROGRAM TO ENTER A LOOP SUITABLE FOR SCOPING.
THE ERROR MESSAGE USED IN CONJUNCTION WITH THE LISTING AND
SCOPING IF NECESSARY SHOULD ALLOW THE FAILING CONPONENT
TO BE ISOLATED AND REPLACED AND/OR REPAIRED.
C. WHEN TAKING MARGINS, SET DATA SWITCHES 'NOPNT' AND 'DING'.
THIS WILL INHIBIT PRINTOUT BUT WILL ALLOW THE TELETYPE
BELL TO BE RUNG WHEN A ERROR OCCURS. IF THE MARGIN OBTAINED
IS UNACCEPTABLE, THE OPERATOR MAY REVERT TO STANDARD SWITCH
SETTINGS FOR DEBUGGING PURPOSES.
D. ERROR INFORMATION MAY BE OBTAINED QUICKLY BY PRINTING
ERRORS ON THE LINE PRINTER.
E. IN THE EVENT OF A PRINT ROUTINE FAILURE THE 'NOPNT' SWITCH
AND THE 'ERSTOP' SWITCH MAY BE SET TO INHIBIT PRINTOUT
BUT HALT THE PROGRAM POINTING TO THE ERROR.
MAINDEC-10-DSKAI.TXT
PAGE 6 SEQ 0007
4.0 DATA SWITCH FUNCTIONS
SWITCH STATE FUNCTION
------ ----- --------
0 ABORT 0 NORMAL OPERATION
1 ABORT AT END OF PASS
1 RSTART NOT USED
2 TOTALS NOT USED
3 NOPNT 0 NORMAL TYPEOUT
1 INHIBIT ALL PRINT/TYPEOUT
(EXCEPT FORCED)
4 PNTLPT 0 NORMAL OUTPUT TO TTY
1 PRINT ALL DATA ON LPT
(LOGICAL DEVICE, USER MODE)
5 DING 0 NO FUNCTION
1 RING TTY BELL ON ERROR
6 LOOPER 0 PROCEED TO NEXT TEST
1 ENTER SCOPE LOOP ON TEST ERROR
7 ERSTOP 0 NO FUNCTION
1 HALT ON TEST ERROR
8 PALERS 0 PRINT ONLY FIRST ERROR WHEN LOOPING
1 PRINT ALL ERRORS, EVEN IF SAME ERROR
9 RELIAB NOT USED
10 TXTINH 0 PRINT FULL ERROR MESSAGES.
1 INHIBIT COMMENT PORTION OF
ERROR MESSAGES.
11 INHPAG 0 ALLOW PAGING AND TRAP ENABLE
1 INHIBIT PAGING AND TRAPPING
12 MODDVC NOT USED
13 INHCSH 0 ALLOW CACHE USE
1 INHIBIT CACHE
MAINDEC-10-DSKAI.TXT
PAGE 7 SEQ 0008
5.0 ERRORS
ERRORS ARE PRINTED ON THE TTY OR LINE PRINTER. THE ERROR
PRINTOUT CONTAINS THE TEST TITLE, THE PC OF THE FAILURE, ERROR
NUMBER AND THE CONTENTS OF AN APPLICABLE AC.
THE PC VALUE IS USEFUL IN RELATING THE FAILURE TO THE LISTING.
THE ERROR NUMBER IS PROVIDED SUCH THAT AN ERROR DICTIONARY MAY
BE MADE AT SOME FUTURE DATE.
IF AN AUDIO INDICATION OF A CONTINUING ERROR IS DESIRED
THE 'DING' SWITCH MAY BE SET.
6.0 ITERATION COUNTER
THE ITERATION COUNT OF THE PROGRAM IS PRINTED BY THE
CONSOLE PROCESSOR.
7.0 CYCLE TIME
THE CYCLE TIME OF THE PROGRAM IS IN THE MILLISECOND RANGE AND
IS THEREFORE SUITABLE FOR TAKING MARGINS, VIBRATION TESTS,
ETC.
MAINDEC-10-DSKAI.TXT
PAGE 8 SEQ 0009
8.0 OPERATIONAL VARIATIONS
A. DIAGNOSTIC MONITOR
THE PROGRAM IS USABLE WITH THE DIAGNOSTIC MONITOR TO PROVIDE
RELIABILITY TESTS, ACCEPTANCE TESTS, AND/OR TO PROVIDE A
QUICK METHOD OF ISOLATION OF A FAULT TO A PARTICULAR AREA
OF THE PROCESSOR. CERTAIN PROCEDURES ARE USED WHEN THE
PROGRAM IS USED IN THIS MANNER. THEY ARE:
1. THE DIAGNOSTIC MONITOR TRANSFERS CONTROL TO THE PROGRAM
AND STARTS IT AT LOCATION 30002.
2. MONCTL - LOCATION 30043 IS USED AS THE DIAGNOSTIC MONITOR
CONTROL WORD.
LH = 0, STAND-ALONE OPERATION
-1, RUNNING UNDER DIAGNOSTIC MONITOR
RH = RIGHT HALF OF CONSOLE SWITCHES IF UNDER
DIAGNOSTIC MONITOR CONTROL.
B. USER MODE
TO OUTPUT THE PRINTED ERROR MESSAGES TO A USER SPECIFIED
DEVICE IN USER MODE, ASSIGN THE DESIRED OUTPUT DEVICE TO
DEVICE NAME 'DEV' AND SET SWITCH 'PNTLPT'. THE PHYSICAL
DEVICE USED CAN BE ANY DEVICE THAT CAN ACCEPT ASCII OUTPUT
FORMAT SUCH AS LPT, DSK, DTA, ETC. THE CORRESPONDING
OUTPUT FILE IS 'DSKAI.LPT'
EXAMPLE DEVICE ASSIGNMENT:
.ASSIGN DSK DEV
IN USER MODE THE PROGRAM WILL MAKE 1000(8) PASSES AND THEN
RETURN TO DIAMON COMMAND MODE.
MAINDEC-10-DSKAI.TXT
PAGE 9 SEQ 0010
8.0 OPERATIONAL VARIATIONS (CON'T)
THE OUTPUT FILE (IF USED) MAY THEN BE LISTED BY USING THE
NORMAL MONITOR COMMANDS (PRINT, LIST, TYPE, PIP, ETC.).
IF THE PROGRAM IS ABORTED BEFORE COMPLETION (BY ^C, ETC.) THE
OUTPUT FILE MAY BE CLOSED BY USING THE MONITOR 'REENTER'
COMMAND.
C. SYSTEM EXERCISER
START ADDRESS IS 30003. DATA SWITCHES ARE PRESTORED IN
'SWTEXR' LOC 30023.
9.0 MISCELLANEOUS
THE NON-EX-MEMORY AND PARITY STOP SWITCHES SHOULD BE RESET
(0). THESE ERRORS, ILLEGAL UUO'S AND OTHER ERRORS OF THIS
TYPE ARE HANDLED BY PRINTOUT ON THE TELETYPE.
10.0 LISTING
HISTORY FILE FOR DSKAI SEQ 0011
----------------------
---------------------------------------------------------------
CODE: MAINDEC-10-DSKAI
TITLE: DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9)
VERSION: 0.1
DATE: MARCH 1978
REASON: ORIGINAL RELEASE OF THIS PROGRAM FOR KS-10.
---------------------------------------------------------------
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 1
DSKAIT MAC 29-Mar-78 08:41 CONSOLE DATA SWITCH ASSIGNMENTS, MARCH 1978 SEQ 0012
1 ;DSKAI
2
3 000000 MCNVER==0
4 000001 DECVER==1
5
6
7 XLIST
8 LIST
9 LALL
10
11 NAME \MCNVER,\DECVER^
12
13 TITLE DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1
14 ^
15
16
17 ;LOGICAL SHIFT, ROTATE, ARITMETIC SHIFT (SINGLE & COMBINED)
18
19 ;COPYRIGHT 1978
20 ;DIGITAL EQUIPMENT CORPORATION
21 ;MARLBORO, MASS. 01752
22
23 ;JOHN R. KIRCHOFF
24
25 000137 LOC 137
26 000137 000000 000001 MCNVER,,DECVER
27
28 NOSYM
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 2
DSKAIT MAC 29-Mar-78 08:41 DIAGNOSTIC PARAMETERS SEQ 0013
29 SUBTTL DIAGNOSTIC PARAMETERS
30
31 ;OPERATOR DEFINITIONS
32
33 001000 000000 OPDEF ER1 [1B8]
34 002000 000000 OPDEF ER2 [2B8]
35 003000 000000 OPDEF ER3 [3B8]
36 004000 000000 OPDEF ER4 [4B8]
37 005000 000000 OPDEF ER5 [5B8]
38 006000 000000 OPDEF ER6 [6B8]
39 007000 000000 OPDEF ER7 [7B8]
40 010000 000000 OPDEF ER10 [10B8]
41 011000 000000 OPDEF ER11 [11B8]
42 012000 000000 OPDEF ER12 [12B8]
43 013000 000000 OPDEF ER13 [13B8]
44
45 041423 LUUO1=ERRMES
46 041423 LUUO2=ERRMES
47 041423 LUUO3=ERRMES
48 041423 LUUO4=ERRMES
49 041423 LUUO5=ERRMES
50 041423 LUUO6=ERRMES
51 041423 LUUO7=ERRMES
52 041423 LUUO10=ERRMES
53 041423 LUUO11=ERRMES
54 041423 LUUO12=ERRMES
55 041423 LUUO13=ERRMES
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 3
DSKAIT MAC 29-Mar-78 08:41 DIAGNOSTIC PARAMETERS SEQ 0014
56 ;SUBROUTINE ASSEMBLY DEFINITIONS
57
58 000040 DEBUG=40
59 000001 EXCASB=1
60 000001 USRASB=1
61 000001 PGMEND=1
62 000001 ERDIAG=1
63
64 ;SPECIAL FEATURE DEFINITIONS
65
66 030000 SADR1=BEGIN
67 030000 SADR2=BEGIN
68 030000 SADR3=BEGIN
69 030007 SADR4=SRTDDT
70 254000 030061 SADR5=JRST $BEND2
71 254000 030000 SADR6=JRST BEGIN
72 254000 030000 SADR7=JRST BEGIN
73 254000 030000 SADR8=JRST BEGIN
74 254000 030000 SADR9=JRST BEGIN
75 254000 030000 SADR10=JRST BEGIN
76 254000 030000 SADR11=JRST BEGIN
77
78 ;SPECIAL FEATURE PARAMETERS
79
80 000000 PAREA0=0
81 000000 PAREA1=0
82 000000 PAREA2=0
83 446353 415100 PAREA3=SIXBIT/DSKAI/
84 645560 000000 PAREA4=SIXBIT/TMP/
85 000000 PAREA5=0
86 000000 PAREA6=0
87 000001 ITERAT==1
88
89 ;MACROS
90
91 DEFINE SAVEAC (A,B)<
92 MOVEI AC+2,. ;SAVE TEST PC
93 MOVEM AC+2,TESTPC
94 MOVEI AC+2,<AC+2>&17 ;INFORM ERROR ROUTINE WHICH
95 MOVEM AC+2,ERRLOP# ;AC IS USED FOR ITERATION>
96
97 DEFINE SETACS (WW,XX)<
98 MOVEI AC-1,WW ;SETUP AC-1
99 HRLI AC-1,WW ;FOR COMPARISION
100 MOVE AC-2,<AC-1>&17 ;SETUP AC-2 FOR COMPARISON
101 MOVEI AC,XX ;SETUP AC RIGHT
102 HRLI AC,XX ;SETUP AC LEFT
103 MOVEM AC,<AC+1>&17 ;SETUP AC2>
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 4
DSKAIT MAC 29-Mar-78 08:41 DIAGNOSTIC PARAMETERS SEQ 0015
104 ;USER DEFINED MACROS
105
106 DEFINE SR1 (T,D1A,D1B,R1A,R1B,OP,S)<
107 ;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD D1A,D1B] S BIT
108 ;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD R1A,R1B]
109 ;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
110
111 E'T'00: MOVE AC,[XWD D1A,D1B] ;INITIALIZE AC
112 MOVE AC+1,[XWD 741703,607417];INITIALIZE AC+1
113 OP AC,S ;*SHIFT/ROTATE S BIT POSITIONS
114 CAME AC,[XWD R1A,R1B] ;IS RESULT IN AC CORRECT?
115 ER3 AC,T'01 ;RESULT IN AC IS INCORRECT
116 CAME AC+1,[XWD 741703,607417]
117 ER4 AC+1,T'01 ;C(AC+1) WAS MODIFIED INCORRECTLY
118 JUMPL AC+2,E'T'00 ;LOOP ON ERROR SWITCH>
119
120
121 DEFINE SR2 (T,D1A,D1B,D2A,D2B,R1A,R1B,R2A,R2B,OP,S)<
122 ;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
123 ;DATA SPECIFIED IN [XWD D1A,D1B] AND [XWD D2A,D2B] S BIT POSITIONS AND
124 ;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD R1A,R1B] AND
125 ;[XWD R2A,R2B]
126
127 E'T'00: MOVE AC,[XWD D1A,D1B] ;INITIALIZE AC
128 MOVE AC+1,[XWD D2A,D2B] ;INITIALIZE AC+1
129 OP AC,S ;*SHIFT/ROTATE COMBINED S PLACES
130 CAME AC,[XWD R1A,R1B] ;IS RESULT IN AC CORRECT?
131 ER3 AC,T'01 ;RESULT IN AC IS INCORRECT
132 CAME AC+1,[XWD R2A,R2B] ;IS RESULT IN AC+1 CORRECT?
133 ER4 AC+1,T'01 ;RESULT IN AC+1 IS INCORRECT
134 JUMPL AC+2,E'T'00 ;LOOP ON ERROR SWITCH>
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 1
PARAM KSM 28-Mar-78 11:27 CONSOLE DATA SWITCH ASSIGNMENTS, MARCH 1978 SEQ 0016
135 SUBTTL CONSOLE DATA SWITCH ASSIGNMENTS, MARCH 1978
136
137 DEFINE S,<;*********************************************************************>
138
139 S^;*********************************************************************^
140 ;*DATA SWITCHES
141 ;*LEFT HALF SWITCHES ARE PRE-ASSIGNED FOR SUBROUTINE PACKAGE USE
142 ;*AND CONTROL LOOPING, PRINTING (TTY OR OTHER DEVICE) AND MISC. FUNCTIONS
143 S^;*********************************************************************^
144
145 400000 ABORT== 400000 ;ABORT PROGRAM ON PASS COMPLETION
146 200000 RSTART==200000 ;RESTART TEST, PRINT TOTALS
147 100000 TOTALS==100000 ;PRINT TOTALS, CONTINUE
148
149 040000 NOPNT== 040000 ;INHIBIT ALL PRINT/TYPE OUT (EXCEPT FORCED)
150 020000 PNTLPT==020000 ;PRINT ALL DATA ON LPT (LOGICAL DEVICE, USER MODE)
151 010000 DING== 010000 ;RING BELL ON ERROR
152
153 004000 LOOPER==004000 ;ENTER EXERCISE/CHECK LOOP ON ERROR
154 002000 ERSTOP==002000 ;HALT ON TEST ERROR
155 001000 PALERS==001000 ;PRINT ALL ERRORS
156
157 000400 RELIAB==000400 ;RELIABILITY MODE
158 000200 TXTINH==000200 ;INHIBIT ERROR TEXT
159 000100 INHPAG==000100 ;INHIBIT PAGING
160
161 000040 MODDVC==000040 ;MODIFY DEVICE CODE
162 000020 INHCSH==000020 ;INHIBIT CACHE
163 000010 OPRSEL==000010 ;OPERATOR SELECTION
164
165 000004 CHAIN== 000004 ;CHAIN CONTROL SWITCH
166
167 ;SWITCH 16 RESERVED
168
169 ;SWITCH 17 RESERVED !!!
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 2
PARAM KSM 28-Mar-78 11:27 PROGRAM/SUBROUTINE PARAMETERS SEQ 0017
170 SUBTTL PROGRAM/SUBROUTINE PARAMETERS
171
172 S^;*********************************************************************^
173 ;*SPECIAL SUBPROGRAM LINKAGES
174 S^;*********************************************************************^
175
176 027772 FSELNK= 27772 ;FILE SELECT LINK
177 027773 FRDLNK= 27773 ;FILE READ LINK
178 027774 LDLNK= 27774 ;LOAD LINKAGE ADDRESS
179 027775 DDTLNK= 27775 ;DDT LINKAGE ADDRESS
180 027776 MODLNK= 27776 ;OPERATIONAL MODE CHECK LINKAGE ADDRESS
181 027777 SUBLNK= 27777 ;SUBROUTINE LINKAGE ADDRESS
182
183 S^;*********************************************************************^
184 ;*SPECIAL SUBROUTINE FATAL HALTS
185 ;*USED TO REPORT ERRORS THAT CAUSE THE SUBROUTINES TO BE UNUSABLE
186 S^;*********************************************************************^
187
188 ;ADDRESS TAG REASON
189 ;---------------------
190
191 ; 1010 NOEXEC ;PROGRAM NOT CODED FOR EXEC MODE OPERATION
192 ; 1011 PLERR ;FATAL PUSH LIST POINTER ERROR
193 ; 1012 PLERR1 ;INITIAL PUSH LIST POINTER ERROR
194 ; 1013 MUOERR ;MUUO WITH LUUO HANDLER WIPED OUT
195 ; 1014 SMBER ;KS-10 INTERRUPT WITHOUT DOORBELL
196 ; 1015 SMCER ;KS-10 CLOCK INTERRUPT WITHOUT FLAG SET
197 ; 1016 CPIERR ;CPU INITIALIZATION ERROR
198 ; 1017 EOPERR ;END OF PROGRAM ERROR
199 ; 1020 LUOERR ;INTERRUPT WITH LUUO HANDLER WIPED OUT
200
201 S^;*********************************************************************^
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 3
PARAM KSM 28-Mar-78 11:27 PROGRAM/SUBROUTINE PARAMETERS SEQ 0018
202 S^;*********************************************************************^
203 ;OPERATOR DEFINITIONS (NON-UUO'S)
204 S^;*********************************************************************^
205
206 260740 000000 OPDEF GO [PUSHJ P,] ;SUBROUTINE CALL
207 263740 000000 OPDEF RTN [POPJ P,] ;SUBROUTINE RETURN
208 261740 000000 OPDEF PUT [PUSH P,] ;PUT DATA ON PUSH LIST
209 262740 000000 OPDEF GET [POP P,] ;GET DATA FROM PUSH LIST
210 254000 000000 OPDEF PJRST [JRST ] ;JRST TO ROUTINE THAT RTN'S
211 254200 000000 OPDEF HALT [JRST 4,] ;DEFINITION FOR DDT
212 254100 000000 OPDEF JRSTF [JRST 2,] ;DEFINITION FOR DDT
213 254500 000000 OPDEF JEN [JRST 12,] ;DEFINITION FOR DDT
214
215 S^;*********************************************************************^
216 ;*SUBROUTINE INITIALIZATION CALL
217 S^;*********************************************************************^
218
219 265000 030011 OPDEF PGMINT [JSP 0,SBINIT] ;SUBROUTINE INITIALIZATION
220
221 S^;*********************************************************************^
222 ;*HALTING UUO'S (A MORE GRACEFUL HALT THAN SIMPLY USING THE HALT INSTRUCTION).
223 S^;*********************************************************************^
224
225 037640 000004 OPDEF FATAL [37B8!15B12!4] ;FATAL PROGRAMMING HALT
226 037600 000004 OPDEF ERRHLT [37B8!14B12!4] ;PROGRAM ERROR HALT
227
228 S^;*********************************************************************^
229 ;*TERMINAL INPUT UUO'S
230 ;*ALWAYS COME FROM THE CONSOLE TERMINAL IN EXEC MODE OR THE
231 ;*CONTROLLING TERMINAL (REAL TERMINAL OR PTY) IN USER MODE.
232 S^;*********************************************************************^
233
234 037000 000003 OPDEF TTICHR [37B8!0B12!3] ;TTY, INPUT ANY CHARACTER
235 037040 000003 OPDEF TTIYES [37B8!1B12!3] ;TTY, NORMAL RETURN Y
236 037100 000003 OPDEF TTINO [37B8!2B12!3] ;TTY, NORMAL RETURN N
237 037140 000003 OPDEF TTIOCT [37B8!3B12!3] ;TTY, INPUT OCTAL WORD
238 037200 000003 OPDEF TTIDEC [37B8!4B12!3] ;TTY, INPUT DECIMAL WORD
239 037240 000003 OPDEF TTICNV [37B8!5B12!3] ;TTY, INPUT CONVERTABLE WORD
240 037300 000003 OPDEF TTLOOK [37B8!6B12!3] ;TTY, KEYBOARD CHECK
241 037340 000003 OPDEF TTALTM [37B8!7B12!3] ;TTY, ALT-MODE CHECK
242 037400 000003 OPDEF TTSIXB [37B8!10B12!3] ;TTY, INPUT SIXBIT WORD
243 037440 000003 OPDEF TTYINP [37B8!11B12!3] ;TTY, IMAGE MODE INPUT
244 037500 000003 OPDEF TTICLR [37B8!12B12!3] ;TTY, CLEAR INPUT
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 4
PARAM KSM 28-Mar-78 11:27 PROGRAM/SUBROUTINE PARAMETERS SEQ 0019
245 ;*TERMINAL OUTPUT UUO'S.
246
247 037000 000000 OPDEF PNTA [37B8!0B12!0] ;PRINT ASCII WORD
248 037000 000001 OPDEF PNTAF [37B8!0B12!1] ;PRINT ASCII WORD FORCED
249 037740 000000 OPDEF PNTAL [37B8!17B12!0] ;PRINT ASCIZ LINE
250 037740 000001 OPDEF PNTALF [37B8!17B12!1] ;PRINT ASCIZ LINE FORCED
251 037600 000003 OPDEF PSIXL [37B8!14B12!3] ;PRINT SIXBIT'Z LINE
252 037640 000003 OPDEF PSIXLF [37B8!15B12!3] ;PRINT SIXBIT'Z LINE FORCED
253 037000 000000 OPDEF PNTMSG [37B8!0B12!0] ;PRINT MESSAGE IMMEDIATE
254 037040 000000 OPDEF PNTMSF [37B8!1B12!0] ;PRINT MESSAGE IMMEDIATE FORCED
255 037100 000000 OPDEF PSIXM [37B8!2B12!0] ;PRINT SIXBIT'Z MSG IMMEDIATE
256 037200 000000 OPDEF PSIXMF [37B8!4B12!0] ;PRINT SIXBIT'Z MSG IMM FORCED
257 037000 000000 OPDEF PNTCI [37B8!0B12!0] ;PRINT CHARACTER IMMEDIATE
258 037040 000000 OPDEF PNTCIF [37B8!1B12!0] ;PRINT CHARACTER IMMEDIATE FORCED
259 037500 000000 OPDEF PNTCHR [37B8!12B12!0] ;PRINT CHARACTER
260 037500 000001 OPDEF PNTCHF [37B8!12B12!1] ;PRINT CHARACTER FORCED
261 037040 000000 OPDEF PNT1 [37B8!1B12!0] ;PRINT ONE OCTAL DIGIT
262 037040 000001 OPDEF PNT1F [37B8!1B12!1] ;PRINT 1 OCTAL DIGIT FORCED
263 037100 000000 OPDEF PNT2 [37B8!2B12!0] ;PRINT TWO OCTAL DIGITS
264 037100 000001 OPDEF PNT2F [37B8!2B12!1] ;PRINT 2 OCTAL DIGITS FORCED
265 037140 000000 OPDEF PNT3 [37B8!3B12!0] ;PRINT THREE OCTAL DIGITS
266 037140 000001 OPDEF PNT3F [37B8!3B12!1] ;PRINT THREE OCTAL DIGITS FORCED
267 037200 000000 OPDEF PNT4 [37B8!4B12!0] ;PRINT FOUR OCTAL DIGITS
268 037200 000001 OPDEF PNT4F [37B8!4B12!1] ;PRINT FOUR OCTAL DIGITS FORCED
269 037240 000000 OPDEF PNT5 [37B8!5B12!0] ;PRINT FIVE OCTAL DIGITS
270 037240 000001 OPDEF PNT5F [37B8!5B12!1] ;PRINT FIVE OCTAL DIGITS FORCED
271 037300 000000 OPDEF PNT6 [37B8!6B12!0] ;PRINT SIX OCTAL DIGITS
272 037300 000001 OPDEF PNT6F [37B8!6B12!1] ;PRINT SIX OCTAL DIGITS FORCED
273 037340 000000 OPDEF PNT7 [37B8!7B12!0] ;PRINT 7 OCTAL DIGITS
274 037340 000001 OPDEF PNT7F [37B8!7B12!1] ;PRINT 7 OCTAL DIGITS FORCED
275 037440 000000 OPDEF PNT11 [37B8!11B12!0] ;PRINT 11 OCTAL DIGITS
276 037440 000001 OPDEF PNT11F [37B8!11B12!1] ;PRINT 11 OCTAL DIGITS FORCED.
277 037400 000000 OPDEF PNTADR [37B8!10B12!0] ;PRINT PHYSICAL ADDRESS
278 037400 000001 OPDEF PNTADF [37B8!10B12!1] ;PRINT PHYSICAL ADDRESS FORCED
279 037600 000000 OPDEF PNTOCT [37B8!14B12!0] ;PRINT FULL WORD OCTAL
280 037600 000001 OPDEF PNTOTF [37B8!14B12!1] ;PRINT FULL WORD OCTAL FORCED
281 037540 000000 OPDEF PNTHW [37B8!13B12!0] ;PRINT OCTAL HALF WORDS, 6 SP 6
282 037540 000001 OPDEF PNTHWF [37B8!13B12!1] ;PRINT OCTAL HALF WORDS, 6 SP 6 FORCED
283 037700 000003 OPDEF PNTOCS [37B8!16B12!3] ;PRINT OCTAL, SUPPRESS LEADING 0'S
284 037740 000003 OPDEF PNTOCF [37B8!17B12!3] ;PRINT OCTAL, SUPPRESS LEADING 0'S FORCED
285 037640 000000 OPDEF PNTDEC [37B8!15B12!0] ;PRINT DECIMAL, SUPRESS LEADING 0'S
286 037640 000001 OPDEF PNTDCF [37B8!15B12!1] ;PRINT DECIMAL, SUPRESS LEADING 0'S FORCED
287 037700 000000 OPDEF PNTDS [37B8!16B12!0] ;PRINT DECIMAL, SPACES FOR LD 0'S
288 037700 000001 OPDEF PNTDSF [37B8!16B12!1] ;PRINT DECIMAL, SPACES FOR LD 0'S FORCED
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 5
PARAM KSM 28-Mar-78 11:27 PROGRAM/SUBROUTINE PARAMETERS SEQ 0020
289 037200 000002 OPDEF PNTNM [37B8!4B12!2] ;PRINT PROGRAM NAME
290 037000 000002 OPDEF PNTSIX [37B8!0B12!2] ;PRINT SIXBIT WORD
291 037040 000002 OPDEF PNTSXF [37B8!1B12!2] ;PRINT SIXBIT WORD FORCED
292 037240 000002 OPDEF DROPDV [37B8!5B12!2] ;CLOSE LOGICAL FILE, USER MODE
293 037100 000002 OPDEF PNTCW [37B8!2B12!2] ;PRINT DF10 CONTROL WORD
294 037140 000002 OPDEF PNTCWF [37B8!3B12!2] ;PRINT DF10 CONTROL WORD FORCED
295 037000 030242 OPDEF PCRL [37B8!0B12!CRLF] ;PRINT CARRIAGE RETURN/LINE FEED
296 037040 030242 OPDEF PCRLF [37B8!1B12!CRLF] ;PRINT CARRIAGE RETURN/LINE FEED FORCED
297 037000 000040 OPDEF PSP [37B8!0B12!40] ;PRINT SPACE
298 037040 000040 OPDEF PSPF [37B8!1B12!40] ;PRINT SPACE FORCED
299 037000 030243 OPDEF PCRL2 [37B8!0B12!CRLF2] ;PRINT CARRIAGE RETURN/LINE FEED (TWICE)
300 037040 030243 OPDEF PCRL2F [37B8!1B12!CRLF2] ;PRINT CARRIAGE RETURN/LINE FEED (TWICE) FORCED
301 037040 000007 OPDEF PBELL [37B8!1B12!7] ;PRINT TTY BELL
302
303 037040 000026 OPDEF PFORCE [37B8!1B12!26] ;PRINT FORCE, CONTROL O OVERRIDE
304
305 DEFINE PMSG (ARG),<
306 PSIXM [SIXBIT\ARG'_\]>
307
308 DEFINE PMSGF (ARG),<
309 PSIXMF [SIXBIT\ARG'_\]>
310
311 ;*SIXBTZ -- MACRO TO GENERATE SIXBIT DATA FOR PRINTING
312 ;* CONSERVES CORE OVER ASCIZ
313
314 DEFINE SIXBTZ (ARG),< [SIXBIT\ARG'_\]>
315
316 ;*CONSOLE SWITCH INPUT UUO.
317 ;*READS CONSOLE SWITCHES IF IN EXEC MODE OR ASKS FOR THEM IF
318 ;* USER MODE.
319
320 037400 000002 OPDEF SWITCH [37B8!10B12!2] ;INPUT CONSOLE SWITCHES
321
322 ;*CLOCK INITIALIZATION UUO - TO SET DESIRED CLOCK OPERATION
323 ;*EITHER IGNORE CLOCK, ONLY LET IT TICK OR CAUSE INTERRUPT TO OCCUR.
324
325 037540 000004 OPDEF CLOKOP [37B8!13B12!4] ;CLOCK OPERATION UUO - CLOCK
326 037200 000004 OPDEF MTROP [37B8!4B12!4] ;CLOCK OPERATION UUO - METER
327
328 ;*KS-10 CACHE OPERATION UUO'S
329
330 037040 000004 OPDEF CINVAL [37B8!1B12!4] ;CACHE INVALIDATE
331 037100 000004 OPDEF CFLUSH [37B8!2B12!4] ;CACHE FLUSH
332 037140 000004 OPDEF CWRTBI [37B8!3B12!4] ;CACHE WRITE-BACK & INVALIDATE
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 6
PARAM KSM 28-Mar-78 11:27 PROGRAM/SUBROUTINE PARAMETERS SEQ 0021
333 ;*END OF PASS/PROGRAM UUOS
334
335 ;PERFORMS THE END OF PASS FUNCTIONS. INCREMENT PASS COUNT,
336 ;*DECREMENT ITERATION COUNT, CHECK IF FINISHED WITH THIS PROGRAM ETC.
337
338 037500 000004 OPDEF ENDUUO [37B8!12B12!4] ;UUO TO DISPLAY LIGHTS
339 037700 000004 OPDEF EOPUUO [37B8!16B12!4] ;END OF PROGRAM UUO
340
341 ;*MEMORY MANAGEMENT UUO'S
342 ;*UUO'S TO PERFORM VARIOUS MEMORY FUNCTIONS. MAPPING, ZEROING, PAGING,
343 ;*ADDRESS CONVERSION, ETC...
344
345 037000 000004 OPDEF MAPMEM [37B8!0B12!4] ;MAP MEMORY
346 037500 000002 OPDEF MEMZRO [37B8!12B12!2] ;ZERO MEMORY
347 037440 000002 OPDEF MEMSEG [37B8!11B12!2] ;SETUP MEMORY SEGMENT
348 037540 000002 OPDEF MAPADR [37B8!13B12!2] ;VIRTUAL TO PHYSICAL ADR CONVERT
349 037640 000002 OPDEF MAPCNK [37B8!15B12!2] ;MAP MEMORY CHUNK
350 037600 000002 OPDEF MAPSET [37B8!14B12!2] ;SET KI10 EXEC PAGE MAP
351 037740 000002 OPDEF MAPPNT [37B8!17B12!2] ;PRINT MEMORY MAP
352
353 ;*DEVICE CODE MODIFICATION UUO
354 ;*ALLOWS THE MODIFICATION OF IOT'S TO ONE DEVICE TO BE CHANGED TO
355 ;*IOT'S TO A DIFFERENT DEVICE CODE.
356
357 037340 000002 OPDEF MODPCU [37B8!7B12!2] ;MODIFY PERHIPERAL CODE, USER
358 037300 000002 OPDEF MODPCP [37B8!6B12!2] ;MODIFY PERHIPERAL CODE, PROGRAM
359
360 030000 IFNDEF MODDVL,<MODDVL==BEGIN>
361 030000 IFNDEF MODDVU,<MODDVU==BEGIN>
362
363 ;*"DIAMON" FILE SELECTION AND READ UUOS
364
365 037240 000004 OPDEF FSELECT [37B8!5B12!4] ;FILE SELECTION
366 037300 000004 OPDEF FREAD [37B8!6B12!4] ;FILE READ - ASCII DATA
367 037340 000004 OPDEF FRD36 [37B8!7B12!4] ;FILE READ - 36 BIT DATA
368 037400 000004 OPDEF FRD8 [37B8!10B12!4] ;FILE READ - 8 BIT DATA
369
370 XLIST
371 IFNDEF EROLD,<LIST
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 7
PARAM KSM 28-Mar-78 11:27 ERROR HANDLING UUO DEFINITIONS SEQ 0022
372 SUBTTL ERROR HANDLING UUO DEFINITIONS
373
374 S^;*********************************************************************^
375 ;*ERROR HANDLER PARAMETERS
376 S^;*********************************************************************^
377
378 036000 000000 OPDEF ERUUO [36B8] ;ERROR CALL UUO
379 035000 000000 OPDEF ERLOOP [35B8] ;ERROR LOOP, CHECKS PC,REPT,REPT1,ERROR
380 035040 000000 OPDEF ERLP1 [35B8!1B12] ;ERROR LOOP IF PC'S MATCH
381 035100 000000 OPDEF ERLP2 [35B8!2B12] ;ERROR LOOP IF ANY ERROR
382 034000 000000 OPDEF REPTUO [34B8] ;REPEAT LOOP UUO
383
384 ;*THE ERROR HANDLER MACROS
385
386 ;*A MACRO TO REPORT AN ERROR AND LOOP
387
388 DEFINE ERROR (ADR,FORMAT,CORECT,ACTUAL,F,D,ERR)<
389 SALL
390 ERUUO FORMAT,[T,,[SIXBIT\F'_\]
391 CORECT,,ACTUAL
392 [SIXBIT\D'_\],,ERR]
393 XALL
394 ERLOOP ADR ;IF ERROR, LOOP TO ADR
395 >
396
397 ;*A MACRO TO REPORT AN ERROR AND NOT LOOP
398
399 DEFINE ERROR1 (FORMAT,CORECT,ACTUAL,F,D,ERR)<
400 SALL
401 ERUUO FORMAT,[T,,[SIXBIT\F'_\]
402 CORECT,,ACTUAL
403 [SIXBIT\D'_\],,ERR]
404 XALL>
405
406 >;END OF EROLD CONDITIONAL
407
408 XLIST
409 LIST
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 1
FIXED KSM 28-Mar-78 11:28 *FIXED* FIXED CONTROL AND DISPATCH STORAGE, MARCH 1978 SEQ 0023
410 SUBTTL *FIXED* FIXED CONTROL AND DISPATCH STORAGE, MARCH 1978
411
412 030000 LOC 30000
413
414 S^;*********************************************************************^
415 ;*PROGRAM STARTING ADDRESSES
416 ;*THESE ADDRESSES CALL VARIOUS SPECIAL START ROUTINES AND OR OPTIONS
417 ;*NORMAL START ADDRESS IS 30000 ALL OTHERS ARE SPECIAL. INVOKED BECAUSE
418 ;*OF END OF PASS, POWER FAILURE, DDT START, RE-ENTERING(TYPICALLY USER
419 ;*MODE), OR ANY NUMBER OF SPECIAL FEATURE TESTS.
420 S^;*********************************************************************^
421
422 030000 254 00 1 00 027776 BEGIN: JRST @MODLNK ;STAND-ALONE START
423 030001 254 00 0 00 030620 $START: JRST START ;MODE CHECK STARTING ADDRESS
424
425 030002 254 00 1 00 027774 DIAGMN: JRST @LDLNK ;DIAGNOSTIC MONITOR START
426
427 030003 254 00 1 00 027774 SYSEXR: JRST @LDLNK ;SYSTEM EXERCISER START
428
429 030004 254 00 0 00 030000 SFSTRT: JRST SADR1 ;SPECIAL FEATURE START
430
431 030005 254 00 0 00 030000 PFSTRT: JRST SADR2 ;POWER FAIL RESTART
432
433 030006 254 00 0 00 030000 REENTR: JRST SADR3 ;REENTER START(USUALLY USER MODE ONLY)
434
435 030007 SRTDDT: ;COMMONLY MISTAKEN NAME FOR "DDTSRT"
436 030007 254 00 1 00 027775 DDTSRT: JRST @DDTLNK ;DDT START
437
438 030010 254 00 0 00 030623 BEGIN1: JRST STARTA ;LOOP START(END OF PASS COMES HERE)
439 030011 254 00 1 00 027777 SBINIT: JRST @SUBLNK ;PMGINT LINKAGE
440 030012 000000 000000 RETURN: 0 ;RETURN ADDRESS STORAGE
441
442 030013 254000 030000 START1: SADR7 ;OPTIONAL STARTING ADR/INSTRUCTIONS
443 030014 254000 030000 START2: SADR8 ; "
444 030015 254000 030000 START3: SADR9 ; "
445 030016 254000 030000 START4: SADR10 ; "
446 030017 254000 030000 START5: SADR11 ; "
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 2
FIXED KSM 28-Mar-78 11:28 *FIXED* FIXED CONTROL AND DISPATCH STORAGE, MARCH 1978 SEQ 0024
447 S^;*********************************************************************^
448 ;*PROGRAM FIXED PARAMETER AREA
449 S^;*********************************************************************^
450
451 030020 446353 415100 PNTNAM: PAREA3 ;SIXBIT PROGRAM NAME
452 030021 645560 000000 PNTEXT: PAREA4 ;SIXBIT PROGRAM EXTENSION
453 030022 000000 000000 RANDBS: PAREA1 ;RANDOM BASE NUMBER
454 030023 000000 000000 SWTEXR: PAREA2 ;SYSTEM EXERCISER SWITCHES
455 030024 000000 000001 ITRCNT: ITERAT ;PROGRAM ITERATIONS
456 030025 000000 030602 $PNAME: PGMNAM ;POINTER TO PROGRAMS NAME
457 030026 000000 000001 $PVER: MCNVER,,DECVER ;MCN & DEC VERSION LEVEL
458 030027 000000 030000 $MODVL: MODDVL ;DEVICE CODE CHANGE LOWER LIMIT
459 030030 000000 030000 $MODVU: MODDVU ;DEVICE CODE CHANGE UPPER LIMIT
460 030031 777777 777777 $EMODE: IFNDEF EXCASB,<0> IFDEF EXCASB,<-1> ;EXEC ALLOWED
461 030032 777777 777777 $UMODE: IFNDEF USRASB,<0> IFDEF USRASB,<-1> ;USER ALLOWED
462 030033 000000 000000 $DSKUP: IFNDEF DSKUPD,<0> IFDEF DSKUPD,<-1> ;DISK UPDATE MODE
463 030034 000000 000000 $MMAP: IFNDEF MEMMAP,<0> IFDEF MEMMAP,<-1> ;ALLOW MEMORY RTNS
464 030035 000000 000000 PAREA7: PAREA5 ;OPTIONAL PARAMETER
465 030036 000000 000000 PAREA8: PAREA6 ;OPTIONAL PARAMETER
466
467 S^;*********************************************************************^
468 ;*PROGRAM VARIABLE PARAMETER AREA
469 S^;*********************************************************************^
470
471 030037 000000 000000 USER: 0 ; 0 = EXEC, -1 = USER MODE FLAG
472 030040 000000 000000 KAIFLG: 0 ;PROCESSOR TYPE, 0 = KA10, -1 = KI10
473 030041 000000 000000 KLFLG: 0 ;PROCESSOR TYPE, 0 = KA/KI, -1 = KL10
474 030042 777777 777777 MONFLG: -1 ;DIAG MONITOR SPECIAL USER FLAG
475 030043 000000 000000 MONCTL: 0 ;DIAG MON/SYS EXR FLAG
476 030044 000000 000000 MONTEN: 0 ;-1= LOADED BY 10
477 030045 000000 000000 CLOCKF: 0 ;CLOCK TICKED FLAG
478 030046 000000 000000 CONSW: 0 ;CONSOLE SWITCH SETTINGS
479 030047 000000 000000 PASCNT: 0 ;PROGRAM PASS COUNT
480 030050 000000 000000 RUNFLG: 0 ;PROGRAM RUN FLAG
481 030051 000000 000000 TESTPC: 0 ;SUBTEST PC
482 030052 000000 000000 ERRPC: 0 ;ERROR PC
483 030053 000000 000000 ERRTLS: 0 ;ERROR TOTALS
484 030054 000000 000000 TICKS: 0 ;PROGRAM RUNNING TIME
485 030055 000000 000000 MARGIN: 0 ;KI10 MARGIN WORD VALUE
486 030056 000000 000000 $ONETM: 0 ;SUBROUTINE INITIALIZATION FLAG
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 3
FIXED KSM 28-Mar-78 11:28 *FIXED* FIXED CONTROL AND DISPATCH STORAGE, MARCH 1978 SEQ 0025
487 S^;*********************************************************************^
488 ;*SPECIAL PROGRAM DISPATCH ADDRESSES
489 S^;*********************************************************************^
490
491 030057 037 12 0 00 000004 BEGEND: ENDUUO ;END OF PASS
492 030060 254 00 0 00 030010 $BEND1: JRST BEGIN1 ;KEEP RUNNING PROGRAM
493 030061 037 16 0 00 000004 $BEND2: EOPUUO ;END OF PROGRAM - NO RETURN
494 030062 254000 030061 CNTLC: SADR5 ;CONTROL C XFER ADDRESS
495 030063 254000 030000 ALTMGO: SADR6 ;ALTMODE XFER ADDRESS
496 030064 CPOPJ1: ;SKIP RETURN
497 030064 350 00 0 17 000000 UUOSKP: AOS (P) ;SKIP RETURN FROM UUO
498 030065 CPOPJ: ;NON-SKIP REGULAR RETURN
499 030065 263 17 0 00 000000 UUOEXT: RTN ;UUO RETURN
500 030066 255 00 0 00 000000 UUORTN: JFCL ;ADDITIONAL USERS UUO ROUTINE
501 030067 255 00 0 00 000000 $UORTX: JFCL ;ADDITIONAL UUO LINKAGE
502 030070 255 00 0 00 000000 $UUOER: JFCL ;INITED AS (JRST $UOERX)
503 030071 255 00 0 00 000000 $ITRHL: JFCL ;ADDITIONAL INTERRUPT LINKAGE
504 030072 255 00 0 00 000000 $ITRX1: JFCL ; "
505 030073 255 00 0 00 000000 $USRHL: JFCL ; "
506 030074 255 00 0 00 000000 $RSRTX: JFCL ;ADDITIONAL POWER FAIL LINKAGE
507 030075 255 00 0 00 000000 $RSRTY: JFCL ; "
508 030076 255 00 0 00 000000 RESRT1: JFCL ; INITED AS (JRST RESRTX)
509 030077 255 00 0 00 000000 RESRT2: JFCL ; "
510 030100 255 00 0 00 000000 $PARER: JFCL ;ADDITIONAL PARITY ERROR LINKAGE
511 030101 255 00 0 00 000000 ERMORE: JFCL ;ADDITIONAL ERROR HANDLER LINKAGE
512 030102 254 04 0 00 030102 HALT . ;IMPROPER TRANSFER HALT
513
514 030103 000000 000000 $PSHER: 0 ;INITED AS (JRST PSHERR)
515 030104 000000 000000 ITRCH1: 0 ;PC & FLAGS OF CURRENT INTERRUPT
516 030105 000000 000000 0 ;INITED AS (JRST $ITRC1)
517
518 S^;*********************************************************************^
519 ;*PROCESSOR CONTROL STORAGE
520 S^;*********************************************************************^
521
522 030106 000000 000000 $ACC0: 0 ;INTERRUPT SAVED AC0
523 030107 000000 000000 $SVPI: 0 ;INTERRUPT SAVED PI
524 030110 000000 000000 $SVAPR: 0 ;INTERRUPT SAVED APR
525 030111 000000 000000 $SVPAG: 0 ;INTERRUPT SAVED PAG (DATAI)
526 030112 000000 000000 $SPAG1: 0 ;INTERRUPT SAVED PAG (CONI)
527
528 030113 000000 000000 $SVUUO: 0 ;CURRENT USERS UUO
529 030114 000000 000000 $SVUPC: 0 ;PC OF CURRENT USERS UUO
530
531 030115 000000 000000 REPTU: 0 ;REPEAT UUO ITERATIONS
532 030116 000000 000000 SCOPE: 0 ;ERROR HANDLER SCOPE LOOP FLAG
533 030117 000000 000000 %CORFLG:0 ; " CORRECT FLAG
534 030120 000000 000000 %COREC: 0 ; " CORRECT DATA
535 030121 000000 000000 %ACTFL: 0 ; " ACTUAL FLAG
536 030122 000000 000000 %ACTUL: 0 ; " ACTUAL DATA
537 030123 000000 000000 %DISCR: 0 ; " DISCREPENCY DATA
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 4
FIXED KSM 28-Mar-78 11:28 *FIXED* FIXED CONTROL AND DISPATCH STORAGE, MARCH 1978 SEQ 0026
538 S^;*********************************************************************^
539 ;*UUO DISPATCH TABLE
540 S^;*********************************************************************^
541 XLIST
542 LIST
543 030124 041423 030070 UUODIS: LUUO1,,$UUOER
544 030125 041423 041423 LUUO3,,LUUO2
545 030126 041423 041423 LUUO5,,LUUO4
546 030127 041423 041423 LUUO7,,LUUO6
547 030130 041423 041423 LUUO11,,LUUO10
548 030131 041423 041423 LUUO13,,LUUO12
549 030132 030070 030070 LUUO15,,LUUO14
550 030133 030070 030070 LUUO17,,LUUO16
551 030134 030070 030070 LUUO21,,LUUO20
552 030135 030070 030070 LUUO23,,LUUO22
553 030136 030070 030070 LUUO25,,LUUO24
554 030137 030070 030070 LUUO27,,LUUO26
555 030140 030070 030070 LUUO31,,LUUO30
556 030141 030070 030070 LUUO33,,LUUO32
557
558 S^;*********************************************************************^
559 ;*MEMORY MANAGMENT STORAGE
560 S^;*********************************************************************^
561
562 030142 000000 000000 DF22F: 0 ;DF10 CONTROL FLAG, 0 = 18, -1 = 22 BIT
563 030143 000000 000000 MAPNEW: 0 ;MEMORY MAPPING CONTROL FLAG, -1 = 4096K MAPPING
564 030144 000000 000000 MEMTOT: 0 ;TOTAL MEMORY SIZE IN K (1024.)
565 030145 000000 000000 MEMLOW: 0 ;LOWEST USABLE MEMORY
566 030146 MEMSIZ: BLOCK ^D41 ;MEMORY SEGMENT POINTER TABLE
567
568 S^;*********************************************************************^
569 ;*PRINT CONTROL STORAGE
570 S^;*********************************************************************^
571
572 030217 000000 000000 PNTFLG: 0 ;PRINT FLAG, -1 WHILE IN PRINT ROUTINE
573 030220 000000 000000 PNTENB: 0 ;PRINT ENABLE
574 030221 000000 000000 PDISF: 0 ;PRINT DISABLED FLAG
575 030222 000000 000000 PNTINH: 0 ;INHIBIT PRINT INPUT CHECKS
576 030223 000000 000000 PNTSPC: 0 ;PRINT SPACE CONTROL
577 030224 000000 000000 OPTIME: 0 ;TYPE-IN WAIT TIME
578 030225 000000 000000 $TWCNT: 0 ;TIME WAITED
579 030226 000000 000000 $DVOFF: 0 ;LOGICAL DEVICE INITED FLAG
580 030227 000000 000000 TTYFIL: 0 ;TTY EXEC FILLERS FLAG
581 030230 000000 000000 TTYSPD: 0 ;TTY EXEC BAUD RATE
582 030231 000000 000000 $TTCHR: 0 ;ACTUAL TYPED IN CHAR
583 030232 000000 000000 $CHRIN: 0 ;UPPER CASED & PARITY STRIPPED CHAR
584 030233 000000 000000 $TYPNB: 0 ;TYPED IN NUMBER
585 030234 000000 000000 $CRLF: 0 ;FREE CR/LF FLAG
586 030235 000000 000000 $TABF: 0 ;TAB CONVERSION FLAG
587 030236 000000 000000 $FFF: 0 ;FORM FEED CONVERSION FLAG
588 030237 000000 000000 $VTF: 0 ;VERTICAL TAB CONVERSION FLAG
589 030240 000000 000000 USRLFF: 0 ;USER LF FILLERS
590 030241 000000 000000 USRCRF: 0 ;USER CR FILLERS
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 5
FIXED KSM 28-Mar-78 11:28 *FIXED* FIXED CONTROL AND DISPATCH STORAGE, MARCH 1978 SEQ 0027
591 S^;*********************************************************************^
592 ;*THE FOLLOWING MISCELLANEOUS PRINT CHARACTERS ARE INCLUDED
593 ;*TO FACILITATE PRINTING AND ARE CALLED AS FOLLOWS:
594 ;* MOVEI NAME
595 ;* PNTA ;OR PNTAF
596 S^;*********************************************************************^
597
598 030242 CRLF: ASCII/
599 030242 015 012 000 000 000 /
600 030243 CRLF2: ASCII/
601
602 030243 015 012 015 012 000 /
603 030244 054 000 000 000 000 COMMA: ASCII/,/
604 030245 056 000 000 000 000 PERIOD: ASCII/./
605 030246 040 000 000 000 000 SPACE: ASCII/ /
606 030247 011 000 000 000 000 TAB: ASCII/ /
607 030250 MINUS:
608 030250 055 000 000 000 000 HYPEN: ASCII/-/
609 030251 053 000 000 000 000 PLUS: ASCII/+/
610 030252 052 000 000 000 000 AST: ASCII/*/
611 030253 100 000 000 000 000 ATSIN: ASCII/@/
612 030254 050 000 000 000 000 LFP: ASCII/(/
613 030255 051 000 000 000 000 RTP: ASCII/)/
614 030256 007 0000000000 BELL: BYTE (7) 007
615 030257 077 000 000 000 000 QUEST: ASCII/?/
616 030260 057 000 000 000 000 SLASH: ASCII!/!
617 030261 044 000 000 000 000 DOLLAR: ASCII/$/
618 030262 000000 000012 RADIX: ^D10 ;DECIMAL PRINT RADIX
619 030263 000000 000040 RADLSP: 40 ;DECIMAL PRINT LEADING CHAR
620 030264 000000 000012 RADLSC: ^D10 ;DECIMAL PRINT LEADING CHAR COUNT
621
622 S^;*********************************************************************^
623 ;*USER MODE OUTPUT FILE INFORMATION
624 S^;*********************************************************************^
625
626 030265 $OBUF: BLOCK 3 ;LOGICAL FILE OUTPUT BUFFER HEADER
627 030270 60 62 51 56 64 00 $OUTNM: SIXBIT /PRINT/ ;FILE NAME
628 030271 60 56 64 00 00 00 $OUTEX: SIXBIT /PNT/ ;FILE NAME EXTENSION
629 030272 BLOCK 2
630
631 S^;*********************************************************************^
632 ;*DISK UPDATE MODE FILE INFORMATION
633 S^;*********************************************************************^
634
635 030274 $IBUF: BLOCK 3
636 030277 60 62 51 56 64 00 $INNM: SIXBIT /PRINT/
637 030300 60 56 64 00 00 00 $INEXT: SIXBIT /PNT/
638 030301 BLOCK 2
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 6
FIXED KSM 28-Mar-78 11:28 *FIXED* FIXED CONTROL AND DISPATCH STORAGE, MARCH 1978 SEQ 0028
639 S^;*********************************************************************^
640 ;*PUSHDOWN LIST CONTROL INFORMATION
641 S^;*********************************************************************^
642
643 030303 777577 030303 PLIST: PLIST-PLISTE,,PLIST
644 030304 PLISTS: BLOCK 200
645 030504 000000 000000 PLISTE: 0 ;END OF PUSHDOWN LIST
646
647 S^;*********************************************************************^
648 ;*POWER LINE CLOCK FREQUENCY FLAG
649 S^;*********************************************************************^
650
651 030505 000000 000000 CYCL60: 0 ;0 = 60, -1 = 50 CYCLE
652
653 S^;*********************************************************************^
654 ;*KL10 CACHE CONTROL FLAGS
655 S^;*********************************************************************^
656
657 030506 000000 000000 CSHFLG: 0 ;ALLOW CACHE IF 0
658 030507 000000 000000 CSHMEM: 0 ;CACHE MEMORY SEGMENTS IF 0
659
660 S^;*********************************************************************^
661 ;*NUMBER INPUT DIGIT FLAG
662 S^;*********************************************************************^
663
664 030510 000000 000000 TTNBRF: 0 ;-1 IF ANY DIGIT TYPED
665
666 S^;*********************************************************************^
667 ;*KL10 & KI10 "INHPAG" SWITCH PAGING PREVENTION
668 S^;*********************************************************************^
669
670 030511 000000 000000 PVPAGI: 0 ;IF NON-ZERO, OVERRIDE "INHPAG" SWITCH ACTION
671
672 S^;*********************************************************************^
673 ;*ERROR REPORTING ROUTINE ADDITIONAL USERS CONTROL INSTRUCTIONS
674 S^;*********************************************************************^
675
676 030512 000000 000000 %ERHI1: 0 ;IF NON-ZERO, XCT'D AT START OF %ERUUO
677 030513 000000 000000 %ERHI2: 0 ;IF NON-ZERO, XCT'D AT END OF %ERUUO
678 030514 000000 000000 %ERHI3: 0 ;IF NON-ZERO, XCT'D AFTER "PC" OF %ERUUO
679
680 S^;*********************************************************************^
681 ;*SPECIAL USERS UUO INTERCEPT INSTRUCTION
682 S^;*********************************************************************^
683
684 030515 000000 000000 $$UUO: 0 ;IF NON-ZERO, XCT'D AT START OF $UORTN
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 7
FIXED KSM 28-Mar-78 11:28 *FIXED* FIXED CONTROL AND DISPATCH STORAGE, MARCH 1978 SEQ 0029
685 S^;*********************************************************************^
686 ;*USER MODE MONITOR TYPE FLAG
687 S^;*********************************************************************^
688
689 030516 000000 000000 MONTYP: 0 ;0 = TOPS10, -1 = TOPS20
690
691 S^;*********************************************************************^
692 ;*SPECIAL USERS MUUO INTERCEPT INSTRUCTION
693 S^;*********************************************************************^
694
695 030517 000000 000000 $$MUUO: 0 ;IF NON-ZERO, XCT'D AT START OF MUUOER
696
697 S^;*********************************************************************^
698 ;*SPECIAL USERS USER MODE OUTPUT ERROR INTERCEPT INSTUCTION
699 S^;*********************************************************************^
700
701 030520 000000 000000 $$OUTER:0 ;IF NON-ZERO, XCT'D AT END OF USER MODE ERROR
702
703 S^;*********************************************************************^
704 ;*"SWITCH" CALL USAGE CONTROL
705 S^;*********************************************************************^
706
707 030521 000000 000000 $$TOGGLE:0 ;IF NON-ZERO, USE C(CONSW) FOR SWITCHES
708
709 S^;*********************************************************************^
710 ;*SPECIAL USERS ALTMODE SWITCH CALL INTERCEPT INSTRUCTIONS
711 S^;*********************************************************************^
712
713 030522 000000 000000 $$TAX1: 0 ;IF NON-ZERO, XCT'D AT START OF ALTMODE SWITCH CALL
714 030523 000000 000000 $$TAX2: 0 ;IF NON-ZERO, XCT'D AT END OF ALTMODE SWITCH CALL
715
716 S^;*********************************************************************^
717 ;*SM10 (KS-10) PROCESSOR TYPE FLAG
718 S^;*********************************************************************^
719
720 030524 000000 000000 SM10: 0 ;IF -1 THIS IS AN KS-10
721
722 S^;*********************************************************************^
723 ;*RIGHT HALF SWITCHES PROMPT TABLE ADDRESS
724 S^;*********************************************************************^
725
726 030525 000000 000000 SWPTAB: 0 ;0 = NO PROMPT, ADR = ADR OF SIXBIT PROMPT TABLE
727
728 S^;*********************************************************************^
729 ;*SPECIAL FUTURE EXPANSION ROOM
730 S^;*********************************************************************^
731
732 S^;*********************************************************************^
733 ;*END OF FIXED STORAGE
734 S^;*********************************************************************^
735
736 030577 LOC 30577
737 030577 000000 000000 ENDFIX: 0 ;END OF FIXED STORAGE
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 1
DSKAI1 MAC 29-Mar-78 08:41 *FIXED* FIXED CONTROL AND DISPATCH STORAGE, MARCH 1978 SEQ 0030
738 030600 037 05 0 00 000002 EXIT: DROPDV ;CLOSE LOGICAL OUTPUT FILE
739 030601 000000 030600 EXIT
740
741 030602 PGMNAM: ASCIZ %
742 030602 015 012 104 105 103 DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC [DSKAI]
743 030603 123 131 123 124 105
744 030604 115 040 062 060 062
745 030605 060 040 102 101 123
746 030606 111 103 040 111 116
747 030607 123 124 122 125 103
748 030610 124 111 117 116 040
749 030611 104 111 101 107 116
750 030612 117 123 124 111 103
751 030613 040 133 104 123 113
752 030614 101 111 135 015 012 SHIFT/ROTATE
753 030615 123 110 111 106 124
754 030616 057 122 117 124 101
755 030617 124 105 015 012 000 %
756
757 ;INITIALIZE SUBROUTINES
758
759 030620 265 00 0 00 030011 START: PGMINT
760 030621 200 00 0 00 041611 MOVE [ASCIZ/AI/]
761 030622 202 00 0 00 041532 MOVEM TLET
762
763 030623 254 00 0 00 030624 STARTA: JRST PART1 ;GO PERFORM DIAGNOSTIC
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 2
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST FETCH, STORE AND DECODE FUNCTIONS SEQ 0031
764 SUBTTL DIAGNOSTIC SECTION - TEST FETCH, STORE AND DECODE FUNCTIONS
765
766 ;TEST FETCH,STORE AND DECODE
767 ;TEST THE ABILITY OF ROT, ROTC TO FETCH AND STORE
768 ;AC,AC+1
769 ;TESTING IS ACCOMPLISHED BY ROTATING ZERO TIMES ALL
770 ;ZERO'S, ALL ONE'S.
771 ;OPERANDS SELECTED ARE LEAST AFFECTED BY
772 ;INADVERTENT ROTATING
773 ;FAILURE OF A SC BIT TO SET,OR SC TO
774 ;COUNT WILL RESULT IN LOOPING
775
776
777 000001 AC=1
778 030624 PART1: SAVEAC (1,1)^
779 030624 201 03 0 00 030624 MOVEI AC+2,. ;SAVE TEST PC
780 030625 202 03 0 00 030051 MOVEM AC+2,TESTPC
781 030626 201 03 0 00 000003 MOVEI AC+2,<AC+2>&17 ;INFORM ERROR ROUTINE WHICH
782 030627 202 03 0 00 041765 MOVEM AC+2,ERRLOP# ;AC IS USED FOR ITERATION^
783
784 030630 400 01 0 00 000000 E100: SETZ AC, ;CLEAR AC
785 030631 241 01 0 00 000000 ROT AC,0 ;*ROTATE LEFT ZERO TIMES
786 030632 332 00 0 00 000001 SKIPE AC ;TEST AC FOR ZERO
787 030633 003 01 0 00 000101 ER3 AC,101 ;FETCH OR STORE FAILED
788 030634 321 03 0 00 030630 JUMPL AC+2,E100 ;LOOP ON ERROR SWITCH
789
790 030635 477 01 0 00 000000 E200: SETOB AC,AC-1 ;SET AC,AC-1 FOR COMPARE
791 030636 241 01 0 00 000000 ROT AC,0 ;*ROTATE LEFT ZERO TIMES
792 030637 312 01 0 00 000000 CAME AC,AC-1 ;TEST AC FOR A -1
793 030640 003 01 0 00 000201 ER3 AC,201 ;FETCH OR STORE FAILED
794 030641 321 03 0 00 030635 JUMPL AC+2,E200 ;LOOP ON ERROR SWITCH
795
796 000002 AC=2
797 SAVEAC (1,1)^
798 030642 201 04 0 00 030642 MOVEI AC+2,. ;SAVE TEST PC
799 030643 202 04 0 00 030051 MOVEM AC+2,TESTPC
800 030644 201 04 0 00 000004 MOVEI AC+2,<AC+2>&17 ;INFORM ERROR ROUTINE WHICH
801 030645 202 04 0 00 041765 MOVEM AC+2,ERRLOP# ;AC IS USED FOR ITERATION^
802
803 030646 403 02 0 00 000003 E300: SETZB AC,AC+1 ;CLEAR AC,AC+1
804 030647 245 02 0 00 000000 ROTC AC,0 ;*ROTATE COMBINED LEFT ZERO TIMES
805 030650 332 00 0 00 000002 SKIPE AC ;TEST AC FOR ZERO
806 030651 003 02 0 00 000301 ER3 AC,301 ;FETCH OR STORE AC FAILED
807 030652 332 00 0 00 000003 SKIPE AC+1 ;TEST AC+1 FOR ZERO
808 030653 004 03 0 00 000301 ER4 AC+1,301 ;FETCH OR STORE AC+1 FAILED
809 030654 321 04 0 00 030646 JUMPL AC+2,E300 ;LOOP ON ERROR SWITCH
810
811 030655 474 01 0 00 000000 E400: SETO AC-1, ;SET UP FOR COMPARISON
812 030656 477 02 0 00 000003 SETOB AC,AC+1 ;SET AC,AC+1
813 030657 245 02 0 00 000000 ROTC AC,0 ;*ROTATE COMBINED LEFT ZERO TIMES
814 030660 312 02 0 00 000001 CAME AC,AC-1 ;TEST AC FOR A -1
815 030661 003 02 0 00 000401 ER3 AC,401 ;FETCH OR STORE AC FAILED
816 030662 312 03 0 00 000001 CAME AC+1,AC-1 ;TEST AC+1 FOR A -1
817 030663 004 03 0 00 000401 ER4 AC+1,401 ;FETCH OR STORE AC+1 FAILED
818 030664 321 04 0 00 030655 JUMPL AC+2,E400 ;LOOP ON ERROR SWITCH
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 3
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST FETCH, STORE AND DECODE FUNCTIONS SEQ 0032
819 ;TEST FETCH,STORE AND DECODE
820 ;TEST THE ABILITY OF LSH, LSHC TO FETCH AND STORE
821 ;AC,AC+1
822 ;TESTING IS ACCOMPLISHED BY SHIFTING ZERO TIMES ALL
823 ;ZERO'S ALL ONE'S
824 ;OPERANDS SELECTED ARE LEAST AFFECTED BY
825 ;INADVERTENT SHIFTING
826 ;FAILURE OF A SC BIT TO SET,OR SC TO
827 ;COUNT WILL RESULT IN LOOPING
828
829 000003 AC=3
830 SAVEAC (1,1)^
831 030665 201 05 0 00 030665 MOVEI AC+2,. ;SAVE TEST PC
832 030666 202 05 0 00 030051 MOVEM AC+2,TESTPC
833 030667 201 05 0 00 000005 MOVEI AC+2,<AC+2>&17 ;INFORM ERROR ROUTINE WHICH
834 030670 202 05 0 00 041765 MOVEM AC+2,ERRLOP# ;AC IS USED FOR ITERATION^
835
836 030671 400 03 0 00 000000 E500: SETZ AC, ;CLEAR AC
837 030672 242 03 0 00 000000 LSH AC,0 ;*SHIFT LEFT ZERO TIMES
838 030673 332 00 0 00 000003 SKIPE AC ;TEST AC FOR ZERO
839 030674 003 03 0 00 000501 ER3 AC,501 ;FETCH OR STORE AC FAILED
840 030675 321 05 0 00 030671 JUMPL AC+2,E500 ;LOOP ON ERROR SWITCH
841
842 030676 477 03 0 00 000002 E600: SETOB AC,AC-1 ;SET AC,AC-1 FOR COMPARE
843 030677 242 03 0 00 000000 LSH AC,0 ;*SHIFT LEFT ZERO TIMES
844 030700 312 03 0 00 000002 CAME AC,AC-1 ;TEST AC FOR -1
845 030701 003 03 0 00 000601 ER3 AC,601 ;FETCH OR STORE AC FAILED
846 030702 321 05 0 00 030676 JUMPL AC+2,E600 ;LOOP ON ERROR SWITCH
847
848 000014 AC=14
849 SAVEAC (1,1)^
850 030703 201 16 0 00 030703 MOVEI AC+2,. ;SAVE TEST PC
851 030704 202 16 0 00 030051 MOVEM AC+2,TESTPC
852 030705 201 16 0 00 000016 MOVEI AC+2,<AC+2>&17 ;INFORM ERROR ROUTINE WHICH
853 030706 202 16 0 00 041765 MOVEM AC+2,ERRLOP# ;AC IS USED FOR ITERATION^
854
855 030707 403 14 0 00 000015 E700: SETZB AC,AC+1 ;CLEAR AC,AC+1
856 030710 246 14 0 00 000000 LSHC AC,0 ;*SHIFT COMBINED LEFT ZERO TIMES
857 030711 332 00 0 00 000014 SKIPE AC ;TEST AC FOR 0
858 030712 003 14 0 00 000701 ER3 AC,701 ;FETCH OR STORE AC FAILED
859 030713 332 00 0 00 000015 SKIPE AC+1 ;TEST AC+1 FOR 0
860 030714 004 15 0 00 000701 ER4 AC+1,701 ;FETCH OR STORE AC+1 FAILED
861 030715 321 16 0 00 030707 JUMPL AC+2,E700 ;LOOP ON ERROR SWITCH
862
863 030716 474 13 0 00 000000 E1000: SETO AC-1, ;SET UP FOR COMPARISON
864 030717 477 14 0 00 000015 SETOB AC,AC+1 ;SET AC,AC+1
865 030720 246 14 0 00 000000 LSHC AC,0 ;*SHIFT COMBINED LEFT ZERO TIMES
866 030721 312 14 0 00 000013 CAME AC,AC-1 ;TEST AC FOR -1
867 030722 003 14 0 00 001001 ER3 AC,1001 ;FETCH OR STORE AC FAILED
868 030723 312 15 0 00 000013 CAME AC+1,AC-1 ;TEST AC+1 FOR -1
869 030724 004 15 0 00 001001 ER4 AC+1,1001 ;FETCH OR STORE AC+1 FAILED
870 030725 321 16 0 00 030716 JUMPL AC+2,E1000 ;LOOP ON ERROR SWITCH
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 4
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST FETCH, STORE AND DECODE FUNCTIONS SEQ 0033
871 ;TEST FETCH,STORE AND DECODE
872 ;TEST THE ABILITY OF ASH, ASHC TO FETCH AND STORE
873 ;AC,AC+1
874 ;TESTING IS ACCOMPLISHED BY SHIFTING ZERO TIMES ALL
875 ;ZERO'S ALL ONES
876 ;OPERANDS SELECTED ARE LEAST AFFECTED BY
877 ;INADVERTENT SHIFTING
878 ;FAILURE OF A SC BIT TO SET,OR SC TO
879 ;COUNT WILL RESULT IN LOOPING
880
881 000013 AC=13
882 SAVEAC (1,1)^
883 030726 201 15 0 00 030726 MOVEI AC+2,. ;SAVE TEST PC
884 030727 202 15 0 00 030051 MOVEM AC+2,TESTPC
885 030730 201 15 0 00 000015 MOVEI AC+2,<AC+2>&17 ;INFORM ERROR ROUTINE WHICH
886 030731 202 15 0 00 041765 MOVEM AC+2,ERRLOP# ;AC IS USED FOR ITERATION^
887
888 030732 400 13 0 00 000000 E1100: SETZ AC, ;CLEAR AC
889 030733 240 13 0 00 000000 ASH AC,0 ;*SHIFT LEFT ZERO TIMES
890 030734 332 00 0 00 000013 SKIPE AC ;TEST AC FOR ZERO
891 030735 003 13 0 00 001101 ER3 AC,1101 ;FETCH OR STORE AC FAILED
892 030736 321 15 0 00 030732 JUMPL AC+2,E1100 ;LOOP ON ERROR SWITCH
893
894 030737 477 13 0 00 000012 E1200: SETOB AC,AC-1 ;SET AC,AC-1 FOR COMPARE
895 030740 240 13 0 00 000000 ASH AC,0 ;*SHIFT LEFT ZERO TIMES
896 030741 312 13 0 00 000012 CAME AC,AC-1 ;TEST AC FOR A -1
897 030742 003 13 0 00 001201 ER3 AC,1201 ;FETCH OR STORE AC FAILED
898 030743 321 15 0 00 030737 JUMPL AC+2,E1200 ;LOOP ON ERROR SWITCH
899
900 000012 AC=12
901 SAVEAC (1,1)^
902 030744 201 14 0 00 030744 MOVEI AC+2,. ;SAVE TEST PC
903 030745 202 14 0 00 030051 MOVEM AC+2,TESTPC
904 030746 201 14 0 00 000014 MOVEI AC+2,<AC+2>&17 ;INFORM ERROR ROUTINE WHICH
905 030747 202 14 0 00 041765 MOVEM AC+2,ERRLOP# ;AC IS USED FOR ITERATION^
906
907 030750 403 12 0 00 000013 E1300: SETZB AC,AC+1 ;CLEAR AC,AC+1
908 030751 244 12 0 00 000000 ASHC AC,0 ;*SHIFT COMBINED LEFT ZERO TIMES
909 030752 332 00 0 00 000012 SKIPE AC ;TEST AC FOR 0
910 030753 003 12 0 00 001301 ER3 AC,1301 ;FETCH OR STORE AC FAILED
911 030754 332 00 0 00 000013 SKIPE AC+1 ;TEST AC+1 FOR 0
912 030755 004 13 0 00 001301 ER4 AC+1,1301 ;FETCH OR STORE AC+1 FAILED
913 030756 321 14 0 00 030750 JUMPL AC+2,E1300 ;LOOP ON ERROR SWITCH
914
915 030757 474 11 0 00 000000 E1400: SETO AC-1, ;SET UP FOR COMPARISON
916 030760 477 12 0 00 000013 SETOB AC,AC+1 ;SET AC,AC+1
917 030761 244 12 0 00 000000 ASHC AC,0 ;*SHIFT COMBINED LEFT ZERO TIMES
918 030762 312 12 0 00 000011 CAME AC,AC-1 ;TEST AC FOR A -1
919 030763 003 12 0 00 001401 ER3 AC,1401 ;FETCH OR STORE AC FAILED
920 030764 312 13 0 00 000011 CAME AC+1,AC-1 ;TEST AC+1 FOR A -1
921 030765 004 13 0 00 001401 ER4 AC+1,1401 ;FETCH OR STORE AC+1 FAILED
922 030766 321 14 0 00 030757 JUMPL AC+2,E1400 ;LOOP ON ERROR SWITCH
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 5
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - CHECK SIGN BIT OF AC+1 FOR ASHC SEQ 0034
923 SUBTTL DIAGNOSTIC SECTION - CHECK SIGN BIT OF AC+1 FOR ASHC
924
925 ;VERIFY THAT THE SIGN BIT OF AC+1 IS NOT MADE TO AGREE WITH THE SIGN BIT OF AC
926 ;WHEN THE 'E' FIELD OF ASHC SECIFIES A SHIFT OF ZERO BIT POSITIONS.
927 ;HENCE, C(AC+1) IS NOT ALTERE BY 'ASHC AC,0'.
928 ;CHECK THIS WHEN THE SIGN BIT OF AC IS ZERO AND THE SIGN BIT OF AC+1 IS ONE.
929
930 SR2 (443,0,0,-1,-1,0,0,-1,-1,ASHC,0)^
931 ;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
932 ;DATA SPECIFIED IN [XWD 0,0] AND [XWD -1,-1] 0 BIT POSITIONS AND
933 ;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD 0,0] AND
934 ;[XWD -1,-1]
935
936 030767 200 12 0 00 041612 E44300: MOVE AC,[XWD 0,0] ;INITIALIZE AC
937 030770 200 13 0 00 041613 MOVE AC+1,[XWD -1,-1] ;INITIALIZE AC+1
938 030771 244 12 0 00 000000 ASHC AC,0 ;*SHIFT/ROTATE COMBINED 0 PLACES
939 030772 312 12 0 00 041612 CAME AC,[XWD 0,0] ;IS RESULT IN AC CORRECT?
940 030773 003 12 0 00 044301 ER3 AC,44301 ;RESULT IN AC IS INCORRECT
941 030774 312 13 0 00 041613 CAME AC+1,[XWD -1,-1] ;IS RESULT IN AC+1 CORRECT?
942 030775 004 13 0 00 044301 ER4 AC+1,44301 ;RESULT IN AC+1 IS INCORRECT
943 030776 321 14 0 00 030767 JUMPL AC+2,E44300 ;LOOP ON ERROR SWITCH^
944
945 ;VERIFY THAT THE SIGN BIT OF AC+1 IS NOT MADE TO AGREE WITH THE SIGN BIT OF AC
946 ;WHEN THE 'E' FIELD OF ASHC SECIFIES A SHIFT OF ZERO BIT POSITIONS.
947 ;HENCE, C(AC+1) IS NOT ALTERE BY 'ASHC AC,0'.
948 ;CHECK THIS WHEN THE SIGN BIT OF AC IS ONE AND THE SIGN BIT OF AC+1 IS ZERO.
949 SR2 (444,-1,-1,0,0,-1,-1,0,0,ASHC,0)^
950 ;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
951 ;DATA SPECIFIED IN [XWD -1,-1] AND [XWD 0,0] 0 BIT POSITIONS AND
952 ;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD -1,-1] AND
953 ;[XWD 0,0]
954
955 030777 200 12 0 00 041613 E44400: MOVE AC,[XWD -1,-1] ;INITIALIZE AC
956 031000 200 13 0 00 041612 MOVE AC+1,[XWD 0,0] ;INITIALIZE AC+1
957 031001 244 12 0 00 000000 ASHC AC,0 ;*SHIFT/ROTATE COMBINED 0 PLACES
958 031002 312 12 0 00 041613 CAME AC,[XWD -1,-1] ;IS RESULT IN AC CORRECT?
959 031003 003 12 0 00 044401 ER3 AC,44401 ;RESULT IN AC IS INCORRECT
960 031004 312 13 0 00 041612 CAME AC+1,[XWD 0,0] ;IS RESULT IN AC+1 CORRECT?
961 031005 004 13 0 00 044401 ER4 AC+1,44401 ;RESULT IN AC+1 IS INCORRECT
962 031006 321 14 0 00 030777 JUMPL AC+2,E44400 ;LOOP ON ERROR SWITCH^
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 6
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST MQ-ADDER GATING SEQ 0035
963 SUBTTL DIAGNOSTIC SECTION - TEST MQ-ADDER GATING
964
965 000010 AC=10
966 SAVEAC (1,1)^
967 031007 201 12 0 00 031007 MOVEI AC+2,. ;SAVE TEST PC
968 031010 202 12 0 00 030051 MOVEM AC+2,TESTPC
969 031011 201 12 0 00 000012 MOVEI AC+2,<AC+2>&17 ;INFORM ERROR ROUTINE WHICH
970 031012 202 12 0 00 041765 MOVEM AC+2,ERRLOP# ;AC IS USED FOR ITERATION^
971
972 001500 SN=1500
973 000000 ZZ=0
974 E1500: REPEAT ^D18,< ;CHECK AC+1 RIGHT
975
976 ;VERIFY MQ-AD GATING
977 ;ROTC A RIPPLED ONE ZERO POSITIONS IN AC+1
978 ;FIRST CLEAR AC; THEN, SET ONE BIT OF AC+1
979 ;REPEAT FOR ALL 36 BITS OF MQ
980 ;RESULT IN AC+1 SHOULD BE SAME AS INTIALIZATION DATA
981 SN=SN+1
982 ZZ=ZZ+ZZ ;TESTED BIT
983 IFE ZZ,<ZZ=1>
984 SETZM AC ;CLEAR AC
985 MOVEI AC+1,ZZ ;INITIALIZE AC+1
986 ROTC AC,0 ;*ROT 0 BIT POSIOTIONS
987 CAIE AC+1,ZZ ;CHECK BIT (N) OF AC+1
988 ER4 AC+1,SN ;MQ-AD GATE FAILED
989 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
990 >
991 ;CHECK AC+1 RIGHT
992
993 ;VERIFY MQ-AD GATING
994 ;ROTC A RIPPLED ONE ZERO POSITIONS IN AC+1
995 ;FIRST CLEAR AC; THEN, SET ONE BIT OF AC+1
996 ;REPEAT FOR ALL 36 BITS OF MQ
997 ;RESULT IN AC+1 SHOULD BE SAME AS INTIALIZATION DATA
998 001501 SN=SN+1
999 000000 ZZ=ZZ+ZZ ;TESTED BIT
1000 000001 IFE ZZ,<ZZ=1>
1001 031013 402 00 0 00 000010 SETZM AC ;CLEAR AC
1002 031014 201 11 0 00 000001 MOVEI AC+1,ZZ ;INITIALIZE AC+1
1003 031015 245 10 0 00 000000 ROTC AC,0 ;*ROT 0 BIT POSIOTIONS
1004 031016 302 11 0 00 000001 CAIE AC+1,ZZ ;CHECK BIT (N) OF AC+1
1005 031017 004 11 0 00 001501 ER4 AC+1,SN ;MQ-AD GATE FAILED
1006 031020 321 12 0 00 031013 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
1007
1008 ;CHECK AC+1 RIGHT
1009
1010 ;VERIFY MQ-AD GATING
1011 ;ROTC A RIPPLED ONE ZERO POSITIONS IN AC+1
1012 ;FIRST CLEAR AC; THEN, SET ONE BIT OF AC+1
1013 ;REPEAT FOR ALL 36 BITS OF MQ
1014 ;RESULT IN AC+1 SHOULD BE SAME AS INTIALIZATION DATA
1015 001502 SN=SN+1
1016 000002 ZZ=ZZ+ZZ ;TESTED BIT
1017 IFE ZZ,<ZZ=1>
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 6-1
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST MQ-ADDER GATING SEQ 0036
1018 031021 402 00 0 00 000010 SETZM AC ;CLEAR AC
1019 031022 201 11 0 00 000002 MOVEI AC+1,ZZ ;INITIALIZE AC+1
1020 031023 245 10 0 00 000000 ROTC AC,0 ;*ROT 0 BIT POSIOTIONS
1021 031024 302 11 0 00 000002 CAIE AC+1,ZZ ;CHECK BIT (N) OF AC+1
1022 031025 004 11 0 00 001502 ER4 AC+1,SN ;MQ-AD GATE FAILED
1023 031026 321 12 0 00 031021 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
1024
1025 ;CHECK AC+1 RIGHT
1026
1027 ;VERIFY MQ-AD GATING
1028 ;ROTC A RIPPLED ONE ZERO POSITIONS IN AC+1
1029 ;FIRST CLEAR AC; THEN, SET ONE BIT OF AC+1
1030 ;REPEAT FOR ALL 36 BITS OF MQ
1031 ;RESULT IN AC+1 SHOULD BE SAME AS INTIALIZATION DATA
1032 001503 SN=SN+1
1033 000004 ZZ=ZZ+ZZ ;TESTED BIT
1034 IFE ZZ,<ZZ=1>
1035 031027 402 00 0 00 000010 SETZM AC ;CLEAR AC
1036 031030 201 11 0 00 000004 MOVEI AC+1,ZZ ;INITIALIZE AC+1
1037 031031 245 10 0 00 000000 ROTC AC,0 ;*ROT 0 BIT POSIOTIONS
1038 031032 302 11 0 00 000004 CAIE AC+1,ZZ ;CHECK BIT (N) OF AC+1
1039 031033 004 11 0 00 001503 ER4 AC+1,SN ;MQ-AD GATE FAILED
1040 031034 321 12 0 00 031027 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
1041
1042 ;CHECK AC+1 RIGHT
1043
1044 ;VERIFY MQ-AD GATING
1045 ;ROTC A RIPPLED ONE ZERO POSITIONS IN AC+1
1046 ;FIRST CLEAR AC; THEN, SET ONE BIT OF AC+1
1047 ;REPEAT FOR ALL 36 BITS OF MQ
1048 ;RESULT IN AC+1 SHOULD BE SAME AS INTIALIZATION DATA
1049 001504 SN=SN+1
1050 000010 ZZ=ZZ+ZZ ;TESTED BIT
1051 IFE ZZ,<ZZ=1>
1052 031035 402 00 0 00 000010 SETZM AC ;CLEAR AC
1053 031036 201 11 0 00 000010 MOVEI AC+1,ZZ ;INITIALIZE AC+1
1054 031037 245 10 0 00 000000 ROTC AC,0 ;*ROT 0 BIT POSIOTIONS
1055 031040 302 11 0 00 000010 CAIE AC+1,ZZ ;CHECK BIT (N) OF AC+1
1056 031041 004 11 0 00 001504 ER4 AC+1,SN ;MQ-AD GATE FAILED
1057 031042 321 12 0 00 031035 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
1058
1059 ;CHECK AC+1 RIGHT
1060
1061 ;VERIFY MQ-AD GATING
1062 ;ROTC A RIPPLED ONE ZERO POSITIONS IN AC+1
1063 ;FIRST CLEAR AC; THEN, SET ONE BIT OF AC+1
1064 ;REPEAT FOR ALL 36 BITS OF MQ
1065 ;RESULT IN AC+1 SHOULD BE SAME AS INTIALIZATION DATA
1066 001505 SN=SN+1
1067 000020 ZZ=ZZ+ZZ ;TESTED BIT
1068 IFE ZZ,<ZZ=1>
1069 031043 402 00 0 00 000010 SETZM AC ;CLEAR AC
1070 031044 201 11 0 00 000020 MOVEI AC+1,ZZ ;INITIALIZE AC+1
1071 031045 245 10 0 00 000000 ROTC AC,0 ;*ROT 0 BIT POSIOTIONS
1072 031046 302 11 0 00 000020 CAIE AC+1,ZZ ;CHECK BIT (N) OF AC+1
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 6-2
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST MQ-ADDER GATING SEQ 0037
1073 031047 004 11 0 00 001505 ER4 AC+1,SN ;MQ-AD GATE FAILED
1074 031050 321 12 0 00 031043 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
1075
1076 ;CHECK AC+1 RIGHT
1077
1078 ;VERIFY MQ-AD GATING
1079 ;ROTC A RIPPLED ONE ZERO POSITIONS IN AC+1
1080 ;FIRST CLEAR AC; THEN, SET ONE BIT OF AC+1
1081 ;REPEAT FOR ALL 36 BITS OF MQ
1082 ;RESULT IN AC+1 SHOULD BE SAME AS INTIALIZATION DATA
1083 001506 SN=SN+1
1084 000040 ZZ=ZZ+ZZ ;TESTED BIT
1085 IFE ZZ,<ZZ=1>
1086 031051 402 00 0 00 000010 SETZM AC ;CLEAR AC
1087 031052 201 11 0 00 000040 MOVEI AC+1,ZZ ;INITIALIZE AC+1
1088 031053 245 10 0 00 000000 ROTC AC,0 ;*ROT 0 BIT POSIOTIONS
1089 031054 302 11 0 00 000040 CAIE AC+1,ZZ ;CHECK BIT (N) OF AC+1
1090 031055 004 11 0 00 001506 ER4 AC+1,SN ;MQ-AD GATE FAILED
1091 031056 321 12 0 00 031051 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
1092
1093 ;CHECK AC+1 RIGHT
1094
1095 ;VERIFY MQ-AD GATING
1096 ;ROTC A RIPPLED ONE ZERO POSITIONS IN AC+1
1097 ;FIRST CLEAR AC; THEN, SET ONE BIT OF AC+1
1098 ;REPEAT FOR ALL 36 BITS OF MQ
1099 ;RESULT IN AC+1 SHOULD BE SAME AS INTIALIZATION DATA
1100 001507 SN=SN+1
1101 000100 ZZ=ZZ+ZZ ;TESTED BIT
1102 IFE ZZ,<ZZ=1>
1103 031057 402 00 0 00 000010 SETZM AC ;CLEAR AC
1104 031060 201 11 0 00 000100 MOVEI AC+1,ZZ ;INITIALIZE AC+1
1105 031061 245 10 0 00 000000 ROTC AC,0 ;*ROT 0 BIT POSIOTIONS
1106 031062 302 11 0 00 000100 CAIE AC+1,ZZ ;CHECK BIT (N) OF AC+1
1107 031063 004 11 0 00 001507 ER4 AC+1,SN ;MQ-AD GATE FAILED
1108 031064 321 12 0 00 031057 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
1109
1110 ;CHECK AC+1 RIGHT
1111
1112 ;VERIFY MQ-AD GATING
1113 ;ROTC A RIPPLED ONE ZERO POSITIONS IN AC+1
1114 ;FIRST CLEAR AC; THEN, SET ONE BIT OF AC+1
1115 ;REPEAT FOR ALL 36 BITS OF MQ
1116 ;RESULT IN AC+1 SHOULD BE SAME AS INTIALIZATION DATA
1117 001510 SN=SN+1
1118 000200 ZZ=ZZ+ZZ ;TESTED BIT
1119 IFE ZZ,<ZZ=1>
1120 031065 402 00 0 00 000010 SETZM AC ;CLEAR AC
1121 031066 201 11 0 00 000200 MOVEI AC+1,ZZ ;INITIALIZE AC+1
1122 031067 245 10 0 00 000000 ROTC AC,0 ;*ROT 0 BIT POSIOTIONS
1123 031070 302 11 0 00 000200 CAIE AC+1,ZZ ;CHECK BIT (N) OF AC+1
1124 031071 004 11 0 00 001510 ER4 AC+1,SN ;MQ-AD GATE FAILED
1125 031072 321 12 0 00 031065 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
1126
1127 ;CHECK AC+1 RIGHT
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 6-3
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST MQ-ADDER GATING SEQ 0038
1128
1129 ;VERIFY MQ-AD GATING
1130 ;ROTC A RIPPLED ONE ZERO POSITIONS IN AC+1
1131 ;FIRST CLEAR AC; THEN, SET ONE BIT OF AC+1
1132 ;REPEAT FOR ALL 36 BITS OF MQ
1133 ;RESULT IN AC+1 SHOULD BE SAME AS INTIALIZATION DATA
1134 001511 SN=SN+1
1135 000400 ZZ=ZZ+ZZ ;TESTED BIT
1136 IFE ZZ,<ZZ=1>
1137 031073 402 00 0 00 000010 SETZM AC ;CLEAR AC
1138 031074 201 11 0 00 000400 MOVEI AC+1,ZZ ;INITIALIZE AC+1
1139 031075 245 10 0 00 000000 ROTC AC,0 ;*ROT 0 BIT POSIOTIONS
1140 031076 302 11 0 00 000400 CAIE AC+1,ZZ ;CHECK BIT (N) OF AC+1
1141 031077 004 11 0 00 001511 ER4 AC+1,SN ;MQ-AD GATE FAILED
1142 031100 321 12 0 00 031073 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
1143
1144 ;CHECK AC+1 RIGHT
1145
1146 ;VERIFY MQ-AD GATING
1147 ;ROTC A RIPPLED ONE ZERO POSITIONS IN AC+1
1148 ;FIRST CLEAR AC; THEN, SET ONE BIT OF AC+1
1149 ;REPEAT FOR ALL 36 BITS OF MQ
1150 ;RESULT IN AC+1 SHOULD BE SAME AS INTIALIZATION DATA
1151 001512 SN=SN+1
1152 001000 ZZ=ZZ+ZZ ;TESTED BIT
1153 IFE ZZ,<ZZ=1>
1154 031101 402 00 0 00 000010 SETZM AC ;CLEAR AC
1155 031102 201 11 0 00 001000 MOVEI AC+1,ZZ ;INITIALIZE AC+1
1156 031103 245 10 0 00 000000 ROTC AC,0 ;*ROT 0 BIT POSIOTIONS
1157 031104 302 11 0 00 001000 CAIE AC+1,ZZ ;CHECK BIT (N) OF AC+1
1158 031105 004 11 0 00 001512 ER4 AC+1,SN ;MQ-AD GATE FAILED
1159 031106 321 12 0 00 031101 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
1160
1161 ;CHECK AC+1 RIGHT
1162
1163 ;VERIFY MQ-AD GATING
1164 ;ROTC A RIPPLED ONE ZERO POSITIONS IN AC+1
1165 ;FIRST CLEAR AC; THEN, SET ONE BIT OF AC+1
1166 ;REPEAT FOR ALL 36 BITS OF MQ
1167 ;RESULT IN AC+1 SHOULD BE SAME AS INTIALIZATION DATA
1168 001513 SN=SN+1
1169 002000 ZZ=ZZ+ZZ ;TESTED BIT
1170 IFE ZZ,<ZZ=1>
1171 031107 402 00 0 00 000010 SETZM AC ;CLEAR AC
1172 031110 201 11 0 00 002000 MOVEI AC+1,ZZ ;INITIALIZE AC+1
1173 031111 245 10 0 00 000000 ROTC AC,0 ;*ROT 0 BIT POSIOTIONS
1174 031112 302 11 0 00 002000 CAIE AC+1,ZZ ;CHECK BIT (N) OF AC+1
1175 031113 004 11 0 00 001513 ER4 AC+1,SN ;MQ-AD GATE FAILED
1176 031114 321 12 0 00 031107 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
1177
1178 ;CHECK AC+1 RIGHT
1179
1180 ;VERIFY MQ-AD GATING
1181 ;ROTC A RIPPLED ONE ZERO POSITIONS IN AC+1
1182 ;FIRST CLEAR AC; THEN, SET ONE BIT OF AC+1
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 6-4
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST MQ-ADDER GATING SEQ 0039
1183 ;REPEAT FOR ALL 36 BITS OF MQ
1184 ;RESULT IN AC+1 SHOULD BE SAME AS INTIALIZATION DATA
1185 001514 SN=SN+1
1186 004000 ZZ=ZZ+ZZ ;TESTED BIT
1187 IFE ZZ,<ZZ=1>
1188 031115 402 00 0 00 000010 SETZM AC ;CLEAR AC
1189 031116 201 11 0 00 004000 MOVEI AC+1,ZZ ;INITIALIZE AC+1
1190 031117 245 10 0 00 000000 ROTC AC,0 ;*ROT 0 BIT POSIOTIONS
1191 031120 302 11 0 00 004000 CAIE AC+1,ZZ ;CHECK BIT (N) OF AC+1
1192 031121 004 11 0 00 001514 ER4 AC+1,SN ;MQ-AD GATE FAILED
1193 031122 321 12 0 00 031115 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
1194
1195 ;CHECK AC+1 RIGHT
1196
1197 ;VERIFY MQ-AD GATING
1198 ;ROTC A RIPPLED ONE ZERO POSITIONS IN AC+1
1199 ;FIRST CLEAR AC; THEN, SET ONE BIT OF AC+1
1200 ;REPEAT FOR ALL 36 BITS OF MQ
1201 ;RESULT IN AC+1 SHOULD BE SAME AS INTIALIZATION DATA
1202 001515 SN=SN+1
1203 010000 ZZ=ZZ+ZZ ;TESTED BIT
1204 IFE ZZ,<ZZ=1>
1205 031123 402 00 0 00 000010 SETZM AC ;CLEAR AC
1206 031124 201 11 0 00 010000 MOVEI AC+1,ZZ ;INITIALIZE AC+1
1207 031125 245 10 0 00 000000 ROTC AC,0 ;*ROT 0 BIT POSIOTIONS
1208 031126 302 11 0 00 010000 CAIE AC+1,ZZ ;CHECK BIT (N) OF AC+1
1209 031127 004 11 0 00 001515 ER4 AC+1,SN ;MQ-AD GATE FAILED
1210 031130 321 12 0 00 031123 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
1211
1212 ;CHECK AC+1 RIGHT
1213
1214 ;VERIFY MQ-AD GATING
1215 ;ROTC A RIPPLED ONE ZERO POSITIONS IN AC+1
1216 ;FIRST CLEAR AC; THEN, SET ONE BIT OF AC+1
1217 ;REPEAT FOR ALL 36 BITS OF MQ
1218 ;RESULT IN AC+1 SHOULD BE SAME AS INTIALIZATION DATA
1219 001516 SN=SN+1
1220 020000 ZZ=ZZ+ZZ ;TESTED BIT
1221 IFE ZZ,<ZZ=1>
1222 031131 402 00 0 00 000010 SETZM AC ;CLEAR AC
1223 031132 201 11 0 00 020000 MOVEI AC+1,ZZ ;INITIALIZE AC+1
1224 031133 245 10 0 00 000000 ROTC AC,0 ;*ROT 0 BIT POSIOTIONS
1225 031134 302 11 0 00 020000 CAIE AC+1,ZZ ;CHECK BIT (N) OF AC+1
1226 031135 004 11 0 00 001516 ER4 AC+1,SN ;MQ-AD GATE FAILED
1227 031136 321 12 0 00 031131 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
1228
1229 ;CHECK AC+1 RIGHT
1230
1231 ;VERIFY MQ-AD GATING
1232 ;ROTC A RIPPLED ONE ZERO POSITIONS IN AC+1
1233 ;FIRST CLEAR AC; THEN, SET ONE BIT OF AC+1
1234 ;REPEAT FOR ALL 36 BITS OF MQ
1235 ;RESULT IN AC+1 SHOULD BE SAME AS INTIALIZATION DATA
1236 001517 SN=SN+1
1237 040000 ZZ=ZZ+ZZ ;TESTED BIT
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 6-5
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST MQ-ADDER GATING SEQ 0040
1238 IFE ZZ,<ZZ=1>
1239 031137 402 00 0 00 000010 SETZM AC ;CLEAR AC
1240 031140 201 11 0 00 040000 MOVEI AC+1,ZZ ;INITIALIZE AC+1
1241 031141 245 10 0 00 000000 ROTC AC,0 ;*ROT 0 BIT POSIOTIONS
1242 031142 302 11 0 00 040000 CAIE AC+1,ZZ ;CHECK BIT (N) OF AC+1
1243 031143 004 11 0 00 001517 ER4 AC+1,SN ;MQ-AD GATE FAILED
1244 031144 321 12 0 00 031137 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
1245
1246 ;CHECK AC+1 RIGHT
1247
1248 ;VERIFY MQ-AD GATING
1249 ;ROTC A RIPPLED ONE ZERO POSITIONS IN AC+1
1250 ;FIRST CLEAR AC; THEN, SET ONE BIT OF AC+1
1251 ;REPEAT FOR ALL 36 BITS OF MQ
1252 ;RESULT IN AC+1 SHOULD BE SAME AS INTIALIZATION DATA
1253 001520 SN=SN+1
1254 100000 ZZ=ZZ+ZZ ;TESTED BIT
1255 IFE ZZ,<ZZ=1>
1256 031145 402 00 0 00 000010 SETZM AC ;CLEAR AC
1257 031146 201 11 0 00 100000 MOVEI AC+1,ZZ ;INITIALIZE AC+1
1258 031147 245 10 0 00 000000 ROTC AC,0 ;*ROT 0 BIT POSIOTIONS
1259 031150 302 11 0 00 100000 CAIE AC+1,ZZ ;CHECK BIT (N) OF AC+1
1260 031151 004 11 0 00 001520 ER4 AC+1,SN ;MQ-AD GATE FAILED
1261 031152 321 12 0 00 031145 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
1262
1263 ;CHECK AC+1 RIGHT
1264
1265 ;VERIFY MQ-AD GATING
1266 ;ROTC A RIPPLED ONE ZERO POSITIONS IN AC+1
1267 ;FIRST CLEAR AC; THEN, SET ONE BIT OF AC+1
1268 ;REPEAT FOR ALL 36 BITS OF MQ
1269 ;RESULT IN AC+1 SHOULD BE SAME AS INTIALIZATION DATA
1270 001521 SN=SN+1
1271 200000 ZZ=ZZ+ZZ ;TESTED BIT
1272 IFE ZZ,<ZZ=1>
1273 031153 402 00 0 00 000010 SETZM AC ;CLEAR AC
1274 031154 201 11 0 00 200000 MOVEI AC+1,ZZ ;INITIALIZE AC+1
1275 031155 245 10 0 00 000000 ROTC AC,0 ;*ROT 0 BIT POSIOTIONS
1276 031156 302 11 0 00 200000 CAIE AC+1,ZZ ;CHECK BIT (N) OF AC+1
1277 031157 004 11 0 00 001521 ER4 AC+1,SN ;MQ-AD GATE FAILED
1278 031160 321 12 0 00 031153 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
1279
1280 ;CHECK AC+1 RIGHT
1281
1282 ;VERIFY MQ-AD GATING
1283 ;ROTC A RIPPLED ONE ZERO POSITIONS IN AC+1
1284 ;FIRST CLEAR AC; THEN, SET ONE BIT OF AC+1
1285 ;REPEAT FOR ALL 36 BITS OF MQ
1286 ;RESULT IN AC+1 SHOULD BE SAME AS INTIALIZATION DATA
1287 001522 SN=SN+1
1288 400000 ZZ=ZZ+ZZ ;TESTED BIT
1289 IFE ZZ,<ZZ=1>
1290 031161 402 00 0 00 000010 SETZM AC ;CLEAR AC
1291 031162 201 11 0 00 400000 MOVEI AC+1,ZZ ;INITIALIZE AC+1
1292 031163 245 10 0 00 000000 ROTC AC,0 ;*ROT 0 BIT POSIOTIONS
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 6-6
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST MQ-ADDER GATING SEQ 0041
1293 031164 302 11 0 00 400000 CAIE AC+1,ZZ ;CHECK BIT (N) OF AC+1
1294 031165 004 11 0 00 001522 ER4 AC+1,SN ;MQ-AD GATE FAILED
1295 031166 321 12 0 00 031161 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
1296
1297 PAGE
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 6-7
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST MQ-ADDER GATING SEQ 0042
1298 000000 ZZ=0
1299 REPEAT ^D18,< ;CHECK AC+1 LEFT
1300
1301 ;VERIFY MQ-AD GATING
1302 ;ROTC A RIPPLED ONE ZERO POSITIONS IN AC+1
1303 ;FIRST CLEAR AC; THEN, SET ONE BIT OF AC+1
1304 ;REPEAT FOR ALL 36 BITS OF MQ
1305 ;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
1306 SN=SN+1
1307 ZZ=ZZ+ZZ ;TESTED BIT
1308 IFE ZZ,<ZZ=1>
1309 SETZM AC ;CLEAR AC
1310 MOVSI AC+1,ZZ ;INITIALIZE AC+1
1311 MOVE AC-1,AC+1 ;SETUP FOR COMPARISON
1312 ROTC AC,0 ;*ROT 0 BIT POSITIONS
1313 CAME AC+1,AC-1 ;CHECK BIT (N) OF AC+1
1314 ER4 AC+1,SN ;MQ-AD GATE FAILED
1315 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
1316 >
1317 ;CHECK AC+1 LEFT
1318
1319 ;VERIFY MQ-AD GATING
1320 ;ROTC A RIPPLED ONE ZERO POSITIONS IN AC+1
1321 ;FIRST CLEAR AC; THEN, SET ONE BIT OF AC+1
1322 ;REPEAT FOR ALL 36 BITS OF MQ
1323 ;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
1324 001523 SN=SN+1
1325 000000 ZZ=ZZ+ZZ ;TESTED BIT
1326 000001 IFE ZZ,<ZZ=1>
1327 031167 402 00 0 00 000010 SETZM AC ;CLEAR AC
1328 031170 205 11 0 00 000001 MOVSI AC+1,ZZ ;INITIALIZE AC+1
1329 031171 200 07 0 00 000011 MOVE AC-1,AC+1 ;SETUP FOR COMPARISON
1330 031172 245 10 0 00 000000 ROTC AC,0 ;*ROT 0 BIT POSITIONS
1331 031173 312 11 0 00 000007 CAME AC+1,AC-1 ;CHECK BIT (N) OF AC+1
1332 031174 004 11 0 00 001523 ER4 AC+1,SN ;MQ-AD GATE FAILED
1333 031175 321 12 0 00 031170 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
1334
1335 ;CHECK AC+1 LEFT
1336
1337 ;VERIFY MQ-AD GATING
1338 ;ROTC A RIPPLED ONE ZERO POSITIONS IN AC+1
1339 ;FIRST CLEAR AC; THEN, SET ONE BIT OF AC+1
1340 ;REPEAT FOR ALL 36 BITS OF MQ
1341 ;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
1342 001524 SN=SN+1
1343 000002 ZZ=ZZ+ZZ ;TESTED BIT
1344 IFE ZZ,<ZZ=1>
1345 031176 402 00 0 00 000010 SETZM AC ;CLEAR AC
1346 031177 205 11 0 00 000002 MOVSI AC+1,ZZ ;INITIALIZE AC+1
1347 031200 200 07 0 00 000011 MOVE AC-1,AC+1 ;SETUP FOR COMPARISON
1348 031201 245 10 0 00 000000 ROTC AC,0 ;*ROT 0 BIT POSITIONS
1349 031202 312 11 0 00 000007 CAME AC+1,AC-1 ;CHECK BIT (N) OF AC+1
1350 031203 004 11 0 00 001524 ER4 AC+1,SN ;MQ-AD GATE FAILED
1351 031204 321 12 0 00 031177 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
1352
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 6-8
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST MQ-ADDER GATING SEQ 0043
1353 ;CHECK AC+1 LEFT
1354
1355 ;VERIFY MQ-AD GATING
1356 ;ROTC A RIPPLED ONE ZERO POSITIONS IN AC+1
1357 ;FIRST CLEAR AC; THEN, SET ONE BIT OF AC+1
1358 ;REPEAT FOR ALL 36 BITS OF MQ
1359 ;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
1360 001525 SN=SN+1
1361 000004 ZZ=ZZ+ZZ ;TESTED BIT
1362 IFE ZZ,<ZZ=1>
1363 031205 402 00 0 00 000010 SETZM AC ;CLEAR AC
1364 031206 205 11 0 00 000004 MOVSI AC+1,ZZ ;INITIALIZE AC+1
1365 031207 200 07 0 00 000011 MOVE AC-1,AC+1 ;SETUP FOR COMPARISON
1366 031210 245 10 0 00 000000 ROTC AC,0 ;*ROT 0 BIT POSITIONS
1367 031211 312 11 0 00 000007 CAME AC+1,AC-1 ;CHECK BIT (N) OF AC+1
1368 031212 004 11 0 00 001525 ER4 AC+1,SN ;MQ-AD GATE FAILED
1369 031213 321 12 0 00 031206 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
1370
1371 ;CHECK AC+1 LEFT
1372
1373 ;VERIFY MQ-AD GATING
1374 ;ROTC A RIPPLED ONE ZERO POSITIONS IN AC+1
1375 ;FIRST CLEAR AC; THEN, SET ONE BIT OF AC+1
1376 ;REPEAT FOR ALL 36 BITS OF MQ
1377 ;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
1378 001526 SN=SN+1
1379 000010 ZZ=ZZ+ZZ ;TESTED BIT
1380 IFE ZZ,<ZZ=1>
1381 031214 402 00 0 00 000010 SETZM AC ;CLEAR AC
1382 031215 205 11 0 00 000010 MOVSI AC+1,ZZ ;INITIALIZE AC+1
1383 031216 200 07 0 00 000011 MOVE AC-1,AC+1 ;SETUP FOR COMPARISON
1384 031217 245 10 0 00 000000 ROTC AC,0 ;*ROT 0 BIT POSITIONS
1385 031220 312 11 0 00 000007 CAME AC+1,AC-1 ;CHECK BIT (N) OF AC+1
1386 031221 004 11 0 00 001526 ER4 AC+1,SN ;MQ-AD GATE FAILED
1387 031222 321 12 0 00 031215 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
1388
1389 ;CHECK AC+1 LEFT
1390
1391 ;VERIFY MQ-AD GATING
1392 ;ROTC A RIPPLED ONE ZERO POSITIONS IN AC+1
1393 ;FIRST CLEAR AC; THEN, SET ONE BIT OF AC+1
1394 ;REPEAT FOR ALL 36 BITS OF MQ
1395 ;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
1396 001527 SN=SN+1
1397 000020 ZZ=ZZ+ZZ ;TESTED BIT
1398 IFE ZZ,<ZZ=1>
1399 031223 402 00 0 00 000010 SETZM AC ;CLEAR AC
1400 031224 205 11 0 00 000020 MOVSI AC+1,ZZ ;INITIALIZE AC+1
1401 031225 200 07 0 00 000011 MOVE AC-1,AC+1 ;SETUP FOR COMPARISON
1402 031226 245 10 0 00 000000 ROTC AC,0 ;*ROT 0 BIT POSITIONS
1403 031227 312 11 0 00 000007 CAME AC+1,AC-1 ;CHECK BIT (N) OF AC+1
1404 031230 004 11 0 00 001527 ER4 AC+1,SN ;MQ-AD GATE FAILED
1405 031231 321 12 0 00 031224 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
1406
1407 ;CHECK AC+1 LEFT
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 6-9
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST MQ-ADDER GATING SEQ 0044
1408
1409 ;VERIFY MQ-AD GATING
1410 ;ROTC A RIPPLED ONE ZERO POSITIONS IN AC+1
1411 ;FIRST CLEAR AC; THEN, SET ONE BIT OF AC+1
1412 ;REPEAT FOR ALL 36 BITS OF MQ
1413 ;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
1414 001530 SN=SN+1
1415 000040 ZZ=ZZ+ZZ ;TESTED BIT
1416 IFE ZZ,<ZZ=1>
1417 031232 402 00 0 00 000010 SETZM AC ;CLEAR AC
1418 031233 205 11 0 00 000040 MOVSI AC+1,ZZ ;INITIALIZE AC+1
1419 031234 200 07 0 00 000011 MOVE AC-1,AC+1 ;SETUP FOR COMPARISON
1420 031235 245 10 0 00 000000 ROTC AC,0 ;*ROT 0 BIT POSITIONS
1421 031236 312 11 0 00 000007 CAME AC+1,AC-1 ;CHECK BIT (N) OF AC+1
1422 031237 004 11 0 00 001530 ER4 AC+1,SN ;MQ-AD GATE FAILED
1423 031240 321 12 0 00 031233 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
1424
1425 ;CHECK AC+1 LEFT
1426
1427 ;VERIFY MQ-AD GATING
1428 ;ROTC A RIPPLED ONE ZERO POSITIONS IN AC+1
1429 ;FIRST CLEAR AC; THEN, SET ONE BIT OF AC+1
1430 ;REPEAT FOR ALL 36 BITS OF MQ
1431 ;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
1432 001531 SN=SN+1
1433 000100 ZZ=ZZ+ZZ ;TESTED BIT
1434 IFE ZZ,<ZZ=1>
1435 031241 402 00 0 00 000010 SETZM AC ;CLEAR AC
1436 031242 205 11 0 00 000100 MOVSI AC+1,ZZ ;INITIALIZE AC+1
1437 031243 200 07 0 00 000011 MOVE AC-1,AC+1 ;SETUP FOR COMPARISON
1438 031244 245 10 0 00 000000 ROTC AC,0 ;*ROT 0 BIT POSITIONS
1439 031245 312 11 0 00 000007 CAME AC+1,AC-1 ;CHECK BIT (N) OF AC+1
1440 031246 004 11 0 00 001531 ER4 AC+1,SN ;MQ-AD GATE FAILED
1441 031247 321 12 0 00 031242 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
1442
1443 ;CHECK AC+1 LEFT
1444
1445 ;VERIFY MQ-AD GATING
1446 ;ROTC A RIPPLED ONE ZERO POSITIONS IN AC+1
1447 ;FIRST CLEAR AC; THEN, SET ONE BIT OF AC+1
1448 ;REPEAT FOR ALL 36 BITS OF MQ
1449 ;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
1450 001532 SN=SN+1
1451 000200 ZZ=ZZ+ZZ ;TESTED BIT
1452 IFE ZZ,<ZZ=1>
1453 031250 402 00 0 00 000010 SETZM AC ;CLEAR AC
1454 031251 205 11 0 00 000200 MOVSI AC+1,ZZ ;INITIALIZE AC+1
1455 031252 200 07 0 00 000011 MOVE AC-1,AC+1 ;SETUP FOR COMPARISON
1456 031253 245 10 0 00 000000 ROTC AC,0 ;*ROT 0 BIT POSITIONS
1457 031254 312 11 0 00 000007 CAME AC+1,AC-1 ;CHECK BIT (N) OF AC+1
1458 031255 004 11 0 00 001532 ER4 AC+1,SN ;MQ-AD GATE FAILED
1459 031256 321 12 0 00 031251 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
1460
1461 ;CHECK AC+1 LEFT
1462
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 6-10
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST MQ-ADDER GATING SEQ 0045
1463 ;VERIFY MQ-AD GATING
1464 ;ROTC A RIPPLED ONE ZERO POSITIONS IN AC+1
1465 ;FIRST CLEAR AC; THEN, SET ONE BIT OF AC+1
1466 ;REPEAT FOR ALL 36 BITS OF MQ
1467 ;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
1468 001533 SN=SN+1
1469 000400 ZZ=ZZ+ZZ ;TESTED BIT
1470 IFE ZZ,<ZZ=1>
1471 031257 402 00 0 00 000010 SETZM AC ;CLEAR AC
1472 031260 205 11 0 00 000400 MOVSI AC+1,ZZ ;INITIALIZE AC+1
1473 031261 200 07 0 00 000011 MOVE AC-1,AC+1 ;SETUP FOR COMPARISON
1474 031262 245 10 0 00 000000 ROTC AC,0 ;*ROT 0 BIT POSITIONS
1475 031263 312 11 0 00 000007 CAME AC+1,AC-1 ;CHECK BIT (N) OF AC+1
1476 031264 004 11 0 00 001533 ER4 AC+1,SN ;MQ-AD GATE FAILED
1477 031265 321 12 0 00 031260 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
1478
1479 ;CHECK AC+1 LEFT
1480
1481 ;VERIFY MQ-AD GATING
1482 ;ROTC A RIPPLED ONE ZERO POSITIONS IN AC+1
1483 ;FIRST CLEAR AC; THEN, SET ONE BIT OF AC+1
1484 ;REPEAT FOR ALL 36 BITS OF MQ
1485 ;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
1486 001534 SN=SN+1
1487 001000 ZZ=ZZ+ZZ ;TESTED BIT
1488 IFE ZZ,<ZZ=1>
1489 031266 402 00 0 00 000010 SETZM AC ;CLEAR AC
1490 031267 205 11 0 00 001000 MOVSI AC+1,ZZ ;INITIALIZE AC+1
1491 031270 200 07 0 00 000011 MOVE AC-1,AC+1 ;SETUP FOR COMPARISON
1492 031271 245 10 0 00 000000 ROTC AC,0 ;*ROT 0 BIT POSITIONS
1493 031272 312 11 0 00 000007 CAME AC+1,AC-1 ;CHECK BIT (N) OF AC+1
1494 031273 004 11 0 00 001534 ER4 AC+1,SN ;MQ-AD GATE FAILED
1495 031274 321 12 0 00 031267 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
1496
1497 ;CHECK AC+1 LEFT
1498
1499 ;VERIFY MQ-AD GATING
1500 ;ROTC A RIPPLED ONE ZERO POSITIONS IN AC+1
1501 ;FIRST CLEAR AC; THEN, SET ONE BIT OF AC+1
1502 ;REPEAT FOR ALL 36 BITS OF MQ
1503 ;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
1504 001535 SN=SN+1
1505 002000 ZZ=ZZ+ZZ ;TESTED BIT
1506 IFE ZZ,<ZZ=1>
1507 031275 402 00 0 00 000010 SETZM AC ;CLEAR AC
1508 031276 205 11 0 00 002000 MOVSI AC+1,ZZ ;INITIALIZE AC+1
1509 031277 200 07 0 00 000011 MOVE AC-1,AC+1 ;SETUP FOR COMPARISON
1510 031300 245 10 0 00 000000 ROTC AC,0 ;*ROT 0 BIT POSITIONS
1511 031301 312 11 0 00 000007 CAME AC+1,AC-1 ;CHECK BIT (N) OF AC+1
1512 031302 004 11 0 00 001535 ER4 AC+1,SN ;MQ-AD GATE FAILED
1513 031303 321 12 0 00 031276 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
1514
1515 ;CHECK AC+1 LEFT
1516
1517 ;VERIFY MQ-AD GATING
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 6-11
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST MQ-ADDER GATING SEQ 0046
1518 ;ROTC A RIPPLED ONE ZERO POSITIONS IN AC+1
1519 ;FIRST CLEAR AC; THEN, SET ONE BIT OF AC+1
1520 ;REPEAT FOR ALL 36 BITS OF MQ
1521 ;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
1522 001536 SN=SN+1
1523 004000 ZZ=ZZ+ZZ ;TESTED BIT
1524 IFE ZZ,<ZZ=1>
1525 031304 402 00 0 00 000010 SETZM AC ;CLEAR AC
1526 031305 205 11 0 00 004000 MOVSI AC+1,ZZ ;INITIALIZE AC+1
1527 031306 200 07 0 00 000011 MOVE AC-1,AC+1 ;SETUP FOR COMPARISON
1528 031307 245 10 0 00 000000 ROTC AC,0 ;*ROT 0 BIT POSITIONS
1529 031310 312 11 0 00 000007 CAME AC+1,AC-1 ;CHECK BIT (N) OF AC+1
1530 031311 004 11 0 00 001536 ER4 AC+1,SN ;MQ-AD GATE FAILED
1531 031312 321 12 0 00 031305 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
1532
1533 ;CHECK AC+1 LEFT
1534
1535 ;VERIFY MQ-AD GATING
1536 ;ROTC A RIPPLED ONE ZERO POSITIONS IN AC+1
1537 ;FIRST CLEAR AC; THEN, SET ONE BIT OF AC+1
1538 ;REPEAT FOR ALL 36 BITS OF MQ
1539 ;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
1540 001537 SN=SN+1
1541 010000 ZZ=ZZ+ZZ ;TESTED BIT
1542 IFE ZZ,<ZZ=1>
1543 031313 402 00 0 00 000010 SETZM AC ;CLEAR AC
1544 031314 205 11 0 00 010000 MOVSI AC+1,ZZ ;INITIALIZE AC+1
1545 031315 200 07 0 00 000011 MOVE AC-1,AC+1 ;SETUP FOR COMPARISON
1546 031316 245 10 0 00 000000 ROTC AC,0 ;*ROT 0 BIT POSITIONS
1547 031317 312 11 0 00 000007 CAME AC+1,AC-1 ;CHECK BIT (N) OF AC+1
1548 031320 004 11 0 00 001537 ER4 AC+1,SN ;MQ-AD GATE FAILED
1549 031321 321 12 0 00 031314 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
1550
1551 ;CHECK AC+1 LEFT
1552
1553 ;VERIFY MQ-AD GATING
1554 ;ROTC A RIPPLED ONE ZERO POSITIONS IN AC+1
1555 ;FIRST CLEAR AC; THEN, SET ONE BIT OF AC+1
1556 ;REPEAT FOR ALL 36 BITS OF MQ
1557 ;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
1558 001540 SN=SN+1
1559 020000 ZZ=ZZ+ZZ ;TESTED BIT
1560 IFE ZZ,<ZZ=1>
1561 031322 402 00 0 00 000010 SETZM AC ;CLEAR AC
1562 031323 205 11 0 00 020000 MOVSI AC+1,ZZ ;INITIALIZE AC+1
1563 031324 200 07 0 00 000011 MOVE AC-1,AC+1 ;SETUP FOR COMPARISON
1564 031325 245 10 0 00 000000 ROTC AC,0 ;*ROT 0 BIT POSITIONS
1565 031326 312 11 0 00 000007 CAME AC+1,AC-1 ;CHECK BIT (N) OF AC+1
1566 031327 004 11 0 00 001540 ER4 AC+1,SN ;MQ-AD GATE FAILED
1567 031330 321 12 0 00 031323 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
1568
1569 ;CHECK AC+1 LEFT
1570
1571 ;VERIFY MQ-AD GATING
1572 ;ROTC A RIPPLED ONE ZERO POSITIONS IN AC+1
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 6-12
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST MQ-ADDER GATING SEQ 0047
1573 ;FIRST CLEAR AC; THEN, SET ONE BIT OF AC+1
1574 ;REPEAT FOR ALL 36 BITS OF MQ
1575 ;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
1576 001541 SN=SN+1
1577 040000 ZZ=ZZ+ZZ ;TESTED BIT
1578 IFE ZZ,<ZZ=1>
1579 031331 402 00 0 00 000010 SETZM AC ;CLEAR AC
1580 031332 205 11 0 00 040000 MOVSI AC+1,ZZ ;INITIALIZE AC+1
1581 031333 200 07 0 00 000011 MOVE AC-1,AC+1 ;SETUP FOR COMPARISON
1582 031334 245 10 0 00 000000 ROTC AC,0 ;*ROT 0 BIT POSITIONS
1583 031335 312 11 0 00 000007 CAME AC+1,AC-1 ;CHECK BIT (N) OF AC+1
1584 031336 004 11 0 00 001541 ER4 AC+1,SN ;MQ-AD GATE FAILED
1585 031337 321 12 0 00 031332 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
1586
1587 ;CHECK AC+1 LEFT
1588
1589 ;VERIFY MQ-AD GATING
1590 ;ROTC A RIPPLED ONE ZERO POSITIONS IN AC+1
1591 ;FIRST CLEAR AC; THEN, SET ONE BIT OF AC+1
1592 ;REPEAT FOR ALL 36 BITS OF MQ
1593 ;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
1594 001542 SN=SN+1
1595 100000 ZZ=ZZ+ZZ ;TESTED BIT
1596 IFE ZZ,<ZZ=1>
1597 031340 402 00 0 00 000010 SETZM AC ;CLEAR AC
1598 031341 205 11 0 00 100000 MOVSI AC+1,ZZ ;INITIALIZE AC+1
1599 031342 200 07 0 00 000011 MOVE AC-1,AC+1 ;SETUP FOR COMPARISON
1600 031343 245 10 0 00 000000 ROTC AC,0 ;*ROT 0 BIT POSITIONS
1601 031344 312 11 0 00 000007 CAME AC+1,AC-1 ;CHECK BIT (N) OF AC+1
1602 031345 004 11 0 00 001542 ER4 AC+1,SN ;MQ-AD GATE FAILED
1603 031346 321 12 0 00 031341 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
1604
1605 ;CHECK AC+1 LEFT
1606
1607 ;VERIFY MQ-AD GATING
1608 ;ROTC A RIPPLED ONE ZERO POSITIONS IN AC+1
1609 ;FIRST CLEAR AC; THEN, SET ONE BIT OF AC+1
1610 ;REPEAT FOR ALL 36 BITS OF MQ
1611 ;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
1612 001543 SN=SN+1
1613 200000 ZZ=ZZ+ZZ ;TESTED BIT
1614 IFE ZZ,<ZZ=1>
1615 031347 402 00 0 00 000010 SETZM AC ;CLEAR AC
1616 031350 205 11 0 00 200000 MOVSI AC+1,ZZ ;INITIALIZE AC+1
1617 031351 200 07 0 00 000011 MOVE AC-1,AC+1 ;SETUP FOR COMPARISON
1618 031352 245 10 0 00 000000 ROTC AC,0 ;*ROT 0 BIT POSITIONS
1619 031353 312 11 0 00 000007 CAME AC+1,AC-1 ;CHECK BIT (N) OF AC+1
1620 031354 004 11 0 00 001543 ER4 AC+1,SN ;MQ-AD GATE FAILED
1621 031355 321 12 0 00 031350 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
1622
1623 ;CHECK AC+1 LEFT
1624
1625 ;VERIFY MQ-AD GATING
1626 ;ROTC A RIPPLED ONE ZERO POSITIONS IN AC+1
1627 ;FIRST CLEAR AC; THEN, SET ONE BIT OF AC+1
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 6-13
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST MQ-ADDER GATING SEQ 0048
1628 ;REPEAT FOR ALL 36 BITS OF MQ
1629 ;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
1630 001544 SN=SN+1
1631 400000 ZZ=ZZ+ZZ ;TESTED BIT
1632 IFE ZZ,<ZZ=1>
1633 031356 402 00 0 00 000010 SETZM AC ;CLEAR AC
1634 031357 205 11 0 00 400000 MOVSI AC+1,ZZ ;INITIALIZE AC+1
1635 031360 200 07 0 00 000011 MOVE AC-1,AC+1 ;SETUP FOR COMPARISON
1636 031361 245 10 0 00 000000 ROTC AC,0 ;*ROT 0 BIT POSITIONS
1637 031362 312 11 0 00 000007 CAME AC+1,AC-1 ;CHECK BIT (N) OF AC+1
1638 031363 004 11 0 00 001544 ER4 AC+1,SN ;MQ-AD GATE FAILED
1639 031364 321 12 0 00 031357 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
1640
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 7
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST MQ-ADDER GATING SEQ 0049
1641 000007 AC=7
1642 SAVEAC (1,1)^
1643 031365 201 11 0 00 031365 MOVEI AC+2,. ;SAVE TEST PC
1644 031366 202 11 0 00 030051 MOVEM AC+2,TESTPC
1645 031367 201 11 0 00 000011 MOVEI AC+2,<AC+2>&17 ;INFORM ERROR ROUTINE WHICH
1646 031370 202 11 0 00 041765 MOVEM AC+2,ERRLOP# ;AC IS USED FOR ITERATION^
1647
1648 001600 SN=1600
1649
1650 000000 ZZ=0
1651
1652 E1600: REPEAT ^D18,< ;CHECK AC+1 RIGHT
1653
1654 ;VERIFY MQ-AD GATING
1655 ;ROTC A RIPPLED ZERO ZERO POSITIONS IN AC+1
1656 ;FIRST SET AC TO ALL ONES; THEN, SET ALL BUT ONE BIT OF AC+1
1657 ;REPEAT FOR ALL 36 BITS OF MQ
1658 ;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
1659 SN=SN+1
1660 ZZ=ZZ+ZZ+1 ;TESTED BIT
1661 IFE ZZ,<ZZ=-2>
1662 SETOM AC ;INITIALIZE TO ALL ONES
1663 HRROI AC+1,ZZ&777777 ;INITIALIZE AC+1
1664 MOVE AC-1,AC+1 ;SETUP FOR COMPARISON
1665 ROTC AC,0 ;*ROT 0 BIT POSITIONS
1666 CAME AC+1,AC-1 ;CHECK BIT (N) OF AC+1
1667 ER4 AC+1,SN ;MQ-AD GATE FAILED
1668 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
1669 >
1670 ;CHECK AC+1 RIGHT
1671
1672 ;VERIFY MQ-AD GATING
1673 ;ROTC A RIPPLED ZERO ZERO POSITIONS IN AC+1
1674 ;FIRST SET AC TO ALL ONES; THEN, SET ALL BUT ONE BIT OF AC+1
1675 ;REPEAT FOR ALL 36 BITS OF MQ
1676 ;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
1677 001601 SN=SN+1
1678 000001 ZZ=ZZ+ZZ+1 ;TESTED BIT
1679 IFE ZZ,<ZZ=-2>
1680 031371 476 00 0 00 000007 SETOM AC ;INITIALIZE TO ALL ONES
1681 031372 561 10 0 00 000001 HRROI AC+1,ZZ&777777 ;INITIALIZE AC+1
1682 031373 200 06 0 00 000010 MOVE AC-1,AC+1 ;SETUP FOR COMPARISON
1683 031374 245 07 0 00 000000 ROTC AC,0 ;*ROT 0 BIT POSITIONS
1684 031375 312 10 0 00 000006 CAME AC+1,AC-1 ;CHECK BIT (N) OF AC+1
1685 031376 004 10 0 00 001601 ER4 AC+1,SN ;MQ-AD GATE FAILED
1686 031377 321 11 0 00 031371 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
1687
1688 ;CHECK AC+1 RIGHT
1689
1690 ;VERIFY MQ-AD GATING
1691 ;ROTC A RIPPLED ZERO ZERO POSITIONS IN AC+1
1692 ;FIRST SET AC TO ALL ONES; THEN, SET ALL BUT ONE BIT OF AC+1
1693 ;REPEAT FOR ALL 36 BITS OF MQ
1694 ;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
1695 001602 SN=SN+1
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 7-1
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST MQ-ADDER GATING SEQ 0050
1696 000003 ZZ=ZZ+ZZ+1 ;TESTED BIT
1697 IFE ZZ,<ZZ=-2>
1698 031400 476 00 0 00 000007 SETOM AC ;INITIALIZE TO ALL ONES
1699 031401 561 10 0 00 000003 HRROI AC+1,ZZ&777777 ;INITIALIZE AC+1
1700 031402 200 06 0 00 000010 MOVE AC-1,AC+1 ;SETUP FOR COMPARISON
1701 031403 245 07 0 00 000000 ROTC AC,0 ;*ROT 0 BIT POSITIONS
1702 031404 312 10 0 00 000006 CAME AC+1,AC-1 ;CHECK BIT (N) OF AC+1
1703 031405 004 10 0 00 001602 ER4 AC+1,SN ;MQ-AD GATE FAILED
1704 031406 321 11 0 00 031400 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
1705
1706 ;CHECK AC+1 RIGHT
1707
1708 ;VERIFY MQ-AD GATING
1709 ;ROTC A RIPPLED ZERO ZERO POSITIONS IN AC+1
1710 ;FIRST SET AC TO ALL ONES; THEN, SET ALL BUT ONE BIT OF AC+1
1711 ;REPEAT FOR ALL 36 BITS OF MQ
1712 ;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
1713 001603 SN=SN+1
1714 000007 ZZ=ZZ+ZZ+1 ;TESTED BIT
1715 IFE ZZ,<ZZ=-2>
1716 031407 476 00 0 00 000007 SETOM AC ;INITIALIZE TO ALL ONES
1717 031410 561 10 0 00 000007 HRROI AC+1,ZZ&777777 ;INITIALIZE AC+1
1718 031411 200 06 0 00 000010 MOVE AC-1,AC+1 ;SETUP FOR COMPARISON
1719 031412 245 07 0 00 000000 ROTC AC,0 ;*ROT 0 BIT POSITIONS
1720 031413 312 10 0 00 000006 CAME AC+1,AC-1 ;CHECK BIT (N) OF AC+1
1721 031414 004 10 0 00 001603 ER4 AC+1,SN ;MQ-AD GATE FAILED
1722 031415 321 11 0 00 031407 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
1723
1724 ;CHECK AC+1 RIGHT
1725
1726 ;VERIFY MQ-AD GATING
1727 ;ROTC A RIPPLED ZERO ZERO POSITIONS IN AC+1
1728 ;FIRST SET AC TO ALL ONES; THEN, SET ALL BUT ONE BIT OF AC+1
1729 ;REPEAT FOR ALL 36 BITS OF MQ
1730 ;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
1731 001604 SN=SN+1
1732 000017 ZZ=ZZ+ZZ+1 ;TESTED BIT
1733 IFE ZZ,<ZZ=-2>
1734 031416 476 00 0 00 000007 SETOM AC ;INITIALIZE TO ALL ONES
1735 031417 561 10 0 00 000017 HRROI AC+1,ZZ&777777 ;INITIALIZE AC+1
1736 031420 200 06 0 00 000010 MOVE AC-1,AC+1 ;SETUP FOR COMPARISON
1737 031421 245 07 0 00 000000 ROTC AC,0 ;*ROT 0 BIT POSITIONS
1738 031422 312 10 0 00 000006 CAME AC+1,AC-1 ;CHECK BIT (N) OF AC+1
1739 031423 004 10 0 00 001604 ER4 AC+1,SN ;MQ-AD GATE FAILED
1740 031424 321 11 0 00 031416 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
1741
1742 ;CHECK AC+1 RIGHT
1743
1744 ;VERIFY MQ-AD GATING
1745 ;ROTC A RIPPLED ZERO ZERO POSITIONS IN AC+1
1746 ;FIRST SET AC TO ALL ONES; THEN, SET ALL BUT ONE BIT OF AC+1
1747 ;REPEAT FOR ALL 36 BITS OF MQ
1748 ;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
1749 001605 SN=SN+1
1750 000037 ZZ=ZZ+ZZ+1 ;TESTED BIT
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 7-2
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST MQ-ADDER GATING SEQ 0051
1751 IFE ZZ,<ZZ=-2>
1752 031425 476 00 0 00 000007 SETOM AC ;INITIALIZE TO ALL ONES
1753 031426 561 10 0 00 000037 HRROI AC+1,ZZ&777777 ;INITIALIZE AC+1
1754 031427 200 06 0 00 000010 MOVE AC-1,AC+1 ;SETUP FOR COMPARISON
1755 031430 245 07 0 00 000000 ROTC AC,0 ;*ROT 0 BIT POSITIONS
1756 031431 312 10 0 00 000006 CAME AC+1,AC-1 ;CHECK BIT (N) OF AC+1
1757 031432 004 10 0 00 001605 ER4 AC+1,SN ;MQ-AD GATE FAILED
1758 031433 321 11 0 00 031425 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
1759
1760 ;CHECK AC+1 RIGHT
1761
1762 ;VERIFY MQ-AD GATING
1763 ;ROTC A RIPPLED ZERO ZERO POSITIONS IN AC+1
1764 ;FIRST SET AC TO ALL ONES; THEN, SET ALL BUT ONE BIT OF AC+1
1765 ;REPEAT FOR ALL 36 BITS OF MQ
1766 ;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
1767 001606 SN=SN+1
1768 000077 ZZ=ZZ+ZZ+1 ;TESTED BIT
1769 IFE ZZ,<ZZ=-2>
1770 031434 476 00 0 00 000007 SETOM AC ;INITIALIZE TO ALL ONES
1771 031435 561 10 0 00 000077 HRROI AC+1,ZZ&777777 ;INITIALIZE AC+1
1772 031436 200 06 0 00 000010 MOVE AC-1,AC+1 ;SETUP FOR COMPARISON
1773 031437 245 07 0 00 000000 ROTC AC,0 ;*ROT 0 BIT POSITIONS
1774 031440 312 10 0 00 000006 CAME AC+1,AC-1 ;CHECK BIT (N) OF AC+1
1775 031441 004 10 0 00 001606 ER4 AC+1,SN ;MQ-AD GATE FAILED
1776 031442 321 11 0 00 031434 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
1777
1778 ;CHECK AC+1 RIGHT
1779
1780 ;VERIFY MQ-AD GATING
1781 ;ROTC A RIPPLED ZERO ZERO POSITIONS IN AC+1
1782 ;FIRST SET AC TO ALL ONES; THEN, SET ALL BUT ONE BIT OF AC+1
1783 ;REPEAT FOR ALL 36 BITS OF MQ
1784 ;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
1785 001607 SN=SN+1
1786 000177 ZZ=ZZ+ZZ+1 ;TESTED BIT
1787 IFE ZZ,<ZZ=-2>
1788 031443 476 00 0 00 000007 SETOM AC ;INITIALIZE TO ALL ONES
1789 031444 561 10 0 00 000177 HRROI AC+1,ZZ&777777 ;INITIALIZE AC+1
1790 031445 200 06 0 00 000010 MOVE AC-1,AC+1 ;SETUP FOR COMPARISON
1791 031446 245 07 0 00 000000 ROTC AC,0 ;*ROT 0 BIT POSITIONS
1792 031447 312 10 0 00 000006 CAME AC+1,AC-1 ;CHECK BIT (N) OF AC+1
1793 031450 004 10 0 00 001607 ER4 AC+1,SN ;MQ-AD GATE FAILED
1794 031451 321 11 0 00 031443 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
1795
1796 ;CHECK AC+1 RIGHT
1797
1798 ;VERIFY MQ-AD GATING
1799 ;ROTC A RIPPLED ZERO ZERO POSITIONS IN AC+1
1800 ;FIRST SET AC TO ALL ONES; THEN, SET ALL BUT ONE BIT OF AC+1
1801 ;REPEAT FOR ALL 36 BITS OF MQ
1802 ;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
1803 001610 SN=SN+1
1804 000377 ZZ=ZZ+ZZ+1 ;TESTED BIT
1805 IFE ZZ,<ZZ=-2>
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 7-3
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST MQ-ADDER GATING SEQ 0052
1806 031452 476 00 0 00 000007 SETOM AC ;INITIALIZE TO ALL ONES
1807 031453 561 10 0 00 000377 HRROI AC+1,ZZ&777777 ;INITIALIZE AC+1
1808 031454 200 06 0 00 000010 MOVE AC-1,AC+1 ;SETUP FOR COMPARISON
1809 031455 245 07 0 00 000000 ROTC AC,0 ;*ROT 0 BIT POSITIONS
1810 031456 312 10 0 00 000006 CAME AC+1,AC-1 ;CHECK BIT (N) OF AC+1
1811 031457 004 10 0 00 001610 ER4 AC+1,SN ;MQ-AD GATE FAILED
1812 031460 321 11 0 00 031452 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
1813
1814 ;CHECK AC+1 RIGHT
1815
1816 ;VERIFY MQ-AD GATING
1817 ;ROTC A RIPPLED ZERO ZERO POSITIONS IN AC+1
1818 ;FIRST SET AC TO ALL ONES; THEN, SET ALL BUT ONE BIT OF AC+1
1819 ;REPEAT FOR ALL 36 BITS OF MQ
1820 ;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
1821 001611 SN=SN+1
1822 000777 ZZ=ZZ+ZZ+1 ;TESTED BIT
1823 IFE ZZ,<ZZ=-2>
1824 031461 476 00 0 00 000007 SETOM AC ;INITIALIZE TO ALL ONES
1825 031462 561 10 0 00 000777 HRROI AC+1,ZZ&777777 ;INITIALIZE AC+1
1826 031463 200 06 0 00 000010 MOVE AC-1,AC+1 ;SETUP FOR COMPARISON
1827 031464 245 07 0 00 000000 ROTC AC,0 ;*ROT 0 BIT POSITIONS
1828 031465 312 10 0 00 000006 CAME AC+1,AC-1 ;CHECK BIT (N) OF AC+1
1829 031466 004 10 0 00 001611 ER4 AC+1,SN ;MQ-AD GATE FAILED
1830 031467 321 11 0 00 031461 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
1831
1832 ;CHECK AC+1 RIGHT
1833
1834 ;VERIFY MQ-AD GATING
1835 ;ROTC A RIPPLED ZERO ZERO POSITIONS IN AC+1
1836 ;FIRST SET AC TO ALL ONES; THEN, SET ALL BUT ONE BIT OF AC+1
1837 ;REPEAT FOR ALL 36 BITS OF MQ
1838 ;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
1839 001612 SN=SN+1
1840 001777 ZZ=ZZ+ZZ+1 ;TESTED BIT
1841 IFE ZZ,<ZZ=-2>
1842 031470 476 00 0 00 000007 SETOM AC ;INITIALIZE TO ALL ONES
1843 031471 561 10 0 00 001777 HRROI AC+1,ZZ&777777 ;INITIALIZE AC+1
1844 031472 200 06 0 00 000010 MOVE AC-1,AC+1 ;SETUP FOR COMPARISON
1845 031473 245 07 0 00 000000 ROTC AC,0 ;*ROT 0 BIT POSITIONS
1846 031474 312 10 0 00 000006 CAME AC+1,AC-1 ;CHECK BIT (N) OF AC+1
1847 031475 004 10 0 00 001612 ER4 AC+1,SN ;MQ-AD GATE FAILED
1848 031476 321 11 0 00 031470 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
1849
1850 ;CHECK AC+1 RIGHT
1851
1852 ;VERIFY MQ-AD GATING
1853 ;ROTC A RIPPLED ZERO ZERO POSITIONS IN AC+1
1854 ;FIRST SET AC TO ALL ONES; THEN, SET ALL BUT ONE BIT OF AC+1
1855 ;REPEAT FOR ALL 36 BITS OF MQ
1856 ;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
1857 001613 SN=SN+1
1858 003777 ZZ=ZZ+ZZ+1 ;TESTED BIT
1859 IFE ZZ,<ZZ=-2>
1860 031477 476 00 0 00 000007 SETOM AC ;INITIALIZE TO ALL ONES
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 7-4
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST MQ-ADDER GATING SEQ 0053
1861 031500 561 10 0 00 003777 HRROI AC+1,ZZ&777777 ;INITIALIZE AC+1
1862 031501 200 06 0 00 000010 MOVE AC-1,AC+1 ;SETUP FOR COMPARISON
1863 031502 245 07 0 00 000000 ROTC AC,0 ;*ROT 0 BIT POSITIONS
1864 031503 312 10 0 00 000006 CAME AC+1,AC-1 ;CHECK BIT (N) OF AC+1
1865 031504 004 10 0 00 001613 ER4 AC+1,SN ;MQ-AD GATE FAILED
1866 031505 321 11 0 00 031477 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
1867
1868 ;CHECK AC+1 RIGHT
1869
1870 ;VERIFY MQ-AD GATING
1871 ;ROTC A RIPPLED ZERO ZERO POSITIONS IN AC+1
1872 ;FIRST SET AC TO ALL ONES; THEN, SET ALL BUT ONE BIT OF AC+1
1873 ;REPEAT FOR ALL 36 BITS OF MQ
1874 ;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
1875 001614 SN=SN+1
1876 007777 ZZ=ZZ+ZZ+1 ;TESTED BIT
1877 IFE ZZ,<ZZ=-2>
1878 031506 476 00 0 00 000007 SETOM AC ;INITIALIZE TO ALL ONES
1879 031507 561 10 0 00 007777 HRROI AC+1,ZZ&777777 ;INITIALIZE AC+1
1880 031510 200 06 0 00 000010 MOVE AC-1,AC+1 ;SETUP FOR COMPARISON
1881 031511 245 07 0 00 000000 ROTC AC,0 ;*ROT 0 BIT POSITIONS
1882 031512 312 10 0 00 000006 CAME AC+1,AC-1 ;CHECK BIT (N) OF AC+1
1883 031513 004 10 0 00 001614 ER4 AC+1,SN ;MQ-AD GATE FAILED
1884 031514 321 11 0 00 031506 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
1885
1886 ;CHECK AC+1 RIGHT
1887
1888 ;VERIFY MQ-AD GATING
1889 ;ROTC A RIPPLED ZERO ZERO POSITIONS IN AC+1
1890 ;FIRST SET AC TO ALL ONES; THEN, SET ALL BUT ONE BIT OF AC+1
1891 ;REPEAT FOR ALL 36 BITS OF MQ
1892 ;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
1893 001615 SN=SN+1
1894 017777 ZZ=ZZ+ZZ+1 ;TESTED BIT
1895 IFE ZZ,<ZZ=-2>
1896 031515 476 00 0 00 000007 SETOM AC ;INITIALIZE TO ALL ONES
1897 031516 561 10 0 00 017777 HRROI AC+1,ZZ&777777 ;INITIALIZE AC+1
1898 031517 200 06 0 00 000010 MOVE AC-1,AC+1 ;SETUP FOR COMPARISON
1899 031520 245 07 0 00 000000 ROTC AC,0 ;*ROT 0 BIT POSITIONS
1900 031521 312 10 0 00 000006 CAME AC+1,AC-1 ;CHECK BIT (N) OF AC+1
1901 031522 004 10 0 00 001615 ER4 AC+1,SN ;MQ-AD GATE FAILED
1902 031523 321 11 0 00 031515 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
1903
1904 ;CHECK AC+1 RIGHT
1905
1906 ;VERIFY MQ-AD GATING
1907 ;ROTC A RIPPLED ZERO ZERO POSITIONS IN AC+1
1908 ;FIRST SET AC TO ALL ONES; THEN, SET ALL BUT ONE BIT OF AC+1
1909 ;REPEAT FOR ALL 36 BITS OF MQ
1910 ;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
1911 001616 SN=SN+1
1912 037777 ZZ=ZZ+ZZ+1 ;TESTED BIT
1913 IFE ZZ,<ZZ=-2>
1914 031524 476 00 0 00 000007 SETOM AC ;INITIALIZE TO ALL ONES
1915 031525 561 10 0 00 037777 HRROI AC+1,ZZ&777777 ;INITIALIZE AC+1
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 7-5
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST MQ-ADDER GATING SEQ 0054
1916 031526 200 06 0 00 000010 MOVE AC-1,AC+1 ;SETUP FOR COMPARISON
1917 031527 245 07 0 00 000000 ROTC AC,0 ;*ROT 0 BIT POSITIONS
1918 031530 312 10 0 00 000006 CAME AC+1,AC-1 ;CHECK BIT (N) OF AC+1
1919 031531 004 10 0 00 001616 ER4 AC+1,SN ;MQ-AD GATE FAILED
1920 031532 321 11 0 00 031524 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
1921
1922 ;CHECK AC+1 RIGHT
1923
1924 ;VERIFY MQ-AD GATING
1925 ;ROTC A RIPPLED ZERO ZERO POSITIONS IN AC+1
1926 ;FIRST SET AC TO ALL ONES; THEN, SET ALL BUT ONE BIT OF AC+1
1927 ;REPEAT FOR ALL 36 BITS OF MQ
1928 ;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
1929 001617 SN=SN+1
1930 077777 ZZ=ZZ+ZZ+1 ;TESTED BIT
1931 IFE ZZ,<ZZ=-2>
1932 031533 476 00 0 00 000007 SETOM AC ;INITIALIZE TO ALL ONES
1933 031534 561 10 0 00 077777 HRROI AC+1,ZZ&777777 ;INITIALIZE AC+1
1934 031535 200 06 0 00 000010 MOVE AC-1,AC+1 ;SETUP FOR COMPARISON
1935 031536 245 07 0 00 000000 ROTC AC,0 ;*ROT 0 BIT POSITIONS
1936 031537 312 10 0 00 000006 CAME AC+1,AC-1 ;CHECK BIT (N) OF AC+1
1937 031540 004 10 0 00 001617 ER4 AC+1,SN ;MQ-AD GATE FAILED
1938 031541 321 11 0 00 031533 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
1939
1940 ;CHECK AC+1 RIGHT
1941
1942 ;VERIFY MQ-AD GATING
1943 ;ROTC A RIPPLED ZERO ZERO POSITIONS IN AC+1
1944 ;FIRST SET AC TO ALL ONES; THEN, SET ALL BUT ONE BIT OF AC+1
1945 ;REPEAT FOR ALL 36 BITS OF MQ
1946 ;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
1947 001620 SN=SN+1
1948 177777 ZZ=ZZ+ZZ+1 ;TESTED BIT
1949 IFE ZZ,<ZZ=-2>
1950 031542 476 00 0 00 000007 SETOM AC ;INITIALIZE TO ALL ONES
1951 031543 561 10 0 00 177777 HRROI AC+1,ZZ&777777 ;INITIALIZE AC+1
1952 031544 200 06 0 00 000010 MOVE AC-1,AC+1 ;SETUP FOR COMPARISON
1953 031545 245 07 0 00 000000 ROTC AC,0 ;*ROT 0 BIT POSITIONS
1954 031546 312 10 0 00 000006 CAME AC+1,AC-1 ;CHECK BIT (N) OF AC+1
1955 031547 004 10 0 00 001620 ER4 AC+1,SN ;MQ-AD GATE FAILED
1956 031550 321 11 0 00 031542 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
1957
1958 ;CHECK AC+1 RIGHT
1959
1960 ;VERIFY MQ-AD GATING
1961 ;ROTC A RIPPLED ZERO ZERO POSITIONS IN AC+1
1962 ;FIRST SET AC TO ALL ONES; THEN, SET ALL BUT ONE BIT OF AC+1
1963 ;REPEAT FOR ALL 36 BITS OF MQ
1964 ;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
1965 001621 SN=SN+1
1966 377777 ZZ=ZZ+ZZ+1 ;TESTED BIT
1967 IFE ZZ,<ZZ=-2>
1968 031551 476 00 0 00 000007 SETOM AC ;INITIALIZE TO ALL ONES
1969 031552 561 10 0 00 377777 HRROI AC+1,ZZ&777777 ;INITIALIZE AC+1
1970 031553 200 06 0 00 000010 MOVE AC-1,AC+1 ;SETUP FOR COMPARISON
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 7-6
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST MQ-ADDER GATING SEQ 0055
1971 031554 245 07 0 00 000000 ROTC AC,0 ;*ROT 0 BIT POSITIONS
1972 031555 312 10 0 00 000006 CAME AC+1,AC-1 ;CHECK BIT (N) OF AC+1
1973 031556 004 10 0 00 001621 ER4 AC+1,SN ;MQ-AD GATE FAILED
1974 031557 321 11 0 00 031551 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
1975
1976 ;CHECK AC+1 RIGHT
1977
1978 ;VERIFY MQ-AD GATING
1979 ;ROTC A RIPPLED ZERO ZERO POSITIONS IN AC+1
1980 ;FIRST SET AC TO ALL ONES; THEN, SET ALL BUT ONE BIT OF AC+1
1981 ;REPEAT FOR ALL 36 BITS OF MQ
1982 ;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
1983 001622 SN=SN+1
1984 777777 ZZ=ZZ+ZZ+1 ;TESTED BIT
1985 IFE ZZ,<ZZ=-2>
1986 031560 476 00 0 00 000007 SETOM AC ;INITIALIZE TO ALL ONES
1987 031561 561 10 0 00 777777 HRROI AC+1,ZZ&777777 ;INITIALIZE AC+1
1988 031562 200 06 0 00 000010 MOVE AC-1,AC+1 ;SETUP FOR COMPARISON
1989 031563 245 07 0 00 000000 ROTC AC,0 ;*ROT 0 BIT POSITIONS
1990 031564 312 10 0 00 000006 CAME AC+1,AC-1 ;CHECK BIT (N) OF AC+1
1991 031565 004 10 0 00 001622 ER4 AC+1,SN ;MQ-AD GATE FAILED
1992 031566 321 11 0 00 031560 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
1993
1994 PAGE
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 7-7
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST MQ-ADDER GATING SEQ 0056
1995 000000 ZZ=0
1996 REPEAT ^D18,< ;CHECK AC+1 LEFT
1997
1998 ;VERIFY MQ-AD GATING
1999 ;ROTC A RIPPLED ZERO ZERO POSIOTIONS IN AC+1
2000 ;FIRST SET AC TO ALL ONES; THEN, SET ALL BUT ONE BIT OF AC+1
2001 ;REPEAT FOR ALL 36 BITS OF MQ
2002 ;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
2003 SN=SN+1
2004 ZZ=ZZ+ZZ+1 ;TESTED BIT
2005 IFE ZZ,<ZZ=-2>
2006 SETOM AC ;INITIALIZE AC TO ALL ONES
2007 HRLOI AC+1,ZZ&777777 ;INITIALIZE AC+1
2008 MOVE AC-1,AC+1 ;SETUP FOR COMPARISON
2009 ROTC AC,0 ;*ROT 0 BIT POSITIONS
2010 CAME AC+1,AC-1 ;CHECK BIT (N) OF AC+1
2011 ER4 AC+1,SN ;MQ-AD GATE FAILED
2012 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
2013 >
2014 ;CHECK AC+1 LEFT
2015
2016 ;VERIFY MQ-AD GATING
2017 ;ROTC A RIPPLED ZERO ZERO POSIOTIONS IN AC+1
2018 ;FIRST SET AC TO ALL ONES; THEN, SET ALL BUT ONE BIT OF AC+1
2019 ;REPEAT FOR ALL 36 BITS OF MQ
2020 ;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
2021 001623 SN=SN+1
2022 000001 ZZ=ZZ+ZZ+1 ;TESTED BIT
2023 IFE ZZ,<ZZ=-2>
2024 031567 476 00 0 00 000007 SETOM AC ;INITIALIZE AC TO ALL ONES
2025 031570 525 10 0 00 000001 HRLOI AC+1,ZZ&777777 ;INITIALIZE AC+1
2026 031571 200 06 0 00 000010 MOVE AC-1,AC+1 ;SETUP FOR COMPARISON
2027 031572 245 07 0 00 000000 ROTC AC,0 ;*ROT 0 BIT POSITIONS
2028 031573 312 10 0 00 000006 CAME AC+1,AC-1 ;CHECK BIT (N) OF AC+1
2029 031574 004 10 0 00 001623 ER4 AC+1,SN ;MQ-AD GATE FAILED
2030 031575 321 11 0 00 031567 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
2031
2032 ;CHECK AC+1 LEFT
2033
2034 ;VERIFY MQ-AD GATING
2035 ;ROTC A RIPPLED ZERO ZERO POSIOTIONS IN AC+1
2036 ;FIRST SET AC TO ALL ONES; THEN, SET ALL BUT ONE BIT OF AC+1
2037 ;REPEAT FOR ALL 36 BITS OF MQ
2038 ;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
2039 001624 SN=SN+1
2040 000003 ZZ=ZZ+ZZ+1 ;TESTED BIT
2041 IFE ZZ,<ZZ=-2>
2042 031576 476 00 0 00 000007 SETOM AC ;INITIALIZE AC TO ALL ONES
2043 031577 525 10 0 00 000003 HRLOI AC+1,ZZ&777777 ;INITIALIZE AC+1
2044 031600 200 06 0 00 000010 MOVE AC-1,AC+1 ;SETUP FOR COMPARISON
2045 031601 245 07 0 00 000000 ROTC AC,0 ;*ROT 0 BIT POSITIONS
2046 031602 312 10 0 00 000006 CAME AC+1,AC-1 ;CHECK BIT (N) OF AC+1
2047 031603 004 10 0 00 001624 ER4 AC+1,SN ;MQ-AD GATE FAILED
2048 031604 321 11 0 00 031576 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
2049
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 7-8
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST MQ-ADDER GATING SEQ 0057
2050 ;CHECK AC+1 LEFT
2051
2052 ;VERIFY MQ-AD GATING
2053 ;ROTC A RIPPLED ZERO ZERO POSIOTIONS IN AC+1
2054 ;FIRST SET AC TO ALL ONES; THEN, SET ALL BUT ONE BIT OF AC+1
2055 ;REPEAT FOR ALL 36 BITS OF MQ
2056 ;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
2057 001625 SN=SN+1
2058 000007 ZZ=ZZ+ZZ+1 ;TESTED BIT
2059 IFE ZZ,<ZZ=-2>
2060 031605 476 00 0 00 000007 SETOM AC ;INITIALIZE AC TO ALL ONES
2061 031606 525 10 0 00 000007 HRLOI AC+1,ZZ&777777 ;INITIALIZE AC+1
2062 031607 200 06 0 00 000010 MOVE AC-1,AC+1 ;SETUP FOR COMPARISON
2063 031610 245 07 0 00 000000 ROTC AC,0 ;*ROT 0 BIT POSITIONS
2064 031611 312 10 0 00 000006 CAME AC+1,AC-1 ;CHECK BIT (N) OF AC+1
2065 031612 004 10 0 00 001625 ER4 AC+1,SN ;MQ-AD GATE FAILED
2066 031613 321 11 0 00 031605 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
2067
2068 ;CHECK AC+1 LEFT
2069
2070 ;VERIFY MQ-AD GATING
2071 ;ROTC A RIPPLED ZERO ZERO POSIOTIONS IN AC+1
2072 ;FIRST SET AC TO ALL ONES; THEN, SET ALL BUT ONE BIT OF AC+1
2073 ;REPEAT FOR ALL 36 BITS OF MQ
2074 ;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
2075 001626 SN=SN+1
2076 000017 ZZ=ZZ+ZZ+1 ;TESTED BIT
2077 IFE ZZ,<ZZ=-2>
2078 031614 476 00 0 00 000007 SETOM AC ;INITIALIZE AC TO ALL ONES
2079 031615 525 10 0 00 000017 HRLOI AC+1,ZZ&777777 ;INITIALIZE AC+1
2080 031616 200 06 0 00 000010 MOVE AC-1,AC+1 ;SETUP FOR COMPARISON
2081 031617 245 07 0 00 000000 ROTC AC,0 ;*ROT 0 BIT POSITIONS
2082 031620 312 10 0 00 000006 CAME AC+1,AC-1 ;CHECK BIT (N) OF AC+1
2083 031621 004 10 0 00 001626 ER4 AC+1,SN ;MQ-AD GATE FAILED
2084 031622 321 11 0 00 031614 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
2085
2086 ;CHECK AC+1 LEFT
2087
2088 ;VERIFY MQ-AD GATING
2089 ;ROTC A RIPPLED ZERO ZERO POSIOTIONS IN AC+1
2090 ;FIRST SET AC TO ALL ONES; THEN, SET ALL BUT ONE BIT OF AC+1
2091 ;REPEAT FOR ALL 36 BITS OF MQ
2092 ;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
2093 001627 SN=SN+1
2094 000037 ZZ=ZZ+ZZ+1 ;TESTED BIT
2095 IFE ZZ,<ZZ=-2>
2096 031623 476 00 0 00 000007 SETOM AC ;INITIALIZE AC TO ALL ONES
2097 031624 525 10 0 00 000037 HRLOI AC+1,ZZ&777777 ;INITIALIZE AC+1
2098 031625 200 06 0 00 000010 MOVE AC-1,AC+1 ;SETUP FOR COMPARISON
2099 031626 245 07 0 00 000000 ROTC AC,0 ;*ROT 0 BIT POSITIONS
2100 031627 312 10 0 00 000006 CAME AC+1,AC-1 ;CHECK BIT (N) OF AC+1
2101 031630 004 10 0 00 001627 ER4 AC+1,SN ;MQ-AD GATE FAILED
2102 031631 321 11 0 00 031623 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
2103
2104 ;CHECK AC+1 LEFT
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 7-9
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST MQ-ADDER GATING SEQ 0058
2105
2106 ;VERIFY MQ-AD GATING
2107 ;ROTC A RIPPLED ZERO ZERO POSIOTIONS IN AC+1
2108 ;FIRST SET AC TO ALL ONES; THEN, SET ALL BUT ONE BIT OF AC+1
2109 ;REPEAT FOR ALL 36 BITS OF MQ
2110 ;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
2111 001630 SN=SN+1
2112 000077 ZZ=ZZ+ZZ+1 ;TESTED BIT
2113 IFE ZZ,<ZZ=-2>
2114 031632 476 00 0 00 000007 SETOM AC ;INITIALIZE AC TO ALL ONES
2115 031633 525 10 0 00 000077 HRLOI AC+1,ZZ&777777 ;INITIALIZE AC+1
2116 031634 200 06 0 00 000010 MOVE AC-1,AC+1 ;SETUP FOR COMPARISON
2117 031635 245 07 0 00 000000 ROTC AC,0 ;*ROT 0 BIT POSITIONS
2118 031636 312 10 0 00 000006 CAME AC+1,AC-1 ;CHECK BIT (N) OF AC+1
2119 031637 004 10 0 00 001630 ER4 AC+1,SN ;MQ-AD GATE FAILED
2120 031640 321 11 0 00 031632 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
2121
2122 ;CHECK AC+1 LEFT
2123
2124 ;VERIFY MQ-AD GATING
2125 ;ROTC A RIPPLED ZERO ZERO POSIOTIONS IN AC+1
2126 ;FIRST SET AC TO ALL ONES; THEN, SET ALL BUT ONE BIT OF AC+1
2127 ;REPEAT FOR ALL 36 BITS OF MQ
2128 ;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
2129 001631 SN=SN+1
2130 000177 ZZ=ZZ+ZZ+1 ;TESTED BIT
2131 IFE ZZ,<ZZ=-2>
2132 031641 476 00 0 00 000007 SETOM AC ;INITIALIZE AC TO ALL ONES
2133 031642 525 10 0 00 000177 HRLOI AC+1,ZZ&777777 ;INITIALIZE AC+1
2134 031643 200 06 0 00 000010 MOVE AC-1,AC+1 ;SETUP FOR COMPARISON
2135 031644 245 07 0 00 000000 ROTC AC,0 ;*ROT 0 BIT POSITIONS
2136 031645 312 10 0 00 000006 CAME AC+1,AC-1 ;CHECK BIT (N) OF AC+1
2137 031646 004 10 0 00 001631 ER4 AC+1,SN ;MQ-AD GATE FAILED
2138 031647 321 11 0 00 031641 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
2139
2140 ;CHECK AC+1 LEFT
2141
2142 ;VERIFY MQ-AD GATING
2143 ;ROTC A RIPPLED ZERO ZERO POSIOTIONS IN AC+1
2144 ;FIRST SET AC TO ALL ONES; THEN, SET ALL BUT ONE BIT OF AC+1
2145 ;REPEAT FOR ALL 36 BITS OF MQ
2146 ;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
2147 001632 SN=SN+1
2148 000377 ZZ=ZZ+ZZ+1 ;TESTED BIT
2149 IFE ZZ,<ZZ=-2>
2150 031650 476 00 0 00 000007 SETOM AC ;INITIALIZE AC TO ALL ONES
2151 031651 525 10 0 00 000377 HRLOI AC+1,ZZ&777777 ;INITIALIZE AC+1
2152 031652 200 06 0 00 000010 MOVE AC-1,AC+1 ;SETUP FOR COMPARISON
2153 031653 245 07 0 00 000000 ROTC AC,0 ;*ROT 0 BIT POSITIONS
2154 031654 312 10 0 00 000006 CAME AC+1,AC-1 ;CHECK BIT (N) OF AC+1
2155 031655 004 10 0 00 001632 ER4 AC+1,SN ;MQ-AD GATE FAILED
2156 031656 321 11 0 00 031650 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
2157
2158 ;CHECK AC+1 LEFT
2159
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 7-10
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST MQ-ADDER GATING SEQ 0059
2160 ;VERIFY MQ-AD GATING
2161 ;ROTC A RIPPLED ZERO ZERO POSIOTIONS IN AC+1
2162 ;FIRST SET AC TO ALL ONES; THEN, SET ALL BUT ONE BIT OF AC+1
2163 ;REPEAT FOR ALL 36 BITS OF MQ
2164 ;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
2165 001633 SN=SN+1
2166 000777 ZZ=ZZ+ZZ+1 ;TESTED BIT
2167 IFE ZZ,<ZZ=-2>
2168 031657 476 00 0 00 000007 SETOM AC ;INITIALIZE AC TO ALL ONES
2169 031660 525 10 0 00 000777 HRLOI AC+1,ZZ&777777 ;INITIALIZE AC+1
2170 031661 200 06 0 00 000010 MOVE AC-1,AC+1 ;SETUP FOR COMPARISON
2171 031662 245 07 0 00 000000 ROTC AC,0 ;*ROT 0 BIT POSITIONS
2172 031663 312 10 0 00 000006 CAME AC+1,AC-1 ;CHECK BIT (N) OF AC+1
2173 031664 004 10 0 00 001633 ER4 AC+1,SN ;MQ-AD GATE FAILED
2174 031665 321 11 0 00 031657 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
2175
2176 ;CHECK AC+1 LEFT
2177
2178 ;VERIFY MQ-AD GATING
2179 ;ROTC A RIPPLED ZERO ZERO POSIOTIONS IN AC+1
2180 ;FIRST SET AC TO ALL ONES; THEN, SET ALL BUT ONE BIT OF AC+1
2181 ;REPEAT FOR ALL 36 BITS OF MQ
2182 ;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
2183 001634 SN=SN+1
2184 001777 ZZ=ZZ+ZZ+1 ;TESTED BIT
2185 IFE ZZ,<ZZ=-2>
2186 031666 476 00 0 00 000007 SETOM AC ;INITIALIZE AC TO ALL ONES
2187 031667 525 10 0 00 001777 HRLOI AC+1,ZZ&777777 ;INITIALIZE AC+1
2188 031670 200 06 0 00 000010 MOVE AC-1,AC+1 ;SETUP FOR COMPARISON
2189 031671 245 07 0 00 000000 ROTC AC,0 ;*ROT 0 BIT POSITIONS
2190 031672 312 10 0 00 000006 CAME AC+1,AC-1 ;CHECK BIT (N) OF AC+1
2191 031673 004 10 0 00 001634 ER4 AC+1,SN ;MQ-AD GATE FAILED
2192 031674 321 11 0 00 031666 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
2193
2194 ;CHECK AC+1 LEFT
2195
2196 ;VERIFY MQ-AD GATING
2197 ;ROTC A RIPPLED ZERO ZERO POSIOTIONS IN AC+1
2198 ;FIRST SET AC TO ALL ONES; THEN, SET ALL BUT ONE BIT OF AC+1
2199 ;REPEAT FOR ALL 36 BITS OF MQ
2200 ;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
2201 001635 SN=SN+1
2202 003777 ZZ=ZZ+ZZ+1 ;TESTED BIT
2203 IFE ZZ,<ZZ=-2>
2204 031675 476 00 0 00 000007 SETOM AC ;INITIALIZE AC TO ALL ONES
2205 031676 525 10 0 00 003777 HRLOI AC+1,ZZ&777777 ;INITIALIZE AC+1
2206 031677 200 06 0 00 000010 MOVE AC-1,AC+1 ;SETUP FOR COMPARISON
2207 031700 245 07 0 00 000000 ROTC AC,0 ;*ROT 0 BIT POSITIONS
2208 031701 312 10 0 00 000006 CAME AC+1,AC-1 ;CHECK BIT (N) OF AC+1
2209 031702 004 10 0 00 001635 ER4 AC+1,SN ;MQ-AD GATE FAILED
2210 031703 321 11 0 00 031675 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
2211
2212 ;CHECK AC+1 LEFT
2213
2214 ;VERIFY MQ-AD GATING
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 7-11
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST MQ-ADDER GATING SEQ 0060
2215 ;ROTC A RIPPLED ZERO ZERO POSIOTIONS IN AC+1
2216 ;FIRST SET AC TO ALL ONES; THEN, SET ALL BUT ONE BIT OF AC+1
2217 ;REPEAT FOR ALL 36 BITS OF MQ
2218 ;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
2219 001636 SN=SN+1
2220 007777 ZZ=ZZ+ZZ+1 ;TESTED BIT
2221 IFE ZZ,<ZZ=-2>
2222 031704 476 00 0 00 000007 SETOM AC ;INITIALIZE AC TO ALL ONES
2223 031705 525 10 0 00 007777 HRLOI AC+1,ZZ&777777 ;INITIALIZE AC+1
2224 031706 200 06 0 00 000010 MOVE AC-1,AC+1 ;SETUP FOR COMPARISON
2225 031707 245 07 0 00 000000 ROTC AC,0 ;*ROT 0 BIT POSITIONS
2226 031710 312 10 0 00 000006 CAME AC+1,AC-1 ;CHECK BIT (N) OF AC+1
2227 031711 004 10 0 00 001636 ER4 AC+1,SN ;MQ-AD GATE FAILED
2228 031712 321 11 0 00 031704 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
2229
2230 ;CHECK AC+1 LEFT
2231
2232 ;VERIFY MQ-AD GATING
2233 ;ROTC A RIPPLED ZERO ZERO POSIOTIONS IN AC+1
2234 ;FIRST SET AC TO ALL ONES; THEN, SET ALL BUT ONE BIT OF AC+1
2235 ;REPEAT FOR ALL 36 BITS OF MQ
2236 ;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
2237 001637 SN=SN+1
2238 017777 ZZ=ZZ+ZZ+1 ;TESTED BIT
2239 IFE ZZ,<ZZ=-2>
2240 031713 476 00 0 00 000007 SETOM AC ;INITIALIZE AC TO ALL ONES
2241 031714 525 10 0 00 017777 HRLOI AC+1,ZZ&777777 ;INITIALIZE AC+1
2242 031715 200 06 0 00 000010 MOVE AC-1,AC+1 ;SETUP FOR COMPARISON
2243 031716 245 07 0 00 000000 ROTC AC,0 ;*ROT 0 BIT POSITIONS
2244 031717 312 10 0 00 000006 CAME AC+1,AC-1 ;CHECK BIT (N) OF AC+1
2245 031720 004 10 0 00 001637 ER4 AC+1,SN ;MQ-AD GATE FAILED
2246 031721 321 11 0 00 031713 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
2247
2248 ;CHECK AC+1 LEFT
2249
2250 ;VERIFY MQ-AD GATING
2251 ;ROTC A RIPPLED ZERO ZERO POSIOTIONS IN AC+1
2252 ;FIRST SET AC TO ALL ONES; THEN, SET ALL BUT ONE BIT OF AC+1
2253 ;REPEAT FOR ALL 36 BITS OF MQ
2254 ;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
2255 001640 SN=SN+1
2256 037777 ZZ=ZZ+ZZ+1 ;TESTED BIT
2257 IFE ZZ,<ZZ=-2>
2258 031722 476 00 0 00 000007 SETOM AC ;INITIALIZE AC TO ALL ONES
2259 031723 525 10 0 00 037777 HRLOI AC+1,ZZ&777777 ;INITIALIZE AC+1
2260 031724 200 06 0 00 000010 MOVE AC-1,AC+1 ;SETUP FOR COMPARISON
2261 031725 245 07 0 00 000000 ROTC AC,0 ;*ROT 0 BIT POSITIONS
2262 031726 312 10 0 00 000006 CAME AC+1,AC-1 ;CHECK BIT (N) OF AC+1
2263 031727 004 10 0 00 001640 ER4 AC+1,SN ;MQ-AD GATE FAILED
2264 031730 321 11 0 00 031722 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
2265
2266 ;CHECK AC+1 LEFT
2267
2268 ;VERIFY MQ-AD GATING
2269 ;ROTC A RIPPLED ZERO ZERO POSIOTIONS IN AC+1
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 7-12
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST MQ-ADDER GATING SEQ 0061
2270 ;FIRST SET AC TO ALL ONES; THEN, SET ALL BUT ONE BIT OF AC+1
2271 ;REPEAT FOR ALL 36 BITS OF MQ
2272 ;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
2273 001641 SN=SN+1
2274 077777 ZZ=ZZ+ZZ+1 ;TESTED BIT
2275 IFE ZZ,<ZZ=-2>
2276 031731 476 00 0 00 000007 SETOM AC ;INITIALIZE AC TO ALL ONES
2277 031732 525 10 0 00 077777 HRLOI AC+1,ZZ&777777 ;INITIALIZE AC+1
2278 031733 200 06 0 00 000010 MOVE AC-1,AC+1 ;SETUP FOR COMPARISON
2279 031734 245 07 0 00 000000 ROTC AC,0 ;*ROT 0 BIT POSITIONS
2280 031735 312 10 0 00 000006 CAME AC+1,AC-1 ;CHECK BIT (N) OF AC+1
2281 031736 004 10 0 00 001641 ER4 AC+1,SN ;MQ-AD GATE FAILED
2282 031737 321 11 0 00 031731 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
2283
2284 ;CHECK AC+1 LEFT
2285
2286 ;VERIFY MQ-AD GATING
2287 ;ROTC A RIPPLED ZERO ZERO POSIOTIONS IN AC+1
2288 ;FIRST SET AC TO ALL ONES; THEN, SET ALL BUT ONE BIT OF AC+1
2289 ;REPEAT FOR ALL 36 BITS OF MQ
2290 ;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
2291 001642 SN=SN+1
2292 177777 ZZ=ZZ+ZZ+1 ;TESTED BIT
2293 IFE ZZ,<ZZ=-2>
2294 031740 476 00 0 00 000007 SETOM AC ;INITIALIZE AC TO ALL ONES
2295 031741 525 10 0 00 177777 HRLOI AC+1,ZZ&777777 ;INITIALIZE AC+1
2296 031742 200 06 0 00 000010 MOVE AC-1,AC+1 ;SETUP FOR COMPARISON
2297 031743 245 07 0 00 000000 ROTC AC,0 ;*ROT 0 BIT POSITIONS
2298 031744 312 10 0 00 000006 CAME AC+1,AC-1 ;CHECK BIT (N) OF AC+1
2299 031745 004 10 0 00 001642 ER4 AC+1,SN ;MQ-AD GATE FAILED
2300 031746 321 11 0 00 031740 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
2301
2302 ;CHECK AC+1 LEFT
2303
2304 ;VERIFY MQ-AD GATING
2305 ;ROTC A RIPPLED ZERO ZERO POSIOTIONS IN AC+1
2306 ;FIRST SET AC TO ALL ONES; THEN, SET ALL BUT ONE BIT OF AC+1
2307 ;REPEAT FOR ALL 36 BITS OF MQ
2308 ;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
2309 001643 SN=SN+1
2310 377777 ZZ=ZZ+ZZ+1 ;TESTED BIT
2311 IFE ZZ,<ZZ=-2>
2312 031747 476 00 0 00 000007 SETOM AC ;INITIALIZE AC TO ALL ONES
2313 031750 525 10 0 00 377777 HRLOI AC+1,ZZ&777777 ;INITIALIZE AC+1
2314 031751 200 06 0 00 000010 MOVE AC-1,AC+1 ;SETUP FOR COMPARISON
2315 031752 245 07 0 00 000000 ROTC AC,0 ;*ROT 0 BIT POSITIONS
2316 031753 312 10 0 00 000006 CAME AC+1,AC-1 ;CHECK BIT (N) OF AC+1
2317 031754 004 10 0 00 001643 ER4 AC+1,SN ;MQ-AD GATE FAILED
2318 031755 321 11 0 00 031747 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
2319
2320 ;CHECK AC+1 LEFT
2321
2322 ;VERIFY MQ-AD GATING
2323 ;ROTC A RIPPLED ZERO ZERO POSIOTIONS IN AC+1
2324 ;FIRST SET AC TO ALL ONES; THEN, SET ALL BUT ONE BIT OF AC+1
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 7-13
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST MQ-ADDER GATING SEQ 0062
2325 ;REPEAT FOR ALL 36 BITS OF MQ
2326 ;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
2327 001644 SN=SN+1
2328 777777 ZZ=ZZ+ZZ+1 ;TESTED BIT
2329 IFE ZZ,<ZZ=-2>
2330 031756 476 00 0 00 000007 SETOM AC ;INITIALIZE AC TO ALL ONES
2331 031757 525 10 0 00 777777 HRLOI AC+1,ZZ&777777 ;INITIALIZE AC+1
2332 031760 200 06 0 00 000010 MOVE AC-1,AC+1 ;SETUP FOR COMPARISON
2333 031761 245 07 0 00 000000 ROTC AC,0 ;*ROT 0 BIT POSITIONS
2334 031762 312 10 0 00 000006 CAME AC+1,AC-1 ;CHECK BIT (N) OF AC+1
2335 031763 004 10 0 00 001644 ER4 AC+1,SN ;MQ-AD GATE FAILED
2336 031764 321 11 0 00 031756 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
2337
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 8
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - BASIC SHIFT TEST (0,1,-1,-2 BIT POSITIONS) SEQ 0063
2338 SUBTTL DIAGNOSTIC SECTION - BASIC SHIFT TEST (0,1,-1,-2 BIT POSITIONS)
2339
2340 ;BASIC SHIFT TEST
2341 ;TEST ABILITY TO SHIFT A BIT 0,1,-1 AND -2 POSITIONS
2342
2343 000004 AC=4
2344 SAVEAC (1,1)^
2345 031765 201 06 0 00 031765 MOVEI AC+2,. ;SAVE TEST PC
2346 031766 202 06 0 00 030051 MOVEM AC+2,TESTPC
2347 031767 201 06 0 00 000006 MOVEI AC+2,<AC+2>&17 ;INFORM ERROR ROUTINE WHICH
2348 031770 202 06 0 00 041765 MOVEM AC+2,ERRLOP# ;AC IS USED FOR ITERATION^
2349
2350 ;TEST ABILITY TO SHIFT A BIT ZERO POSITIONS USING LSH
2351 SR1 (17,0,10,0,10,LSH,0)^
2352 ;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 0,10] 0 BIT
2353 ;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 0,10]
2354 ;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
2355
2356 031771 200 04 0 00 041614 E1700: MOVE AC,[XWD 0,10] ;INITIALIZE AC
2357 031772 200 05 0 00 041615 MOVE AC+1,[XWD 741703,607417];INITIALIZE AC+1
2358 031773 242 04 0 00 000000 LSH AC,0 ;*SHIFT/ROTATE 0 BIT POSITIONS
2359 031774 312 04 0 00 041614 CAME AC,[XWD 0,10] ;IS RESULT IN AC CORRECT?
2360 031775 003 04 0 00 001701 ER3 AC,1701 ;RESULT IN AC IS INCORRECT
2361 031776 312 05 0 00 041615 CAME AC+1,[XWD 741703,607417]
2362 031777 004 05 0 00 001701 ER4 AC+1,1701 ;C(AC+1) WAS MODIFIED INCORRECTLY
2363 032000 321 06 0 00 031771 JUMPL AC+2,E1700 ;LOOP ON ERROR SWITCH^
2364
2365 ;TEST ABILITY TO SHIFT A BIT LEFT ONE POSITION USING LSH
2366 SR1 (20,0,10,0,20,LSH,1)^
2367 ;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 0,10] 1 BIT
2368 ;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 0,20]
2369 ;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
2370
2371 032001 200 04 0 00 041614 E2000: MOVE AC,[XWD 0,10] ;INITIALIZE AC
2372 032002 200 05 0 00 041615 MOVE AC+1,[XWD 741703,607417];INITIALIZE AC+1
2373 032003 242 04 0 00 000001 LSH AC,1 ;*SHIFT/ROTATE 1 BIT POSITIONS
2374 032004 312 04 0 00 041616 CAME AC,[XWD 0,20] ;IS RESULT IN AC CORRECT?
2375 032005 003 04 0 00 002001 ER3 AC,2001 ;RESULT IN AC IS INCORRECT
2376 032006 312 05 0 00 041615 CAME AC+1,[XWD 741703,607417]
2377 032007 004 05 0 00 002001 ER4 AC+1,2001 ;C(AC+1) WAS MODIFIED INCORRECTLY
2378 032010 321 06 0 00 032001 JUMPL AC+2,E2000 ;LOOP ON ERROR SWITCH^
2379
2380 ;TEST ABILITY TO SHIFT A BIT RIGHT ONE POSITION USING LSH
2381 SR1 (442,0,10,0,4,LSH,-1)^
2382 ;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 0,10] -1 BIT
2383 ;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 0,4]
2384 ;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
2385
2386 032011 200 04 0 00 041614 E44200: MOVE AC,[XWD 0,10] ;INITIALIZE AC
2387 032012 200 05 0 00 041615 MOVE AC+1,[XWD 741703,607417];INITIALIZE AC+1
2388 032013 242 04 0 00 777777 LSH AC,-1 ;*SHIFT/ROTATE -1 BIT POSITIONS
2389 032014 312 04 0 00 041617 CAME AC,[XWD 0,4] ;IS RESULT IN AC CORRECT?
2390 032015 003 04 0 00 044201 ER3 AC,44201 ;RESULT IN AC IS INCORRECT
2391 032016 312 05 0 00 041615 CAME AC+1,[XWD 741703,607417]
2392 032017 004 05 0 00 044201 ER4 AC+1,44201 ;C(AC+1) WAS MODIFIED INCORRECTLY
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 8-1
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - BASIC SHIFT TEST (0,1,-1,-2 BIT POSITIONS) SEQ 0064
2393 032020 321 06 0 00 032011 JUMPL AC+2,E44200 ;LOOP ON ERROR SWITCH^
2394
2395 ;TEST ABILITY TO SHIFT A BIT RIGHT TWO POSITIONS USING LSH
2396 SR1 (21,0,10,0,2,LSH,-2)^
2397 ;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 0,10] -2 BIT
2398 ;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 0,2]
2399 ;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
2400
2401 032021 200 04 0 00 041614 E2100: MOVE AC,[XWD 0,10] ;INITIALIZE AC
2402 032022 200 05 0 00 041615 MOVE AC+1,[XWD 741703,607417];INITIALIZE AC+1
2403 032023 242 04 0 00 777776 LSH AC,-2 ;*SHIFT/ROTATE -2 BIT POSITIONS
2404 032024 312 04 0 00 041620 CAME AC,[XWD 0,2] ;IS RESULT IN AC CORRECT?
2405 032025 003 04 0 00 002101 ER3 AC,2101 ;RESULT IN AC IS INCORRECT
2406 032026 312 05 0 00 041615 CAME AC+1,[XWD 741703,607417]
2407 032027 004 05 0 00 002101 ER4 AC+1,2101 ;C(AC+1) WAS MODIFIED INCORRECTLY
2408 032030 321 06 0 00 032021 JUMPL AC+2,E2100 ;LOOP ON ERROR SWITCH^
2409 PAGE
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 8-2
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - BASIC SHIFT TEST (0,1,-1,-2 BIT POSITIONS) SEQ 0065
2410 ;TEST ABILITY TO SHIFT A BIT ZERO POSITIONS USING LSHC
2411 SR2 (22,0,10,0,10,0,10,0,10,LSHC,0)^
2412 ;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
2413 ;DATA SPECIFIED IN [XWD 0,10] AND [XWD 0,10] 0 BIT POSITIONS AND
2414 ;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD 0,10] AND
2415 ;[XWD 0,10]
2416
2417 032031 200 04 0 00 041614 E2200: MOVE AC,[XWD 0,10] ;INITIALIZE AC
2418 032032 200 05 0 00 041614 MOVE AC+1,[XWD 0,10] ;INITIALIZE AC+1
2419 032033 246 04 0 00 000000 LSHC AC,0 ;*SHIFT/ROTATE COMBINED 0 PLACES
2420 032034 312 04 0 00 041614 CAME AC,[XWD 0,10] ;IS RESULT IN AC CORRECT?
2421 032035 003 04 0 00 002201 ER3 AC,2201 ;RESULT IN AC IS INCORRECT
2422 032036 312 05 0 00 041614 CAME AC+1,[XWD 0,10] ;IS RESULT IN AC+1 CORRECT?
2423 032037 004 05 0 00 002201 ER4 AC+1,2201 ;RESULT IN AC+1 IS INCORRECT
2424 032040 321 06 0 00 032031 JUMPL AC+2,E2200 ;LOOP ON ERROR SWITCH^
2425
2426 ;TEST ABILITY TO SHIFT A BIT LEFT ONE POSITION USING LSHC
2427 SR2 (23,0,10,0,10,0,20,0,20,LSHC,1)^
2428 ;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
2429 ;DATA SPECIFIED IN [XWD 0,10] AND [XWD 0,10] 1 BIT POSITIONS AND
2430 ;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD 0,20] AND
2431 ;[XWD 0,20]
2432
2433 032041 200 04 0 00 041614 E2300: MOVE AC,[XWD 0,10] ;INITIALIZE AC
2434 032042 200 05 0 00 041614 MOVE AC+1,[XWD 0,10] ;INITIALIZE AC+1
2435 032043 246 04 0 00 000001 LSHC AC,1 ;*SHIFT/ROTATE COMBINED 1 PLACES
2436 032044 312 04 0 00 041616 CAME AC,[XWD 0,20] ;IS RESULT IN AC CORRECT?
2437 032045 003 04 0 00 002301 ER3 AC,2301 ;RESULT IN AC IS INCORRECT
2438 032046 312 05 0 00 041616 CAME AC+1,[XWD 0,20] ;IS RESULT IN AC+1 CORRECT?
2439 032047 004 05 0 00 002301 ER4 AC+1,2301 ;RESULT IN AC+1 IS INCORRECT
2440 032050 321 06 0 00 032041 JUMPL AC+2,E2300 ;LOOP ON ERROR SWITCH^
2441
2442 ;TEST ABILITY TO SHIFT A BIT RIGHT ONE POSITION USING LSHC
2443 SR2 (24,0,10,0,10,0,4,0,4,LSHC,-1)^
2444 ;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
2445 ;DATA SPECIFIED IN [XWD 0,10] AND [XWD 0,10] -1 BIT POSITIONS AND
2446 ;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD 0,4] AND
2447 ;[XWD 0,4]
2448
2449 032051 200 04 0 00 041614 E2400: MOVE AC,[XWD 0,10] ;INITIALIZE AC
2450 032052 200 05 0 00 041614 MOVE AC+1,[XWD 0,10] ;INITIALIZE AC+1
2451 032053 246 04 0 00 777777 LSHC AC,-1 ;*SHIFT/ROTATE COMBINED -1 PLACES
2452 032054 312 04 0 00 041617 CAME AC,[XWD 0,4] ;IS RESULT IN AC CORRECT?
2453 032055 003 04 0 00 002401 ER3 AC,2401 ;RESULT IN AC IS INCORRECT
2454 032056 312 05 0 00 041617 CAME AC+1,[XWD 0,4] ;IS RESULT IN AC+1 CORRECT?
2455 032057 004 05 0 00 002401 ER4 AC+1,2401 ;RESULT IN AC+1 IS INCORRECT
2456 032060 321 06 0 00 032051 JUMPL AC+2,E2400 ;LOOP ON ERROR SWITCH^
2457
2458 ;TEST ABILITY TO SHIFT A BIT RIGHT TWO POSITIONS USING LSHC
2459 SR2 (25,0,10,0,10,0,2,0,2,LSHC,-2)^
2460 ;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
2461 ;DATA SPECIFIED IN [XWD 0,10] AND [XWD 0,10] -2 BIT POSITIONS AND
2462 ;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD 0,2] AND
2463 ;[XWD 0,2]
2464
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 8-3
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - BASIC SHIFT TEST (0,1,-1,-2 BIT POSITIONS) SEQ 0066
2465 032061 200 04 0 00 041614 E2500: MOVE AC,[XWD 0,10] ;INITIALIZE AC
2466 032062 200 05 0 00 041614 MOVE AC+1,[XWD 0,10] ;INITIALIZE AC+1
2467 032063 246 04 0 00 777776 LSHC AC,-2 ;*SHIFT/ROTATE COMBINED -2 PLACES
2468 032064 312 04 0 00 041620 CAME AC,[XWD 0,2] ;IS RESULT IN AC CORRECT?
2469 032065 003 04 0 00 002501 ER3 AC,2501 ;RESULT IN AC IS INCORRECT
2470 032066 312 05 0 00 041620 CAME AC+1,[XWD 0,2] ;IS RESULT IN AC+1 CORRECT?
2471 032067 004 05 0 00 002501 ER4 AC+1,2501 ;RESULT IN AC+1 IS INCORRECT
2472 032070 321 06 0 00 032061 JUMPL AC+2,E2500 ;LOOP ON ERROR SWITCH^
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 9
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST SAC FUNCTION SEQ 0067
2473 SUBTTL DIAGNOSTIC SECTION - TEST SAC FUNCTION
2474
2475 000010 AC=10
2476 SAVEAC (1,1)^
2477 032071 201 12 0 00 032071 MOVEI AC+2,. ;SAVE TEST PC
2478 032072 202 12 0 00 030051 MOVEM AC+2,TESTPC
2479 032073 201 12 0 00 000012 MOVEI AC+2,<AC+2>&17 ;INFORM ERROR ROUTINE WHICH
2480 032074 202 12 0 00 041765 MOVEM AC+2,ERRLOP# ;AC IS USED FOR ITERATION^
2481
2482 002600 SN=2600
2483 000001 ZZ=1
2484
2485 E2600: REPEAT ^D3, ;TEST SAC
2486 <SN=SN+1
2487 ;FURTHER TEST OF SAC,SAC2
2488 ;TEST FOR ASSERTION OF SAC INH
2489 ;TEST ASSUMES ABILITY TO ROTATE
2490 ;TO SOME DEGREE
2491 ZZ=ZZ+ZZ
2492 HRRZI AC,400000 ;SET BIT 18
2493 ROT AC,ZZ ;*ROT LEFT (N) NUMBER OF TIMES
2494 CAIN AC,400000 ;TEST FOR SAC
2495 ER3 AC,SN ;STORE AC FAILED
2496 JUMPL AC+2,.-4 ;LOOP ON ERROR SWITCH
2497 >
2498 002601 SN=SN+1
2499 ;FURTHER TEST OF SAC,SAC2
2500 ;TEST FOR ASSERTION OF SAC INH
2501 ;TEST ASSUMES ABILITY TO ROTATE
2502 ;TO SOME DEGREE
2503 000002 ZZ=ZZ+ZZ
2504 032075 551 10 0 00 400000 HRRZI AC,400000 ;SET BIT 18
2505 032076 241 10 0 00 000002 ROT AC,ZZ ;*ROT LEFT (N) NUMBER OF TIMES
2506 032077 306 10 0 00 400000 CAIN AC,400000 ;TEST FOR SAC
2507 032100 003 10 0 00 002601 ER3 AC,SN ;STORE AC FAILED
2508 032101 321 12 0 00 032075 JUMPL AC+2,.-4 ;LOOP ON ERROR SWITCH
2509
2510 002602 SN=SN+1
2511 ;FURTHER TEST OF SAC,SAC2
2512 ;TEST FOR ASSERTION OF SAC INH
2513 ;TEST ASSUMES ABILITY TO ROTATE
2514 ;TO SOME DEGREE
2515 000004 ZZ=ZZ+ZZ
2516 032102 551 10 0 00 400000 HRRZI AC,400000 ;SET BIT 18
2517 032103 241 10 0 00 000004 ROT AC,ZZ ;*ROT LEFT (N) NUMBER OF TIMES
2518 032104 306 10 0 00 400000 CAIN AC,400000 ;TEST FOR SAC
2519 032105 003 10 0 00 002602 ER3 AC,SN ;STORE AC FAILED
2520 032106 321 12 0 00 032102 JUMPL AC+2,.-4 ;LOOP ON ERROR SWITCH
2521
2522 002603 SN=SN+1
2523 ;FURTHER TEST OF SAC,SAC2
2524 ;TEST FOR ASSERTION OF SAC INH
2525 ;TEST ASSUMES ABILITY TO ROTATE
2526 ;TO SOME DEGREE
2527 000010 ZZ=ZZ+ZZ
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 9-1
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST SAC FUNCTION SEQ 0068
2528 032107 551 10 0 00 400000 HRRZI AC,400000 ;SET BIT 18
2529 032110 241 10 0 00 000010 ROT AC,ZZ ;*ROT LEFT (N) NUMBER OF TIMES
2530 032111 306 10 0 00 400000 CAIN AC,400000 ;TEST FOR SAC
2531 032112 003 10 0 00 002603 ER3 AC,SN ;STORE AC FAILED
2532 032113 321 12 0 00 032107 JUMPL AC+2,.-4 ;LOOP ON ERROR SWITCH
2533
2534 PAGE
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 9-2
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST SAC FUNCTION SEQ 0069
2535 002700 SN=2700
2536 000001 ZZ=1
2537
2538 E2700: REPEAT ^D3, ;TEST SAC
2539 <SN=SN+1
2540 ;FURTHER TEST OF SAC,SAC2
2541 ;TEST FOR ASSERTION OF SAC INH
2542 ;TEST ASSUMES ABILITY TO ROTATE
2543 ;TO SOME DEGREE
2544
2545 ZZ=ZZ+ZZ
2546 SETZ AC, ;CLEAR AC
2547 HRRZI AC+1,400000 ;SET BIT 18
2548 ROTC AC,ZZ ;*ROT LEFT (N) NUMBER OF TIMES
2549 CAIN AC+1,400000 ;TEST FOR SAC
2550 ER4 AC+1,SN ;STORE AC+1 FAILED
2551 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
2552 >
2553 002701 SN=SN+1
2554 ;FURTHER TEST OF SAC,SAC2
2555 ;TEST FOR ASSERTION OF SAC INH
2556 ;TEST ASSUMES ABILITY TO ROTATE
2557 ;TO SOME DEGREE
2558
2559 000002 ZZ=ZZ+ZZ
2560 032114 400 10 0 00 000000 SETZ AC, ;CLEAR AC
2561 032115 551 11 0 00 400000 HRRZI AC+1,400000 ;SET BIT 18
2562 032116 245 10 0 00 000002 ROTC AC,ZZ ;*ROT LEFT (N) NUMBER OF TIMES
2563 032117 306 11 0 00 400000 CAIN AC+1,400000 ;TEST FOR SAC
2564 032120 004 11 0 00 002701 ER4 AC+1,SN ;STORE AC+1 FAILED
2565 032121 321 12 0 00 032114 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
2566
2567 002702 SN=SN+1
2568 ;FURTHER TEST OF SAC,SAC2
2569 ;TEST FOR ASSERTION OF SAC INH
2570 ;TEST ASSUMES ABILITY TO ROTATE
2571 ;TO SOME DEGREE
2572
2573 000004 ZZ=ZZ+ZZ
2574 032122 400 10 0 00 000000 SETZ AC, ;CLEAR AC
2575 032123 551 11 0 00 400000 HRRZI AC+1,400000 ;SET BIT 18
2576 032124 245 10 0 00 000004 ROTC AC,ZZ ;*ROT LEFT (N) NUMBER OF TIMES
2577 032125 306 11 0 00 400000 CAIN AC+1,400000 ;TEST FOR SAC
2578 032126 004 11 0 00 002702 ER4 AC+1,SN ;STORE AC+1 FAILED
2579 032127 321 12 0 00 032122 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
2580
2581 002703 SN=SN+1
2582 ;FURTHER TEST OF SAC,SAC2
2583 ;TEST FOR ASSERTION OF SAC INH
2584 ;TEST ASSUMES ABILITY TO ROTATE
2585 ;TO SOME DEGREE
2586
2587 000010 ZZ=ZZ+ZZ
2588 032130 400 10 0 00 000000 SETZ AC, ;CLEAR AC
2589 032131 551 11 0 00 400000 HRRZI AC+1,400000 ;SET BIT 18
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DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST SAC FUNCTION SEQ 0070
2590 032132 245 10 0 00 000010 ROTC AC,ZZ ;*ROT LEFT (N) NUMBER OF TIMES
2591 032133 306 11 0 00 400000 CAIN AC+1,400000 ;TEST FOR SAC
2592 032134 004 11 0 00 002703 ER4 AC+1,SN ;STORE AC+1 FAILED
2593 032135 321 12 0 00 032130 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
2594
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 10
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR SEQ 0071
2595 SUBTTL DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR
2596
2597 ;TEST ROT LEFT ONE BIT POSITION USING ALL ZEROS
2598 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
2599 ;AN ERROR OCCURS IF C(AC) IS NON-ZERO AFTER ROTATING
2600
2601 000011 AC=11
2602 SAVEAC (1,1)^
2603 032136 201 13 0 00 032136 MOVEI AC+2,. ;SAVE TEST PC
2604 032137 202 13 0 00 030051 MOVEM AC+2,TESTPC
2605 032140 201 13 0 00 000013 MOVEI AC+2,<AC+2>&17 ;INFORM ERROR ROUTINE WHICH
2606 032141 202 13 0 00 041765 MOVEM AC+2,ERRLOP# ;AC IS USED FOR ITERATION^
2607
2608 032142 403 11 0 00 000010 E3000: SETZB AC,AC-1 ;INITIALIZE AC AND EXPECTED RESULT TO ZERO
2609 032143 241 11 0 00 000001 ROT AC,1 ;*ROTATE LEFT ONE
2610 032144 312 11 0 00 000010 CAME AC,AC-1 ;TEST AC FOR ALL ZEROS
2611 032145 003 11 0 00 003001 ER3 AC,3001 ;AD-AR GATING FAILED
2612 032146 321 13 0 00 032147 JUMPL AC+2,E3100 ;LOOP ON ERROR SWITCH
2613
2614 ;TEST ROT LEFT ONE BIT POSITION USING ALL ONES
2615 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
2616 ;AN ERROR OCCURS IF C(AC) IS NOT ALL ONES AFTER ROTATING
2617
2618 032147 477 11 0 00 000010 E3100: SETOB AC,AC-1 ;INITIALIZE AC AND EXPECTED RESULT TO ALL ONES
2619 032150 241 11 0 00 000001 ROT AC,1 ;*ROTATE LEFT ONE
2620 032151 312 11 0 00 000010 CAME AC,AC-1 ;TEST AC FOR ALL ONES
2621 032152 003 11 0 00 003101 ER3 AC,3101 ;AD-AR GATING FAILED
2622 032153 321 13 0 00 032147 JUMPL AC+2,E3100 ;LOOP ON ERROR SWITCH
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DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR SEQ 0072
2623 003200 SN=3200
2624 000000 ZZ=0
2625
2626 E3200: REPEAT ^D18,< ;TEST AC RIGHT HALF
2627
2628 ;TEST ROT LEFT ONE BIT POSITION
2629 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
2630 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
2631 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT
2632 ;IS ONE AFTER ROTATING
2633 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
2634
2635 SN=SN+1
2636 ZZ=ZZ+ZZ ;SELECTED BIT BEFORE ROTATION
2637 IFE ZZ,<ZZ=1>
2638 YY=ZZ+ZZ ;SELECTED BIT AFTER ROTATION
2639 MOVEI AC,ZZ ;SET BIT (N) OF AC RIGHT
2640 IFN <ZZ-400000>,<
2641 MOVEI AC-1,YY ;SETUP FOR COMPARISON>
2642 IFE <ZZ-400000>,<
2643 MOVSI AC-1,1 ;SETUP FOR COMPARISON>
2644 ROT AC,1 ;*ROTATE LEFT ONE
2645 CAME AC,AC-1 ;TEST FOR BIT (N-1) A ONE
2646 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
2647 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
2648 >
2649 ;TEST AC RIGHT HALF
2650
2651 ;TEST ROT LEFT ONE BIT POSITION
2652 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
2653 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
2654 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT
2655 ;IS ONE AFTER ROTATING
2656 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
2657
2658 003201 SN=SN+1
2659 000000 ZZ=ZZ+ZZ ;SELECTED BIT BEFORE ROTATION
2660 000001 IFE ZZ,<ZZ=1>
2661 000002 YY=ZZ+ZZ ;SELECTED BIT AFTER ROTATION
2662 032154 201 11 0 00 000001 MOVEI AC,ZZ ;SET BIT (N) OF AC RIGHT
2663 IFN <ZZ-400000>,<
2664 032155 201 10 0 00 000002 MOVEI AC-1,YY ;SETUP FOR COMPARISON>
2665 IFE <ZZ-400000>,<
2666 MOVSI AC-1,1 ;SETUP FOR COMPARISON>
2667 032156 241 11 0 00 000001 ROT AC,1 ;*ROTATE LEFT ONE
2668 032157 312 11 0 00 000010 CAME AC,AC-1 ;TEST FOR BIT (N-1) A ONE
2669 032160 003 11 0 00 003201 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
2670 032161 321 13 0 00 032154 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
2671
2672 ;TEST AC RIGHT HALF
2673
2674 ;TEST ROT LEFT ONE BIT POSITION
2675 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
2676 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
2677 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT
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DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR SEQ 0073
2678 ;IS ONE AFTER ROTATING
2679 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
2680
2681 003202 SN=SN+1
2682 000002 ZZ=ZZ+ZZ ;SELECTED BIT BEFORE ROTATION
2683 IFE ZZ,<ZZ=1>
2684 000004 YY=ZZ+ZZ ;SELECTED BIT AFTER ROTATION
2685 032162 201 11 0 00 000002 MOVEI AC,ZZ ;SET BIT (N) OF AC RIGHT
2686 IFN <ZZ-400000>,<
2687 032163 201 10 0 00 000004 MOVEI AC-1,YY ;SETUP FOR COMPARISON>
2688 IFE <ZZ-400000>,<
2689 MOVSI AC-1,1 ;SETUP FOR COMPARISON>
2690 032164 241 11 0 00 000001 ROT AC,1 ;*ROTATE LEFT ONE
2691 032165 312 11 0 00 000010 CAME AC,AC-1 ;TEST FOR BIT (N-1) A ONE
2692 032166 003 11 0 00 003202 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
2693 032167 321 13 0 00 032162 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
2694
2695 ;TEST AC RIGHT HALF
2696
2697 ;TEST ROT LEFT ONE BIT POSITION
2698 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
2699 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
2700 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT
2701 ;IS ONE AFTER ROTATING
2702 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
2703
2704 003203 SN=SN+1
2705 000004 ZZ=ZZ+ZZ ;SELECTED BIT BEFORE ROTATION
2706 IFE ZZ,<ZZ=1>
2707 000010 YY=ZZ+ZZ ;SELECTED BIT AFTER ROTATION
2708 032170 201 11 0 00 000004 MOVEI AC,ZZ ;SET BIT (N) OF AC RIGHT
2709 IFN <ZZ-400000>,<
2710 032171 201 10 0 00 000010 MOVEI AC-1,YY ;SETUP FOR COMPARISON>
2711 IFE <ZZ-400000>,<
2712 MOVSI AC-1,1 ;SETUP FOR COMPARISON>
2713 032172 241 11 0 00 000001 ROT AC,1 ;*ROTATE LEFT ONE
2714 032173 312 11 0 00 000010 CAME AC,AC-1 ;TEST FOR BIT (N-1) A ONE
2715 032174 003 11 0 00 003203 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
2716 032175 321 13 0 00 032170 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
2717
2718 ;TEST AC RIGHT HALF
2719
2720 ;TEST ROT LEFT ONE BIT POSITION
2721 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
2722 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
2723 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT
2724 ;IS ONE AFTER ROTATING
2725 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
2726
2727 003204 SN=SN+1
2728 000010 ZZ=ZZ+ZZ ;SELECTED BIT BEFORE ROTATION
2729 IFE ZZ,<ZZ=1>
2730 000020 YY=ZZ+ZZ ;SELECTED BIT AFTER ROTATION
2731 032176 201 11 0 00 000010 MOVEI AC,ZZ ;SET BIT (N) OF AC RIGHT
2732 IFN <ZZ-400000>,<
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DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR SEQ 0074
2733 032177 201 10 0 00 000020 MOVEI AC-1,YY ;SETUP FOR COMPARISON>
2734 IFE <ZZ-400000>,<
2735 MOVSI AC-1,1 ;SETUP FOR COMPARISON>
2736 032200 241 11 0 00 000001 ROT AC,1 ;*ROTATE LEFT ONE
2737 032201 312 11 0 00 000010 CAME AC,AC-1 ;TEST FOR BIT (N-1) A ONE
2738 032202 003 11 0 00 003204 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
2739 032203 321 13 0 00 032176 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
2740
2741 ;TEST AC RIGHT HALF
2742
2743 ;TEST ROT LEFT ONE BIT POSITION
2744 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
2745 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
2746 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT
2747 ;IS ONE AFTER ROTATING
2748 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
2749
2750 003205 SN=SN+1
2751 000020 ZZ=ZZ+ZZ ;SELECTED BIT BEFORE ROTATION
2752 IFE ZZ,<ZZ=1>
2753 000040 YY=ZZ+ZZ ;SELECTED BIT AFTER ROTATION
2754 032204 201 11 0 00 000020 MOVEI AC,ZZ ;SET BIT (N) OF AC RIGHT
2755 IFN <ZZ-400000>,<
2756 032205 201 10 0 00 000040 MOVEI AC-1,YY ;SETUP FOR COMPARISON>
2757 IFE <ZZ-400000>,<
2758 MOVSI AC-1,1 ;SETUP FOR COMPARISON>
2759 032206 241 11 0 00 000001 ROT AC,1 ;*ROTATE LEFT ONE
2760 032207 312 11 0 00 000010 CAME AC,AC-1 ;TEST FOR BIT (N-1) A ONE
2761 032210 003 11 0 00 003205 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
2762 032211 321 13 0 00 032204 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
2763
2764 ;TEST AC RIGHT HALF
2765
2766 ;TEST ROT LEFT ONE BIT POSITION
2767 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
2768 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
2769 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT
2770 ;IS ONE AFTER ROTATING
2771 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
2772
2773 003206 SN=SN+1
2774 000040 ZZ=ZZ+ZZ ;SELECTED BIT BEFORE ROTATION
2775 IFE ZZ,<ZZ=1>
2776 000100 YY=ZZ+ZZ ;SELECTED BIT AFTER ROTATION
2777 032212 201 11 0 00 000040 MOVEI AC,ZZ ;SET BIT (N) OF AC RIGHT
2778 IFN <ZZ-400000>,<
2779 032213 201 10 0 00 000100 MOVEI AC-1,YY ;SETUP FOR COMPARISON>
2780 IFE <ZZ-400000>,<
2781 MOVSI AC-1,1 ;SETUP FOR COMPARISON>
2782 032214 241 11 0 00 000001 ROT AC,1 ;*ROTATE LEFT ONE
2783 032215 312 11 0 00 000010 CAME AC,AC-1 ;TEST FOR BIT (N-1) A ONE
2784 032216 003 11 0 00 003206 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
2785 032217 321 13 0 00 032212 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
2786
2787 ;TEST AC RIGHT HALF
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DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR SEQ 0075
2788
2789 ;TEST ROT LEFT ONE BIT POSITION
2790 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
2791 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
2792 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT
2793 ;IS ONE AFTER ROTATING
2794 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
2795
2796 003207 SN=SN+1
2797 000100 ZZ=ZZ+ZZ ;SELECTED BIT BEFORE ROTATION
2798 IFE ZZ,<ZZ=1>
2799 000200 YY=ZZ+ZZ ;SELECTED BIT AFTER ROTATION
2800 032220 201 11 0 00 000100 MOVEI AC,ZZ ;SET BIT (N) OF AC RIGHT
2801 IFN <ZZ-400000>,<
2802 032221 201 10 0 00 000200 MOVEI AC-1,YY ;SETUP FOR COMPARISON>
2803 IFE <ZZ-400000>,<
2804 MOVSI AC-1,1 ;SETUP FOR COMPARISON>
2805 032222 241 11 0 00 000001 ROT AC,1 ;*ROTATE LEFT ONE
2806 032223 312 11 0 00 000010 CAME AC,AC-1 ;TEST FOR BIT (N-1) A ONE
2807 032224 003 11 0 00 003207 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
2808 032225 321 13 0 00 032220 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
2809
2810 ;TEST AC RIGHT HALF
2811
2812 ;TEST ROT LEFT ONE BIT POSITION
2813 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
2814 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
2815 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT
2816 ;IS ONE AFTER ROTATING
2817 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
2818
2819 003210 SN=SN+1
2820 000200 ZZ=ZZ+ZZ ;SELECTED BIT BEFORE ROTATION
2821 IFE ZZ,<ZZ=1>
2822 000400 YY=ZZ+ZZ ;SELECTED BIT AFTER ROTATION
2823 032226 201 11 0 00 000200 MOVEI AC,ZZ ;SET BIT (N) OF AC RIGHT
2824 IFN <ZZ-400000>,<
2825 032227 201 10 0 00 000400 MOVEI AC-1,YY ;SETUP FOR COMPARISON>
2826 IFE <ZZ-400000>,<
2827 MOVSI AC-1,1 ;SETUP FOR COMPARISON>
2828 032230 241 11 0 00 000001 ROT AC,1 ;*ROTATE LEFT ONE
2829 032231 312 11 0 00 000010 CAME AC,AC-1 ;TEST FOR BIT (N-1) A ONE
2830 032232 003 11 0 00 003210 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
2831 032233 321 13 0 00 032226 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
2832
2833 ;TEST AC RIGHT HALF
2834
2835 ;TEST ROT LEFT ONE BIT POSITION
2836 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
2837 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
2838 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT
2839 ;IS ONE AFTER ROTATING
2840 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
2841
2842 003211 SN=SN+1
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 11-4
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR SEQ 0076
2843 000400 ZZ=ZZ+ZZ ;SELECTED BIT BEFORE ROTATION
2844 IFE ZZ,<ZZ=1>
2845 001000 YY=ZZ+ZZ ;SELECTED BIT AFTER ROTATION
2846 032234 201 11 0 00 000400 MOVEI AC,ZZ ;SET BIT (N) OF AC RIGHT
2847 IFN <ZZ-400000>,<
2848 032235 201 10 0 00 001000 MOVEI AC-1,YY ;SETUP FOR COMPARISON>
2849 IFE <ZZ-400000>,<
2850 MOVSI AC-1,1 ;SETUP FOR COMPARISON>
2851 032236 241 11 0 00 000001 ROT AC,1 ;*ROTATE LEFT ONE
2852 032237 312 11 0 00 000010 CAME AC,AC-1 ;TEST FOR BIT (N-1) A ONE
2853 032240 003 11 0 00 003211 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
2854 032241 321 13 0 00 032234 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
2855
2856 ;TEST AC RIGHT HALF
2857
2858 ;TEST ROT LEFT ONE BIT POSITION
2859 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
2860 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
2861 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT
2862 ;IS ONE AFTER ROTATING
2863 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
2864
2865 003212 SN=SN+1
2866 001000 ZZ=ZZ+ZZ ;SELECTED BIT BEFORE ROTATION
2867 IFE ZZ,<ZZ=1>
2868 002000 YY=ZZ+ZZ ;SELECTED BIT AFTER ROTATION
2869 032242 201 11 0 00 001000 MOVEI AC,ZZ ;SET BIT (N) OF AC RIGHT
2870 IFN <ZZ-400000>,<
2871 032243 201 10 0 00 002000 MOVEI AC-1,YY ;SETUP FOR COMPARISON>
2872 IFE <ZZ-400000>,<
2873 MOVSI AC-1,1 ;SETUP FOR COMPARISON>
2874 032244 241 11 0 00 000001 ROT AC,1 ;*ROTATE LEFT ONE
2875 032245 312 11 0 00 000010 CAME AC,AC-1 ;TEST FOR BIT (N-1) A ONE
2876 032246 003 11 0 00 003212 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
2877 032247 321 13 0 00 032242 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
2878
2879 ;TEST AC RIGHT HALF
2880
2881 ;TEST ROT LEFT ONE BIT POSITION
2882 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
2883 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
2884 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT
2885 ;IS ONE AFTER ROTATING
2886 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
2887
2888 003213 SN=SN+1
2889 002000 ZZ=ZZ+ZZ ;SELECTED BIT BEFORE ROTATION
2890 IFE ZZ,<ZZ=1>
2891 004000 YY=ZZ+ZZ ;SELECTED BIT AFTER ROTATION
2892 032250 201 11 0 00 002000 MOVEI AC,ZZ ;SET BIT (N) OF AC RIGHT
2893 IFN <ZZ-400000>,<
2894 032251 201 10 0 00 004000 MOVEI AC-1,YY ;SETUP FOR COMPARISON>
2895 IFE <ZZ-400000>,<
2896 MOVSI AC-1,1 ;SETUP FOR COMPARISON>
2897 032252 241 11 0 00 000001 ROT AC,1 ;*ROTATE LEFT ONE
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DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR SEQ 0077
2898 032253 312 11 0 00 000010 CAME AC,AC-1 ;TEST FOR BIT (N-1) A ONE
2899 032254 003 11 0 00 003213 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
2900 032255 321 13 0 00 032250 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
2901
2902 ;TEST AC RIGHT HALF
2903
2904 ;TEST ROT LEFT ONE BIT POSITION
2905 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
2906 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
2907 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT
2908 ;IS ONE AFTER ROTATING
2909 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
2910
2911 003214 SN=SN+1
2912 004000 ZZ=ZZ+ZZ ;SELECTED BIT BEFORE ROTATION
2913 IFE ZZ,<ZZ=1>
2914 010000 YY=ZZ+ZZ ;SELECTED BIT AFTER ROTATION
2915 032256 201 11 0 00 004000 MOVEI AC,ZZ ;SET BIT (N) OF AC RIGHT
2916 IFN <ZZ-400000>,<
2917 032257 201 10 0 00 010000 MOVEI AC-1,YY ;SETUP FOR COMPARISON>
2918 IFE <ZZ-400000>,<
2919 MOVSI AC-1,1 ;SETUP FOR COMPARISON>
2920 032260 241 11 0 00 000001 ROT AC,1 ;*ROTATE LEFT ONE
2921 032261 312 11 0 00 000010 CAME AC,AC-1 ;TEST FOR BIT (N-1) A ONE
2922 032262 003 11 0 00 003214 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
2923 032263 321 13 0 00 032256 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
2924
2925 ;TEST AC RIGHT HALF
2926
2927 ;TEST ROT LEFT ONE BIT POSITION
2928 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
2929 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
2930 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT
2931 ;IS ONE AFTER ROTATING
2932 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
2933
2934 003215 SN=SN+1
2935 010000 ZZ=ZZ+ZZ ;SELECTED BIT BEFORE ROTATION
2936 IFE ZZ,<ZZ=1>
2937 020000 YY=ZZ+ZZ ;SELECTED BIT AFTER ROTATION
2938 032264 201 11 0 00 010000 MOVEI AC,ZZ ;SET BIT (N) OF AC RIGHT
2939 IFN <ZZ-400000>,<
2940 032265 201 10 0 00 020000 MOVEI AC-1,YY ;SETUP FOR COMPARISON>
2941 IFE <ZZ-400000>,<
2942 MOVSI AC-1,1 ;SETUP FOR COMPARISON>
2943 032266 241 11 0 00 000001 ROT AC,1 ;*ROTATE LEFT ONE
2944 032267 312 11 0 00 000010 CAME AC,AC-1 ;TEST FOR BIT (N-1) A ONE
2945 032270 003 11 0 00 003215 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
2946 032271 321 13 0 00 032264 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
2947
2948 ;TEST AC RIGHT HALF
2949
2950 ;TEST ROT LEFT ONE BIT POSITION
2951 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
2952 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
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2953 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT
2954 ;IS ONE AFTER ROTATING
2955 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
2956
2957 003216 SN=SN+1
2958 020000 ZZ=ZZ+ZZ ;SELECTED BIT BEFORE ROTATION
2959 IFE ZZ,<ZZ=1>
2960 040000 YY=ZZ+ZZ ;SELECTED BIT AFTER ROTATION
2961 032272 201 11 0 00 020000 MOVEI AC,ZZ ;SET BIT (N) OF AC RIGHT
2962 IFN <ZZ-400000>,<
2963 032273 201 10 0 00 040000 MOVEI AC-1,YY ;SETUP FOR COMPARISON>
2964 IFE <ZZ-400000>,<
2965 MOVSI AC-1,1 ;SETUP FOR COMPARISON>
2966 032274 241 11 0 00 000001 ROT AC,1 ;*ROTATE LEFT ONE
2967 032275 312 11 0 00 000010 CAME AC,AC-1 ;TEST FOR BIT (N-1) A ONE
2968 032276 003 11 0 00 003216 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
2969 032277 321 13 0 00 032272 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
2970
2971 ;TEST AC RIGHT HALF
2972
2973 ;TEST ROT LEFT ONE BIT POSITION
2974 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
2975 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
2976 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT
2977 ;IS ONE AFTER ROTATING
2978 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
2979
2980 003217 SN=SN+1
2981 040000 ZZ=ZZ+ZZ ;SELECTED BIT BEFORE ROTATION
2982 IFE ZZ,<ZZ=1>
2983 100000 YY=ZZ+ZZ ;SELECTED BIT AFTER ROTATION
2984 032300 201 11 0 00 040000 MOVEI AC,ZZ ;SET BIT (N) OF AC RIGHT
2985 IFN <ZZ-400000>,<
2986 032301 201 10 0 00 100000 MOVEI AC-1,YY ;SETUP FOR COMPARISON>
2987 IFE <ZZ-400000>,<
2988 MOVSI AC-1,1 ;SETUP FOR COMPARISON>
2989 032302 241 11 0 00 000001 ROT AC,1 ;*ROTATE LEFT ONE
2990 032303 312 11 0 00 000010 CAME AC,AC-1 ;TEST FOR BIT (N-1) A ONE
2991 032304 003 11 0 00 003217 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
2992 032305 321 13 0 00 032300 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
2993
2994 ;TEST AC RIGHT HALF
2995
2996 ;TEST ROT LEFT ONE BIT POSITION
2997 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
2998 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
2999 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT
3000 ;IS ONE AFTER ROTATING
3001 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
3002
3003 003220 SN=SN+1
3004 100000 ZZ=ZZ+ZZ ;SELECTED BIT BEFORE ROTATION
3005 IFE ZZ,<ZZ=1>
3006 200000 YY=ZZ+ZZ ;SELECTED BIT AFTER ROTATION
3007 032306 201 11 0 00 100000 MOVEI AC,ZZ ;SET BIT (N) OF AC RIGHT
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3008 IFN <ZZ-400000>,<
3009 032307 201 10 0 00 200000 MOVEI AC-1,YY ;SETUP FOR COMPARISON>
3010 IFE <ZZ-400000>,<
3011 MOVSI AC-1,1 ;SETUP FOR COMPARISON>
3012 032310 241 11 0 00 000001 ROT AC,1 ;*ROTATE LEFT ONE
3013 032311 312 11 0 00 000010 CAME AC,AC-1 ;TEST FOR BIT (N-1) A ONE
3014 032312 003 11 0 00 003220 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
3015 032313 321 13 0 00 032306 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
3016
3017 ;TEST AC RIGHT HALF
3018
3019 ;TEST ROT LEFT ONE BIT POSITION
3020 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
3021 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
3022 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT
3023 ;IS ONE AFTER ROTATING
3024 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
3025
3026 003221 SN=SN+1
3027 200000 ZZ=ZZ+ZZ ;SELECTED BIT BEFORE ROTATION
3028 IFE ZZ,<ZZ=1>
3029 400000 YY=ZZ+ZZ ;SELECTED BIT AFTER ROTATION
3030 032314 201 11 0 00 200000 MOVEI AC,ZZ ;SET BIT (N) OF AC RIGHT
3031 IFN <ZZ-400000>,<
3032 032315 201 10 0 00 400000 MOVEI AC-1,YY ;SETUP FOR COMPARISON>
3033 IFE <ZZ-400000>,<
3034 MOVSI AC-1,1 ;SETUP FOR COMPARISON>
3035 032316 241 11 0 00 000001 ROT AC,1 ;*ROTATE LEFT ONE
3036 032317 312 11 0 00 000010 CAME AC,AC-1 ;TEST FOR BIT (N-1) A ONE
3037 032320 003 11 0 00 003221 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
3038 032321 321 13 0 00 032314 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
3039
3040 ;TEST AC RIGHT HALF
3041
3042 ;TEST ROT LEFT ONE BIT POSITION
3043 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
3044 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
3045 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT
3046 ;IS ONE AFTER ROTATING
3047 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
3048
3049 003222 SN=SN+1
3050 400000 ZZ=ZZ+ZZ ;SELECTED BIT BEFORE ROTATION
3051 IFE ZZ,<ZZ=1>
3052 000001 000000 YY=ZZ+ZZ ;SELECTED BIT AFTER ROTATION
3053 032322 201 11 0 00 400000 MOVEI AC,ZZ ;SET BIT (N) OF AC RIGHT
3054 IFN <ZZ-400000>,<
3055 MOVEI AC-1,YY ;SETUP FOR COMPARISON>
3056 IFE <ZZ-400000>,<
3057 032323 205 10 0 00 000001 MOVSI AC-1,1 ;SETUP FOR COMPARISON>
3058 032324 241 11 0 00 000001 ROT AC,1 ;*ROTATE LEFT ONE
3059 032325 312 11 0 00 000010 CAME AC,AC-1 ;TEST FOR BIT (N-1) A ONE
3060 032326 003 11 0 00 003222 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
3061 032327 321 13 0 00 032322 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
3062
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3063 PAGE
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DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR SEQ 0081
3064 000000 ZZ=0
3065
3066 REPEAT ^D18,< ;TEST AC LEFT HALF
3067 ;TEST ROT LEFT ONE BIT POSITION
3068 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
3069 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
3070 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
3071 ;ONE AFTER ROTATING
3072 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
3073
3074 SN=SN+1
3075
3076 ZZ=ZZ+ZZ ;SELECTED BIT BEFORE ROTATION
3077 IFE ZZ,<ZZ=1>
3078 YY=ZZ+ZZ ;SELECTED BIT AFTER ROTATION
3079 MOVSI AC,ZZ ;SET BIT (N) OF AC LEFT
3080 IFN <ZZ-400000>,<
3081 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
3082 IFE <ZZ-400000>,<
3083 MOVEI AC-1,1 ;SETUP FOR COMPARISON>
3084 ROT AC,1 ;*ROTATE LEFT ONE
3085 CAME AC,AC-1 ;TEST FOR BIT (N-1) A ONE
3086 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
3087 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
3088 >
3089 ;TEST AC LEFT HALF
3090 ;TEST ROT LEFT ONE BIT POSITION
3091 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
3092 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
3093 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
3094 ;ONE AFTER ROTATING
3095 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
3096
3097 003223 SN=SN+1
3098
3099 000000 ZZ=ZZ+ZZ ;SELECTED BIT BEFORE ROTATION
3100 000001 IFE ZZ,<ZZ=1>
3101 000002 YY=ZZ+ZZ ;SELECTED BIT AFTER ROTATION
3102 032330 205 11 0 00 000001 MOVSI AC,ZZ ;SET BIT (N) OF AC LEFT
3103 IFN <ZZ-400000>,<
3104 032331 205 10 0 00 000002 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
3105 IFE <ZZ-400000>,<
3106 MOVEI AC-1,1 ;SETUP FOR COMPARISON>
3107 032332 241 11 0 00 000001 ROT AC,1 ;*ROTATE LEFT ONE
3108 032333 312 11 0 00 000010 CAME AC,AC-1 ;TEST FOR BIT (N-1) A ONE
3109 032334 003 11 0 00 003223 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
3110 032335 321 13 0 00 032330 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
3111
3112 ;TEST AC LEFT HALF
3113 ;TEST ROT LEFT ONE BIT POSITION
3114 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
3115 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
3116 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
3117 ;ONE AFTER ROTATING
3118 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
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3119
3120 003224 SN=SN+1
3121
3122 000002 ZZ=ZZ+ZZ ;SELECTED BIT BEFORE ROTATION
3123 IFE ZZ,<ZZ=1>
3124 000004 YY=ZZ+ZZ ;SELECTED BIT AFTER ROTATION
3125 032336 205 11 0 00 000002 MOVSI AC,ZZ ;SET BIT (N) OF AC LEFT
3126 IFN <ZZ-400000>,<
3127 032337 205 10 0 00 000004 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
3128 IFE <ZZ-400000>,<
3129 MOVEI AC-1,1 ;SETUP FOR COMPARISON>
3130 032340 241 11 0 00 000001 ROT AC,1 ;*ROTATE LEFT ONE
3131 032341 312 11 0 00 000010 CAME AC,AC-1 ;TEST FOR BIT (N-1) A ONE
3132 032342 003 11 0 00 003224 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
3133 032343 321 13 0 00 032336 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
3134
3135 ;TEST AC LEFT HALF
3136 ;TEST ROT LEFT ONE BIT POSITION
3137 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
3138 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
3139 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
3140 ;ONE AFTER ROTATING
3141 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
3142
3143 003225 SN=SN+1
3144
3145 000004 ZZ=ZZ+ZZ ;SELECTED BIT BEFORE ROTATION
3146 IFE ZZ,<ZZ=1>
3147 000010 YY=ZZ+ZZ ;SELECTED BIT AFTER ROTATION
3148 032344 205 11 0 00 000004 MOVSI AC,ZZ ;SET BIT (N) OF AC LEFT
3149 IFN <ZZ-400000>,<
3150 032345 205 10 0 00 000010 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
3151 IFE <ZZ-400000>,<
3152 MOVEI AC-1,1 ;SETUP FOR COMPARISON>
3153 032346 241 11 0 00 000001 ROT AC,1 ;*ROTATE LEFT ONE
3154 032347 312 11 0 00 000010 CAME AC,AC-1 ;TEST FOR BIT (N-1) A ONE
3155 032350 003 11 0 00 003225 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
3156 032351 321 13 0 00 032344 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
3157
3158 ;TEST AC LEFT HALF
3159 ;TEST ROT LEFT ONE BIT POSITION
3160 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
3161 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
3162 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
3163 ;ONE AFTER ROTATING
3164 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
3165
3166 003226 SN=SN+1
3167
3168 000010 ZZ=ZZ+ZZ ;SELECTED BIT BEFORE ROTATION
3169 IFE ZZ,<ZZ=1>
3170 000020 YY=ZZ+ZZ ;SELECTED BIT AFTER ROTATION
3171 032352 205 11 0 00 000010 MOVSI AC,ZZ ;SET BIT (N) OF AC LEFT
3172 IFN <ZZ-400000>,<
3173 032353 205 10 0 00 000020 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
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3174 IFE <ZZ-400000>,<
3175 MOVEI AC-1,1 ;SETUP FOR COMPARISON>
3176 032354 241 11 0 00 000001 ROT AC,1 ;*ROTATE LEFT ONE
3177 032355 312 11 0 00 000010 CAME AC,AC-1 ;TEST FOR BIT (N-1) A ONE
3178 032356 003 11 0 00 003226 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
3179 032357 321 13 0 00 032352 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
3180
3181 ;TEST AC LEFT HALF
3182 ;TEST ROT LEFT ONE BIT POSITION
3183 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
3184 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
3185 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
3186 ;ONE AFTER ROTATING
3187 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
3188
3189 003227 SN=SN+1
3190
3191 000020 ZZ=ZZ+ZZ ;SELECTED BIT BEFORE ROTATION
3192 IFE ZZ,<ZZ=1>
3193 000040 YY=ZZ+ZZ ;SELECTED BIT AFTER ROTATION
3194 032360 205 11 0 00 000020 MOVSI AC,ZZ ;SET BIT (N) OF AC LEFT
3195 IFN <ZZ-400000>,<
3196 032361 205 10 0 00 000040 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
3197 IFE <ZZ-400000>,<
3198 MOVEI AC-1,1 ;SETUP FOR COMPARISON>
3199 032362 241 11 0 00 000001 ROT AC,1 ;*ROTATE LEFT ONE
3200 032363 312 11 0 00 000010 CAME AC,AC-1 ;TEST FOR BIT (N-1) A ONE
3201 032364 003 11 0 00 003227 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
3202 032365 321 13 0 00 032360 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
3203
3204 ;TEST AC LEFT HALF
3205 ;TEST ROT LEFT ONE BIT POSITION
3206 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
3207 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
3208 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
3209 ;ONE AFTER ROTATING
3210 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
3211
3212 003230 SN=SN+1
3213
3214 000040 ZZ=ZZ+ZZ ;SELECTED BIT BEFORE ROTATION
3215 IFE ZZ,<ZZ=1>
3216 000100 YY=ZZ+ZZ ;SELECTED BIT AFTER ROTATION
3217 032366 205 11 0 00 000040 MOVSI AC,ZZ ;SET BIT (N) OF AC LEFT
3218 IFN <ZZ-400000>,<
3219 032367 205 10 0 00 000100 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
3220 IFE <ZZ-400000>,<
3221 MOVEI AC-1,1 ;SETUP FOR COMPARISON>
3222 032370 241 11 0 00 000001 ROT AC,1 ;*ROTATE LEFT ONE
3223 032371 312 11 0 00 000010 CAME AC,AC-1 ;TEST FOR BIT (N-1) A ONE
3224 032372 003 11 0 00 003230 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
3225 032373 321 13 0 00 032366 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
3226
3227 ;TEST AC LEFT HALF
3228 ;TEST ROT LEFT ONE BIT POSITION
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3229 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
3230 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
3231 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
3232 ;ONE AFTER ROTATING
3233 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
3234
3235 003231 SN=SN+1
3236
3237 000100 ZZ=ZZ+ZZ ;SELECTED BIT BEFORE ROTATION
3238 IFE ZZ,<ZZ=1>
3239 000200 YY=ZZ+ZZ ;SELECTED BIT AFTER ROTATION
3240 032374 205 11 0 00 000100 MOVSI AC,ZZ ;SET BIT (N) OF AC LEFT
3241 IFN <ZZ-400000>,<
3242 032375 205 10 0 00 000200 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
3243 IFE <ZZ-400000>,<
3244 MOVEI AC-1,1 ;SETUP FOR COMPARISON>
3245 032376 241 11 0 00 000001 ROT AC,1 ;*ROTATE LEFT ONE
3246 032377 312 11 0 00 000010 CAME AC,AC-1 ;TEST FOR BIT (N-1) A ONE
3247 032400 003 11 0 00 003231 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
3248 032401 321 13 0 00 032374 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
3249
3250 ;TEST AC LEFT HALF
3251 ;TEST ROT LEFT ONE BIT POSITION
3252 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
3253 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
3254 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
3255 ;ONE AFTER ROTATING
3256 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
3257
3258 003232 SN=SN+1
3259
3260 000200 ZZ=ZZ+ZZ ;SELECTED BIT BEFORE ROTATION
3261 IFE ZZ,<ZZ=1>
3262 000400 YY=ZZ+ZZ ;SELECTED BIT AFTER ROTATION
3263 032402 205 11 0 00 000200 MOVSI AC,ZZ ;SET BIT (N) OF AC LEFT
3264 IFN <ZZ-400000>,<
3265 032403 205 10 0 00 000400 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
3266 IFE <ZZ-400000>,<
3267 MOVEI AC-1,1 ;SETUP FOR COMPARISON>
3268 032404 241 11 0 00 000001 ROT AC,1 ;*ROTATE LEFT ONE
3269 032405 312 11 0 00 000010 CAME AC,AC-1 ;TEST FOR BIT (N-1) A ONE
3270 032406 003 11 0 00 003232 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
3271 032407 321 13 0 00 032402 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
3272
3273 ;TEST AC LEFT HALF
3274 ;TEST ROT LEFT ONE BIT POSITION
3275 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
3276 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
3277 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
3278 ;ONE AFTER ROTATING
3279 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
3280
3281 003233 SN=SN+1
3282
3283 000400 ZZ=ZZ+ZZ ;SELECTED BIT BEFORE ROTATION
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DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR SEQ 0085
3284 IFE ZZ,<ZZ=1>
3285 001000 YY=ZZ+ZZ ;SELECTED BIT AFTER ROTATION
3286 032410 205 11 0 00 000400 MOVSI AC,ZZ ;SET BIT (N) OF AC LEFT
3287 IFN <ZZ-400000>,<
3288 032411 205 10 0 00 001000 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
3289 IFE <ZZ-400000>,<
3290 MOVEI AC-1,1 ;SETUP FOR COMPARISON>
3291 032412 241 11 0 00 000001 ROT AC,1 ;*ROTATE LEFT ONE
3292 032413 312 11 0 00 000010 CAME AC,AC-1 ;TEST FOR BIT (N-1) A ONE
3293 032414 003 11 0 00 003233 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
3294 032415 321 13 0 00 032410 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
3295
3296 ;TEST AC LEFT HALF
3297 ;TEST ROT LEFT ONE BIT POSITION
3298 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
3299 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
3300 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
3301 ;ONE AFTER ROTATING
3302 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
3303
3304 003234 SN=SN+1
3305
3306 001000 ZZ=ZZ+ZZ ;SELECTED BIT BEFORE ROTATION
3307 IFE ZZ,<ZZ=1>
3308 002000 YY=ZZ+ZZ ;SELECTED BIT AFTER ROTATION
3309 032416 205 11 0 00 001000 MOVSI AC,ZZ ;SET BIT (N) OF AC LEFT
3310 IFN <ZZ-400000>,<
3311 032417 205 10 0 00 002000 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
3312 IFE <ZZ-400000>,<
3313 MOVEI AC-1,1 ;SETUP FOR COMPARISON>
3314 032420 241 11 0 00 000001 ROT AC,1 ;*ROTATE LEFT ONE
3315 032421 312 11 0 00 000010 CAME AC,AC-1 ;TEST FOR BIT (N-1) A ONE
3316 032422 003 11 0 00 003234 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
3317 032423 321 13 0 00 032416 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
3318
3319 ;TEST AC LEFT HALF
3320 ;TEST ROT LEFT ONE BIT POSITION
3321 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
3322 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
3323 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
3324 ;ONE AFTER ROTATING
3325 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
3326
3327 003235 SN=SN+1
3328
3329 002000 ZZ=ZZ+ZZ ;SELECTED BIT BEFORE ROTATION
3330 IFE ZZ,<ZZ=1>
3331 004000 YY=ZZ+ZZ ;SELECTED BIT AFTER ROTATION
3332 032424 205 11 0 00 002000 MOVSI AC,ZZ ;SET BIT (N) OF AC LEFT
3333 IFN <ZZ-400000>,<
3334 032425 205 10 0 00 004000 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
3335 IFE <ZZ-400000>,<
3336 MOVEI AC-1,1 ;SETUP FOR COMPARISON>
3337 032426 241 11 0 00 000001 ROT AC,1 ;*ROTATE LEFT ONE
3338 032427 312 11 0 00 000010 CAME AC,AC-1 ;TEST FOR BIT (N-1) A ONE
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DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR SEQ 0086
3339 032430 003 11 0 00 003235 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
3340 032431 321 13 0 00 032424 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
3341
3342 ;TEST AC LEFT HALF
3343 ;TEST ROT LEFT ONE BIT POSITION
3344 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
3345 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
3346 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
3347 ;ONE AFTER ROTATING
3348 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
3349
3350 003236 SN=SN+1
3351
3352 004000 ZZ=ZZ+ZZ ;SELECTED BIT BEFORE ROTATION
3353 IFE ZZ,<ZZ=1>
3354 010000 YY=ZZ+ZZ ;SELECTED BIT AFTER ROTATION
3355 032432 205 11 0 00 004000 MOVSI AC,ZZ ;SET BIT (N) OF AC LEFT
3356 IFN <ZZ-400000>,<
3357 032433 205 10 0 00 010000 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
3358 IFE <ZZ-400000>,<
3359 MOVEI AC-1,1 ;SETUP FOR COMPARISON>
3360 032434 241 11 0 00 000001 ROT AC,1 ;*ROTATE LEFT ONE
3361 032435 312 11 0 00 000010 CAME AC,AC-1 ;TEST FOR BIT (N-1) A ONE
3362 032436 003 11 0 00 003236 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
3363 032437 321 13 0 00 032432 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
3364
3365 ;TEST AC LEFT HALF
3366 ;TEST ROT LEFT ONE BIT POSITION
3367 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
3368 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
3369 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
3370 ;ONE AFTER ROTATING
3371 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
3372
3373 003237 SN=SN+1
3374
3375 010000 ZZ=ZZ+ZZ ;SELECTED BIT BEFORE ROTATION
3376 IFE ZZ,<ZZ=1>
3377 020000 YY=ZZ+ZZ ;SELECTED BIT AFTER ROTATION
3378 032440 205 11 0 00 010000 MOVSI AC,ZZ ;SET BIT (N) OF AC LEFT
3379 IFN <ZZ-400000>,<
3380 032441 205 10 0 00 020000 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
3381 IFE <ZZ-400000>,<
3382 MOVEI AC-1,1 ;SETUP FOR COMPARISON>
3383 032442 241 11 0 00 000001 ROT AC,1 ;*ROTATE LEFT ONE
3384 032443 312 11 0 00 000010 CAME AC,AC-1 ;TEST FOR BIT (N-1) A ONE
3385 032444 003 11 0 00 003237 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
3386 032445 321 13 0 00 032440 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
3387
3388 ;TEST AC LEFT HALF
3389 ;TEST ROT LEFT ONE BIT POSITION
3390 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
3391 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
3392 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
3393 ;ONE AFTER ROTATING
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 11-15
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR SEQ 0087
3394 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
3395
3396 003240 SN=SN+1
3397
3398 020000 ZZ=ZZ+ZZ ;SELECTED BIT BEFORE ROTATION
3399 IFE ZZ,<ZZ=1>
3400 040000 YY=ZZ+ZZ ;SELECTED BIT AFTER ROTATION
3401 032446 205 11 0 00 020000 MOVSI AC,ZZ ;SET BIT (N) OF AC LEFT
3402 IFN <ZZ-400000>,<
3403 032447 205 10 0 00 040000 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
3404 IFE <ZZ-400000>,<
3405 MOVEI AC-1,1 ;SETUP FOR COMPARISON>
3406 032450 241 11 0 00 000001 ROT AC,1 ;*ROTATE LEFT ONE
3407 032451 312 11 0 00 000010 CAME AC,AC-1 ;TEST FOR BIT (N-1) A ONE
3408 032452 003 11 0 00 003240 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
3409 032453 321 13 0 00 032446 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
3410
3411 ;TEST AC LEFT HALF
3412 ;TEST ROT LEFT ONE BIT POSITION
3413 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
3414 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
3415 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
3416 ;ONE AFTER ROTATING
3417 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
3418
3419 003241 SN=SN+1
3420
3421 040000 ZZ=ZZ+ZZ ;SELECTED BIT BEFORE ROTATION
3422 IFE ZZ,<ZZ=1>
3423 100000 YY=ZZ+ZZ ;SELECTED BIT AFTER ROTATION
3424 032454 205 11 0 00 040000 MOVSI AC,ZZ ;SET BIT (N) OF AC LEFT
3425 IFN <ZZ-400000>,<
3426 032455 205 10 0 00 100000 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
3427 IFE <ZZ-400000>,<
3428 MOVEI AC-1,1 ;SETUP FOR COMPARISON>
3429 032456 241 11 0 00 000001 ROT AC,1 ;*ROTATE LEFT ONE
3430 032457 312 11 0 00 000010 CAME AC,AC-1 ;TEST FOR BIT (N-1) A ONE
3431 032460 003 11 0 00 003241 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
3432 032461 321 13 0 00 032454 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
3433
3434 ;TEST AC LEFT HALF
3435 ;TEST ROT LEFT ONE BIT POSITION
3436 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
3437 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
3438 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
3439 ;ONE AFTER ROTATING
3440 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
3441
3442 003242 SN=SN+1
3443
3444 100000 ZZ=ZZ+ZZ ;SELECTED BIT BEFORE ROTATION
3445 IFE ZZ,<ZZ=1>
3446 200000 YY=ZZ+ZZ ;SELECTED BIT AFTER ROTATION
3447 032462 205 11 0 00 100000 MOVSI AC,ZZ ;SET BIT (N) OF AC LEFT
3448 IFN <ZZ-400000>,<
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DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR SEQ 0088
3449 032463 205 10 0 00 200000 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
3450 IFE <ZZ-400000>,<
3451 MOVEI AC-1,1 ;SETUP FOR COMPARISON>
3452 032464 241 11 0 00 000001 ROT AC,1 ;*ROTATE LEFT ONE
3453 032465 312 11 0 00 000010 CAME AC,AC-1 ;TEST FOR BIT (N-1) A ONE
3454 032466 003 11 0 00 003242 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
3455 032467 321 13 0 00 032462 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
3456
3457 ;TEST AC LEFT HALF
3458 ;TEST ROT LEFT ONE BIT POSITION
3459 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
3460 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
3461 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
3462 ;ONE AFTER ROTATING
3463 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
3464
3465 003243 SN=SN+1
3466
3467 200000 ZZ=ZZ+ZZ ;SELECTED BIT BEFORE ROTATION
3468 IFE ZZ,<ZZ=1>
3469 400000 YY=ZZ+ZZ ;SELECTED BIT AFTER ROTATION
3470 032470 205 11 0 00 200000 MOVSI AC,ZZ ;SET BIT (N) OF AC LEFT
3471 IFN <ZZ-400000>,<
3472 032471 205 10 0 00 400000 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
3473 IFE <ZZ-400000>,<
3474 MOVEI AC-1,1 ;SETUP FOR COMPARISON>
3475 032472 241 11 0 00 000001 ROT AC,1 ;*ROTATE LEFT ONE
3476 032473 312 11 0 00 000010 CAME AC,AC-1 ;TEST FOR BIT (N-1) A ONE
3477 032474 003 11 0 00 003243 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
3478 032475 321 13 0 00 032470 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
3479
3480 ;TEST AC LEFT HALF
3481 ;TEST ROT LEFT ONE BIT POSITION
3482 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
3483 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
3484 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
3485 ;ONE AFTER ROTATING
3486 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
3487
3488 003244 SN=SN+1
3489
3490 400000 ZZ=ZZ+ZZ ;SELECTED BIT BEFORE ROTATION
3491 IFE ZZ,<ZZ=1>
3492 000001 000000 YY=ZZ+ZZ ;SELECTED BIT AFTER ROTATION
3493 032476 205 11 0 00 400000 MOVSI AC,ZZ ;SET BIT (N) OF AC LEFT
3494 IFN <ZZ-400000>,<
3495 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
3496 IFE <ZZ-400000>,<
3497 032477 201 10 0 00 000001 MOVEI AC-1,1 ;SETUP FOR COMPARISON>
3498 032500 241 11 0 00 000001 ROT AC,1 ;*ROTATE LEFT ONE
3499 032501 312 11 0 00 000010 CAME AC,AC-1 ;TEST FOR BIT (N-1) A ONE
3500 032502 003 11 0 00 003244 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
3501 032503 321 13 0 00 032476 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
3502
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DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR SEQ 0089
3503 003300 SN=3300
3504 000000 ZZ=0
3505
3506 E3300: REPEAT ^D18,< ;TEST AC RIGHT HALF
3507 ;TEST ROT LEFT ONE BIT POSITION
3508 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
3509 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
3510 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
3511 ;IS ZERO AFTER ROTATING.
3512 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
3513
3514 SN=SN+1
3515 ZZ=ZZ+ZZ+1 ;SELECTED BIT BEFORE ROTATION
3516 IFE <ZZ-1>,<ZZ=-2>
3517 YY=<ZZ+ZZ+1>&777777 ;SELECTED BIT AFTER ROTATION
3518 HRROI AC,ZZ&777777 ;CLEAR BIT (N) OF AC RIGHT
3519 IFN <<ZZ-377777>&377777>,<
3520 HRROI AC-1,YY ;SETUP FOR COMPARISON>
3521 IFE <<ZZ-377777>&777777>,<
3522 HRLOI AC-1,-2 ;SETUP FOR COMPARISON>
3523 ROT AC,1 ;*ROTATE LEFT ONE
3524 CAME AC,AC-1 ;TEST FOR BIT (N-1) A ZERO
3525 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
3526 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
3527 >
3528 ;TEST AC RIGHT HALF
3529 ;TEST ROT LEFT ONE BIT POSITION
3530 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
3531 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
3532 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
3533 ;IS ZERO AFTER ROTATING.
3534 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
3535
3536 003301 SN=SN+1
3537 000001 ZZ=ZZ+ZZ+1 ;SELECTED BIT BEFORE ROTATION
3538 777777 777776 IFE <ZZ-1>,<ZZ=-2>
3539 777775 YY=<ZZ+ZZ+1>&777777 ;SELECTED BIT AFTER ROTATION
3540 032504 561 11 0 00 777776 HRROI AC,ZZ&777777 ;CLEAR BIT (N) OF AC RIGHT
3541 IFN <<ZZ-377777>&377777>,<
3542 032505 561 10 0 00 777775 HRROI AC-1,YY ;SETUP FOR COMPARISON>
3543 IFE <<ZZ-377777>&777777>,<
3544 HRLOI AC-1,-2 ;SETUP FOR COMPARISON>
3545 032506 241 11 0 00 000001 ROT AC,1 ;*ROTATE LEFT ONE
3546 032507 312 11 0 00 000010 CAME AC,AC-1 ;TEST FOR BIT (N-1) A ZERO
3547 032510 003 11 0 00 003301 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
3548 032511 321 13 0 00 032504 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
3549
3550 ;TEST AC RIGHT HALF
3551 ;TEST ROT LEFT ONE BIT POSITION
3552 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
3553 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
3554 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
3555 ;IS ZERO AFTER ROTATING.
3556 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
3557
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 12-1
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR SEQ 0090
3558 003302 SN=SN+1
3559 777777 777775 ZZ=ZZ+ZZ+1 ;SELECTED BIT BEFORE ROTATION
3560 IFE <ZZ-1>,<ZZ=-2>
3561 777773 YY=<ZZ+ZZ+1>&777777 ;SELECTED BIT AFTER ROTATION
3562 032512 561 11 0 00 777775 HRROI AC,ZZ&777777 ;CLEAR BIT (N) OF AC RIGHT
3563 IFN <<ZZ-377777>&377777>,<
3564 032513 561 10 0 00 777773 HRROI AC-1,YY ;SETUP FOR COMPARISON>
3565 IFE <<ZZ-377777>&777777>,<
3566 HRLOI AC-1,-2 ;SETUP FOR COMPARISON>
3567 032514 241 11 0 00 000001 ROT AC,1 ;*ROTATE LEFT ONE
3568 032515 312 11 0 00 000010 CAME AC,AC-1 ;TEST FOR BIT (N-1) A ZERO
3569 032516 003 11 0 00 003302 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
3570 032517 321 13 0 00 032512 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
3571
3572 ;TEST AC RIGHT HALF
3573 ;TEST ROT LEFT ONE BIT POSITION
3574 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
3575 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
3576 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
3577 ;IS ZERO AFTER ROTATING.
3578 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
3579
3580 003303 SN=SN+1
3581 777777 777773 ZZ=ZZ+ZZ+1 ;SELECTED BIT BEFORE ROTATION
3582 IFE <ZZ-1>,<ZZ=-2>
3583 777767 YY=<ZZ+ZZ+1>&777777 ;SELECTED BIT AFTER ROTATION
3584 032520 561 11 0 00 777773 HRROI AC,ZZ&777777 ;CLEAR BIT (N) OF AC RIGHT
3585 IFN <<ZZ-377777>&377777>,<
3586 032521 561 10 0 00 777767 HRROI AC-1,YY ;SETUP FOR COMPARISON>
3587 IFE <<ZZ-377777>&777777>,<
3588 HRLOI AC-1,-2 ;SETUP FOR COMPARISON>
3589 032522 241 11 0 00 000001 ROT AC,1 ;*ROTATE LEFT ONE
3590 032523 312 11 0 00 000010 CAME AC,AC-1 ;TEST FOR BIT (N-1) A ZERO
3591 032524 003 11 0 00 003303 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
3592 032525 321 13 0 00 032520 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
3593
3594 ;TEST AC RIGHT HALF
3595 ;TEST ROT LEFT ONE BIT POSITION
3596 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
3597 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
3598 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
3599 ;IS ZERO AFTER ROTATING.
3600 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
3601
3602 003304 SN=SN+1
3603 777777 777767 ZZ=ZZ+ZZ+1 ;SELECTED BIT BEFORE ROTATION
3604 IFE <ZZ-1>,<ZZ=-2>
3605 777757 YY=<ZZ+ZZ+1>&777777 ;SELECTED BIT AFTER ROTATION
3606 032526 561 11 0 00 777767 HRROI AC,ZZ&777777 ;CLEAR BIT (N) OF AC RIGHT
3607 IFN <<ZZ-377777>&377777>,<
3608 032527 561 10 0 00 777757 HRROI AC-1,YY ;SETUP FOR COMPARISON>
3609 IFE <<ZZ-377777>&777777>,<
3610 HRLOI AC-1,-2 ;SETUP FOR COMPARISON>
3611 032530 241 11 0 00 000001 ROT AC,1 ;*ROTATE LEFT ONE
3612 032531 312 11 0 00 000010 CAME AC,AC-1 ;TEST FOR BIT (N-1) A ZERO
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DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR SEQ 0091
3613 032532 003 11 0 00 003304 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
3614 032533 321 13 0 00 032526 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
3615
3616 ;TEST AC RIGHT HALF
3617 ;TEST ROT LEFT ONE BIT POSITION
3618 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
3619 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
3620 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
3621 ;IS ZERO AFTER ROTATING.
3622 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
3623
3624 003305 SN=SN+1
3625 777777 777757 ZZ=ZZ+ZZ+1 ;SELECTED BIT BEFORE ROTATION
3626 IFE <ZZ-1>,<ZZ=-2>
3627 777737 YY=<ZZ+ZZ+1>&777777 ;SELECTED BIT AFTER ROTATION
3628 032534 561 11 0 00 777757 HRROI AC,ZZ&777777 ;CLEAR BIT (N) OF AC RIGHT
3629 IFN <<ZZ-377777>&377777>,<
3630 032535 561 10 0 00 777737 HRROI AC-1,YY ;SETUP FOR COMPARISON>
3631 IFE <<ZZ-377777>&777777>,<
3632 HRLOI AC-1,-2 ;SETUP FOR COMPARISON>
3633 032536 241 11 0 00 000001 ROT AC,1 ;*ROTATE LEFT ONE
3634 032537 312 11 0 00 000010 CAME AC,AC-1 ;TEST FOR BIT (N-1) A ZERO
3635 032540 003 11 0 00 003305 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
3636 032541 321 13 0 00 032534 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
3637
3638 ;TEST AC RIGHT HALF
3639 ;TEST ROT LEFT ONE BIT POSITION
3640 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
3641 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
3642 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
3643 ;IS ZERO AFTER ROTATING.
3644 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
3645
3646 003306 SN=SN+1
3647 777777 777737 ZZ=ZZ+ZZ+1 ;SELECTED BIT BEFORE ROTATION
3648 IFE <ZZ-1>,<ZZ=-2>
3649 777677 YY=<ZZ+ZZ+1>&777777 ;SELECTED BIT AFTER ROTATION
3650 032542 561 11 0 00 777737 HRROI AC,ZZ&777777 ;CLEAR BIT (N) OF AC RIGHT
3651 IFN <<ZZ-377777>&377777>,<
3652 032543 561 10 0 00 777677 HRROI AC-1,YY ;SETUP FOR COMPARISON>
3653 IFE <<ZZ-377777>&777777>,<
3654 HRLOI AC-1,-2 ;SETUP FOR COMPARISON>
3655 032544 241 11 0 00 000001 ROT AC,1 ;*ROTATE LEFT ONE
3656 032545 312 11 0 00 000010 CAME AC,AC-1 ;TEST FOR BIT (N-1) A ZERO
3657 032546 003 11 0 00 003306 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
3658 032547 321 13 0 00 032542 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
3659
3660 ;TEST AC RIGHT HALF
3661 ;TEST ROT LEFT ONE BIT POSITION
3662 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
3663 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
3664 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
3665 ;IS ZERO AFTER ROTATING.
3666 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
3667
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DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR SEQ 0092
3668 003307 SN=SN+1
3669 777777 777677 ZZ=ZZ+ZZ+1 ;SELECTED BIT BEFORE ROTATION
3670 IFE <ZZ-1>,<ZZ=-2>
3671 777577 YY=<ZZ+ZZ+1>&777777 ;SELECTED BIT AFTER ROTATION
3672 032550 561 11 0 00 777677 HRROI AC,ZZ&777777 ;CLEAR BIT (N) OF AC RIGHT
3673 IFN <<ZZ-377777>&377777>,<
3674 032551 561 10 0 00 777577 HRROI AC-1,YY ;SETUP FOR COMPARISON>
3675 IFE <<ZZ-377777>&777777>,<
3676 HRLOI AC-1,-2 ;SETUP FOR COMPARISON>
3677 032552 241 11 0 00 000001 ROT AC,1 ;*ROTATE LEFT ONE
3678 032553 312 11 0 00 000010 CAME AC,AC-1 ;TEST FOR BIT (N-1) A ZERO
3679 032554 003 11 0 00 003307 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
3680 032555 321 13 0 00 032550 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
3681
3682 ;TEST AC RIGHT HALF
3683 ;TEST ROT LEFT ONE BIT POSITION
3684 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
3685 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
3686 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
3687 ;IS ZERO AFTER ROTATING.
3688 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
3689
3690 003310 SN=SN+1
3691 777777 777577 ZZ=ZZ+ZZ+1 ;SELECTED BIT BEFORE ROTATION
3692 IFE <ZZ-1>,<ZZ=-2>
3693 777377 YY=<ZZ+ZZ+1>&777777 ;SELECTED BIT AFTER ROTATION
3694 032556 561 11 0 00 777577 HRROI AC,ZZ&777777 ;CLEAR BIT (N) OF AC RIGHT
3695 IFN <<ZZ-377777>&377777>,<
3696 032557 561 10 0 00 777377 HRROI AC-1,YY ;SETUP FOR COMPARISON>
3697 IFE <<ZZ-377777>&777777>,<
3698 HRLOI AC-1,-2 ;SETUP FOR COMPARISON>
3699 032560 241 11 0 00 000001 ROT AC,1 ;*ROTATE LEFT ONE
3700 032561 312 11 0 00 000010 CAME AC,AC-1 ;TEST FOR BIT (N-1) A ZERO
3701 032562 003 11 0 00 003310 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
3702 032563 321 13 0 00 032556 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
3703
3704 ;TEST AC RIGHT HALF
3705 ;TEST ROT LEFT ONE BIT POSITION
3706 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
3707 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
3708 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
3709 ;IS ZERO AFTER ROTATING.
3710 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
3711
3712 003311 SN=SN+1
3713 777777 777377 ZZ=ZZ+ZZ+1 ;SELECTED BIT BEFORE ROTATION
3714 IFE <ZZ-1>,<ZZ=-2>
3715 776777 YY=<ZZ+ZZ+1>&777777 ;SELECTED BIT AFTER ROTATION
3716 032564 561 11 0 00 777377 HRROI AC,ZZ&777777 ;CLEAR BIT (N) OF AC RIGHT
3717 IFN <<ZZ-377777>&377777>,<
3718 032565 561 10 0 00 776777 HRROI AC-1,YY ;SETUP FOR COMPARISON>
3719 IFE <<ZZ-377777>&777777>,<
3720 HRLOI AC-1,-2 ;SETUP FOR COMPARISON>
3721 032566 241 11 0 00 000001 ROT AC,1 ;*ROTATE LEFT ONE
3722 032567 312 11 0 00 000010 CAME AC,AC-1 ;TEST FOR BIT (N-1) A ZERO
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DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR SEQ 0093
3723 032570 003 11 0 00 003311 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
3724 032571 321 13 0 00 032564 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
3725
3726 ;TEST AC RIGHT HALF
3727 ;TEST ROT LEFT ONE BIT POSITION
3728 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
3729 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
3730 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
3731 ;IS ZERO AFTER ROTATING.
3732 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
3733
3734 003312 SN=SN+1
3735 777777 776777 ZZ=ZZ+ZZ+1 ;SELECTED BIT BEFORE ROTATION
3736 IFE <ZZ-1>,<ZZ=-2>
3737 775777 YY=<ZZ+ZZ+1>&777777 ;SELECTED BIT AFTER ROTATION
3738 032572 561 11 0 00 776777 HRROI AC,ZZ&777777 ;CLEAR BIT (N) OF AC RIGHT
3739 IFN <<ZZ-377777>&377777>,<
3740 032573 561 10 0 00 775777 HRROI AC-1,YY ;SETUP FOR COMPARISON>
3741 IFE <<ZZ-377777>&777777>,<
3742 HRLOI AC-1,-2 ;SETUP FOR COMPARISON>
3743 032574 241 11 0 00 000001 ROT AC,1 ;*ROTATE LEFT ONE
3744 032575 312 11 0 00 000010 CAME AC,AC-1 ;TEST FOR BIT (N-1) A ZERO
3745 032576 003 11 0 00 003312 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
3746 032577 321 13 0 00 032572 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
3747
3748 ;TEST AC RIGHT HALF
3749 ;TEST ROT LEFT ONE BIT POSITION
3750 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
3751 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
3752 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
3753 ;IS ZERO AFTER ROTATING.
3754 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
3755
3756 003313 SN=SN+1
3757 777777 775777 ZZ=ZZ+ZZ+1 ;SELECTED BIT BEFORE ROTATION
3758 IFE <ZZ-1>,<ZZ=-2>
3759 773777 YY=<ZZ+ZZ+1>&777777 ;SELECTED BIT AFTER ROTATION
3760 032600 561 11 0 00 775777 HRROI AC,ZZ&777777 ;CLEAR BIT (N) OF AC RIGHT
3761 IFN <<ZZ-377777>&377777>,<
3762 032601 561 10 0 00 773777 HRROI AC-1,YY ;SETUP FOR COMPARISON>
3763 IFE <<ZZ-377777>&777777>,<
3764 HRLOI AC-1,-2 ;SETUP FOR COMPARISON>
3765 032602 241 11 0 00 000001 ROT AC,1 ;*ROTATE LEFT ONE
3766 032603 312 11 0 00 000010 CAME AC,AC-1 ;TEST FOR BIT (N-1) A ZERO
3767 032604 003 11 0 00 003313 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
3768 032605 321 13 0 00 032600 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
3769
3770 ;TEST AC RIGHT HALF
3771 ;TEST ROT LEFT ONE BIT POSITION
3772 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
3773 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
3774 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
3775 ;IS ZERO AFTER ROTATING.
3776 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
3777
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 12-5
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR SEQ 0094
3778 003314 SN=SN+1
3779 777777 773777 ZZ=ZZ+ZZ+1 ;SELECTED BIT BEFORE ROTATION
3780 IFE <ZZ-1>,<ZZ=-2>
3781 767777 YY=<ZZ+ZZ+1>&777777 ;SELECTED BIT AFTER ROTATION
3782 032606 561 11 0 00 773777 HRROI AC,ZZ&777777 ;CLEAR BIT (N) OF AC RIGHT
3783 IFN <<ZZ-377777>&377777>,<
3784 032607 561 10 0 00 767777 HRROI AC-1,YY ;SETUP FOR COMPARISON>
3785 IFE <<ZZ-377777>&777777>,<
3786 HRLOI AC-1,-2 ;SETUP FOR COMPARISON>
3787 032610 241 11 0 00 000001 ROT AC,1 ;*ROTATE LEFT ONE
3788 032611 312 11 0 00 000010 CAME AC,AC-1 ;TEST FOR BIT (N-1) A ZERO
3789 032612 003 11 0 00 003314 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
3790 032613 321 13 0 00 032606 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
3791
3792 ;TEST AC RIGHT HALF
3793 ;TEST ROT LEFT ONE BIT POSITION
3794 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
3795 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
3796 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
3797 ;IS ZERO AFTER ROTATING.
3798 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
3799
3800 003315 SN=SN+1
3801 777777 767777 ZZ=ZZ+ZZ+1 ;SELECTED BIT BEFORE ROTATION
3802 IFE <ZZ-1>,<ZZ=-2>
3803 757777 YY=<ZZ+ZZ+1>&777777 ;SELECTED BIT AFTER ROTATION
3804 032614 561 11 0 00 767777 HRROI AC,ZZ&777777 ;CLEAR BIT (N) OF AC RIGHT
3805 IFN <<ZZ-377777>&377777>,<
3806 032615 561 10 0 00 757777 HRROI AC-1,YY ;SETUP FOR COMPARISON>
3807 IFE <<ZZ-377777>&777777>,<
3808 HRLOI AC-1,-2 ;SETUP FOR COMPARISON>
3809 032616 241 11 0 00 000001 ROT AC,1 ;*ROTATE LEFT ONE
3810 032617 312 11 0 00 000010 CAME AC,AC-1 ;TEST FOR BIT (N-1) A ZERO
3811 032620 003 11 0 00 003315 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
3812 032621 321 13 0 00 032614 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
3813
3814 ;TEST AC RIGHT HALF
3815 ;TEST ROT LEFT ONE BIT POSITION
3816 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
3817 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
3818 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
3819 ;IS ZERO AFTER ROTATING.
3820 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
3821
3822 003316 SN=SN+1
3823 777777 757777 ZZ=ZZ+ZZ+1 ;SELECTED BIT BEFORE ROTATION
3824 IFE <ZZ-1>,<ZZ=-2>
3825 737777 YY=<ZZ+ZZ+1>&777777 ;SELECTED BIT AFTER ROTATION
3826 032622 561 11 0 00 757777 HRROI AC,ZZ&777777 ;CLEAR BIT (N) OF AC RIGHT
3827 IFN <<ZZ-377777>&377777>,<
3828 032623 561 10 0 00 737777 HRROI AC-1,YY ;SETUP FOR COMPARISON>
3829 IFE <<ZZ-377777>&777777>,<
3830 HRLOI AC-1,-2 ;SETUP FOR COMPARISON>
3831 032624 241 11 0 00 000001 ROT AC,1 ;*ROTATE LEFT ONE
3832 032625 312 11 0 00 000010 CAME AC,AC-1 ;TEST FOR BIT (N-1) A ZERO
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 12-6
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR SEQ 0095
3833 032626 003 11 0 00 003316 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
3834 032627 321 13 0 00 032622 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
3835
3836 ;TEST AC RIGHT HALF
3837 ;TEST ROT LEFT ONE BIT POSITION
3838 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
3839 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
3840 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
3841 ;IS ZERO AFTER ROTATING.
3842 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
3843
3844 003317 SN=SN+1
3845 777777 737777 ZZ=ZZ+ZZ+1 ;SELECTED BIT BEFORE ROTATION
3846 IFE <ZZ-1>,<ZZ=-2>
3847 677777 YY=<ZZ+ZZ+1>&777777 ;SELECTED BIT AFTER ROTATION
3848 032630 561 11 0 00 737777 HRROI AC,ZZ&777777 ;CLEAR BIT (N) OF AC RIGHT
3849 IFN <<ZZ-377777>&377777>,<
3850 032631 561 10 0 00 677777 HRROI AC-1,YY ;SETUP FOR COMPARISON>
3851 IFE <<ZZ-377777>&777777>,<
3852 HRLOI AC-1,-2 ;SETUP FOR COMPARISON>
3853 032632 241 11 0 00 000001 ROT AC,1 ;*ROTATE LEFT ONE
3854 032633 312 11 0 00 000010 CAME AC,AC-1 ;TEST FOR BIT (N-1) A ZERO
3855 032634 003 11 0 00 003317 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
3856 032635 321 13 0 00 032630 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
3857
3858 ;TEST AC RIGHT HALF
3859 ;TEST ROT LEFT ONE BIT POSITION
3860 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
3861 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
3862 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
3863 ;IS ZERO AFTER ROTATING.
3864 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
3865
3866 003320 SN=SN+1
3867 777777 677777 ZZ=ZZ+ZZ+1 ;SELECTED BIT BEFORE ROTATION
3868 IFE <ZZ-1>,<ZZ=-2>
3869 577777 YY=<ZZ+ZZ+1>&777777 ;SELECTED BIT AFTER ROTATION
3870 032636 561 11 0 00 677777 HRROI AC,ZZ&777777 ;CLEAR BIT (N) OF AC RIGHT
3871 IFN <<ZZ-377777>&377777>,<
3872 032637 561 10 0 00 577777 HRROI AC-1,YY ;SETUP FOR COMPARISON>
3873 IFE <<ZZ-377777>&777777>,<
3874 HRLOI AC-1,-2 ;SETUP FOR COMPARISON>
3875 032640 241 11 0 00 000001 ROT AC,1 ;*ROTATE LEFT ONE
3876 032641 312 11 0 00 000010 CAME AC,AC-1 ;TEST FOR BIT (N-1) A ZERO
3877 032642 003 11 0 00 003320 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
3878 032643 321 13 0 00 032636 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
3879
3880 ;TEST AC RIGHT HALF
3881 ;TEST ROT LEFT ONE BIT POSITION
3882 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
3883 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
3884 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
3885 ;IS ZERO AFTER ROTATING.
3886 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
3887
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 12-7
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR SEQ 0096
3888 003321 SN=SN+1
3889 777777 577777 ZZ=ZZ+ZZ+1 ;SELECTED BIT BEFORE ROTATION
3890 IFE <ZZ-1>,<ZZ=-2>
3891 377777 YY=<ZZ+ZZ+1>&777777 ;SELECTED BIT AFTER ROTATION
3892 032644 561 11 0 00 577777 HRROI AC,ZZ&777777 ;CLEAR BIT (N) OF AC RIGHT
3893 IFN <<ZZ-377777>&377777>,<
3894 032645 561 10 0 00 377777 HRROI AC-1,YY ;SETUP FOR COMPARISON>
3895 IFE <<ZZ-377777>&777777>,<
3896 HRLOI AC-1,-2 ;SETUP FOR COMPARISON>
3897 032646 241 11 0 00 000001 ROT AC,1 ;*ROTATE LEFT ONE
3898 032647 312 11 0 00 000010 CAME AC,AC-1 ;TEST FOR BIT (N-1) A ZERO
3899 032650 003 11 0 00 003321 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
3900 032651 321 13 0 00 032644 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
3901
3902 ;TEST AC RIGHT HALF
3903 ;TEST ROT LEFT ONE BIT POSITION
3904 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
3905 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
3906 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
3907 ;IS ZERO AFTER ROTATING.
3908 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
3909
3910 003322 SN=SN+1
3911 777777 377777 ZZ=ZZ+ZZ+1 ;SELECTED BIT BEFORE ROTATION
3912 IFE <ZZ-1>,<ZZ=-2>
3913 777777 YY=<ZZ+ZZ+1>&777777 ;SELECTED BIT AFTER ROTATION
3914 032652 561 11 0 00 377777 HRROI AC,ZZ&777777 ;CLEAR BIT (N) OF AC RIGHT
3915 IFN <<ZZ-377777>&377777>,<
3916 HRROI AC-1,YY ;SETUP FOR COMPARISON>
3917 IFE <<ZZ-377777>&777777>,<
3918 032653 525 10 0 00 777776 HRLOI AC-1,-2 ;SETUP FOR COMPARISON>
3919 032654 241 11 0 00 000001 ROT AC,1 ;*ROTATE LEFT ONE
3920 032655 312 11 0 00 000010 CAME AC,AC-1 ;TEST FOR BIT (N-1) A ZERO
3921 032656 003 11 0 00 003322 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
3922 032657 321 13 0 00 032652 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
3923
3924 PAGE
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 12-8
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR SEQ 0097
3925 000000 ZZ=0
3926 REPEAT ^D18,< ;TEST AC LEFT HALF
3927 ;TEST ROT LEFT ONE BIT POSITION
3928 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
3929 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
3930 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
3931 ;IS ZERO AFTER ROTATING.
3932 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
3933
3934 SN=SN+1
3935 ZZ=ZZ+ZZ+1 ;SELECTED BIT BEFORE ROTATION
3936 IFE <ZZ-1>,<ZZ=-2>
3937 YY=<ZZ+ZZ+1>&777777 ;SELECTED BIT AFTER ROTATION
3938 HRLOI AC,ZZ&777777 ;CLEAR BIT (N) OF AC LEFT
3939 IFN <<ZZ-377777>&777777>,<
3940 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
3941 IFE <<ZZ-377777>&777777>,<
3942 HRROI AC-1,-2 ;SETUP FOR COMPARISON>
3943 ROT AC,1 ;*ROTATE LEFT ONE
3944 CAME AC,AC-1 ;TEST FOR BIT (N-1) OR ZERO
3945 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
3946 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
3947 >
3948 ;TEST AC LEFT HALF
3949 ;TEST ROT LEFT ONE BIT POSITION
3950 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
3951 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
3952 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
3953 ;IS ZERO AFTER ROTATING.
3954 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
3955
3956 003323 SN=SN+1
3957 000001 ZZ=ZZ+ZZ+1 ;SELECTED BIT BEFORE ROTATION
3958 777777 777776 IFE <ZZ-1>,<ZZ=-2>
3959 777775 YY=<ZZ+ZZ+1>&777777 ;SELECTED BIT AFTER ROTATION
3960 032660 525 11 0 00 777776 HRLOI AC,ZZ&777777 ;CLEAR BIT (N) OF AC LEFT
3961 IFN <<ZZ-377777>&777777>,<
3962 032661 525 10 0 00 777775 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
3963 IFE <<ZZ-377777>&777777>,<
3964 HRROI AC-1,-2 ;SETUP FOR COMPARISON>
3965 032662 241 11 0 00 000001 ROT AC,1 ;*ROTATE LEFT ONE
3966 032663 312 11 0 00 000010 CAME AC,AC-1 ;TEST FOR BIT (N-1) OR ZERO
3967 032664 003 11 0 00 003323 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
3968 032665 321 13 0 00 032660 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
3969
3970 ;TEST AC LEFT HALF
3971 ;TEST ROT LEFT ONE BIT POSITION
3972 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
3973 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
3974 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
3975 ;IS ZERO AFTER ROTATING.
3976 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
3977
3978 003324 SN=SN+1
3979 777777 777775 ZZ=ZZ+ZZ+1 ;SELECTED BIT BEFORE ROTATION
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 12-9
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR SEQ 0098
3980 IFE <ZZ-1>,<ZZ=-2>
3981 777773 YY=<ZZ+ZZ+1>&777777 ;SELECTED BIT AFTER ROTATION
3982 032666 525 11 0 00 777775 HRLOI AC,ZZ&777777 ;CLEAR BIT (N) OF AC LEFT
3983 IFN <<ZZ-377777>&777777>,<
3984 032667 525 10 0 00 777773 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
3985 IFE <<ZZ-377777>&777777>,<
3986 HRROI AC-1,-2 ;SETUP FOR COMPARISON>
3987 032670 241 11 0 00 000001 ROT AC,1 ;*ROTATE LEFT ONE
3988 032671 312 11 0 00 000010 CAME AC,AC-1 ;TEST FOR BIT (N-1) OR ZERO
3989 032672 003 11 0 00 003324 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
3990 032673 321 13 0 00 032666 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
3991
3992 ;TEST AC LEFT HALF
3993 ;TEST ROT LEFT ONE BIT POSITION
3994 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
3995 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
3996 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
3997 ;IS ZERO AFTER ROTATING.
3998 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
3999
4000 003325 SN=SN+1
4001 777777 777773 ZZ=ZZ+ZZ+1 ;SELECTED BIT BEFORE ROTATION
4002 IFE <ZZ-1>,<ZZ=-2>
4003 777767 YY=<ZZ+ZZ+1>&777777 ;SELECTED BIT AFTER ROTATION
4004 032674 525 11 0 00 777773 HRLOI AC,ZZ&777777 ;CLEAR BIT (N) OF AC LEFT
4005 IFN <<ZZ-377777>&777777>,<
4006 032675 525 10 0 00 777767 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
4007 IFE <<ZZ-377777>&777777>,<
4008 HRROI AC-1,-2 ;SETUP FOR COMPARISON>
4009 032676 241 11 0 00 000001 ROT AC,1 ;*ROTATE LEFT ONE
4010 032677 312 11 0 00 000010 CAME AC,AC-1 ;TEST FOR BIT (N-1) OR ZERO
4011 032700 003 11 0 00 003325 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
4012 032701 321 13 0 00 032674 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
4013
4014 ;TEST AC LEFT HALF
4015 ;TEST ROT LEFT ONE BIT POSITION
4016 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
4017 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
4018 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
4019 ;IS ZERO AFTER ROTATING.
4020 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
4021
4022 003326 SN=SN+1
4023 777777 777767 ZZ=ZZ+ZZ+1 ;SELECTED BIT BEFORE ROTATION
4024 IFE <ZZ-1>,<ZZ=-2>
4025 777757 YY=<ZZ+ZZ+1>&777777 ;SELECTED BIT AFTER ROTATION
4026 032702 525 11 0 00 777767 HRLOI AC,ZZ&777777 ;CLEAR BIT (N) OF AC LEFT
4027 IFN <<ZZ-377777>&777777>,<
4028 032703 525 10 0 00 777757 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
4029 IFE <<ZZ-377777>&777777>,<
4030 HRROI AC-1,-2 ;SETUP FOR COMPARISON>
4031 032704 241 11 0 00 000001 ROT AC,1 ;*ROTATE LEFT ONE
4032 032705 312 11 0 00 000010 CAME AC,AC-1 ;TEST FOR BIT (N-1) OR ZERO
4033 032706 003 11 0 00 003326 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
4034 032707 321 13 0 00 032702 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 12-10
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR SEQ 0099
4035
4036 ;TEST AC LEFT HALF
4037 ;TEST ROT LEFT ONE BIT POSITION
4038 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
4039 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
4040 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
4041 ;IS ZERO AFTER ROTATING.
4042 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
4043
4044 003327 SN=SN+1
4045 777777 777757 ZZ=ZZ+ZZ+1 ;SELECTED BIT BEFORE ROTATION
4046 IFE <ZZ-1>,<ZZ=-2>
4047 777737 YY=<ZZ+ZZ+1>&777777 ;SELECTED BIT AFTER ROTATION
4048 032710 525 11 0 00 777757 HRLOI AC,ZZ&777777 ;CLEAR BIT (N) OF AC LEFT
4049 IFN <<ZZ-377777>&777777>,<
4050 032711 525 10 0 00 777737 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
4051 IFE <<ZZ-377777>&777777>,<
4052 HRROI AC-1,-2 ;SETUP FOR COMPARISON>
4053 032712 241 11 0 00 000001 ROT AC,1 ;*ROTATE LEFT ONE
4054 032713 312 11 0 00 000010 CAME AC,AC-1 ;TEST FOR BIT (N-1) OR ZERO
4055 032714 003 11 0 00 003327 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
4056 032715 321 13 0 00 032710 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
4057
4058 ;TEST AC LEFT HALF
4059 ;TEST ROT LEFT ONE BIT POSITION
4060 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
4061 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
4062 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
4063 ;IS ZERO AFTER ROTATING.
4064 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
4065
4066 003330 SN=SN+1
4067 777777 777737 ZZ=ZZ+ZZ+1 ;SELECTED BIT BEFORE ROTATION
4068 IFE <ZZ-1>,<ZZ=-2>
4069 777677 YY=<ZZ+ZZ+1>&777777 ;SELECTED BIT AFTER ROTATION
4070 032716 525 11 0 00 777737 HRLOI AC,ZZ&777777 ;CLEAR BIT (N) OF AC LEFT
4071 IFN <<ZZ-377777>&777777>,<
4072 032717 525 10 0 00 777677 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
4073 IFE <<ZZ-377777>&777777>,<
4074 HRROI AC-1,-2 ;SETUP FOR COMPARISON>
4075 032720 241 11 0 00 000001 ROT AC,1 ;*ROTATE LEFT ONE
4076 032721 312 11 0 00 000010 CAME AC,AC-1 ;TEST FOR BIT (N-1) OR ZERO
4077 032722 003 11 0 00 003330 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
4078 032723 321 13 0 00 032716 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
4079
4080 ;TEST AC LEFT HALF
4081 ;TEST ROT LEFT ONE BIT POSITION
4082 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
4083 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
4084 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
4085 ;IS ZERO AFTER ROTATING.
4086 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
4087
4088 003331 SN=SN+1
4089 777777 777677 ZZ=ZZ+ZZ+1 ;SELECTED BIT BEFORE ROTATION
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 12-11
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR SEQ 0100
4090 IFE <ZZ-1>,<ZZ=-2>
4091 777577 YY=<ZZ+ZZ+1>&777777 ;SELECTED BIT AFTER ROTATION
4092 032724 525 11 0 00 777677 HRLOI AC,ZZ&777777 ;CLEAR BIT (N) OF AC LEFT
4093 IFN <<ZZ-377777>&777777>,<
4094 032725 525 10 0 00 777577 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
4095 IFE <<ZZ-377777>&777777>,<
4096 HRROI AC-1,-2 ;SETUP FOR COMPARISON>
4097 032726 241 11 0 00 000001 ROT AC,1 ;*ROTATE LEFT ONE
4098 032727 312 11 0 00 000010 CAME AC,AC-1 ;TEST FOR BIT (N-1) OR ZERO
4099 032730 003 11 0 00 003331 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
4100 032731 321 13 0 00 032724 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
4101
4102 ;TEST AC LEFT HALF
4103 ;TEST ROT LEFT ONE BIT POSITION
4104 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
4105 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
4106 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
4107 ;IS ZERO AFTER ROTATING.
4108 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
4109
4110 003332 SN=SN+1
4111 777777 777577 ZZ=ZZ+ZZ+1 ;SELECTED BIT BEFORE ROTATION
4112 IFE <ZZ-1>,<ZZ=-2>
4113 777377 YY=<ZZ+ZZ+1>&777777 ;SELECTED BIT AFTER ROTATION
4114 032732 525 11 0 00 777577 HRLOI AC,ZZ&777777 ;CLEAR BIT (N) OF AC LEFT
4115 IFN <<ZZ-377777>&777777>,<
4116 032733 525 10 0 00 777377 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
4117 IFE <<ZZ-377777>&777777>,<
4118 HRROI AC-1,-2 ;SETUP FOR COMPARISON>
4119 032734 241 11 0 00 000001 ROT AC,1 ;*ROTATE LEFT ONE
4120 032735 312 11 0 00 000010 CAME AC,AC-1 ;TEST FOR BIT (N-1) OR ZERO
4121 032736 003 11 0 00 003332 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
4122 032737 321 13 0 00 032732 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
4123
4124 ;TEST AC LEFT HALF
4125 ;TEST ROT LEFT ONE BIT POSITION
4126 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
4127 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
4128 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
4129 ;IS ZERO AFTER ROTATING.
4130 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
4131
4132 003333 SN=SN+1
4133 777777 777377 ZZ=ZZ+ZZ+1 ;SELECTED BIT BEFORE ROTATION
4134 IFE <ZZ-1>,<ZZ=-2>
4135 776777 YY=<ZZ+ZZ+1>&777777 ;SELECTED BIT AFTER ROTATION
4136 032740 525 11 0 00 777377 HRLOI AC,ZZ&777777 ;CLEAR BIT (N) OF AC LEFT
4137 IFN <<ZZ-377777>&777777>,<
4138 032741 525 10 0 00 776777 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
4139 IFE <<ZZ-377777>&777777>,<
4140 HRROI AC-1,-2 ;SETUP FOR COMPARISON>
4141 032742 241 11 0 00 000001 ROT AC,1 ;*ROTATE LEFT ONE
4142 032743 312 11 0 00 000010 CAME AC,AC-1 ;TEST FOR BIT (N-1) OR ZERO
4143 032744 003 11 0 00 003333 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
4144 032745 321 13 0 00 032740 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
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4145
4146 ;TEST AC LEFT HALF
4147 ;TEST ROT LEFT ONE BIT POSITION
4148 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
4149 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
4150 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
4151 ;IS ZERO AFTER ROTATING.
4152 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
4153
4154 003334 SN=SN+1
4155 777777 776777 ZZ=ZZ+ZZ+1 ;SELECTED BIT BEFORE ROTATION
4156 IFE <ZZ-1>,<ZZ=-2>
4157 775777 YY=<ZZ+ZZ+1>&777777 ;SELECTED BIT AFTER ROTATION
4158 032746 525 11 0 00 776777 HRLOI AC,ZZ&777777 ;CLEAR BIT (N) OF AC LEFT
4159 IFN <<ZZ-377777>&777777>,<
4160 032747 525 10 0 00 775777 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
4161 IFE <<ZZ-377777>&777777>,<
4162 HRROI AC-1,-2 ;SETUP FOR COMPARISON>
4163 032750 241 11 0 00 000001 ROT AC,1 ;*ROTATE LEFT ONE
4164 032751 312 11 0 00 000010 CAME AC,AC-1 ;TEST FOR BIT (N-1) OR ZERO
4165 032752 003 11 0 00 003334 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
4166 032753 321 13 0 00 032746 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
4167
4168 ;TEST AC LEFT HALF
4169 ;TEST ROT LEFT ONE BIT POSITION
4170 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
4171 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
4172 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
4173 ;IS ZERO AFTER ROTATING.
4174 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
4175
4176 003335 SN=SN+1
4177 777777 775777 ZZ=ZZ+ZZ+1 ;SELECTED BIT BEFORE ROTATION
4178 IFE <ZZ-1>,<ZZ=-2>
4179 773777 YY=<ZZ+ZZ+1>&777777 ;SELECTED BIT AFTER ROTATION
4180 032754 525 11 0 00 775777 HRLOI AC,ZZ&777777 ;CLEAR BIT (N) OF AC LEFT
4181 IFN <<ZZ-377777>&777777>,<
4182 032755 525 10 0 00 773777 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
4183 IFE <<ZZ-377777>&777777>,<
4184 HRROI AC-1,-2 ;SETUP FOR COMPARISON>
4185 032756 241 11 0 00 000001 ROT AC,1 ;*ROTATE LEFT ONE
4186 032757 312 11 0 00 000010 CAME AC,AC-1 ;TEST FOR BIT (N-1) OR ZERO
4187 032760 003 11 0 00 003335 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
4188 032761 321 13 0 00 032754 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
4189
4190 ;TEST AC LEFT HALF
4191 ;TEST ROT LEFT ONE BIT POSITION
4192 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
4193 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
4194 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
4195 ;IS ZERO AFTER ROTATING.
4196 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
4197
4198 003336 SN=SN+1
4199 777777 773777 ZZ=ZZ+ZZ+1 ;SELECTED BIT BEFORE ROTATION
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DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR SEQ 0102
4200 IFE <ZZ-1>,<ZZ=-2>
4201 767777 YY=<ZZ+ZZ+1>&777777 ;SELECTED BIT AFTER ROTATION
4202 032762 525 11 0 00 773777 HRLOI AC,ZZ&777777 ;CLEAR BIT (N) OF AC LEFT
4203 IFN <<ZZ-377777>&777777>,<
4204 032763 525 10 0 00 767777 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
4205 IFE <<ZZ-377777>&777777>,<
4206 HRROI AC-1,-2 ;SETUP FOR COMPARISON>
4207 032764 241 11 0 00 000001 ROT AC,1 ;*ROTATE LEFT ONE
4208 032765 312 11 0 00 000010 CAME AC,AC-1 ;TEST FOR BIT (N-1) OR ZERO
4209 032766 003 11 0 00 003336 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
4210 032767 321 13 0 00 032762 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
4211
4212 ;TEST AC LEFT HALF
4213 ;TEST ROT LEFT ONE BIT POSITION
4214 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
4215 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
4216 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
4217 ;IS ZERO AFTER ROTATING.
4218 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
4219
4220 003337 SN=SN+1
4221 777777 767777 ZZ=ZZ+ZZ+1 ;SELECTED BIT BEFORE ROTATION
4222 IFE <ZZ-1>,<ZZ=-2>
4223 757777 YY=<ZZ+ZZ+1>&777777 ;SELECTED BIT AFTER ROTATION
4224 032770 525 11 0 00 767777 HRLOI AC,ZZ&777777 ;CLEAR BIT (N) OF AC LEFT
4225 IFN <<ZZ-377777>&777777>,<
4226 032771 525 10 0 00 757777 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
4227 IFE <<ZZ-377777>&777777>,<
4228 HRROI AC-1,-2 ;SETUP FOR COMPARISON>
4229 032772 241 11 0 00 000001 ROT AC,1 ;*ROTATE LEFT ONE
4230 032773 312 11 0 00 000010 CAME AC,AC-1 ;TEST FOR BIT (N-1) OR ZERO
4231 032774 003 11 0 00 003337 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
4232 032775 321 13 0 00 032770 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
4233
4234 ;TEST AC LEFT HALF
4235 ;TEST ROT LEFT ONE BIT POSITION
4236 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
4237 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
4238 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
4239 ;IS ZERO AFTER ROTATING.
4240 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
4241
4242 003340 SN=SN+1
4243 777777 757777 ZZ=ZZ+ZZ+1 ;SELECTED BIT BEFORE ROTATION
4244 IFE <ZZ-1>,<ZZ=-2>
4245 737777 YY=<ZZ+ZZ+1>&777777 ;SELECTED BIT AFTER ROTATION
4246 032776 525 11 0 00 757777 HRLOI AC,ZZ&777777 ;CLEAR BIT (N) OF AC LEFT
4247 IFN <<ZZ-377777>&777777>,<
4248 032777 525 10 0 00 737777 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
4249 IFE <<ZZ-377777>&777777>,<
4250 HRROI AC-1,-2 ;SETUP FOR COMPARISON>
4251 033000 241 11 0 00 000001 ROT AC,1 ;*ROTATE LEFT ONE
4252 033001 312 11 0 00 000010 CAME AC,AC-1 ;TEST FOR BIT (N-1) OR ZERO
4253 033002 003 11 0 00 003340 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
4254 033003 321 13 0 00 032776 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
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4255
4256 ;TEST AC LEFT HALF
4257 ;TEST ROT LEFT ONE BIT POSITION
4258 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
4259 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
4260 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
4261 ;IS ZERO AFTER ROTATING.
4262 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
4263
4264 003341 SN=SN+1
4265 777777 737777 ZZ=ZZ+ZZ+1 ;SELECTED BIT BEFORE ROTATION
4266 IFE <ZZ-1>,<ZZ=-2>
4267 677777 YY=<ZZ+ZZ+1>&777777 ;SELECTED BIT AFTER ROTATION
4268 033004 525 11 0 00 737777 HRLOI AC,ZZ&777777 ;CLEAR BIT (N) OF AC LEFT
4269 IFN <<ZZ-377777>&777777>,<
4270 033005 525 10 0 00 677777 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
4271 IFE <<ZZ-377777>&777777>,<
4272 HRROI AC-1,-2 ;SETUP FOR COMPARISON>
4273 033006 241 11 0 00 000001 ROT AC,1 ;*ROTATE LEFT ONE
4274 033007 312 11 0 00 000010 CAME AC,AC-1 ;TEST FOR BIT (N-1) OR ZERO
4275 033010 003 11 0 00 003341 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
4276 033011 321 13 0 00 033004 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
4277
4278 ;TEST AC LEFT HALF
4279 ;TEST ROT LEFT ONE BIT POSITION
4280 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
4281 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
4282 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
4283 ;IS ZERO AFTER ROTATING.
4284 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
4285
4286 003342 SN=SN+1
4287 777777 677777 ZZ=ZZ+ZZ+1 ;SELECTED BIT BEFORE ROTATION
4288 IFE <ZZ-1>,<ZZ=-2>
4289 577777 YY=<ZZ+ZZ+1>&777777 ;SELECTED BIT AFTER ROTATION
4290 033012 525 11 0 00 677777 HRLOI AC,ZZ&777777 ;CLEAR BIT (N) OF AC LEFT
4291 IFN <<ZZ-377777>&777777>,<
4292 033013 525 10 0 00 577777 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
4293 IFE <<ZZ-377777>&777777>,<
4294 HRROI AC-1,-2 ;SETUP FOR COMPARISON>
4295 033014 241 11 0 00 000001 ROT AC,1 ;*ROTATE LEFT ONE
4296 033015 312 11 0 00 000010 CAME AC,AC-1 ;TEST FOR BIT (N-1) OR ZERO
4297 033016 003 11 0 00 003342 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
4298 033017 321 13 0 00 033012 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
4299
4300 ;TEST AC LEFT HALF
4301 ;TEST ROT LEFT ONE BIT POSITION
4302 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
4303 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
4304 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
4305 ;IS ZERO AFTER ROTATING.
4306 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
4307
4308 003343 SN=SN+1
4309 777777 577777 ZZ=ZZ+ZZ+1 ;SELECTED BIT BEFORE ROTATION
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DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR SEQ 0104
4310 IFE <ZZ-1>,<ZZ=-2>
4311 377777 YY=<ZZ+ZZ+1>&777777 ;SELECTED BIT AFTER ROTATION
4312 033020 525 11 0 00 577777 HRLOI AC,ZZ&777777 ;CLEAR BIT (N) OF AC LEFT
4313 IFN <<ZZ-377777>&777777>,<
4314 033021 525 10 0 00 377777 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
4315 IFE <<ZZ-377777>&777777>,<
4316 HRROI AC-1,-2 ;SETUP FOR COMPARISON>
4317 033022 241 11 0 00 000001 ROT AC,1 ;*ROTATE LEFT ONE
4318 033023 312 11 0 00 000010 CAME AC,AC-1 ;TEST FOR BIT (N-1) OR ZERO
4319 033024 003 11 0 00 003343 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
4320 033025 321 13 0 00 033020 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
4321
4322 ;TEST AC LEFT HALF
4323 ;TEST ROT LEFT ONE BIT POSITION
4324 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
4325 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
4326 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
4327 ;IS ZERO AFTER ROTATING.
4328 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
4329
4330 003344 SN=SN+1
4331 777777 377777 ZZ=ZZ+ZZ+1 ;SELECTED BIT BEFORE ROTATION
4332 IFE <ZZ-1>,<ZZ=-2>
4333 777777 YY=<ZZ+ZZ+1>&777777 ;SELECTED BIT AFTER ROTATION
4334 033026 525 11 0 00 377777 HRLOI AC,ZZ&777777 ;CLEAR BIT (N) OF AC LEFT
4335 IFN <<ZZ-377777>&777777>,<
4336 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
4337 IFE <<ZZ-377777>&777777>,<
4338 033027 561 10 0 00 777776 HRROI AC-1,-2 ;SETUP FOR COMPARISON>
4339 033030 241 11 0 00 000001 ROT AC,1 ;*ROTATE LEFT ONE
4340 033031 312 11 0 00 000010 CAME AC,AC-1 ;TEST FOR BIT (N-1) OR ZERO
4341 033032 003 11 0 00 003344 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
4342 033033 321 13 0 00 033026 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
4343
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4344
4345 ;TEST ROT RIGHT ONE BIT POSITION
4346 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD.
4347 ;AN ERROR OCCURS IF C(AC) IS NON-ZERO AFTER ROTATING
4348
4349 000010 AC=10
4350 SAVEAC (1,1)^
4351 033034 201 12 0 00 033034 MOVEI AC+2,. ;SAVE TEST PC
4352 033035 202 12 0 00 030051 MOVEM AC+2,TESTPC
4353 033036 201 12 0 00 000012 MOVEI AC+2,<AC+2>&17 ;INFORM ERROR ROUTINE WHICH
4354 033037 202 12 0 00 041765 MOVEM AC+2,ERRLOP# ;AC IS USED FOR ITERATION^
4355
4356 033040 403 10 0 00 000007 E3400: SETZB AC,AC-1 ;INITIALIZE AC AND EXPECTED RESULT TO ZERO
4357 033041 241 10 0 00 777777 ROT AC,-1 ;*ROTATE RIGHT ONE
4358 033042 312 10 0 00 000007 CAME AC,AC-1 ;TEST AC FOR ALL ZEROS
4359 033043 003 10 0 00 003401 ER3 AC,3401 ;AD-AR GATING FAILED
4360 033044 321 12 0 00 033040 JUMPL AC+2,E3400 ;LOOP ON ERROR SWITCH
4361
4362 ;TEST ROT RIGHT ONE BIT POSITION
4363 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
4364 ;AN ERROR OCCURS IF C(AC) IS NOT ALL ONES AFTER ROTATING
4365
4366 033045 477 10 0 00 000007 E3500: SETOB AC,AC-1 ;INITIALIZE AC AND EXPECTED RESULT TO ALL ONES
4367 033046 241 10 0 00 777777 ROT AC,-1 ;*ROTATE RIGHT ONE
4368 033047 312 10 0 00 000007 CAME AC,AC-1 ;TEST AC FOR ALL ONES.
4369 033050 003 10 0 00 003501 ER3 AC,3501 ;AD-AR GATING FAILED
4370 033051 321 12 0 00 033045 JUMPL AC+2,E3500 ;LOOP ON ERROR SWITCH
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DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR SEQ 0106
4371 003600 SN=3600
4372 000000 ZZ=0
4373
4374 E3600: REPEAT ^D18,< ;TEST AC LEFT HALF
4375 ;TEST ROT RIGHT ONE BIT POSITION
4376 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
4377 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
4378 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER
4379 ;BIT IS ONE AFTER ROTATING
4380 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
4381
4382 SN=SN+1
4383 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
4384 IFE ZZ,<ZZ=400000>
4385 YY=ZZ/2 ;SELECTED BIT AFTER ROTATION
4386 MOVSI AC,ZZ ;SET BIT (N) OF AC LEFT
4387 IFN <ZZ-1>,<
4388 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
4389 IFE <ZZ-1>,<
4390 MOVEI AC-1,400000 ;SETUP FOR COMPARISON>
4391 ROT AC,-1 ;*ROTATE RIGHT ONE
4392 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ONE
4393 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
4394 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
4395 >
4396 ;TEST AC LEFT HALF
4397 ;TEST ROT RIGHT ONE BIT POSITION
4398 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
4399 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
4400 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER
4401 ;BIT IS ONE AFTER ROTATING
4402 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
4403
4404 003601 SN=SN+1
4405 000000 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
4406 400000 IFE ZZ,<ZZ=400000>
4407 200000 YY=ZZ/2 ;SELECTED BIT AFTER ROTATION
4408 033052 205 10 0 00 400000 MOVSI AC,ZZ ;SET BIT (N) OF AC LEFT
4409 IFN <ZZ-1>,<
4410 033053 205 07 0 00 200000 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
4411 IFE <ZZ-1>,<
4412 MOVEI AC-1,400000 ;SETUP FOR COMPARISON>
4413 033054 241 10 0 00 777777 ROT AC,-1 ;*ROTATE RIGHT ONE
4414 033055 312 10 0 00 000007 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ONE
4415 033056 003 10 0 00 003601 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
4416 033057 321 12 0 00 033052 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
4417
4418 ;TEST AC LEFT HALF
4419 ;TEST ROT RIGHT ONE BIT POSITION
4420 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
4421 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
4422 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER
4423 ;BIT IS ONE AFTER ROTATING
4424 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
4425
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 14-1
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR SEQ 0107
4426 003602 SN=SN+1
4427 200000 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
4428 IFE ZZ,<ZZ=400000>
4429 100000 YY=ZZ/2 ;SELECTED BIT AFTER ROTATION
4430 033060 205 10 0 00 200000 MOVSI AC,ZZ ;SET BIT (N) OF AC LEFT
4431 IFN <ZZ-1>,<
4432 033061 205 07 0 00 100000 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
4433 IFE <ZZ-1>,<
4434 MOVEI AC-1,400000 ;SETUP FOR COMPARISON>
4435 033062 241 10 0 00 777777 ROT AC,-1 ;*ROTATE RIGHT ONE
4436 033063 312 10 0 00 000007 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ONE
4437 033064 003 10 0 00 003602 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
4438 033065 321 12 0 00 033060 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
4439
4440 ;TEST AC LEFT HALF
4441 ;TEST ROT RIGHT ONE BIT POSITION
4442 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
4443 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
4444 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER
4445 ;BIT IS ONE AFTER ROTATING
4446 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
4447
4448 003603 SN=SN+1
4449 100000 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
4450 IFE ZZ,<ZZ=400000>
4451 040000 YY=ZZ/2 ;SELECTED BIT AFTER ROTATION
4452 033066 205 10 0 00 100000 MOVSI AC,ZZ ;SET BIT (N) OF AC LEFT
4453 IFN <ZZ-1>,<
4454 033067 205 07 0 00 040000 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
4455 IFE <ZZ-1>,<
4456 MOVEI AC-1,400000 ;SETUP FOR COMPARISON>
4457 033070 241 10 0 00 777777 ROT AC,-1 ;*ROTATE RIGHT ONE
4458 033071 312 10 0 00 000007 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ONE
4459 033072 003 10 0 00 003603 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
4460 033073 321 12 0 00 033066 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
4461
4462 ;TEST AC LEFT HALF
4463 ;TEST ROT RIGHT ONE BIT POSITION
4464 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
4465 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
4466 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER
4467 ;BIT IS ONE AFTER ROTATING
4468 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
4469
4470 003604 SN=SN+1
4471 040000 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
4472 IFE ZZ,<ZZ=400000>
4473 020000 YY=ZZ/2 ;SELECTED BIT AFTER ROTATION
4474 033074 205 10 0 00 040000 MOVSI AC,ZZ ;SET BIT (N) OF AC LEFT
4475 IFN <ZZ-1>,<
4476 033075 205 07 0 00 020000 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
4477 IFE <ZZ-1>,<
4478 MOVEI AC-1,400000 ;SETUP FOR COMPARISON>
4479 033076 241 10 0 00 777777 ROT AC,-1 ;*ROTATE RIGHT ONE
4480 033077 312 10 0 00 000007 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ONE
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DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR SEQ 0108
4481 033100 003 10 0 00 003604 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
4482 033101 321 12 0 00 033074 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
4483
4484 ;TEST AC LEFT HALF
4485 ;TEST ROT RIGHT ONE BIT POSITION
4486 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
4487 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
4488 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER
4489 ;BIT IS ONE AFTER ROTATING
4490 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
4491
4492 003605 SN=SN+1
4493 020000 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
4494 IFE ZZ,<ZZ=400000>
4495 010000 YY=ZZ/2 ;SELECTED BIT AFTER ROTATION
4496 033102 205 10 0 00 020000 MOVSI AC,ZZ ;SET BIT (N) OF AC LEFT
4497 IFN <ZZ-1>,<
4498 033103 205 07 0 00 010000 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
4499 IFE <ZZ-1>,<
4500 MOVEI AC-1,400000 ;SETUP FOR COMPARISON>
4501 033104 241 10 0 00 777777 ROT AC,-1 ;*ROTATE RIGHT ONE
4502 033105 312 10 0 00 000007 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ONE
4503 033106 003 10 0 00 003605 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
4504 033107 321 12 0 00 033102 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
4505
4506 ;TEST AC LEFT HALF
4507 ;TEST ROT RIGHT ONE BIT POSITION
4508 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
4509 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
4510 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER
4511 ;BIT IS ONE AFTER ROTATING
4512 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
4513
4514 003606 SN=SN+1
4515 010000 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
4516 IFE ZZ,<ZZ=400000>
4517 004000 YY=ZZ/2 ;SELECTED BIT AFTER ROTATION
4518 033110 205 10 0 00 010000 MOVSI AC,ZZ ;SET BIT (N) OF AC LEFT
4519 IFN <ZZ-1>,<
4520 033111 205 07 0 00 004000 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
4521 IFE <ZZ-1>,<
4522 MOVEI AC-1,400000 ;SETUP FOR COMPARISON>
4523 033112 241 10 0 00 777777 ROT AC,-1 ;*ROTATE RIGHT ONE
4524 033113 312 10 0 00 000007 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ONE
4525 033114 003 10 0 00 003606 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
4526 033115 321 12 0 00 033110 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
4527
4528 ;TEST AC LEFT HALF
4529 ;TEST ROT RIGHT ONE BIT POSITION
4530 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
4531 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
4532 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER
4533 ;BIT IS ONE AFTER ROTATING
4534 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
4535
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 14-3
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR SEQ 0109
4536 003607 SN=SN+1
4537 004000 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
4538 IFE ZZ,<ZZ=400000>
4539 002000 YY=ZZ/2 ;SELECTED BIT AFTER ROTATION
4540 033116 205 10 0 00 004000 MOVSI AC,ZZ ;SET BIT (N) OF AC LEFT
4541 IFN <ZZ-1>,<
4542 033117 205 07 0 00 002000 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
4543 IFE <ZZ-1>,<
4544 MOVEI AC-1,400000 ;SETUP FOR COMPARISON>
4545 033120 241 10 0 00 777777 ROT AC,-1 ;*ROTATE RIGHT ONE
4546 033121 312 10 0 00 000007 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ONE
4547 033122 003 10 0 00 003607 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
4548 033123 321 12 0 00 033116 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
4549
4550 ;TEST AC LEFT HALF
4551 ;TEST ROT RIGHT ONE BIT POSITION
4552 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
4553 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
4554 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER
4555 ;BIT IS ONE AFTER ROTATING
4556 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
4557
4558 003610 SN=SN+1
4559 002000 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
4560 IFE ZZ,<ZZ=400000>
4561 001000 YY=ZZ/2 ;SELECTED BIT AFTER ROTATION
4562 033124 205 10 0 00 002000 MOVSI AC,ZZ ;SET BIT (N) OF AC LEFT
4563 IFN <ZZ-1>,<
4564 033125 205 07 0 00 001000 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
4565 IFE <ZZ-1>,<
4566 MOVEI AC-1,400000 ;SETUP FOR COMPARISON>
4567 033126 241 10 0 00 777777 ROT AC,-1 ;*ROTATE RIGHT ONE
4568 033127 312 10 0 00 000007 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ONE
4569 033130 003 10 0 00 003610 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
4570 033131 321 12 0 00 033124 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
4571
4572 ;TEST AC LEFT HALF
4573 ;TEST ROT RIGHT ONE BIT POSITION
4574 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
4575 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
4576 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER
4577 ;BIT IS ONE AFTER ROTATING
4578 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
4579
4580 003611 SN=SN+1
4581 001000 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
4582 IFE ZZ,<ZZ=400000>
4583 000400 YY=ZZ/2 ;SELECTED BIT AFTER ROTATION
4584 033132 205 10 0 00 001000 MOVSI AC,ZZ ;SET BIT (N) OF AC LEFT
4585 IFN <ZZ-1>,<
4586 033133 205 07 0 00 000400 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
4587 IFE <ZZ-1>,<
4588 MOVEI AC-1,400000 ;SETUP FOR COMPARISON>
4589 033134 241 10 0 00 777777 ROT AC,-1 ;*ROTATE RIGHT ONE
4590 033135 312 10 0 00 000007 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ONE
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 14-4
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR SEQ 0110
4591 033136 003 10 0 00 003611 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
4592 033137 321 12 0 00 033132 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
4593
4594 ;TEST AC LEFT HALF
4595 ;TEST ROT RIGHT ONE BIT POSITION
4596 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
4597 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
4598 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER
4599 ;BIT IS ONE AFTER ROTATING
4600 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
4601
4602 003612 SN=SN+1
4603 000400 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
4604 IFE ZZ,<ZZ=400000>
4605 000200 YY=ZZ/2 ;SELECTED BIT AFTER ROTATION
4606 033140 205 10 0 00 000400 MOVSI AC,ZZ ;SET BIT (N) OF AC LEFT
4607 IFN <ZZ-1>,<
4608 033141 205 07 0 00 000200 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
4609 IFE <ZZ-1>,<
4610 MOVEI AC-1,400000 ;SETUP FOR COMPARISON>
4611 033142 241 10 0 00 777777 ROT AC,-1 ;*ROTATE RIGHT ONE
4612 033143 312 10 0 00 000007 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ONE
4613 033144 003 10 0 00 003612 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
4614 033145 321 12 0 00 033140 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
4615
4616 ;TEST AC LEFT HALF
4617 ;TEST ROT RIGHT ONE BIT POSITION
4618 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
4619 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
4620 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER
4621 ;BIT IS ONE AFTER ROTATING
4622 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
4623
4624 003613 SN=SN+1
4625 000200 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
4626 IFE ZZ,<ZZ=400000>
4627 000100 YY=ZZ/2 ;SELECTED BIT AFTER ROTATION
4628 033146 205 10 0 00 000200 MOVSI AC,ZZ ;SET BIT (N) OF AC LEFT
4629 IFN <ZZ-1>,<
4630 033147 205 07 0 00 000100 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
4631 IFE <ZZ-1>,<
4632 MOVEI AC-1,400000 ;SETUP FOR COMPARISON>
4633 033150 241 10 0 00 777777 ROT AC,-1 ;*ROTATE RIGHT ONE
4634 033151 312 10 0 00 000007 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ONE
4635 033152 003 10 0 00 003613 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
4636 033153 321 12 0 00 033146 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
4637
4638 ;TEST AC LEFT HALF
4639 ;TEST ROT RIGHT ONE BIT POSITION
4640 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
4641 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
4642 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER
4643 ;BIT IS ONE AFTER ROTATING
4644 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
4645
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 14-5
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR SEQ 0111
4646 003614 SN=SN+1
4647 000100 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
4648 IFE ZZ,<ZZ=400000>
4649 000040 YY=ZZ/2 ;SELECTED BIT AFTER ROTATION
4650 033154 205 10 0 00 000100 MOVSI AC,ZZ ;SET BIT (N) OF AC LEFT
4651 IFN <ZZ-1>,<
4652 033155 205 07 0 00 000040 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
4653 IFE <ZZ-1>,<
4654 MOVEI AC-1,400000 ;SETUP FOR COMPARISON>
4655 033156 241 10 0 00 777777 ROT AC,-1 ;*ROTATE RIGHT ONE
4656 033157 312 10 0 00 000007 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ONE
4657 033160 003 10 0 00 003614 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
4658 033161 321 12 0 00 033154 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
4659
4660 ;TEST AC LEFT HALF
4661 ;TEST ROT RIGHT ONE BIT POSITION
4662 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
4663 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
4664 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER
4665 ;BIT IS ONE AFTER ROTATING
4666 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
4667
4668 003615 SN=SN+1
4669 000040 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
4670 IFE ZZ,<ZZ=400000>
4671 000020 YY=ZZ/2 ;SELECTED BIT AFTER ROTATION
4672 033162 205 10 0 00 000040 MOVSI AC,ZZ ;SET BIT (N) OF AC LEFT
4673 IFN <ZZ-1>,<
4674 033163 205 07 0 00 000020 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
4675 IFE <ZZ-1>,<
4676 MOVEI AC-1,400000 ;SETUP FOR COMPARISON>
4677 033164 241 10 0 00 777777 ROT AC,-1 ;*ROTATE RIGHT ONE
4678 033165 312 10 0 00 000007 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ONE
4679 033166 003 10 0 00 003615 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
4680 033167 321 12 0 00 033162 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
4681
4682 ;TEST AC LEFT HALF
4683 ;TEST ROT RIGHT ONE BIT POSITION
4684 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
4685 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
4686 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER
4687 ;BIT IS ONE AFTER ROTATING
4688 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
4689
4690 003616 SN=SN+1
4691 000020 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
4692 IFE ZZ,<ZZ=400000>
4693 000010 YY=ZZ/2 ;SELECTED BIT AFTER ROTATION
4694 033170 205 10 0 00 000020 MOVSI AC,ZZ ;SET BIT (N) OF AC LEFT
4695 IFN <ZZ-1>,<
4696 033171 205 07 0 00 000010 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
4697 IFE <ZZ-1>,<
4698 MOVEI AC-1,400000 ;SETUP FOR COMPARISON>
4699 033172 241 10 0 00 777777 ROT AC,-1 ;*ROTATE RIGHT ONE
4700 033173 312 10 0 00 000007 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ONE
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DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR SEQ 0112
4701 033174 003 10 0 00 003616 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
4702 033175 321 12 0 00 033170 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
4703
4704 ;TEST AC LEFT HALF
4705 ;TEST ROT RIGHT ONE BIT POSITION
4706 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
4707 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
4708 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER
4709 ;BIT IS ONE AFTER ROTATING
4710 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
4711
4712 003617 SN=SN+1
4713 000010 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
4714 IFE ZZ,<ZZ=400000>
4715 000004 YY=ZZ/2 ;SELECTED BIT AFTER ROTATION
4716 033176 205 10 0 00 000010 MOVSI AC,ZZ ;SET BIT (N) OF AC LEFT
4717 IFN <ZZ-1>,<
4718 033177 205 07 0 00 000004 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
4719 IFE <ZZ-1>,<
4720 MOVEI AC-1,400000 ;SETUP FOR COMPARISON>
4721 033200 241 10 0 00 777777 ROT AC,-1 ;*ROTATE RIGHT ONE
4722 033201 312 10 0 00 000007 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ONE
4723 033202 003 10 0 00 003617 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
4724 033203 321 12 0 00 033176 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
4725
4726 ;TEST AC LEFT HALF
4727 ;TEST ROT RIGHT ONE BIT POSITION
4728 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
4729 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
4730 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER
4731 ;BIT IS ONE AFTER ROTATING
4732 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
4733
4734 003620 SN=SN+1
4735 000004 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
4736 IFE ZZ,<ZZ=400000>
4737 000002 YY=ZZ/2 ;SELECTED BIT AFTER ROTATION
4738 033204 205 10 0 00 000004 MOVSI AC,ZZ ;SET BIT (N) OF AC LEFT
4739 IFN <ZZ-1>,<
4740 033205 205 07 0 00 000002 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
4741 IFE <ZZ-1>,<
4742 MOVEI AC-1,400000 ;SETUP FOR COMPARISON>
4743 033206 241 10 0 00 777777 ROT AC,-1 ;*ROTATE RIGHT ONE
4744 033207 312 10 0 00 000007 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ONE
4745 033210 003 10 0 00 003620 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
4746 033211 321 12 0 00 033204 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
4747
4748 ;TEST AC LEFT HALF
4749 ;TEST ROT RIGHT ONE BIT POSITION
4750 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
4751 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
4752 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER
4753 ;BIT IS ONE AFTER ROTATING
4754 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
4755
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 14-7
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR SEQ 0113
4756 003621 SN=SN+1
4757 000002 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
4758 IFE ZZ,<ZZ=400000>
4759 000001 YY=ZZ/2 ;SELECTED BIT AFTER ROTATION
4760 033212 205 10 0 00 000002 MOVSI AC,ZZ ;SET BIT (N) OF AC LEFT
4761 IFN <ZZ-1>,<
4762 033213 205 07 0 00 000001 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
4763 IFE <ZZ-1>,<
4764 MOVEI AC-1,400000 ;SETUP FOR COMPARISON>
4765 033214 241 10 0 00 777777 ROT AC,-1 ;*ROTATE RIGHT ONE
4766 033215 312 10 0 00 000007 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ONE
4767 033216 003 10 0 00 003621 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
4768 033217 321 12 0 00 033212 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
4769
4770 ;TEST AC LEFT HALF
4771 ;TEST ROT RIGHT ONE BIT POSITION
4772 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
4773 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
4774 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER
4775 ;BIT IS ONE AFTER ROTATING
4776 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
4777
4778 003622 SN=SN+1
4779 000001 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
4780 IFE ZZ,<ZZ=400000>
4781 000000 YY=ZZ/2 ;SELECTED BIT AFTER ROTATION
4782 033220 205 10 0 00 000001 MOVSI AC,ZZ ;SET BIT (N) OF AC LEFT
4783 IFN <ZZ-1>,<
4784 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
4785 IFE <ZZ-1>,<
4786 033221 201 07 0 00 400000 MOVEI AC-1,400000 ;SETUP FOR COMPARISON>
4787 033222 241 10 0 00 777777 ROT AC,-1 ;*ROTATE RIGHT ONE
4788 033223 312 10 0 00 000007 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ONE
4789 033224 003 10 0 00 003622 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
4790 033225 321 12 0 00 033220 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
4791
4792 PAGE
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DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR SEQ 0114
4793 000000 ZZ=0
4794
4795 REPEAT ^D18,< ;TEST AC RIGHT HALF
4796 ;TEST ROT RIGHT ONE BIT POSITION
4797 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
4798 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
4799 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
4800 ;ONE AFTER ROTATING
4801 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
4802
4803 SN=SN+1
4804 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
4805 IFE ZZ,<ZZ=400000>
4806 YY=ZZ/2 ;SELECTED BIT AFTER ROTATION
4807 MOVEI AC,ZZ ;SET BIT (N) OF AC RIGHT
4808 IFN <ZZ-1>,<
4809 MOVEI AC-1,YY ;SETUP FOR COMPARISON>
4810 IFE <ZZ-1>,<
4811 MOVSI AC-1,400000 ;SETUP FOR COMPARISON>
4812 ROT AC,-1 ;*ROTATE RIGHT ONE
4813 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ONE
4814 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
4815 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
4816 >
4817 ;TEST AC RIGHT HALF
4818 ;TEST ROT RIGHT ONE BIT POSITION
4819 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
4820 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
4821 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
4822 ;ONE AFTER ROTATING
4823 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
4824
4825 003623 SN=SN+1
4826 000000 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
4827 400000 IFE ZZ,<ZZ=400000>
4828 200000 YY=ZZ/2 ;SELECTED BIT AFTER ROTATION
4829 033226 201 10 0 00 400000 MOVEI AC,ZZ ;SET BIT (N) OF AC RIGHT
4830 IFN <ZZ-1>,<
4831 033227 201 07 0 00 200000 MOVEI AC-1,YY ;SETUP FOR COMPARISON>
4832 IFE <ZZ-1>,<
4833 MOVSI AC-1,400000 ;SETUP FOR COMPARISON>
4834 033230 241 10 0 00 777777 ROT AC,-1 ;*ROTATE RIGHT ONE
4835 033231 312 10 0 00 000007 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ONE
4836 033232 003 10 0 00 003623 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
4837 033233 321 12 0 00 033226 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
4838
4839 ;TEST AC RIGHT HALF
4840 ;TEST ROT RIGHT ONE BIT POSITION
4841 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
4842 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
4843 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
4844 ;ONE AFTER ROTATING
4845 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
4846
4847 003624 SN=SN+1
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 14-9
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR SEQ 0115
4848 200000 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
4849 IFE ZZ,<ZZ=400000>
4850 100000 YY=ZZ/2 ;SELECTED BIT AFTER ROTATION
4851 033234 201 10 0 00 200000 MOVEI AC,ZZ ;SET BIT (N) OF AC RIGHT
4852 IFN <ZZ-1>,<
4853 033235 201 07 0 00 100000 MOVEI AC-1,YY ;SETUP FOR COMPARISON>
4854 IFE <ZZ-1>,<
4855 MOVSI AC-1,400000 ;SETUP FOR COMPARISON>
4856 033236 241 10 0 00 777777 ROT AC,-1 ;*ROTATE RIGHT ONE
4857 033237 312 10 0 00 000007 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ONE
4858 033240 003 10 0 00 003624 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
4859 033241 321 12 0 00 033234 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
4860
4861 ;TEST AC RIGHT HALF
4862 ;TEST ROT RIGHT ONE BIT POSITION
4863 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
4864 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
4865 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
4866 ;ONE AFTER ROTATING
4867 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
4868
4869 003625 SN=SN+1
4870 100000 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
4871 IFE ZZ,<ZZ=400000>
4872 040000 YY=ZZ/2 ;SELECTED BIT AFTER ROTATION
4873 033242 201 10 0 00 100000 MOVEI AC,ZZ ;SET BIT (N) OF AC RIGHT
4874 IFN <ZZ-1>,<
4875 033243 201 07 0 00 040000 MOVEI AC-1,YY ;SETUP FOR COMPARISON>
4876 IFE <ZZ-1>,<
4877 MOVSI AC-1,400000 ;SETUP FOR COMPARISON>
4878 033244 241 10 0 00 777777 ROT AC,-1 ;*ROTATE RIGHT ONE
4879 033245 312 10 0 00 000007 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ONE
4880 033246 003 10 0 00 003625 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
4881 033247 321 12 0 00 033242 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
4882
4883 ;TEST AC RIGHT HALF
4884 ;TEST ROT RIGHT ONE BIT POSITION
4885 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
4886 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
4887 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
4888 ;ONE AFTER ROTATING
4889 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
4890
4891 003626 SN=SN+1
4892 040000 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
4893 IFE ZZ,<ZZ=400000>
4894 020000 YY=ZZ/2 ;SELECTED BIT AFTER ROTATION
4895 033250 201 10 0 00 040000 MOVEI AC,ZZ ;SET BIT (N) OF AC RIGHT
4896 IFN <ZZ-1>,<
4897 033251 201 07 0 00 020000 MOVEI AC-1,YY ;SETUP FOR COMPARISON>
4898 IFE <ZZ-1>,<
4899 MOVSI AC-1,400000 ;SETUP FOR COMPARISON>
4900 033252 241 10 0 00 777777 ROT AC,-1 ;*ROTATE RIGHT ONE
4901 033253 312 10 0 00 000007 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ONE
4902 033254 003 10 0 00 003626 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
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4903 033255 321 12 0 00 033250 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
4904
4905 ;TEST AC RIGHT HALF
4906 ;TEST ROT RIGHT ONE BIT POSITION
4907 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
4908 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
4909 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
4910 ;ONE AFTER ROTATING
4911 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
4912
4913 003627 SN=SN+1
4914 020000 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
4915 IFE ZZ,<ZZ=400000>
4916 010000 YY=ZZ/2 ;SELECTED BIT AFTER ROTATION
4917 033256 201 10 0 00 020000 MOVEI AC,ZZ ;SET BIT (N) OF AC RIGHT
4918 IFN <ZZ-1>,<
4919 033257 201 07 0 00 010000 MOVEI AC-1,YY ;SETUP FOR COMPARISON>
4920 IFE <ZZ-1>,<
4921 MOVSI AC-1,400000 ;SETUP FOR COMPARISON>
4922 033260 241 10 0 00 777777 ROT AC,-1 ;*ROTATE RIGHT ONE
4923 033261 312 10 0 00 000007 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ONE
4924 033262 003 10 0 00 003627 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
4925 033263 321 12 0 00 033256 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
4926
4927 ;TEST AC RIGHT HALF
4928 ;TEST ROT RIGHT ONE BIT POSITION
4929 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
4930 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
4931 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
4932 ;ONE AFTER ROTATING
4933 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
4934
4935 003630 SN=SN+1
4936 010000 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
4937 IFE ZZ,<ZZ=400000>
4938 004000 YY=ZZ/2 ;SELECTED BIT AFTER ROTATION
4939 033264 201 10 0 00 010000 MOVEI AC,ZZ ;SET BIT (N) OF AC RIGHT
4940 IFN <ZZ-1>,<
4941 033265 201 07 0 00 004000 MOVEI AC-1,YY ;SETUP FOR COMPARISON>
4942 IFE <ZZ-1>,<
4943 MOVSI AC-1,400000 ;SETUP FOR COMPARISON>
4944 033266 241 10 0 00 777777 ROT AC,-1 ;*ROTATE RIGHT ONE
4945 033267 312 10 0 00 000007 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ONE
4946 033270 003 10 0 00 003630 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
4947 033271 321 12 0 00 033264 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
4948
4949 ;TEST AC RIGHT HALF
4950 ;TEST ROT RIGHT ONE BIT POSITION
4951 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
4952 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
4953 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
4954 ;ONE AFTER ROTATING
4955 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
4956
4957 003631 SN=SN+1
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4958 004000 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
4959 IFE ZZ,<ZZ=400000>
4960 002000 YY=ZZ/2 ;SELECTED BIT AFTER ROTATION
4961 033272 201 10 0 00 004000 MOVEI AC,ZZ ;SET BIT (N) OF AC RIGHT
4962 IFN <ZZ-1>,<
4963 033273 201 07 0 00 002000 MOVEI AC-1,YY ;SETUP FOR COMPARISON>
4964 IFE <ZZ-1>,<
4965 MOVSI AC-1,400000 ;SETUP FOR COMPARISON>
4966 033274 241 10 0 00 777777 ROT AC,-1 ;*ROTATE RIGHT ONE
4967 033275 312 10 0 00 000007 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ONE
4968 033276 003 10 0 00 003631 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
4969 033277 321 12 0 00 033272 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
4970
4971 ;TEST AC RIGHT HALF
4972 ;TEST ROT RIGHT ONE BIT POSITION
4973 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
4974 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
4975 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
4976 ;ONE AFTER ROTATING
4977 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
4978
4979 003632 SN=SN+1
4980 002000 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
4981 IFE ZZ,<ZZ=400000>
4982 001000 YY=ZZ/2 ;SELECTED BIT AFTER ROTATION
4983 033300 201 10 0 00 002000 MOVEI AC,ZZ ;SET BIT (N) OF AC RIGHT
4984 IFN <ZZ-1>,<
4985 033301 201 07 0 00 001000 MOVEI AC-1,YY ;SETUP FOR COMPARISON>
4986 IFE <ZZ-1>,<
4987 MOVSI AC-1,400000 ;SETUP FOR COMPARISON>
4988 033302 241 10 0 00 777777 ROT AC,-1 ;*ROTATE RIGHT ONE
4989 033303 312 10 0 00 000007 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ONE
4990 033304 003 10 0 00 003632 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
4991 033305 321 12 0 00 033300 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
4992
4993 ;TEST AC RIGHT HALF
4994 ;TEST ROT RIGHT ONE BIT POSITION
4995 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
4996 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
4997 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
4998 ;ONE AFTER ROTATING
4999 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
5000
5001 003633 SN=SN+1
5002 001000 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
5003 IFE ZZ,<ZZ=400000>
5004 000400 YY=ZZ/2 ;SELECTED BIT AFTER ROTATION
5005 033306 201 10 0 00 001000 MOVEI AC,ZZ ;SET BIT (N) OF AC RIGHT
5006 IFN <ZZ-1>,<
5007 033307 201 07 0 00 000400 MOVEI AC-1,YY ;SETUP FOR COMPARISON>
5008 IFE <ZZ-1>,<
5009 MOVSI AC-1,400000 ;SETUP FOR COMPARISON>
5010 033310 241 10 0 00 777777 ROT AC,-1 ;*ROTATE RIGHT ONE
5011 033311 312 10 0 00 000007 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ONE
5012 033312 003 10 0 00 003633 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
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5013 033313 321 12 0 00 033306 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
5014
5015 ;TEST AC RIGHT HALF
5016 ;TEST ROT RIGHT ONE BIT POSITION
5017 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
5018 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
5019 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
5020 ;ONE AFTER ROTATING
5021 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
5022
5023 003634 SN=SN+1
5024 000400 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
5025 IFE ZZ,<ZZ=400000>
5026 000200 YY=ZZ/2 ;SELECTED BIT AFTER ROTATION
5027 033314 201 10 0 00 000400 MOVEI AC,ZZ ;SET BIT (N) OF AC RIGHT
5028 IFN <ZZ-1>,<
5029 033315 201 07 0 00 000200 MOVEI AC-1,YY ;SETUP FOR COMPARISON>
5030 IFE <ZZ-1>,<
5031 MOVSI AC-1,400000 ;SETUP FOR COMPARISON>
5032 033316 241 10 0 00 777777 ROT AC,-1 ;*ROTATE RIGHT ONE
5033 033317 312 10 0 00 000007 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ONE
5034 033320 003 10 0 00 003634 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
5035 033321 321 12 0 00 033314 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
5036
5037 ;TEST AC RIGHT HALF
5038 ;TEST ROT RIGHT ONE BIT POSITION
5039 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
5040 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
5041 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
5042 ;ONE AFTER ROTATING
5043 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
5044
5045 003635 SN=SN+1
5046 000200 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
5047 IFE ZZ,<ZZ=400000>
5048 000100 YY=ZZ/2 ;SELECTED BIT AFTER ROTATION
5049 033322 201 10 0 00 000200 MOVEI AC,ZZ ;SET BIT (N) OF AC RIGHT
5050 IFN <ZZ-1>,<
5051 033323 201 07 0 00 000100 MOVEI AC-1,YY ;SETUP FOR COMPARISON>
5052 IFE <ZZ-1>,<
5053 MOVSI AC-1,400000 ;SETUP FOR COMPARISON>
5054 033324 241 10 0 00 777777 ROT AC,-1 ;*ROTATE RIGHT ONE
5055 033325 312 10 0 00 000007 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ONE
5056 033326 003 10 0 00 003635 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
5057 033327 321 12 0 00 033322 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
5058
5059 ;TEST AC RIGHT HALF
5060 ;TEST ROT RIGHT ONE BIT POSITION
5061 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
5062 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
5063 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
5064 ;ONE AFTER ROTATING
5065 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
5066
5067 003636 SN=SN+1
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5068 000100 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
5069 IFE ZZ,<ZZ=400000>
5070 000040 YY=ZZ/2 ;SELECTED BIT AFTER ROTATION
5071 033330 201 10 0 00 000100 MOVEI AC,ZZ ;SET BIT (N) OF AC RIGHT
5072 IFN <ZZ-1>,<
5073 033331 201 07 0 00 000040 MOVEI AC-1,YY ;SETUP FOR COMPARISON>
5074 IFE <ZZ-1>,<
5075 MOVSI AC-1,400000 ;SETUP FOR COMPARISON>
5076 033332 241 10 0 00 777777 ROT AC,-1 ;*ROTATE RIGHT ONE
5077 033333 312 10 0 00 000007 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ONE
5078 033334 003 10 0 00 003636 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
5079 033335 321 12 0 00 033330 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
5080
5081 ;TEST AC RIGHT HALF
5082 ;TEST ROT RIGHT ONE BIT POSITION
5083 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
5084 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
5085 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
5086 ;ONE AFTER ROTATING
5087 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
5088
5089 003637 SN=SN+1
5090 000040 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
5091 IFE ZZ,<ZZ=400000>
5092 000020 YY=ZZ/2 ;SELECTED BIT AFTER ROTATION
5093 033336 201 10 0 00 000040 MOVEI AC,ZZ ;SET BIT (N) OF AC RIGHT
5094 IFN <ZZ-1>,<
5095 033337 201 07 0 00 000020 MOVEI AC-1,YY ;SETUP FOR COMPARISON>
5096 IFE <ZZ-1>,<
5097 MOVSI AC-1,400000 ;SETUP FOR COMPARISON>
5098 033340 241 10 0 00 777777 ROT AC,-1 ;*ROTATE RIGHT ONE
5099 033341 312 10 0 00 000007 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ONE
5100 033342 003 10 0 00 003637 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
5101 033343 321 12 0 00 033336 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
5102
5103 ;TEST AC RIGHT HALF
5104 ;TEST ROT RIGHT ONE BIT POSITION
5105 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
5106 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
5107 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
5108 ;ONE AFTER ROTATING
5109 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
5110
5111 003640 SN=SN+1
5112 000020 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
5113 IFE ZZ,<ZZ=400000>
5114 000010 YY=ZZ/2 ;SELECTED BIT AFTER ROTATION
5115 033344 201 10 0 00 000020 MOVEI AC,ZZ ;SET BIT (N) OF AC RIGHT
5116 IFN <ZZ-1>,<
5117 033345 201 07 0 00 000010 MOVEI AC-1,YY ;SETUP FOR COMPARISON>
5118 IFE <ZZ-1>,<
5119 MOVSI AC-1,400000 ;SETUP FOR COMPARISON>
5120 033346 241 10 0 00 777777 ROT AC,-1 ;*ROTATE RIGHT ONE
5121 033347 312 10 0 00 000007 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ONE
5122 033350 003 10 0 00 003640 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
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5123 033351 321 12 0 00 033344 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
5124
5125 ;TEST AC RIGHT HALF
5126 ;TEST ROT RIGHT ONE BIT POSITION
5127 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
5128 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
5129 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
5130 ;ONE AFTER ROTATING
5131 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
5132
5133 003641 SN=SN+1
5134 000010 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
5135 IFE ZZ,<ZZ=400000>
5136 000004 YY=ZZ/2 ;SELECTED BIT AFTER ROTATION
5137 033352 201 10 0 00 000010 MOVEI AC,ZZ ;SET BIT (N) OF AC RIGHT
5138 IFN <ZZ-1>,<
5139 033353 201 07 0 00 000004 MOVEI AC-1,YY ;SETUP FOR COMPARISON>
5140 IFE <ZZ-1>,<
5141 MOVSI AC-1,400000 ;SETUP FOR COMPARISON>
5142 033354 241 10 0 00 777777 ROT AC,-1 ;*ROTATE RIGHT ONE
5143 033355 312 10 0 00 000007 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ONE
5144 033356 003 10 0 00 003641 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
5145 033357 321 12 0 00 033352 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
5146
5147 ;TEST AC RIGHT HALF
5148 ;TEST ROT RIGHT ONE BIT POSITION
5149 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
5150 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
5151 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
5152 ;ONE AFTER ROTATING
5153 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
5154
5155 003642 SN=SN+1
5156 000004 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
5157 IFE ZZ,<ZZ=400000>
5158 000002 YY=ZZ/2 ;SELECTED BIT AFTER ROTATION
5159 033360 201 10 0 00 000004 MOVEI AC,ZZ ;SET BIT (N) OF AC RIGHT
5160 IFN <ZZ-1>,<
5161 033361 201 07 0 00 000002 MOVEI AC-1,YY ;SETUP FOR COMPARISON>
5162 IFE <ZZ-1>,<
5163 MOVSI AC-1,400000 ;SETUP FOR COMPARISON>
5164 033362 241 10 0 00 777777 ROT AC,-1 ;*ROTATE RIGHT ONE
5165 033363 312 10 0 00 000007 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ONE
5166 033364 003 10 0 00 003642 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
5167 033365 321 12 0 00 033360 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
5168
5169 ;TEST AC RIGHT HALF
5170 ;TEST ROT RIGHT ONE BIT POSITION
5171 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
5172 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
5173 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
5174 ;ONE AFTER ROTATING
5175 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
5176
5177 003643 SN=SN+1
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5178 000002 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
5179 IFE ZZ,<ZZ=400000>
5180 000001 YY=ZZ/2 ;SELECTED BIT AFTER ROTATION
5181 033366 201 10 0 00 000002 MOVEI AC,ZZ ;SET BIT (N) OF AC RIGHT
5182 IFN <ZZ-1>,<
5183 033367 201 07 0 00 000001 MOVEI AC-1,YY ;SETUP FOR COMPARISON>
5184 IFE <ZZ-1>,<
5185 MOVSI AC-1,400000 ;SETUP FOR COMPARISON>
5186 033370 241 10 0 00 777777 ROT AC,-1 ;*ROTATE RIGHT ONE
5187 033371 312 10 0 00 000007 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ONE
5188 033372 003 10 0 00 003643 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
5189 033373 321 12 0 00 033366 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
5190
5191 ;TEST AC RIGHT HALF
5192 ;TEST ROT RIGHT ONE BIT POSITION
5193 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
5194 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
5195 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
5196 ;ONE AFTER ROTATING
5197 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
5198
5199 003644 SN=SN+1
5200 000001 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
5201 IFE ZZ,<ZZ=400000>
5202 000000 YY=ZZ/2 ;SELECTED BIT AFTER ROTATION
5203 033374 201 10 0 00 000001 MOVEI AC,ZZ ;SET BIT (N) OF AC RIGHT
5204 IFN <ZZ-1>,<
5205 MOVEI AC-1,YY ;SETUP FOR COMPARISON>
5206 IFE <ZZ-1>,<
5207 033375 205 07 0 00 400000 MOVSI AC-1,400000 ;SETUP FOR COMPARISON>
5208 033376 241 10 0 00 777777 ROT AC,-1 ;*ROTATE RIGHT ONE
5209 033377 312 10 0 00 000007 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ONE
5210 033400 003 10 0 00 003644 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
5211 033401 321 12 0 00 033374 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
5212
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5213 003700 SN=3700
5214 000001 ZZ=1
5215
5216 E3700: REPEAT ^D18,< ;TEST AC LEFT HALF
5217 ;TEST ROT RIGHT ONE BIT POSITION
5218 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
5219 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
5220 ;IS ZERO AFTER ROTATING.
5221 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
5222
5223 SN=SN+1
5224 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
5225 IFE <ZZ>,<ZZ=777777377777>
5226 YY=<<ZZ-1>/2>&777777 ;SELECTED BIT AFTER ROTATION
5227 HRLOI AC,ZZ&777777 ;CLEAR BIT (N) OF AC LEFT
5228 IFN <ZZ&777777-777776>,<
5229 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
5230 IFE <ZZ&777777-777776>,<
5231 HRROI AC-1,377777 ;SETUP FOR COMPARISON>
5232 ROT AC,-1 ;*ROTATE RIGHT ONE
5233 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ZERO
5234 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
5235 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
5236 >
5237 ;TEST AC LEFT HALF
5238 ;TEST ROT RIGHT ONE BIT POSITION
5239 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
5240 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
5241 ;IS ZERO AFTER ROTATING.
5242 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
5243
5244 003701 SN=SN+1
5245 000000 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
5246 777777 377777 IFE <ZZ>,<ZZ=777777377777>
5247 577777 YY=<<ZZ-1>/2>&777777 ;SELECTED BIT AFTER ROTATION
5248 033402 525 10 0 00 377777 HRLOI AC,ZZ&777777 ;CLEAR BIT (N) OF AC LEFT
5249 IFN <ZZ&777777-777776>,<
5250 033403 525 07 0 00 577777 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
5251 IFE <ZZ&777777-777776>,<
5252 HRROI AC-1,377777 ;SETUP FOR COMPARISON>
5253 033404 241 10 0 00 777777 ROT AC,-1 ;*ROTATE RIGHT ONE
5254 033405 312 10 0 00 000007 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ZERO
5255 033406 003 10 0 00 003701 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
5256 033407 321 12 0 00 033402 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
5257
5258 ;TEST AC LEFT HALF
5259 ;TEST ROT RIGHT ONE BIT POSITION
5260 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
5261 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
5262 ;IS ZERO AFTER ROTATING.
5263 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
5264
5265 003702 SN=SN+1
5266 777777 577777 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
5267 IFE <ZZ>,<ZZ=777777377777>
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5268 677777 YY=<<ZZ-1>/2>&777777 ;SELECTED BIT AFTER ROTATION
5269 033410 525 10 0 00 577777 HRLOI AC,ZZ&777777 ;CLEAR BIT (N) OF AC LEFT
5270 IFN <ZZ&777777-777776>,<
5271 033411 525 07 0 00 677777 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
5272 IFE <ZZ&777777-777776>,<
5273 HRROI AC-1,377777 ;SETUP FOR COMPARISON>
5274 033412 241 10 0 00 777777 ROT AC,-1 ;*ROTATE RIGHT ONE
5275 033413 312 10 0 00 000007 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ZERO
5276 033414 003 10 0 00 003702 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
5277 033415 321 12 0 00 033410 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
5278
5279 ;TEST AC LEFT HALF
5280 ;TEST ROT RIGHT ONE BIT POSITION
5281 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
5282 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
5283 ;IS ZERO AFTER ROTATING.
5284 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
5285
5286 003703 SN=SN+1
5287 777777 677777 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
5288 IFE <ZZ>,<ZZ=777777377777>
5289 737777 YY=<<ZZ-1>/2>&777777 ;SELECTED BIT AFTER ROTATION
5290 033416 525 10 0 00 677777 HRLOI AC,ZZ&777777 ;CLEAR BIT (N) OF AC LEFT
5291 IFN <ZZ&777777-777776>,<
5292 033417 525 07 0 00 737777 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
5293 IFE <ZZ&777777-777776>,<
5294 HRROI AC-1,377777 ;SETUP FOR COMPARISON>
5295 033420 241 10 0 00 777777 ROT AC,-1 ;*ROTATE RIGHT ONE
5296 033421 312 10 0 00 000007 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ZERO
5297 033422 003 10 0 00 003703 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
5298 033423 321 12 0 00 033416 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
5299
5300 ;TEST AC LEFT HALF
5301 ;TEST ROT RIGHT ONE BIT POSITION
5302 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
5303 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
5304 ;IS ZERO AFTER ROTATING.
5305 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
5306
5307 003704 SN=SN+1
5308 777777 737777 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
5309 IFE <ZZ>,<ZZ=777777377777>
5310 757777 YY=<<ZZ-1>/2>&777777 ;SELECTED BIT AFTER ROTATION
5311 033424 525 10 0 00 737777 HRLOI AC,ZZ&777777 ;CLEAR BIT (N) OF AC LEFT
5312 IFN <ZZ&777777-777776>,<
5313 033425 525 07 0 00 757777 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
5314 IFE <ZZ&777777-777776>,<
5315 HRROI AC-1,377777 ;SETUP FOR COMPARISON>
5316 033426 241 10 0 00 777777 ROT AC,-1 ;*ROTATE RIGHT ONE
5317 033427 312 10 0 00 000007 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ZERO
5318 033430 003 10 0 00 003704 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
5319 033431 321 12 0 00 033424 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
5320
5321 ;TEST AC LEFT HALF
5322 ;TEST ROT RIGHT ONE BIT POSITION
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 15-2
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR SEQ 0124
5323 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
5324 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
5325 ;IS ZERO AFTER ROTATING.
5326 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
5327
5328 003705 SN=SN+1
5329 777777 757777 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
5330 IFE <ZZ>,<ZZ=777777377777>
5331 767777 YY=<<ZZ-1>/2>&777777 ;SELECTED BIT AFTER ROTATION
5332 033432 525 10 0 00 757777 HRLOI AC,ZZ&777777 ;CLEAR BIT (N) OF AC LEFT
5333 IFN <ZZ&777777-777776>,<
5334 033433 525 07 0 00 767777 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
5335 IFE <ZZ&777777-777776>,<
5336 HRROI AC-1,377777 ;SETUP FOR COMPARISON>
5337 033434 241 10 0 00 777777 ROT AC,-1 ;*ROTATE RIGHT ONE
5338 033435 312 10 0 00 000007 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ZERO
5339 033436 003 10 0 00 003705 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
5340 033437 321 12 0 00 033432 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
5341
5342 ;TEST AC LEFT HALF
5343 ;TEST ROT RIGHT ONE BIT POSITION
5344 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
5345 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
5346 ;IS ZERO AFTER ROTATING.
5347 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
5348
5349 003706 SN=SN+1
5350 777777 767777 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
5351 IFE <ZZ>,<ZZ=777777377777>
5352 773777 YY=<<ZZ-1>/2>&777777 ;SELECTED BIT AFTER ROTATION
5353 033440 525 10 0 00 767777 HRLOI AC,ZZ&777777 ;CLEAR BIT (N) OF AC LEFT
5354 IFN <ZZ&777777-777776>,<
5355 033441 525 07 0 00 773777 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
5356 IFE <ZZ&777777-777776>,<
5357 HRROI AC-1,377777 ;SETUP FOR COMPARISON>
5358 033442 241 10 0 00 777777 ROT AC,-1 ;*ROTATE RIGHT ONE
5359 033443 312 10 0 00 000007 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ZERO
5360 033444 003 10 0 00 003706 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
5361 033445 321 12 0 00 033440 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
5362
5363 ;TEST AC LEFT HALF
5364 ;TEST ROT RIGHT ONE BIT POSITION
5365 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
5366 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
5367 ;IS ZERO AFTER ROTATING.
5368 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
5369
5370 003707 SN=SN+1
5371 777777 773777 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
5372 IFE <ZZ>,<ZZ=777777377777>
5373 775777 YY=<<ZZ-1>/2>&777777 ;SELECTED BIT AFTER ROTATION
5374 033446 525 10 0 00 773777 HRLOI AC,ZZ&777777 ;CLEAR BIT (N) OF AC LEFT
5375 IFN <ZZ&777777-777776>,<
5376 033447 525 07 0 00 775777 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
5377 IFE <ZZ&777777-777776>,<
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 15-3
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR SEQ 0125
5378 HRROI AC-1,377777 ;SETUP FOR COMPARISON>
5379 033450 241 10 0 00 777777 ROT AC,-1 ;*ROTATE RIGHT ONE
5380 033451 312 10 0 00 000007 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ZERO
5381 033452 003 10 0 00 003707 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
5382 033453 321 12 0 00 033446 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
5383
5384 ;TEST AC LEFT HALF
5385 ;TEST ROT RIGHT ONE BIT POSITION
5386 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
5387 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
5388 ;IS ZERO AFTER ROTATING.
5389 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
5390
5391 003710 SN=SN+1
5392 777777 775777 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
5393 IFE <ZZ>,<ZZ=777777377777>
5394 776777 YY=<<ZZ-1>/2>&777777 ;SELECTED BIT AFTER ROTATION
5395 033454 525 10 0 00 775777 HRLOI AC,ZZ&777777 ;CLEAR BIT (N) OF AC LEFT
5396 IFN <ZZ&777777-777776>,<
5397 033455 525 07 0 00 776777 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
5398 IFE <ZZ&777777-777776>,<
5399 HRROI AC-1,377777 ;SETUP FOR COMPARISON>
5400 033456 241 10 0 00 777777 ROT AC,-1 ;*ROTATE RIGHT ONE
5401 033457 312 10 0 00 000007 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ZERO
5402 033460 003 10 0 00 003710 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
5403 033461 321 12 0 00 033454 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
5404
5405 ;TEST AC LEFT HALF
5406 ;TEST ROT RIGHT ONE BIT POSITION
5407 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
5408 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
5409 ;IS ZERO AFTER ROTATING.
5410 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
5411
5412 003711 SN=SN+1
5413 777777 776777 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
5414 IFE <ZZ>,<ZZ=777777377777>
5415 777377 YY=<<ZZ-1>/2>&777777 ;SELECTED BIT AFTER ROTATION
5416 033462 525 10 0 00 776777 HRLOI AC,ZZ&777777 ;CLEAR BIT (N) OF AC LEFT
5417 IFN <ZZ&777777-777776>,<
5418 033463 525 07 0 00 777377 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
5419 IFE <ZZ&777777-777776>,<
5420 HRROI AC-1,377777 ;SETUP FOR COMPARISON>
5421 033464 241 10 0 00 777777 ROT AC,-1 ;*ROTATE RIGHT ONE
5422 033465 312 10 0 00 000007 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ZERO
5423 033466 003 10 0 00 003711 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
5424 033467 321 12 0 00 033462 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
5425
5426 ;TEST AC LEFT HALF
5427 ;TEST ROT RIGHT ONE BIT POSITION
5428 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
5429 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
5430 ;IS ZERO AFTER ROTATING.
5431 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
5432
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 15-4
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5433 003712 SN=SN+1
5434 777777 777377 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
5435 IFE <ZZ>,<ZZ=777777377777>
5436 777577 YY=<<ZZ-1>/2>&777777 ;SELECTED BIT AFTER ROTATION
5437 033470 525 10 0 00 777377 HRLOI AC,ZZ&777777 ;CLEAR BIT (N) OF AC LEFT
5438 IFN <ZZ&777777-777776>,<
5439 033471 525 07 0 00 777577 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
5440 IFE <ZZ&777777-777776>,<
5441 HRROI AC-1,377777 ;SETUP FOR COMPARISON>
5442 033472 241 10 0 00 777777 ROT AC,-1 ;*ROTATE RIGHT ONE
5443 033473 312 10 0 00 000007 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ZERO
5444 033474 003 10 0 00 003712 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
5445 033475 321 12 0 00 033470 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
5446
5447 ;TEST AC LEFT HALF
5448 ;TEST ROT RIGHT ONE BIT POSITION
5449 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
5450 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
5451 ;IS ZERO AFTER ROTATING.
5452 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
5453
5454 003713 SN=SN+1
5455 777777 777577 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
5456 IFE <ZZ>,<ZZ=777777377777>
5457 777677 YY=<<ZZ-1>/2>&777777 ;SELECTED BIT AFTER ROTATION
5458 033476 525 10 0 00 777577 HRLOI AC,ZZ&777777 ;CLEAR BIT (N) OF AC LEFT
5459 IFN <ZZ&777777-777776>,<
5460 033477 525 07 0 00 777677 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
5461 IFE <ZZ&777777-777776>,<
5462 HRROI AC-1,377777 ;SETUP FOR COMPARISON>
5463 033500 241 10 0 00 777777 ROT AC,-1 ;*ROTATE RIGHT ONE
5464 033501 312 10 0 00 000007 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ZERO
5465 033502 003 10 0 00 003713 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
5466 033503 321 12 0 00 033476 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
5467
5468 ;TEST AC LEFT HALF
5469 ;TEST ROT RIGHT ONE BIT POSITION
5470 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
5471 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
5472 ;IS ZERO AFTER ROTATING.
5473 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
5474
5475 003714 SN=SN+1
5476 777777 777677 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
5477 IFE <ZZ>,<ZZ=777777377777>
5478 777737 YY=<<ZZ-1>/2>&777777 ;SELECTED BIT AFTER ROTATION
5479 033504 525 10 0 00 777677 HRLOI AC,ZZ&777777 ;CLEAR BIT (N) OF AC LEFT
5480 IFN <ZZ&777777-777776>,<
5481 033505 525 07 0 00 777737 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
5482 IFE <ZZ&777777-777776>,<
5483 HRROI AC-1,377777 ;SETUP FOR COMPARISON>
5484 033506 241 10 0 00 777777 ROT AC,-1 ;*ROTATE RIGHT ONE
5485 033507 312 10 0 00 000007 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ZERO
5486 033510 003 10 0 00 003714 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
5487 033511 321 12 0 00 033504 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 15-5
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5488
5489 ;TEST AC LEFT HALF
5490 ;TEST ROT RIGHT ONE BIT POSITION
5491 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
5492 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
5493 ;IS ZERO AFTER ROTATING.
5494 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
5495
5496 003715 SN=SN+1
5497 777777 777737 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
5498 IFE <ZZ>,<ZZ=777777377777>
5499 777757 YY=<<ZZ-1>/2>&777777 ;SELECTED BIT AFTER ROTATION
5500 033512 525 10 0 00 777737 HRLOI AC,ZZ&777777 ;CLEAR BIT (N) OF AC LEFT
5501 IFN <ZZ&777777-777776>,<
5502 033513 525 07 0 00 777757 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
5503 IFE <ZZ&777777-777776>,<
5504 HRROI AC-1,377777 ;SETUP FOR COMPARISON>
5505 033514 241 10 0 00 777777 ROT AC,-1 ;*ROTATE RIGHT ONE
5506 033515 312 10 0 00 000007 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ZERO
5507 033516 003 10 0 00 003715 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
5508 033517 321 12 0 00 033512 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
5509
5510 ;TEST AC LEFT HALF
5511 ;TEST ROT RIGHT ONE BIT POSITION
5512 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
5513 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
5514 ;IS ZERO AFTER ROTATING.
5515 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
5516
5517 003716 SN=SN+1
5518 777777 777757 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
5519 IFE <ZZ>,<ZZ=777777377777>
5520 777767 YY=<<ZZ-1>/2>&777777 ;SELECTED BIT AFTER ROTATION
5521 033520 525 10 0 00 777757 HRLOI AC,ZZ&777777 ;CLEAR BIT (N) OF AC LEFT
5522 IFN <ZZ&777777-777776>,<
5523 033521 525 07 0 00 777767 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
5524 IFE <ZZ&777777-777776>,<
5525 HRROI AC-1,377777 ;SETUP FOR COMPARISON>
5526 033522 241 10 0 00 777777 ROT AC,-1 ;*ROTATE RIGHT ONE
5527 033523 312 10 0 00 000007 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ZERO
5528 033524 003 10 0 00 003716 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
5529 033525 321 12 0 00 033520 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
5530
5531 ;TEST AC LEFT HALF
5532 ;TEST ROT RIGHT ONE BIT POSITION
5533 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
5534 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
5535 ;IS ZERO AFTER ROTATING.
5536 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
5537
5538 003717 SN=SN+1
5539 777777 777767 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
5540 IFE <ZZ>,<ZZ=777777377777>
5541 777773 YY=<<ZZ-1>/2>&777777 ;SELECTED BIT AFTER ROTATION
5542 033526 525 10 0 00 777767 HRLOI AC,ZZ&777777 ;CLEAR BIT (N) OF AC LEFT
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 15-6
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR SEQ 0128
5543 IFN <ZZ&777777-777776>,<
5544 033527 525 07 0 00 777773 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
5545 IFE <ZZ&777777-777776>,<
5546 HRROI AC-1,377777 ;SETUP FOR COMPARISON>
5547 033530 241 10 0 00 777777 ROT AC,-1 ;*ROTATE RIGHT ONE
5548 033531 312 10 0 00 000007 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ZERO
5549 033532 003 10 0 00 003717 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
5550 033533 321 12 0 00 033526 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
5551
5552 ;TEST AC LEFT HALF
5553 ;TEST ROT RIGHT ONE BIT POSITION
5554 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
5555 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
5556 ;IS ZERO AFTER ROTATING.
5557 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
5558
5559 003720 SN=SN+1
5560 777777 777773 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
5561 IFE <ZZ>,<ZZ=777777377777>
5562 777775 YY=<<ZZ-1>/2>&777777 ;SELECTED BIT AFTER ROTATION
5563 033534 525 10 0 00 777773 HRLOI AC,ZZ&777777 ;CLEAR BIT (N) OF AC LEFT
5564 IFN <ZZ&777777-777776>,<
5565 033535 525 07 0 00 777775 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
5566 IFE <ZZ&777777-777776>,<
5567 HRROI AC-1,377777 ;SETUP FOR COMPARISON>
5568 033536 241 10 0 00 777777 ROT AC,-1 ;*ROTATE RIGHT ONE
5569 033537 312 10 0 00 000007 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ZERO
5570 033540 003 10 0 00 003720 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
5571 033541 321 12 0 00 033534 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
5572
5573 ;TEST AC LEFT HALF
5574 ;TEST ROT RIGHT ONE BIT POSITION
5575 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
5576 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
5577 ;IS ZERO AFTER ROTATING.
5578 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
5579
5580 003721 SN=SN+1
5581 777777 777775 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
5582 IFE <ZZ>,<ZZ=777777377777>
5583 777776 YY=<<ZZ-1>/2>&777777 ;SELECTED BIT AFTER ROTATION
5584 033542 525 10 0 00 777775 HRLOI AC,ZZ&777777 ;CLEAR BIT (N) OF AC LEFT
5585 IFN <ZZ&777777-777776>,<
5586 033543 525 07 0 00 777776 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
5587 IFE <ZZ&777777-777776>,<
5588 HRROI AC-1,377777 ;SETUP FOR COMPARISON>
5589 033544 241 10 0 00 777777 ROT AC,-1 ;*ROTATE RIGHT ONE
5590 033545 312 10 0 00 000007 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ZERO
5591 033546 003 10 0 00 003721 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
5592 033547 321 12 0 00 033542 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
5593
5594 ;TEST AC LEFT HALF
5595 ;TEST ROT RIGHT ONE BIT POSITION
5596 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
5597 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 15-7
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR SEQ 0129
5598 ;IS ZERO AFTER ROTATING.
5599 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
5600
5601 003722 SN=SN+1
5602 777777 777776 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
5603 IFE <ZZ>,<ZZ=777777377777>
5604 777777 YY=<<ZZ-1>/2>&777777 ;SELECTED BIT AFTER ROTATION
5605 033550 525 10 0 00 777776 HRLOI AC,ZZ&777777 ;CLEAR BIT (N) OF AC LEFT
5606 IFN <ZZ&777777-777776>,<
5607 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
5608 IFE <ZZ&777777-777776>,<
5609 033551 561 07 0 00 377777 HRROI AC-1,377777 ;SETUP FOR COMPARISON>
5610 033552 241 10 0 00 777777 ROT AC,-1 ;*ROTATE RIGHT ONE
5611 033553 312 10 0 00 000007 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ZERO
5612 033554 003 10 0 00 003722 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
5613 033555 321 12 0 00 033550 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
5614
5615 PAGE
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 15-8
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR SEQ 0130
5616 000001 ZZ=1
5617
5618 REPEAT ^D18,< ;TEST AC RIGHT HALF
5619 ;TEST ROT RIGHT ONE BIT POSITION
5620 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
5621 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
5622 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
5623 ;IS ZERO AFTER ROTATING.
5624 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
5625
5626 SN=SN+1
5627 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
5628 IFE <ZZ>,<ZZ=777777377777>
5629 YY=<<ZZ-1>/2>&777777 ;SELECTED BIT AFTER ROTATION
5630 HRROI AC,ZZ&777777 ;CLEAR BIT (N) OF AC RIGHT
5631 IFN <ZZ&777777-777776>,<
5632 HRROI AC-1,YY ;SETUP FOR COMPARISON>
5633 IFE <ZZ&777777-777776>,<
5634 HRLOI AC-1,377777 ;SETUP FOR COMPARISON>
5635 ROT AC,-1 ;*ROTATE RIGHT ONE
5636 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ZERO
5637 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
5638 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
5639 >
5640 ;TEST AC RIGHT HALF
5641 ;TEST ROT RIGHT ONE BIT POSITION
5642 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
5643 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
5644 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
5645 ;IS ZERO AFTER ROTATING.
5646 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
5647
5648 003723 SN=SN+1
5649 000000 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
5650 777777 377777 IFE <ZZ>,<ZZ=777777377777>
5651 577777 YY=<<ZZ-1>/2>&777777 ;SELECTED BIT AFTER ROTATION
5652 033556 561 10 0 00 377777 HRROI AC,ZZ&777777 ;CLEAR BIT (N) OF AC RIGHT
5653 IFN <ZZ&777777-777776>,<
5654 033557 561 07 0 00 577777 HRROI AC-1,YY ;SETUP FOR COMPARISON>
5655 IFE <ZZ&777777-777776>,<
5656 HRLOI AC-1,377777 ;SETUP FOR COMPARISON>
5657 033560 241 10 0 00 777777 ROT AC,-1 ;*ROTATE RIGHT ONE
5658 033561 312 10 0 00 000007 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ZERO
5659 033562 003 10 0 00 003723 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
5660 033563 321 12 0 00 033556 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
5661
5662 ;TEST AC RIGHT HALF
5663 ;TEST ROT RIGHT ONE BIT POSITION
5664 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
5665 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
5666 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
5667 ;IS ZERO AFTER ROTATING.
5668 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
5669
5670 003724 SN=SN+1
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 15-9
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR SEQ 0131
5671 777777 577777 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
5672 IFE <ZZ>,<ZZ=777777377777>
5673 677777 YY=<<ZZ-1>/2>&777777 ;SELECTED BIT AFTER ROTATION
5674 033564 561 10 0 00 577777 HRROI AC,ZZ&777777 ;CLEAR BIT (N) OF AC RIGHT
5675 IFN <ZZ&777777-777776>,<
5676 033565 561 07 0 00 677777 HRROI AC-1,YY ;SETUP FOR COMPARISON>
5677 IFE <ZZ&777777-777776>,<
5678 HRLOI AC-1,377777 ;SETUP FOR COMPARISON>
5679 033566 241 10 0 00 777777 ROT AC,-1 ;*ROTATE RIGHT ONE
5680 033567 312 10 0 00 000007 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ZERO
5681 033570 003 10 0 00 003724 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
5682 033571 321 12 0 00 033564 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
5683
5684 ;TEST AC RIGHT HALF
5685 ;TEST ROT RIGHT ONE BIT POSITION
5686 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
5687 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
5688 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
5689 ;IS ZERO AFTER ROTATING.
5690 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
5691
5692 003725 SN=SN+1
5693 777777 677777 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
5694 IFE <ZZ>,<ZZ=777777377777>
5695 737777 YY=<<ZZ-1>/2>&777777 ;SELECTED BIT AFTER ROTATION
5696 033572 561 10 0 00 677777 HRROI AC,ZZ&777777 ;CLEAR BIT (N) OF AC RIGHT
5697 IFN <ZZ&777777-777776>,<
5698 033573 561 07 0 00 737777 HRROI AC-1,YY ;SETUP FOR COMPARISON>
5699 IFE <ZZ&777777-777776>,<
5700 HRLOI AC-1,377777 ;SETUP FOR COMPARISON>
5701 033574 241 10 0 00 777777 ROT AC,-1 ;*ROTATE RIGHT ONE
5702 033575 312 10 0 00 000007 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ZERO
5703 033576 003 10 0 00 003725 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
5704 033577 321 12 0 00 033572 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
5705
5706 ;TEST AC RIGHT HALF
5707 ;TEST ROT RIGHT ONE BIT POSITION
5708 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
5709 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
5710 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
5711 ;IS ZERO AFTER ROTATING.
5712 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
5713
5714 003726 SN=SN+1
5715 777777 737777 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
5716 IFE <ZZ>,<ZZ=777777377777>
5717 757777 YY=<<ZZ-1>/2>&777777 ;SELECTED BIT AFTER ROTATION
5718 033600 561 10 0 00 737777 HRROI AC,ZZ&777777 ;CLEAR BIT (N) OF AC RIGHT
5719 IFN <ZZ&777777-777776>,<
5720 033601 561 07 0 00 757777 HRROI AC-1,YY ;SETUP FOR COMPARISON>
5721 IFE <ZZ&777777-777776>,<
5722 HRLOI AC-1,377777 ;SETUP FOR COMPARISON>
5723 033602 241 10 0 00 777777 ROT AC,-1 ;*ROTATE RIGHT ONE
5724 033603 312 10 0 00 000007 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ZERO
5725 033604 003 10 0 00 003726 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 15-10
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR SEQ 0132
5726 033605 321 12 0 00 033600 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
5727
5728 ;TEST AC RIGHT HALF
5729 ;TEST ROT RIGHT ONE BIT POSITION
5730 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
5731 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
5732 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
5733 ;IS ZERO AFTER ROTATING.
5734 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
5735
5736 003727 SN=SN+1
5737 777777 757777 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
5738 IFE <ZZ>,<ZZ=777777377777>
5739 767777 YY=<<ZZ-1>/2>&777777 ;SELECTED BIT AFTER ROTATION
5740 033606 561 10 0 00 757777 HRROI AC,ZZ&777777 ;CLEAR BIT (N) OF AC RIGHT
5741 IFN <ZZ&777777-777776>,<
5742 033607 561 07 0 00 767777 HRROI AC-1,YY ;SETUP FOR COMPARISON>
5743 IFE <ZZ&777777-777776>,<
5744 HRLOI AC-1,377777 ;SETUP FOR COMPARISON>
5745 033610 241 10 0 00 777777 ROT AC,-1 ;*ROTATE RIGHT ONE
5746 033611 312 10 0 00 000007 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ZERO
5747 033612 003 10 0 00 003727 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
5748 033613 321 12 0 00 033606 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
5749
5750 ;TEST AC RIGHT HALF
5751 ;TEST ROT RIGHT ONE BIT POSITION
5752 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
5753 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
5754 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
5755 ;IS ZERO AFTER ROTATING.
5756 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
5757
5758 003730 SN=SN+1
5759 777777 767777 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
5760 IFE <ZZ>,<ZZ=777777377777>
5761 773777 YY=<<ZZ-1>/2>&777777 ;SELECTED BIT AFTER ROTATION
5762 033614 561 10 0 00 767777 HRROI AC,ZZ&777777 ;CLEAR BIT (N) OF AC RIGHT
5763 IFN <ZZ&777777-777776>,<
5764 033615 561 07 0 00 773777 HRROI AC-1,YY ;SETUP FOR COMPARISON>
5765 IFE <ZZ&777777-777776>,<
5766 HRLOI AC-1,377777 ;SETUP FOR COMPARISON>
5767 033616 241 10 0 00 777777 ROT AC,-1 ;*ROTATE RIGHT ONE
5768 033617 312 10 0 00 000007 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ZERO
5769 033620 003 10 0 00 003730 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
5770 033621 321 12 0 00 033614 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
5771
5772 ;TEST AC RIGHT HALF
5773 ;TEST ROT RIGHT ONE BIT POSITION
5774 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
5775 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
5776 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
5777 ;IS ZERO AFTER ROTATING.
5778 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
5779
5780 003731 SN=SN+1
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 15-11
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR SEQ 0133
5781 777777 773777 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
5782 IFE <ZZ>,<ZZ=777777377777>
5783 775777 YY=<<ZZ-1>/2>&777777 ;SELECTED BIT AFTER ROTATION
5784 033622 561 10 0 00 773777 HRROI AC,ZZ&777777 ;CLEAR BIT (N) OF AC RIGHT
5785 IFN <ZZ&777777-777776>,<
5786 033623 561 07 0 00 775777 HRROI AC-1,YY ;SETUP FOR COMPARISON>
5787 IFE <ZZ&777777-777776>,<
5788 HRLOI AC-1,377777 ;SETUP FOR COMPARISON>
5789 033624 241 10 0 00 777777 ROT AC,-1 ;*ROTATE RIGHT ONE
5790 033625 312 10 0 00 000007 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ZERO
5791 033626 003 10 0 00 003731 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
5792 033627 321 12 0 00 033622 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
5793
5794 ;TEST AC RIGHT HALF
5795 ;TEST ROT RIGHT ONE BIT POSITION
5796 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
5797 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
5798 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
5799 ;IS ZERO AFTER ROTATING.
5800 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
5801
5802 003732 SN=SN+1
5803 777777 775777 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
5804 IFE <ZZ>,<ZZ=777777377777>
5805 776777 YY=<<ZZ-1>/2>&777777 ;SELECTED BIT AFTER ROTATION
5806 033630 561 10 0 00 775777 HRROI AC,ZZ&777777 ;CLEAR BIT (N) OF AC RIGHT
5807 IFN <ZZ&777777-777776>,<
5808 033631 561 07 0 00 776777 HRROI AC-1,YY ;SETUP FOR COMPARISON>
5809 IFE <ZZ&777777-777776>,<
5810 HRLOI AC-1,377777 ;SETUP FOR COMPARISON>
5811 033632 241 10 0 00 777777 ROT AC,-1 ;*ROTATE RIGHT ONE
5812 033633 312 10 0 00 000007 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ZERO
5813 033634 003 10 0 00 003732 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
5814 033635 321 12 0 00 033630 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
5815
5816 ;TEST AC RIGHT HALF
5817 ;TEST ROT RIGHT ONE BIT POSITION
5818 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
5819 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
5820 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
5821 ;IS ZERO AFTER ROTATING.
5822 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
5823
5824 003733 SN=SN+1
5825 777777 776777 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
5826 IFE <ZZ>,<ZZ=777777377777>
5827 777377 YY=<<ZZ-1>/2>&777777 ;SELECTED BIT AFTER ROTATION
5828 033636 561 10 0 00 776777 HRROI AC,ZZ&777777 ;CLEAR BIT (N) OF AC RIGHT
5829 IFN <ZZ&777777-777776>,<
5830 033637 561 07 0 00 777377 HRROI AC-1,YY ;SETUP FOR COMPARISON>
5831 IFE <ZZ&777777-777776>,<
5832 HRLOI AC-1,377777 ;SETUP FOR COMPARISON>
5833 033640 241 10 0 00 777777 ROT AC,-1 ;*ROTATE RIGHT ONE
5834 033641 312 10 0 00 000007 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ZERO
5835 033642 003 10 0 00 003733 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 15-12
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR SEQ 0134
5836 033643 321 12 0 00 033636 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
5837
5838 ;TEST AC RIGHT HALF
5839 ;TEST ROT RIGHT ONE BIT POSITION
5840 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
5841 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
5842 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
5843 ;IS ZERO AFTER ROTATING.
5844 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
5845
5846 003734 SN=SN+1
5847 777777 777377 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
5848 IFE <ZZ>,<ZZ=777777377777>
5849 777577 YY=<<ZZ-1>/2>&777777 ;SELECTED BIT AFTER ROTATION
5850 033644 561 10 0 00 777377 HRROI AC,ZZ&777777 ;CLEAR BIT (N) OF AC RIGHT
5851 IFN <ZZ&777777-777776>,<
5852 033645 561 07 0 00 777577 HRROI AC-1,YY ;SETUP FOR COMPARISON>
5853 IFE <ZZ&777777-777776>,<
5854 HRLOI AC-1,377777 ;SETUP FOR COMPARISON>
5855 033646 241 10 0 00 777777 ROT AC,-1 ;*ROTATE RIGHT ONE
5856 033647 312 10 0 00 000007 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ZERO
5857 033650 003 10 0 00 003734 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
5858 033651 321 12 0 00 033644 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
5859
5860 ;TEST AC RIGHT HALF
5861 ;TEST ROT RIGHT ONE BIT POSITION
5862 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
5863 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
5864 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
5865 ;IS ZERO AFTER ROTATING.
5866 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
5867
5868 003735 SN=SN+1
5869 777777 777577 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
5870 IFE <ZZ>,<ZZ=777777377777>
5871 777677 YY=<<ZZ-1>/2>&777777 ;SELECTED BIT AFTER ROTATION
5872 033652 561 10 0 00 777577 HRROI AC,ZZ&777777 ;CLEAR BIT (N) OF AC RIGHT
5873 IFN <ZZ&777777-777776>,<
5874 033653 561 07 0 00 777677 HRROI AC-1,YY ;SETUP FOR COMPARISON>
5875 IFE <ZZ&777777-777776>,<
5876 HRLOI AC-1,377777 ;SETUP FOR COMPARISON>
5877 033654 241 10 0 00 777777 ROT AC,-1 ;*ROTATE RIGHT ONE
5878 033655 312 10 0 00 000007 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ZERO
5879 033656 003 10 0 00 003735 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
5880 033657 321 12 0 00 033652 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
5881
5882 ;TEST AC RIGHT HALF
5883 ;TEST ROT RIGHT ONE BIT POSITION
5884 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
5885 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
5886 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
5887 ;IS ZERO AFTER ROTATING.
5888 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
5889
5890 003736 SN=SN+1
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 15-13
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR SEQ 0135
5891 777777 777677 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
5892 IFE <ZZ>,<ZZ=777777377777>
5893 777737 YY=<<ZZ-1>/2>&777777 ;SELECTED BIT AFTER ROTATION
5894 033660 561 10 0 00 777677 HRROI AC,ZZ&777777 ;CLEAR BIT (N) OF AC RIGHT
5895 IFN <ZZ&777777-777776>,<
5896 033661 561 07 0 00 777737 HRROI AC-1,YY ;SETUP FOR COMPARISON>
5897 IFE <ZZ&777777-777776>,<
5898 HRLOI AC-1,377777 ;SETUP FOR COMPARISON>
5899 033662 241 10 0 00 777777 ROT AC,-1 ;*ROTATE RIGHT ONE
5900 033663 312 10 0 00 000007 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ZERO
5901 033664 003 10 0 00 003736 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
5902 033665 321 12 0 00 033660 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
5903
5904 ;TEST AC RIGHT HALF
5905 ;TEST ROT RIGHT ONE BIT POSITION
5906 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
5907 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
5908 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
5909 ;IS ZERO AFTER ROTATING.
5910 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
5911
5912 003737 SN=SN+1
5913 777777 777737 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
5914 IFE <ZZ>,<ZZ=777777377777>
5915 777757 YY=<<ZZ-1>/2>&777777 ;SELECTED BIT AFTER ROTATION
5916 033666 561 10 0 00 777737 HRROI AC,ZZ&777777 ;CLEAR BIT (N) OF AC RIGHT
5917 IFN <ZZ&777777-777776>,<
5918 033667 561 07 0 00 777757 HRROI AC-1,YY ;SETUP FOR COMPARISON>
5919 IFE <ZZ&777777-777776>,<
5920 HRLOI AC-1,377777 ;SETUP FOR COMPARISON>
5921 033670 241 10 0 00 777777 ROT AC,-1 ;*ROTATE RIGHT ONE
5922 033671 312 10 0 00 000007 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ZERO
5923 033672 003 10 0 00 003737 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
5924 033673 321 12 0 00 033666 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
5925
5926 ;TEST AC RIGHT HALF
5927 ;TEST ROT RIGHT ONE BIT POSITION
5928 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
5929 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
5930 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
5931 ;IS ZERO AFTER ROTATING.
5932 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
5933
5934 003740 SN=SN+1
5935 777777 777757 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
5936 IFE <ZZ>,<ZZ=777777377777>
5937 777767 YY=<<ZZ-1>/2>&777777 ;SELECTED BIT AFTER ROTATION
5938 033674 561 10 0 00 777757 HRROI AC,ZZ&777777 ;CLEAR BIT (N) OF AC RIGHT
5939 IFN <ZZ&777777-777776>,<
5940 033675 561 07 0 00 777767 HRROI AC-1,YY ;SETUP FOR COMPARISON>
5941 IFE <ZZ&777777-777776>,<
5942 HRLOI AC-1,377777 ;SETUP FOR COMPARISON>
5943 033676 241 10 0 00 777777 ROT AC,-1 ;*ROTATE RIGHT ONE
5944 033677 312 10 0 00 000007 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ZERO
5945 033700 003 10 0 00 003740 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 15-14
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR SEQ 0136
5946 033701 321 12 0 00 033674 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
5947
5948 ;TEST AC RIGHT HALF
5949 ;TEST ROT RIGHT ONE BIT POSITION
5950 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
5951 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
5952 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
5953 ;IS ZERO AFTER ROTATING.
5954 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
5955
5956 003741 SN=SN+1
5957 777777 777767 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
5958 IFE <ZZ>,<ZZ=777777377777>
5959 777773 YY=<<ZZ-1>/2>&777777 ;SELECTED BIT AFTER ROTATION
5960 033702 561 10 0 00 777767 HRROI AC,ZZ&777777 ;CLEAR BIT (N) OF AC RIGHT
5961 IFN <ZZ&777777-777776>,<
5962 033703 561 07 0 00 777773 HRROI AC-1,YY ;SETUP FOR COMPARISON>
5963 IFE <ZZ&777777-777776>,<
5964 HRLOI AC-1,377777 ;SETUP FOR COMPARISON>
5965 033704 241 10 0 00 777777 ROT AC,-1 ;*ROTATE RIGHT ONE
5966 033705 312 10 0 00 000007 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ZERO
5967 033706 003 10 0 00 003741 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
5968 033707 321 12 0 00 033702 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
5969
5970 ;TEST AC RIGHT HALF
5971 ;TEST ROT RIGHT ONE BIT POSITION
5972 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
5973 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
5974 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
5975 ;IS ZERO AFTER ROTATING.
5976 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
5977
5978 003742 SN=SN+1
5979 777777 777773 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
5980 IFE <ZZ>,<ZZ=777777377777>
5981 777775 YY=<<ZZ-1>/2>&777777 ;SELECTED BIT AFTER ROTATION
5982 033710 561 10 0 00 777773 HRROI AC,ZZ&777777 ;CLEAR BIT (N) OF AC RIGHT
5983 IFN <ZZ&777777-777776>,<
5984 033711 561 07 0 00 777775 HRROI AC-1,YY ;SETUP FOR COMPARISON>
5985 IFE <ZZ&777777-777776>,<
5986 HRLOI AC-1,377777 ;SETUP FOR COMPARISON>
5987 033712 241 10 0 00 777777 ROT AC,-1 ;*ROTATE RIGHT ONE
5988 033713 312 10 0 00 000007 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ZERO
5989 033714 003 10 0 00 003742 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
5990 033715 321 12 0 00 033710 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
5991
5992 ;TEST AC RIGHT HALF
5993 ;TEST ROT RIGHT ONE BIT POSITION
5994 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
5995 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
5996 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
5997 ;IS ZERO AFTER ROTATING.
5998 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
5999
6000 003743 SN=SN+1
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 15-15
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR SEQ 0137
6001 777777 777775 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
6002 IFE <ZZ>,<ZZ=777777377777>
6003 777776 YY=<<ZZ-1>/2>&777777 ;SELECTED BIT AFTER ROTATION
6004 033716 561 10 0 00 777775 HRROI AC,ZZ&777777 ;CLEAR BIT (N) OF AC RIGHT
6005 IFN <ZZ&777777-777776>,<
6006 033717 561 07 0 00 777776 HRROI AC-1,YY ;SETUP FOR COMPARISON>
6007 IFE <ZZ&777777-777776>,<
6008 HRLOI AC-1,377777 ;SETUP FOR COMPARISON>
6009 033720 241 10 0 00 777777 ROT AC,-1 ;*ROTATE RIGHT ONE
6010 033721 312 10 0 00 000007 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ZERO
6011 033722 003 10 0 00 003743 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
6012 033723 321 12 0 00 033716 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
6013
6014 ;TEST AC RIGHT HALF
6015 ;TEST ROT RIGHT ONE BIT POSITION
6016 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
6017 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
6018 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
6019 ;IS ZERO AFTER ROTATING.
6020 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
6021
6022 003744 SN=SN+1
6023 777777 777776 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
6024 IFE <ZZ>,<ZZ=777777377777>
6025 777777 YY=<<ZZ-1>/2>&777777 ;SELECTED BIT AFTER ROTATION
6026 033724 561 10 0 00 777776 HRROI AC,ZZ&777777 ;CLEAR BIT (N) OF AC RIGHT
6027 IFN <ZZ&777777-777776>,<
6028 HRROI AC-1,YY ;SETUP FOR COMPARISON>
6029 IFE <ZZ&777777-777776>,<
6030 033725 525 07 0 00 377777 HRLOI AC-1,377777 ;SETUP FOR COMPARISON>
6031 033726 241 10 0 00 777777 ROT AC,-1 ;*ROTATE RIGHT ONE
6032 033727 312 10 0 00 000007 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ZERO
6033 033730 003 10 0 00 003744 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
6034 033731 321 12 0 00 033724 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
6035
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6036 ;TEST ROT RIGHT TWO BIT POSITIONS
6037 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
6038 ;AN ERROR OCCURS IF C(AC) IS NON-ZERO AFTER ROTATING
6039
6040 000007 AC=7
6041 SAVEAC (1,1)^
6042 033732 201 11 0 00 033732 MOVEI AC+2,. ;SAVE TEST PC
6043 033733 202 11 0 00 030051 MOVEM AC+2,TESTPC
6044 033734 201 11 0 00 000011 MOVEI AC+2,<AC+2>&17 ;INFORM ERROR ROUTINE WHICH
6045 033735 202 11 0 00 041765 MOVEM AC+2,ERRLOP# ;AC IS USED FOR ITERATION^
6046
6047 033736 403 07 0 00 000006 E4000: SETZB AC,AC-1 ;INITIALIZE AC AND EXPECTED RESULT TO ZERO
6048 033737 241 07 0 00 777776 ROT AC,-2 ;*ROTATE RIGHT TWO
6049 033740 312 07 0 00 000006 CAME AC,AC-1 ;TEST AC FOR ALL ZEROS
6050 033741 003 07 0 00 004001 ER3 AC,4001 ;AD-AR GATING FAILED
6051 033742 321 11 0 00 033736 JUMPL AC+2,E4000 ;LOOP ON ERROR SWITCH
6052
6053 ;TEST ROT RIGHT TWO BIT POSITIONS
6054 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
6055 ;AN ERROR OCCURS IF C(AC) IS NOT ALL ONES AFTER ROTATING
6056
6057 033743 477 07 0 00 000006 E4100: SETOB AC,AC-1 ;INITIALIZE AC AND EXPECTED RESULT TO ALL ONES
6058 033744 241 07 0 00 777776 ROT AC,-2 ;*ROTATE RIGHT TWO
6059 033745 312 07 0 00 000006 CAME AC,AC-1 ;TEST AC FOR ALL ONES.
6060 033746 003 07 0 00 004101 ER3 AC,4101 ;AD-AR GATING FAILED
6061 033747 321 11 0 00 033743 JUMPL AC+2,E4100 ;LOOP ON ERROR SWITCH
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6062
6063 004200 SN=4200
6064 000000 ZZ=0
6065
6066 E4200: REPEAT ^D18,< ;TEST AC LEFT HALF
6067 ;TEST ROT RIGHT TWO BIT POSITIONS
6068 ;TEST ABILITY TO ROTATE A ONE GHROUGH THE 36 BITS OF THE AR
6069 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
6070 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER
6071 ;BIT IS ONE AFTER ROTATING
6072 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
6073
6074 SN=SN+1
6075 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
6076 IFE ZZ,<ZZ=400000>
6077 YY=ZZ/4 ;SELECTED BIT AFTER ROTATION
6078 MOVSI AC,ZZ ;SET BIT (N) OF AC LEFT
6079 IFG <ZZ-2>,<
6080 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
6081 IFE <ZZ-2>,<
6082 MOVEI AC-1,400000 ;SETUP FOR COMPARISON>
6083 IFE <ZZ-1>,<
6084 MOVEI AC-1,200000 ;SETUP FOR COMPARISON>
6085 ROT AC,-2 ;*ROTATE RIGHT TWO
6086 CAME AC,AC-1 ;TEST FOR BIT (N+2) A ONE
6087 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
6088 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
6089 >
6090 ;TEST AC LEFT HALF
6091 ;TEST ROT RIGHT TWO BIT POSITIONS
6092 ;TEST ABILITY TO ROTATE A ONE GHROUGH THE 36 BITS OF THE AR
6093 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
6094 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER
6095 ;BIT IS ONE AFTER ROTATING
6096 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
6097
6098 004201 SN=SN+1
6099 000000 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
6100 400000 IFE ZZ,<ZZ=400000>
6101 100000 YY=ZZ/4 ;SELECTED BIT AFTER ROTATION
6102 033750 205 07 0 00 400000 MOVSI AC,ZZ ;SET BIT (N) OF AC LEFT
6103 IFG <ZZ-2>,<
6104 033751 205 06 0 00 100000 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
6105 IFE <ZZ-2>,<
6106 MOVEI AC-1,400000 ;SETUP FOR COMPARISON>
6107 IFE <ZZ-1>,<
6108 MOVEI AC-1,200000 ;SETUP FOR COMPARISON>
6109 033752 241 07 0 00 777776 ROT AC,-2 ;*ROTATE RIGHT TWO
6110 033753 312 07 0 00 000006 CAME AC,AC-1 ;TEST FOR BIT (N+2) A ONE
6111 033754 003 07 0 00 004201 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
6112 033755 321 11 0 00 033750 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
6113
6114 ;TEST AC LEFT HALF
6115 ;TEST ROT RIGHT TWO BIT POSITIONS
6116 ;TEST ABILITY TO ROTATE A ONE GHROUGH THE 36 BITS OF THE AR
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6117 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
6118 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER
6119 ;BIT IS ONE AFTER ROTATING
6120 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
6121
6122 004202 SN=SN+1
6123 200000 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
6124 IFE ZZ,<ZZ=400000>
6125 040000 YY=ZZ/4 ;SELECTED BIT AFTER ROTATION
6126 033756 205 07 0 00 200000 MOVSI AC,ZZ ;SET BIT (N) OF AC LEFT
6127 IFG <ZZ-2>,<
6128 033757 205 06 0 00 040000 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
6129 IFE <ZZ-2>,<
6130 MOVEI AC-1,400000 ;SETUP FOR COMPARISON>
6131 IFE <ZZ-1>,<
6132 MOVEI AC-1,200000 ;SETUP FOR COMPARISON>
6133 033760 241 07 0 00 777776 ROT AC,-2 ;*ROTATE RIGHT TWO
6134 033761 312 07 0 00 000006 CAME AC,AC-1 ;TEST FOR BIT (N+2) A ONE
6135 033762 003 07 0 00 004202 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
6136 033763 321 11 0 00 033756 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
6137
6138 ;TEST AC LEFT HALF
6139 ;TEST ROT RIGHT TWO BIT POSITIONS
6140 ;TEST ABILITY TO ROTATE A ONE GHROUGH THE 36 BITS OF THE AR
6141 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
6142 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER
6143 ;BIT IS ONE AFTER ROTATING
6144 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
6145
6146 004203 SN=SN+1
6147 100000 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
6148 IFE ZZ,<ZZ=400000>
6149 020000 YY=ZZ/4 ;SELECTED BIT AFTER ROTATION
6150 033764 205 07 0 00 100000 MOVSI AC,ZZ ;SET BIT (N) OF AC LEFT
6151 IFG <ZZ-2>,<
6152 033765 205 06 0 00 020000 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
6153 IFE <ZZ-2>,<
6154 MOVEI AC-1,400000 ;SETUP FOR COMPARISON>
6155 IFE <ZZ-1>,<
6156 MOVEI AC-1,200000 ;SETUP FOR COMPARISON>
6157 033766 241 07 0 00 777776 ROT AC,-2 ;*ROTATE RIGHT TWO
6158 033767 312 07 0 00 000006 CAME AC,AC-1 ;TEST FOR BIT (N+2) A ONE
6159 033770 003 07 0 00 004203 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
6160 033771 321 11 0 00 033764 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
6161
6162 ;TEST AC LEFT HALF
6163 ;TEST ROT RIGHT TWO BIT POSITIONS
6164 ;TEST ABILITY TO ROTATE A ONE GHROUGH THE 36 BITS OF THE AR
6165 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
6166 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER
6167 ;BIT IS ONE AFTER ROTATING
6168 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
6169
6170 004204 SN=SN+1
6171 040000 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
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6172 IFE ZZ,<ZZ=400000>
6173 010000 YY=ZZ/4 ;SELECTED BIT AFTER ROTATION
6174 033772 205 07 0 00 040000 MOVSI AC,ZZ ;SET BIT (N) OF AC LEFT
6175 IFG <ZZ-2>,<
6176 033773 205 06 0 00 010000 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
6177 IFE <ZZ-2>,<
6178 MOVEI AC-1,400000 ;SETUP FOR COMPARISON>
6179 IFE <ZZ-1>,<
6180 MOVEI AC-1,200000 ;SETUP FOR COMPARISON>
6181 033774 241 07 0 00 777776 ROT AC,-2 ;*ROTATE RIGHT TWO
6182 033775 312 07 0 00 000006 CAME AC,AC-1 ;TEST FOR BIT (N+2) A ONE
6183 033776 003 07 0 00 004204 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
6184 033777 321 11 0 00 033772 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
6185
6186 ;TEST AC LEFT HALF
6187 ;TEST ROT RIGHT TWO BIT POSITIONS
6188 ;TEST ABILITY TO ROTATE A ONE GHROUGH THE 36 BITS OF THE AR
6189 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
6190 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER
6191 ;BIT IS ONE AFTER ROTATING
6192 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
6193
6194 004205 SN=SN+1
6195 020000 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
6196 IFE ZZ,<ZZ=400000>
6197 004000 YY=ZZ/4 ;SELECTED BIT AFTER ROTATION
6198 034000 205 07 0 00 020000 MOVSI AC,ZZ ;SET BIT (N) OF AC LEFT
6199 IFG <ZZ-2>,<
6200 034001 205 06 0 00 004000 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
6201 IFE <ZZ-2>,<
6202 MOVEI AC-1,400000 ;SETUP FOR COMPARISON>
6203 IFE <ZZ-1>,<
6204 MOVEI AC-1,200000 ;SETUP FOR COMPARISON>
6205 034002 241 07 0 00 777776 ROT AC,-2 ;*ROTATE RIGHT TWO
6206 034003 312 07 0 00 000006 CAME AC,AC-1 ;TEST FOR BIT (N+2) A ONE
6207 034004 003 07 0 00 004205 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
6208 034005 321 11 0 00 034000 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
6209
6210 ;TEST AC LEFT HALF
6211 ;TEST ROT RIGHT TWO BIT POSITIONS
6212 ;TEST ABILITY TO ROTATE A ONE GHROUGH THE 36 BITS OF THE AR
6213 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
6214 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER
6215 ;BIT IS ONE AFTER ROTATING
6216 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
6217
6218 004206 SN=SN+1
6219 010000 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
6220 IFE ZZ,<ZZ=400000>
6221 002000 YY=ZZ/4 ;SELECTED BIT AFTER ROTATION
6222 034006 205 07 0 00 010000 MOVSI AC,ZZ ;SET BIT (N) OF AC LEFT
6223 IFG <ZZ-2>,<
6224 034007 205 06 0 00 002000 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
6225 IFE <ZZ-2>,<
6226 MOVEI AC-1,400000 ;SETUP FOR COMPARISON>
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6227 IFE <ZZ-1>,<
6228 MOVEI AC-1,200000 ;SETUP FOR COMPARISON>
6229 034010 241 07 0 00 777776 ROT AC,-2 ;*ROTATE RIGHT TWO
6230 034011 312 07 0 00 000006 CAME AC,AC-1 ;TEST FOR BIT (N+2) A ONE
6231 034012 003 07 0 00 004206 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
6232 034013 321 11 0 00 034006 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
6233
6234 ;TEST AC LEFT HALF
6235 ;TEST ROT RIGHT TWO BIT POSITIONS
6236 ;TEST ABILITY TO ROTATE A ONE GHROUGH THE 36 BITS OF THE AR
6237 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
6238 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER
6239 ;BIT IS ONE AFTER ROTATING
6240 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
6241
6242 004207 SN=SN+1
6243 004000 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
6244 IFE ZZ,<ZZ=400000>
6245 001000 YY=ZZ/4 ;SELECTED BIT AFTER ROTATION
6246 034014 205 07 0 00 004000 MOVSI AC,ZZ ;SET BIT (N) OF AC LEFT
6247 IFG <ZZ-2>,<
6248 034015 205 06 0 00 001000 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
6249 IFE <ZZ-2>,<
6250 MOVEI AC-1,400000 ;SETUP FOR COMPARISON>
6251 IFE <ZZ-1>,<
6252 MOVEI AC-1,200000 ;SETUP FOR COMPARISON>
6253 034016 241 07 0 00 777776 ROT AC,-2 ;*ROTATE RIGHT TWO
6254 034017 312 07 0 00 000006 CAME AC,AC-1 ;TEST FOR BIT (N+2) A ONE
6255 034020 003 07 0 00 004207 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
6256 034021 321 11 0 00 034014 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
6257
6258 ;TEST AC LEFT HALF
6259 ;TEST ROT RIGHT TWO BIT POSITIONS
6260 ;TEST ABILITY TO ROTATE A ONE GHROUGH THE 36 BITS OF THE AR
6261 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
6262 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER
6263 ;BIT IS ONE AFTER ROTATING
6264 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
6265
6266 004210 SN=SN+1
6267 002000 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
6268 IFE ZZ,<ZZ=400000>
6269 000400 YY=ZZ/4 ;SELECTED BIT AFTER ROTATION
6270 034022 205 07 0 00 002000 MOVSI AC,ZZ ;SET BIT (N) OF AC LEFT
6271 IFG <ZZ-2>,<
6272 034023 205 06 0 00 000400 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
6273 IFE <ZZ-2>,<
6274 MOVEI AC-1,400000 ;SETUP FOR COMPARISON>
6275 IFE <ZZ-1>,<
6276 MOVEI AC-1,200000 ;SETUP FOR COMPARISON>
6277 034024 241 07 0 00 777776 ROT AC,-2 ;*ROTATE RIGHT TWO
6278 034025 312 07 0 00 000006 CAME AC,AC-1 ;TEST FOR BIT (N+2) A ONE
6279 034026 003 07 0 00 004210 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
6280 034027 321 11 0 00 034022 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
6281
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6282 ;TEST AC LEFT HALF
6283 ;TEST ROT RIGHT TWO BIT POSITIONS
6284 ;TEST ABILITY TO ROTATE A ONE GHROUGH THE 36 BITS OF THE AR
6285 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
6286 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER
6287 ;BIT IS ONE AFTER ROTATING
6288 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
6289
6290 004211 SN=SN+1
6291 001000 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
6292 IFE ZZ,<ZZ=400000>
6293 000200 YY=ZZ/4 ;SELECTED BIT AFTER ROTATION
6294 034030 205 07 0 00 001000 MOVSI AC,ZZ ;SET BIT (N) OF AC LEFT
6295 IFG <ZZ-2>,<
6296 034031 205 06 0 00 000200 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
6297 IFE <ZZ-2>,<
6298 MOVEI AC-1,400000 ;SETUP FOR COMPARISON>
6299 IFE <ZZ-1>,<
6300 MOVEI AC-1,200000 ;SETUP FOR COMPARISON>
6301 034032 241 07 0 00 777776 ROT AC,-2 ;*ROTATE RIGHT TWO
6302 034033 312 07 0 00 000006 CAME AC,AC-1 ;TEST FOR BIT (N+2) A ONE
6303 034034 003 07 0 00 004211 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
6304 034035 321 11 0 00 034030 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
6305
6306 ;TEST AC LEFT HALF
6307 ;TEST ROT RIGHT TWO BIT POSITIONS
6308 ;TEST ABILITY TO ROTATE A ONE GHROUGH THE 36 BITS OF THE AR
6309 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
6310 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER
6311 ;BIT IS ONE AFTER ROTATING
6312 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
6313
6314 004212 SN=SN+1
6315 000400 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
6316 IFE ZZ,<ZZ=400000>
6317 000100 YY=ZZ/4 ;SELECTED BIT AFTER ROTATION
6318 034036 205 07 0 00 000400 MOVSI AC,ZZ ;SET BIT (N) OF AC LEFT
6319 IFG <ZZ-2>,<
6320 034037 205 06 0 00 000100 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
6321 IFE <ZZ-2>,<
6322 MOVEI AC-1,400000 ;SETUP FOR COMPARISON>
6323 IFE <ZZ-1>,<
6324 MOVEI AC-1,200000 ;SETUP FOR COMPARISON>
6325 034040 241 07 0 00 777776 ROT AC,-2 ;*ROTATE RIGHT TWO
6326 034041 312 07 0 00 000006 CAME AC,AC-1 ;TEST FOR BIT (N+2) A ONE
6327 034042 003 07 0 00 004212 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
6328 034043 321 11 0 00 034036 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
6329
6330 ;TEST AC LEFT HALF
6331 ;TEST ROT RIGHT TWO BIT POSITIONS
6332 ;TEST ABILITY TO ROTATE A ONE GHROUGH THE 36 BITS OF THE AR
6333 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
6334 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER
6335 ;BIT IS ONE AFTER ROTATING
6336 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
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6337
6338 004213 SN=SN+1
6339 000200 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
6340 IFE ZZ,<ZZ=400000>
6341 000040 YY=ZZ/4 ;SELECTED BIT AFTER ROTATION
6342 034044 205 07 0 00 000200 MOVSI AC,ZZ ;SET BIT (N) OF AC LEFT
6343 IFG <ZZ-2>,<
6344 034045 205 06 0 00 000040 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
6345 IFE <ZZ-2>,<
6346 MOVEI AC-1,400000 ;SETUP FOR COMPARISON>
6347 IFE <ZZ-1>,<
6348 MOVEI AC-1,200000 ;SETUP FOR COMPARISON>
6349 034046 241 07 0 00 777776 ROT AC,-2 ;*ROTATE RIGHT TWO
6350 034047 312 07 0 00 000006 CAME AC,AC-1 ;TEST FOR BIT (N+2) A ONE
6351 034050 003 07 0 00 004213 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
6352 034051 321 11 0 00 034044 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
6353
6354 ;TEST AC LEFT HALF
6355 ;TEST ROT RIGHT TWO BIT POSITIONS
6356 ;TEST ABILITY TO ROTATE A ONE GHROUGH THE 36 BITS OF THE AR
6357 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
6358 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER
6359 ;BIT IS ONE AFTER ROTATING
6360 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
6361
6362 004214 SN=SN+1
6363 000100 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
6364 IFE ZZ,<ZZ=400000>
6365 000020 YY=ZZ/4 ;SELECTED BIT AFTER ROTATION
6366 034052 205 07 0 00 000100 MOVSI AC,ZZ ;SET BIT (N) OF AC LEFT
6367 IFG <ZZ-2>,<
6368 034053 205 06 0 00 000020 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
6369 IFE <ZZ-2>,<
6370 MOVEI AC-1,400000 ;SETUP FOR COMPARISON>
6371 IFE <ZZ-1>,<
6372 MOVEI AC-1,200000 ;SETUP FOR COMPARISON>
6373 034054 241 07 0 00 777776 ROT AC,-2 ;*ROTATE RIGHT TWO
6374 034055 312 07 0 00 000006 CAME AC,AC-1 ;TEST FOR BIT (N+2) A ONE
6375 034056 003 07 0 00 004214 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
6376 034057 321 11 0 00 034052 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
6377
6378 ;TEST AC LEFT HALF
6379 ;TEST ROT RIGHT TWO BIT POSITIONS
6380 ;TEST ABILITY TO ROTATE A ONE GHROUGH THE 36 BITS OF THE AR
6381 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
6382 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER
6383 ;BIT IS ONE AFTER ROTATING
6384 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
6385
6386 004215 SN=SN+1
6387 000040 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
6388 IFE ZZ,<ZZ=400000>
6389 000010 YY=ZZ/4 ;SELECTED BIT AFTER ROTATION
6390 034060 205 07 0 00 000040 MOVSI AC,ZZ ;SET BIT (N) OF AC LEFT
6391 IFG <ZZ-2>,<
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6392 034061 205 06 0 00 000010 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
6393 IFE <ZZ-2>,<
6394 MOVEI AC-1,400000 ;SETUP FOR COMPARISON>
6395 IFE <ZZ-1>,<
6396 MOVEI AC-1,200000 ;SETUP FOR COMPARISON>
6397 034062 241 07 0 00 777776 ROT AC,-2 ;*ROTATE RIGHT TWO
6398 034063 312 07 0 00 000006 CAME AC,AC-1 ;TEST FOR BIT (N+2) A ONE
6399 034064 003 07 0 00 004215 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
6400 034065 321 11 0 00 034060 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
6401
6402 ;TEST AC LEFT HALF
6403 ;TEST ROT RIGHT TWO BIT POSITIONS
6404 ;TEST ABILITY TO ROTATE A ONE GHROUGH THE 36 BITS OF THE AR
6405 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
6406 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER
6407 ;BIT IS ONE AFTER ROTATING
6408 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
6409
6410 004216 SN=SN+1
6411 000020 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
6412 IFE ZZ,<ZZ=400000>
6413 000004 YY=ZZ/4 ;SELECTED BIT AFTER ROTATION
6414 034066 205 07 0 00 000020 MOVSI AC,ZZ ;SET BIT (N) OF AC LEFT
6415 IFG <ZZ-2>,<
6416 034067 205 06 0 00 000004 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
6417 IFE <ZZ-2>,<
6418 MOVEI AC-1,400000 ;SETUP FOR COMPARISON>
6419 IFE <ZZ-1>,<
6420 MOVEI AC-1,200000 ;SETUP FOR COMPARISON>
6421 034070 241 07 0 00 777776 ROT AC,-2 ;*ROTATE RIGHT TWO
6422 034071 312 07 0 00 000006 CAME AC,AC-1 ;TEST FOR BIT (N+2) A ONE
6423 034072 003 07 0 00 004216 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
6424 034073 321 11 0 00 034066 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
6425
6426 ;TEST AC LEFT HALF
6427 ;TEST ROT RIGHT TWO BIT POSITIONS
6428 ;TEST ABILITY TO ROTATE A ONE GHROUGH THE 36 BITS OF THE AR
6429 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
6430 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER
6431 ;BIT IS ONE AFTER ROTATING
6432 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
6433
6434 004217 SN=SN+1
6435 000010 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
6436 IFE ZZ,<ZZ=400000>
6437 000002 YY=ZZ/4 ;SELECTED BIT AFTER ROTATION
6438 034074 205 07 0 00 000010 MOVSI AC,ZZ ;SET BIT (N) OF AC LEFT
6439 IFG <ZZ-2>,<
6440 034075 205 06 0 00 000002 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
6441 IFE <ZZ-2>,<
6442 MOVEI AC-1,400000 ;SETUP FOR COMPARISON>
6443 IFE <ZZ-1>,<
6444 MOVEI AC-1,200000 ;SETUP FOR COMPARISON>
6445 034076 241 07 0 00 777776 ROT AC,-2 ;*ROTATE RIGHT TWO
6446 034077 312 07 0 00 000006 CAME AC,AC-1 ;TEST FOR BIT (N+2) A ONE
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6447 034100 003 07 0 00 004217 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
6448 034101 321 11 0 00 034074 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
6449
6450 ;TEST AC LEFT HALF
6451 ;TEST ROT RIGHT TWO BIT POSITIONS
6452 ;TEST ABILITY TO ROTATE A ONE GHROUGH THE 36 BITS OF THE AR
6453 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
6454 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER
6455 ;BIT IS ONE AFTER ROTATING
6456 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
6457
6458 004220 SN=SN+1
6459 000004 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
6460 IFE ZZ,<ZZ=400000>
6461 000001 YY=ZZ/4 ;SELECTED BIT AFTER ROTATION
6462 034102 205 07 0 00 000004 MOVSI AC,ZZ ;SET BIT (N) OF AC LEFT
6463 IFG <ZZ-2>,<
6464 034103 205 06 0 00 000001 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
6465 IFE <ZZ-2>,<
6466 MOVEI AC-1,400000 ;SETUP FOR COMPARISON>
6467 IFE <ZZ-1>,<
6468 MOVEI AC-1,200000 ;SETUP FOR COMPARISON>
6469 034104 241 07 0 00 777776 ROT AC,-2 ;*ROTATE RIGHT TWO
6470 034105 312 07 0 00 000006 CAME AC,AC-1 ;TEST FOR BIT (N+2) A ONE
6471 034106 003 07 0 00 004220 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
6472 034107 321 11 0 00 034102 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
6473
6474 ;TEST AC LEFT HALF
6475 ;TEST ROT RIGHT TWO BIT POSITIONS
6476 ;TEST ABILITY TO ROTATE A ONE GHROUGH THE 36 BITS OF THE AR
6477 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
6478 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER
6479 ;BIT IS ONE AFTER ROTATING
6480 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
6481
6482 004221 SN=SN+1
6483 000002 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
6484 IFE ZZ,<ZZ=400000>
6485 000000 YY=ZZ/4 ;SELECTED BIT AFTER ROTATION
6486 034110 205 07 0 00 000002 MOVSI AC,ZZ ;SET BIT (N) OF AC LEFT
6487 IFG <ZZ-2>,<
6488 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
6489 IFE <ZZ-2>,<
6490 034111 201 06 0 00 400000 MOVEI AC-1,400000 ;SETUP FOR COMPARISON>
6491 IFE <ZZ-1>,<
6492 MOVEI AC-1,200000 ;SETUP FOR COMPARISON>
6493 034112 241 07 0 00 777776 ROT AC,-2 ;*ROTATE RIGHT TWO
6494 034113 312 07 0 00 000006 CAME AC,AC-1 ;TEST FOR BIT (N+2) A ONE
6495 034114 003 07 0 00 004221 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
6496 034115 321 11 0 00 034110 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
6497
6498 ;TEST AC LEFT HALF
6499 ;TEST ROT RIGHT TWO BIT POSITIONS
6500 ;TEST ABILITY TO ROTATE A ONE GHROUGH THE 36 BITS OF THE AR
6501 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
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DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR SEQ 0147
6502 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER
6503 ;BIT IS ONE AFTER ROTATING
6504 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
6505
6506 004222 SN=SN+1
6507 000001 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
6508 IFE ZZ,<ZZ=400000>
6509 000000 YY=ZZ/4 ;SELECTED BIT AFTER ROTATION
6510 034116 205 07 0 00 000001 MOVSI AC,ZZ ;SET BIT (N) OF AC LEFT
6511 IFG <ZZ-2>,<
6512 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
6513 IFE <ZZ-2>,<
6514 MOVEI AC-1,400000 ;SETUP FOR COMPARISON>
6515 IFE <ZZ-1>,<
6516 034117 201 06 0 00 200000 MOVEI AC-1,200000 ;SETUP FOR COMPARISON>
6517 034120 241 07 0 00 777776 ROT AC,-2 ;*ROTATE RIGHT TWO
6518 034121 312 07 0 00 000006 CAME AC,AC-1 ;TEST FOR BIT (N+2) A ONE
6519 034122 003 07 0 00 004222 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
6520 034123 321 11 0 00 034116 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
6521
6522 PAGE
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DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR SEQ 0148
6523 000000 ZZ=0
6524
6525 REPEAT ^D18,< ;TEST AC RIGHT HALF
6526 ;TEST ROT RIGHT TWO BIT POSITIONS
6527 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
6528 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
6529 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
6530 ;ONE AFTER ROTATING
6531 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
6532
6533 SN=SN+1
6534 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
6535 IFE ZZ,<ZZ=400000>
6536 YY=ZZ/4 ;SELECTED BIT AFTER ROTATION
6537 MOVEI AC,ZZ ;SET BIT (N) OF AC RIGHT
6538 IFG <ZZ-2>,<
6539 MOVEI AC-1,YY ;SETUP FOR COMPARISON>
6540 IFE <ZZ-2>,<
6541 MOVSI AC-1,400000 ;SETUP FOR COMPARISON>
6542 IFE <ZZ-1>,<
6543 MOVSI AC-1,200000 ;SETUP FOR COMPARISON>
6544 ROT AC,-2 ;*ROTATE RIGHT TWO
6545 CAME AC,AC-1 ;TEST FOR BIT (N+2) A ONE
6546 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
6547 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
6548 >
6549 ;TEST AC RIGHT HALF
6550 ;TEST ROT RIGHT TWO BIT POSITIONS
6551 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
6552 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
6553 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
6554 ;ONE AFTER ROTATING
6555 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
6556
6557 004223 SN=SN+1
6558 000000 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
6559 400000 IFE ZZ,<ZZ=400000>
6560 100000 YY=ZZ/4 ;SELECTED BIT AFTER ROTATION
6561 034124 201 07 0 00 400000 MOVEI AC,ZZ ;SET BIT (N) OF AC RIGHT
6562 IFG <ZZ-2>,<
6563 034125 201 06 0 00 100000 MOVEI AC-1,YY ;SETUP FOR COMPARISON>
6564 IFE <ZZ-2>,<
6565 MOVSI AC-1,400000 ;SETUP FOR COMPARISON>
6566 IFE <ZZ-1>,<
6567 MOVSI AC-1,200000 ;SETUP FOR COMPARISON>
6568 034126 241 07 0 00 777776 ROT AC,-2 ;*ROTATE RIGHT TWO
6569 034127 312 07 0 00 000006 CAME AC,AC-1 ;TEST FOR BIT (N+2) A ONE
6570 034130 003 07 0 00 004223 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
6571 034131 321 11 0 00 034124 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
6572
6573 ;TEST AC RIGHT HALF
6574 ;TEST ROT RIGHT TWO BIT POSITIONS
6575 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
6576 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
6577 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
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DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR SEQ 0149
6578 ;ONE AFTER ROTATING
6579 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
6580
6581 004224 SN=SN+1
6582 200000 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
6583 IFE ZZ,<ZZ=400000>
6584 040000 YY=ZZ/4 ;SELECTED BIT AFTER ROTATION
6585 034132 201 07 0 00 200000 MOVEI AC,ZZ ;SET BIT (N) OF AC RIGHT
6586 IFG <ZZ-2>,<
6587 034133 201 06 0 00 040000 MOVEI AC-1,YY ;SETUP FOR COMPARISON>
6588 IFE <ZZ-2>,<
6589 MOVSI AC-1,400000 ;SETUP FOR COMPARISON>
6590 IFE <ZZ-1>,<
6591 MOVSI AC-1,200000 ;SETUP FOR COMPARISON>
6592 034134 241 07 0 00 777776 ROT AC,-2 ;*ROTATE RIGHT TWO
6593 034135 312 07 0 00 000006 CAME AC,AC-1 ;TEST FOR BIT (N+2) A ONE
6594 034136 003 07 0 00 004224 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
6595 034137 321 11 0 00 034132 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
6596
6597 ;TEST AC RIGHT HALF
6598 ;TEST ROT RIGHT TWO BIT POSITIONS
6599 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
6600 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
6601 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
6602 ;ONE AFTER ROTATING
6603 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
6604
6605 004225 SN=SN+1
6606 100000 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
6607 IFE ZZ,<ZZ=400000>
6608 020000 YY=ZZ/4 ;SELECTED BIT AFTER ROTATION
6609 034140 201 07 0 00 100000 MOVEI AC,ZZ ;SET BIT (N) OF AC RIGHT
6610 IFG <ZZ-2>,<
6611 034141 201 06 0 00 020000 MOVEI AC-1,YY ;SETUP FOR COMPARISON>
6612 IFE <ZZ-2>,<
6613 MOVSI AC-1,400000 ;SETUP FOR COMPARISON>
6614 IFE <ZZ-1>,<
6615 MOVSI AC-1,200000 ;SETUP FOR COMPARISON>
6616 034142 241 07 0 00 777776 ROT AC,-2 ;*ROTATE RIGHT TWO
6617 034143 312 07 0 00 000006 CAME AC,AC-1 ;TEST FOR BIT (N+2) A ONE
6618 034144 003 07 0 00 004225 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
6619 034145 321 11 0 00 034140 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
6620
6621 ;TEST AC RIGHT HALF
6622 ;TEST ROT RIGHT TWO BIT POSITIONS
6623 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
6624 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
6625 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
6626 ;ONE AFTER ROTATING
6627 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
6628
6629 004226 SN=SN+1
6630 040000 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
6631 IFE ZZ,<ZZ=400000>
6632 010000 YY=ZZ/4 ;SELECTED BIT AFTER ROTATION
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DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR SEQ 0150
6633 034146 201 07 0 00 040000 MOVEI AC,ZZ ;SET BIT (N) OF AC RIGHT
6634 IFG <ZZ-2>,<
6635 034147 201 06 0 00 010000 MOVEI AC-1,YY ;SETUP FOR COMPARISON>
6636 IFE <ZZ-2>,<
6637 MOVSI AC-1,400000 ;SETUP FOR COMPARISON>
6638 IFE <ZZ-1>,<
6639 MOVSI AC-1,200000 ;SETUP FOR COMPARISON>
6640 034150 241 07 0 00 777776 ROT AC,-2 ;*ROTATE RIGHT TWO
6641 034151 312 07 0 00 000006 CAME AC,AC-1 ;TEST FOR BIT (N+2) A ONE
6642 034152 003 07 0 00 004226 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
6643 034153 321 11 0 00 034146 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
6644
6645 ;TEST AC RIGHT HALF
6646 ;TEST ROT RIGHT TWO BIT POSITIONS
6647 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
6648 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
6649 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
6650 ;ONE AFTER ROTATING
6651 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
6652
6653 004227 SN=SN+1
6654 020000 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
6655 IFE ZZ,<ZZ=400000>
6656 004000 YY=ZZ/4 ;SELECTED BIT AFTER ROTATION
6657 034154 201 07 0 00 020000 MOVEI AC,ZZ ;SET BIT (N) OF AC RIGHT
6658 IFG <ZZ-2>,<
6659 034155 201 06 0 00 004000 MOVEI AC-1,YY ;SETUP FOR COMPARISON>
6660 IFE <ZZ-2>,<
6661 MOVSI AC-1,400000 ;SETUP FOR COMPARISON>
6662 IFE <ZZ-1>,<
6663 MOVSI AC-1,200000 ;SETUP FOR COMPARISON>
6664 034156 241 07 0 00 777776 ROT AC,-2 ;*ROTATE RIGHT TWO
6665 034157 312 07 0 00 000006 CAME AC,AC-1 ;TEST FOR BIT (N+2) A ONE
6666 034160 003 07 0 00 004227 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
6667 034161 321 11 0 00 034154 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
6668
6669 ;TEST AC RIGHT HALF
6670 ;TEST ROT RIGHT TWO BIT POSITIONS
6671 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
6672 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
6673 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
6674 ;ONE AFTER ROTATING
6675 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
6676
6677 004230 SN=SN+1
6678 010000 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
6679 IFE ZZ,<ZZ=400000>
6680 002000 YY=ZZ/4 ;SELECTED BIT AFTER ROTATION
6681 034162 201 07 0 00 010000 MOVEI AC,ZZ ;SET BIT (N) OF AC RIGHT
6682 IFG <ZZ-2>,<
6683 034163 201 06 0 00 002000 MOVEI AC-1,YY ;SETUP FOR COMPARISON>
6684 IFE <ZZ-2>,<
6685 MOVSI AC-1,400000 ;SETUP FOR COMPARISON>
6686 IFE <ZZ-1>,<
6687 MOVSI AC-1,200000 ;SETUP FOR COMPARISON>
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DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR SEQ 0151
6688 034164 241 07 0 00 777776 ROT AC,-2 ;*ROTATE RIGHT TWO
6689 034165 312 07 0 00 000006 CAME AC,AC-1 ;TEST FOR BIT (N+2) A ONE
6690 034166 003 07 0 00 004230 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
6691 034167 321 11 0 00 034162 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
6692
6693 ;TEST AC RIGHT HALF
6694 ;TEST ROT RIGHT TWO BIT POSITIONS
6695 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
6696 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
6697 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
6698 ;ONE AFTER ROTATING
6699 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
6700
6701 004231 SN=SN+1
6702 004000 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
6703 IFE ZZ,<ZZ=400000>
6704 001000 YY=ZZ/4 ;SELECTED BIT AFTER ROTATION
6705 034170 201 07 0 00 004000 MOVEI AC,ZZ ;SET BIT (N) OF AC RIGHT
6706 IFG <ZZ-2>,<
6707 034171 201 06 0 00 001000 MOVEI AC-1,YY ;SETUP FOR COMPARISON>
6708 IFE <ZZ-2>,<
6709 MOVSI AC-1,400000 ;SETUP FOR COMPARISON>
6710 IFE <ZZ-1>,<
6711 MOVSI AC-1,200000 ;SETUP FOR COMPARISON>
6712 034172 241 07 0 00 777776 ROT AC,-2 ;*ROTATE RIGHT TWO
6713 034173 312 07 0 00 000006 CAME AC,AC-1 ;TEST FOR BIT (N+2) A ONE
6714 034174 003 07 0 00 004231 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
6715 034175 321 11 0 00 034170 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
6716
6717 ;TEST AC RIGHT HALF
6718 ;TEST ROT RIGHT TWO BIT POSITIONS
6719 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
6720 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
6721 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
6722 ;ONE AFTER ROTATING
6723 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
6724
6725 004232 SN=SN+1
6726 002000 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
6727 IFE ZZ,<ZZ=400000>
6728 000400 YY=ZZ/4 ;SELECTED BIT AFTER ROTATION
6729 034176 201 07 0 00 002000 MOVEI AC,ZZ ;SET BIT (N) OF AC RIGHT
6730 IFG <ZZ-2>,<
6731 034177 201 06 0 00 000400 MOVEI AC-1,YY ;SETUP FOR COMPARISON>
6732 IFE <ZZ-2>,<
6733 MOVSI AC-1,400000 ;SETUP FOR COMPARISON>
6734 IFE <ZZ-1>,<
6735 MOVSI AC-1,200000 ;SETUP FOR COMPARISON>
6736 034200 241 07 0 00 777776 ROT AC,-2 ;*ROTATE RIGHT TWO
6737 034201 312 07 0 00 000006 CAME AC,AC-1 ;TEST FOR BIT (N+2) A ONE
6738 034202 003 07 0 00 004232 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
6739 034203 321 11 0 00 034176 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
6740
6741 ;TEST AC RIGHT HALF
6742 ;TEST ROT RIGHT TWO BIT POSITIONS
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DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR SEQ 0152
6743 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
6744 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
6745 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
6746 ;ONE AFTER ROTATING
6747 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
6748
6749 004233 SN=SN+1
6750 001000 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
6751 IFE ZZ,<ZZ=400000>
6752 000200 YY=ZZ/4 ;SELECTED BIT AFTER ROTATION
6753 034204 201 07 0 00 001000 MOVEI AC,ZZ ;SET BIT (N) OF AC RIGHT
6754 IFG <ZZ-2>,<
6755 034205 201 06 0 00 000200 MOVEI AC-1,YY ;SETUP FOR COMPARISON>
6756 IFE <ZZ-2>,<
6757 MOVSI AC-1,400000 ;SETUP FOR COMPARISON>
6758 IFE <ZZ-1>,<
6759 MOVSI AC-1,200000 ;SETUP FOR COMPARISON>
6760 034206 241 07 0 00 777776 ROT AC,-2 ;*ROTATE RIGHT TWO
6761 034207 312 07 0 00 000006 CAME AC,AC-1 ;TEST FOR BIT (N+2) A ONE
6762 034210 003 07 0 00 004233 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
6763 034211 321 11 0 00 034204 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
6764
6765 ;TEST AC RIGHT HALF
6766 ;TEST ROT RIGHT TWO BIT POSITIONS
6767 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
6768 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
6769 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
6770 ;ONE AFTER ROTATING
6771 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
6772
6773 004234 SN=SN+1
6774 000400 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
6775 IFE ZZ,<ZZ=400000>
6776 000100 YY=ZZ/4 ;SELECTED BIT AFTER ROTATION
6777 034212 201 07 0 00 000400 MOVEI AC,ZZ ;SET BIT (N) OF AC RIGHT
6778 IFG <ZZ-2>,<
6779 034213 201 06 0 00 000100 MOVEI AC-1,YY ;SETUP FOR COMPARISON>
6780 IFE <ZZ-2>,<
6781 MOVSI AC-1,400000 ;SETUP FOR COMPARISON>
6782 IFE <ZZ-1>,<
6783 MOVSI AC-1,200000 ;SETUP FOR COMPARISON>
6784 034214 241 07 0 00 777776 ROT AC,-2 ;*ROTATE RIGHT TWO
6785 034215 312 07 0 00 000006 CAME AC,AC-1 ;TEST FOR BIT (N+2) A ONE
6786 034216 003 07 0 00 004234 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
6787 034217 321 11 0 00 034212 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
6788
6789 ;TEST AC RIGHT HALF
6790 ;TEST ROT RIGHT TWO BIT POSITIONS
6791 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
6792 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
6793 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
6794 ;ONE AFTER ROTATING
6795 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
6796
6797 004235 SN=SN+1
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 17-14
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR SEQ 0153
6798 000200 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
6799 IFE ZZ,<ZZ=400000>
6800 000040 YY=ZZ/4 ;SELECTED BIT AFTER ROTATION
6801 034220 201 07 0 00 000200 MOVEI AC,ZZ ;SET BIT (N) OF AC RIGHT
6802 IFG <ZZ-2>,<
6803 034221 201 06 0 00 000040 MOVEI AC-1,YY ;SETUP FOR COMPARISON>
6804 IFE <ZZ-2>,<
6805 MOVSI AC-1,400000 ;SETUP FOR COMPARISON>
6806 IFE <ZZ-1>,<
6807 MOVSI AC-1,200000 ;SETUP FOR COMPARISON>
6808 034222 241 07 0 00 777776 ROT AC,-2 ;*ROTATE RIGHT TWO
6809 034223 312 07 0 00 000006 CAME AC,AC-1 ;TEST FOR BIT (N+2) A ONE
6810 034224 003 07 0 00 004235 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
6811 034225 321 11 0 00 034220 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
6812
6813 ;TEST AC RIGHT HALF
6814 ;TEST ROT RIGHT TWO BIT POSITIONS
6815 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
6816 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
6817 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
6818 ;ONE AFTER ROTATING
6819 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
6820
6821 004236 SN=SN+1
6822 000100 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
6823 IFE ZZ,<ZZ=400000>
6824 000020 YY=ZZ/4 ;SELECTED BIT AFTER ROTATION
6825 034226 201 07 0 00 000100 MOVEI AC,ZZ ;SET BIT (N) OF AC RIGHT
6826 IFG <ZZ-2>,<
6827 034227 201 06 0 00 000020 MOVEI AC-1,YY ;SETUP FOR COMPARISON>
6828 IFE <ZZ-2>,<
6829 MOVSI AC-1,400000 ;SETUP FOR COMPARISON>
6830 IFE <ZZ-1>,<
6831 MOVSI AC-1,200000 ;SETUP FOR COMPARISON>
6832 034230 241 07 0 00 777776 ROT AC,-2 ;*ROTATE RIGHT TWO
6833 034231 312 07 0 00 000006 CAME AC,AC-1 ;TEST FOR BIT (N+2) A ONE
6834 034232 003 07 0 00 004236 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
6835 034233 321 11 0 00 034226 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
6836
6837 ;TEST AC RIGHT HALF
6838 ;TEST ROT RIGHT TWO BIT POSITIONS
6839 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
6840 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
6841 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
6842 ;ONE AFTER ROTATING
6843 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
6844
6845 004237 SN=SN+1
6846 000040 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
6847 IFE ZZ,<ZZ=400000>
6848 000010 YY=ZZ/4 ;SELECTED BIT AFTER ROTATION
6849 034234 201 07 0 00 000040 MOVEI AC,ZZ ;SET BIT (N) OF AC RIGHT
6850 IFG <ZZ-2>,<
6851 034235 201 06 0 00 000010 MOVEI AC-1,YY ;SETUP FOR COMPARISON>
6852 IFE <ZZ-2>,<
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DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR SEQ 0154
6853 MOVSI AC-1,400000 ;SETUP FOR COMPARISON>
6854 IFE <ZZ-1>,<
6855 MOVSI AC-1,200000 ;SETUP FOR COMPARISON>
6856 034236 241 07 0 00 777776 ROT AC,-2 ;*ROTATE RIGHT TWO
6857 034237 312 07 0 00 000006 CAME AC,AC-1 ;TEST FOR BIT (N+2) A ONE
6858 034240 003 07 0 00 004237 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
6859 034241 321 11 0 00 034234 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
6860
6861 ;TEST AC RIGHT HALF
6862 ;TEST ROT RIGHT TWO BIT POSITIONS
6863 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
6864 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
6865 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
6866 ;ONE AFTER ROTATING
6867 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
6868
6869 004240 SN=SN+1
6870 000020 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
6871 IFE ZZ,<ZZ=400000>
6872 000004 YY=ZZ/4 ;SELECTED BIT AFTER ROTATION
6873 034242 201 07 0 00 000020 MOVEI AC,ZZ ;SET BIT (N) OF AC RIGHT
6874 IFG <ZZ-2>,<
6875 034243 201 06 0 00 000004 MOVEI AC-1,YY ;SETUP FOR COMPARISON>
6876 IFE <ZZ-2>,<
6877 MOVSI AC-1,400000 ;SETUP FOR COMPARISON>
6878 IFE <ZZ-1>,<
6879 MOVSI AC-1,200000 ;SETUP FOR COMPARISON>
6880 034244 241 07 0 00 777776 ROT AC,-2 ;*ROTATE RIGHT TWO
6881 034245 312 07 0 00 000006 CAME AC,AC-1 ;TEST FOR BIT (N+2) A ONE
6882 034246 003 07 0 00 004240 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
6883 034247 321 11 0 00 034242 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
6884
6885 ;TEST AC RIGHT HALF
6886 ;TEST ROT RIGHT TWO BIT POSITIONS
6887 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
6888 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
6889 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
6890 ;ONE AFTER ROTATING
6891 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
6892
6893 004241 SN=SN+1
6894 000010 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
6895 IFE ZZ,<ZZ=400000>
6896 000002 YY=ZZ/4 ;SELECTED BIT AFTER ROTATION
6897 034250 201 07 0 00 000010 MOVEI AC,ZZ ;SET BIT (N) OF AC RIGHT
6898 IFG <ZZ-2>,<
6899 034251 201 06 0 00 000002 MOVEI AC-1,YY ;SETUP FOR COMPARISON>
6900 IFE <ZZ-2>,<
6901 MOVSI AC-1,400000 ;SETUP FOR COMPARISON>
6902 IFE <ZZ-1>,<
6903 MOVSI AC-1,200000 ;SETUP FOR COMPARISON>
6904 034252 241 07 0 00 777776 ROT AC,-2 ;*ROTATE RIGHT TWO
6905 034253 312 07 0 00 000006 CAME AC,AC-1 ;TEST FOR BIT (N+2) A ONE
6906 034254 003 07 0 00 004241 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
6907 034255 321 11 0 00 034250 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
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DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR SEQ 0155
6908
6909 ;TEST AC RIGHT HALF
6910 ;TEST ROT RIGHT TWO BIT POSITIONS
6911 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
6912 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
6913 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
6914 ;ONE AFTER ROTATING
6915 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
6916
6917 004242 SN=SN+1
6918 000004 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
6919 IFE ZZ,<ZZ=400000>
6920 000001 YY=ZZ/4 ;SELECTED BIT AFTER ROTATION
6921 034256 201 07 0 00 000004 MOVEI AC,ZZ ;SET BIT (N) OF AC RIGHT
6922 IFG <ZZ-2>,<
6923 034257 201 06 0 00 000001 MOVEI AC-1,YY ;SETUP FOR COMPARISON>
6924 IFE <ZZ-2>,<
6925 MOVSI AC-1,400000 ;SETUP FOR COMPARISON>
6926 IFE <ZZ-1>,<
6927 MOVSI AC-1,200000 ;SETUP FOR COMPARISON>
6928 034260 241 07 0 00 777776 ROT AC,-2 ;*ROTATE RIGHT TWO
6929 034261 312 07 0 00 000006 CAME AC,AC-1 ;TEST FOR BIT (N+2) A ONE
6930 034262 003 07 0 00 004242 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
6931 034263 321 11 0 00 034256 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
6932
6933 ;TEST AC RIGHT HALF
6934 ;TEST ROT RIGHT TWO BIT POSITIONS
6935 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
6936 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
6937 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
6938 ;ONE AFTER ROTATING
6939 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
6940
6941 004243 SN=SN+1
6942 000002 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
6943 IFE ZZ,<ZZ=400000>
6944 000000 YY=ZZ/4 ;SELECTED BIT AFTER ROTATION
6945 034264 201 07 0 00 000002 MOVEI AC,ZZ ;SET BIT (N) OF AC RIGHT
6946 IFG <ZZ-2>,<
6947 MOVEI AC-1,YY ;SETUP FOR COMPARISON>
6948 IFE <ZZ-2>,<
6949 034265 205 06 0 00 400000 MOVSI AC-1,400000 ;SETUP FOR COMPARISON>
6950 IFE <ZZ-1>,<
6951 MOVSI AC-1,200000 ;SETUP FOR COMPARISON>
6952 034266 241 07 0 00 777776 ROT AC,-2 ;*ROTATE RIGHT TWO
6953 034267 312 07 0 00 000006 CAME AC,AC-1 ;TEST FOR BIT (N+2) A ONE
6954 034270 003 07 0 00 004243 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
6955 034271 321 11 0 00 034264 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
6956
6957 ;TEST AC RIGHT HALF
6958 ;TEST ROT RIGHT TWO BIT POSITIONS
6959 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
6960 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
6961 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
6962 ;ONE AFTER ROTATING
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6963 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
6964
6965 004244 SN=SN+1
6966 000001 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
6967 IFE ZZ,<ZZ=400000>
6968 000000 YY=ZZ/4 ;SELECTED BIT AFTER ROTATION
6969 034272 201 07 0 00 000001 MOVEI AC,ZZ ;SET BIT (N) OF AC RIGHT
6970 IFG <ZZ-2>,<
6971 MOVEI AC-1,YY ;SETUP FOR COMPARISON>
6972 IFE <ZZ-2>,<
6973 MOVSI AC-1,400000 ;SETUP FOR COMPARISON>
6974 IFE <ZZ-1>,<
6975 034273 205 06 0 00 200000 MOVSI AC-1,200000 ;SETUP FOR COMPARISON>
6976 034274 241 07 0 00 777776 ROT AC,-2 ;*ROTATE RIGHT TWO
6977 034275 312 07 0 00 000006 CAME AC,AC-1 ;TEST FOR BIT (N+2) A ONE
6978 034276 003 07 0 00 004244 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
6979 034277 321 11 0 00 034272 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
6980
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DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR SEQ 0157
6981 004300 SN=4300
6982 000001 ZZ=1
6983
6984 E4300: REPEAT ^D18,< ;TEST AC LEFT HALF
6985 ;TEST ROT RIGHT TWO BIT POSITIONS
6986 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
6987 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
6988 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
6989 ;IS ZERO AFTER ROTATING.
6990 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
6991
6992 SN=SN+1
6993 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
6994 IFE <ZZ>,<ZZ=777777377777>
6995 YY=<<ZZ-3>/4>&777777 ;SELECTED BIT AFTER ROTATION
6996 HRLOI AC,ZZ&777777 ;CLEAR BIT (N) OF AC LEFT
6997 IFL <ZZ&777777-777775>,<
6998 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
6999 IFE <ZZ&777777-777775>,<
7000 HRROI AC-1,377777 ;SETUP FOR COMPARISON>
7001 IFE <ZZ&777777-777776>,<
7002 HRROI AC-1,577777 ;SETUP FOR COMPARISON>
7003 ROT AC,-2 ;*ROTATE RIGHT TWO
7004 CAME AC,AC-1 ;TEST FOR BIT (N+2) A ZERO
7005 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
7006 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
7007 >
7008 ;TEST AC LEFT HALF
7009 ;TEST ROT RIGHT TWO BIT POSITIONS
7010 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
7011 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
7012 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
7013 ;IS ZERO AFTER ROTATING.
7014 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
7015
7016 004301 SN=SN+1
7017 000000 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
7018 777777 377777 IFE <ZZ>,<ZZ=777777377777>
7019 677777 YY=<<ZZ-3>/4>&777777 ;SELECTED BIT AFTER ROTATION
7020 034300 525 07 0 00 377777 HRLOI AC,ZZ&777777 ;CLEAR BIT (N) OF AC LEFT
7021 IFL <ZZ&777777-777775>,<
7022 034301 525 06 0 00 677777 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
7023 IFE <ZZ&777777-777775>,<
7024 HRROI AC-1,377777 ;SETUP FOR COMPARISON>
7025 IFE <ZZ&777777-777776>,<
7026 HRROI AC-1,577777 ;SETUP FOR COMPARISON>
7027 034302 241 07 0 00 777776 ROT AC,-2 ;*ROTATE RIGHT TWO
7028 034303 312 07 0 00 000006 CAME AC,AC-1 ;TEST FOR BIT (N+2) A ZERO
7029 034304 003 07 0 00 004301 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
7030 034305 321 11 0 00 034300 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
7031
7032 ;TEST AC LEFT HALF
7033 ;TEST ROT RIGHT TWO BIT POSITIONS
7034 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
7035 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
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7036 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
7037 ;IS ZERO AFTER ROTATING.
7038 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
7039
7040 004302 SN=SN+1
7041 777777 577777 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
7042 IFE <ZZ>,<ZZ=777777377777>
7043 737777 YY=<<ZZ-3>/4>&777777 ;SELECTED BIT AFTER ROTATION
7044 034306 525 07 0 00 577777 HRLOI AC,ZZ&777777 ;CLEAR BIT (N) OF AC LEFT
7045 IFL <ZZ&777777-777775>,<
7046 034307 525 06 0 00 737777 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
7047 IFE <ZZ&777777-777775>,<
7048 HRROI AC-1,377777 ;SETUP FOR COMPARISON>
7049 IFE <ZZ&777777-777776>,<
7050 HRROI AC-1,577777 ;SETUP FOR COMPARISON>
7051 034310 241 07 0 00 777776 ROT AC,-2 ;*ROTATE RIGHT TWO
7052 034311 312 07 0 00 000006 CAME AC,AC-1 ;TEST FOR BIT (N+2) A ZERO
7053 034312 003 07 0 00 004302 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
7054 034313 321 11 0 00 034306 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
7055
7056 ;TEST AC LEFT HALF
7057 ;TEST ROT RIGHT TWO BIT POSITIONS
7058 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
7059 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
7060 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
7061 ;IS ZERO AFTER ROTATING.
7062 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
7063
7064 004303 SN=SN+1
7065 777777 677777 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
7066 IFE <ZZ>,<ZZ=777777377777>
7067 757777 YY=<<ZZ-3>/4>&777777 ;SELECTED BIT AFTER ROTATION
7068 034314 525 07 0 00 677777 HRLOI AC,ZZ&777777 ;CLEAR BIT (N) OF AC LEFT
7069 IFL <ZZ&777777-777775>,<
7070 034315 525 06 0 00 757777 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
7071 IFE <ZZ&777777-777775>,<
7072 HRROI AC-1,377777 ;SETUP FOR COMPARISON>
7073 IFE <ZZ&777777-777776>,<
7074 HRROI AC-1,577777 ;SETUP FOR COMPARISON>
7075 034316 241 07 0 00 777776 ROT AC,-2 ;*ROTATE RIGHT TWO
7076 034317 312 07 0 00 000006 CAME AC,AC-1 ;TEST FOR BIT (N+2) A ZERO
7077 034320 003 07 0 00 004303 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
7078 034321 321 11 0 00 034314 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
7079
7080 ;TEST AC LEFT HALF
7081 ;TEST ROT RIGHT TWO BIT POSITIONS
7082 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
7083 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
7084 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
7085 ;IS ZERO AFTER ROTATING.
7086 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
7087
7088 004304 SN=SN+1
7089 777777 737777 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
7090 IFE <ZZ>,<ZZ=777777377777>
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7091 767777 YY=<<ZZ-3>/4>&777777 ;SELECTED BIT AFTER ROTATION
7092 034322 525 07 0 00 737777 HRLOI AC,ZZ&777777 ;CLEAR BIT (N) OF AC LEFT
7093 IFL <ZZ&777777-777775>,<
7094 034323 525 06 0 00 767777 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
7095 IFE <ZZ&777777-777775>,<
7096 HRROI AC-1,377777 ;SETUP FOR COMPARISON>
7097 IFE <ZZ&777777-777776>,<
7098 HRROI AC-1,577777 ;SETUP FOR COMPARISON>
7099 034324 241 07 0 00 777776 ROT AC,-2 ;*ROTATE RIGHT TWO
7100 034325 312 07 0 00 000006 CAME AC,AC-1 ;TEST FOR BIT (N+2) A ZERO
7101 034326 003 07 0 00 004304 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
7102 034327 321 11 0 00 034322 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
7103
7104 ;TEST AC LEFT HALF
7105 ;TEST ROT RIGHT TWO BIT POSITIONS
7106 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
7107 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
7108 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
7109 ;IS ZERO AFTER ROTATING.
7110 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
7111
7112 004305 SN=SN+1
7113 777777 757777 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
7114 IFE <ZZ>,<ZZ=777777377777>
7115 773777 YY=<<ZZ-3>/4>&777777 ;SELECTED BIT AFTER ROTATION
7116 034330 525 07 0 00 757777 HRLOI AC,ZZ&777777 ;CLEAR BIT (N) OF AC LEFT
7117 IFL <ZZ&777777-777775>,<
7118 034331 525 06 0 00 773777 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
7119 IFE <ZZ&777777-777775>,<
7120 HRROI AC-1,377777 ;SETUP FOR COMPARISON>
7121 IFE <ZZ&777777-777776>,<
7122 HRROI AC-1,577777 ;SETUP FOR COMPARISON>
7123 034332 241 07 0 00 777776 ROT AC,-2 ;*ROTATE RIGHT TWO
7124 034333 312 07 0 00 000006 CAME AC,AC-1 ;TEST FOR BIT (N+2) A ZERO
7125 034334 003 07 0 00 004305 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
7126 034335 321 11 0 00 034330 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
7127
7128 ;TEST AC LEFT HALF
7129 ;TEST ROT RIGHT TWO BIT POSITIONS
7130 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
7131 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
7132 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
7133 ;IS ZERO AFTER ROTATING.
7134 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
7135
7136 004306 SN=SN+1
7137 777777 767777 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
7138 IFE <ZZ>,<ZZ=777777377777>
7139 775777 YY=<<ZZ-3>/4>&777777 ;SELECTED BIT AFTER ROTATION
7140 034336 525 07 0 00 767777 HRLOI AC,ZZ&777777 ;CLEAR BIT (N) OF AC LEFT
7141 IFL <ZZ&777777-777775>,<
7142 034337 525 06 0 00 775777 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
7143 IFE <ZZ&777777-777775>,<
7144 HRROI AC-1,377777 ;SETUP FOR COMPARISON>
7145 IFE <ZZ&777777-777776>,<
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7146 HRROI AC-1,577777 ;SETUP FOR COMPARISON>
7147 034340 241 07 0 00 777776 ROT AC,-2 ;*ROTATE RIGHT TWO
7148 034341 312 07 0 00 000006 CAME AC,AC-1 ;TEST FOR BIT (N+2) A ZERO
7149 034342 003 07 0 00 004306 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
7150 034343 321 11 0 00 034336 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
7151
7152 ;TEST AC LEFT HALF
7153 ;TEST ROT RIGHT TWO BIT POSITIONS
7154 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
7155 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
7156 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
7157 ;IS ZERO AFTER ROTATING.
7158 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
7159
7160 004307 SN=SN+1
7161 777777 773777 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
7162 IFE <ZZ>,<ZZ=777777377777>
7163 776777 YY=<<ZZ-3>/4>&777777 ;SELECTED BIT AFTER ROTATION
7164 034344 525 07 0 00 773777 HRLOI AC,ZZ&777777 ;CLEAR BIT (N) OF AC LEFT
7165 IFL <ZZ&777777-777775>,<
7166 034345 525 06 0 00 776777 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
7167 IFE <ZZ&777777-777775>,<
7168 HRROI AC-1,377777 ;SETUP FOR COMPARISON>
7169 IFE <ZZ&777777-777776>,<
7170 HRROI AC-1,577777 ;SETUP FOR COMPARISON>
7171 034346 241 07 0 00 777776 ROT AC,-2 ;*ROTATE RIGHT TWO
7172 034347 312 07 0 00 000006 CAME AC,AC-1 ;TEST FOR BIT (N+2) A ZERO
7173 034350 003 07 0 00 004307 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
7174 034351 321 11 0 00 034344 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
7175
7176 ;TEST AC LEFT HALF
7177 ;TEST ROT RIGHT TWO BIT POSITIONS
7178 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
7179 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
7180 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
7181 ;IS ZERO AFTER ROTATING.
7182 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
7183
7184 004310 SN=SN+1
7185 777777 775777 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
7186 IFE <ZZ>,<ZZ=777777377777>
7187 777377 YY=<<ZZ-3>/4>&777777 ;SELECTED BIT AFTER ROTATION
7188 034352 525 07 0 00 775777 HRLOI AC,ZZ&777777 ;CLEAR BIT (N) OF AC LEFT
7189 IFL <ZZ&777777-777775>,<
7190 034353 525 06 0 00 777377 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
7191 IFE <ZZ&777777-777775>,<
7192 HRROI AC-1,377777 ;SETUP FOR COMPARISON>
7193 IFE <ZZ&777777-777776>,<
7194 HRROI AC-1,577777 ;SETUP FOR COMPARISON>
7195 034354 241 07 0 00 777776 ROT AC,-2 ;*ROTATE RIGHT TWO
7196 034355 312 07 0 00 000006 CAME AC,AC-1 ;TEST FOR BIT (N+2) A ZERO
7197 034356 003 07 0 00 004310 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
7198 034357 321 11 0 00 034352 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
7199
7200 ;TEST AC LEFT HALF
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7201 ;TEST ROT RIGHT TWO BIT POSITIONS
7202 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
7203 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
7204 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
7205 ;IS ZERO AFTER ROTATING.
7206 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
7207
7208 004311 SN=SN+1
7209 777777 776777 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
7210 IFE <ZZ>,<ZZ=777777377777>
7211 777577 YY=<<ZZ-3>/4>&777777 ;SELECTED BIT AFTER ROTATION
7212 034360 525 07 0 00 776777 HRLOI AC,ZZ&777777 ;CLEAR BIT (N) OF AC LEFT
7213 IFL <ZZ&777777-777775>,<
7214 034361 525 06 0 00 777577 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
7215 IFE <ZZ&777777-777775>,<
7216 HRROI AC-1,377777 ;SETUP FOR COMPARISON>
7217 IFE <ZZ&777777-777776>,<
7218 HRROI AC-1,577777 ;SETUP FOR COMPARISON>
7219 034362 241 07 0 00 777776 ROT AC,-2 ;*ROTATE RIGHT TWO
7220 034363 312 07 0 00 000006 CAME AC,AC-1 ;TEST FOR BIT (N+2) A ZERO
7221 034364 003 07 0 00 004311 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
7222 034365 321 11 0 00 034360 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
7223
7224 ;TEST AC LEFT HALF
7225 ;TEST ROT RIGHT TWO BIT POSITIONS
7226 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
7227 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
7228 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
7229 ;IS ZERO AFTER ROTATING.
7230 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
7231
7232 004312 SN=SN+1
7233 777777 777377 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
7234 IFE <ZZ>,<ZZ=777777377777>
7235 777677 YY=<<ZZ-3>/4>&777777 ;SELECTED BIT AFTER ROTATION
7236 034366 525 07 0 00 777377 HRLOI AC,ZZ&777777 ;CLEAR BIT (N) OF AC LEFT
7237 IFL <ZZ&777777-777775>,<
7238 034367 525 06 0 00 777677 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
7239 IFE <ZZ&777777-777775>,<
7240 HRROI AC-1,377777 ;SETUP FOR COMPARISON>
7241 IFE <ZZ&777777-777776>,<
7242 HRROI AC-1,577777 ;SETUP FOR COMPARISON>
7243 034370 241 07 0 00 777776 ROT AC,-2 ;*ROTATE RIGHT TWO
7244 034371 312 07 0 00 000006 CAME AC,AC-1 ;TEST FOR BIT (N+2) A ZERO
7245 034372 003 07 0 00 004312 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
7246 034373 321 11 0 00 034366 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
7247
7248 ;TEST AC LEFT HALF
7249 ;TEST ROT RIGHT TWO BIT POSITIONS
7250 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
7251 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
7252 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
7253 ;IS ZERO AFTER ROTATING.
7254 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
7255
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 18-5
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR SEQ 0162
7256 004313 SN=SN+1
7257 777777 777577 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
7258 IFE <ZZ>,<ZZ=777777377777>
7259 777737 YY=<<ZZ-3>/4>&777777 ;SELECTED BIT AFTER ROTATION
7260 034374 525 07 0 00 777577 HRLOI AC,ZZ&777777 ;CLEAR BIT (N) OF AC LEFT
7261 IFL <ZZ&777777-777775>,<
7262 034375 525 06 0 00 777737 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
7263 IFE <ZZ&777777-777775>,<
7264 HRROI AC-1,377777 ;SETUP FOR COMPARISON>
7265 IFE <ZZ&777777-777776>,<
7266 HRROI AC-1,577777 ;SETUP FOR COMPARISON>
7267 034376 241 07 0 00 777776 ROT AC,-2 ;*ROTATE RIGHT TWO
7268 034377 312 07 0 00 000006 CAME AC,AC-1 ;TEST FOR BIT (N+2) A ZERO
7269 034400 003 07 0 00 004313 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
7270 034401 321 11 0 00 034374 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
7271
7272 ;TEST AC LEFT HALF
7273 ;TEST ROT RIGHT TWO BIT POSITIONS
7274 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
7275 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
7276 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
7277 ;IS ZERO AFTER ROTATING.
7278 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
7279
7280 004314 SN=SN+1
7281 777777 777677 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
7282 IFE <ZZ>,<ZZ=777777377777>
7283 777757 YY=<<ZZ-3>/4>&777777 ;SELECTED BIT AFTER ROTATION
7284 034402 525 07 0 00 777677 HRLOI AC,ZZ&777777 ;CLEAR BIT (N) OF AC LEFT
7285 IFL <ZZ&777777-777775>,<
7286 034403 525 06 0 00 777757 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
7287 IFE <ZZ&777777-777775>,<
7288 HRROI AC-1,377777 ;SETUP FOR COMPARISON>
7289 IFE <ZZ&777777-777776>,<
7290 HRROI AC-1,577777 ;SETUP FOR COMPARISON>
7291 034404 241 07 0 00 777776 ROT AC,-2 ;*ROTATE RIGHT TWO
7292 034405 312 07 0 00 000006 CAME AC,AC-1 ;TEST FOR BIT (N+2) A ZERO
7293 034406 003 07 0 00 004314 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
7294 034407 321 11 0 00 034402 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
7295
7296 ;TEST AC LEFT HALF
7297 ;TEST ROT RIGHT TWO BIT POSITIONS
7298 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
7299 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
7300 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
7301 ;IS ZERO AFTER ROTATING.
7302 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
7303
7304 004315 SN=SN+1
7305 777777 777737 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
7306 IFE <ZZ>,<ZZ=777777377777>
7307 777767 YY=<<ZZ-3>/4>&777777 ;SELECTED BIT AFTER ROTATION
7308 034410 525 07 0 00 777737 HRLOI AC,ZZ&777777 ;CLEAR BIT (N) OF AC LEFT
7309 IFL <ZZ&777777-777775>,<
7310 034411 525 06 0 00 777767 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 18-6
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR SEQ 0163
7311 IFE <ZZ&777777-777775>,<
7312 HRROI AC-1,377777 ;SETUP FOR COMPARISON>
7313 IFE <ZZ&777777-777776>,<
7314 HRROI AC-1,577777 ;SETUP FOR COMPARISON>
7315 034412 241 07 0 00 777776 ROT AC,-2 ;*ROTATE RIGHT TWO
7316 034413 312 07 0 00 000006 CAME AC,AC-1 ;TEST FOR BIT (N+2) A ZERO
7317 034414 003 07 0 00 004315 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
7318 034415 321 11 0 00 034410 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
7319
7320 ;TEST AC LEFT HALF
7321 ;TEST ROT RIGHT TWO BIT POSITIONS
7322 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
7323 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
7324 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
7325 ;IS ZERO AFTER ROTATING.
7326 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
7327
7328 004316 SN=SN+1
7329 777777 777757 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
7330 IFE <ZZ>,<ZZ=777777377777>
7331 777773 YY=<<ZZ-3>/4>&777777 ;SELECTED BIT AFTER ROTATION
7332 034416 525 07 0 00 777757 HRLOI AC,ZZ&777777 ;CLEAR BIT (N) OF AC LEFT
7333 IFL <ZZ&777777-777775>,<
7334 034417 525 06 0 00 777773 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
7335 IFE <ZZ&777777-777775>,<
7336 HRROI AC-1,377777 ;SETUP FOR COMPARISON>
7337 IFE <ZZ&777777-777776>,<
7338 HRROI AC-1,577777 ;SETUP FOR COMPARISON>
7339 034420 241 07 0 00 777776 ROT AC,-2 ;*ROTATE RIGHT TWO
7340 034421 312 07 0 00 000006 CAME AC,AC-1 ;TEST FOR BIT (N+2) A ZERO
7341 034422 003 07 0 00 004316 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
7342 034423 321 11 0 00 034416 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
7343
7344 ;TEST AC LEFT HALF
7345 ;TEST ROT RIGHT TWO BIT POSITIONS
7346 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
7347 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
7348 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
7349 ;IS ZERO AFTER ROTATING.
7350 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
7351
7352 004317 SN=SN+1
7353 777777 777767 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
7354 IFE <ZZ>,<ZZ=777777377777>
7355 777775 YY=<<ZZ-3>/4>&777777 ;SELECTED BIT AFTER ROTATION
7356 034424 525 07 0 00 777767 HRLOI AC,ZZ&777777 ;CLEAR BIT (N) OF AC LEFT
7357 IFL <ZZ&777777-777775>,<
7358 034425 525 06 0 00 777775 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
7359 IFE <ZZ&777777-777775>,<
7360 HRROI AC-1,377777 ;SETUP FOR COMPARISON>
7361 IFE <ZZ&777777-777776>,<
7362 HRROI AC-1,577777 ;SETUP FOR COMPARISON>
7363 034426 241 07 0 00 777776 ROT AC,-2 ;*ROTATE RIGHT TWO
7364 034427 312 07 0 00 000006 CAME AC,AC-1 ;TEST FOR BIT (N+2) A ZERO
7365 034430 003 07 0 00 004317 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
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7366 034431 321 11 0 00 034424 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
7367
7368 ;TEST AC LEFT HALF
7369 ;TEST ROT RIGHT TWO BIT POSITIONS
7370 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
7371 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
7372 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
7373 ;IS ZERO AFTER ROTATING.
7374 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
7375
7376 004320 SN=SN+1
7377 777777 777773 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
7378 IFE <ZZ>,<ZZ=777777377777>
7379 777776 YY=<<ZZ-3>/4>&777777 ;SELECTED BIT AFTER ROTATION
7380 034432 525 07 0 00 777773 HRLOI AC,ZZ&777777 ;CLEAR BIT (N) OF AC LEFT
7381 IFL <ZZ&777777-777775>,<
7382 034433 525 06 0 00 777776 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
7383 IFE <ZZ&777777-777775>,<
7384 HRROI AC-1,377777 ;SETUP FOR COMPARISON>
7385 IFE <ZZ&777777-777776>,<
7386 HRROI AC-1,577777 ;SETUP FOR COMPARISON>
7387 034434 241 07 0 00 777776 ROT AC,-2 ;*ROTATE RIGHT TWO
7388 034435 312 07 0 00 000006 CAME AC,AC-1 ;TEST FOR BIT (N+2) A ZERO
7389 034436 003 07 0 00 004320 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
7390 034437 321 11 0 00 034432 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
7391
7392 ;TEST AC LEFT HALF
7393 ;TEST ROT RIGHT TWO BIT POSITIONS
7394 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
7395 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
7396 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
7397 ;IS ZERO AFTER ROTATING.
7398 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
7399
7400 004321 SN=SN+1
7401 777777 777775 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
7402 IFE <ZZ>,<ZZ=777777377777>
7403 777777 YY=<<ZZ-3>/4>&777777 ;SELECTED BIT AFTER ROTATION
7404 034440 525 07 0 00 777775 HRLOI AC,ZZ&777777 ;CLEAR BIT (N) OF AC LEFT
7405 IFL <ZZ&777777-777775>,<
7406 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
7407 IFE <ZZ&777777-777775>,<
7408 034441 561 06 0 00 377777 HRROI AC-1,377777 ;SETUP FOR COMPARISON>
7409 IFE <ZZ&777777-777776>,<
7410 HRROI AC-1,577777 ;SETUP FOR COMPARISON>
7411 034442 241 07 0 00 777776 ROT AC,-2 ;*ROTATE RIGHT TWO
7412 034443 312 07 0 00 000006 CAME AC,AC-1 ;TEST FOR BIT (N+2) A ZERO
7413 034444 003 07 0 00 004321 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
7414 034445 321 11 0 00 034440 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
7415
7416 ;TEST AC LEFT HALF
7417 ;TEST ROT RIGHT TWO BIT POSITIONS
7418 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
7419 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
7420 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 18-8
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR SEQ 0165
7421 ;IS ZERO AFTER ROTATING.
7422 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
7423
7424 004322 SN=SN+1
7425 777777 777776 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
7426 IFE <ZZ>,<ZZ=777777377777>
7427 777777 YY=<<ZZ-3>/4>&777777 ;SELECTED BIT AFTER ROTATION
7428 034446 525 07 0 00 777776 HRLOI AC,ZZ&777777 ;CLEAR BIT (N) OF AC LEFT
7429 IFL <ZZ&777777-777775>,<
7430 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
7431 IFE <ZZ&777777-777775>,<
7432 HRROI AC-1,377777 ;SETUP FOR COMPARISON>
7433 IFE <ZZ&777777-777776>,<
7434 034447 561 06 0 00 577777 HRROI AC-1,577777 ;SETUP FOR COMPARISON>
7435 034450 241 07 0 00 777776 ROT AC,-2 ;*ROTATE RIGHT TWO
7436 034451 312 07 0 00 000006 CAME AC,AC-1 ;TEST FOR BIT (N+2) A ZERO
7437 034452 003 07 0 00 004322 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
7438 034453 321 11 0 00 034446 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
7439
7440 PAGE
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DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR SEQ 0166
7441 000001 ZZ=1
7442
7443 REPEAT ^D18,< ;TEST AC RIGHT HALF
7444 ;TEST ROT RIGHT TWO BIT POSITIONS
7445 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
7446 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
7447 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
7448 ;IS ZERO AFTER ROTATING.
7449 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
7450
7451 SN=SN+1
7452 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
7453 IFE <ZZ>,<ZZ=777777377777>
7454 YY=<<ZZ-3>/4>&777777 ;SELECTED BIT AFTER ROTATION
7455 HRROI AC,ZZ&777777 ;CLEAR BIT (N) OF AC RIGHT
7456 IFL <ZZ&777777-777775>,<
7457 HRROI AC-1,YY ;SETUP FOR COMPARISON>
7458 IFE <ZZ&777777-777775>,<
7459 HRLOI AC-1,377777 ;SETUP FOR COMPARISON>
7460 IFE <ZZ&777777-777776>,<
7461 HRLOI AC-1,577777 ;SETUP FOR COMPARISON>
7462 ROT AC,-2 ;*ROTATE RIGHT TWO
7463 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ZERO
7464 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
7465 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
7466 >
7467 ;TEST AC RIGHT HALF
7468 ;TEST ROT RIGHT TWO BIT POSITIONS
7469 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
7470 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
7471 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
7472 ;IS ZERO AFTER ROTATING.
7473 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
7474
7475 004323 SN=SN+1
7476 000000 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
7477 777777 377777 IFE <ZZ>,<ZZ=777777377777>
7478 677777 YY=<<ZZ-3>/4>&777777 ;SELECTED BIT AFTER ROTATION
7479 034454 561 07 0 00 377777 HRROI AC,ZZ&777777 ;CLEAR BIT (N) OF AC RIGHT
7480 IFL <ZZ&777777-777775>,<
7481 034455 561 06 0 00 677777 HRROI AC-1,YY ;SETUP FOR COMPARISON>
7482 IFE <ZZ&777777-777775>,<
7483 HRLOI AC-1,377777 ;SETUP FOR COMPARISON>
7484 IFE <ZZ&777777-777776>,<
7485 HRLOI AC-1,577777 ;SETUP FOR COMPARISON>
7486 034456 241 07 0 00 777776 ROT AC,-2 ;*ROTATE RIGHT TWO
7487 034457 312 07 0 00 000006 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ZERO
7488 034460 003 07 0 00 004323 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
7489 034461 321 11 0 00 034454 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
7490
7491 ;TEST AC RIGHT HALF
7492 ;TEST ROT RIGHT TWO BIT POSITIONS
7493 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
7494 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
7495 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
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DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR SEQ 0167
7496 ;IS ZERO AFTER ROTATING.
7497 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
7498
7499 004324 SN=SN+1
7500 777777 577777 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
7501 IFE <ZZ>,<ZZ=777777377777>
7502 737777 YY=<<ZZ-3>/4>&777777 ;SELECTED BIT AFTER ROTATION
7503 034462 561 07 0 00 577777 HRROI AC,ZZ&777777 ;CLEAR BIT (N) OF AC RIGHT
7504 IFL <ZZ&777777-777775>,<
7505 034463 561 06 0 00 737777 HRROI AC-1,YY ;SETUP FOR COMPARISON>
7506 IFE <ZZ&777777-777775>,<
7507 HRLOI AC-1,377777 ;SETUP FOR COMPARISON>
7508 IFE <ZZ&777777-777776>,<
7509 HRLOI AC-1,577777 ;SETUP FOR COMPARISON>
7510 034464 241 07 0 00 777776 ROT AC,-2 ;*ROTATE RIGHT TWO
7511 034465 312 07 0 00 000006 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ZERO
7512 034466 003 07 0 00 004324 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
7513 034467 321 11 0 00 034462 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
7514
7515 ;TEST AC RIGHT HALF
7516 ;TEST ROT RIGHT TWO BIT POSITIONS
7517 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
7518 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
7519 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
7520 ;IS ZERO AFTER ROTATING.
7521 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
7522
7523 004325 SN=SN+1
7524 777777 677777 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
7525 IFE <ZZ>,<ZZ=777777377777>
7526 757777 YY=<<ZZ-3>/4>&777777 ;SELECTED BIT AFTER ROTATION
7527 034470 561 07 0 00 677777 HRROI AC,ZZ&777777 ;CLEAR BIT (N) OF AC RIGHT
7528 IFL <ZZ&777777-777775>,<
7529 034471 561 06 0 00 757777 HRROI AC-1,YY ;SETUP FOR COMPARISON>
7530 IFE <ZZ&777777-777775>,<
7531 HRLOI AC-1,377777 ;SETUP FOR COMPARISON>
7532 IFE <ZZ&777777-777776>,<
7533 HRLOI AC-1,577777 ;SETUP FOR COMPARISON>
7534 034472 241 07 0 00 777776 ROT AC,-2 ;*ROTATE RIGHT TWO
7535 034473 312 07 0 00 000006 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ZERO
7536 034474 003 07 0 00 004325 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
7537 034475 321 11 0 00 034470 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
7538
7539 ;TEST AC RIGHT HALF
7540 ;TEST ROT RIGHT TWO BIT POSITIONS
7541 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
7542 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
7543 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
7544 ;IS ZERO AFTER ROTATING.
7545 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
7546
7547 004326 SN=SN+1
7548 777777 737777 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
7549 IFE <ZZ>,<ZZ=777777377777>
7550 767777 YY=<<ZZ-3>/4>&777777 ;SELECTED BIT AFTER ROTATION
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 18-11
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR SEQ 0168
7551 034476 561 07 0 00 737777 HRROI AC,ZZ&777777 ;CLEAR BIT (N) OF AC RIGHT
7552 IFL <ZZ&777777-777775>,<
7553 034477 561 06 0 00 767777 HRROI AC-1,YY ;SETUP FOR COMPARISON>
7554 IFE <ZZ&777777-777775>,<
7555 HRLOI AC-1,377777 ;SETUP FOR COMPARISON>
7556 IFE <ZZ&777777-777776>,<
7557 HRLOI AC-1,577777 ;SETUP FOR COMPARISON>
7558 034500 241 07 0 00 777776 ROT AC,-2 ;*ROTATE RIGHT TWO
7559 034501 312 07 0 00 000006 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ZERO
7560 034502 003 07 0 00 004326 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
7561 034503 321 11 0 00 034476 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
7562
7563 ;TEST AC RIGHT HALF
7564 ;TEST ROT RIGHT TWO BIT POSITIONS
7565 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
7566 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
7567 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
7568 ;IS ZERO AFTER ROTATING.
7569 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
7570
7571 004327 SN=SN+1
7572 777777 757777 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
7573 IFE <ZZ>,<ZZ=777777377777>
7574 773777 YY=<<ZZ-3>/4>&777777 ;SELECTED BIT AFTER ROTATION
7575 034504 561 07 0 00 757777 HRROI AC,ZZ&777777 ;CLEAR BIT (N) OF AC RIGHT
7576 IFL <ZZ&777777-777775>,<
7577 034505 561 06 0 00 773777 HRROI AC-1,YY ;SETUP FOR COMPARISON>
7578 IFE <ZZ&777777-777775>,<
7579 HRLOI AC-1,377777 ;SETUP FOR COMPARISON>
7580 IFE <ZZ&777777-777776>,<
7581 HRLOI AC-1,577777 ;SETUP FOR COMPARISON>
7582 034506 241 07 0 00 777776 ROT AC,-2 ;*ROTATE RIGHT TWO
7583 034507 312 07 0 00 000006 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ZERO
7584 034510 003 07 0 00 004327 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
7585 034511 321 11 0 00 034504 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
7586
7587 ;TEST AC RIGHT HALF
7588 ;TEST ROT RIGHT TWO BIT POSITIONS
7589 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
7590 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
7591 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
7592 ;IS ZERO AFTER ROTATING.
7593 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
7594
7595 004330 SN=SN+1
7596 777777 767777 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
7597 IFE <ZZ>,<ZZ=777777377777>
7598 775777 YY=<<ZZ-3>/4>&777777 ;SELECTED BIT AFTER ROTATION
7599 034512 561 07 0 00 767777 HRROI AC,ZZ&777777 ;CLEAR BIT (N) OF AC RIGHT
7600 IFL <ZZ&777777-777775>,<
7601 034513 561 06 0 00 775777 HRROI AC-1,YY ;SETUP FOR COMPARISON>
7602 IFE <ZZ&777777-777775>,<
7603 HRLOI AC-1,377777 ;SETUP FOR COMPARISON>
7604 IFE <ZZ&777777-777776>,<
7605 HRLOI AC-1,577777 ;SETUP FOR COMPARISON>
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 18-12
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR SEQ 0169
7606 034514 241 07 0 00 777776 ROT AC,-2 ;*ROTATE RIGHT TWO
7607 034515 312 07 0 00 000006 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ZERO
7608 034516 003 07 0 00 004330 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
7609 034517 321 11 0 00 034512 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
7610
7611 ;TEST AC RIGHT HALF
7612 ;TEST ROT RIGHT TWO BIT POSITIONS
7613 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
7614 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
7615 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
7616 ;IS ZERO AFTER ROTATING.
7617 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
7618
7619 004331 SN=SN+1
7620 777777 773777 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
7621 IFE <ZZ>,<ZZ=777777377777>
7622 776777 YY=<<ZZ-3>/4>&777777 ;SELECTED BIT AFTER ROTATION
7623 034520 561 07 0 00 773777 HRROI AC,ZZ&777777 ;CLEAR BIT (N) OF AC RIGHT
7624 IFL <ZZ&777777-777775>,<
7625 034521 561 06 0 00 776777 HRROI AC-1,YY ;SETUP FOR COMPARISON>
7626 IFE <ZZ&777777-777775>,<
7627 HRLOI AC-1,377777 ;SETUP FOR COMPARISON>
7628 IFE <ZZ&777777-777776>,<
7629 HRLOI AC-1,577777 ;SETUP FOR COMPARISON>
7630 034522 241 07 0 00 777776 ROT AC,-2 ;*ROTATE RIGHT TWO
7631 034523 312 07 0 00 000006 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ZERO
7632 034524 003 07 0 00 004331 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
7633 034525 321 11 0 00 034520 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
7634
7635 ;TEST AC RIGHT HALF
7636 ;TEST ROT RIGHT TWO BIT POSITIONS
7637 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
7638 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
7639 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
7640 ;IS ZERO AFTER ROTATING.
7641 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
7642
7643 004332 SN=SN+1
7644 777777 775777 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
7645 IFE <ZZ>,<ZZ=777777377777>
7646 777377 YY=<<ZZ-3>/4>&777777 ;SELECTED BIT AFTER ROTATION
7647 034526 561 07 0 00 775777 HRROI AC,ZZ&777777 ;CLEAR BIT (N) OF AC RIGHT
7648 IFL <ZZ&777777-777775>,<
7649 034527 561 06 0 00 777377 HRROI AC-1,YY ;SETUP FOR COMPARISON>
7650 IFE <ZZ&777777-777775>,<
7651 HRLOI AC-1,377777 ;SETUP FOR COMPARISON>
7652 IFE <ZZ&777777-777776>,<
7653 HRLOI AC-1,577777 ;SETUP FOR COMPARISON>
7654 034530 241 07 0 00 777776 ROT AC,-2 ;*ROTATE RIGHT TWO
7655 034531 312 07 0 00 000006 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ZERO
7656 034532 003 07 0 00 004332 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
7657 034533 321 11 0 00 034526 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
7658
7659 ;TEST AC RIGHT HALF
7660 ;TEST ROT RIGHT TWO BIT POSITIONS
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 18-13
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR SEQ 0170
7661 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
7662 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
7663 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
7664 ;IS ZERO AFTER ROTATING.
7665 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
7666
7667 004333 SN=SN+1
7668 777777 776777 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
7669 IFE <ZZ>,<ZZ=777777377777>
7670 777577 YY=<<ZZ-3>/4>&777777 ;SELECTED BIT AFTER ROTATION
7671 034534 561 07 0 00 776777 HRROI AC,ZZ&777777 ;CLEAR BIT (N) OF AC RIGHT
7672 IFL <ZZ&777777-777775>,<
7673 034535 561 06 0 00 777577 HRROI AC-1,YY ;SETUP FOR COMPARISON>
7674 IFE <ZZ&777777-777775>,<
7675 HRLOI AC-1,377777 ;SETUP FOR COMPARISON>
7676 IFE <ZZ&777777-777776>,<
7677 HRLOI AC-1,577777 ;SETUP FOR COMPARISON>
7678 034536 241 07 0 00 777776 ROT AC,-2 ;*ROTATE RIGHT TWO
7679 034537 312 07 0 00 000006 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ZERO
7680 034540 003 07 0 00 004333 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
7681 034541 321 11 0 00 034534 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
7682
7683 ;TEST AC RIGHT HALF
7684 ;TEST ROT RIGHT TWO BIT POSITIONS
7685 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
7686 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
7687 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
7688 ;IS ZERO AFTER ROTATING.
7689 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
7690
7691 004334 SN=SN+1
7692 777777 777377 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
7693 IFE <ZZ>,<ZZ=777777377777>
7694 777677 YY=<<ZZ-3>/4>&777777 ;SELECTED BIT AFTER ROTATION
7695 034542 561 07 0 00 777377 HRROI AC,ZZ&777777 ;CLEAR BIT (N) OF AC RIGHT
7696 IFL <ZZ&777777-777775>,<
7697 034543 561 06 0 00 777677 HRROI AC-1,YY ;SETUP FOR COMPARISON>
7698 IFE <ZZ&777777-777775>,<
7699 HRLOI AC-1,377777 ;SETUP FOR COMPARISON>
7700 IFE <ZZ&777777-777776>,<
7701 HRLOI AC-1,577777 ;SETUP FOR COMPARISON>
7702 034544 241 07 0 00 777776 ROT AC,-2 ;*ROTATE RIGHT TWO
7703 034545 312 07 0 00 000006 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ZERO
7704 034546 003 07 0 00 004334 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
7705 034547 321 11 0 00 034542 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
7706
7707 ;TEST AC RIGHT HALF
7708 ;TEST ROT RIGHT TWO BIT POSITIONS
7709 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
7710 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
7711 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
7712 ;IS ZERO AFTER ROTATING.
7713 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
7714
7715 004335 SN=SN+1
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 18-14
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR SEQ 0171
7716 777777 777577 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
7717 IFE <ZZ>,<ZZ=777777377777>
7718 777737 YY=<<ZZ-3>/4>&777777 ;SELECTED BIT AFTER ROTATION
7719 034550 561 07 0 00 777577 HRROI AC,ZZ&777777 ;CLEAR BIT (N) OF AC RIGHT
7720 IFL <ZZ&777777-777775>,<
7721 034551 561 06 0 00 777737 HRROI AC-1,YY ;SETUP FOR COMPARISON>
7722 IFE <ZZ&777777-777775>,<
7723 HRLOI AC-1,377777 ;SETUP FOR COMPARISON>
7724 IFE <ZZ&777777-777776>,<
7725 HRLOI AC-1,577777 ;SETUP FOR COMPARISON>
7726 034552 241 07 0 00 777776 ROT AC,-2 ;*ROTATE RIGHT TWO
7727 034553 312 07 0 00 000006 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ZERO
7728 034554 003 07 0 00 004335 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
7729 034555 321 11 0 00 034550 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
7730
7731 ;TEST AC RIGHT HALF
7732 ;TEST ROT RIGHT TWO BIT POSITIONS
7733 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
7734 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
7735 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
7736 ;IS ZERO AFTER ROTATING.
7737 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
7738
7739 004336 SN=SN+1
7740 777777 777677 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
7741 IFE <ZZ>,<ZZ=777777377777>
7742 777757 YY=<<ZZ-3>/4>&777777 ;SELECTED BIT AFTER ROTATION
7743 034556 561 07 0 00 777677 HRROI AC,ZZ&777777 ;CLEAR BIT (N) OF AC RIGHT
7744 IFL <ZZ&777777-777775>,<
7745 034557 561 06 0 00 777757 HRROI AC-1,YY ;SETUP FOR COMPARISON>
7746 IFE <ZZ&777777-777775>,<
7747 HRLOI AC-1,377777 ;SETUP FOR COMPARISON>
7748 IFE <ZZ&777777-777776>,<
7749 HRLOI AC-1,577777 ;SETUP FOR COMPARISON>
7750 034560 241 07 0 00 777776 ROT AC,-2 ;*ROTATE RIGHT TWO
7751 034561 312 07 0 00 000006 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ZERO
7752 034562 003 07 0 00 004336 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
7753 034563 321 11 0 00 034556 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
7754
7755 ;TEST AC RIGHT HALF
7756 ;TEST ROT RIGHT TWO BIT POSITIONS
7757 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
7758 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
7759 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
7760 ;IS ZERO AFTER ROTATING.
7761 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
7762
7763 004337 SN=SN+1
7764 777777 777737 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
7765 IFE <ZZ>,<ZZ=777777377777>
7766 777767 YY=<<ZZ-3>/4>&777777 ;SELECTED BIT AFTER ROTATION
7767 034564 561 07 0 00 777737 HRROI AC,ZZ&777777 ;CLEAR BIT (N) OF AC RIGHT
7768 IFL <ZZ&777777-777775>,<
7769 034565 561 06 0 00 777767 HRROI AC-1,YY ;SETUP FOR COMPARISON>
7770 IFE <ZZ&777777-777775>,<
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 18-15
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR SEQ 0172
7771 HRLOI AC-1,377777 ;SETUP FOR COMPARISON>
7772 IFE <ZZ&777777-777776>,<
7773 HRLOI AC-1,577777 ;SETUP FOR COMPARISON>
7774 034566 241 07 0 00 777776 ROT AC,-2 ;*ROTATE RIGHT TWO
7775 034567 312 07 0 00 000006 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ZERO
7776 034570 003 07 0 00 004337 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
7777 034571 321 11 0 00 034564 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
7778
7779 ;TEST AC RIGHT HALF
7780 ;TEST ROT RIGHT TWO BIT POSITIONS
7781 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
7782 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
7783 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
7784 ;IS ZERO AFTER ROTATING.
7785 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
7786
7787 004340 SN=SN+1
7788 777777 777757 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
7789 IFE <ZZ>,<ZZ=777777377777>
7790 777773 YY=<<ZZ-3>/4>&777777 ;SELECTED BIT AFTER ROTATION
7791 034572 561 07 0 00 777757 HRROI AC,ZZ&777777 ;CLEAR BIT (N) OF AC RIGHT
7792 IFL <ZZ&777777-777775>,<
7793 034573 561 06 0 00 777773 HRROI AC-1,YY ;SETUP FOR COMPARISON>
7794 IFE <ZZ&777777-777775>,<
7795 HRLOI AC-1,377777 ;SETUP FOR COMPARISON>
7796 IFE <ZZ&777777-777776>,<
7797 HRLOI AC-1,577777 ;SETUP FOR COMPARISON>
7798 034574 241 07 0 00 777776 ROT AC,-2 ;*ROTATE RIGHT TWO
7799 034575 312 07 0 00 000006 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ZERO
7800 034576 003 07 0 00 004340 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
7801 034577 321 11 0 00 034572 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
7802
7803 ;TEST AC RIGHT HALF
7804 ;TEST ROT RIGHT TWO BIT POSITIONS
7805 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
7806 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
7807 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
7808 ;IS ZERO AFTER ROTATING.
7809 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
7810
7811 004341 SN=SN+1
7812 777777 777767 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
7813 IFE <ZZ>,<ZZ=777777377777>
7814 777775 YY=<<ZZ-3>/4>&777777 ;SELECTED BIT AFTER ROTATION
7815 034600 561 07 0 00 777767 HRROI AC,ZZ&777777 ;CLEAR BIT (N) OF AC RIGHT
7816 IFL <ZZ&777777-777775>,<
7817 034601 561 06 0 00 777775 HRROI AC-1,YY ;SETUP FOR COMPARISON>
7818 IFE <ZZ&777777-777775>,<
7819 HRLOI AC-1,377777 ;SETUP FOR COMPARISON>
7820 IFE <ZZ&777777-777776>,<
7821 HRLOI AC-1,577777 ;SETUP FOR COMPARISON>
7822 034602 241 07 0 00 777776 ROT AC,-2 ;*ROTATE RIGHT TWO
7823 034603 312 07 0 00 000006 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ZERO
7824 034604 003 07 0 00 004341 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
7825 034605 321 11 0 00 034600 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 18-16
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR SEQ 0173
7826
7827 ;TEST AC RIGHT HALF
7828 ;TEST ROT RIGHT TWO BIT POSITIONS
7829 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
7830 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
7831 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
7832 ;IS ZERO AFTER ROTATING.
7833 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
7834
7835 004342 SN=SN+1
7836 777777 777773 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
7837 IFE <ZZ>,<ZZ=777777377777>
7838 777776 YY=<<ZZ-3>/4>&777777 ;SELECTED BIT AFTER ROTATION
7839 034606 561 07 0 00 777773 HRROI AC,ZZ&777777 ;CLEAR BIT (N) OF AC RIGHT
7840 IFL <ZZ&777777-777775>,<
7841 034607 561 06 0 00 777776 HRROI AC-1,YY ;SETUP FOR COMPARISON>
7842 IFE <ZZ&777777-777775>,<
7843 HRLOI AC-1,377777 ;SETUP FOR COMPARISON>
7844 IFE <ZZ&777777-777776>,<
7845 HRLOI AC-1,577777 ;SETUP FOR COMPARISON>
7846 034610 241 07 0 00 777776 ROT AC,-2 ;*ROTATE RIGHT TWO
7847 034611 312 07 0 00 000006 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ZERO
7848 034612 003 07 0 00 004342 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
7849 034613 321 11 0 00 034606 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
7850
7851 ;TEST AC RIGHT HALF
7852 ;TEST ROT RIGHT TWO BIT POSITIONS
7853 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
7854 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
7855 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
7856 ;IS ZERO AFTER ROTATING.
7857 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
7858
7859 004343 SN=SN+1
7860 777777 777775 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
7861 IFE <ZZ>,<ZZ=777777377777>
7862 777777 YY=<<ZZ-3>/4>&777777 ;SELECTED BIT AFTER ROTATION
7863 034614 561 07 0 00 777775 HRROI AC,ZZ&777777 ;CLEAR BIT (N) OF AC RIGHT
7864 IFL <ZZ&777777-777775>,<
7865 HRROI AC-1,YY ;SETUP FOR COMPARISON>
7866 IFE <ZZ&777777-777775>,<
7867 034615 525 06 0 00 377777 HRLOI AC-1,377777 ;SETUP FOR COMPARISON>
7868 IFE <ZZ&777777-777776>,<
7869 HRLOI AC-1,577777 ;SETUP FOR COMPARISON>
7870 034616 241 07 0 00 777776 ROT AC,-2 ;*ROTATE RIGHT TWO
7871 034617 312 07 0 00 000006 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ZERO
7872 034620 003 07 0 00 004343 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
7873 034621 321 11 0 00 034614 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
7874
7875 ;TEST AC RIGHT HALF
7876 ;TEST ROT RIGHT TWO BIT POSITIONS
7877 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
7878 ;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
7879 ;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
7880 ;IS ZERO AFTER ROTATING.
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 18-17
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR SEQ 0174
7881 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
7882
7883 004344 SN=SN+1
7884 777777 777776 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
7885 IFE <ZZ>,<ZZ=777777377777>
7886 777777 YY=<<ZZ-3>/4>&777777 ;SELECTED BIT AFTER ROTATION
7887 034622 561 07 0 00 777776 HRROI AC,ZZ&777777 ;CLEAR BIT (N) OF AC RIGHT
7888 IFL <ZZ&777777-777775>,<
7889 HRROI AC-1,YY ;SETUP FOR COMPARISON>
7890 IFE <ZZ&777777-777775>,<
7891 HRLOI AC-1,377777 ;SETUP FOR COMPARISON>
7892 IFE <ZZ&777777-777776>,<
7893 034623 525 06 0 00 577777 HRLOI AC-1,577777 ;SETUP FOR COMPARISON>
7894 034624 241 07 0 00 777776 ROT AC,-2 ;*ROTATE RIGHT TWO
7895 034625 312 07 0 00 000006 CAME AC,AC-1 ;TEST FOR BIT (N+1) A ZERO
7896 034626 003 07 0 00 004344 ER3 AC,SN ;AD-AR GATE UNDER TEST FAILED
7897 034627 321 11 0 00 034622 JUMPL AC+2,.-5 ;LOOP ON ERROR SWITCH
7898
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7899 SUBTTL DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES
7900
7901 ;TEST ROTC LEFT ONE BIT POSITION USING ALL ZEROS
7902 ;TEST MQ SHIFT LOGIC GATES
7903 ;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND
7904 ;AC+1 IS TESTED
7905 ;AN ERROR OCCURS IF C(AC+1) IS NON-ZERO AFTER ROTATING
7906
7907 000010 AC=10
7908 SAVEAC (1,1)^
7909 034630 201 12 0 00 034630 MOVEI AC+2,. ;SAVE TEST PC
7910 034631 202 12 0 00 030051 MOVEM AC+2,TESTPC
7911 034632 201 12 0 00 000012 MOVEI AC+2,<AC+2>&17 ;INFORM ERROR ROUTINE WHICH
7912 034633 202 12 0 00 041765 MOVEM AC+2,ERRLOP# ;AC IS USED FOR ITERATION^
7913
7914 034634 403 10 0 00 000011 E4400: SETZB AC,AC+1 ;INITIALIZE AC,AC+1 TO ALL ZEROS
7915 034635 402 00 0 00 000007 SETZM AC-1 ;INITIALIZE RESULT TO ZERO
7916 034636 245 10 0 00 000001 ROTC AC,1 ;*ROTATE LEFT ONE
7917 034637 312 11 0 00 000007 CAME AC+1,AC-1 ;TEST AC+1 FOR ALL ZEROS
7918 034640 004 11 0 00 004401 ER4 AC+1,4401 ;MQ GATING FAILED
7919 034641 321 12 0 00 034634 JUMPL AC+2,E4400 ;LOOP ON ERROR SWITCH
7920
7921 ;TEST ROTC LEFT ONE BIT POSITION USING ALL ONES
7922 ;TEST MQ SHIFT LOGIC GATES
7923 ;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND
7924 ;AC+1 IS TESTED
7925 ;AN ERROR OCCURS IF C(AC+1) IS NON-ZERO AFTER ROTATING
7926
7927 034642 477 10 0 00 000011 E4500: SETOB AC,AC+1 ;INITIALIZE AC,AC+1 TO ALL ONES
7928 034643 476 00 0 00 000007 SETOM AC-1 ;INITIALIZE RESULT TO ALL ONES
7929 034644 245 10 0 00 000001 ROTC AC,1 ;*ROTATE LEFT ONE
7930 034645 312 11 0 00 000007 CAME AC+1,AC-1 ;TEST AC+1 FOR ALL ONES
7931 034646 004 11 0 00 004501 ER4 AC+1,4501 ;MQ GATING FAILED
7932 034647 321 12 0 00 034642 JUMPL AC+2,E4500 ;LOOP ON ERROR SWITCH
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7933 004600 SN=4600
7934 000000 ZZ=0
7935
7936 E4600: REPEAT ^D18,< ;TEST AC+1 RIGHT HALF
7937 ;TEST ROTC LEFT ONE BIT POSITION
7938 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
7939 ;TEST MQ SHIFT LOGIC GATES
7940 ;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
7941 ;IS TESTED.
7942 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
7943 ;OTHER BIT IS A ONE AFTER ROTATING
7944 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
7945
7946 SN=SN+1
7947 ZZ=ZZ+ZZ ;SELECTED BIT BEFORE ROTATION
7948 IFE ZZ,<ZZ=1>
7949 YY=ZZ+ZZ ;SELECTED BIT AFTER ROTATION
7950 SETZ AC, ;INITILAIZE AC TO ALL ZEROS
7951 MOVEI AC+1,ZZ ;SET BIT (N) OF AC+1 RIGHT
7952 IFN <ZZ-400000>,<
7953 MOVEI AC-1,YY ;SETUP FOR COMPARISON>
7954 IFE <ZZ-400000>,<
7955 MOVSI AC-1,1 ;SETUP FOR COMPARISON>
7956 ROTC AC,1 ;*ROTATE LEFT ONE
7957 CAME AC+1,AC-1 ;TEST FOR BIT (N-1) A ONE
7958 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
7959 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
7960 >
7961 ;TEST AC+1 RIGHT HALF
7962 ;TEST ROTC LEFT ONE BIT POSITION
7963 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
7964 ;TEST MQ SHIFT LOGIC GATES
7965 ;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
7966 ;IS TESTED.
7967 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
7968 ;OTHER BIT IS A ONE AFTER ROTATING
7969 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
7970
7971 004601 SN=SN+1
7972 000000 ZZ=ZZ+ZZ ;SELECTED BIT BEFORE ROTATION
7973 000001 IFE ZZ,<ZZ=1>
7974 000002 YY=ZZ+ZZ ;SELECTED BIT AFTER ROTATION
7975 034650 400 10 0 00 000000 SETZ AC, ;INITILAIZE AC TO ALL ZEROS
7976 034651 201 11 0 00 000001 MOVEI AC+1,ZZ ;SET BIT (N) OF AC+1 RIGHT
7977 IFN <ZZ-400000>,<
7978 034652 201 07 0 00 000002 MOVEI AC-1,YY ;SETUP FOR COMPARISON>
7979 IFE <ZZ-400000>,<
7980 MOVSI AC-1,1 ;SETUP FOR COMPARISON>
7981 034653 245 10 0 00 000001 ROTC AC,1 ;*ROTATE LEFT ONE
7982 034654 312 11 0 00 000007 CAME AC+1,AC-1 ;TEST FOR BIT (N-1) A ONE
7983 034655 004 11 0 00 004601 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
7984 034656 321 12 0 00 034650 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
7985
7986 ;TEST AC+1 RIGHT HALF
7987 ;TEST ROTC LEFT ONE BIT POSITION
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7988 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
7989 ;TEST MQ SHIFT LOGIC GATES
7990 ;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
7991 ;IS TESTED.
7992 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
7993 ;OTHER BIT IS A ONE AFTER ROTATING
7994 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
7995
7996 004602 SN=SN+1
7997 000002 ZZ=ZZ+ZZ ;SELECTED BIT BEFORE ROTATION
7998 IFE ZZ,<ZZ=1>
7999 000004 YY=ZZ+ZZ ;SELECTED BIT AFTER ROTATION
8000 034657 400 10 0 00 000000 SETZ AC, ;INITILAIZE AC TO ALL ZEROS
8001 034660 201 11 0 00 000002 MOVEI AC+1,ZZ ;SET BIT (N) OF AC+1 RIGHT
8002 IFN <ZZ-400000>,<
8003 034661 201 07 0 00 000004 MOVEI AC-1,YY ;SETUP FOR COMPARISON>
8004 IFE <ZZ-400000>,<
8005 MOVSI AC-1,1 ;SETUP FOR COMPARISON>
8006 034662 245 10 0 00 000001 ROTC AC,1 ;*ROTATE LEFT ONE
8007 034663 312 11 0 00 000007 CAME AC+1,AC-1 ;TEST FOR BIT (N-1) A ONE
8008 034664 004 11 0 00 004602 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
8009 034665 321 12 0 00 034657 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
8010
8011 ;TEST AC+1 RIGHT HALF
8012 ;TEST ROTC LEFT ONE BIT POSITION
8013 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
8014 ;TEST MQ SHIFT LOGIC GATES
8015 ;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
8016 ;IS TESTED.
8017 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
8018 ;OTHER BIT IS A ONE AFTER ROTATING
8019 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
8020
8021 004603 SN=SN+1
8022 000004 ZZ=ZZ+ZZ ;SELECTED BIT BEFORE ROTATION
8023 IFE ZZ,<ZZ=1>
8024 000010 YY=ZZ+ZZ ;SELECTED BIT AFTER ROTATION
8025 034666 400 10 0 00 000000 SETZ AC, ;INITILAIZE AC TO ALL ZEROS
8026 034667 201 11 0 00 000004 MOVEI AC+1,ZZ ;SET BIT (N) OF AC+1 RIGHT
8027 IFN <ZZ-400000>,<
8028 034670 201 07 0 00 000010 MOVEI AC-1,YY ;SETUP FOR COMPARISON>
8029 IFE <ZZ-400000>,<
8030 MOVSI AC-1,1 ;SETUP FOR COMPARISON>
8031 034671 245 10 0 00 000001 ROTC AC,1 ;*ROTATE LEFT ONE
8032 034672 312 11 0 00 000007 CAME AC+1,AC-1 ;TEST FOR BIT (N-1) A ONE
8033 034673 004 11 0 00 004603 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
8034 034674 321 12 0 00 034666 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
8035
8036 ;TEST AC+1 RIGHT HALF
8037 ;TEST ROTC LEFT ONE BIT POSITION
8038 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
8039 ;TEST MQ SHIFT LOGIC GATES
8040 ;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
8041 ;IS TESTED.
8042 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
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8043 ;OTHER BIT IS A ONE AFTER ROTATING
8044 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
8045
8046 004604 SN=SN+1
8047 000010 ZZ=ZZ+ZZ ;SELECTED BIT BEFORE ROTATION
8048 IFE ZZ,<ZZ=1>
8049 000020 YY=ZZ+ZZ ;SELECTED BIT AFTER ROTATION
8050 034675 400 10 0 00 000000 SETZ AC, ;INITILAIZE AC TO ALL ZEROS
8051 034676 201 11 0 00 000010 MOVEI AC+1,ZZ ;SET BIT (N) OF AC+1 RIGHT
8052 IFN <ZZ-400000>,<
8053 034677 201 07 0 00 000020 MOVEI AC-1,YY ;SETUP FOR COMPARISON>
8054 IFE <ZZ-400000>,<
8055 MOVSI AC-1,1 ;SETUP FOR COMPARISON>
8056 034700 245 10 0 00 000001 ROTC AC,1 ;*ROTATE LEFT ONE
8057 034701 312 11 0 00 000007 CAME AC+1,AC-1 ;TEST FOR BIT (N-1) A ONE
8058 034702 004 11 0 00 004604 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
8059 034703 321 12 0 00 034675 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
8060
8061 ;TEST AC+1 RIGHT HALF
8062 ;TEST ROTC LEFT ONE BIT POSITION
8063 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
8064 ;TEST MQ SHIFT LOGIC GATES
8065 ;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
8066 ;IS TESTED.
8067 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
8068 ;OTHER BIT IS A ONE AFTER ROTATING
8069 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
8070
8071 004605 SN=SN+1
8072 000020 ZZ=ZZ+ZZ ;SELECTED BIT BEFORE ROTATION
8073 IFE ZZ,<ZZ=1>
8074 000040 YY=ZZ+ZZ ;SELECTED BIT AFTER ROTATION
8075 034704 400 10 0 00 000000 SETZ AC, ;INITILAIZE AC TO ALL ZEROS
8076 034705 201 11 0 00 000020 MOVEI AC+1,ZZ ;SET BIT (N) OF AC+1 RIGHT
8077 IFN <ZZ-400000>,<
8078 034706 201 07 0 00 000040 MOVEI AC-1,YY ;SETUP FOR COMPARISON>
8079 IFE <ZZ-400000>,<
8080 MOVSI AC-1,1 ;SETUP FOR COMPARISON>
8081 034707 245 10 0 00 000001 ROTC AC,1 ;*ROTATE LEFT ONE
8082 034710 312 11 0 00 000007 CAME AC+1,AC-1 ;TEST FOR BIT (N-1) A ONE
8083 034711 004 11 0 00 004605 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
8084 034712 321 12 0 00 034704 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
8085
8086 ;TEST AC+1 RIGHT HALF
8087 ;TEST ROTC LEFT ONE BIT POSITION
8088 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
8089 ;TEST MQ SHIFT LOGIC GATES
8090 ;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
8091 ;IS TESTED.
8092 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
8093 ;OTHER BIT IS A ONE AFTER ROTATING
8094 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
8095
8096 004606 SN=SN+1
8097 000040 ZZ=ZZ+ZZ ;SELECTED BIT BEFORE ROTATION
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8098 IFE ZZ,<ZZ=1>
8099 000100 YY=ZZ+ZZ ;SELECTED BIT AFTER ROTATION
8100 034713 400 10 0 00 000000 SETZ AC, ;INITILAIZE AC TO ALL ZEROS
8101 034714 201 11 0 00 000040 MOVEI AC+1,ZZ ;SET BIT (N) OF AC+1 RIGHT
8102 IFN <ZZ-400000>,<
8103 034715 201 07 0 00 000100 MOVEI AC-1,YY ;SETUP FOR COMPARISON>
8104 IFE <ZZ-400000>,<
8105 MOVSI AC-1,1 ;SETUP FOR COMPARISON>
8106 034716 245 10 0 00 000001 ROTC AC,1 ;*ROTATE LEFT ONE
8107 034717 312 11 0 00 000007 CAME AC+1,AC-1 ;TEST FOR BIT (N-1) A ONE
8108 034720 004 11 0 00 004606 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
8109 034721 321 12 0 00 034713 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
8110
8111 ;TEST AC+1 RIGHT HALF
8112 ;TEST ROTC LEFT ONE BIT POSITION
8113 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
8114 ;TEST MQ SHIFT LOGIC GATES
8115 ;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
8116 ;IS TESTED.
8117 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
8118 ;OTHER BIT IS A ONE AFTER ROTATING
8119 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
8120
8121 004607 SN=SN+1
8122 000100 ZZ=ZZ+ZZ ;SELECTED BIT BEFORE ROTATION
8123 IFE ZZ,<ZZ=1>
8124 000200 YY=ZZ+ZZ ;SELECTED BIT AFTER ROTATION
8125 034722 400 10 0 00 000000 SETZ AC, ;INITILAIZE AC TO ALL ZEROS
8126 034723 201 11 0 00 000100 MOVEI AC+1,ZZ ;SET BIT (N) OF AC+1 RIGHT
8127 IFN <ZZ-400000>,<
8128 034724 201 07 0 00 000200 MOVEI AC-1,YY ;SETUP FOR COMPARISON>
8129 IFE <ZZ-400000>,<
8130 MOVSI AC-1,1 ;SETUP FOR COMPARISON>
8131 034725 245 10 0 00 000001 ROTC AC,1 ;*ROTATE LEFT ONE
8132 034726 312 11 0 00 000007 CAME AC+1,AC-1 ;TEST FOR BIT (N-1) A ONE
8133 034727 004 11 0 00 004607 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
8134 034730 321 12 0 00 034722 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
8135
8136 ;TEST AC+1 RIGHT HALF
8137 ;TEST ROTC LEFT ONE BIT POSITION
8138 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
8139 ;TEST MQ SHIFT LOGIC GATES
8140 ;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
8141 ;IS TESTED.
8142 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
8143 ;OTHER BIT IS A ONE AFTER ROTATING
8144 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
8145
8146 004610 SN=SN+1
8147 000200 ZZ=ZZ+ZZ ;SELECTED BIT BEFORE ROTATION
8148 IFE ZZ,<ZZ=1>
8149 000400 YY=ZZ+ZZ ;SELECTED BIT AFTER ROTATION
8150 034731 400 10 0 00 000000 SETZ AC, ;INITILAIZE AC TO ALL ZEROS
8151 034732 201 11 0 00 000200 MOVEI AC+1,ZZ ;SET BIT (N) OF AC+1 RIGHT
8152 IFN <ZZ-400000>,<
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8153 034733 201 07 0 00 000400 MOVEI AC-1,YY ;SETUP FOR COMPARISON>
8154 IFE <ZZ-400000>,<
8155 MOVSI AC-1,1 ;SETUP FOR COMPARISON>
8156 034734 245 10 0 00 000001 ROTC AC,1 ;*ROTATE LEFT ONE
8157 034735 312 11 0 00 000007 CAME AC+1,AC-1 ;TEST FOR BIT (N-1) A ONE
8158 034736 004 11 0 00 004610 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
8159 034737 321 12 0 00 034731 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
8160
8161 ;TEST AC+1 RIGHT HALF
8162 ;TEST ROTC LEFT ONE BIT POSITION
8163 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
8164 ;TEST MQ SHIFT LOGIC GATES
8165 ;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
8166 ;IS TESTED.
8167 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
8168 ;OTHER BIT IS A ONE AFTER ROTATING
8169 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
8170
8171 004611 SN=SN+1
8172 000400 ZZ=ZZ+ZZ ;SELECTED BIT BEFORE ROTATION
8173 IFE ZZ,<ZZ=1>
8174 001000 YY=ZZ+ZZ ;SELECTED BIT AFTER ROTATION
8175 034740 400 10 0 00 000000 SETZ AC, ;INITILAIZE AC TO ALL ZEROS
8176 034741 201 11 0 00 000400 MOVEI AC+1,ZZ ;SET BIT (N) OF AC+1 RIGHT
8177 IFN <ZZ-400000>,<
8178 034742 201 07 0 00 001000 MOVEI AC-1,YY ;SETUP FOR COMPARISON>
8179 IFE <ZZ-400000>,<
8180 MOVSI AC-1,1 ;SETUP FOR COMPARISON>
8181 034743 245 10 0 00 000001 ROTC AC,1 ;*ROTATE LEFT ONE
8182 034744 312 11 0 00 000007 CAME AC+1,AC-1 ;TEST FOR BIT (N-1) A ONE
8183 034745 004 11 0 00 004611 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
8184 034746 321 12 0 00 034740 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
8185
8186 ;TEST AC+1 RIGHT HALF
8187 ;TEST ROTC LEFT ONE BIT POSITION
8188 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
8189 ;TEST MQ SHIFT LOGIC GATES
8190 ;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
8191 ;IS TESTED.
8192 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
8193 ;OTHER BIT IS A ONE AFTER ROTATING
8194 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
8195
8196 004612 SN=SN+1
8197 001000 ZZ=ZZ+ZZ ;SELECTED BIT BEFORE ROTATION
8198 IFE ZZ,<ZZ=1>
8199 002000 YY=ZZ+ZZ ;SELECTED BIT AFTER ROTATION
8200 034747 400 10 0 00 000000 SETZ AC, ;INITILAIZE AC TO ALL ZEROS
8201 034750 201 11 0 00 001000 MOVEI AC+1,ZZ ;SET BIT (N) OF AC+1 RIGHT
8202 IFN <ZZ-400000>,<
8203 034751 201 07 0 00 002000 MOVEI AC-1,YY ;SETUP FOR COMPARISON>
8204 IFE <ZZ-400000>,<
8205 MOVSI AC-1,1 ;SETUP FOR COMPARISON>
8206 034752 245 10 0 00 000001 ROTC AC,1 ;*ROTATE LEFT ONE
8207 034753 312 11 0 00 000007 CAME AC+1,AC-1 ;TEST FOR BIT (N-1) A ONE
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8208 034754 004 11 0 00 004612 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
8209 034755 321 12 0 00 034747 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
8210
8211 ;TEST AC+1 RIGHT HALF
8212 ;TEST ROTC LEFT ONE BIT POSITION
8213 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
8214 ;TEST MQ SHIFT LOGIC GATES
8215 ;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
8216 ;IS TESTED.
8217 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
8218 ;OTHER BIT IS A ONE AFTER ROTATING
8219 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
8220
8221 004613 SN=SN+1
8222 002000 ZZ=ZZ+ZZ ;SELECTED BIT BEFORE ROTATION
8223 IFE ZZ,<ZZ=1>
8224 004000 YY=ZZ+ZZ ;SELECTED BIT AFTER ROTATION
8225 034756 400 10 0 00 000000 SETZ AC, ;INITILAIZE AC TO ALL ZEROS
8226 034757 201 11 0 00 002000 MOVEI AC+1,ZZ ;SET BIT (N) OF AC+1 RIGHT
8227 IFN <ZZ-400000>,<
8228 034760 201 07 0 00 004000 MOVEI AC-1,YY ;SETUP FOR COMPARISON>
8229 IFE <ZZ-400000>,<
8230 MOVSI AC-1,1 ;SETUP FOR COMPARISON>
8231 034761 245 10 0 00 000001 ROTC AC,1 ;*ROTATE LEFT ONE
8232 034762 312 11 0 00 000007 CAME AC+1,AC-1 ;TEST FOR BIT (N-1) A ONE
8233 034763 004 11 0 00 004613 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
8234 034764 321 12 0 00 034756 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
8235
8236 ;TEST AC+1 RIGHT HALF
8237 ;TEST ROTC LEFT ONE BIT POSITION
8238 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
8239 ;TEST MQ SHIFT LOGIC GATES
8240 ;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
8241 ;IS TESTED.
8242 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
8243 ;OTHER BIT IS A ONE AFTER ROTATING
8244 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
8245
8246 004614 SN=SN+1
8247 004000 ZZ=ZZ+ZZ ;SELECTED BIT BEFORE ROTATION
8248 IFE ZZ,<ZZ=1>
8249 010000 YY=ZZ+ZZ ;SELECTED BIT AFTER ROTATION
8250 034765 400 10 0 00 000000 SETZ AC, ;INITILAIZE AC TO ALL ZEROS
8251 034766 201 11 0 00 004000 MOVEI AC+1,ZZ ;SET BIT (N) OF AC+1 RIGHT
8252 IFN <ZZ-400000>,<
8253 034767 201 07 0 00 010000 MOVEI AC-1,YY ;SETUP FOR COMPARISON>
8254 IFE <ZZ-400000>,<
8255 MOVSI AC-1,1 ;SETUP FOR COMPARISON>
8256 034770 245 10 0 00 000001 ROTC AC,1 ;*ROTATE LEFT ONE
8257 034771 312 11 0 00 000007 CAME AC+1,AC-1 ;TEST FOR BIT (N-1) A ONE
8258 034772 004 11 0 00 004614 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
8259 034773 321 12 0 00 034765 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
8260
8261 ;TEST AC+1 RIGHT HALF
8262 ;TEST ROTC LEFT ONE BIT POSITION
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DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES SEQ 0182
8263 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
8264 ;TEST MQ SHIFT LOGIC GATES
8265 ;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
8266 ;IS TESTED.
8267 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
8268 ;OTHER BIT IS A ONE AFTER ROTATING
8269 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
8270
8271 004615 SN=SN+1
8272 010000 ZZ=ZZ+ZZ ;SELECTED BIT BEFORE ROTATION
8273 IFE ZZ,<ZZ=1>
8274 020000 YY=ZZ+ZZ ;SELECTED BIT AFTER ROTATION
8275 034774 400 10 0 00 000000 SETZ AC, ;INITILAIZE AC TO ALL ZEROS
8276 034775 201 11 0 00 010000 MOVEI AC+1,ZZ ;SET BIT (N) OF AC+1 RIGHT
8277 IFN <ZZ-400000>,<
8278 034776 201 07 0 00 020000 MOVEI AC-1,YY ;SETUP FOR COMPARISON>
8279 IFE <ZZ-400000>,<
8280 MOVSI AC-1,1 ;SETUP FOR COMPARISON>
8281 034777 245 10 0 00 000001 ROTC AC,1 ;*ROTATE LEFT ONE
8282 035000 312 11 0 00 000007 CAME AC+1,AC-1 ;TEST FOR BIT (N-1) A ONE
8283 035001 004 11 0 00 004615 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
8284 035002 321 12 0 00 034774 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
8285
8286 ;TEST AC+1 RIGHT HALF
8287 ;TEST ROTC LEFT ONE BIT POSITION
8288 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
8289 ;TEST MQ SHIFT LOGIC GATES
8290 ;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
8291 ;IS TESTED.
8292 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
8293 ;OTHER BIT IS A ONE AFTER ROTATING
8294 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
8295
8296 004616 SN=SN+1
8297 020000 ZZ=ZZ+ZZ ;SELECTED BIT BEFORE ROTATION
8298 IFE ZZ,<ZZ=1>
8299 040000 YY=ZZ+ZZ ;SELECTED BIT AFTER ROTATION
8300 035003 400 10 0 00 000000 SETZ AC, ;INITILAIZE AC TO ALL ZEROS
8301 035004 201 11 0 00 020000 MOVEI AC+1,ZZ ;SET BIT (N) OF AC+1 RIGHT
8302 IFN <ZZ-400000>,<
8303 035005 201 07 0 00 040000 MOVEI AC-1,YY ;SETUP FOR COMPARISON>
8304 IFE <ZZ-400000>,<
8305 MOVSI AC-1,1 ;SETUP FOR COMPARISON>
8306 035006 245 10 0 00 000001 ROTC AC,1 ;*ROTATE LEFT ONE
8307 035007 312 11 0 00 000007 CAME AC+1,AC-1 ;TEST FOR BIT (N-1) A ONE
8308 035010 004 11 0 00 004616 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
8309 035011 321 12 0 00 035003 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
8310
8311 ;TEST AC+1 RIGHT HALF
8312 ;TEST ROTC LEFT ONE BIT POSITION
8313 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
8314 ;TEST MQ SHIFT LOGIC GATES
8315 ;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
8316 ;IS TESTED.
8317 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
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8318 ;OTHER BIT IS A ONE AFTER ROTATING
8319 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
8320
8321 004617 SN=SN+1
8322 040000 ZZ=ZZ+ZZ ;SELECTED BIT BEFORE ROTATION
8323 IFE ZZ,<ZZ=1>
8324 100000 YY=ZZ+ZZ ;SELECTED BIT AFTER ROTATION
8325 035012 400 10 0 00 000000 SETZ AC, ;INITILAIZE AC TO ALL ZEROS
8326 035013 201 11 0 00 040000 MOVEI AC+1,ZZ ;SET BIT (N) OF AC+1 RIGHT
8327 IFN <ZZ-400000>,<
8328 035014 201 07 0 00 100000 MOVEI AC-1,YY ;SETUP FOR COMPARISON>
8329 IFE <ZZ-400000>,<
8330 MOVSI AC-1,1 ;SETUP FOR COMPARISON>
8331 035015 245 10 0 00 000001 ROTC AC,1 ;*ROTATE LEFT ONE
8332 035016 312 11 0 00 000007 CAME AC+1,AC-1 ;TEST FOR BIT (N-1) A ONE
8333 035017 004 11 0 00 004617 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
8334 035020 321 12 0 00 035012 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
8335
8336 ;TEST AC+1 RIGHT HALF
8337 ;TEST ROTC LEFT ONE BIT POSITION
8338 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
8339 ;TEST MQ SHIFT LOGIC GATES
8340 ;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
8341 ;IS TESTED.
8342 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
8343 ;OTHER BIT IS A ONE AFTER ROTATING
8344 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
8345
8346 004620 SN=SN+1
8347 100000 ZZ=ZZ+ZZ ;SELECTED BIT BEFORE ROTATION
8348 IFE ZZ,<ZZ=1>
8349 200000 YY=ZZ+ZZ ;SELECTED BIT AFTER ROTATION
8350 035021 400 10 0 00 000000 SETZ AC, ;INITILAIZE AC TO ALL ZEROS
8351 035022 201 11 0 00 100000 MOVEI AC+1,ZZ ;SET BIT (N) OF AC+1 RIGHT
8352 IFN <ZZ-400000>,<
8353 035023 201 07 0 00 200000 MOVEI AC-1,YY ;SETUP FOR COMPARISON>
8354 IFE <ZZ-400000>,<
8355 MOVSI AC-1,1 ;SETUP FOR COMPARISON>
8356 035024 245 10 0 00 000001 ROTC AC,1 ;*ROTATE LEFT ONE
8357 035025 312 11 0 00 000007 CAME AC+1,AC-1 ;TEST FOR BIT (N-1) A ONE
8358 035026 004 11 0 00 004620 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
8359 035027 321 12 0 00 035021 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
8360
8361 ;TEST AC+1 RIGHT HALF
8362 ;TEST ROTC LEFT ONE BIT POSITION
8363 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
8364 ;TEST MQ SHIFT LOGIC GATES
8365 ;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
8366 ;IS TESTED.
8367 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
8368 ;OTHER BIT IS A ONE AFTER ROTATING
8369 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
8370
8371 004621 SN=SN+1
8372 200000 ZZ=ZZ+ZZ ;SELECTED BIT BEFORE ROTATION
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8373 IFE ZZ,<ZZ=1>
8374 400000 YY=ZZ+ZZ ;SELECTED BIT AFTER ROTATION
8375 035030 400 10 0 00 000000 SETZ AC, ;INITILAIZE AC TO ALL ZEROS
8376 035031 201 11 0 00 200000 MOVEI AC+1,ZZ ;SET BIT (N) OF AC+1 RIGHT
8377 IFN <ZZ-400000>,<
8378 035032 201 07 0 00 400000 MOVEI AC-1,YY ;SETUP FOR COMPARISON>
8379 IFE <ZZ-400000>,<
8380 MOVSI AC-1,1 ;SETUP FOR COMPARISON>
8381 035033 245 10 0 00 000001 ROTC AC,1 ;*ROTATE LEFT ONE
8382 035034 312 11 0 00 000007 CAME AC+1,AC-1 ;TEST FOR BIT (N-1) A ONE
8383 035035 004 11 0 00 004621 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
8384 035036 321 12 0 00 035030 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
8385
8386 ;TEST AC+1 RIGHT HALF
8387 ;TEST ROTC LEFT ONE BIT POSITION
8388 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
8389 ;TEST MQ SHIFT LOGIC GATES
8390 ;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
8391 ;IS TESTED.
8392 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
8393 ;OTHER BIT IS A ONE AFTER ROTATING
8394 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
8395
8396 004622 SN=SN+1
8397 400000 ZZ=ZZ+ZZ ;SELECTED BIT BEFORE ROTATION
8398 IFE ZZ,<ZZ=1>
8399 000001 000000 YY=ZZ+ZZ ;SELECTED BIT AFTER ROTATION
8400 035037 400 10 0 00 000000 SETZ AC, ;INITILAIZE AC TO ALL ZEROS
8401 035040 201 11 0 00 400000 MOVEI AC+1,ZZ ;SET BIT (N) OF AC+1 RIGHT
8402 IFN <ZZ-400000>,<
8403 MOVEI AC-1,YY ;SETUP FOR COMPARISON>
8404 IFE <ZZ-400000>,<
8405 035041 205 07 0 00 000001 MOVSI AC-1,1 ;SETUP FOR COMPARISON>
8406 035042 245 10 0 00 000001 ROTC AC,1 ;*ROTATE LEFT ONE
8407 035043 312 11 0 00 000007 CAME AC+1,AC-1 ;TEST FOR BIT (N-1) A ONE
8408 035044 004 11 0 00 004622 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
8409 035045 321 12 0 00 035037 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
8410
8411
8412 000000 ZZ=0
8413
8414 REPEAT ^D17,< ;TEST AC+1 LEFT HALF
8415 ;TEST ROTC LEFT ONE BIT POSITION
8416 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
8417 ;TEST MQ SHIFT LOGIC GATES
8418 ;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
8419 ;IS TESTED.
8420 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
8421 ;OTHER BIT IS A ONE AFTER ROTATING
8422 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
8423
8424 SN=SN+1
8425 ZZ=ZZ+ZZ ;SELECTED BIT BEFORE ROTATION
8426 IFE ZZ,<ZZ=1>
8427 YY=ZZ+ZZ ;SELECTED BIT AFTER ROTATION
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8428 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
8429 MOVSI AC+1,ZZ ;SET BIT (N) OF AC+1 LEFT
8430 MOVSI AC-1,YY ;SETUP FOR COMPARISON
8431 ROTC AC,1 ;*ROTATE LEFT ONE
8432 CAME AC+1,AC-1 ;TEST FOR BIT (N-1) A ONE
8433 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
8434 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
8435 >
8436 ;TEST AC+1 LEFT HALF
8437 ;TEST ROTC LEFT ONE BIT POSITION
8438 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
8439 ;TEST MQ SHIFT LOGIC GATES
8440 ;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
8441 ;IS TESTED.
8442 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
8443 ;OTHER BIT IS A ONE AFTER ROTATING
8444 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
8445
8446 004623 SN=SN+1
8447 000000 ZZ=ZZ+ZZ ;SELECTED BIT BEFORE ROTATION
8448 000001 IFE ZZ,<ZZ=1>
8449 000002 YY=ZZ+ZZ ;SELECTED BIT AFTER ROTATION
8450 035046 400 10 0 00 000000 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
8451 035047 205 11 0 00 000001 MOVSI AC+1,ZZ ;SET BIT (N) OF AC+1 LEFT
8452 035050 205 07 0 00 000002 MOVSI AC-1,YY ;SETUP FOR COMPARISON
8453 035051 245 10 0 00 000001 ROTC AC,1 ;*ROTATE LEFT ONE
8454 035052 312 11 0 00 000007 CAME AC+1,AC-1 ;TEST FOR BIT (N-1) A ONE
8455 035053 004 11 0 00 004623 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
8456 035054 321 12 0 00 035046 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
8457
8458 ;TEST AC+1 LEFT HALF
8459 ;TEST ROTC LEFT ONE BIT POSITION
8460 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
8461 ;TEST MQ SHIFT LOGIC GATES
8462 ;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
8463 ;IS TESTED.
8464 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
8465 ;OTHER BIT IS A ONE AFTER ROTATING
8466 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
8467
8468 004624 SN=SN+1
8469 000002 ZZ=ZZ+ZZ ;SELECTED BIT BEFORE ROTATION
8470 IFE ZZ,<ZZ=1>
8471 000004 YY=ZZ+ZZ ;SELECTED BIT AFTER ROTATION
8472 035055 400 10 0 00 000000 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
8473 035056 205 11 0 00 000002 MOVSI AC+1,ZZ ;SET BIT (N) OF AC+1 LEFT
8474 035057 205 07 0 00 000004 MOVSI AC-1,YY ;SETUP FOR COMPARISON
8475 035060 245 10 0 00 000001 ROTC AC,1 ;*ROTATE LEFT ONE
8476 035061 312 11 0 00 000007 CAME AC+1,AC-1 ;TEST FOR BIT (N-1) A ONE
8477 035062 004 11 0 00 004624 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
8478 035063 321 12 0 00 035055 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
8479
8480 ;TEST AC+1 LEFT HALF
8481 ;TEST ROTC LEFT ONE BIT POSITION
8482 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
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8483 ;TEST MQ SHIFT LOGIC GATES
8484 ;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
8485 ;IS TESTED.
8486 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
8487 ;OTHER BIT IS A ONE AFTER ROTATING
8488 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
8489
8490 004625 SN=SN+1
8491 000004 ZZ=ZZ+ZZ ;SELECTED BIT BEFORE ROTATION
8492 IFE ZZ,<ZZ=1>
8493 000010 YY=ZZ+ZZ ;SELECTED BIT AFTER ROTATION
8494 035064 400 10 0 00 000000 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
8495 035065 205 11 0 00 000004 MOVSI AC+1,ZZ ;SET BIT (N) OF AC+1 LEFT
8496 035066 205 07 0 00 000010 MOVSI AC-1,YY ;SETUP FOR COMPARISON
8497 035067 245 10 0 00 000001 ROTC AC,1 ;*ROTATE LEFT ONE
8498 035070 312 11 0 00 000007 CAME AC+1,AC-1 ;TEST FOR BIT (N-1) A ONE
8499 035071 004 11 0 00 004625 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
8500 035072 321 12 0 00 035064 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
8501
8502 ;TEST AC+1 LEFT HALF
8503 ;TEST ROTC LEFT ONE BIT POSITION
8504 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
8505 ;TEST MQ SHIFT LOGIC GATES
8506 ;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
8507 ;IS TESTED.
8508 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
8509 ;OTHER BIT IS A ONE AFTER ROTATING
8510 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
8511
8512 004626 SN=SN+1
8513 000010 ZZ=ZZ+ZZ ;SELECTED BIT BEFORE ROTATION
8514 IFE ZZ,<ZZ=1>
8515 000020 YY=ZZ+ZZ ;SELECTED BIT AFTER ROTATION
8516 035073 400 10 0 00 000000 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
8517 035074 205 11 0 00 000010 MOVSI AC+1,ZZ ;SET BIT (N) OF AC+1 LEFT
8518 035075 205 07 0 00 000020 MOVSI AC-1,YY ;SETUP FOR COMPARISON
8519 035076 245 10 0 00 000001 ROTC AC,1 ;*ROTATE LEFT ONE
8520 035077 312 11 0 00 000007 CAME AC+1,AC-1 ;TEST FOR BIT (N-1) A ONE
8521 035100 004 11 0 00 004626 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
8522 035101 321 12 0 00 035073 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
8523
8524 ;TEST AC+1 LEFT HALF
8525 ;TEST ROTC LEFT ONE BIT POSITION
8526 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
8527 ;TEST MQ SHIFT LOGIC GATES
8528 ;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
8529 ;IS TESTED.
8530 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
8531 ;OTHER BIT IS A ONE AFTER ROTATING
8532 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
8533
8534 004627 SN=SN+1
8535 000020 ZZ=ZZ+ZZ ;SELECTED BIT BEFORE ROTATION
8536 IFE ZZ,<ZZ=1>
8537 000040 YY=ZZ+ZZ ;SELECTED BIT AFTER ROTATION
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8538 035102 400 10 0 00 000000 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
8539 035103 205 11 0 00 000020 MOVSI AC+1,ZZ ;SET BIT (N) OF AC+1 LEFT
8540 035104 205 07 0 00 000040 MOVSI AC-1,YY ;SETUP FOR COMPARISON
8541 035105 245 10 0 00 000001 ROTC AC,1 ;*ROTATE LEFT ONE
8542 035106 312 11 0 00 000007 CAME AC+1,AC-1 ;TEST FOR BIT (N-1) A ONE
8543 035107 004 11 0 00 004627 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
8544 035110 321 12 0 00 035102 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
8545
8546 ;TEST AC+1 LEFT HALF
8547 ;TEST ROTC LEFT ONE BIT POSITION
8548 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
8549 ;TEST MQ SHIFT LOGIC GATES
8550 ;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
8551 ;IS TESTED.
8552 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
8553 ;OTHER BIT IS A ONE AFTER ROTATING
8554 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
8555
8556 004630 SN=SN+1
8557 000040 ZZ=ZZ+ZZ ;SELECTED BIT BEFORE ROTATION
8558 IFE ZZ,<ZZ=1>
8559 000100 YY=ZZ+ZZ ;SELECTED BIT AFTER ROTATION
8560 035111 400 10 0 00 000000 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
8561 035112 205 11 0 00 000040 MOVSI AC+1,ZZ ;SET BIT (N) OF AC+1 LEFT
8562 035113 205 07 0 00 000100 MOVSI AC-1,YY ;SETUP FOR COMPARISON
8563 035114 245 10 0 00 000001 ROTC AC,1 ;*ROTATE LEFT ONE
8564 035115 312 11 0 00 000007 CAME AC+1,AC-1 ;TEST FOR BIT (N-1) A ONE
8565 035116 004 11 0 00 004630 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
8566 035117 321 12 0 00 035111 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
8567
8568 ;TEST AC+1 LEFT HALF
8569 ;TEST ROTC LEFT ONE BIT POSITION
8570 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
8571 ;TEST MQ SHIFT LOGIC GATES
8572 ;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
8573 ;IS TESTED.
8574 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
8575 ;OTHER BIT IS A ONE AFTER ROTATING
8576 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
8577
8578 004631 SN=SN+1
8579 000100 ZZ=ZZ+ZZ ;SELECTED BIT BEFORE ROTATION
8580 IFE ZZ,<ZZ=1>
8581 000200 YY=ZZ+ZZ ;SELECTED BIT AFTER ROTATION
8582 035120 400 10 0 00 000000 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
8583 035121 205 11 0 00 000100 MOVSI AC+1,ZZ ;SET BIT (N) OF AC+1 LEFT
8584 035122 205 07 0 00 000200 MOVSI AC-1,YY ;SETUP FOR COMPARISON
8585 035123 245 10 0 00 000001 ROTC AC,1 ;*ROTATE LEFT ONE
8586 035124 312 11 0 00 000007 CAME AC+1,AC-1 ;TEST FOR BIT (N-1) A ONE
8587 035125 004 11 0 00 004631 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
8588 035126 321 12 0 00 035120 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
8589
8590 ;TEST AC+1 LEFT HALF
8591 ;TEST ROTC LEFT ONE BIT POSITION
8592 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
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8593 ;TEST MQ SHIFT LOGIC GATES
8594 ;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
8595 ;IS TESTED.
8596 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
8597 ;OTHER BIT IS A ONE AFTER ROTATING
8598 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
8599
8600 004632 SN=SN+1
8601 000200 ZZ=ZZ+ZZ ;SELECTED BIT BEFORE ROTATION
8602 IFE ZZ,<ZZ=1>
8603 000400 YY=ZZ+ZZ ;SELECTED BIT AFTER ROTATION
8604 035127 400 10 0 00 000000 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
8605 035130 205 11 0 00 000200 MOVSI AC+1,ZZ ;SET BIT (N) OF AC+1 LEFT
8606 035131 205 07 0 00 000400 MOVSI AC-1,YY ;SETUP FOR COMPARISON
8607 035132 245 10 0 00 000001 ROTC AC,1 ;*ROTATE LEFT ONE
8608 035133 312 11 0 00 000007 CAME AC+1,AC-1 ;TEST FOR BIT (N-1) A ONE
8609 035134 004 11 0 00 004632 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
8610 035135 321 12 0 00 035127 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
8611
8612 ;TEST AC+1 LEFT HALF
8613 ;TEST ROTC LEFT ONE BIT POSITION
8614 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
8615 ;TEST MQ SHIFT LOGIC GATES
8616 ;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
8617 ;IS TESTED.
8618 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
8619 ;OTHER BIT IS A ONE AFTER ROTATING
8620 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
8621
8622 004633 SN=SN+1
8623 000400 ZZ=ZZ+ZZ ;SELECTED BIT BEFORE ROTATION
8624 IFE ZZ,<ZZ=1>
8625 001000 YY=ZZ+ZZ ;SELECTED BIT AFTER ROTATION
8626 035136 400 10 0 00 000000 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
8627 035137 205 11 0 00 000400 MOVSI AC+1,ZZ ;SET BIT (N) OF AC+1 LEFT
8628 035140 205 07 0 00 001000 MOVSI AC-1,YY ;SETUP FOR COMPARISON
8629 035141 245 10 0 00 000001 ROTC AC,1 ;*ROTATE LEFT ONE
8630 035142 312 11 0 00 000007 CAME AC+1,AC-1 ;TEST FOR BIT (N-1) A ONE
8631 035143 004 11 0 00 004633 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
8632 035144 321 12 0 00 035136 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
8633
8634 ;TEST AC+1 LEFT HALF
8635 ;TEST ROTC LEFT ONE BIT POSITION
8636 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
8637 ;TEST MQ SHIFT LOGIC GATES
8638 ;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
8639 ;IS TESTED.
8640 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
8641 ;OTHER BIT IS A ONE AFTER ROTATING
8642 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
8643
8644 004634 SN=SN+1
8645 001000 ZZ=ZZ+ZZ ;SELECTED BIT BEFORE ROTATION
8646 IFE ZZ,<ZZ=1>
8647 002000 YY=ZZ+ZZ ;SELECTED BIT AFTER ROTATION
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8648 035145 400 10 0 00 000000 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
8649 035146 205 11 0 00 001000 MOVSI AC+1,ZZ ;SET BIT (N) OF AC+1 LEFT
8650 035147 205 07 0 00 002000 MOVSI AC-1,YY ;SETUP FOR COMPARISON
8651 035150 245 10 0 00 000001 ROTC AC,1 ;*ROTATE LEFT ONE
8652 035151 312 11 0 00 000007 CAME AC+1,AC-1 ;TEST FOR BIT (N-1) A ONE
8653 035152 004 11 0 00 004634 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
8654 035153 321 12 0 00 035145 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
8655
8656 ;TEST AC+1 LEFT HALF
8657 ;TEST ROTC LEFT ONE BIT POSITION
8658 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
8659 ;TEST MQ SHIFT LOGIC GATES
8660 ;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
8661 ;IS TESTED.
8662 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
8663 ;OTHER BIT IS A ONE AFTER ROTATING
8664 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
8665
8666 004635 SN=SN+1
8667 002000 ZZ=ZZ+ZZ ;SELECTED BIT BEFORE ROTATION
8668 IFE ZZ,<ZZ=1>
8669 004000 YY=ZZ+ZZ ;SELECTED BIT AFTER ROTATION
8670 035154 400 10 0 00 000000 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
8671 035155 205 11 0 00 002000 MOVSI AC+1,ZZ ;SET BIT (N) OF AC+1 LEFT
8672 035156 205 07 0 00 004000 MOVSI AC-1,YY ;SETUP FOR COMPARISON
8673 035157 245 10 0 00 000001 ROTC AC,1 ;*ROTATE LEFT ONE
8674 035160 312 11 0 00 000007 CAME AC+1,AC-1 ;TEST FOR BIT (N-1) A ONE
8675 035161 004 11 0 00 004635 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
8676 035162 321 12 0 00 035154 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
8677
8678 ;TEST AC+1 LEFT HALF
8679 ;TEST ROTC LEFT ONE BIT POSITION
8680 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
8681 ;TEST MQ SHIFT LOGIC GATES
8682 ;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
8683 ;IS TESTED.
8684 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
8685 ;OTHER BIT IS A ONE AFTER ROTATING
8686 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
8687
8688 004636 SN=SN+1
8689 004000 ZZ=ZZ+ZZ ;SELECTED BIT BEFORE ROTATION
8690 IFE ZZ,<ZZ=1>
8691 010000 YY=ZZ+ZZ ;SELECTED BIT AFTER ROTATION
8692 035163 400 10 0 00 000000 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
8693 035164 205 11 0 00 004000 MOVSI AC+1,ZZ ;SET BIT (N) OF AC+1 LEFT
8694 035165 205 07 0 00 010000 MOVSI AC-1,YY ;SETUP FOR COMPARISON
8695 035166 245 10 0 00 000001 ROTC AC,1 ;*ROTATE LEFT ONE
8696 035167 312 11 0 00 000007 CAME AC+1,AC-1 ;TEST FOR BIT (N-1) A ONE
8697 035170 004 11 0 00 004636 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
8698 035171 321 12 0 00 035163 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
8699
8700 ;TEST AC+1 LEFT HALF
8701 ;TEST ROTC LEFT ONE BIT POSITION
8702 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
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8703 ;TEST MQ SHIFT LOGIC GATES
8704 ;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
8705 ;IS TESTED.
8706 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
8707 ;OTHER BIT IS A ONE AFTER ROTATING
8708 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
8709
8710 004637 SN=SN+1
8711 010000 ZZ=ZZ+ZZ ;SELECTED BIT BEFORE ROTATION
8712 IFE ZZ,<ZZ=1>
8713 020000 YY=ZZ+ZZ ;SELECTED BIT AFTER ROTATION
8714 035172 400 10 0 00 000000 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
8715 035173 205 11 0 00 010000 MOVSI AC+1,ZZ ;SET BIT (N) OF AC+1 LEFT
8716 035174 205 07 0 00 020000 MOVSI AC-1,YY ;SETUP FOR COMPARISON
8717 035175 245 10 0 00 000001 ROTC AC,1 ;*ROTATE LEFT ONE
8718 035176 312 11 0 00 000007 CAME AC+1,AC-1 ;TEST FOR BIT (N-1) A ONE
8719 035177 004 11 0 00 004637 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
8720 035200 321 12 0 00 035172 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
8721
8722 ;TEST AC+1 LEFT HALF
8723 ;TEST ROTC LEFT ONE BIT POSITION
8724 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
8725 ;TEST MQ SHIFT LOGIC GATES
8726 ;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
8727 ;IS TESTED.
8728 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
8729 ;OTHER BIT IS A ONE AFTER ROTATING
8730 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
8731
8732 004640 SN=SN+1
8733 020000 ZZ=ZZ+ZZ ;SELECTED BIT BEFORE ROTATION
8734 IFE ZZ,<ZZ=1>
8735 040000 YY=ZZ+ZZ ;SELECTED BIT AFTER ROTATION
8736 035201 400 10 0 00 000000 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
8737 035202 205 11 0 00 020000 MOVSI AC+1,ZZ ;SET BIT (N) OF AC+1 LEFT
8738 035203 205 07 0 00 040000 MOVSI AC-1,YY ;SETUP FOR COMPARISON
8739 035204 245 10 0 00 000001 ROTC AC,1 ;*ROTATE LEFT ONE
8740 035205 312 11 0 00 000007 CAME AC+1,AC-1 ;TEST FOR BIT (N-1) A ONE
8741 035206 004 11 0 00 004640 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
8742 035207 321 12 0 00 035201 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
8743
8744 ;TEST AC+1 LEFT HALF
8745 ;TEST ROTC LEFT ONE BIT POSITION
8746 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
8747 ;TEST MQ SHIFT LOGIC GATES
8748 ;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
8749 ;IS TESTED.
8750 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
8751 ;OTHER BIT IS A ONE AFTER ROTATING
8752 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
8753
8754 004641 SN=SN+1
8755 040000 ZZ=ZZ+ZZ ;SELECTED BIT BEFORE ROTATION
8756 IFE ZZ,<ZZ=1>
8757 100000 YY=ZZ+ZZ ;SELECTED BIT AFTER ROTATION
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8758 035210 400 10 0 00 000000 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
8759 035211 205 11 0 00 040000 MOVSI AC+1,ZZ ;SET BIT (N) OF AC+1 LEFT
8760 035212 205 07 0 00 100000 MOVSI AC-1,YY ;SETUP FOR COMPARISON
8761 035213 245 10 0 00 000001 ROTC AC,1 ;*ROTATE LEFT ONE
8762 035214 312 11 0 00 000007 CAME AC+1,AC-1 ;TEST FOR BIT (N-1) A ONE
8763 035215 004 11 0 00 004641 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
8764 035216 321 12 0 00 035210 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
8765
8766 ;TEST AC+1 LEFT HALF
8767 ;TEST ROTC LEFT ONE BIT POSITION
8768 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
8769 ;TEST MQ SHIFT LOGIC GATES
8770 ;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
8771 ;IS TESTED.
8772 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
8773 ;OTHER BIT IS A ONE AFTER ROTATING
8774 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
8775
8776 004642 SN=SN+1
8777 100000 ZZ=ZZ+ZZ ;SELECTED BIT BEFORE ROTATION
8778 IFE ZZ,<ZZ=1>
8779 200000 YY=ZZ+ZZ ;SELECTED BIT AFTER ROTATION
8780 035217 400 10 0 00 000000 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
8781 035220 205 11 0 00 100000 MOVSI AC+1,ZZ ;SET BIT (N) OF AC+1 LEFT
8782 035221 205 07 0 00 200000 MOVSI AC-1,YY ;SETUP FOR COMPARISON
8783 035222 245 10 0 00 000001 ROTC AC,1 ;*ROTATE LEFT ONE
8784 035223 312 11 0 00 000007 CAME AC+1,AC-1 ;TEST FOR BIT (N-1) A ONE
8785 035224 004 11 0 00 004642 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
8786 035225 321 12 0 00 035217 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
8787
8788 ;TEST AC+1 LEFT HALF
8789 ;TEST ROTC LEFT ONE BIT POSITION
8790 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
8791 ;TEST MQ SHIFT LOGIC GATES
8792 ;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
8793 ;IS TESTED.
8794 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
8795 ;OTHER BIT IS A ONE AFTER ROTATING
8796 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
8797
8798 004643 SN=SN+1
8799 200000 ZZ=ZZ+ZZ ;SELECTED BIT BEFORE ROTATION
8800 IFE ZZ,<ZZ=1>
8801 400000 YY=ZZ+ZZ ;SELECTED BIT AFTER ROTATION
8802 035226 400 10 0 00 000000 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
8803 035227 205 11 0 00 200000 MOVSI AC+1,ZZ ;SET BIT (N) OF AC+1 LEFT
8804 035230 205 07 0 00 400000 MOVSI AC-1,YY ;SETUP FOR COMPARISON
8805 035231 245 10 0 00 000001 ROTC AC,1 ;*ROTATE LEFT ONE
8806 035232 312 11 0 00 000007 CAME AC+1,AC-1 ;TEST FOR BIT (N-1) A ONE
8807 035233 004 11 0 00 004643 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
8808 035234 321 12 0 00 035226 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
8809
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DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES SEQ 0192
8810 004700 SN=4700
8811 000000 ZZ=0
8812 E4700: REPEAT ^D18,< ;TEST AC+1 RIGHT HALF
8813 ;TEST ROTC LEFT ONE BIT POSITION
8814 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
8815 ;TEST MQ SHIFT LOGIC GATES
8816 ;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
8817 ;IS TESTED.
8818 ;AN ERROR OCCURS IF THE TESTED BIT IA A ONE AND/OR ANY
8819 ;OTHER BIT IA A ZERO AFTER ROTATING
8820 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
8821
8822 SN=SN+1
8823 ZZ=ZZ+ZZ+1 ;SELECTED BIT BEFORE ROTATION
8824 IFE <ZZ-1>,<ZZ=-2>
8825 YY=<ZZ+ZZ+1>&777777 ;SELECTED BIT AFTER ROTATION
8826 SETOM AC ;INITIALIZE AC TO ALL ONES
8827 HRROI AC+1,ZZ ;CLEAR BIT (N) OF AC+1 RIGHT
8828 IFN <ZZ-377777>&777777,<
8829 HRROI AC-1,YY ;SETUP FOR COMPARISON>
8830 IFE <ZZ-377777>&777777,<
8831 HRLOI AC-1,-2 ;SETUP FOR COMPARISON>
8832 ROTC AC,1 ;*ROTATE LEFT ONE
8833 CAME AC+1,AC-1 ;TEST FOR BIT (N-1) A ZERO
8834 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
8835 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
8836 >
8837 ;TEST AC+1 RIGHT HALF
8838 ;TEST ROTC LEFT ONE BIT POSITION
8839 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
8840 ;TEST MQ SHIFT LOGIC GATES
8841 ;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
8842 ;IS TESTED.
8843 ;AN ERROR OCCURS IF THE TESTED BIT IA A ONE AND/OR ANY
8844 ;OTHER BIT IA A ZERO AFTER ROTATING
8845 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
8846
8847 004701 SN=SN+1
8848 000001 ZZ=ZZ+ZZ+1 ;SELECTED BIT BEFORE ROTATION
8849 777777 777776 IFE <ZZ-1>,<ZZ=-2>
8850 777775 YY=<ZZ+ZZ+1>&777777 ;SELECTED BIT AFTER ROTATION
8851 035235 476 00 0 00 000010 SETOM AC ;INITIALIZE AC TO ALL ONES
8852 035236 561 11 0 00 777776 HRROI AC+1,ZZ ;CLEAR BIT (N) OF AC+1 RIGHT
8853 IFN <ZZ-377777>&777777,<
8854 035237 561 07 0 00 777775 HRROI AC-1,YY ;SETUP FOR COMPARISON>
8855 IFE <ZZ-377777>&777777,<
8856 HRLOI AC-1,-2 ;SETUP FOR COMPARISON>
8857 035240 245 10 0 00 000001 ROTC AC,1 ;*ROTATE LEFT ONE
8858 035241 312 11 0 00 000007 CAME AC+1,AC-1 ;TEST FOR BIT (N-1) A ZERO
8859 035242 004 11 0 00 004701 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
8860 035243 321 12 0 00 035235 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
8861
8862 ;TEST AC+1 RIGHT HALF
8863 ;TEST ROTC LEFT ONE BIT POSITION
8864 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
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8865 ;TEST MQ SHIFT LOGIC GATES
8866 ;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
8867 ;IS TESTED.
8868 ;AN ERROR OCCURS IF THE TESTED BIT IA A ONE AND/OR ANY
8869 ;OTHER BIT IA A ZERO AFTER ROTATING
8870 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
8871
8872 004702 SN=SN+1
8873 777777 777775 ZZ=ZZ+ZZ+1 ;SELECTED BIT BEFORE ROTATION
8874 IFE <ZZ-1>,<ZZ=-2>
8875 777773 YY=<ZZ+ZZ+1>&777777 ;SELECTED BIT AFTER ROTATION
8876 035244 476 00 0 00 000010 SETOM AC ;INITIALIZE AC TO ALL ONES
8877 035245 561 11 0 00 777775 HRROI AC+1,ZZ ;CLEAR BIT (N) OF AC+1 RIGHT
8878 IFN <ZZ-377777>&777777,<
8879 035246 561 07 0 00 777773 HRROI AC-1,YY ;SETUP FOR COMPARISON>
8880 IFE <ZZ-377777>&777777,<
8881 HRLOI AC-1,-2 ;SETUP FOR COMPARISON>
8882 035247 245 10 0 00 000001 ROTC AC,1 ;*ROTATE LEFT ONE
8883 035250 312 11 0 00 000007 CAME AC+1,AC-1 ;TEST FOR BIT (N-1) A ZERO
8884 035251 004 11 0 00 004702 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
8885 035252 321 12 0 00 035244 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
8886
8887 ;TEST AC+1 RIGHT HALF
8888 ;TEST ROTC LEFT ONE BIT POSITION
8889 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
8890 ;TEST MQ SHIFT LOGIC GATES
8891 ;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
8892 ;IS TESTED.
8893 ;AN ERROR OCCURS IF THE TESTED BIT IA A ONE AND/OR ANY
8894 ;OTHER BIT IA A ZERO AFTER ROTATING
8895 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
8896
8897 004703 SN=SN+1
8898 777777 777773 ZZ=ZZ+ZZ+1 ;SELECTED BIT BEFORE ROTATION
8899 IFE <ZZ-1>,<ZZ=-2>
8900 777767 YY=<ZZ+ZZ+1>&777777 ;SELECTED BIT AFTER ROTATION
8901 035253 476 00 0 00 000010 SETOM AC ;INITIALIZE AC TO ALL ONES
8902 035254 561 11 0 00 777773 HRROI AC+1,ZZ ;CLEAR BIT (N) OF AC+1 RIGHT
8903 IFN <ZZ-377777>&777777,<
8904 035255 561 07 0 00 777767 HRROI AC-1,YY ;SETUP FOR COMPARISON>
8905 IFE <ZZ-377777>&777777,<
8906 HRLOI AC-1,-2 ;SETUP FOR COMPARISON>
8907 035256 245 10 0 00 000001 ROTC AC,1 ;*ROTATE LEFT ONE
8908 035257 312 11 0 00 000007 CAME AC+1,AC-1 ;TEST FOR BIT (N-1) A ZERO
8909 035260 004 11 0 00 004703 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
8910 035261 321 12 0 00 035253 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
8911
8912 ;TEST AC+1 RIGHT HALF
8913 ;TEST ROTC LEFT ONE BIT POSITION
8914 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
8915 ;TEST MQ SHIFT LOGIC GATES
8916 ;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
8917 ;IS TESTED.
8918 ;AN ERROR OCCURS IF THE TESTED BIT IA A ONE AND/OR ANY
8919 ;OTHER BIT IA A ZERO AFTER ROTATING
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8920 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
8921
8922 004704 SN=SN+1
8923 777777 777767 ZZ=ZZ+ZZ+1 ;SELECTED BIT BEFORE ROTATION
8924 IFE <ZZ-1>,<ZZ=-2>
8925 777757 YY=<ZZ+ZZ+1>&777777 ;SELECTED BIT AFTER ROTATION
8926 035262 476 00 0 00 000010 SETOM AC ;INITIALIZE AC TO ALL ONES
8927 035263 561 11 0 00 777767 HRROI AC+1,ZZ ;CLEAR BIT (N) OF AC+1 RIGHT
8928 IFN <ZZ-377777>&777777,<
8929 035264 561 07 0 00 777757 HRROI AC-1,YY ;SETUP FOR COMPARISON>
8930 IFE <ZZ-377777>&777777,<
8931 HRLOI AC-1,-2 ;SETUP FOR COMPARISON>
8932 035265 245 10 0 00 000001 ROTC AC,1 ;*ROTATE LEFT ONE
8933 035266 312 11 0 00 000007 CAME AC+1,AC-1 ;TEST FOR BIT (N-1) A ZERO
8934 035267 004 11 0 00 004704 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
8935 035270 321 12 0 00 035262 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
8936
8937 ;TEST AC+1 RIGHT HALF
8938 ;TEST ROTC LEFT ONE BIT POSITION
8939 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
8940 ;TEST MQ SHIFT LOGIC GATES
8941 ;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
8942 ;IS TESTED.
8943 ;AN ERROR OCCURS IF THE TESTED BIT IA A ONE AND/OR ANY
8944 ;OTHER BIT IA A ZERO AFTER ROTATING
8945 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
8946
8947 004705 SN=SN+1
8948 777777 777757 ZZ=ZZ+ZZ+1 ;SELECTED BIT BEFORE ROTATION
8949 IFE <ZZ-1>,<ZZ=-2>
8950 777737 YY=<ZZ+ZZ+1>&777777 ;SELECTED BIT AFTER ROTATION
8951 035271 476 00 0 00 000010 SETOM AC ;INITIALIZE AC TO ALL ONES
8952 035272 561 11 0 00 777757 HRROI AC+1,ZZ ;CLEAR BIT (N) OF AC+1 RIGHT
8953 IFN <ZZ-377777>&777777,<
8954 035273 561 07 0 00 777737 HRROI AC-1,YY ;SETUP FOR COMPARISON>
8955 IFE <ZZ-377777>&777777,<
8956 HRLOI AC-1,-2 ;SETUP FOR COMPARISON>
8957 035274 245 10 0 00 000001 ROTC AC,1 ;*ROTATE LEFT ONE
8958 035275 312 11 0 00 000007 CAME AC+1,AC-1 ;TEST FOR BIT (N-1) A ZERO
8959 035276 004 11 0 00 004705 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
8960 035277 321 12 0 00 035271 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
8961
8962 ;TEST AC+1 RIGHT HALF
8963 ;TEST ROTC LEFT ONE BIT POSITION
8964 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
8965 ;TEST MQ SHIFT LOGIC GATES
8966 ;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
8967 ;IS TESTED.
8968 ;AN ERROR OCCURS IF THE TESTED BIT IA A ONE AND/OR ANY
8969 ;OTHER BIT IA A ZERO AFTER ROTATING
8970 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
8971
8972 004706 SN=SN+1
8973 777777 777737 ZZ=ZZ+ZZ+1 ;SELECTED BIT BEFORE ROTATION
8974 IFE <ZZ-1>,<ZZ=-2>
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8975 777677 YY=<ZZ+ZZ+1>&777777 ;SELECTED BIT AFTER ROTATION
8976 035300 476 00 0 00 000010 SETOM AC ;INITIALIZE AC TO ALL ONES
8977 035301 561 11 0 00 777737 HRROI AC+1,ZZ ;CLEAR BIT (N) OF AC+1 RIGHT
8978 IFN <ZZ-377777>&777777,<
8979 035302 561 07 0 00 777677 HRROI AC-1,YY ;SETUP FOR COMPARISON>
8980 IFE <ZZ-377777>&777777,<
8981 HRLOI AC-1,-2 ;SETUP FOR COMPARISON>
8982 035303 245 10 0 00 000001 ROTC AC,1 ;*ROTATE LEFT ONE
8983 035304 312 11 0 00 000007 CAME AC+1,AC-1 ;TEST FOR BIT (N-1) A ZERO
8984 035305 004 11 0 00 004706 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
8985 035306 321 12 0 00 035300 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
8986
8987 ;TEST AC+1 RIGHT HALF
8988 ;TEST ROTC LEFT ONE BIT POSITION
8989 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
8990 ;TEST MQ SHIFT LOGIC GATES
8991 ;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
8992 ;IS TESTED.
8993 ;AN ERROR OCCURS IF THE TESTED BIT IA A ONE AND/OR ANY
8994 ;OTHER BIT IA A ZERO AFTER ROTATING
8995 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
8996
8997 004707 SN=SN+1
8998 777777 777677 ZZ=ZZ+ZZ+1 ;SELECTED BIT BEFORE ROTATION
8999 IFE <ZZ-1>,<ZZ=-2>
9000 777577 YY=<ZZ+ZZ+1>&777777 ;SELECTED BIT AFTER ROTATION
9001 035307 476 00 0 00 000010 SETOM AC ;INITIALIZE AC TO ALL ONES
9002 035310 561 11 0 00 777677 HRROI AC+1,ZZ ;CLEAR BIT (N) OF AC+1 RIGHT
9003 IFN <ZZ-377777>&777777,<
9004 035311 561 07 0 00 777577 HRROI AC-1,YY ;SETUP FOR COMPARISON>
9005 IFE <ZZ-377777>&777777,<
9006 HRLOI AC-1,-2 ;SETUP FOR COMPARISON>
9007 035312 245 10 0 00 000001 ROTC AC,1 ;*ROTATE LEFT ONE
9008 035313 312 11 0 00 000007 CAME AC+1,AC-1 ;TEST FOR BIT (N-1) A ZERO
9009 035314 004 11 0 00 004707 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
9010 035315 321 12 0 00 035307 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
9011
9012 ;TEST AC+1 RIGHT HALF
9013 ;TEST ROTC LEFT ONE BIT POSITION
9014 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
9015 ;TEST MQ SHIFT LOGIC GATES
9016 ;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
9017 ;IS TESTED.
9018 ;AN ERROR OCCURS IF THE TESTED BIT IA A ONE AND/OR ANY
9019 ;OTHER BIT IA A ZERO AFTER ROTATING
9020 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
9021
9022 004710 SN=SN+1
9023 777777 777577 ZZ=ZZ+ZZ+1 ;SELECTED BIT BEFORE ROTATION
9024 IFE <ZZ-1>,<ZZ=-2>
9025 777377 YY=<ZZ+ZZ+1>&777777 ;SELECTED BIT AFTER ROTATION
9026 035316 476 00 0 00 000010 SETOM AC ;INITIALIZE AC TO ALL ONES
9027 035317 561 11 0 00 777577 HRROI AC+1,ZZ ;CLEAR BIT (N) OF AC+1 RIGHT
9028 IFN <ZZ-377777>&777777,<
9029 035320 561 07 0 00 777377 HRROI AC-1,YY ;SETUP FOR COMPARISON>
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9030 IFE <ZZ-377777>&777777,<
9031 HRLOI AC-1,-2 ;SETUP FOR COMPARISON>
9032 035321 245 10 0 00 000001 ROTC AC,1 ;*ROTATE LEFT ONE
9033 035322 312 11 0 00 000007 CAME AC+1,AC-1 ;TEST FOR BIT (N-1) A ZERO
9034 035323 004 11 0 00 004710 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
9035 035324 321 12 0 00 035316 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
9036
9037 ;TEST AC+1 RIGHT HALF
9038 ;TEST ROTC LEFT ONE BIT POSITION
9039 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
9040 ;TEST MQ SHIFT LOGIC GATES
9041 ;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
9042 ;IS TESTED.
9043 ;AN ERROR OCCURS IF THE TESTED BIT IA A ONE AND/OR ANY
9044 ;OTHER BIT IA A ZERO AFTER ROTATING
9045 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
9046
9047 004711 SN=SN+1
9048 777777 777377 ZZ=ZZ+ZZ+1 ;SELECTED BIT BEFORE ROTATION
9049 IFE <ZZ-1>,<ZZ=-2>
9050 776777 YY=<ZZ+ZZ+1>&777777 ;SELECTED BIT AFTER ROTATION
9051 035325 476 00 0 00 000010 SETOM AC ;INITIALIZE AC TO ALL ONES
9052 035326 561 11 0 00 777377 HRROI AC+1,ZZ ;CLEAR BIT (N) OF AC+1 RIGHT
9053 IFN <ZZ-377777>&777777,<
9054 035327 561 07 0 00 776777 HRROI AC-1,YY ;SETUP FOR COMPARISON>
9055 IFE <ZZ-377777>&777777,<
9056 HRLOI AC-1,-2 ;SETUP FOR COMPARISON>
9057 035330 245 10 0 00 000001 ROTC AC,1 ;*ROTATE LEFT ONE
9058 035331 312 11 0 00 000007 CAME AC+1,AC-1 ;TEST FOR BIT (N-1) A ZERO
9059 035332 004 11 0 00 004711 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
9060 035333 321 12 0 00 035325 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
9061
9062 ;TEST AC+1 RIGHT HALF
9063 ;TEST ROTC LEFT ONE BIT POSITION
9064 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
9065 ;TEST MQ SHIFT LOGIC GATES
9066 ;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
9067 ;IS TESTED.
9068 ;AN ERROR OCCURS IF THE TESTED BIT IA A ONE AND/OR ANY
9069 ;OTHER BIT IA A ZERO AFTER ROTATING
9070 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
9071
9072 004712 SN=SN+1
9073 777777 776777 ZZ=ZZ+ZZ+1 ;SELECTED BIT BEFORE ROTATION
9074 IFE <ZZ-1>,<ZZ=-2>
9075 775777 YY=<ZZ+ZZ+1>&777777 ;SELECTED BIT AFTER ROTATION
9076 035334 476 00 0 00 000010 SETOM AC ;INITIALIZE AC TO ALL ONES
9077 035335 561 11 0 00 776777 HRROI AC+1,ZZ ;CLEAR BIT (N) OF AC+1 RIGHT
9078 IFN <ZZ-377777>&777777,<
9079 035336 561 07 0 00 775777 HRROI AC-1,YY ;SETUP FOR COMPARISON>
9080 IFE <ZZ-377777>&777777,<
9081 HRLOI AC-1,-2 ;SETUP FOR COMPARISON>
9082 035337 245 10 0 00 000001 ROTC AC,1 ;*ROTATE LEFT ONE
9083 035340 312 11 0 00 000007 CAME AC+1,AC-1 ;TEST FOR BIT (N-1) A ZERO
9084 035341 004 11 0 00 004712 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
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9085 035342 321 12 0 00 035334 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
9086
9087 ;TEST AC+1 RIGHT HALF
9088 ;TEST ROTC LEFT ONE BIT POSITION
9089 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
9090 ;TEST MQ SHIFT LOGIC GATES
9091 ;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
9092 ;IS TESTED.
9093 ;AN ERROR OCCURS IF THE TESTED BIT IA A ONE AND/OR ANY
9094 ;OTHER BIT IA A ZERO AFTER ROTATING
9095 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
9096
9097 004713 SN=SN+1
9098 777777 775777 ZZ=ZZ+ZZ+1 ;SELECTED BIT BEFORE ROTATION
9099 IFE <ZZ-1>,<ZZ=-2>
9100 773777 YY=<ZZ+ZZ+1>&777777 ;SELECTED BIT AFTER ROTATION
9101 035343 476 00 0 00 000010 SETOM AC ;INITIALIZE AC TO ALL ONES
9102 035344 561 11 0 00 775777 HRROI AC+1,ZZ ;CLEAR BIT (N) OF AC+1 RIGHT
9103 IFN <ZZ-377777>&777777,<
9104 035345 561 07 0 00 773777 HRROI AC-1,YY ;SETUP FOR COMPARISON>
9105 IFE <ZZ-377777>&777777,<
9106 HRLOI AC-1,-2 ;SETUP FOR COMPARISON>
9107 035346 245 10 0 00 000001 ROTC AC,1 ;*ROTATE LEFT ONE
9108 035347 312 11 0 00 000007 CAME AC+1,AC-1 ;TEST FOR BIT (N-1) A ZERO
9109 035350 004 11 0 00 004713 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
9110 035351 321 12 0 00 035343 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
9111
9112 ;TEST AC+1 RIGHT HALF
9113 ;TEST ROTC LEFT ONE BIT POSITION
9114 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
9115 ;TEST MQ SHIFT LOGIC GATES
9116 ;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
9117 ;IS TESTED.
9118 ;AN ERROR OCCURS IF THE TESTED BIT IA A ONE AND/OR ANY
9119 ;OTHER BIT IA A ZERO AFTER ROTATING
9120 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
9121
9122 004714 SN=SN+1
9123 777777 773777 ZZ=ZZ+ZZ+1 ;SELECTED BIT BEFORE ROTATION
9124 IFE <ZZ-1>,<ZZ=-2>
9125 767777 YY=<ZZ+ZZ+1>&777777 ;SELECTED BIT AFTER ROTATION
9126 035352 476 00 0 00 000010 SETOM AC ;INITIALIZE AC TO ALL ONES
9127 035353 561 11 0 00 773777 HRROI AC+1,ZZ ;CLEAR BIT (N) OF AC+1 RIGHT
9128 IFN <ZZ-377777>&777777,<
9129 035354 561 07 0 00 767777 HRROI AC-1,YY ;SETUP FOR COMPARISON>
9130 IFE <ZZ-377777>&777777,<
9131 HRLOI AC-1,-2 ;SETUP FOR COMPARISON>
9132 035355 245 10 0 00 000001 ROTC AC,1 ;*ROTATE LEFT ONE
9133 035356 312 11 0 00 000007 CAME AC+1,AC-1 ;TEST FOR BIT (N-1) A ZERO
9134 035357 004 11 0 00 004714 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
9135 035360 321 12 0 00 035352 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
9136
9137 ;TEST AC+1 RIGHT HALF
9138 ;TEST ROTC LEFT ONE BIT POSITION
9139 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
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DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES SEQ 0198
9140 ;TEST MQ SHIFT LOGIC GATES
9141 ;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
9142 ;IS TESTED.
9143 ;AN ERROR OCCURS IF THE TESTED BIT IA A ONE AND/OR ANY
9144 ;OTHER BIT IA A ZERO AFTER ROTATING
9145 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
9146
9147 004715 SN=SN+1
9148 777777 767777 ZZ=ZZ+ZZ+1 ;SELECTED BIT BEFORE ROTATION
9149 IFE <ZZ-1>,<ZZ=-2>
9150 757777 YY=<ZZ+ZZ+1>&777777 ;SELECTED BIT AFTER ROTATION
9151 035361 476 00 0 00 000010 SETOM AC ;INITIALIZE AC TO ALL ONES
9152 035362 561 11 0 00 767777 HRROI AC+1,ZZ ;CLEAR BIT (N) OF AC+1 RIGHT
9153 IFN <ZZ-377777>&777777,<
9154 035363 561 07 0 00 757777 HRROI AC-1,YY ;SETUP FOR COMPARISON>
9155 IFE <ZZ-377777>&777777,<
9156 HRLOI AC-1,-2 ;SETUP FOR COMPARISON>
9157 035364 245 10 0 00 000001 ROTC AC,1 ;*ROTATE LEFT ONE
9158 035365 312 11 0 00 000007 CAME AC+1,AC-1 ;TEST FOR BIT (N-1) A ZERO
9159 035366 004 11 0 00 004715 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
9160 035367 321 12 0 00 035361 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
9161
9162 ;TEST AC+1 RIGHT HALF
9163 ;TEST ROTC LEFT ONE BIT POSITION
9164 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
9165 ;TEST MQ SHIFT LOGIC GATES
9166 ;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
9167 ;IS TESTED.
9168 ;AN ERROR OCCURS IF THE TESTED BIT IA A ONE AND/OR ANY
9169 ;OTHER BIT IA A ZERO AFTER ROTATING
9170 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
9171
9172 004716 SN=SN+1
9173 777777 757777 ZZ=ZZ+ZZ+1 ;SELECTED BIT BEFORE ROTATION
9174 IFE <ZZ-1>,<ZZ=-2>
9175 737777 YY=<ZZ+ZZ+1>&777777 ;SELECTED BIT AFTER ROTATION
9176 035370 476 00 0 00 000010 SETOM AC ;INITIALIZE AC TO ALL ONES
9177 035371 561 11 0 00 757777 HRROI AC+1,ZZ ;CLEAR BIT (N) OF AC+1 RIGHT
9178 IFN <ZZ-377777>&777777,<
9179 035372 561 07 0 00 737777 HRROI AC-1,YY ;SETUP FOR COMPARISON>
9180 IFE <ZZ-377777>&777777,<
9181 HRLOI AC-1,-2 ;SETUP FOR COMPARISON>
9182 035373 245 10 0 00 000001 ROTC AC,1 ;*ROTATE LEFT ONE
9183 035374 312 11 0 00 000007 CAME AC+1,AC-1 ;TEST FOR BIT (N-1) A ZERO
9184 035375 004 11 0 00 004716 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
9185 035376 321 12 0 00 035370 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
9186
9187 ;TEST AC+1 RIGHT HALF
9188 ;TEST ROTC LEFT ONE BIT POSITION
9189 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
9190 ;TEST MQ SHIFT LOGIC GATES
9191 ;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
9192 ;IS TESTED.
9193 ;AN ERROR OCCURS IF THE TESTED BIT IA A ONE AND/OR ANY
9194 ;OTHER BIT IA A ZERO AFTER ROTATING
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9195 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
9196
9197 004717 SN=SN+1
9198 777777 737777 ZZ=ZZ+ZZ+1 ;SELECTED BIT BEFORE ROTATION
9199 IFE <ZZ-1>,<ZZ=-2>
9200 677777 YY=<ZZ+ZZ+1>&777777 ;SELECTED BIT AFTER ROTATION
9201 035377 476 00 0 00 000010 SETOM AC ;INITIALIZE AC TO ALL ONES
9202 035400 561 11 0 00 737777 HRROI AC+1,ZZ ;CLEAR BIT (N) OF AC+1 RIGHT
9203 IFN <ZZ-377777>&777777,<
9204 035401 561 07 0 00 677777 HRROI AC-1,YY ;SETUP FOR COMPARISON>
9205 IFE <ZZ-377777>&777777,<
9206 HRLOI AC-1,-2 ;SETUP FOR COMPARISON>
9207 035402 245 10 0 00 000001 ROTC AC,1 ;*ROTATE LEFT ONE
9208 035403 312 11 0 00 000007 CAME AC+1,AC-1 ;TEST FOR BIT (N-1) A ZERO
9209 035404 004 11 0 00 004717 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
9210 035405 321 12 0 00 035377 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
9211
9212 ;TEST AC+1 RIGHT HALF
9213 ;TEST ROTC LEFT ONE BIT POSITION
9214 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
9215 ;TEST MQ SHIFT LOGIC GATES
9216 ;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
9217 ;IS TESTED.
9218 ;AN ERROR OCCURS IF THE TESTED BIT IA A ONE AND/OR ANY
9219 ;OTHER BIT IA A ZERO AFTER ROTATING
9220 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
9221
9222 004720 SN=SN+1
9223 777777 677777 ZZ=ZZ+ZZ+1 ;SELECTED BIT BEFORE ROTATION
9224 IFE <ZZ-1>,<ZZ=-2>
9225 577777 YY=<ZZ+ZZ+1>&777777 ;SELECTED BIT AFTER ROTATION
9226 035406 476 00 0 00 000010 SETOM AC ;INITIALIZE AC TO ALL ONES
9227 035407 561 11 0 00 677777 HRROI AC+1,ZZ ;CLEAR BIT (N) OF AC+1 RIGHT
9228 IFN <ZZ-377777>&777777,<
9229 035410 561 07 0 00 577777 HRROI AC-1,YY ;SETUP FOR COMPARISON>
9230 IFE <ZZ-377777>&777777,<
9231 HRLOI AC-1,-2 ;SETUP FOR COMPARISON>
9232 035411 245 10 0 00 000001 ROTC AC,1 ;*ROTATE LEFT ONE
9233 035412 312 11 0 00 000007 CAME AC+1,AC-1 ;TEST FOR BIT (N-1) A ZERO
9234 035413 004 11 0 00 004720 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
9235 035414 321 12 0 00 035406 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
9236
9237 ;TEST AC+1 RIGHT HALF
9238 ;TEST ROTC LEFT ONE BIT POSITION
9239 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
9240 ;TEST MQ SHIFT LOGIC GATES
9241 ;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
9242 ;IS TESTED.
9243 ;AN ERROR OCCURS IF THE TESTED BIT IA A ONE AND/OR ANY
9244 ;OTHER BIT IA A ZERO AFTER ROTATING
9245 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
9246
9247 004721 SN=SN+1
9248 777777 577777 ZZ=ZZ+ZZ+1 ;SELECTED BIT BEFORE ROTATION
9249 IFE <ZZ-1>,<ZZ=-2>
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DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES SEQ 0200
9250 377777 YY=<ZZ+ZZ+1>&777777 ;SELECTED BIT AFTER ROTATION
9251 035415 476 00 0 00 000010 SETOM AC ;INITIALIZE AC TO ALL ONES
9252 035416 561 11 0 00 577777 HRROI AC+1,ZZ ;CLEAR BIT (N) OF AC+1 RIGHT
9253 IFN <ZZ-377777>&777777,<
9254 035417 561 07 0 00 377777 HRROI AC-1,YY ;SETUP FOR COMPARISON>
9255 IFE <ZZ-377777>&777777,<
9256 HRLOI AC-1,-2 ;SETUP FOR COMPARISON>
9257 035420 245 10 0 00 000001 ROTC AC,1 ;*ROTATE LEFT ONE
9258 035421 312 11 0 00 000007 CAME AC+1,AC-1 ;TEST FOR BIT (N-1) A ZERO
9259 035422 004 11 0 00 004721 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
9260 035423 321 12 0 00 035415 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
9261
9262 ;TEST AC+1 RIGHT HALF
9263 ;TEST ROTC LEFT ONE BIT POSITION
9264 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
9265 ;TEST MQ SHIFT LOGIC GATES
9266 ;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
9267 ;IS TESTED.
9268 ;AN ERROR OCCURS IF THE TESTED BIT IA A ONE AND/OR ANY
9269 ;OTHER BIT IA A ZERO AFTER ROTATING
9270 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
9271
9272 004722 SN=SN+1
9273 777777 377777 ZZ=ZZ+ZZ+1 ;SELECTED BIT BEFORE ROTATION
9274 IFE <ZZ-1>,<ZZ=-2>
9275 777777 YY=<ZZ+ZZ+1>&777777 ;SELECTED BIT AFTER ROTATION
9276 035424 476 00 0 00 000010 SETOM AC ;INITIALIZE AC TO ALL ONES
9277 035425 561 11 0 00 377777 HRROI AC+1,ZZ ;CLEAR BIT (N) OF AC+1 RIGHT
9278 IFN <ZZ-377777>&777777,<
9279 HRROI AC-1,YY ;SETUP FOR COMPARISON>
9280 IFE <ZZ-377777>&777777,<
9281 035426 525 07 0 00 777776 HRLOI AC-1,-2 ;SETUP FOR COMPARISON>
9282 035427 245 10 0 00 000001 ROTC AC,1 ;*ROTATE LEFT ONE
9283 035430 312 11 0 00 000007 CAME AC+1,AC-1 ;TEST FOR BIT (N-1) A ZERO
9284 035431 004 11 0 00 004722 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
9285 035432 321 12 0 00 035424 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
9286
9287 PAGE
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DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES SEQ 0201
9288 000000 ZZ=0
9289
9290 REPEAT ^D17,< ;TEST AC+1 LEFT HALF
9291 ;TEST ROTC LEFT ONE BIT POSITION
9292 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
9293 ;TEST MQ SHIFT LOGIC GATES
9294 ;AC, AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
9295 ;IS TESTED.
9296 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
9297 ;OTHER BIT IS A ZERO AFTER ROTATING
9298 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
9299 ;OF THE MQ
9300
9301 SN=SN+1
9302 ZZ=ZZ+ZZ+1 ;SELECTED BIT BEFORE ROTATION
9303 IFE <ZZ-1>,<ZZ=-2>
9304 YY=<ZZ+ZZ+1>&777777 ;SELECTED BIT AFTER ROTATION
9305 SETOM AC ;INITAILIZE AC TO ALL ONES
9306 HRLOI AC+1,ZZ&777777 ;CLEAR BIT (N) OF AC+1 RIGHT
9307 HRLOI AC-1,YY ;SETUP FOR COMPARISON
9308 ROTC AC,1 ;*ROTATE LEFT ONE
9309 CAME AC+1,AC-1 ;TEST FOR BIT (N-1) A ZERO
9310 ER4 AC+1, ;MQ GATE UNDER TEST FAILED
9311 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
9312 >
9313 ;TEST AC+1 LEFT HALF
9314 ;TEST ROTC LEFT ONE BIT POSITION
9315 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
9316 ;TEST MQ SHIFT LOGIC GATES
9317 ;AC, AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
9318 ;IS TESTED.
9319 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
9320 ;OTHER BIT IS A ZERO AFTER ROTATING
9321 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
9322 ;OF THE MQ
9323
9324 004723 SN=SN+1
9325 000001 ZZ=ZZ+ZZ+1 ;SELECTED BIT BEFORE ROTATION
9326 777777 777776 IFE <ZZ-1>,<ZZ=-2>
9327 777775 YY=<ZZ+ZZ+1>&777777 ;SELECTED BIT AFTER ROTATION
9328 035433 476 00 0 00 000010 SETOM AC ;INITAILIZE AC TO ALL ONES
9329 035434 525 11 0 00 777776 HRLOI AC+1,ZZ&777777 ;CLEAR BIT (N) OF AC+1 RIGHT
9330 035435 525 07 0 00 777775 HRLOI AC-1,YY ;SETUP FOR COMPARISON
9331 035436 245 10 0 00 000001 ROTC AC,1 ;*ROTATE LEFT ONE
9332 035437 312 11 0 00 000007 CAME AC+1,AC-1 ;TEST FOR BIT (N-1) A ZERO
9333 035440 004 11 0 00 000000 ER4 AC+1, ;MQ GATE UNDER TEST FAILED
9334 035441 321 12 0 00 035433 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
9335
9336 ;TEST AC+1 LEFT HALF
9337 ;TEST ROTC LEFT ONE BIT POSITION
9338 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
9339 ;TEST MQ SHIFT LOGIC GATES
9340 ;AC, AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
9341 ;IS TESTED.
9342 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
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DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES SEQ 0202
9343 ;OTHER BIT IS A ZERO AFTER ROTATING
9344 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
9345 ;OF THE MQ
9346
9347 004724 SN=SN+1
9348 777777 777775 ZZ=ZZ+ZZ+1 ;SELECTED BIT BEFORE ROTATION
9349 IFE <ZZ-1>,<ZZ=-2>
9350 777773 YY=<ZZ+ZZ+1>&777777 ;SELECTED BIT AFTER ROTATION
9351 035442 476 00 0 00 000010 SETOM AC ;INITAILIZE AC TO ALL ONES
9352 035443 525 11 0 00 777775 HRLOI AC+1,ZZ&777777 ;CLEAR BIT (N) OF AC+1 RIGHT
9353 035444 525 07 0 00 777773 HRLOI AC-1,YY ;SETUP FOR COMPARISON
9354 035445 245 10 0 00 000001 ROTC AC,1 ;*ROTATE LEFT ONE
9355 035446 312 11 0 00 000007 CAME AC+1,AC-1 ;TEST FOR BIT (N-1) A ZERO
9356 035447 004 11 0 00 000000 ER4 AC+1, ;MQ GATE UNDER TEST FAILED
9357 035450 321 12 0 00 035442 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
9358
9359 ;TEST AC+1 LEFT HALF
9360 ;TEST ROTC LEFT ONE BIT POSITION
9361 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
9362 ;TEST MQ SHIFT LOGIC GATES
9363 ;AC, AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
9364 ;IS TESTED.
9365 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
9366 ;OTHER BIT IS A ZERO AFTER ROTATING
9367 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
9368 ;OF THE MQ
9369
9370 004725 SN=SN+1
9371 777777 777773 ZZ=ZZ+ZZ+1 ;SELECTED BIT BEFORE ROTATION
9372 IFE <ZZ-1>,<ZZ=-2>
9373 777767 YY=<ZZ+ZZ+1>&777777 ;SELECTED BIT AFTER ROTATION
9374 035451 476 00 0 00 000010 SETOM AC ;INITAILIZE AC TO ALL ONES
9375 035452 525 11 0 00 777773 HRLOI AC+1,ZZ&777777 ;CLEAR BIT (N) OF AC+1 RIGHT
9376 035453 525 07 0 00 777767 HRLOI AC-1,YY ;SETUP FOR COMPARISON
9377 035454 245 10 0 00 000001 ROTC AC,1 ;*ROTATE LEFT ONE
9378 035455 312 11 0 00 000007 CAME AC+1,AC-1 ;TEST FOR BIT (N-1) A ZERO
9379 035456 004 11 0 00 000000 ER4 AC+1, ;MQ GATE UNDER TEST FAILED
9380 035457 321 12 0 00 035451 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
9381
9382 ;TEST AC+1 LEFT HALF
9383 ;TEST ROTC LEFT ONE BIT POSITION
9384 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
9385 ;TEST MQ SHIFT LOGIC GATES
9386 ;AC, AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
9387 ;IS TESTED.
9388 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
9389 ;OTHER BIT IS A ZERO AFTER ROTATING
9390 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
9391 ;OF THE MQ
9392
9393 004726 SN=SN+1
9394 777777 777767 ZZ=ZZ+ZZ+1 ;SELECTED BIT BEFORE ROTATION
9395 IFE <ZZ-1>,<ZZ=-2>
9396 777757 YY=<ZZ+ZZ+1>&777777 ;SELECTED BIT AFTER ROTATION
9397 035460 476 00 0 00 000010 SETOM AC ;INITAILIZE AC TO ALL ONES
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DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES SEQ 0203
9398 035461 525 11 0 00 777767 HRLOI AC+1,ZZ&777777 ;CLEAR BIT (N) OF AC+1 RIGHT
9399 035462 525 07 0 00 777757 HRLOI AC-1,YY ;SETUP FOR COMPARISON
9400 035463 245 10 0 00 000001 ROTC AC,1 ;*ROTATE LEFT ONE
9401 035464 312 11 0 00 000007 CAME AC+1,AC-1 ;TEST FOR BIT (N-1) A ZERO
9402 035465 004 11 0 00 000000 ER4 AC+1, ;MQ GATE UNDER TEST FAILED
9403 035466 321 12 0 00 035460 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
9404
9405 ;TEST AC+1 LEFT HALF
9406 ;TEST ROTC LEFT ONE BIT POSITION
9407 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
9408 ;TEST MQ SHIFT LOGIC GATES
9409 ;AC, AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
9410 ;IS TESTED.
9411 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
9412 ;OTHER BIT IS A ZERO AFTER ROTATING
9413 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
9414 ;OF THE MQ
9415
9416 004727 SN=SN+1
9417 777777 777757 ZZ=ZZ+ZZ+1 ;SELECTED BIT BEFORE ROTATION
9418 IFE <ZZ-1>,<ZZ=-2>
9419 777737 YY=<ZZ+ZZ+1>&777777 ;SELECTED BIT AFTER ROTATION
9420 035467 476 00 0 00 000010 SETOM AC ;INITAILIZE AC TO ALL ONES
9421 035470 525 11 0 00 777757 HRLOI AC+1,ZZ&777777 ;CLEAR BIT (N) OF AC+1 RIGHT
9422 035471 525 07 0 00 777737 HRLOI AC-1,YY ;SETUP FOR COMPARISON
9423 035472 245 10 0 00 000001 ROTC AC,1 ;*ROTATE LEFT ONE
9424 035473 312 11 0 00 000007 CAME AC+1,AC-1 ;TEST FOR BIT (N-1) A ZERO
9425 035474 004 11 0 00 000000 ER4 AC+1, ;MQ GATE UNDER TEST FAILED
9426 035475 321 12 0 00 035467 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
9427
9428 ;TEST AC+1 LEFT HALF
9429 ;TEST ROTC LEFT ONE BIT POSITION
9430 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
9431 ;TEST MQ SHIFT LOGIC GATES
9432 ;AC, AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
9433 ;IS TESTED.
9434 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
9435 ;OTHER BIT IS A ZERO AFTER ROTATING
9436 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
9437 ;OF THE MQ
9438
9439 004730 SN=SN+1
9440 777777 777737 ZZ=ZZ+ZZ+1 ;SELECTED BIT BEFORE ROTATION
9441 IFE <ZZ-1>,<ZZ=-2>
9442 777677 YY=<ZZ+ZZ+1>&777777 ;SELECTED BIT AFTER ROTATION
9443 035476 476 00 0 00 000010 SETOM AC ;INITAILIZE AC TO ALL ONES
9444 035477 525 11 0 00 777737 HRLOI AC+1,ZZ&777777 ;CLEAR BIT (N) OF AC+1 RIGHT
9445 035500 525 07 0 00 777677 HRLOI AC-1,YY ;SETUP FOR COMPARISON
9446 035501 245 10 0 00 000001 ROTC AC,1 ;*ROTATE LEFT ONE
9447 035502 312 11 0 00 000007 CAME AC+1,AC-1 ;TEST FOR BIT (N-1) A ZERO
9448 035503 004 11 0 00 000000 ER4 AC+1, ;MQ GATE UNDER TEST FAILED
9449 035504 321 12 0 00 035476 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
9450
9451 ;TEST AC+1 LEFT HALF
9452 ;TEST ROTC LEFT ONE BIT POSITION
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DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES SEQ 0204
9453 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
9454 ;TEST MQ SHIFT LOGIC GATES
9455 ;AC, AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
9456 ;IS TESTED.
9457 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
9458 ;OTHER BIT IS A ZERO AFTER ROTATING
9459 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
9460 ;OF THE MQ
9461
9462 004731 SN=SN+1
9463 777777 777677 ZZ=ZZ+ZZ+1 ;SELECTED BIT BEFORE ROTATION
9464 IFE <ZZ-1>,<ZZ=-2>
9465 777577 YY=<ZZ+ZZ+1>&777777 ;SELECTED BIT AFTER ROTATION
9466 035505 476 00 0 00 000010 SETOM AC ;INITAILIZE AC TO ALL ONES
9467 035506 525 11 0 00 777677 HRLOI AC+1,ZZ&777777 ;CLEAR BIT (N) OF AC+1 RIGHT
9468 035507 525 07 0 00 777577 HRLOI AC-1,YY ;SETUP FOR COMPARISON
9469 035510 245 10 0 00 000001 ROTC AC,1 ;*ROTATE LEFT ONE
9470 035511 312 11 0 00 000007 CAME AC+1,AC-1 ;TEST FOR BIT (N-1) A ZERO
9471 035512 004 11 0 00 000000 ER4 AC+1, ;MQ GATE UNDER TEST FAILED
9472 035513 321 12 0 00 035505 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
9473
9474 ;TEST AC+1 LEFT HALF
9475 ;TEST ROTC LEFT ONE BIT POSITION
9476 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
9477 ;TEST MQ SHIFT LOGIC GATES
9478 ;AC, AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
9479 ;IS TESTED.
9480 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
9481 ;OTHER BIT IS A ZERO AFTER ROTATING
9482 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
9483 ;OF THE MQ
9484
9485 004732 SN=SN+1
9486 777777 777577 ZZ=ZZ+ZZ+1 ;SELECTED BIT BEFORE ROTATION
9487 IFE <ZZ-1>,<ZZ=-2>
9488 777377 YY=<ZZ+ZZ+1>&777777 ;SELECTED BIT AFTER ROTATION
9489 035514 476 00 0 00 000010 SETOM AC ;INITAILIZE AC TO ALL ONES
9490 035515 525 11 0 00 777577 HRLOI AC+1,ZZ&777777 ;CLEAR BIT (N) OF AC+1 RIGHT
9491 035516 525 07 0 00 777377 HRLOI AC-1,YY ;SETUP FOR COMPARISON
9492 035517 245 10 0 00 000001 ROTC AC,1 ;*ROTATE LEFT ONE
9493 035520 312 11 0 00 000007 CAME AC+1,AC-1 ;TEST FOR BIT (N-1) A ZERO
9494 035521 004 11 0 00 000000 ER4 AC+1, ;MQ GATE UNDER TEST FAILED
9495 035522 321 12 0 00 035514 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
9496
9497 ;TEST AC+1 LEFT HALF
9498 ;TEST ROTC LEFT ONE BIT POSITION
9499 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
9500 ;TEST MQ SHIFT LOGIC GATES
9501 ;AC, AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
9502 ;IS TESTED.
9503 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
9504 ;OTHER BIT IS A ZERO AFTER ROTATING
9505 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
9506 ;OF THE MQ
9507
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DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES SEQ 0205
9508 004733 SN=SN+1
9509 777777 777377 ZZ=ZZ+ZZ+1 ;SELECTED BIT BEFORE ROTATION
9510 IFE <ZZ-1>,<ZZ=-2>
9511 776777 YY=<ZZ+ZZ+1>&777777 ;SELECTED BIT AFTER ROTATION
9512 035523 476 00 0 00 000010 SETOM AC ;INITAILIZE AC TO ALL ONES
9513 035524 525 11 0 00 777377 HRLOI AC+1,ZZ&777777 ;CLEAR BIT (N) OF AC+1 RIGHT
9514 035525 525 07 0 00 776777 HRLOI AC-1,YY ;SETUP FOR COMPARISON
9515 035526 245 10 0 00 000001 ROTC AC,1 ;*ROTATE LEFT ONE
9516 035527 312 11 0 00 000007 CAME AC+1,AC-1 ;TEST FOR BIT (N-1) A ZERO
9517 035530 004 11 0 00 000000 ER4 AC+1, ;MQ GATE UNDER TEST FAILED
9518 035531 321 12 0 00 035523 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
9519
9520 ;TEST AC+1 LEFT HALF
9521 ;TEST ROTC LEFT ONE BIT POSITION
9522 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
9523 ;TEST MQ SHIFT LOGIC GATES
9524 ;AC, AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
9525 ;IS TESTED.
9526 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
9527 ;OTHER BIT IS A ZERO AFTER ROTATING
9528 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
9529 ;OF THE MQ
9530
9531 004734 SN=SN+1
9532 777777 776777 ZZ=ZZ+ZZ+1 ;SELECTED BIT BEFORE ROTATION
9533 IFE <ZZ-1>,<ZZ=-2>
9534 775777 YY=<ZZ+ZZ+1>&777777 ;SELECTED BIT AFTER ROTATION
9535 035532 476 00 0 00 000010 SETOM AC ;INITAILIZE AC TO ALL ONES
9536 035533 525 11 0 00 776777 HRLOI AC+1,ZZ&777777 ;CLEAR BIT (N) OF AC+1 RIGHT
9537 035534 525 07 0 00 775777 HRLOI AC-1,YY ;SETUP FOR COMPARISON
9538 035535 245 10 0 00 000001 ROTC AC,1 ;*ROTATE LEFT ONE
9539 035536 312 11 0 00 000007 CAME AC+1,AC-1 ;TEST FOR BIT (N-1) A ZERO
9540 035537 004 11 0 00 000000 ER4 AC+1, ;MQ GATE UNDER TEST FAILED
9541 035540 321 12 0 00 035532 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
9542
9543 ;TEST AC+1 LEFT HALF
9544 ;TEST ROTC LEFT ONE BIT POSITION
9545 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
9546 ;TEST MQ SHIFT LOGIC GATES
9547 ;AC, AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
9548 ;IS TESTED.
9549 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
9550 ;OTHER BIT IS A ZERO AFTER ROTATING
9551 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
9552 ;OF THE MQ
9553
9554 004735 SN=SN+1
9555 777777 775777 ZZ=ZZ+ZZ+1 ;SELECTED BIT BEFORE ROTATION
9556 IFE <ZZ-1>,<ZZ=-2>
9557 773777 YY=<ZZ+ZZ+1>&777777 ;SELECTED BIT AFTER ROTATION
9558 035541 476 00 0 00 000010 SETOM AC ;INITAILIZE AC TO ALL ONES
9559 035542 525 11 0 00 775777 HRLOI AC+1,ZZ&777777 ;CLEAR BIT (N) OF AC+1 RIGHT
9560 035543 525 07 0 00 773777 HRLOI AC-1,YY ;SETUP FOR COMPARISON
9561 035544 245 10 0 00 000001 ROTC AC,1 ;*ROTATE LEFT ONE
9562 035545 312 11 0 00 000007 CAME AC+1,AC-1 ;TEST FOR BIT (N-1) A ZERO
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 21-14
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES SEQ 0206
9563 035546 004 11 0 00 000000 ER4 AC+1, ;MQ GATE UNDER TEST FAILED
9564 035547 321 12 0 00 035541 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
9565
9566 ;TEST AC+1 LEFT HALF
9567 ;TEST ROTC LEFT ONE BIT POSITION
9568 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
9569 ;TEST MQ SHIFT LOGIC GATES
9570 ;AC, AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
9571 ;IS TESTED.
9572 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
9573 ;OTHER BIT IS A ZERO AFTER ROTATING
9574 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
9575 ;OF THE MQ
9576
9577 004736 SN=SN+1
9578 777777 773777 ZZ=ZZ+ZZ+1 ;SELECTED BIT BEFORE ROTATION
9579 IFE <ZZ-1>,<ZZ=-2>
9580 767777 YY=<ZZ+ZZ+1>&777777 ;SELECTED BIT AFTER ROTATION
9581 035550 476 00 0 00 000010 SETOM AC ;INITAILIZE AC TO ALL ONES
9582 035551 525 11 0 00 773777 HRLOI AC+1,ZZ&777777 ;CLEAR BIT (N) OF AC+1 RIGHT
9583 035552 525 07 0 00 767777 HRLOI AC-1,YY ;SETUP FOR COMPARISON
9584 035553 245 10 0 00 000001 ROTC AC,1 ;*ROTATE LEFT ONE
9585 035554 312 11 0 00 000007 CAME AC+1,AC-1 ;TEST FOR BIT (N-1) A ZERO
9586 035555 004 11 0 00 000000 ER4 AC+1, ;MQ GATE UNDER TEST FAILED
9587 035556 321 12 0 00 035550 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
9588
9589 ;TEST AC+1 LEFT HALF
9590 ;TEST ROTC LEFT ONE BIT POSITION
9591 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
9592 ;TEST MQ SHIFT LOGIC GATES
9593 ;AC, AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
9594 ;IS TESTED.
9595 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
9596 ;OTHER BIT IS A ZERO AFTER ROTATING
9597 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
9598 ;OF THE MQ
9599
9600 004737 SN=SN+1
9601 777777 767777 ZZ=ZZ+ZZ+1 ;SELECTED BIT BEFORE ROTATION
9602 IFE <ZZ-1>,<ZZ=-2>
9603 757777 YY=<ZZ+ZZ+1>&777777 ;SELECTED BIT AFTER ROTATION
9604 035557 476 00 0 00 000010 SETOM AC ;INITAILIZE AC TO ALL ONES
9605 035560 525 11 0 00 767777 HRLOI AC+1,ZZ&777777 ;CLEAR BIT (N) OF AC+1 RIGHT
9606 035561 525 07 0 00 757777 HRLOI AC-1,YY ;SETUP FOR COMPARISON
9607 035562 245 10 0 00 000001 ROTC AC,1 ;*ROTATE LEFT ONE
9608 035563 312 11 0 00 000007 CAME AC+1,AC-1 ;TEST FOR BIT (N-1) A ZERO
9609 035564 004 11 0 00 000000 ER4 AC+1, ;MQ GATE UNDER TEST FAILED
9610 035565 321 12 0 00 035557 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
9611
9612 ;TEST AC+1 LEFT HALF
9613 ;TEST ROTC LEFT ONE BIT POSITION
9614 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
9615 ;TEST MQ SHIFT LOGIC GATES
9616 ;AC, AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
9617 ;IS TESTED.
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DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES SEQ 0207
9618 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
9619 ;OTHER BIT IS A ZERO AFTER ROTATING
9620 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
9621 ;OF THE MQ
9622
9623 004740 SN=SN+1
9624 777777 757777 ZZ=ZZ+ZZ+1 ;SELECTED BIT BEFORE ROTATION
9625 IFE <ZZ-1>,<ZZ=-2>
9626 737777 YY=<ZZ+ZZ+1>&777777 ;SELECTED BIT AFTER ROTATION
9627 035566 476 00 0 00 000010 SETOM AC ;INITAILIZE AC TO ALL ONES
9628 035567 525 11 0 00 757777 HRLOI AC+1,ZZ&777777 ;CLEAR BIT (N) OF AC+1 RIGHT
9629 035570 525 07 0 00 737777 HRLOI AC-1,YY ;SETUP FOR COMPARISON
9630 035571 245 10 0 00 000001 ROTC AC,1 ;*ROTATE LEFT ONE
9631 035572 312 11 0 00 000007 CAME AC+1,AC-1 ;TEST FOR BIT (N-1) A ZERO
9632 035573 004 11 0 00 000000 ER4 AC+1, ;MQ GATE UNDER TEST FAILED
9633 035574 321 12 0 00 035566 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
9634
9635 ;TEST AC+1 LEFT HALF
9636 ;TEST ROTC LEFT ONE BIT POSITION
9637 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
9638 ;TEST MQ SHIFT LOGIC GATES
9639 ;AC, AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
9640 ;IS TESTED.
9641 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
9642 ;OTHER BIT IS A ZERO AFTER ROTATING
9643 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
9644 ;OF THE MQ
9645
9646 004741 SN=SN+1
9647 777777 737777 ZZ=ZZ+ZZ+1 ;SELECTED BIT BEFORE ROTATION
9648 IFE <ZZ-1>,<ZZ=-2>
9649 677777 YY=<ZZ+ZZ+1>&777777 ;SELECTED BIT AFTER ROTATION
9650 035575 476 00 0 00 000010 SETOM AC ;INITAILIZE AC TO ALL ONES
9651 035576 525 11 0 00 737777 HRLOI AC+1,ZZ&777777 ;CLEAR BIT (N) OF AC+1 RIGHT
9652 035577 525 07 0 00 677777 HRLOI AC-1,YY ;SETUP FOR COMPARISON
9653 035600 245 10 0 00 000001 ROTC AC,1 ;*ROTATE LEFT ONE
9654 035601 312 11 0 00 000007 CAME AC+1,AC-1 ;TEST FOR BIT (N-1) A ZERO
9655 035602 004 11 0 00 000000 ER4 AC+1, ;MQ GATE UNDER TEST FAILED
9656 035603 321 12 0 00 035575 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
9657
9658 ;TEST AC+1 LEFT HALF
9659 ;TEST ROTC LEFT ONE BIT POSITION
9660 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
9661 ;TEST MQ SHIFT LOGIC GATES
9662 ;AC, AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
9663 ;IS TESTED.
9664 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
9665 ;OTHER BIT IS A ZERO AFTER ROTATING
9666 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
9667 ;OF THE MQ
9668
9669 004742 SN=SN+1
9670 777777 677777 ZZ=ZZ+ZZ+1 ;SELECTED BIT BEFORE ROTATION
9671 IFE <ZZ-1>,<ZZ=-2>
9672 577777 YY=<ZZ+ZZ+1>&777777 ;SELECTED BIT AFTER ROTATION
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DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES SEQ 0208
9673 035604 476 00 0 00 000010 SETOM AC ;INITAILIZE AC TO ALL ONES
9674 035605 525 11 0 00 677777 HRLOI AC+1,ZZ&777777 ;CLEAR BIT (N) OF AC+1 RIGHT
9675 035606 525 07 0 00 577777 HRLOI AC-1,YY ;SETUP FOR COMPARISON
9676 035607 245 10 0 00 000001 ROTC AC,1 ;*ROTATE LEFT ONE
9677 035610 312 11 0 00 000007 CAME AC+1,AC-1 ;TEST FOR BIT (N-1) A ZERO
9678 035611 004 11 0 00 000000 ER4 AC+1, ;MQ GATE UNDER TEST FAILED
9679 035612 321 12 0 00 035604 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
9680
9681 ;TEST AC+1 LEFT HALF
9682 ;TEST ROTC LEFT ONE BIT POSITION
9683 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
9684 ;TEST MQ SHIFT LOGIC GATES
9685 ;AC, AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
9686 ;IS TESTED.
9687 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
9688 ;OTHER BIT IS A ZERO AFTER ROTATING
9689 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
9690 ;OF THE MQ
9691
9692 004743 SN=SN+1
9693 777777 577777 ZZ=ZZ+ZZ+1 ;SELECTED BIT BEFORE ROTATION
9694 IFE <ZZ-1>,<ZZ=-2>
9695 377777 YY=<ZZ+ZZ+1>&777777 ;SELECTED BIT AFTER ROTATION
9696 035613 476 00 0 00 000010 SETOM AC ;INITAILIZE AC TO ALL ONES
9697 035614 525 11 0 00 577777 HRLOI AC+1,ZZ&777777 ;CLEAR BIT (N) OF AC+1 RIGHT
9698 035615 525 07 0 00 377777 HRLOI AC-1,YY ;SETUP FOR COMPARISON
9699 035616 245 10 0 00 000001 ROTC AC,1 ;*ROTATE LEFT ONE
9700 035617 312 11 0 00 000007 CAME AC+1,AC-1 ;TEST FOR BIT (N-1) A ZERO
9701 035620 004 11 0 00 000000 ER4 AC+1, ;MQ GATE UNDER TEST FAILED
9702 035621 321 12 0 00 035613 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
9703
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 22
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES SEQ 0209
9704 ;TEST ROTC RIGHT ONE BIT POSITION USING ALL ZEROS
9705 ;TEST MQ SHIFT LOGIC GATES
9706 ;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND
9707 ;AC+1 IS TESTED
9708 ;AN ERROR OCCURS IF C(AC+1) IS NON-ZERO AFTER ROTATING
9709
9710 000007 AC=7
9711 SAVEAC (1,1)^
9712 035622 201 11 0 00 035622 MOVEI AC+2,. ;SAVE TEST PC
9713 035623 202 11 0 00 030051 MOVEM AC+2,TESTPC
9714 035624 201 11 0 00 000011 MOVEI AC+2,<AC+2>&17 ;INFORM ERROR ROUTINE WHICH
9715 035625 202 11 0 00 041765 MOVEM AC+2,ERRLOP# ;AC IS USED FOR ITERATION^
9716
9717 035626 403 07 0 00 000010 E5000: SETZB AC,AC+1 ;INITIALIZE AC,AC+1 TO ALL ZEROS
9718 035627 402 00 0 00 000006 SETZM AC-1 ;INITIALIZE RESULT TO ZERO
9719 035630 245 07 0 00 777777 ROTC AC,-1 ;*ROTATE RIGHT ONE
9720 035631 312 10 0 00 000006 CAME AC+1,AC-1 ;TEST AC+1 FOR ALL ZEROS
9721 035632 004 10 0 00 005001 ER4 AC+1,5001 ;MQ GRTING FAILED
9722 035633 321 11 0 00 035626 JUMPL AC+2,E5000 ;LOOP ON ERROR SWITCH
9723
9724 ;TEST ROTC,RIGHT ONE BIT POSITION USING ALL ONES
9725 ;TEST MQ SHIFT LOGIC GATES
9726 ;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND
9727 ;AC+1 IS TESTED
9728 ;AN ERROR OCCURS IF C(AC+1) IS NONZERO AFTER ROTATING
9729
9730 035634 477 07 0 00 000010 E5100: SETOB AC,AC+1 ;INITIALIZE AC,AC+1 TO ALL ONES
9731 035635 476 00 0 00 000006 SETOM AC-1 ;INITIALIZE RESULT TO ALL ONES
9732 035636 245 07 0 00 777777 ROTC AC,-1 ;*ROTATE RIGHT ONE
9733 035637 312 10 0 00 000006 CAME AC+1,AC-1 ;TEST AC+1 FOR ALL ONES
9734 035640 004 10 0 00 005101 ER4 AC+1,5101 ;MQ GATING FAILED
9735 035641 321 11 0 00 035634 JUMPL AC+2,E5100 ;LOOP ON ERROR SWITCH
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 23
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES SEQ 0210
9736 005200 SN=5200
9737 000000 ZZ=0
9738 E5200: REPEAT ^D18,< ;TEST AC+1 LEFT HALF
9739 ;TEST ROTC RIGHT ONE BIT POSITION
9740 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
9741 ;TEST MQ SHIFT LOGIC GATES
9742
9743 ;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
9744 ;IS TESTED.
9745 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
9746 ;OTHER BIT IS A ONE AFTER ROTATING
9747 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
9748
9749 SN=SN+1
9750 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
9751 IFE ZZ,<ZZ=400000>
9752 YY=ZZ/2 ;SELECTED BIT AFTER ROTATION
9753 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
9754 MOVSI AC+1,ZZ ;SET BIT (N) OF AC+1 LEFT
9755 IFN <ZZ-1>, <
9756 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
9757 IFE <ZZ-1>,<
9758 MOVEI AC-1, 400000 ;SETUP FOR COMPARISON>
9759 ROTC AC,-1 ;*ROTATE RIGHT ONE
9760 CAME AC+1,AC-1 ;TEST FOR BIT (N+1) A ONE
9761 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
9762 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH.
9763 >
9764 ;TEST AC+1 LEFT HALF
9765 ;TEST ROTC RIGHT ONE BIT POSITION
9766 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
9767 ;TEST MQ SHIFT LOGIC GATES
9768
9769 ;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
9770 ;IS TESTED.
9771 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
9772 ;OTHER BIT IS A ONE AFTER ROTATING
9773 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
9774
9775 005201 SN=SN+1
9776 000000 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
9777 400000 IFE ZZ,<ZZ=400000>
9778 200000 YY=ZZ/2 ;SELECTED BIT AFTER ROTATION
9779 035642 400 07 0 00 000000 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
9780 035643 205 10 0 00 400000 MOVSI AC+1,ZZ ;SET BIT (N) OF AC+1 LEFT
9781 IFN <ZZ-1>, <
9782 035644 205 06 0 00 200000 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
9783 IFE <ZZ-1>,<
9784 MOVEI AC-1, 400000 ;SETUP FOR COMPARISON>
9785 035645 245 07 0 00 777777 ROTC AC,-1 ;*ROTATE RIGHT ONE
9786 035646 312 10 0 00 000006 CAME AC+1,AC-1 ;TEST FOR BIT (N+1) A ONE
9787 035647 004 10 0 00 005201 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
9788 035650 321 11 0 00 035642 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH.
9789
9790 ;TEST AC+1 LEFT HALF
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9791 ;TEST ROTC RIGHT ONE BIT POSITION
9792 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
9793 ;TEST MQ SHIFT LOGIC GATES
9794
9795 ;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
9796 ;IS TESTED.
9797 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
9798 ;OTHER BIT IS A ONE AFTER ROTATING
9799 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
9800
9801 005202 SN=SN+1
9802 200000 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
9803 IFE ZZ,<ZZ=400000>
9804 100000 YY=ZZ/2 ;SELECTED BIT AFTER ROTATION
9805 035651 400 07 0 00 000000 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
9806 035652 205 10 0 00 200000 MOVSI AC+1,ZZ ;SET BIT (N) OF AC+1 LEFT
9807 IFN <ZZ-1>, <
9808 035653 205 06 0 00 100000 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
9809 IFE <ZZ-1>,<
9810 MOVEI AC-1, 400000 ;SETUP FOR COMPARISON>
9811 035654 245 07 0 00 777777 ROTC AC,-1 ;*ROTATE RIGHT ONE
9812 035655 312 10 0 00 000006 CAME AC+1,AC-1 ;TEST FOR BIT (N+1) A ONE
9813 035656 004 10 0 00 005202 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
9814 035657 321 11 0 00 035651 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH.
9815
9816 ;TEST AC+1 LEFT HALF
9817 ;TEST ROTC RIGHT ONE BIT POSITION
9818 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
9819 ;TEST MQ SHIFT LOGIC GATES
9820
9821 ;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
9822 ;IS TESTED.
9823 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
9824 ;OTHER BIT IS A ONE AFTER ROTATING
9825 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
9826
9827 005203 SN=SN+1
9828 100000 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
9829 IFE ZZ,<ZZ=400000>
9830 040000 YY=ZZ/2 ;SELECTED BIT AFTER ROTATION
9831 035660 400 07 0 00 000000 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
9832 035661 205 10 0 00 100000 MOVSI AC+1,ZZ ;SET BIT (N) OF AC+1 LEFT
9833 IFN <ZZ-1>, <
9834 035662 205 06 0 00 040000 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
9835 IFE <ZZ-1>,<
9836 MOVEI AC-1, 400000 ;SETUP FOR COMPARISON>
9837 035663 245 07 0 00 777777 ROTC AC,-1 ;*ROTATE RIGHT ONE
9838 035664 312 10 0 00 000006 CAME AC+1,AC-1 ;TEST FOR BIT (N+1) A ONE
9839 035665 004 10 0 00 005203 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
9840 035666 321 11 0 00 035660 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH.
9841
9842 ;TEST AC+1 LEFT HALF
9843 ;TEST ROTC RIGHT ONE BIT POSITION
9844 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
9845 ;TEST MQ SHIFT LOGIC GATES
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9846
9847 ;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
9848 ;IS TESTED.
9849 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
9850 ;OTHER BIT IS A ONE AFTER ROTATING
9851 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
9852
9853 005204 SN=SN+1
9854 040000 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
9855 IFE ZZ,<ZZ=400000>
9856 020000 YY=ZZ/2 ;SELECTED BIT AFTER ROTATION
9857 035667 400 07 0 00 000000 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
9858 035670 205 10 0 00 040000 MOVSI AC+1,ZZ ;SET BIT (N) OF AC+1 LEFT
9859 IFN <ZZ-1>, <
9860 035671 205 06 0 00 020000 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
9861 IFE <ZZ-1>,<
9862 MOVEI AC-1, 400000 ;SETUP FOR COMPARISON>
9863 035672 245 07 0 00 777777 ROTC AC,-1 ;*ROTATE RIGHT ONE
9864 035673 312 10 0 00 000006 CAME AC+1,AC-1 ;TEST FOR BIT (N+1) A ONE
9865 035674 004 10 0 00 005204 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
9866 035675 321 11 0 00 035667 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH.
9867
9868 ;TEST AC+1 LEFT HALF
9869 ;TEST ROTC RIGHT ONE BIT POSITION
9870 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
9871 ;TEST MQ SHIFT LOGIC GATES
9872
9873 ;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
9874 ;IS TESTED.
9875 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
9876 ;OTHER BIT IS A ONE AFTER ROTATING
9877 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
9878
9879 005205 SN=SN+1
9880 020000 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
9881 IFE ZZ,<ZZ=400000>
9882 010000 YY=ZZ/2 ;SELECTED BIT AFTER ROTATION
9883 035676 400 07 0 00 000000 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
9884 035677 205 10 0 00 020000 MOVSI AC+1,ZZ ;SET BIT (N) OF AC+1 LEFT
9885 IFN <ZZ-1>, <
9886 035700 205 06 0 00 010000 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
9887 IFE <ZZ-1>,<
9888 MOVEI AC-1, 400000 ;SETUP FOR COMPARISON>
9889 035701 245 07 0 00 777777 ROTC AC,-1 ;*ROTATE RIGHT ONE
9890 035702 312 10 0 00 000006 CAME AC+1,AC-1 ;TEST FOR BIT (N+1) A ONE
9891 035703 004 10 0 00 005205 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
9892 035704 321 11 0 00 035676 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH.
9893
9894 ;TEST AC+1 LEFT HALF
9895 ;TEST ROTC RIGHT ONE BIT POSITION
9896 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
9897 ;TEST MQ SHIFT LOGIC GATES
9898
9899 ;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
9900 ;IS TESTED.
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9901 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
9902 ;OTHER BIT IS A ONE AFTER ROTATING
9903 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
9904
9905 005206 SN=SN+1
9906 010000 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
9907 IFE ZZ,<ZZ=400000>
9908 004000 YY=ZZ/2 ;SELECTED BIT AFTER ROTATION
9909 035705 400 07 0 00 000000 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
9910 035706 205 10 0 00 010000 MOVSI AC+1,ZZ ;SET BIT (N) OF AC+1 LEFT
9911 IFN <ZZ-1>, <
9912 035707 205 06 0 00 004000 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
9913 IFE <ZZ-1>,<
9914 MOVEI AC-1, 400000 ;SETUP FOR COMPARISON>
9915 035710 245 07 0 00 777777 ROTC AC,-1 ;*ROTATE RIGHT ONE
9916 035711 312 10 0 00 000006 CAME AC+1,AC-1 ;TEST FOR BIT (N+1) A ONE
9917 035712 004 10 0 00 005206 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
9918 035713 321 11 0 00 035705 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH.
9919
9920 ;TEST AC+1 LEFT HALF
9921 ;TEST ROTC RIGHT ONE BIT POSITION
9922 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
9923 ;TEST MQ SHIFT LOGIC GATES
9924
9925 ;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
9926 ;IS TESTED.
9927 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
9928 ;OTHER BIT IS A ONE AFTER ROTATING
9929 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
9930
9931 005207 SN=SN+1
9932 004000 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
9933 IFE ZZ,<ZZ=400000>
9934 002000 YY=ZZ/2 ;SELECTED BIT AFTER ROTATION
9935 035714 400 07 0 00 000000 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
9936 035715 205 10 0 00 004000 MOVSI AC+1,ZZ ;SET BIT (N) OF AC+1 LEFT
9937 IFN <ZZ-1>, <
9938 035716 205 06 0 00 002000 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
9939 IFE <ZZ-1>,<
9940 MOVEI AC-1, 400000 ;SETUP FOR COMPARISON>
9941 035717 245 07 0 00 777777 ROTC AC,-1 ;*ROTATE RIGHT ONE
9942 035720 312 10 0 00 000006 CAME AC+1,AC-1 ;TEST FOR BIT (N+1) A ONE
9943 035721 004 10 0 00 005207 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
9944 035722 321 11 0 00 035714 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH.
9945
9946 ;TEST AC+1 LEFT HALF
9947 ;TEST ROTC RIGHT ONE BIT POSITION
9948 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
9949 ;TEST MQ SHIFT LOGIC GATES
9950
9951 ;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
9952 ;IS TESTED.
9953 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
9954 ;OTHER BIT IS A ONE AFTER ROTATING
9955 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
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9956
9957 005210 SN=SN+1
9958 002000 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
9959 IFE ZZ,<ZZ=400000>
9960 001000 YY=ZZ/2 ;SELECTED BIT AFTER ROTATION
9961 035723 400 07 0 00 000000 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
9962 035724 205 10 0 00 002000 MOVSI AC+1,ZZ ;SET BIT (N) OF AC+1 LEFT
9963 IFN <ZZ-1>, <
9964 035725 205 06 0 00 001000 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
9965 IFE <ZZ-1>,<
9966 MOVEI AC-1, 400000 ;SETUP FOR COMPARISON>
9967 035726 245 07 0 00 777777 ROTC AC,-1 ;*ROTATE RIGHT ONE
9968 035727 312 10 0 00 000006 CAME AC+1,AC-1 ;TEST FOR BIT (N+1) A ONE
9969 035730 004 10 0 00 005210 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
9970 035731 321 11 0 00 035723 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH.
9971
9972 ;TEST AC+1 LEFT HALF
9973 ;TEST ROTC RIGHT ONE BIT POSITION
9974 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
9975 ;TEST MQ SHIFT LOGIC GATES
9976
9977 ;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
9978 ;IS TESTED.
9979 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
9980 ;OTHER BIT IS A ONE AFTER ROTATING
9981 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
9982
9983 005211 SN=SN+1
9984 001000 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
9985 IFE ZZ,<ZZ=400000>
9986 000400 YY=ZZ/2 ;SELECTED BIT AFTER ROTATION
9987 035732 400 07 0 00 000000 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
9988 035733 205 10 0 00 001000 MOVSI AC+1,ZZ ;SET BIT (N) OF AC+1 LEFT
9989 IFN <ZZ-1>, <
9990 035734 205 06 0 00 000400 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
9991 IFE <ZZ-1>,<
9992 MOVEI AC-1, 400000 ;SETUP FOR COMPARISON>
9993 035735 245 07 0 00 777777 ROTC AC,-1 ;*ROTATE RIGHT ONE
9994 035736 312 10 0 00 000006 CAME AC+1,AC-1 ;TEST FOR BIT (N+1) A ONE
9995 035737 004 10 0 00 005211 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
9996 035740 321 11 0 00 035732 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH.
9997
9998 ;TEST AC+1 LEFT HALF
9999 ;TEST ROTC RIGHT ONE BIT POSITION
10000 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
10001 ;TEST MQ SHIFT LOGIC GATES
10002
10003 ;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
10004 ;IS TESTED.
10005 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
10006 ;OTHER BIT IS A ONE AFTER ROTATING
10007 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
10008
10009 005212 SN=SN+1
10010 000400 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
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10011 IFE ZZ,<ZZ=400000>
10012 000200 YY=ZZ/2 ;SELECTED BIT AFTER ROTATION
10013 035741 400 07 0 00 000000 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
10014 035742 205 10 0 00 000400 MOVSI AC+1,ZZ ;SET BIT (N) OF AC+1 LEFT
10015 IFN <ZZ-1>, <
10016 035743 205 06 0 00 000200 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
10017 IFE <ZZ-1>,<
10018 MOVEI AC-1, 400000 ;SETUP FOR COMPARISON>
10019 035744 245 07 0 00 777777 ROTC AC,-1 ;*ROTATE RIGHT ONE
10020 035745 312 10 0 00 000006 CAME AC+1,AC-1 ;TEST FOR BIT (N+1) A ONE
10021 035746 004 10 0 00 005212 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
10022 035747 321 11 0 00 035741 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH.
10023
10024 ;TEST AC+1 LEFT HALF
10025 ;TEST ROTC RIGHT ONE BIT POSITION
10026 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
10027 ;TEST MQ SHIFT LOGIC GATES
10028
10029 ;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
10030 ;IS TESTED.
10031 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
10032 ;OTHER BIT IS A ONE AFTER ROTATING
10033 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
10034
10035 005213 SN=SN+1
10036 000200 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
10037 IFE ZZ,<ZZ=400000>
10038 000100 YY=ZZ/2 ;SELECTED BIT AFTER ROTATION
10039 035750 400 07 0 00 000000 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
10040 035751 205 10 0 00 000200 MOVSI AC+1,ZZ ;SET BIT (N) OF AC+1 LEFT
10041 IFN <ZZ-1>, <
10042 035752 205 06 0 00 000100 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
10043 IFE <ZZ-1>,<
10044 MOVEI AC-1, 400000 ;SETUP FOR COMPARISON>
10045 035753 245 07 0 00 777777 ROTC AC,-1 ;*ROTATE RIGHT ONE
10046 035754 312 10 0 00 000006 CAME AC+1,AC-1 ;TEST FOR BIT (N+1) A ONE
10047 035755 004 10 0 00 005213 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
10048 035756 321 11 0 00 035750 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH.
10049
10050 ;TEST AC+1 LEFT HALF
10051 ;TEST ROTC RIGHT ONE BIT POSITION
10052 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
10053 ;TEST MQ SHIFT LOGIC GATES
10054
10055 ;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
10056 ;IS TESTED.
10057 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
10058 ;OTHER BIT IS A ONE AFTER ROTATING
10059 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
10060
10061 005214 SN=SN+1
10062 000100 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
10063 IFE ZZ,<ZZ=400000>
10064 000040 YY=ZZ/2 ;SELECTED BIT AFTER ROTATION
10065 035757 400 07 0 00 000000 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
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10066 035760 205 10 0 00 000100 MOVSI AC+1,ZZ ;SET BIT (N) OF AC+1 LEFT
10067 IFN <ZZ-1>, <
10068 035761 205 06 0 00 000040 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
10069 IFE <ZZ-1>,<
10070 MOVEI AC-1, 400000 ;SETUP FOR COMPARISON>
10071 035762 245 07 0 00 777777 ROTC AC,-1 ;*ROTATE RIGHT ONE
10072 035763 312 10 0 00 000006 CAME AC+1,AC-1 ;TEST FOR BIT (N+1) A ONE
10073 035764 004 10 0 00 005214 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
10074 035765 321 11 0 00 035757 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH.
10075
10076 ;TEST AC+1 LEFT HALF
10077 ;TEST ROTC RIGHT ONE BIT POSITION
10078 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
10079 ;TEST MQ SHIFT LOGIC GATES
10080
10081 ;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
10082 ;IS TESTED.
10083 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
10084 ;OTHER BIT IS A ONE AFTER ROTATING
10085 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
10086
10087 005215 SN=SN+1
10088 000040 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
10089 IFE ZZ,<ZZ=400000>
10090 000020 YY=ZZ/2 ;SELECTED BIT AFTER ROTATION
10091 035766 400 07 0 00 000000 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
10092 035767 205 10 0 00 000040 MOVSI AC+1,ZZ ;SET BIT (N) OF AC+1 LEFT
10093 IFN <ZZ-1>, <
10094 035770 205 06 0 00 000020 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
10095 IFE <ZZ-1>,<
10096 MOVEI AC-1, 400000 ;SETUP FOR COMPARISON>
10097 035771 245 07 0 00 777777 ROTC AC,-1 ;*ROTATE RIGHT ONE
10098 035772 312 10 0 00 000006 CAME AC+1,AC-1 ;TEST FOR BIT (N+1) A ONE
10099 035773 004 10 0 00 005215 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
10100 035774 321 11 0 00 035766 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH.
10101
10102 ;TEST AC+1 LEFT HALF
10103 ;TEST ROTC RIGHT ONE BIT POSITION
10104 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
10105 ;TEST MQ SHIFT LOGIC GATES
10106
10107 ;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
10108 ;IS TESTED.
10109 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
10110 ;OTHER BIT IS A ONE AFTER ROTATING
10111 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
10112
10113 005216 SN=SN+1
10114 000020 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
10115 IFE ZZ,<ZZ=400000>
10116 000010 YY=ZZ/2 ;SELECTED BIT AFTER ROTATION
10117 035775 400 07 0 00 000000 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
10118 035776 205 10 0 00 000020 MOVSI AC+1,ZZ ;SET BIT (N) OF AC+1 LEFT
10119 IFN <ZZ-1>, <
10120 035777 205 06 0 00 000010 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
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10121 IFE <ZZ-1>,<
10122 MOVEI AC-1, 400000 ;SETUP FOR COMPARISON>
10123 036000 245 07 0 00 777777 ROTC AC,-1 ;*ROTATE RIGHT ONE
10124 036001 312 10 0 00 000006 CAME AC+1,AC-1 ;TEST FOR BIT (N+1) A ONE
10125 036002 004 10 0 00 005216 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
10126 036003 321 11 0 00 035775 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH.
10127
10128 ;TEST AC+1 LEFT HALF
10129 ;TEST ROTC RIGHT ONE BIT POSITION
10130 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
10131 ;TEST MQ SHIFT LOGIC GATES
10132
10133 ;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
10134 ;IS TESTED.
10135 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
10136 ;OTHER BIT IS A ONE AFTER ROTATING
10137 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
10138
10139 005217 SN=SN+1
10140 000010 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
10141 IFE ZZ,<ZZ=400000>
10142 000004 YY=ZZ/2 ;SELECTED BIT AFTER ROTATION
10143 036004 400 07 0 00 000000 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
10144 036005 205 10 0 00 000010 MOVSI AC+1,ZZ ;SET BIT (N) OF AC+1 LEFT
10145 IFN <ZZ-1>, <
10146 036006 205 06 0 00 000004 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
10147 IFE <ZZ-1>,<
10148 MOVEI AC-1, 400000 ;SETUP FOR COMPARISON>
10149 036007 245 07 0 00 777777 ROTC AC,-1 ;*ROTATE RIGHT ONE
10150 036010 312 10 0 00 000006 CAME AC+1,AC-1 ;TEST FOR BIT (N+1) A ONE
10151 036011 004 10 0 00 005217 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
10152 036012 321 11 0 00 036004 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH.
10153
10154 ;TEST AC+1 LEFT HALF
10155 ;TEST ROTC RIGHT ONE BIT POSITION
10156 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
10157 ;TEST MQ SHIFT LOGIC GATES
10158
10159 ;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
10160 ;IS TESTED.
10161 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
10162 ;OTHER BIT IS A ONE AFTER ROTATING
10163 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
10164
10165 005220 SN=SN+1
10166 000004 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
10167 IFE ZZ,<ZZ=400000>
10168 000002 YY=ZZ/2 ;SELECTED BIT AFTER ROTATION
10169 036013 400 07 0 00 000000 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
10170 036014 205 10 0 00 000004 MOVSI AC+1,ZZ ;SET BIT (N) OF AC+1 LEFT
10171 IFN <ZZ-1>, <
10172 036015 205 06 0 00 000002 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
10173 IFE <ZZ-1>,<
10174 MOVEI AC-1, 400000 ;SETUP FOR COMPARISON>
10175 036016 245 07 0 00 777777 ROTC AC,-1 ;*ROTATE RIGHT ONE
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10176 036017 312 10 0 00 000006 CAME AC+1,AC-1 ;TEST FOR BIT (N+1) A ONE
10177 036020 004 10 0 00 005220 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
10178 036021 321 11 0 00 036013 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH.
10179
10180 ;TEST AC+1 LEFT HALF
10181 ;TEST ROTC RIGHT ONE BIT POSITION
10182 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
10183 ;TEST MQ SHIFT LOGIC GATES
10184
10185 ;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
10186 ;IS TESTED.
10187 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
10188 ;OTHER BIT IS A ONE AFTER ROTATING
10189 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
10190
10191 005221 SN=SN+1
10192 000002 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
10193 IFE ZZ,<ZZ=400000>
10194 000001 YY=ZZ/2 ;SELECTED BIT AFTER ROTATION
10195 036022 400 07 0 00 000000 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
10196 036023 205 10 0 00 000002 MOVSI AC+1,ZZ ;SET BIT (N) OF AC+1 LEFT
10197 IFN <ZZ-1>, <
10198 036024 205 06 0 00 000001 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
10199 IFE <ZZ-1>,<
10200 MOVEI AC-1, 400000 ;SETUP FOR COMPARISON>
10201 036025 245 07 0 00 777777 ROTC AC,-1 ;*ROTATE RIGHT ONE
10202 036026 312 10 0 00 000006 CAME AC+1,AC-1 ;TEST FOR BIT (N+1) A ONE
10203 036027 004 10 0 00 005221 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
10204 036030 321 11 0 00 036022 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH.
10205
10206 ;TEST AC+1 LEFT HALF
10207 ;TEST ROTC RIGHT ONE BIT POSITION
10208 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
10209 ;TEST MQ SHIFT LOGIC GATES
10210
10211 ;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
10212 ;IS TESTED.
10213 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
10214 ;OTHER BIT IS A ONE AFTER ROTATING
10215 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
10216
10217 005222 SN=SN+1
10218 000001 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
10219 IFE ZZ,<ZZ=400000>
10220 000000 YY=ZZ/2 ;SELECTED BIT AFTER ROTATION
10221 036031 400 07 0 00 000000 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
10222 036032 205 10 0 00 000001 MOVSI AC+1,ZZ ;SET BIT (N) OF AC+1 LEFT
10223 IFN <ZZ-1>, <
10224 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
10225 IFE <ZZ-1>,<
10226 036033 201 06 0 00 400000 MOVEI AC-1, 400000 ;SETUP FOR COMPARISON>
10227 036034 245 07 0 00 777777 ROTC AC,-1 ;*ROTATE RIGHT ONE
10228 036035 312 10 0 00 000006 CAME AC+1,AC-1 ;TEST FOR BIT (N+1) A ONE
10229 036036 004 10 0 00 005222 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
10230 036037 321 11 0 00 036031 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH.
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10231
10232 PAGE
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10233 000000 ZZ=0
10234
10235 REPEAT ^D17,< ;TEST AC+1 RIGHT HALF
10236 ;TEST ROTC RIGHT ONE BIT POSITION
10237 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
10238 ;TEST MQ SHIFT LOGIC GATES
10239 ;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
10240 ;IS TESTED.
10241 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
10242 ;OTHER BIT IS A ONE AFTER ROTATING
10243 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
10244
10245 SN=SN+1
10246 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
10247 IFE ZZ,<ZZ=400000>
10248
10249 YY=ZZ/2 ;SELECTED BIT AFTER ROTATION
10250 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
10251 MOVEI AC+1,ZZ ;SET BIT (N) OF AC+1 RIGHT
10252 MOVEI AC-1,YY ;SETUP FOR COMPARISON
10253 ROTC AC,-1 ;*ROTATE RIGHT ONE
10254 CAME AC+1,AC-1 ;TEST FOR BIT (N+1) A ONE
10255 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
10256 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
10257 >
10258 ;TEST AC+1 RIGHT HALF
10259 ;TEST ROTC RIGHT ONE BIT POSITION
10260 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
10261 ;TEST MQ SHIFT LOGIC GATES
10262 ;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
10263 ;IS TESTED.
10264 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
10265 ;OTHER BIT IS A ONE AFTER ROTATING
10266 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
10267
10268 005223 SN=SN+1
10269 000000 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
10270 400000 IFE ZZ,<ZZ=400000>
10271
10272 200000 YY=ZZ/2 ;SELECTED BIT AFTER ROTATION
10273 036040 400 07 0 00 000000 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
10274 036041 201 10 0 00 400000 MOVEI AC+1,ZZ ;SET BIT (N) OF AC+1 RIGHT
10275 036042 201 06 0 00 200000 MOVEI AC-1,YY ;SETUP FOR COMPARISON
10276 036043 245 07 0 00 777777 ROTC AC,-1 ;*ROTATE RIGHT ONE
10277 036044 312 10 0 00 000006 CAME AC+1,AC-1 ;TEST FOR BIT (N+1) A ONE
10278 036045 004 10 0 00 005223 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
10279 036046 321 11 0 00 036040 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
10280
10281 ;TEST AC+1 RIGHT HALF
10282 ;TEST ROTC RIGHT ONE BIT POSITION
10283 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
10284 ;TEST MQ SHIFT LOGIC GATES
10285 ;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
10286 ;IS TESTED.
10287 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
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10288 ;OTHER BIT IS A ONE AFTER ROTATING
10289 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
10290
10291 005224 SN=SN+1
10292 200000 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
10293 IFE ZZ,<ZZ=400000>
10294
10295 100000 YY=ZZ/2 ;SELECTED BIT AFTER ROTATION
10296 036047 400 07 0 00 000000 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
10297 036050 201 10 0 00 200000 MOVEI AC+1,ZZ ;SET BIT (N) OF AC+1 RIGHT
10298 036051 201 06 0 00 100000 MOVEI AC-1,YY ;SETUP FOR COMPARISON
10299 036052 245 07 0 00 777777 ROTC AC,-1 ;*ROTATE RIGHT ONE
10300 036053 312 10 0 00 000006 CAME AC+1,AC-1 ;TEST FOR BIT (N+1) A ONE
10301 036054 004 10 0 00 005224 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
10302 036055 321 11 0 00 036047 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
10303
10304 ;TEST AC+1 RIGHT HALF
10305 ;TEST ROTC RIGHT ONE BIT POSITION
10306 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
10307 ;TEST MQ SHIFT LOGIC GATES
10308 ;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
10309 ;IS TESTED.
10310 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
10311 ;OTHER BIT IS A ONE AFTER ROTATING
10312 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
10313
10314 005225 SN=SN+1
10315 100000 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
10316 IFE ZZ,<ZZ=400000>
10317
10318 040000 YY=ZZ/2 ;SELECTED BIT AFTER ROTATION
10319 036056 400 07 0 00 000000 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
10320 036057 201 10 0 00 100000 MOVEI AC+1,ZZ ;SET BIT (N) OF AC+1 RIGHT
10321 036060 201 06 0 00 040000 MOVEI AC-1,YY ;SETUP FOR COMPARISON
10322 036061 245 07 0 00 777777 ROTC AC,-1 ;*ROTATE RIGHT ONE
10323 036062 312 10 0 00 000006 CAME AC+1,AC-1 ;TEST FOR BIT (N+1) A ONE
10324 036063 004 10 0 00 005225 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
10325 036064 321 11 0 00 036056 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
10326
10327 ;TEST AC+1 RIGHT HALF
10328 ;TEST ROTC RIGHT ONE BIT POSITION
10329 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
10330 ;TEST MQ SHIFT LOGIC GATES
10331 ;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
10332 ;IS TESTED.
10333 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
10334 ;OTHER BIT IS A ONE AFTER ROTATING
10335 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
10336
10337 005226 SN=SN+1
10338 040000 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
10339 IFE ZZ,<ZZ=400000>
10340
10341 020000 YY=ZZ/2 ;SELECTED BIT AFTER ROTATION
10342 036065 400 07 0 00 000000 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
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10343 036066 201 10 0 00 040000 MOVEI AC+1,ZZ ;SET BIT (N) OF AC+1 RIGHT
10344 036067 201 06 0 00 020000 MOVEI AC-1,YY ;SETUP FOR COMPARISON
10345 036070 245 07 0 00 777777 ROTC AC,-1 ;*ROTATE RIGHT ONE
10346 036071 312 10 0 00 000006 CAME AC+1,AC-1 ;TEST FOR BIT (N+1) A ONE
10347 036072 004 10 0 00 005226 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
10348 036073 321 11 0 00 036065 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
10349
10350 ;TEST AC+1 RIGHT HALF
10351 ;TEST ROTC RIGHT ONE BIT POSITION
10352 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
10353 ;TEST MQ SHIFT LOGIC GATES
10354 ;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
10355 ;IS TESTED.
10356 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
10357 ;OTHER BIT IS A ONE AFTER ROTATING
10358 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
10359
10360 005227 SN=SN+1
10361 020000 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
10362 IFE ZZ,<ZZ=400000>
10363
10364 010000 YY=ZZ/2 ;SELECTED BIT AFTER ROTATION
10365 036074 400 07 0 00 000000 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
10366 036075 201 10 0 00 020000 MOVEI AC+1,ZZ ;SET BIT (N) OF AC+1 RIGHT
10367 036076 201 06 0 00 010000 MOVEI AC-1,YY ;SETUP FOR COMPARISON
10368 036077 245 07 0 00 777777 ROTC AC,-1 ;*ROTATE RIGHT ONE
10369 036100 312 10 0 00 000006 CAME AC+1,AC-1 ;TEST FOR BIT (N+1) A ONE
10370 036101 004 10 0 00 005227 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
10371 036102 321 11 0 00 036074 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
10372
10373 ;TEST AC+1 RIGHT HALF
10374 ;TEST ROTC RIGHT ONE BIT POSITION
10375 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
10376 ;TEST MQ SHIFT LOGIC GATES
10377 ;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
10378 ;IS TESTED.
10379 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
10380 ;OTHER BIT IS A ONE AFTER ROTATING
10381 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
10382
10383 005230 SN=SN+1
10384 010000 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
10385 IFE ZZ,<ZZ=400000>
10386
10387 004000 YY=ZZ/2 ;SELECTED BIT AFTER ROTATION
10388 036103 400 07 0 00 000000 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
10389 036104 201 10 0 00 010000 MOVEI AC+1,ZZ ;SET BIT (N) OF AC+1 RIGHT
10390 036105 201 06 0 00 004000 MOVEI AC-1,YY ;SETUP FOR COMPARISON
10391 036106 245 07 0 00 777777 ROTC AC,-1 ;*ROTATE RIGHT ONE
10392 036107 312 10 0 00 000006 CAME AC+1,AC-1 ;TEST FOR BIT (N+1) A ONE
10393 036110 004 10 0 00 005230 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
10394 036111 321 11 0 00 036103 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
10395
10396 ;TEST AC+1 RIGHT HALF
10397 ;TEST ROTC RIGHT ONE BIT POSITION
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10398 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
10399 ;TEST MQ SHIFT LOGIC GATES
10400 ;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
10401 ;IS TESTED.
10402 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
10403 ;OTHER BIT IS A ONE AFTER ROTATING
10404 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
10405
10406 005231 SN=SN+1
10407 004000 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
10408 IFE ZZ,<ZZ=400000>
10409
10410 002000 YY=ZZ/2 ;SELECTED BIT AFTER ROTATION
10411 036112 400 07 0 00 000000 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
10412 036113 201 10 0 00 004000 MOVEI AC+1,ZZ ;SET BIT (N) OF AC+1 RIGHT
10413 036114 201 06 0 00 002000 MOVEI AC-1,YY ;SETUP FOR COMPARISON
10414 036115 245 07 0 00 777777 ROTC AC,-1 ;*ROTATE RIGHT ONE
10415 036116 312 10 0 00 000006 CAME AC+1,AC-1 ;TEST FOR BIT (N+1) A ONE
10416 036117 004 10 0 00 005231 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
10417 036120 321 11 0 00 036112 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
10418
10419 ;TEST AC+1 RIGHT HALF
10420 ;TEST ROTC RIGHT ONE BIT POSITION
10421 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
10422 ;TEST MQ SHIFT LOGIC GATES
10423 ;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
10424 ;IS TESTED.
10425 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
10426 ;OTHER BIT IS A ONE AFTER ROTATING
10427 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
10428
10429 005232 SN=SN+1
10430 002000 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
10431 IFE ZZ,<ZZ=400000>
10432
10433 001000 YY=ZZ/2 ;SELECTED BIT AFTER ROTATION
10434 036121 400 07 0 00 000000 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
10435 036122 201 10 0 00 002000 MOVEI AC+1,ZZ ;SET BIT (N) OF AC+1 RIGHT
10436 036123 201 06 0 00 001000 MOVEI AC-1,YY ;SETUP FOR COMPARISON
10437 036124 245 07 0 00 777777 ROTC AC,-1 ;*ROTATE RIGHT ONE
10438 036125 312 10 0 00 000006 CAME AC+1,AC-1 ;TEST FOR BIT (N+1) A ONE
10439 036126 004 10 0 00 005232 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
10440 036127 321 11 0 00 036121 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
10441
10442 ;TEST AC+1 RIGHT HALF
10443 ;TEST ROTC RIGHT ONE BIT POSITION
10444 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
10445 ;TEST MQ SHIFT LOGIC GATES
10446 ;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
10447 ;IS TESTED.
10448 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
10449 ;OTHER BIT IS A ONE AFTER ROTATING
10450 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
10451
10452 005233 SN=SN+1
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DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES SEQ 0224
10453 001000 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
10454 IFE ZZ,<ZZ=400000>
10455
10456 000400 YY=ZZ/2 ;SELECTED BIT AFTER ROTATION
10457 036130 400 07 0 00 000000 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
10458 036131 201 10 0 00 001000 MOVEI AC+1,ZZ ;SET BIT (N) OF AC+1 RIGHT
10459 036132 201 06 0 00 000400 MOVEI AC-1,YY ;SETUP FOR COMPARISON
10460 036133 245 07 0 00 777777 ROTC AC,-1 ;*ROTATE RIGHT ONE
10461 036134 312 10 0 00 000006 CAME AC+1,AC-1 ;TEST FOR BIT (N+1) A ONE
10462 036135 004 10 0 00 005233 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
10463 036136 321 11 0 00 036130 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
10464
10465 ;TEST AC+1 RIGHT HALF
10466 ;TEST ROTC RIGHT ONE BIT POSITION
10467 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
10468 ;TEST MQ SHIFT LOGIC GATES
10469 ;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
10470 ;IS TESTED.
10471 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
10472 ;OTHER BIT IS A ONE AFTER ROTATING
10473 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
10474
10475 005234 SN=SN+1
10476 000400 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
10477 IFE ZZ,<ZZ=400000>
10478
10479 000200 YY=ZZ/2 ;SELECTED BIT AFTER ROTATION
10480 036137 400 07 0 00 000000 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
10481 036140 201 10 0 00 000400 MOVEI AC+1,ZZ ;SET BIT (N) OF AC+1 RIGHT
10482 036141 201 06 0 00 000200 MOVEI AC-1,YY ;SETUP FOR COMPARISON
10483 036142 245 07 0 00 777777 ROTC AC,-1 ;*ROTATE RIGHT ONE
10484 036143 312 10 0 00 000006 CAME AC+1,AC-1 ;TEST FOR BIT (N+1) A ONE
10485 036144 004 10 0 00 005234 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
10486 036145 321 11 0 00 036137 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
10487
10488 ;TEST AC+1 RIGHT HALF
10489 ;TEST ROTC RIGHT ONE BIT POSITION
10490 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
10491 ;TEST MQ SHIFT LOGIC GATES
10492 ;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
10493 ;IS TESTED.
10494 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
10495 ;OTHER BIT IS A ONE AFTER ROTATING
10496 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
10497
10498 005235 SN=SN+1
10499 000200 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
10500 IFE ZZ,<ZZ=400000>
10501
10502 000100 YY=ZZ/2 ;SELECTED BIT AFTER ROTATION
10503 036146 400 07 0 00 000000 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
10504 036147 201 10 0 00 000200 MOVEI AC+1,ZZ ;SET BIT (N) OF AC+1 RIGHT
10505 036150 201 06 0 00 000100 MOVEI AC-1,YY ;SETUP FOR COMPARISON
10506 036151 245 07 0 00 777777 ROTC AC,-1 ;*ROTATE RIGHT ONE
10507 036152 312 10 0 00 000006 CAME AC+1,AC-1 ;TEST FOR BIT (N+1) A ONE
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10508 036153 004 10 0 00 005235 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
10509 036154 321 11 0 00 036146 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
10510
10511 ;TEST AC+1 RIGHT HALF
10512 ;TEST ROTC RIGHT ONE BIT POSITION
10513 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
10514 ;TEST MQ SHIFT LOGIC GATES
10515 ;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
10516 ;IS TESTED.
10517 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
10518 ;OTHER BIT IS A ONE AFTER ROTATING
10519 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
10520
10521 005236 SN=SN+1
10522 000100 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
10523 IFE ZZ,<ZZ=400000>
10524
10525 000040 YY=ZZ/2 ;SELECTED BIT AFTER ROTATION
10526 036155 400 07 0 00 000000 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
10527 036156 201 10 0 00 000100 MOVEI AC+1,ZZ ;SET BIT (N) OF AC+1 RIGHT
10528 036157 201 06 0 00 000040 MOVEI AC-1,YY ;SETUP FOR COMPARISON
10529 036160 245 07 0 00 777777 ROTC AC,-1 ;*ROTATE RIGHT ONE
10530 036161 312 10 0 00 000006 CAME AC+1,AC-1 ;TEST FOR BIT (N+1) A ONE
10531 036162 004 10 0 00 005236 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
10532 036163 321 11 0 00 036155 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
10533
10534 ;TEST AC+1 RIGHT HALF
10535 ;TEST ROTC RIGHT ONE BIT POSITION
10536 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
10537 ;TEST MQ SHIFT LOGIC GATES
10538 ;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
10539 ;IS TESTED.
10540 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
10541 ;OTHER BIT IS A ONE AFTER ROTATING
10542 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
10543
10544 005237 SN=SN+1
10545 000040 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
10546 IFE ZZ,<ZZ=400000>
10547
10548 000020 YY=ZZ/2 ;SELECTED BIT AFTER ROTATION
10549 036164 400 07 0 00 000000 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
10550 036165 201 10 0 00 000040 MOVEI AC+1,ZZ ;SET BIT (N) OF AC+1 RIGHT
10551 036166 201 06 0 00 000020 MOVEI AC-1,YY ;SETUP FOR COMPARISON
10552 036167 245 07 0 00 777777 ROTC AC,-1 ;*ROTATE RIGHT ONE
10553 036170 312 10 0 00 000006 CAME AC+1,AC-1 ;TEST FOR BIT (N+1) A ONE
10554 036171 004 10 0 00 005237 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
10555 036172 321 11 0 00 036164 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
10556
10557 ;TEST AC+1 RIGHT HALF
10558 ;TEST ROTC RIGHT ONE BIT POSITION
10559 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
10560 ;TEST MQ SHIFT LOGIC GATES
10561 ;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
10562 ;IS TESTED.
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10563 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
10564 ;OTHER BIT IS A ONE AFTER ROTATING
10565 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
10566
10567 005240 SN=SN+1
10568 000020 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
10569 IFE ZZ,<ZZ=400000>
10570
10571 000010 YY=ZZ/2 ;SELECTED BIT AFTER ROTATION
10572 036173 400 07 0 00 000000 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
10573 036174 201 10 0 00 000020 MOVEI AC+1,ZZ ;SET BIT (N) OF AC+1 RIGHT
10574 036175 201 06 0 00 000010 MOVEI AC-1,YY ;SETUP FOR COMPARISON
10575 036176 245 07 0 00 777777 ROTC AC,-1 ;*ROTATE RIGHT ONE
10576 036177 312 10 0 00 000006 CAME AC+1,AC-1 ;TEST FOR BIT (N+1) A ONE
10577 036200 004 10 0 00 005240 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
10578 036201 321 11 0 00 036173 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
10579
10580 ;TEST AC+1 RIGHT HALF
10581 ;TEST ROTC RIGHT ONE BIT POSITION
10582 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
10583 ;TEST MQ SHIFT LOGIC GATES
10584 ;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
10585 ;IS TESTED.
10586 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
10587 ;OTHER BIT IS A ONE AFTER ROTATING
10588 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
10589
10590 005241 SN=SN+1
10591 000010 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
10592 IFE ZZ,<ZZ=400000>
10593
10594 000004 YY=ZZ/2 ;SELECTED BIT AFTER ROTATION
10595 036202 400 07 0 00 000000 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
10596 036203 201 10 0 00 000010 MOVEI AC+1,ZZ ;SET BIT (N) OF AC+1 RIGHT
10597 036204 201 06 0 00 000004 MOVEI AC-1,YY ;SETUP FOR COMPARISON
10598 036205 245 07 0 00 777777 ROTC AC,-1 ;*ROTATE RIGHT ONE
10599 036206 312 10 0 00 000006 CAME AC+1,AC-1 ;TEST FOR BIT (N+1) A ONE
10600 036207 004 10 0 00 005241 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
10601 036210 321 11 0 00 036202 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
10602
10603 ;TEST AC+1 RIGHT HALF
10604 ;TEST ROTC RIGHT ONE BIT POSITION
10605 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
10606 ;TEST MQ SHIFT LOGIC GATES
10607 ;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
10608 ;IS TESTED.
10609 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
10610 ;OTHER BIT IS A ONE AFTER ROTATING
10611 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
10612
10613 005242 SN=SN+1
10614 000004 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
10615 IFE ZZ,<ZZ=400000>
10616
10617 000002 YY=ZZ/2 ;SELECTED BIT AFTER ROTATION
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10618 036211 400 07 0 00 000000 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
10619 036212 201 10 0 00 000004 MOVEI AC+1,ZZ ;SET BIT (N) OF AC+1 RIGHT
10620 036213 201 06 0 00 000002 MOVEI AC-1,YY ;SETUP FOR COMPARISON
10621 036214 245 07 0 00 777777 ROTC AC,-1 ;*ROTATE RIGHT ONE
10622 036215 312 10 0 00 000006 CAME AC+1,AC-1 ;TEST FOR BIT (N+1) A ONE
10623 036216 004 10 0 00 005242 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
10624 036217 321 11 0 00 036211 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
10625
10626 ;TEST AC+1 RIGHT HALF
10627 ;TEST ROTC RIGHT ONE BIT POSITION
10628 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
10629 ;TEST MQ SHIFT LOGIC GATES
10630 ;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
10631 ;IS TESTED.
10632 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
10633 ;OTHER BIT IS A ONE AFTER ROTATING
10634 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
10635
10636 005243 SN=SN+1
10637 000002 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
10638 IFE ZZ,<ZZ=400000>
10639
10640 000001 YY=ZZ/2 ;SELECTED BIT AFTER ROTATION
10641 036220 400 07 0 00 000000 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
10642 036221 201 10 0 00 000002 MOVEI AC+1,ZZ ;SET BIT (N) OF AC+1 RIGHT
10643 036222 201 06 0 00 000001 MOVEI AC-1,YY ;SETUP FOR COMPARISON
10644 036223 245 07 0 00 777777 ROTC AC,-1 ;*ROTATE RIGHT ONE
10645 036224 312 10 0 00 000006 CAME AC+1,AC-1 ;TEST FOR BIT (N+1) A ONE
10646 036225 004 10 0 00 005243 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
10647 036226 321 11 0 00 036220 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
10648
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10649 005300 SN=5300
10650 000001 ZZ=1
10651
10652 E5300: REPEAT ^D18,< ;TEST AC+1 LEFT HALF
10653 ;TEST ROTC RIGHT ONE BIT POSITION
10654 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
10655 ;TEST MQ SHIFT LOGIC GATES
10656 ;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
10657 ;IS TESTED.
10658 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
10659 ;OTHER BIT IS A ZERO AFTER ROTATING
10660 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
10661
10662 SN=SN+1
10663 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
10664 IFE <ZZ>,<ZZ=777777377777>
10665 YY=<<ZZ-1>/2>&777777 ;SELECTED BIT AFTER ROTATION
10666 SETOM AC ;INITIALIZE AC TO ALL CNES
10667 HRLOI AC+1,ZZ&777777 ;SETUP BIT (N) OF AC+1 LEFT
10668 IFN <ZZ-777776>&777777,<
10669 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
10670 IFE <ZZ-777776>&777777,<
10671 HRROI AC-1,377777 ;SETUP FOR COMPARISON>
10672 ROTC AC,-1 ;*ROTATE RIGHT ONE
10673 CAME AC+1,AC-1 ;TEST FOR BIT (N+1) A ZERO
10674 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
10675 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH.
10676 >
10677 ;TEST AC+1 LEFT HALF
10678 ;TEST ROTC RIGHT ONE BIT POSITION
10679 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
10680 ;TEST MQ SHIFT LOGIC GATES
10681 ;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
10682 ;IS TESTED.
10683 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
10684 ;OTHER BIT IS A ZERO AFTER ROTATING
10685 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
10686
10687 005301 SN=SN+1
10688 000000 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
10689 777777 377777 IFE <ZZ>,<ZZ=777777377777>
10690 577777 YY=<<ZZ-1>/2>&777777 ;SELECTED BIT AFTER ROTATION
10691 036227 476 00 0 00 000007 SETOM AC ;INITIALIZE AC TO ALL CNES
10692 036230 525 10 0 00 377777 HRLOI AC+1,ZZ&777777 ;SETUP BIT (N) OF AC+1 LEFT
10693 IFN <ZZ-777776>&777777,<
10694 036231 525 06 0 00 577777 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
10695 IFE <ZZ-777776>&777777,<
10696 HRROI AC-1,377777 ;SETUP FOR COMPARISON>
10697 036232 245 07 0 00 777777 ROTC AC,-1 ;*ROTATE RIGHT ONE
10698 036233 312 10 0 00 000006 CAME AC+1,AC-1 ;TEST FOR BIT (N+1) A ZERO
10699 036234 004 10 0 00 005301 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
10700 036235 321 11 0 00 036227 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH.
10701
10702 ;TEST AC+1 LEFT HALF
10703 ;TEST ROTC RIGHT ONE BIT POSITION
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10704 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
10705 ;TEST MQ SHIFT LOGIC GATES
10706 ;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
10707 ;IS TESTED.
10708 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
10709 ;OTHER BIT IS A ZERO AFTER ROTATING
10710 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
10711
10712 005302 SN=SN+1
10713 777777 577777 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
10714 IFE <ZZ>,<ZZ=777777377777>
10715 677777 YY=<<ZZ-1>/2>&777777 ;SELECTED BIT AFTER ROTATION
10716 036236 476 00 0 00 000007 SETOM AC ;INITIALIZE AC TO ALL CNES
10717 036237 525 10 0 00 577777 HRLOI AC+1,ZZ&777777 ;SETUP BIT (N) OF AC+1 LEFT
10718 IFN <ZZ-777776>&777777,<
10719 036240 525 06 0 00 677777 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
10720 IFE <ZZ-777776>&777777,<
10721 HRROI AC-1,377777 ;SETUP FOR COMPARISON>
10722 036241 245 07 0 00 777777 ROTC AC,-1 ;*ROTATE RIGHT ONE
10723 036242 312 10 0 00 000006 CAME AC+1,AC-1 ;TEST FOR BIT (N+1) A ZERO
10724 036243 004 10 0 00 005302 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
10725 036244 321 11 0 00 036236 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH.
10726
10727 ;TEST AC+1 LEFT HALF
10728 ;TEST ROTC RIGHT ONE BIT POSITION
10729 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
10730 ;TEST MQ SHIFT LOGIC GATES
10731 ;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
10732 ;IS TESTED.
10733 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
10734 ;OTHER BIT IS A ZERO AFTER ROTATING
10735 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
10736
10737 005303 SN=SN+1
10738 777777 677777 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
10739 IFE <ZZ>,<ZZ=777777377777>
10740 737777 YY=<<ZZ-1>/2>&777777 ;SELECTED BIT AFTER ROTATION
10741 036245 476 00 0 00 000007 SETOM AC ;INITIALIZE AC TO ALL CNES
10742 036246 525 10 0 00 677777 HRLOI AC+1,ZZ&777777 ;SETUP BIT (N) OF AC+1 LEFT
10743 IFN <ZZ-777776>&777777,<
10744 036247 525 06 0 00 737777 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
10745 IFE <ZZ-777776>&777777,<
10746 HRROI AC-1,377777 ;SETUP FOR COMPARISON>
10747 036250 245 07 0 00 777777 ROTC AC,-1 ;*ROTATE RIGHT ONE
10748 036251 312 10 0 00 000006 CAME AC+1,AC-1 ;TEST FOR BIT (N+1) A ZERO
10749 036252 004 10 0 00 005303 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
10750 036253 321 11 0 00 036245 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH.
10751
10752 ;TEST AC+1 LEFT HALF
10753 ;TEST ROTC RIGHT ONE BIT POSITION
10754 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
10755 ;TEST MQ SHIFT LOGIC GATES
10756 ;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
10757 ;IS TESTED.
10758 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
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10759 ;OTHER BIT IS A ZERO AFTER ROTATING
10760 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
10761
10762 005304 SN=SN+1
10763 777777 737777 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
10764 IFE <ZZ>,<ZZ=777777377777>
10765 757777 YY=<<ZZ-1>/2>&777777 ;SELECTED BIT AFTER ROTATION
10766 036254 476 00 0 00 000007 SETOM AC ;INITIALIZE AC TO ALL CNES
10767 036255 525 10 0 00 737777 HRLOI AC+1,ZZ&777777 ;SETUP BIT (N) OF AC+1 LEFT
10768 IFN <ZZ-777776>&777777,<
10769 036256 525 06 0 00 757777 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
10770 IFE <ZZ-777776>&777777,<
10771 HRROI AC-1,377777 ;SETUP FOR COMPARISON>
10772 036257 245 07 0 00 777777 ROTC AC,-1 ;*ROTATE RIGHT ONE
10773 036260 312 10 0 00 000006 CAME AC+1,AC-1 ;TEST FOR BIT (N+1) A ZERO
10774 036261 004 10 0 00 005304 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
10775 036262 321 11 0 00 036254 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH.
10776
10777 ;TEST AC+1 LEFT HALF
10778 ;TEST ROTC RIGHT ONE BIT POSITION
10779 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
10780 ;TEST MQ SHIFT LOGIC GATES
10781 ;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
10782 ;IS TESTED.
10783 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
10784 ;OTHER BIT IS A ZERO AFTER ROTATING
10785 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
10786
10787 005305 SN=SN+1
10788 777777 757777 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
10789 IFE <ZZ>,<ZZ=777777377777>
10790 767777 YY=<<ZZ-1>/2>&777777 ;SELECTED BIT AFTER ROTATION
10791 036263 476 00 0 00 000007 SETOM AC ;INITIALIZE AC TO ALL CNES
10792 036264 525 10 0 00 757777 HRLOI AC+1,ZZ&777777 ;SETUP BIT (N) OF AC+1 LEFT
10793 IFN <ZZ-777776>&777777,<
10794 036265 525 06 0 00 767777 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
10795 IFE <ZZ-777776>&777777,<
10796 HRROI AC-1,377777 ;SETUP FOR COMPARISON>
10797 036266 245 07 0 00 777777 ROTC AC,-1 ;*ROTATE RIGHT ONE
10798 036267 312 10 0 00 000006 CAME AC+1,AC-1 ;TEST FOR BIT (N+1) A ZERO
10799 036270 004 10 0 00 005305 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
10800 036271 321 11 0 00 036263 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH.
10801
10802 ;TEST AC+1 LEFT HALF
10803 ;TEST ROTC RIGHT ONE BIT POSITION
10804 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
10805 ;TEST MQ SHIFT LOGIC GATES
10806 ;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
10807 ;IS TESTED.
10808 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
10809 ;OTHER BIT IS A ZERO AFTER ROTATING
10810 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
10811
10812 005306 SN=SN+1
10813 777777 767777 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
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10814 IFE <ZZ>,<ZZ=777777377777>
10815 773777 YY=<<ZZ-1>/2>&777777 ;SELECTED BIT AFTER ROTATION
10816 036272 476 00 0 00 000007 SETOM AC ;INITIALIZE AC TO ALL CNES
10817 036273 525 10 0 00 767777 HRLOI AC+1,ZZ&777777 ;SETUP BIT (N) OF AC+1 LEFT
10818 IFN <ZZ-777776>&777777,<
10819 036274 525 06 0 00 773777 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
10820 IFE <ZZ-777776>&777777,<
10821 HRROI AC-1,377777 ;SETUP FOR COMPARISON>
10822 036275 245 07 0 00 777777 ROTC AC,-1 ;*ROTATE RIGHT ONE
10823 036276 312 10 0 00 000006 CAME AC+1,AC-1 ;TEST FOR BIT (N+1) A ZERO
10824 036277 004 10 0 00 005306 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
10825 036300 321 11 0 00 036272 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH.
10826
10827 ;TEST AC+1 LEFT HALF
10828 ;TEST ROTC RIGHT ONE BIT POSITION
10829 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
10830 ;TEST MQ SHIFT LOGIC GATES
10831 ;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
10832 ;IS TESTED.
10833 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
10834 ;OTHER BIT IS A ZERO AFTER ROTATING
10835 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
10836
10837 005307 SN=SN+1
10838 777777 773777 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
10839 IFE <ZZ>,<ZZ=777777377777>
10840 775777 YY=<<ZZ-1>/2>&777777 ;SELECTED BIT AFTER ROTATION
10841 036301 476 00 0 00 000007 SETOM AC ;INITIALIZE AC TO ALL CNES
10842 036302 525 10 0 00 773777 HRLOI AC+1,ZZ&777777 ;SETUP BIT (N) OF AC+1 LEFT
10843 IFN <ZZ-777776>&777777,<
10844 036303 525 06 0 00 775777 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
10845 IFE <ZZ-777776>&777777,<
10846 HRROI AC-1,377777 ;SETUP FOR COMPARISON>
10847 036304 245 07 0 00 777777 ROTC AC,-1 ;*ROTATE RIGHT ONE
10848 036305 312 10 0 00 000006 CAME AC+1,AC-1 ;TEST FOR BIT (N+1) A ZERO
10849 036306 004 10 0 00 005307 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
10850 036307 321 11 0 00 036301 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH.
10851
10852 ;TEST AC+1 LEFT HALF
10853 ;TEST ROTC RIGHT ONE BIT POSITION
10854 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
10855 ;TEST MQ SHIFT LOGIC GATES
10856 ;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
10857 ;IS TESTED.
10858 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
10859 ;OTHER BIT IS A ZERO AFTER ROTATING
10860 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
10861
10862 005310 SN=SN+1
10863 777777 775777 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
10864 IFE <ZZ>,<ZZ=777777377777>
10865 776777 YY=<<ZZ-1>/2>&777777 ;SELECTED BIT AFTER ROTATION
10866 036310 476 00 0 00 000007 SETOM AC ;INITIALIZE AC TO ALL CNES
10867 036311 525 10 0 00 775777 HRLOI AC+1,ZZ&777777 ;SETUP BIT (N) OF AC+1 LEFT
10868 IFN <ZZ-777776>&777777,<
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10869 036312 525 06 0 00 776777 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
10870 IFE <ZZ-777776>&777777,<
10871 HRROI AC-1,377777 ;SETUP FOR COMPARISON>
10872 036313 245 07 0 00 777777 ROTC AC,-1 ;*ROTATE RIGHT ONE
10873 036314 312 10 0 00 000006 CAME AC+1,AC-1 ;TEST FOR BIT (N+1) A ZERO
10874 036315 004 10 0 00 005310 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
10875 036316 321 11 0 00 036310 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH.
10876
10877 ;TEST AC+1 LEFT HALF
10878 ;TEST ROTC RIGHT ONE BIT POSITION
10879 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
10880 ;TEST MQ SHIFT LOGIC GATES
10881 ;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
10882 ;IS TESTED.
10883 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
10884 ;OTHER BIT IS A ZERO AFTER ROTATING
10885 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
10886
10887 005311 SN=SN+1
10888 777777 776777 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
10889 IFE <ZZ>,<ZZ=777777377777>
10890 777377 YY=<<ZZ-1>/2>&777777 ;SELECTED BIT AFTER ROTATION
10891 036317 476 00 0 00 000007 SETOM AC ;INITIALIZE AC TO ALL CNES
10892 036320 525 10 0 00 776777 HRLOI AC+1,ZZ&777777 ;SETUP BIT (N) OF AC+1 LEFT
10893 IFN <ZZ-777776>&777777,<
10894 036321 525 06 0 00 777377 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
10895 IFE <ZZ-777776>&777777,<
10896 HRROI AC-1,377777 ;SETUP FOR COMPARISON>
10897 036322 245 07 0 00 777777 ROTC AC,-1 ;*ROTATE RIGHT ONE
10898 036323 312 10 0 00 000006 CAME AC+1,AC-1 ;TEST FOR BIT (N+1) A ZERO
10899 036324 004 10 0 00 005311 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
10900 036325 321 11 0 00 036317 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH.
10901
10902 ;TEST AC+1 LEFT HALF
10903 ;TEST ROTC RIGHT ONE BIT POSITION
10904 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
10905 ;TEST MQ SHIFT LOGIC GATES
10906 ;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
10907 ;IS TESTED.
10908 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
10909 ;OTHER BIT IS A ZERO AFTER ROTATING
10910 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
10911
10912 005312 SN=SN+1
10913 777777 777377 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
10914 IFE <ZZ>,<ZZ=777777377777>
10915 777577 YY=<<ZZ-1>/2>&777777 ;SELECTED BIT AFTER ROTATION
10916 036326 476 00 0 00 000007 SETOM AC ;INITIALIZE AC TO ALL CNES
10917 036327 525 10 0 00 777377 HRLOI AC+1,ZZ&777777 ;SETUP BIT (N) OF AC+1 LEFT
10918 IFN <ZZ-777776>&777777,<
10919 036330 525 06 0 00 777577 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
10920 IFE <ZZ-777776>&777777,<
10921 HRROI AC-1,377777 ;SETUP FOR COMPARISON>
10922 036331 245 07 0 00 777777 ROTC AC,-1 ;*ROTATE RIGHT ONE
10923 036332 312 10 0 00 000006 CAME AC+1,AC-1 ;TEST FOR BIT (N+1) A ZERO
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10924 036333 004 10 0 00 005312 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
10925 036334 321 11 0 00 036326 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH.
10926
10927 ;TEST AC+1 LEFT HALF
10928 ;TEST ROTC RIGHT ONE BIT POSITION
10929 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
10930 ;TEST MQ SHIFT LOGIC GATES
10931 ;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
10932 ;IS TESTED.
10933 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
10934 ;OTHER BIT IS A ZERO AFTER ROTATING
10935 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
10936
10937 005313 SN=SN+1
10938 777777 777577 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
10939 IFE <ZZ>,<ZZ=777777377777>
10940 777677 YY=<<ZZ-1>/2>&777777 ;SELECTED BIT AFTER ROTATION
10941 036335 476 00 0 00 000007 SETOM AC ;INITIALIZE AC TO ALL CNES
10942 036336 525 10 0 00 777577 HRLOI AC+1,ZZ&777777 ;SETUP BIT (N) OF AC+1 LEFT
10943 IFN <ZZ-777776>&777777,<
10944 036337 525 06 0 00 777677 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
10945 IFE <ZZ-777776>&777777,<
10946 HRROI AC-1,377777 ;SETUP FOR COMPARISON>
10947 036340 245 07 0 00 777777 ROTC AC,-1 ;*ROTATE RIGHT ONE
10948 036341 312 10 0 00 000006 CAME AC+1,AC-1 ;TEST FOR BIT (N+1) A ZERO
10949 036342 004 10 0 00 005313 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
10950 036343 321 11 0 00 036335 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH.
10951
10952 ;TEST AC+1 LEFT HALF
10953 ;TEST ROTC RIGHT ONE BIT POSITION
10954 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
10955 ;TEST MQ SHIFT LOGIC GATES
10956 ;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
10957 ;IS TESTED.
10958 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
10959 ;OTHER BIT IS A ZERO AFTER ROTATING
10960 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
10961
10962 005314 SN=SN+1
10963 777777 777677 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
10964 IFE <ZZ>,<ZZ=777777377777>
10965 777737 YY=<<ZZ-1>/2>&777777 ;SELECTED BIT AFTER ROTATION
10966 036344 476 00 0 00 000007 SETOM AC ;INITIALIZE AC TO ALL CNES
10967 036345 525 10 0 00 777677 HRLOI AC+1,ZZ&777777 ;SETUP BIT (N) OF AC+1 LEFT
10968 IFN <ZZ-777776>&777777,<
10969 036346 525 06 0 00 777737 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
10970 IFE <ZZ-777776>&777777,<
10971 HRROI AC-1,377777 ;SETUP FOR COMPARISON>
10972 036347 245 07 0 00 777777 ROTC AC,-1 ;*ROTATE RIGHT ONE
10973 036350 312 10 0 00 000006 CAME AC+1,AC-1 ;TEST FOR BIT (N+1) A ZERO
10974 036351 004 10 0 00 005314 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
10975 036352 321 11 0 00 036344 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH.
10976
10977 ;TEST AC+1 LEFT HALF
10978 ;TEST ROTC RIGHT ONE BIT POSITION
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10979 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
10980 ;TEST MQ SHIFT LOGIC GATES
10981 ;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
10982 ;IS TESTED.
10983 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
10984 ;OTHER BIT IS A ZERO AFTER ROTATING
10985 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
10986
10987 005315 SN=SN+1
10988 777777 777737 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
10989 IFE <ZZ>,<ZZ=777777377777>
10990 777757 YY=<<ZZ-1>/2>&777777 ;SELECTED BIT AFTER ROTATION
10991 036353 476 00 0 00 000007 SETOM AC ;INITIALIZE AC TO ALL CNES
10992 036354 525 10 0 00 777737 HRLOI AC+1,ZZ&777777 ;SETUP BIT (N) OF AC+1 LEFT
10993 IFN <ZZ-777776>&777777,<
10994 036355 525 06 0 00 777757 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
10995 IFE <ZZ-777776>&777777,<
10996 HRROI AC-1,377777 ;SETUP FOR COMPARISON>
10997 036356 245 07 0 00 777777 ROTC AC,-1 ;*ROTATE RIGHT ONE
10998 036357 312 10 0 00 000006 CAME AC+1,AC-1 ;TEST FOR BIT (N+1) A ZERO
10999 036360 004 10 0 00 005315 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
11000 036361 321 11 0 00 036353 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH.
11001
11002 ;TEST AC+1 LEFT HALF
11003 ;TEST ROTC RIGHT ONE BIT POSITION
11004 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
11005 ;TEST MQ SHIFT LOGIC GATES
11006 ;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
11007 ;IS TESTED.
11008 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
11009 ;OTHER BIT IS A ZERO AFTER ROTATING
11010 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
11011
11012 005316 SN=SN+1
11013 777777 777757 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
11014 IFE <ZZ>,<ZZ=777777377777>
11015 777767 YY=<<ZZ-1>/2>&777777 ;SELECTED BIT AFTER ROTATION
11016 036362 476 00 0 00 000007 SETOM AC ;INITIALIZE AC TO ALL CNES
11017 036363 525 10 0 00 777757 HRLOI AC+1,ZZ&777777 ;SETUP BIT (N) OF AC+1 LEFT
11018 IFN <ZZ-777776>&777777,<
11019 036364 525 06 0 00 777767 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
11020 IFE <ZZ-777776>&777777,<
11021 HRROI AC-1,377777 ;SETUP FOR COMPARISON>
11022 036365 245 07 0 00 777777 ROTC AC,-1 ;*ROTATE RIGHT ONE
11023 036366 312 10 0 00 000006 CAME AC+1,AC-1 ;TEST FOR BIT (N+1) A ZERO
11024 036367 004 10 0 00 005316 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
11025 036370 321 11 0 00 036362 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH.
11026
11027 ;TEST AC+1 LEFT HALF
11028 ;TEST ROTC RIGHT ONE BIT POSITION
11029 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
11030 ;TEST MQ SHIFT LOGIC GATES
11031 ;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
11032 ;IS TESTED.
11033 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
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11034 ;OTHER BIT IS A ZERO AFTER ROTATING
11035 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
11036
11037 005317 SN=SN+1
11038 777777 777767 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
11039 IFE <ZZ>,<ZZ=777777377777>
11040 777773 YY=<<ZZ-1>/2>&777777 ;SELECTED BIT AFTER ROTATION
11041 036371 476 00 0 00 000007 SETOM AC ;INITIALIZE AC TO ALL CNES
11042 036372 525 10 0 00 777767 HRLOI AC+1,ZZ&777777 ;SETUP BIT (N) OF AC+1 LEFT
11043 IFN <ZZ-777776>&777777,<
11044 036373 525 06 0 00 777773 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
11045 IFE <ZZ-777776>&777777,<
11046 HRROI AC-1,377777 ;SETUP FOR COMPARISON>
11047 036374 245 07 0 00 777777 ROTC AC,-1 ;*ROTATE RIGHT ONE
11048 036375 312 10 0 00 000006 CAME AC+1,AC-1 ;TEST FOR BIT (N+1) A ZERO
11049 036376 004 10 0 00 005317 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
11050 036377 321 11 0 00 036371 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH.
11051
11052 ;TEST AC+1 LEFT HALF
11053 ;TEST ROTC RIGHT ONE BIT POSITION
11054 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
11055 ;TEST MQ SHIFT LOGIC GATES
11056 ;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
11057 ;IS TESTED.
11058 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
11059 ;OTHER BIT IS A ZERO AFTER ROTATING
11060 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
11061
11062 005320 SN=SN+1
11063 777777 777773 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
11064 IFE <ZZ>,<ZZ=777777377777>
11065 777775 YY=<<ZZ-1>/2>&777777 ;SELECTED BIT AFTER ROTATION
11066 036400 476 00 0 00 000007 SETOM AC ;INITIALIZE AC TO ALL CNES
11067 036401 525 10 0 00 777773 HRLOI AC+1,ZZ&777777 ;SETUP BIT (N) OF AC+1 LEFT
11068 IFN <ZZ-777776>&777777,<
11069 036402 525 06 0 00 777775 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
11070 IFE <ZZ-777776>&777777,<
11071 HRROI AC-1,377777 ;SETUP FOR COMPARISON>
11072 036403 245 07 0 00 777777 ROTC AC,-1 ;*ROTATE RIGHT ONE
11073 036404 312 10 0 00 000006 CAME AC+1,AC-1 ;TEST FOR BIT (N+1) A ZERO
11074 036405 004 10 0 00 005320 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
11075 036406 321 11 0 00 036400 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH.
11076
11077 ;TEST AC+1 LEFT HALF
11078 ;TEST ROTC RIGHT ONE BIT POSITION
11079 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
11080 ;TEST MQ SHIFT LOGIC GATES
11081 ;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
11082 ;IS TESTED.
11083 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
11084 ;OTHER BIT IS A ZERO AFTER ROTATING
11085 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
11086
11087 005321 SN=SN+1
11088 777777 777775 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
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11089 IFE <ZZ>,<ZZ=777777377777>
11090 777776 YY=<<ZZ-1>/2>&777777 ;SELECTED BIT AFTER ROTATION
11091 036407 476 00 0 00 000007 SETOM AC ;INITIALIZE AC TO ALL CNES
11092 036410 525 10 0 00 777775 HRLOI AC+1,ZZ&777777 ;SETUP BIT (N) OF AC+1 LEFT
11093 IFN <ZZ-777776>&777777,<
11094 036411 525 06 0 00 777776 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
11095 IFE <ZZ-777776>&777777,<
11096 HRROI AC-1,377777 ;SETUP FOR COMPARISON>
11097 036412 245 07 0 00 777777 ROTC AC,-1 ;*ROTATE RIGHT ONE
11098 036413 312 10 0 00 000006 CAME AC+1,AC-1 ;TEST FOR BIT (N+1) A ZERO
11099 036414 004 10 0 00 005321 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
11100 036415 321 11 0 00 036407 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH.
11101
11102 ;TEST AC+1 LEFT HALF
11103 ;TEST ROTC RIGHT ONE BIT POSITION
11104 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
11105 ;TEST MQ SHIFT LOGIC GATES
11106 ;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
11107 ;IS TESTED.
11108 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
11109 ;OTHER BIT IS A ZERO AFTER ROTATING
11110 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
11111
11112 005322 SN=SN+1
11113 777777 777776 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
11114 IFE <ZZ>,<ZZ=777777377777>
11115 777777 YY=<<ZZ-1>/2>&777777 ;SELECTED BIT AFTER ROTATION
11116 036416 476 00 0 00 000007 SETOM AC ;INITIALIZE AC TO ALL CNES
11117 036417 525 10 0 00 777776 HRLOI AC+1,ZZ&777777 ;SETUP BIT (N) OF AC+1 LEFT
11118 IFN <ZZ-777776>&777777,<
11119 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
11120 IFE <ZZ-777776>&777777,<
11121 036420 561 06 0 00 377777 HRROI AC-1,377777 ;SETUP FOR COMPARISON>
11122 036421 245 07 0 00 777777 ROTC AC,-1 ;*ROTATE RIGHT ONE
11123 036422 312 10 0 00 000006 CAME AC+1,AC-1 ;TEST FOR BIT (N+1) A ZERO
11124 036423 004 10 0 00 005322 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
11125 036424 321 11 0 00 036416 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH.
11126
11127 PAGE
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11128 000001 ZZ=1
11129
11130 REPEAT ^D17,< ;TEST AC+1 RIGHT HALF
11131 ;TEST ROTC RIGHT ONE BIT POSITION
11132 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
11133 ;TEST MQ SHIFT LOGIC GATES
11134 ;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
11135 ;IS TESTED.
11136 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
11137 ;OTHER BIT IS A ZERO AFTER ROTATING
11138 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
11139
11140 SN=SN+1
11141 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
11142 IFE<ZZ>,<ZZ=777777377777>
11143 YY=<<ZZ-1>/2>&777777 ;SELECTED BIT AFTER ROTATION
11144 SETOM AC ;INITIALIZE AC TO ALL CNES
11145 HRROI AC+1,ZZ&777777 ;CLEAR BIT (N) OF AC+1 RIGHT
11146 HRROI AC-1,YY ;SETUP FOR COMPARISON
11147 ROTC AC,-1 ;*ROTATE RIGHT ONE
11148 CAME AC+1,AC-1 ;TEST FOR BIT (N+1) A ZERO
11149 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
11150 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
11151 >
11152 ;TEST AC+1 RIGHT HALF
11153 ;TEST ROTC RIGHT ONE BIT POSITION
11154 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
11155 ;TEST MQ SHIFT LOGIC GATES
11156 ;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
11157 ;IS TESTED.
11158 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
11159 ;OTHER BIT IS A ZERO AFTER ROTATING
11160 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
11161
11162 005323 SN=SN+1
11163 000000 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
11164 777777 377777 IFE<ZZ>,<ZZ=777777377777>
11165 577777 YY=<<ZZ-1>/2>&777777 ;SELECTED BIT AFTER ROTATION
11166 036425 476 00 0 00 000007 SETOM AC ;INITIALIZE AC TO ALL CNES
11167 036426 561 10 0 00 377777 HRROI AC+1,ZZ&777777 ;CLEAR BIT (N) OF AC+1 RIGHT
11168 036427 561 06 0 00 577777 HRROI AC-1,YY ;SETUP FOR COMPARISON
11169 036430 245 07 0 00 777777 ROTC AC,-1 ;*ROTATE RIGHT ONE
11170 036431 312 10 0 00 000006 CAME AC+1,AC-1 ;TEST FOR BIT (N+1) A ZERO
11171 036432 004 10 0 00 005323 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
11172 036433 321 11 0 00 036425 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
11173
11174 ;TEST AC+1 RIGHT HALF
11175 ;TEST ROTC RIGHT ONE BIT POSITION
11176 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
11177 ;TEST MQ SHIFT LOGIC GATES
11178 ;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
11179 ;IS TESTED.
11180 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
11181 ;OTHER BIT IS A ZERO AFTER ROTATING
11182 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
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11183
11184 005324 SN=SN+1
11185 777777 577777 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
11186 IFE<ZZ>,<ZZ=777777377777>
11187 677777 YY=<<ZZ-1>/2>&777777 ;SELECTED BIT AFTER ROTATION
11188 036434 476 00 0 00 000007 SETOM AC ;INITIALIZE AC TO ALL CNES
11189 036435 561 10 0 00 577777 HRROI AC+1,ZZ&777777 ;CLEAR BIT (N) OF AC+1 RIGHT
11190 036436 561 06 0 00 677777 HRROI AC-1,YY ;SETUP FOR COMPARISON
11191 036437 245 07 0 00 777777 ROTC AC,-1 ;*ROTATE RIGHT ONE
11192 036440 312 10 0 00 000006 CAME AC+1,AC-1 ;TEST FOR BIT (N+1) A ZERO
11193 036441 004 10 0 00 005324 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
11194 036442 321 11 0 00 036434 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
11195
11196 ;TEST AC+1 RIGHT HALF
11197 ;TEST ROTC RIGHT ONE BIT POSITION
11198 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
11199 ;TEST MQ SHIFT LOGIC GATES
11200 ;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
11201 ;IS TESTED.
11202 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
11203 ;OTHER BIT IS A ZERO AFTER ROTATING
11204 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
11205
11206 005325 SN=SN+1
11207 777777 677777 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
11208 IFE<ZZ>,<ZZ=777777377777>
11209 737777 YY=<<ZZ-1>/2>&777777 ;SELECTED BIT AFTER ROTATION
11210 036443 476 00 0 00 000007 SETOM AC ;INITIALIZE AC TO ALL CNES
11211 036444 561 10 0 00 677777 HRROI AC+1,ZZ&777777 ;CLEAR BIT (N) OF AC+1 RIGHT
11212 036445 561 06 0 00 737777 HRROI AC-1,YY ;SETUP FOR COMPARISON
11213 036446 245 07 0 00 777777 ROTC AC,-1 ;*ROTATE RIGHT ONE
11214 036447 312 10 0 00 000006 CAME AC+1,AC-1 ;TEST FOR BIT (N+1) A ZERO
11215 036450 004 10 0 00 005325 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
11216 036451 321 11 0 00 036443 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
11217
11218 ;TEST AC+1 RIGHT HALF
11219 ;TEST ROTC RIGHT ONE BIT POSITION
11220 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
11221 ;TEST MQ SHIFT LOGIC GATES
11222 ;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
11223 ;IS TESTED.
11224 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
11225 ;OTHER BIT IS A ZERO AFTER ROTATING
11226 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
11227
11228 005326 SN=SN+1
11229 777777 737777 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
11230 IFE<ZZ>,<ZZ=777777377777>
11231 757777 YY=<<ZZ-1>/2>&777777 ;SELECTED BIT AFTER ROTATION
11232 036452 476 00 0 00 000007 SETOM AC ;INITIALIZE AC TO ALL CNES
11233 036453 561 10 0 00 737777 HRROI AC+1,ZZ&777777 ;CLEAR BIT (N) OF AC+1 RIGHT
11234 036454 561 06 0 00 757777 HRROI AC-1,YY ;SETUP FOR COMPARISON
11235 036455 245 07 0 00 777777 ROTC AC,-1 ;*ROTATE RIGHT ONE
11236 036456 312 10 0 00 000006 CAME AC+1,AC-1 ;TEST FOR BIT (N+1) A ZERO
11237 036457 004 10 0 00 005326 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
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11238 036460 321 11 0 00 036452 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
11239
11240 ;TEST AC+1 RIGHT HALF
11241 ;TEST ROTC RIGHT ONE BIT POSITION
11242 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
11243 ;TEST MQ SHIFT LOGIC GATES
11244 ;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
11245 ;IS TESTED.
11246 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
11247 ;OTHER BIT IS A ZERO AFTER ROTATING
11248 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
11249
11250 005327 SN=SN+1
11251 777777 757777 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
11252 IFE<ZZ>,<ZZ=777777377777>
11253 767777 YY=<<ZZ-1>/2>&777777 ;SELECTED BIT AFTER ROTATION
11254 036461 476 00 0 00 000007 SETOM AC ;INITIALIZE AC TO ALL CNES
11255 036462 561 10 0 00 757777 HRROI AC+1,ZZ&777777 ;CLEAR BIT (N) OF AC+1 RIGHT
11256 036463 561 06 0 00 767777 HRROI AC-1,YY ;SETUP FOR COMPARISON
11257 036464 245 07 0 00 777777 ROTC AC,-1 ;*ROTATE RIGHT ONE
11258 036465 312 10 0 00 000006 CAME AC+1,AC-1 ;TEST FOR BIT (N+1) A ZERO
11259 036466 004 10 0 00 005327 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
11260 036467 321 11 0 00 036461 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
11261
11262 ;TEST AC+1 RIGHT HALF
11263 ;TEST ROTC RIGHT ONE BIT POSITION
11264 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
11265 ;TEST MQ SHIFT LOGIC GATES
11266 ;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
11267 ;IS TESTED.
11268 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
11269 ;OTHER BIT IS A ZERO AFTER ROTATING
11270 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
11271
11272 005330 SN=SN+1
11273 777777 767777 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
11274 IFE<ZZ>,<ZZ=777777377777>
11275 773777 YY=<<ZZ-1>/2>&777777 ;SELECTED BIT AFTER ROTATION
11276 036470 476 00 0 00 000007 SETOM AC ;INITIALIZE AC TO ALL CNES
11277 036471 561 10 0 00 767777 HRROI AC+1,ZZ&777777 ;CLEAR BIT (N) OF AC+1 RIGHT
11278 036472 561 06 0 00 773777 HRROI AC-1,YY ;SETUP FOR COMPARISON
11279 036473 245 07 0 00 777777 ROTC AC,-1 ;*ROTATE RIGHT ONE
11280 036474 312 10 0 00 000006 CAME AC+1,AC-1 ;TEST FOR BIT (N+1) A ZERO
11281 036475 004 10 0 00 005330 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
11282 036476 321 11 0 00 036470 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
11283
11284 ;TEST AC+1 RIGHT HALF
11285 ;TEST ROTC RIGHT ONE BIT POSITION
11286 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
11287 ;TEST MQ SHIFT LOGIC GATES
11288 ;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
11289 ;IS TESTED.
11290 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
11291 ;OTHER BIT IS A ZERO AFTER ROTATING
11292 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
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11293
11294 005331 SN=SN+1
11295 777777 773777 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
11296 IFE<ZZ>,<ZZ=777777377777>
11297 775777 YY=<<ZZ-1>/2>&777777 ;SELECTED BIT AFTER ROTATION
11298 036477 476 00 0 00 000007 SETOM AC ;INITIALIZE AC TO ALL CNES
11299 036500 561 10 0 00 773777 HRROI AC+1,ZZ&777777 ;CLEAR BIT (N) OF AC+1 RIGHT
11300 036501 561 06 0 00 775777 HRROI AC-1,YY ;SETUP FOR COMPARISON
11301 036502 245 07 0 00 777777 ROTC AC,-1 ;*ROTATE RIGHT ONE
11302 036503 312 10 0 00 000006 CAME AC+1,AC-1 ;TEST FOR BIT (N+1) A ZERO
11303 036504 004 10 0 00 005331 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
11304 036505 321 11 0 00 036477 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
11305
11306 ;TEST AC+1 RIGHT HALF
11307 ;TEST ROTC RIGHT ONE BIT POSITION
11308 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
11309 ;TEST MQ SHIFT LOGIC GATES
11310 ;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
11311 ;IS TESTED.
11312 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
11313 ;OTHER BIT IS A ZERO AFTER ROTATING
11314 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
11315
11316 005332 SN=SN+1
11317 777777 775777 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
11318 IFE<ZZ>,<ZZ=777777377777>
11319 776777 YY=<<ZZ-1>/2>&777777 ;SELECTED BIT AFTER ROTATION
11320 036506 476 00 0 00 000007 SETOM AC ;INITIALIZE AC TO ALL CNES
11321 036507 561 10 0 00 775777 HRROI AC+1,ZZ&777777 ;CLEAR BIT (N) OF AC+1 RIGHT
11322 036510 561 06 0 00 776777 HRROI AC-1,YY ;SETUP FOR COMPARISON
11323 036511 245 07 0 00 777777 ROTC AC,-1 ;*ROTATE RIGHT ONE
11324 036512 312 10 0 00 000006 CAME AC+1,AC-1 ;TEST FOR BIT (N+1) A ZERO
11325 036513 004 10 0 00 005332 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
11326 036514 321 11 0 00 036506 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
11327
11328 ;TEST AC+1 RIGHT HALF
11329 ;TEST ROTC RIGHT ONE BIT POSITION
11330 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
11331 ;TEST MQ SHIFT LOGIC GATES
11332 ;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
11333 ;IS TESTED.
11334 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
11335 ;OTHER BIT IS A ZERO AFTER ROTATING
11336 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
11337
11338 005333 SN=SN+1
11339 777777 776777 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
11340 IFE<ZZ>,<ZZ=777777377777>
11341 777377 YY=<<ZZ-1>/2>&777777 ;SELECTED BIT AFTER ROTATION
11342 036515 476 00 0 00 000007 SETOM AC ;INITIALIZE AC TO ALL CNES
11343 036516 561 10 0 00 776777 HRROI AC+1,ZZ&777777 ;CLEAR BIT (N) OF AC+1 RIGHT
11344 036517 561 06 0 00 777377 HRROI AC-1,YY ;SETUP FOR COMPARISON
11345 036520 245 07 0 00 777777 ROTC AC,-1 ;*ROTATE RIGHT ONE
11346 036521 312 10 0 00 000006 CAME AC+1,AC-1 ;TEST FOR BIT (N+1) A ZERO
11347 036522 004 10 0 00 005333 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
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11348 036523 321 11 0 00 036515 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
11349
11350 ;TEST AC+1 RIGHT HALF
11351 ;TEST ROTC RIGHT ONE BIT POSITION
11352 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
11353 ;TEST MQ SHIFT LOGIC GATES
11354 ;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
11355 ;IS TESTED.
11356 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
11357 ;OTHER BIT IS A ZERO AFTER ROTATING
11358 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
11359
11360 005334 SN=SN+1
11361 777777 777377 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
11362 IFE<ZZ>,<ZZ=777777377777>
11363 777577 YY=<<ZZ-1>/2>&777777 ;SELECTED BIT AFTER ROTATION
11364 036524 476 00 0 00 000007 SETOM AC ;INITIALIZE AC TO ALL CNES
11365 036525 561 10 0 00 777377 HRROI AC+1,ZZ&777777 ;CLEAR BIT (N) OF AC+1 RIGHT
11366 036526 561 06 0 00 777577 HRROI AC-1,YY ;SETUP FOR COMPARISON
11367 036527 245 07 0 00 777777 ROTC AC,-1 ;*ROTATE RIGHT ONE
11368 036530 312 10 0 00 000006 CAME AC+1,AC-1 ;TEST FOR BIT (N+1) A ZERO
11369 036531 004 10 0 00 005334 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
11370 036532 321 11 0 00 036524 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
11371
11372 ;TEST AC+1 RIGHT HALF
11373 ;TEST ROTC RIGHT ONE BIT POSITION
11374 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
11375 ;TEST MQ SHIFT LOGIC GATES
11376 ;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
11377 ;IS TESTED.
11378 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
11379 ;OTHER BIT IS A ZERO AFTER ROTATING
11380 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
11381
11382 005335 SN=SN+1
11383 777777 777577 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
11384 IFE<ZZ>,<ZZ=777777377777>
11385 777677 YY=<<ZZ-1>/2>&777777 ;SELECTED BIT AFTER ROTATION
11386 036533 476 00 0 00 000007 SETOM AC ;INITIALIZE AC TO ALL CNES
11387 036534 561 10 0 00 777577 HRROI AC+1,ZZ&777777 ;CLEAR BIT (N) OF AC+1 RIGHT
11388 036535 561 06 0 00 777677 HRROI AC-1,YY ;SETUP FOR COMPARISON
11389 036536 245 07 0 00 777777 ROTC AC,-1 ;*ROTATE RIGHT ONE
11390 036537 312 10 0 00 000006 CAME AC+1,AC-1 ;TEST FOR BIT (N+1) A ZERO
11391 036540 004 10 0 00 005335 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
11392 036541 321 11 0 00 036533 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
11393
11394 ;TEST AC+1 RIGHT HALF
11395 ;TEST ROTC RIGHT ONE BIT POSITION
11396 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
11397 ;TEST MQ SHIFT LOGIC GATES
11398 ;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
11399 ;IS TESTED.
11400 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
11401 ;OTHER BIT IS A ZERO AFTER ROTATING
11402 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
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11403
11404 005336 SN=SN+1
11405 777777 777677 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
11406 IFE<ZZ>,<ZZ=777777377777>
11407 777737 YY=<<ZZ-1>/2>&777777 ;SELECTED BIT AFTER ROTATION
11408 036542 476 00 0 00 000007 SETOM AC ;INITIALIZE AC TO ALL CNES
11409 036543 561 10 0 00 777677 HRROI AC+1,ZZ&777777 ;CLEAR BIT (N) OF AC+1 RIGHT
11410 036544 561 06 0 00 777737 HRROI AC-1,YY ;SETUP FOR COMPARISON
11411 036545 245 07 0 00 777777 ROTC AC,-1 ;*ROTATE RIGHT ONE
11412 036546 312 10 0 00 000006 CAME AC+1,AC-1 ;TEST FOR BIT (N+1) A ZERO
11413 036547 004 10 0 00 005336 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
11414 036550 321 11 0 00 036542 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
11415
11416 ;TEST AC+1 RIGHT HALF
11417 ;TEST ROTC RIGHT ONE BIT POSITION
11418 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
11419 ;TEST MQ SHIFT LOGIC GATES
11420 ;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
11421 ;IS TESTED.
11422 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
11423 ;OTHER BIT IS A ZERO AFTER ROTATING
11424 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
11425
11426 005337 SN=SN+1
11427 777777 777737 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
11428 IFE<ZZ>,<ZZ=777777377777>
11429 777757 YY=<<ZZ-1>/2>&777777 ;SELECTED BIT AFTER ROTATION
11430 036551 476 00 0 00 000007 SETOM AC ;INITIALIZE AC TO ALL CNES
11431 036552 561 10 0 00 777737 HRROI AC+1,ZZ&777777 ;CLEAR BIT (N) OF AC+1 RIGHT
11432 036553 561 06 0 00 777757 HRROI AC-1,YY ;SETUP FOR COMPARISON
11433 036554 245 07 0 00 777777 ROTC AC,-1 ;*ROTATE RIGHT ONE
11434 036555 312 10 0 00 000006 CAME AC+1,AC-1 ;TEST FOR BIT (N+1) A ZERO
11435 036556 004 10 0 00 005337 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
11436 036557 321 11 0 00 036551 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
11437
11438 ;TEST AC+1 RIGHT HALF
11439 ;TEST ROTC RIGHT ONE BIT POSITION
11440 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
11441 ;TEST MQ SHIFT LOGIC GATES
11442 ;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
11443 ;IS TESTED.
11444 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
11445 ;OTHER BIT IS A ZERO AFTER ROTATING
11446 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
11447
11448 005340 SN=SN+1
11449 777777 777757 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
11450 IFE<ZZ>,<ZZ=777777377777>
11451 777767 YY=<<ZZ-1>/2>&777777 ;SELECTED BIT AFTER ROTATION
11452 036560 476 00 0 00 000007 SETOM AC ;INITIALIZE AC TO ALL CNES
11453 036561 561 10 0 00 777757 HRROI AC+1,ZZ&777777 ;CLEAR BIT (N) OF AC+1 RIGHT
11454 036562 561 06 0 00 777767 HRROI AC-1,YY ;SETUP FOR COMPARISON
11455 036563 245 07 0 00 777777 ROTC AC,-1 ;*ROTATE RIGHT ONE
11456 036564 312 10 0 00 000006 CAME AC+1,AC-1 ;TEST FOR BIT (N+1) A ZERO
11457 036565 004 10 0 00 005340 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
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11458 036566 321 11 0 00 036560 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
11459
11460 ;TEST AC+1 RIGHT HALF
11461 ;TEST ROTC RIGHT ONE BIT POSITION
11462 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
11463 ;TEST MQ SHIFT LOGIC GATES
11464 ;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
11465 ;IS TESTED.
11466 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
11467 ;OTHER BIT IS A ZERO AFTER ROTATING
11468 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
11469
11470 005341 SN=SN+1
11471 777777 777767 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
11472 IFE<ZZ>,<ZZ=777777377777>
11473 777773 YY=<<ZZ-1>/2>&777777 ;SELECTED BIT AFTER ROTATION
11474 036567 476 00 0 00 000007 SETOM AC ;INITIALIZE AC TO ALL CNES
11475 036570 561 10 0 00 777767 HRROI AC+1,ZZ&777777 ;CLEAR BIT (N) OF AC+1 RIGHT
11476 036571 561 06 0 00 777773 HRROI AC-1,YY ;SETUP FOR COMPARISON
11477 036572 245 07 0 00 777777 ROTC AC,-1 ;*ROTATE RIGHT ONE
11478 036573 312 10 0 00 000006 CAME AC+1,AC-1 ;TEST FOR BIT (N+1) A ZERO
11479 036574 004 10 0 00 005341 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
11480 036575 321 11 0 00 036567 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
11481
11482 ;TEST AC+1 RIGHT HALF
11483 ;TEST ROTC RIGHT ONE BIT POSITION
11484 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
11485 ;TEST MQ SHIFT LOGIC GATES
11486 ;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
11487 ;IS TESTED.
11488 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
11489 ;OTHER BIT IS A ZERO AFTER ROTATING
11490 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
11491
11492 005342 SN=SN+1
11493 777777 777773 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
11494 IFE<ZZ>,<ZZ=777777377777>
11495 777775 YY=<<ZZ-1>/2>&777777 ;SELECTED BIT AFTER ROTATION
11496 036576 476 00 0 00 000007 SETOM AC ;INITIALIZE AC TO ALL CNES
11497 036577 561 10 0 00 777773 HRROI AC+1,ZZ&777777 ;CLEAR BIT (N) OF AC+1 RIGHT
11498 036600 561 06 0 00 777775 HRROI AC-1,YY ;SETUP FOR COMPARISON
11499 036601 245 07 0 00 777777 ROTC AC,-1 ;*ROTATE RIGHT ONE
11500 036602 312 10 0 00 000006 CAME AC+1,AC-1 ;TEST FOR BIT (N+1) A ZERO
11501 036603 004 10 0 00 005342 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
11502 036604 321 11 0 00 036576 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
11503
11504 ;TEST AC+1 RIGHT HALF
11505 ;TEST ROTC RIGHT ONE BIT POSITION
11506 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
11507 ;TEST MQ SHIFT LOGIC GATES
11508 ;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
11509 ;IS TESTED.
11510 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
11511 ;OTHER BIT IS A ZERO AFTER ROTATING
11512 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
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11513
11514 005343 SN=SN+1
11515 777777 777775 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
11516 IFE<ZZ>,<ZZ=777777377777>
11517 777776 YY=<<ZZ-1>/2>&777777 ;SELECTED BIT AFTER ROTATION
11518 036605 476 00 0 00 000007 SETOM AC ;INITIALIZE AC TO ALL CNES
11519 036606 561 10 0 00 777775 HRROI AC+1,ZZ&777777 ;CLEAR BIT (N) OF AC+1 RIGHT
11520 036607 561 06 0 00 777776 HRROI AC-1,YY ;SETUP FOR COMPARISON
11521 036610 245 07 0 00 777777 ROTC AC,-1 ;*ROTATE RIGHT ONE
11522 036611 312 10 0 00 000006 CAME AC+1,AC-1 ;TEST FOR BIT (N+1) A ZERO
11523 036612 004 10 0 00 005343 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
11524 036613 321 11 0 00 036605 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
11525
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11526 ;TEST ROTC RIGHT TWO BIT POSITIONS USING ALL ZEROS
11527 ;TEST MQ SHIFT LOGIC GATES
11528 ;AC,AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND
11529 ;AC+1 IS TESTED
11530 ;AN ERROR OCCURS IF C(AC+1) IS NON-ZERO AFTER ROTATING
11531
11532 000006 AC=6
11533 SAVEAC (1,1)^
11534 036614 201 10 0 00 036614 MOVEI AC+2,. ;SAVE TEST PC
11535 036615 202 10 0 00 030051 MOVEM AC+2,TESTPC
11536 036616 201 10 0 00 000010 MOVEI AC+2,<AC+2>&17 ;INFORM ERROR ROUTINE WHICH
11537 036617 202 10 0 00 041765 MOVEM AC+2,ERRLOP# ;AC IS USED FOR ITERATION^
11538 036620 E5400:
11539 036620 403 06 0 00 000007 SETZB AC,AC+1 ;INITIALIZE AC,AC+1 TO ALL ZEROS
11540 036621 402 00 0 00 000005 SETZM AC-1 ;INITIALIZE RESULT TO ZERO
11541 036622 245 06 0 00 777776 ROTC AC,-2 ;*ROTATE RIGHT TWO
11542 036623 312 07 0 00 000005 CAME AC+1,AC-1 ;TEST AC+1 FOR ALL ZEROS
11543 036624 004 07 0 00 005401 ER4 AC+1,5401 ;MQ GATING FAILED
11544 036625 321 10 0 00 036620 JUMPL AC+2,E5400 ;LOOP ON ERROR SWITCH
11545
11546 ;TEST ROTC RIGHT TWO BIT POSITIONS USING ALL ONES
11547 ;TEST MQ SHIFT LOGIC GATES
11548 ;AC,AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND
11549 ;AC+1 IS TESTED
11550 ;AN ERROR OCCURS IF C(AC+1) IS ZERO AFTER ROTATING
11551
11552 036626 477 06 0 00 000007 E5500: SETOB AC,AC+1 ;INITIALIZE AC,AC+1 TO ALL ONES
11553 036627 476 00 0 00 000005 SETOM AC-1 ;INITIALIZE RESULT TO ALL ONES
11554 036630 245 06 0 00 777776 ROTC AC,-2 ;*ROTATE RIGHT TWO
11555 036631 312 07 0 00 000005 CAME AC+1,AC-1 ;TEST AC+1 FOR ALL ONES
11556 036632 004 07 0 00 005501 ER4 AC+1,5501 ;MQ GATING FAILED
11557 036633 321 10 0 00 036626 JUMPL AC+2,E5500 ;LOOP ON ERROR SWITCH
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11558 005600 SN=5600
11559 000000 ZZ=0
11560
11561 E5600: REPEAT ^D18,< ;TEST AC+1 LEFT HALF
11562 ;TEST ROTC RIGHT TWO BIT POSITIONS
11563 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
11564 ;TEST MQ SHIFT LOGIC GATES
11565 ;AC,AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
11566 ;IS TESTED.
11567 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
11568 ;OTHER BIT IS A ONE AFTER ROTATING
11569 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
11570
11571 SN=SN+1
11572 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
11573 IFE ZZ,<ZZ=400000>
11574 YY=ZZ/4 ;SELECTED BIT AFTER ROTATION
11575 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
11576 MOVSI AC+1,ZZ ;SET BIT (N) OF AC+1 LEFT
11577 IFG <ZZ-2,>,<
11578 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
11579 IFE <ZZ-2>,<
11580 MOVEI AC-1,400000 ;SETUP FOR COMPARISON>
11581 IFE <ZZ-1>,<
11582 MOVEI AC-1,200000 ;SETUP FOR COMPARISON>
11583 ROTC AC,-2 ;*ROTATE RIGHT TWO
11584 CAME AC+1,AC-1 ;TEST FOR BIT (N+2) A ONE
11585 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
11586 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
11587 >
11588 ;TEST AC+1 LEFT HALF
11589 ;TEST ROTC RIGHT TWO BIT POSITIONS
11590 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
11591 ;TEST MQ SHIFT LOGIC GATES
11592 ;AC,AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
11593 ;IS TESTED.
11594 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
11595 ;OTHER BIT IS A ONE AFTER ROTATING
11596 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
11597
11598 005601 SN=SN+1
11599 000000 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
11600 400000 IFE ZZ,<ZZ=400000>
11601 100000 YY=ZZ/4 ;SELECTED BIT AFTER ROTATION
11602 036634 400 06 0 00 000000 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
11603 036635 205 07 0 00 400000 MOVSI AC+1,ZZ ;SET BIT (N) OF AC+1 LEFT
11604 IFG <ZZ-2,>,<
11605 036636 205 05 0 00 100000 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
11606 IFE <ZZ-2>,<
11607 MOVEI AC-1,400000 ;SETUP FOR COMPARISON>
11608 IFE <ZZ-1>,<
11609 MOVEI AC-1,200000 ;SETUP FOR COMPARISON>
11610 036637 245 06 0 00 777776 ROTC AC,-2 ;*ROTATE RIGHT TWO
11611 036640 312 07 0 00 000005 CAME AC+1,AC-1 ;TEST FOR BIT (N+2) A ONE
11612 036641 004 07 0 00 005601 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
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11613 036642 321 10 0 00 036634 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
11614
11615 ;TEST AC+1 LEFT HALF
11616 ;TEST ROTC RIGHT TWO BIT POSITIONS
11617 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
11618 ;TEST MQ SHIFT LOGIC GATES
11619 ;AC,AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
11620 ;IS TESTED.
11621 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
11622 ;OTHER BIT IS A ONE AFTER ROTATING
11623 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
11624
11625 005602 SN=SN+1
11626 200000 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
11627 IFE ZZ,<ZZ=400000>
11628 040000 YY=ZZ/4 ;SELECTED BIT AFTER ROTATION
11629 036643 400 06 0 00 000000 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
11630 036644 205 07 0 00 200000 MOVSI AC+1,ZZ ;SET BIT (N) OF AC+1 LEFT
11631 IFG <ZZ-2,>,<
11632 036645 205 05 0 00 040000 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
11633 IFE <ZZ-2>,<
11634 MOVEI AC-1,400000 ;SETUP FOR COMPARISON>
11635 IFE <ZZ-1>,<
11636 MOVEI AC-1,200000 ;SETUP FOR COMPARISON>
11637 036646 245 06 0 00 777776 ROTC AC,-2 ;*ROTATE RIGHT TWO
11638 036647 312 07 0 00 000005 CAME AC+1,AC-1 ;TEST FOR BIT (N+2) A ONE
11639 036650 004 07 0 00 005602 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
11640 036651 321 10 0 00 036643 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
11641
11642 ;TEST AC+1 LEFT HALF
11643 ;TEST ROTC RIGHT TWO BIT POSITIONS
11644 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
11645 ;TEST MQ SHIFT LOGIC GATES
11646 ;AC,AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
11647 ;IS TESTED.
11648 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
11649 ;OTHER BIT IS A ONE AFTER ROTATING
11650 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
11651
11652 005603 SN=SN+1
11653 100000 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
11654 IFE ZZ,<ZZ=400000>
11655 020000 YY=ZZ/4 ;SELECTED BIT AFTER ROTATION
11656 036652 400 06 0 00 000000 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
11657 036653 205 07 0 00 100000 MOVSI AC+1,ZZ ;SET BIT (N) OF AC+1 LEFT
11658 IFG <ZZ-2,>,<
11659 036654 205 05 0 00 020000 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
11660 IFE <ZZ-2>,<
11661 MOVEI AC-1,400000 ;SETUP FOR COMPARISON>
11662 IFE <ZZ-1>,<
11663 MOVEI AC-1,200000 ;SETUP FOR COMPARISON>
11664 036655 245 06 0 00 777776 ROTC AC,-2 ;*ROTATE RIGHT TWO
11665 036656 312 07 0 00 000005 CAME AC+1,AC-1 ;TEST FOR BIT (N+2) A ONE
11666 036657 004 07 0 00 005603 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
11667 036660 321 10 0 00 036652 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
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11668
11669 ;TEST AC+1 LEFT HALF
11670 ;TEST ROTC RIGHT TWO BIT POSITIONS
11671 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
11672 ;TEST MQ SHIFT LOGIC GATES
11673 ;AC,AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
11674 ;IS TESTED.
11675 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
11676 ;OTHER BIT IS A ONE AFTER ROTATING
11677 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
11678
11679 005604 SN=SN+1
11680 040000 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
11681 IFE ZZ,<ZZ=400000>
11682 010000 YY=ZZ/4 ;SELECTED BIT AFTER ROTATION
11683 036661 400 06 0 00 000000 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
11684 036662 205 07 0 00 040000 MOVSI AC+1,ZZ ;SET BIT (N) OF AC+1 LEFT
11685 IFG <ZZ-2,>,<
11686 036663 205 05 0 00 010000 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
11687 IFE <ZZ-2>,<
11688 MOVEI AC-1,400000 ;SETUP FOR COMPARISON>
11689 IFE <ZZ-1>,<
11690 MOVEI AC-1,200000 ;SETUP FOR COMPARISON>
11691 036664 245 06 0 00 777776 ROTC AC,-2 ;*ROTATE RIGHT TWO
11692 036665 312 07 0 00 000005 CAME AC+1,AC-1 ;TEST FOR BIT (N+2) A ONE
11693 036666 004 07 0 00 005604 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
11694 036667 321 10 0 00 036661 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
11695
11696 ;TEST AC+1 LEFT HALF
11697 ;TEST ROTC RIGHT TWO BIT POSITIONS
11698 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
11699 ;TEST MQ SHIFT LOGIC GATES
11700 ;AC,AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
11701 ;IS TESTED.
11702 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
11703 ;OTHER BIT IS A ONE AFTER ROTATING
11704 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
11705
11706 005605 SN=SN+1
11707 020000 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
11708 IFE ZZ,<ZZ=400000>
11709 004000 YY=ZZ/4 ;SELECTED BIT AFTER ROTATION
11710 036670 400 06 0 00 000000 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
11711 036671 205 07 0 00 020000 MOVSI AC+1,ZZ ;SET BIT (N) OF AC+1 LEFT
11712 IFG <ZZ-2,>,<
11713 036672 205 05 0 00 004000 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
11714 IFE <ZZ-2>,<
11715 MOVEI AC-1,400000 ;SETUP FOR COMPARISON>
11716 IFE <ZZ-1>,<
11717 MOVEI AC-1,200000 ;SETUP FOR COMPARISON>
11718 036673 245 06 0 00 777776 ROTC AC,-2 ;*ROTATE RIGHT TWO
11719 036674 312 07 0 00 000005 CAME AC+1,AC-1 ;TEST FOR BIT (N+2) A ONE
11720 036675 004 07 0 00 005605 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
11721 036676 321 10 0 00 036670 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
11722
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11723 ;TEST AC+1 LEFT HALF
11724 ;TEST ROTC RIGHT TWO BIT POSITIONS
11725 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
11726 ;TEST MQ SHIFT LOGIC GATES
11727 ;AC,AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
11728 ;IS TESTED.
11729 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
11730 ;OTHER BIT IS A ONE AFTER ROTATING
11731 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
11732
11733 005606 SN=SN+1
11734 010000 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
11735 IFE ZZ,<ZZ=400000>
11736 002000 YY=ZZ/4 ;SELECTED BIT AFTER ROTATION
11737 036677 400 06 0 00 000000 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
11738 036700 205 07 0 00 010000 MOVSI AC+1,ZZ ;SET BIT (N) OF AC+1 LEFT
11739 IFG <ZZ-2,>,<
11740 036701 205 05 0 00 002000 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
11741 IFE <ZZ-2>,<
11742 MOVEI AC-1,400000 ;SETUP FOR COMPARISON>
11743 IFE <ZZ-1>,<
11744 MOVEI AC-1,200000 ;SETUP FOR COMPARISON>
11745 036702 245 06 0 00 777776 ROTC AC,-2 ;*ROTATE RIGHT TWO
11746 036703 312 07 0 00 000005 CAME AC+1,AC-1 ;TEST FOR BIT (N+2) A ONE
11747 036704 004 07 0 00 005606 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
11748 036705 321 10 0 00 036677 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
11749
11750 ;TEST AC+1 LEFT HALF
11751 ;TEST ROTC RIGHT TWO BIT POSITIONS
11752 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
11753 ;TEST MQ SHIFT LOGIC GATES
11754 ;AC,AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
11755 ;IS TESTED.
11756 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
11757 ;OTHER BIT IS A ONE AFTER ROTATING
11758 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
11759
11760 005607 SN=SN+1
11761 004000 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
11762 IFE ZZ,<ZZ=400000>
11763 001000 YY=ZZ/4 ;SELECTED BIT AFTER ROTATION
11764 036706 400 06 0 00 000000 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
11765 036707 205 07 0 00 004000 MOVSI AC+1,ZZ ;SET BIT (N) OF AC+1 LEFT
11766 IFG <ZZ-2,>,<
11767 036710 205 05 0 00 001000 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
11768 IFE <ZZ-2>,<
11769 MOVEI AC-1,400000 ;SETUP FOR COMPARISON>
11770 IFE <ZZ-1>,<
11771 MOVEI AC-1,200000 ;SETUP FOR COMPARISON>
11772 036711 245 06 0 00 777776 ROTC AC,-2 ;*ROTATE RIGHT TWO
11773 036712 312 07 0 00 000005 CAME AC+1,AC-1 ;TEST FOR BIT (N+2) A ONE
11774 036713 004 07 0 00 005607 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
11775 036714 321 10 0 00 036706 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
11776
11777 ;TEST AC+1 LEFT HALF
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11778 ;TEST ROTC RIGHT TWO BIT POSITIONS
11779 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
11780 ;TEST MQ SHIFT LOGIC GATES
11781 ;AC,AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
11782 ;IS TESTED.
11783 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
11784 ;OTHER BIT IS A ONE AFTER ROTATING
11785 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
11786
11787 005610 SN=SN+1
11788 002000 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
11789 IFE ZZ,<ZZ=400000>
11790 000400 YY=ZZ/4 ;SELECTED BIT AFTER ROTATION
11791 036715 400 06 0 00 000000 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
11792 036716 205 07 0 00 002000 MOVSI AC+1,ZZ ;SET BIT (N) OF AC+1 LEFT
11793 IFG <ZZ-2,>,<
11794 036717 205 05 0 00 000400 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
11795 IFE <ZZ-2>,<
11796 MOVEI AC-1,400000 ;SETUP FOR COMPARISON>
11797 IFE <ZZ-1>,<
11798 MOVEI AC-1,200000 ;SETUP FOR COMPARISON>
11799 036720 245 06 0 00 777776 ROTC AC,-2 ;*ROTATE RIGHT TWO
11800 036721 312 07 0 00 000005 CAME AC+1,AC-1 ;TEST FOR BIT (N+2) A ONE
11801 036722 004 07 0 00 005610 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
11802 036723 321 10 0 00 036715 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
11803
11804 ;TEST AC+1 LEFT HALF
11805 ;TEST ROTC RIGHT TWO BIT POSITIONS
11806 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
11807 ;TEST MQ SHIFT LOGIC GATES
11808 ;AC,AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
11809 ;IS TESTED.
11810 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
11811 ;OTHER BIT IS A ONE AFTER ROTATING
11812 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
11813
11814 005611 SN=SN+1
11815 001000 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
11816 IFE ZZ,<ZZ=400000>
11817 000200 YY=ZZ/4 ;SELECTED BIT AFTER ROTATION
11818 036724 400 06 0 00 000000 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
11819 036725 205 07 0 00 001000 MOVSI AC+1,ZZ ;SET BIT (N) OF AC+1 LEFT
11820 IFG <ZZ-2,>,<
11821 036726 205 05 0 00 000200 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
11822 IFE <ZZ-2>,<
11823 MOVEI AC-1,400000 ;SETUP FOR COMPARISON>
11824 IFE <ZZ-1>,<
11825 MOVEI AC-1,200000 ;SETUP FOR COMPARISON>
11826 036727 245 06 0 00 777776 ROTC AC,-2 ;*ROTATE RIGHT TWO
11827 036730 312 07 0 00 000005 CAME AC+1,AC-1 ;TEST FOR BIT (N+2) A ONE
11828 036731 004 07 0 00 005611 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
11829 036732 321 10 0 00 036724 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
11830
11831 ;TEST AC+1 LEFT HALF
11832 ;TEST ROTC RIGHT TWO BIT POSITIONS
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11833 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
11834 ;TEST MQ SHIFT LOGIC GATES
11835 ;AC,AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
11836 ;IS TESTED.
11837 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
11838 ;OTHER BIT IS A ONE AFTER ROTATING
11839 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
11840
11841 005612 SN=SN+1
11842 000400 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
11843 IFE ZZ,<ZZ=400000>
11844 000100 YY=ZZ/4 ;SELECTED BIT AFTER ROTATION
11845 036733 400 06 0 00 000000 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
11846 036734 205 07 0 00 000400 MOVSI AC+1,ZZ ;SET BIT (N) OF AC+1 LEFT
11847 IFG <ZZ-2,>,<
11848 036735 205 05 0 00 000100 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
11849 IFE <ZZ-2>,<
11850 MOVEI AC-1,400000 ;SETUP FOR COMPARISON>
11851 IFE <ZZ-1>,<
11852 MOVEI AC-1,200000 ;SETUP FOR COMPARISON>
11853 036736 245 06 0 00 777776 ROTC AC,-2 ;*ROTATE RIGHT TWO
11854 036737 312 07 0 00 000005 CAME AC+1,AC-1 ;TEST FOR BIT (N+2) A ONE
11855 036740 004 07 0 00 005612 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
11856 036741 321 10 0 00 036733 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
11857
11858 ;TEST AC+1 LEFT HALF
11859 ;TEST ROTC RIGHT TWO BIT POSITIONS
11860 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
11861 ;TEST MQ SHIFT LOGIC GATES
11862 ;AC,AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
11863 ;IS TESTED.
11864 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
11865 ;OTHER BIT IS A ONE AFTER ROTATING
11866 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
11867
11868 005613 SN=SN+1
11869 000200 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
11870 IFE ZZ,<ZZ=400000>
11871 000040 YY=ZZ/4 ;SELECTED BIT AFTER ROTATION
11872 036742 400 06 0 00 000000 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
11873 036743 205 07 0 00 000200 MOVSI AC+1,ZZ ;SET BIT (N) OF AC+1 LEFT
11874 IFG <ZZ-2,>,<
11875 036744 205 05 0 00 000040 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
11876 IFE <ZZ-2>,<
11877 MOVEI AC-1,400000 ;SETUP FOR COMPARISON>
11878 IFE <ZZ-1>,<
11879 MOVEI AC-1,200000 ;SETUP FOR COMPARISON>
11880 036745 245 06 0 00 777776 ROTC AC,-2 ;*ROTATE RIGHT TWO
11881 036746 312 07 0 00 000005 CAME AC+1,AC-1 ;TEST FOR BIT (N+2) A ONE
11882 036747 004 07 0 00 005613 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
11883 036750 321 10 0 00 036742 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
11884
11885 ;TEST AC+1 LEFT HALF
11886 ;TEST ROTC RIGHT TWO BIT POSITIONS
11887 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
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11888 ;TEST MQ SHIFT LOGIC GATES
11889 ;AC,AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
11890 ;IS TESTED.
11891 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
11892 ;OTHER BIT IS A ONE AFTER ROTATING
11893 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
11894
11895 005614 SN=SN+1
11896 000100 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
11897 IFE ZZ,<ZZ=400000>
11898 000020 YY=ZZ/4 ;SELECTED BIT AFTER ROTATION
11899 036751 400 06 0 00 000000 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
11900 036752 205 07 0 00 000100 MOVSI AC+1,ZZ ;SET BIT (N) OF AC+1 LEFT
11901 IFG <ZZ-2,>,<
11902 036753 205 05 0 00 000020 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
11903 IFE <ZZ-2>,<
11904 MOVEI AC-1,400000 ;SETUP FOR COMPARISON>
11905 IFE <ZZ-1>,<
11906 MOVEI AC-1,200000 ;SETUP FOR COMPARISON>
11907 036754 245 06 0 00 777776 ROTC AC,-2 ;*ROTATE RIGHT TWO
11908 036755 312 07 0 00 000005 CAME AC+1,AC-1 ;TEST FOR BIT (N+2) A ONE
11909 036756 004 07 0 00 005614 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
11910 036757 321 10 0 00 036751 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
11911
11912 ;TEST AC+1 LEFT HALF
11913 ;TEST ROTC RIGHT TWO BIT POSITIONS
11914 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
11915 ;TEST MQ SHIFT LOGIC GATES
11916 ;AC,AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
11917 ;IS TESTED.
11918 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
11919 ;OTHER BIT IS A ONE AFTER ROTATING
11920 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
11921
11922 005615 SN=SN+1
11923 000040 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
11924 IFE ZZ,<ZZ=400000>
11925 000010 YY=ZZ/4 ;SELECTED BIT AFTER ROTATION
11926 036760 400 06 0 00 000000 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
11927 036761 205 07 0 00 000040 MOVSI AC+1,ZZ ;SET BIT (N) OF AC+1 LEFT
11928 IFG <ZZ-2,>,<
11929 036762 205 05 0 00 000010 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
11930 IFE <ZZ-2>,<
11931 MOVEI AC-1,400000 ;SETUP FOR COMPARISON>
11932 IFE <ZZ-1>,<
11933 MOVEI AC-1,200000 ;SETUP FOR COMPARISON>
11934 036763 245 06 0 00 777776 ROTC AC,-2 ;*ROTATE RIGHT TWO
11935 036764 312 07 0 00 000005 CAME AC+1,AC-1 ;TEST FOR BIT (N+2) A ONE
11936 036765 004 07 0 00 005615 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
11937 036766 321 10 0 00 036760 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
11938
11939 ;TEST AC+1 LEFT HALF
11940 ;TEST ROTC RIGHT TWO BIT POSITIONS
11941 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
11942 ;TEST MQ SHIFT LOGIC GATES
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11943 ;AC,AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
11944 ;IS TESTED.
11945 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
11946 ;OTHER BIT IS A ONE AFTER ROTATING
11947 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
11948
11949 005616 SN=SN+1
11950 000020 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
11951 IFE ZZ,<ZZ=400000>
11952 000004 YY=ZZ/4 ;SELECTED BIT AFTER ROTATION
11953 036767 400 06 0 00 000000 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
11954 036770 205 07 0 00 000020 MOVSI AC+1,ZZ ;SET BIT (N) OF AC+1 LEFT
11955 IFG <ZZ-2,>,<
11956 036771 205 05 0 00 000004 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
11957 IFE <ZZ-2>,<
11958 MOVEI AC-1,400000 ;SETUP FOR COMPARISON>
11959 IFE <ZZ-1>,<
11960 MOVEI AC-1,200000 ;SETUP FOR COMPARISON>
11961 036772 245 06 0 00 777776 ROTC AC,-2 ;*ROTATE RIGHT TWO
11962 036773 312 07 0 00 000005 CAME AC+1,AC-1 ;TEST FOR BIT (N+2) A ONE
11963 036774 004 07 0 00 005616 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
11964 036775 321 10 0 00 036767 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
11965
11966 ;TEST AC+1 LEFT HALF
11967 ;TEST ROTC RIGHT TWO BIT POSITIONS
11968 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
11969 ;TEST MQ SHIFT LOGIC GATES
11970 ;AC,AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
11971 ;IS TESTED.
11972 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
11973 ;OTHER BIT IS A ONE AFTER ROTATING
11974 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
11975
11976 005617 SN=SN+1
11977 000010 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
11978 IFE ZZ,<ZZ=400000>
11979 000002 YY=ZZ/4 ;SELECTED BIT AFTER ROTATION
11980 036776 400 06 0 00 000000 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
11981 036777 205 07 0 00 000010 MOVSI AC+1,ZZ ;SET BIT (N) OF AC+1 LEFT
11982 IFG <ZZ-2,>,<
11983 037000 205 05 0 00 000002 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
11984 IFE <ZZ-2>,<
11985 MOVEI AC-1,400000 ;SETUP FOR COMPARISON>
11986 IFE <ZZ-1>,<
11987 MOVEI AC-1,200000 ;SETUP FOR COMPARISON>
11988 037001 245 06 0 00 777776 ROTC AC,-2 ;*ROTATE RIGHT TWO
11989 037002 312 07 0 00 000005 CAME AC+1,AC-1 ;TEST FOR BIT (N+2) A ONE
11990 037003 004 07 0 00 005617 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
11991 037004 321 10 0 00 036776 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
11992
11993 ;TEST AC+1 LEFT HALF
11994 ;TEST ROTC RIGHT TWO BIT POSITIONS
11995 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
11996 ;TEST MQ SHIFT LOGIC GATES
11997 ;AC,AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
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DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES SEQ 0254
11998 ;IS TESTED.
11999 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
12000 ;OTHER BIT IS A ONE AFTER ROTATING
12001 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
12002
12003 005620 SN=SN+1
12004 000004 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
12005 IFE ZZ,<ZZ=400000>
12006 000001 YY=ZZ/4 ;SELECTED BIT AFTER ROTATION
12007 037005 400 06 0 00 000000 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
12008 037006 205 07 0 00 000004 MOVSI AC+1,ZZ ;SET BIT (N) OF AC+1 LEFT
12009 IFG <ZZ-2,>,<
12010 037007 205 05 0 00 000001 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
12011 IFE <ZZ-2>,<
12012 MOVEI AC-1,400000 ;SETUP FOR COMPARISON>
12013 IFE <ZZ-1>,<
12014 MOVEI AC-1,200000 ;SETUP FOR COMPARISON>
12015 037010 245 06 0 00 777776 ROTC AC,-2 ;*ROTATE RIGHT TWO
12016 037011 312 07 0 00 000005 CAME AC+1,AC-1 ;TEST FOR BIT (N+2) A ONE
12017 037012 004 07 0 00 005620 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
12018 037013 321 10 0 00 037005 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
12019
12020 ;TEST AC+1 LEFT HALF
12021 ;TEST ROTC RIGHT TWO BIT POSITIONS
12022 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
12023 ;TEST MQ SHIFT LOGIC GATES
12024 ;AC,AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
12025 ;IS TESTED.
12026 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
12027 ;OTHER BIT IS A ONE AFTER ROTATING
12028 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
12029
12030 005621 SN=SN+1
12031 000002 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
12032 IFE ZZ,<ZZ=400000>
12033 000000 YY=ZZ/4 ;SELECTED BIT AFTER ROTATION
12034 037014 400 06 0 00 000000 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
12035 037015 205 07 0 00 000002 MOVSI AC+1,ZZ ;SET BIT (N) OF AC+1 LEFT
12036 IFG <ZZ-2,>,<
12037 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
12038 IFE <ZZ-2>,<
12039 037016 201 05 0 00 400000 MOVEI AC-1,400000 ;SETUP FOR COMPARISON>
12040 IFE <ZZ-1>,<
12041 MOVEI AC-1,200000 ;SETUP FOR COMPARISON>
12042 037017 245 06 0 00 777776 ROTC AC,-2 ;*ROTATE RIGHT TWO
12043 037020 312 07 0 00 000005 CAME AC+1,AC-1 ;TEST FOR BIT (N+2) A ONE
12044 037021 004 07 0 00 005621 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
12045 037022 321 10 0 00 037014 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
12046
12047 ;TEST AC+1 LEFT HALF
12048 ;TEST ROTC RIGHT TWO BIT POSITIONS
12049 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
12050 ;TEST MQ SHIFT LOGIC GATES
12051 ;AC,AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
12052 ;IS TESTED.
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12053 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
12054 ;OTHER BIT IS A ONE AFTER ROTATING
12055 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
12056
12057 005622 SN=SN+1
12058 000001 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
12059 IFE ZZ,<ZZ=400000>
12060 000000 YY=ZZ/4 ;SELECTED BIT AFTER ROTATION
12061 037023 400 06 0 00 000000 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
12062 037024 205 07 0 00 000001 MOVSI AC+1,ZZ ;SET BIT (N) OF AC+1 LEFT
12063 IFG <ZZ-2,>,<
12064 037025 205 05 0 00 000000 MOVSI AC-1,YY ;SETUP FOR COMPARISON>
12065 IFE <ZZ-2>,<
12066 MOVEI AC-1,400000 ;SETUP FOR COMPARISON>
12067 IFE <ZZ-1>,<
12068 037026 201 05 0 00 200000 MOVEI AC-1,200000 ;SETUP FOR COMPARISON>
12069 037027 245 06 0 00 777776 ROTC AC,-2 ;*ROTATE RIGHT TWO
12070 037030 312 07 0 00 000005 CAME AC+1,AC-1 ;TEST FOR BIT (N+2) A ONE
12071 037031 004 07 0 00 005622 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
12072 037032 321 10 0 00 037024 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
12073
12074 PAGE
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DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES SEQ 0256
12075 000000 ZZ=0
12076
12077 REPEAT ^D16,< ;TEST AC+1 RIGHT HALF
12078 ;TEST ROTC RIGHT TWO BIT POSITIONS
12079 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
12080 ;TEST MQ SHIFT LOGIC GATES
12081 ;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
12082 ;IS TESTED.
12083 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
12084 ;OTHER BIT IS A ONE AFTER ROTATING
12085 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
12086
12087 SN=SN+1
12088 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
12089 IFE ZZ,<ZZ=400000>
12090 YY=ZZ/4 ;SELECTED BIT AFTER ROTATION
12091 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
12092 MOVEI AC+1,ZZ ;SET BIT (N) OF AC+1 RIGHT
12093
12094 MOVEI AC-1,YY ;SETUP FOR COMPARISON
12095 ROTC AC,-2 ;*ROTATE RIGHT TWO
12096 CAME AC+1,AC-1 ;TEST FOR BIT (N+2) A ONE
12097 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
12098 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
12099 >
12100 ;TEST AC+1 RIGHT HALF
12101 ;TEST ROTC RIGHT TWO BIT POSITIONS
12102 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
12103 ;TEST MQ SHIFT LOGIC GATES
12104 ;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
12105 ;IS TESTED.
12106 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
12107 ;OTHER BIT IS A ONE AFTER ROTATING
12108 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
12109
12110 005623 SN=SN+1
12111 000000 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
12112 400000 IFE ZZ,<ZZ=400000>
12113 100000 YY=ZZ/4 ;SELECTED BIT AFTER ROTATION
12114 037033 400 06 0 00 000000 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
12115 037034 201 07 0 00 400000 MOVEI AC+1,ZZ ;SET BIT (N) OF AC+1 RIGHT
12116
12117 037035 201 05 0 00 100000 MOVEI AC-1,YY ;SETUP FOR COMPARISON
12118 037036 245 06 0 00 777776 ROTC AC,-2 ;*ROTATE RIGHT TWO
12119 037037 312 07 0 00 000005 CAME AC+1,AC-1 ;TEST FOR BIT (N+2) A ONE
12120 037040 004 07 0 00 005623 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
12121 037041 321 10 0 00 037033 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
12122
12123 ;TEST AC+1 RIGHT HALF
12124 ;TEST ROTC RIGHT TWO BIT POSITIONS
12125 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
12126 ;TEST MQ SHIFT LOGIC GATES
12127 ;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
12128 ;IS TESTED.
12129 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
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12130 ;OTHER BIT IS A ONE AFTER ROTATING
12131 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
12132
12133 005624 SN=SN+1
12134 200000 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
12135 IFE ZZ,<ZZ=400000>
12136 040000 YY=ZZ/4 ;SELECTED BIT AFTER ROTATION
12137 037042 400 06 0 00 000000 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
12138 037043 201 07 0 00 200000 MOVEI AC+1,ZZ ;SET BIT (N) OF AC+1 RIGHT
12139
12140 037044 201 05 0 00 040000 MOVEI AC-1,YY ;SETUP FOR COMPARISON
12141 037045 245 06 0 00 777776 ROTC AC,-2 ;*ROTATE RIGHT TWO
12142 037046 312 07 0 00 000005 CAME AC+1,AC-1 ;TEST FOR BIT (N+2) A ONE
12143 037047 004 07 0 00 005624 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
12144 037050 321 10 0 00 037042 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
12145
12146 ;TEST AC+1 RIGHT HALF
12147 ;TEST ROTC RIGHT TWO BIT POSITIONS
12148 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
12149 ;TEST MQ SHIFT LOGIC GATES
12150 ;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
12151 ;IS TESTED.
12152 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
12153 ;OTHER BIT IS A ONE AFTER ROTATING
12154 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
12155
12156 005625 SN=SN+1
12157 100000 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
12158 IFE ZZ,<ZZ=400000>
12159 020000 YY=ZZ/4 ;SELECTED BIT AFTER ROTATION
12160 037051 400 06 0 00 000000 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
12161 037052 201 07 0 00 100000 MOVEI AC+1,ZZ ;SET BIT (N) OF AC+1 RIGHT
12162
12163 037053 201 05 0 00 020000 MOVEI AC-1,YY ;SETUP FOR COMPARISON
12164 037054 245 06 0 00 777776 ROTC AC,-2 ;*ROTATE RIGHT TWO
12165 037055 312 07 0 00 000005 CAME AC+1,AC-1 ;TEST FOR BIT (N+2) A ONE
12166 037056 004 07 0 00 005625 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
12167 037057 321 10 0 00 037051 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
12168
12169 ;TEST AC+1 RIGHT HALF
12170 ;TEST ROTC RIGHT TWO BIT POSITIONS
12171 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
12172 ;TEST MQ SHIFT LOGIC GATES
12173 ;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
12174 ;IS TESTED.
12175 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
12176 ;OTHER BIT IS A ONE AFTER ROTATING
12177 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
12178
12179 005626 SN=SN+1
12180 040000 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
12181 IFE ZZ,<ZZ=400000>
12182 010000 YY=ZZ/4 ;SELECTED BIT AFTER ROTATION
12183 037060 400 06 0 00 000000 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
12184 037061 201 07 0 00 040000 MOVEI AC+1,ZZ ;SET BIT (N) OF AC+1 RIGHT
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12185
12186 037062 201 05 0 00 010000 MOVEI AC-1,YY ;SETUP FOR COMPARISON
12187 037063 245 06 0 00 777776 ROTC AC,-2 ;*ROTATE RIGHT TWO
12188 037064 312 07 0 00 000005 CAME AC+1,AC-1 ;TEST FOR BIT (N+2) A ONE
12189 037065 004 07 0 00 005626 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
12190 037066 321 10 0 00 037060 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
12191
12192 ;TEST AC+1 RIGHT HALF
12193 ;TEST ROTC RIGHT TWO BIT POSITIONS
12194 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
12195 ;TEST MQ SHIFT LOGIC GATES
12196 ;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
12197 ;IS TESTED.
12198 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
12199 ;OTHER BIT IS A ONE AFTER ROTATING
12200 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
12201
12202 005627 SN=SN+1
12203 020000 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
12204 IFE ZZ,<ZZ=400000>
12205 004000 YY=ZZ/4 ;SELECTED BIT AFTER ROTATION
12206 037067 400 06 0 00 000000 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
12207 037070 201 07 0 00 020000 MOVEI AC+1,ZZ ;SET BIT (N) OF AC+1 RIGHT
12208
12209 037071 201 05 0 00 004000 MOVEI AC-1,YY ;SETUP FOR COMPARISON
12210 037072 245 06 0 00 777776 ROTC AC,-2 ;*ROTATE RIGHT TWO
12211 037073 312 07 0 00 000005 CAME AC+1,AC-1 ;TEST FOR BIT (N+2) A ONE
12212 037074 004 07 0 00 005627 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
12213 037075 321 10 0 00 037067 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
12214
12215 ;TEST AC+1 RIGHT HALF
12216 ;TEST ROTC RIGHT TWO BIT POSITIONS
12217 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
12218 ;TEST MQ SHIFT LOGIC GATES
12219 ;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
12220 ;IS TESTED.
12221 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
12222 ;OTHER BIT IS A ONE AFTER ROTATING
12223 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
12224
12225 005630 SN=SN+1
12226 010000 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
12227 IFE ZZ,<ZZ=400000>
12228 002000 YY=ZZ/4 ;SELECTED BIT AFTER ROTATION
12229 037076 400 06 0 00 000000 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
12230 037077 201 07 0 00 010000 MOVEI AC+1,ZZ ;SET BIT (N) OF AC+1 RIGHT
12231
12232 037100 201 05 0 00 002000 MOVEI AC-1,YY ;SETUP FOR COMPARISON
12233 037101 245 06 0 00 777776 ROTC AC,-2 ;*ROTATE RIGHT TWO
12234 037102 312 07 0 00 000005 CAME AC+1,AC-1 ;TEST FOR BIT (N+2) A ONE
12235 037103 004 07 0 00 005630 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
12236 037104 321 10 0 00 037076 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
12237
12238 ;TEST AC+1 RIGHT HALF
12239 ;TEST ROTC RIGHT TWO BIT POSITIONS
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 26-13
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12240 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
12241 ;TEST MQ SHIFT LOGIC GATES
12242 ;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
12243 ;IS TESTED.
12244 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
12245 ;OTHER BIT IS A ONE AFTER ROTATING
12246 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
12247
12248 005631 SN=SN+1
12249 004000 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
12250 IFE ZZ,<ZZ=400000>
12251 001000 YY=ZZ/4 ;SELECTED BIT AFTER ROTATION
12252 037105 400 06 0 00 000000 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
12253 037106 201 07 0 00 004000 MOVEI AC+1,ZZ ;SET BIT (N) OF AC+1 RIGHT
12254
12255 037107 201 05 0 00 001000 MOVEI AC-1,YY ;SETUP FOR COMPARISON
12256 037110 245 06 0 00 777776 ROTC AC,-2 ;*ROTATE RIGHT TWO
12257 037111 312 07 0 00 000005 CAME AC+1,AC-1 ;TEST FOR BIT (N+2) A ONE
12258 037112 004 07 0 00 005631 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
12259 037113 321 10 0 00 037105 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
12260
12261 ;TEST AC+1 RIGHT HALF
12262 ;TEST ROTC RIGHT TWO BIT POSITIONS
12263 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
12264 ;TEST MQ SHIFT LOGIC GATES
12265 ;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
12266 ;IS TESTED.
12267 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
12268 ;OTHER BIT IS A ONE AFTER ROTATING
12269 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
12270
12271 005632 SN=SN+1
12272 002000 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
12273 IFE ZZ,<ZZ=400000>
12274 000400 YY=ZZ/4 ;SELECTED BIT AFTER ROTATION
12275 037114 400 06 0 00 000000 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
12276 037115 201 07 0 00 002000 MOVEI AC+1,ZZ ;SET BIT (N) OF AC+1 RIGHT
12277
12278 037116 201 05 0 00 000400 MOVEI AC-1,YY ;SETUP FOR COMPARISON
12279 037117 245 06 0 00 777776 ROTC AC,-2 ;*ROTATE RIGHT TWO
12280 037120 312 07 0 00 000005 CAME AC+1,AC-1 ;TEST FOR BIT (N+2) A ONE
12281 037121 004 07 0 00 005632 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
12282 037122 321 10 0 00 037114 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
12283
12284 ;TEST AC+1 RIGHT HALF
12285 ;TEST ROTC RIGHT TWO BIT POSITIONS
12286 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
12287 ;TEST MQ SHIFT LOGIC GATES
12288 ;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
12289 ;IS TESTED.
12290 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
12291 ;OTHER BIT IS A ONE AFTER ROTATING
12292 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
12293
12294 005633 SN=SN+1
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12295 001000 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
12296 IFE ZZ,<ZZ=400000>
12297 000200 YY=ZZ/4 ;SELECTED BIT AFTER ROTATION
12298 037123 400 06 0 00 000000 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
12299 037124 201 07 0 00 001000 MOVEI AC+1,ZZ ;SET BIT (N) OF AC+1 RIGHT
12300
12301 037125 201 05 0 00 000200 MOVEI AC-1,YY ;SETUP FOR COMPARISON
12302 037126 245 06 0 00 777776 ROTC AC,-2 ;*ROTATE RIGHT TWO
12303 037127 312 07 0 00 000005 CAME AC+1,AC-1 ;TEST FOR BIT (N+2) A ONE
12304 037130 004 07 0 00 005633 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
12305 037131 321 10 0 00 037123 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
12306
12307 ;TEST AC+1 RIGHT HALF
12308 ;TEST ROTC RIGHT TWO BIT POSITIONS
12309 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
12310 ;TEST MQ SHIFT LOGIC GATES
12311 ;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
12312 ;IS TESTED.
12313 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
12314 ;OTHER BIT IS A ONE AFTER ROTATING
12315 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
12316
12317 005634 SN=SN+1
12318 000400 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
12319 IFE ZZ,<ZZ=400000>
12320 000100 YY=ZZ/4 ;SELECTED BIT AFTER ROTATION
12321 037132 400 06 0 00 000000 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
12322 037133 201 07 0 00 000400 MOVEI AC+1,ZZ ;SET BIT (N) OF AC+1 RIGHT
12323
12324 037134 201 05 0 00 000100 MOVEI AC-1,YY ;SETUP FOR COMPARISON
12325 037135 245 06 0 00 777776 ROTC AC,-2 ;*ROTATE RIGHT TWO
12326 037136 312 07 0 00 000005 CAME AC+1,AC-1 ;TEST FOR BIT (N+2) A ONE
12327 037137 004 07 0 00 005634 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
12328 037140 321 10 0 00 037132 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
12329
12330 ;TEST AC+1 RIGHT HALF
12331 ;TEST ROTC RIGHT TWO BIT POSITIONS
12332 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
12333 ;TEST MQ SHIFT LOGIC GATES
12334 ;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
12335 ;IS TESTED.
12336 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
12337 ;OTHER BIT IS A ONE AFTER ROTATING
12338 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
12339
12340 005635 SN=SN+1
12341 000200 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
12342 IFE ZZ,<ZZ=400000>
12343 000040 YY=ZZ/4 ;SELECTED BIT AFTER ROTATION
12344 037141 400 06 0 00 000000 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
12345 037142 201 07 0 00 000200 MOVEI AC+1,ZZ ;SET BIT (N) OF AC+1 RIGHT
12346
12347 037143 201 05 0 00 000040 MOVEI AC-1,YY ;SETUP FOR COMPARISON
12348 037144 245 06 0 00 777776 ROTC AC,-2 ;*ROTATE RIGHT TWO
12349 037145 312 07 0 00 000005 CAME AC+1,AC-1 ;TEST FOR BIT (N+2) A ONE
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12350 037146 004 07 0 00 005635 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
12351 037147 321 10 0 00 037141 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
12352
12353 ;TEST AC+1 RIGHT HALF
12354 ;TEST ROTC RIGHT TWO BIT POSITIONS
12355 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
12356 ;TEST MQ SHIFT LOGIC GATES
12357 ;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
12358 ;IS TESTED.
12359 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
12360 ;OTHER BIT IS A ONE AFTER ROTATING
12361 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
12362
12363 005636 SN=SN+1
12364 000100 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
12365 IFE ZZ,<ZZ=400000>
12366 000020 YY=ZZ/4 ;SELECTED BIT AFTER ROTATION
12367 037150 400 06 0 00 000000 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
12368 037151 201 07 0 00 000100 MOVEI AC+1,ZZ ;SET BIT (N) OF AC+1 RIGHT
12369
12370 037152 201 05 0 00 000020 MOVEI AC-1,YY ;SETUP FOR COMPARISON
12371 037153 245 06 0 00 777776 ROTC AC,-2 ;*ROTATE RIGHT TWO
12372 037154 312 07 0 00 000005 CAME AC+1,AC-1 ;TEST FOR BIT (N+2) A ONE
12373 037155 004 07 0 00 005636 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
12374 037156 321 10 0 00 037150 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
12375
12376 ;TEST AC+1 RIGHT HALF
12377 ;TEST ROTC RIGHT TWO BIT POSITIONS
12378 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
12379 ;TEST MQ SHIFT LOGIC GATES
12380 ;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
12381 ;IS TESTED.
12382 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
12383 ;OTHER BIT IS A ONE AFTER ROTATING
12384 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
12385
12386 005637 SN=SN+1
12387 000040 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
12388 IFE ZZ,<ZZ=400000>
12389 000010 YY=ZZ/4 ;SELECTED BIT AFTER ROTATION
12390 037157 400 06 0 00 000000 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
12391 037160 201 07 0 00 000040 MOVEI AC+1,ZZ ;SET BIT (N) OF AC+1 RIGHT
12392
12393 037161 201 05 0 00 000010 MOVEI AC-1,YY ;SETUP FOR COMPARISON
12394 037162 245 06 0 00 777776 ROTC AC,-2 ;*ROTATE RIGHT TWO
12395 037163 312 07 0 00 000005 CAME AC+1,AC-1 ;TEST FOR BIT (N+2) A ONE
12396 037164 004 07 0 00 005637 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
12397 037165 321 10 0 00 037157 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
12398
12399 ;TEST AC+1 RIGHT HALF
12400 ;TEST ROTC RIGHT TWO BIT POSITIONS
12401 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
12402 ;TEST MQ SHIFT LOGIC GATES
12403 ;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
12404 ;IS TESTED.
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DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES SEQ 0262
12405 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
12406 ;OTHER BIT IS A ONE AFTER ROTATING
12407 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
12408
12409 005640 SN=SN+1
12410 000020 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
12411 IFE ZZ,<ZZ=400000>
12412 000004 YY=ZZ/4 ;SELECTED BIT AFTER ROTATION
12413 037166 400 06 0 00 000000 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
12414 037167 201 07 0 00 000020 MOVEI AC+1,ZZ ;SET BIT (N) OF AC+1 RIGHT
12415
12416 037170 201 05 0 00 000004 MOVEI AC-1,YY ;SETUP FOR COMPARISON
12417 037171 245 06 0 00 777776 ROTC AC,-2 ;*ROTATE RIGHT TWO
12418 037172 312 07 0 00 000005 CAME AC+1,AC-1 ;TEST FOR BIT (N+2) A ONE
12419 037173 004 07 0 00 005640 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
12420 037174 321 10 0 00 037166 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
12421
12422 ;TEST AC+1 RIGHT HALF
12423 ;TEST ROTC RIGHT TWO BIT POSITIONS
12424 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
12425 ;TEST MQ SHIFT LOGIC GATES
12426 ;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
12427 ;IS TESTED.
12428 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
12429 ;OTHER BIT IS A ONE AFTER ROTATING
12430 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
12431
12432 005641 SN=SN+1
12433 000010 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
12434 IFE ZZ,<ZZ=400000>
12435 000002 YY=ZZ/4 ;SELECTED BIT AFTER ROTATION
12436 037175 400 06 0 00 000000 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
12437 037176 201 07 0 00 000010 MOVEI AC+1,ZZ ;SET BIT (N) OF AC+1 RIGHT
12438
12439 037177 201 05 0 00 000002 MOVEI AC-1,YY ;SETUP FOR COMPARISON
12440 037200 245 06 0 00 777776 ROTC AC,-2 ;*ROTATE RIGHT TWO
12441 037201 312 07 0 00 000005 CAME AC+1,AC-1 ;TEST FOR BIT (N+2) A ONE
12442 037202 004 07 0 00 005641 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
12443 037203 321 10 0 00 037175 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
12444
12445 ;TEST AC+1 RIGHT HALF
12446 ;TEST ROTC RIGHT TWO BIT POSITIONS
12447 ;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
12448 ;TEST MQ SHIFT LOGIC GATES
12449 ;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
12450 ;IS TESTED.
12451 ;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
12452 ;OTHER BIT IS A ONE AFTER ROTATING
12453 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
12454
12455 005642 SN=SN+1
12456 000004 ZZ=ZZ/2 ;SELECTED BIT BEFORE ROTATION
12457 IFE ZZ,<ZZ=400000>
12458 000001 YY=ZZ/4 ;SELECTED BIT AFTER ROTATION
12459 037204 400 06 0 00 000000 SETZ AC, ;INITIALIZE AC TO ALL ZEROS
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 26-17
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES SEQ 0263
12460 037205 201 07 0 00 000004 MOVEI AC+1,ZZ ;SET BIT (N) OF AC+1 RIGHT
12461
12462 037206 201 05 0 00 000001 MOVEI AC-1,YY ;SETUP FOR COMPARISON
12463 037207 245 06 0 00 777776 ROTC AC,-2 ;*ROTATE RIGHT TWO
12464 037210 312 07 0 00 000005 CAME AC+1,AC-1 ;TEST FOR BIT (N+2) A ONE
12465 037211 004 07 0 00 005642 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
12466 037212 321 10 0 00 037204 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
12467
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 27
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES SEQ 0264
12468 005700 SN=5700
12469 000001 ZZ=1
12470
12471 E5700: REPEAT ^D18,< ;TEST AC+1 LEFT HALF
12472 ;TEST ROTC RIGHT TWO BIT POSITIONS
12473 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
12474 ;TEST MQ SHIFT LOGIC GATES
12475 ;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
12476 ;IS TESTED.
12477 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
12478 ;OTHER BIT IS A ZERO AFTER ROTATING
12479 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
12480
12481 SN=SN+1
12482
12483 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
12484 IFE<ZZ>,<ZZ=777777377777>
12485 YY=<<ZZ-3>/4>&777777 ;SELECTED BIT AFTER ROTATION
12486 SETOM AC ;INITIALIZE AC TO ALL ONES
12487 HRLOI AC+1,ZZ&777777 ;CLEAR BIT (N) OF AC+1 LEFT
12488 IFG <ZZ-777775>&777777,<
12489 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
12490 IFE <ZZ-777775>&777777,<
12491 HRROI AC-1,377777 ;SETUP FOR COMPARISON>
12492 IFE <ZZ-777776>&777777,<
12493 HRROI AC-1,577777 ;SETUP FOR COMPARISON>
12494 ROTC AC,-2 ;*ROTATE RIGHT TWO
12495 CAME AC+1,AC-1 ;TEST FOR BIT (N+2) A ZERO
12496 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
12497 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
12498 >
12499 ;TEST AC+1 LEFT HALF
12500 ;TEST ROTC RIGHT TWO BIT POSITIONS
12501 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
12502 ;TEST MQ SHIFT LOGIC GATES
12503 ;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
12504 ;IS TESTED.
12505 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
12506 ;OTHER BIT IS A ZERO AFTER ROTATING
12507 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
12508
12509 005701 SN=SN+1
12510
12511 000000 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
12512 777777 377777 IFE<ZZ>,<ZZ=777777377777>
12513 677777 YY=<<ZZ-3>/4>&777777 ;SELECTED BIT AFTER ROTATION
12514 037213 476 00 0 00 000006 SETOM AC ;INITIALIZE AC TO ALL ONES
12515 037214 525 07 0 00 377777 HRLOI AC+1,ZZ&777777 ;CLEAR BIT (N) OF AC+1 LEFT
12516 IFG <ZZ-777775>&777777,<
12517 037215 525 05 0 00 677777 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
12518 IFE <ZZ-777775>&777777,<
12519 HRROI AC-1,377777 ;SETUP FOR COMPARISON>
12520 IFE <ZZ-777776>&777777,<
12521 HRROI AC-1,577777 ;SETUP FOR COMPARISON>
12522 037216 245 06 0 00 777776 ROTC AC,-2 ;*ROTATE RIGHT TWO
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 27-1
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES SEQ 0265
12523 037217 312 07 0 00 000005 CAME AC+1,AC-1 ;TEST FOR BIT (N+2) A ZERO
12524 037220 004 07 0 00 005701 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
12525 037221 321 10 0 00 037213 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
12526
12527 ;TEST AC+1 LEFT HALF
12528 ;TEST ROTC RIGHT TWO BIT POSITIONS
12529 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
12530 ;TEST MQ SHIFT LOGIC GATES
12531 ;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
12532 ;IS TESTED.
12533 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
12534 ;OTHER BIT IS A ZERO AFTER ROTATING
12535 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
12536
12537 005702 SN=SN+1
12538
12539 777777 577777 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
12540 IFE<ZZ>,<ZZ=777777377777>
12541 737777 YY=<<ZZ-3>/4>&777777 ;SELECTED BIT AFTER ROTATION
12542 037222 476 00 0 00 000006 SETOM AC ;INITIALIZE AC TO ALL ONES
12543 037223 525 07 0 00 577777 HRLOI AC+1,ZZ&777777 ;CLEAR BIT (N) OF AC+1 LEFT
12544 IFG <ZZ-777775>&777777,<
12545 037224 525 05 0 00 737777 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
12546 IFE <ZZ-777775>&777777,<
12547 HRROI AC-1,377777 ;SETUP FOR COMPARISON>
12548 IFE <ZZ-777776>&777777,<
12549 HRROI AC-1,577777 ;SETUP FOR COMPARISON>
12550 037225 245 06 0 00 777776 ROTC AC,-2 ;*ROTATE RIGHT TWO
12551 037226 312 07 0 00 000005 CAME AC+1,AC-1 ;TEST FOR BIT (N+2) A ZERO
12552 037227 004 07 0 00 005702 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
12553 037230 321 10 0 00 037222 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
12554
12555 ;TEST AC+1 LEFT HALF
12556 ;TEST ROTC RIGHT TWO BIT POSITIONS
12557 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
12558 ;TEST MQ SHIFT LOGIC GATES
12559 ;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
12560 ;IS TESTED.
12561 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
12562 ;OTHER BIT IS A ZERO AFTER ROTATING
12563 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
12564
12565 005703 SN=SN+1
12566
12567 777777 677777 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
12568 IFE<ZZ>,<ZZ=777777377777>
12569 757777 YY=<<ZZ-3>/4>&777777 ;SELECTED BIT AFTER ROTATION
12570 037231 476 00 0 00 000006 SETOM AC ;INITIALIZE AC TO ALL ONES
12571 037232 525 07 0 00 677777 HRLOI AC+1,ZZ&777777 ;CLEAR BIT (N) OF AC+1 LEFT
12572 IFG <ZZ-777775>&777777,<
12573 037233 525 05 0 00 757777 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
12574 IFE <ZZ-777775>&777777,<
12575 HRROI AC-1,377777 ;SETUP FOR COMPARISON>
12576 IFE <ZZ-777776>&777777,<
12577 HRROI AC-1,577777 ;SETUP FOR COMPARISON>
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 27-2
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES SEQ 0266
12578 037234 245 06 0 00 777776 ROTC AC,-2 ;*ROTATE RIGHT TWO
12579 037235 312 07 0 00 000005 CAME AC+1,AC-1 ;TEST FOR BIT (N+2) A ZERO
12580 037236 004 07 0 00 005703 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
12581 037237 321 10 0 00 037231 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
12582
12583 ;TEST AC+1 LEFT HALF
12584 ;TEST ROTC RIGHT TWO BIT POSITIONS
12585 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
12586 ;TEST MQ SHIFT LOGIC GATES
12587 ;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
12588 ;IS TESTED.
12589 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
12590 ;OTHER BIT IS A ZERO AFTER ROTATING
12591 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
12592
12593 005704 SN=SN+1
12594
12595 777777 737777 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
12596 IFE<ZZ>,<ZZ=777777377777>
12597 767777 YY=<<ZZ-3>/4>&777777 ;SELECTED BIT AFTER ROTATION
12598 037240 476 00 0 00 000006 SETOM AC ;INITIALIZE AC TO ALL ONES
12599 037241 525 07 0 00 737777 HRLOI AC+1,ZZ&777777 ;CLEAR BIT (N) OF AC+1 LEFT
12600 IFG <ZZ-777775>&777777,<
12601 037242 525 05 0 00 767777 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
12602 IFE <ZZ-777775>&777777,<
12603 HRROI AC-1,377777 ;SETUP FOR COMPARISON>
12604 IFE <ZZ-777776>&777777,<
12605 HRROI AC-1,577777 ;SETUP FOR COMPARISON>
12606 037243 245 06 0 00 777776 ROTC AC,-2 ;*ROTATE RIGHT TWO
12607 037244 312 07 0 00 000005 CAME AC+1,AC-1 ;TEST FOR BIT (N+2) A ZERO
12608 037245 004 07 0 00 005704 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
12609 037246 321 10 0 00 037240 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
12610
12611 ;TEST AC+1 LEFT HALF
12612 ;TEST ROTC RIGHT TWO BIT POSITIONS
12613 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
12614 ;TEST MQ SHIFT LOGIC GATES
12615 ;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
12616 ;IS TESTED.
12617 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
12618 ;OTHER BIT IS A ZERO AFTER ROTATING
12619 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
12620
12621 005705 SN=SN+1
12622
12623 777777 757777 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
12624 IFE<ZZ>,<ZZ=777777377777>
12625 773777 YY=<<ZZ-3>/4>&777777 ;SELECTED BIT AFTER ROTATION
12626 037247 476 00 0 00 000006 SETOM AC ;INITIALIZE AC TO ALL ONES
12627 037250 525 07 0 00 757777 HRLOI AC+1,ZZ&777777 ;CLEAR BIT (N) OF AC+1 LEFT
12628 IFG <ZZ-777775>&777777,<
12629 037251 525 05 0 00 773777 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
12630 IFE <ZZ-777775>&777777,<
12631 HRROI AC-1,377777 ;SETUP FOR COMPARISON>
12632 IFE <ZZ-777776>&777777,<
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 27-3
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES SEQ 0267
12633 HRROI AC-1,577777 ;SETUP FOR COMPARISON>
12634 037252 245 06 0 00 777776 ROTC AC,-2 ;*ROTATE RIGHT TWO
12635 037253 312 07 0 00 000005 CAME AC+1,AC-1 ;TEST FOR BIT (N+2) A ZERO
12636 037254 004 07 0 00 005705 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
12637 037255 321 10 0 00 037247 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
12638
12639 ;TEST AC+1 LEFT HALF
12640 ;TEST ROTC RIGHT TWO BIT POSITIONS
12641 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
12642 ;TEST MQ SHIFT LOGIC GATES
12643 ;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
12644 ;IS TESTED.
12645 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
12646 ;OTHER BIT IS A ZERO AFTER ROTATING
12647 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
12648
12649 005706 SN=SN+1
12650
12651 777777 767777 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
12652 IFE<ZZ>,<ZZ=777777377777>
12653 775777 YY=<<ZZ-3>/4>&777777 ;SELECTED BIT AFTER ROTATION
12654 037256 476 00 0 00 000006 SETOM AC ;INITIALIZE AC TO ALL ONES
12655 037257 525 07 0 00 767777 HRLOI AC+1,ZZ&777777 ;CLEAR BIT (N) OF AC+1 LEFT
12656 IFG <ZZ-777775>&777777,<
12657 037260 525 05 0 00 775777 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
12658 IFE <ZZ-777775>&777777,<
12659 HRROI AC-1,377777 ;SETUP FOR COMPARISON>
12660 IFE <ZZ-777776>&777777,<
12661 HRROI AC-1,577777 ;SETUP FOR COMPARISON>
12662 037261 245 06 0 00 777776 ROTC AC,-2 ;*ROTATE RIGHT TWO
12663 037262 312 07 0 00 000005 CAME AC+1,AC-1 ;TEST FOR BIT (N+2) A ZERO
12664 037263 004 07 0 00 005706 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
12665 037264 321 10 0 00 037256 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
12666
12667 ;TEST AC+1 LEFT HALF
12668 ;TEST ROTC RIGHT TWO BIT POSITIONS
12669 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
12670 ;TEST MQ SHIFT LOGIC GATES
12671 ;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
12672 ;IS TESTED.
12673 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
12674 ;OTHER BIT IS A ZERO AFTER ROTATING
12675 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
12676
12677 005707 SN=SN+1
12678
12679 777777 773777 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
12680 IFE<ZZ>,<ZZ=777777377777>
12681 776777 YY=<<ZZ-3>/4>&777777 ;SELECTED BIT AFTER ROTATION
12682 037265 476 00 0 00 000006 SETOM AC ;INITIALIZE AC TO ALL ONES
12683 037266 525 07 0 00 773777 HRLOI AC+1,ZZ&777777 ;CLEAR BIT (N) OF AC+1 LEFT
12684 IFG <ZZ-777775>&777777,<
12685 037267 525 05 0 00 776777 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
12686 IFE <ZZ-777775>&777777,<
12687 HRROI AC-1,377777 ;SETUP FOR COMPARISON>
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 27-4
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES SEQ 0268
12688 IFE <ZZ-777776>&777777,<
12689 HRROI AC-1,577777 ;SETUP FOR COMPARISON>
12690 037270 245 06 0 00 777776 ROTC AC,-2 ;*ROTATE RIGHT TWO
12691 037271 312 07 0 00 000005 CAME AC+1,AC-1 ;TEST FOR BIT (N+2) A ZERO
12692 037272 004 07 0 00 005707 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
12693 037273 321 10 0 00 037265 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
12694
12695 ;TEST AC+1 LEFT HALF
12696 ;TEST ROTC RIGHT TWO BIT POSITIONS
12697 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
12698 ;TEST MQ SHIFT LOGIC GATES
12699 ;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
12700 ;IS TESTED.
12701 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
12702 ;OTHER BIT IS A ZERO AFTER ROTATING
12703 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
12704
12705 005710 SN=SN+1
12706
12707 777777 775777 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
12708 IFE<ZZ>,<ZZ=777777377777>
12709 777377 YY=<<ZZ-3>/4>&777777 ;SELECTED BIT AFTER ROTATION
12710 037274 476 00 0 00 000006 SETOM AC ;INITIALIZE AC TO ALL ONES
12711 037275 525 07 0 00 775777 HRLOI AC+1,ZZ&777777 ;CLEAR BIT (N) OF AC+1 LEFT
12712 IFG <ZZ-777775>&777777,<
12713 037276 525 05 0 00 777377 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
12714 IFE <ZZ-777775>&777777,<
12715 HRROI AC-1,377777 ;SETUP FOR COMPARISON>
12716 IFE <ZZ-777776>&777777,<
12717 HRROI AC-1,577777 ;SETUP FOR COMPARISON>
12718 037277 245 06 0 00 777776 ROTC AC,-2 ;*ROTATE RIGHT TWO
12719 037300 312 07 0 00 000005 CAME AC+1,AC-1 ;TEST FOR BIT (N+2) A ZERO
12720 037301 004 07 0 00 005710 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
12721 037302 321 10 0 00 037274 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
12722
12723 ;TEST AC+1 LEFT HALF
12724 ;TEST ROTC RIGHT TWO BIT POSITIONS
12725 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
12726 ;TEST MQ SHIFT LOGIC GATES
12727 ;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
12728 ;IS TESTED.
12729 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
12730 ;OTHER BIT IS A ZERO AFTER ROTATING
12731 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
12732
12733 005711 SN=SN+1
12734
12735 777777 776777 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
12736 IFE<ZZ>,<ZZ=777777377777>
12737 777577 YY=<<ZZ-3>/4>&777777 ;SELECTED BIT AFTER ROTATION
12738 037303 476 00 0 00 000006 SETOM AC ;INITIALIZE AC TO ALL ONES
12739 037304 525 07 0 00 776777 HRLOI AC+1,ZZ&777777 ;CLEAR BIT (N) OF AC+1 LEFT
12740 IFG <ZZ-777775>&777777,<
12741 037305 525 05 0 00 777577 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
12742 IFE <ZZ-777775>&777777,<
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 27-5
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12743 HRROI AC-1,377777 ;SETUP FOR COMPARISON>
12744 IFE <ZZ-777776>&777777,<
12745 HRROI AC-1,577777 ;SETUP FOR COMPARISON>
12746 037306 245 06 0 00 777776 ROTC AC,-2 ;*ROTATE RIGHT TWO
12747 037307 312 07 0 00 000005 CAME AC+1,AC-1 ;TEST FOR BIT (N+2) A ZERO
12748 037310 004 07 0 00 005711 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
12749 037311 321 10 0 00 037303 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
12750
12751 ;TEST AC+1 LEFT HALF
12752 ;TEST ROTC RIGHT TWO BIT POSITIONS
12753 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
12754 ;TEST MQ SHIFT LOGIC GATES
12755 ;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
12756 ;IS TESTED.
12757 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
12758 ;OTHER BIT IS A ZERO AFTER ROTATING
12759 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
12760
12761 005712 SN=SN+1
12762
12763 777777 777377 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
12764 IFE<ZZ>,<ZZ=777777377777>
12765 777677 YY=<<ZZ-3>/4>&777777 ;SELECTED BIT AFTER ROTATION
12766 037312 476 00 0 00 000006 SETOM AC ;INITIALIZE AC TO ALL ONES
12767 037313 525 07 0 00 777377 HRLOI AC+1,ZZ&777777 ;CLEAR BIT (N) OF AC+1 LEFT
12768 IFG <ZZ-777775>&777777,<
12769 037314 525 05 0 00 777677 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
12770 IFE <ZZ-777775>&777777,<
12771 HRROI AC-1,377777 ;SETUP FOR COMPARISON>
12772 IFE <ZZ-777776>&777777,<
12773 HRROI AC-1,577777 ;SETUP FOR COMPARISON>
12774 037315 245 06 0 00 777776 ROTC AC,-2 ;*ROTATE RIGHT TWO
12775 037316 312 07 0 00 000005 CAME AC+1,AC-1 ;TEST FOR BIT (N+2) A ZERO
12776 037317 004 07 0 00 005712 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
12777 037320 321 10 0 00 037312 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
12778
12779 ;TEST AC+1 LEFT HALF
12780 ;TEST ROTC RIGHT TWO BIT POSITIONS
12781 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
12782 ;TEST MQ SHIFT LOGIC GATES
12783 ;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
12784 ;IS TESTED.
12785 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
12786 ;OTHER BIT IS A ZERO AFTER ROTATING
12787 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
12788
12789 005713 SN=SN+1
12790
12791 777777 777577 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
12792 IFE<ZZ>,<ZZ=777777377777>
12793 777737 YY=<<ZZ-3>/4>&777777 ;SELECTED BIT AFTER ROTATION
12794 037321 476 00 0 00 000006 SETOM AC ;INITIALIZE AC TO ALL ONES
12795 037322 525 07 0 00 777577 HRLOI AC+1,ZZ&777777 ;CLEAR BIT (N) OF AC+1 LEFT
12796 IFG <ZZ-777775>&777777,<
12797 037323 525 05 0 00 777737 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
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12798 IFE <ZZ-777775>&777777,<
12799 HRROI AC-1,377777 ;SETUP FOR COMPARISON>
12800 IFE <ZZ-777776>&777777,<
12801 HRROI AC-1,577777 ;SETUP FOR COMPARISON>
12802 037324 245 06 0 00 777776 ROTC AC,-2 ;*ROTATE RIGHT TWO
12803 037325 312 07 0 00 000005 CAME AC+1,AC-1 ;TEST FOR BIT (N+2) A ZERO
12804 037326 004 07 0 00 005713 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
12805 037327 321 10 0 00 037321 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
12806
12807 ;TEST AC+1 LEFT HALF
12808 ;TEST ROTC RIGHT TWO BIT POSITIONS
12809 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
12810 ;TEST MQ SHIFT LOGIC GATES
12811 ;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
12812 ;IS TESTED.
12813 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
12814 ;OTHER BIT IS A ZERO AFTER ROTATING
12815 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
12816
12817 005714 SN=SN+1
12818
12819 777777 777677 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
12820 IFE<ZZ>,<ZZ=777777377777>
12821 777757 YY=<<ZZ-3>/4>&777777 ;SELECTED BIT AFTER ROTATION
12822 037330 476 00 0 00 000006 SETOM AC ;INITIALIZE AC TO ALL ONES
12823 037331 525 07 0 00 777677 HRLOI AC+1,ZZ&777777 ;CLEAR BIT (N) OF AC+1 LEFT
12824 IFG <ZZ-777775>&777777,<
12825 037332 525 05 0 00 777757 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
12826 IFE <ZZ-777775>&777777,<
12827 HRROI AC-1,377777 ;SETUP FOR COMPARISON>
12828 IFE <ZZ-777776>&777777,<
12829 HRROI AC-1,577777 ;SETUP FOR COMPARISON>
12830 037333 245 06 0 00 777776 ROTC AC,-2 ;*ROTATE RIGHT TWO
12831 037334 312 07 0 00 000005 CAME AC+1,AC-1 ;TEST FOR BIT (N+2) A ZERO
12832 037335 004 07 0 00 005714 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
12833 037336 321 10 0 00 037330 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
12834
12835 ;TEST AC+1 LEFT HALF
12836 ;TEST ROTC RIGHT TWO BIT POSITIONS
12837 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
12838 ;TEST MQ SHIFT LOGIC GATES
12839 ;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
12840 ;IS TESTED.
12841 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
12842 ;OTHER BIT IS A ZERO AFTER ROTATING
12843 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
12844
12845 005715 SN=SN+1
12846
12847 777777 777737 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
12848 IFE<ZZ>,<ZZ=777777377777>
12849 777767 YY=<<ZZ-3>/4>&777777 ;SELECTED BIT AFTER ROTATION
12850 037337 476 00 0 00 000006 SETOM AC ;INITIALIZE AC TO ALL ONES
12851 037340 525 07 0 00 777737 HRLOI AC+1,ZZ&777777 ;CLEAR BIT (N) OF AC+1 LEFT
12852 IFG <ZZ-777775>&777777,<
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12853 037341 525 05 0 00 777767 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
12854 IFE <ZZ-777775>&777777,<
12855 HRROI AC-1,377777 ;SETUP FOR COMPARISON>
12856 IFE <ZZ-777776>&777777,<
12857 HRROI AC-1,577777 ;SETUP FOR COMPARISON>
12858 037342 245 06 0 00 777776 ROTC AC,-2 ;*ROTATE RIGHT TWO
12859 037343 312 07 0 00 000005 CAME AC+1,AC-1 ;TEST FOR BIT (N+2) A ZERO
12860 037344 004 07 0 00 005715 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
12861 037345 321 10 0 00 037337 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
12862
12863 ;TEST AC+1 LEFT HALF
12864 ;TEST ROTC RIGHT TWO BIT POSITIONS
12865 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
12866 ;TEST MQ SHIFT LOGIC GATES
12867 ;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
12868 ;IS TESTED.
12869 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
12870 ;OTHER BIT IS A ZERO AFTER ROTATING
12871 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
12872
12873 005716 SN=SN+1
12874
12875 777777 777757 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
12876 IFE<ZZ>,<ZZ=777777377777>
12877 777773 YY=<<ZZ-3>/4>&777777 ;SELECTED BIT AFTER ROTATION
12878 037346 476 00 0 00 000006 SETOM AC ;INITIALIZE AC TO ALL ONES
12879 037347 525 07 0 00 777757 HRLOI AC+1,ZZ&777777 ;CLEAR BIT (N) OF AC+1 LEFT
12880 IFG <ZZ-777775>&777777,<
12881 037350 525 05 0 00 777773 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
12882 IFE <ZZ-777775>&777777,<
12883 HRROI AC-1,377777 ;SETUP FOR COMPARISON>
12884 IFE <ZZ-777776>&777777,<
12885 HRROI AC-1,577777 ;SETUP FOR COMPARISON>
12886 037351 245 06 0 00 777776 ROTC AC,-2 ;*ROTATE RIGHT TWO
12887 037352 312 07 0 00 000005 CAME AC+1,AC-1 ;TEST FOR BIT (N+2) A ZERO
12888 037353 004 07 0 00 005716 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
12889 037354 321 10 0 00 037346 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
12890
12891 ;TEST AC+1 LEFT HALF
12892 ;TEST ROTC RIGHT TWO BIT POSITIONS
12893 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
12894 ;TEST MQ SHIFT LOGIC GATES
12895 ;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
12896 ;IS TESTED.
12897 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
12898 ;OTHER BIT IS A ZERO AFTER ROTATING
12899 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
12900
12901 005717 SN=SN+1
12902
12903 777777 777767 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
12904 IFE<ZZ>,<ZZ=777777377777>
12905 777775 YY=<<ZZ-3>/4>&777777 ;SELECTED BIT AFTER ROTATION
12906 037355 476 00 0 00 000006 SETOM AC ;INITIALIZE AC TO ALL ONES
12907 037356 525 07 0 00 777767 HRLOI AC+1,ZZ&777777 ;CLEAR BIT (N) OF AC+1 LEFT
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12908 IFG <ZZ-777775>&777777,<
12909 037357 525 05 0 00 777775 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
12910 IFE <ZZ-777775>&777777,<
12911 HRROI AC-1,377777 ;SETUP FOR COMPARISON>
12912 IFE <ZZ-777776>&777777,<
12913 HRROI AC-1,577777 ;SETUP FOR COMPARISON>
12914 037360 245 06 0 00 777776 ROTC AC,-2 ;*ROTATE RIGHT TWO
12915 037361 312 07 0 00 000005 CAME AC+1,AC-1 ;TEST FOR BIT (N+2) A ZERO
12916 037362 004 07 0 00 005717 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
12917 037363 321 10 0 00 037355 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
12918
12919 ;TEST AC+1 LEFT HALF
12920 ;TEST ROTC RIGHT TWO BIT POSITIONS
12921 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
12922 ;TEST MQ SHIFT LOGIC GATES
12923 ;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
12924 ;IS TESTED.
12925 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
12926 ;OTHER BIT IS A ZERO AFTER ROTATING
12927 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
12928
12929 005720 SN=SN+1
12930
12931 777777 777773 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
12932 IFE<ZZ>,<ZZ=777777377777>
12933 777776 YY=<<ZZ-3>/4>&777777 ;SELECTED BIT AFTER ROTATION
12934 037364 476 00 0 00 000006 SETOM AC ;INITIALIZE AC TO ALL ONES
12935 037365 525 07 0 00 777773 HRLOI AC+1,ZZ&777777 ;CLEAR BIT (N) OF AC+1 LEFT
12936 IFG <ZZ-777775>&777777,<
12937 037366 525 05 0 00 777776 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
12938 IFE <ZZ-777775>&777777,<
12939 HRROI AC-1,377777 ;SETUP FOR COMPARISON>
12940 IFE <ZZ-777776>&777777,<
12941 HRROI AC-1,577777 ;SETUP FOR COMPARISON>
12942 037367 245 06 0 00 777776 ROTC AC,-2 ;*ROTATE RIGHT TWO
12943 037370 312 07 0 00 000005 CAME AC+1,AC-1 ;TEST FOR BIT (N+2) A ZERO
12944 037371 004 07 0 00 005720 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
12945 037372 321 10 0 00 037364 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
12946
12947 ;TEST AC+1 LEFT HALF
12948 ;TEST ROTC RIGHT TWO BIT POSITIONS
12949 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
12950 ;TEST MQ SHIFT LOGIC GATES
12951 ;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
12952 ;IS TESTED.
12953 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
12954 ;OTHER BIT IS A ZERO AFTER ROTATING
12955 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
12956
12957 005721 SN=SN+1
12958
12959 777777 777775 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
12960 IFE<ZZ>,<ZZ=777777377777>
12961 777777 YY=<<ZZ-3>/4>&777777 ;SELECTED BIT AFTER ROTATION
12962 037373 476 00 0 00 000006 SETOM AC ;INITIALIZE AC TO ALL ONES
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12963 037374 525 07 0 00 777775 HRLOI AC+1,ZZ&777777 ;CLEAR BIT (N) OF AC+1 LEFT
12964 IFG <ZZ-777775>&777777,<
12965 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
12966 IFE <ZZ-777775>&777777,<
12967 037375 561 05 0 00 377777 HRROI AC-1,377777 ;SETUP FOR COMPARISON>
12968 IFE <ZZ-777776>&777777,<
12969 HRROI AC-1,577777 ;SETUP FOR COMPARISON>
12970 037376 245 06 0 00 777776 ROTC AC,-2 ;*ROTATE RIGHT TWO
12971 037377 312 07 0 00 000005 CAME AC+1,AC-1 ;TEST FOR BIT (N+2) A ZERO
12972 037400 004 07 0 00 005721 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
12973 037401 321 10 0 00 037373 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
12974
12975 ;TEST AC+1 LEFT HALF
12976 ;TEST ROTC RIGHT TWO BIT POSITIONS
12977 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
12978 ;TEST MQ SHIFT LOGIC GATES
12979 ;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
12980 ;IS TESTED.
12981 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
12982 ;OTHER BIT IS A ZERO AFTER ROTATING
12983 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
12984
12985 005722 SN=SN+1
12986
12987 777777 777776 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
12988 IFE<ZZ>,<ZZ=777777377777>
12989 777777 YY=<<ZZ-3>/4>&777777 ;SELECTED BIT AFTER ROTATION
12990 037402 476 00 0 00 000006 SETOM AC ;INITIALIZE AC TO ALL ONES
12991 037403 525 07 0 00 777776 HRLOI AC+1,ZZ&777777 ;CLEAR BIT (N) OF AC+1 LEFT
12992 IFG <ZZ-777775>&777777,<
12993 037404 525 05 0 00 777777 HRLOI AC-1,YY ;SETUP FOR COMPARISON>
12994 IFE <ZZ-777775>&777777,<
12995 HRROI AC-1,377777 ;SETUP FOR COMPARISON>
12996 IFE <ZZ-777776>&777777,<
12997 037405 561 05 0 00 577777 HRROI AC-1,577777 ;SETUP FOR COMPARISON>
12998 037406 245 06 0 00 777776 ROTC AC,-2 ;*ROTATE RIGHT TWO
12999 037407 312 07 0 00 000005 CAME AC+1,AC-1 ;TEST FOR BIT (N+2) A ZERO
13000 037410 004 07 0 00 005722 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
13001 037411 321 10 0 00 037403 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
13002
13003 PAGE
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DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES SEQ 0274
13004 000001 ZZ=1
13005
13006 REPEAT ^D16,< ;TEST AC+1 RIGHT HALF
13007 ;TEST ROTC RIGHT TWO BIT POSITIONS
13008 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
13009 ;TEST MQ SHIFT LOGIC GATES
13010 ;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
13011 ;IS TESTED.
13012 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
13013 ;OTHER BIT IS A ZERO AFTER ROTATING
13014 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
13015
13016 SN=SN+1
13017 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
13018 IFE <ZZ>,<ZZ=777777377777>
13019 YY=<<ZZ-3>/4>&777777 ;SELECTED BIT AFTER ROTATION
13020 SETOM AC ;INITIALIZE AC TO ALL ONES
13021 HRROI AC+1,ZZ&777777 ;CLEAR BIT (N) OF AC+1 RIGHT
13022 HRROI AC-1,YY ;SETUP FOR COMPARISON
13023 ROTC AC,-2 ;*ROTATE RIGHT TWO
13024 CAME AC+1,AC-1 ;TEST FOR BIT (N+2) A ZERO
13025 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
13026 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
13027 >
13028 ;TEST AC+1 RIGHT HALF
13029 ;TEST ROTC RIGHT TWO BIT POSITIONS
13030 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
13031 ;TEST MQ SHIFT LOGIC GATES
13032 ;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
13033 ;IS TESTED.
13034 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
13035 ;OTHER BIT IS A ZERO AFTER ROTATING
13036 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
13037
13038 005723 SN=SN+1
13039 000000 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
13040 777777 377777 IFE <ZZ>,<ZZ=777777377777>
13041 677777 YY=<<ZZ-3>/4>&777777 ;SELECTED BIT AFTER ROTATION
13042 037412 476 00 0 00 000006 SETOM AC ;INITIALIZE AC TO ALL ONES
13043 037413 561 07 0 00 377777 HRROI AC+1,ZZ&777777 ;CLEAR BIT (N) OF AC+1 RIGHT
13044 037414 561 05 0 00 677777 HRROI AC-1,YY ;SETUP FOR COMPARISON
13045 037415 245 06 0 00 777776 ROTC AC,-2 ;*ROTATE RIGHT TWO
13046 037416 312 07 0 00 000005 CAME AC+1,AC-1 ;TEST FOR BIT (N+2) A ZERO
13047 037417 004 07 0 00 005723 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
13048 037420 321 10 0 00 037412 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
13049
13050 ;TEST AC+1 RIGHT HALF
13051 ;TEST ROTC RIGHT TWO BIT POSITIONS
13052 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
13053 ;TEST MQ SHIFT LOGIC GATES
13054 ;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
13055 ;IS TESTED.
13056 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
13057 ;OTHER BIT IS A ZERO AFTER ROTATING
13058 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
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13059
13060 005724 SN=SN+1
13061 777777 577777 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
13062 IFE <ZZ>,<ZZ=777777377777>
13063 737777 YY=<<ZZ-3>/4>&777777 ;SELECTED BIT AFTER ROTATION
13064 037421 476 00 0 00 000006 SETOM AC ;INITIALIZE AC TO ALL ONES
13065 037422 561 07 0 00 577777 HRROI AC+1,ZZ&777777 ;CLEAR BIT (N) OF AC+1 RIGHT
13066 037423 561 05 0 00 737777 HRROI AC-1,YY ;SETUP FOR COMPARISON
13067 037424 245 06 0 00 777776 ROTC AC,-2 ;*ROTATE RIGHT TWO
13068 037425 312 07 0 00 000005 CAME AC+1,AC-1 ;TEST FOR BIT (N+2) A ZERO
13069 037426 004 07 0 00 005724 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
13070 037427 321 10 0 00 037421 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
13071
13072 ;TEST AC+1 RIGHT HALF
13073 ;TEST ROTC RIGHT TWO BIT POSITIONS
13074 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
13075 ;TEST MQ SHIFT LOGIC GATES
13076 ;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
13077 ;IS TESTED.
13078 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
13079 ;OTHER BIT IS A ZERO AFTER ROTATING
13080 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
13081
13082 005725 SN=SN+1
13083 777777 677777 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
13084 IFE <ZZ>,<ZZ=777777377777>
13085 757777 YY=<<ZZ-3>/4>&777777 ;SELECTED BIT AFTER ROTATION
13086 037430 476 00 0 00 000006 SETOM AC ;INITIALIZE AC TO ALL ONES
13087 037431 561 07 0 00 677777 HRROI AC+1,ZZ&777777 ;CLEAR BIT (N) OF AC+1 RIGHT
13088 037432 561 05 0 00 757777 HRROI AC-1,YY ;SETUP FOR COMPARISON
13089 037433 245 06 0 00 777776 ROTC AC,-2 ;*ROTATE RIGHT TWO
13090 037434 312 07 0 00 000005 CAME AC+1,AC-1 ;TEST FOR BIT (N+2) A ZERO
13091 037435 004 07 0 00 005725 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
13092 037436 321 10 0 00 037430 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
13093
13094 ;TEST AC+1 RIGHT HALF
13095 ;TEST ROTC RIGHT TWO BIT POSITIONS
13096 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
13097 ;TEST MQ SHIFT LOGIC GATES
13098 ;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
13099 ;IS TESTED.
13100 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
13101 ;OTHER BIT IS A ZERO AFTER ROTATING
13102 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
13103
13104 005726 SN=SN+1
13105 777777 737777 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
13106 IFE <ZZ>,<ZZ=777777377777>
13107 767777 YY=<<ZZ-3>/4>&777777 ;SELECTED BIT AFTER ROTATION
13108 037437 476 00 0 00 000006 SETOM AC ;INITIALIZE AC TO ALL ONES
13109 037440 561 07 0 00 737777 HRROI AC+1,ZZ&777777 ;CLEAR BIT (N) OF AC+1 RIGHT
13110 037441 561 05 0 00 767777 HRROI AC-1,YY ;SETUP FOR COMPARISON
13111 037442 245 06 0 00 777776 ROTC AC,-2 ;*ROTATE RIGHT TWO
13112 037443 312 07 0 00 000005 CAME AC+1,AC-1 ;TEST FOR BIT (N+2) A ZERO
13113 037444 004 07 0 00 005726 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
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13114 037445 321 10 0 00 037437 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
13115
13116 ;TEST AC+1 RIGHT HALF
13117 ;TEST ROTC RIGHT TWO BIT POSITIONS
13118 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
13119 ;TEST MQ SHIFT LOGIC GATES
13120 ;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
13121 ;IS TESTED.
13122 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
13123 ;OTHER BIT IS A ZERO AFTER ROTATING
13124 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
13125
13126 005727 SN=SN+1
13127 777777 757777 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
13128 IFE <ZZ>,<ZZ=777777377777>
13129 773777 YY=<<ZZ-3>/4>&777777 ;SELECTED BIT AFTER ROTATION
13130 037446 476 00 0 00 000006 SETOM AC ;INITIALIZE AC TO ALL ONES
13131 037447 561 07 0 00 757777 HRROI AC+1,ZZ&777777 ;CLEAR BIT (N) OF AC+1 RIGHT
13132 037450 561 05 0 00 773777 HRROI AC-1,YY ;SETUP FOR COMPARISON
13133 037451 245 06 0 00 777776 ROTC AC,-2 ;*ROTATE RIGHT TWO
13134 037452 312 07 0 00 000005 CAME AC+1,AC-1 ;TEST FOR BIT (N+2) A ZERO
13135 037453 004 07 0 00 005727 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
13136 037454 321 10 0 00 037446 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
13137
13138 ;TEST AC+1 RIGHT HALF
13139 ;TEST ROTC RIGHT TWO BIT POSITIONS
13140 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
13141 ;TEST MQ SHIFT LOGIC GATES
13142 ;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
13143 ;IS TESTED.
13144 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
13145 ;OTHER BIT IS A ZERO AFTER ROTATING
13146 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
13147
13148 005730 SN=SN+1
13149 777777 767777 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
13150 IFE <ZZ>,<ZZ=777777377777>
13151 775777 YY=<<ZZ-3>/4>&777777 ;SELECTED BIT AFTER ROTATION
13152 037455 476 00 0 00 000006 SETOM AC ;INITIALIZE AC TO ALL ONES
13153 037456 561 07 0 00 767777 HRROI AC+1,ZZ&777777 ;CLEAR BIT (N) OF AC+1 RIGHT
13154 037457 561 05 0 00 775777 HRROI AC-1,YY ;SETUP FOR COMPARISON
13155 037460 245 06 0 00 777776 ROTC AC,-2 ;*ROTATE RIGHT TWO
13156 037461 312 07 0 00 000005 CAME AC+1,AC-1 ;TEST FOR BIT (N+2) A ZERO
13157 037462 004 07 0 00 005730 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
13158 037463 321 10 0 00 037455 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
13159
13160 ;TEST AC+1 RIGHT HALF
13161 ;TEST ROTC RIGHT TWO BIT POSITIONS
13162 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
13163 ;TEST MQ SHIFT LOGIC GATES
13164 ;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
13165 ;IS TESTED.
13166 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
13167 ;OTHER BIT IS A ZERO AFTER ROTATING
13168 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 27-13
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES SEQ 0277
13169
13170 005731 SN=SN+1
13171 777777 773777 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
13172 IFE <ZZ>,<ZZ=777777377777>
13173 776777 YY=<<ZZ-3>/4>&777777 ;SELECTED BIT AFTER ROTATION
13174 037464 476 00 0 00 000006 SETOM AC ;INITIALIZE AC TO ALL ONES
13175 037465 561 07 0 00 773777 HRROI AC+1,ZZ&777777 ;CLEAR BIT (N) OF AC+1 RIGHT
13176 037466 561 05 0 00 776777 HRROI AC-1,YY ;SETUP FOR COMPARISON
13177 037467 245 06 0 00 777776 ROTC AC,-2 ;*ROTATE RIGHT TWO
13178 037470 312 07 0 00 000005 CAME AC+1,AC-1 ;TEST FOR BIT (N+2) A ZERO
13179 037471 004 07 0 00 005731 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
13180 037472 321 10 0 00 037464 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
13181
13182 ;TEST AC+1 RIGHT HALF
13183 ;TEST ROTC RIGHT TWO BIT POSITIONS
13184 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
13185 ;TEST MQ SHIFT LOGIC GATES
13186 ;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
13187 ;IS TESTED.
13188 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
13189 ;OTHER BIT IS A ZERO AFTER ROTATING
13190 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
13191
13192 005732 SN=SN+1
13193 777777 775777 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
13194 IFE <ZZ>,<ZZ=777777377777>
13195 777377 YY=<<ZZ-3>/4>&777777 ;SELECTED BIT AFTER ROTATION
13196 037473 476 00 0 00 000006 SETOM AC ;INITIALIZE AC TO ALL ONES
13197 037474 561 07 0 00 775777 HRROI AC+1,ZZ&777777 ;CLEAR BIT (N) OF AC+1 RIGHT
13198 037475 561 05 0 00 777377 HRROI AC-1,YY ;SETUP FOR COMPARISON
13199 037476 245 06 0 00 777776 ROTC AC,-2 ;*ROTATE RIGHT TWO
13200 037477 312 07 0 00 000005 CAME AC+1,AC-1 ;TEST FOR BIT (N+2) A ZERO
13201 037500 004 07 0 00 005732 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
13202 037501 321 10 0 00 037473 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
13203
13204 ;TEST AC+1 RIGHT HALF
13205 ;TEST ROTC RIGHT TWO BIT POSITIONS
13206 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
13207 ;TEST MQ SHIFT LOGIC GATES
13208 ;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
13209 ;IS TESTED.
13210 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
13211 ;OTHER BIT IS A ZERO AFTER ROTATING
13212 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
13213
13214 005733 SN=SN+1
13215 777777 776777 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
13216 IFE <ZZ>,<ZZ=777777377777>
13217 777577 YY=<<ZZ-3>/4>&777777 ;SELECTED BIT AFTER ROTATION
13218 037502 476 00 0 00 000006 SETOM AC ;INITIALIZE AC TO ALL ONES
13219 037503 561 07 0 00 776777 HRROI AC+1,ZZ&777777 ;CLEAR BIT (N) OF AC+1 RIGHT
13220 037504 561 05 0 00 777577 HRROI AC-1,YY ;SETUP FOR COMPARISON
13221 037505 245 06 0 00 777776 ROTC AC,-2 ;*ROTATE RIGHT TWO
13222 037506 312 07 0 00 000005 CAME AC+1,AC-1 ;TEST FOR BIT (N+2) A ZERO
13223 037507 004 07 0 00 005733 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 27-14
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES SEQ 0278
13224 037510 321 10 0 00 037502 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
13225
13226 ;TEST AC+1 RIGHT HALF
13227 ;TEST ROTC RIGHT TWO BIT POSITIONS
13228 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
13229 ;TEST MQ SHIFT LOGIC GATES
13230 ;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
13231 ;IS TESTED.
13232 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
13233 ;OTHER BIT IS A ZERO AFTER ROTATING
13234 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
13235
13236 005734 SN=SN+1
13237 777777 777377 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
13238 IFE <ZZ>,<ZZ=777777377777>
13239 777677 YY=<<ZZ-3>/4>&777777 ;SELECTED BIT AFTER ROTATION
13240 037511 476 00 0 00 000006 SETOM AC ;INITIALIZE AC TO ALL ONES
13241 037512 561 07 0 00 777377 HRROI AC+1,ZZ&777777 ;CLEAR BIT (N) OF AC+1 RIGHT
13242 037513 561 05 0 00 777677 HRROI AC-1,YY ;SETUP FOR COMPARISON
13243 037514 245 06 0 00 777776 ROTC AC,-2 ;*ROTATE RIGHT TWO
13244 037515 312 07 0 00 000005 CAME AC+1,AC-1 ;TEST FOR BIT (N+2) A ZERO
13245 037516 004 07 0 00 005734 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
13246 037517 321 10 0 00 037511 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
13247
13248 ;TEST AC+1 RIGHT HALF
13249 ;TEST ROTC RIGHT TWO BIT POSITIONS
13250 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
13251 ;TEST MQ SHIFT LOGIC GATES
13252 ;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
13253 ;IS TESTED.
13254 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
13255 ;OTHER BIT IS A ZERO AFTER ROTATING
13256 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
13257
13258 005735 SN=SN+1
13259 777777 777577 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
13260 IFE <ZZ>,<ZZ=777777377777>
13261 777737 YY=<<ZZ-3>/4>&777777 ;SELECTED BIT AFTER ROTATION
13262 037520 476 00 0 00 000006 SETOM AC ;INITIALIZE AC TO ALL ONES
13263 037521 561 07 0 00 777577 HRROI AC+1,ZZ&777777 ;CLEAR BIT (N) OF AC+1 RIGHT
13264 037522 561 05 0 00 777737 HRROI AC-1,YY ;SETUP FOR COMPARISON
13265 037523 245 06 0 00 777776 ROTC AC,-2 ;*ROTATE RIGHT TWO
13266 037524 312 07 0 00 000005 CAME AC+1,AC-1 ;TEST FOR BIT (N+2) A ZERO
13267 037525 004 07 0 00 005735 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
13268 037526 321 10 0 00 037520 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
13269
13270 ;TEST AC+1 RIGHT HALF
13271 ;TEST ROTC RIGHT TWO BIT POSITIONS
13272 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
13273 ;TEST MQ SHIFT LOGIC GATES
13274 ;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
13275 ;IS TESTED.
13276 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
13277 ;OTHER BIT IS A ZERO AFTER ROTATING
13278 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 27-15
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES SEQ 0279
13279
13280 005736 SN=SN+1
13281 777777 777677 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
13282 IFE <ZZ>,<ZZ=777777377777>
13283 777757 YY=<<ZZ-3>/4>&777777 ;SELECTED BIT AFTER ROTATION
13284 037527 476 00 0 00 000006 SETOM AC ;INITIALIZE AC TO ALL ONES
13285 037530 561 07 0 00 777677 HRROI AC+1,ZZ&777777 ;CLEAR BIT (N) OF AC+1 RIGHT
13286 037531 561 05 0 00 777757 HRROI AC-1,YY ;SETUP FOR COMPARISON
13287 037532 245 06 0 00 777776 ROTC AC,-2 ;*ROTATE RIGHT TWO
13288 037533 312 07 0 00 000005 CAME AC+1,AC-1 ;TEST FOR BIT (N+2) A ZERO
13289 037534 004 07 0 00 005736 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
13290 037535 321 10 0 00 037527 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
13291
13292 ;TEST AC+1 RIGHT HALF
13293 ;TEST ROTC RIGHT TWO BIT POSITIONS
13294 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
13295 ;TEST MQ SHIFT LOGIC GATES
13296 ;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
13297 ;IS TESTED.
13298 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
13299 ;OTHER BIT IS A ZERO AFTER ROTATING
13300 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
13301
13302 005737 SN=SN+1
13303 777777 777737 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
13304 IFE <ZZ>,<ZZ=777777377777>
13305 777767 YY=<<ZZ-3>/4>&777777 ;SELECTED BIT AFTER ROTATION
13306 037536 476 00 0 00 000006 SETOM AC ;INITIALIZE AC TO ALL ONES
13307 037537 561 07 0 00 777737 HRROI AC+1,ZZ&777777 ;CLEAR BIT (N) OF AC+1 RIGHT
13308 037540 561 05 0 00 777767 HRROI AC-1,YY ;SETUP FOR COMPARISON
13309 037541 245 06 0 00 777776 ROTC AC,-2 ;*ROTATE RIGHT TWO
13310 037542 312 07 0 00 000005 CAME AC+1,AC-1 ;TEST FOR BIT (N+2) A ZERO
13311 037543 004 07 0 00 005737 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
13312 037544 321 10 0 00 037536 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
13313
13314 ;TEST AC+1 RIGHT HALF
13315 ;TEST ROTC RIGHT TWO BIT POSITIONS
13316 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
13317 ;TEST MQ SHIFT LOGIC GATES
13318 ;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
13319 ;IS TESTED.
13320 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
13321 ;OTHER BIT IS A ZERO AFTER ROTATING
13322 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
13323
13324 005740 SN=SN+1
13325 777777 777757 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
13326 IFE <ZZ>,<ZZ=777777377777>
13327 777773 YY=<<ZZ-3>/4>&777777 ;SELECTED BIT AFTER ROTATION
13328 037545 476 00 0 00 000006 SETOM AC ;INITIALIZE AC TO ALL ONES
13329 037546 561 07 0 00 777757 HRROI AC+1,ZZ&777777 ;CLEAR BIT (N) OF AC+1 RIGHT
13330 037547 561 05 0 00 777773 HRROI AC-1,YY ;SETUP FOR COMPARISON
13331 037550 245 06 0 00 777776 ROTC AC,-2 ;*ROTATE RIGHT TWO
13332 037551 312 07 0 00 000005 CAME AC+1,AC-1 ;TEST FOR BIT (N+2) A ZERO
13333 037552 004 07 0 00 005740 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 27-16
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES SEQ 0280
13334 037553 321 10 0 00 037545 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
13335
13336 ;TEST AC+1 RIGHT HALF
13337 ;TEST ROTC RIGHT TWO BIT POSITIONS
13338 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
13339 ;TEST MQ SHIFT LOGIC GATES
13340 ;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
13341 ;IS TESTED.
13342 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
13343 ;OTHER BIT IS A ZERO AFTER ROTATING
13344 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
13345
13346 005741 SN=SN+1
13347 777777 777767 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
13348 IFE <ZZ>,<ZZ=777777377777>
13349 777775 YY=<<ZZ-3>/4>&777777 ;SELECTED BIT AFTER ROTATION
13350 037554 476 00 0 00 000006 SETOM AC ;INITIALIZE AC TO ALL ONES
13351 037555 561 07 0 00 777767 HRROI AC+1,ZZ&777777 ;CLEAR BIT (N) OF AC+1 RIGHT
13352 037556 561 05 0 00 777775 HRROI AC-1,YY ;SETUP FOR COMPARISON
13353 037557 245 06 0 00 777776 ROTC AC,-2 ;*ROTATE RIGHT TWO
13354 037560 312 07 0 00 000005 CAME AC+1,AC-1 ;TEST FOR BIT (N+2) A ZERO
13355 037561 004 07 0 00 005741 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
13356 037562 321 10 0 00 037554 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
13357
13358 ;TEST AC+1 RIGHT HALF
13359 ;TEST ROTC RIGHT TWO BIT POSITIONS
13360 ;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
13361 ;TEST MQ SHIFT LOGIC GATES
13362 ;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
13363 ;IS TESTED.
13364 ;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
13365 ;OTHER BIT IS A ZERO AFTER ROTATING
13366 ;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
13367
13368 005742 SN=SN+1
13369 777777 777773 ZZ=<ZZ-1>/2 ;SELECTED BIT BEFORE ROTATION
13370 IFE <ZZ>,<ZZ=777777377777>
13371 777776 YY=<<ZZ-3>/4>&777777 ;SELECTED BIT AFTER ROTATION
13372 037563 476 00 0 00 000006 SETOM AC ;INITIALIZE AC TO ALL ONES
13373 037564 561 07 0 00 777773 HRROI AC+1,ZZ&777777 ;CLEAR BIT (N) OF AC+1 RIGHT
13374 037565 561 05 0 00 777776 HRROI AC-1,YY ;SETUP FOR COMPARISON
13375 037566 245 06 0 00 777776 ROTC AC,-2 ;*ROTATE RIGHT TWO
13376 037567 312 07 0 00 000005 CAME AC+1,AC-1 ;TEST FOR BIT (N+2) A ZERO
13377 037570 004 07 0 00 005742 ER4 AC+1,SN ;MQ GATE UNDER TEST FAILED
13378 037571 321 10 0 00 037563 JUMPL AC+2,.-6 ;LOOP ON ERROR SWITCH
13379
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 28
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - END CONNECTIONS TEST (ROT) SEQ 0281
13380 SUBTTL DIAGNOSTIC SECTION - END CONNECTIONS TEST (ROT)
13381
13382 ;END CONNECTIONS-ROT
13383 ;TEST AR END BIT INPUT GATES
13384 ;TEST LEFT-AR0,1,34,35 SHLT INP GATES
13385 ;TEST RIGHT-AR0,1,34,35 SHRT INP GATES
13386 ;AC IS ROTATED LEFT/RIGHT
13387 ;AND END BITS TESTED
13388
13389 ;SHIFT CONNECTIONS TEST
13390 ;TEST AR35 SHLT INP-ONE'S - ROT AC,1
13391 ;TEST ABILITY TO ROTATE INTO BIT 35 OF AR
13392 SR1 (60,400000,0,0,1,ROT,1)^
13393 ;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 400000,0] 1 BIT
13394 ;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 0,1]
13395 ;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
13396
13397 037572 200 06 0 00 041621 E6000: MOVE AC,[XWD 400000,0] ;INITIALIZE AC
13398 037573 200 07 0 00 041615 MOVE AC+1,[XWD 741703,607417];INITIALIZE AC+1
13399 037574 241 06 0 00 000001 ROT AC,1 ;*SHIFT/ROTATE 1 BIT POSITIONS
13400 037575 312 06 0 00 041622 CAME AC,[XWD 0,1] ;IS RESULT IN AC CORRECT?
13401 037576 003 06 0 00 006001 ER3 AC,6001 ;RESULT IN AC IS INCORRECT
13402 037577 312 07 0 00 041615 CAME AC+1,[XWD 741703,607417]
13403 037600 004 07 0 00 006001 ER4 AC+1,6001 ;C(AC+1) WAS MODIFIED INCORRECTLY
13404 037601 321 10 0 00 037572 JUMPL AC+2,E6000 ;LOOP ON ERROR SWITCH^
13405
13406 ;SHIFT CONNECTIONS TEST
13407 ;TEST AR35 SHLT INP-ZERO'S - ROT AC,1
13408 ;TEST ABILITY TO ROTATE INTO BIT 35 OF AR
13409 SR1 (61,377777,-1,-1,-2,ROT,1)^
13410 ;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 377777,-1] 1 BIT
13411 ;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD -1,-2]
13412 ;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
13413
13414 037602 200 06 0 00 041623 E6100: MOVE AC,[XWD 377777,-1] ;INITIALIZE AC
13415 037603 200 07 0 00 041615 MOVE AC+1,[XWD 741703,607417];INITIALIZE AC+1
13416 037604 241 06 0 00 000001 ROT AC,1 ;*SHIFT/ROTATE 1 BIT POSITIONS
13417 037605 312 06 0 00 041624 CAME AC,[XWD -1,-2] ;IS RESULT IN AC CORRECT?
13418 037606 003 06 0 00 006101 ER3 AC,6101 ;RESULT IN AC IS INCORRECT
13419 037607 312 07 0 00 041615 CAME AC+1,[XWD 741703,607417]
13420 037610 004 07 0 00 006101 ER4 AC+1,6101 ;C(AC+1) WAS MODIFIED INCORRECTLY
13421 037611 321 10 0 00 037602 JUMPL AC+2,E6100 ;LOOP ON ERROR SWITCH^
13422
13423 ;SHIFT CONNECTIONS TEST
13424 ;TEST AR34 SHLT INP-ONE'S - ROT AC,1
13425 ;TEST ABILITY TO ROTATE INTO BIT 34 OF AR
13426 SR1 (62,0,1,0,2,ROT,1)^
13427 ;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 0,1] 1 BIT
13428 ;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 0,2]
13429 ;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
13430
13431 037612 200 06 0 00 041622 E6200: MOVE AC,[XWD 0,1] ;INITIALIZE AC
13432 037613 200 07 0 00 041615 MOVE AC+1,[XWD 741703,607417];INITIALIZE AC+1
13433 037614 241 06 0 00 000001 ROT AC,1 ;*SHIFT/ROTATE 1 BIT POSITIONS
13434 037615 312 06 0 00 041620 CAME AC,[XWD 0,2] ;IS RESULT IN AC CORRECT?
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 28-1
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - END CONNECTIONS TEST (ROT) SEQ 0282
13435 037616 003 06 0 00 006201 ER3 AC,6201 ;RESULT IN AC IS INCORRECT
13436 037617 312 07 0 00 041615 CAME AC+1,[XWD 741703,607417]
13437 037620 004 07 0 00 006201 ER4 AC+1,6201 ;C(AC+1) WAS MODIFIED INCORRECTLY
13438 037621 321 10 0 00 037612 JUMPL AC+2,E6200 ;LOOP ON ERROR SWITCH^
13439 PAGE
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 28-2
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - END CONNECTIONS TEST (ROT) SEQ 0283
13440 ;SHIFT CONNECTIONS TEST
13441 ;TEST AR34 SHLT INP-ZERO'S - ROT AC,1
13442 ;TEST ABILITY TO ROTATE INTO BIT 34 OF AR
13443 SR1 (63,-1,-2,-1,-3,ROT,1)^
13444 ;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD -1,-2] 1 BIT
13445 ;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD -1,-3]
13446 ;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
13447
13448 037622 200 06 0 00 041624 E6300: MOVE AC,[XWD -1,-2] ;INITIALIZE AC
13449 037623 200 07 0 00 041615 MOVE AC+1,[XWD 741703,607417];INITIALIZE AC+1
13450 037624 241 06 0 00 000001 ROT AC,1 ;*SHIFT/ROTATE 1 BIT POSITIONS
13451 037625 312 06 0 00 041625 CAME AC,[XWD -1,-3] ;IS RESULT IN AC CORRECT?
13452 037626 003 06 0 00 006301 ER3 AC,6301 ;RESULT IN AC IS INCORRECT
13453 037627 312 07 0 00 041615 CAME AC+1,[XWD 741703,607417]
13454 037630 004 07 0 00 006301 ER4 AC+1,6301 ;C(AC+1) WAS MODIFIED INCORRECTLY
13455 037631 321 10 0 00 037622 JUMPL AC+2,E6300 ;LOOP ON ERROR SWITCH^
13456
13457 ;SHIFT CONNECTIONS TEST
13458 ;TEST AR1 SHLT INP-ONE'S - ROT AC,1
13459 ;TEST ABILITY TO ROTATE INTO BIT 1 OF AR
13460 SR1 (64,100000,0,200000,0,ROT,1)^
13461 ;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 100000,0] 1 BIT
13462 ;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 200000,0]
13463 ;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
13464
13465 037632 200 06 0 00 041626 E6400: MOVE AC,[XWD 100000,0] ;INITIALIZE AC
13466 037633 200 07 0 00 041615 MOVE AC+1,[XWD 741703,607417];INITIALIZE AC+1
13467 037634 241 06 0 00 000001 ROT AC,1 ;*SHIFT/ROTATE 1 BIT POSITIONS
13468 037635 312 06 0 00 041627 CAME AC,[XWD 200000,0] ;IS RESULT IN AC CORRECT?
13469 037636 003 06 0 00 006401 ER3 AC,6401 ;RESULT IN AC IS INCORRECT
13470 037637 312 07 0 00 041615 CAME AC+1,[XWD 741703,607417]
13471 037640 004 07 0 00 006401 ER4 AC+1,6401 ;C(AC+1) WAS MODIFIED INCORRECTLY
13472 037641 321 10 0 00 037632 JUMPL AC+2,E6400 ;LOOP ON ERROR SWITCH^
13473
13474 ;SHIFT CONNECTIONS TEST
13475 ;TEST AR1 SHLT INP-ZERO'S - ROT AC,1
13476 ;TEST ABILITY TO ROTATE INTO BIT 1 OF AR
13477 SR1 (65,677777,-1,577777,-1,ROT,1)^
13478 ;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 677777,-1] 1 BIT
13479 ;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 577777,-1]
13480 ;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
13481
13482 037642 200 06 0 00 041630 E6500: MOVE AC,[XWD 677777,-1] ;INITIALIZE AC
13483 037643 200 07 0 00 041615 MOVE AC+1,[XWD 741703,607417];INITIALIZE AC+1
13484 037644 241 06 0 00 000001 ROT AC,1 ;*SHIFT/ROTATE 1 BIT POSITIONS
13485 037645 312 06 0 00 041631 CAME AC,[XWD 577777,-1] ;IS RESULT IN AC CORRECT?
13486 037646 003 06 0 00 006501 ER3 AC,6501 ;RESULT IN AC IS INCORRECT
13487 037647 312 07 0 00 041615 CAME AC+1,[XWD 741703,607417]
13488 037650 004 07 0 00 006501 ER4 AC+1,6501 ;C(AC+1) WAS MODIFIED INCORRECTLY
13489 037651 321 10 0 00 037642 JUMPL AC+2,E6500 ;LOOP ON ERROR SWITCH^
13490 PAGE
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 28-3
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - END CONNECTIONS TEST (ROT) SEQ 0284
13491 ;SHIFT CONNECTIONS TEST
13492 ;TEST AR0 SHLT INP-ONE'S - ROT AC,1
13493 ;TEST ABILITY TO ROTATE INTO BIT 0 OF AR
13494 SR1 (66,200000,0,400000,0,ROT,1)^
13495 ;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 200000,0] 1 BIT
13496 ;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 400000,0]
13497 ;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
13498
13499 037652 200 06 0 00 041627 E6600: MOVE AC,[XWD 200000,0] ;INITIALIZE AC
13500 037653 200 07 0 00 041615 MOVE AC+1,[XWD 741703,607417];INITIALIZE AC+1
13501 037654 241 06 0 00 000001 ROT AC,1 ;*SHIFT/ROTATE 1 BIT POSITIONS
13502 037655 312 06 0 00 041621 CAME AC,[XWD 400000,0] ;IS RESULT IN AC CORRECT?
13503 037656 003 06 0 00 006601 ER3 AC,6601 ;RESULT IN AC IS INCORRECT
13504 037657 312 07 0 00 041615 CAME AC+1,[XWD 741703,607417]
13505 037660 004 07 0 00 006601 ER4 AC+1,6601 ;C(AC+1) WAS MODIFIED INCORRECTLY
13506 037661 321 10 0 00 037652 JUMPL AC+2,E6600 ;LOOP ON ERROR SWITCH^
13507
13508 ;SHIFT CONNECTIONS TEST
13509 ;TEST AR0 SHLT INP-ZERO'S - ROT AC,1
13510 ;TEST ABILITY TO ROTATE INTO BIT 0 OF AR
13511 SR1 (67,577777,-1,377777,-1,ROT,1)^
13512 ;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 577777,-1] 1 BIT
13513 ;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 377777,-1]
13514 ;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
13515
13516 037662 200 06 0 00 041631 E6700: MOVE AC,[XWD 577777,-1] ;INITIALIZE AC
13517 037663 200 07 0 00 041615 MOVE AC+1,[XWD 741703,607417];INITIALIZE AC+1
13518 037664 241 06 0 00 000001 ROT AC,1 ;*SHIFT/ROTATE 1 BIT POSITIONS
13519 037665 312 06 0 00 041623 CAME AC,[XWD 377777,-1] ;IS RESULT IN AC CORRECT?
13520 037666 003 06 0 00 006701 ER3 AC,6701 ;RESULT IN AC IS INCORRECT
13521 037667 312 07 0 00 041615 CAME AC+1,[XWD 741703,607417]
13522 037670 004 07 0 00 006701 ER4 AC+1,6701 ;C(AC+1) WAS MODIFIED INCORRECTLY
13523 037671 321 10 0 00 037662 JUMPL AC+2,E6700 ;LOOP ON ERROR SWITCH^
13524
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 29
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - END CONNECTIONS TEST (ROT) SEQ 0285
13525 ;SHIFT CONNECTIONS TEST
13526 ;TEST AR0 SHRT INP-ONE'S - ROT AC,-1
13527 ;TEST ABILITY TO ROTATE INTO BIT 0 OF AR
13528 SR1 (70,0,1,400000,0,ROT,-1)^
13529 ;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 0,1] -1 BIT
13530 ;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 400000,0]
13531 ;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
13532
13533 037672 200 06 0 00 041622 E7000: MOVE AC,[XWD 0,1] ;INITIALIZE AC
13534 037673 200 07 0 00 041615 MOVE AC+1,[XWD 741703,607417];INITIALIZE AC+1
13535 037674 241 06 0 00 777777 ROT AC,-1 ;*SHIFT/ROTATE -1 BIT POSITIONS
13536 037675 312 06 0 00 041621 CAME AC,[XWD 400000,0] ;IS RESULT IN AC CORRECT?
13537 037676 003 06 0 00 007001 ER3 AC,7001 ;RESULT IN AC IS INCORRECT
13538 037677 312 07 0 00 041615 CAME AC+1,[XWD 741703,607417]
13539 037700 004 07 0 00 007001 ER4 AC+1,7001 ;C(AC+1) WAS MODIFIED INCORRECTLY
13540 037701 321 10 0 00 037672 JUMPL AC+2,E7000 ;LOOP ON ERROR SWITCH^
13541
13542 ;SHIFT CONNECTIONS TEST
13543 ;TEST AR0 SHRT INP-ZERO'S - ROT AC,-1
13544 ;TEST ABILITY TO ROTATE INTO BIT 0 OF AR
13545 SR1 (71,-1,-2,377777,-1,ROT,-1)^
13546 ;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD -1,-2] -1 BIT
13547 ;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 377777,-1]
13548 ;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
13549
13550 037702 200 06 0 00 041624 E7100: MOVE AC,[XWD -1,-2] ;INITIALIZE AC
13551 037703 200 07 0 00 041615 MOVE AC+1,[XWD 741703,607417];INITIALIZE AC+1
13552 037704 241 06 0 00 777777 ROT AC,-1 ;*SHIFT/ROTATE -1 BIT POSITIONS
13553 037705 312 06 0 00 041623 CAME AC,[XWD 377777,-1] ;IS RESULT IN AC CORRECT?
13554 037706 003 06 0 00 007101 ER3 AC,7101 ;RESULT IN AC IS INCORRECT
13555 037707 312 07 0 00 041615 CAME AC+1,[XWD 741703,607417]
13556 037710 004 07 0 00 007101 ER4 AC+1,7101 ;C(AC+1) WAS MODIFIED INCORRECTLY
13557 037711 321 10 0 00 037702 JUMPL AC+2,E7100 ;LOOP ON ERROR SWITCH^
13558
13559 ;SHIFT CONNECTIONS TEST
13560 ;TEST AR1 SHRT INP-ONE'S - ROT AC,-1
13561 ;TEST ABILITY TO ROTATE INTO BIT 1 OF AR
13562 SR1 (72,400000,0,200000,0,ROT,-1)^
13563 ;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 400000,0] -1 BIT
13564 ;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 200000,0]
13565 ;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
13566
13567 037712 200 06 0 00 041621 E7200: MOVE AC,[XWD 400000,0] ;INITIALIZE AC
13568 037713 200 07 0 00 041615 MOVE AC+1,[XWD 741703,607417];INITIALIZE AC+1
13569 037714 241 06 0 00 777777 ROT AC,-1 ;*SHIFT/ROTATE -1 BIT POSITIONS
13570 037715 312 06 0 00 041627 CAME AC,[XWD 200000,0] ;IS RESULT IN AC CORRECT?
13571 037716 003 06 0 00 007201 ER3 AC,7201 ;RESULT IN AC IS INCORRECT
13572 037717 312 07 0 00 041615 CAME AC+1,[XWD 741703,607417]
13573 037720 004 07 0 00 007201 ER4 AC+1,7201 ;C(AC+1) WAS MODIFIED INCORRECTLY
13574 037721 321 10 0 00 037712 JUMPL AC+2,E7200 ;LOOP ON ERROR SWITCH^
13575
13576 ;SHIFT CONNECTIONS TEST
13577 ;TEST AR1 SHRT INP-ZERO'S - ROT AC,-1
13578 ;TEST ABILITY TO ROTATE INTO BIT 1 OF AR
13579 SR1 (73,377777,-1,577777,-1,ROT,-1)^
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 29-1
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - END CONNECTIONS TEST (ROT) SEQ 0286
13580 ;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 377777,-1] -1 BIT
13581 ;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 577777,-1]
13582 ;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
13583
13584 037722 200 06 0 00 041623 E7300: MOVE AC,[XWD 377777,-1] ;INITIALIZE AC
13585 037723 200 07 0 00 041615 MOVE AC+1,[XWD 741703,607417];INITIALIZE AC+1
13586 037724 241 06 0 00 777777 ROT AC,-1 ;*SHIFT/ROTATE -1 BIT POSITIONS
13587 037725 312 06 0 00 041631 CAME AC,[XWD 577777,-1] ;IS RESULT IN AC CORRECT?
13588 037726 003 06 0 00 007301 ER3 AC,7301 ;RESULT IN AC IS INCORRECT
13589 037727 312 07 0 00 041615 CAME AC+1,[XWD 741703,607417]
13590 037730 004 07 0 00 007301 ER4 AC+1,7301 ;C(AC+1) WAS MODIFIED INCORRECTLY
13591 037731 321 10 0 00 037722 JUMPL AC+2,E7300 ;LOOP ON ERROR SWITCH^
13592 PAGE
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 29-2
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - END CONNECTIONS TEST (ROT) SEQ 0287
13593 ;SHIFT CONNECTIONS TEST
13594 ;TEST AR34 SHRT INP-ONE'S - ROT AC,-1
13595 ;TEST ABILITY TO ROTATE INTO BIT 34 OF AR
13596 SR1 (74,0,4,0,2,ROT,-1)^
13597 ;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 0,4] -1 BIT
13598 ;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 0,2]
13599 ;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
13600
13601 037732 200 06 0 00 041617 E7400: MOVE AC,[XWD 0,4] ;INITIALIZE AC
13602 037733 200 07 0 00 041615 MOVE AC+1,[XWD 741703,607417];INITIALIZE AC+1
13603 037734 241 06 0 00 777777 ROT AC,-1 ;*SHIFT/ROTATE -1 BIT POSITIONS
13604 037735 312 06 0 00 041620 CAME AC,[XWD 0,2] ;IS RESULT IN AC CORRECT?
13605 037736 003 06 0 00 007401 ER3 AC,7401 ;RESULT IN AC IS INCORRECT
13606 037737 312 07 0 00 041615 CAME AC+1,[XWD 741703,607417]
13607 037740 004 07 0 00 007401 ER4 AC+1,7401 ;C(AC+1) WAS MODIFIED INCORRECTLY
13608 037741 321 10 0 00 037732 JUMPL AC+2,E7400 ;LOOP ON ERROR SWITCH^
13609
13610 ;SHIFT CONNECTIONS TEST
13611 ;TEST AR34 SHRT INP-ZERO'S - ROT AC,-1
13612 ;TEST ABILITY TO ROTATE INTO BIT 34 OF AR
13613 SR1 (75,-1,-5,-1,-3,ROT,-1)^
13614 ;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD -1,-5] -1 BIT
13615 ;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD -1,-3]
13616 ;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
13617
13618 037742 200 06 0 00 041632 E7500: MOVE AC,[XWD -1,-5] ;INITIALIZE AC
13619 037743 200 07 0 00 041615 MOVE AC+1,[XWD 741703,607417];INITIALIZE AC+1
13620 037744 241 06 0 00 777777 ROT AC,-1 ;*SHIFT/ROTATE -1 BIT POSITIONS
13621 037745 312 06 0 00 041625 CAME AC,[XWD -1,-3] ;IS RESULT IN AC CORRECT?
13622 037746 003 06 0 00 007501 ER3 AC,7501 ;RESULT IN AC IS INCORRECT
13623 037747 312 07 0 00 041615 CAME AC+1,[XWD 741703,607417]
13624 037750 004 07 0 00 007501 ER4 AC+1,7501 ;C(AC+1) WAS MODIFIED INCORRECTLY
13625 037751 321 10 0 00 037742 JUMPL AC+2,E7500 ;LOOP ON ERROR SWITCH^
13626
13627 ;SHIFT CONNECTIONS TEST
13628 ;TEST AR35 SHRT INP-ONE'S - ROT AC,-1
13629 ;TEST ABILITY TO ROTATE INTO BIT 35 OF AR
13630 SR1 (76,0,2,0,1,ROT,-1)^
13631 ;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 0,2] -1 BIT
13632 ;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 0,1]
13633 ;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
13634
13635 037752 200 06 0 00 041620 E7600: MOVE AC,[XWD 0,2] ;INITIALIZE AC
13636 037753 200 07 0 00 041615 MOVE AC+1,[XWD 741703,607417];INITIALIZE AC+1
13637 037754 241 06 0 00 777777 ROT AC,-1 ;*SHIFT/ROTATE -1 BIT POSITIONS
13638 037755 312 06 0 00 041622 CAME AC,[XWD 0,1] ;IS RESULT IN AC CORRECT?
13639 037756 003 06 0 00 007601 ER3 AC,7601 ;RESULT IN AC IS INCORRECT
13640 037757 312 07 0 00 041615 CAME AC+1,[XWD 741703,607417]
13641 037760 004 07 0 00 007601 ER4 AC+1,7601 ;C(AC+1) WAS MODIFIED INCORRECTLY
13642 037761 321 10 0 00 037752 JUMPL AC+2,E7600 ;LOOP ON ERROR SWITCH^
13643
13644 ;SHIFT CONNECTIONS TEST
13645 ;TEST AR35 SHRT INP-ZERO'S - ROT AC,-1
13646 ;TEST ABILITY TO ROTATE INTO BIT 35 OF AR
13647 SR1 (77,-1,-3,-1,-2,ROT,-1)^
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 29-3
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - END CONNECTIONS TEST (ROT) SEQ 0288
13648 ;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD -1,-3] -1 BIT
13649 ;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD -1,-2]
13650 ;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
13651
13652 037762 200 06 0 00 041625 E7700: MOVE AC,[XWD -1,-3] ;INITIALIZE AC
13653 037763 200 07 0 00 041615 MOVE AC+1,[XWD 741703,607417];INITIALIZE AC+1
13654 037764 241 06 0 00 777777 ROT AC,-1 ;*SHIFT/ROTATE -1 BIT POSITIONS
13655 037765 312 06 0 00 041624 CAME AC,[XWD -1,-2] ;IS RESULT IN AC CORRECT?
13656 037766 003 06 0 00 007701 ER3 AC,7701 ;RESULT IN AC IS INCORRECT
13657 037767 312 07 0 00 041615 CAME AC+1,[XWD 741703,607417]
13658 037770 004 07 0 00 007701 ER4 AC+1,7701 ;C(AC+1) WAS MODIFIED INCORRECTLY
13659 037771 321 10 0 00 037762 JUMPL AC+2,E7700 ;LOOP ON ERROR SWITCH^
13660
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 30
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - END CONNECTIONS TEST (ROT) SEQ 0289
13661 ;SHIFT CONNECTIONS TEST
13662 ;TEST AR0 SHRT INP-ONE'S - ROT AC,-2
13663 ;TEST ABILITY TO ROTATE INTO BIT 0 OF AR
13664 SR1 (100,0,2,400000,0,ROT,-2)^
13665 ;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 0,2] -2 BIT
13666 ;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 400000,0]
13667 ;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
13668
13669 037772 200 06 0 00 041620 E10000: MOVE AC,[XWD 0,2] ;INITIALIZE AC
13670 037773 200 07 0 00 041615 MOVE AC+1,[XWD 741703,607417];INITIALIZE AC+1
13671 037774 241 06 0 00 777776 ROT AC,-2 ;*SHIFT/ROTATE -2 BIT POSITIONS
13672 037775 312 06 0 00 041621 CAME AC,[XWD 400000,0] ;IS RESULT IN AC CORRECT?
13673 037776 003 06 0 00 010001 ER3 AC,10001 ;RESULT IN AC IS INCORRECT
13674 037777 312 07 0 00 041615 CAME AC+1,[XWD 741703,607417]
13675 040000 004 07 0 00 010001 ER4 AC+1,10001 ;C(AC+1) WAS MODIFIED INCORRECTLY
13676 040001 321 10 0 00 037772 JUMPL AC+2,E10000 ;LOOP ON ERROR SWITCH^
13677
13678 ;SHIFT CONNECTIONS TEST
13679 ;TEST AR0 SHRT INP-ZERO'S - ROT AC,-2
13680 ;TEST ABILITY TO ROTATE INTO BIT 0 OF AR
13681 SR1 (101,-1,-3,377777,-1,ROT,-2)^
13682 ;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD -1,-3] -2 BIT
13683 ;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 377777,-1]
13684 ;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
13685
13686 040002 200 06 0 00 041625 E10100: MOVE AC,[XWD -1,-3] ;INITIALIZE AC
13687 040003 200 07 0 00 041615 MOVE AC+1,[XWD 741703,607417];INITIALIZE AC+1
13688 040004 241 06 0 00 777776 ROT AC,-2 ;*SHIFT/ROTATE -2 BIT POSITIONS
13689 040005 312 06 0 00 041623 CAME AC,[XWD 377777,-1] ;IS RESULT IN AC CORRECT?
13690 040006 003 06 0 00 010101 ER3 AC,10101 ;RESULT IN AC IS INCORRECT
13691 040007 312 07 0 00 041615 CAME AC+1,[XWD 741703,607417]
13692 040010 004 07 0 00 010101 ER4 AC+1,10101 ;C(AC+1) WAS MODIFIED INCORRECTLY
13693 040011 321 10 0 00 040002 JUMPL AC+2,E10100 ;LOOP ON ERROR SWITCH^
13694
13695 ;SHIFT CONNECTIONS TEST
13696 ;TEST AR1 SHRT INP-ONE'S - ROT AC,-2
13697 ;TEST ABILITY TO ROTATE INTO BIT 1 OF AR
13698 SR1 (102,0,1,200000,0,ROT,-2)^
13699 ;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 0,1] -2 BIT
13700 ;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 200000,0]
13701 ;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
13702
13703 040012 200 06 0 00 041622 E10200: MOVE AC,[XWD 0,1] ;INITIALIZE AC
13704 040013 200 07 0 00 041615 MOVE AC+1,[XWD 741703,607417];INITIALIZE AC+1
13705 040014 241 06 0 00 777776 ROT AC,-2 ;*SHIFT/ROTATE -2 BIT POSITIONS
13706 040015 312 06 0 00 041627 CAME AC,[XWD 200000,0] ;IS RESULT IN AC CORRECT?
13707 040016 003 06 0 00 010201 ER3 AC,10201 ;RESULT IN AC IS INCORRECT
13708 040017 312 07 0 00 041615 CAME AC+1,[XWD 741703,607417]
13709 040020 004 07 0 00 010201 ER4 AC+1,10201 ;C(AC+1) WAS MODIFIED INCORRECTLY
13710 040021 321 10 0 00 040012 JUMPL AC+2,E10200 ;LOOP ON ERROR SWITCH^
13711
13712 ;SHIFT CONNECTIONS TEST
13713 ;TEST AR1 SHRT INP-ZERO'S - ROT AC,-2
13714 ;TEST ABILITY TO ROTATE INTO BIT 1 OF AR
13715 SR1 (103,-1,-2,577777,-1,ROT,-2)^
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 30-1
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - END CONNECTIONS TEST (ROT) SEQ 0290
13716 ;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD -1,-2] -2 BIT
13717 ;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 577777,-1]
13718 ;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
13719
13720 040022 200 06 0 00 041624 E10300: MOVE AC,[XWD -1,-2] ;INITIALIZE AC
13721 040023 200 07 0 00 041615 MOVE AC+1,[XWD 741703,607417];INITIALIZE AC+1
13722 040024 241 06 0 00 777776 ROT AC,-2 ;*SHIFT/ROTATE -2 BIT POSITIONS
13723 040025 312 06 0 00 041631 CAME AC,[XWD 577777,-1] ;IS RESULT IN AC CORRECT?
13724 040026 003 06 0 00 010301 ER3 AC,10301 ;RESULT IN AC IS INCORRECT
13725 040027 312 07 0 00 041615 CAME AC+1,[XWD 741703,607417]
13726 040030 004 07 0 00 010301 ER4 AC+1,10301 ;C(AC+1) WAS MODIFIED INCORRECTLY
13727 040031 321 10 0 00 040022 JUMPL AC+2,E10300 ;LOOP ON ERROR SWITCH^
13728 PAGE
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 30-2
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - END CONNECTIONS TEST (ROT) SEQ 0291
13729 ;SHIFT CONNECTIONS TEST
13730 ;TEST AR34 SHRT INP-ONE'S - ROT AC,-2
13731 ;TEST ABILITY TO ROTATE INTO BIT 34 OF AR
13732 SR1 (104,0,10,0,2,ROT,-2)^
13733 ;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 0,10] -2 BIT
13734 ;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 0,2]
13735 ;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
13736
13737 040032 200 06 0 00 041614 E10400: MOVE AC,[XWD 0,10] ;INITIALIZE AC
13738 040033 200 07 0 00 041615 MOVE AC+1,[XWD 741703,607417];INITIALIZE AC+1
13739 040034 241 06 0 00 777776 ROT AC,-2 ;*SHIFT/ROTATE -2 BIT POSITIONS
13740 040035 312 06 0 00 041620 CAME AC,[XWD 0,2] ;IS RESULT IN AC CORRECT?
13741 040036 003 06 0 00 010401 ER3 AC,10401 ;RESULT IN AC IS INCORRECT
13742 040037 312 07 0 00 041615 CAME AC+1,[XWD 741703,607417]
13743 040040 004 07 0 00 010401 ER4 AC+1,10401 ;C(AC+1) WAS MODIFIED INCORRECTLY
13744 040041 321 10 0 00 040032 JUMPL AC+2,E10400 ;LOOP ON ERROR SWITCH^
13745
13746 ;SHIFT CONNECTIONS TEST
13747 ;TEST AR34 SHRT INP-ZERO'S - ROT AC,-2
13748 ;TEST ABILITY TO ROTATE INTO BIT 34 OF AR
13749 SR1 (105,-1,-11,-1,-3,ROT,-2)^
13750 ;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD -1,-11] -2 BIT
13751 ;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD -1,-3]
13752 ;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
13753
13754 040042 200 06 0 00 041633 E10500: MOVE AC,[XWD -1,-11] ;INITIALIZE AC
13755 040043 200 07 0 00 041615 MOVE AC+1,[XWD 741703,607417];INITIALIZE AC+1
13756 040044 241 06 0 00 777776 ROT AC,-2 ;*SHIFT/ROTATE -2 BIT POSITIONS
13757 040045 312 06 0 00 041625 CAME AC,[XWD -1,-3] ;IS RESULT IN AC CORRECT?
13758 040046 003 06 0 00 010501 ER3 AC,10501 ;RESULT IN AC IS INCORRECT
13759 040047 312 07 0 00 041615 CAME AC+1,[XWD 741703,607417]
13760 040050 004 07 0 00 010501 ER4 AC+1,10501 ;C(AC+1) WAS MODIFIED INCORRECTLY
13761 040051 321 10 0 00 040042 JUMPL AC+2,E10500 ;LOOP ON ERROR SWITCH^
13762
13763 ;SHIFT CONNECTIONS TEST
13764 ;TEST AR35 SHRT INP-ONE'S - ROT AC,-2
13765 ;TEST ABILITY TO ROTATE INTO BIT 35 OF AR
13766 SR1 (106,0,4,0,1,ROT,-2)^
13767 ;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 0,4] -2 BIT
13768 ;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 0,1]
13769 ;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
13770
13771 040052 200 06 0 00 041617 E10600: MOVE AC,[XWD 0,4] ;INITIALIZE AC
13772 040053 200 07 0 00 041615 MOVE AC+1,[XWD 741703,607417];INITIALIZE AC+1
13773 040054 241 06 0 00 777776 ROT AC,-2 ;*SHIFT/ROTATE -2 BIT POSITIONS
13774 040055 312 06 0 00 041622 CAME AC,[XWD 0,1] ;IS RESULT IN AC CORRECT?
13775 040056 003 06 0 00 010601 ER3 AC,10601 ;RESULT IN AC IS INCORRECT
13776 040057 312 07 0 00 041615 CAME AC+1,[XWD 741703,607417]
13777 040060 004 07 0 00 010601 ER4 AC+1,10601 ;C(AC+1) WAS MODIFIED INCORRECTLY
13778 040061 321 10 0 00 040052 JUMPL AC+2,E10600 ;LOOP ON ERROR SWITCH^
13779
13780 ;SHIFT CONNECTIONS TEST
13781 ;TEST AR35 SHRT INP-ZERO'S - ROT AC,-2
13782 ;TEST ABILITY TO ROTATE INTO BIT 35 OF AR
13783 SR1 (107,-1,-5,-1,-2,ROT,-2)^
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 30-3
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - END CONNECTIONS TEST (ROT) SEQ 0292
13784 ;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD -1,-5] -2 BIT
13785 ;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD -1,-2]
13786 ;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
13787
13788 040062 200 06 0 00 041632 E10700: MOVE AC,[XWD -1,-5] ;INITIALIZE AC
13789 040063 200 07 0 00 041615 MOVE AC+1,[XWD 741703,607417];INITIALIZE AC+1
13790 040064 241 06 0 00 777776 ROT AC,-2 ;*SHIFT/ROTATE -2 BIT POSITIONS
13791 040065 312 06 0 00 041624 CAME AC,[XWD -1,-2] ;IS RESULT IN AC CORRECT?
13792 040066 003 06 0 00 010701 ER3 AC,10701 ;RESULT IN AC IS INCORRECT
13793 040067 312 07 0 00 041615 CAME AC+1,[XWD 741703,607417]
13794 040070 004 07 0 00 010701 ER4 AC+1,10701 ;C(AC+1) WAS MODIFIED INCORRECTLY
13795 040071 321 10 0 00 040062 JUMPL AC+2,E10700 ;LOOP ON ERROR SWITCH^
13796
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 31
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - END CONNECTIONS TEST (LSH) SEQ 0293
13797 SUBTTL DIAGNOSTIC SECTION - END CONNECTIONS TEST (LSH)
13798
13799 ;END CONNECTIONS-LSH
13800 ;TEST AR END BIT INPUT GATES
13801 ;TEST LEFT-AR0,1,34,35 SHLT INP GATES
13802 ;TEST RIGHT-AR0,1,34,35 SHRT INP GATES
13803 ;AC IS SHIFTED LEFT/RIGHT
13804 ;AND END BITS TESTED
13805
13806 ;SHIFT CONNECTIONS TEST
13807 ;TEST AR35 SHLT INP-ZERO'S - LSH AC,1
13808 ;TEST ABILITY TO SHIFT INTO BIT 35 OF AR
13809 SR1 (110,-1,-1,-1,-2,LSH,1)^
13810 ;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD -1,-1] 1 BIT
13811 ;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD -1,-2]
13812 ;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
13813
13814 040072 200 06 0 00 041613 E11000: MOVE AC,[XWD -1,-1] ;INITIALIZE AC
13815 040073 200 07 0 00 041615 MOVE AC+1,[XWD 741703,607417];INITIALIZE AC+1
13816 040074 242 06 0 00 000001 LSH AC,1 ;*SHIFT/ROTATE 1 BIT POSITIONS
13817 040075 312 06 0 00 041624 CAME AC,[XWD -1,-2] ;IS RESULT IN AC CORRECT?
13818 040076 003 06 0 00 011001 ER3 AC,11001 ;RESULT IN AC IS INCORRECT
13819 040077 312 07 0 00 041615 CAME AC+1,[XWD 741703,607417]
13820 040100 004 07 0 00 011001 ER4 AC+1,11001 ;C(AC+1) WAS MODIFIED INCORRECTLY
13821 040101 321 10 0 00 040072 JUMPL AC+2,E11000 ;LOOP ON ERROR SWITCH^
13822
13823 ;SHIFT CONNECTIONS TEST
13824 ;TEST AR34 SHLT INP-ONE'S - LSH AC,1
13825 ;TEST ABILITY TO SHIFT INTO BIT 34 OF AR
13826 SR1 (111,0,1,0,2,LSH,1)^
13827 ;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 0,1] 1 BIT
13828 ;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 0,2]
13829 ;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
13830
13831 040102 200 06 0 00 041622 E11100: MOVE AC,[XWD 0,1] ;INITIALIZE AC
13832 040103 200 07 0 00 041615 MOVE AC+1,[XWD 741703,607417];INITIALIZE AC+1
13833 040104 242 06 0 00 000001 LSH AC,1 ;*SHIFT/ROTATE 1 BIT POSITIONS
13834 040105 312 06 0 00 041620 CAME AC,[XWD 0,2] ;IS RESULT IN AC CORRECT?
13835 040106 003 06 0 00 011101 ER3 AC,11101 ;RESULT IN AC IS INCORRECT
13836 040107 312 07 0 00 041615 CAME AC+1,[XWD 741703,607417]
13837 040110 004 07 0 00 011101 ER4 AC+1,11101 ;C(AC+1) WAS MODIFIED INCORRECTLY
13838 040111 321 10 0 00 040102 JUMPL AC+2,E11100 ;LOOP ON ERROR SWITCH^
13839
13840 ;SHIFT CONNECTIONS TEST
13841 ;TEST AR34 SHLT INP-ZERO'S - LSH AC,1
13842 ;TEST ABILITY TO SHIFT INTO BIT 34 OF AR
13843 SR1 (112,-1,-2,-1,-4,LSH,1)^
13844 ;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD -1,-2] 1 BIT
13845 ;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD -1,-4]
13846 ;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
13847
13848 040112 200 06 0 00 041624 E11200: MOVE AC,[XWD -1,-2] ;INITIALIZE AC
13849 040113 200 07 0 00 041615 MOVE AC+1,[XWD 741703,607417];INITIALIZE AC+1
13850 040114 242 06 0 00 000001 LSH AC,1 ;*SHIFT/ROTATE 1 BIT POSITIONS
13851 040115 312 06 0 00 041634 CAME AC,[XWD -1,-4] ;IS RESULT IN AC CORRECT?
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 31-1
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - END CONNECTIONS TEST (LSH) SEQ 0294
13852 040116 003 06 0 00 011201 ER3 AC,11201 ;RESULT IN AC IS INCORRECT
13853 040117 312 07 0 00 041615 CAME AC+1,[XWD 741703,607417]
13854 040120 004 07 0 00 011201 ER4 AC+1,11201 ;C(AC+1) WAS MODIFIED INCORRECTLY
13855 040121 321 10 0 00 040112 JUMPL AC+2,E11200 ;LOOP ON ERROR SWITCH^
13856 PAGE
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 31-2
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - END CONNECTIONS TEST (LSH) SEQ 0295
13857 ;SHIFT CONNECTIONS TEST
13858 ;TEST AR1 SHLT INP-ONE'S - LSH AC,1
13859 ;TEST ABILITY TO SHIFT INTO BIT 1 OF AR
13860 SR1 (113,100000,0,200000,0,LSH,1)^
13861 ;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 100000,0] 1 BIT
13862 ;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 200000,0]
13863 ;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
13864
13865 040122 200 06 0 00 041626 E11300: MOVE AC,[XWD 100000,0] ;INITIALIZE AC
13866 040123 200 07 0 00 041615 MOVE AC+1,[XWD 741703,607417];INITIALIZE AC+1
13867 040124 242 06 0 00 000001 LSH AC,1 ;*SHIFT/ROTATE 1 BIT POSITIONS
13868 040125 312 06 0 00 041627 CAME AC,[XWD 200000,0] ;IS RESULT IN AC CORRECT?
13869 040126 003 06 0 00 011301 ER3 AC,11301 ;RESULT IN AC IS INCORRECT
13870 040127 312 07 0 00 041615 CAME AC+1,[XWD 741703,607417]
13871 040130 004 07 0 00 011301 ER4 AC+1,11301 ;C(AC+1) WAS MODIFIED INCORRECTLY
13872 040131 321 10 0 00 040122 JUMPL AC+2,E11300 ;LOOP ON ERROR SWITCH^
13873
13874 ;SHIFT CONNECTIONS TEST
13875 ;TEST AR1 SHLT INP-ZERO'S - LSH AC,1
13876 ;TEST ABILITY TO SHIFT INTO BIT 1 OF AR
13877 SR1 (114,677777,-1,577777,-2,LSH,1)^
13878 ;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 677777,-1] 1 BIT
13879 ;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 577777,-2]
13880 ;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
13881
13882 040132 200 06 0 00 041630 E11400: MOVE AC,[XWD 677777,-1] ;INITIALIZE AC
13883 040133 200 07 0 00 041615 MOVE AC+1,[XWD 741703,607417];INITIALIZE AC+1
13884 040134 242 06 0 00 000001 LSH AC,1 ;*SHIFT/ROTATE 1 BIT POSITIONS
13885 040135 312 06 0 00 041635 CAME AC,[XWD 577777,-2] ;IS RESULT IN AC CORRECT?
13886 040136 003 06 0 00 011401 ER3 AC,11401 ;RESULT IN AC IS INCORRECT
13887 040137 312 07 0 00 041615 CAME AC+1,[XWD 741703,607417]
13888 040140 004 07 0 00 011401 ER4 AC+1,11401 ;C(AC+1) WAS MODIFIED INCORRECTLY
13889 040141 321 10 0 00 040132 JUMPL AC+2,E11400 ;LOOP ON ERROR SWITCH^
13890
13891 ;SHIFT CONNECTIONS TEST
13892 ;TEST AR0 SHLT INP-ONE'S - LSH AC,1
13893 ;TEST ABILITY TO SHIFT INTO BIT 0 OF AR
13894 SR1 (115,200000,0,400000,0,LSH,1)^
13895 ;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 200000,0] 1 BIT
13896 ;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 400000,0]
13897 ;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
13898
13899 040142 200 06 0 00 041627 E11500: MOVE AC,[XWD 200000,0] ;INITIALIZE AC
13900 040143 200 07 0 00 041615 MOVE AC+1,[XWD 741703,607417];INITIALIZE AC+1
13901 040144 242 06 0 00 000001 LSH AC,1 ;*SHIFT/ROTATE 1 BIT POSITIONS
13902 040145 312 06 0 00 041621 CAME AC,[XWD 400000,0] ;IS RESULT IN AC CORRECT?
13903 040146 003 06 0 00 011501 ER3 AC,11501 ;RESULT IN AC IS INCORRECT
13904 040147 312 07 0 00 041615 CAME AC+1,[XWD 741703,607417]
13905 040150 004 07 0 00 011501 ER4 AC+1,11501 ;C(AC+1) WAS MODIFIED INCORRECTLY
13906 040151 321 10 0 00 040142 JUMPL AC+2,E11500 ;LOOP ON ERROR SWITCH^
13907
13908 ;SHIFT CONNECTIONS TEST
13909 ;TEST AR0 SHLT INP-ZERO'S - LSH AC,1
13910 ;TEST ABILITY TO SHIFT INTO BIT 0 OF AR
13911 SR1 (116,577777,-1,377777,-2,LSH,1)^
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 31-3
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - END CONNECTIONS TEST (LSH) SEQ 0296
13912 ;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 577777,-1] 1 BIT
13913 ;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 377777,-2]
13914 ;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
13915
13916 040152 200 06 0 00 041631 E11600: MOVE AC,[XWD 577777,-1] ;INITIALIZE AC
13917 040153 200 07 0 00 041615 MOVE AC+1,[XWD 741703,607417];INITIALIZE AC+1
13918 040154 242 06 0 00 000001 LSH AC,1 ;*SHIFT/ROTATE 1 BIT POSITIONS
13919 040155 312 06 0 00 041636 CAME AC,[XWD 377777,-2] ;IS RESULT IN AC CORRECT?
13920 040156 003 06 0 00 011601 ER3 AC,11601 ;RESULT IN AC IS INCORRECT
13921 040157 312 07 0 00 041615 CAME AC+1,[XWD 741703,607417]
13922 040160 004 07 0 00 011601 ER4 AC+1,11601 ;C(AC+1) WAS MODIFIED INCORRECTLY
13923 040161 321 10 0 00 040152 JUMPL AC+2,E11600 ;LOOP ON ERROR SWITCH^
13924
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 32
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - END CONNECTIONS TEST (LSH) SEQ 0297
13925 ;SHIFT CONNECTIONS TEST
13926 ;TEST AR0 SHRT INP-ZERO'S - LSH AC,-1
13927 ;TEST ABILITY TO SHIFT INTO BIT 0 OF AR
13928 SR1 (117,-1,-1,377777,-1,LSH,-1)^
13929 ;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD -1,-1] -1 BIT
13930 ;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 377777,-1]
13931 ;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
13932
13933 040162 200 06 0 00 041613 E11700: MOVE AC,[XWD -1,-1] ;INITIALIZE AC
13934 040163 200 07 0 00 041615 MOVE AC+1,[XWD 741703,607417];INITIALIZE AC+1
13935 040164 242 06 0 00 777777 LSH AC,-1 ;*SHIFT/ROTATE -1 BIT POSITIONS
13936 040165 312 06 0 00 041623 CAME AC,[XWD 377777,-1] ;IS RESULT IN AC CORRECT?
13937 040166 003 06 0 00 011701 ER3 AC,11701 ;RESULT IN AC IS INCORRECT
13938 040167 312 07 0 00 041615 CAME AC+1,[XWD 741703,607417]
13939 040170 004 07 0 00 011701 ER4 AC+1,11701 ;C(AC+1) WAS MODIFIED INCORRECTLY
13940 040171 321 10 0 00 040162 JUMPL AC+2,E11700 ;LOOP ON ERROR SWITCH^
13941
13942 ;SHIFT CONNECTIONS TEST
13943 ;TEST AR1 SHRT INP-ONE'S - LSH AC,-1
13944 ;TEST ABILITY TO SHIFT INTO BIT 1 OF AR
13945 SR1 (120,400000,0,200000,0,LSH,-1)^
13946 ;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 400000,0] -1 BIT
13947 ;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 200000,0]
13948 ;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
13949
13950 040172 200 06 0 00 041621 E12000: MOVE AC,[XWD 400000,0] ;INITIALIZE AC
13951 040173 200 07 0 00 041615 MOVE AC+1,[XWD 741703,607417];INITIALIZE AC+1
13952 040174 242 06 0 00 777777 LSH AC,-1 ;*SHIFT/ROTATE -1 BIT POSITIONS
13953 040175 312 06 0 00 041627 CAME AC,[XWD 200000,0] ;IS RESULT IN AC CORRECT?
13954 040176 003 06 0 00 012001 ER3 AC,12001 ;RESULT IN AC IS INCORRECT
13955 040177 312 07 0 00 041615 CAME AC+1,[XWD 741703,607417]
13956 040200 004 07 0 00 012001 ER4 AC+1,12001 ;C(AC+1) WAS MODIFIED INCORRECTLY
13957 040201 321 10 0 00 040172 JUMPL AC+2,E12000 ;LOOP ON ERROR SWITCH^
13958
13959 ;SHIFT CONNECTIONS TEST
13960 ;TEST AR1 SHRT INP-ZERO'S - LSH AC,-1
13961 ;TEST ABILITY TO SHIFT INTO BIT 1 OF AR
13962 SR1 (121,377777,-1,177777,-1,LSH,-1)^
13963 ;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 377777,-1] -1 BIT
13964 ;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 177777,-1]
13965 ;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
13966
13967 040202 200 06 0 00 041623 E12100: MOVE AC,[XWD 377777,-1] ;INITIALIZE AC
13968 040203 200 07 0 00 041615 MOVE AC+1,[XWD 741703,607417];INITIALIZE AC+1
13969 040204 242 06 0 00 777777 LSH AC,-1 ;*SHIFT/ROTATE -1 BIT POSITIONS
13970 040205 312 06 0 00 041637 CAME AC,[XWD 177777,-1] ;IS RESULT IN AC CORRECT?
13971 040206 003 06 0 00 012101 ER3 AC,12101 ;RESULT IN AC IS INCORRECT
13972 040207 312 07 0 00 041615 CAME AC+1,[XWD 741703,607417]
13973 040210 004 07 0 00 012101 ER4 AC+1,12101 ;C(AC+1) WAS MODIFIED INCORRECTLY
13974 040211 321 10 0 00 040202 JUMPL AC+2,E12100 ;LOOP ON ERROR SWITCH^
13975 PAGE
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 32-1
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - END CONNECTIONS TEST (LSH) SEQ 0298
13976 ;SHIFT CONNECTIONS TEST
13977 ;TEST AR34 SHRT INP-ONE'S - LSH AC,-1
13978 ;TEST ABILITY TO SHIFT INTO BIT 34 OF AR
13979 SR1 (122,0,4,0,2,LSH,-1)^
13980 ;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 0,4] -1 BIT
13981 ;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 0,2]
13982 ;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
13983
13984 040212 200 06 0 00 041617 E12200: MOVE AC,[XWD 0,4] ;INITIALIZE AC
13985 040213 200 07 0 00 041615 MOVE AC+1,[XWD 741703,607417];INITIALIZE AC+1
13986 040214 242 06 0 00 777777 LSH AC,-1 ;*SHIFT/ROTATE -1 BIT POSITIONS
13987 040215 312 06 0 00 041620 CAME AC,[XWD 0,2] ;IS RESULT IN AC CORRECT?
13988 040216 003 06 0 00 012201 ER3 AC,12201 ;RESULT IN AC IS INCORRECT
13989 040217 312 07 0 00 041615 CAME AC+1,[XWD 741703,607417]
13990 040220 004 07 0 00 012201 ER4 AC+1,12201 ;C(AC+1) WAS MODIFIED INCORRECTLY
13991 040221 321 10 0 00 040212 JUMPL AC+2,E12200 ;LOOP ON ERROR SWITCH^
13992
13993 ;SHIFT CONNECTIONS TEST
13994 ;TEST AR34 SHRT INP-ZERO'S - LSH AC,-1
13995 ;TEST ABILITY TO SHIFT INTO BIT 34 OF AR
13996 SR1 (123,-1,-5,377777,-3,LSH,-1)^
13997 ;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD -1,-5] -1 BIT
13998 ;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 377777,-3]
13999 ;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
14000
14001 040222 200 06 0 00 041632 E12300: MOVE AC,[XWD -1,-5] ;INITIALIZE AC
14002 040223 200 07 0 00 041615 MOVE AC+1,[XWD 741703,607417];INITIALIZE AC+1
14003 040224 242 06 0 00 777777 LSH AC,-1 ;*SHIFT/ROTATE -1 BIT POSITIONS
14004 040225 312 06 0 00 041640 CAME AC,[XWD 377777,-3] ;IS RESULT IN AC CORRECT?
14005 040226 003 06 0 00 012301 ER3 AC,12301 ;RESULT IN AC IS INCORRECT
14006 040227 312 07 0 00 041615 CAME AC+1,[XWD 741703,607417]
14007 040230 004 07 0 00 012301 ER4 AC+1,12301 ;C(AC+1) WAS MODIFIED INCORRECTLY
14008 040231 321 10 0 00 040222 JUMPL AC+2,E12300 ;LOOP ON ERROR SWITCH^
14009
14010 ;SHIFT CONNECTIONS TEST
14011 ;TEST AR35 SHRT INP-ONE'S - LSH AC,-1
14012 ;TEST ABILITY TO SHIFT INTO BIT 35 OF AR
14013 SR1 (124,0,2,0,1,LSH,-1)^
14014 ;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 0,2] -1 BIT
14015 ;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 0,1]
14016 ;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
14017
14018 040232 200 06 0 00 041620 E12400: MOVE AC,[XWD 0,2] ;INITIALIZE AC
14019 040233 200 07 0 00 041615 MOVE AC+1,[XWD 741703,607417];INITIALIZE AC+1
14020 040234 242 06 0 00 777777 LSH AC,-1 ;*SHIFT/ROTATE -1 BIT POSITIONS
14021 040235 312 06 0 00 041622 CAME AC,[XWD 0,1] ;IS RESULT IN AC CORRECT?
14022 040236 003 06 0 00 012401 ER3 AC,12401 ;RESULT IN AC IS INCORRECT
14023 040237 312 07 0 00 041615 CAME AC+1,[XWD 741703,607417]
14024 040240 004 07 0 00 012401 ER4 AC+1,12401 ;C(AC+1) WAS MODIFIED INCORRECTLY
14025 040241 321 10 0 00 040232 JUMPL AC+2,E12400 ;LOOP ON ERROR SWITCH^
14026
14027 ;SHIFT CONNECTIONS TEST
14028 ;TEST AR35 SHRT INP-ZERO'S - LSH AC,-1
14029 ;TEST ABILITY TO SHIFT INTO BIT 35 OF AR
14030 SR1 (125,-1,-3,377777,-2,LSH,-1)^
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 32-2
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - END CONNECTIONS TEST (LSH) SEQ 0299
14031 ;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD -1,-3] -1 BIT
14032 ;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 377777,-2]
14033 ;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
14034
14035 040242 200 06 0 00 041625 E12500: MOVE AC,[XWD -1,-3] ;INITIALIZE AC
14036 040243 200 07 0 00 041615 MOVE AC+1,[XWD 741703,607417];INITIALIZE AC+1
14037 040244 242 06 0 00 777777 LSH AC,-1 ;*SHIFT/ROTATE -1 BIT POSITIONS
14038 040245 312 06 0 00 041636 CAME AC,[XWD 377777,-2] ;IS RESULT IN AC CORRECT?
14039 040246 003 06 0 00 012501 ER3 AC,12501 ;RESULT IN AC IS INCORRECT
14040 040247 312 07 0 00 041615 CAME AC+1,[XWD 741703,607417]
14041 040250 004 07 0 00 012501 ER4 AC+1,12501 ;C(AC+1) WAS MODIFIED INCORRECTLY
14042 040251 321 10 0 00 040242 JUMPL AC+2,E12500 ;LOOP ON ERROR SWITCH^
14043
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 33
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - END CONNECTIONS TEST (LSH) SEQ 0300
14044 ;SHIFT CONNECTIONS TEST
14045 ;TEST AR0 SHRT INP-ZERO'S - LSH AC,-2
14046 ;TEST ABILITY TO SHIFT INTO BIT 0 OF AR
14047 SR1 (126,-1,-1,177777,-1,LSH,-2)^
14048 ;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD -1,-1] -2 BIT
14049 ;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 177777,-1]
14050 ;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
14051
14052 040252 200 06 0 00 041613 E12600: MOVE AC,[XWD -1,-1] ;INITIALIZE AC
14053 040253 200 07 0 00 041615 MOVE AC+1,[XWD 741703,607417];INITIALIZE AC+1
14054 040254 242 06 0 00 777776 LSH AC,-2 ;*SHIFT/ROTATE -2 BIT POSITIONS
14055 040255 312 06 0 00 041637 CAME AC,[XWD 177777,-1] ;IS RESULT IN AC CORRECT?
14056 040256 003 06 0 00 012601 ER3 AC,12601 ;RESULT IN AC IS INCORRECT
14057 040257 312 07 0 00 041615 CAME AC+1,[XWD 741703,607417]
14058 040260 004 07 0 00 012601 ER4 AC+1,12601 ;C(AC+1) WAS MODIFIED INCORRECTLY
14059 040261 321 10 0 00 040252 JUMPL AC+2,E12600 ;LOOP ON ERROR SWITCH^
14060
14061 ;SHIFT CONNECTIONS TEST
14062 ;TEST AR1 SHRT INP-ZERO'S - LSH AC,-2
14063 ;TEST ABILITY TO SHIFT INTO BIT 1 OF AR
14064 SR1 (127,-1,-1,177777,-1,LSH,-2)^
14065 ;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD -1,-1] -2 BIT
14066 ;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 177777,-1]
14067 ;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
14068
14069 040262 200 06 0 00 041613 E12700: MOVE AC,[XWD -1,-1] ;INITIALIZE AC
14070 040263 200 07 0 00 041615 MOVE AC+1,[XWD 741703,607417];INITIALIZE AC+1
14071 040264 242 06 0 00 777776 LSH AC,-2 ;*SHIFT/ROTATE -2 BIT POSITIONS
14072 040265 312 06 0 00 041637 CAME AC,[XWD 177777,-1] ;IS RESULT IN AC CORRECT?
14073 040266 003 06 0 00 012701 ER3 AC,12701 ;RESULT IN AC IS INCORRECT
14074 040267 312 07 0 00 041615 CAME AC+1,[XWD 741703,607417]
14075 040270 004 07 0 00 012701 ER4 AC+1,12701 ;C(AC+1) WAS MODIFIED INCORRECTLY
14076 040271 321 10 0 00 040262 JUMPL AC+2,E12700 ;LOOP ON ERROR SWITCH^
14077
14078 ;SHIFT CONNECTIONS TEST
14079 ;TEST AR34 SHRT INP-ONE'S - LSH AC,-2
14080 ;TEST ABILITY TO SHIFT INTO BIT 34 OF AR
14081 SR1 (130,0,10,0,2,LSH,-2)^
14082 ;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 0,10] -2 BIT
14083 ;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 0,2]
14084 ;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
14085
14086 040272 200 06 0 00 041614 E13000: MOVE AC,[XWD 0,10] ;INITIALIZE AC
14087 040273 200 07 0 00 041615 MOVE AC+1,[XWD 741703,607417];INITIALIZE AC+1
14088 040274 242 06 0 00 777776 LSH AC,-2 ;*SHIFT/ROTATE -2 BIT POSITIONS
14089 040275 312 06 0 00 041620 CAME AC,[XWD 0,2] ;IS RESULT IN AC CORRECT?
14090 040276 003 06 0 00 013001 ER3 AC,13001 ;RESULT IN AC IS INCORRECT
14091 040277 312 07 0 00 041615 CAME AC+1,[XWD 741703,607417]
14092 040300 004 07 0 00 013001 ER4 AC+1,13001 ;C(AC+1) WAS MODIFIED INCORRECTLY
14093 040301 321 10 0 00 040272 JUMPL AC+2,E13000 ;LOOP ON ERROR SWITCH^
14094 PAGE
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 33-1
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - END CONNECTIONS TEST (LSH) SEQ 0301
14095 ;SHIFT CONNECTIONS TEST
14096 ;TEST AR34 SHRT INP-ZERO'S - LSH AC,-2
14097 ;TEST ABILITY TO SHIFT INTO BIT 34 OF AR
14098 SR1 (131,-1,-11,177777,-3,LSH,-2)^
14099 ;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD -1,-11] -2 BIT
14100 ;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 177777,-3]
14101 ;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
14102
14103 040302 200 06 0 00 041633 E13100: MOVE AC,[XWD -1,-11] ;INITIALIZE AC
14104 040303 200 07 0 00 041615 MOVE AC+1,[XWD 741703,607417];INITIALIZE AC+1
14105 040304 242 06 0 00 777776 LSH AC,-2 ;*SHIFT/ROTATE -2 BIT POSITIONS
14106 040305 312 06 0 00 041641 CAME AC,[XWD 177777,-3] ;IS RESULT IN AC CORRECT?
14107 040306 003 06 0 00 013101 ER3 AC,13101 ;RESULT IN AC IS INCORRECT
14108 040307 312 07 0 00 041615 CAME AC+1,[XWD 741703,607417]
14109 040310 004 07 0 00 013101 ER4 AC+1,13101 ;C(AC+1) WAS MODIFIED INCORRECTLY
14110 040311 321 10 0 00 040302 JUMPL AC+2,E13100 ;LOOP ON ERROR SWITCH^
14111
14112 ;SHIFT CONNECTIONS TEST
14113 ;TEST AR35 SHRT INP-ONE'S - LSH AC,-2
14114 ;TEST ABILITY TO SHIFT INTO BIT 35 OF AR
14115 SR1 (132,0,4,0,1,LSH,-2)^
14116 ;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 0,4] -2 BIT
14117 ;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 0,1]
14118 ;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
14119
14120 040312 200 06 0 00 041617 E13200: MOVE AC,[XWD 0,4] ;INITIALIZE AC
14121 040313 200 07 0 00 041615 MOVE AC+1,[XWD 741703,607417];INITIALIZE AC+1
14122 040314 242 06 0 00 777776 LSH AC,-2 ;*SHIFT/ROTATE -2 BIT POSITIONS
14123 040315 312 06 0 00 041622 CAME AC,[XWD 0,1] ;IS RESULT IN AC CORRECT?
14124 040316 003 06 0 00 013201 ER3 AC,13201 ;RESULT IN AC IS INCORRECT
14125 040317 312 07 0 00 041615 CAME AC+1,[XWD 741703,607417]
14126 040320 004 07 0 00 013201 ER4 AC+1,13201 ;C(AC+1) WAS MODIFIED INCORRECTLY
14127 040321 321 10 0 00 040312 JUMPL AC+2,E13200 ;LOOP ON ERROR SWITCH^
14128
14129 ;SHIFT CONNECTIONS TEST
14130 ;TEST AR35 SHRT INP-ZERO'S - LSH AC,-2
14131 ;TEST ABILITY TO SHIFT INTO BIT 35 OF AR
14132 SR1 (133,-1,-5,177777,-2,LSH,-2)^
14133 ;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD -1,-5] -2 BIT
14134 ;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 177777,-2]
14135 ;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
14136
14137 040322 200 06 0 00 041632 E13300: MOVE AC,[XWD -1,-5] ;INITIALIZE AC
14138 040323 200 07 0 00 041615 MOVE AC+1,[XWD 741703,607417];INITIALIZE AC+1
14139 040324 242 06 0 00 777776 LSH AC,-2 ;*SHIFT/ROTATE -2 BIT POSITIONS
14140 040325 312 06 0 00 041642 CAME AC,[XWD 177777,-2] ;IS RESULT IN AC CORRECT?
14141 040326 003 06 0 00 013301 ER3 AC,13301 ;RESULT IN AC IS INCORRECT
14142 040327 312 07 0 00 041615 CAME AC+1,[XWD 741703,607417]
14143 040330 004 07 0 00 013301 ER4 AC+1,13301 ;C(AC+1) WAS MODIFIED INCORRECTLY
14144 040331 321 10 0 00 040322 JUMPL AC+2,E13300 ;LOOP ON ERROR SWITCH^
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 34
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - END CONNECTIONS TEST (ASH) SEQ 0302
14145 SUBTTL DIAGNOSTIC SECTION - END CONNECTIONS TEST (ASH)
14146
14147 ;END CONNECTIONS-ASH
14148 ;TEST AR END BIT INPUT GATES
14149 ;TEST LEFT-AR0,1,34,35 SHLT INP GATES
14150 ;TEST RIGHT-AR0,1,34,35 SHRT INP GATES
14151 ;AC IS SHIFTD LEFT/RIGHT
14152 ;AND END BITS TESTED
14153
14154 ;SHIFT CONNECTIONS TEST
14155 ;TEST AR35 SHLT INP-ZERO'S - ASH AC,1
14156 ;TEST ABILITY TO SHIFT INTO BIT 35 OF AR
14157 SR1 (134,-1,-1,-1,-2,ASH,1)^
14158 ;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD -1,-1] 1 BIT
14159 ;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD -1,-2]
14160 ;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
14161
14162 040332 200 06 0 00 041613 E13400: MOVE AC,[XWD -1,-1] ;INITIALIZE AC
14163 040333 200 07 0 00 041615 MOVE AC+1,[XWD 741703,607417];INITIALIZE AC+1
14164 040334 240 06 0 00 000001 ASH AC,1 ;*SHIFT/ROTATE 1 BIT POSITIONS
14165 040335 312 06 0 00 041624 CAME AC,[XWD -1,-2] ;IS RESULT IN AC CORRECT?
14166 040336 003 06 0 00 013401 ER3 AC,13401 ;RESULT IN AC IS INCORRECT
14167 040337 312 07 0 00 041615 CAME AC+1,[XWD 741703,607417]
14168 040340 004 07 0 00 013401 ER4 AC+1,13401 ;C(AC+1) WAS MODIFIED INCORRECTLY
14169 040341 321 10 0 00 040332 JUMPL AC+2,E13400 ;LOOP ON ERROR SWITCH^
14170
14171 ;SHIFT CONNECTIONS TEST
14172 ;TEST AR34 SHLT INP-ONE'S - ASH AC,1
14173 ;TEST ABILITY TO SHIFT INTO BIT 34 OF AR
14174 SR1 (135,0,1,0,2,ASH,1)^
14175 ;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 0,1] 1 BIT
14176 ;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 0,2]
14177 ;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
14178
14179 040342 200 06 0 00 041622 E13500: MOVE AC,[XWD 0,1] ;INITIALIZE AC
14180 040343 200 07 0 00 041615 MOVE AC+1,[XWD 741703,607417];INITIALIZE AC+1
14181 040344 240 06 0 00 000001 ASH AC,1 ;*SHIFT/ROTATE 1 BIT POSITIONS
14182 040345 312 06 0 00 041620 CAME AC,[XWD 0,2] ;IS RESULT IN AC CORRECT?
14183 040346 003 06 0 00 013501 ER3 AC,13501 ;RESULT IN AC IS INCORRECT
14184 040347 312 07 0 00 041615 CAME AC+1,[XWD 741703,607417]
14185 040350 004 07 0 00 013501 ER4 AC+1,13501 ;C(AC+1) WAS MODIFIED INCORRECTLY
14186 040351 321 10 0 00 040342 JUMPL AC+2,E13500 ;LOOP ON ERROR SWITCH^
14187
14188 ;SHIFT CONNECTIONS TEST
14189 ;TEST AR34 SHLT INP-ZERO'S - ASH AC,1
14190 ;TEST ABILITY TO SHIFT INTO BIT 34 OF AR
14191 SR1 (136,-1,-2,-1,-4,ASH,1)^
14192 ;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD -1,-2] 1 BIT
14193 ;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD -1,-4]
14194 ;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
14195
14196 040352 200 06 0 00 041624 E13600: MOVE AC,[XWD -1,-2] ;INITIALIZE AC
14197 040353 200 07 0 00 041615 MOVE AC+1,[XWD 741703,607417];INITIALIZE AC+1
14198 040354 240 06 0 00 000001 ASH AC,1 ;*SHIFT/ROTATE 1 BIT POSITIONS
14199 040355 312 06 0 00 041634 CAME AC,[XWD -1,-4] ;IS RESULT IN AC CORRECT?
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 34-1
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - END CONNECTIONS TEST (ASH) SEQ 0303
14200 040356 003 06 0 00 013601 ER3 AC,13601 ;RESULT IN AC IS INCORRECT
14201 040357 312 07 0 00 041615 CAME AC+1,[XWD 741703,607417]
14202 040360 004 07 0 00 013601 ER4 AC+1,13601 ;C(AC+1) WAS MODIFIED INCORRECTLY
14203 040361 321 10 0 00 040352 JUMPL AC+2,E13600 ;LOOP ON ERROR SWITCH^
14204 PAGE
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 34-2
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - END CONNECTIONS TEST (ASH) SEQ 0304
14205 ;SHIFT CONNECTIONS TEST
14206 ;TEST AR1 SHLT INP-ONE'S - ASH AC,1
14207 ;TEST ABILITY TO SHIFT INTO BIT 1 OF AR
14208 SR1 (137,100000,0,200000,0,ASH,1)^
14209 ;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 100000,0] 1 BIT
14210 ;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 200000,0]
14211 ;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
14212
14213 040362 200 06 0 00 041626 E13700: MOVE AC,[XWD 100000,0] ;INITIALIZE AC
14214 040363 200 07 0 00 041615 MOVE AC+1,[XWD 741703,607417];INITIALIZE AC+1
14215 040364 240 06 0 00 000001 ASH AC,1 ;*SHIFT/ROTATE 1 BIT POSITIONS
14216 040365 312 06 0 00 041627 CAME AC,[XWD 200000,0] ;IS RESULT IN AC CORRECT?
14217 040366 003 06 0 00 013701 ER3 AC,13701 ;RESULT IN AC IS INCORRECT
14218 040367 312 07 0 00 041615 CAME AC+1,[XWD 741703,607417]
14219 040370 004 07 0 00 013701 ER4 AC+1,13701 ;C(AC+1) WAS MODIFIED INCORRECTLY
14220 040371 321 10 0 00 040362 JUMPL AC+2,E13700 ;LOOP ON ERROR SWITCH^
14221
14222 ;SHIFT CONNECTIONS TEST
14223 ;TEST AR1 SHLT INP-ZERO'S - ASH AC,1
14224 ;TEST ABILITY TO SHIFT INTO BIT 1 OF AR
14225 SR1 (140,677777,-1,577777,-2,ASH,1)^
14226 ;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 677777,-1] 1 BIT
14227 ;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 577777,-2]
14228 ;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
14229
14230 040372 200 06 0 00 041630 E14000: MOVE AC,[XWD 677777,-1] ;INITIALIZE AC
14231 040373 200 07 0 00 041615 MOVE AC+1,[XWD 741703,607417];INITIALIZE AC+1
14232 040374 240 06 0 00 000001 ASH AC,1 ;*SHIFT/ROTATE 1 BIT POSITIONS
14233 040375 312 06 0 00 041635 CAME AC,[XWD 577777,-2] ;IS RESULT IN AC CORRECT?
14234 040376 003 06 0 00 014001 ER3 AC,14001 ;RESULT IN AC IS INCORRECT
14235 040377 312 07 0 00 041615 CAME AC+1,[XWD 741703,607417]
14236 040400 004 07 0 00 014001 ER4 AC+1,14001 ;C(AC+1) WAS MODIFIED INCORRECTLY
14237 040401 321 10 0 00 040372 JUMPL AC+2,E14000 ;LOOP ON ERROR SWITCH^
14238
14239 ;SHIFT CONNECTIONS TEST
14240 ;TEST AR0 SHLT INP-ONE'S - ASH AC,1
14241 ;TEST ABILITY TO SHIFT INTO BIT 0 OF AR
14242 SR1 (141,400000,0,400000,0,ASH,1)^
14243 ;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 400000,0] 1 BIT
14244 ;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 400000,0]
14245 ;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
14246
14247 040402 200 06 0 00 041621 E14100: MOVE AC,[XWD 400000,0] ;INITIALIZE AC
14248 040403 200 07 0 00 041615 MOVE AC+1,[XWD 741703,607417];INITIALIZE AC+1
14249 040404 240 06 0 00 000001 ASH AC,1 ;*SHIFT/ROTATE 1 BIT POSITIONS
14250 040405 312 06 0 00 041621 CAME AC,[XWD 400000,0] ;IS RESULT IN AC CORRECT?
14251 040406 003 06 0 00 014101 ER3 AC,14101 ;RESULT IN AC IS INCORRECT
14252 040407 312 07 0 00 041615 CAME AC+1,[XWD 741703,607417]
14253 040410 004 07 0 00 014101 ER4 AC+1,14101 ;C(AC+1) WAS MODIFIED INCORRECTLY
14254 040411 321 10 0 00 040402 JUMPL AC+2,E14100 ;LOOP ON ERROR SWITCH^
14255
14256 ;SHIFT CONNECTIONS TEST
14257 ;TEST AR0 SHLT INP-ZERO'S - ASH AC,1
14258 ;TEST ABILITY TO SHIFT INTO BIT 0 OF AR
14259 SR1 (142,377777,-1,377777,-2,ASH,1)^
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 34-3
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - END CONNECTIONS TEST (ASH) SEQ 0305
14260 ;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 377777,-1] 1 BIT
14261 ;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 377777,-2]
14262 ;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
14263
14264 040412 200 06 0 00 041623 E14200: MOVE AC,[XWD 377777,-1] ;INITIALIZE AC
14265 040413 200 07 0 00 041615 MOVE AC+1,[XWD 741703,607417];INITIALIZE AC+1
14266 040414 240 06 0 00 000001 ASH AC,1 ;*SHIFT/ROTATE 1 BIT POSITIONS
14267 040415 312 06 0 00 041636 CAME AC,[XWD 377777,-2] ;IS RESULT IN AC CORRECT?
14268 040416 003 06 0 00 014201 ER3 AC,14201 ;RESULT IN AC IS INCORRECT
14269 040417 312 07 0 00 041615 CAME AC+1,[XWD 741703,607417]
14270 040420 004 07 0 00 014201 ER4 AC+1,14201 ;C(AC+1) WAS MODIFIED INCORRECTLY
14271 040421 321 10 0 00 040412 JUMPL AC+2,E14200 ;LOOP ON ERROR SWITCH^
14272
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 35
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - END CONNECTIONS TEST (ASH) SEQ 0306
14273 ;SHIFT CONNECTIONS TEST
14274 ;TEST AR0 SHRT INP-ONE'S - ASH AC,-1
14275 ;TEST ABILITY TO SHIFT INTO BIT 0 OF AR
14276 SR1 (143,400000,0,600000,0,ASH,-1)^
14277 ;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 400000,0] -1 BIT
14278 ;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 600000,0]
14279 ;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
14280
14281 040422 200 06 0 00 041621 E14300: MOVE AC,[XWD 400000,0] ;INITIALIZE AC
14282 040423 200 07 0 00 041615 MOVE AC+1,[XWD 741703,607417];INITIALIZE AC+1
14283 040424 240 06 0 00 777777 ASH AC,-1 ;*SHIFT/ROTATE -1 BIT POSITIONS
14284 040425 312 06 0 00 041643 CAME AC,[XWD 600000,0] ;IS RESULT IN AC CORRECT?
14285 040426 003 06 0 00 014301 ER3 AC,14301 ;RESULT IN AC IS INCORRECT
14286 040427 312 07 0 00 041615 CAME AC+1,[XWD 741703,607417]
14287 040430 004 07 0 00 014301 ER4 AC+1,14301 ;C(AC+1) WAS MODIFIED INCORRECTLY
14288 040431 321 10 0 00 040422 JUMPL AC+2,E14300 ;LOOP ON ERROR SWITCH^
14289
14290 ;SHIFT CONNECTIONS TEST
14291 ;TEST AR0 SHRT INP-ZERO'S - ASH AC,-1
14292 ;TEST ABILITY TO SHIFT INTO BIT 0 OF AR
14293 SR1 (144,377777,-1,177777,-1,ASH,-1)^
14294 ;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 377777,-1] -1 BIT
14295 ;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 177777,-1]
14296 ;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
14297
14298 040432 200 06 0 00 041623 E14400: MOVE AC,[XWD 377777,-1] ;INITIALIZE AC
14299 040433 200 07 0 00 041615 MOVE AC+1,[XWD 741703,607417];INITIALIZE AC+1
14300 040434 240 06 0 00 777777 ASH AC,-1 ;*SHIFT/ROTATE -1 BIT POSITIONS
14301 040435 312 06 0 00 041637 CAME AC,[XWD 177777,-1] ;IS RESULT IN AC CORRECT?
14302 040436 003 06 0 00 014401 ER3 AC,14401 ;RESULT IN AC IS INCORRECT
14303 040437 312 07 0 00 041615 CAME AC+1,[XWD 741703,607417]
14304 040440 004 07 0 00 014401 ER4 AC+1,14401 ;C(AC+1) WAS MODIFIED INCORRECTLY
14305 040441 321 10 0 00 040432 JUMPL AC+2,E14400 ;LOOP ON ERROR SWITCH^
14306
14307 ;SHIFT CONNECTIONS TEST
14308 ;TEST AR1 SHRT INP-ONE'S - ASH AC,-1
14309 ;TEST ABILITY TO SHIFT INTO BIT 1 OF AR
14310 SR1 (145,400000,0,600000,0,ASH,-1)^
14311 ;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 400000,0] -1 BIT
14312 ;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 600000,0]
14313 ;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
14314
14315 040442 200 06 0 00 041621 E14500: MOVE AC,[XWD 400000,0] ;INITIALIZE AC
14316 040443 200 07 0 00 041615 MOVE AC+1,[XWD 741703,607417];INITIALIZE AC+1
14317 040444 240 06 0 00 777777 ASH AC,-1 ;*SHIFT/ROTATE -1 BIT POSITIONS
14318 040445 312 06 0 00 041643 CAME AC,[XWD 600000,0] ;IS RESULT IN AC CORRECT?
14319 040446 003 06 0 00 014501 ER3 AC,14501 ;RESULT IN AC IS INCORRECT
14320 040447 312 07 0 00 041615 CAME AC+1,[XWD 741703,607417]
14321 040450 004 07 0 00 014501 ER4 AC+1,14501 ;C(AC+1) WAS MODIFIED INCORRECTLY
14322 040451 321 10 0 00 040442 JUMPL AC+2,E14500 ;LOOP ON ERROR SWITCH^
14323
14324 ;SHIFT CONNECTIONS TEST
14325 ;TEST AR1 SHRT INP-ZERO'S - ASH AC,-1
14326 ;TEST ABILITY TO SHIFT INTO BIT 1 OF AR
14327 SR1 (146,377777,-1,177777,-1,ASH,-1)^
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 35-1
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - END CONNECTIONS TEST (ASH) SEQ 0307
14328 ;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 377777,-1] -1 BIT
14329 ;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 177777,-1]
14330 ;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
14331
14332 040452 200 06 0 00 041623 E14600: MOVE AC,[XWD 377777,-1] ;INITIALIZE AC
14333 040453 200 07 0 00 041615 MOVE AC+1,[XWD 741703,607417];INITIALIZE AC+1
14334 040454 240 06 0 00 777777 ASH AC,-1 ;*SHIFT/ROTATE -1 BIT POSITIONS
14335 040455 312 06 0 00 041637 CAME AC,[XWD 177777,-1] ;IS RESULT IN AC CORRECT?
14336 040456 003 06 0 00 014601 ER3 AC,14601 ;RESULT IN AC IS INCORRECT
14337 040457 312 07 0 00 041615 CAME AC+1,[XWD 741703,607417]
14338 040460 004 07 0 00 014601 ER4 AC+1,14601 ;C(AC+1) WAS MODIFIED INCORRECTLY
14339 040461 321 10 0 00 040452 JUMPL AC+2,E14600 ;LOOP ON ERROR SWITCH^
14340 PAGE
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 35-2
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - END CONNECTIONS TEST (ASH) SEQ 0308
14341 ;SHIFT CONNECTIONS TEST
14342 ;TEST AR34 SHRT INP-ONE'S - ASH AC,-1
14343 ;TEST ABILITY TO SHIFT INTO BIT 34 OF AR
14344 SR1 (147,0,4,0,2,ASH,-1)^
14345 ;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 0,4] -1 BIT
14346 ;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 0,2]
14347 ;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
14348
14349 040462 200 06 0 00 041617 E14700: MOVE AC,[XWD 0,4] ;INITIALIZE AC
14350 040463 200 07 0 00 041615 MOVE AC+1,[XWD 741703,607417];INITIALIZE AC+1
14351 040464 240 06 0 00 777777 ASH AC,-1 ;*SHIFT/ROTATE -1 BIT POSITIONS
14352 040465 312 06 0 00 041620 CAME AC,[XWD 0,2] ;IS RESULT IN AC CORRECT?
14353 040466 003 06 0 00 014701 ER3 AC,14701 ;RESULT IN AC IS INCORRECT
14354 040467 312 07 0 00 041615 CAME AC+1,[XWD 741703,607417]
14355 040470 004 07 0 00 014701 ER4 AC+1,14701 ;C(AC+1) WAS MODIFIED INCORRECTLY
14356 040471 321 10 0 00 040462 JUMPL AC+2,E14700 ;LOOP ON ERROR SWITCH^
14357
14358 ;SHIFT CONNECTIONS TEST
14359 ;TEST AR34 SHRT INP-ZERO'S - ASH AC,-1
14360 ;TEST ABILITY TO SHIFT INTO BIT 34 OF AR
14361 SR1 (150,-1,-5,-1,-3,ASH,-1)^
14362 ;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD -1,-5] -1 BIT
14363 ;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD -1,-3]
14364 ;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
14365
14366 040472 200 06 0 00 041632 E15000: MOVE AC,[XWD -1,-5] ;INITIALIZE AC
14367 040473 200 07 0 00 041615 MOVE AC+1,[XWD 741703,607417];INITIALIZE AC+1
14368 040474 240 06 0 00 777777 ASH AC,-1 ;*SHIFT/ROTATE -1 BIT POSITIONS
14369 040475 312 06 0 00 041625 CAME AC,[XWD -1,-3] ;IS RESULT IN AC CORRECT?
14370 040476 003 06 0 00 015001 ER3 AC,15001 ;RESULT IN AC IS INCORRECT
14371 040477 312 07 0 00 041615 CAME AC+1,[XWD 741703,607417]
14372 040500 004 07 0 00 015001 ER4 AC+1,15001 ;C(AC+1) WAS MODIFIED INCORRECTLY
14373 040501 321 10 0 00 040472 JUMPL AC+2,E15000 ;LOOP ON ERROR SWITCH^
14374
14375 ;SHIFT CONNECTIONS TEST
14376 ;TEST AR35 SHRT INP-ONE'S - ASH AC,-1
14377 ;TEST ABILITY TO SHIFT INTO BIT 35 OF AR
14378 SR1 (151,0,2,0,1,ASH,-1)^
14379 ;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 0,2] -1 BIT
14380 ;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 0,1]
14381 ;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
14382
14383 040502 200 06 0 00 041620 E15100: MOVE AC,[XWD 0,2] ;INITIALIZE AC
14384 040503 200 07 0 00 041615 MOVE AC+1,[XWD 741703,607417];INITIALIZE AC+1
14385 040504 240 06 0 00 777777 ASH AC,-1 ;*SHIFT/ROTATE -1 BIT POSITIONS
14386 040505 312 06 0 00 041622 CAME AC,[XWD 0,1] ;IS RESULT IN AC CORRECT?
14387 040506 003 06 0 00 015101 ER3 AC,15101 ;RESULT IN AC IS INCORRECT
14388 040507 312 07 0 00 041615 CAME AC+1,[XWD 741703,607417]
14389 040510 004 07 0 00 015101 ER4 AC+1,15101 ;C(AC+1) WAS MODIFIED INCORRECTLY
14390 040511 321 10 0 00 040502 JUMPL AC+2,E15100 ;LOOP ON ERROR SWITCH^
14391
14392 ;SHIFT CONNECTIONS TEST
14393 ;TEST AR35 SHRT INP-ZERO'S - ASH AC,-1
14394 ;TEST ABILITY TO SHIFT INTO BIT 35 OF AR
14395 SR1 (152,-1,-3,-1,-2,ASH,-1)^
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 35-3
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - END CONNECTIONS TEST (ASH) SEQ 0309
14396 ;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD -1,-3] -1 BIT
14397 ;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD -1,-2]
14398 ;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
14399
14400 040512 200 06 0 00 041625 E15200: MOVE AC,[XWD -1,-3] ;INITIALIZE AC
14401 040513 200 07 0 00 041615 MOVE AC+1,[XWD 741703,607417];INITIALIZE AC+1
14402 040514 240 06 0 00 777777 ASH AC,-1 ;*SHIFT/ROTATE -1 BIT POSITIONS
14403 040515 312 06 0 00 041624 CAME AC,[XWD -1,-2] ;IS RESULT IN AC CORRECT?
14404 040516 003 06 0 00 015201 ER3 AC,15201 ;RESULT IN AC IS INCORRECT
14405 040517 312 07 0 00 041615 CAME AC+1,[XWD 741703,607417]
14406 040520 004 07 0 00 015201 ER4 AC+1,15201 ;C(AC+1) WAS MODIFIED INCORRECTLY
14407 040521 321 10 0 00 040512 JUMPL AC+2,E15200 ;LOOP ON ERROR SWITCH^
14408
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 36
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - END CONNECTIONS TEST (ASH) SEQ 0310
14409 ;SHIFT CONNECTIONS TEST
14410 ;TEST AR0 SHRT INP-ONE'S - ASH AC,-2
14411 ;TEST ABILITY TO SHIFT INTO BIT 0 OF AR
14412 SR1 (153,400000,0,700000,0,ASH,-2)^
14413 ;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 400000,0] -2 BIT
14414 ;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 700000,0]
14415 ;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
14416
14417 040522 200 06 0 00 041621 E15300: MOVE AC,[XWD 400000,0] ;INITIALIZE AC
14418 040523 200 07 0 00 041615 MOVE AC+1,[XWD 741703,607417];INITIALIZE AC+1
14419 040524 240 06 0 00 777776 ASH AC,-2 ;*SHIFT/ROTATE -2 BIT POSITIONS
14420 040525 312 06 0 00 041644 CAME AC,[XWD 700000,0] ;IS RESULT IN AC CORRECT?
14421 040526 003 06 0 00 015301 ER3 AC,15301 ;RESULT IN AC IS INCORRECT
14422 040527 312 07 0 00 041615 CAME AC+1,[XWD 741703,607417]
14423 040530 004 07 0 00 015301 ER4 AC+1,15301 ;C(AC+1) WAS MODIFIED INCORRECTLY
14424 040531 321 10 0 00 040522 JUMPL AC+2,E15300 ;LOOP ON ERROR SWITCH^
14425
14426 ;SHIFT CONNECTIONS TEST
14427 ;TEST AR0 SHRT INP-ZERO'S - ASH AC,-2
14428 ;TEST ABILITY TO SHIFT INTO BIT 0 OF AR
14429 SR1 (154,377777,-1,077777,-1,ASH,-2)^
14430 ;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 377777,-1] -2 BIT
14431 ;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 077777,-1]
14432 ;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
14433
14434 040532 200 06 0 00 041623 E15400: MOVE AC,[XWD 377777,-1] ;INITIALIZE AC
14435 040533 200 07 0 00 041615 MOVE AC+1,[XWD 741703,607417];INITIALIZE AC+1
14436 040534 240 06 0 00 777776 ASH AC,-2 ;*SHIFT/ROTATE -2 BIT POSITIONS
14437 040535 312 06 0 00 041645 CAME AC,[XWD 077777,-1] ;IS RESULT IN AC CORRECT?
14438 040536 003 06 0 00 015401 ER3 AC,15401 ;RESULT IN AC IS INCORRECT
14439 040537 312 07 0 00 041615 CAME AC+1,[XWD 741703,607417]
14440 040540 004 07 0 00 015401 ER4 AC+1,15401 ;C(AC+1) WAS MODIFIED INCORRECTLY
14441 040541 321 10 0 00 040532 JUMPL AC+2,E15400 ;LOOP ON ERROR SWITCH^
14442
14443 ;SHIFT CONNECTIONS TEST
14444 ;TEST AR1 SHRT INP-ONE'S - ASH AC,-2
14445 ;TEST ABILITY TO SHIFT INTO BIT 1 OF AR
14446 SR1 (155,400000,0,700000,0,ASH,-2)^
14447 ;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 400000,0] -2 BIT
14448 ;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 700000,0]
14449 ;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
14450
14451 040542 200 06 0 00 041621 E15500: MOVE AC,[XWD 400000,0] ;INITIALIZE AC
14452 040543 200 07 0 00 041615 MOVE AC+1,[XWD 741703,607417];INITIALIZE AC+1
14453 040544 240 06 0 00 777776 ASH AC,-2 ;*SHIFT/ROTATE -2 BIT POSITIONS
14454 040545 312 06 0 00 041644 CAME AC,[XWD 700000,0] ;IS RESULT IN AC CORRECT?
14455 040546 003 06 0 00 015501 ER3 AC,15501 ;RESULT IN AC IS INCORRECT
14456 040547 312 07 0 00 041615 CAME AC+1,[XWD 741703,607417]
14457 040550 004 07 0 00 015501 ER4 AC+1,15501 ;C(AC+1) WAS MODIFIED INCORRECTLY
14458 040551 321 10 0 00 040542 JUMPL AC+2,E15500 ;LOOP ON ERROR SWITCH^
14459
14460 ;SHIFT CONNECTIONS TEST
14461 ;TEST AR1 SHRT INP-ZERO'S - ASH AC,-2
14462 ;TEST ABILITY TO SHIFT INTO BIT 1 OF AR
14463 SR1 (156,377777,-1,077777,-1,ASH,-2)^
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 36-1
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - END CONNECTIONS TEST (ASH) SEQ 0311
14464 ;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 377777,-1] -2 BIT
14465 ;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 077777,-1]
14466 ;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
14467
14468 040552 200 06 0 00 041623 E15600: MOVE AC,[XWD 377777,-1] ;INITIALIZE AC
14469 040553 200 07 0 00 041615 MOVE AC+1,[XWD 741703,607417];INITIALIZE AC+1
14470 040554 240 06 0 00 777776 ASH AC,-2 ;*SHIFT/ROTATE -2 BIT POSITIONS
14471 040555 312 06 0 00 041645 CAME AC,[XWD 077777,-1] ;IS RESULT IN AC CORRECT?
14472 040556 003 06 0 00 015601 ER3 AC,15601 ;RESULT IN AC IS INCORRECT
14473 040557 312 07 0 00 041615 CAME AC+1,[XWD 741703,607417]
14474 040560 004 07 0 00 015601 ER4 AC+1,15601 ;C(AC+1) WAS MODIFIED INCORRECTLY
14475 040561 321 10 0 00 040552 JUMPL AC+2,E15600 ;LOOP ON ERROR SWITCH^
14476 PAGE
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 36-2
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - END CONNECTIONS TEST (ASH) SEQ 0312
14477 ;SHIFT CONNECTIONS TEST
14478 ;TEST AR34 SHRT INP-ONE'S - ASH AC,-2
14479 ;TEST ABILITY TO SHIFT INTO BIT 34 OF AR
14480 SR1 (157,0,10,0,2,ASH,-2)^
14481 ;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 0,10] -2 BIT
14482 ;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 0,2]
14483 ;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
14484
14485 040562 200 06 0 00 041614 E15700: MOVE AC,[XWD 0,10] ;INITIALIZE AC
14486 040563 200 07 0 00 041615 MOVE AC+1,[XWD 741703,607417];INITIALIZE AC+1
14487 040564 240 06 0 00 777776 ASH AC,-2 ;*SHIFT/ROTATE -2 BIT POSITIONS
14488 040565 312 06 0 00 041620 CAME AC,[XWD 0,2] ;IS RESULT IN AC CORRECT?
14489 040566 003 06 0 00 015701 ER3 AC,15701 ;RESULT IN AC IS INCORRECT
14490 040567 312 07 0 00 041615 CAME AC+1,[XWD 741703,607417]
14491 040570 004 07 0 00 015701 ER4 AC+1,15701 ;C(AC+1) WAS MODIFIED INCORRECTLY
14492 040571 321 10 0 00 040562 JUMPL AC+2,E15700 ;LOOP ON ERROR SWITCH^
14493
14494 ;SHIFT CONNECTIONS TEST
14495 ;TEST AR34 SHRT INP-ZERO'S - ASH AC,-2
14496 ;TEST ABILITY TO SHIFT INTO BIT 34 OF AR
14497 SR1 (160,-1,-11,-1,-3,ASH,-2)^
14498 ;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD -1,-11] -2 BIT
14499 ;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD -1,-3]
14500 ;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
14501
14502 040572 200 06 0 00 041633 E16000: MOVE AC,[XWD -1,-11] ;INITIALIZE AC
14503 040573 200 07 0 00 041615 MOVE AC+1,[XWD 741703,607417];INITIALIZE AC+1
14504 040574 240 06 0 00 777776 ASH AC,-2 ;*SHIFT/ROTATE -2 BIT POSITIONS
14505 040575 312 06 0 00 041625 CAME AC,[XWD -1,-3] ;IS RESULT IN AC CORRECT?
14506 040576 003 06 0 00 016001 ER3 AC,16001 ;RESULT IN AC IS INCORRECT
14507 040577 312 07 0 00 041615 CAME AC+1,[XWD 741703,607417]
14508 040600 004 07 0 00 016001 ER4 AC+1,16001 ;C(AC+1) WAS MODIFIED INCORRECTLY
14509 040601 321 10 0 00 040572 JUMPL AC+2,E16000 ;LOOP ON ERROR SWITCH^
14510
14511 ;SHIFT CONNECTIONS TEST
14512 ;TEST AR35 SHRT INP-ONE'S - ASH AC,-2
14513 ;TEST ABILITY TO SHIFT INTO BIT 35 OF AR
14514 SR1 (161,0,4,0,1,ASH,-2)^
14515 ;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 0,4] -2 BIT
14516 ;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 0,1]
14517 ;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
14518
14519 040602 200 06 0 00 041617 E16100: MOVE AC,[XWD 0,4] ;INITIALIZE AC
14520 040603 200 07 0 00 041615 MOVE AC+1,[XWD 741703,607417];INITIALIZE AC+1
14521 040604 240 06 0 00 777776 ASH AC,-2 ;*SHIFT/ROTATE -2 BIT POSITIONS
14522 040605 312 06 0 00 041622 CAME AC,[XWD 0,1] ;IS RESULT IN AC CORRECT?
14523 040606 003 06 0 00 016101 ER3 AC,16101 ;RESULT IN AC IS INCORRECT
14524 040607 312 07 0 00 041615 CAME AC+1,[XWD 741703,607417]
14525 040610 004 07 0 00 016101 ER4 AC+1,16101 ;C(AC+1) WAS MODIFIED INCORRECTLY
14526 040611 321 10 0 00 040602 JUMPL AC+2,E16100 ;LOOP ON ERROR SWITCH^
14527
14528 ;SHIFT CONNECTIONS TEST
14529 ;TEST AR35 SHRT INP-ZERO'S - ASH AC,-2
14530 ;TEST ABILITY TO SHIFT INTO BIT 35 OF AR
14531 SR1 (162,-1,-5,-1,-2,ASH,-2)^
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 36-3
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - END CONNECTIONS TEST (ASH) SEQ 0313
14532 ;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD -1,-5] -2 BIT
14533 ;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD -1,-2]
14534 ;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
14535
14536 040612 200 06 0 00 041632 E16200: MOVE AC,[XWD -1,-5] ;INITIALIZE AC
14537 040613 200 07 0 00 041615 MOVE AC+1,[XWD 741703,607417];INITIALIZE AC+1
14538 040614 240 06 0 00 777776 ASH AC,-2 ;*SHIFT/ROTATE -2 BIT POSITIONS
14539 040615 312 06 0 00 041624 CAME AC,[XWD -1,-2] ;IS RESULT IN AC CORRECT?
14540 040616 003 06 0 00 016201 ER3 AC,16201 ;RESULT IN AC IS INCORRECT
14541 040617 312 07 0 00 041615 CAME AC+1,[XWD 741703,607417]
14542 040620 004 07 0 00 016201 ER4 AC+1,16201 ;C(AC+1) WAS MODIFIED INCORRECTLY
14543 040621 321 10 0 00 040612 JUMPL AC+2,E16200 ;LOOP ON ERROR SWITCH^
14544
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 37
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - END CONNECTIONS TEST (ROTC) SEQ 0314
14545 SUBTTL DIAGNOSTIC SECTION - END CONNECTIONS TEST (ROTC)
14546
14547 ;END CONNECTIONS-ROTC
14548 ;TEST AR-MQ END BIT INPUT GATES
14549 ;TEST LEFT-AR0,1,34,35 SHLT INP GATES
14550 ; MQ0,1,34,35 SHLT INP GATES
14551 ;TEST RIGHT-AR0,1,34,35 SHRT INP GATES
14552 ; MQ0,1,34,35 SHRT INPUT GATES
14553 ;AC,AC+1 ARE ROTATED LEFT/RIGHT AND
14554 ;END BITS ARE TESTED
14555 ;TEST ASSUMES BOTH REGISTERS ARE
14556 ;CAPABLE OF ROTATING 1,-1 AND -2 BIT POSITIONS CORRECTLY
14557
14558 ;SHIFT CONNECTIONS TEST
14559 ;TEST MQ35 SHLT INP-ONE'S - ROTC AC,1
14560 ;TEST ABILITY TO ROTATE INTO BIT 35 OF MQ
14561 SR2 (163,400000,0,0,0,0,0,0,1,ROTC,1)^
14562 ;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
14563 ;DATA SPECIFIED IN [XWD 400000,0] AND [XWD 0,0] 1 BIT POSITIONS AND
14564 ;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD 0,0] AND
14565 ;[XWD 0,1]
14566
14567 040622 200 06 0 00 041621 E16300: MOVE AC,[XWD 400000,0] ;INITIALIZE AC
14568 040623 200 07 0 00 041612 MOVE AC+1,[XWD 0,0] ;INITIALIZE AC+1
14569 040624 245 06 0 00 000001 ROTC AC,1 ;*SHIFT/ROTATE COMBINED 1 PLACES
14570 040625 312 06 0 00 041612 CAME AC,[XWD 0,0] ;IS RESULT IN AC CORRECT?
14571 040626 003 06 0 00 016301 ER3 AC,16301 ;RESULT IN AC IS INCORRECT
14572 040627 312 07 0 00 041622 CAME AC+1,[XWD 0,1] ;IS RESULT IN AC+1 CORRECT?
14573 040630 004 07 0 00 016301 ER4 AC+1,16301 ;RESULT IN AC+1 IS INCORRECT
14574 040631 321 10 0 00 040622 JUMPL AC+2,E16300 ;LOOP ON ERROR SWITCH^
14575
14576 ;SHIFT CONNECTIONS TEST
14577 ;TEST MQ35 SHLT INP-ZERO'S - ROTC AC,1
14578 ;TEST ABILITY TO ROTATE INTO BIT 35 OF MQ
14579 SR2 (164,377777,-1,-1,-1,-1,-1,-1,-2,ROTC,1)^
14580 ;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
14581 ;DATA SPECIFIED IN [XWD 377777,-1] AND [XWD -1,-1] 1 BIT POSITIONS AND
14582 ;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD -1,-1] AND
14583 ;[XWD -1,-2]
14584
14585 040632 200 06 0 00 041623 E16400: MOVE AC,[XWD 377777,-1] ;INITIALIZE AC
14586 040633 200 07 0 00 041613 MOVE AC+1,[XWD -1,-1] ;INITIALIZE AC+1
14587 040634 245 06 0 00 000001 ROTC AC,1 ;*SHIFT/ROTATE COMBINED 1 PLACES
14588 040635 312 06 0 00 041613 CAME AC,[XWD -1,-1] ;IS RESULT IN AC CORRECT?
14589 040636 003 06 0 00 016401 ER3 AC,16401 ;RESULT IN AC IS INCORRECT
14590 040637 312 07 0 00 041624 CAME AC+1,[XWD -1,-2] ;IS RESULT IN AC+1 CORRECT?
14591 040640 004 07 0 00 016401 ER4 AC+1,16401 ;RESULT IN AC+1 IS INCORRECT
14592 040641 321 10 0 00 040632 JUMPL AC+2,E16400 ;LOOP ON ERROR SWITCH^
14593
14594 ;SHIFT CONNECTIONS TEST
14595 ;TEST MQ34 SHLT INP-ONE'S - ROTC AC,1
14596 ;TEST ABILITY TO ROTATE INTO BIT 34 OF MQ
14597 SR2 (165,0,0,0,1,0,0,0,2,ROTC,1)^
14598 ;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
14599 ;DATA SPECIFIED IN [XWD 0,0] AND [XWD 0,1] 1 BIT POSITIONS AND
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 37-1
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - END CONNECTIONS TEST (ROTC) SEQ 0315
14600 ;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD 0,0] AND
14601 ;[XWD 0,2]
14602
14603 040642 200 06 0 00 041612 E16500: MOVE AC,[XWD 0,0] ;INITIALIZE AC
14604 040643 200 07 0 00 041622 MOVE AC+1,[XWD 0,1] ;INITIALIZE AC+1
14605 040644 245 06 0 00 000001 ROTC AC,1 ;*SHIFT/ROTATE COMBINED 1 PLACES
14606 040645 312 06 0 00 041612 CAME AC,[XWD 0,0] ;IS RESULT IN AC CORRECT?
14607 040646 003 06 0 00 016501 ER3 AC,16501 ;RESULT IN AC IS INCORRECT
14608 040647 312 07 0 00 041620 CAME AC+1,[XWD 0,2] ;IS RESULT IN AC+1 CORRECT?
14609 040650 004 07 0 00 016501 ER4 AC+1,16501 ;RESULT IN AC+1 IS INCORRECT
14610 040651 321 10 0 00 040642 JUMPL AC+2,E16500 ;LOOP ON ERROR SWITCH^
14611 PAGE
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 37-2
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - END CONNECTIONS TEST (ROTC) SEQ 0316
14612 ;SHIFT CONNECTIONS TEST
14613 ;TEST MQ34 SHLT INP-ZERO'S - ROTC AC,1
14614 ;TEST ABILITY TO ROTATE INTO BIT 34 OF MQ
14615 SR2 (166,-1,-1,-1,-2,-1,-1,-1,-3,ROTC,1)^
14616 ;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
14617 ;DATA SPECIFIED IN [XWD -1,-1] AND [XWD -1,-2] 1 BIT POSITIONS AND
14618 ;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD -1,-1] AND
14619 ;[XWD -1,-3]
14620
14621 040652 200 06 0 00 041613 E16600: MOVE AC,[XWD -1,-1] ;INITIALIZE AC
14622 040653 200 07 0 00 041624 MOVE AC+1,[XWD -1,-2] ;INITIALIZE AC+1
14623 040654 245 06 0 00 000001 ROTC AC,1 ;*SHIFT/ROTATE COMBINED 1 PLACES
14624 040655 312 06 0 00 041613 CAME AC,[XWD -1,-1] ;IS RESULT IN AC CORRECT?
14625 040656 003 06 0 00 016601 ER3 AC,16601 ;RESULT IN AC IS INCORRECT
14626 040657 312 07 0 00 041625 CAME AC+1,[XWD -1,-3] ;IS RESULT IN AC+1 CORRECT?
14627 040660 004 07 0 00 016601 ER4 AC+1,16601 ;RESULT IN AC+1 IS INCORRECT
14628 040661 321 10 0 00 040652 JUMPL AC+2,E16600 ;LOOP ON ERROR SWITCH^
14629
14630 ;SHIFT CONNECTIONS TEST
14631 ;TEST MQ1 SHLT INP-ONE'S - ROTC AC,1
14632 ;TEST ABILITY TO ROTATE INTO BIT 1 OF MQ
14633 SR2 (167,0,0,100000,0,0,0,200000,0,ROTC,1)^
14634 ;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
14635 ;DATA SPECIFIED IN [XWD 0,0] AND [XWD 100000,0] 1 BIT POSITIONS AND
14636 ;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD 0,0] AND
14637 ;[XWD 200000,0]
14638
14639 040662 200 06 0 00 041612 E16700: MOVE AC,[XWD 0,0] ;INITIALIZE AC
14640 040663 200 07 0 00 041626 MOVE AC+1,[XWD 100000,0] ;INITIALIZE AC+1
14641 040664 245 06 0 00 000001 ROTC AC,1 ;*SHIFT/ROTATE COMBINED 1 PLACES
14642 040665 312 06 0 00 041612 CAME AC,[XWD 0,0] ;IS RESULT IN AC CORRECT?
14643 040666 003 06 0 00 016701 ER3 AC,16701 ;RESULT IN AC IS INCORRECT
14644 040667 312 07 0 00 041627 CAME AC+1,[XWD 200000,0] ;IS RESULT IN AC+1 CORRECT?
14645 040670 004 07 0 00 016701 ER4 AC+1,16701 ;RESULT IN AC+1 IS INCORRECT
14646 040671 321 10 0 00 040662 JUMPL AC+2,E16700 ;LOOP ON ERROR SWITCH^
14647
14648 ;SHIFT CONNECTIONS TEST
14649 ;TEST MQ1 SHLT INP-ZERO'S - ROTC AC,1
14650 ;TEST ABILITY TO ROTATE INTO BIT 1 OF MQ
14651 SR2 (170,-1,-1,677777,-1,-1,-1,577777,-1,ROTC,1)^
14652 ;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
14653 ;DATA SPECIFIED IN [XWD -1,-1] AND [XWD 677777,-1] 1 BIT POSITIONS AND
14654 ;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD -1,-1] AND
14655 ;[XWD 577777,-1]
14656
14657 040672 200 06 0 00 041613 E17000: MOVE AC,[XWD -1,-1] ;INITIALIZE AC
14658 040673 200 07 0 00 041630 MOVE AC+1,[XWD 677777,-1] ;INITIALIZE AC+1
14659 040674 245 06 0 00 000001 ROTC AC,1 ;*SHIFT/ROTATE COMBINED 1 PLACES
14660 040675 312 06 0 00 041613 CAME AC,[XWD -1,-1] ;IS RESULT IN AC CORRECT?
14661 040676 003 06 0 00 017001 ER3 AC,17001 ;RESULT IN AC IS INCORRECT
14662 040677 312 07 0 00 041631 CAME AC+1,[XWD 577777,-1] ;IS RESULT IN AC+1 CORRECT?
14663 040700 004 07 0 00 017001 ER4 AC+1,17001 ;RESULT IN AC+1 IS INCORRECT
14664 040701 321 10 0 00 040672 JUMPL AC+2,E17000 ;LOOP ON ERROR SWITCH^
14665 PAGE
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 37-3
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - END CONNECTIONS TEST (ROTC) SEQ 0317
14666 ;SHIFT CONNECTIONS TEST
14667 ;TEST MQ0 SHLT INP-ONE'S - ROTC AC,1
14668 ;TEST ABILITY TO ROTATE INTO BIT 0 OF MQ
14669 SR2 (171,0,0,200000,0,0,0,400000,0,ROTC,1)^
14670 ;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
14671 ;DATA SPECIFIED IN [XWD 0,0] AND [XWD 200000,0] 1 BIT POSITIONS AND
14672 ;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD 0,0] AND
14673 ;[XWD 400000,0]
14674
14675 040702 200 06 0 00 041612 E17100: MOVE AC,[XWD 0,0] ;INITIALIZE AC
14676 040703 200 07 0 00 041627 MOVE AC+1,[XWD 200000,0] ;INITIALIZE AC+1
14677 040704 245 06 0 00 000001 ROTC AC,1 ;*SHIFT/ROTATE COMBINED 1 PLACES
14678 040705 312 06 0 00 041612 CAME AC,[XWD 0,0] ;IS RESULT IN AC CORRECT?
14679 040706 003 06 0 00 017101 ER3 AC,17101 ;RESULT IN AC IS INCORRECT
14680 040707 312 07 0 00 041621 CAME AC+1,[XWD 400000,0] ;IS RESULT IN AC+1 CORRECT?
14681 040710 004 07 0 00 017101 ER4 AC+1,17101 ;RESULT IN AC+1 IS INCORRECT
14682 040711 321 10 0 00 040702 JUMPL AC+2,E17100 ;LOOP ON ERROR SWITCH^
14683
14684 ;SHIFT CONNECTIONS TEST
14685 ;TEST MQ0 SHLT INP-ZERO'S - ROTC AC,1
14686 ;TEST ABILITY TO ROTATE INTO BIT 0 OF MQ
14687 SR2 (172,-1,-1,577777,-1,-1,-1,377777,-1,ROTC,1)^
14688 ;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
14689 ;DATA SPECIFIED IN [XWD -1,-1] AND [XWD 577777,-1] 1 BIT POSITIONS AND
14690 ;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD -1,-1] AND
14691 ;[XWD 377777,-1]
14692
14693 040712 200 06 0 00 041613 E17200: MOVE AC,[XWD -1,-1] ;INITIALIZE AC
14694 040713 200 07 0 00 041631 MOVE AC+1,[XWD 577777,-1] ;INITIALIZE AC+1
14695 040714 245 06 0 00 000001 ROTC AC,1 ;*SHIFT/ROTATE COMBINED 1 PLACES
14696 040715 312 06 0 00 041613 CAME AC,[XWD -1,-1] ;IS RESULT IN AC CORRECT?
14697 040716 003 06 0 00 017201 ER3 AC,17201 ;RESULT IN AC IS INCORRECT
14698 040717 312 07 0 00 041623 CAME AC+1,[XWD 377777,-1] ;IS RESULT IN AC+1 CORRECT?
14699 040720 004 07 0 00 017201 ER4 AC+1,17201 ;RESULT IN AC+1 IS INCORRECT
14700 040721 321 10 0 00 040712 JUMPL AC+2,E17200 ;LOOP ON ERROR SWITCH^
14701
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 38
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - END CONNECTIONS TEST (ROTC) SEQ 0318
14702 ;SHIFT CONNECTIONS TEST
14703 ;TEST AR35 SHLT INP-ONE'S - ROTC AC,1
14704 ;TEST ABILITY TO ROTATE INTO BIT 35 OF AR
14705 SR2 (173,0,0,400000,0,0,1,0,0,ROTC,1)^
14706 ;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
14707 ;DATA SPECIFIED IN [XWD 0,0] AND [XWD 400000,0] 1 BIT POSITIONS AND
14708 ;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD 0,1] AND
14709 ;[XWD 0,0]
14710
14711 040722 200 06 0 00 041612 E17300: MOVE AC,[XWD 0,0] ;INITIALIZE AC
14712 040723 200 07 0 00 041621 MOVE AC+1,[XWD 400000,0] ;INITIALIZE AC+1
14713 040724 245 06 0 00 000001 ROTC AC,1 ;*SHIFT/ROTATE COMBINED 1 PLACES
14714 040725 312 06 0 00 041622 CAME AC,[XWD 0,1] ;IS RESULT IN AC CORRECT?
14715 040726 003 06 0 00 017301 ER3 AC,17301 ;RESULT IN AC IS INCORRECT
14716 040727 312 07 0 00 041612 CAME AC+1,[XWD 0,0] ;IS RESULT IN AC+1 CORRECT?
14717 040730 004 07 0 00 017301 ER4 AC+1,17301 ;RESULT IN AC+1 IS INCORRECT
14718 040731 321 10 0 00 040722 JUMPL AC+2,E17300 ;LOOP ON ERROR SWITCH^
14719
14720 ;SHIFT CONNECTIONS TEST
14721 ;TEST AR35 SHLT INP-ZERO'S - ROTC AC,1
14722 ;TEST ABILITY TO ROTATE INTO BIT 35 OF AR
14723 SR2 (174,-1,-1,377777,-1,-1,-2,-1,-1,ROTC,1)^
14724 ;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
14725 ;DATA SPECIFIED IN [XWD -1,-1] AND [XWD 377777,-1] 1 BIT POSITIONS AND
14726 ;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD -1,-2] AND
14727 ;[XWD -1,-1]
14728
14729 040732 200 06 0 00 041613 E17400: MOVE AC,[XWD -1,-1] ;INITIALIZE AC
14730 040733 200 07 0 00 041623 MOVE AC+1,[XWD 377777,-1] ;INITIALIZE AC+1
14731 040734 245 06 0 00 000001 ROTC AC,1 ;*SHIFT/ROTATE COMBINED 1 PLACES
14732 040735 312 06 0 00 041624 CAME AC,[XWD -1,-2] ;IS RESULT IN AC CORRECT?
14733 040736 003 06 0 00 017401 ER3 AC,17401 ;RESULT IN AC IS INCORRECT
14734 040737 312 07 0 00 041613 CAME AC+1,[XWD -1,-1] ;IS RESULT IN AC+1 CORRECT?
14735 040740 004 07 0 00 017401 ER4 AC+1,17401 ;RESULT IN AC+1 IS INCORRECT
14736 040741 321 10 0 00 040732 JUMPL AC+2,E17400 ;LOOP ON ERROR SWITCH^
14737
14738 ;SHIFT CONNECTIONS TEST
14739 ;TEST AR34 SHLT INP-ONE'S - ROTC AC,1
14740 ;TEST ABILITY TO ROTATE INTO BIT 34 OF AR
14741 SR2 (175,0,1,0,0,0,2,0,0,ROTC,1)^
14742 ;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
14743 ;DATA SPECIFIED IN [XWD 0,1] AND [XWD 0,0] 1 BIT POSITIONS AND
14744 ;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD 0,2] AND
14745 ;[XWD 0,0]
14746
14747 040742 200 06 0 00 041622 E17500: MOVE AC,[XWD 0,1] ;INITIALIZE AC
14748 040743 200 07 0 00 041612 MOVE AC+1,[XWD 0,0] ;INITIALIZE AC+1
14749 040744 245 06 0 00 000001 ROTC AC,1 ;*SHIFT/ROTATE COMBINED 1 PLACES
14750 040745 312 06 0 00 041620 CAME AC,[XWD 0,2] ;IS RESULT IN AC CORRECT?
14751 040746 003 06 0 00 017501 ER3 AC,17501 ;RESULT IN AC IS INCORRECT
14752 040747 312 07 0 00 041612 CAME AC+1,[XWD 0,0] ;IS RESULT IN AC+1 CORRECT?
14753 040750 004 07 0 00 017501 ER4 AC+1,17501 ;RESULT IN AC+1 IS INCORRECT
14754 040751 321 10 0 00 040742 JUMPL AC+2,E17500 ;LOOP ON ERROR SWITCH^
14755
14756 ;SHIFT CONNECTIONS TEST
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 38-1
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - END CONNECTIONS TEST (ROTC) SEQ 0319
14757 ;TEST AR34 SHLT INP-ZERO'S - ROTC AC,1
14758 ;TEST ABILITY TO ROTATE INTO BIT 34 OF AR
14759 SR2 (176,-1,-2,-1,-1,-1,-3,-1,-1,ROTC,1)^
14760 ;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
14761 ;DATA SPECIFIED IN [XWD -1,-2] AND [XWD -1,-1] 1 BIT POSITIONS AND
14762 ;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD -1,-3] AND
14763 ;[XWD -1,-1]
14764
14765 040752 200 06 0 00 041624 E17600: MOVE AC,[XWD -1,-2] ;INITIALIZE AC
14766 040753 200 07 0 00 041613 MOVE AC+1,[XWD -1,-1] ;INITIALIZE AC+1
14767 040754 245 06 0 00 000001 ROTC AC,1 ;*SHIFT/ROTATE COMBINED 1 PLACES
14768 040755 312 06 0 00 041625 CAME AC,[XWD -1,-3] ;IS RESULT IN AC CORRECT?
14769 040756 003 06 0 00 017601 ER3 AC,17601 ;RESULT IN AC IS INCORRECT
14770 040757 312 07 0 00 041613 CAME AC+1,[XWD -1,-1] ;IS RESULT IN AC+1 CORRECT?
14771 040760 004 07 0 00 017601 ER4 AC+1,17601 ;RESULT IN AC+1 IS INCORRECT
14772 040761 321 10 0 00 040752 JUMPL AC+2,E17600 ;LOOP ON ERROR SWITCH^
14773 PAGE
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 38-2
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - END CONNECTIONS TEST (ROTC) SEQ 0320
14774 ;SHIFT CONNECTIONS TEST
14775 ;TEST AR1 SHLT INP-ONE'S - ROTC AC,1
14776 ;TEST ABILITY TO ROTATE INTO BIT 1 OF AR
14777 SR2 (177,100000,0,0,0,200000,0,0,0,ROTC,1)^
14778 ;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
14779 ;DATA SPECIFIED IN [XWD 100000,0] AND [XWD 0,0] 1 BIT POSITIONS AND
14780 ;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD 200000,0] AND
14781 ;[XWD 0,0]
14782
14783 040762 200 06 0 00 041626 E17700: MOVE AC,[XWD 100000,0] ;INITIALIZE AC
14784 040763 200 07 0 00 041612 MOVE AC+1,[XWD 0,0] ;INITIALIZE AC+1
14785 040764 245 06 0 00 000001 ROTC AC,1 ;*SHIFT/ROTATE COMBINED 1 PLACES
14786 040765 312 06 0 00 041627 CAME AC,[XWD 200000,0] ;IS RESULT IN AC CORRECT?
14787 040766 003 06 0 00 017701 ER3 AC,17701 ;RESULT IN AC IS INCORRECT
14788 040767 312 07 0 00 041612 CAME AC+1,[XWD 0,0] ;IS RESULT IN AC+1 CORRECT?
14789 040770 004 07 0 00 017701 ER4 AC+1,17701 ;RESULT IN AC+1 IS INCORRECT
14790 040771 321 10 0 00 040762 JUMPL AC+2,E17700 ;LOOP ON ERROR SWITCH^
14791
14792 ;SHIFT CONNECTIONS TEST
14793 ;TEST AR1 SHLT INP-ZERO'S - ROTC AC,1
14794 ;TEST ABILITY TO ROTATE INTO BIT 1 OF AR
14795 SR2 (200,677777,-1,-1,-1,577777,-1,-1,-1,ROTC,1)^
14796 ;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
14797 ;DATA SPECIFIED IN [XWD 677777,-1] AND [XWD -1,-1] 1 BIT POSITIONS AND
14798 ;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD 577777,-1] AND
14799 ;[XWD -1,-1]
14800
14801 040772 200 06 0 00 041630 E20000: MOVE AC,[XWD 677777,-1] ;INITIALIZE AC
14802 040773 200 07 0 00 041613 MOVE AC+1,[XWD -1,-1] ;INITIALIZE AC+1
14803 040774 245 06 0 00 000001 ROTC AC,1 ;*SHIFT/ROTATE COMBINED 1 PLACES
14804 040775 312 06 0 00 041631 CAME AC,[XWD 577777,-1] ;IS RESULT IN AC CORRECT?
14805 040776 003 06 0 00 020001 ER3 AC,20001 ;RESULT IN AC IS INCORRECT
14806 040777 312 07 0 00 041613 CAME AC+1,[XWD -1,-1] ;IS RESULT IN AC+1 CORRECT?
14807 041000 004 07 0 00 020001 ER4 AC+1,20001 ;RESULT IN AC+1 IS INCORRECT
14808 041001 321 10 0 00 040772 JUMPL AC+2,E20000 ;LOOP ON ERROR SWITCH^
14809
14810 ;SHIFT CONNECTIONS TEST
14811 ;TEST AR0 SHLT INP-ONE'S - ROTC AC,1
14812 ;TEST ABILITY TO ROTATE INTO BIT 0 OF AR
14813 SR2 (201,200000,0,0,0,400000,0,0,0,ROTC,1)^
14814 ;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
14815 ;DATA SPECIFIED IN [XWD 200000,0] AND [XWD 0,0] 1 BIT POSITIONS AND
14816 ;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD 400000,0] AND
14817 ;[XWD 0,0]
14818
14819 041002 200 06 0 00 041627 E20100: MOVE AC,[XWD 200000,0] ;INITIALIZE AC
14820 041003 200 07 0 00 041612 MOVE AC+1,[XWD 0,0] ;INITIALIZE AC+1
14821 041004 245 06 0 00 000001 ROTC AC,1 ;*SHIFT/ROTATE COMBINED 1 PLACES
14822 041005 312 06 0 00 041621 CAME AC,[XWD 400000,0] ;IS RESULT IN AC CORRECT?
14823 041006 003 06 0 00 020101 ER3 AC,20101 ;RESULT IN AC IS INCORRECT
14824 041007 312 07 0 00 041612 CAME AC+1,[XWD 0,0] ;IS RESULT IN AC+1 CORRECT?
14825 041010 004 07 0 00 020101 ER4 AC+1,20101 ;RESULT IN AC+1 IS INCORRECT
14826 041011 321 10 0 00 041002 JUMPL AC+2,E20100 ;LOOP ON ERROR SWITCH^
14827
14828 ;SHIFT CONNECTIONS TEST
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 38-3
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - END CONNECTIONS TEST (ROTC) SEQ 0321
14829 ;TEST AR0 SHLT INP-ZERO'S - ROTC AC,1
14830 ;TEST ABILITY TO ROTATE INTO BIT 0 OF AR
14831 SR2 (202,577777,-1,-1,-1,377777,-1,-1,-1,ROTC,1)^
14832 ;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
14833 ;DATA SPECIFIED IN [XWD 577777,-1] AND [XWD -1,-1] 1 BIT POSITIONS AND
14834 ;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD 377777,-1] AND
14835 ;[XWD -1,-1]
14836
14837 041012 200 06 0 00 041631 E20200: MOVE AC,[XWD 577777,-1] ;INITIALIZE AC
14838 041013 200 07 0 00 041613 MOVE AC+1,[XWD -1,-1] ;INITIALIZE AC+1
14839 041014 245 06 0 00 000001 ROTC AC,1 ;*SHIFT/ROTATE COMBINED 1 PLACES
14840 041015 312 06 0 00 041623 CAME AC,[XWD 377777,-1] ;IS RESULT IN AC CORRECT?
14841 041016 003 06 0 00 020201 ER3 AC,20201 ;RESULT IN AC IS INCORRECT
14842 041017 312 07 0 00 041613 CAME AC+1,[XWD -1,-1] ;IS RESULT IN AC+1 CORRECT?
14843 041020 004 07 0 00 020201 ER4 AC+1,20201 ;RESULT IN AC+1 IS INCORRECT
14844 041021 321 10 0 00 041012 JUMPL AC+2,E20200 ;LOOP ON ERROR SWITCH^
14845
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 39
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - END CONNECTIONS TEST (ROTC) SEQ 0322
14846 ;SHIFT CONNECTIONS TEST
14847 ;TEST AR0 SHRT INP-ONE'S - ROTC AC,-1
14848 ;TEST ABILITY TO ROTATE INTO BIT 0 OF AR
14849 SR2 (203,0,0,0,1,400000,0,0,0,ROTC,-1)^
14850 ;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
14851 ;DATA SPECIFIED IN [XWD 0,0] AND [XWD 0,1] -1 BIT POSITIONS AND
14852 ;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD 400000,0] AND
14853 ;[XWD 0,0]
14854
14855 041022 200 06 0 00 041612 E20300: MOVE AC,[XWD 0,0] ;INITIALIZE AC
14856 041023 200 07 0 00 041622 MOVE AC+1,[XWD 0,1] ;INITIALIZE AC+1
14857 041024 245 06 0 00 777777 ROTC AC,-1 ;*SHIFT/ROTATE COMBINED -1 PLACES
14858 041025 312 06 0 00 041621 CAME AC,[XWD 400000,0] ;IS RESULT IN AC CORRECT?
14859 041026 003 06 0 00 020301 ER3 AC,20301 ;RESULT IN AC IS INCORRECT
14860 041027 312 07 0 00 041612 CAME AC+1,[XWD 0,0] ;IS RESULT IN AC+1 CORRECT?
14861 041030 004 07 0 00 020301 ER4 AC+1,20301 ;RESULT IN AC+1 IS INCORRECT
14862 041031 321 10 0 00 041022 JUMPL AC+2,E20300 ;LOOP ON ERROR SWITCH^
14863
14864 ;SHIFT CONNECTIONS TEST
14865 ;TEST AR0 SHRT INP-ZERO'S - ROTC AC,-1
14866 ;TEST ABILITY TO ROTATE INTO BIT 0 OF AR
14867 SR2 (204,-1,-1,-1,-2,377777,-1,-1,-1,ROTC,-1)^
14868 ;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
14869 ;DATA SPECIFIED IN [XWD -1,-1] AND [XWD -1,-2] -1 BIT POSITIONS AND
14870 ;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD 377777,-1] AND
14871 ;[XWD -1,-1]
14872
14873 041032 200 06 0 00 041613 E20400: MOVE AC,[XWD -1,-1] ;INITIALIZE AC
14874 041033 200 07 0 00 041624 MOVE AC+1,[XWD -1,-2] ;INITIALIZE AC+1
14875 041034 245 06 0 00 777777 ROTC AC,-1 ;*SHIFT/ROTATE COMBINED -1 PLACES
14876 041035 312 06 0 00 041623 CAME AC,[XWD 377777,-1] ;IS RESULT IN AC CORRECT?
14877 041036 003 06 0 00 020401 ER3 AC,20401 ;RESULT IN AC IS INCORRECT
14878 041037 312 07 0 00 041613 CAME AC+1,[XWD -1,-1] ;IS RESULT IN AC+1 CORRECT?
14879 041040 004 07 0 00 020401 ER4 AC+1,20401 ;RESULT IN AC+1 IS INCORRECT
14880 041041 321 10 0 00 041032 JUMPL AC+2,E20400 ;LOOP ON ERROR SWITCH^
14881
14882 ;SHIFT CONNECTIONS TEST
14883 ;TEST AR1 SHRT INP-ONE'S - ROTC AC,-1
14884 ;TEST ABILITY TO ROTATE INTO BIT 1 OF AR
14885 SR2 (205,400000,0,0,0,200000,0,0,0,ROTC,-1)^
14886 ;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
14887 ;DATA SPECIFIED IN [XWD 400000,0] AND [XWD 0,0] -1 BIT POSITIONS AND
14888 ;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD 200000,0] AND
14889 ;[XWD 0,0]
14890
14891 041042 200 06 0 00 041621 E20500: MOVE AC,[XWD 400000,0] ;INITIALIZE AC
14892 041043 200 07 0 00 041612 MOVE AC+1,[XWD 0,0] ;INITIALIZE AC+1
14893 041044 245 06 0 00 777777 ROTC AC,-1 ;*SHIFT/ROTATE COMBINED -1 PLACES
14894 041045 312 06 0 00 041627 CAME AC,[XWD 200000,0] ;IS RESULT IN AC CORRECT?
14895 041046 003 06 0 00 020501 ER3 AC,20501 ;RESULT IN AC IS INCORRECT
14896 041047 312 07 0 00 041612 CAME AC+1,[XWD 0,0] ;IS RESULT IN AC+1 CORRECT?
14897 041050 004 07 0 00 020501 ER4 AC+1,20501 ;RESULT IN AC+1 IS INCORRECT
14898 041051 321 10 0 00 041042 JUMPL AC+2,E20500 ;LOOP ON ERROR SWITCH^
14899
14900 ;SHIFT CONNECTIONS TEST
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 39-1
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - END CONNECTIONS TEST (ROTC) SEQ 0323
14901 ;TEST AR1 SHRT INP-ZERO'S - ROTC AC,-1
14902 ;TEST ABILITY TO ROTATE INTO BIT 1 OF AR
14903 SR2 (206,377777,-1,-1,-1,577777,-1,-1,-1,ROTC,-1)^
14904 ;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
14905 ;DATA SPECIFIED IN [XWD 377777,-1] AND [XWD -1,-1] -1 BIT POSITIONS AND
14906 ;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD 577777,-1] AND
14907 ;[XWD -1,-1]
14908
14909 041052 200 06 0 00 041623 E20600: MOVE AC,[XWD 377777,-1] ;INITIALIZE AC
14910 041053 200 07 0 00 041613 MOVE AC+1,[XWD -1,-1] ;INITIALIZE AC+1
14911 041054 245 06 0 00 777777 ROTC AC,-1 ;*SHIFT/ROTATE COMBINED -1 PLACES
14912 041055 312 06 0 00 041631 CAME AC,[XWD 577777,-1] ;IS RESULT IN AC CORRECT?
14913 041056 003 06 0 00 020601 ER3 AC,20601 ;RESULT IN AC IS INCORRECT
14914 041057 312 07 0 00 041613 CAME AC+1,[XWD -1,-1] ;IS RESULT IN AC+1 CORRECT?
14915 041060 004 07 0 00 020601 ER4 AC+1,20601 ;RESULT IN AC+1 IS INCORRECT
14916 041061 321 10 0 00 041052 JUMPL AC+2,E20600 ;LOOP ON ERROR SWITCH^
14917 PAGE
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 39-2
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - END CONNECTIONS TEST (ROTC) SEQ 0324
14918 ;SHIFT CONNECTIONS TEST
14919 ;TEST AR34 SHRT INP-ONE'S - ROTC AC,-1
14920 ;TEST ABILITY TO ROTATE INTO BIT 34 OF AR
14921 SR2 (207,0,4,0,0,0,2,0,0,ROTC,-1)^
14922 ;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
14923 ;DATA SPECIFIED IN [XWD 0,4] AND [XWD 0,0] -1 BIT POSITIONS AND
14924 ;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD 0,2] AND
14925 ;[XWD 0,0]
14926
14927 041062 200 06 0 00 041617 E20700: MOVE AC,[XWD 0,4] ;INITIALIZE AC
14928 041063 200 07 0 00 041612 MOVE AC+1,[XWD 0,0] ;INITIALIZE AC+1
14929 041064 245 06 0 00 777777 ROTC AC,-1 ;*SHIFT/ROTATE COMBINED -1 PLACES
14930 041065 312 06 0 00 041620 CAME AC,[XWD 0,2] ;IS RESULT IN AC CORRECT?
14931 041066 003 06 0 00 020701 ER3 AC,20701 ;RESULT IN AC IS INCORRECT
14932 041067 312 07 0 00 041612 CAME AC+1,[XWD 0,0] ;IS RESULT IN AC+1 CORRECT?
14933 041070 004 07 0 00 020701 ER4 AC+1,20701 ;RESULT IN AC+1 IS INCORRECT
14934 041071 321 10 0 00 041062 JUMPL AC+2,E20700 ;LOOP ON ERROR SWITCH^
14935
14936 ;SHIFT CONNECTIONS TEST
14937 ;TEST AR34 SHRT INP-ZERO'S - ROTC AC,-1
14938 ;TEST ABILITY TO ROTATE INTO BIT 34 OF AR
14939 SR2 (210,-1,-5,-1,-1,-1,-3,-1,-1,ROTC,-1)^
14940 ;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
14941 ;DATA SPECIFIED IN [XWD -1,-5] AND [XWD -1,-1] -1 BIT POSITIONS AND
14942 ;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD -1,-3] AND
14943 ;[XWD -1,-1]
14944
14945 041072 200 06 0 00 041632 E21000: MOVE AC,[XWD -1,-5] ;INITIALIZE AC
14946 041073 200 07 0 00 041613 MOVE AC+1,[XWD -1,-1] ;INITIALIZE AC+1
14947 041074 245 06 0 00 777777 ROTC AC,-1 ;*SHIFT/ROTATE COMBINED -1 PLACES
14948 041075 312 06 0 00 041625 CAME AC,[XWD -1,-3] ;IS RESULT IN AC CORRECT?
14949 041076 003 06 0 00 021001 ER3 AC,21001 ;RESULT IN AC IS INCORRECT
14950 041077 312 07 0 00 041613 CAME AC+1,[XWD -1,-1] ;IS RESULT IN AC+1 CORRECT?
14951 041100 004 07 0 00 021001 ER4 AC+1,21001 ;RESULT IN AC+1 IS INCORRECT
14952 041101 321 10 0 00 041072 JUMPL AC+2,E21000 ;LOOP ON ERROR SWITCH^
14953
14954 ;SHIFT CONNECTIONS TEST
14955 ;TEST AR35 SHRT INP-ONE'S - ROTC AC,-1
14956 ;TEST ABILITY TO ROTATE INTO BIT 35 OF AR
14957 SR2 (211,0,2,0,0,0,1,0,0,ROTC,-1)^
14958 ;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
14959 ;DATA SPECIFIED IN [XWD 0,2] AND [XWD 0,0] -1 BIT POSITIONS AND
14960 ;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD 0,1] AND
14961 ;[XWD 0,0]
14962
14963 041102 200 06 0 00 041620 E21100: MOVE AC,[XWD 0,2] ;INITIALIZE AC
14964 041103 200 07 0 00 041612 MOVE AC+1,[XWD 0,0] ;INITIALIZE AC+1
14965 041104 245 06 0 00 777777 ROTC AC,-1 ;*SHIFT/ROTATE COMBINED -1 PLACES
14966 041105 312 06 0 00 041622 CAME AC,[XWD 0,1] ;IS RESULT IN AC CORRECT?
14967 041106 003 06 0 00 021101 ER3 AC,21101 ;RESULT IN AC IS INCORRECT
14968 041107 312 07 0 00 041612 CAME AC+1,[XWD 0,0] ;IS RESULT IN AC+1 CORRECT?
14969 041110 004 07 0 00 021101 ER4 AC+1,21101 ;RESULT IN AC+1 IS INCORRECT
14970 041111 321 10 0 00 041102 JUMPL AC+2,E21100 ;LOOP ON ERROR SWITCH^
14971
14972 ;SHIFT CONNECTIONS TEST
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 39-3
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - END CONNECTIONS TEST (ROTC) SEQ 0325
14973 ;TEST AR35 SHRT INP-ZERO'S - ROTC AC,-1
14974 ;TEST ABILITY TO ROTATE INTO BIT 35 OF AR
14975 SR2 (212,-1,-3,-1,-1,-1,-2,-1,-1,ROTC,-1)^
14976 ;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
14977 ;DATA SPECIFIED IN [XWD -1,-3] AND [XWD -1,-1] -1 BIT POSITIONS AND
14978 ;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD -1,-2] AND
14979 ;[XWD -1,-1]
14980
14981 041112 200 06 0 00 041625 E21200: MOVE AC,[XWD -1,-3] ;INITIALIZE AC
14982 041113 200 07 0 00 041613 MOVE AC+1,[XWD -1,-1] ;INITIALIZE AC+1
14983 041114 245 06 0 00 777777 ROTC AC,-1 ;*SHIFT/ROTATE COMBINED -1 PLACES
14984 041115 312 06 0 00 041624 CAME AC,[XWD -1,-2] ;IS RESULT IN AC CORRECT?
14985 041116 003 06 0 00 021201 ER3 AC,21201 ;RESULT IN AC IS INCORRECT
14986 041117 312 07 0 00 041613 CAME AC+1,[XWD -1,-1] ;IS RESULT IN AC+1 CORRECT?
14987 041120 004 07 0 00 021201 ER4 AC+1,21201 ;RESULT IN AC+1 IS INCORRECT
14988 041121 321 10 0 00 041112 JUMPL AC+2,E21200 ;LOOP ON ERROR SWITCH^
14989
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 40
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - END CONNECTIONS TEST (ROTC) SEQ 0326
14990 ;SHIFT CONNECTIONS TEST
14991 ;TEST MQ0 SHRT INP-ONE'S - ROTC AC,-1
14992 ;TEST ABILITY TO ROTATE INTO BIT 0 OF MQ
14993 SR2 (213,0,1,0,0,0,0,400000,0,ROTC,-1)^
14994 ;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
14995 ;DATA SPECIFIED IN [XWD 0,1] AND [XWD 0,0] -1 BIT POSITIONS AND
14996 ;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD 0,0] AND
14997 ;[XWD 400000,0]
14998
14999 041122 200 06 0 00 041622 E21300: MOVE AC,[XWD 0,1] ;INITIALIZE AC
15000 041123 200 07 0 00 041612 MOVE AC+1,[XWD 0,0] ;INITIALIZE AC+1
15001 041124 245 06 0 00 777777 ROTC AC,-1 ;*SHIFT/ROTATE COMBINED -1 PLACES
15002 041125 312 06 0 00 041612 CAME AC,[XWD 0,0] ;IS RESULT IN AC CORRECT?
15003 041126 003 06 0 00 021301 ER3 AC,21301 ;RESULT IN AC IS INCORRECT
15004 041127 312 07 0 00 041621 CAME AC+1,[XWD 400000,0] ;IS RESULT IN AC+1 CORRECT?
15005 041130 004 07 0 00 021301 ER4 AC+1,21301 ;RESULT IN AC+1 IS INCORRECT
15006 041131 321 10 0 00 041122 JUMPL AC+2,E21300 ;LOOP ON ERROR SWITCH^
15007
15008 ;SHIFT CONNECTIONS TEST
15009 ;TEST MQ0 SHRT INP-ZERO'S - ROTC AC,-1
15010 ;TEST ABILITY TO ROTATE INTO BIT 0 OF MQ
15011 SR2 (214,-1,-2,-1,-1,-1,-1,377777,-1,ROTC,-1)^
15012 ;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
15013 ;DATA SPECIFIED IN [XWD -1,-2] AND [XWD -1,-1] -1 BIT POSITIONS AND
15014 ;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD -1,-1] AND
15015 ;[XWD 377777,-1]
15016
15017 041132 200 06 0 00 041624 E21400: MOVE AC,[XWD -1,-2] ;INITIALIZE AC
15018 041133 200 07 0 00 041613 MOVE AC+1,[XWD -1,-1] ;INITIALIZE AC+1
15019 041134 245 06 0 00 777777 ROTC AC,-1 ;*SHIFT/ROTATE COMBINED -1 PLACES
15020 041135 312 06 0 00 041613 CAME AC,[XWD -1,-1] ;IS RESULT IN AC CORRECT?
15021 041136 003 06 0 00 021401 ER3 AC,21401 ;RESULT IN AC IS INCORRECT
15022 041137 312 07 0 00 041623 CAME AC+1,[XWD 377777,-1] ;IS RESULT IN AC+1 CORRECT?
15023 041140 004 07 0 00 021401 ER4 AC+1,21401 ;RESULT IN AC+1 IS INCORRECT
15024 041141 321 10 0 00 041132 JUMPL AC+2,E21400 ;LOOP ON ERROR SWITCH^
15025
15026 ;SHIFT CONNECTIONS TEST
15027 ;TEST MQ1 SHRT INP-ONE'S - ROTC AC,-1
15028 ;TEST ABILITY TO ROTATE INTO BIT 1 OF MQ
15029 SR2 (215,0,0,400000,0,0,0,200000,0,ROTC,-1)^
15030 ;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
15031 ;DATA SPECIFIED IN [XWD 0,0] AND [XWD 400000,0] -1 BIT POSITIONS AND
15032 ;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD 0,0] AND
15033 ;[XWD 200000,0]
15034
15035 041142 200 06 0 00 041612 E21500: MOVE AC,[XWD 0,0] ;INITIALIZE AC
15036 041143 200 07 0 00 041621 MOVE AC+1,[XWD 400000,0] ;INITIALIZE AC+1
15037 041144 245 06 0 00 777777 ROTC AC,-1 ;*SHIFT/ROTATE COMBINED -1 PLACES
15038 041145 312 06 0 00 041612 CAME AC,[XWD 0,0] ;IS RESULT IN AC CORRECT?
15039 041146 003 06 0 00 021501 ER3 AC,21501 ;RESULT IN AC IS INCORRECT
15040 041147 312 07 0 00 041627 CAME AC+1,[XWD 200000,0] ;IS RESULT IN AC+1 CORRECT?
15041 041150 004 07 0 00 021501 ER4 AC+1,21501 ;RESULT IN AC+1 IS INCORRECT
15042 041151 321 10 0 00 041142 JUMPL AC+2,E21500 ;LOOP ON ERROR SWITCH^
15043
15044 ;SHIFT CONNECTIONS TEST
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 40-1
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - END CONNECTIONS TEST (ROTC) SEQ 0327
15045 ;TEST MQ1 SHRT INP-ZERO'S - ROTC AC,-1
15046 ;TEST ABILITY TO ROTATE INTO BIT 1 OF MQ
15047 SR2 (216,-1,-1,377777,-1,-1,-1,577777,-1,ROTC,-1)^
15048 ;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
15049 ;DATA SPECIFIED IN [XWD -1,-1] AND [XWD 377777,-1] -1 BIT POSITIONS AND
15050 ;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD -1,-1] AND
15051 ;[XWD 577777,-1]
15052
15053 041152 200 06 0 00 041613 E21600: MOVE AC,[XWD -1,-1] ;INITIALIZE AC
15054 041153 200 07 0 00 041623 MOVE AC+1,[XWD 377777,-1] ;INITIALIZE AC+1
15055 041154 245 06 0 00 777777 ROTC AC,-1 ;*SHIFT/ROTATE COMBINED -1 PLACES
15056 041155 312 06 0 00 041613 CAME AC,[XWD -1,-1] ;IS RESULT IN AC CORRECT?
15057 041156 003 06 0 00 021601 ER3 AC,21601 ;RESULT IN AC IS INCORRECT
15058 041157 312 07 0 00 041631 CAME AC+1,[XWD 577777,-1] ;IS RESULT IN AC+1 CORRECT?
15059 041160 004 07 0 00 021601 ER4 AC+1,21601 ;RESULT IN AC+1 IS INCORRECT
15060 041161 321 10 0 00 041152 JUMPL AC+2,E21600 ;LOOP ON ERROR SWITCH^
15061 PAGE
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 40-2
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - END CONNECTIONS TEST (ROTC) SEQ 0328
15062 ;SHIFT CONNECTIONS TEST
15063 ;TEST MQ34 SHRT INP-ONE'S - ROTC AC,-1
15064 ;TEST ABILITY TO ROTATE INTO BIT 34 OF MQ
15065 SR2 (217,0,0,0,4,0,0,0,2,ROTC,-1)^
15066 ;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
15067 ;DATA SPECIFIED IN [XWD 0,0] AND [XWD 0,4] -1 BIT POSITIONS AND
15068 ;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD 0,0] AND
15069 ;[XWD 0,2]
15070
15071 041162 200 06 0 00 041612 E21700: MOVE AC,[XWD 0,0] ;INITIALIZE AC
15072 041163 200 07 0 00 041617 MOVE AC+1,[XWD 0,4] ;INITIALIZE AC+1
15073 041164 245 06 0 00 777777 ROTC AC,-1 ;*SHIFT/ROTATE COMBINED -1 PLACES
15074 041165 312 06 0 00 041612 CAME AC,[XWD 0,0] ;IS RESULT IN AC CORRECT?
15075 041166 003 06 0 00 021701 ER3 AC,21701 ;RESULT IN AC IS INCORRECT
15076 041167 312 07 0 00 041620 CAME AC+1,[XWD 0,2] ;IS RESULT IN AC+1 CORRECT?
15077 041170 004 07 0 00 021701 ER4 AC+1,21701 ;RESULT IN AC+1 IS INCORRECT
15078 041171 321 10 0 00 041162 JUMPL AC+2,E21700 ;LOOP ON ERROR SWITCH^
15079
15080 ;SHIFT CONNECTIONS TEST
15081 ;TEST MQ34 SHRT INP-ZERO'S - ROTC AC,-1
15082 ;TEST ABILITY TO ROTATE INTO BIT 34 OF MQ
15083 SR2 (220,-1,-1,-1,-5,-1,-1,-1,-3,ROTC,-1)^
15084 ;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
15085 ;DATA SPECIFIED IN [XWD -1,-1] AND [XWD -1,-5] -1 BIT POSITIONS AND
15086 ;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD -1,-1] AND
15087 ;[XWD -1,-3]
15088
15089 041172 200 06 0 00 041613 E22000: MOVE AC,[XWD -1,-1] ;INITIALIZE AC
15090 041173 200 07 0 00 041632 MOVE AC+1,[XWD -1,-5] ;INITIALIZE AC+1
15091 041174 245 06 0 00 777777 ROTC AC,-1 ;*SHIFT/ROTATE COMBINED -1 PLACES
15092 041175 312 06 0 00 041613 CAME AC,[XWD -1,-1] ;IS RESULT IN AC CORRECT?
15093 041176 003 06 0 00 022001 ER3 AC,22001 ;RESULT IN AC IS INCORRECT
15094 041177 312 07 0 00 041625 CAME AC+1,[XWD -1,-3] ;IS RESULT IN AC+1 CORRECT?
15095 041200 004 07 0 00 022001 ER4 AC+1,22001 ;RESULT IN AC+1 IS INCORRECT
15096 041201 321 10 0 00 041172 JUMPL AC+2,E22000 ;LOOP ON ERROR SWITCH^
15097
15098 ;SHIFT CONNECTIONS TEST
15099 ;TEST MQ35 SHRT INP-ONE'S - ROTC AC,-1
15100 ;TEST ABILITY TO ROTATE INTO BIT 35 OF MQ
15101 SR2 (221,0,0,0,2,0,0,0,1,ROTC,-1)^
15102 ;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
15103 ;DATA SPECIFIED IN [XWD 0,0] AND [XWD 0,2] -1 BIT POSITIONS AND
15104 ;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD 0,0] AND
15105 ;[XWD 0,1]
15106
15107 041202 200 06 0 00 041612 E22100: MOVE AC,[XWD 0,0] ;INITIALIZE AC
15108 041203 200 07 0 00 041620 MOVE AC+1,[XWD 0,2] ;INITIALIZE AC+1
15109 041204 245 06 0 00 777777 ROTC AC,-1 ;*SHIFT/ROTATE COMBINED -1 PLACES
15110 041205 312 06 0 00 041612 CAME AC,[XWD 0,0] ;IS RESULT IN AC CORRECT?
15111 041206 003 06 0 00 022101 ER3 AC,22101 ;RESULT IN AC IS INCORRECT
15112 041207 312 07 0 00 041622 CAME AC+1,[XWD 0,1] ;IS RESULT IN AC+1 CORRECT?
15113 041210 004 07 0 00 022101 ER4 AC+1,22101 ;RESULT IN AC+1 IS INCORRECT
15114 041211 321 10 0 00 041202 JUMPL AC+2,E22100 ;LOOP ON ERROR SWITCH^
15115
15116 ;SHIFT CONNECTIONS TEST
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 40-3
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - END CONNECTIONS TEST (ROTC) SEQ 0329
15117 ;TEST MQ35 SHRT INP-ZERO'S - ROTC AC,-1
15118 ;TEST ABILITY TO ROTATE INTO BIT 35 OF MQ
15119 SR2 (222,-1,-1,-1,-3,-1,-1,-1,-2,ROTC,-1)^
15120 ;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
15121 ;DATA SPECIFIED IN [XWD -1,-1] AND [XWD -1,-3] -1 BIT POSITIONS AND
15122 ;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD -1,-1] AND
15123 ;[XWD -1,-2]
15124
15125 041212 200 06 0 00 041613 E22200: MOVE AC,[XWD -1,-1] ;INITIALIZE AC
15126 041213 200 07 0 00 041625 MOVE AC+1,[XWD -1,-3] ;INITIALIZE AC+1
15127 041214 245 06 0 00 777777 ROTC AC,-1 ;*SHIFT/ROTATE COMBINED -1 PLACES
15128 041215 312 06 0 00 041613 CAME AC,[XWD -1,-1] ;IS RESULT IN AC CORRECT?
15129 041216 003 06 0 00 022201 ER3 AC,22201 ;RESULT IN AC IS INCORRECT
15130 041217 312 07 0 00 041624 CAME AC+1,[XWD -1,-2] ;IS RESULT IN AC+1 CORRECT?
15131 041220 004 07 0 00 022201 ER4 AC+1,22201 ;RESULT IN AC+1 IS INCORRECT
15132 041221 321 10 0 00 041212 JUMPL AC+2,E22200 ;LOOP ON ERROR SWITCH^
15133
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 41
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - END CONNECTIONS TEST (ROTC) SEQ 0330
15134 ;SHIFT CONNECTIONS TEST
15135 ;TEST AR0 SHRT INP-ONE'S - ROTC AC,-2
15136 ;TEST ABILITY TO ROTATE INTO BIT 0 OF AR
15137 SR2 (223,0,0,0,2,400000,0,0,0,ROTC,-2)^
15138 ;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
15139 ;DATA SPECIFIED IN [XWD 0,0] AND [XWD 0,2] -2 BIT POSITIONS AND
15140 ;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD 400000,0] AND
15141 ;[XWD 0,0]
15142
15143 041222 200 06 0 00 041612 E22300: MOVE AC,[XWD 0,0] ;INITIALIZE AC
15144 041223 200 07 0 00 041620 MOVE AC+1,[XWD 0,2] ;INITIALIZE AC+1
15145 041224 245 06 0 00 777776 ROTC AC,-2 ;*SHIFT/ROTATE COMBINED -2 PLACES
15146 041225 312 06 0 00 041621 CAME AC,[XWD 400000,0] ;IS RESULT IN AC CORRECT?
15147 041226 003 06 0 00 022301 ER3 AC,22301 ;RESULT IN AC IS INCORRECT
15148 041227 312 07 0 00 041612 CAME AC+1,[XWD 0,0] ;IS RESULT IN AC+1 CORRECT?
15149 041230 004 07 0 00 022301 ER4 AC+1,22301 ;RESULT IN AC+1 IS INCORRECT
15150 041231 321 10 0 00 041222 JUMPL AC+2,E22300 ;LOOP ON ERROR SWITCH^
15151
15152 ;SHIFT CONNECTIONS TEST
15153 ;TEST AR0 SHRT INP-ZERO'S - ROTC AC,-2
15154 ;TEST ABILITY TO ROTATE INTO BIT 0 OF AR
15155 SR2 (224,-1,-1,-1,-3,377777,-1,-1,-1,ROTC,-2)^
15156 ;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
15157 ;DATA SPECIFIED IN [XWD -1,-1] AND [XWD -1,-3] -2 BIT POSITIONS AND
15158 ;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD 377777,-1] AND
15159 ;[XWD -1,-1]
15160
15161 041232 200 06 0 00 041613 E22400: MOVE AC,[XWD -1,-1] ;INITIALIZE AC
15162 041233 200 07 0 00 041625 MOVE AC+1,[XWD -1,-3] ;INITIALIZE AC+1
15163 041234 245 06 0 00 777776 ROTC AC,-2 ;*SHIFT/ROTATE COMBINED -2 PLACES
15164 041235 312 06 0 00 041623 CAME AC,[XWD 377777,-1] ;IS RESULT IN AC CORRECT?
15165 041236 003 06 0 00 022401 ER3 AC,22401 ;RESULT IN AC IS INCORRECT
15166 041237 312 07 0 00 041613 CAME AC+1,[XWD -1,-1] ;IS RESULT IN AC+1 CORRECT?
15167 041240 004 07 0 00 022401 ER4 AC+1,22401 ;RESULT IN AC+1 IS INCORRECT
15168 041241 321 10 0 00 041232 JUMPL AC+2,E22400 ;LOOP ON ERROR SWITCH^
15169
15170 ;SHIFT CONNECTIONS TEST
15171 ;TEST AR1 SHRT INP-ONE'S - ROTC AC,-2
15172 ;TEST ABILITY TO ROTATE INTO BIT 1 OF AR
15173 SR2 (225,0,0,0,1,200000,0,0,0,ROTC,-2)^
15174 ;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
15175 ;DATA SPECIFIED IN [XWD 0,0] AND [XWD 0,1] -2 BIT POSITIONS AND
15176 ;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD 200000,0] AND
15177 ;[XWD 0,0]
15178
15179 041242 200 06 0 00 041612 E22500: MOVE AC,[XWD 0,0] ;INITIALIZE AC
15180 041243 200 07 0 00 041622 MOVE AC+1,[XWD 0,1] ;INITIALIZE AC+1
15181 041244 245 06 0 00 777776 ROTC AC,-2 ;*SHIFT/ROTATE COMBINED -2 PLACES
15182 041245 312 06 0 00 041627 CAME AC,[XWD 200000,0] ;IS RESULT IN AC CORRECT?
15183 041246 003 06 0 00 022501 ER3 AC,22501 ;RESULT IN AC IS INCORRECT
15184 041247 312 07 0 00 041612 CAME AC+1,[XWD 0,0] ;IS RESULT IN AC+1 CORRECT?
15185 041250 004 07 0 00 022501 ER4 AC+1,22501 ;RESULT IN AC+1 IS INCORRECT
15186 041251 321 10 0 00 041242 JUMPL AC+2,E22500 ;LOOP ON ERROR SWITCH^
15187
15188 ;SHIFT CONNECTIONS TEST
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 41-1
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - END CONNECTIONS TEST (ROTC) SEQ 0331
15189 ;TEST AR1 SHRT INP-ZERO'S - ROTC AC,-2
15190 ;TEST ABILITY TO ROTATE INTO BIT 1 OF AR
15191 SR2 (226,-1,-1,-1,-2,577777,-1,-1,-1,ROTC,-2)^
15192 ;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
15193 ;DATA SPECIFIED IN [XWD -1,-1] AND [XWD -1,-2] -2 BIT POSITIONS AND
15194 ;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD 577777,-1] AND
15195 ;[XWD -1,-1]
15196
15197 041252 200 06 0 00 041613 E22600: MOVE AC,[XWD -1,-1] ;INITIALIZE AC
15198 041253 200 07 0 00 041624 MOVE AC+1,[XWD -1,-2] ;INITIALIZE AC+1
15199 041254 245 06 0 00 777776 ROTC AC,-2 ;*SHIFT/ROTATE COMBINED -2 PLACES
15200 041255 312 06 0 00 041631 CAME AC,[XWD 577777,-1] ;IS RESULT IN AC CORRECT?
15201 041256 003 06 0 00 022601 ER3 AC,22601 ;RESULT IN AC IS INCORRECT
15202 041257 312 07 0 00 041613 CAME AC+1,[XWD -1,-1] ;IS RESULT IN AC+1 CORRECT?
15203 041260 004 07 0 00 022601 ER4 AC+1,22601 ;RESULT IN AC+1 IS INCORRECT
15204 041261 321 10 0 00 041252 JUMPL AC+2,E22600 ;LOOP ON ERROR SWITCH^
15205 PAGE
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 41-2
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - END CONNECTIONS TEST (ROTC) SEQ 0332
15206 ;SHIFT CONNECTIONS TEST
15207 ;TEST AR34 SHRT INP-ONE'S - ROTC AC,-2
15208 ;TEST ABILITY TO ROTATE INTO BIT 34 OF AR
15209 SR2 (227,0,10,0,0,0,2,0,0,ROTC,-2)^
15210 ;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
15211 ;DATA SPECIFIED IN [XWD 0,10] AND [XWD 0,0] -2 BIT POSITIONS AND
15212 ;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD 0,2] AND
15213 ;[XWD 0,0]
15214
15215 041262 200 06 0 00 041614 E22700: MOVE AC,[XWD 0,10] ;INITIALIZE AC
15216 041263 200 07 0 00 041612 MOVE AC+1,[XWD 0,0] ;INITIALIZE AC+1
15217 041264 245 06 0 00 777776 ROTC AC,-2 ;*SHIFT/ROTATE COMBINED -2 PLACES
15218 041265 312 06 0 00 041620 CAME AC,[XWD 0,2] ;IS RESULT IN AC CORRECT?
15219 041266 003 06 0 00 022701 ER3 AC,22701 ;RESULT IN AC IS INCORRECT
15220 041267 312 07 0 00 041612 CAME AC+1,[XWD 0,0] ;IS RESULT IN AC+1 CORRECT?
15221 041270 004 07 0 00 022701 ER4 AC+1,22701 ;RESULT IN AC+1 IS INCORRECT
15222 041271 321 10 0 00 041262 JUMPL AC+2,E22700 ;LOOP ON ERROR SWITCH^
15223
15224 ;SHIFT CONNECTIONS TEST
15225 ;TEST AR34 SHRT INP-ZERO'S - ROTC AC,-2
15226 ;TEST ABILITY TO ROTATE INTO BIT 34 OF AR
15227 SR2 (230,-1,-11,-1,-1,-1,-3,-1,-1,ROTC,-2)^
15228 ;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
15229 ;DATA SPECIFIED IN [XWD -1,-11] AND [XWD -1,-1] -2 BIT POSITIONS AND
15230 ;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD -1,-3] AND
15231 ;[XWD -1,-1]
15232
15233 041272 200 06 0 00 041633 E23000: MOVE AC,[XWD -1,-11] ;INITIALIZE AC
15234 041273 200 07 0 00 041613 MOVE AC+1,[XWD -1,-1] ;INITIALIZE AC+1
15235 041274 245 06 0 00 777776 ROTC AC,-2 ;*SHIFT/ROTATE COMBINED -2 PLACES
15236 041275 312 06 0 00 041625 CAME AC,[XWD -1,-3] ;IS RESULT IN AC CORRECT?
15237 041276 003 06 0 00 023001 ER3 AC,23001 ;RESULT IN AC IS INCORRECT
15238 041277 312 07 0 00 041613 CAME AC+1,[XWD -1,-1] ;IS RESULT IN AC+1 CORRECT?
15239 041300 004 07 0 00 023001 ER4 AC+1,23001 ;RESULT IN AC+1 IS INCORRECT
15240 041301 321 10 0 00 041272 JUMPL AC+2,E23000 ;LOOP ON ERROR SWITCH^
15241
15242 ;SHIFT CONNECTIONS TEST
15243 ;TEST AR35 SHRT INP-ONE'S - ROTC AC,-2
15244 ;TEST ABILITY TO ROTATE INTO BIT 35 OF AR
15245 SR2 (231,0,4,0,0,0,1,0,0,ROTC,-2)^
15246 ;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
15247 ;DATA SPECIFIED IN [XWD 0,4] AND [XWD 0,0] -2 BIT POSITIONS AND
15248 ;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD 0,1] AND
15249 ;[XWD 0,0]
15250
15251 041302 200 06 0 00 041617 E23100: MOVE AC,[XWD 0,4] ;INITIALIZE AC
15252 041303 200 07 0 00 041612 MOVE AC+1,[XWD 0,0] ;INITIALIZE AC+1
15253 041304 245 06 0 00 777776 ROTC AC,-2 ;*SHIFT/ROTATE COMBINED -2 PLACES
15254 041305 312 06 0 00 041622 CAME AC,[XWD 0,1] ;IS RESULT IN AC CORRECT?
15255 041306 003 06 0 00 023101 ER3 AC,23101 ;RESULT IN AC IS INCORRECT
15256 041307 312 07 0 00 041612 CAME AC+1,[XWD 0,0] ;IS RESULT IN AC+1 CORRECT?
15257 041310 004 07 0 00 023101 ER4 AC+1,23101 ;RESULT IN AC+1 IS INCORRECT
15258 041311 321 10 0 00 041302 JUMPL AC+2,E23100 ;LOOP ON ERROR SWITCH^
15259
15260 ;SHIFT CONNECTIONS TEST
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 41-3
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - END CONNECTIONS TEST (ROTC) SEQ 0333
15261 ;TEST AR35 SHRT INP-ZERO'S - ROTC AC,-2
15262 ;TEST ABILITY TO ROTATE INTO BIT 35 OF AR
15263 SR2 (232,-1,-5,-1,-1,-1,-2,-1,-1,ROTC,-2)^
15264 ;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
15265 ;DATA SPECIFIED IN [XWD -1,-5] AND [XWD -1,-1] -2 BIT POSITIONS AND
15266 ;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD -1,-2] AND
15267 ;[XWD -1,-1]
15268
15269 041312 200 06 0 00 041632 E23200: MOVE AC,[XWD -1,-5] ;INITIALIZE AC
15270 041313 200 07 0 00 041613 MOVE AC+1,[XWD -1,-1] ;INITIALIZE AC+1
15271 041314 245 06 0 00 777776 ROTC AC,-2 ;*SHIFT/ROTATE COMBINED -2 PLACES
15272 041315 312 06 0 00 041624 CAME AC,[XWD -1,-2] ;IS RESULT IN AC CORRECT?
15273 041316 003 06 0 00 023201 ER3 AC,23201 ;RESULT IN AC IS INCORRECT
15274 041317 312 07 0 00 041613 CAME AC+1,[XWD -1,-1] ;IS RESULT IN AC+1 CORRECT?
15275 041320 004 07 0 00 023201 ER4 AC+1,23201 ;RESULT IN AC+1 IS INCORRECT
15276 041321 321 10 0 00 041312 JUMPL AC+2,E23200 ;LOOP ON ERROR SWITCH^
15277
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 42
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - END CONNECTIONS TEST (ROTC) SEQ 0334
15278 ;SHIFT CONNECTIONS TEST
15279 ;TEST MQ0 SHRT INP-ONE'S - ROTC AC,-2
15280 ;TEST ABILITY TO ROTATE INTO BIT 0 OF MQ
15281 SR2 (233,0,2,0,0,0,0,400000,0,ROTC,-2)^
15282 ;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
15283 ;DATA SPECIFIED IN [XWD 0,2] AND [XWD 0,0] -2 BIT POSITIONS AND
15284 ;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD 0,0] AND
15285 ;[XWD 400000,0]
15286
15287 041322 200 06 0 00 041620 E23300: MOVE AC,[XWD 0,2] ;INITIALIZE AC
15288 041323 200 07 0 00 041612 MOVE AC+1,[XWD 0,0] ;INITIALIZE AC+1
15289 041324 245 06 0 00 777776 ROTC AC,-2 ;*SHIFT/ROTATE COMBINED -2 PLACES
15290 041325 312 06 0 00 041612 CAME AC,[XWD 0,0] ;IS RESULT IN AC CORRECT?
15291 041326 003 06 0 00 023301 ER3 AC,23301 ;RESULT IN AC IS INCORRECT
15292 041327 312 07 0 00 041621 CAME AC+1,[XWD 400000,0] ;IS RESULT IN AC+1 CORRECT?
15293 041330 004 07 0 00 023301 ER4 AC+1,23301 ;RESULT IN AC+1 IS INCORRECT
15294 041331 321 10 0 00 041322 JUMPL AC+2,E23300 ;LOOP ON ERROR SWITCH^
15295
15296 ;SHIFT CONNECTIONS TEST
15297 ;TEST MQ0 SHRT INP-ZERO'S - ROTC AC,-2
15298 ;TEST ABILITY TO ROTATE INTO BIT 0 OF MQ
15299 SR2 (234,-1,-3,-1,-1,-1,-1,377777,-1,ROTC,-2)^
15300 ;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
15301 ;DATA SPECIFIED IN [XWD -1,-3] AND [XWD -1,-1] -2 BIT POSITIONS AND
15302 ;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD -1,-1] AND
15303 ;[XWD 377777,-1]
15304
15305 041332 200 06 0 00 041625 E23400: MOVE AC,[XWD -1,-3] ;INITIALIZE AC
15306 041333 200 07 0 00 041613 MOVE AC+1,[XWD -1,-1] ;INITIALIZE AC+1
15307 041334 245 06 0 00 777776 ROTC AC,-2 ;*SHIFT/ROTATE COMBINED -2 PLACES
15308 041335 312 06 0 00 041613 CAME AC,[XWD -1,-1] ;IS RESULT IN AC CORRECT?
15309 041336 003 06 0 00 023401 ER3 AC,23401 ;RESULT IN AC IS INCORRECT
15310 041337 312 07 0 00 041623 CAME AC+1,[XWD 377777,-1] ;IS RESULT IN AC+1 CORRECT?
15311 041340 004 07 0 00 023401 ER4 AC+1,23401 ;RESULT IN AC+1 IS INCORRECT
15312 041341 321 10 0 00 041332 JUMPL AC+2,E23400 ;LOOP ON ERROR SWITCH^
15313
15314 ;SHIFT CONNECTIONS TEST
15315 ;TEST MQ1 SHRT INP-ONE'S - ROTC AC,-2
15316 ;TEST ABILITY TO ROTATE INTO BIT 1 OF MQ
15317 SR2 (235,0,1,0,0,0,0,200000,0,ROTC,-2)^
15318 ;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
15319 ;DATA SPECIFIED IN [XWD 0,1] AND [XWD 0,0] -2 BIT POSITIONS AND
15320 ;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD 0,0] AND
15321 ;[XWD 200000,0]
15322
15323 041342 200 06 0 00 041622 E23500: MOVE AC,[XWD 0,1] ;INITIALIZE AC
15324 041343 200 07 0 00 041612 MOVE AC+1,[XWD 0,0] ;INITIALIZE AC+1
15325 041344 245 06 0 00 777776 ROTC AC,-2 ;*SHIFT/ROTATE COMBINED -2 PLACES
15326 041345 312 06 0 00 041612 CAME AC,[XWD 0,0] ;IS RESULT IN AC CORRECT?
15327 041346 003 06 0 00 023501 ER3 AC,23501 ;RESULT IN AC IS INCORRECT
15328 041347 312 07 0 00 041627 CAME AC+1,[XWD 200000,0] ;IS RESULT IN AC+1 CORRECT?
15329 041350 004 07 0 00 023501 ER4 AC+1,23501 ;RESULT IN AC+1 IS INCORRECT
15330 041351 321 10 0 00 041342 JUMPL AC+2,E23500 ;LOOP ON ERROR SWITCH^
15331
15332 ;SHIFT CONNECTIONS TEST
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 42-1
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - END CONNECTIONS TEST (ROTC) SEQ 0335
15333 ;TEST MQ1 SHRT INP-ZERO'S - ROTC AC,-2
15334 ;TEST ABILITY TO ROTATE INTO BIT 1 OF MQ
15335 SR2 (236,-1,-2,-1,-1,-1,-1,577777,-1,ROTC,-2)^
15336 ;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
15337 ;DATA SPECIFIED IN [XWD -1,-2] AND [XWD -1,-1] -2 BIT POSITIONS AND
15338 ;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD -1,-1] AND
15339 ;[XWD 577777,-1]
15340
15341 041352 200 06 0 00 041624 E23600: MOVE AC,[XWD -1,-2] ;INITIALIZE AC
15342 041353 200 07 0 00 041613 MOVE AC+1,[XWD -1,-1] ;INITIALIZE AC+1
15343 041354 245 06 0 00 777776 ROTC AC,-2 ;*SHIFT/ROTATE COMBINED -2 PLACES
15344 041355 312 06 0 00 041613 CAME AC,[XWD -1,-1] ;IS RESULT IN AC CORRECT?
15345 041356 003 06 0 00 023601 ER3 AC,23601 ;RESULT IN AC IS INCORRECT
15346 041357 312 07 0 00 041631 CAME AC+1,[XWD 577777,-1] ;IS RESULT IN AC+1 CORRECT?
15347 041360 004 07 0 00 023601 ER4 AC+1,23601 ;RESULT IN AC+1 IS INCORRECT
15348 041361 321 10 0 00 041352 JUMPL AC+2,E23600 ;LOOP ON ERROR SWITCH^
15349 PAGE
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 42-2
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - END CONNECTIONS TEST (ROTC) SEQ 0336
15350 ;SHIFT CONNECTIONS TEST
15351 ;TEST MQ34 SHRT INP-ONE'S - ROTC AC,-2
15352 ;TEST ABILITY TO ROTATE INTO BIT 34 OF MQ
15353 SR2 (237,0,0,0,10,0,0,0,2,ROTC,-2)^
15354 ;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
15355 ;DATA SPECIFIED IN [XWD 0,0] AND [XWD 0,10] -2 BIT POSITIONS AND
15356 ;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD 0,0] AND
15357 ;[XWD 0,2]
15358
15359 041362 200 06 0 00 041612 E23700: MOVE AC,[XWD 0,0] ;INITIALIZE AC
15360 041363 200 07 0 00 041614 MOVE AC+1,[XWD 0,10] ;INITIALIZE AC+1
15361 041364 245 06 0 00 777776 ROTC AC,-2 ;*SHIFT/ROTATE COMBINED -2 PLACES
15362 041365 312 06 0 00 041612 CAME AC,[XWD 0,0] ;IS RESULT IN AC CORRECT?
15363 041366 003 06 0 00 023701 ER3 AC,23701 ;RESULT IN AC IS INCORRECT
15364 041367 312 07 0 00 041620 CAME AC+1,[XWD 0,2] ;IS RESULT IN AC+1 CORRECT?
15365 041370 004 07 0 00 023701 ER4 AC+1,23701 ;RESULT IN AC+1 IS INCORRECT
15366 041371 321 10 0 00 041362 JUMPL AC+2,E23700 ;LOOP ON ERROR SWITCH^
15367
15368 ;SHIFT CONNECTIONS TEST
15369 ;TEST MQ34 SHRT INP-ZERO'S - ROTC AC,-2
15370 ;TEST ABILITY TO ROTATE INTO BIT 34 OF MQ
15371 SR2 (240,-1,-1,-1,-11,-1,-1,-1,-3,ROTC,-2)^
15372 ;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
15373 ;DATA SPECIFIED IN [XWD -1,-1] AND [XWD -1,-11] -2 BIT POSITIONS AND
15374 ;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD -1,-1] AND
15375 ;[XWD -1,-3]
15376
15377 041372 200 06 0 00 041613 E24000: MOVE AC,[XWD -1,-1] ;INITIALIZE AC
15378 041373 200 07 0 00 041633 MOVE AC+1,[XWD -1,-11] ;INITIALIZE AC+1
15379 041374 245 06 0 00 777776 ROTC AC,-2 ;*SHIFT/ROTATE COMBINED -2 PLACES
15380 041375 312 06 0 00 041613 CAME AC,[XWD -1,-1] ;IS RESULT IN AC CORRECT?
15381 041376 003 06 0 00 024001 ER3 AC,24001 ;RESULT IN AC IS INCORRECT
15382 041377 312 07 0 00 041625 CAME AC+1,[XWD -1,-3] ;IS RESULT IN AC+1 CORRECT?
15383 041400 004 07 0 00 024001 ER4 AC+1,24001 ;RESULT IN AC+1 IS INCORRECT
15384 041401 321 10 0 00 041372 JUMPL AC+2,E24000 ;LOOP ON ERROR SWITCH^
15385
15386 ;SHIFT CONNECTIONS TEST
15387 ;TEST MQ35 SHRT INP-ONE'S - ROTC AC,-2
15388 ;TEST ABILITY TO ROTATE INTO BIT 35 OF MQ
15389 SR2 (241,0,0,0,4,0,0,0,1,ROTC,-2)^
15390 ;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
15391 ;DATA SPECIFIED IN [XWD 0,0] AND [XWD 0,4] -2 BIT POSITIONS AND
15392 ;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD 0,0] AND
15393 ;[XWD 0,1]
15394
15395 041402 200 06 0 00 041612 E24100: MOVE AC,[XWD 0,0] ;INITIALIZE AC
15396 041403 200 07 0 00 041617 MOVE AC+1,[XWD 0,4] ;INITIALIZE AC+1
15397 041404 245 06 0 00 777776 ROTC AC,-2 ;*SHIFT/ROTATE COMBINED -2 PLACES
15398 041405 312 06 0 00 041612 CAME AC,[XWD 0,0] ;IS RESULT IN AC CORRECT?
15399 041406 003 06 0 00 024101 ER3 AC,24101 ;RESULT IN AC IS INCORRECT
15400 041407 312 07 0 00 041622 CAME AC+1,[XWD 0,1] ;IS RESULT IN AC+1 CORRECT?
15401 041410 004 07 0 00 024101 ER4 AC+1,24101 ;RESULT IN AC+1 IS INCORRECT
15402 041411 321 10 0 00 041402 JUMPL AC+2,E24100 ;LOOP ON ERROR SWITCH^
15403
15404 ;SHIFT CONNECTIONS TEST
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 42-3
DSKAI1 MAC 29-Mar-78 08:41 DIAGNOSTIC SECTION - END CONNECTIONS TEST (ROTC) SEQ 0337
15405 ;TEST MQ35 SHRT INP-ZERO'S - ROTC AC,-2
15406 ;TEST ABILITY TO ROTATE INTO BIT 35 OF MQ
15407 SR2 (242,-1,-1,-1,-5,-1,-1,-1,-2,ROTC,-2)^
15408 ;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
15409 ;DATA SPECIFIED IN [XWD -1,-1] AND [XWD -1,-5] -2 BIT POSITIONS AND
15410 ;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD -1,-1] AND
15411 ;[XWD -1,-2]
15412
15413 041412 200 06 0 00 041613 E24200: MOVE AC,[XWD -1,-1] ;INITIALIZE AC
15414 041413 200 07 0 00 041632 MOVE AC+1,[XWD -1,-5] ;INITIALIZE AC+1
15415 041414 245 06 0 00 777776 ROTC AC,-2 ;*SHIFT/ROTATE COMBINED -2 PLACES
15416 041415 312 06 0 00 041613 CAME AC,[XWD -1,-1] ;IS RESULT IN AC CORRECT?
15417 041416 003 06 0 00 024201 ER3 AC,24201 ;RESULT IN AC IS INCORRECT
15418 041417 312 07 0 00 041624 CAME AC+1,[XWD -1,-2] ;IS RESULT IN AC+1 CORRECT?
15419 041420 004 07 0 00 024201 ER4 AC+1,24201 ;RESULT IN AC+1 IS INCORRECT
15420 041421 321 10 0 00 041412 JUMPL AC+2,E24200 ;LOOP ON ERROR SWITCH^
15421
15422 041422 254 00 0 00 030057 JRST BEGEND
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 1
UUOERR KSM 28-Mar-78 11:17 *UUOERR* OLD-UUO ERROR HANDLER SUBROUTINE, MARCH 1978 SEQ 0338
15423 SUBTTL *UUOERR* OLD-UUO ERROR HANDLER SUBROUTINE, MARCH 1978
15424
15425 ;THIS SUBROUTINE PROVIDES ERROR REPORTING THRU THE USE OF UUO'S.
15426
15427 041423 202 00 0 00 041771 ERRMES: MOVEM 0,%ERAC0# ;SAVE AC0
15428 041424 202 01 0 00 041772 MOVEM 1,%ERAC1# ;SAVE AC1
15429 041425 202 02 0 00 041773 MOVEM 2,%ERAC2# ;SAVE AC2
15430 041426 350 00 0 00 030053 AOS ERRTLS ;INCREMENT ERROR TOTALS
15431 041427 550 00 0 00 030114 HRRZ 0,$SVUPC ;GET PC OF UUO
15432 041430 316 00 0 00 030052 CAMN 0,ERRPC ;PC = PC OF LAST ERROR ?
15433 041431 350 00 0 00 041766 AOS MICNT# ;YES, ADD 1 TO ERROR COUNT
15434 041432 200 00 0 00 041766 MOVE 0,MICNT
15435 041433 504 00 0 00 030114 HRL 0,$SVUPC
15436 041434 402 00 0 00 041767 SETZM PROCED# ;CLEAR PROCEED FLAG
15437 041435 037 10 0 00 000002 SWITCH
15438 041436 603 00 0 00 040000 TLNE NOPNT ;PRINTOUT ?
15439 041437 254 00 0 00 041551 JRST %ERRS1 ;NO, RESTORE AC'S AND RETURN
15440 041440 200 01 0 00 030113 MOVE 1,$SVUUO
15441 041441 242 01 0 00 777745 LSH 1,-^D27
15442 041442 202 01 0 00 041770 MOVEM 1,%ACS1A# ;SAVE UUO NUMBER
15443 041443 200 00 0 00 041771 MOVE 0,%ERAC0
15444 041444 200 01 0 00 041772 MOVE 1,%ERAC1
15445 041445 335 00 1 00 041765 SKIPGE @ERRLOP ;ERR LOOP AC > OR = 0 ?
15446 041446 254 00 0 00 041603 JRST %ERRS4 ;NO, SEE IF PRINT ALL
15447 041447 402 00 0 00 041766 %ERMS1: SETZM MICNT ;CLEAR ERROR COUNT
15448 041450 331 00 0 00 030043 SKIPL MONCTL ;DIAG MON OR SYS EXER ?
15449 041451 254 00 0 00 041455 JRST .+4 ;NO, DON'T NEED TITLE
15450 041452 336 00 0 00 041774 SKIPN %ERFST# ;FIRST ERROR ?
15451 041453 037 04 0 00 000002 PNTNM ;YES, PRINT PROGRAM TITLE
15452 041454 476 00 0 00 041774 SETOM %ERFST
15453 041455 336 00 0 00 030047 SKIPN PASCNT ;FIRST PASS ?
15454 041456 254 00 0 00 041462 JRST .+4 ;YES
15455 PMSG <^TEST PASS COUNT = >^
15456 041457 037 02 0 00 041646 PSIXM [SIXBIT\^TEST PASS COUNT = _\]^
15457 041460 200 00 0 00 030047 MOVE PASCNT
15458 041461 037 15 0 00 000000 PNTDEC
15459 PMSG <^PC = >^
15460 041462 037 02 0 00 041652 PSIXM [SIXBIT\^PC = _\]^
15461 041463 550 00 0 00 030114 HRRZ 0,$SVUPC ;GET PC OF UUO
15462 041464 202 00 0 00 030052 MOVEM 0,ERRPC ;SAVE FOR COMPARE
15463 041465 037 06 0 00 000000 PNT6 ;PRINT UUO ADDRESS
15464 XLIST
15465 IFDEF ERDIAG,<LIST
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 2
UUOERR KSM 28-Mar-78 11:17 *UUOERR* OLD-UUO ERROR HANDLER SUBROUTINE, MARCH 1978 SEQ 0339
15466 ;DIAGNOSTIC FORMAT ERROR PRINTER
15467
15468 ;PRINT RESULT
15469
15470 041466 %ERMS2: PMSG <^RESULT = >^
15471 041466 037 02 0 00 041654 PSIXM [SIXBIT\^RESULT = _\]^
15472 041467 200 01 0 00 030113 MOVE 1,$SVUUO ;GET AC # OF UUO
15473 041470 242 01 0 00 777751 LSH 1,-27
15474 041471 405 01 0 00 000017 ANDI 1,17
15475 041472 200 00 0 01 000000 MOVE 0,(1) ;GET C(AC)
15476 041473 307 01 0 00 000001 CAIG 1,1 ;IS AC # = TO SAVE AC ?
15477 041474 200 00 0 01 041771 MOVE 0,%ERAC0(1) ;YES, GET SAVED AC
15478 041475 037 13 0 00 000000 PNTHW ;PRINT C(AC)
15479
15480 041476 200 00 0 00 030046 MOVE CONSW
15481 041477 603 00 0 00 000200 TLNE TXTINH ;PRINT FAILURE DES AND FLT NBR ?
15482 041500 254 00 0 00 041547 JRST %ERMORE ;NO, RESTORE AC'S ETC.
15483
15484 ;PRINT FAILURE DESCRIPTOR
15485
15486 041501 200 01 0 00 041770 MOVE 1,%ACS1A ;GET UUO NUMBER
15487 041502 307 01 0 00 000001 CAIG 1,1 ;PRINT DESCRIPTOR ?
15488 041503 254 00 0 00 041507 JRST %ERMS3 ;NO, JUST PRINT FAULT NUMBER
15489 041504 037 00 0 00 030242 PCRL
15490 041505 200 00 0 01 041533 MOVE %FLTTB(1)
15491 041506 037 17 0 00 000000 PNTAL ;PRINT FAULT DESCRIPTOR
15492
15493 ;PRINT FAULT NUMBER
15494
15495 041507 %ERMS3: PMSG <^FAULT NUMBER = >^
15496 041507 037 02 0 00 041656 PSIXM [SIXBIT\^FAULT NUMBER = _\]^
15497 041510 201 00 0 00 041532 MOVEI TLET
15498 041511 037 00 0 00 000000 PNTA ;PRINT TEST LETTER
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 3
UUOERR KSM 28-Mar-78 11:17 *UUOERR* OLD-UUO ERROR HANDLER SUBROUTINE, MARCH 1978 SEQ 0340
15499
15500 041512 550 00 0 00 030113 HRRZ $SVUUO
15501 041513 602 00 0 00 700000 TRNE 700000
15502 041514 254 00 0 00 041530 JRST %ER6X
15503 041515 602 00 0 00 070000 TRNE 070000
15504 041516 254 00 0 00 041526 JRST %ER5X
15505 041517 602 00 0 00 007000 TRNE 007000
15506 041520 254 00 0 00 041524 JRST %ER4X
15507 041521 037 03 0 00 000000 PNT3 ;PRINT FAULT NUMBER
15508 041522 037 00 0 00 030242 %ER7X: PCRL
15509 041523 254 00 0 00 041547 JRST %ERMORE
15510
15511 041524 037 04 0 00 000000 %ER4X: PNT4
15512 041525 254 00 0 00 041522 JRST %ER7X
15513 041526 037 05 0 00 000000 %ER5X: PNT5
15514 041527 254 00 0 00 041522 JRST %ER7X
15515 041530 037 06 0 00 000000 %ER6X: PNT6
15516 041531 254 00 0 00 041522 JRST %ER7X
15517
15518 ;FAILURE DESCRIPTORS
15519
15520 041532 000000 000000 TLET: 0 ;TEST LETTER
15521 041533 000000 000000 %FLTTB: 0 ;DESCRIPTOR TABLE
15522 041534 000000 041612 %NODES: [0] ;NO DESCRIPTOR
15523 041535 000000 041612 SPDES: [0] ;SPECIAL USER FAILURE DESCRIPTOR
15524 041536 000000 041661 $ACF: [ASCIZ/C(AC) FAILED/]
15525 041537 000000 041664 %AC1F: [ASCIZ/C(AC+1) FAILED/]
15526 041540 000000 041667 %EF: [ASCIZ/C(E) FAILED/]
15527 041541 000000 041672 %E1F: [ASCIZ/C(E+1) FAILED/]
15528 041542 000000 041675 %ARF: [ASCIZ/C(C(ACR)) FAILED/]
15529 041543 000000 041701 %AR1F: [ASCIZ/C(C(ACR+1)) FAILED/]
15530 041544 000000 041705 %ALF: [ASCIZ/C(C(ACL)) FAILED/]
15531 041545 000000 041711 %EEF: [ASCIZ/C(C(E)) FAILED/]
15532 041546 000000 041714 %FF: [ASCIZ/FLAG FAILED/]
15533 >
15534 XLIST
15535 LIST
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 8
UUOERR KSM 28-Mar-78 11:17 *UUOERR* OLD-UUO ERROR HANDLER SUBROUTINE, MARCH 1978 SEQ 0341
15536 ;RESTORE AC'S AND RETURN OR HALT
15537
15538 041547 256 00 0 00 030101 %ERMORE:XCT ERMORE
15539 041550 037 10 0 00 000002 SWITCH
15540
15541 041551 037 07 0 00 000003 %ERRS1: TTALTM ;ALTMODE CHECK
15542 041552 254 00 0 00 041556 JRST .+4 ;NONE
15543 041553 201 00 0 00 041556 MOVEI .+3 ;SAVE CONT ADDRESS
15544 041554 202 00 0 00 000130 MOVEM JOBOPC
15545 041555 254 00 1 00 030063 JRST @ALTMGO ;PERFORM TRANSFER
15546 041556 200 00 0 00 030046 MOVE CONSW
15547 041557 603 00 0 00 002000 TLNE 0,ERSTOP ;HALT ON ERROR SWITCH SET ?
15548 041560 037 14 0 00 000004 ERRHLT ;YES
15549 041561 607 00 0 00 004000 TLNN 0,LOOPER ;LOOP ON ERROR SWITCH SET ?
15550 041562 476 00 0 00 041767 SETOM PROCED ;NO, SET THE PROCEED FLAG
15551 041563 603 00 0 00 010000 TLNE 0,DING ;RING BELL SWITCH SET ?
15552 041564 037 01 0 00 000007 PBELL ;YES, GO RING BELL
15553
15554 041565 200 02 0 00 041773 %ERRS2: MOVE 2,%ERAC2 ;RESTORE AC'S
15555 041566 200 01 0 00 041772 MOVE 1,%ERAC1
15556 041567 476 00 1 00 041765 SETOM @ERRLOP ;SET C(ERR LOOP AC) TO -1
15557 041570 336 00 0 00 041767 SKIPN PROCED ;LOOP ON ERROR ?
15558 041571 254 00 0 00 041601 JRST %ERRS5 ;YES
15559 041572 350 00 1 00 041765 AOS @ERRLOP ;NO, INC C(ERR LOOP AC)
15560 041573 350 00 1 00 041765 AOS @ERRLOP ;SO IT ='S 1
15561 041574 331 00 0 00 030043 SKIPL MONCTL ;UNDER DIAGNOSTIC MONITOR ?
15562 041575 254 00 0 00 041601 JRST %ERRS5 ;NO, CONTINUE PROGRAM
15563 041576 200 00 0 00 030053 MOVE 0,ERRTLS ;YES
15564 041577 301 00 0 00 000024 CAIL 0,^D20 ;PRINTED ALLOWED ERRORS ?
15565 041600 254 00 0 00 041607 JRST %ERRS6
15566
15567 041601 200 00 0 00 041771 %ERRS5: MOVE 0,%ERAC0 ;NO, CONTINUE PROGRAM
15568 041602 254 00 0 00 030065 JRST UUOEXT
15569
15570 041603 200 00 0 00 030046 %ERRS4: MOVE 0,CONSW
15571 041604 607 00 0 00 001000 TLNN PALERS ;PRINT ALL ERRORS ?
15572 041605 254 00 0 00 041551 JRST %ERRS1 ;NO
15573 041606 254 00 0 00 041447 JRST %ERMS1 ;YES
15574
15575 041607 %ERRS6: PMSGF <^EXCEEDED ALLOWED ERRORS^>^
15576 041607 037 04 0 00 041717 PSIXMF [SIXBIT\^EXCEEDED ALLOWED ERRORS^_\]^
15577 041610 254 00 0 00 030061 JRST $BEND2
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 1
STOR KSM 28-Mar-78 11:25 *STOR* RESERVED STORAGE, MARCH 1978 SEQ 0342
15578 SUBTTL *STOR* RESERVED STORAGE, MARCH 1978
15579
15580 ;PROGRAM LITERALS
15581
15582 XLIST
15583 IFNDEF $LPAPER,<LIST>
15584 041611 LIT
15585 041611 101 111 000 000 000
15586 041612 000000 000000
15587 041613 777777 777777
15588 041614 000000 000010
15589 041615 741703 607417
15590 041616 000000 000020
15591 041617 000000 000004
15592 041620 000000 000002
15593 041621 400000 000000
15594 041622 000000 000001
15595 041623 377777 777777
15596 041624 777777 777776
15597 041625 777777 777775
15598 041626 100000 000000
15599 041627 200000 000000
15600 041630 677777 777777
15601 041631 577777 777777
15602 041632 777777 777773
15603 041633 777777 777767
15604 041634 777777 777774
15605 041635 577777 777776
15606 041636 377777 777776
15607 041637 177777 777777
15608 041640 377777 777775
15609 041641 177777 777775
15610 041642 177777 777776
15611 041643 600000 000000
15612 041644 700000 000000
15613 041645 077777 777777
15614 041646 76 64 45 63 64 00
15615 041647 60 41 63 63 00 43
15616 041650 57 65 56 64 00 35
15617 041651 00 77 00 00 00 00
15618 041652 76 60 43 00 35 00
15619 041653 00 00 77 00 00 00
15620 041654 76 62 45 63 65 54
15621 041655 64 00 00 35 00 77
15622 041656 76 46 41 65 54 64
15623 041657 00 56 65 55 42 45
15624 041660 62 00 35 00 77 00
15625 041661 103 050 101 103 051
15626 041662 040 106 101 111 114
15627 041663 105 104 000 000 000
15628 041664 103 050 101 103 053
15629 041665 061 051 040 106 101
15630 041666 111 114 105 104 000
15631 041667 103 050 105 051 040
15632 041670 106 101 111 114 105
DSKAI DECSYSTEM 2020 BASIC INSTRUCTION DIAGNOSTIC (9) 0,1 MACRO %53(1020) 09:47 29-Mar-78 Page 1-1
STOR KSM 28-Mar-78 11:25 *STOR* RESERVED STORAGE, MARCH 1978 SEQ 0343
15633 041671 104 000 000 000 000
15634 041672 103 050 105 053 061
15635 041673 051 040 106 101 111
15636 041674 114 105 104 000 000
15637 041675 103 050 103 050 101
15638 041676 103 122 051 051 040
15639 041677 106 101 111 114 105
15640 041700 104 000 000 000 000
15641 041701 103 050 103 050 101
15642 041702 103 122 053 061 051
15643 041703 051 040 106 101 111
15644 041704 114 105 104 000 000
15645 041705 103 050 103 050 101
15646 041706 103 114 051 051 040
15647 041707 106 101 111 114 105
15648 041710 104 000 000 000 000
15649 041711 103 050 103 050 105
15650 041712 051 051 040 106 101
15651 041713 111 114 105 104 000
15652 041714 106 114 101 107 040
15653 041715 106 101 111 114 105
15654 041716 104 000 000 000 000
15655 041717 76 45 70 43 45 45
15656 041720 44 45 44 00 41 54
15657 041721 54 57 67 45 44 00
15658 041722 45 62 62 57 62 63
15659 041723 76 77 00 00 00 00
15660 LIST
15661 041724 000000 000000 ENDSLD: 0
15662
15663 IFDEF DEBUG,<
15664 041725 PATCH: BLOCK DEBUG ;PATCHING AREA
15665 >
15666
15667 ;PROGRAM VARIABLES
15668 041765 VAR
15669
15670 IFDEF PGMEND,<
15671 041775 000000 000000 END: 0
15672 030000 END BEGIN >
NO ERRORS DETECTED
PROGRAM BREAK IS 000000
ABSOLUTE BREAK IS 041776
CPU TIME USED 00:47.488
24P CORE USED
ABORT 145#
AC 777# 779 780 781 782 784 785 786 787 788 790 791 792 793 SEQ 0344
794 796# 798 799 800 801 803 804 805 806 807 808 809 811
812 813 814 815 816 817 818 829# 831 832 833 834 836 837
838 839 840 842 843 844 845 846 848# 850 851 852 853 855
856 857 858 859 860 861 863 864 865 866 867 868 869 870
881# 883 884 885 886 888 889 890 891 892 894 895 896 897
898 900# 902 903 904 905 907 908 909 910 911 912 913 915
916 917 918 919 920 921 922 936 937 938 939 940 941 942
943 955 956 957 958 959 960 961 962 965# 967 968 969 970
1001 1002 1003 1004 1005 1006 1018 1019 1020 1021 1022 1023 1035 1036
1037 1038 1039 1040 1052 1053 1054 1055 1056 1057 1069 1070 1071 1072
1073 1074 1086 1087 1088 1089 1090 1091 1103 1104 1105 1106 1107 1108
1120 1121 1122 1123 1124 1125 1137 1138 1139 1140 1141 1142 1154 1155
1156 1157 1158 1159 1171 1172 1173 1174 1175 1176 1188 1189 1190 1191
1192 1193 1205 1206 1207 1208 1209 1210 1222 1223 1224 1225 1226 1227
1239 1240 1241 1242 1243 1244 1256 1257 1258 1259 1260 1261 1273 1274
1275 1276 1277 1278 1290 1291 1292 1293 1294 1295 1327 1328 1329 1330
1331 1332 1333 1345 1346 1347 1348 1349 1350 1351 1363 1364 1365 1366
1367 1368 1369 1381 1382 1383 1384 1385 1386 1387 1399 1400 1401 1402
1403 1404 1405 1417 1418 1419 1420 1421 1422 1423 1435 1436 1437 1438
1439 1440 1441 1453 1454 1455 1456 1457 1458 1459 1471 1472 1473 1474
1475 1476 1477 1489 1490 1491 1492 1493 1494 1495 1507 1508 1509 1510
1511 1512 1513 1525 1526 1527 1528 1529 1530 1531 1543 1544 1545 1546
1547 1548 1549 1561 1562 1563 1564 1565 1566 1567 1579 1580 1581 1582
1583 1584 1585 1597 1598 1599 1600 1601 1602 1603 1615 1616 1617 1618
1619 1620 1621 1633 1634 1635 1636 1637 1638 1639 1641# 1643 1644 1645
1646 1680 1681 1682 1683 1684 1685 1686 1698 1699 1700 1701 1702 1703
1704 1716 1717 1718 1719 1720 1721 1722 1734 1735 1736 1737 1738 1739
1740 1752 1753 1754 1755 1756 1757 1758 1770 1771 1772 1773 1774 1775
1776 1788 1789 1790 1791 1792 1793 1794 1806 1807 1808 1809 1810 1811
1812 1824 1825 1826 1827 1828 1829 1830 1842 1843 1844 1845 1846 1847
1848 1860 1861 1862 1863 1864 1865 1866 1878 1879 1880 1881 1882 1883
1884 1896 1897 1898 1899 1900 1901 1902 1914 1915 1916 1917 1918 1919
1920 1932 1933 1934 1935 1936 1937 1938 1950 1951 1952 1953 1954 1955
1956 1968 1969 1970 1971 1972 1973 1974 1986 1987 1988 1989 1990 1991
1992 2024 2025 2026 2027 2028 2029 2030 2042 2043 2044 2045 2046 2047
2048 2060 2061 2062 2063 2064 2065 2066 2078 2079 2080 2081 2082 2083
2084 2096 2097 2098 2099 2100 2101 2102 2114 2115 2116 2117 2118 2119
2120 2132 2133 2134 2135 2136 2137 2138 2150 2151 2152 2153 2154 2155
2156 2168 2169 2170 2171 2172 2173 2174 2186 2187 2188 2189 2190 2191
2192 2204 2205 2206 2207 2208 2209 2210 2222 2223 2224 2225 2226 2227
2228 2240 2241 2242 2243 2244 2245 2246 2258 2259 2260 2261 2262 2263
2264 2276 2277 2278 2279 2280 2281 2282 2294 2295 2296 2297 2298 2299
2300 2312 2313 2314 2315 2316 2317 2318 2330 2331 2332 2333 2334 2335
2336 2343# 2345 2346 2347 2348 2356 2357 2358 2359 2360 2361 2362 2363
2371 2372 2373 2374 2375 2376 2377 2378 2386 2387 2388 2389 2390 2391
2392 2393 2401 2402 2403 2404 2405 2406 2407 2408 2417 2418 2419 2420
2421 2422 2423 2424 2433 2434 2435 2436 2437 2438 2439 2440 2449 2450
2451 2452 2453 2454 2455 2456 2465 2466 2467 2468 2469 2470 2471 2472
2475# 2477 2478 2479 2480 2504 2505 2506 2507 2508 2516 2517 2518 2519
2520 2528 2529 2530 2531 2532 2560 2561 2562 2563 2564 2565 2574 2575
2576 2577 2578 2579 2588 2589 2590 2591 2592 2593 2601# 2603 2604 2605
2606 2608 2609 2610 2611 2612 2618 2619 2620 2621 2622 2662 2664 2667
2668 2669 2670 2685 2687 2690 2691 2692 2693 2708 2710 2713 2714 2715 SEQ 0345
2716 2731 2733 2736 2737 2738 2739 2754 2756 2759 2760 2761 2762 2777
2779 2782 2783 2784 2785 2800 2802 2805 2806 2807 2808 2823 2825 2828
2829 2830 2831 2846 2848 2851 2852 2853 2854 2869 2871 2874 2875 2876
2877 2892 2894 2897 2898 2899 2900 2915 2917 2920 2921 2922 2923 2938
2940 2943 2944 2945 2946 2961 2963 2966 2967 2968 2969 2984 2986 2989
2990 2991 2992 3007 3009 3012 3013 3014 3015 3030 3032 3035 3036 3037
3038 3053 3057 3058 3059 3060 3061 3102 3104 3107 3108 3109 3110 3125
3127 3130 3131 3132 3133 3148 3150 3153 3154 3155 3156 3171 3173 3176
3177 3178 3179 3194 3196 3199 3200 3201 3202 3217 3219 3222 3223 3224
3225 3240 3242 3245 3246 3247 3248 3263 3265 3268 3269 3270 3271 3286
3288 3291 3292 3293 3294 3309 3311 3314 3315 3316 3317 3332 3334 3337
3338 3339 3340 3355 3357 3360 3361 3362 3363 3378 3380 3383 3384 3385
3386 3401 3403 3406 3407 3408 3409 3424 3426 3429 3430 3431 3432 3447
3449 3452 3453 3454 3455 3470 3472 3475 3476 3477 3478 3493 3497 3498
3499 3500 3501 3540 3542 3545 3546 3547 3548 3562 3564 3567 3568 3569
3570 3584 3586 3589 3590 3591 3592 3606 3608 3611 3612 3613 3614 3628
3630 3633 3634 3635 3636 3650 3652 3655 3656 3657 3658 3672 3674 3677
3678 3679 3680 3694 3696 3699 3700 3701 3702 3716 3718 3721 3722 3723
3724 3738 3740 3743 3744 3745 3746 3760 3762 3765 3766 3767 3768 3782
3784 3787 3788 3789 3790 3804 3806 3809 3810 3811 3812 3826 3828 3831
3832 3833 3834 3848 3850 3853 3854 3855 3856 3870 3872 3875 3876 3877
3878 3892 3894 3897 3898 3899 3900 3914 3918 3919 3920 3921 3922 3960
3962 3965 3966 3967 3968 3982 3984 3987 3988 3989 3990 4004 4006 4009
4010 4011 4012 4026 4028 4031 4032 4033 4034 4048 4050 4053 4054 4055
4056 4070 4072 4075 4076 4077 4078 4092 4094 4097 4098 4099 4100 4114
4116 4119 4120 4121 4122 4136 4138 4141 4142 4143 4144 4158 4160 4163
4164 4165 4166 4180 4182 4185 4186 4187 4188 4202 4204 4207 4208 4209
4210 4224 4226 4229 4230 4231 4232 4246 4248 4251 4252 4253 4254 4268
4270 4273 4274 4275 4276 4290 4292 4295 4296 4297 4298 4312 4314 4317
4318 4319 4320 4334 4338 4339 4340 4341 4342 4349# 4351 4352 4353 4354
4356 4357 4358 4359 4360 4366 4367 4368 4369 4370 4408 4410 4413 4414
4415 4416 4430 4432 4435 4436 4437 4438 4452 4454 4457 4458 4459 4460
4474 4476 4479 4480 4481 4482 4496 4498 4501 4502 4503 4504 4518 4520
4523 4524 4525 4526 4540 4542 4545 4546 4547 4548 4562 4564 4567 4568
4569 4570 4584 4586 4589 4590 4591 4592 4606 4608 4611 4612 4613 4614
4628 4630 4633 4634 4635 4636 4650 4652 4655 4656 4657 4658 4672 4674
4677 4678 4679 4680 4694 4696 4699 4700 4701 4702 4716 4718 4721 4722
4723 4724 4738 4740 4743 4744 4745 4746 4760 4762 4765 4766 4767 4768
4782 4786 4787 4788 4789 4790 4829 4831 4834 4835 4836 4837 4851 4853
4856 4857 4858 4859 4873 4875 4878 4879 4880 4881 4895 4897 4900 4901
4902 4903 4917 4919 4922 4923 4924 4925 4939 4941 4944 4945 4946 4947
4961 4963 4966 4967 4968 4969 4983 4985 4988 4989 4990 4991 5005 5007
5010 5011 5012 5013 5027 5029 5032 5033 5034 5035 5049 5051 5054 5055
5056 5057 5071 5073 5076 5077 5078 5079 5093 5095 5098 5099 5100 5101
5115 5117 5120 5121 5122 5123 5137 5139 5142 5143 5144 5145 5159 5161
5164 5165 5166 5167 5181 5183 5186 5187 5188 5189 5203 5207 5208 5209
5210 5211 5248 5250 5253 5254 5255 5256 5269 5271 5274 5275 5276 5277
5290 5292 5295 5296 5297 5298 5311 5313 5316 5317 5318 5319 5332 5334
5337 5338 5339 5340 5353 5355 5358 5359 5360 5361 5374 5376 5379 5380
5381 5382 5395 5397 5400 5401 5402 5403 5416 5418 5421 5422 5423 5424
5437 5439 5442 5443 5444 5445 5458 5460 5463 5464 5465 5466 5479 5481
5484 5485 5486 5487 5500 5502 5505 5506 5507 5508 5521 5523 5526 5527
5528 5529 5542 5544 5547 5548 5549 5550 5563 5565 5568 5569 5570 5571 SEQ 0346
5584 5586 5589 5590 5591 5592 5605 5609 5610 5611 5612 5613 5652 5654
5657 5658 5659 5660 5674 5676 5679 5680 5681 5682 5696 5698 5701 5702
5703 5704 5718 5720 5723 5724 5725 5726 5740 5742 5745 5746 5747 5748
5762 5764 5767 5768 5769 5770 5784 5786 5789 5790 5791 5792 5806 5808
5811 5812 5813 5814 5828 5830 5833 5834 5835 5836 5850 5852 5855 5856
5857 5858 5872 5874 5877 5878 5879 5880 5894 5896 5899 5900 5901 5902
5916 5918 5921 5922 5923 5924 5938 5940 5943 5944 5945 5946 5960 5962
5965 5966 5967 5968 5982 5984 5987 5988 5989 5990 6004 6006 6009 6010
6011 6012 6026 6030 6031 6032 6033 6034 6040# 6042 6043 6044 6045 6047
6048 6049 6050 6051 6057 6058 6059 6060 6061 6102 6104 6109 6110 6111
6112 6126 6128 6133 6134 6135 6136 6150 6152 6157 6158 6159 6160 6174
6176 6181 6182 6183 6184 6198 6200 6205 6206 6207 6208 6222 6224 6229
6230 6231 6232 6246 6248 6253 6254 6255 6256 6270 6272 6277 6278 6279
6280 6294 6296 6301 6302 6303 6304 6318 6320 6325 6326 6327 6328 6342
6344 6349 6350 6351 6352 6366 6368 6373 6374 6375 6376 6390 6392 6397
6398 6399 6400 6414 6416 6421 6422 6423 6424 6438 6440 6445 6446 6447
6448 6462 6464 6469 6470 6471 6472 6486 6490 6493 6494 6495 6496 6510
6516 6517 6518 6519 6520 6561 6563 6568 6569 6570 6571 6585 6587 6592
6593 6594 6595 6609 6611 6616 6617 6618 6619 6633 6635 6640 6641 6642
6643 6657 6659 6664 6665 6666 6667 6681 6683 6688 6689 6690 6691 6705
6707 6712 6713 6714 6715 6729 6731 6736 6737 6738 6739 6753 6755 6760
6761 6762 6763 6777 6779 6784 6785 6786 6787 6801 6803 6808 6809 6810
6811 6825 6827 6832 6833 6834 6835 6849 6851 6856 6857 6858 6859 6873
6875 6880 6881 6882 6883 6897 6899 6904 6905 6906 6907 6921 6923 6928
6929 6930 6931 6945 6949 6952 6953 6954 6955 6969 6975 6976 6977 6978
6979 7020 7022 7027 7028 7029 7030 7044 7046 7051 7052 7053 7054 7068
7070 7075 7076 7077 7078 7092 7094 7099 7100 7101 7102 7116 7118 7123
7124 7125 7126 7140 7142 7147 7148 7149 7150 7164 7166 7171 7172 7173
7174 7188 7190 7195 7196 7197 7198 7212 7214 7219 7220 7221 7222 7236
7238 7243 7244 7245 7246 7260 7262 7267 7268 7269 7270 7284 7286 7291
7292 7293 7294 7308 7310 7315 7316 7317 7318 7332 7334 7339 7340 7341
7342 7356 7358 7363 7364 7365 7366 7380 7382 7387 7388 7389 7390 7404
7408 7411 7412 7413 7414 7428 7434 7435 7436 7437 7438 7479 7481 7486
7487 7488 7489 7503 7505 7510 7511 7512 7513 7527 7529 7534 7535 7536
7537 7551 7553 7558 7559 7560 7561 7575 7577 7582 7583 7584 7585 7599
7601 7606 7607 7608 7609 7623 7625 7630 7631 7632 7633 7647 7649 7654
7655 7656 7657 7671 7673 7678 7679 7680 7681 7695 7697 7702 7703 7704
7705 7719 7721 7726 7727 7728 7729 7743 7745 7750 7751 7752 7753 7767
7769 7774 7775 7776 7777 7791 7793 7798 7799 7800 7801 7815 7817 7822
7823 7824 7825 7839 7841 7846 7847 7848 7849 7863 7867 7870 7871 7872
7873 7887 7893 7894 7895 7896 7897 7907# 7909 7910 7911 7912 7914 7915
7916 7917 7918 7919 7927 7928 7929 7930 7931 7932 7975 7976 7978 7981
7982 7983 7984 8000 8001 8003 8006 8007 8008 8009 8025 8026 8028 8031
8032 8033 8034 8050 8051 8053 8056 8057 8058 8059 8075 8076 8078 8081
8082 8083 8084 8100 8101 8103 8106 8107 8108 8109 8125 8126 8128 8131
8132 8133 8134 8150 8151 8153 8156 8157 8158 8159 8175 8176 8178 8181
8182 8183 8184 8200 8201 8203 8206 8207 8208 8209 8225 8226 8228 8231
8232 8233 8234 8250 8251 8253 8256 8257 8258 8259 8275 8276 8278 8281
8282 8283 8284 8300 8301 8303 8306 8307 8308 8309 8325 8326 8328 8331
8332 8333 8334 8350 8351 8353 8356 8357 8358 8359 8375 8376 8378 8381
8382 8383 8384 8400 8401 8405 8406 8407 8408 8409 8450 8451 8452 8453
8454 8455 8456 8472 8473 8474 8475 8476 8477 8478 8494 8495 8496 8497
8498 8499 8500 8516 8517 8518 8519 8520 8521 8522 8538 8539 8540 8541 SEQ 0347
8542 8543 8544 8560 8561 8562 8563 8564 8565 8566 8582 8583 8584 8585
8586 8587 8588 8604 8605 8606 8607 8608 8609 8610 8626 8627 8628 8629
8630 8631 8632 8648 8649 8650 8651 8652 8653 8654 8670 8671 8672 8673
8674 8675 8676 8692 8693 8694 8695 8696 8697 8698 8714 8715 8716 8717
8718 8719 8720 8736 8737 8738 8739 8740 8741 8742 8758 8759 8760 8761
8762 8763 8764 8780 8781 8782 8783 8784 8785 8786 8802 8803 8804 8805
8806 8807 8808 8851 8852 8854 8857 8858 8859 8860 8876 8877 8879 8882
8883 8884 8885 8901 8902 8904 8907 8908 8909 8910 8926 8927 8929 8932
8933 8934 8935 8951 8952 8954 8957 8958 8959 8960 8976 8977 8979 8982
8983 8984 8985 9001 9002 9004 9007 9008 9009 9010 9026 9027 9029 9032
9033 9034 9035 9051 9052 9054 9057 9058 9059 9060 9076 9077 9079 9082
9083 9084 9085 9101 9102 9104 9107 9108 9109 9110 9126 9127 9129 9132
9133 9134 9135 9151 9152 9154 9157 9158 9159 9160 9176 9177 9179 9182
9183 9184 9185 9201 9202 9204 9207 9208 9209 9210 9226 9227 9229 9232
9233 9234 9235 9251 9252 9254 9257 9258 9259 9260 9276 9277 9281 9282
9283 9284 9285 9328 9329 9330 9331 9332 9333 9334 9351 9352 9353 9354
9355 9356 9357 9374 9375 9376 9377 9378 9379 9380 9397 9398 9399 9400
9401 9402 9403 9420 9421 9422 9423 9424 9425 9426 9443 9444 9445 9446
9447 9448 9449 9466 9467 9468 9469 9470 9471 9472 9489 9490 9491 9492
9493 9494 9495 9512 9513 9514 9515 9516 9517 9518 9535 9536 9537 9538
9539 9540 9541 9558 9559 9560 9561 9562 9563 9564 9581 9582 9583 9584
9585 9586 9587 9604 9605 9606 9607 9608 9609 9610 9627 9628 9629 9630
9631 9632 9633 9650 9651 9652 9653 9654 9655 9656 9673 9674 9675 9676
9677 9678 9679 9696 9697 9698 9699 9700 9701 9702 9710# 9712 9713 9714
9715 9717 9718 9719 9720 9721 9722 9730 9731 9732 9733 9734 9735 9779
9780 9782 9785 9786 9787 9788 9805 9806 9808 9811 9812 9813 9814 9831
9832 9834 9837 9838 9839 9840 9857 9858 9860 9863 9864 9865 9866 9883
9884 9886 9889 9890 9891 9892 9909 9910 9912 9915 9916 9917 9918 9935
9936 9938 9941 9942 9943 9944 9961 9962 9964 9967 9968 9969 9970 9987
9988 9990 9993 9994 9995 9996 10013 10014 10016 10019 10020 10021 10022 10039
10040 10042 10045 10046 10047 10048 10065 10066 10068 10071 10072 10073 10074 10091
10092 10094 10097 10098 10099 10100 10117 10118 10120 10123 10124 10125 10126 10143
10144 10146 10149 10150 10151 10152 10169 10170 10172 10175 10176 10177 10178 10195
10196 10198 10201 10202 10203 10204 10221 10222 10226 10227 10228 10229 10230 10273
10274 10275 10276 10277 10278 10279 10296 10297 10298 10299 10300 10301 10302 10319
10320 10321 10322 10323 10324 10325 10342 10343 10344 10345 10346 10347 10348 10365
10366 10367 10368 10369 10370 10371 10388 10389 10390 10391 10392 10393 10394 10411
10412 10413 10414 10415 10416 10417 10434 10435 10436 10437 10438 10439 10440 10457
10458 10459 10460 10461 10462 10463 10480 10481 10482 10483 10484 10485 10486 10503
10504 10505 10506 10507 10508 10509 10526 10527 10528 10529 10530 10531 10532 10549
10550 10551 10552 10553 10554 10555 10572 10573 10574 10575 10576 10577 10578 10595
10596 10597 10598 10599 10600 10601 10618 10619 10620 10621 10622 10623 10624 10641
10642 10643 10644 10645 10646 10647 10691 10692 10694 10697 10698 10699 10700 10716
10717 10719 10722 10723 10724 10725 10741 10742 10744 10747 10748 10749 10750 10766
10767 10769 10772 10773 10774 10775 10791 10792 10794 10797 10798 10799 10800 10816
10817 10819 10822 10823 10824 10825 10841 10842 10844 10847 10848 10849 10850 10866
10867 10869 10872 10873 10874 10875 10891 10892 10894 10897 10898 10899 10900 10916
10917 10919 10922 10923 10924 10925 10941 10942 10944 10947 10948 10949 10950 10966
10967 10969 10972 10973 10974 10975 10991 10992 10994 10997 10998 10999 11000 11016
11017 11019 11022 11023 11024 11025 11041 11042 11044 11047 11048 11049 11050 11066
11067 11069 11072 11073 11074 11075 11091 11092 11094 11097 11098 11099 11100 11116
11117 11121 11122 11123 11124 11125 11166 11167 11168 11169 11170 11171 11172 11188
11189 11190 11191 11192 11193 11194 11210 11211 11212 11213 11214 11215 11216 11232 SEQ 0348
11233 11234 11235 11236 11237 11238 11254 11255 11256 11257 11258 11259 11260 11276
11277 11278 11279 11280 11281 11282 11298 11299 11300 11301 11302 11303 11304 11320
11321 11322 11323 11324 11325 11326 11342 11343 11344 11345 11346 11347 11348 11364
11365 11366 11367 11368 11369 11370 11386 11387 11388 11389 11390 11391 11392 11408
11409 11410 11411 11412 11413 11414 11430 11431 11432 11433 11434 11435 11436 11452
11453 11454 11455 11456 11457 11458 11474 11475 11476 11477 11478 11479 11480 11496
11497 11498 11499 11500 11501 11502 11518 11519 11520 11521 11522 11523 11524 11532#
11534 11535 11536 11537 11539 11540 11541 11542 11543 11544 11552 11553 11554 11555
11556 11557 11602 11603 11605 11610 11611 11612 11613 11629 11630 11632 11637 11638
11639 11640 11656 11657 11659 11664 11665 11666 11667 11683 11684 11686 11691 11692
11693 11694 11710 11711 11713 11718 11719 11720 11721 11737 11738 11740 11745 11746
11747 11748 11764 11765 11767 11772 11773 11774 11775 11791 11792 11794 11799 11800
11801 11802 11818 11819 11821 11826 11827 11828 11829 11845 11846 11848 11853 11854
11855 11856 11872 11873 11875 11880 11881 11882 11883 11899 11900 11902 11907 11908
11909 11910 11926 11927 11929 11934 11935 11936 11937 11953 11954 11956 11961 11962
11963 11964 11980 11981 11983 11988 11989 11990 11991 12007 12008 12010 12015 12016
12017 12018 12034 12035 12039 12042 12043 12044 12045 12061 12062 12064 12068 12069
12070 12071 12072 12114 12115 12117 12118 12119 12120 12121 12137 12138 12140 12141
12142 12143 12144 12160 12161 12163 12164 12165 12166 12167 12183 12184 12186 12187
12188 12189 12190 12206 12207 12209 12210 12211 12212 12213 12229 12230 12232 12233
12234 12235 12236 12252 12253 12255 12256 12257 12258 12259 12275 12276 12278 12279
12280 12281 12282 12298 12299 12301 12302 12303 12304 12305 12321 12322 12324 12325
12326 12327 12328 12344 12345 12347 12348 12349 12350 12351 12367 12368 12370 12371
12372 12373 12374 12390 12391 12393 12394 12395 12396 12397 12413 12414 12416 12417
12418 12419 12420 12436 12437 12439 12440 12441 12442 12443 12459 12460 12462 12463
12464 12465 12466 12514 12515 12517 12522 12523 12524 12525 12542 12543 12545 12550
12551 12552 12553 12570 12571 12573 12578 12579 12580 12581 12598 12599 12601 12606
12607 12608 12609 12626 12627 12629 12634 12635 12636 12637 12654 12655 12657 12662
12663 12664 12665 12682 12683 12685 12690 12691 12692 12693 12710 12711 12713 12718
12719 12720 12721 12738 12739 12741 12746 12747 12748 12749 12766 12767 12769 12774
12775 12776 12777 12794 12795 12797 12802 12803 12804 12805 12822 12823 12825 12830
12831 12832 12833 12850 12851 12853 12858 12859 12860 12861 12878 12879 12881 12886
12887 12888 12889 12906 12907 12909 12914 12915 12916 12917 12934 12935 12937 12942
12943 12944 12945 12962 12963 12967 12970 12971 12972 12973 12990 12991 12993 12997
12998 12999 13000 13001 13042 13043 13044 13045 13046 13047 13048 13064 13065 13066
13067 13068 13069 13070 13086 13087 13088 13089 13090 13091 13092 13108 13109 13110
13111 13112 13113 13114 13130 13131 13132 13133 13134 13135 13136 13152 13153 13154
13155 13156 13157 13158 13174 13175 13176 13177 13178 13179 13180 13196 13197 13198
13199 13200 13201 13202 13218 13219 13220 13221 13222 13223 13224 13240 13241 13242
13243 13244 13245 13246 13262 13263 13264 13265 13266 13267 13268 13284 13285 13286
13287 13288 13289 13290 13306 13307 13308 13309 13310 13311 13312 13328 13329 13330
13331 13332 13333 13334 13350 13351 13352 13353 13354 13355 13356 13372 13373 13374
13375 13376 13377 13378 13397 13398 13399 13400 13401 13402 13403 13404 13414 13415
13416 13417 13418 13419 13420 13421 13431 13432 13433 13434 13435 13436 13437 13438
13448 13449 13450 13451 13452 13453 13454 13455 13465 13466 13467 13468 13469 13470
13471 13472 13482 13483 13484 13485 13486 13487 13488 13489 13499 13500 13501 13502
13503 13504 13505 13506 13516 13517 13518 13519 13520 13521 13522 13523 13533 13534
13535 13536 13537 13538 13539 13540 13550 13551 13552 13553 13554 13555 13556 13557
13567 13568 13569 13570 13571 13572 13573 13574 13584 13585 13586 13587 13588 13589
13590 13591 13601 13602 13603 13604 13605 13606 13607 13608 13618 13619 13620 13621
13622 13623 13624 13625 13635 13636 13637 13638 13639 13640 13641 13642 13652 13653
13654 13655 13656 13657 13658 13659 13669 13670 13671 13672 13673 13674 13675 13676
13686 13687 13688 13689 13690 13691 13692 13693 13703 13704 13705 13706 13707 13708 SEQ 0349
13709 13710 13720 13721 13722 13723 13724 13725 13726 13727 13737 13738 13739 13740
13741 13742 13743 13744 13754 13755 13756 13757 13758 13759 13760 13761 13771 13772
13773 13774 13775 13776 13777 13778 13788 13789 13790 13791 13792 13793 13794 13795
13814 13815 13816 13817 13818 13819 13820 13821 13831 13832 13833 13834 13835 13836
13837 13838 13848 13849 13850 13851 13852 13853 13854 13855 13865 13866 13867 13868
13869 13870 13871 13872 13882 13883 13884 13885 13886 13887 13888 13889 13899 13900
13901 13902 13903 13904 13905 13906 13916 13917 13918 13919 13920 13921 13922 13923
13933 13934 13935 13936 13937 13938 13939 13940 13950 13951 13952 13953 13954 13955
13956 13957 13967 13968 13969 13970 13971 13972 13973 13974 13984 13985 13986 13987
13988 13989 13990 13991 14001 14002 14003 14004 14005 14006 14007 14008 14018 14019
14020 14021 14022 14023 14024 14025 14035 14036 14037 14038 14039 14040 14041 14042
14052 14053 14054 14055 14056 14057 14058 14059 14069 14070 14071 14072 14073 14074
14075 14076 14086 14087 14088 14089 14090 14091 14092 14093 14103 14104 14105 14106
14107 14108 14109 14110 14120 14121 14122 14123 14124 14125 14126 14127 14137 14138
14139 14140 14141 14142 14143 14144 14162 14163 14164 14165 14166 14167 14168 14169
14179 14180 14181 14182 14183 14184 14185 14186 14196 14197 14198 14199 14200 14201
14202 14203 14213 14214 14215 14216 14217 14218 14219 14220 14230 14231 14232 14233
14234 14235 14236 14237 14247 14248 14249 14250 14251 14252 14253 14254 14264 14265
14266 14267 14268 14269 14270 14271 14281 14282 14283 14284 14285 14286 14287 14288
14298 14299 14300 14301 14302 14303 14304 14305 14315 14316 14317 14318 14319 14320
14321 14322 14332 14333 14334 14335 14336 14337 14338 14339 14349 14350 14351 14352
14353 14354 14355 14356 14366 14367 14368 14369 14370 14371 14372 14373 14383 14384
14385 14386 14387 14388 14389 14390 14400 14401 14402 14403 14404 14405 14406 14407
14417 14418 14419 14420 14421 14422 14423 14424 14434 14435 14436 14437 14438 14439
14440 14441 14451 14452 14453 14454 14455 14456 14457 14458 14468 14469 14470 14471
14472 14473 14474 14475 14485 14486 14487 14488 14489 14490 14491 14492 14502 14503
14504 14505 14506 14507 14508 14509 14519 14520 14521 14522 14523 14524 14525 14526
14536 14537 14538 14539 14540 14541 14542 14543 14567 14568 14569 14570 14571 14572
14573 14574 14585 14586 14587 14588 14589 14590 14591 14592 14603 14604 14605 14606
14607 14608 14609 14610 14621 14622 14623 14624 14625 14626 14627 14628 14639 14640
14641 14642 14643 14644 14645 14646 14657 14658 14659 14660 14661 14662 14663 14664
14675 14676 14677 14678 14679 14680 14681 14682 14693 14694 14695 14696 14697 14698
14699 14700 14711 14712 14713 14714 14715 14716 14717 14718 14729 14730 14731 14732
14733 14734 14735 14736 14747 14748 14749 14750 14751 14752 14753 14754 14765 14766
14767 14768 14769 14770 14771 14772 14783 14784 14785 14786 14787 14788 14789 14790
14801 14802 14803 14804 14805 14806 14807 14808 14819 14820 14821 14822 14823 14824
14825 14826 14837 14838 14839 14840 14841 14842 14843 14844 14855 14856 14857 14858
14859 14860 14861 14862 14873 14874 14875 14876 14877 14878 14879 14880 14891 14892
14893 14894 14895 14896 14897 14898 14909 14910 14911 14912 14913 14914 14915 14916
14927 14928 14929 14930 14931 14932 14933 14934 14945 14946 14947 14948 14949 14950
14951 14952 14963 14964 14965 14966 14967 14968 14969 14970 14981 14982 14983 14984
14985 14986 14987 14988 14999 15000 15001 15002 15003 15004 15005 15006 15017 15018
15019 15020 15021 15022 15023 15024 15035 15036 15037 15038 15039 15040 15041 15042
15053 15054 15055 15056 15057 15058 15059 15060 15071 15072 15073 15074 15075 15076
15077 15078 15089 15090 15091 15092 15093 15094 15095 15096 15107 15108 15109 15110
15111 15112 15113 15114 15125 15126 15127 15128 15129 15130 15131 15132 15143 15144
15145 15146 15147 15148 15149 15150 15161 15162 15163 15164 15165 15166 15167 15168
15179 15180 15181 15182 15183 15184 15185 15186 15197 15198 15199 15200 15201 15202
15203 15204 15215 15216 15217 15218 15219 15220 15221 15222 15233 15234 15235 15236
15237 15238 15239 15240 15251 15252 15253 15254 15255 15256 15257 15258 15269 15270
15271 15272 15273 15274 15275 15276 15287 15288 15289 15290 15291 15292 15293 15294
15305 15306 15307 15308 15309 15310 15311 15312 15323 15324 15325 15326 15327 15328
15329 15330 15341 15342 15343 15344 15345 15346 15347 15348 15359 15360 15361 15362 SEQ 0350
15363 15364 15365 15366 15377 15378 15379 15380 15381 15382 15383 15384 15395 15396
15397 15398 15399 15400 15401 15402 15413 15414 15415 15416 15417 15418 15419 15420
ALTMGO 495# 15545
AROV 409#
AROVTP 409#
AROVU 409#
AST 610#
ATSIN 611#
BEGEND 491# 15422
BEGIN 66 67 68 71 72 73 74 75 76 360 361 422# 15672
BEGIN1 438# 492
BELL 614#
BIS 409#
CCA 409#
CHAIN 165#
CHNOFF 409#
CHNON 409#
CLKU 409#
CLOCKF 477#
CNTLC 494#
CNTRP 409#
COMMA 603#
CONSW 478# 15480 15546 15570
CPOPJ 498#
CPOPJ1 496#
CRLF 295 296 598#
CRLF2 299 300 600#
CRY0 409#
CRY1 409#
CSHFLG 657#
CSHMEM 658#
CTRP 409#
CYCL60 651#
DCK 409#
DDTLNK 179# 436
DDTSRT 436#
DEBUG 58# 15663 15664
DECVER 4# 11 26 457
DF22F 562#
DIAGMN 425#
DING 151# 15551
DOLLAR 617#
DSKUPD 462
E100 784# 788
E1000 863# 870
E10000 13669# 13676
E10100 13686# 13693
E10200 13703# 13710
E10300 13720# 13727
E10400 13737# 13744
E10500 13754# 13761
E10600 13771# 13778
E10700 13788# 13795 SEQ 0351
E1100 888# 892
E11000 13814# 13821
E11100 13831# 13838
E11200 13848# 13855
E11300 13865# 13872
E11400 13882# 13889
E11500 13899# 13906
E11600 13916# 13923
E11700 13933# 13940
E1200 894# 898
E12000 13950# 13957
E12100 13967# 13974
E12200 13984# 13991
E12300 14001# 14008
E12400 14018# 14025
E12500 14035# 14042
E12600 14052# 14059
E12700 14069# 14076
E1300 907# 913
E13000 14086# 14093
E13100 14103# 14110
E13200 14120# 14127
E13300 14137# 14144
E13400 14162# 14169
E13500 14179# 14186
E13600 14196# 14203
E13700 14213# 14220
E1400 915# 922
E14000 14230# 14237
E14100 14247# 14254
E14200 14264# 14271
E14300 14281# 14288
E14400 14298# 14305
E14500 14315# 14322
E14600 14332# 14339
E14700 14349# 14356
E1500 974#
E15000 14366# 14373
E15100 14383# 14390
E15200 14400# 14407
E15300 14417# 14424
E15400 14434# 14441
E15500 14451# 14458
E15600 14468# 14475
E15700 14485# 14492
E1600 1652#
E16000 14502# 14509
E16100 14519# 14526
E16200 14536# 14543
E16300 14567# 14574
E16400 14585# 14592
E16500 14603# 14610
E16600 14621# 14628 SEQ 0352
E16700 14639# 14646
E1700 2356# 2363
E17000 14657# 14664
E17100 14675# 14682
E17200 14693# 14700
E17300 14711# 14718
E17400 14729# 14736
E17500 14747# 14754
E17600 14765# 14772
E17700 14783# 14790
E200 790# 794
E2000 2371# 2378
E20000 14801# 14808
E20100 14819# 14826
E20200 14837# 14844
E20300 14855# 14862
E20400 14873# 14880
E20500 14891# 14898
E20600 14909# 14916
E20700 14927# 14934
E2100 2401# 2408
E21000 14945# 14952
E21100 14963# 14970
E21200 14981# 14988
E21300 14999# 15006
E21400 15017# 15024
E21500 15035# 15042
E21600 15053# 15060
E21700 15071# 15078
E2200 2417# 2424
E22000 15089# 15096
E22100 15107# 15114
E22200 15125# 15132
E22300 15143# 15150
E22400 15161# 15168
E22500 15179# 15186
E22600 15197# 15204
E22700 15215# 15222
E2300 2433# 2440
E23000 15233# 15240
E23100 15251# 15258
E23200 15269# 15276
E23300 15287# 15294
E23400 15305# 15312
E23500 15323# 15330
E23600 15341# 15348
E23700 15359# 15366
E2400 2449# 2456
E24000 15377# 15384
E24100 15395# 15402
E24200 15413# 15420
E2500 2465# 2472
E2600 2485# SEQ 0353
E2700 2538#
E300 803# 809
E3000 2608#
E3100 2612 2618# 2622
E3200 2626#
E3300 3506#
E3400 4356# 4360
E3500 4366# 4370
E3600 4374#
E3700 5216#
E400 811# 818
E4000 6047# 6051
E4100 6057# 6061
E4200 6066#
E4300 6984#
E4400 7914# 7919
E44200 2386# 2393
E44300 936# 943
E44400 955# 962
E4500 7927# 7932
E4600 7936#
E4700 8812#
E500 836# 840
E5000 9717# 9722
E5100 9730# 9735
E5200 9738#
E5300 10652#
E5400 11538# 11544
E5500 11552# 11557
E5600 11561#
E5700 12471#
E600 842# 846
E6000 13397# 13404
E6100 13414# 13421
E6200 13431# 13438
E6300 13448# 13455
E6400 13465# 13472
E6500 13482# 13489
E6600 13499# 13506
E6700 13516# 13523
E700 855# 861
E7000 13533# 13540
E7100 13550# 13557
E7200 13567# 13574
E7300 13584# 13591
E7400 13601# 13608
E7500 13618# 13625
E7600 13635# 13642
E7700 13652# 13659
EBIT0 409#
EBIT1 409#
EBIT10 409#
EBIT11 409# SEQ 0354
EBIT12 409#
EBIT13 409#
EBIT14 409#
EBIT15 409#
EBIT2 409#
EBIT3 409#
EBIT4 409#
EBIT5 409#
EBIT6 409#
EBIT7 409#
EBIT8 409#
EBIT9 409#
END 15671#
ENDFIX 737#
ENDSLD 15661#
ERDIAG 62# 15465
ERMORE 511# 15538
EROLD 371
ERRELB 15535
ERRLOP 782# 782 801# 801 834# 834 853# 853 886# 886 905# 905 970# 970
1646# 1646 2348# 2348 2480# 2480 2606# 2606 4354# 4354 6045# 6045 7912# 7912
9715# 9715 11537# 11537 15445 15556 15559 15560
ERRMES 45 46 47 48 49 50 51 52 53 54 55 15427#
ERRPC 482# 15432 15462
ERRTLS 483# 15430 15563
ERSTOP 154# 15547
EXCASB 59# 460
EXIOT 409#
EXIT 738# 739
FOV 409#
FOVU 409#
FRDLNK 177#
FSELNK 176#
FXU 409#
HYPEN 608#
INHCSH 162#
INHPAG 159#
IOCLR 409#
ITERAT 87# 455
ITRCH1 515#
ITRCNT 455#
JOB41 409#
JOBAPR 409#
JOBCNI 409#
JOBDDT 409#
JOBFF 409#
JOBOPC 409# 15544
JOBREL 409#
JOBREN 409#
JOBSA 409#
JOBSYM 409#
JOBTPC 409#
JOBUSY 409# SEQ 0355
JOBUUO 409#
JOBVER 409#
KAIFLG 472#
KLFLG 473#
KNTRP 409#
KTRP 409#
LACLK 409#
LACLKE 409#
LAPRAL 409#
LAPRP1 409#
LAPRP2 409#
LAPRP3 409#
LAPRP4 409#
LAPRP5 409#
LAPRP6 409#
LAPRP7 409#
LCHNOF 409#
LCHNON 409#
LCNTXT 409#
LCNXER 409#
LCPAER 409#
LCPSFT 409#
LCPWRF 409#
LDATAF 409#
LDLNK 178# 425 427
LDNXER 409#
LDPAER 409#
LDPSFT 409#
LDPWRF 409#
LEBXMH 409#
LEBXML 409#
LENXER 409#
LEPAER 409#
LEPSFT 409#
LEPWRF 409#
LEUPFW 409#
LEXCMP 409#
LFLGCL 409#
LFLGDS 409#
LFLGEN 409#
LFLGST 409#
LFP 612#
LINSTF 409#
LINT 409#
LIOCLR 409#
LLACBL 409#
LLDUSB 409#
LMBXMH 409#
LMBXML 409#
LNXMEN 409#
LNXMER 409#
LOOPER 153# 15549
LPAREN 409# SEQ 0356
LPARER 409#
LPFWPC 409#
LPGFTR 409#
LPICH1 409#
LPICH2 409#
LPICH3 409#
LPICH4 409#
LPICH5 409#
LPICH6 409#
LPICH7 409#
LPICHA 409#
LPICLR 409#
LPIIP1 409#
LPIIP2 409#
LPIIP3 409#
LPIIP4 409#
LPIIP5 409#
LPIIP6 409#
LPIIP7 409#
LPIOFF 409#
LPION 409#
LPRCH1 409#
LPRCH2 409#
LPRCH3 409#
LPRCH4 409#
LPRCH5 409#
LPRCH6 409#
LPRCH7 409#
LPRFMH 409#
LPRFML 409#
LPSFT 409#
LPSFTE 409#
LPWRFE 409#
LPWRFL 409#
LREQSE 409#
LRQCLR 409#
LSECMO 409#
LSMODE 409#
LSNXER 409#
LSPAER 409#
LSPSFT 409#
LSPWRF 409#
LTBASH 409#
LTBASL 409#
LTRPAE 409#
LTRPEN 409#
LUSCMP 409#
LUUO 409#
LUUO1 45# 542 543
LUUO10 52# 542 547
LUUO11 53# 542 547
LUUO12 54# 542 548
LUUO13 55# 542 548 SEQ 0357
LUUO14 542 549
LUUO15 542 549
LUUO16 542 550
LUUO17 542 550
LUUO2 46# 542 544
LUUO20 542 551
LUUO21 542 551
LUUO22 542 552
LUUO23 542 552
LUUO24 542 553
LUUO25 542 553
LUUO26 542 554
LUUO27 542 554
LUUO3 47# 542 544
LUUO30 542 555
LUUO31 542 555
LUUO32 542 556
LUUO33 542 556
LUUO4 48# 542 545
LUUO5 49# 542 545
LUUO6 50# 542 546
LUUO7 51# 542 546
LUUOI 409#
LWRITE 409#
MAPNEW 563#
MARGIN 485#
MCNVER 3# 11 26 457
MEMLOW 565#
MEMMAP 463
MEMSIZ 566#
MEMTOT 564#
MICNT 15433# 15433 15434 15447
MINUS 607#
MODDVC 161#
MODDVL 360 360# 458
MODDVU 361 361# 459
MODLNK 180# 422
MONCTL 475# 15448 15561
MONFLG 474#
MONTEN 476#
MONTYP 689#
MPVU 409#
MUUO 409#
MUUOPC 409#
NOPNT 149# 15438
NXMU 409#
OPRSEL 163#
OPTIME 577#
P 206 207 208 209 409# 497
PAG 409#
PALERS 155# 15571
PAREA0 80#
PAREA1 81# 453 SEQ 0358
PAREA2 82# 454
PAREA3 83# 451
PAREA4 84# 452
PAREA5 85# 464
PAREA6 86# 465
PAREA7 464#
PAREA8 465#
PART1 763 778#
PARU 409#
PASCNT 479# 15453 15457
PATCH 15664#
PDISF 574#
PDLOVU 409#
PDOVTP 409#
PERIOD 604#
PFSTRT 431#
PGMEND 61# 15670
PGMNAM 456 741#
PICHN1 409#
PICHN2 409#
PICHN3 409#
PICHN4 409#
PICHN5 409#
PICHN6 409#
PICHN7 409#
PICHNA 409#
PICLR 409#
PIOFF 409#
PION 409#
PLIST 643# 643
PLISTE 643 645#
PLISTS 644#
PLUS 609#
PNTENB 573#
PNTEXT 452#
PNTFLG 572#
PNTINH 575#
PNTLPT 150#
PNTNAM 451#
PNTRP 409#
PNTSPC 576#
PROCED 15436# 15436 15550 15557
PTRP 409#
PVPAGI 670#
QUEST 615#
RADIX 618#
RADLSC 620#
RADLSP 619#
RANDBS 453#
REENTR 433#
RELIAB 157#
REPT 409#
REPT1 409# SEQ 0359
REPTU 531#
REQSET 409#
RESRT1 508#
RESRT2 509#
RETURN 440#
RSTART 146#
RTP 613#
RUNFLG 480#
SADR1 66# 429
SADR10 75# 445
SADR11 76# 446
SADR2 67# 431
SADR3 68# 433
SADR4 69#
SADR5 70# 494
SADR6 71# 495
SADR7 72# 442
SADR8 73# 443
SADR9 74# 444
SBINIT 219 439#
SCOPE 532#
SFSTRT 429#
SLASH 616#
SM10 720#
SN 972# 998 998# 1005 1015 1015# 1022 1032 1032# 1039 1049 1049# 1056 1066
1066# 1073 1083 1083# 1090 1100 1100# 1107 1117 1117# 1124 1134 1134# 1141
1151 1151# 1158 1168 1168# 1175 1185 1185# 1192 1202 1202# 1209 1219 1219#
1226 1236 1236# 1243 1253 1253# 1260 1270 1270# 1277 1287 1287# 1294 1324
1324# 1332 1342 1342# 1350 1360 1360# 1368 1378 1378# 1386 1396 1396# 1404
1414 1414# 1422 1432 1432# 1440 1450 1450# 1458 1468 1468# 1476 1486 1486#
1494 1504 1504# 1512 1522 1522# 1530 1540 1540# 1548 1558 1558# 1566 1576
1576# 1584 1594 1594# 1602 1612 1612# 1620 1630 1630# 1638 1648# 1677 1677#
1685 1695 1695# 1703 1713 1713# 1721 1731 1731# 1739 1749 1749# 1757 1767
1767# 1775 1785 1785# 1793 1803 1803# 1811 1821 1821# 1829 1839 1839# 1847
1857 1857# 1865 1875 1875# 1883 1893 1893# 1901 1911 1911# 1919 1929 1929#
1937 1947 1947# 1955 1965 1965# 1973 1983 1983# 1991 2021 2021# 2029 2039
2039# 2047 2057 2057# 2065 2075 2075# 2083 2093 2093# 2101 2111 2111# 2119
2129 2129# 2137 2147 2147# 2155 2165 2165# 2173 2183 2183# 2191 2201 2201#
2209 2219 2219# 2227 2237 2237# 2245 2255 2255# 2263 2273 2273# 2281 2291
2291# 2299 2309 2309# 2317 2327 2327# 2335 2482# 2498 2498# 2507 2510 2510#
2519 2522 2522# 2531 2535# 2553 2553# 2564 2567 2567# 2578 2581 2581# 2592
2623# 2658 2658# 2669 2681 2681# 2692 2704 2704# 2715 2727 2727# 2738 2750
2750# 2761 2773 2773# 2784 2796 2796# 2807 2819 2819# 2830 2842 2842# 2853
2865 2865# 2876 2888 2888# 2899 2911 2911# 2922 2934 2934# 2945 2957 2957#
2968 2980 2980# 2991 3003 3003# 3014 3026 3026# 3037 3049 3049# 3060 3097
3097# 3109 3120 3120# 3132 3143 3143# 3155 3166 3166# 3178 3189 3189# 3201
3212 3212# 3224 3235 3235# 3247 3258 3258# 3270 3281 3281# 3293 3304 3304#
3316 3327 3327# 3339 3350 3350# 3362 3373 3373# 3385 3396 3396# 3408 3419
3419# 3431 3442 3442# 3454 3465 3465# 3477 3488 3488# 3500 3503# 3536 3536#
3547 3558 3558# 3569 3580 3580# 3591 3602 3602# 3613 3624 3624# 3635 3646
3646# 3657 3668 3668# 3679 3690 3690# 3701 3712 3712# 3723 3734 3734# 3745
3756 3756# 3767 3778 3778# 3789 3800 3800# 3811 3822 3822# 3833 3844 3844#
3855 3866 3866# 3877 3888 3888# 3899 3910 3910# 3921 3956 3956# 3967 3978 SEQ 0360
3978# 3989 4000 4000# 4011 4022 4022# 4033 4044 4044# 4055 4066 4066# 4077
4088 4088# 4099 4110 4110# 4121 4132 4132# 4143 4154 4154# 4165 4176 4176#
4187 4198 4198# 4209 4220 4220# 4231 4242 4242# 4253 4264 4264# 4275 4286
4286# 4297 4308 4308# 4319 4330 4330# 4341 4371# 4404 4404# 4415 4426 4426#
4437 4448 4448# 4459 4470 4470# 4481 4492 4492# 4503 4514 4514# 4525 4536
4536# 4547 4558 4558# 4569 4580 4580# 4591 4602 4602# 4613 4624 4624# 4635
4646 4646# 4657 4668 4668# 4679 4690 4690# 4701 4712 4712# 4723 4734 4734#
4745 4756 4756# 4767 4778 4778# 4789 4825 4825# 4836 4847 4847# 4858 4869
4869# 4880 4891 4891# 4902 4913 4913# 4924 4935 4935# 4946 4957 4957# 4968
4979 4979# 4990 5001 5001# 5012 5023 5023# 5034 5045 5045# 5056 5067 5067#
5078 5089 5089# 5100 5111 5111# 5122 5133 5133# 5144 5155 5155# 5166 5177
5177# 5188 5199 5199# 5210 5213# 5244 5244# 5255 5265 5265# 5276 5286 5286#
5297 5307 5307# 5318 5328 5328# 5339 5349 5349# 5360 5370 5370# 5381 5391
5391# 5402 5412 5412# 5423 5433 5433# 5444 5454 5454# 5465 5475 5475# 5486
5496 5496# 5507 5517 5517# 5528 5538 5538# 5549 5559 5559# 5570 5580 5580#
5591 5601 5601# 5612 5648 5648# 5659 5670 5670# 5681 5692 5692# 5703 5714
5714# 5725 5736 5736# 5747 5758 5758# 5769 5780 5780# 5791 5802 5802# 5813
5824 5824# 5835 5846 5846# 5857 5868 5868# 5879 5890 5890# 5901 5912 5912#
5923 5934 5934# 5945 5956 5956# 5967 5978 5978# 5989 6000 6000# 6011 6022
6022# 6033 6063# 6098 6098# 6111 6122 6122# 6135 6146 6146# 6159 6170 6170#
6183 6194 6194# 6207 6218 6218# 6231 6242 6242# 6255 6266 6266# 6279 6290
6290# 6303 6314 6314# 6327 6338 6338# 6351 6362 6362# 6375 6386 6386# 6399
6410 6410# 6423 6434 6434# 6447 6458 6458# 6471 6482 6482# 6495 6506 6506#
6519 6557 6557# 6570 6581 6581# 6594 6605 6605# 6618 6629 6629# 6642 6653
6653# 6666 6677 6677# 6690 6701 6701# 6714 6725 6725# 6738 6749 6749# 6762
6773 6773# 6786 6797 6797# 6810 6821 6821# 6834 6845 6845# 6858 6869 6869#
6882 6893 6893# 6906 6917 6917# 6930 6941 6941# 6954 6965 6965# 6978 6981#
7016 7016# 7029 7040 7040# 7053 7064 7064# 7077 7088 7088# 7101 7112 7112#
7125 7136 7136# 7149 7160 7160# 7173 7184 7184# 7197 7208 7208# 7221 7232
7232# 7245 7256 7256# 7269 7280 7280# 7293 7304 7304# 7317 7328 7328# 7341
7352 7352# 7365 7376 7376# 7389 7400 7400# 7413 7424 7424# 7437 7475 7475#
7488 7499 7499# 7512 7523 7523# 7536 7547 7547# 7560 7571 7571# 7584 7595
7595# 7608 7619 7619# 7632 7643 7643# 7656 7667 7667# 7680 7691 7691# 7704
7715 7715# 7728 7739 7739# 7752 7763 7763# 7776 7787 7787# 7800 7811 7811#
7824 7835 7835# 7848 7859 7859# 7872 7883 7883# 7896 7933# 7971 7971# 7983
7996 7996# 8008 8021 8021# 8033 8046 8046# 8058 8071 8071# 8083 8096 8096#
8108 8121 8121# 8133 8146 8146# 8158 8171 8171# 8183 8196 8196# 8208 8221
8221# 8233 8246 8246# 8258 8271 8271# 8283 8296 8296# 8308 8321 8321# 8333
8346 8346# 8358 8371 8371# 8383 8396 8396# 8408 8446 8446# 8455 8468 8468#
8477 8490 8490# 8499 8512 8512# 8521 8534 8534# 8543 8556 8556# 8565 8578
8578# 8587 8600 8600# 8609 8622 8622# 8631 8644 8644# 8653 8666 8666# 8675
8688 8688# 8697 8710 8710# 8719 8732 8732# 8741 8754 8754# 8763 8776 8776#
8785 8798 8798# 8807 8810# 8847 8847# 8859 8872 8872# 8884 8897 8897# 8909
8922 8922# 8934 8947 8947# 8959 8972 8972# 8984 8997 8997# 9009 9022 9022#
9034 9047 9047# 9059 9072 9072# 9084 9097 9097# 9109 9122 9122# 9134 9147
9147# 9159 9172 9172# 9184 9197 9197# 9209 9222 9222# 9234 9247 9247# 9259
9272 9272# 9284 9324 9324# 9347 9347# 9370 9370# 9393 9393# 9416 9416# 9439
9439# 9462 9462# 9485 9485# 9508 9508# 9531 9531# 9554 9554# 9577 9577# 9600
9600# 9623 9623# 9646 9646# 9669 9669# 9692 9692# 9736# 9775 9775# 9787 9801
9801# 9813 9827 9827# 9839 9853 9853# 9865 9879 9879# 9891 9905 9905# 9917
9931 9931# 9943 9957 9957# 9969 9983 9983# 9995 10009 10009# 10021 10035 10035#
10047 10061 10061# 10073 10087 10087# 10099 10113 10113# 10125 10139 10139# 10151 10165
10165# 10177 10191 10191# 10203 10217 10217# 10229 10268 10268# 10278 10291 10291# 10301 SEQ 0361
10314 10314# 10324 10337 10337# 10347 10360 10360# 10370 10383 10383# 10393 10406 10406#
10416 10429 10429# 10439 10452 10452# 10462 10475 10475# 10485 10498 10498# 10508 10521
10521# 10531 10544 10544# 10554 10567 10567# 10577 10590 10590# 10600 10613 10613# 10623
10636 10636# 10646 10649# 10687 10687# 10699 10712 10712# 10724 10737 10737# 10749 10762
10762# 10774 10787 10787# 10799 10812 10812# 10824 10837 10837# 10849 10862 10862# 10874
10887 10887# 10899 10912 10912# 10924 10937 10937# 10949 10962 10962# 10974 10987 10987#
10999 11012 11012# 11024 11037 11037# 11049 11062 11062# 11074 11087 11087# 11099 11112
11112# 11124 11162 11162# 11171 11184 11184# 11193 11206 11206# 11215 11228 11228# 11237
11250 11250# 11259 11272 11272# 11281 11294 11294# 11303 11316 11316# 11325 11338 11338#
11347 11360 11360# 11369 11382 11382# 11391 11404 11404# 11413 11426 11426# 11435 11448
11448# 11457 11470 11470# 11479 11492 11492# 11501 11514 11514# 11523 11558# 11598 11598#
11612 11625 11625# 11639 11652 11652# 11666 11679 11679# 11693 11706 11706# 11720 11733
11733# 11747 11760 11760# 11774 11787 11787# 11801 11814 11814# 11828 11841 11841# 11855
11868 11868# 11882 11895 11895# 11909 11922 11922# 11936 11949 11949# 11963 11976 11976#
11990 12003 12003# 12017 12030 12030# 12044 12057 12057# 12071 12110 12110# 12120 12133
12133# 12143 12156 12156# 12166 12179 12179# 12189 12202 12202# 12212 12225 12225# 12235
12248 12248# 12258 12271 12271# 12281 12294 12294# 12304 12317 12317# 12327 12340 12340#
12350 12363 12363# 12373 12386 12386# 12396 12409 12409# 12419 12432 12432# 12442 12455
12455# 12465 12468# 12509 12509# 12524 12537 12537# 12552 12565 12565# 12580 12593 12593#
12608 12621 12621# 12636 12649 12649# 12664 12677 12677# 12692 12705 12705# 12720 12733
12733# 12748 12761 12761# 12776 12789 12789# 12804 12817 12817# 12832 12845 12845# 12860
12873 12873# 12888 12901 12901# 12916 12929 12929# 12944 12957 12957# 12972 12985 12985#
13000 13038 13038# 13047 13060 13060# 13069 13082 13082# 13091 13104 13104# 13113 13126
13126# 13135 13148 13148# 13157 13170 13170# 13179 13192 13192# 13201 13214 13214# 13223
13236 13236# 13245 13258 13258# 13267 13280 13280# 13289 13302 13302# 13311 13324 13324#
13333 13346 13346# 13355 13368 13368# 13377
SNTRP 409#
SPACE 605#
SPDES 15523#
SRTDDT 69 435#
START 423 759#
START1 442#
START2 443#
START3 444#
START4 445#
START5 446#
STARTA 438 763#
STRP 409#
SUBLNK 181# 439
SWPTAB 726#
SWTEXR 454#
SYSEXR 427#
TAB 606#
TESTPC 481# 780 799 832 851 884 903 968 1644 2346 2478 2604 4352 6043
7910 9713 11535
TICKS 484#
TLET 761 15497 15520#
TN0 409#
TN1 409#
TOTALS 147#
TRP3TP 409#
TTNBRF 664#
TTYFIL 580# SEQ 0362
TTYSPD 581#
TXTINH 158# 15481
UBAVEC 409#
USER 471#
USERF 409#
USRASB 60# 461
USRCRF 590#
USRLFF 589#
UUODIS 543#
UUOEXT 499# 15568
UUORTN 500#
UUOSKP 497#
YY 2661# 2664 2684# 2687 2707# 2710 2730# 2733 2753# 2756 2776# 2779 2799# 2802
2822# 2825 2845# 2848 2868# 2871 2891# 2894 2914# 2917 2937# 2940 2960# 2963
2983# 2986 3006# 3009 3029# 3032 3052# 3101# 3104 3124# 3127 3147# 3150 3170#
3173 3193# 3196 3216# 3219 3239# 3242 3262# 3265 3285# 3288 3308# 3311 3331#
3334 3354# 3357 3377# 3380 3400# 3403 3423# 3426 3446# 3449 3469# 3472 3492#
3539# 3542 3561# 3564 3583# 3586 3605# 3608 3627# 3630 3649# 3652 3671# 3674
3693# 3696 3715# 3718 3737# 3740 3759# 3762 3781# 3784 3803# 3806 3825# 3828
3847# 3850 3869# 3872 3891# 3894 3913# 3959# 3962 3981# 3984 4003# 4006 4025#
4028 4047# 4050 4069# 4072 4091# 4094 4113# 4116 4135# 4138 4157# 4160 4179#
4182 4201# 4204 4223# 4226 4245# 4248 4267# 4270 4289# 4292 4311# 4314 4333#
4407# 4410 4429# 4432 4451# 4454 4473# 4476 4495# 4498 4517# 4520 4539# 4542
4561# 4564 4583# 4586 4605# 4608 4627# 4630 4649# 4652 4671# 4674 4693# 4696
4715# 4718 4737# 4740 4759# 4762 4781# 4828# 4831 4850# 4853 4872# 4875 4894#
4897 4916# 4919 4938# 4941 4960# 4963 4982# 4985 5004# 5007 5026# 5029 5048#
5051 5070# 5073 5092# 5095 5114# 5117 5136# 5139 5158# 5161 5180# 5183 5202#
5247# 5250 5268# 5271 5289# 5292 5310# 5313 5331# 5334 5352# 5355 5373# 5376
5394# 5397 5415# 5418 5436# 5439 5457# 5460 5478# 5481 5499# 5502 5520# 5523
5541# 5544 5562# 5565 5583# 5586 5604# 5651# 5654 5673# 5676 5695# 5698 5717#
5720 5739# 5742 5761# 5764 5783# 5786 5805# 5808 5827# 5830 5849# 5852 5871#
5874 5893# 5896 5915# 5918 5937# 5940 5959# 5962 5981# 5984 6003# 6006 6025#
6101# 6104 6125# 6128 6149# 6152 6173# 6176 6197# 6200 6221# 6224 6245# 6248
6269# 6272 6293# 6296 6317# 6320 6341# 6344 6365# 6368 6389# 6392 6413# 6416
6437# 6440 6461# 6464 6485# 6509# 6560# 6563 6584# 6587 6608# 6611 6632# 6635
6656# 6659 6680# 6683 6704# 6707 6728# 6731 6752# 6755 6776# 6779 6800# 6803
6824# 6827 6848# 6851 6872# 6875 6896# 6899 6920# 6923 6944# 6968# 7019# 7022
7043# 7046 7067# 7070 7091# 7094 7115# 7118 7139# 7142 7163# 7166 7187# 7190
7211# 7214 7235# 7238 7259# 7262 7283# 7286 7307# 7310 7331# 7334 7355# 7358
7379# 7382 7403# 7427# 7478# 7481 7502# 7505 7526# 7529 7550# 7553 7574# 7577
7598# 7601 7622# 7625 7646# 7649 7670# 7673 7694# 7697 7718# 7721 7742# 7745
7766# 7769 7790# 7793 7814# 7817 7838# 7841 7862# 7886# 7974# 7978 7999# 8003
8024# 8028 8049# 8053 8074# 8078 8099# 8103 8124# 8128 8149# 8153 8174# 8178
8199# 8203 8224# 8228 8249# 8253 8274# 8278 8299# 8303 8324# 8328 8349# 8353
8374# 8378 8399# 8449# 8452 8471# 8474 8493# 8496 8515# 8518 8537# 8540 8559#
8562 8581# 8584 8603# 8606 8625# 8628 8647# 8650 8669# 8672 8691# 8694 8713#
8716 8735# 8738 8757# 8760 8779# 8782 8801# 8804 8850# 8854 8875# 8879 8900#
8904 8925# 8929 8950# 8954 8975# 8979 9000# 9004 9025# 9029 9050# 9054 9075#
9079 9100# 9104 9125# 9129 9150# 9154 9175# 9179 9200# 9204 9225# 9229 9250#
9254 9275# 9327# 9330 9350# 9353 9373# 9376 9396# 9399 9419# 9422 9442# 9445
9465# 9468 9488# 9491 9511# 9514 9534# 9537 9557# 9560 9580# 9583 9603# 9606
9626# 9629 9649# 9652 9672# 9675 9695# 9698 9778# 9782 9804# 9808 9830# 9834
9856# 9860 9882# 9886 9908# 9912 9934# 9938 9960# 9964 9986# 9990 10012# 10016 SEQ 0363
10038# 10042 10064# 10068 10090# 10094 10116# 10120 10142# 10146 10168# 10172 10194# 10198
10220# 10272# 10275 10295# 10298 10318# 10321 10341# 10344 10364# 10367 10387# 10390 10410#
10413 10433# 10436 10456# 10459 10479# 10482 10502# 10505 10525# 10528 10548# 10551 10571#
10574 10594# 10597 10617# 10620 10640# 10643 10690# 10694 10715# 10719 10740# 10744 10765#
10769 10790# 10794 10815# 10819 10840# 10844 10865# 10869 10890# 10894 10915# 10919 10940#
10944 10965# 10969 10990# 10994 11015# 11019 11040# 11044 11065# 11069 11090# 11094 11115#
11165# 11168 11187# 11190 11209# 11212 11231# 11234 11253# 11256 11275# 11278 11297# 11300
11319# 11322 11341# 11344 11363# 11366 11385# 11388 11407# 11410 11429# 11432 11451# 11454
11473# 11476 11495# 11498 11517# 11520 11601# 11605 11628# 11632 11655# 11659 11682# 11686
11709# 11713 11736# 11740 11763# 11767 11790# 11794 11817# 11821 11844# 11848 11871# 11875
11898# 11902 11925# 11929 11952# 11956 11979# 11983 12006# 12010 12033# 12060# 12064 12113#
12117 12136# 12140 12159# 12163 12182# 12186 12205# 12209 12228# 12232 12251# 12255 12274#
12278 12297# 12301 12320# 12324 12343# 12347 12366# 12370 12389# 12393 12412# 12416 12435#
12439 12458# 12462 12513# 12517 12541# 12545 12569# 12573 12597# 12601 12625# 12629 12653#
12657 12681# 12685 12709# 12713 12737# 12741 12765# 12769 12793# 12797 12821# 12825 12849#
12853 12877# 12881 12905# 12909 12933# 12937 12961# 12989# 12993 13041# 13044 13063# 13066
13085# 13088 13107# 13110 13129# 13132 13151# 13154 13173# 13176 13195# 13198 13217# 13220
13239# 13242 13261# 13264 13283# 13286 13305# 13308 13327# 13330 13349# 13352 13371# 13374
ZZ 973# 999 999# 1000 1000# 1002 1004 1016 1016# 1017 1019 1021 1033 1033#
1034 1036 1038 1050 1050# 1051 1053 1055 1067 1067# 1068 1070 1072 1084
1084# 1085 1087 1089 1101 1101# 1102 1104 1106 1118 1118# 1119 1121 1123
1135 1135# 1136 1138 1140 1152 1152# 1153 1155 1157 1169 1169# 1170 1172
1174 1186 1186# 1187 1189 1191 1203 1203# 1204 1206 1208 1220 1220# 1221
1223 1225 1237 1237# 1238 1240 1242 1254 1254# 1255 1257 1259 1271 1271#
1272 1274 1276 1288 1288# 1289 1291 1293 1298# 1325 1325# 1326 1326# 1328
1343 1343# 1344 1346 1361 1361# 1362 1364 1379 1379# 1380 1382 1397 1397#
1398 1400 1415 1415# 1416 1418 1433 1433# 1434 1436 1451 1451# 1452 1454
1469 1469# 1470 1472 1487 1487# 1488 1490 1505 1505# 1506 1508 1523 1523#
1524 1526 1541 1541# 1542 1544 1559 1559# 1560 1562 1577 1577# 1578 1580
1595 1595# 1596 1598 1613 1613# 1614 1616 1631 1631# 1632 1634 1650# 1678
1678# 1679 1681 1696 1696# 1697 1699 1714 1714# 1715 1717 1732 1732# 1733
1735 1750 1750# 1751 1753 1768 1768# 1769 1771 1786 1786# 1787 1789 1804
1804# 1805 1807 1822 1822# 1823 1825 1840 1840# 1841 1843 1858 1858# 1859
1861 1876 1876# 1877 1879 1894 1894# 1895 1897 1912 1912# 1913 1915 1930
1930# 1931 1933 1948 1948# 1949 1951 1966 1966# 1967 1969 1984 1984# 1985
1987 1995# 2022 2022# 2023 2025 2040 2040# 2041 2043 2058 2058# 2059 2061
2076 2076# 2077 2079 2094 2094# 2095 2097 2112 2112# 2113 2115 2130 2130#
2131 2133 2148 2148# 2149 2151 2166 2166# 2167 2169 2184 2184# 2185 2187
2202 2202# 2203 2205 2220 2220# 2221 2223 2238 2238# 2239 2241 2256 2256#
2257 2259 2274 2274# 2275 2277 2292 2292# 2293 2295 2310 2310# 2311 2313
2328 2328# 2329 2331 2483# 2503 2503# 2505 2515 2515# 2517 2527 2527# 2529
2536# 2559 2559# 2562 2573 2573# 2576 2587 2587# 2590 2624# 2659 2659# 2660
2660# 2661 2662 2663 2665 2682 2682# 2683 2684 2685 2686 2688 2705 2705#
2706 2707 2708 2709 2711 2728 2728# 2729 2730 2731 2732 2734 2751 2751#
2752 2753 2754 2755 2757 2774 2774# 2775 2776 2777 2778 2780 2797 2797#
2798 2799 2800 2801 2803 2820 2820# 2821 2822 2823 2824 2826 2843 2843#
2844 2845 2846 2847 2849 2866 2866# 2867 2868 2869 2870 2872 2889 2889#
2890 2891 2892 2893 2895 2912 2912# 2913 2914 2915 2916 2918 2935 2935#
2936 2937 2938 2939 2941 2958 2958# 2959 2960 2961 2962 2964 2981 2981#
2982 2983 2984 2985 2987 3004 3004# 3005 3006 3007 3008 3010 3027 3027#
3028 3029 3030 3031 3033 3050 3050# 3051 3052 3053 3054 3056 3064# 3099
3099# 3100 3100# 3101 3102 3103 3105 3122 3122# 3123 3124 3125 3126 3128
3145 3145# 3146 3147 3148 3149 3151 3168 3168# 3169 3170 3171 3172 3174 SEQ 0364
3191 3191# 3192 3193 3194 3195 3197 3214 3214# 3215 3216 3217 3218 3220
3237 3237# 3238 3239 3240 3241 3243 3260 3260# 3261 3262 3263 3264 3266
3283 3283# 3284 3285 3286 3287 3289 3306 3306# 3307 3308 3309 3310 3312
3329 3329# 3330 3331 3332 3333 3335 3352 3352# 3353 3354 3355 3356 3358
3375 3375# 3376 3377 3378 3379 3381 3398 3398# 3399 3400 3401 3402 3404
3421 3421# 3422 3423 3424 3425 3427 3444 3444# 3445 3446 3447 3448 3450
3467 3467# 3468 3469 3470 3471 3473 3490 3490# 3491 3492 3493 3494 3496
3504# 3537 3537# 3538 3538# 3539 3540 3541 3543 3559 3559# 3560 3561 3562
3563 3565 3581 3581# 3582 3583 3584 3585 3587 3603 3603# 3604 3605 3606
3607 3609 3625 3625# 3626 3627 3628 3629 3631 3647 3647# 3648 3649 3650
3651 3653 3669 3669# 3670 3671 3672 3673 3675 3691 3691# 3692 3693 3694
3695 3697 3713 3713# 3714 3715 3716 3717 3719 3735 3735# 3736 3737 3738
3739 3741 3757 3757# 3758 3759 3760 3761 3763 3779 3779# 3780 3781 3782
3783 3785 3801 3801# 3802 3803 3804 3805 3807 3823 3823# 3824 3825 3826
3827 3829 3845 3845# 3846 3847 3848 3849 3851 3867 3867# 3868 3869 3870
3871 3873 3889 3889# 3890 3891 3892 3893 3895 3911 3911# 3912 3913 3914
3915 3917 3925# 3957 3957# 3958 3958# 3959 3960 3961 3963 3979 3979# 3980
3981 3982 3983 3985 4001 4001# 4002 4003 4004 4005 4007 4023 4023# 4024
4025 4026 4027 4029 4045 4045# 4046 4047 4048 4049 4051 4067 4067# 4068
4069 4070 4071 4073 4089 4089# 4090 4091 4092 4093 4095 4111 4111# 4112
4113 4114 4115 4117 4133 4133# 4134 4135 4136 4137 4139 4155 4155# 4156
4157 4158 4159 4161 4177 4177# 4178 4179 4180 4181 4183 4199 4199# 4200
4201 4202 4203 4205 4221 4221# 4222 4223 4224 4225 4227 4243 4243# 4244
4245 4246 4247 4249 4265 4265# 4266 4267 4268 4269 4271 4287 4287# 4288
4289 4290 4291 4293 4309 4309# 4310 4311 4312 4313 4315 4331 4331# 4332
4333 4334 4335 4337 4372# 4405 4405# 4406 4406# 4407 4408 4409 4411 4427
4427# 4428 4429 4430 4431 4433 4449 4449# 4450 4451 4452 4453 4455 4471
4471# 4472 4473 4474 4475 4477 4493 4493# 4494 4495 4496 4497 4499 4515
4515# 4516 4517 4518 4519 4521 4537 4537# 4538 4539 4540 4541 4543 4559
4559# 4560 4561 4562 4563 4565 4581 4581# 4582 4583 4584 4585 4587 4603
4603# 4604 4605 4606 4607 4609 4625 4625# 4626 4627 4628 4629 4631 4647
4647# 4648 4649 4650 4651 4653 4669 4669# 4670 4671 4672 4673 4675 4691
4691# 4692 4693 4694 4695 4697 4713 4713# 4714 4715 4716 4717 4719 4735
4735# 4736 4737 4738 4739 4741 4757 4757# 4758 4759 4760 4761 4763 4779
4779# 4780 4781 4782 4783 4785 4793# 4826 4826# 4827 4827# 4828 4829 4830
4832 4848 4848# 4849 4850 4851 4852 4854 4870 4870# 4871 4872 4873 4874
4876 4892 4892# 4893 4894 4895 4896 4898 4914 4914# 4915 4916 4917 4918
4920 4936 4936# 4937 4938 4939 4940 4942 4958 4958# 4959 4960 4961 4962
4964 4980 4980# 4981 4982 4983 4984 4986 5002 5002# 5003 5004 5005 5006
5008 5024 5024# 5025 5026 5027 5028 5030 5046 5046# 5047 5048 5049 5050
5052 5068 5068# 5069 5070 5071 5072 5074 5090 5090# 5091 5092 5093 5094
5096 5112 5112# 5113 5114 5115 5116 5118 5134 5134# 5135 5136 5137 5138
5140 5156 5156# 5157 5158 5159 5160 5162 5178 5178# 5179 5180 5181 5182
5184 5200 5200# 5201 5202 5203 5204 5206 5214# 5245 5245# 5246 5246# 5247
5248 5249 5251 5266 5266# 5267 5268 5269 5270 5272 5287 5287# 5288 5289
5290 5291 5293 5308 5308# 5309 5310 5311 5312 5314 5329 5329# 5330 5331
5332 5333 5335 5350 5350# 5351 5352 5353 5354 5356 5371 5371# 5372 5373
5374 5375 5377 5392 5392# 5393 5394 5395 5396 5398 5413 5413# 5414 5415
5416 5417 5419 5434 5434# 5435 5436 5437 5438 5440 5455 5455# 5456 5457
5458 5459 5461 5476 5476# 5477 5478 5479 5480 5482 5497 5497# 5498 5499
5500 5501 5503 5518 5518# 5519 5520 5521 5522 5524 5539 5539# 5540 5541
5542 5543 5545 5560 5560# 5561 5562 5563 5564 5566 5581 5581# 5582 5583
5584 5585 5587 5602 5602# 5603 5604 5605 5606 5608 5616# 5649 5649# 5650 SEQ 0365
5650# 5651 5652 5653 5655 5671 5671# 5672 5673 5674 5675 5677 5693 5693#
5694 5695 5696 5697 5699 5715 5715# 5716 5717 5718 5719 5721 5737 5737#
5738 5739 5740 5741 5743 5759 5759# 5760 5761 5762 5763 5765 5781 5781#
5782 5783 5784 5785 5787 5803 5803# 5804 5805 5806 5807 5809 5825 5825#
5826 5827 5828 5829 5831 5847 5847# 5848 5849 5850 5851 5853 5869 5869#
5870 5871 5872 5873 5875 5891 5891# 5892 5893 5894 5895 5897 5913 5913#
5914 5915 5916 5917 5919 5935 5935# 5936 5937 5938 5939 5941 5957 5957#
5958 5959 5960 5961 5963 5979 5979# 5980 5981 5982 5983 5985 6001 6001#
6002 6003 6004 6005 6007 6023 6023# 6024 6025 6026 6027 6029 6064# 6099
6099# 6100 6100# 6101 6102 6103 6105 6107 6123 6123# 6124 6125 6126 6127
6129 6131 6147 6147# 6148 6149 6150 6151 6153 6155 6171 6171# 6172 6173
6174 6175 6177 6179 6195 6195# 6196 6197 6198 6199 6201 6203 6219 6219#
6220 6221 6222 6223 6225 6227 6243 6243# 6244 6245 6246 6247 6249 6251
6267 6267# 6268 6269 6270 6271 6273 6275 6291 6291# 6292 6293 6294 6295
6297 6299 6315 6315# 6316 6317 6318 6319 6321 6323 6339 6339# 6340 6341
6342 6343 6345 6347 6363 6363# 6364 6365 6366 6367 6369 6371 6387 6387#
6388 6389 6390 6391 6393 6395 6411 6411# 6412 6413 6414 6415 6417 6419
6435 6435# 6436 6437 6438 6439 6441 6443 6459 6459# 6460 6461 6462 6463
6465 6467 6483 6483# 6484 6485 6486 6487 6489 6491 6507 6507# 6508 6509
6510 6511 6513 6515 6523# 6558 6558# 6559 6559# 6560 6561 6562 6564 6566
6582 6582# 6583 6584 6585 6586 6588 6590 6606 6606# 6607 6608 6609 6610
6612 6614 6630 6630# 6631 6632 6633 6634 6636 6638 6654 6654# 6655 6656
6657 6658 6660 6662 6678 6678# 6679 6680 6681 6682 6684 6686 6702 6702#
6703 6704 6705 6706 6708 6710 6726 6726# 6727 6728 6729 6730 6732 6734
6750 6750# 6751 6752 6753 6754 6756 6758 6774 6774# 6775 6776 6777 6778
6780 6782 6798 6798# 6799 6800 6801 6802 6804 6806 6822 6822# 6823 6824
6825 6826 6828 6830 6846 6846# 6847 6848 6849 6850 6852 6854 6870 6870#
6871 6872 6873 6874 6876 6878 6894 6894# 6895 6896 6897 6898 6900 6902
6918 6918# 6919 6920 6921 6922 6924 6926 6942 6942# 6943 6944 6945 6946
6948 6950 6966 6966# 6967 6968 6969 6970 6972 6974 6982# 7017 7017# 7018
7018# 7019 7020 7021 7023 7025 7041 7041# 7042 7043 7044 7045 7047 7049
7065 7065# 7066 7067 7068 7069 7071 7073 7089 7089# 7090 7091 7092 7093
7095 7097 7113 7113# 7114 7115 7116 7117 7119 7121 7137 7137# 7138 7139
7140 7141 7143 7145 7161 7161# 7162 7163 7164 7165 7167 7169 7185 7185#
7186 7187 7188 7189 7191 7193 7209 7209# 7210 7211 7212 7213 7215 7217
7233 7233# 7234 7235 7236 7237 7239 7241 7257 7257# 7258 7259 7260 7261
7263 7265 7281 7281# 7282 7283 7284 7285 7287 7289 7305 7305# 7306 7307
7308 7309 7311 7313 7329 7329# 7330 7331 7332 7333 7335 7337 7353 7353#
7354 7355 7356 7357 7359 7361 7377 7377# 7378 7379 7380 7381 7383 7385
7401 7401# 7402 7403 7404 7405 7407 7409 7425 7425# 7426 7427 7428 7429
7431 7433 7441# 7476 7476# 7477 7477# 7478 7479 7480 7482 7484 7500 7500#
7501 7502 7503 7504 7506 7508 7524 7524# 7525 7526 7527 7528 7530 7532
7548 7548# 7549 7550 7551 7552 7554 7556 7572 7572# 7573 7574 7575 7576
7578 7580 7596 7596# 7597 7598 7599 7600 7602 7604 7620 7620# 7621 7622
7623 7624 7626 7628 7644 7644# 7645 7646 7647 7648 7650 7652 7668 7668#
7669 7670 7671 7672 7674 7676 7692 7692# 7693 7694 7695 7696 7698 7700
7716 7716# 7717 7718 7719 7720 7722 7724 7740 7740# 7741 7742 7743 7744
7746 7748 7764 7764# 7765 7766 7767 7768 7770 7772 7788 7788# 7789 7790
7791 7792 7794 7796 7812 7812# 7813 7814 7815 7816 7818 7820 7836 7836#
7837 7838 7839 7840 7842 7844 7860 7860# 7861 7862 7863 7864 7866 7868
7884 7884# 7885 7886 7887 7888 7890 7892 7934# 7972 7972# 7973 7973# 7974
7976 7977 7979 7997 7997# 7998 7999 8001 8002 8004 8022 8022# 8023 8024
8026 8027 8029 8047 8047# 8048 8049 8051 8052 8054 8072 8072# 8073 8074 SEQ 0366
8076 8077 8079 8097 8097# 8098 8099 8101 8102 8104 8122 8122# 8123 8124
8126 8127 8129 8147 8147# 8148 8149 8151 8152 8154 8172 8172# 8173 8174
8176 8177 8179 8197 8197# 8198 8199 8201 8202 8204 8222 8222# 8223 8224
8226 8227 8229 8247 8247# 8248 8249 8251 8252 8254 8272 8272# 8273 8274
8276 8277 8279 8297 8297# 8298 8299 8301 8302 8304 8322 8322# 8323 8324
8326 8327 8329 8347 8347# 8348 8349 8351 8352 8354 8372 8372# 8373 8374
8376 8377 8379 8397 8397# 8398 8399 8401 8402 8404 8412# 8447 8447# 8448
8448# 8449 8451 8469 8469# 8470 8471 8473 8491 8491# 8492 8493 8495 8513
8513# 8514 8515 8517 8535 8535# 8536 8537 8539 8557 8557# 8558 8559 8561
8579 8579# 8580 8581 8583 8601 8601# 8602 8603 8605 8623 8623# 8624 8625
8627 8645 8645# 8646 8647 8649 8667 8667# 8668 8669 8671 8689 8689# 8690
8691 8693 8711 8711# 8712 8713 8715 8733 8733# 8734 8735 8737 8755 8755#
8756 8757 8759 8777 8777# 8778 8779 8781 8799 8799# 8800 8801 8803 8811#
8848 8848# 8849 8849# 8850 8852 8853 8855 8873 8873# 8874 8875 8877 8878
8880 8898 8898# 8899 8900 8902 8903 8905 8923 8923# 8924 8925 8927 8928
8930 8948 8948# 8949 8950 8952 8953 8955 8973 8973# 8974 8975 8977 8978
8980 8998 8998# 8999 9000 9002 9003 9005 9023 9023# 9024 9025 9027 9028
9030 9048 9048# 9049 9050 9052 9053 9055 9073 9073# 9074 9075 9077 9078
9080 9098 9098# 9099 9100 9102 9103 9105 9123 9123# 9124 9125 9127 9128
9130 9148 9148# 9149 9150 9152 9153 9155 9173 9173# 9174 9175 9177 9178
9180 9198 9198# 9199 9200 9202 9203 9205 9223 9223# 9224 9225 9227 9228
9230 9248 9248# 9249 9250 9252 9253 9255 9273 9273# 9274 9275 9277 9278
9280 9288# 9325 9325# 9326 9326# 9327 9329 9348 9348# 9349 9350 9352 9371
9371# 9372 9373 9375 9394 9394# 9395 9396 9398 9417 9417# 9418 9419 9421
9440 9440# 9441 9442 9444 9463 9463# 9464 9465 9467 9486 9486# 9487 9488
9490 9509 9509# 9510 9511 9513 9532 9532# 9533 9534 9536 9555 9555# 9556
9557 9559 9578 9578# 9579 9580 9582 9601 9601# 9602 9603 9605 9624 9624#
9625 9626 9628 9647 9647# 9648 9649 9651 9670 9670# 9671 9672 9674 9693
9693# 9694 9695 9697 9737# 9776 9776# 9777 9777# 9778 9780 9781 9783 9802
9802# 9803 9804 9806 9807 9809 9828 9828# 9829 9830 9832 9833 9835 9854
9854# 9855 9856 9858 9859 9861 9880 9880# 9881 9882 9884 9885 9887 9906
9906# 9907 9908 9910 9911 9913 9932 9932# 9933 9934 9936 9937 9939 9958
9958# 9959 9960 9962 9963 9965 9984 9984# 9985 9986 9988 9989 9991 10010
10010# 10011 10012 10014 10015 10017 10036 10036# 10037 10038 10040 10041 10043 10062
10062# 10063 10064 10066 10067 10069 10088 10088# 10089 10090 10092 10093 10095 10114
10114# 10115 10116 10118 10119 10121 10140 10140# 10141 10142 10144 10145 10147 10166
10166# 10167 10168 10170 10171 10173 10192 10192# 10193 10194 10196 10197 10199 10218
10218# 10219 10220 10222 10223 10225 10233# 10269 10269# 10270 10270# 10272 10274 10292
10292# 10293 10295 10297 10315 10315# 10316 10318 10320 10338 10338# 10339 10341 10343
10361 10361# 10362 10364 10366 10384 10384# 10385 10387 10389 10407 10407# 10408 10410
10412 10430 10430# 10431 10433 10435 10453 10453# 10454 10456 10458 10476 10476# 10477
10479 10481 10499 10499# 10500 10502 10504 10522 10522# 10523 10525 10527 10545 10545#
10546 10548 10550 10568 10568# 10569 10571 10573 10591 10591# 10592 10594 10596 10614
10614# 10615 10617 10619 10637 10637# 10638 10640 10642 10650# 10688 10688# 10689 10689#
10690 10692 10693 10695 10713 10713# 10714 10715 10717 10718 10720 10738 10738# 10739
10740 10742 10743 10745 10763 10763# 10764 10765 10767 10768 10770 10788 10788# 10789
10790 10792 10793 10795 10813 10813# 10814 10815 10817 10818 10820 10838 10838# 10839
10840 10842 10843 10845 10863 10863# 10864 10865 10867 10868 10870 10888 10888# 10889
10890 10892 10893 10895 10913 10913# 10914 10915 10917 10918 10920 10938 10938# 10939
10940 10942 10943 10945 10963 10963# 10964 10965 10967 10968 10970 10988 10988# 10989
10990 10992 10993 10995 11013 11013# 11014 11015 11017 11018 11020 11038 11038# 11039
11040 11042 11043 11045 11063 11063# 11064 11065 11067 11068 11070 11088 11088# 11089
11090 11092 11093 11095 11113 11113# 11114 11115 11117 11118 11120 11128# 11163 11163# SEQ 0367
11164 11164# 11165 11167 11185 11185# 11186 11187 11189 11207 11207# 11208 11209 11211
11229 11229# 11230 11231 11233 11251 11251# 11252 11253 11255 11273 11273# 11274 11275
11277 11295 11295# 11296 11297 11299 11317 11317# 11318 11319 11321 11339 11339# 11340
11341 11343 11361 11361# 11362 11363 11365 11383 11383# 11384 11385 11387 11405 11405#
11406 11407 11409 11427 11427# 11428 11429 11431 11449 11449# 11450 11451 11453 11471
11471# 11472 11473 11475 11493 11493# 11494 11495 11497 11515 11515# 11516 11517 11519
11559# 11599 11599# 11600 11600# 11601 11603 11604 11606 11608 11626 11626# 11627 11628
11630 11631 11633 11635 11653 11653# 11654 11655 11657 11658 11660 11662 11680 11680#
11681 11682 11684 11685 11687 11689 11707 11707# 11708 11709 11711 11712 11714 11716
11734 11734# 11735 11736 11738 11739 11741 11743 11761 11761# 11762 11763 11765 11766
11768 11770 11788 11788# 11789 11790 11792 11793 11795 11797 11815 11815# 11816 11817
11819 11820 11822 11824 11842 11842# 11843 11844 11846 11847 11849 11851 11869 11869#
11870 11871 11873 11874 11876 11878 11896 11896# 11897 11898 11900 11901 11903 11905
11923 11923# 11924 11925 11927 11928 11930 11932 11950 11950# 11951 11952 11954 11955
11957 11959 11977 11977# 11978 11979 11981 11982 11984 11986 12004 12004# 12005 12006
12008 12009 12011 12013 12031 12031# 12032 12033 12035 12036 12038 12040 12058 12058#
12059 12060 12062 12063 12065 12067 12075# 12111 12111# 12112 12112# 12113 12115 12134
12134# 12135 12136 12138 12157 12157# 12158 12159 12161 12180 12180# 12181 12182 12184
12203 12203# 12204 12205 12207 12226 12226# 12227 12228 12230 12249 12249# 12250 12251
12253 12272 12272# 12273 12274 12276 12295 12295# 12296 12297 12299 12318 12318# 12319
12320 12322 12341 12341# 12342 12343 12345 12364 12364# 12365 12366 12368 12387 12387#
12388 12389 12391 12410 12410# 12411 12412 12414 12433 12433# 12434 12435 12437 12456
12456# 12457 12458 12460 12469# 12511 12511# 12512 12512# 12513 12515 12516 12518 12520
12539 12539# 12540 12541 12543 12544 12546 12548 12567 12567# 12568 12569 12571 12572
12574 12576 12595 12595# 12596 12597 12599 12600 12602 12604 12623 12623# 12624 12625
12627 12628 12630 12632 12651 12651# 12652 12653 12655 12656 12658 12660 12679 12679#
12680 12681 12683 12684 12686 12688 12707 12707# 12708 12709 12711 12712 12714 12716
12735 12735# 12736 12737 12739 12740 12742 12744 12763 12763# 12764 12765 12767 12768
12770 12772 12791 12791# 12792 12793 12795 12796 12798 12800 12819 12819# 12820 12821
12823 12824 12826 12828 12847 12847# 12848 12849 12851 12852 12854 12856 12875 12875#
12876 12877 12879 12880 12882 12884 12903 12903# 12904 12905 12907 12908 12910 12912
12931 12931# 12932 12933 12935 12936 12938 12940 12959 12959# 12960 12961 12963 12964
12966 12968 12987 12987# 12988 12989 12991 12992 12994 12996 13004# 13039 13039# 13040
13040# 13041 13043 13061 13061# 13062 13063 13065 13083 13083# 13084 13085 13087 13105
13105# 13106 13107 13109 13127 13127# 13128 13129 13131 13149 13149# 13150 13151 13153
13171 13171# 13172 13173 13175 13193 13193# 13194 13195 13197 13215 13215# 13216 13217
13219 13237 13237# 13238 13239 13241 13259 13259# 13260 13261 13263 13281 13281# 13282
13283 13285 13303 13303# 13304 13305 13307 13325 13325# 13326 13327 13329 13347 13347#
13348 13349 13351 13369 13369# 13370 13371 13373
$$MUUO 695#
$$OUTE 701#
$$TAX1 713#
$$TAX2 714#
$$TOGG 707#
$$UUO 684#
$ACC0 522#
$ACF 15524#
$BEND1 492#
$BEND2 70 493# 15577
$CHRIN 583#
$CRLF 585#
$DEVCH 409#
$DSKUP 462# SEQ 0368
$DVOFF 579#
$EMODE 460#
$FFF 587#
$IBUF 635#
$INEXT 637#
$INNM 636#
$ITRHL 503#
$ITRX1 504#
$LPAPE 15583
$MMAP 463#
$MODVL 458#
$MODVU 459#
$OBUF 626#
$ONETM 486#
$OUTEX 628#
$OUTNM 627#
$PAPER 409
$PARER 510#
$PNAME 456#
$PSHER 514#
$PVER 457#
$RSRTX 506#
$RSRTY 507#
$SPAG1 526#
$START 423#
$SVAPR 524#
$SVPAG 525#
$SVPI 523#
$SVUPC 529# 15431 15435 15461
$SVUUO 528# 15440 15472 15500
$TABF 586#
$TTCHR 582#
$TWCNT 578#
$TYPNB 584#
$UMODE 461#
$UORTX 501#
$USRHL 505#
$UUOER 502# 543
$VTF 588#
%AC1F 15525#
%ACS1A 15442# 15442 15486
%ACTFL 535#
%ACTUL 536#
%ALF 15530#
%AR1F 15529#
%ARF 15528#
%COREC 534#
%CORFL 533#
%DISCR 537#
%E1F 15527#
%EEF 15531#
%EF 15526#
%ER4X 15506 15511# SEQ 0369
%ER5X 15504 15513#
%ER6X 15502 15515#
%ER7X 15508# 15512 15514 15516
%ERAC0 15427# 15427 15443 15477 15567
%ERAC1 15428# 15428 15444 15555
%ERAC2 15429# 15429 15554
%ERFST 15450# 15450 15452
%ERHI1 676#
%ERHI2 677#
%ERHI3 678#
%ERMOR 15482 15509 15538#
%ERMS1 15447# 15573
%ERMS2 15470#
%ERMS3 15488 15495#
%ERRS1 15439 15541# 15572
%ERRS2 15554#
%ERRS4 15446 15570#
%ERRS5 15558 15562 15567#
%ERRS6 15565 15575#
%FF 15532#
%FLTTB 15490 15521#
%NODES 15522#
.JB41 409#
.JBAPR 409#
.JBCNI 409#
.JBDDT 409#
.JBFF 409#
.JBOPC 409#
.JBREL 409#
.JBREN 409#
.JBSA 409#
.JBSYM 409#
.JBTPC 409#
.JBUSY 409#
.JBUUO 409#
.JBVER 409#
APRID 409#
BCIO 409# SEQ 0370
BCIOB 409#
BSIO 409#
BSIOB 409#
CFLUSH 331#
CINVAL 330#
CLOKOP 325#
CLRPT 409#
CWRTBI 332#
DROPDV 292# 738
ENDUUO 338# 491
EOPUUO 339# 493
ER1 33#
ER10 40#
ER11 41#
ER12 42#
ER13 43#
ER2 34#
ER3 35# 787 793 806 815 839 845 858 867 891 897 910 919 940
959 2360 2375 2390 2405 2421 2437 2453 2469 2507 2519 2531 2611 2621
2669 2692 2715 2738 2761 2784 2807 2830 2853 2876 2899 2922 2945 2968
2991 3014 3037 3060 3109 3132 3155 3178 3201 3224 3247 3270 3293 3316
3339 3362 3385 3408 3431 3454 3477 3500 3547 3569 3591 3613 3635 3657
3679 3701 3723 3745 3767 3789 3811 3833 3855 3877 3899 3921 3967 3989
4011 4033 4055 4077 4099 4121 4143 4165 4187 4209 4231 4253 4275 4297
4319 4341 4359 4369 4415 4437 4459 4481 4503 4525 4547 4569 4591 4613
4635 4657 4679 4701 4723 4745 4767 4789 4836 4858 4880 4902 4924 4946
4968 4990 5012 5034 5056 5078 5100 5122 5144 5166 5188 5210 5255 5276
5297 5318 5339 5360 5381 5402 5423 5444 5465 5486 5507 5528 5549 5570
5591 5612 5659 5681 5703 5725 5747 5769 5791 5813 5835 5857 5879 5901
5923 5945 5967 5989 6011 6033 6050 6060 6111 6135 6159 6183 6207 6231
6255 6279 6303 6327 6351 6375 6399 6423 6447 6471 6495 6519 6570 6594
6618 6642 6666 6690 6714 6738 6762 6786 6810 6834 6858 6882 6906 6930
6954 6978 7029 7053 7077 7101 7125 7149 7173 7197 7221 7245 7269 7293
7317 7341 7365 7389 7413 7437 7488 7512 7536 7560 7584 7608 7632 7656
7680 7704 7728 7752 7776 7800 7824 7848 7872 7896 13401 13418 13435 13452
13469 13486 13503 13520 13537 13554 13571 13588 13605 13622 13639 13656 13673 13690
13707 13724 13741 13758 13775 13792 13818 13835 13852 13869 13886 13903 13920 13937
13954 13971 13988 14005 14022 14039 14056 14073 14090 14107 14124 14141 14166 14183
14200 14217 14234 14251 14268 14285 14302 14319 14336 14353 14370 14387 14404 14421
14438 14455 14472 14489 14506 14523 14540 14571 14589 14607 14625 14643 14661 14679
14697 14715 14733 14751 14769 14787 14805 14823 14841 14859 14877 14895 14913 14931
14949 14967 14985 15003 15021 15039 15057 15075 15093 15111 15129 15147 15165 15183
15201 15219 15237 15255 15273 15291 15309 15327 15345 15363 15381 15399 15417
ER4 36# 808 817 860 869 912 921 942 961 1005 1022 1039 1056 1073
1090 1107 1124 1141 1158 1175 1192 1209 1226 1243 1260 1277 1294 1332
1350 1368 1386 1404 1422 1440 1458 1476 1494 1512 1530 1548 1566 1584
1602 1620 1638 1685 1703 1721 1739 1757 1775 1793 1811 1829 1847 1865
1883 1901 1919 1937 1955 1973 1991 2029 2047 2065 2083 2101 2119 2137
2155 2173 2191 2209 2227 2245 2263 2281 2299 2317 2335 2362 2377 2392
2407 2423 2439 2455 2471 2564 2578 2592 7918 7931 7983 8008 8033 8058
8083 8108 8133 8158 8183 8208 8233 8258 8283 8308 8333 8358 8383 8408
8455 8477 8499 8521 8543 8565 8587 8609 8631 8653 8675 8697 8719 8741
8763 8785 8807 8859 8884 8909 8934 8959 8984 9009 9034 9059 9084 9109 SEQ 0371
9134 9159 9184 9209 9234 9259 9284 9333 9356 9379 9402 9425 9448 9471
9494 9517 9540 9563 9586 9609 9632 9655 9678 9701 9721 9734 9787 9813
9839 9865 9891 9917 9943 9969 9995 10021 10047 10073 10099 10125 10151 10177
10203 10229 10278 10301 10324 10347 10370 10393 10416 10439 10462 10485 10508 10531
10554 10577 10600 10623 10646 10699 10724 10749 10774 10799 10824 10849 10874 10899
10924 10949 10974 10999 11024 11049 11074 11099 11124 11171 11193 11215 11237 11259
11281 11303 11325 11347 11369 11391 11413 11435 11457 11479 11501 11523 11543 11556
11612 11639 11666 11693 11720 11747 11774 11801 11828 11855 11882 11909 11936 11963
11990 12017 12044 12071 12120 12143 12166 12189 12212 12235 12258 12281 12304 12327
12350 12373 12396 12419 12442 12465 12524 12552 12580 12608 12636 12664 12692 12720
12748 12776 12804 12832 12860 12888 12916 12944 12972 13000 13047 13069 13091 13113
13135 13157 13179 13201 13223 13245 13267 13289 13311 13333 13355 13377 13403 13420
13437 13454 13471 13488 13505 13522 13539 13556 13573 13590 13607 13624 13641 13658
13675 13692 13709 13726 13743 13760 13777 13794 13820 13837 13854 13871 13888 13905
13922 13939 13956 13973 13990 14007 14024 14041 14058 14075 14092 14109 14126 14143
14168 14185 14202 14219 14236 14253 14270 14287 14304 14321 14338 14355 14372 14389
14406 14423 14440 14457 14474 14491 14508 14525 14542 14573 14591 14609 14627 14645
14663 14681 14699 14717 14735 14753 14771 14789 14807 14825 14843 14861 14879 14897
14915 14933 14951 14969 14987 15005 15023 15041 15059 15077 15095 15113 15131 15149
15167 15185 15203 15221 15239 15257 15275 15293 15311 15329 15347 15365 15383 15401
15419
ER5 37#
ER6 38#
ER7 39#
ERLOOP 379#
ERLP1 380#
ERLP2 381#
ERRHLT 226# 15548
ERROR 388#
ERROR1 399#
ERUUO 378#
FATAL 225#
FRD36 367#
FRD8 368#
FREAD 366#
FSELEC 365#
GET 209#
GO 206#
HALT 211# 512
JEN 213#
JRSTF 212#
MAPADR 348#
MAPCNK 349#
MAPMEM 345#
MAPPNT 351#
MAPSET 350#
MEMSEG 347#
MEMZRO 346#
MODPCP 358#
MODPCU 357#
MTROP 326#
NAME 8# 11
PBELL 301# 15552 SEQ 0372
PCRL 295# 15489 15508
PCRL2 299#
PCRL2F 300#
PCRLF 296#
PFORCE 303#
PGMINT 219# 759
PJRST 210#
PMSG 305# 15455 15459 15470 15495
PMSGF 308# 15575
PNT1 261#
PNT11 275#
PNT11F 276#
PNT1F 262#
PNT2 263#
PNT2F 264#
PNT3 265# 15507
PNT3F 266#
PNT4 267# 15511
PNT4F 268#
PNT5 269# 15513
PNT5F 270#
PNT6 271# 15463 15515
PNT6F 272#
PNT7 273#
PNT7F 274#
PNTA 247# 15498
PNTADF 278#
PNTADR 277#
PNTAF 248#
PNTAL 249# 15491
PNTALF 250#
PNTCHF 260#
PNTCHR 259#
PNTCI 257#
PNTCIF 258#
PNTCW 293#
PNTCWF 294#
PNTDCF 286#
PNTDEC 285# 15458
PNTDS 287#
PNTDSF 288#
PNTHW 281# 15478
PNTHWF 282#
PNTMSF 254#
PNTMSG 253#
PNTNM 289# 15451
PNTOCF 284#
PNTOCS 283#
PNTOCT 279#
PNTOTF 280#
PNTSIX 290#
PNTSXF 291#
PSIXL 251# SEQ 0373
PSIXLF 252#
PSIXM 255# 15456 15460 15471 15496
PSIXMF 256# 15576
PSP 297#
PSPF 298#
PUT 208#
RDAPR 409#
RDCSB 409#
RDCSTM 409#
RDEBR 409#
RDHSB 409#
RDINT 409#
RDIO 409#
RDIOB 409#
RDPI 409#
RDPUR 409#
RDSPB 409#
RDTIM 409#
RDUBR 409#
REPTUO 382#
RTN 207# 499
S 137# 139 143 172 174 183 186 201 202 204 215 217 221 223
228 232 374 376 409 414 420 447 449 467 469 487 489 518
520 538 540 558 560 568 570 591 596 622 624 631 633 639
641 647 649 653 655 660 662 666 668 672 674 680 682 685
687 691 693 697 699 703 705 709 711 716 718 722 724 728
730 732 734
SAVEAC 91# 778 797 830 849 882 901 966 1642 2344 2476 2602 4350 6041
7908 9711 11533
SETACS 97#
SIXBTZ 314#
SR1 106# 2351 2366 2381 2396 13392 13409 13426 13443 13460 13477 13494 13511 13528
13545 13562 13579 13596 13613 13630 13647 13664 13681 13698 13715 13732 13749 13766
13783 13809 13826 13843 13860 13877 13894 13911 13928 13945 13962 13979 13996 14013
14030 14047 14064 14081 14098 14115 14132 14157 14174 14191 14208 14225 14242 14259
14276 14293 14310 14327 14344 14361 14378 14395 14412 14429 14446 14463 14480 14497
14514 14531
SR2 121# 930 949 2411 2427 2443 2459 14561 14579 14597 14615 14633 14651 14669
14687 14705 14723 14741 14759 14777 14795 14813 14831 14849 14867 14885 14903 14921
14939 14957 14975 14993 15011 15029 15047 15065 15083 15101 15119 15137 15155 15173
15191 15209 15227 15245 15263 15281 15299 15317 15335 15353 15371 15389 15407
SWITCH 320# 15437 15539
TIOE 409#
TIOEB 409#
TION 409#
TIONB 409#
TTALTM 241# 15541
TTICHR 234#
TTICLR 244#
TTICNV 239#
TTIDEC 238#
TTINO 236#
TTIOCT 237# SEQ 0374
TTIYES 235#
TTLOOK 240#
TTSIXB 242#
TTYINP 243#
WRAPR 409#
WRCSB 409#
WRCSTM 409#
WREBR 409#
WRHSB 409#
WRINT 409#
WRIO 409#
WRIOB 409#
WRPI 409#
WRPUR 409#
WRSPB 409#
WRTIM 409#
WRUBR 409#
ANDI 15474
AOS 497 15430 15433 15559 15560 SEQ 0375
ASCII 598 600 603 604 605 606 608 609 610 611 612 613 615 616
617
ASCIZ 741 760 15524 15525 15526 15527 15528 15529 15530 15531 15532
ASH 889 895 14164 14181 14198 14215 14232 14249 14266 14283 14300 14317 14334 14351
14368 14385 14402 14419 14436 14453 14470 14487 14504 14521 14538
ASHC 908 917 938 957
BLOCK 566 626 629 635 638 644 15664
BYTE 614
CAIE 1004 1021 1038 1055 1072 1089 1106 1123 1140 1157 1174 1191 1208 1225
1242 1259 1276 1293
CAIG 15476 15487
CAIL 15564
CAIN 2506 2518 2530 2563 2577 2591
CAME 792 814 816 844 866 868 896 918 920 939 941 958 960 1331
1349 1367 1385 1403 1421 1439 1457 1475 1493 1511 1529 1547 1565 1583
1601 1619 1637 1684 1702 1720 1738 1756 1774 1792 1810 1828 1846 1864
1882 1900 1918 1936 1954 1972 1990 2028 2046 2064 2082 2100 2118 2136
2154 2172 2190 2208 2226 2244 2262 2280 2298 2316 2334 2359 2361 2374
2376 2389 2391 2404 2406 2420 2422 2436 2438 2452 2454 2468 2470 2610
2620 2668 2691 2714 2737 2760 2783 2806 2829 2852 2875 2898 2921 2944
2967 2990 3013 3036 3059 3108 3131 3154 3177 3200 3223 3246 3269 3292
3315 3338 3361 3384 3407 3430 3453 3476 3499 3546 3568 3590 3612 3634
3656 3678 3700 3722 3744 3766 3788 3810 3832 3854 3876 3898 3920 3966
3988 4010 4032 4054 4076 4098 4120 4142 4164 4186 4208 4230 4252 4274
4296 4318 4340 4358 4368 4414 4436 4458 4480 4502 4524 4546 4568 4590
4612 4634 4656 4678 4700 4722 4744 4766 4788 4835 4857 4879 4901 4923
4945 4967 4989 5011 5033 5055 5077 5099 5121 5143 5165 5187 5209 5254
5275 5296 5317 5338 5359 5380 5401 5422 5443 5464 5485 5506 5527 5548
5569 5590 5611 5658 5680 5702 5724 5746 5768 5790 5812 5834 5856 5878
5900 5922 5944 5966 5988 6010 6032 6049 6059 6110 6134 6158 6182 6206
6230 6254 6278 6302 6326 6350 6374 6398 6422 6446 6470 6494 6518 6569
6593 6617 6641 6665 6689 6713 6737 6761 6785 6809 6833 6857 6881 6905
6929 6953 6977 7028 7052 7076 7100 7124 7148 7172 7196 7220 7244 7268
7292 7316 7340 7364 7388 7412 7436 7487 7511 7535 7559 7583 7607 7631
7655 7679 7703 7727 7751 7775 7799 7823 7847 7871 7895 7917 7930 7982
8007 8032 8057 8082 8107 8132 8157 8182 8207 8232 8257 8282 8307 8332
8357 8382 8407 8454 8476 8498 8520 8542 8564 8586 8608 8630 8652 8674
8696 8718 8740 8762 8784 8806 8858 8883 8908 8933 8958 8983 9008 9033
9058 9083 9108 9133 9158 9183 9208 9233 9258 9283 9332 9355 9378 9401
9424 9447 9470 9493 9516 9539 9562 9585 9608 9631 9654 9677 9700 9720
9733 9786 9812 9838 9864 9890 9916 9942 9968 9994 10020 10046 10072 10098
10124 10150 10176 10202 10228 10277 10300 10323 10346 10369 10392 10415 10438 10461
10484 10507 10530 10553 10576 10599 10622 10645 10698 10723 10748 10773 10798 10823
10848 10873 10898 10923 10948 10973 10998 11023 11048 11073 11098 11123 11170 11192
11214 11236 11258 11280 11302 11324 11346 11368 11390 11412 11434 11456 11478 11500
11522 11542 11555 11611 11638 11665 11692 11719 11746 11773 11800 11827 11854 11881
11908 11935 11962 11989 12016 12043 12070 12119 12142 12165 12188 12211 12234 12257
12280 12303 12326 12349 12372 12395 12418 12441 12464 12523 12551 12579 12607 12635
12663 12691 12719 12747 12775 12803 12831 12859 12887 12915 12943 12971 12999 13046
13068 13090 13112 13134 13156 13178 13200 13222 13244 13266 13288 13310 13332 13354
13376 13400 13402 13417 13419 13434 13436 13451 13453 13468 13470 13485 13487 13502
13504 13519 13521 13536 13538 13553 13555 13570 13572 13587 13589 13604 13606 13621
13623 13638 13640 13655 13657 13672 13674 13689 13691 13706 13708 13723 13725 13740 SEQ 0376
13742 13757 13759 13774 13776 13791 13793 13817 13819 13834 13836 13851 13853 13868
13870 13885 13887 13902 13904 13919 13921 13936 13938 13953 13955 13970 13972 13987
13989 14004 14006 14021 14023 14038 14040 14055 14057 14072 14074 14089 14091 14106
14108 14123 14125 14140 14142 14165 14167 14182 14184 14199 14201 14216 14218 14233
14235 14250 14252 14267 14269 14284 14286 14301 14303 14318 14320 14335 14337 14352
14354 14369 14371 14386 14388 14403 14405 14420 14422 14437 14439 14454 14456 14471
14473 14488 14490 14505 14507 14522 14524 14539 14541 14570 14572 14588 14590 14606
14608 14624 14626 14642 14644 14660 14662 14678 14680 14696 14698 14714 14716 14732
14734 14750 14752 14768 14770 14786 14788 14804 14806 14822 14824 14840 14842 14858
14860 14876 14878 14894 14896 14912 14914 14930 14932 14948 14950 14966 14968 14984
14986 15002 15004 15020 15022 15038 15040 15056 15058 15074 15076 15092 15094 15110
15112 15128 15130 15146 15148 15164 15166 15182 15184 15200 15202 15218 15220 15236
15238 15254 15256 15272 15274 15290 15292 15308 15310 15326 15328 15344 15346 15362
15364 15380 15382 15398 15400 15416 15418
CAMN 15432
DEFINE 8 91 97 106 121 137 305 308 314 388 399
END 15672
HRL 15435
HRLOI 2025 2043 2061 2079 2097 2115 2133 2151 2169 2187 2205 2223 2241 2259
2277 2295 2313 2331 3918 3960 3962 3982 3984 4004 4006 4026 4028 4048
4050 4070 4072 4092 4094 4114 4116 4136 4138 4158 4160 4180 4182 4202
4204 4224 4226 4246 4248 4268 4270 4290 4292 4312 4314 4334 5248 5250
5269 5271 5290 5292 5311 5313 5332 5334 5353 5355 5374 5376 5395 5397
5416 5418 5437 5439 5458 5460 5479 5481 5500 5502 5521 5523 5542 5544
5563 5565 5584 5586 5605 6030 7020 7022 7044 7046 7068 7070 7092 7094
7116 7118 7140 7142 7164 7166 7188 7190 7212 7214 7236 7238 7260 7262
7284 7286 7308 7310 7332 7334 7356 7358 7380 7382 7404 7428 7867 7893
9281 9329 9330 9352 9353 9375 9376 9398 9399 9421 9422 9444 9445 9467
9468 9490 9491 9513 9514 9536 9537 9559 9560 9582 9583 9605 9606 9628
9629 9651 9652 9674 9675 9697 9698 10692 10694 10717 10719 10742 10744 10767
10769 10792 10794 10817 10819 10842 10844 10867 10869 10892 10894 10917 10919 10942
10944 10967 10969 10992 10994 11017 11019 11042 11044 11067 11069 11092 11094 11117
12515 12517 12543 12545 12571 12573 12599 12601 12627 12629 12655 12657 12683 12685
12711 12713 12739 12741 12767 12769 12795 12797 12823 12825 12851 12853 12879 12881
12907 12909 12935 12937 12963 12991 12993
HRROI 1681 1699 1717 1735 1753 1771 1789 1807 1825 1843 1861 1879 1897 1915
1933 1951 1969 1987 3540 3542 3562 3564 3584 3586 3606 3608 3628 3630
3650 3652 3672 3674 3694 3696 3716 3718 3738 3740 3760 3762 3782 3784
3804 3806 3826 3828 3848 3850 3870 3872 3892 3894 3914 4338 5609 5652
5654 5674 5676 5696 5698 5718 5720 5740 5742 5762 5764 5784 5786 5806
5808 5828 5830 5850 5852 5872 5874 5894 5896 5916 5918 5938 5940 5960
5962 5982 5984 6004 6006 6026 7408 7434 7479 7481 7503 7505 7527 7529
7551 7553 7575 7577 7599 7601 7623 7625 7647 7649 7671 7673 7695 7697
7719 7721 7743 7745 7767 7769 7791 7793 7815 7817 7839 7841 7863 7887
8852 8854 8877 8879 8902 8904 8927 8929 8952 8954 8977 8979 9002 9004
9027 9029 9052 9054 9077 9079 9102 9104 9127 9129 9152 9154 9177 9179
9202 9204 9227 9229 9252 9254 9277 11121 11167 11168 11189 11190 11211 11212
11233 11234 11255 11256 11277 11278 11299 11300 11321 11322 11343 11344 11365 11366
11387 11388 11409 11410 11431 11432 11453 11454 11475 11476 11497 11498 11519 11520
12967 12997 13043 13044 13065 13066 13087 13088 13109 13110 13131 13132 13153 13154
13175 13176 13197 13198 13219 13220 13241 13242 13263 13264 13285 13286 13307 13308
13329 13330 13351 13352 13373 13374
HRRZ 15431 15461 15500 SEQ 0377
HRRZI 2504 2516 2528 2561 2575 2589
IFDEF 409 460 461 462 463 15465 15535 15663 15670
IFE 1000 1017 1034 1051 1068 1085 1102 1119 1136 1153 1170 1187 1204 1221
1238 1255 1272 1289 1326 1344 1362 1380 1398 1416 1434 1452 1470 1488
1506 1524 1542 1560 1578 1596 1614 1632 1679 1697 1715 1733 1751 1769
1787 1805 1823 1841 1859 1877 1895 1913 1931 1949 1967 1985 2023 2041
2059 2077 2095 2113 2131 2149 2167 2185 2203 2221 2239 2257 2275 2293
2311 2329 2660 2665 2683 2688 2706 2711 2729 2734 2752 2757 2775 2780
2798 2803 2821 2826 2844 2849 2867 2872 2890 2895 2913 2918 2936 2941
2959 2964 2982 2987 3005 3010 3028 3033 3051 3056 3100 3105 3123 3128
3146 3151 3169 3174 3192 3197 3215 3220 3238 3243 3261 3266 3284 3289
3307 3312 3330 3335 3353 3358 3376 3381 3399 3404 3422 3427 3445 3450
3468 3473 3491 3496 3538 3543 3560 3565 3582 3587 3604 3609 3626 3631
3648 3653 3670 3675 3692 3697 3714 3719 3736 3741 3758 3763 3780 3785
3802 3807 3824 3829 3846 3851 3868 3873 3890 3895 3912 3917 3958 3963
3980 3985 4002 4007 4024 4029 4046 4051 4068 4073 4090 4095 4112 4117
4134 4139 4156 4161 4178 4183 4200 4205 4222 4227 4244 4249 4266 4271
4288 4293 4310 4315 4332 4337 4406 4411 4428 4433 4450 4455 4472 4477
4494 4499 4516 4521 4538 4543 4560 4565 4582 4587 4604 4609 4626 4631
4648 4653 4670 4675 4692 4697 4714 4719 4736 4741 4758 4763 4780 4785
4827 4832 4849 4854 4871 4876 4893 4898 4915 4920 4937 4942 4959 4964
4981 4986 5003 5008 5025 5030 5047 5052 5069 5074 5091 5096 5113 5118
5135 5140 5157 5162 5179 5184 5201 5206 5246 5251 5267 5272 5288 5293
5309 5314 5330 5335 5351 5356 5372 5377 5393 5398 5414 5419 5435 5440
5456 5461 5477 5482 5498 5503 5519 5524 5540 5545 5561 5566 5582 5587
5603 5608 5650 5655 5672 5677 5694 5699 5716 5721 5738 5743 5760 5765
5782 5787 5804 5809 5826 5831 5848 5853 5870 5875 5892 5897 5914 5919
5936 5941 5958 5963 5980 5985 6002 6007 6024 6029 6100 6105 6107 6124
6129 6131 6148 6153 6155 6172 6177 6179 6196 6201 6203 6220 6225 6227
6244 6249 6251 6268 6273 6275 6292 6297 6299 6316 6321 6323 6340 6345
6347 6364 6369 6371 6388 6393 6395 6412 6417 6419 6436 6441 6443 6460
6465 6467 6484 6489 6491 6508 6513 6515 6559 6564 6566 6583 6588 6590
6607 6612 6614 6631 6636 6638 6655 6660 6662 6679 6684 6686 6703 6708
6710 6727 6732 6734 6751 6756 6758 6775 6780 6782 6799 6804 6806 6823
6828 6830 6847 6852 6854 6871 6876 6878 6895 6900 6902 6919 6924 6926
6943 6948 6950 6967 6972 6974 7018 7023 7025 7042 7047 7049 7066 7071
7073 7090 7095 7097 7114 7119 7121 7138 7143 7145 7162 7167 7169 7186
7191 7193 7210 7215 7217 7234 7239 7241 7258 7263 7265 7282 7287 7289
7306 7311 7313 7330 7335 7337 7354 7359 7361 7378 7383 7385 7402 7407
7409 7426 7431 7433 7477 7482 7484 7501 7506 7508 7525 7530 7532 7549
7554 7556 7573 7578 7580 7597 7602 7604 7621 7626 7628 7645 7650 7652
7669 7674 7676 7693 7698 7700 7717 7722 7724 7741 7746 7748 7765 7770
7772 7789 7794 7796 7813 7818 7820 7837 7842 7844 7861 7866 7868 7885
7890 7892 7973 7979 7998 8004 8023 8029 8048 8054 8073 8079 8098 8104
8123 8129 8148 8154 8173 8179 8198 8204 8223 8229 8248 8254 8273 8279
8298 8304 8323 8329 8348 8354 8373 8379 8398 8404 8448 8470 8492 8514
8536 8558 8580 8602 8624 8646 8668 8690 8712 8734 8756 8778 8800 8849
8855 8874 8880 8899 8905 8924 8930 8949 8955 8974 8980 8999 9005 9024
9030 9049 9055 9074 9080 9099 9105 9124 9130 9149 9155 9174 9180 9199
9205 9224 9230 9249 9255 9274 9280 9326 9349 9372 9395 9418 9441 9464
9487 9510 9533 9556 9579 9602 9625 9648 9671 9694 9777 9783 9803 9809
9829 9835 9855 9861 9881 9887 9907 9913 9933 9939 9959 9965 9985 9991
10011 10017 10037 10043 10063 10069 10089 10095 10115 10121 10141 10147 10167 10173 SEQ 0378
10193 10199 10219 10225 10270 10293 10316 10339 10362 10385 10408 10431 10454 10477
10500 10523 10546 10569 10592 10615 10638 10689 10695 10714 10720 10739 10745 10764
10770 10789 10795 10814 10820 10839 10845 10864 10870 10889 10895 10914 10920 10939
10945 10964 10970 10989 10995 11014 11020 11039 11045 11064 11070 11089 11095 11114
11120 11164 11186 11208 11230 11252 11274 11296 11318 11340 11362 11384 11406 11428
11450 11472 11494 11516 11600 11606 11608 11627 11633 11635 11654 11660 11662 11681
11687 11689 11708 11714 11716 11735 11741 11743 11762 11768 11770 11789 11795 11797
11816 11822 11824 11843 11849 11851 11870 11876 11878 11897 11903 11905 11924 11930
11932 11951 11957 11959 11978 11984 11986 12005 12011 12013 12032 12038 12040 12059
12065 12067 12112 12135 12158 12181 12204 12227 12250 12273 12296 12319 12342 12365
12388 12411 12434 12457 12512 12518 12520 12540 12546 12548 12568 12574 12576 12596
12602 12604 12624 12630 12632 12652 12658 12660 12680 12686 12688 12708 12714 12716
12736 12742 12744 12764 12770 12772 12792 12798 12800 12820 12826 12828 12848 12854
12856 12876 12882 12884 12904 12910 12912 12932 12938 12940 12960 12966 12968 12988
12994 12996 13040 13062 13084 13106 13128 13150 13172 13194 13216 13238 13260 13282
13304 13326 13348 13370
IFG 6103 6127 6151 6175 6199 6223 6247 6271 6295 6319 6343 6367 6391 6415
6439 6463 6487 6511 6562 6586 6610 6634 6658 6682 6706 6730 6754 6778
6802 6826 6850 6874 6898 6922 6946 6970 11604 11631 11658 11685 11712 11739
11766 11793 11820 11847 11874 11901 11928 11955 11982 12009 12036 12063 12516 12544
12572 12600 12628 12656 12684 12712 12740 12768 12796 12824 12852 12880 12908 12936
12964 12992
IFL 7021 7045 7069 7093 7117 7141 7165 7189 7213 7237 7261 7285 7309 7333
7357 7381 7405 7429 7480 7504 7528 7552 7576 7600 7624 7648 7672 7696
7720 7744 7768 7792 7816 7840 7864 7888
IFN 2663 2686 2709 2732 2755 2778 2801 2824 2847 2870 2893 2916 2939 2962
2985 3008 3031 3054 3103 3126 3149 3172 3195 3218 3241 3264 3287 3310
3333 3356 3379 3402 3425 3448 3471 3494 3541 3563 3585 3607 3629 3651
3673 3695 3717 3739 3761 3783 3805 3827 3849 3871 3893 3915 3961 3983
4005 4027 4049 4071 4093 4115 4137 4159 4181 4203 4225 4247 4269 4291
4313 4335 4409 4431 4453 4475 4497 4519 4541 4563 4585 4607 4629 4651
4673 4695 4717 4739 4761 4783 4830 4852 4874 4896 4918 4940 4962 4984
5006 5028 5050 5072 5094 5116 5138 5160 5182 5204 5249 5270 5291 5312
5333 5354 5375 5396 5417 5438 5459 5480 5501 5522 5543 5564 5585 5606
5653 5675 5697 5719 5741 5763 5785 5807 5829 5851 5873 5895 5917 5939
5961 5983 6005 6027 7977 8002 8027 8052 8077 8102 8127 8152 8177 8202
8227 8252 8277 8302 8327 8352 8377 8402 8853 8878 8903 8928 8953 8978
9003 9028 9053 9078 9103 9128 9153 9178 9203 9228 9253 9278 9781 9807
9833 9859 9885 9911 9937 9963 9989 10015 10041 10067 10093 10119 10145 10171
10197 10223 10693 10718 10743 10768 10793 10818 10843 10868 10893 10918 10943 10968
10993 11018 11043 11068 11093 11118
IFNDEF 360 361 371 460 461 462 463 542 15583
JFCL 500 501 502 503 504 505 506 507 508 509 510 511
JRST 70 71 72 73 74 75 76 210 211 212 213 422 423 425
427 429 431 433 436 438 439 492 763 15422 15439 15446 15449 15454
15482 15488 15502 15504 15506 15509 15512 15514 15516 15542 15545 15558 15562 15565
15568 15572 15573 15577
JSP 219
JUMPL 788 794 809 818 840 846 861 870 892 898 913 922 943 962
1006 1023 1040 1057 1074 1091 1108 1125 1142 1159 1176 1193 1210 1227
1244 1261 1278 1295 1333 1351 1369 1387 1405 1423 1441 1459 1477 1495
1513 1531 1549 1567 1585 1603 1621 1639 1686 1704 1722 1740 1758 1776
1794 1812 1830 1848 1866 1884 1902 1920 1938 1956 1974 1992 2030 2048 SEQ 0379
2066 2084 2102 2120 2138 2156 2174 2192 2210 2228 2246 2264 2282 2300
2318 2336 2363 2378 2393 2408 2424 2440 2456 2472 2508 2520 2532 2565
2579 2593 2612 2622 2670 2693 2716 2739 2762 2785 2808 2831 2854 2877
2900 2923 2946 2969 2992 3015 3038 3061 3110 3133 3156 3179 3202 3225
3248 3271 3294 3317 3340 3363 3386 3409 3432 3455 3478 3501 3548 3570
3592 3614 3636 3658 3680 3702 3724 3746 3768 3790 3812 3834 3856 3878
3900 3922 3968 3990 4012 4034 4056 4078 4100 4122 4144 4166 4188 4210
4232 4254 4276 4298 4320 4342 4360 4370 4416 4438 4460 4482 4504 4526
4548 4570 4592 4614 4636 4658 4680 4702 4724 4746 4768 4790 4837 4859
4881 4903 4925 4947 4969 4991 5013 5035 5057 5079 5101 5123 5145 5167
5189 5211 5256 5277 5298 5319 5340 5361 5382 5403 5424 5445 5466 5487
5508 5529 5550 5571 5592 5613 5660 5682 5704 5726 5748 5770 5792 5814
5836 5858 5880 5902 5924 5946 5968 5990 6012 6034 6051 6061 6112 6136
6160 6184 6208 6232 6256 6280 6304 6328 6352 6376 6400 6424 6448 6472
6496 6520 6571 6595 6619 6643 6667 6691 6715 6739 6763 6787 6811 6835
6859 6883 6907 6931 6955 6979 7030 7054 7078 7102 7126 7150 7174 7198
7222 7246 7270 7294 7318 7342 7366 7390 7414 7438 7489 7513 7537 7561
7585 7609 7633 7657 7681 7705 7729 7753 7777 7801 7825 7849 7873 7897
7919 7932 7984 8009 8034 8059 8084 8109 8134 8159 8184 8209 8234 8259
8284 8309 8334 8359 8384 8409 8456 8478 8500 8522 8544 8566 8588 8610
8632 8654 8676 8698 8720 8742 8764 8786 8808 8860 8885 8910 8935 8960
8985 9010 9035 9060 9085 9110 9135 9160 9185 9210 9235 9260 9285 9334
9357 9380 9403 9426 9449 9472 9495 9518 9541 9564 9587 9610 9633 9656
9679 9702 9722 9735 9788 9814 9840 9866 9892 9918 9944 9970 9996 10022
10048 10074 10100 10126 10152 10178 10204 10230 10279 10302 10325 10348 10371 10394
10417 10440 10463 10486 10509 10532 10555 10578 10601 10624 10647 10700 10725 10750
10775 10800 10825 10850 10875 10900 10925 10950 10975 11000 11025 11050 11075 11100
11125 11172 11194 11216 11238 11260 11282 11304 11326 11348 11370 11392 11414 11436
11458 11480 11502 11524 11544 11557 11613 11640 11667 11694 11721 11748 11775 11802
11829 11856 11883 11910 11937 11964 11991 12018 12045 12072 12121 12144 12167 12190
12213 12236 12259 12282 12305 12328 12351 12374 12397 12420 12443 12466 12525 12553
12581 12609 12637 12665 12693 12721 12749 12777 12805 12833 12861 12889 12917 12945
12973 13001 13048 13070 13092 13114 13136 13158 13180 13202 13224 13246 13268 13290
13312 13334 13356 13378 13404 13421 13438 13455 13472 13489 13506 13523 13540 13557
13574 13591 13608 13625 13642 13659 13676 13693 13710 13727 13744 13761 13778 13795
13821 13838 13855 13872 13889 13906 13923 13940 13957 13974 13991 14008 14025 14042
14059 14076 14093 14110 14127 14144 14169 14186 14203 14220 14237 14254 14271 14288
14305 14322 14339 14356 14373 14390 14407 14424 14441 14458 14475 14492 14509 14526
14543 14574 14592 14610 14628 14646 14664 14682 14700 14718 14736 14754 14772 14790
14808 14826 14844 14862 14880 14898 14916 14934 14952 14970 14988 15006 15024 15042
15060 15078 15096 15114 15132 15150 15168 15186 15204 15222 15240 15258 15276 15294
15312 15330 15348 15366 15384 15402 15420
LALL 9
LIST 8 371 409 542 15465 15535 15583 15660
LIT 15584
LOC 25 412 736
LSH 837 843 2358 2373 2388 2403 13816 13833 13850 13867 13884 13901 13918 13935
13952 13969 13986 14003 14020 14037 14054 14071 14088 14105 14122 14139 15441 15473
LSHC 856 865 2419 2435 2451 2467
MOVE 760 936 937 955 956 1329 1347 1365 1383 1401 1419 1437 1455 1473
1491 1509 1527 1545 1563 1581 1599 1617 1635 1682 1700 1718 1736 1754
1772 1790 1808 1826 1844 1862 1880 1898 1916 1934 1952 1970 1988 2026
2044 2062 2080 2098 2116 2134 2152 2170 2188 2206 2224 2242 2260 2278 SEQ 0380
2296 2314 2332 2356 2357 2371 2372 2386 2387 2401 2402 2417 2418 2433
2434 2449 2450 2465 2466 13397 13398 13414 13415 13431 13432 13448 13449 13465
13466 13482 13483 13499 13500 13516 13517 13533 13534 13550 13551 13567 13568 13584
13585 13601 13602 13618 13619 13635 13636 13652 13653 13669 13670 13686 13687 13703
13704 13720 13721 13737 13738 13754 13755 13771 13772 13788 13789 13814 13815 13831
13832 13848 13849 13865 13866 13882 13883 13899 13900 13916 13917 13933 13934 13950
13951 13967 13968 13984 13985 14001 14002 14018 14019 14035 14036 14052 14053 14069
14070 14086 14087 14103 14104 14120 14121 14137 14138 14162 14163 14179 14180 14196
14197 14213 14214 14230 14231 14247 14248 14264 14265 14281 14282 14298 14299 14315
14316 14332 14333 14349 14350 14366 14367 14383 14384 14400 14401 14417 14418 14434
14435 14451 14452 14468 14469 14485 14486 14502 14503 14519 14520 14536 14537 14567
14568 14585 14586 14603 14604 14621 14622 14639 14640 14657 14658 14675 14676 14693
14694 14711 14712 14729 14730 14747 14748 14765 14766 14783 14784 14801 14802 14819
14820 14837 14838 14855 14856 14873 14874 14891 14892 14909 14910 14927 14928 14945
14946 14963 14964 14981 14982 14999 15000 15017 15018 15035 15036 15053 15054 15071
15072 15089 15090 15107 15108 15125 15126 15143 15144 15161 15162 15179 15180 15197
15198 15215 15216 15233 15234 15251 15252 15269 15270 15287 15288 15305 15306 15323
15324 15341 15342 15359 15360 15377 15378 15395 15396 15413 15414 15434 15440 15443
15444 15457 15472 15475 15477 15480 15486 15490 15546 15554 15555 15563 15567 15570
MOVEI 779 781 798 800 831 833 850 852 883 885 902 904 967 969
1002 1019 1036 1053 1070 1087 1104 1121 1138 1155 1172 1189 1206 1223
1240 1257 1274 1291 1643 1645 2345 2347 2477 2479 2603 2605 2662 2664
2685 2687 2708 2710 2731 2733 2754 2756 2777 2779 2800 2802 2823 2825
2846 2848 2869 2871 2892 2894 2915 2917 2938 2940 2961 2963 2984 2986
3007 3009 3030 3032 3053 3497 4351 4353 4786 4829 4831 4851 4853 4873
4875 4895 4897 4917 4919 4939 4941 4961 4963 4983 4985 5005 5007 5027
5029 5049 5051 5071 5073 5093 5095 5115 5117 5137 5139 5159 5161 5181
5183 5203 6042 6044 6490 6516 6561 6563 6585 6587 6609 6611 6633 6635
6657 6659 6681 6683 6705 6707 6729 6731 6753 6755 6777 6779 6801 6803
6825 6827 6849 6851 6873 6875 6897 6899 6921 6923 6945 6969 7909 7911
7976 7978 8001 8003 8026 8028 8051 8053 8076 8078 8101 8103 8126 8128
8151 8153 8176 8178 8201 8203 8226 8228 8251 8253 8276 8278 8301 8303
8326 8328 8351 8353 8376 8378 8401 9712 9714 10226 10274 10275 10297 10298
10320 10321 10343 10344 10366 10367 10389 10390 10412 10413 10435 10436 10458 10459
10481 10482 10504 10505 10527 10528 10550 10551 10573 10574 10596 10597 10619 10620
10642 10643 11534 11536 12039 12068 12115 12117 12138 12140 12161 12163 12184 12186
12207 12209 12230 12232 12253 12255 12276 12278 12299 12301 12322 12324 12345 12347
12368 12370 12391 12393 12414 12416 12437 12439 12460 12462 15497 15543
MOVEM 761 780 782 799 801 832 834 851 853 884 886 903 905 968
970 1644 1646 2346 2348 2478 2480 2604 2606 4352 4354 6043 6045 7910
7912 9713 9715 11535 11537 15427 15428 15429 15442 15462 15544
MOVSI 1328 1346 1364 1382 1400 1418 1436 1454 1472 1490 1508 1526 1544 1562
1580 1598 1616 1634 3057 3102 3104 3125 3127 3148 3150 3171 3173 3194
3196 3217 3219 3240 3242 3263 3265 3286 3288 3309 3311 3332 3334 3355
3357 3378 3380 3401 3403 3424 3426 3447 3449 3470 3472 3493 4408 4410
4430 4432 4452 4454 4474 4476 4496 4498 4518 4520 4540 4542 4562 4564
4584 4586 4606 4608 4628 4630 4650 4652 4672 4674 4694 4696 4716 4718
4738 4740 4760 4762 4782 5207 6102 6104 6126 6128 6150 6152 6174 6176
6198 6200 6222 6224 6246 6248 6270 6272 6294 6296 6318 6320 6342 6344
6366 6368 6390 6392 6414 6416 6438 6440 6462 6464 6486 6510 6949 6975
8405 8451 8452 8473 8474 8495 8496 8517 8518 8539 8540 8561 8562 8583
8584 8605 8606 8627 8628 8649 8650 8671 8672 8693 8694 8715 8716 8737
8738 8759 8760 8781 8782 8803 8804 9780 9782 9806 9808 9832 9834 9858 SEQ 0381
9860 9884 9886 9910 9912 9936 9938 9962 9964 9988 9990 10014 10016 10040
10042 10066 10068 10092 10094 10118 10120 10144 10146 10170 10172 10196 10198 10222
11603 11605 11630 11632 11657 11659 11684 11686 11711 11713 11738 11740 11765 11767
11792 11794 11819 11821 11846 11848 11873 11875 11900 11902 11927 11929 11954 11956
11981 11983 12008 12010 12035 12062 12064
NOSYM 28
OPDEF 33 34 35 36 37 38 39 40 41 42 43 206 207 208
209 210 211 212 213 219 225 226 234 235 236 237 238 239
240 241 242 243 244 247 248 249 250 251 252 253 254 255
256 257 258 259 260 261 262 263 264 265 266 267 268 269
270 271 272 273 274 275 276 277 278 279 280 281 282 283
284 285 286 287 288 289 290 291 292 293 294 295 296 297
298 299 300 301 303 320 325 326 330 331 332 338 339 345
346 347 348 349 350 351 357 358 365 366 367 368 378 379
380 381 382 409
PAGE 1297 1994 2409 2534 3063 3924 4792 5615 6522 7440 9287 10232 11127 12074
13003 13439 13490 13592 13728 13856 13975 14094 14204 14340 14476 14611 14665 14773
14917 15061 15205 15349
POP 209
POPJ 207
PUSH 208
PUSHJ 206
REPEAT 974 1299 1652 1996 2485 2538 2626 3066 3506 3926 4374 4795 5216 5618
6066 6525 6984 7443 7936 8414 8812 9290 9738 10235 10652 11130 11561 12077
12471 13006
ROT 785 791 2505 2517 2529 2609 2619 2667 2690 2713 2736 2759 2782 2805
2828 2851 2874 2897 2920 2943 2966 2989 3012 3035 3058 3107 3130 3153
3176 3199 3222 3245 3268 3291 3314 3337 3360 3383 3406 3429 3452 3475
3498 3545 3567 3589 3611 3633 3655 3677 3699 3721 3743 3765 3787 3809
3831 3853 3875 3897 3919 3965 3987 4009 4031 4053 4075 4097 4119 4141
4163 4185 4207 4229 4251 4273 4295 4317 4339 4357 4367 4413 4435 4457
4479 4501 4523 4545 4567 4589 4611 4633 4655 4677 4699 4721 4743 4765
4787 4834 4856 4878 4900 4922 4944 4966 4988 5010 5032 5054 5076 5098
5120 5142 5164 5186 5208 5253 5274 5295 5316 5337 5358 5379 5400 5421
5442 5463 5484 5505 5526 5547 5568 5589 5610 5657 5679 5701 5723 5745
5767 5789 5811 5833 5855 5877 5899 5921 5943 5965 5987 6009 6031 6048
6058 6109 6133 6157 6181 6205 6229 6253 6277 6301 6325 6349 6373 6397
6421 6445 6469 6493 6517 6568 6592 6616 6640 6664 6688 6712 6736 6760
6784 6808 6832 6856 6880 6904 6928 6952 6976 7027 7051 7075 7099 7123
7147 7171 7195 7219 7243 7267 7291 7315 7339 7363 7387 7411 7435 7486
7510 7534 7558 7582 7606 7630 7654 7678 7702 7726 7750 7774 7798 7822
7846 7870 7894 13399 13416 13433 13450 13467 13484 13501 13518 13535 13552 13569
13586 13603 13620 13637 13654 13671 13688 13705 13722 13739 13756 13773 13790
ROTC 804 813 1003 1020 1037 1054 1071 1088 1105 1122 1139 1156 1173 1190
1207 1224 1241 1258 1275 1292 1330 1348 1366 1384 1402 1420 1438 1456
1474 1492 1510 1528 1546 1564 1582 1600 1618 1636 1683 1701 1719 1737
1755 1773 1791 1809 1827 1845 1863 1881 1899 1917 1935 1953 1971 1989
2027 2045 2063 2081 2099 2117 2135 2153 2171 2189 2207 2225 2243 2261
2279 2297 2315 2333 2562 2576 2590 7916 7929 7981 8006 8031 8056 8081
8106 8131 8156 8181 8206 8231 8256 8281 8306 8331 8356 8381 8406 8453
8475 8497 8519 8541 8563 8585 8607 8629 8651 8673 8695 8717 8739 8761
8783 8805 8857 8882 8907 8932 8957 8982 9007 9032 9057 9082 9107 9132
9157 9182 9207 9232 9257 9282 9331 9354 9377 9400 9423 9446 9469 9492 SEQ 0382
9515 9538 9561 9584 9607 9630 9653 9676 9699 9719 9732 9785 9811 9837
9863 9889 9915 9941 9967 9993 10019 10045 10071 10097 10123 10149 10175 10201
10227 10276 10299 10322 10345 10368 10391 10414 10437 10460 10483 10506 10529 10552
10575 10598 10621 10644 10697 10722 10747 10772 10797 10822 10847 10872 10897 10922
10947 10972 10997 11022 11047 11072 11097 11122 11169 11191 11213 11235 11257 11279
11301 11323 11345 11367 11389 11411 11433 11455 11477 11499 11521 11541 11554 11610
11637 11664 11691 11718 11745 11772 11799 11826 11853 11880 11907 11934 11961 11988
12015 12042 12069 12118 12141 12164 12187 12210 12233 12256 12279 12302 12325 12348
12371 12394 12417 12440 12463 12522 12550 12578 12606 12634 12662 12690 12718 12746
12774 12802 12830 12858 12886 12914 12942 12970 12998 13045 13067 13089 13111 13133
13155 13177 13199 13221 13243 13265 13287 13309 13331 13353 13375 14569 14587 14605
14623 14641 14659 14677 14695 14713 14731 14749 14767 14785 14803 14821 14839 14857
14875 14893 14911 14929 14947 14965 14983 15001 15019 15037 15055 15073 15091 15109
15127 15145 15163 15181 15199 15217 15235 15253 15271 15289 15307 15325 15343 15361
15379 15397 15415
SETO 811 863 915
SETOB 790 812 842 864 894 916 2618 4366 6057 7927 9730 11552
SETOM 1680 1698 1716 1734 1752 1770 1788 1806 1824 1842 1860 1878 1896 1914
1932 1950 1968 1986 2024 2042 2060 2078 2096 2114 2132 2150 2168 2186
2204 2222 2240 2258 2276 2294 2312 2330 7928 8851 8876 8901 8926 8951
8976 9001 9026 9051 9076 9101 9126 9151 9176 9201 9226 9251 9276 9328
9351 9374 9397 9420 9443 9466 9489 9512 9535 9558 9581 9604 9627 9650
9673 9696 9731 10691 10716 10741 10766 10791 10816 10841 10866 10891 10916 10941
10966 10991 11016 11041 11066 11091 11116 11166 11188 11210 11232 11254 11276 11298
11320 11342 11364 11386 11408 11430 11452 11474 11496 11518 11553 12514 12542 12570
12598 12626 12654 12682 12710 12738 12766 12794 12822 12850 12878 12906 12934 12962
12990 13042 13064 13086 13108 13130 13152 13174 13196 13218 13240 13262 13284 13306
13328 13350 13372 15452 15550 15556
SETZ 784 836 888 2560 2574 2588 7975 8000 8025 8050 8075 8100 8125 8150
8175 8200 8225 8250 8275 8300 8325 8350 8375 8400 8450 8472 8494 8516
8538 8560 8582 8604 8626 8648 8670 8692 8714 8736 8758 8780 8802 9779
9805 9831 9857 9883 9909 9935 9961 9987 10013 10039 10065 10091 10117 10143
10169 10195 10221 10273 10296 10319 10342 10365 10388 10411 10434 10457 10480 10503
10526 10549 10572 10595 10618 10641 11602 11629 11656 11683 11710 11737 11764 11791
11818 11845 11872 11899 11926 11953 11980 12007 12034 12061 12114 12137 12160 12183
12206 12229 12252 12275 12298 12321 12344 12367 12390 12413 12436 12459
SETZB 803 855 907 2608 4356 6047 7914 9717 11539
SETZM 1001 1018 1035 1052 1069 1086 1103 1120 1137 1154 1171 1188 1205 1222
1239 1256 1273 1290 1327 1345 1363 1381 1399 1417 1435 1453 1471 1489
1507 1525 1543 1561 1579 1597 1615 1633 7915 9718 11540 15436 15447
SIXBIT 83 84 627 628 636 637 15456 15460 15471 15496 15576
SKIPE 786 805 807 838 857 859 890 909 911
SKIPGE 15445
SKIPL 15448 15561
SKIPN 15450 15453 15557
SUBTTL 29 135 170 372 409 410 764 923 963 2338 2473 2595 7899 13380
13797 14145 14545 15423 15578
TITLE 13
TLNE 15438 15481 15547 15551
TLNN 15549 15571
TRNE 15501 15503 15505
VAR 15668
XCT 15538 SEQ 0383
XLIST 7 370 408 541 15464 15534 15582
XWD 936 937 939 941 955 956 958 960 2356 2357 2359 2361 2371 2372
2374 2376 2386 2387 2389 2391 2401 2402 2404 2406 2417 2418 2420 2422
2433 2434 2436 2438 2449 2450 2452 2454 2465 2466 2468 2470 13397 13398
13400 13402 13414 13415 13417 13419 13431 13432 13434 13436 13448 13449 13451 13453
13465 13466 13468 13470 13482 13483 13485 13487 13499 13500 13502 13504 13516 13517
13519 13521 13533 13534 13536 13538 13550 13551 13553 13555 13567 13568 13570 13572
13584 13585 13587 13589 13601 13602 13604 13606 13618 13619 13621 13623 13635 13636
13638 13640 13652 13653 13655 13657 13669 13670 13672 13674 13686 13687 13689 13691
13703 13704 13706 13708 13720 13721 13723 13725 13737 13738 13740 13742 13754 13755
13757 13759 13771 13772 13774 13776 13788 13789 13791 13793 13814 13815 13817 13819
13831 13832 13834 13836 13848 13849 13851 13853 13865 13866 13868 13870 13882 13883
13885 13887 13899 13900 13902 13904 13916 13917 13919 13921 13933 13934 13936 13938
13950 13951 13953 13955 13967 13968 13970 13972 13984 13985 13987 13989 14001 14002
14004 14006 14018 14019 14021 14023 14035 14036 14038 14040 14052 14053 14055 14057
14069 14070 14072 14074 14086 14087 14089 14091 14103 14104 14106 14108 14120 14121
14123 14125 14137 14138 14140 14142 14162 14163 14165 14167 14179 14180 14182 14184
14196 14197 14199 14201 14213 14214 14216 14218 14230 14231 14233 14235 14247 14248
14250 14252 14264 14265 14267 14269 14281 14282 14284 14286 14298 14299 14301 14303
14315 14316 14318 14320 14332 14333 14335 14337 14349 14350 14352 14354 14366 14367
14369 14371 14383 14384 14386 14388 14400 14401 14403 14405 14417 14418 14420 14422
14434 14435 14437 14439 14451 14452 14454 14456 14468 14469 14471 14473 14485 14486
14488 14490 14502 14503 14505 14507 14519 14520 14522 14524 14536 14537 14539 14541
14567 14568 14570 14572 14585 14586 14588 14590 14603 14604 14606 14608 14621 14622
14624 14626 14639 14640 14642 14644 14657 14658 14660 14662 14675 14676 14678 14680
14693 14694 14696 14698 14711 14712 14714 14716 14729 14730 14732 14734 14747 14748
14750 14752 14765 14766 14768 14770 14783 14784 14786 14788 14801 14802 14804 14806
14819 14820 14822 14824 14837 14838 14840 14842 14855 14856 14858 14860 14873 14874
14876 14878 14891 14892 14894 14896 14909 14910 14912 14914 14927 14928 14930 14932
14945 14946 14948 14950 14963 14964 14966 14968 14981 14982 14984 14986 14999 15000
15002 15004 15017 15018 15020 15022 15035 15036 15038 15040 15053 15054 15056 15058
15071 15072 15074 15076 15089 15090 15092 15094 15107 15108 15110 15112 15125 15126
15128 15130 15143 15144 15146 15148 15161 15162 15164 15166 15179 15180 15182 15184
15197 15198 15200 15202 15215 15216 15218 15220 15233 15234 15236 15238 15251 15252
15254 15256 15269 15270 15272 15274 15287 15288 15290 15292 15305 15306 15308 15310
15323 15324 15326 15328 15341 15342 15344 15346 15359 15360 15362 15364 15377 15378
15380 15382 15395 15396 15398 15400 15413 15414 15416 15418
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 1 SEQ 0384
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777
*030631 ROT 1,000000
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 E= 000000 000000
FINAL
C(AC)= 000000 000000
----------
*030636 ROT 1,000000
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 E= 000000 000000
FINAL
C(AC)= 777777 777777
----------
*030647 ROTC 2,000000
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000000 000000 E= 000000 000000
FINAL
C(AC)= 000000 000000 C(AC+1)= 000000 000000
----------
*030657 ROTC 2,000000
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777777 777777 E= 000000 000000
FINAL
C(AC)= 777777 777777 C(AC+1)= 777777 777777
----------
*030672 LSH 3,000000
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 E= 000000 000000
FINAL
C(AC)= 000000 000000
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 2
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0385
*030677 LSH 3,000000
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 E= 000000 000000
FINAL
C(AC)= 777777 777777
----------
*030710 LSHC 14,000000
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000000 000000 E= 000000 000000
FINAL
C(AC)= 000000 000000 C(AC+1)= 000000 000000
----------
*030720 LSHC 14,000000
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777777 777777 E= 000000 000000
FINAL
C(AC)= 777777 777777 C(AC+1)= 777777 777777
----------
*030733 ASH 13,000000
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 E= 000000 000000
FINAL
C(AC)= 000000 000000
----------
*030740 ASH 13,000000
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 E= 000000 000000
FINAL
C(AC)= 777777 777777
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 3
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0386
*030751 ASHC 12,000000
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000000 000000 E= 000000 000000
FINAL
C(AC)= 000000 000000 C(AC+1)= 000000 000000
----------
*030761 ASHC 12,000000
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777777 777777 E= 000000 000000
FINAL
C(AC)= 777777 777777 C(AC+1)= 777777 777777
----------
*030771 ASHC 12,000000
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 777777 777777 E= 000000 000000
FINAL
C(AC)= 000000 000000 C(AC+1)= 777777 777777
----------
*031001 ASHC 12,000000
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 000000 000000 E= 000000 000000
FINAL
C(AC)= 777777 777777 C(AC+1)= 000000 000000
----------
*031015 ROTC 10,000000
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000000 000001 E= 000000 000000
FINAL
C(AC)= 000000 000000 C(AC+1)= 000000 000001
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 4
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0387
*031023 ROTC 10,000000
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000000 000002 E= 000000 000000
FINAL
C(AC)= 000000 000000 C(AC+1)= 000000 000002
----------
*031031 ROTC 10,000000
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000000 000004 E= 000000 000000
FINAL
C(AC)= 000000 000000 C(AC+1)= 000000 000004
----------
*031037 ROTC 10,000000
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000000 000010 E= 000000 000000
FINAL
C(AC)= 000000 000000 C(AC+1)= 000000 000010
----------
*031045 ROTC 10,000000
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000000 000020 E= 000000 000000
FINAL
C(AC)= 000000 000000 C(AC+1)= 000000 000020
----------
*031053 ROTC 10,000000
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000000 000040 E= 000000 000000
FINAL
C(AC)= 000000 000000 C(AC+1)= 000000 000040
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 5
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0388
*031061 ROTC 10,000000
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000000 000100 E= 000000 000000
FINAL
C(AC)= 000000 000000 C(AC+1)= 000000 000100
----------
*031067 ROTC 10,000000
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000000 000200 E= 000000 000000
FINAL
C(AC)= 000000 000000 C(AC+1)= 000000 000200
----------
*031075 ROTC 10,000000
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000000 000400 E= 000000 000000
FINAL
C(AC)= 000000 000000 C(AC+1)= 000000 000400
----------
*031103 ROTC 10,000000
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000000 001000 E= 000000 000000
FINAL
C(AC)= 000000 000000 C(AC+1)= 000000 001000
----------
*031111 ROTC 10,000000
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000000 002000 E= 000000 000000
FINAL
C(AC)= 000000 000000 C(AC+1)= 000000 002000
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 6
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0389
*031117 ROTC 10,000000
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000000 004000 E= 000000 000000
FINAL
C(AC)= 000000 000000 C(AC+1)= 000000 004000
----------
*031125 ROTC 10,000000
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000000 010000 E= 000000 000000
FINAL
C(AC)= 000000 000000 C(AC+1)= 000000 010000
----------
*031133 ROTC 10,000000
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000000 020000 E= 000000 000000
FINAL
C(AC)= 000000 000000 C(AC+1)= 000000 020000
----------
*031141 ROTC 10,000000
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000000 040000 E= 000000 000000
FINAL
C(AC)= 000000 000000 C(AC+1)= 000000 040000
----------
*031147 ROTC 10,000000
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000000 100000 E= 000000 000000
FINAL
C(AC)= 000000 000000 C(AC+1)= 000000 100000
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 7
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0390
*031155 ROTC 10,000000
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000000 200000 E= 000000 000000
FINAL
C(AC)= 000000 000000 C(AC+1)= 000000 200000
----------
*031163 ROTC 10,000000
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000000 400000 E= 000000 000000
FINAL
C(AC)= 000000 000000 C(AC+1)= 000000 400000
----------
*031172 ROTC 10,000000
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000001 000000 E= 000000 000000
FINAL
C(AC)= 000000 000000 C(AC+1)= 000001 000000
----------
*031201 ROTC 10,000000
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000002 000000 E= 000000 000000
FINAL
C(AC)= 000000 000000 C(AC+1)= 000002 000000
----------
*031210 ROTC 10,000000
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000004 000000 E= 000000 000000
FINAL
C(AC)= 000000 000000 C(AC+1)= 000004 000000
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 8
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0391
*031217 ROTC 10,000000
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000010 000000 E= 000000 000000
FINAL
C(AC)= 000000 000000 C(AC+1)= 000010 000000
----------
*031226 ROTC 10,000000
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000020 000000 E= 000000 000000
FINAL
C(AC)= 000000 000000 C(AC+1)= 000020 000000
----------
*031235 ROTC 10,000000
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000040 000000 E= 000000 000000
FINAL
C(AC)= 000000 000000 C(AC+1)= 000040 000000
----------
*031244 ROTC 10,000000
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000100 000000 E= 000000 000000
FINAL
C(AC)= 000000 000000 C(AC+1)= 000100 000000
----------
*031253 ROTC 10,000000
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000200 000000 E= 000000 000000
FINAL
C(AC)= 000000 000000 C(AC+1)= 000200 000000
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 9
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0392
*031262 ROTC 10,000000
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000400 000000 E= 000000 000000
FINAL
C(AC)= 000000 000000 C(AC+1)= 000400 000000
----------
*031271 ROTC 10,000000
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 001000 000000 E= 000000 000000
FINAL
C(AC)= 000000 000000 C(AC+1)= 001000 000000
----------
*031300 ROTC 10,000000
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 002000 000000 E= 000000 000000
FINAL
C(AC)= 000000 000000 C(AC+1)= 002000 000000
----------
*031307 ROTC 10,000000
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 004000 000000 E= 000000 000000
FINAL
C(AC)= 000000 000000 C(AC+1)= 004000 000000
----------
*031316 ROTC 10,000000
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 010000 000000 E= 000000 000000
FINAL
C(AC)= 000000 000000 C(AC+1)= 010000 000000
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 10
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0393
*031325 ROTC 10,000000
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 020000 000000 E= 000000 000000
FINAL
C(AC)= 000000 000000 C(AC+1)= 020000 000000
----------
*031334 ROTC 10,000000
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 040000 000000 E= 000000 000000
FINAL
C(AC)= 000000 000000 C(AC+1)= 040000 000000
----------
*031343 ROTC 10,000000
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 100000 000000 E= 000000 000000
FINAL
C(AC)= 000000 000000 C(AC+1)= 100000 000000
----------
*031352 ROTC 10,000000
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 200000 000000 E= 000000 000000
FINAL
C(AC)= 000000 000000 C(AC+1)= 200000 000000
----------
*031361 ROTC 10,000000
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 400000 000000 E= 000000 000000
FINAL
C(AC)= 000000 000000 C(AC+1)= 400000 000000
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 11
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0394
*031374 ROTC 7,000000
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777777 000001 E= 000000 000000
FINAL
C(AC)= 777777 777777 C(AC+1)= 777777 000001
----------
*031403 ROTC 7,000000
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777777 000003 E= 000000 000000
FINAL
C(AC)= 777777 777777 C(AC+1)= 777777 000003
----------
*031412 ROTC 7,000000
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777777 000007 E= 000000 000000
FINAL
C(AC)= 777777 777777 C(AC+1)= 777777 000007
----------
*031421 ROTC 7,000000
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777777 000017 E= 000000 000000
FINAL
C(AC)= 777777 777777 C(AC+1)= 777777 000017
----------
*031430 ROTC 7,000000
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777777 000037 E= 000000 000000
FINAL
C(AC)= 777777 777777 C(AC+1)= 777777 000037
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 12
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0395
*031437 ROTC 7,000000
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777777 000077 E= 000000 000000
FINAL
C(AC)= 777777 777777 C(AC+1)= 777777 000077
----------
*031446 ROTC 7,000000
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777777 000177 E= 000000 000000
FINAL
C(AC)= 777777 777777 C(AC+1)= 777777 000177
----------
*031455 ROTC 7,000000
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777777 000377 E= 000000 000000
FINAL
C(AC)= 777777 777777 C(AC+1)= 777777 000377
----------
*031464 ROTC 7,000000
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777777 000777 E= 000000 000000
FINAL
C(AC)= 777777 777777 C(AC+1)= 777777 000777
----------
*031473 ROTC 7,000000
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777777 001777 E= 000000 000000
FINAL
C(AC)= 777777 777777 C(AC+1)= 777777 001777
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 13
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0396
*031502 ROTC 7,000000
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777777 003777 E= 000000 000000
FINAL
C(AC)= 777777 777777 C(AC+1)= 777777 003777
----------
*031511 ROTC 7,000000
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777777 007777 E= 000000 000000
FINAL
C(AC)= 777777 777777 C(AC+1)= 777777 007777
----------
*031520 ROTC 7,000000
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777777 017777 E= 000000 000000
FINAL
C(AC)= 777777 777777 C(AC+1)= 777777 017777
----------
*031527 ROTC 7,000000
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777777 037777 E= 000000 000000
FINAL
C(AC)= 777777 777777 C(AC+1)= 777777 037777
----------
*031536 ROTC 7,000000
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777777 077777 E= 000000 000000
FINAL
C(AC)= 777777 777777 C(AC+1)= 777777 077777
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 14
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0397
*031545 ROTC 7,000000
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777777 177777 E= 000000 000000
FINAL
C(AC)= 777777 777777 C(AC+1)= 777777 177777
----------
*031554 ROTC 7,000000
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777777 377777 E= 000000 000000
FINAL
C(AC)= 777777 777777 C(AC+1)= 777777 377777
----------
*031563 ROTC 7,000000
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777777 777777 E= 000000 000000
FINAL
C(AC)= 777777 777777 C(AC+1)= 777777 777777
----------
*031572 ROTC 7,000000
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 000001 777777 E= 000000 000000
FINAL
C(AC)= 777777 777777 C(AC+1)= 000001 777777
----------
*031601 ROTC 7,000000
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 000003 777777 E= 000000 000000
FINAL
C(AC)= 777777 777777 C(AC+1)= 000003 777777
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 15
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0398
*031610 ROTC 7,000000
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 000007 777777 E= 000000 000000
FINAL
C(AC)= 777777 777777 C(AC+1)= 000007 777777
----------
*031617 ROTC 7,000000
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 000017 777777 E= 000000 000000
FINAL
C(AC)= 777777 777777 C(AC+1)= 000017 777777
----------
*031626 ROTC 7,000000
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 000037 777777 E= 000000 000000
FINAL
C(AC)= 777777 777777 C(AC+1)= 000037 777777
----------
*031635 ROTC 7,000000
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 000077 777777 E= 000000 000000
FINAL
C(AC)= 777777 777777 C(AC+1)= 000077 777777
----------
*031644 ROTC 7,000000
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 000177 777777 E= 000000 000000
FINAL
C(AC)= 777777 777777 C(AC+1)= 000177 777777
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 16
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0399
*031653 ROTC 7,000000
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 000377 777777 E= 000000 000000
FINAL
C(AC)= 777777 777777 C(AC+1)= 000377 777777
----------
*031662 ROTC 7,000000
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 000777 777777 E= 000000 000000
FINAL
C(AC)= 777777 777777 C(AC+1)= 000777 777777
----------
*031671 ROTC 7,000000
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 001777 777777 E= 000000 000000
FINAL
C(AC)= 777777 777777 C(AC+1)= 001777 777777
----------
*031700 ROTC 7,000000
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 003777 777777 E= 000000 000000
FINAL
C(AC)= 777777 777777 C(AC+1)= 003777 777777
----------
*031707 ROTC 7,000000
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 007777 777777 E= 000000 000000
FINAL
C(AC)= 777777 777777 C(AC+1)= 007777 777777
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 17
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0400
*031716 ROTC 7,000000
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 017777 777777 E= 000000 000000
FINAL
C(AC)= 777777 777777 C(AC+1)= 017777 777777
----------
*031725 ROTC 7,000000
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 037777 777777 E= 000000 000000
FINAL
C(AC)= 777777 777777 C(AC+1)= 037777 777777
----------
*031734 ROTC 7,000000
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 077777 777777 E= 000000 000000
FINAL
C(AC)= 777777 777777 C(AC+1)= 077777 777777
----------
*031743 ROTC 7,000000
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 177777 777777 E= 000000 000000
FINAL
C(AC)= 777777 777777 C(AC+1)= 177777 777777
----------
*031752 ROTC 7,000000
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 377777 777777 E= 000000 000000
FINAL
C(AC)= 777777 777777 C(AC+1)= 377777 777777
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 18
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0401
*031761 ROTC 7,000000
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777777 777777 E= 000000 000000
FINAL
C(AC)= 777777 777777 C(AC+1)= 777777 777777
----------
*031773 LSH 4,000000
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000010 E= 000000 000000
FINAL
C(AC)= 000000 000010
----------
*032003 LSH 4,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000010 E= 000000 000001
FINAL
C(AC)= 000000 000020
----------
*032013 LSH 4,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000010 E= 000000 777777
FINAL
C(AC)= 000000 000004
----------
*032023 LSH 4,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000010 E= 000000 777776
FINAL
C(AC)= 000000 000002
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 19
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0402
*032033 LSHC 4,000000
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000010 C(AC+1)= 000000 000010 E= 000000 000000
FINAL
C(AC)= 000000 000010 C(AC+1)= 000000 000010
----------
*032043 LSHC 4,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000010 C(AC+1)= 000000 000010 E= 000000 000001
FINAL
C(AC)= 000000 000020 C(AC+1)= 000000 000020
----------
*032053 LSHC 4,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000010 C(AC+1)= 000000 000010 E= 000000 777777
FINAL
C(AC)= 000000 000004 C(AC+1)= 000000 000004
----------
*032063 LSHC 4,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000010 C(AC+1)= 000000 000010 E= 000000 777776
FINAL
C(AC)= 000000 000002 C(AC+1)= 000000 000002
----------
*032076 ROT 10,000002
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 400000 E= 000000 000002
FINAL
C(AC)= 000002 000000
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 20
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0403
*032103 ROT 10,000004
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 400000 E= 000000 000004
FINAL
C(AC)= 000010 000000
----------
*032110 ROT 10,000010
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 400000 E= 000000 000010
FINAL
C(AC)= 000200 000000
----------
*032116 ROTC 10,000002
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000000 400000 E= 000000 000002
FINAL
C(AC)= 000000 000000 C(AC+1)= 000002 000000
----------
*032124 ROTC 10,000004
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000000 400000 E= 000000 000004
FINAL
C(AC)= 000000 000000 C(AC+1)= 000010 000000
----------
*032132 ROTC 10,000010
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000000 400000 E= 000000 000010
FINAL
C(AC)= 000000 000000 C(AC+1)= 000200 000000
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 21
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0404
*032143 ROT 11,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 E= 000000 000001
FINAL
C(AC)= 000000 000000
----------
*032150 ROT 11,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 E= 000000 000001
FINAL
C(AC)= 777777 777777
----------
*032156 ROT 11,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000001 E= 000000 000001
FINAL
C(AC)= 000000 000002
----------
*032164 ROT 11,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000002 E= 000000 000001
FINAL
C(AC)= 000000 000004
----------
*032172 ROT 11,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000004 E= 000000 000001
FINAL
C(AC)= 000000 000010
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 22
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0405
*032200 ROT 11,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000010 E= 000000 000001
FINAL
C(AC)= 000000 000020
----------
*032206 ROT 11,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000020 E= 000000 000001
FINAL
C(AC)= 000000 000040
----------
*032214 ROT 11,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000040 E= 000000 000001
FINAL
C(AC)= 000000 000100
----------
*032222 ROT 11,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000100 E= 000000 000001
FINAL
C(AC)= 000000 000200
----------
*032230 ROT 11,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000200 E= 000000 000001
FINAL
C(AC)= 000000 000400
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 23
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0406
*032236 ROT 11,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000400 E= 000000 000001
FINAL
C(AC)= 000000 001000
----------
*032244 ROT 11,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 001000 E= 000000 000001
FINAL
C(AC)= 000000 002000
----------
*032252 ROT 11,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 002000 E= 000000 000001
FINAL
C(AC)= 000000 004000
----------
*032260 ROT 11,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 004000 E= 000000 000001
FINAL
C(AC)= 000000 010000
----------
*032266 ROT 11,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 010000 E= 000000 000001
FINAL
C(AC)= 000000 020000
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 24
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0407
*032274 ROT 11,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 020000 E= 000000 000001
FINAL
C(AC)= 000000 040000
----------
*032302 ROT 11,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 040000 E= 000000 000001
FINAL
C(AC)= 000000 100000
----------
*032310 ROT 11,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 100000 E= 000000 000001
FINAL
C(AC)= 000000 200000
----------
*032316 ROT 11,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 200000 E= 000000 000001
FINAL
C(AC)= 000000 400000
----------
*032324 ROT 11,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 400000 E= 000000 000001
FINAL
C(AC)= 000001 000000
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 25
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0408
*032332 ROT 11,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000001 000000 E= 000000 000001
FINAL
C(AC)= 000002 000000
----------
*032340 ROT 11,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000002 000000 E= 000000 000001
FINAL
C(AC)= 000004 000000
----------
*032346 ROT 11,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000004 000000 E= 000000 000001
FINAL
C(AC)= 000010 000000
----------
*032354 ROT 11,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000010 000000 E= 000000 000001
FINAL
C(AC)= 000020 000000
----------
*032362 ROT 11,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000020 000000 E= 000000 000001
FINAL
C(AC)= 000040 000000
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 26
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0409
*032370 ROT 11,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000040 000000 E= 000000 000001
FINAL
C(AC)= 000100 000000
----------
*032376 ROT 11,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000100 000000 E= 000000 000001
FINAL
C(AC)= 000200 000000
----------
*032404 ROT 11,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000200 000000 E= 000000 000001
FINAL
C(AC)= 000400 000000
----------
*032412 ROT 11,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000400 000000 E= 000000 000001
FINAL
C(AC)= 001000 000000
----------
*032420 ROT 11,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 001000 000000 E= 000000 000001
FINAL
C(AC)= 002000 000000
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 27
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0410
*032426 ROT 11,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 002000 000000 E= 000000 000001
FINAL
C(AC)= 004000 000000
----------
*032434 ROT 11,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 004000 000000 E= 000000 000001
FINAL
C(AC)= 010000 000000
----------
*032442 ROT 11,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 010000 000000 E= 000000 000001
FINAL
C(AC)= 020000 000000
----------
*032450 ROT 11,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 020000 000000 E= 000000 000001
FINAL
C(AC)= 040000 000000
----------
*032456 ROT 11,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 040000 000000 E= 000000 000001
FINAL
C(AC)= 100000 000000
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 28
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0411
*032464 ROT 11,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 100000 000000 E= 000000 000001
FINAL
C(AC)= 200000 000000
----------
*032472 ROT 11,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 200000 000000 E= 000000 000001
FINAL
C(AC)= 400000 000000
----------
*032500 ROT 11,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 400000 000000 E= 000000 000001
FINAL
C(AC)= 000000 000001
----------
*032506 ROT 11,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777776 E= 000000 000001
FINAL
C(AC)= 777777 777775
----------
*032514 ROT 11,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777775 E= 000000 000001
FINAL
C(AC)= 777777 777773
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 29
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0412
*032522 ROT 11,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777773 E= 000000 000001
FINAL
C(AC)= 777777 777767
----------
*032530 ROT 11,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777767 E= 000000 000001
FINAL
C(AC)= 777777 777757
----------
*032536 ROT 11,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777757 E= 000000 000001
FINAL
C(AC)= 777777 777737
----------
*032544 ROT 11,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777737 E= 000000 000001
FINAL
C(AC)= 777777 777677
----------
*032552 ROT 11,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777677 E= 000000 000001
FINAL
C(AC)= 777777 777577
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 30
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0413
*032560 ROT 11,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777577 E= 000000 000001
FINAL
C(AC)= 777777 777377
----------
*032566 ROT 11,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777377 E= 000000 000001
FINAL
C(AC)= 777777 776777
----------
*032574 ROT 11,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 776777 E= 000000 000001
FINAL
C(AC)= 777777 775777
----------
*032602 ROT 11,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 775777 E= 000000 000001
FINAL
C(AC)= 777777 773777
----------
*032610 ROT 11,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 773777 E= 000000 000001
FINAL
C(AC)= 777777 767777
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 31
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0414
*032616 ROT 11,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 767777 E= 000000 000001
FINAL
C(AC)= 777777 757777
----------
*032624 ROT 11,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 757777 E= 000000 000001
FINAL
C(AC)= 777777 737777
----------
*032632 ROT 11,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 737777 E= 000000 000001
FINAL
C(AC)= 777777 677777
----------
*032640 ROT 11,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 677777 E= 000000 000001
FINAL
C(AC)= 777777 577777
----------
*032646 ROT 11,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 577777 E= 000000 000001
FINAL
C(AC)= 777777 377777
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 32
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0415
*032654 ROT 11,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 377777 E= 000000 000001
FINAL
C(AC)= 777776 777777
----------
*032662 ROT 11,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777776 777777 E= 000000 000001
FINAL
C(AC)= 777775 777777
----------
*032670 ROT 11,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777775 777777 E= 000000 000001
FINAL
C(AC)= 777773 777777
----------
*032676 ROT 11,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777773 777777 E= 000000 000001
FINAL
C(AC)= 777767 777777
----------
*032704 ROT 11,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777767 777777 E= 000000 000001
FINAL
C(AC)= 777757 777777
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 33
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0416
*032712 ROT 11,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777757 777777 E= 000000 000001
FINAL
C(AC)= 777737 777777
----------
*032720 ROT 11,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777737 777777 E= 000000 000001
FINAL
C(AC)= 777677 777777
----------
*032726 ROT 11,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777677 777777 E= 000000 000001
FINAL
C(AC)= 777577 777777
----------
*032734 ROT 11,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777577 777777 E= 000000 000001
FINAL
C(AC)= 777377 777777
----------
*032742 ROT 11,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777377 777777 E= 000000 000001
FINAL
C(AC)= 776777 777777
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 34
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0417
*032750 ROT 11,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 776777 777777 E= 000000 000001
FINAL
C(AC)= 775777 777777
----------
*032756 ROT 11,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 775777 777777 E= 000000 000001
FINAL
C(AC)= 773777 777777
----------
*032764 ROT 11,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 773777 777777 E= 000000 000001
FINAL
C(AC)= 767777 777777
----------
*032772 ROT 11,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 767777 777777 E= 000000 000001
FINAL
C(AC)= 757777 777777
----------
*033000 ROT 11,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 757777 777777 E= 000000 000001
FINAL
C(AC)= 737777 777777
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 35
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0418
*033006 ROT 11,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 737777 777777 E= 000000 000001
FINAL
C(AC)= 677777 777777
----------
*033014 ROT 11,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 677777 777777 E= 000000 000001
FINAL
C(AC)= 577777 777777
----------
*033022 ROT 11,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 577777 777777 E= 000000 000001
FINAL
C(AC)= 377777 777777
----------
*033030 ROT 11,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 377777 777777 E= 000000 000001
FINAL
C(AC)= 777777 777776
----------
*033041 ROT 10,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 E= 000000 777777
FINAL
C(AC)= 000000 000000
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 36
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0419
*033046 ROT 10,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 E= 000000 777777
FINAL
C(AC)= 777777 777777
----------
*033054 ROT 10,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 400000 000000 E= 000000 777777
FINAL
C(AC)= 200000 000000
----------
*033062 ROT 10,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 200000 000000 E= 000000 777777
FINAL
C(AC)= 100000 000000
----------
*033070 ROT 10,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 100000 000000 E= 000000 777777
FINAL
C(AC)= 040000 000000
----------
*033076 ROT 10,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 040000 000000 E= 000000 777777
FINAL
C(AC)= 020000 000000
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 37
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0420
*033104 ROT 10,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 020000 000000 E= 000000 777777
FINAL
C(AC)= 010000 000000
----------
*033112 ROT 10,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 010000 000000 E= 000000 777777
FINAL
C(AC)= 004000 000000
----------
*033120 ROT 10,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 004000 000000 E= 000000 777777
FINAL
C(AC)= 002000 000000
----------
*033126 ROT 10,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 002000 000000 E= 000000 777777
FINAL
C(AC)= 001000 000000
----------
*033134 ROT 10,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 001000 000000 E= 000000 777777
FINAL
C(AC)= 000400 000000
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 38
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0421
*033142 ROT 10,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000400 000000 E= 000000 777777
FINAL
C(AC)= 000200 000000
----------
*033150 ROT 10,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000200 000000 E= 000000 777777
FINAL
C(AC)= 000100 000000
----------
*033156 ROT 10,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000100 000000 E= 000000 777777
FINAL
C(AC)= 000040 000000
----------
*033164 ROT 10,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000040 000000 E= 000000 777777
FINAL
C(AC)= 000020 000000
----------
*033172 ROT 10,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000020 000000 E= 000000 777777
FINAL
C(AC)= 000010 000000
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 39
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0422
*033200 ROT 10,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000010 000000 E= 000000 777777
FINAL
C(AC)= 000004 000000
----------
*033206 ROT 10,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000004 000000 E= 000000 777777
FINAL
C(AC)= 000002 000000
----------
*033214 ROT 10,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000002 000000 E= 000000 777777
FINAL
C(AC)= 000001 000000
----------
*033222 ROT 10,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000001 000000 E= 000000 777777
FINAL
C(AC)= 000000 400000
----------
*033230 ROT 10,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 400000 E= 000000 777777
FINAL
C(AC)= 000000 200000
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 40
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0423
*033236 ROT 10,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 200000 E= 000000 777777
FINAL
C(AC)= 000000 100000
----------
*033244 ROT 10,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 100000 E= 000000 777777
FINAL
C(AC)= 000000 040000
----------
*033252 ROT 10,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 040000 E= 000000 777777
FINAL
C(AC)= 000000 020000
----------
*033260 ROT 10,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 020000 E= 000000 777777
FINAL
C(AC)= 000000 010000
----------
*033266 ROT 10,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 010000 E= 000000 777777
FINAL
C(AC)= 000000 004000
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 41
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0424
*033274 ROT 10,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 004000 E= 000000 777777
FINAL
C(AC)= 000000 002000
----------
*033302 ROT 10,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 002000 E= 000000 777777
FINAL
C(AC)= 000000 001000
----------
*033310 ROT 10,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 001000 E= 000000 777777
FINAL
C(AC)= 000000 000400
----------
*033316 ROT 10,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000400 E= 000000 777777
FINAL
C(AC)= 000000 000200
----------
*033324 ROT 10,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000200 E= 000000 777777
FINAL
C(AC)= 000000 000100
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 42
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0425
*033332 ROT 10,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000100 E= 000000 777777
FINAL
C(AC)= 000000 000040
----------
*033340 ROT 10,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000040 E= 000000 777777
FINAL
C(AC)= 000000 000020
----------
*033346 ROT 10,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000020 E= 000000 777777
FINAL
C(AC)= 000000 000010
----------
*033354 ROT 10,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000010 E= 000000 777777
FINAL
C(AC)= 000000 000004
----------
*033362 ROT 10,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000004 E= 000000 777777
FINAL
C(AC)= 000000 000002
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 43
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0426
*033370 ROT 10,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000002 E= 000000 777777
FINAL
C(AC)= 000000 000001
----------
*033376 ROT 10,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000001 E= 000000 777777
FINAL
C(AC)= 400000 000000
----------
*033404 ROT 10,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 377777 777777 E= 000000 777777
FINAL
C(AC)= 577777 777777
----------
*033412 ROT 10,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 577777 777777 E= 000000 777777
FINAL
C(AC)= 677777 777777
----------
*033420 ROT 10,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 677777 777777 E= 000000 777777
FINAL
C(AC)= 737777 777777
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 44
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0427
*033426 ROT 10,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 737777 777777 E= 000000 777777
FINAL
C(AC)= 757777 777777
----------
*033434 ROT 10,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 757777 777777 E= 000000 777777
FINAL
C(AC)= 767777 777777
----------
*033442 ROT 10,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 767777 777777 E= 000000 777777
FINAL
C(AC)= 773777 777777
----------
*033450 ROT 10,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 773777 777777 E= 000000 777777
FINAL
C(AC)= 775777 777777
----------
*033456 ROT 10,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 775777 777777 E= 000000 777777
FINAL
C(AC)= 776777 777777
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 45
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0428
*033464 ROT 10,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 776777 777777 E= 000000 777777
FINAL
C(AC)= 777377 777777
----------
*033472 ROT 10,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777377 777777 E= 000000 777777
FINAL
C(AC)= 777577 777777
----------
*033500 ROT 10,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777577 777777 E= 000000 777777
FINAL
C(AC)= 777677 777777
----------
*033506 ROT 10,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777677 777777 E= 000000 777777
FINAL
C(AC)= 777737 777777
----------
*033514 ROT 10,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777737 777777 E= 000000 777777
FINAL
C(AC)= 777757 777777
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 46
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0429
*033522 ROT 10,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777757 777777 E= 000000 777777
FINAL
C(AC)= 777767 777777
----------
*033530 ROT 10,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777767 777777 E= 000000 777777
FINAL
C(AC)= 777773 777777
----------
*033536 ROT 10,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777773 777777 E= 000000 777777
FINAL
C(AC)= 777775 777777
----------
*033544 ROT 10,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777775 777777 E= 000000 777777
FINAL
C(AC)= 777776 777777
----------
*033552 ROT 10,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777776 777777 E= 000000 777777
FINAL
C(AC)= 777777 377777
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 47
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0430
*033560 ROT 10,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 377777 E= 000000 777777
FINAL
C(AC)= 777777 577777
----------
*033566 ROT 10,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 577777 E= 000000 777777
FINAL
C(AC)= 777777 677777
----------
*033574 ROT 10,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 677777 E= 000000 777777
FINAL
C(AC)= 777777 737777
----------
*033602 ROT 10,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 737777 E= 000000 777777
FINAL
C(AC)= 777777 757777
----------
*033610 ROT 10,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 757777 E= 000000 777777
FINAL
C(AC)= 777777 767777
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 48
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0431
*033616 ROT 10,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 767777 E= 000000 777777
FINAL
C(AC)= 777777 773777
----------
*033624 ROT 10,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 773777 E= 000000 777777
FINAL
C(AC)= 777777 775777
----------
*033632 ROT 10,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 775777 E= 000000 777777
FINAL
C(AC)= 777777 776777
----------
*033640 ROT 10,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 776777 E= 000000 777777
FINAL
C(AC)= 777777 777377
----------
*033646 ROT 10,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777377 E= 000000 777777
FINAL
C(AC)= 777777 777577
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 49
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0432
*033654 ROT 10,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777577 E= 000000 777777
FINAL
C(AC)= 777777 777677
----------
*033662 ROT 10,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777677 E= 000000 777777
FINAL
C(AC)= 777777 777737
----------
*033670 ROT 10,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777737 E= 000000 777777
FINAL
C(AC)= 777777 777757
----------
*033676 ROT 10,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777757 E= 000000 777777
FINAL
C(AC)= 777777 777767
----------
*033704 ROT 10,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777767 E= 000000 777777
FINAL
C(AC)= 777777 777773
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 50
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0433
*033712 ROT 10,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777773 E= 000000 777777
FINAL
C(AC)= 777777 777775
----------
*033720 ROT 10,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777775 E= 000000 777777
FINAL
C(AC)= 777777 777776
----------
*033726 ROT 10,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777776 E= 000000 777777
FINAL
C(AC)= 377777 777777
----------
*033737 ROT 7,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 E= 000000 777776
FINAL
C(AC)= 000000 000000
----------
*033744 ROT 7,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 E= 000000 777776
FINAL
C(AC)= 777777 777777
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 51
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0434
*033752 ROT 7,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 400000 000000 E= 000000 777776
FINAL
C(AC)= 100000 000000
----------
*033760 ROT 7,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 200000 000000 E= 000000 777776
FINAL
C(AC)= 040000 000000
----------
*033766 ROT 7,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 100000 000000 E= 000000 777776
FINAL
C(AC)= 020000 000000
----------
*033774 ROT 7,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 040000 000000 E= 000000 777776
FINAL
C(AC)= 010000 000000
----------
*034002 ROT 7,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 020000 000000 E= 000000 777776
FINAL
C(AC)= 004000 000000
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 52
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0435
*034010 ROT 7,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 010000 000000 E= 000000 777776
FINAL
C(AC)= 002000 000000
----------
*034016 ROT 7,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 004000 000000 E= 000000 777776
FINAL
C(AC)= 001000 000000
----------
*034024 ROT 7,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 002000 000000 E= 000000 777776
FINAL
C(AC)= 000400 000000
----------
*034032 ROT 7,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 001000 000000 E= 000000 777776
FINAL
C(AC)= 000200 000000
----------
*034040 ROT 7,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000400 000000 E= 000000 777776
FINAL
C(AC)= 000100 000000
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 53
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0436
*034046 ROT 7,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000200 000000 E= 000000 777776
FINAL
C(AC)= 000040 000000
----------
*034054 ROT 7,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000100 000000 E= 000000 777776
FINAL
C(AC)= 000020 000000
----------
*034062 ROT 7,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000040 000000 E= 000000 777776
FINAL
C(AC)= 000010 000000
----------
*034070 ROT 7,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000020 000000 E= 000000 777776
FINAL
C(AC)= 000004 000000
----------
*034076 ROT 7,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000010 000000 E= 000000 777776
FINAL
C(AC)= 000002 000000
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 54
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0437
*034104 ROT 7,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000004 000000 E= 000000 777776
FINAL
C(AC)= 000001 000000
----------
*034112 ROT 7,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000002 000000 E= 000000 777776
FINAL
C(AC)= 000000 400000
----------
*034120 ROT 7,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000001 000000 E= 000000 777776
FINAL
C(AC)= 000000 200000
----------
*034126 ROT 7,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 400000 E= 000000 777776
FINAL
C(AC)= 000000 100000
----------
*034134 ROT 7,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 200000 E= 000000 777776
FINAL
C(AC)= 000000 040000
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 55
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0438
*034142 ROT 7,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 100000 E= 000000 777776
FINAL
C(AC)= 000000 020000
----------
*034150 ROT 7,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 040000 E= 000000 777776
FINAL
C(AC)= 000000 010000
----------
*034156 ROT 7,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 020000 E= 000000 777776
FINAL
C(AC)= 000000 004000
----------
*034164 ROT 7,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 010000 E= 000000 777776
FINAL
C(AC)= 000000 002000
----------
*034172 ROT 7,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 004000 E= 000000 777776
FINAL
C(AC)= 000000 001000
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 56
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0439
*034200 ROT 7,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 002000 E= 000000 777776
FINAL
C(AC)= 000000 000400
----------
*034206 ROT 7,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 001000 E= 000000 777776
FINAL
C(AC)= 000000 000200
----------
*034214 ROT 7,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000400 E= 000000 777776
FINAL
C(AC)= 000000 000100
----------
*034222 ROT 7,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000200 E= 000000 777776
FINAL
C(AC)= 000000 000040
----------
*034230 ROT 7,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000100 E= 000000 777776
FINAL
C(AC)= 000000 000020
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 57
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0440
*034236 ROT 7,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000040 E= 000000 777776
FINAL
C(AC)= 000000 000010
----------
*034244 ROT 7,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000020 E= 000000 777776
FINAL
C(AC)= 000000 000004
----------
*034252 ROT 7,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000010 E= 000000 777776
FINAL
C(AC)= 000000 000002
----------
*034260 ROT 7,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000004 E= 000000 777776
FINAL
C(AC)= 000000 000001
----------
*034266 ROT 7,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000002 E= 000000 777776
FINAL
C(AC)= 400000 000000
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 58
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0441
*034274 ROT 7,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000001 E= 000000 777776
FINAL
C(AC)= 200000 000000
----------
*034302 ROT 7,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 377777 777777 E= 000000 777776
FINAL
C(AC)= 677777 777777
----------
*034310 ROT 7,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 577777 777777 E= 000000 777776
FINAL
C(AC)= 737777 777777
----------
*034316 ROT 7,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 677777 777777 E= 000000 777776
FINAL
C(AC)= 757777 777777
----------
*034324 ROT 7,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 737777 777777 E= 000000 777776
FINAL
C(AC)= 767777 777777
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 59
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0442
*034332 ROT 7,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 757777 777777 E= 000000 777776
FINAL
C(AC)= 773777 777777
----------
*034340 ROT 7,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 767777 777777 E= 000000 777776
FINAL
C(AC)= 775777 777777
----------
*034346 ROT 7,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 773777 777777 E= 000000 777776
FINAL
C(AC)= 776777 777777
----------
*034354 ROT 7,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 775777 777777 E= 000000 777776
FINAL
C(AC)= 777377 777777
----------
*034362 ROT 7,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 776777 777777 E= 000000 777776
FINAL
C(AC)= 777577 777777
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 60
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0443
*034370 ROT 7,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777377 777777 E= 000000 777776
FINAL
C(AC)= 777677 777777
----------
*034376 ROT 7,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777577 777777 E= 000000 777776
FINAL
C(AC)= 777737 777777
----------
*034404 ROT 7,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777677 777777 E= 000000 777776
FINAL
C(AC)= 777757 777777
----------
*034412 ROT 7,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777737 777777 E= 000000 777776
FINAL
C(AC)= 777767 777777
----------
*034420 ROT 7,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777757 777777 E= 000000 777776
FINAL
C(AC)= 777773 777777
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 61
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0444
*034426 ROT 7,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777767 777777 E= 000000 777776
FINAL
C(AC)= 777775 777777
----------
*034434 ROT 7,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777773 777777 E= 000000 777776
FINAL
C(AC)= 777776 777777
----------
*034442 ROT 7,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777775 777777 E= 000000 777776
FINAL
C(AC)= 777777 377777
----------
*034450 ROT 7,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777776 777777 E= 000000 777776
FINAL
C(AC)= 777777 577777
----------
*034456 ROT 7,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 377777 E= 000000 777776
FINAL
C(AC)= 777777 677777
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 62
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0445
*034464 ROT 7,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 577777 E= 000000 777776
FINAL
C(AC)= 777777 737777
----------
*034472 ROT 7,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 677777 E= 000000 777776
FINAL
C(AC)= 777777 757777
----------
*034500 ROT 7,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 737777 E= 000000 777776
FINAL
C(AC)= 777777 767777
----------
*034506 ROT 7,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 757777 E= 000000 777776
FINAL
C(AC)= 777777 773777
----------
*034514 ROT 7,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 767777 E= 000000 777776
FINAL
C(AC)= 777777 775777
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 63
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0446
*034522 ROT 7,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 773777 E= 000000 777776
FINAL
C(AC)= 777777 776777
----------
*034530 ROT 7,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 775777 E= 000000 777776
FINAL
C(AC)= 777777 777377
----------
*034536 ROT 7,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 776777 E= 000000 777776
FINAL
C(AC)= 777777 777577
----------
*034544 ROT 7,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777377 E= 000000 777776
FINAL
C(AC)= 777777 777677
----------
*034552 ROT 7,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777577 E= 000000 777776
FINAL
C(AC)= 777777 777737
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 64
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0447
*034560 ROT 7,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777677 E= 000000 777776
FINAL
C(AC)= 777777 777757
----------
*034566 ROT 7,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777737 E= 000000 777776
FINAL
C(AC)= 777777 777767
----------
*034574 ROT 7,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777757 E= 000000 777776
FINAL
C(AC)= 777777 777773
----------
*034602 ROT 7,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777767 E= 000000 777776
FINAL
C(AC)= 777777 777775
----------
*034610 ROT 7,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777773 E= 000000 777776
FINAL
C(AC)= 777777 777776
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 65
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0448
*034616 ROT 7,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777775 E= 000000 777776
FINAL
C(AC)= 377777 777777
----------
*034624 ROT 7,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777776 E= 000000 777776
FINAL
C(AC)= 577777 777777
----------
*034636 ROTC 10,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000000 000000 E= 000000 000001
FINAL
C(AC)= 000000 000000 C(AC+1)= 000000 000000
----------
*034644 ROTC 10,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777777 777777 E= 000000 000001
FINAL
C(AC)= 777777 777777 C(AC+1)= 777777 777777
----------
*034653 ROTC 10,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000000 000001 E= 000000 000001
FINAL
C(AC)= 000000 000000 C(AC+1)= 000000 000002
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 66
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0449
*034662 ROTC 10,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000000 000002 E= 000000 000001
FINAL
C(AC)= 000000 000000 C(AC+1)= 000000 000004
----------
*034671 ROTC 10,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000000 000004 E= 000000 000001
FINAL
C(AC)= 000000 000000 C(AC+1)= 000000 000010
----------
*034700 ROTC 10,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000000 000010 E= 000000 000001
FINAL
C(AC)= 000000 000000 C(AC+1)= 000000 000020
----------
*034707 ROTC 10,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000000 000020 E= 000000 000001
FINAL
C(AC)= 000000 000000 C(AC+1)= 000000 000040
----------
*034716 ROTC 10,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000000 000040 E= 000000 000001
FINAL
C(AC)= 000000 000000 C(AC+1)= 000000 000100
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 67
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0450
*034725 ROTC 10,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000000 000100 E= 000000 000001
FINAL
C(AC)= 000000 000000 C(AC+1)= 000000 000200
----------
*034734 ROTC 10,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000000 000200 E= 000000 000001
FINAL
C(AC)= 000000 000000 C(AC+1)= 000000 000400
----------
*034743 ROTC 10,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000000 000400 E= 000000 000001
FINAL
C(AC)= 000000 000000 C(AC+1)= 000000 001000
----------
*034752 ROTC 10,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000000 001000 E= 000000 000001
FINAL
C(AC)= 000000 000000 C(AC+1)= 000000 002000
----------
*034761 ROTC 10,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000000 002000 E= 000000 000001
FINAL
C(AC)= 000000 000000 C(AC+1)= 000000 004000
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 68
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0451
*034770 ROTC 10,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000000 004000 E= 000000 000001
FINAL
C(AC)= 000000 000000 C(AC+1)= 000000 010000
----------
*034777 ROTC 10,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000000 010000 E= 000000 000001
FINAL
C(AC)= 000000 000000 C(AC+1)= 000000 020000
----------
*035006 ROTC 10,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000000 020000 E= 000000 000001
FINAL
C(AC)= 000000 000000 C(AC+1)= 000000 040000
----------
*035015 ROTC 10,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000000 040000 E= 000000 000001
FINAL
C(AC)= 000000 000000 C(AC+1)= 000000 100000
----------
*035024 ROTC 10,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000000 100000 E= 000000 000001
FINAL
C(AC)= 000000 000000 C(AC+1)= 000000 200000
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 69
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0452
*035033 ROTC 10,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000000 200000 E= 000000 000001
FINAL
C(AC)= 000000 000000 C(AC+1)= 000000 400000
----------
*035042 ROTC 10,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000000 400000 E= 000000 000001
FINAL
C(AC)= 000000 000000 C(AC+1)= 000001 000000
----------
*035051 ROTC 10,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000001 000000 E= 000000 000001
FINAL
C(AC)= 000000 000000 C(AC+1)= 000002 000000
----------
*035060 ROTC 10,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000002 000000 E= 000000 000001
FINAL
C(AC)= 000000 000000 C(AC+1)= 000004 000000
----------
*035067 ROTC 10,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000004 000000 E= 000000 000001
FINAL
C(AC)= 000000 000000 C(AC+1)= 000010 000000
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 70
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0453
*035076 ROTC 10,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000010 000000 E= 000000 000001
FINAL
C(AC)= 000000 000000 C(AC+1)= 000020 000000
----------
*035105 ROTC 10,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000020 000000 E= 000000 000001
FINAL
C(AC)= 000000 000000 C(AC+1)= 000040 000000
----------
*035114 ROTC 10,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000040 000000 E= 000000 000001
FINAL
C(AC)= 000000 000000 C(AC+1)= 000100 000000
----------
*035123 ROTC 10,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000100 000000 E= 000000 000001
FINAL
C(AC)= 000000 000000 C(AC+1)= 000200 000000
----------
*035132 ROTC 10,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000200 000000 E= 000000 000001
FINAL
C(AC)= 000000 000000 C(AC+1)= 000400 000000
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 71
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0454
*035141 ROTC 10,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000400 000000 E= 000000 000001
FINAL
C(AC)= 000000 000000 C(AC+1)= 001000 000000
----------
*035150 ROTC 10,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 001000 000000 E= 000000 000001
FINAL
C(AC)= 000000 000000 C(AC+1)= 002000 000000
----------
*035157 ROTC 10,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 002000 000000 E= 000000 000001
FINAL
C(AC)= 000000 000000 C(AC+1)= 004000 000000
----------
*035166 ROTC 10,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 004000 000000 E= 000000 000001
FINAL
C(AC)= 000000 000000 C(AC+1)= 010000 000000
----------
*035175 ROTC 10,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 010000 000000 E= 000000 000001
FINAL
C(AC)= 000000 000000 C(AC+1)= 020000 000000
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 72
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0455
*035204 ROTC 10,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 020000 000000 E= 000000 000001
FINAL
C(AC)= 000000 000000 C(AC+1)= 040000 000000
----------
*035213 ROTC 10,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 040000 000000 E= 000000 000001
FINAL
C(AC)= 000000 000000 C(AC+1)= 100000 000000
----------
*035222 ROTC 10,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 100000 000000 E= 000000 000001
FINAL
C(AC)= 000000 000000 C(AC+1)= 200000 000000
----------
*035231 ROTC 10,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 200000 000000 E= 000000 000001
FINAL
C(AC)= 000000 000000 C(AC+1)= 400000 000000
----------
*035240 ROTC 10,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777777 777776 E= 000000 000001
FINAL
C(AC)= 777777 777777 C(AC+1)= 777777 777775
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 73
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0456
*035247 ROTC 10,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777777 777775 E= 000000 000001
FINAL
C(AC)= 777777 777777 C(AC+1)= 777777 777773
----------
*035256 ROTC 10,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777777 777773 E= 000000 000001
FINAL
C(AC)= 777777 777777 C(AC+1)= 777777 777767
----------
*035265 ROTC 10,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777777 777767 E= 000000 000001
FINAL
C(AC)= 777777 777777 C(AC+1)= 777777 777757
----------
*035274 ROTC 10,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777777 777757 E= 000000 000001
FINAL
C(AC)= 777777 777777 C(AC+1)= 777777 777737
----------
*035303 ROTC 10,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777777 777737 E= 000000 000001
FINAL
C(AC)= 777777 777777 C(AC+1)= 777777 777677
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 74
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0457
*035312 ROTC 10,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777777 777677 E= 000000 000001
FINAL
C(AC)= 777777 777777 C(AC+1)= 777777 777577
----------
*035321 ROTC 10,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777777 777577 E= 000000 000001
FINAL
C(AC)= 777777 777777 C(AC+1)= 777777 777377
----------
*035330 ROTC 10,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777777 777377 E= 000000 000001
FINAL
C(AC)= 777777 777777 C(AC+1)= 777777 776777
----------
*035337 ROTC 10,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777777 776777 E= 000000 000001
FINAL
C(AC)= 777777 777777 C(AC+1)= 777777 775777
----------
*035346 ROTC 10,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777777 775777 E= 000000 000001
FINAL
C(AC)= 777777 777777 C(AC+1)= 777777 773777
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 75
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0458
*035355 ROTC 10,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777777 773777 E= 000000 000001
FINAL
C(AC)= 777777 777777 C(AC+1)= 777777 767777
----------
*035364 ROTC 10,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777777 767777 E= 000000 000001
FINAL
C(AC)= 777777 777777 C(AC+1)= 777777 757777
----------
*035373 ROTC 10,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777777 757777 E= 000000 000001
FINAL
C(AC)= 777777 777777 C(AC+1)= 777777 737777
----------
*035402 ROTC 10,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777777 737777 E= 000000 000001
FINAL
C(AC)= 777777 777777 C(AC+1)= 777777 677777
----------
*035411 ROTC 10,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777777 677777 E= 000000 000001
FINAL
C(AC)= 777777 777777 C(AC+1)= 777777 577777
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 76
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0459
*035420 ROTC 10,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777777 577777 E= 000000 000001
FINAL
C(AC)= 777777 777777 C(AC+1)= 777777 377777
----------
*035427 ROTC 10,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777777 377777 E= 000000 000001
FINAL
C(AC)= 777777 777777 C(AC+1)= 777776 777777
----------
*035436 ROTC 10,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777776 777777 E= 000000 000001
FINAL
C(AC)= 777777 777777 C(AC+1)= 777775 777777
----------
*035445 ROTC 10,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777775 777777 E= 000000 000001
FINAL
C(AC)= 777777 777777 C(AC+1)= 777773 777777
----------
*035454 ROTC 10,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777773 777777 E= 000000 000001
FINAL
C(AC)= 777777 777777 C(AC+1)= 777767 777777
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 77
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0460
*035463 ROTC 10,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777767 777777 E= 000000 000001
FINAL
C(AC)= 777777 777777 C(AC+1)= 777757 777777
----------
*035472 ROTC 10,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777757 777777 E= 000000 000001
FINAL
C(AC)= 777777 777777 C(AC+1)= 777737 777777
----------
*035501 ROTC 10,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777737 777777 E= 000000 000001
FINAL
C(AC)= 777777 777777 C(AC+1)= 777677 777777
----------
*035510 ROTC 10,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777677 777777 E= 000000 000001
FINAL
C(AC)= 777777 777777 C(AC+1)= 777577 777777
----------
*035517 ROTC 10,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777577 777777 E= 000000 000001
FINAL
C(AC)= 777777 777777 C(AC+1)= 777377 777777
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 78
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0461
*035526 ROTC 10,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777377 777777 E= 000000 000001
FINAL
C(AC)= 777777 777777 C(AC+1)= 776777 777777
----------
*035535 ROTC 10,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 776777 777777 E= 000000 000001
FINAL
C(AC)= 777777 777777 C(AC+1)= 775777 777777
----------
*035544 ROTC 10,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 775777 777777 E= 000000 000001
FINAL
C(AC)= 777777 777777 C(AC+1)= 773777 777777
----------
*035553 ROTC 10,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 773777 777777 E= 000000 000001
FINAL
C(AC)= 777777 777777 C(AC+1)= 767777 777777
----------
*035562 ROTC 10,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 767777 777777 E= 000000 000001
FINAL
C(AC)= 777777 777777 C(AC+1)= 757777 777777
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 79
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0462
*035571 ROTC 10,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 757777 777777 E= 000000 000001
FINAL
C(AC)= 777777 777777 C(AC+1)= 737777 777777
----------
*035600 ROTC 10,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 737777 777777 E= 000000 000001
FINAL
C(AC)= 777777 777777 C(AC+1)= 677777 777777
----------
*035607 ROTC 10,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 677777 777777 E= 000000 000001
FINAL
C(AC)= 777777 777777 C(AC+1)= 577777 777777
----------
*035616 ROTC 10,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 577777 777777 E= 000000 000001
FINAL
C(AC)= 777777 777777 C(AC+1)= 377777 777777
----------
*035630 ROTC 7,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000000 000000 E= 000000 777777
FINAL
C(AC)= 000000 000000 C(AC+1)= 000000 000000
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 80
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0463
*035636 ROTC 7,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777777 777777 E= 000000 777777
FINAL
C(AC)= 777777 777777 C(AC+1)= 777777 777777
----------
*035645 ROTC 7,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 400000 000000 E= 000000 777777
FINAL
C(AC)= 000000 000000 C(AC+1)= 200000 000000
----------
*035654 ROTC 7,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 200000 000000 E= 000000 777777
FINAL
C(AC)= 000000 000000 C(AC+1)= 100000 000000
----------
*035663 ROTC 7,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 100000 000000 E= 000000 777777
FINAL
C(AC)= 000000 000000 C(AC+1)= 040000 000000
----------
*035672 ROTC 7,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 040000 000000 E= 000000 777777
FINAL
C(AC)= 000000 000000 C(AC+1)= 020000 000000
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 81
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0464
*035701 ROTC 7,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 020000 000000 E= 000000 777777
FINAL
C(AC)= 000000 000000 C(AC+1)= 010000 000000
----------
*035710 ROTC 7,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 010000 000000 E= 000000 777777
FINAL
C(AC)= 000000 000000 C(AC+1)= 004000 000000
----------
*035717 ROTC 7,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 004000 000000 E= 000000 777777
FINAL
C(AC)= 000000 000000 C(AC+1)= 002000 000000
----------
*035726 ROTC 7,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 002000 000000 E= 000000 777777
FINAL
C(AC)= 000000 000000 C(AC+1)= 001000 000000
----------
*035735 ROTC 7,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 001000 000000 E= 000000 777777
FINAL
C(AC)= 000000 000000 C(AC+1)= 000400 000000
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 82
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0465
*035744 ROTC 7,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000400 000000 E= 000000 777777
FINAL
C(AC)= 000000 000000 C(AC+1)= 000200 000000
----------
*035753 ROTC 7,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000200 000000 E= 000000 777777
FINAL
C(AC)= 000000 000000 C(AC+1)= 000100 000000
----------
*035762 ROTC 7,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000100 000000 E= 000000 777777
FINAL
C(AC)= 000000 000000 C(AC+1)= 000040 000000
----------
*035771 ROTC 7,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000040 000000 E= 000000 777777
FINAL
C(AC)= 000000 000000 C(AC+1)= 000020 000000
----------
*036000 ROTC 7,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000020 000000 E= 000000 777777
FINAL
C(AC)= 000000 000000 C(AC+1)= 000010 000000
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 83
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0466
*036007 ROTC 7,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000010 000000 E= 000000 777777
FINAL
C(AC)= 000000 000000 C(AC+1)= 000004 000000
----------
*036016 ROTC 7,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000004 000000 E= 000000 777777
FINAL
C(AC)= 000000 000000 C(AC+1)= 000002 000000
----------
*036025 ROTC 7,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000002 000000 E= 000000 777777
FINAL
C(AC)= 000000 000000 C(AC+1)= 000001 000000
----------
*036034 ROTC 7,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000001 000000 E= 000000 777777
FINAL
C(AC)= 000000 000000 C(AC+1)= 000000 400000
----------
*036043 ROTC 7,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000000 400000 E= 000000 777777
FINAL
C(AC)= 000000 000000 C(AC+1)= 000000 200000
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 84
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0467
*036052 ROTC 7,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000000 200000 E= 000000 777777
FINAL
C(AC)= 000000 000000 C(AC+1)= 000000 100000
----------
*036061 ROTC 7,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000000 100000 E= 000000 777777
FINAL
C(AC)= 000000 000000 C(AC+1)= 000000 040000
----------
*036070 ROTC 7,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000000 040000 E= 000000 777777
FINAL
C(AC)= 000000 000000 C(AC+1)= 000000 020000
----------
*036077 ROTC 7,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000000 020000 E= 000000 777777
FINAL
C(AC)= 000000 000000 C(AC+1)= 000000 010000
----------
*036106 ROTC 7,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000000 010000 E= 000000 777777
FINAL
C(AC)= 000000 000000 C(AC+1)= 000000 004000
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 85
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0468
*036115 ROTC 7,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000000 004000 E= 000000 777777
FINAL
C(AC)= 000000 000000 C(AC+1)= 000000 002000
----------
*036124 ROTC 7,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000000 002000 E= 000000 777777
FINAL
C(AC)= 000000 000000 C(AC+1)= 000000 001000
----------
*036133 ROTC 7,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000000 001000 E= 000000 777777
FINAL
C(AC)= 000000 000000 C(AC+1)= 000000 000400
----------
*036142 ROTC 7,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000000 000400 E= 000000 777777
FINAL
C(AC)= 000000 000000 C(AC+1)= 000000 000200
----------
*036151 ROTC 7,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000000 000200 E= 000000 777777
FINAL
C(AC)= 000000 000000 C(AC+1)= 000000 000100
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 86
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0469
*036160 ROTC 7,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000000 000100 E= 000000 777777
FINAL
C(AC)= 000000 000000 C(AC+1)= 000000 000040
----------
*036167 ROTC 7,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000000 000040 E= 000000 777777
FINAL
C(AC)= 000000 000000 C(AC+1)= 000000 000020
----------
*036176 ROTC 7,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000000 000020 E= 000000 777777
FINAL
C(AC)= 000000 000000 C(AC+1)= 000000 000010
----------
*036205 ROTC 7,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000000 000010 E= 000000 777777
FINAL
C(AC)= 000000 000000 C(AC+1)= 000000 000004
----------
*036214 ROTC 7,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000000 000004 E= 000000 777777
FINAL
C(AC)= 000000 000000 C(AC+1)= 000000 000002
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 87
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0470
*036223 ROTC 7,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000000 000002 E= 000000 777777
FINAL
C(AC)= 000000 000000 C(AC+1)= 000000 000001
----------
*036232 ROTC 7,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 377777 777777 E= 000000 777777
FINAL
C(AC)= 777777 777777 C(AC+1)= 577777 777777
----------
*036241 ROTC 7,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 577777 777777 E= 000000 777777
FINAL
C(AC)= 777777 777777 C(AC+1)= 677777 777777
----------
*036250 ROTC 7,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 677777 777777 E= 000000 777777
FINAL
C(AC)= 777777 777777 C(AC+1)= 737777 777777
----------
*036257 ROTC 7,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 737777 777777 E= 000000 777777
FINAL
C(AC)= 777777 777777 C(AC+1)= 757777 777777
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 88
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0471
*036266 ROTC 7,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 757777 777777 E= 000000 777777
FINAL
C(AC)= 777777 777777 C(AC+1)= 767777 777777
----------
*036275 ROTC 7,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 767777 777777 E= 000000 777777
FINAL
C(AC)= 777777 777777 C(AC+1)= 773777 777777
----------
*036304 ROTC 7,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 773777 777777 E= 000000 777777
FINAL
C(AC)= 777777 777777 C(AC+1)= 775777 777777
----------
*036313 ROTC 7,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 775777 777777 E= 000000 777777
FINAL
C(AC)= 777777 777777 C(AC+1)= 776777 777777
----------
*036322 ROTC 7,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 776777 777777 E= 000000 777777
FINAL
C(AC)= 777777 777777 C(AC+1)= 777377 777777
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 89
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0472
*036331 ROTC 7,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777377 777777 E= 000000 777777
FINAL
C(AC)= 777777 777777 C(AC+1)= 777577 777777
----------
*036340 ROTC 7,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777577 777777 E= 000000 777777
FINAL
C(AC)= 777777 777777 C(AC+1)= 777677 777777
----------
*036347 ROTC 7,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777677 777777 E= 000000 777777
FINAL
C(AC)= 777777 777777 C(AC+1)= 777737 777777
----------
*036356 ROTC 7,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777737 777777 E= 000000 777777
FINAL
C(AC)= 777777 777777 C(AC+1)= 777757 777777
----------
*036365 ROTC 7,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777757 777777 E= 000000 777777
FINAL
C(AC)= 777777 777777 C(AC+1)= 777767 777777
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 90
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0473
*036374 ROTC 7,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777767 777777 E= 000000 777777
FINAL
C(AC)= 777777 777777 C(AC+1)= 777773 777777
----------
*036403 ROTC 7,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777773 777777 E= 000000 777777
FINAL
C(AC)= 777777 777777 C(AC+1)= 777775 777777
----------
*036412 ROTC 7,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777775 777777 E= 000000 777777
FINAL
C(AC)= 777777 777777 C(AC+1)= 777776 777777
----------
*036421 ROTC 7,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777776 777777 E= 000000 777777
FINAL
C(AC)= 777777 777777 C(AC+1)= 777777 377777
----------
*036430 ROTC 7,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777777 377777 E= 000000 777777
FINAL
C(AC)= 777777 777777 C(AC+1)= 777777 577777
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 91
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0474
*036437 ROTC 7,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777777 577777 E= 000000 777777
FINAL
C(AC)= 777777 777777 C(AC+1)= 777777 677777
----------
*036446 ROTC 7,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777777 677777 E= 000000 777777
FINAL
C(AC)= 777777 777777 C(AC+1)= 777777 737777
----------
*036455 ROTC 7,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777777 737777 E= 000000 777777
FINAL
C(AC)= 777777 777777 C(AC+1)= 777777 757777
----------
*036464 ROTC 7,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777777 757777 E= 000000 777777
FINAL
C(AC)= 777777 777777 C(AC+1)= 777777 767777
----------
*036473 ROTC 7,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777777 767777 E= 000000 777777
FINAL
C(AC)= 777777 777777 C(AC+1)= 777777 773777
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 92
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0475
*036502 ROTC 7,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777777 773777 E= 000000 777777
FINAL
C(AC)= 777777 777777 C(AC+1)= 777777 775777
----------
*036511 ROTC 7,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777777 775777 E= 000000 777777
FINAL
C(AC)= 777777 777777 C(AC+1)= 777777 776777
----------
*036520 ROTC 7,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777777 776777 E= 000000 777777
FINAL
C(AC)= 777777 777777 C(AC+1)= 777777 777377
----------
*036527 ROTC 7,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777777 777377 E= 000000 777777
FINAL
C(AC)= 777777 777777 C(AC+1)= 777777 777577
----------
*036536 ROTC 7,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777777 777577 E= 000000 777777
FINAL
C(AC)= 777777 777777 C(AC+1)= 777777 777677
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 93
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0476
*036545 ROTC 7,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777777 777677 E= 000000 777777
FINAL
C(AC)= 777777 777777 C(AC+1)= 777777 777737
----------
*036554 ROTC 7,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777777 777737 E= 000000 777777
FINAL
C(AC)= 777777 777777 C(AC+1)= 777777 777757
----------
*036563 ROTC 7,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777777 777757 E= 000000 777777
FINAL
C(AC)= 777777 777777 C(AC+1)= 777777 777767
----------
*036572 ROTC 7,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777777 777767 E= 000000 777777
FINAL
C(AC)= 777777 777777 C(AC+1)= 777777 777773
----------
*036601 ROTC 7,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777777 777773 E= 000000 777777
FINAL
C(AC)= 777777 777777 C(AC+1)= 777777 777775
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 94
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0477
*036610 ROTC 7,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777777 777775 E= 000000 777777
FINAL
C(AC)= 777777 777777 C(AC+1)= 777777 777776
----------
*036622 ROTC 6,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000000 000000 E= 000000 777776
FINAL
C(AC)= 000000 000000 C(AC+1)= 000000 000000
----------
*036630 ROTC 6,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777777 777777 E= 000000 777776
FINAL
C(AC)= 777777 777777 C(AC+1)= 777777 777777
----------
*036637 ROTC 6,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 400000 000000 E= 000000 777776
FINAL
C(AC)= 000000 000000 C(AC+1)= 100000 000000
----------
*036646 ROTC 6,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 200000 000000 E= 000000 777776
FINAL
C(AC)= 000000 000000 C(AC+1)= 040000 000000
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 95
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0478
*036655 ROTC 6,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 100000 000000 E= 000000 777776
FINAL
C(AC)= 000000 000000 C(AC+1)= 020000 000000
----------
*036664 ROTC 6,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 040000 000000 E= 000000 777776
FINAL
C(AC)= 000000 000000 C(AC+1)= 010000 000000
----------
*036673 ROTC 6,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 020000 000000 E= 000000 777776
FINAL
C(AC)= 000000 000000 C(AC+1)= 004000 000000
----------
*036702 ROTC 6,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 010000 000000 E= 000000 777776
FINAL
C(AC)= 000000 000000 C(AC+1)= 002000 000000
----------
*036711 ROTC 6,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 004000 000000 E= 000000 777776
FINAL
C(AC)= 000000 000000 C(AC+1)= 001000 000000
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 96
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0479
*036720 ROTC 6,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 002000 000000 E= 000000 777776
FINAL
C(AC)= 000000 000000 C(AC+1)= 000400 000000
----------
*036727 ROTC 6,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 001000 000000 E= 000000 777776
FINAL
C(AC)= 000000 000000 C(AC+1)= 000200 000000
----------
*036736 ROTC 6,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000400 000000 E= 000000 777776
FINAL
C(AC)= 000000 000000 C(AC+1)= 000100 000000
----------
*036745 ROTC 6,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000200 000000 E= 000000 777776
FINAL
C(AC)= 000000 000000 C(AC+1)= 000040 000000
----------
*036754 ROTC 6,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000100 000000 E= 000000 777776
FINAL
C(AC)= 000000 000000 C(AC+1)= 000020 000000
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 97
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0480
*036763 ROTC 6,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000040 000000 E= 000000 777776
FINAL
C(AC)= 000000 000000 C(AC+1)= 000010 000000
----------
*036772 ROTC 6,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000020 000000 E= 000000 777776
FINAL
C(AC)= 000000 000000 C(AC+1)= 000004 000000
----------
*037001 ROTC 6,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000010 000000 E= 000000 777776
FINAL
C(AC)= 000000 000000 C(AC+1)= 000002 000000
----------
*037010 ROTC 6,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000004 000000 E= 000000 777776
FINAL
C(AC)= 000000 000000 C(AC+1)= 000001 000000
----------
*037017 ROTC 6,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000002 000000 E= 000000 777776
FINAL
C(AC)= 000000 000000 C(AC+1)= 000000 400000
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 98
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0481
*037027 ROTC 6,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000001 000000 E= 000000 777776
FINAL
C(AC)= 000000 000000 C(AC+1)= 000000 200000
----------
*037036 ROTC 6,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000000 400000 E= 000000 777776
FINAL
C(AC)= 000000 000000 C(AC+1)= 000000 100000
----------
*037045 ROTC 6,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000000 200000 E= 000000 777776
FINAL
C(AC)= 000000 000000 C(AC+1)= 000000 040000
----------
*037054 ROTC 6,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000000 100000 E= 000000 777776
FINAL
C(AC)= 000000 000000 C(AC+1)= 000000 020000
----------
*037063 ROTC 6,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000000 040000 E= 000000 777776
FINAL
C(AC)= 000000 000000 C(AC+1)= 000000 010000
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 99
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0482
*037072 ROTC 6,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000000 020000 E= 000000 777776
FINAL
C(AC)= 000000 000000 C(AC+1)= 000000 004000
----------
*037101 ROTC 6,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000000 010000 E= 000000 777776
FINAL
C(AC)= 000000 000000 C(AC+1)= 000000 002000
----------
*037110 ROTC 6,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000000 004000 E= 000000 777776
FINAL
C(AC)= 000000 000000 C(AC+1)= 000000 001000
----------
*037117 ROTC 6,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000000 002000 E= 000000 777776
FINAL
C(AC)= 000000 000000 C(AC+1)= 000000 000400
----------
*037126 ROTC 6,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000000 001000 E= 000000 777776
FINAL
C(AC)= 000000 000000 C(AC+1)= 000000 000200
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 100
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0483
*037135 ROTC 6,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000000 000400 E= 000000 777776
FINAL
C(AC)= 000000 000000 C(AC+1)= 000000 000100
----------
*037144 ROTC 6,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000000 000200 E= 000000 777776
FINAL
C(AC)= 000000 000000 C(AC+1)= 000000 000040
----------
*037153 ROTC 6,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000000 000100 E= 000000 777776
FINAL
C(AC)= 000000 000000 C(AC+1)= 000000 000020
----------
*037162 ROTC 6,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000000 000040 E= 000000 777776
FINAL
C(AC)= 000000 000000 C(AC+1)= 000000 000010
----------
*037171 ROTC 6,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000000 000020 E= 000000 777776
FINAL
C(AC)= 000000 000000 C(AC+1)= 000000 000004
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 101
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0484
*037200 ROTC 6,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000000 000010 E= 000000 777776
FINAL
C(AC)= 000000 000000 C(AC+1)= 000000 000002
----------
*037207 ROTC 6,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000000 000004 E= 000000 777776
FINAL
C(AC)= 000000 000000 C(AC+1)= 000000 000001
----------
*037216 ROTC 6,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 377777 777777 E= 000000 777776
FINAL
C(AC)= 777777 777777 C(AC+1)= 677777 777777
----------
*037225 ROTC 6,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 577777 777777 E= 000000 777776
FINAL
C(AC)= 777777 777777 C(AC+1)= 737777 777777
----------
*037234 ROTC 6,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 677777 777777 E= 000000 777776
FINAL
C(AC)= 777777 777777 C(AC+1)= 757777 777777
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 102
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0485
*037243 ROTC 6,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 737777 777777 E= 000000 777776
FINAL
C(AC)= 777777 777777 C(AC+1)= 767777 777777
----------
*037252 ROTC 6,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 757777 777777 E= 000000 777776
FINAL
C(AC)= 777777 777777 C(AC+1)= 773777 777777
----------
*037261 ROTC 6,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 767777 777777 E= 000000 777776
FINAL
C(AC)= 777777 777777 C(AC+1)= 775777 777777
----------
*037270 ROTC 6,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 773777 777777 E= 000000 777776
FINAL
C(AC)= 777777 777777 C(AC+1)= 776777 777777
----------
*037277 ROTC 6,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 775777 777777 E= 000000 777776
FINAL
C(AC)= 777777 777777 C(AC+1)= 777377 777777
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 103
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0486
*037306 ROTC 6,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 776777 777777 E= 000000 777776
FINAL
C(AC)= 777777 777777 C(AC+1)= 777577 777777
----------
*037315 ROTC 6,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777377 777777 E= 000000 777776
FINAL
C(AC)= 777777 777777 C(AC+1)= 777677 777777
----------
*037324 ROTC 6,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777577 777777 E= 000000 777776
FINAL
C(AC)= 777777 777777 C(AC+1)= 777737 777777
----------
*037333 ROTC 6,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777677 777777 E= 000000 777776
FINAL
C(AC)= 777777 777777 C(AC+1)= 777757 777777
----------
*037342 ROTC 6,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777737 777777 E= 000000 777776
FINAL
C(AC)= 777777 777777 C(AC+1)= 777767 777777
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 104
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0487
*037351 ROTC 6,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777757 777777 E= 000000 777776
FINAL
C(AC)= 777777 777777 C(AC+1)= 777773 777777
----------
*037360 ROTC 6,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777767 777777 E= 000000 777776
FINAL
C(AC)= 777777 777777 C(AC+1)= 777775 777777
----------
*037367 ROTC 6,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777773 777777 E= 000000 777776
FINAL
C(AC)= 777777 777777 C(AC+1)= 777776 777777
----------
*037376 ROTC 6,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777775 777777 E= 000000 777776
FINAL
C(AC)= 777777 777777 C(AC+1)= 777777 377777
----------
*037406 ROTC 6,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777776 777777 E= 000000 777776
FINAL
C(AC)= 777777 777777 C(AC+1)= 777777 577777
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 105
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0488
*037415 ROTC 6,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777777 377777 E= 000000 777776
FINAL
C(AC)= 777777 777777 C(AC+1)= 777777 677777
----------
*037424 ROTC 6,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777777 577777 E= 000000 777776
FINAL
C(AC)= 777777 777777 C(AC+1)= 777777 737777
----------
*037433 ROTC 6,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777777 677777 E= 000000 777776
FINAL
C(AC)= 777777 777777 C(AC+1)= 777777 757777
----------
*037442 ROTC 6,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777777 737777 E= 000000 777776
FINAL
C(AC)= 777777 777777 C(AC+1)= 777777 767777
----------
*037451 ROTC 6,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777777 757777 E= 000000 777776
FINAL
C(AC)= 777777 777777 C(AC+1)= 777777 773777
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 106
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0489
*037460 ROTC 6,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777777 767777 E= 000000 777776
FINAL
C(AC)= 777777 777777 C(AC+1)= 777777 775777
----------
*037467 ROTC 6,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777777 773777 E= 000000 777776
FINAL
C(AC)= 777777 777777 C(AC+1)= 777777 776777
----------
*037476 ROTC 6,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777777 775777 E= 000000 777776
FINAL
C(AC)= 777777 777777 C(AC+1)= 777777 777377
----------
*037505 ROTC 6,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777777 776777 E= 000000 777776
FINAL
C(AC)= 777777 777777 C(AC+1)= 777777 777577
----------
*037514 ROTC 6,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777777 777377 E= 000000 777776
FINAL
C(AC)= 777777 777777 C(AC+1)= 777777 777677
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 107
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0490
*037523 ROTC 6,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777777 777577 E= 000000 777776
FINAL
C(AC)= 777777 777777 C(AC+1)= 777777 777737
----------
*037532 ROTC 6,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777777 777677 E= 000000 777776
FINAL
C(AC)= 777777 777777 C(AC+1)= 777777 777757
----------
*037541 ROTC 6,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777777 777737 E= 000000 777776
FINAL
C(AC)= 777777 777777 C(AC+1)= 777777 777767
----------
*037550 ROTC 6,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777777 777757 E= 000000 777776
FINAL
C(AC)= 777777 777777 C(AC+1)= 777777 777773
----------
*037557 ROTC 6,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777777 777767 E= 000000 777776
FINAL
C(AC)= 777777 777777 C(AC+1)= 777777 777775
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 108
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0491
*037566 ROTC 6,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777777 777773 E= 000000 777776
FINAL
C(AC)= 777777 777777 C(AC+1)= 777777 777776
----------
*037574 ROT 6,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 400000 000000 E= 000000 000001
FINAL
C(AC)= 000000 000001
----------
*037604 ROT 6,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 377777 777777 E= 000000 000001
FINAL
C(AC)= 777777 777776
----------
*037614 ROT 6,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000001 E= 000000 000001
FINAL
C(AC)= 000000 000002
----------
*037624 ROT 6,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777776 E= 000000 000001
FINAL
C(AC)= 777777 777775
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 109
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0492
*037634 ROT 6,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 100000 000000 E= 000000 000001
FINAL
C(AC)= 200000 000000
----------
*037644 ROT 6,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 677777 777777 E= 000000 000001
FINAL
C(AC)= 577777 777777
----------
*037654 ROT 6,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 200000 000000 E= 000000 000001
FINAL
C(AC)= 400000 000000
----------
*037664 ROT 6,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 577777 777777 E= 000000 000001
FINAL
C(AC)= 377777 777777
----------
*037674 ROT 6,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000001 E= 000000 777777
FINAL
C(AC)= 400000 000000
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 110
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0493
*037704 ROT 6,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777776 E= 000000 777777
FINAL
C(AC)= 377777 777777
----------
*037714 ROT 6,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 400000 000000 E= 000000 777777
FINAL
C(AC)= 200000 000000
----------
*037724 ROT 6,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 377777 777777 E= 000000 777777
FINAL
C(AC)= 577777 777777
----------
*037734 ROT 6,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000004 E= 000000 777777
FINAL
C(AC)= 000000 000002
----------
*037744 ROT 6,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777773 E= 000000 777777
FINAL
C(AC)= 777777 777775
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 111
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0494
*037754 ROT 6,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000002 E= 000000 777777
FINAL
C(AC)= 000000 000001
----------
*037764 ROT 6,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777775 E= 000000 777777
FINAL
C(AC)= 777777 777776
----------
*037774 ROT 6,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000002 E= 000000 777776
FINAL
C(AC)= 400000 000000
----------
*040004 ROT 6,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777775 E= 000000 777776
FINAL
C(AC)= 377777 777777
----------
*040014 ROT 6,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000001 E= 000000 777776
FINAL
C(AC)= 200000 000000
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 112
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0495
*040024 ROT 6,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777776 E= 000000 777776
FINAL
C(AC)= 577777 777777
----------
*040034 ROT 6,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000010 E= 000000 777776
FINAL
C(AC)= 000000 000002
----------
*040044 ROT 6,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777767 E= 000000 777776
FINAL
C(AC)= 777777 777775
----------
*040054 ROT 6,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000004 E= 000000 777776
FINAL
C(AC)= 000000 000001
----------
*040064 ROT 6,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777773 E= 000000 777776
FINAL
C(AC)= 777777 777776
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 113
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0496
*040074 LSH 6,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 E= 000000 000001
FINAL
C(AC)= 777777 777776
----------
*040104 LSH 6,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000001 E= 000000 000001
FINAL
C(AC)= 000000 000002
----------
*040114 LSH 6,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777776 E= 000000 000001
FINAL
C(AC)= 777777 777774
----------
*040124 LSH 6,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 100000 000000 E= 000000 000001
FINAL
C(AC)= 200000 000000
----------
*040134 LSH 6,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 677777 777777 E= 000000 000001
FINAL
C(AC)= 577777 777776
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 114
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0497
*040144 LSH 6,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 200000 000000 E= 000000 000001
FINAL
C(AC)= 400000 000000
----------
*040154 LSH 6,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 577777 777777 E= 000000 000001
FINAL
C(AC)= 377777 777776
----------
*040164 LSH 6,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 E= 000000 777777
FINAL
C(AC)= 377777 777777
----------
*040174 LSH 6,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 400000 000000 E= 000000 777777
FINAL
C(AC)= 200000 000000
----------
*040204 LSH 6,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 377777 777777 E= 000000 777777
FINAL
C(AC)= 177777 777777
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 115
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0498
*040214 LSH 6,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000004 E= 000000 777777
FINAL
C(AC)= 000000 000002
----------
*040224 LSH 6,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777773 E= 000000 777777
FINAL
C(AC)= 377777 777775
----------
*040234 LSH 6,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000002 E= 000000 777777
FINAL
C(AC)= 000000 000001
----------
*040244 LSH 6,777777
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777775 E= 000000 777777
FINAL
C(AC)= 377777 777776
----------
*040254 LSH 6,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 E= 000000 777776
FINAL
C(AC)= 177777 777777
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 116
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0499
*040264 LSH 6,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 E= 000000 777776
FINAL
C(AC)= 177777 777777
----------
*040274 LSH 6,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000010 E= 000000 777776
FINAL
C(AC)= 000000 000002
----------
*040304 LSH 6,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777767 E= 000000 777776
FINAL
C(AC)= 177777 777775
----------
*040314 LSH 6,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000004 E= 000000 777776
FINAL
C(AC)= 000000 000001
----------
*040324 LSH 6,777776
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777773 E= 000000 777776
FINAL
C(AC)= 177777 777776
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 117
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0500
*040334 ASH 6,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777777 E= 000000 000001
FINAL
C(AC)= 777777 777776
----------
*040344 ASH 6,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 000000 000001 E= 000000 000001
FINAL
C(AC)= 000000 000002
----------
*040354 ASH 6,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 777777 777776 E= 000000 000001
FINAL
C(AC)= 777777 777774
----------
*040364 ASH 6,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 100000 000000 E= 000000 000001
FINAL
C(AC)= 200000 000000
----------
*040374 ASH 6,000001
FLAGS - INT/FINAL 000000 000000
INITIAL
C(AC)= 677777 777777 E= 000000 000001
FINAL
C(AC)= 577777 777776
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 118
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0501
*040404 ASH 6,000001
FLAGS - INT/FINAL 000000 400200
INITIAL
C(AC)= 400000 000000 E= 000000 000001
FINAL
C(AC)= 400000 000000
----------
*040414 ASH 6,000001
FLAGS - INT/FINAL 400200 400200
INITIAL
C(AC)= 377777 777777 E= 000000 000001
FINAL
C(AC)= 377777 777776
----------
*040424 ASH 6,777777
FLAGS - INT/FINAL 400200 400200
INITIAL
C(AC)= 400000 000000 E= 000000 777777
FINAL
C(AC)= 600000 000000
----------
*040434 ASH 6,777777
FLAGS - INT/FINAL 400200 400200
INITIAL
C(AC)= 377777 777777 E= 000000 777777
FINAL
C(AC)= 177777 777777
----------
*040444 ASH 6,777777
FLAGS - INT/FINAL 400200 400200
INITIAL
C(AC)= 400000 000000 E= 000000 777777
FINAL
C(AC)= 600000 000000
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 119
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0502
*040454 ASH 6,777777
FLAGS - INT/FINAL 400200 400200
INITIAL
C(AC)= 377777 777777 E= 000000 777777
FINAL
C(AC)= 177777 777777
----------
*040464 ASH 6,777777
FLAGS - INT/FINAL 400200 400200
INITIAL
C(AC)= 000000 000004 E= 000000 777777
FINAL
C(AC)= 000000 000002
----------
*040474 ASH 6,777777
FLAGS - INT/FINAL 400200 400200
INITIAL
C(AC)= 777777 777773 E= 000000 777777
FINAL
C(AC)= 777777 777775
----------
*040504 ASH 6,777777
FLAGS - INT/FINAL 400200 400200
INITIAL
C(AC)= 000000 000002 E= 000000 777777
FINAL
C(AC)= 000000 000001
----------
*040514 ASH 6,777777
FLAGS - INT/FINAL 400200 400200
INITIAL
C(AC)= 777777 777775 E= 000000 777777
FINAL
C(AC)= 777777 777776
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 120
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0503
*040524 ASH 6,777776
FLAGS - INT/FINAL 400200 400200
INITIAL
C(AC)= 400000 000000 E= 000000 777776
FINAL
C(AC)= 700000 000000
----------
*040534 ASH 6,777776
FLAGS - INT/FINAL 400200 400200
INITIAL
C(AC)= 377777 777777 E= 000000 777776
FINAL
C(AC)= 077777 777777
----------
*040544 ASH 6,777776
FLAGS - INT/FINAL 400200 400200
INITIAL
C(AC)= 400000 000000 E= 000000 777776
FINAL
C(AC)= 700000 000000
----------
*040554 ASH 6,777776
FLAGS - INT/FINAL 400200 400200
INITIAL
C(AC)= 377777 777777 E= 000000 777776
FINAL
C(AC)= 077777 777777
----------
*040564 ASH 6,777776
FLAGS - INT/FINAL 400200 400200
INITIAL
C(AC)= 000000 000010 E= 000000 777776
FINAL
C(AC)= 000000 000002
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 121
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0504
*040574 ASH 6,777776
FLAGS - INT/FINAL 400200 400200
INITIAL
C(AC)= 777777 777767 E= 000000 777776
FINAL
C(AC)= 777777 777775
----------
*040604 ASH 6,777776
FLAGS - INT/FINAL 400200 400200
INITIAL
C(AC)= 000000 000004 E= 000000 777776
FINAL
C(AC)= 000000 000001
----------
*040614 ASH 6,777776
FLAGS - INT/FINAL 400200 400200
INITIAL
C(AC)= 777777 777773 E= 000000 777776
FINAL
C(AC)= 777777 777776
----------
*040624 ROTC 6,000001
FLAGS - INT/FINAL 400200 400200
INITIAL
C(AC)= 400000 000000 C(AC+1)= 000000 000000 E= 000000 000001
FINAL
C(AC)= 000000 000000 C(AC+1)= 000000 000001
----------
*040634 ROTC 6,000001
FLAGS - INT/FINAL 400200 400200
INITIAL
C(AC)= 377777 777777 C(AC+1)= 777777 777777 E= 000000 000001
FINAL
C(AC)= 777777 777777 C(AC+1)= 777777 777776
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 122
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0505
*040644 ROTC 6,000001
FLAGS - INT/FINAL 400200 400200
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000000 000001 E= 000000 000001
FINAL
C(AC)= 000000 000000 C(AC+1)= 000000 000002
----------
*040654 ROTC 6,000001
FLAGS - INT/FINAL 400200 400200
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777777 777776 E= 000000 000001
FINAL
C(AC)= 777777 777777 C(AC+1)= 777777 777775
----------
*040664 ROTC 6,000001
FLAGS - INT/FINAL 400200 400200
INITIAL
C(AC)= 000000 000000 C(AC+1)= 100000 000000 E= 000000 000001
FINAL
C(AC)= 000000 000000 C(AC+1)= 200000 000000
----------
*040674 ROTC 6,000001
FLAGS - INT/FINAL 400200 400200
INITIAL
C(AC)= 777777 777777 C(AC+1)= 677777 777777 E= 000000 000001
FINAL
C(AC)= 777777 777777 C(AC+1)= 577777 777777
----------
*040704 ROTC 6,000001
FLAGS - INT/FINAL 400200 400200
INITIAL
C(AC)= 000000 000000 C(AC+1)= 200000 000000 E= 000000 000001
FINAL
C(AC)= 000000 000000 C(AC+1)= 400000 000000
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 123
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0506
*040714 ROTC 6,000001
FLAGS - INT/FINAL 400200 400200
INITIAL
C(AC)= 777777 777777 C(AC+1)= 577777 777777 E= 000000 000001
FINAL
C(AC)= 777777 777777 C(AC+1)= 377777 777777
----------
*040724 ROTC 6,000001
FLAGS - INT/FINAL 400200 400200
INITIAL
C(AC)= 000000 000000 C(AC+1)= 400000 000000 E= 000000 000001
FINAL
C(AC)= 000000 000001 C(AC+1)= 000000 000000
----------
*040734 ROTC 6,000001
FLAGS - INT/FINAL 400200 400200
INITIAL
C(AC)= 777777 777777 C(AC+1)= 377777 777777 E= 000000 000001
FINAL
C(AC)= 777777 777776 C(AC+1)= 777777 777777
----------
*040744 ROTC 6,000001
FLAGS - INT/FINAL 400200 400200
INITIAL
C(AC)= 000000 000001 C(AC+1)= 000000 000000 E= 000000 000001
FINAL
C(AC)= 000000 000002 C(AC+1)= 000000 000000
----------
*040754 ROTC 6,000001
FLAGS - INT/FINAL 400200 400200
INITIAL
C(AC)= 777777 777776 C(AC+1)= 777777 777777 E= 000000 000001
FINAL
C(AC)= 777777 777775 C(AC+1)= 777777 777777
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 124
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0507
*040764 ROTC 6,000001
FLAGS - INT/FINAL 400200 400200
INITIAL
C(AC)= 100000 000000 C(AC+1)= 000000 000000 E= 000000 000001
FINAL
C(AC)= 200000 000000 C(AC+1)= 000000 000000
----------
*040774 ROTC 6,000001
FLAGS - INT/FINAL 400200 400200
INITIAL
C(AC)= 677777 777777 C(AC+1)= 777777 777777 E= 000000 000001
FINAL
C(AC)= 577777 777777 C(AC+1)= 777777 777777
----------
*041004 ROTC 6,000001
FLAGS - INT/FINAL 400200 400200
INITIAL
C(AC)= 200000 000000 C(AC+1)= 000000 000000 E= 000000 000001
FINAL
C(AC)= 400000 000000 C(AC+1)= 000000 000000
----------
*041014 ROTC 6,000001
FLAGS - INT/FINAL 400200 400200
INITIAL
C(AC)= 577777 777777 C(AC+1)= 777777 777777 E= 000000 000001
FINAL
C(AC)= 377777 777777 C(AC+1)= 777777 777777
----------
*041024 ROTC 6,777777
FLAGS - INT/FINAL 400200 400200
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000000 000001 E= 000000 777777
FINAL
C(AC)= 400000 000000 C(AC+1)= 000000 000000
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 125
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0508
*041034 ROTC 6,777777
FLAGS - INT/FINAL 400200 400200
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777777 777776 E= 000000 777777
FINAL
C(AC)= 377777 777777 C(AC+1)= 777777 777777
----------
*041044 ROTC 6,777777
FLAGS - INT/FINAL 400200 400200
INITIAL
C(AC)= 400000 000000 C(AC+1)= 000000 000000 E= 000000 777777
FINAL
C(AC)= 200000 000000 C(AC+1)= 000000 000000
----------
*041054 ROTC 6,777777
FLAGS - INT/FINAL 400200 400200
INITIAL
C(AC)= 377777 777777 C(AC+1)= 777777 777777 E= 000000 777777
FINAL
C(AC)= 577777 777777 C(AC+1)= 777777 777777
----------
*041064 ROTC 6,777777
FLAGS - INT/FINAL 400200 400200
INITIAL
C(AC)= 000000 000004 C(AC+1)= 000000 000000 E= 000000 777777
FINAL
C(AC)= 000000 000002 C(AC+1)= 000000 000000
----------
*041074 ROTC 6,777777
FLAGS - INT/FINAL 400200 400200
INITIAL
C(AC)= 777777 777773 C(AC+1)= 777777 777777 E= 000000 777777
FINAL
C(AC)= 777777 777775 C(AC+1)= 777777 777777
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 126
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0509
*041104 ROTC 6,777777
FLAGS - INT/FINAL 400200 400200
INITIAL
C(AC)= 000000 000002 C(AC+1)= 000000 000000 E= 000000 777777
FINAL
C(AC)= 000000 000001 C(AC+1)= 000000 000000
----------
*041114 ROTC 6,777777
FLAGS - INT/FINAL 400200 400200
INITIAL
C(AC)= 777777 777775 C(AC+1)= 777777 777777 E= 000000 777777
FINAL
C(AC)= 777777 777776 C(AC+1)= 777777 777777
----------
*041124 ROTC 6,777777
FLAGS - INT/FINAL 400200 400200
INITIAL
C(AC)= 000000 000001 C(AC+1)= 000000 000000 E= 000000 777777
FINAL
C(AC)= 000000 000000 C(AC+1)= 400000 000000
----------
*041134 ROTC 6,777777
FLAGS - INT/FINAL 400200 400200
INITIAL
C(AC)= 777777 777776 C(AC+1)= 777777 777777 E= 000000 777777
FINAL
C(AC)= 777777 777777 C(AC+1)= 377777 777777
----------
*041144 ROTC 6,777777
FLAGS - INT/FINAL 400200 400200
INITIAL
C(AC)= 000000 000000 C(AC+1)= 400000 000000 E= 000000 777777
FINAL
C(AC)= 000000 000000 C(AC+1)= 200000 000000
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 127
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0510
*041154 ROTC 6,777777
FLAGS - INT/FINAL 400200 400200
INITIAL
C(AC)= 777777 777777 C(AC+1)= 377777 777777 E= 000000 777777
FINAL
C(AC)= 777777 777777 C(AC+1)= 577777 777777
----------
*041164 ROTC 6,777777
FLAGS - INT/FINAL 400200 400200
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000000 000004 E= 000000 777777
FINAL
C(AC)= 000000 000000 C(AC+1)= 000000 000002
----------
*041174 ROTC 6,777777
FLAGS - INT/FINAL 400200 400200
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777777 777773 E= 000000 777777
FINAL
C(AC)= 777777 777777 C(AC+1)= 777777 777775
----------
*041204 ROTC 6,777777
FLAGS - INT/FINAL 400200 400200
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000000 000002 E= 000000 777777
FINAL
C(AC)= 000000 000000 C(AC+1)= 000000 000001
----------
*041214 ROTC 6,777777
FLAGS - INT/FINAL 400200 400200
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777777 777775 E= 000000 777777
FINAL
C(AC)= 777777 777777 C(AC+1)= 777777 777776
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 128
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0511
*041224 ROTC 6,777776
FLAGS - INT/FINAL 400200 400200
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000000 000002 E= 000000 777776
FINAL
C(AC)= 400000 000000 C(AC+1)= 000000 000000
----------
*041234 ROTC 6,777776
FLAGS - INT/FINAL 400200 400200
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777777 777775 E= 000000 777776
FINAL
C(AC)= 377777 777777 C(AC+1)= 777777 777777
----------
*041244 ROTC 6,777776
FLAGS - INT/FINAL 400200 400200
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000000 000001 E= 000000 777776
FINAL
C(AC)= 200000 000000 C(AC+1)= 000000 000000
----------
*041254 ROTC 6,777776
FLAGS - INT/FINAL 400200 400200
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777777 777776 E= 000000 777776
FINAL
C(AC)= 577777 777777 C(AC+1)= 777777 777777
----------
*041264 ROTC 6,777776
FLAGS - INT/FINAL 400200 400200
INITIAL
C(AC)= 000000 000010 C(AC+1)= 000000 000000 E= 000000 777776
FINAL
C(AC)= 000000 000002 C(AC+1)= 000000 000000
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 129
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0512
*041274 ROTC 6,777776
FLAGS - INT/FINAL 400200 400200
INITIAL
C(AC)= 777777 777767 C(AC+1)= 777777 777777 E= 000000 777776
FINAL
C(AC)= 777777 777775 C(AC+1)= 777777 777777
----------
*041304 ROTC 6,777776
FLAGS - INT/FINAL 400200 400200
INITIAL
C(AC)= 000000 000004 C(AC+1)= 000000 000000 E= 000000 777776
FINAL
C(AC)= 000000 000001 C(AC+1)= 000000 000000
----------
*041314 ROTC 6,777776
FLAGS - INT/FINAL 400200 400200
INITIAL
C(AC)= 777777 777773 C(AC+1)= 777777 777777 E= 000000 777776
FINAL
C(AC)= 777777 777776 C(AC+1)= 777777 777777
----------
*041324 ROTC 6,777776
FLAGS - INT/FINAL 400200 400200
INITIAL
C(AC)= 000000 000002 C(AC+1)= 000000 000000 E= 000000 777776
FINAL
C(AC)= 000000 000000 C(AC+1)= 400000 000000
----------
*041334 ROTC 6,777776
FLAGS - INT/FINAL 400200 400200
INITIAL
C(AC)= 777777 777775 C(AC+1)= 777777 777777 E= 000000 777776
FINAL
C(AC)= 777777 777777 C(AC+1)= 377777 777777
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 130
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0513
*041344 ROTC 6,777776
FLAGS - INT/FINAL 400200 400200
INITIAL
C(AC)= 000000 000001 C(AC+1)= 000000 000000 E= 000000 777776
FINAL
C(AC)= 000000 000000 C(AC+1)= 200000 000000
----------
*041354 ROTC 6,777776
FLAGS - INT/FINAL 400200 400200
INITIAL
C(AC)= 777777 777776 C(AC+1)= 777777 777777 E= 000000 777776
FINAL
C(AC)= 777777 777777 C(AC+1)= 577777 777777
----------
*041364 ROTC 6,777776
FLAGS - INT/FINAL 400200 400200
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000000 000010 E= 000000 777776
FINAL
C(AC)= 000000 000000 C(AC+1)= 000000 000002
----------
*041374 ROTC 6,777776
FLAGS - INT/FINAL 400200 400200
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777777 777767 E= 000000 777776
FINAL
C(AC)= 777777 777777 C(AC+1)= 777777 777775
----------
*041404 ROTC 6,777776
FLAGS - INT/FINAL 400200 400200
INITIAL
C(AC)= 000000 000000 C(AC+1)= 000000 000004 E= 000000 777776
FINAL
C(AC)= 000000 000000 C(AC+1)= 000000 000001
----------
PROGRAM SWITCHES MASK INSTR CNTLPC UPRPC KSSIM VER 4.0 29-MAR-78 PAGE 131
DSKAI 000000 000000 770000 000000 240000 000000 030000 777777 SEQ 0514
*041414 ROTC 6,777776
FLAGS - INT/FINAL 400200 400200
INITIAL
C(AC)= 777777 777777 C(AC+1)= 777777 777773 E= 000000 777776
FINAL
C(AC)= 777777 777777 C(AC+1)= 777777 777776
----------