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Trailing-Edge - PDP-10 Archives - klad_sources - klad.sources/float.mac
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SUBTTL	FLOAT	36 BIT FLOAT FUNCTION

;*FOR KI10 SIMULATION/DIAGNOSTICS  13-OCT-71, J.R.KIRCHOFF
;*	15-MAY-70 /JRK
;*	FROM VERSION, 18 FEBRUARY 1966 ED YOURDON

;*36 BIT FLOAT FUNCTION
;*CONVERTS A SIGNED FIXED POINT INTERGER TO A FLOATING POINT
;*BY BREAKING THE INTERGER INTO HIGH ORDER AND LOW ORDER
;*FRACTIONS, CALCULATING AN EXPONENT, THEN ADDING THE TWO
;*TOGETHER.

;*THE ROUTINE IS CALLED AS FOLLOWS:
;*	MOVEI	Q,ARG
;*	PUSHJ	17,FLT.0
;*THE ANSWER IS RETURNED IN ACCUMULATOR A

	A==	0
	B==	1
	Q==	16

FLT.0:	PUSHJ	17,FLT1A
	FAD	A,B		;NORMALIZE AND ADD
FLT2A:	MOVE	B,FLOATB	;RESTORE AC B
	JRST	2,@[.+1]	;CLEAR FLAGS
	POPJ	17,		;EXIT

FLTR.0:	PUSHJ	17,FLT1A
	FADR	A,B		;NORMALIZE, ADD & ROUND
	JRST	FLT2A

FLT1A:	MOVEM	B,FLOATB	;SAVE AC B
	MOVE	A,(Q)		;PICKUP THE ARGUMENT
	IDIVI	A,400000	;PUT HIGH ORDER IN RH(A),...
	SKIPE	A		;IMPLIES INTERGER LESS THAN 18 BITS
	TLC	A,254000	;SET EXP TO 254 (27+17 DECIMAL)
	TLC	B,233000	;SET EXP OF B TO 233 (27 DECIMAL)
	POPJ	17,


FLOATB:!0