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klad.sources/mscsld.b36
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%TITLE 'STIRS FAULT ISOLATION DATA FOR M8616 (CSL) BOARD'
MODULE MSCSLD (
LANGUAGE(BLISS36)
) =
BEGIN
!
! COPYRIGHT (C) 1979 BY
! DIGITAL EQUIPMENT CORPORATION, MAYNARD, MASS.
!
! THIS SOFTWARE IS FURNISHED UNDER A LICENSE AND MAY BE USED AND COPIED
! ONLY IN ACCORDANCE WITH THE TERMS OF SUCH LICENSE AND WITH THE
! INCLUSION OF THE ABOVE COPYRIGHT NOTICE. THIS SOFTWARE OR ANY OTHER
! COPIES THEREOF MAY NOT BE PROVIDED OR OTHERWISE MADE AVAILABLE TO ANY
! OTHER PERSON. NO TITLE TO AND OWNERSHIP OF THE SOFTWARE IS HEREBY
! TRANSFERRED.
!
! THE INFORMATION IN THIS SOFTWARE IS SUBJECT TO CHANGE WITHOUT NOTICE
! AND SHOULD NOT BE CONSTRUED AS A COMMITMENT BY DIGITAL EQUIPMENT
! CORPORATION.
!
! DIGITAL ASSUMES NO RESPONSIBILITY FOR THE USE OR RELIABILITY OF ITS
! SOFTWARE ON EQUIPMENT WHICH IS NOT SUPPLIED BY DIGITAL.
!
!++
! FACILITY: DECSYSTEM 2020 DIAGNOSTIC RELEASE TAPE 'DSTIR'
!
! ABSTRACT:
!
! THIS MODULE CONTAINS THE FAULT ISOLATION DATA FOR THE KS10
! STIMULUS/RESPONSE (STIRS) DIAGNOSTIC FOR THE M8616 (CSL) BOARD.
! IT IS LINKED TO THE 'MSSTRC' AND 'MSCSLT' MODULES TO PRODUCE
! THE 'MSCSL.EXE' FILE.
!
! ENVIRONMENT: RUNS UNDER 'CSL' ON A TOPS-20 SYSTEM.
!
! AUTHOR: RICH MURATORI , CREATION DATE: 23-MAY-79
!
! MODIFIED BY:
!
! RICH MURATORI, 23-MAY-79; VERSION 0.1
!--
!
! EQUATED SYMBOLS:
!
GLOBAL LITERAL
DATA_VERSION = 1, !VERSION NUMBER FOR THIS MODULE
DATA_EDIT = 0; !EDIT NUMBER FOR THIS MODULE
!
! MACROS:
!
COMPILETIME
ALLOC_B = 35, ! PDP-11 STYLE BIT # IN WORD, READY TO OVERFLOW
ALLOC_W = -1, ! WORD #, SO WE WILL START WITH 0 AFTER OVERFLOW
ALLOC_N = 0, ! NUMBER OF THINGS ALLOCATED
ALLOC_N_1 = 0, ! (ALLOC_N - 1) TEMPORARY
ALLOC_W_1 = 0; ! (ALLOC_W + 1) TEMPORARY
MACRO
ALLOC(ALLOC_NAME,ALLOC_SLIT) = ! ALLOCATE FAULT ANALYSIS BITS
%ASSIGN(ALLOC_B,ALLOC_B + 1)
%IF ALLOC_B EQL 36
%THEN
%ASSIGN(ALLOC_B,0)
%ASSIGN(ALLOC_W,ALLOC_W + 1)
COMPILETIME
%NAME(W_,%NUMBER(ALLOC_W)) = 0;
%FI
MACRO
ALLOC_NAME = %QUOTE %ASSIGN (
%QUOTE %EXPAND %NAME(W_,%NUMBER(ALLOC_W)),
%QUOTE %EXPAND %NAME(W_,%NUMBER(ALLOC_W)) OR
(1 ^ %QUOTE %EXPAND %NUMBER(ALLOC_B)))
%QUOTE % ;
BIND
%NAME(N_,%NUMBER(ALLOC_N)) =
%IF %NULL(ALLOC_SLIT)
%THEN
%ASSIGN(ALLOC_N_1,ALLOC_N - 1)
%NAME(N_,%NUMBER(ALLOC_N_1))
%ELSE
UPLIT(%ASCIZ ALLOC_SLIT)
%FI ;
%ASSIGN(ALLOC_N,ALLOC_N + 1)
%,
DUMP(X,N)[] = ! X0, ... XN
%IF %COUNT GEQ N %THEN %EXITMACRO %FI
%IF %COUNT NEQ 0 %THEN , %FI
%NAME(X,%NUMBER(%COUNT))
DUMP(X,N)
%,
DUMP_ASSIGN(N)[] = ! %ASSIGN(X0,0) ... %ASSIGN(XN,0)
%IF %COUNT GEQ N %THEN %EXITMACRO %FI
%QUOTE %ASSIGN (%NAME(W_,%NUMBER(%COUNT)),0)
DUMP_ASSIGN(N)
%;
!SOME SPECIAL MACROS WHICH COMBINE SEVERAL NETWORK MACROS
MACRO
PI_REQ1 = PIREQ1 PIREQ%,
PI_REQ2 = PIREQ2 PIREQ%,
PI_REQ3 = PIREQ3 PIREQ%,
PI_REQ4 = PIREQ4 PIREQ%,
PI_REQ5 = PIREQ5 PIREQ%,
PI_REQ6 = PIREQ6 PIREQ%,
PI_REQ7 = PIREQ7 PIREQ%,
TCLKA = T_CLK_A TCLK_CSL R_CLK_E RCLK_CSL%,
TCLKB = T_CLK_B TCLK_CSL R_CLK_E RCLK_CSL%,
TCLKC = T_CLK_C TCLK_CSL%,
TCLKD = T_CLK_D TCLK_CSL%,
RCLKD = R_CLK_D R_CLK_E RCLK_CSL%,
RCLKH = R_CLK_H RCLK_CSL%,
TCLK_CSL = T_CLK_CSL PDLY3 MSTRCLK%,
RCLK_CSL = R_CLK_CSL PDLY5 MSTRCLK%,
MSTRCLK = MSTR_CLK MNT_ENBH%;
!NETWORKS ON CSL1
ALLOC( MSTR_CLK , 'CSL1: MASTER CLOCK FLOPS')
ALLOC( T_CLK , 'CSL1: "T CLK H"')
ALLOC( PDLY1 , 'CSL1: PROGRAMMED DELAY NETWORK #1')
ALLOC( PDLY2 , 'CSL1: PROGRAMMED DELAY NETWORK #2')
ALLOC( PDLY3 , 'CSL1: PROGRAMMED DELAY NETWORK #3')
ALLOC( PDLY4 , 'CSL1: PROGRAMMED DELAY NETWORK #4')
ALLOC( PDLY5 , 'CSL1: PROGRAMMED DELAY NETWORK #5')
ALLOC( T_CLK_CSL , 'CSL1: "T CLK CSL\#20\"')
ALLOC( R_CLK , 'CSL1: "R CLK H"')
ALLOC( R_CLK_CSL , 'CSL1: "R CLK CSL\#20\"')
ALLOC( BUS_ARB, 'CSL1: BUS ARBITRATOR')
!NETWORKS ON CSL2
ALLOC( ADR0L2_L, 'CSL2: ADR 0')
ALLOC( ADR0L2_H )
ALLOC( ADR1L_L, 'CSL2: ADR 1')
ALLOC(ADR1L_H )
!NETWORKS ON CSL3
ALLOC( REC_PE, 'CSL3: "REC PE" DETECTOR')
ALLOC( CACHE_EN, 'CSL3: CACHE ENABLE')
ALLOC( CRA_PE_LTCH , 'CSL3: PARITY ERROR LATCH')
ALLOC( CRM_PE_LTCH )
ALLOC( DP_PE_LTCH )
ALLOC( REC_PE_LTCH )
ALLOC( CPU_PE, 'CSL3: "CPU PE" NETWORK')
ALLOC( REC_BUS_PE , 'CSL3: "REC BUS PE" NETWORK')
ALLOC( DP_PAR_ERR , 'CSL3: "DP PAR ERR" NETWORK')
ALLOC( PE_LTCH , 'CSL3: "PE (1)" LATCH')
ALLOC( PE_DET , 'CSL3: PARITY DETECT CONTROL FLOPS')
ALLOC( RST_LTCH )
ALLOC( CRM_DET )
ALLOC( DP_PE_DET )
ALLOC( RAM_ER_DLY , 'CSL3: RAM ERROR LATCHS')
ALLOC( RAM_ER_LTCH )
ALLOC( NEXM_LTCH , 'CSL3: "NEXM" DETECT NETWORK')
ALLOC( MEM , 'CSL3: "MEM" LATCH')
ALLOC( MEMH )
ALLOC( RD_0 , 'CSL3: REG READ SIGNALS')
ALLOC( RD_100 )
ALLOC( RD_300 )
ALLOC( RD_302 )
ALLOC( WRT100 , 'CSL3: REG WRITE SIGNALS')
ALLOC( WRT102 )
ALLOC( WRT104 )
ALLOC( WRT106 )
ALLOC( WRT110 )
ALLOC( WRT112 )
ALLOC( WRT114 )
ALLOC( WRT116 )
ALLOC( WRT204 )
ALLOC( WRT205 )
ALLOC( WRT206 )
ALLOC( WRT210 )
ALLOC( WRT212 )
!NETWORKS ON CSL4
ALLOC( DFN_0, 'CSL4: REGISTER 205')
ALLOC( DFN_1 )
ALLOC( DFN_2 )
ALLOC( DFN_3 )
ALLOC( DFN_4 )
ALLOC( DFN_5 )
ALLOC( DFN_6 )
ALLOC( DFN_7 )
ALLOC( DFN_11 )
ALLOC( TRAP_EN )
ALLOC( CRM_RESET , 'CSL4: REGISTER 204' )
ALLOC( DP_RESET )
ALLOC( STK_RESET )
ALLOC( CRM_WRT )
ALLOC( CRM_ADR_LD )
ALLOC( SS_MODE )
ALLOC( REG204 )
ALLOC( XMIT_DATA , 'CSL4: REGISTER 210')
ALLOC( XMIT_ADR )
ALLOC( C_R_C_E ) !'CRA R CLK ENB (1)'
ALLOC( C_T_C_E ) !'CRA T CLK ENB (1)'
ALLOC( LTCH_DATA )
ALLOC( C_LTCHS )
ALLOC( REG210 )
ALLOC( BUS_REQ , 'CSL4: "BUS REQ" LATCH')
ALLOC( CONS_REQ )
ALLOC( REQ_CTL )
ALLOC( MSEC_EN , 'CSL4: "1 MSEC EN" LATCH')
ALLOC( TEN_INT_LTCH , 'CSL4: "10 INT" LATCH')
ALLOC( GRANT , 'CSL4: "GRANT" DRIVER')
ALLOC( HLT_LP , 'CSL4: "HALT LOOP (1)" LATCH')
ALLOC( EXEC_B , 'CSL4: "EXECUTE" LATCH')
ALLOC( EXEC_DRVR , 'CSL4: "EXECUTE" DRIVER')
ALLOC( RUN_1 , 'CSL4: "RUN" LATCH')
ALLOC( RUN_DRVR , 'CSL4: "RUN" DRIVER')
ALLOC( CONT_H , 'CSL4: "CONTINUE" LATCH')
ALLOC( CONT_DRVR , 'CSL4: "CONTINUE" DRIVER')
ALLOC( INT_10 , 'CSL4: "INT 10" CONTROL NETWORK')
ALLOC( CMD_LD , 'CSL4: "CPM CMD LD" SIGNAL')
ALLOC( DATA_ENB , 'CSL4: "DATA ENB" LATCH')
ALLOC( RTN_DATA, 'CSL4: "RETURN DATA" SIGNAL')
ALLOC( LTCH_DATA_ENB , 'CSL4: "LATCH DATA ENB (1)" SIGNAL')
ALLOC( DATA_ACK , 'CSL4: "DATA ACK" LATCH')
ALLOC( CRA_R_CLK , 'CSL4: "CRA R CLK\#20\" SIGNAL')
ALLOC( R_CLK_ENB , 'CSL4: "R CLK ENB" SIGNAL')
ALLOC( T_CLK_EN , 'CSL4: "CRA T CLK ENABLE" SIGNAL')
ALLOC( STAT_RD , 'CSL4: "STATUS RD (1)" SIGNAL')
ALLOC( GRANT_1 , 'CSL4: CONTROL LATCHES')
ALLOC( X_D1 )
ALLOC( C_LTCH1 )
ALLOC( T_ENB , 'CSL4: TRANSCEIVER TRANSMIT CONTROL SIGNALS')
ALLOC( T_ENB_A )
ALLOC( DATA_CYC )
ALLOC( XMIT_ENBS , 'CSL4: REGISTER 210 AND TRANSCEIVER TRANSMIT CONTROL SIGNALS')
!NETWORKS ON CSL5
ALLOC( RST1 , 'CSL5: "RESET (1)" SIGNAL')
ALLOC( PNL_RST , 'CSL5: "PANEL RESET" SIGNAL')
ALLOC( RESETL_L , 'CSL5: "RESET" SIGNAL DRIVERS')
ALLOC( RESETL_H )
ALLOC( RESETB_L )
ALLOC( RESETB_H)
ALLOC( RESETH )
ALLOC( CRAM_CLK , 'CSL5: "CRAM CLK" SIGNAL')
ALLOC( SING_CLK , 'CSL5: "SINGLE CLK" SIGNAL')
ALLOC( CLK_RUN , 'CSL5: "CLK RUN" SIGNAL')
ALLOC( PF_ST_1 , 'CSL5: "PAGE FAIL START (1)" SIGNAL')
ALLOC( PF_1 , 'CSL5: "PAGE FAIL (1)" SIGNAL')
ALLOC( CLK_ENBS , 'CSL5: CPU CLOCK ENABLES')
ALLOC( SHFT_LOGIC )
ALLOC( ENB , 'CSL5: "ENABLE (1)" SIGNAL')
ALLOC( ENABLE_PE )
ALLOC( PF , 'CSL5: "PAGE FAIL" SIGNAL')
ALLOC( WRT_DLY , 'CSL5: "WRT DLY" SIGNAL')
ALLOC( RD_DATA , 'CSL5: "RD DATA (1)" SIGNAL')
ALLOC( RD_DLY , 'CSL5: "RD DLY" SIGNAL')
ALLOC( READ_DLY , 'CSL5: "READ DLY" SIGNAL')
ALLOC( T_CNT_DN , 'CSL5: "T COUNT DONE (1)" SIGNAL')
ALLOC( T_COUNT_DONE )
ALLOC( ENB_RES , 'CSL5: "ENABLE + RESET" SIGNAL')
!NETWORKS ON CSL6
ALLOC( BUS20_23 , 'CSL6: BUS DATA 20-23 TRANSCEIVER')
ALLOC( BUS24_27 , 'CSL6: BUS DATA 24-27 TRANSCEIVER')
ALLOC( BUS28_31 , 'CSL6: BUS DATA 28-31 TRANSCEIVER')
ALLOC( BUS32_35 , 'CSL6: BUS DATA 32-35 TRANSCEIVER')
ALLOC( ADR0L6_L , 'CSL6: ADR 0' )
ALLOC( ADR0L6_H )
ALLOC( CSLBUF0 , 'CSL6: CSL BUS BUFFER')
ALLOC( CSLBUF1 )
ALLOC( CSLBUF2 )
ALLOC( CSLBUF3 )
ALLOC( CSLBUF4 )
ALLOC( CSLBUF5 )
ALLOC( MNT_ENBL, 'CSL6: "MAINT ENB" SIGNAL')
ALLOC( MNT_ENBH )
ALLOC( MNT_CLK , 'CSL6: "CLK 0" SIGNAL')
ALLOC( XMIT_PAR_RT , 'CSL6,7: TRANSCEIVER PARITY SIGNALS FOR BUS DATA 18-35')
ALLOC( RCV_PAR_RT )
!NETWORKS ON CSL7
ALLOC( BUS4_7 , 'CSL7: BUS DATA 4-7 TRANSCEIVER')
ALLOC( BUS8_11 , 'CSL7: BUS DATA 8-11 TRANSCEIVER')
ALLOC( BUS12_15 , 'CSL7: BUS DATA 12-15 TRANSCEIVER')
ALLOC( BUS16_19 , 'CSL7: BUS DATA 16-19 TRANSCEIVER')
!NETWORKS ON CSL8
ALLOC( BUS0_3 , 'CSL8: BUS DATA 0-3 TRANSCEIVER')
ALLOC( CMD_XCVR , 'CSL8: BUS CONTROL SIGNALS TRANSCEIVER')
ALLOC( RST_XCVR , 'CSL8: "R RESET" TRANSCEIVER')
ALLOC( R_PAR_RT , 'CSL8: "R PAR RIGHT" TRANSCEIVER')
ALLOC( R_PAR_LFT , 'CSL8: "R PAR LEFT" TRANSCEIVER')
ALLOC( XMIT_PAR_LFT , 'CSL7,8: TRANSCEIVER PARITY SIGNALS FOR BUS DATA 00-17')
ALLOC( RCV_PAR_LFT )
ALLOC( MEM_BUSY , 'CSL8: "MEM BUSY" SIGNAL')
!NETWORKS ON CSL9
ALLOC( R_CLK_A , 'CSL9: "R CLK A" SIGNAL')
ALLOC( R_CLK_B , 'CSL9: "R CLK B" SIGNAL')
ALLOC( R_CLK_H , 'CSL9: "R CLK H" SIGNAL')
ALLOC( R_CLK_L , 'CSL9: "R CLK L" SIGNAL')
ALLOC( R_CLK_D , 'CSL9: "R CLK D" SIGNAL')
ALLOC( R_CLK_E , 'CSL9: "R CLK E" SIGNAL')
!NETWORKS ON CSLA
ALLOC( T_CLK_A , 'CSLA: "T CLK A" SIGNAL')
ALLOC( T_CLK_B , 'CSLA: "T CLK B" SIGNAL')
ALLOC( T_CLK_C , 'CSLA: "T CLK C" SIGNAL')
ALLOC( T_CLK_D , 'CSLA: "T CLK D" SIGNAL')
ALLOC( NEXM , 'CSLA: READ MUX 1')
ALLOC( TEN_INT )
ALLOC( BUSREQ )
ALLOC( RAM_ERROR , 'CSLA: READ MUX 2')
ALLOC( RCLK_ENB0 )
ALLOC( CR_CLK_ENB )
ALLOC( DP_CLK_ENB )
ALLOC( EXEC , 'CSLA: READ MUX 3')
ALLOC( RUN )
ALLOC( CONT )
ALLOC( PE )
ALLOC( HALT_LOOP )
ALLOC( DATAACK )
ALLOC( R_RESET , 'CSLA: READ MUX 4')
ALLOC( PIREQ2 )
ALLOC( PIREQ1 )
ALLOC( RECEIVE_PE )
ALLOC( RPAR_LEFT , 'CSLA: READ MUX 5')
ALLOC( PIREQ4 )
ALLOC( CRM_PE )
ALLOC( RDATA_05 )
ALLOC( RDATA_13 )
ALLOC( RDATA_21 )
ALLOC( RDATA_29 )
ALLOC( RDATA_07 , 'CSLA: READ MUX 6')
ALLOC( RDATA_15 )
ALLOC( RDATA_23 )
ALLOC( RDATA_31 )
ALLOC( RDATA_04 )
ALLOC( RDATA_12 )
ALLOC( RDATA_20 )
ALLOC( RDATA_28 )
ALLOC( RDATA_00 , 'CSLA: READ MUX 7')
ALLOC( R_BADATA )
ALLOC( PIREQ5 )
ALLOC( MEM_PAR_ERR )
ALLOC( RDATA_08 )
ALLOC( RDATA_16 )
ALLOC( RDATA_24 )
ALLOC( RDATA_32 )
ALLOC( RDATA_01 , 'CSLA: READ MUX 8')
ALLOC( R_COMADR )
ALLOC( PIREQ6 )
ALLOC( DP_PE )
ALLOC( RDATA_11 )
ALLOC( RDATA_19 )
ALLOC( RDATA_27 )
ALLOC( RDATA_35 )
ALLOC( RPAR_RIGHT , 'CSLA: READ MUX 9')
ALLOC( MEMBUSY )
ALLOC( PIREQ3 )
ALLOC( RDATA_06 )
ALLOC( RDATA_14 )
ALLOC( RDATA_22 )
ALLOC( RDATA_30 )
ALLOC( RDATA_02 , 'CSLA: READ MUX 10')
ALLOC( R_IODATA )
ALLOC( PIREQ7 )
ALLOC( CRA_PE )
ALLOC( RDATA_10 )
ALLOC( RDATA_18 )
ALLOC( RDATA_26 )
ALLOC( RDATA_34 )
ALLOC( RDATA_09 , 'CSLA: READ MUX 11')
ALLOC( RDATA_17 )
ALLOC( RDATA_25 )
ALLOC( RDATA_33 )
ALLOC( RDATA_03 )
ALLOC( R_DATA )
ALLOC( MEM_REF_ERR )
ALLOC( PIREQ , 'CSLA: PI REQ DRIVERS')
MACRO
NTWK =
%ASSIGN(ALLOC_W_1,ALLOC_W + 1)
DUMP(W_,%NUMBER(ALLOC_W_1))
DUMP_ASSIGN(%NUMBER(ALLOC_W_1))
%;
! THIS PLIT MAKES A V E R Y LONG LISTING WITH EXPANSIONS
SWITCHES LIST(NOEXPAND);
GLOBAL BIND
NET_NAMES = PLIT
(
DUMP(N_,%NUMBER(ALLOC_N))
);
! DOCUMENT WHAT JUST HAPPENED
%PRINT(%NUMBER(ALLOC_N))
%PRINT(%NUMBER(ALLOC_W))
%PRINT(%NUMBER(ALLOC_B))
GLOBAL LITERAL
MAXNETS = ALLOC_N; !NUMBER OF NETWORKS
BIND T1_E1 = UPLIT(WRT100 RST_LTCH RESETH RST_XCVR RCLKD TCLKA R_RESET RD_100 ADR1L_H ADR0L2_L NTWK);
BIND T1_E2 = UPLIT(RST1 PNL_RST RST_LTCH RESETH RST_XCVR RCLKD TCLKA R_RESET RD_100 ADR1L_H ADR0L2_L NTWK);
BIND T1_NE1 = UPLIT(RESETH RST_XCVR TCLKA RCLKD R_RESET RD_100 ADR1L_H ADR0L2_L PNL_RST RST1 RST_LTCH WRT100 NTWK);
BIND T1_E3 = UPLIT(PE_LTCH PE NTWK);
BIND T1_ES = PLIT( T1_E1,
T1_E2,
T1_E3);
BIND T1_NES = PLIT( T1_NE1);
BIND T2_E1 = UPLIT(WRT210 RESETB_L BUSREQ GRANT GRANT_1 BUS_ARB BUS_REQ RD_300 ADR0L2_H NTWK);
BIND T2_E2 = UPLIT(BUSREQ WRT210 BUS_REQ RD_300 ADR0L2_H NTWK);
BIND T2_NE1 = UPLIT(RESETB_L BUSREQ BUS_REQ RD_300 ADR0L2_H WRT210 NTWK);
BIND T2_ES = PLIT( T2_E1,
T2_E2);
BIND T2_NES = PLIT( T2_NE1);
BIND T3_E1 = UPLIT(BUSREQ BUS_REQ REQ_CTL GRANT GRANT_1 BUS_ARB TCLKD TCLKC RCLKH RD_300 ADR0L2_H NTWK);
BIND T3_NE1 = UPLIT(TCLKD TCLKC RCLKH NTWK);
BIND T3_ES = PLIT( T3_E1);
BIND T3_NES = PLIT( T3_NE1);
BIND T4_E1 = UPLIT(NEXM NEXM_LTCH RCLKD GRANT_1 MEM RESETL_L WRT210 WRT114 MEM_BUSY RD_300 ADR0L2_H NTWK);
BIND T4_NE1 = UPLIT(RESETL_L NTWK);
BIND T4_E2 = UPLIT(WRT114 NEXM_LTCH NEXM RD_300 ADR0L2_H NTWK);
BIND T4_NE2 = UPLIT(NEXM RD_300 ADR0L2_H NTWK);
BIND T4_ES = PLIT( T4_E1,
T4_E2);
BIND T4_NES = PLIT( T4_NE1,
T4_NE2);
BIND T5_E1 = UPLIT(CONS_REQ NTWK);
BIND T5_ES = PLIT( T5_E1);
BIND T6_E1 = UPLIT(MEMH NTWK);
BIND T6_ES = PLIT( T6_E1);
BIND T7_E1 = UPLIT(TCLKD TCLKB C_LTCH1 RCLK_ENB0 C_LTCHS R_CLK_ENB RD_302 ADR0L6_H NTWK);
BIND T7_E2 = UPLIT(RCLK_ENB0 R_CLK_ENB LTCH_DATA_ENB C_LTCH1 C_LTCHS GRANT BUSREQ RD_302 ADR0L6_H NTWK);
BIND T7_NE1 = UPLIT(C_LTCH1 C_LTCHS TCLKD TCLKB RD_302 ADR0L6_H RCLK_ENB0 NTWK);
BIND T7_ES = PLIT( T7_E1,
T7_E2);
BIND T7_NES = PLIT( T7_NE1);
BIND T8_E1 = UPLIT(MNT_ENBL NTWK);
BIND T8_E2 = UPLIT(MNT_ENBL MNT_CLK NTWK);
BIND T8_NE1 = UPLIT(MNT_ENBL MNT_CLK NTWK);
BIND T8_ES = PLIT( T8_E1,
T8_E2);
BIND T8_NES = PLIT( T8_NE1);
BIND T9_E1 = UPLIT(REG210 RESETB_H NTWK);
BIND T9_ES = PLIT( T9_E1);
BIND T10_E1 = UPLIT(R_CLK_ENB T_CLK_B LTCH_DATA_ENB DATA_ENB RTN_DATA LTCH_DATA GRANT_1 NTWK);
BIND T10_ES = PLIT( T10_E1);
BIND T11_E1 = UPLIT(R_CLK_ENB T_CLK_B LTCH_DATA_ENB LTCH_DATA C_LTCHS C_LTCH1 NTWK);
BIND T11_ES = PLIT( T11_E1);
BIND T12_E1 = UPLIT(R_CLK_ENB T_CLK_B LTCH_DATA_ENB GRANT_1 C_LTCHS C_LTCH1 NTWK);
BIND T12_ES = PLIT( T12_E1);
BIND T13_E1 = UPLIT(R_CLK_ENB T_CLK_B LTCH_DATA_ENB C_LTCH1 C_LTCHS NTWK);
BIND T13_ES = PLIT( T13_E1);
BIND T14_E1 = UPLIT(R_CLK_ENB NTWK);
BIND T14_ES = PLIT( T14_E1);
BIND T15_E1 = UPLIT(CR_CLK_ENB CLK_ENBS NTWK);
BIND T15_E2 = UPLIT(DP_CLK_ENB CLK_ENBS PF_1 NTWK);
BIND T15_E3 = UPLIT(CLK_ENBS ENB SING_CLK CLK_RUN T_CLK WRT206 CSLBUF1 R_CLK NTWK);
BIND T15_NE1 = UPLIT(SING_CLK WRT206 CSLBUF1 T_CLK R_CLK NTWK);
BIND T15_ES = PLIT( T15_E1,
T15_E2,
T15_E3);
BIND T15_NES = PLIT( T15_NE1);
BIND T16_E1 = UPLIT(SING_CLK CLK_RUN ENB CLK_ENBS CR_CLK_ENB NTWK);
BIND T16_ES = PLIT( T16_E1);
BIND T17_E1 = UPLIT(R_DATA CMD_XCVR CSLBUF2 NTWK);
BIND T17_E2 = UPLIT(R_IODATA CMD_XCVR CSLBUF0 NTWK);
BIND T17_E3 = UPLIT(R_COMADR CMD_XCVR CSLBUF1 NTWK);
BIND T17_E4 = UPLIT(R_BADATA CMD_XCVR CSLBUF3 NTWK);
BIND T17_E5 = UPLIT(ADR0L6_L DATA_CYC STAT_RD X_D1 XMIT_DATA CMD_XCVR NTWK);
BIND T17_E6 = UPLIT(WRT114 RD_100 ADR0L6_L ADR1L_H CMD_XCVR T_ENB XMIT_ADR NTWK);
BIND T17_NE1 = UPLIT(RD_100 ADR0L6_L ADR1L_H NTWK);
BIND T17_ES = PLIT( T17_E1,
T17_E2,
T17_E3,
T17_E4,
T17_E5,
T17_E6);
BIND T17_NES = PLIT( T17_NE1);
BIND T18_E1 = UPLIT(R_DATA CMD_XCVR CSLBUF2 NTWK);
BIND T18_E2 = UPLIT(R_IODATA CMD_XCVR CSLBUF0 NTWK);
BIND T18_E3 = UPLIT(R_COMADR CMD_XCVR CSLBUF1 NTWK);
BIND T18_E4 = UPLIT(R_BADATA CMD_XCVR CSLBUF3 NTWK);
BIND T18_E5 = UPLIT(ADR0L6_H DATA_CYC CMD_XCVR NTWK);
BIND T18_E6 = UPLIT(WRT114 RD_100 ADR0L6_L ADR1L_H CMD_XCVR T_ENB XMIT_DATA NTWK);
BIND T18_NE1 = UPLIT(RD_100 ADR0L6_L ADR1L_H ADR0L6_H NTWK);
BIND T18_ES = PLIT( T18_E1,
T18_E2,
T18_E3,
T18_E4,
T18_E5,
T18_E6);
BIND T18_NES = PLIT( T18_NE1);
BIND T19_E1 = UPLIT(DATAACK RD_0 DATA_ACK DATA_ENB R_CLK_L RTN_DATA MEMH NTWK);
BIND T19_E2 = UPLIT(R_CLK_L DATA_ENB RTN_DATA NTWK);
BIND T19_E3 = UPLIT(DATA_ACK DATA_ENB RD_0 DATAACK NTWK);
BIND T19_NE1 = UPLIT(R_CLK_L MEMH DATA_ACK DATAACK RD_0 NTWK);
BIND T19_ES = PLIT( T19_E1,
T19_E2,
T19_E3);
BIND T19_NES = PLIT( T19_NE1);
BIND T20_E1 = UPLIT(DATAACK RD_0 DATA_ACK DATA_ENB R_CLK_L RTN_DATA NTWK);
BIND T20_E2 = UPLIT(R_CLK_L DATA_ENB RTN_DATA NTWK);
BIND T20_ES = PLIT( T20_E1,
T20_E2);
BIND T21_E1 = UPLIT(RTN_DATA DATA_ENB DATA_ACK DATAACK NTWK);
BIND T21_E2 = UPLIT(RTN_DATA DATA_ENB NTWK);
BIND T21_ES = PLIT( T21_E1,
T21_E2);
BIND T22_E1 = UPLIT(RTN_DATA DATA_ENB DATA_ACK DATAACK NTWK);
BIND T22_E2 = UPLIT(RTN_DATA DATA_ENB NTWK);
BIND T22_ES = PLIT( T22_E1,
T22_E2);
BIND T23_E1 = UPLIT(DATA_ENB DATA_ACK DATAACK NTWK);
BIND T23_ES = PLIT( T23_E1);
BIND T24_E1 = UPLIT(RDATA_03 BUS0_3 CSLBUF0 NTWK);
BIND T24_E2 = UPLIT(RDATA_02 BUS0_3 CSLBUF1 NTWK);
BIND T24_E3 = UPLIT(RDATA_01 BUS0_3 CSLBUF2 NTWK);
BIND T24_E4 = UPLIT(RDATA_00 BUS0_3 CSLBUF3 NTWK);
BIND T24_E5 = UPLIT(ADR0L6_L DATA_CYC STAT_RD X_D1 XMIT_DATA BUS0_3 NTWK);
BIND T24_E6 = UPLIT(WRT112 R_CLK_B RD_0 ADR0L6_H ADR1L_H BUS0_3 T_ENB XMIT_ADR NTWK);
BIND T24_NE1 = UPLIT(RD_0 ADR0L6_H ADR0L6_L WRT112 R_CLK_B NTWK);
BIND T24_ES = PLIT( T24_E1,
T24_E2,
T24_E3,
T24_E4,
T24_E5,
T24_E6);
BIND T24_NES = PLIT( T24_NE1);
BIND T25_E1 = UPLIT(RDATA_03 BUS0_3 CSLBUF0 NTWK);
BIND T25_E2 = UPLIT(RDATA_02 BUS0_3 CSLBUF1 NTWK);
BIND T25_E3 = UPLIT(RDATA_01 BUS0_3 CSLBUF2 NTWK);
BIND T25_E4 = UPLIT(RDATA_00 BUS0_3 CSLBUF3 NTWK);
BIND T25_E5 = UPLIT(ADR0L6_H DATA_CYC BUS0_3 NTWK);
BIND T25_E6 = UPLIT(WRT112 R_CLK_B RD_0 ADR0L6_H ADR1L_H BUS0_3 T_ENB XMIT_DATA X_D1 NTWK);
BIND T25_NE1 = UPLIT(RD_0 ADR0L6_H ADR0L6_L WRT112 R_CLK_B NTWK);
BIND T25_ES = PLIT( T25_E1,
T25_E2,
T25_E3,
T25_E4,
T25_E5,
T25_E6);
BIND T25_NES = PLIT( T25_NE1);
BIND T26_E1 = UPLIT(RDATA_11 NTWK);
BIND T26_E2 = UPLIT(RDATA_10 NTWK);
BIND T26_E3 = UPLIT(RDATA_09 NTWK);
BIND T26_E4 = UPLIT(RDATA_08 NTWK);
BIND T26_E5 = UPLIT(RDATA_07 NTWK);
BIND T26_E6 = UPLIT(RDATA_06 NTWK);
BIND T26_E7 = UPLIT(RDATA_05 NTWK);
BIND T26_E8 = UPLIT(RDATA_04 NTWK);
BIND T26_E9 = UPLIT(DATA_CYC STAT_RD X_D1 XMIT_DATA NTWK);
BIND T26_E10 = UPLIT(BUS4_7 NTWK);
BIND T26_E11 = UPLIT(ADR0L6_L BUS8_11 NTWK);
BIND T26_E12 = UPLIT(BUS4_7 NTWK);
BIND T26_E13 = UPLIT(BUS8_11 NTWK);
BIND T26_E14 = UPLIT(WRT110 RD_0 T_ENB XMIT_ADR R_CLK_B NTWK);
BIND T26_NE1 = UPLIT(R_CLK_B RD_0 WRT110 ADR0L6_L NTWK);
BIND T26_ES = PLIT( T26_E1,
T26_E2,
T26_E3,
T26_E4,
T26_E5,
T26_E6,
T26_E7,
T26_E8,
T26_E9,
T26_E10,
T26_E11,
T26_E12,
T26_E13,
T26_E14);
BIND T26_NES = PLIT( T26_NE1);
BIND T27_E1 = UPLIT(RDATA_11 NTWK);
BIND T27_E2 = UPLIT(RDATA_10 NTWK);
BIND T27_E3 = UPLIT(RDATA_09 NTWK);
BIND T27_E4 = UPLIT(RDATA_08 NTWK);
BIND T27_E5 = UPLIT(RDATA_07 NTWK);
BIND T27_E6 = UPLIT(RDATA_06 NTWK);
BIND T27_E7 = UPLIT(RDATA_05 NTWK);
BIND T27_E8 = UPLIT(RDATA_04 NTWK);
BIND T27_E9 = UPLIT(DATA_CYC NTWK);
BIND T27_E10 = UPLIT(BUS4_7 NTWK);
BIND T27_E11 = UPLIT(BUS8_11 NTWK);
BIND T27_E12 = UPLIT(BUS4_7 NTWK);
BIND T27_E13 = UPLIT(ADR0L6_L BUS8_11 NTWK);
BIND T27_E14 = UPLIT(WRT110 RD_0 T_ENB XMIT_DATA X_D1 R_CLK_B NTWK);
BIND T27_NE1 = UPLIT(ADR0L6_L RD_0 WRT110 R_CLK_B NTWK);
BIND T27_ES = PLIT( T27_E1,
T27_E2,
T27_E3,
T27_E4,
T27_E5,
T27_E6,
T27_E7,
T27_E8,
T27_E9,
T27_E10,
T27_E11,
T27_E12,
T27_E13,
T27_E14);
BIND T27_NES = PLIT( T27_NE1);
BIND T28_E1 = UPLIT(RDATA_19 NTWK);
BIND T28_E2 = UPLIT(RDATA_18 NTWK);
BIND T28_E3 = UPLIT(RDATA_17 NTWK);
BIND T28_E4 = UPLIT(RDATA_16 NTWK);
BIND T28_E5 = UPLIT(RDATA_15 NTWK);
BIND T28_E6 = UPLIT(RDATA_14 NTWK);
BIND T28_E7 = UPLIT(RDATA_13 NTWK);
BIND T28_E8 = UPLIT(RDATA_12 NTWK);
BIND T28_E9 = UPLIT(DATA_CYC STAT_RD X_D1 XMIT_DATA NTWK);
BIND T28_E10 = UPLIT(BUS12_15 NTWK);
BIND T28_E11 = UPLIT(ADR0L6_L BUS16_19 NTWK);
BIND T28_E12 = UPLIT(T_ENB R_CLK_B BUS12_15 NTWK);
BIND T28_E13 = UPLIT(T_ENB_A R_CLK_A BUS16_19 NTWK);
BIND T28_E14 = UPLIT(WRT106 RD_0 NTWK);
BIND T28_NE1 = UPLIT(ADR0L6_L RD_0 WRT106 R_CLK_B R_CLK_A NTWK);
BIND T28_ES = PLIT( T28_E1,
T28_E2,
T28_E3,
T28_E4,
T28_E5,
T28_E6,
T28_E7,
T28_E8,
T28_E9,
T28_E10,
T28_E11,
T28_E12,
T28_E13,
T28_E14);
BIND T28_NES = PLIT( T28_NE1);
BIND T29_E1 = UPLIT(RDATA_19 NTWK);
BIND T29_E2 = UPLIT(RDATA_18 NTWK);
BIND T29_E3 = UPLIT(RDATA_17 NTWK);
BIND T29_E4 = UPLIT(RDATA_16 NTWK);
BIND T29_E5 = UPLIT(RDATA_15 NTWK);
BIND T29_E6 = UPLIT(RDATA_14 NTWK);
BIND T29_E7 = UPLIT(RDATA_13 NTWK);
BIND T29_E8 = UPLIT(RDATA_12 NTWK);
BIND T29_E9 = UPLIT(DATA_CYC NTWK);
BIND T29_E10 = UPLIT(BUS12_15 NTWK);
BIND T29_E11 = UPLIT(BUS16_19 NTWK);
BIND T29_E12 = UPLIT(T_ENB R_CLK_B BUS12_15 NTWK);
BIND T29_E13 = UPLIT(ADR0L6_L T_ENB_A R_CLK_A BUS16_19 NTWK);
BIND T29_E14 = UPLIT(WRT106 RD_0 NTWK);
BIND T29_NE1 = UPLIT(ADR0L6_L RD_0 WRT106 R_CLK_B R_CLK_A NTWK);
BIND T29_ES = PLIT( T29_E1,
T29_E2,
T29_E3,
T29_E4,
T29_E5,
T29_E6,
T29_E7,
T29_E8,
T29_E9,
T29_E10,
T29_E11,
T29_E12,
T29_E13,
T29_E14);
BIND T29_NES = PLIT( T29_NE1);
BIND T30_E1 = UPLIT(RDATA_27 NTWK);
BIND T30_E2 = UPLIT(RDATA_26 NTWK);
BIND T30_E3 = UPLIT(RDATA_25 NTWK);
BIND T30_E4 = UPLIT(RDATA_24 NTWK);
BIND T30_E5 = UPLIT(RDATA_23 NTWK);
BIND T30_E6 = UPLIT(RDATA_22 NTWK);
BIND T30_E7 = UPLIT(RDATA_21 NTWK);
BIND T30_E8 = UPLIT(RDATA_20 NTWK);
BIND T30_E9 = UPLIT(DATA_CYC STAT_RD X_D1 XMIT_DATA NTWK);
BIND T30_E10 = UPLIT(BUS20_23 NTWK);
BIND T30_E11 = UPLIT(ADR0L6_L BUS24_27 NTWK);
BIND T30_E12 = UPLIT(BUS20_23 NTWK);
BIND T30_E13 = UPLIT(BUS24_27 NTWK);
BIND T30_E14 = UPLIT(R_CLK_A T_ENB_A WRT104 RD_0 NTWK);
BIND T30_NE1 = UPLIT(ADR0L6_L RD_0 WRT104 R_CLK_A NTWK);
BIND T30_ES = PLIT( T30_E1,
T30_E2,
T30_E3,
T30_E4,
T30_E5,
T30_E6,
T30_E7,
T30_E8,
T30_E9,
T30_E10,
T30_E11,
T30_E12,
T30_E13,
T30_E14);
BIND T30_NES = PLIT( T30_NE1);
BIND T31_E1 = UPLIT(RDATA_27 NTWK);
BIND T31_E2 = UPLIT(RDATA_26 NTWK);
BIND T31_E3 = UPLIT(RDATA_25 NTWK);
BIND T31_E4 = UPLIT(RDATA_24 NTWK);
BIND T31_E5 = UPLIT(RDATA_23 NTWK);
BIND T31_E6 = UPLIT(RDATA_22 NTWK);
BIND T31_E7 = UPLIT(RDATA_21 NTWK);
BIND T31_E8 = UPLIT(RDATA_20 NTWK);
BIND T31_E9 = UPLIT(DATA_CYC NTWK);
BIND T31_E10 = UPLIT(BUS20_23 NTWK);
BIND T31_E11 = UPLIT(BUS24_27 NTWK);
BIND T31_E12 = UPLIT(BUS20_23 NTWK);
BIND T31_E13 = UPLIT(ADR0L6_L BUS24_27 NTWK);
BIND T31_E14 = UPLIT(R_CLK_A T_ENB_A WRT104 RD_0 NTWK);
BIND T31_NE1 = UPLIT(ADR0L6_L RD_0 WRT104 R_CLK_A NTWK);
BIND T31_ES = PLIT( T31_E1,
T31_E2,
T31_E3,
T31_E4,
T31_E5,
T31_E6,
T31_E7,
T31_E8,
T31_E9,
T31_E10,
T31_E11,
T31_E12,
T31_E13,
T31_E14);
BIND T31_NES = PLIT( T31_NE1);
BIND T32_E1 = UPLIT(RDATA_35 NTWK);
BIND T32_E2 = UPLIT(RDATA_34 NTWK);
BIND T32_E3 = UPLIT(RDATA_33 NTWK);
BIND T32_E4 = UPLIT(RDATA_32 NTWK);
BIND T32_E5 = UPLIT(RDATA_31 NTWK);
BIND T32_E6 = UPLIT(RDATA_30 NTWK);
BIND T32_E7 = UPLIT(RDATA_29 NTWK);
BIND T32_E8 = UPLIT(RDATA_28 NTWK);
BIND T32_E9 = UPLIT(DATA_CYC STAT_RD X_D1 XMIT_DATA NTWK);
BIND T32_E10 = UPLIT(BUS28_31 NTWK);
BIND T32_E11 = UPLIT(ADR0L6_L BUS32_35 NTWK);
BIND T32_E12 = UPLIT(BUS28_31 NTWK);
BIND T32_E13 = UPLIT(BUS32_35 NTWK);
BIND T32_E14 = UPLIT(R_CLK_A T_ENB_A WRT102 RD_0 NTWK);
BIND T32_NE1 = UPLIT(RD_0 WRT102 ADR0L6_L R_CLK_A NTWK);
BIND T32_ES = PLIT( T32_E1,
T32_E2,
T32_E3,
T32_E4,
T32_E5,
T32_E6,
T32_E7,
T32_E8,
T32_E9,
T32_E10,
T32_E11,
T32_E12,
T32_E13,
T32_E14);
BIND T32_NES = PLIT( T32_NE1);
BIND T33_E1 = UPLIT(RDATA_35 NTWK);
BIND T33_E2 = UPLIT(RDATA_34 NTWK);
BIND T33_E3 = UPLIT(RDATA_33 NTWK);
BIND T33_E4 = UPLIT(RDATA_32 NTWK);
BIND T33_E5 = UPLIT(RDATA_31 NTWK);
BIND T33_E6 = UPLIT(RDATA_30 NTWK);
BIND T33_E7 = UPLIT(RDATA_29 NTWK);
BIND T33_E8 = UPLIT(RDATA_28 NTWK);
BIND T33_E9 = UPLIT(DATA_CYC NTWK);
BIND T33_E10 = UPLIT(BUS28_31 NTWK);
BIND T33_E11 = UPLIT(BUS32_35 NTWK);
BIND T33_E12 = UPLIT(BUS28_31 NTWK);
BIND T33_E13 = UPLIT(ADR0L6_L BUS32_35 NTWK);
BIND T33_E14 = UPLIT(R_CLK_A T_ENB_A WRT102 RD_0 NTWK);
BIND T33_NE1 = UPLIT(RD_0 WRT102 ADR0L6_L R_CLK_A NTWK);
BIND T33_ES = PLIT( T33_E1,
T33_E2,
T33_E3,
T33_E4,
T33_E5,
T33_E6,
T33_E7,
T33_E8,
T33_E9,
T33_E10,
T33_E11,
T33_E12,
T33_E13,
T33_E14);
BIND T33_NES = PLIT( T33_NE1);
BIND T34_E1 = UPLIT(XMIT_ENBS NTWK);
BIND T34_E2 = UPLIT(XMIT_ENBS NTWK);
BIND T34_E3 = UPLIT(XMIT_ENBS NTWK);
BIND T34_E4 = UPLIT(XMIT_ENBS NTWK);
BIND T34_ES = PLIT( T34_E1,
T34_E2,
T34_E3,
T34_E4);
BIND T35_E1 = UPLIT(XMIT_ENBS NTWK);
BIND T35_E2 = UPLIT(XMIT_ENBS NTWK);
BIND T35_E3 = UPLIT(XMIT_ENBS NTWK);
BIND T35_E4 = UPLIT(XMIT_ENBS NTWK);
BIND T35_ES = PLIT( T35_E1,
T35_E2,
T35_E3,
T35_E4);
BIND T36_E1 = UPLIT(XMIT_ENBS NTWK);
BIND T36_E2 = UPLIT(XMIT_ENBS NTWK);
BIND T36_E3 = UPLIT(XMIT_ENBS NTWK);
BIND T36_E4 = UPLIT(XMIT_ENBS NTWK);
BIND T36_ES = PLIT( T36_E1,
T36_E2,
T36_E3,
T36_E4);
BIND T37_E1 = UPLIT(XMIT_ENBS NTWK);
BIND T37_E2 = UPLIT(XMIT_ENBS NTWK);
BIND T37_E3 = UPLIT(XMIT_ENBS NTWK);
BIND T37_E4 = UPLIT(XMIT_ENBS NTWK);
BIND T37_ES = PLIT( T37_E1,
T37_E2,
T37_E3,
T37_E4);
BIND T38_E1 = UPLIT(STAT_RD NTWK);
BIND T38_ES = PLIT( T38_E1);
BIND T39_E1 = UPLIT(STAT_RD NTWK);
BIND T39_ES = PLIT( T39_E1);
BIND T40_E1 = UPLIT(STAT_RD NTWK);
BIND T40_ES = PLIT( T40_E1);
BIND T41_E1 = UPLIT(STAT_RD NTWK);
BIND T41_ES = PLIT( T41_E1);
BIND T42_E1 = UPLIT(STAT_RD NTWK);
BIND T42_ES = PLIT( T42_E1);
BIND T43_E1 = UPLIT(STAT_RD NTWK);
BIND T43_ES = PLIT( T43_E1);
BIND T44_E1 = UPLIT(STAT_RD NTWK);
BIND T44_ES = PLIT( T44_E1);
BIND T45_E1 = UPLIT(STAT_RD NTWK);
BIND T45_ES = PLIT( T45_E1);
BIND T46_E1 = UPLIT(STAT_RD NTWK);
BIND T46_ES = PLIT( T46_E1);
BIND T47_E1 = UPLIT(CRA_R_CLK T_CLK_EN C_R_C_E C_T_C_E DFN_11 NTWK);
BIND T47_ES = PLIT( T47_E1);
BIND T48_E1 = UPLIT(C_R_C_E CRA_R_CLK NTWK);
BIND T48_ES = PLIT( T48_E1);
BIND T49_E1 = UPLIT(C_T_C_E T_CLK_EN NTWK);
BIND T49_ES = PLIT( T49_E1);
BIND T50_E1 = UPLIT(DFN_0 CRM_WRT WRT204 CSLBUF5 NTWK);
BIND T50_NE1 = UPLIT(DFN_0 CRM_WRT WRT204 NTWK);
BIND T50_ES = PLIT( T50_E1);
BIND T50_NES = PLIT( T50_NE1);
BIND T51_E1 = UPLIT(DFN_1 DFN_4 NTWK);
BIND T51_ES = PLIT( T51_E1);
BIND T52_E1 = UPLIT(DFN_2 DFN_5 NTWK);
BIND T52_ES = PLIT( T52_E1);
BIND T53_E1 = UPLIT(CRM_RESET WRT204 NTWK);
BIND T53_ES = PLIT( T53_E1);
BIND T54_E1 = UPLIT(CRM_WRT NTWK);
BIND T54_ES = PLIT( T54_E1);
BIND T55_E1 = UPLIT(CRM_ADR_LD DFN_1 NTWK);
BIND T55_NE1 = UPLIT(CRM_ADR_LD DFN_1 NTWK);
BIND T55_ES = PLIT( T55_E1);
BIND T55_NES = PLIT( T55_NE1);
BIND T56_E1 = UPLIT(REG204 NTWK);
BIND T56_ES = PLIT( T56_E1);
BIND T57_E1 = UPLIT(HLT_LP CMD_LD CRAM_CLK HALT_LOOP NTWK);
BIND T57_E2 = UPLIT(HLT_LP HALT_LOOP NTWK);
BIND T57_NE1 = UPLIT(HALT_LOOP NTWK);
BIND T57_ES = PLIT( T57_E1,
T57_E2);
BIND T57_NES = PLIT( T57_NE1);
BIND T58_E1 = UPLIT(HLT_LP CMD_LD NTWK);
BIND T58_ES = PLIT( T58_E1);
BIND T59_E1 = UPLIT(HLT_LP NTWK);
BIND T59_ES = PLIT( T59_E1);
BIND T60_E1 = UPLIT(HLT_LP CMD_LD CRAM_CLK NTWK);
BIND T60_ES = PLIT( T60_E1);
BIND T61_E1 = UPLIT(HLT_LP NTWK);
BIND T61_ES = PLIT( T61_E1);
BIND T62_E1 = UPLIT(HLT_LP CMD_LD NTWK);
BIND T62_ES = PLIT( T62_E1);
BIND T63_E1 = UPLIT(WRT212 RUN_1 RUN NTWK);
BIND T63_E2 = UPLIT(WRT212 EXEC_B EXEC NTWK);
BIND T63_E3 = UPLIT(WRT212 CONT_H CONT NTWK);
BIND T63_E4 = UPLIT(RUN_1 RUN NTWK);
BIND T63_E5 = UPLIT(EXEC_B EXEC NTWK);
BIND T63_E6 = UPLIT(CONT_H CONT NTWK);
BIND T63_NE1 = UPLIT(WRT212 RUN NTWK);
BIND T63_NE2 = UPLIT(WRT212 EXEC NTWK);
BIND T63_NE3 = UPLIT(WRT212 CONT NTWK);
BIND T63_ES = PLIT( T63_E1,
T63_E2,
T63_E3,
T63_E4,
T63_E5,
T63_E6);
BIND T63_NES = PLIT( T63_NE1,
T63_NE2,
T63_NE3);
BIND T64_E1 = UPLIT(RUN_1 NTWK);
BIND T64_E2 = UPLIT(EXEC_B NTWK);
BIND T64_E3 = UPLIT(CONT_H NTWK);
BIND T64_ES = PLIT( T64_E1,
T64_E2,
T64_E3);
BIND T65_E1 = UPLIT(RUN_1 NTWK);
BIND T65_E2 = UPLIT(EXEC_B NTWK);
BIND T65_E3 = UPLIT(CONT_H NTWK);
BIND T65_ES = PLIT( T65_E1,
T65_E2,
T65_E3);
BIND T66_E1 = UPLIT(RUN_1 NTWK);
BIND T66_E2 = UPLIT(EXEC_B NTWK);
BIND T66_E3 = UPLIT(CONT_H NTWK);
BIND T66_ES = PLIT( T66_E1,
T66_E2,
T66_E3);
BIND T67_E1 = UPLIT(RUN_1 NTWK);
BIND T67_E2 = UPLIT(EXEC_B NTWK);
BIND T67_E3 = UPLIT(CONT_H NTWK);
BIND T67_ES = PLIT( T67_E1,
T67_E2,
T67_E3);
BIND T68_E1 = UPLIT(R_PAR_RT RPAR_RIGHT XMIT_PAR_RT NTWK);
BIND T68_E2 = UPLIT(RPAR_LEFT R_PAR_LFT XMIT_PAR_LFT NTWK);
BIND T68_E3 = UPLIT(R_PAR_RT RPAR_RIGHT XMIT_PAR_RT NTWK);
BIND T68_E4 = UPLIT(R_PAR_LFT XMIT_PAR_LFT RPAR_LEFT NTWK);
BIND T68_E5 = UPLIT(R_PAR_RT RPAR_RIGHT XMIT_PAR_RT NTWK);
BIND T68_E6 = UPLIT(R_PAR_LFT XMIT_PAR_LFT RPAR_LEFT NTWK);
BIND T68_E7 = UPLIT(R_PAR_RT RPAR_RIGHT XMIT_PAR_RT NTWK);
BIND T68_E8 = UPLIT(RPAR_LEFT R_PAR_LFT XMIT_PAR_LFT NTWK);
BIND T68_E9 = UPLIT(R_PAR_RT RPAR_RIGHT XMIT_PAR_RT NTWK);
BIND T68_E10 = UPLIT(R_PAR_LFT RPAR_LEFT XMIT_PAR_LFT NTWK);
BIND T68_E11 = UPLIT(R_PAR_RT RPAR_RIGHT XMIT_PAR_RT NTWK);
BIND T68_E12 = UPLIT(R_PAR_LFT RPAR_LEFT XMIT_PAR_LFT NTWK);
BIND T68_E13 = UPLIT(R_PAR_RT RPAR_RIGHT XMIT_PAR_RT NTWK);
BIND T68_E14 = UPLIT(R_PAR_LFT RPAR_LEFT XMIT_PAR_LFT NTWK);
BIND T68_E15 = UPLIT(R_PAR_RT RPAR_RIGHT XMIT_PAR_RT NTWK);
BIND T68_E16 = UPLIT(R_PAR_LFT RPAR_LEFT XMIT_PAR_LFT NTWK);
BIND T68_ES = PLIT( T68_E1,
T68_E2,
T68_E3,
T68_E4,
T68_E5,
T68_E6,
T68_E7,
T68_E8,
T68_E9,
T68_E10,
T68_E11,
T68_E12,
T68_E13,
T68_E14,
T68_E15,
T68_E16);
BIND T69_E1 = UPLIT(R_CLK CLK_ENBS ENB T_CNT_DN READ_DLY RD_DLY WRT_DLY CLK_RUN NTWK);
BIND T69_E2 = UPLIT(R_CLK PF_1 CLK_ENBS ENB T_CNT_DN READ_DLY RD_DLY WRT_DLY CLK_RUN NTWK);
BIND T69_E3 = UPLIT(R_CLK CLK_ENBS ENB SING_CLK NTWK);
BIND T69_E4 = UPLIT(R_CLK CLK_ENBS ENB T_CNT_DN READ_DLY RD_DLY WRT_DLY CLK_RUN NTWK);
BIND T69_ES = PLIT( T69_E1,
T69_E2,
T69_E3,
T69_E4);
BIND T70_E1 = UPLIT(CLK_ENBS ENB SING_CLK CLK_RUN NTWK);
BIND T70_ES = PLIT( T70_E1);
BIND T71_E1 = UPLIT(CLK_ENBS ENB CLK_RUN SING_CLK NTWK);
BIND T71_ES = PLIT( T71_E1);
BIND T72_E1 = UPLIT(T_COUNT_DONE NTWK);
BIND T72_E2 = UPLIT(T_COUNT_DONE NTWK);
BIND T72_E3 = UPLIT(T_COUNT_DONE NTWK);
BIND T72_E4 = UPLIT(T_COUNT_DONE NTWK);
BIND T72_ES = PLIT( T72_E1,
T72_E2,
T72_E3,
T72_E4);
BIND T73_E1 = UPLIT(T_COUNT_DONE NTWK);
BIND T73_E2 = UPLIT(T_COUNT_DONE NTWK);
BIND T73_ES = PLIT( T73_E1,
T73_E2);
BIND T74_E1 = UPLIT(T_COUNT_DONE NTWK);
BIND T74_E2 = UPLIT(T_COUNT_DONE NTWK);
BIND T74_E3 = UPLIT(T_COUNT_DONE NTWK);
BIND T74_ES = PLIT( T74_E1,
T74_E2,
T74_E3);
BIND T75_E1 = UPLIT(PE PE_LTCH CPU_PE REC_BUS_PE NTWK);
BIND T75_ES = PLIT( T75_E1);
BIND T76_E1 = UPLIT(PE PE_LTCH CPU_PE REC_BUS_PE DP_PAR_ERR RAM_ER_DLY NTWK);
BIND T76_ES = PLIT( T76_E1);
BIND T77_E1 = UPLIT(PE PE_LTCH CPU_PE REC_BUS_PE NTWK);
BIND T77_ES = PLIT( T77_E1);
BIND T78_E1 = UPLIT(CRM_DET PE PE_LTCH CPU_PE REC_BUS_PE NTWK);
BIND T78_ES = PLIT( T78_E1);
BIND T79_E1 = UPLIT(CRA_PE CRA_PE_LTCH PE_LTCH NTWK);
BIND T79_E2 = UPLIT(PE PE_LTCH CPU_PE CRM_DET PE_DET NTWK);
BIND T79_E3 = UPLIT(PE_LTCH CPU_PE CRM_DET PE REC_BUS_PE NTWK);
BIND T79_NE1 = UPLIT(PE NTWK);
BIND T79_ES = PLIT( T79_E1,
T79_E2,
T79_E3);
BIND T79_NES = PLIT( T79_NE1);
BIND T80_E1 = UPLIT(CRM_PE_LTCH CRM_PE PE_LTCH NTWK);
BIND T80_E2 = UPLIT(PE_LTCH CPU_PE CRM_DET PE_DET NTWK);
BIND T80_E3 = UPLIT(PE_LTCH CPU_PE CRM_DET REC_BUS_PE NTWK);
BIND T80_ES = PLIT( T80_E1,
T80_E2,
T80_E3);
BIND T81_E1 = UPLIT(PE_LTCH PE_DET NTWK);
BIND T81_ES = PLIT( T81_E1);
BIND T82_E1 = UPLIT(PE_LTCH CPU_PE CRM_DET PE_DET NTWK);
BIND T82_E2 = UPLIT(PE_LTCH CRA_PE_LTCH CRA_PE PE_DET NTWK);
BIND T82_ES = PLIT( T82_E1,
T82_E2);
BIND T83_E1 = UPLIT(ENABLE_PE NTWK);
BIND T83_ES = PLIT( T83_E1);
BIND T84_E1 = UPLIT(REC_PE NTWK);
BIND T84_E2 = UPLIT(REC_PE NTWK);
BIND T84_E3 = UPLIT(REC_PE NTWK);
BIND T84_E4 = UPLIT(REC_PE NTWK);
BIND T84_E5 = UPLIT(REC_PE NTWK);
BIND T84_E6 = UPLIT(REC_PE NTWK);
BIND T84_E7 = UPLIT(REC_PE NTWK);
BIND T84_E8 = UPLIT(REC_PE NTWK);
BIND T84_ES = PLIT( T84_E1,
T84_E2,
T84_E3,
T84_E4,
T84_E5,
T84_E6,
T84_E7,
T84_E8);
BIND T85_E1 = UPLIT(REC_PE REC_PE_LTCH RECEIVE_PE NTWK);
BIND T85_E2 = UPLIT(DP_PE_LTCH DP_PAR_ERR DP_PE NTWK);
BIND T85_E3 = UPLIT(RAM_ER_DLY RAM_ER_LTCH RAM_ERROR NTWK);
BIND T85_ES = PLIT( T85_E1,
T85_E2,
T85_E3);
BIND T86_E1 = UPLIT(MEM_PAR_ERR NTWK);
BIND T86_E2 = UPLIT(PE_LTCH NTWK);
BIND T86_ES = PLIT( T86_E1,
T86_E2);
BIND T87_E1 = UPLIT(TEN_INT_LTCH TEN_INT NTWK);
BIND T87_E2 = UPLIT(TEN_INT_LTCH TEN_INT NTWK);
BIND T87_NE1 = UPLIT(TEN_INT NTWK);
BIND T87_ES = PLIT( T87_E1,
T87_E2);
BIND T87_NES = PLIT( T87_NE1);
BIND T88_E1 = UPLIT(TEN_INT_LTCH NTWK);
BIND T88_E2 = UPLIT(TEN_INT_LTCH DP_RESET NTWK);
BIND T88_ES = PLIT( T88_E1,
T88_E2);
BIND T89_E1 = UPLIT(SHFT_LOGIC NTWK);
BIND T89_E2 = UPLIT(SHFT_LOGIC NTWK);
BIND T89_ES = PLIT( T89_E1,
T89_E2);
BIND T90_E1 = UPLIT(SHFT_LOGIC NTWK);
BIND T90_E2 = UPLIT(SHFT_LOGIC NTWK);
BIND T90_ES = PLIT( T90_E1,
T90_E2);
BIND T91_E1 = UPLIT(SHFT_LOGIC NTWK);
BIND T91_E2 = UPLIT(SHFT_LOGIC NTWK);
BIND T91_ES = PLIT( T91_E1,
T91_E2);
BIND T92_E1 = UPLIT(MEM_BUSY NTWK);
BIND T92_ES = PLIT( T92_E1);
BIND T93_E1 = UPLIT(PI_REQ1 INT_10 WRT116 NTWK);
BIND T93_E2 = UPLIT(PI_REQ2 INT_10 WRT116 NTWK);
BIND T93_E3 = UPLIT(PI_REQ3 INT_10 WRT116 NTWK);
BIND T93_E4 = UPLIT(PI_REQ4 INT_10 WRT116 NTWK);
BIND T93_E5 = UPLIT(PI_REQ5 INT_10 WRT116 NTWK);
BIND T93_E6 = UPLIT(PI_REQ6 INT_10 WRT116 NTWK);
BIND T93_E7 = UPLIT(PI_REQ7 INT_10 WRT116 NTWK);
BIND T93_E8 = UPLIT(PI_REQ1 INT_10 WRT116 NTWK);
BIND T93_E9 = UPLIT(PI_REQ2 INT_10 WRT116 NTWK);
BIND T93_E10 = UPLIT(PI_REQ3 INT_10 WRT116 NTWK);
BIND T93_E11 = UPLIT(PI_REQ4 INT_10 WRT116 NTWK);
BIND T93_E12 = UPLIT(PI_REQ5 INT_10 WRT116 NTWK);
BIND T93_E13 = UPLIT(PI_REQ6 INT_10 WRT116 NTWK);
BIND T93_E14 = UPLIT(PI_REQ7 INT_10 WRT116 NTWK);
BIND T93_ES = PLIT( T93_E1,
T93_E2,
T93_E3,
T93_E4,
T93_E5,
T93_E6,
T93_E7,
T93_E8,
T93_E9,
T93_E10,
T93_E11,
T93_E12,
T93_E13,
T93_E14);
BIND T94_E1 = UPLIT(INT_10 PI_REQ1 NTWK);
BIND T94_ES = PLIT( T94_E1);
BIND T95_E1 = UPLIT(PI_REQ1 INT_10 NTWK);
BIND T95_ES = PLIT( T95_E1);
BIND T96_E1 = UPLIT(PF_1 PF_ST_1 ENB NTWK);
BIND T96_E2 = UPLIT(PF_1 PF_ST_1 ENB NTWK);
BIND T96_E3 = UPLIT(PF_1 PF_ST_1 ENB NTWK);
BIND T96_ES = PLIT( T96_E1,
T96_E2,
T96_E3);
BIND T97_E1 = UPLIT(TRAP_EN NTWK);
BIND T97_E2 = UPLIT(TRAP_EN NTWK);
BIND T97_ES = PLIT( T97_E1,
T97_E2);
BIND T98_E1 = UPLIT(EXEC_DRVR NTWK);
BIND T98_E3 = UPLIT(EXEC_DRVR NTWK);
BIND T98_ES = PLIT( T98_E1,
T98_E3);
BIND T99_E1 = UPLIT(CONT_DRVR NTWK);
BIND T99_E2 = UPLIT(CONT_DRVR NTWK);
BIND T99_ES = PLIT( T99_E1,
T99_E2);
BIND T100_E1 = UPLIT(MSEC_EN NTWK);
BIND T100_E2 = UPLIT(MSEC_EN NTWK);
BIND T100_ES = PLIT( T100_E1,
T100_E2);
BIND T101_E1 = UPLIT(STK_RESET NTWK);
BIND T101_ES = PLIT( T101_E1);
BIND T102_E1 = UPLIT(CLK_ENBS ENB RD_DATA READ_DLY RD_DLY NTWK);
BIND T102_E2 = UPLIT(CLK_ENBS ENB RD_DATA READ_DLY RD_DLY NTWK);
BIND T102_ES = PLIT( T102_E1,
T102_E2);
GLOBAL BIND ES_TBL = UPLIT( T1_ES,
T2_ES,
T3_ES,
T4_ES,
T5_ES,
T6_ES,
T7_ES,
T8_ES,
T9_ES,
T10_ES,
T11_ES,
T12_ES,
T13_ES,
T14_ES,
T15_ES,
T16_ES,
T17_ES,
T18_ES,
T19_ES,
T20_ES,
T21_ES,
T22_ES,
T23_ES,
T24_ES,
T25_ES,
T26_ES,
T27_ES,
T28_ES,
T29_ES,
T30_ES,
T31_ES,
T32_ES,
T33_ES,
T34_ES,
T35_ES,
T36_ES,
T37_ES,
T38_ES,
T39_ES,
T40_ES,
T41_ES,
T42_ES,
T43_ES,
T44_ES,
T45_ES,
T46_ES,
T47_ES,
T48_ES,
T49_ES,
T50_ES,
T51_ES,
T52_ES,
T53_ES,
T54_ES,
T55_ES,
T56_ES,
T57_ES,
T58_ES,
T59_ES,
T60_ES,
T61_ES,
T62_ES,
T63_ES,
T64_ES,
T65_ES,
T66_ES,
T67_ES,
T68_ES,
T69_ES,
T70_ES,
T71_ES,
T72_ES,
T73_ES,
T74_ES,
T75_ES,
T76_ES,
T77_ES,
T78_ES,
T79_ES,
T80_ES,
T81_ES,
T82_ES,
T83_ES,
T84_ES,
T85_ES,
T86_ES,
T87_ES,
T88_ES,
T89_ES,
T90_ES,
T91_ES,
T92_ES,
T93_ES,
T94_ES,
T95_ES,
T96_ES,
T97_ES,
T98_ES,
T99_ES,
T100_ES,
T101_ES,
T102_ES);
GLOBAL BIND NES_TBL = UPLIT( T1_NES,
T2_NES,
T3_NES,
T4_NES,
0,
0,
T7_NES,
T8_NES,
0,
0,
0,
0,
0,
0,
T15_NES,
0,
T17_NES,
T18_NES,
T19_NES,
0,
0,
0,
0,
T24_NES,
T25_NES,
T26_NES,
T27_NES,
T28_NES,
T29_NES,
T30_NES,
T31_NES,
T32_NES,
T33_NES,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
T50_NES,
0,
0,
0,
0,
T55_NES,
0,
T57_NES,
0,
0,
0,
0,
0,
T63_NES,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
T79_NES,
0,
0,
0,
0,
0,
0,
0,
T87_NES,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0);
EXTERNAL ROUTINE
TST1,
TST2,
TST3,
TST4,
TST5,
TST6,
TST7,
TST8,
TST9,
TST10,
TST11,
TST12,
TST13,
TST14,
TST15,
TST16,
TST17,
TST18,
TST19,
TST20,
TST21,
TST22,
TST23,
TST24,
TST25,
TST26,
TST27,
TST28,
TST29,
TST30,
TST31,
TST32,
TST33,
TST34,
TST35,
TST36,
TST37,
TST38,
TST39,
TST40,
TST41,
TST42,
TST43,
TST44,
TST45,
TST46,
TST47,
TST48,
TST49,
TST50,
TST51,
TST52,
TST53,
TST54,
TST55,
TST56,
TST57,
TST58,
TST59,
TST60,
TST61,
TST62,
TST63,
TST64,
TST65,
TST66,
TST67,
TST68,
TST69,
TST70,
TST71,
TST72,
TST73,
TST74,
TST75,
TST76,
TST77,
TST78,
TST79,
TST80,
TST81,
TST82,
TST83,
TST84,
TST85,
TST86,
TST87,
TST88,
TST89,
TST90,
TST91,
TST92,
TST93,
TST94,
TST95,
TST96,
TST97,
TST98,
TST99,
TST100,
TST101,
TST102;
GLOBAL BIND TEST_DISP = PLIT( TST1,
TST2,
TST3,
TST4,
TST5,
TST6,
TST7,
TST8,
TST9,
TST10,
TST11,
TST12,
TST13,
TST14,
TST15,
TST16,
TST17,
TST18,
TST19,
TST20,
TST21,
TST22,
TST23,
TST24,
TST25,
TST26,
TST27,
TST28,
TST29,
TST30,
TST31,
TST32,
TST33,
TST34,
TST35,
TST36,
TST37,
TST38,
TST39,
TST40,
TST41,
TST42,
TST43,
TST44,
TST45,
TST46,
TST47,
TST48,
TST49,
TST50,
TST51,
TST52,
TST53,
TST54,
TST55,
TST56,
TST57,
TST58,
TST59,
TST60,
TST61,
TST62,
TST63,
TST64,
TST65,
TST66,
TST67,
TST68,
TST69,
TST70,
TST71,
TST72,
TST73,
TST74,
TST75,
TST76,
TST77,
TST78,
TST79,
TST80,
TST81,
TST82,
TST83,
TST84,
TST85,
TST86,
TST87,
TST88,
TST89,
TST90,
TST91,
TST92,
TST93,
TST94,
TST95,
TST96,
TST97,
TST98,
TST99,
TST100,
TST101,
TST102);
GLOBAL LITERAL MAXTEST = 102;
GLOBAL
TESTS_FAILED: BITVECTOR[MAXTEST];
GLOBAL
NET_FAULTS: BITVECTOR[MAXNETS];
END
ELUDOM