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%TITLE 'STIRS FAULT ISOLATION DATA FOR M8620 (DPE) BOARD'
MODULE MSDPED (
LANGUAGE(BLISS36)
) =
BEGIN
!
! COPYRIGHT (C) 1979 BY
! DIGITAL EQUIPMENT CORPORATION, MAYNARD, MASS.
!
! THIS SOFTWARE IS FURNISHED UNDER A LICENSE AND MAY BE USED AND COPIED
! ONLY IN ACCORDANCE WITH THE TERMS OF SUCH LICENSE AND WITH THE
! INCLUSION OF THE ABOVE COPYRIGHT NOTICE. THIS SOFTWARE OR ANY OTHER
! COPIES THEREOF MAY NOT BE PROVIDED OR OTHERWISE MADE AVAILABLE TO ANY
! OTHER PERSON. NO TITLE TO AND OWNERSHIP OF THE SOFTWARE IS HEREBY
! TRANSFERRED.
!
! THE INFORMATION IN THIS SOFTWARE IS SUBJECT TO CHANGE WITHOUT NOTICE
! AND SHOULD NOT BE CONSTRUED AS A COMMITMENT BY DIGITAL EQUIPMENT
! CORPORATION.
!
! DIGITAL ASSUMES NO RESPONSIBILITY FOR THE USE OR RELIABILITY OF ITS
! SOFTWARE ON EQUIPMENT WHICH IS NOT SUPPLIED BY DIGITAL.
!
!++
! FACILITY: DECSYSTEM 2020 DIAGNOSTIC RELEASE TAPE 'DSTIR'
!
! ABSTRACT:
!
! THIS MODULE CONTAINS THE FAULT ISOLATION DATA FOR THE KS10
! STIMULUS/RESPONSE (STIRS) DIAGNOSTIC FOR THE M8620 (DPE) BOARD.
! IT IS LINKED TO THE 'MSSTRC' AND 'MSDPET' MODULES TO PRODUCE
! THE 'MSDPE.EXE' FILE.
!
! ENVIRONMENT: RUNS UNDER 'CSL' ON A TOPS-20 SYSTEM.
!
! AUTHOR: JEAN BASMAJI , CREATION DATE: 23-MAY-79
!
! MODIFIED BY:
!
! JEAN BASMAJI, 23-MAY-79; VERSION 0.1
!--
!
! EQUATED SYMBOLS:
!
GLOBAL LITERAL
DATA_VERSION = 1,
DATA_EDIT = 0,
MAXNETS = 108;
!
! MACROS:
!
MACRO
!DEFINING NETWORKS TO CORRESPOND TO BITS FOR WORD W_0
MSKIP = %ASSIGN (W_0,W_0 OR 1^0)%,
SKIP = %ASSIGN (W_0,W_0 OR 1^1)%,
MDISP = %ASSIGN (W_0,W_0 OR 1^2)%,
DISP = %ASSIGN (W_0,W_0 OR 1^3)%,
M2901S = %ASSIGN (W_0,W_0 OR 1^4)%,
MEMVMA = %ASSIGN (W_0,W_0 OR 1^5)%,
SWPVMA = %ASSIGN (W_0,W_0 OR 1^6)%,
DPDBUS = %ASSIGN (W_0,W_0 OR 1^7)%,
DBMDBUS = %ASSIGN (W_0,W_0 OR 1^8)%,
PCDBUS = %ASSIGN (W_0,W_0 OR 1^9)%,
RAMDBUS = %ASSIGN (W_0,W_0 OR 1^10)%,
SHIFT = %ASSIGN (W_0,W_0 OR 1^11)%,
M2902S = %ASSIGN (W_0,W_0 OR 1^12)%,
DPCLKS = %ASSIGN (W_0,W_0 OR 1^13)%,
DPSCFLG = %ASSIGN (W_0,W_0 OR 1^14)%,
RAMPAR = %ASSIGN (W_0,W_0 OR 1^15)%,
BITE = %ASSIGN (W_0,W_0 OR 1^16)%,
TBVMACPY = %ASSIGN (W_0,W_0 OR 1^17)%,
ADEQ0 = %ASSIGN (W_0,W_0 OR 1^18)%,
DRMCNTRL = %ASSIGN (W_0,W_0 OR 1^19)%,
PIBUS = %ASSIGN (W_0,W_0 OR 1^20)%,
PINEW = %ASSIGN (W_0,W_0 OR 1^21)%,
PICURNT = %ASSIGN (W_0,W_0 OR 1^22)%,
PISOFT = %ASSIGN (W_0,W_0 OR 1^23)%,
PIACTV = %ASSIGN (W_0,W_0 OR 1^24)%,
ORPI = %ASSIGN (W_0,W_0 OR 1^25)%,
ANDPI = %ASSIGN (W_0,W_0 OR 1^26)%,
PIREQ = %ASSIGN (W_0,W_0 OR 1^27)%,
TRNCVR = %ASSIGN (W_0,W_0 OR 1^28)%,
PIENC = %ASSIGN (W_0,W_0 OR 1^29)%,
DPCRY1 = %ASSIGN (W_0,W_0 OR 1^30)%,
ACLK = %ASSIGN (W_0,W_0 OR 1^31)%,
BCLK = %ASSIGN (W_0,W_0 OR 1^32)%,
CCLK = %ASSIGN (W_0,W_0 OR 1^33)%,
FCLK = %ASSIGN (W_0,W_0 OR 1^34)%,
HCLK = %ASSIGN (W_0,W_0 OR 1^35)%,
!DEFINING NETWORKS TO CORRESPOND TO BITS FOR WORD W_1
A = %ASSIGN (W_1,W_1 OR 1^0)%,
B = %ASSIGN (W_1,W_1 OR 1^1)%,
C = %ASSIGN (W_1,W_1 OR 1^2)%,
D = %ASSIGN (W_1,W_1 OR 1^3)%,
E = %ASSIGN (W_1,W_1 OR 1^4)%,
F = %ASSIGN (W_1,W_1 OR 1^5)%,
G = %ASSIGN (W_1,W_1 OR 1^6)%,
H = %ASSIGN (W_1,W_1 OR 1^7)%,
I = %ASSIGN (W_1,W_1 OR 1^8)%,
J = %ASSIGN (W_1,W_1 OR 1^9)%,
K = %ASSIGN (W_1,W_1 OR 1^10)%,
L = %ASSIGN (W_1,W_1 OR 1^11)%,
M = %ASSIGN (W_1,W_1 OR 1^12)%,
N = %ASSIGN (W_1,W_1 OR 1^13)%,
O = %ASSIGN (W_1,W_1 OR 1^14)%,
P = %ASSIGN (W_1,W_1 OR 1^15)%,
Q = %ASSIGN (W_1,W_1 OR 1^16)%,
R = %ASSIGN (W_1,W_1 OR 1^17)%,
S = %ASSIGN (W_1,W_1 OR 1^18)%,
T = %ASSIGN (W_1,W_1 OR 1^19)%,
U = %ASSIGN (W_1,W_1 OR 1^20)%,
V = %ASSIGN (W_1,W_1 OR 1^21)%,
W = %ASSIGN (W_1,W_1 OR 1^22)%,
X = %ASSIGN (W_1,W_1 OR 1^23)%,
Y = %ASSIGN (W_1,W_1 OR 1^24)%,
Z = %ASSIGN (W_1,W_1 OR 1^25)%,
TRAP = %ASSIGN (W_1,W_1 OR 1^26)%,
AC0 = %ASSIGN (W_1,W_1 OR 1^27)%,
XR0 = %ASSIGN (W_1,W_1 OR 1^28)%,
JRST0 = %ASSIGN (W_1,W_1 OR 1^29)%,
XR = %ASSIGN (W_1,W_1 OR 1^30)%,
IR = %ASSIGN (W_1,W_1 OR 1^31)%,
DBUSSEL = %ASSIGN (W_1,W_1 OR 1^32)%,
DRMAB = %ASSIGN (W_1,W_1 OR 1^33)%,
DRMJ = %ASSIGN (W_1,W_1 OR 1^34)%,
ACDISP = %ASSIGN (W_1,W_1 OR 1^35)%,
!DEFINING NETWORKS TO CORRESPOND TO BITS FOR WORD W_2
DBUSPER = %ASSIGN (W_2,W_2 OR 1^0)%,
DBUSPEL = %ASSIGN (W_2,W_2 OR 1^1)%,
DBUSPR = %ASSIGN (W_2,W_2 OR 1^2)%,
DBUSPL = %ASSIGN (W_2,W_2 OR 1^3)%,
PE = %ASSIGN (W_2,W_2 OR 1^4)%,
PWRITE = %ASSIGN (W_2,W_2 OR 1^5)%,
DPPE = %ASSIGN (W_2,W_2 OR 1^6)%,
RAM = %ASSIGN (W_2,W_2 OR 1^7)%,
RAMWRITE = %ASSIGN (W_2,W_2 OR 1^8)%,
RAMSEL = %ASSIGN (W_2,W_2 OR 1^9)%,
ACALU = %ASSIGN (W_2,W_2 OR 1^10)%,
RAMADRS = %ASSIGN (W_2,W_2 OR 1^11)%,
ACBLK = %ASSIGN (W_2,W_2 OR 1^12)%,
SPEC18CRY= %ASSIGN (W_2,W_2 OR 1^13)%,
SPECIR = %ASSIGN (W_2,W_2 OR 1^14)%,
SPECPI = %ASSIGN (W_2,W_2 OR 1^15)%,
SPECASH = %ASSIGN (W_2,W_2 OR 1^16)%,
SPECEXP = %ASSIGN (W_2,W_2 OR 1^17)%,
SPECPC = %ASSIGN (W_2,W_2 OR 1^18)%,
SPECAC = %ASSIGN (W_2,W_2 OR 1^19)%,
SPECXR = %ASSIGN (W_2,W_2 OR 1^20)%,
SPECSWEEP= %ASSIGN (W_2,W_2 OR 1^21)%,
SPECAPR = %ASSIGN (W_2,W_2 OR 1^22)%,
AEQLJ = %ASSIGN (W_2,W_2 OR 1^23)%,
TXXX = %ASSIGN (W_2,W_2 OR 1^24)%,
!WORD BEING GENERATED
NTWK = W_0,W_1,W_2
%ASSIGN (W_0,0)
%ASSIGN (W_1,0)
%ASSIGN (W_2,0)%,
UPAZ (TEXT) = UPLIT (%ASCIZ TEXT)%;
GLOBAL BIND
SKIP_NAME = UPAZ('DPEA: SKIP MIXS'),
DBUS_NAME = UPAZ('DPE3&4: DBUS MIXS'),
DISP_NAME = UPAZ('DPEA: DISP MIXS'),
VMA_NAME = UPAZ('DPE5: VMA EN LOGIC'),
SPEC40_NAME = UPAZ('DPE5: SPEC EN 40 DECODER'),
SPEC20_NAME = UPAZ('DPE5: SPEC EN 20 DECODER'),
!NETWORK NAMES FOR W_0
NET_NAMES = UPLIT (SKIP_NAME,
SKIP_NAME,
DISP_NAME,
DISP_NAME,
UPAZ('DPE1&2&5: 2901S'),
VMA_NAME,
VMA_NAME,
DBUS_NAME,
DBUS_NAME,
DBUS_NAME,
DBUS_NAME,
UPAZ('DPE1: SHIFT MIXS'),
UPAZ('DPE2: 2902S LOOK AHEAD LOGIC'),
UPAZ('DPE5: L\R OF DP CLK ENABLES'),
UPAZ('DPE5: DP SHIFT & CRY FLAGS'),
UPAZ('DPE7&8: RAMFILE PARITY RAM'),
UPAZ('DPE3: BYTE DISP LOGIC'),
UPAZ('DPE5: 10 BIT VMA CPY FLOPS'),
UPAZ('DPEA: AD = 0 AND GATE'),
UPAZ('DPEA: RANDOM CONTROL BIT ROM'),
UPAZ('DPEB: BUS PI REQ D FF AND DECODER'),
UPAZ('DPEB: PI NEW PRI ENCODER'),
UPAZ('DPEB: PI CURRENT D FLOP AND ENCODER'),
UPAZ('DPEB: PI SOFT D FLOP'),
UPAZ('DPEB: PI ACTIVE D FLOP'),
UPAZ('DPEB: THE OR GATES INPUT TO PI NEW PRI ENC'),
UPAZ('DPEB: THE AND GATES OUTPUT OF PI ACTIVE'),
UPAZ('DPEB: INTERRUPT REQ D FLOP'),
UPAZ('DPEB: THE 4 BIT TRNCVR LATCH'),
UPAZ('DPEB: PI COMPARE CHIP'),
UPAZ('DPE9: DP CRY1 GATES'),
UPAZ('DPE5: T CLK A'),
UPAZ('DPE5: CLK B'),
UPAZ('DPE5: CLK C'),
UPAZ('DPE5: CLK F'),
UPAZ('DPE5: CLK H'),
!NETWORK NAMES FOR W_1
UPAZ('DPE9: OV,TRAP1,FOV & FXU D FF'),
UPAZ('DPE9: B OR GATES'),
UPAZ('DPE9: C OR GATE'),
UPAZ('DPE9: D AND GATE '),
UPAZ('DPE9: E OR GATE '),
UPAZ('DPE9: JFCL LOGIC GATES'),
UPAZ('DPE9: G FLAGS EN AND GATES'),
UPAZ('DPE9: H FLAG MIX'),
UPAZ('DPE9: PC FLAG EN L OR GATE'),
UPAZ('DPE9: CRY0,CRY1 & FPD D FF'),
UPAZ('DPE9: K OR GATE'),
UPAZ('DPE9: L FLAG MIX'),
UPAZ('DPE9: M OR GATE'),
UPAZ('DPE9: N OR GATE'),
UPAZ('DPE9: CLR FPD FLAG GATE'),
UPAZ('DPE9: SET FPD FLAG GATE'),
UPAZ('DPE9: USER,USER I/O TRAP 2 & NO DIV D FF'),
UPAZ('DPE9: R OR GATE'),
UPAZ('DPE9: S USER I/O GATES'),
UPAZ('DPE9: T HOLD USER I/O AND GATE'),
UPAZ('DPE9: U OR GATE'),
UPAZ('DPE9: V TRAP 2 OR GATE'),
UPAZ('DPE9: W FXU OR GATE'),
UPAZ('DPE9: X SET NO DIV OR GATE'),
UPAZ('DPE9: Y XOR GATE'),
UPAZ('DPE9: Z INVERTERS'),
UPAZ('DPE9&B: TRAP DECODER & D FF'),
UPAZ('DPEB: AC = 0 AND GATE'),
UPAZ('DPEB: XR = 0 AND GATE'),
UPAZ('DPEB: JRST,0 AND GATE'),
UPAZ('DPEB: XR D FF'),
UPAZ('DPEA: ACS & IR D FLOPS'),
UPAZ('DPE3: DBUS SEL GATES'),
UPAZ('DPEA: DROM A&B ROM'),
UPAZ('DPEA: DROM J ROM'),
UPAZ('DPEA: DROM AC DISP MIX'),
!NETWORK NAMES FOR W_2
UPAZ('DPE4: RIGHT HALF OF DBUS PAR GENS'),
UPAZ('DPE3: LEFT HALF OF DBUS PAR GENS'),
UPAZ('DPE4: RIGHT HALF OF DBUS PAR MIX'),
UPAZ('DPE3: LEFT HALF OF DBUS PAR MIX'),
UPAZ('DPE4: PARITY IMPLEMENT D FF'),
UPAZ('DPE5: WRITE PARITY GATES'),
UPAZ('DPE4: DP PARITY RAM'),
UPAZ('DPE7&8: 36 BIT RAMFILE'),
UPAZ('DPE5: RAMFILE WRITE AND GATES'),
UPAZ('DPE6: RAMFILE ADRS SELCT GATES'),
UPAZ('DPE6: AC ALU'),
UPAZ('DPE6: RAMFILE ADRS MIXS'),
UPAZ('DPE5: AC BLOCKS D FF'),
SPEC40_NAME,
SPEC40_NAME,
SPEC40_NAME,
SPEC40_NAME,
SPEC40_NAME,
SPEC40_NAME,
SPEC40_NAME,
SPEC20_NAME,
SPEC20_NAME,
SPEC20_NAME,
UPAZ('DPEA: DROM A = J MIX'),
UPAZ('DPEA: TXXX XOR GATE'));
COMPILETIME
W_0 = 0,
W_1 = 0,
W_2 = 0;