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Trailing-Edge - PDP-10 Archives - klad_sources - klad.sources/smbc2t.mac
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;SMBC2


MCNVER==0
DECVER==1


	XLIST
DEFINE	NAME	(MCNVER,DECVER)<

TITLE	SMBC2 DECSYSTEM-2020 BOOT CHECK 2 DIAGNOSTIC (1) MCNVER,DECVER
>
	LIST
	LALL

	NAME	\MCNVER,\DECVER

;TEST DESIGNED FOR INITIAL DEBUGGING OF PROCESSOR HARDWARE
;AND TO DETECT (SOLID) FAILURES IN THE FIELD.

;COPYRIGHT 1978
;DIGITAL EQUIPMENT CORPORATION
;MARLBORO, MASS. 01752

;JOHN R. KIRCHOFF

	LOC	137
	MCNVER,,DECVER

	NOSYM
SUBTTL	DIAGNOSTIC PARAMETERS

;PARAMETER DEFINITIONS

EXCASB==1
USRASB==1
PGMEND==1

BC2RES=	1006		;BC2 RESTART ADDRESS

;FLAG DEFINITIONS

USERF=10000		;USER MODE FLAG


;MACROS

; STOP - USED FOR SCOPE LOOP, IF INSTRUCTION FAILS, CHANGE (JUMPA .+1)
;	 TO A (JUMPA .-X) TO CYCLE ON FAILING INSTRUCTION

DEFINE	STOP	(A)<
	HALT	.+1		;TEST FAILED IF PROGRAM HALTS HERE
	JUMPA	.+1		;IF TEST FAILS, CHANGE THIS INSTRUCTION (JUMPA .+1) TO
				;JUMPA X (X IS THE ADDRESS OF THE FIRST INSTRUCTION
				;IN THE SUBTEST) TO LOOP ON ERROR>

; SFLAG - USED TO CLEAR ALL FLAGS THEN TO SET SELECTED FLAG

DEFINE	SFLAG	(A)<
	MOVSI	1,A
	JFCL	17,.+1	;RESET ALL FLAGS
	JRST	2,.+1(1)		;SET A FLAG>
;SPECIAL FEATURE PARAMETERS

SADR1=STARTA
SADR2=STARTA
SADR3=STARTA
SADR4=STARTA
SADR5=JRST STARTA
SADR6=JRST STARTA
SADR7=JRST STARTA
SADR8=JRST STARTA
SADR9=JRST STARTA
SADR10=JRST STARTA
SADR11=JRST STARTA

PAREA0=0
PAREA1=0
PAREA2=0
PAREA3=SIXBIT/SMBC2/
PAREA4=SIXBIT/TMP/
PAREA5=0
PAREA6=0
ITERAT==1
SUBTTL	STANDARD PROGRAM ASSIGNMENTS

DEFINE	S,<;*********************************************************************>

S
;*ACCUMULATORS
S

P=	17			;PUSHDOWN POINTER AC (IF PUSH LIST USED)

S
;*PDP-10 STANDARD PC CONTROL FLAGS (SAVED ON PUSHJ, JSR, ETC..)
S

AROV==	400000			;ARITHMETIC OVERFLOW
CRY0==	200000			;CARRY 0
CRY1==	100000			;CARRY 1
FOV==	40000			;FLOATING POINT OVERFLOW
BIS==	20000			;BYTE INTERRUPT
USERF==	10000			;USER MODE
EXIOT==	4000			;USER PRIV I/O
TN0==	400			;TRAP NUMBER BIT 0
TN1==	200			;TRAP NUMBER BIT 1
FXU==	100			;FLOATING POINT UNDERFLOW
DCK==	40			;DIVIDE CHECK

S
;*PDP-10 STANDARD ADDRESS ASSIGNMENTS
S

LUUO==	40			;UUO STORAGE, UUO 1-37
LUUOI==	41			;UUO SERVICE INSTRUCTION

S
;*JOB DATA AREA EXTERNALS
S

JOBUUO==40
JOB41==	41
JOBREL==44
JOBDDT==74
JOBSYM==116
JOBUSY==117
JOBSA==	120
JOBFF==	121
JOBREN==124
JOBAPR==125
JOBCNI==126
JOBTPC==127
JOBOPC==130
JOBVER==137
S
;*JOB DATA AREA EXTERNALS (NEW DEFINITIONS)
S

.JBUUO==40
.JB41==	41
.JBREL==44
.JBDDT==74
.JBSYM==116
.JBUSY==117
.JBSA==	120
.JBFF==	121
.JBREN==124
.JBAPR==125
.JBCNI==126
.JBTPC==127
.JBOPC==130
.JBVER==137
S
;*PDP-10 STANDARD APR CONO ASSIGNMENTS
S

IOCLR==	200000			;CLEAR ALL I/O DEVICES

S
;*PDP-10 STANDARD PI CONO ASSIGNMENTS
S

PICLR==	10000			;CLEAR PI SYSTEM
REQSET==4000			;SET PROGRAM PI REQUEST
CHNON==	2000			;TURN ON CHANNEL
CHNOFF==1000			;TURN OFF CHANNEL
PIOFF==	400			;TURN OFF PI SYSTEM
PION==	200			;TURN ON PI SYSTEM

S
;*PDP-10 STANDARD PI CONI ASSIGNMENTS
S

PION==	200			;PI SYSTEM ON

S
;*PDP-10 STANDARD PI CHANNEL ASSIGNMENTS
S

PICHN1==100			;PI CHANNEL 1
PICHN2==40			;PI CHANNEL 2
PICHN3==20			;PI CHANNEL 3
PICHN4==10			;PI CHANNEL 4
PICHN5==4			;PI CHANNEL 5
PICHN6==2			;PI CHANNEL 6
PICHN7==1			;PI CHANNEL 7
PICHNA==177			;ALL PI CHANNELS, 1 THRU 7
S
;*KS10 CONO APR 000 ASSIGMENTS
S

LIOCLR==200000			;CLEAR ALL I/O DEVICES
LFLGEN==100000			;ENABLE SELECTED FLAG
LFLGDS==40000			;DISABLE SELECTED FLAG
LFLGCL==20000			;CLEAR SELECTED FLAG
LFLGST==10000			;SET SELECTED FLAG
LPWRFL==1000			;POWER FAIL FLAG
LNXMER==400			;NON-EXISTENT MEMORY FLAG
LPARER==200			;MB PARITY ERROR FLAG
LPSFT==	100			;SOFT MEMORY ERROR
LACLK==	40			;INTERVAL TIMER
LAPRP7==7			;APR PI CHANNEL 7
LAPRP6==6			;APR PI CHANNEL 6
LAPRP5==5			;APR PI CHANNEL 5
LAPRP4==4			;APR PI CHANNEL 4
LAPRP3==3			;APR PI CHANNEL 3
LAPRP2==2			;APR PI CHANNEL 2
LAPRP1==1			;APR PI CHANNEL 1
LEPWRF==101000			;ENABLE POWER FAIL
LDPWRF==041000			;DISABLE POWER FAIL
LCPWRF==021000			;CLR POWER FAIL
LSPWRF==011000			;SET POWER FAIL
LENXER==100400			;ENABLE NON-EXISTENT MEMORY
LDNXER==040400			;DISABLE NON-EXISTENT MEORY
LCNXER==020400			;CLR NON-EXISTENT MEMORY
LSNXER==010400			;SET NON-EXISTENT MEMORY
LEPAER==100200			;ENABLE PARITY ERRORS
LDPAER==040200			;DISABLE PARITY ERRORS
LCPAER==020200			;CLR PARITY ERROR
LSPAER==010200			;SET PARITY ERROR
LEPSFT==100100			;ENABLE SOFT MEMORY ERROR
LDPSFT==040100			;DISABLE SOFT MEMORY ERROR
LCPSFT==020100			;CLR SOFT MEMORY ERROR
LSPSFT==010100			;SET SOFT MEMORY ERROR
LAPRAL==121600			;CLR ALL ERROR FLAGS & ENABLE
S
;*KS10 CONI APR 000 ASSIGMENTS (LEFT HALF)
S

LPWRFE==1000			;POWER FAILURES ENABLED
LNXMEN==400			;NON-EXISTENT MEMORY ERRORS ENABLED
LPAREN==200			;PARITY ERRORS ENABLED
LPSFTE==100			;SOFT MEMORY ERROR ENABLED
LACLKE==40			;INTERVAL TIMER ENABLED

S
;*KS10 CONI APR 000 ASSIGMENTS (RIGHT HALF)
S

LPWRFL==1000			;POWER FAIL FLAG
LNXMER==400			;NON-EXISTENT MEMORY FLAG
LPARER==200			;PARITY ERROR FLAG
LPSFTER==100			;SOFT MEMORY ERROR FLAG
LAPRP7==7			;APR PI CHANNEL 7
LAPRP6==6			;APR PI CHANNEL 6
LAPRP5==5			;APR PI CHANNEL 5
LAPRP4==4			;APR PI CHANNEL 4
LAPRP3==3			;APR PI CHANNEL 3
LAPRP2==2			;APR PI CHANNEL 2
LAPRP1==1			;APR PI CHANNEL 1
LINT==10			;APR INTERRUPT

S
;*KS10 DATAO APR 000 ASSIGMENTS (LEFT HALF)
S

LINSTF==400			;ADDRESS BREAK REQUEST FOR INST. FETCH
LDATAF==200			;ADDRESS BREAK REQUEST FOR DATA FETCH
LWRITE==100			;ADDRESS BREAK REQUEST FOR DATA WRITE
LUSCMP==40			;USER ADDRESS COMPARE
LEXCMP==0			;EXEC ADDRESS COMPARE

S
;*KS10 DATAO APR 000 ASSIGMENTS (RIGHT HALF)
S

;DATAO APR,ADDRESS SWITCHES=13-35
S
;*KS10 DATAI APR 000 ASSIGMENTS (LEFT HALF)
S

LINSTF==400			;ADDRESS BREAK REQUEST FOR INST. FETCH
LDATAF==200			;ADDRESS BREAK REQUEST FOR DATA FETCH
LWRITE==100			;ADDRESS BREAK REQUEST FOR DATA WRITE
LUSCMP==40			;USER ADDRESS COMPARE
LEXCMP==0			;EXEC ADDRESS COMPARE

S
;*KS10 DATAI APR 000 ASSIGMENTS (RIGHT HALF)
S

;DATAI APR,ADDRESS SWITCHES=13-35

S
;*KS10 BLKO APR 000 ASSIGMENTS (IMMEDIATE MODE)
S

;REFILL ALGORITHM BITS 18-20
;REFILL ALGORITHM ADDRESS 27-33

S
;*KS10 BLKI APR 000 ASSIGMENTS
S

;MICRO-CODE OPTIONS = 0-8
;MICRO-CODE VERSION NUMBER = 9-17
;HARDWARE OPTIONS =18-20
;PROCESSOR SERIAL NUMBER = 21-35
S
;*KS10 CONO PI 004 ASSIGMENTS
S

LRQCLR==20000			;DROP INTERRUPT ON SELECTED CHANNEL
LPICLR==10000			;CLEAR PI SYSTEM
LREQSE==4000			;REQUEST INTERRUPT ON SELECTED CHANNEL
LCHNON=2000			;TURN ON SELECTED CHANNEL
LCHNOF==1000			;TURN OFF SELECTED CHANNEL
LPIOFF==400			;TURN PI SYSTEM OFF
LPION==200			;TURN PI SYSTEM ON
LPICH1==100			;PI CHANNEL 1
LPICH2==40			;PI CHANNEL 2
LPICH3==20			;PI CHANNEL 3
LPICH4==10			;PI CHANNEL 4
LPICH5==4			;PI CHANNEL 5
LPICH6==2			;PI CHANNEL 6
LPICH7==1			;PI CHANNEL 7
LPICHA==177			;ALL PI CHANNELS

S
;*KS10 CONI PI 004 ASSIGMENTS (LEFT HALF)
S

LPRCH1==100			;PROGRAM REQUEST ON CHANNEL 1
LPRCH2==40			;PROGRAM REQUEST ON CHANNEL 2
LPRCH3==20			;PROGRAM REQUEST ON CHANNEL 3
LPRCH4==10			;PROGRAM REQUEST ON CHANNEL 4
LPRCH5==4			;PROGRAM REQUEST ON CHANNEL 5
LPRCH6==2			;PROGRAM REQUEST ON CHANNEL 6
LPRCH7==1			;PROGRAM REQUEST ON CHANNEL 7

S
;*KS10 CONI PI 004 ASSIGMENTS (RIGHT HALF)
S

LPIIP1==40000			;PI IN PROGRESS ON CHANNEL 1
LPIIP2==20000			;PI IN PROGRESS ON CHANNEL 2
LPIIP3==10000			;PI IN PROGRESS ON CHANNEL 3
LPIIP4==4000			;PI IN PROGRESS ON CHANNEL 4
LPIIP5==2000			;PI IN PROGRESS ON CHANNEL 5
LPIIP6==1000			;PI IN PROGRESS ON CHANNEL 6
LPIIP7==400			;PI IN PROGRESS ON CHANNEL 7
LPION==200			;PI SYSTEM ON
LPICH1==100			;PI CHANNEL 1 ON
LPICH2==40			;PI CHANNEL 2 ON
LPICH3==20			;PI CHANNEL 3 ON
LPICH4==10			;PI CHANNEL 4 ON
LPICH5==4			;PI CHANNEL 5 ON
LPICH6==2			;PI CHANNEL 6 ON
LPICH7==1			;PI CHANNEL 7 ON
S
;*KS10 DATAO PAG 010 ASSIGMENTS (LEFT HALF)
S

LLACBL==400000			;LOAD AC BLOCKS
LLDUSB==100000			;LOAD USER BASE REGISTER
;CURRENT AC BLOCKS BITS 6 - 8
;PREVIOUS AC BLOCKS BITS 9 - 11

S
;*KS10 DATAO PAG 010 ASSIGMENTS (RIGHT HALF)
S

;USER BASE REGISTER BITS 23 - 35

S
;*KS10 DATAI PAG 010 ASSIGMENTS (LEFT HALF)
S

LLACBL==400000			;LOAD AC BLOCKS
LLDUSB==100000			;LOAD USER BASE REGISTER
;CURRENT AC BLOCKS BITS 6 - 8
;PREVIOUS AC BLOCKS BITS 9 - 11

S
;*KS10 DATAI PAG 010 ASSIGMENTS (RIGHT HALF)
S

;USER BASE REGISTER BITS 25 - 35

S
;*KS10 CONO PAG 010 ASSIGMENTS
S

LSMODE==40000			;SECTION MODE
LTRPEN==20000			;TRAP AND PAGE CACHE ENABLE

;EXEC BASE REGISTER = 25-35

S
;*KS10 CONI PAG 010 ASSIGMENTS
S

LSECMO==40000			;SECTION MODE
LTRPAE==20000			;TRAP AND PAGE CACHE ENABLE

;EXEC BASE REGISTER = 25-35

S
;*KS10 BLKO PAG 010 ASSIGMENTS (IMMEDIATE MODE)
S

S
;*KS10 EXEC PAGE MAP PAGE ASSIGNMENTS
S

UBAVEC==100			;UNIBUS VECTOR TABLE ADDRESS

AROVTP==421			;ARITHMETIC TRAP
PDOVTP==422			;PUSHDOWN OVERFLOW TRAP
TRP3TP==423			;TRAP 3 TRAP

LTBASH==510			;TIME-BASE, HI
LTBASL==511			;TIME-BASE, LO
LPRFMH==512			;PERFORMANCE ANAYLYSIS, HI
LPRFML==513			;PERFORMANCE ANAYLYSIS, LO

S
;*KS10 USER PAGE MAP PAGE ASSIGNMENTS
S

AROVTP==421			;ARITHMETIC TRAP
PDOVTP==422			;PUSHDOWN OVERFLOW TRAP
TRP3TP==423			;TRAP 3 TRAP

MUUO==	424			;MUUO STORAGE
MUUOPC==425			;C(PC) OF MUUO STORAGE
LCNTXT==426			;PROCESS CONTEXT WORD

KNTRP==430			;KERNAL	 	NO TRAP - NEW PC'S-
KTRP==	431			;"	 	TRAP
SNTRP==432			;SUPERVISOR	NO TRAP
STRP==	433			;"		TRAP
CNTRP==434			;CONCEAL 	NO TRAP
CTRP==	435			;"		TRAP
PNTRP==436			;PUBLIC		NO TRAP
PTRP==	437			;"		TRAP

LEUPFW==500			;EXEC & USER PAGE FAIL WORD
LPFWPC==501			;C(PC) OF PAGE FAIL WORD
LPGFTR==502			;PAGE FAIL NEW PC

LEBXMH==504			;E-BOX CLOCK TICK METER, HI
LEBXML==505			;E-BOX CLOCK TICK METER, LO
LMBXMH==506			;M-BOX CYCLE METER, HI
LMBXML==507			;M-BOX CYCLE METER, LO
S
;*KS10 I/O INSTRUCTIONS
S

OPDEF	APRID	[700B8+0B12]	;READ PROCESSOR ID
OPDEF	WRAPR	[700B8+4B12]	;WRITE APR
OPDEF	RDAPR	[700B8+5B12]	;READ APR
OPDEF	WRPI	[700B8+14B12]	;WRITE PI
OPDEF	RDPI	[700B8+15B12]	;READ PI

OPDEF	RDUBR	[701B8+1B12]	;READ USER BASE REGISTER
OPDEF	CLRPT	[701B8+2B12]	;CLEAR HARDWARE PAGE TABLE
OPDEF	WRUBR	[701B8+3B12]	;WRITE USER BASE REGISTER
OPDEF	RDEBR	[701B8+5B12]	;READ EXEC BASE REGISTER
OPDEF	WREBR	[701B8+4B12]	;WRITE EXEC BASE REGISTER

OPDEF	RDSPB	[702B8+0B12]	;READ SPT BASE REGISTER
OPDEF	RDCSB	[702B8+1B12]	;READ CORE STATUS TABLE BASE REGISTER
OPDEF	RDPUR	[702B8+2B12]	;READ PROCESS USE REGISTER
OPDEF	RDCSTM	[702B8+3B12]	;READ CST MASK REGISTER
OPDEF	RDTIM	[702B8+4B12]	;READ TIME BASE
OPDEF	RDINT	[702B8+5B12]	;READ INTERVAL TIMER
OPDEF	RDHSB	[702B8+6B12]	;READ HALT STATUS BLOCK ADDRESS

OPDEF	WRSPB	[702B8+10B12]	;WRITE SPT BASE REGISTER
OPDEF	WRCSB	[702B8+11B12]	;WRITE CORE STATUS TABLE BASE REGISTER
OPDEF	WRPUR	[702B8+12B12]	;WRITE PROCESS USE REGISTER
OPDEF	WRCSTM	[702B8+13B12]	;WRITE CST MASK REGISTER
OPDEF	WRTIM	[702B8+14B12]	;WRITE TIME BASE
OPDEF	WRINT	[702B8+15B12]	;WRITE INTERVAL TIMER
OPDEF	WRHSB	[702B8+16B12]	;WRITE HALT STATUS BLOCK ADDRESS
S
;*KS10 UNIBUS I/O INSTRUCTIONS
S

OPDEF	TIOE	[710B8]		;TEST I/O, SKIP IF ZERO
OPDEF	TION	[711B8]		;TEST I/O, SKIP IF NON-ZERO
OPDEF	RDIO	[712B8]		;READ I/O
OPDEF	WRIO	[713B8]		;WRITE I/O
OPDEF	BSIO	[714B8]		;BIT SET I/O
OPDEF	BCIO	[715B8]		;BIT CLEAR I/O
OPDEF	TIOEB	[720B8]		;	BYTE MODE
OPDEF	TIONB	[721B8]
OPDEF	RDIOB	[722B8]
OPDEF	WRIOB	[723B8]
OPDEF	BSIOB	[724B8]
OPDEF	BCIOB	[725B8]

S
;*KS10 UNIBUS BIT NUMBERS
S

EBIT0==1
EBIT1==2
EBIT2==4
EBIT3==10
EBIT4==20
EBIT5==40
EBIT6==100
EBIT7==200
EBIT8==400
EBIT9==1000
EBIT10==2000
EBIT11==4000
EBIT12==10000
EBIT13==20000
EBIT14==40000
EBIT15==100000