PDP-10 Archive: macro.mic from BB-BL69C-SB

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.TOC	"CRAM Macros--Miscellaneous and A"
.NOBIN
;
;	All the CRAM macros have been alphabetized for easy reference.  We have
;	defined "_" to be alphabetically lower than the alphabet (although its
;	ASCII representation makes it higher) so that macros such as AR_AR+1
;	will precede ARX_AR+1, for example (this seems more intuitive).
;
[]_[]*[]	"@1/AD, ADA/@2, ADB/@3"
[]_[]*FM[]	"@3, ADA/@2, ADB/FM, @1/AD"
[]_[]-FM[]	"@3, ADA/@2, ADB/FM, @1/AD, AD/A-B"
[]_#[]		"@1_#,#/@2"
[]_ADA[]	"@1/AD, ADA/@2, AD/A"
[]_ADB[]	"@1/AD, ADA EN/0S, ADB/@2, AD/B"
[]_FM[]		"@1/AD, ADA EN/0S, ADB/FM, @2, AD/B"

(AR+ARX+MQ)*.25	"ADA/AR,AD/A,AR/AD*.25,ARX/ADX*.25,(MQ)*.25"
(AR+ARX+MQ)*2	"ADA/AR,AD/A,AR/AD*2,ARX/ADX*2,(MQ)*2"
(MQ)*.25	"COND/REG CTL,MQ/MQM SEL,MQ CTL/MQ*.25"
(MQ)*2		"COND/REG CTL,MQ/MQ SEL,MQ CTL/MQ*2"

.IF/MODEL.B
A INDRCT	"MEM/EA CALC,EA CALC/A IND,VMA/LOAD"
A READ		"VMA/PC+1,DISP/DRAM A RD,MEM/A RD,#/300,J/0"
.IFNOT/MODEL.B
A INDRCT	"MEM/A IND,VMA/LOAD"
A READ		"VMA/PC+1,DISP/DRAM A RD,MEM/A RD,#/0,J/0"
.ENDIF/MODEL.B
ABORT INSTR	"COND/SPEC INSTR,SPEC INSTR/INSTR ABORT"
AC0		"FMADR/AC0"
AC0_AR		"FMADR/AC0,COND/FM WRITE"
AC1_AR		"FMADR/AC1,COND/FM WRITE"
AC2_AR		"FMADR/AC2,COND/FM WRITE"
AC3_AR		"FMADR/AC3,COND/FM WRITE"
.IF/MODEL.B
AC4		"FMADR/AC+#,AC-OP/AC+#,AC#/4"
.IFNOT/MODEL.B
AC4		"FMADR/AC4"
.ENDIF/MODEL.B
AC4_AR		"AC4,COND/FM WRITE"
.IF/MODEL.B
AC5		"FMADR/AC+#,AC-OP/AC+#,AC#/5"
.IFNOT/MODEL.B
AC5		"FMADR/AC5"
.ENDIF/MODEL.B
AC5_AR		"AC5,COND/FM WRITE"
AD FLAGS	"COND/AD FLAGS"
AD LONG		"SPEC/AD LONG"
ADMSK		"R15"		;23 ONES

.TOC	"CRAM Macros--AR"

AR_[] AND FM[]	"ADA/@1,ADB/FM,@2,AD/AND,AR/AD"
AR_(AR+2BR)*.25	"ADA/AR,ADB/BR*2,AD/A+B,AR/AD*.25"
AR_(AR+BR)*.25	"ADA/AR,ADB/BR,AD/A+B,AR/AD*.25"
AR_(AR-2BR)*.25	"ADA/AR,ADB/BR*2,AD/A-B,AR/AD*.25"
AR_(AR-BR)*.25	"ADA/AR,ADB/BR,AD/A-B,AR/AD*.25"
AR_(ARX OR AR*4)*.25	"ADA/ARX,ADB/AR*4,AD/OR,AR/AD*.25"
AR_-AC0		"FMADR/AC0,ADB/FM,ADA EN/0S,AD/A-B,AR/AD"
AR_-AR		"ADA EN/0S,ADB/AR*4,AD/A-B,AR/AD*.25"
AR_-AR LONG	"GEN -AR LONG,AR_AD*.25 LONG"
AR_-BR		"ADB/BR,ADA EN/0S,AD/A-B,AR/AD"
AR_-BR LONG	"ADA EN/0S,ADB/BR,AD/A-B,AR/AD,ARX/ADX,SPEC/AD LONG"
AR_-BR*2 LONG	"ADA EN/0S,ADB/BR*2,AD/A-B,AR/AD,ARX/ADX,SPEC/AD LONG"
AR_-BRX		"ADB/BR,ADA EN/0S,AD/A-B,AR/ADX"
AR_-DLEN	"DLEN,ADB/FM,ADA EN/0S,AD/A-B,AR/AD"
AR_-FM[]	"ADA EN/0S,ADB/FM,@1,AD/A-B,AR/AD"
AR_-SLEN	"SLEN,ADB/FM,ADA EN/0S,AD/A-B,AR/AD"
AR_0.C		"COND/ARL IND,CLR/AR"
AR_0.M		"MEM/ARL IND,CLR/AR"
AR_0.S		"SPEC/ARL IND,CLR/AR"
AR_0S		"AD/0S,AR/AD"
AR_1		"ADA EN/0S,AD/A+1,AR/AD"
AR_1 LONG	"ADA EN/0S,AD/A+1,AR/AD*.25,ARX/ADX"
AR_1S		"AD/1S,AR/AD"
AR_2		"ADA EN/0S,AD/A+1,AR/AD*2"
AR_2(AR*BR)	"ADA/AR,ADB/BR,AR/AD*2"
AR_2(AR+1)	"ADA/AR,AD/A+1,AR/AD*2"
AR_2(AR+BR)	"AR_2(AR*BR),AD/A+B"
AR_2(AR+BR) LONG "AR_2(AR*BR),AD/A+B,ARX/ADX*2,SPEC/AD LONG"
AR_2(AR-BR)	"AR_2(AR*BR),AD/A-B"

AR_AC0		"FMADR/AC0,ADB/FM,AD/B,AR/AD"
AR_AC0 COMP	"FMADR/AC0,ADB/FM,AD/SETCB,AR/AD"
AR_AC0+1	"ADA EN/0S,ADB/FM,FMADR/AC0,AD/A+B+1,AR/AD"
AR_AC1		"FMADR/AC1,ADB/FM,AD/B,AR/AD"
AR_AC1 COMP	"FMADR/AC1,ADB/FM,AD/SETCB,AR/AD"
AR_AC1*2	"FMADR/AC1,ADB/FM,AD/B,AR/AD*2"
AR_AC2		"FMADR/AC2,ADB/FM,AD/B,AR/AD"
AR_AC3		"FMADR/AC3,ADB/FM,AD/B,AR/AD"
AR_AC3*2	"FMADR/AC3,ADB/FM,AD/B,AR/AD*2"
AR_AC4		"AC4,ADB/FM,AD/B,AR/AD"
AR_AD*.25 LONG	"AR/AD*.25,ARX/ADX*.25,SPEC/AD LONG"
AR_ADMSK AND VMA HELD	"COND/SEL VMA,ADA/PC,ADB/FM,ADMSK,AD/AND,AR/AD"

AR_AR AND ADMSK	 "ADMSK,ADB/FM,ADA/AR,AD/AND,AR/AD"
.IF/KLPAGE
AR_AR AND CSMSK	"CSMSK,ADB/FM,ADA/AR,AD/AND,AR/AD"
AR_AR OR PUR	"PUR,ADB/FM,ADA/AR,AD/OR,AR/AD"
.ENDIF/KLPAGE
AR_AR SWAP	"SH/AR SWAP,AR/SH"

AR_AR*.25	"ADA/AR,AD/A,AR/AD*.25"
AR_AR*.25 LONG	"ADA/AR,AD/A,AR/AD*.25,ARX/ADX*.25"
AR_AR*.5	"ADA/AR,AD/A*2,AR/AD*.25"
AR_AR*.5 LONG	"ADA/AR,AD/A*2,SPEC/AD LONG,AR/AD*.25,ARX/ADX*.25"
AR_AR*1.25 LONG	"ADA/AR,ADB/AR*4,AD/A+B,AR_AD*.25 LONG"
AR_AR*10	"ADA/AR,ADB/AR*4,AD/A+B,AR/AD*2"
AR_AR*10 LONG	"ADA/AR,ADB/AR*4,AD/A+B,AR/AD*2,ARX/ADX*2,SPEC/AD LONG"
AR_AR*2		"ADA/AR,AD/A,AR/AD*2"
AR_AR*2 LONG	"ADA/AR,AD/A,AR/AD*2,ARX/ADX*2"
AR_AR*4		"ADB/AR*4,AD/B,AR/AD"
AR_AR*4 LONG	"ADB/AR*4,AD/B,AR/AD,ARX/ADX"
AR_AR*5 LONG	"ADA/AR,ADB/AR*4,AD/A+B,AR/AD,ARX/ADX,SPEC/AD LONG"
AR_AR*8		"ADB/AR*4,AD/B,AR/AD*2"
AR_AR*8 LONG	"ADB/AR*4,AD/B,AR/AD*2,ARX/ADX*2"
AR_AR*AC0	"FMADR/AC0,ADB/FM,ADA/AR,AR/AD"	;GENERAL BINARY OPERATION
AR_AR*AC1	"FMADR/AC1,ADB/FM,ADA/AR,AR/AD"
AR_AR*BR	"ADA/AR,ADB/BR,AR/AD"
AR_AR*EXPMSK	"EXPMSK,ADB/FM,ADA/AR,AR/AD"	;[224]
AR_AR*MSK	"MSK,ADB/FM,ADA/AR,AR/AD"
AR_AR*SFLGS	"SFLGS,ADB/FM,ADA/AR,AR/AD"
AR_AR*SLEN	"SLEN,ADB/FM,ADA/AR,AR/AD"
AR_AR*T0	"T0,ADB/FM,ADA/AR,AR/AD"

AR_AR+1		"ADA/AR,AD/A+1,AR/AD"
AR_AR+1 LONG	"AR_AR+1,ARX/ADX,SPEC/AD LONG"
AR_AR+1-AR0	"ADA/AR,AD/A+1,AR/AD,SPEC/XCRY AR0"
AR_AR+BR	"ADA/AR,ADB/BR,AD/A+B,AR/AD"
AR_AR+BR LONG	"AR_AR+BR,ARX/ADX,SPEC/AD LONG"
AR_AR+E1	"E1,ADB/FM,ADA/AR,AD/A+B,AR/AD"
AR_AR+FM[]	"ADA/AR,ADB/FM,@1,AD/A+B,AR/AD";[343]
.IF/KLPAGE
AR_AR+SBR	"SBR,ADB/FM,ADA/AR,AD/A+B,AR/AD"
.ENDIF/KLPAGE
AR_AR+T0	"T0,ADB/FM,ADA/AR,AD/A+B,AR/AD"
AR_AR+T1	"T1,ADB/FM,ADA/AR,AD/A+B,AR/AD"
.IF/TRXDEF
AR_AR+TRB	"TRB,ADB/FM,ADA/AR,AD/A+B,AR/AD"
AR_AR+TRX	"TRX,ADB/FM,ADA/AR,AD/A+B,AR/AD"
.ENDIF/TRXDEF
AR_AR+XR	"GEN AR+XR,AR/AD"
AR_AR-1		"ADA/AR,AD/A-1,AR/AD"
AR_AR-BR	"ADA/AR,ADB/BR,AD/A-B,AR/AD"
AR_AR-BR LONG	"AR_AR-BR,ARX/ADX,SPEC/AD LONG"
AR_AR-BR-1	"GEN AR*BR,AD/A-B-1,AR/AD"
AR_AR-FM[]	"ADA/AR,ADB/FM,@1,AD/A-B,AR/AD"
AR_AR-T0	"T0,ADB/FM,ADA/AR,AD/A-B,AR/AD"

AR_ARX		"SH/ARX,AR/SH"
AR_ARX (AD)	"ADA/ARX,AD/A,AR/AD"
AR_ARX (ADX)	"ADA EN/EN,AD/A,AR/ADX"
AR_ARX AND ADMSK "ADMSK,ADB/FM,ADA/ARX,AD/AND,AR/AD"
AR_ARX ANDC ADMSK "ADMSK,ADB/FM,ADA/ARX,AD/ANDCB,AR/AD"
AR_ARX COMP	"ADA EN/EN,AD/SETCA,AR/ADX"
.IF/KLPAGE
AR_ARX OR PUR	"PUR,ADB/FM,ADA/ARX,AD/OR,AR/AD"
.ENDIF/KLPAGE
AR_ARX*.25	"ADA/ARX,AD/A,AR/AD*.25"
AR_ARX*.25-AR-1	"ADB/AR*4,ADA/ARX,AD/A-B-1,AR/AD*.25"
AR_ARX*2	"ADA/ARX,AD/A,AR/AD*2"
AR_ARX*4	"ADB/AR*4,AD/B,AR/ADX"
AR_ARX*4 COMP	"ADB/AR*4,AD/SETCB,AR/ADX"
AR_ARX*AC1	"FMADR/AC1,ADB/FM,ADA/ARX,AR/AD"
AR_ARX*BR	"ADA/ARX,ADB/BR,AR/AD"
AR_ARX*BRX	"ADA/AR,ADB/BR,AR/ADX"
AR_ARX*E1	"E1,ADB/FM,ADA/ARX,AR/AD"
AR_ARX+1	"ADA EN/EN,AD/A+1,AR/ADX"
AR_ARX+1 (AD)	"ADA/ARX,AD/A+1,AR/AD"
AR_ARX+AC0	"ADA/ARX,ADB/FM,FMADR/AC0,AD/A+B,AR/AD"
AR_ARX+AR*4	"ADA/ARX,ADB/AR*4,AD/A+B,AR/AD"
AR_ARX+BR	"ADA/ARX,ADB/BR,AD/A+B,AR/AD"
AR_ARX+BRX	"ADA EN/EN,ADB/BR,AD/A+B,AR/ADX"
AR_ARX+BRX+1	"ADA EN/EN,ADB/BR,AD/A+B+1,AR/ADX"	;[343]
AR_ARX+FM[]	"ADA/ARX,ADB/FM,@1,AD/A+B,AR/AD"
AR_ARX+XR	"GEN ARX+XR,AR/AD"
AR_ARX-1	"ADA EN/EN,AD/A-1,AR/ADX"
AR_ARX-AC3	"ADA/ARX,ADB/FM,FMADR/AC3,AD/A-B,AR/AD"
AR_ARX-BR	"ADA/ARX,ADB/BR,AD/A-B,AR/AD"

AR_BR		"ADB/BR,AD/B,AR/AD"
AR_BR COMP	"ADB/BR,AD/SETCB,AR/AD"
AR_BR COMP LONG	"ADB/BR,AD/SETCB,AR/AD,ARX/ADX"
AR_BR LONG	"ADB/BR,AD/B,AR/AD,ARX/ADX"
AR_BR OR ARX	"ADA/ARX,ADB/BR,AD/OR,AR/AD"
AR_BR*.5	"ADB/BR*2,AD/B,AR/AD*.25"
AR_BR*.5 LONG	"ADB/BR*2,AD/B,AR/AD*.25,ARX/ADX*.25"
AR_BR*2		"ADB/BR*2,AD/B,AR/AD"
AR_BR*2 LONG	"ADB/BR*2,AD/B,AR/AD,ARX/ADX"
AR_BR*4		"ADB/BR*2,AD/B,AR/AD*2"			;[230]
AR_BR*4 LONG	"ADB/BR*2,AD/B,AR/AD*2,ARX/ADX*2"
AR_BR+1		"ADB/BR,ADA EN/0S,AD/A+B+1,AR/AD"
AR_BR+1 LONG	"ADA EN/0S,ADB/BR,AD/A+B+1,AR/AD,ARX/ADX,SPEC/AD LONG"
AR_BRX		"ADB/BR,AD/B,AR/ADX"
AR_BRX+1	"ADA EN/0S,ADB/BR,AD/A+B+1,AR/ADX"

AR_CACHE CNT	"DIAG IN,DIAG FUNC/RD CACHE CNT"
AR_DLEN		"DLEN,AR_FM"
AR_DLEN COMP	"DLEN,ADB/FM,AD/SETCB,AR/AD"
AR_DLEN+1	"DLEN,ADB/FM,ADA EN/0S,AD/A+B+1,AR/AD"
AR_DSTP		"DSTP,AR_FM"
AR_DSTP+1	"DSTP,ADB/FM,ADA EN/0S,AD/A+B+1,AR/AD"
AR_DSTP2	"DSTP2,AR_FM"
AR_DSTP2+1	"DSTP2,ADB/FM,ADA EN/0S,AD/A+B+1,AR/AD"
AR_DSTW		"DSTW,AR_FM"
AR_E0		"E0,AR_FM"
AR_E1		"E1,AR_FM"
AR_EBOX CNT	"DIAG IN,DIAG FUNC/RD EBOX CNT"
AR_EBUS		"AR/EBUS,TIME/5T"
AR_EBUS REG	"DIAG IN,DIAG FUNC/RD EBUS REG"
AR_FILL		"FILL,AR_FM"
AR_FM		"ADB/FM,AD/B,AR/AD"
AR_FM[]		"AR/AD, AD/B, ADB/FM, @1"	;[274]
AR_FM[]+1	"ADA EN/0S,ADB/FM,@1,AD/A+B+1,AR/AD"
.IF/MODEL.B
AR_FM(#)	"FMADR/AC+#,AC-OP/AC+#,ADB/FM,AD/B,AR/AD"
.ENDIF/MODEL.B
AR_FM(VMA)	"FMADR/VMA,ADB/FM,AD/B,AR/AD"
AR_INTERVAL	"DIAG IN,DIAG FUNC/RD INTRVL"

AR_MEM		"MEM/MB WAIT,FMADR/VMA,ADB/FM,AD/B,AR/MEM"
AR_MQ		"ADA/MQ,AD/A,AR/AD"
AR_MQ COMP	"ADA/MQ,AD/SETCA,AR/AD"
AR_MQ*.25	"ADA/MQ,AD/A,AR/AD*.25"
AR_MQ*2		"ADA/MQ,AD/A,AR/AD*2"
AR_MQ*4		"ADA/MQ,AD/A*2,AR/AD*2"
AR_MQ*AC1	"FMADR/AC1,ADB/FM,ADA/MQ,AR/AD"
AR_MQ*AC2	"FMADR/AC2,ADB/FM,ADA/MQ,AR/AD"
AR_MQ*AC3	"FMADR/AC3,ADB/FM,ADA/MQ,AR/AD"
AR_MQ+1		"ADA/MQ,AD/A+1,AR/AD"
AR_MQ+AC0	"FMADR/AC0,ADB/FM,ADA/MQ,AD/A+B,AR/AD"
AR_MQ+BR	"ADA/MQ,ADB/BR,AD/A+B,AR/AD"		;[343]
AR_MQ-1		"ADA/MQ,AD/A-1,AR/AD"
AR_MQ-AC3	"ADA/MQ,ADB/FM,FMADR/AC3,AD/A-B,AR/AD"
AR_MQ-BR	"ADA/MQ,ADB/BR,AD/A-B,AR/AD"
AR_MTR REQ	"DIAG IN,DIAG FUNC/RD MTR REQ"
AR_PC		"ADA/PC,AD/A,AR/AD"
AR_PC FLAGS	"ADMSK,ADB/FM,ADA/PC,AD/ANDCB,AR/AD"
AR_PC+1		"ADA/PC,AD/A+1,AR/AD,SPEC/SAVE FLAGS"
AR_PERF CNT	"DIAG IN,DIAG FUNC/RD PERF CNT"
AR_PERIOD	"DIAG IN,DIAG FUNC/RD PERIOD"
.IF/KLPAGE
AR_PUR+AR0	"PUR,ADB/FM,ADA EN/0S,AD/A+B,SPEC/XCRY AR0,AR/AD"
.ENDIF/KLPAGE

AR_SERIAL	"AR/ARMM,COND/REG CTL,AR CTL/ARR LOAD"
AR_SFLGS	"SFLGS,AR_FM"
AR_SHIFT	"SH/SHIFT AR!ARX,AR/SH"
AR_SIGN		"AD/XCRY-1,SPEC/XCRY AR0,AR/AD"
AR_SLEN		"SLEN,AR_FM"
AR_SLEN COMP	"SLEN,ADB/FM,AD/SETCB,AR/AD"
AR_SLEN+1	"SLEN,ADB/FM,ADA EN/0S,AD/A+B+1,AR/AD"
AR_SRCP		"SRCP,AR_FM"
AR_SRCP+1	"SRCP,ADB/FM,ADA EN/0S,AD/A+B+1,AR/AD"
AR_SRCP2	"SRCP2,AR_FM"
AR_SRCP2+1	"SRCP2,ADB/FM,ADA EN/0S,AD/A+B+1,AR/AD"
AR_SV.AR	"SV.AR,AR_FM"
.IF/KLPAGE
AR_SV.ARX	"SV.ARX,AR_FM"
AR_SV.BR	"SV.BR,AR_FM"
AR_SV.PFW	"SV.PFW,AR_FM"
AR_SV.SC	"SV.SC,AR_FM"
AR_SV.VMA	"SV.VMA,AR_FM"
.ENDIF/KLPAGE
AR_SWD		"SWD,AR_FM"

AR_T0		"T0,AR_FM"
AR_T1		"T1,AR_FM"
AR_T2		"T2,AR_FM"
AR_TIME BASE	"DIAG IN,DIAG FUNC/RD TIME"
.IF/TRXDEF
AR_TRB		"TRB,AR_FM"
AR_TRX		"TRX,AR_FM"
AR_TRX+1	"TRX,ADB/FM,ADA EN/0S,AD/A+B+1,AR/AD"
AR_TRX1		"TRX1,AR_FM"
AR_TRX2		"TRX2,AR_FM"
AR_TRX2+1	"TRX2,ADB/FM,ADA EN/0S,AD/A+B+1,AR/AD"
AR_TRX3		"TRX3,AR_FM"
AR_TRX3+1	"TRX3,ADB/FM,ADA EN/0S,AD/A+B+1,AR/AD"
.ENDIF/TRXDEF
AR_VMA HELD	"COND/SEL VMA,AR_PC"
AR_XR		"FMADR/XR,ADB/FM,AD/B,AR/AD"

.TOC	"CRAM Macros--AR Miscellaneous, ARL, and ARR"

AR+ARX+MQ_0.M	"MEM/ARL IND,CLR/AR+ARX+MQ"
AR+MQ_0.M	"MEM/ARL IND,CLR/AR+MQ"
AR+MQ_0.S	"SPEC/ARL IND,CLR/AR+MQ"

AR0-3 DISP	"SH/AR,DISP/SH0-3"
AR0-8_#		"COND/LD AR0-8,AR/ARMM,ARMM/#"
AR0-8_# AND AR0-8 "SCADA/#,SCADB/AR0-8,SCAD/AND,AR0-8_SCAD#"
AR0-8_# OR AR0-8 "SCADA/#,SCADB/AR0-8,SCAD/OR,AR0-8_SCAD#"
AR0-8_#+SC	"SCADA/#,SCADB/SC,SCAD/A+B,AR0-8_SCAD#"
AR0-8_-SC-1	"SCADA EN/0S,SCADB/SC,SCAD/A-B-1,AR0-8_SCAD"
AR0-8_FE	"SCADA/FE,SCAD/A,AR0-8_SCAD"
AR0-8_FE OR #	"SCADA/FE,SCADB/#,SCAD/OR,AR0-8_SCAD#"
AR0-8_FE OR SC	"SCADA/FE,SCADB/SC,SCAD/OR,AR0-8_SCAD.M"
AR0-8_FE#	"SCADA/FE,SCAD/A,ARMM/SCAD EXP,AR/ARMM,COND/LD AR0-8"
AR0-8_FE+#	"SCADA/FE,SCADB/#,SCAD/A+B,AR0-8_SCAD#"
AR0-8_FE+1	"SCADA/FE,SCAD/A+1,AR0-8_SCAD"
AR0-8_FE+SC	"SCADA/FE,SCADB/SC,SCAD/A+B,AR0-8_SCAD.M"
AR0-8_FE-SC	"SCADA/FE,SCADB/SC,SCAD/A-B,AR0-8_SCAD.M"
AR0-8_FE.M	"SCADA/FE,SCAD/A,AR0-8_SCAD.M"
AR0-8_FE.R	"GEN FE,AR0-8_SCAD.R"
AR0-8_SC	"SCADA EN/0S,SCADB/SC,SCAD/A+B,AR0-8_SCAD"
AR0-8_SCAD	"SPEC/ARL IND,ARL/ARMM,AR0-8/LOAD,ARMM/SCAD EXP"
AR0-8_SCAD#	"ARMM/SCAD EXP,AR/ARMM,COND/LD AR0-8"
AR0-8_SCAD.M	"MEM/ARL IND,ARL/ARMM,AR0-8/LOAD,ARMM/SCAD EXP"
AR0-8_SCAD.R	"ARMM/SCAD EXP,AR/ARMM,COND/REG CTL,AR CTL/AR0-8 LOAD"
AR12-17_PC SEC	"AR/ARMM,VMAX/PC SEC,COND/LD AR9-17"
AR12-17_PREV SEC	"AR/ARMM,VMAX/PREV SEC,COND/LD AR9-17"
AR18-21 DISP	"SH/AR SWAP,DISP/SH0-3"

ARL_0.C		"COND/ARL IND,CLR/ARL"
ARL_0.M		"MEM/ARL IND,CLR/ARL"
ARL_0.S		"SPEC/ARL IND,CLR/ARL"
ARL_0S		"COND/ARL IND,CLR/ARL"
ARL_1.M		"ADA EN/0S,AD/A+1,SPEC/GEN CRY18,MEM/ARL IND,ARL/AD"
ARL_1S		"AD/1S,COND/ARL IND,ARL/AD"
ARL_1S.M	"AD/1S,MEM/ARL IND,ARL/AD"
ARL_AC0		"FMADR/AC0,ADB/FM,AD/B,COND/ARL IND,ARL/AD"
ARL_ARL		"COND/ARL IND,ARL/ARL"
ARL_ARL.M	"MEM/ARL IND,ARL/ARL"
ARL_ARL.S	"SPEC/ARL IND,ARL/ARL"
ARL_ARR		"COND/ARL IND,ARL/SH,SH/AR SWAP"
ARL_ARR.M	"MEM/ARL IND,ARL/SH,SH/AR SWAP"
ARL_ARR.S	"SPEC/ARL IND,ARL/SH,SH/AR SWAP"
ARL_ARX (ADX)	"ADA EN/EN,AD/A,MEM/ARL IND,ARL/ADX"
ARL_ARXL	"SPEC/ARL IND,SH/ARX,ARL/SH"
ARL_ARXL.M	"MEM/ARL IND,SH/ARX,ARL/SH"
ARL_BRL		"ADB/BR,AD/B,COND/ARL IND,ARL/AD"
ARL_BRL.M	"ADB/BR,AD/B,MEM/ARL IND,ARL/AD"
ARL_BRL.S	"ADB/BR,AD/B,SPEC/ARL IND,ARL/AD"
ARL_SHIFT	"MEM/ARL IND,SH/SHIFT AR!ARX,ARL/SH"
ARL_SIGN	"AD/XCRY-1,SPEC/XCRY AR0,COND/ARL IND,ARL/AD"
ARL+ARX+MQ_0.M	"MEM/ARL IND,CLR/ARL+ARX+MQ"
ARL+ARX_0.M	"MEM/ARL IND,CLR/ARL+ARX"

ARR_0.C		"COND/ARL IND,CLR/ARR"
ARR_0.M		"MEM/ARL IND,CLR/ARR"
ARR_0.S		"SPEC/ARL IND,CLR/ARR"
ARR_0S		"AR_0S"
ARR_1S		"AR_1S"
ARR_AC0		"AR_AC0"
ARR_AC0.S	"SPEC/ARL IND,FMADR/AC0,ADB/FM,AD/B,AR/AD"
ARR_AR+1	"AR_AR+1"				;[343]
ARR_AR+BR	"AR_AR+BR"				;[343]
ARR_ARL		"SH/AR SWAP,AR/SH"
ARR_ARR		"AR/AR"
ARR_ARX		"AR_ARX"
ARR_ARX+1	"AR_ARX+1"
ARR_ARX+BRX	"AR_ARX+BRX"
ARR_ARX+BR	"AR_ARX+BR"				;[343]
ARR_ARX-1	"AR_ARX-1"
ARR_BR		"ADB/BR,AD/B,COND/ARL IND,AR/AD"	;[252]
ARR_PC+1	"ADA/PC,AD/A+1,AR/AD"
ARR+MQ_0.S	"SPEC/ARL IND,CLR/ARR+MQ"

.TOC	"CRAM Macros--ARX"

ARX_-2+MQ0	"AD/1S,ARX/ADX*2"			;[343] -2 if MQ0 = 0
ARX_-AC0	"ADA EN/0S,ADB/FM,FMADR/AC0,AD/A-B,ARX/AD"
ARX_-BRX	"ADB/BR,ADA EN/0S,AD/A-B,ARX/ADX"
ARX_-FM[]	"ADA EN/0S,ADB/FM,@1,AD/A-B,ARX/AD"
ARX_-SLEN	"SLEN,ADB/FM,ADA EN/0S,AD/A-B,ARX/AD"
ARX_0.C		"COND/ARL IND,CLR/ARX"
ARX_0.M		"MEM/ARL IND,CLR/ARX"
ARX_0.S		"SPEC/ARL IND,CLR/ARX"
ARX_0S		"AD/0S,ARX/AD"
ARX_1		"ADA EN/0S,AD/A+1,ARX/AD"
ARX_1B1		"ADA EN/0S,AD/A+1,ARX/ADX*.25"
ARX_1B17-1	"ADA EN/0S,AD/A-1,SPEC/GEN CRY18,ARX/AD"
ARX_1S		"AD/1S,ARX/AD"
ARX_2+MQ0	"ADA EN/0S,AD/A+1,ARX/ADX*2"

ARX_AC0		"FMADR/AC0,ADB/FM,AD/B,ARX/AD"
ARX_AC0 COMP	"ADB/FM,FMADR/AC0,AD/SETCB,ARX/AD"
ARX_AC0+1	"ADA EN/0S,ADB/FM,FMADR/AC0,AD/A+B+1,ARX/AD"
ARX_AC1		"FMADR/AC1,ADB/FM,AD/B,ARX/AD"
ARX_AC2		"FMADR/AC2,ADB/FM,AD/B,ARX/AD"
ARX_AC3		"FMADR/AC3,ADB/FM,AD/B,ARX/AD"
ARX_AC4		"AC4,ADB/FM,AD/B,ARX/AD"

ARX_AR		"SH/AR,ARX/SH"
ARX_AR (AD)	"ADA/AR,AD/A,ARX/AD"
ARX_AR AND ADMSK "ADMSK,ADB/FM,ADA/AR,AD/AND,ARX/AD"
ARX_AR ANDCA BR	"ADA/AR,ADB/BR,AD/ANDCA,ARX/AD"
ARX_AR SIGN	"AD/XCRY-1,SPEC/XCRY AR0,ARX/AD"
ARX_AR SWAP	"SH/AR SWAP,ARX/SH"
ARX_AR*2	"ADA/AR,AD/A*2,ARX/AD"			;[343]
ARX_AR*4 COMP	"ADB/AR*4,AD/SETCB,ARX/AD"
ARX_AR*MSK	"MSK,ADB/FM,ADA/AR,ARX/AD"
ARX_AR+1	"ADA/AR,AD/A+1,ARX/AD"
.IF/KLPAGE
ARX_AR+CBR	"CBR,ADB/FM,ADA/AR,AD/A+B,ARX/AD"
.ENDIF/KLPAGE
ARX_AR+FM[]	"ADA/AR,ADB/FM,@1,AD/A+B,ARX/AD"
ARX_AR-1	"ADA/AR,AD/A-1,ARX/AD"
ARX_AR-BR	"ADA/AR,ADB/BR,AD/A-B,ARX/AD"		;[224]
ARX_AR-FM[]	"ADA/AR,ADB/FM,@1,AD/A-B,ARX/AD"
ARX_AR-FM[]-1	"ADA/AR,ADB/FM,@1,AD/A-B-1,ARX/AD"

ARX_ARX AND ADMSK "ADMSK,ADB/FM,ADA/ARX,AD/AND,ARX/AD"
ARX_ARX ANDC ADMSK "ADMSK,ADB/FM,ADA/ARX,AD/ANDCB,ARX/AD"
ARX_ARX*-6	"ADA EN/EN,ADB/AR*4,AD/A-B,ARX/ADX*2"
ARX_ARX*.25	"ADA EN/EN,AD/A,ARX/ADX*.25"
ARX_ARX*.5	"ADA EN/EN,AD/A*2,ARX/ADX*.25"
ARX_ARX*2	"ADA EN/EN,AD/A,ARX/ADX*2"
ARX_ARX*2 COMP	"ADA EN/EN,AD/SETCA,ARX/ADX*2"
ARX_ARX*4	"ADB/AR*4,AD/B,ARX/ADX"
ARX_ARX*4 COMP	"ADB/AR*4,AD/SETCB,ARX/ADX"
ARX_ARX*8	"ADB/AR*4,AD/B,ARX/ADX*2"
ARX_ARX*BRX	"ADA/AR,ADB/BR,ARX/ADX"
ARX_ARX*EXPMSK	"EXPMSK,ADB/FM,ADA/ARX,ARX/AD"		;[224]
ARX_ARX+1	"ADA EN/EN,AD/A+1,ARX/ADX"
ARX_ARX+AC0	"ADA/ARX,ADB/FM,FMADR/AC0,AD/A+B,ARX/AD"
.IF/KLPAGE
ARX_ARX+CBR	"CBR,ADB/FM,ADA/ARX,AD/A+B,ARX/AD"
.ENDIF/KLPAGE
ARX_ARX+FM[]	"ADA/ARX,ADB/FM,@1,AD/A+B,ARX/AD"	;[343]
ARX_ARX-1	"ADA EN/EN,AD/A-1,ARX/ADX"
ARX_ARX-1 (AD)	"ADA/ARX,AD/A-1,ARX/AD"
ARX_ARX-AR*4	"ADA/ARX,ADB/AR*4,AD/A-B,ARX/AD"	;[343]
ARX_ARX-FM[]	"ADA/ARX,ADB/FM,@1,AD/A-B,ARX/AD"
ARX_ARX-FM[]-1	"ADA/ARX,ADB/FM,@1,AD/A-B-1,ARX/AD"

ARX_BR		"ADB/BR,AD/B,ARX/AD"
ARX_BR*2	"ADB/BR*2,AD/B,ARX/AD"
ARX_BR+1	"ADB/BR,ADA EN/0S,AD/A+B+1,ARX/AD"
ARX_BRX		"ADB/BR,AD/B,ARX/ADX"
ARX_BRX COMP	"ADB/BR,AD/SETCB,ARX/ADX"
ARX_BRX+1	"ADA EN/0S,ADB/BR,AD/A+B+1,ARX/ADX"
ARX_DSTP	"DSTP,ARX_FM"
ARX_DSTP2	"DSTP2,ARX_FM"
ARX_E1		"E1,ARX_FM"
ARX_FILL	"FILL,ARX_FM"				;[310]
ARX_FM		"ADB/FM,AD/B,ARX/AD"
ARX_FM[]	"ADB/FM,@1,AD/B,ARX/AD"			;[343]
ARX_FM[]+1	"ADA EN/0S,ADB/FM,@1,AD/A+B+1,ARX/AD"
ARX_FM(VMA)	"FMADR/VMA,ADB/FM,AD/B,ARX/AD"
ARX_MEM		"MEM/MB WAIT,FMADR/VMA,ADB/FM,AD/B,ARX/MEM"
ARX_MQ-1	"ADA/MQ,AD/A-1,ARX/AD"			;[343]
ARX_MQ-FM[]	"ADA/MQ,ADB/FM,@1,AD/A-B,ARX/AD"
ARX_MQ-FM[]-1	"ADA/MQ,ADB/FM,@1,AD/A-B-1,ARX/AD"

ARX_PC		"ADA/PC,AD/A,ARX/AD"
ARX_PC+1	"ADA/PC,AD/A+1,ARX/AD,SPEC/SAVE FLAGS"
ARX_SHIFT	"SH/SHIFT AR!ARX,ARX/SH"
ARX_SRCP	"SRCP,ARX_FM"
ARX_SRCP2	"SRCP2,ARX_FM"
.IF/KLPAGE
ARX_SV.AR	"SV.AR,ARX_FM"
ARX_SV.ARX	"SV.ARX,ARX_FM"
ARX_SV.BR	"SV.BR,ARX_FM"
ARX_SV.VMA	"SV.VMA,ARX_FM"
.ENDIF/KLPAGE
ARX_T0		"T0,ARX_FM"
ARX_T2		"T2,ARX_FM"
.IF/TRXDEF
ARX_TRB		"TRB,ARX_FM"
.ENDIF/TRXDEF
ARX_VMA HELD	"COND/SEL VMA,ARX_PC"
ARX+MQ_0.M	"MEM/ARL IND,CLR/ARX+MQ"
ARX+MQ_0.S	"SPEC/ARL IND,CLR/ARX+MQ"
ARX0_AR35	"ADA/AR,AD/A*2+1,ARX/ADX*.25"	;[337]
ARX0_MQ35	"ADA/MQ,AD/A*2+1,ARX/ADX*.25"
ARX0-3 DISP	"SH/ARX,DISP/SH0-3"

.TOC	"CRAM Macros--B, C, D"

B DISP		"DISP/DRAM B"
B WRITE		"DISP/DRAM B,MEM/B WRITE"
BLKO TIM(L)	"SPEC/MTR CTL,DIAG OUT,DIAG FUNC/LD PA LEFT"
BLKO TIM(R)	"SPEC/MTR CTL,DIAG OUT,DIAG FUNC/LD PA RIGHT"
BR_AR LONG	"BR/AR,BRX/ARX"
BYTE DISP	"DISP/BYTE"
.IFNOT/MODEL.B
BYTE INDRCT	"MEM/BYTE IND,VMA/LOAD"
.IF/MODEL.B
BYTE INDRCT	"MEM/EA CALC,EA CALC/BYTE IND,VMA/LOAD"
BYTE LOAD	"MEM/EA CALC,EA CALC/BYTE LD,VMA/LOAD";[337]
.ENDIF/MODEL.B
BYTE PREV & CLR SR3	"COND/SR_#,#/640"
BYTE PREV & SET SR2	"COND/SR_#,#/622"
BYTE PREV & SET SR3	"COND/SR_#,#/641"
.IF/MODEL.B
BYTE READ	"MEM/EA CALC,EA CALC/BYTE RD,VMA/LOAD"
BYTE READ PC	"MEM/EA CALC,EA CALC/BYTE RD PC,VMA/LOAD"
BYTE RPW	"MEM/EA CALC,EA CALC/BYTE RPW,VMA/LOAD"
.IFNOT/MODEL.B
BYTE READ	"MEM/BYTE RD,VMA/LOAD"
BYTE RPW	"MEM/RPW,VMA/AD"
.ENDIF/MODEL.B

.IF/MODEL.B
CALL		"CALL/CALL"
.IFNOT/MODEL.B
CALL		"SPEC/CALL"
.ENDIF/MODEL.B
CALL []		"CALL, J/@1"
CALL[]		"CALL, J/@1"
.IF/MODEL.B
CALL.C		"CALL/CALL"
CALL.M		"CALL/CALL"
CALL.S		"CALL/CALL"
.IFNOT/MODEL.B
CALL.C		"COND/ARL IND,CALL/CALL"
CALL.M		"MEM/ARL IND,CALL/CALL"
CALL.S		"SPEC/ARL IND,CALL/CALL"
.ENDIF/MODEL.B
.IF/KLPAGE
CBR		"P2"
.ENDIF/KLPAGE
CLR ACC+SET UCODE	"COND/EBOX STATE,#/245"
CLR ACCOUNT EN	"COND/EBOX STATE,#/145"
CLR AR		"COND/AR CLR"
CLR ARX		"COND/ARX CLR"
CLR EBUS DEMAND	"COND/EBUS CTL,EBUS CTL/EBUS NODEMAND"
CLR EXP		"SCADA EN/0S,SCAD/A,EXP_SCAD"
CLR FE		"SCADA EN/0S,SCAD/A,FE/SCAD"
CLR FPD		"SPEC/CLR FPD"
CLR MQ		"COND/REG CTL,MQ/MQ SEL,MQ CTL/0S"
CLR MTR PA EN	"COND/EBOX STATE,#/025"
CLR P		"SCADA EN/0S,SCAD/A,P_SCAD"
CLR PT LINE	"COND/MBOX CTL,MBOX CTL/CLR PT LINE"
CLR PT LINE (KEEP) "COND/MBOX CTL,MBOX CTL/CLR PT LINE(NK)"
CLR SC		"SCADA EN/0S,SCAD/A,SC/SCAD"
CLR SPECIAL CYCLE	"COND/SPEC INSTR,SPEC INSTR/0"
CLR SR2		"COND/SR_#,#/20"
CLR SR3		"COND/SR_#,#/40"
CLR TRACKS EN	"COND/EBOX STATE,#/121"
CLR TRK+PA EN	"COND/EBOX STATE,#/021"
CMS FETCH	"VMA/PC+1,MEM/FETCH,FETCH/SKIP"
COMP FETCH	"AD/XOR,VMA/PC+1,MEM/FETCH,FETCH/COMP"
CONI APR(L)	"DIAG IN,DIAG FUNC/CONI APR(L)"
CONI APR(R)	"DIAG IN,DIAG FUNC/CONI APR(R)"
CONI MTR	"DIAG IN,DIAG FUNC/CONI MTR"
CONI PAG	"DIAG IN,DIAG FUNC/CONI PAG"
CONI PI(L)	"DIAG IN,DIAG FUNC/CONI PI(L)"
CONI PI(PAR)	"DIAG IN,DIAG FUNC/CONI PI(PAR)"
CONI PI(R)	"DIAG IN,DIAG FUNC/CONI PI(R)"
CONO APR	"DIAG OUT,DIAG FUNC/CONO APR"
CONO MTR	"SPEC/MTR CTL,DIAG OUT,DIAG FUNC/CONO MTR"
CONO PAG	"DIAG OUT,DIAG FUNC/CONO PAG"
CONO PI		"DIAG OUT,DIAG FUNC/CONO PI"
CONO TIM	"SPEC/MTR CTL,DIAG OUT,DIAG FUNC/CONO TIM"
CONTINUE	"COND/SPEC INSTR,SPEC INSTR/CONT"
.IF/KLPAGE
CSMSK		"P0"
.ENDIF/KLPAGE

DATAI APR(L)	"DIAG IN,DIAG FUNC/DATAI APR"
DATAI PAG(L)	"DIAG IN,DIAG FUNC/DATAI PAG(L)"
DATAO APR	"DIAG OUT,DIAG FUNC/DATAO APR"
DATAO PAG(L)	"DIAG OUT,DIAG FUNC/DATAO PAG"
DIAG IN		"COND/DIAG FUNC,TIME/5T,AR/EBUS"
DIAG OUT	"COND/DIAG FUNC,TIME/5T,ADA/AR,AD/A"
DISMISS		"SPEC/FLAG CTL,FLAG CTL/DISMISS"
DIVIDE		"FE_FE-1,DISP/DIV,MQ/MQ*2"
DLEN		"FMADR/AC3"
DLEN_AR		"DLEN,FM_AR"
DROP EBUS REQ	"COND/EBUS CTL,EBUS CTL/0"
.IF/MODEL.B
DSTP		"FMADR/AC+#,AC-OP/AC+#,AC#/4"
.IFNOT/MODEL.B
DSTP		"FMADR/AC4"
.ENDIF/MODEL.B
DSTP_AR		"DSTP,FM_AR"
.IF/MODEL.B
DSTP2		"FMADR/AC+#,AC-OP/AC+#,AC#/5"
.ENDIF/MODEL.B
DSTP2_AR	"DSTP2,FM_AR"
DSTW		"R14"
DSTW_AR		"DSTW,FM_AR"

.TOC	"CRAM Macros--E, F"

E0		"R16"
E0_AR		"E0,FM_AR"
E1		"R5"
E1_AR		"E1,FM_AR"
.IF/XADDR
EA MOD DISP	"DISP/EA MOD,AD/1S"
.IFNOT/XADDR
EA MOD DISP	"DISP/EA MOD"
EA TYPE DISP	"DISP/EA TYPE"
.ENDIF/XADDR
EPT FETCH	"MEM/LOAD ARX,SPEC/SP MEM CYCLE,SP MEM/EPT FETCH"
EPT REF		"SPEC/SP MEM CYCLE,SP MEM/EPT"
EPT REF	CACHE	"SPEC/SP MEM CYCLE,SP MEM/EPT CACHE"
EXEC REF	"SPEC/SP MEM CYCLE,SP MEM/EXEC"
EXIT		"DISP/DRAM B,MEM/B WRITE,J/ST0"
EXIT DBL	"MB WAIT,J/ST2AC"	;"I FETCH,J/DSTAC" WHEN TIMING FIXED
EXP TEST	"COND/REG CTL,EXP TST/AR_EXP"
EXP TST		"COND/REG CTL,EXP TST/AR_EXP"
EXPMSK		"R4"		;[224][233]
EXP_-SC-1	"SCADA EN/0S,SCADB/SC,SCAD/A-B-1,EXP_SCAD"
EXP_-SC-1 TST	"SCADA EN/0S,SCADB/SC,SCAD/A-B-1,EXP_SCAD.C,EXP TST"
EXP_1		"SCADA EN/0S,SCAD/A+1,EXP_SCAD"
EXP_FE TST	"SCADA/FE,SCAD/A,EXP_SCAD.C,EXP TST"
EXP_SC		"SCADA EN/0S,SCADB/SC,SCAD/A+B,EXP_SCAD"
EXP_SC.MS	"MEM/ARL IND,ARL/ARMM,COND/LD AR0-8,ARMM/SCAD EXP,EXP_SCAD.MS";[224]
EXP_SCAD	"MEM/ARL IND,ARL/ARMM,AR0-8/LOAD,ARMM/SCAD EXP"
EXP_SCAD.C	"COND/REG CTL,AR CTL/AR0-8 LOAD,AR/ARMM,ARMM/SCAD EXP"
EXP_SCAD.MS	"SCADA EN/0S,SCADB/SC,SCAD/A+B"
EXP_SIGN	"SPEC/ARL IND,ARL/ARMM,AR0-8/LOAD,ARMM/EXP_SIGN"
EXP_SIGN.C	"COND/ARL IND,ARL/ARMM,AR0-8/LOAD,ARMM/EXP_SIGN"
EXP_SIGN.M	"MEM/ARL IND,ARL/ARMM,AR0-8/LOAD,ARMM/EXP_SIGN"
EXP_SIGN.MS	"MEM/ARL IND,ARL/ARMM,COND/LD AR0-8,ARMM/EXP_SIGN";[224]
.IF/MODEL.B
EXT ADDR	"MEM/A RD,#/400,DISP/DRAM B"
EXT BYTE READ	"MEM/EA CALC,EA CALC/BYTE RD,VMA/LOAD,GLOBAL"
EXT BYTE RPW	"MEM/EA CALC,EA CALC/BYTE RPW,VMA/LOAD,GLOBAL";[337]
EXT INDEX	"MEM/A RD,#/400,DISP/DRAM A RD"
EXT INDRCT	"MEM/EA CALC,EA CALC/A IND,VMA/LOAD"
.ENDIF/MODEL.B

FE_#		"SCADA/#,SCAD/A,FE/SCAD"
FE_# AND S	"SCADA/#,SCADB/AR6-11,SCAD/AND,FE/SCAD"
FE_#+AR0-8	"SCADA/#,SCADB/AR0-8,SCAD/A+B,FE/SCAD"
FE_#+SC		"SCADA/#,SCADB/SC,SCAD/A+B,FE/SCAD"
FE_#-SC		"SCADA/#,SCADB/SC,SCAD/A-B,FE/SCAD"
FE_+#		"SCADA EN/0S,SCADB/#,SCAD/A+B,FE/SCAD"
FE_-1		"SCADA EN/0S,SCAD/A-1,FE/SCAD"
FE_-S		"SCADA EN/0S,SCADB/AR6-11,SCAD/A-B,FE/SCAD";[337]
FE_-SC		"SCADA EN/0S,SCADB/SC,SCAD/A-B,FE/SCAD"
FE_-SC-1	"SCADA EN/0S,SCADB/SC,SCAD/A-B-1,FE/SCAD"
FE_1		"SCADA EN/0S,SCAD/A+1,FE/SCAD"
FE_AR0-8	"SCADA EN/0S,SCADB/AR0-8,SCAD/A+B,FE/SCAD"
FE_AR0-8 AND #	"SCADA/#,SCADB/AR0-8,SCAD/AND,FE/SCAD"
FE_AR0-8 COMP	"SCADA EN/0S,SCADB/AR0-8,SCAD/A-B-1,FE/SCAD"
FE_EXP		"SCADA/AR EXP,SCAD/A,FE/SCAD"
FE_EXP+1	"SCADA/AR EXP,SCAD/A+1,FE/SCAD"
FE_EXP+SC	"SCADA/AR EXP,SCADB/SC,SCAD/A+B,FE/SCAD"
FE_EXP-#	"SCADA/AR EXP,SCADB/#,SCAD/A-B,FE/SCAD"
FE_EXP-1	"SCADA/AR EXP,SCAD/A-1,FE/SCAD"
FE_FE AND #	"SCADA/FE,SCADB/#,SCAD/AND,FE/SCAD"
FE_FE AND AR0-8	"SCADA/FE,SCADB/AR0-8,SCAD/AND,FE/SCAD"
FE_FE OR #	"SCADA/FE,SCADB/#,SCAD/OR,FE/SCAD"
FE_FE OR AR0-8	"SCADA/FE,SCADB/AR0-8,SCAD/OR,FE/SCAD"
FE_FE SHRT	"COND/FE SHRT,FE/0"
FE_FE+#		"SCADA/FE,SCADB/#,SCAD/A+B,FE/SCAD"
FE_FE+1		"SCADA/FE,SCAD/A+1,FE/SCAD"
FE_FE+S		"SCADA/FE,SCADB/AR6-11,SCAD/A+B,FE/SCAD"
FE_FE+SC	"SCADA/FE,SCADB/SC,SCAD/A+B,FE/SCAD"
FE_FE-#		"SCADA/FE,SCADB/#,SCAD/A-B,FE/SCAD"
FE_FE-1		"SCADA/FE,SCAD/A-1,FE/SCAD"
FE_FE-S		"SCADA/FE,SCADB/AR6-11,SCAD/A-B,FE/SCAD"
FE_FE-SC	"SCADA/FE,SCADB/SC,SCAD/A-B,FE/SCAD"
FE_FE-SC-1	"SCADA/FE,SCADB/SC,SCAD/A-B-1,FE/SCAD"	;[343]
FE_P		"SCADA/AR0-5,SCAD/A,FE/SCAD"
FE_P AND #	"SCADA/AR0-5,SCADB/#,SCAD/AND,FE/SCAD"
FE_P AND SC	"SCADA/AR0-5,SCADB/SC,SCAD/AND,FE/SCAD"
FE_P OR #	"SCADA/AR0-5,SCADB/#,SCAD/OR,FE/SCAD"
FE_P+1		"SCADA/AR0-5,SCAD/A+1,FE/SCAD"		;[343]
FE_P+SC		"SCADA/AR0-5,SCADB/SC,SCAD/A+B,FE/SCAD"
FE_P-S		"SCADA/AR0-5,SCADB/AR6-11,SCAD/A-B,FE/SCAD"
FE_S		"SCADA EN/0S,SCADB/AR6-11,SCAD/A+B,FE/SCAD"
FE_S+#		"SCADA/#,SCADB/AR6-11,SCAD/A+B,FE/SCAD"
FE_SC		"SCADA EN/0S,SCADB/SC,SCAD/A+B,FE/SCAD"

.IF/MODEL.B
FETCH		"MEM/IFET"
FETCH+1		"COND/VMA INC,MEM/IFET"
.IFNOT/MODEL.B
FETCH		"MEM/FETCH,FETCH/UNCOND"
FETCH+1		"COND/VMA INC,MEM/FETCH,FETCH/UNCOND"
.ENDIF/MODEL.B
FETCH WAIT	"MEM/MB WAIT"		;See edit 111
FILL		"R13"
FILL_AR		"FILL,FM_AR"
FIN LOAD	"ADB/FM,FMADR/VMA,AD/B"	;Finish load of AR or ARX, start new op
FIN STORE	"FMADR/VMA"		;FINISH STORE, start new operation
FIN XFER	"FMADR/VMA,ADB/FM,AD/B"	;Same as FIN LOAD
FINISH		"J/FINI"	;USE INSTEAD OF NXT INSTR IF FM WRITE
FM_AR		"COND/FM WRITE"
FM[]_AR		"@1, FM_AR"
.IF/MODEL.B
FM(#)_AR	"FMADR/AC+#,AC-OP/AC+#,COND/FM WRITE"
.ENDIF/MODEL.B
FORCE AR-ARX	"ADB/AR*4,AD/B,AR/AD*.25,ARX/ADX*.25"

.TOC	"CRAM Macros--G, H, I, J, L"

GEN # AND AR0-8	"SCADA/#,SCADB/AR0-8,SCAD/AND"
GEN #+AR0-8	"SCADA/#,SCADB/AR0-8,SCAD/A+B"
GEN #+SC	"SCADA/#,SCADB/SC,SCAD/A+B"
GEN #-SC	"SCADA/#,SCADB/SC,SCAD/A-B"
GEN -AR LONG	"ADB/AR*4,ADA EN/0S,AD/A-B,SPEC/AD LONG"
GEN -AR*4	"ADA EN/0S,ADB/AR*4,AD/A-B"
GEN -SC		"SCADB/SC,SCADA EN/0S,SCAD/A-B"
GEN -SC-1	"SCADB/SC,SCADA EN/0S,SCAD/A-B-1"
GEN 0S		"AD/0S"
GEN 2AR		"ADA/AR, AD/A*2"

GEN AC0		"FMADR/AC0,ADB/FM,AD/B"
GEN AC0+1	"FMADR/AC0,ADB/FM,ADA EN/0S,AD/A+B+1"
GEN AR		"ADA/AR,AD/A"
GEN AR*AC0	"FMADR/AC0,ADB/FM,ADA/AR"
GEN AR*BR	"ADA/AR,ADB/BR"
GEN AR*T0	"T0,ADB/FM,ADA/AR"
GEN AR+1	"ADA/AR,AD/A+1"
GEN AR+2BR	"ADA/AR,ADB/BR*2,AD/A+B"
GEN AR+BR	"ADA/AR,ADB/BR,AD/A+B"
GEN AR+E1	"E1,ADB/FM,ADA/AR,AD/A+B"
GEN AR+FM[]	"ADA/AR,ADB/FM,@1,AD/A+B"
GEN AR+XR	"FMADR/XR,ADB/FM,ADA/AR,AD/A+B"
GEN AR-2BR	"ADA/AR,ADB/BR*2,AD/A-B"
GEN AR-AC3	"FMADR/AC3,ADB/FM,ADA/AR,AD/A-B"
GEN AR-BR	"ADA/AR,ADB/BR,AD/A-B"
GEN AR-BR-1	"GEN AR*BR,AD/A-B-1"
GEN AR-FM[]	"ADA/AR,ADB/FM,@1,AD/A-B"
GEN AR0-8	"SCADA EN/0S,SCADB/AR0-8,SCAD/OR"
GEN ARX		"ADA/ARX,AD/A"
GEN ARX COMP	"ADA/ARX,AD/SETCA"
GEN ARX*BR	"ADA/ARX,ADB/BR"		;[224]
GEN ARX*BRX	"ADA EN/EN,ADB/BR"
GEN ARX+1	"ADA/ARX,AD/A+1"
GEN ARX+XR	"FMADR/XR,ADB/FM,ADA/ARX,AD/A+B"
GEN ARX-1	"ADA/ARX,AD/A-1"

GEN BR		"ADB/BR,AD/B"
GEN BR*2	"ADB/BR*2,AD/B"
GEN BR+ARX	"ADA/ARX,ADB/BR,AD/A+B"		;[230]
GEN BRX+1	"ADA EN/0S,ADB/BR,AD/A+B+1"
GEN CRY18	"SPEC/GEN CRY18"
GEN E1		"E1, ADB/FM, AD/B"
GEN FE		"SCADA/FE,SCAD/A"
GEN FE AND #	"SCADA/FE,SCADB/#,SCAD/AND"
GEN FE AND AR0-8 "SCADA/FE,SCADB/AR0-8,SCAD/AND"
GEN FE AND S	"SCADA/FE,SCADB/AR6-11,SCAD/AND"
GEN FE AND SC	"SCADA/FE,SCADB/SC,SCAD/AND"
GEN FE OR AR0-8	"SCADA/FE,SCADB/AR0-8,SCAD/OR"	;[347]
GEN FE+#	"SCADA/FE,SCADB/#,SCAD/A+B"
GEN FE-#	"SCADA/FE,SCADB/#,SCAD/A-B"
GEN FE-1	"SCADA/FE,SCAD/A-1"
GEN FE-S	"SCADA/FE,SCADB/AR6-11,SCAD/A-B"
GEN FE-SC	"SCADA/FE,SCADB/SC,SCAD/A-B"
GEN FE-SC-1	"SCADA/FE,SCADB/SC,SCAD/A-B-1"	; [303] For DPB to top byte
GEN MQ		"ADA/MQ,AD/A"
GEN MQ-AR	"ADA/MQ,ADB/AR,AD/A-B"
GEN P AND #	"SCADA/AR0-5,SCADB/#,SCAD/AND"
GEN P AND SC	"SCADA/AR0-5,SCADB/SC,SCAD/AND"
GEN P+SC	"SCADA/AR0-5,SCADB/SC,SCAD/A+B"
GEN P-#		"SCADA/AR0-5,SCADB/#,SCAD/A-B"		;[337]
GEN P-S		"SCADA/AR0-5,SCADB/AR6-11,SCAD/A-B"
GEN P-SC	"SCADA/AR0-5,SCADB/SC,SCAD/A-B"
GEN SC		"SCADB/SC,SCADA EN/0S,SCAD/A+B"
GEN SCAD 0S	"SCADA EN/0S,SCAD/A"
GEN T1		"T1,ADB/FM,AD/B"
GEN T2		"T2,ADB/FM,AD/B"
GET ECL EBUS	"COND/EBUS CTL,EBUS CTL/GRAB EEBUS"
GLOBAL		"SH/1"

HALT		"SPEC/FLAG CTL,FLAG CTL/HALT"
HARDPFW		"R17"				;Hard page fail word

.IF/MODEL.B
I FETCH		"VMA/PC+1,MEM/IFET"
.IFNOT/MODEL.B
I FETCH		"VMA/PC+1,MEM/FETCH,FETCH/UNCOND"
.ENDIF/MODEL.B
INDEXED		"SH/2"
INH CRY18	"SPEC/INH CRY18"
IO INIT		"COND/EBUS CTL,EBUS CTL/IO INIT"
IR DISP		"DISP/DRAM J"

JFCL FETCH	"VMA/PC+1,MEM/FETCH,FETCH/JFCL"
JFCL S		"SPEC/FLAG CTL,FLAG CTL/JFCL+LD"
JFCL T		"SPEC/FLAG CTL,FLAG CTL/JFCL"
JUMP FETCH	"VMA/PC+1,MEM/FETCH,FETCH/JUMP"

LD PCS		"COND/DIAG FUNC,TIME/5T,DIAG FUNC/LD PCS+CWSX,ADA/ARX,AD/A"
LD PREV CTXT	"COND/DIAG FUNC,TIME/5T,DIAG FUNC/LD PCS+CWSX,ADA/PC,AD/A"
LOAD AR		"MEM/LOAD AR"
.IF/MODEL.B
LOAD AR (RPW)	"MEM/RPW"
LOAD AR (WR TST)	"MEM/EA CALC,EA CALC/LD AR+WR"
.ENDIF/MODEL.B
LOAD ARX	"MEM/LOAD ARX"
.IF/MODEL.B
LOAD ARX (WR TST)	"MEM/EA CALC,EA CALC/LD ARX+WR"
.ENDIF/MODEL.B
LOAD EBR	"MEM/REG FUNC,MREG FNC/LOAD EBR"
.IF/MODEL.B
LOAD IR		"COND/LOAD IR,PXCT/0"
.IFNOT/MODEL.B
LOAD IR		"COND/LOAD IR"
.ENDIF/MODEL.B
LOAD UBR	"MEM/REG FUNC,MREG FNC/LOAD UBR"
.IF/BLT.PXCT
LOAD VMA(EA)_ARX+BR "VMA/LOAD,MEM/EA CALC,EA CALC/LD AR(EA),ADA/ARX,ADB/BR,AD/A+B"
.IFNOT/BLT.PXCT
LOAD VMA(EA)_ARX+BR "ADA/ARX,ADB/BR,AD/A+B,VMA/AD,LOAD AR"
.ENDIF/BLT.PXCT
.IF/MODEL.B
LONG EN		"COND/LONG EN"
.ENDIF/MODEL.B

.TOC	"CRAM Macros--M, N, O, P"

MAP		"MEM/REG FUNC,MREG FNC/MAP"
MB WAIT		"MEM/MB WAIT"
MEM_AR		"FMADR/VMA,MEM/MB WAIT"

MQ_0.C		"COND/ARL IND,CLR/MQ"
MQ_0.M		"MEM/ARL IND,CLR/MQ"
MQ_0.S		"SPEC/ARL IND,CLR/MQ"
MQ_1		"ADA EN/0S,AD/A+1,MQ_AD"
MQ_1S		"COND/REG CTL,MQ/MQM SEL,MQ CTL/1S"
MQ_AD		"COND/REG CTL,MQ/MQM SEL,MQ CTL/AD"
MQ_AR		"SH/AR,MQ/SH"
MQ_AR (AD)	"ADA/AR,AD/A,MQ_AD"
MQ_AR COMP	"ADA/AR,AD/SETCA,MQ_AD"
MQ_AR SWAP	"SH/AR SWAP,MQ/SH"
MQ_ARX		"SH/ARX,MQ/SH"
MQ_ARX COMP	"ADA/ARX,AD/SETCA,MQ_AD"
MQ_BR		"ADB/BR,AD/B,MQ_AD"
MQ_BR COMP	"ADB/BR,AD/SETCB,MQ_AD"
MQ_FM[]		"ADB/FM,@1,AD/B,MQ_AD"			;[343]
MQ_MQ*.25	"SPEC/MQ SHIFT,MQ/MQ*.25"
MQ_MQ*2		"SPEC/MQ SHIFT,MQ/MQ*2"
MQ_MQ*BR	"ADA/MQ, ADB/BR, MQ_AD"
MQ_MQ-1		"ADA/MQ,AD/A-1,MQ_AD"			;[343]
MQ_SHIFT	"SH/SHIFT AR!ARX,MQ/SH"

MSK		"R7"
MSK_AR		"MSK,FM_AR"
MUL		"FE_FE+1,DISP/MUL,MQ/MQ*.25"


NO CRY		"AD/SETCA"
NORM		"DISP/NORM"
NORM -AR	"ADA EN/0S,ADB/AR*4,AD/A-B,AR/AD*.25,ARX/ADX*.25,DISP/NORM"
NORM AR		"ADB/AR*4,AD/B,DISP/NORM"
NXT INSTR	"MEM/MB WAIT,DISP/NICOND,#/0,CLR SC,CLR FE,J/NEXT"

OPTIONS		"ISTAT/OPTIONS,KLPAGE/OPTIONS,LONGPC/OPTIONS,NONSTD/OPTIONS,PV/OPTIONS"

P_#		"SCADA/#,SCAD/A,P_SCAD#"
P_#-S		"SCADA/#,SCADB/AR6-11,SCAD/A-B,P_SCAD#"
P_#-SC		"SCADA/#,SCADB/SC,SCAD/A-B,P_SCAD#"	;[343]
P_-SC		"SCADA EN/0S,SCADB/SC,SCAD/A-B,P_SCAD"
P_0		"SCADA EN/0S,SCAD/A,P_SCAD"
P_1S		"SCADA EN/0S,SCAD/A-1,P_SCAD"
P_FE		"SCADA/FE,SCAD/A,P_SCAD"
P_FE OR SC	"SCADA/FE,SCADB/SC,SCAD/OR,P_SCAD"
P_FE+SC		"SCADA/FE,SCADB/SC,SCAD/A+B,P_SCAD.C"
P_FE-S		"SCADA/FE,SCADB/AR6-11,SCAD/A-B,P_SCAD.C"
P_FE-S.S	"SCADA/FE,SCADB/AR6-11,SCAD/A-B,P_SCAD.S"
P_FE.C		"SCADA/FE,SCAD/A,P_SCAD#"
P_P AND #	"SCADA/AR0-5,SCADB/#,SCAD/AND,P_SCAD#"
P_P AND SC	"SCADA/AR0-5,SCADB/SC,SCAD/AND,P_SCAD"
P_P OR #	"SCADA/AR0-5,SCADB/#,SCAD/OR,P_SCAD#"
P_P OR SC	"SCADA/AR0-5,SCADB/SC,SCAD/OR,P_SCAD"
P_P OR SC#	"SCADA/AR0-5,SCADB/SC,SCAD/OR,P_SCAD#"
P_P+#		"SCADA/AR0-5,SCADB/#,SCAD/A+B,P_SCAD#"
P_P+1		"SCADA/AR0-5,SCAD/A+1,P_SCAD#"		;[337]
P_P+S		"SCADA/AR0-5,SCADB/AR6-11,SCAD/A+B,P_SCAD"
P_P+S.C		"SCADA/AR0-5,SCADB/AR6-11,SCAD/A+B,P_SCAD#"
P_P-S		"SCADA/AR0-5,SCADB/AR6-11,SCAD/A-B,P_SCAD"
P_SC		"SCADA EN/0S,SCADB/SC,SCAD/A+B,P_SCAD"
P_SC#		"SCADA EN/0S,SCADB/SC,SCAD/A+B,P_SCAD#"
P_SCAD		"MEM/ARL IND,ARL/ARMM,AR0-8/LOAD,ARMM/SCAD POS"
P_SCAD#		"COND/LD AR0-8,AR/ARMM,ARMM/SCAD POS"
P_SCAD.C	"COND/ARL IND,ARL/ARMM,AR0-8/LOAD,ARMM/SCAD POS"
P_SCAD.S	"SPEC/ARL IND,ARL/ARMM,AR0-8/LOAD,ARMM/SCAD POS"

P0		"FMADR/#B#,ACB/PAGB,AC#/0"	Paging AC 0
P1		"FMADR/#B#,ACB/PAGB,AC#/1"
P10		"FMADR/#B#,ACB/PAGB,AC#/10"
P11		"FMADR/#B#,ACB/PAGB,AC#/11"
P12		"FMADR/#B#,ACB/PAGB,AC#/12"
P13		"FMADR/#B#,ACB/PAGB,AC#/13"
P14		"FMADR/#B#,ACB/PAGB,AC#/14"
P15		"FMADR/#B#,ACB/PAGB,AC#/15"
P16		"FMADR/#B#,ACB/PAGB,AC#/16"
P17		"FMADR/#B#,ACB/PAGB,AC#/17"
P2		"FMADR/#B#,ACB/PAGB,AC#/2"
P3		"FMADR/#B#,ACB/PAGB,AC#/3"
P4		"FMADR/#B#,ACB/PAGB,AC#/4"
P5		"FMADR/#B#,ACB/PAGB,AC#/5"
P6		"FMADR/#B#,ACB/PAGB,AC#/6"
P7		"FMADR/#B#,ACB/PAGB,AC#/7"

PC_VMA		"SPEC/LOAD PC"
PF DISP		"DISP/PG FAIL"
.IF/KLPAGE
PFA		"P4"
PFA_AR		"PFA,COND/FM WRITE"
.ENDIF/KLPAGE
PHYS REF	"SPEC/SP MEM CYCLE,SP MEM/UNPAGED"
PHYS REF CACHE	"SPEC/SP MEM CYCLE,SP MEM/UNPAGED+CACHED"
.IF/MODEL.B
POP AR		"MEM/EA CALC,EA CALC/POP AR,VMA/LOAD"
POP AR-ARX	"MEM/EA CALC,EA CALC/POP AR-ARX,VMA/LOAD"
POP ARX		"MEM/EA CALC,EA CALC/POP ARX,VMA/LOAD"
.ENDIF/MODEL.B
PORTAL		"SPEC/FLAG CTL,FLAG CTL/PORTAL"
PT FETCH	"MEM/LOAD ARX,SPEC/SP MEM CYCLE,SP MEM/PT FETCH"
PT REF		"SPEC/SP MEM CYCLE,SP MEM/PT"
PT SEL_INVAL	"COND/MBOX CTL,MBOX CTL/PT DIR CLR"
PT SEL_INVAL (KEEP) "COND/MBOX CTL,MBOX CTL/PT DIR CLR(NK)"
PT SEL_NORMAL	"COND/MBOX CTL,MBOX CTL/NORMAL"
.IF/KLPAGE
PUR		"P1"
.ENDIF/KLPAGE
.IF/MODEL.B
PUSH		"MEM/EA CALC,EA CALC/PUSH,VMA/LOAD,SPEC/STACK UPDATE"
.ENDIF/MODEL.B

.TOC	"CRAM Macros--R"

R0		"FMADR/#B#,ACB/MICROB,AC#/0"	Scratch register 0
R1		"FMADR/#B#,ACB/MICROB,AC#/1"	Scratch register 1
R10		"FMADR/#B#,ACB/MICROB,AC#/10"	Scratch register 10
R11		"FMADR/#B#,ACB/MICROB,AC#/11"	Scratch register 11
R12		"FMADR/#B#,ACB/MICROB,AC#/12"	Scratch register 12
R13		"FMADR/#B#,ACB/MICROB,AC#/13"	Scratch register 13
R14		"FMADR/#B#,ACB/MICROB,AC#/14"	Scratch register 14
R15		"FMADR/#B#,ACB/MICROB,AC#/15"	Scratch register 15
R16		"FMADR/#B#,ACB/MICROB,AC#/16"	Scratch register 16
R17		"FMADR/#B#,ACB/MICROB,AC#/17"	Scratch register 17
R2		"FMADR/#B#,ACB/MICROB,AC#/2"	Scratch register 2
R3		"FMADR/#B#,ACB/MICROB,AC#/3"	Scratch register 3
R4		"FMADR/#B#,ACB/MICROB,AC#/4"	Scratch register 4
R5		"FMADR/#B#,ACB/MICROB,AC#/5"	Scratch register 5
R6		"FMADR/#B#,ACB/MICROB,AC#/6"	Scratch register 6
R7		"FMADR/#B#,ACB/MICROB,AC#/7"	Scratch register 7

RD+CLR C CNT	"SPEC/MTR CTL,AR_CACHE CNT"
RD+CLR E CNT	"SPEC/MTR CTL,AR_EBOX CNT"
RD+CLR PA	"SPEC/MTR CTL,AR_PERF CNT"
RD+CLR TB	"SPEC/MTR CTL,AR_TIME BASE"
.IF/MODEL.B
READ BP2	"MEM/EA CALC,EA CALC/BYTE IND,VMA/VMA,COND/VMA INC"
.ENDIF/MODEL.B
READ EBR	"MEM/REG FUNC,MREG FNC/READ EBR"
READ ERA	"MEM/REG FUNC,MREG FNC/READ ERA"
READ UBR	"MEM/REG FUNC,MREG FNC/READ UBR"
REL EBUS	"COND/EBUS CTL,EBUS CTL/REL EBUS"
REL ECL EBUS	"COND/EBUS CTL,EBUS CTL/REL EEBUS"
REQ EBUS	"COND/EBUS CTL,EBUS CTL/REQ EBUS"
.IF/KLPAGE
REQ SV.VMA	"SV.VMA,ADB/FM,AD/B,VMA/1,MEM/AD FUNC"
REQ VMA HELD	"COND/SEL VMA,ADA/PC,AD/A,VMA/1,MEM/AD FUNC"
.ENDIF/KLPAGE

RET[]		"DISP/RETURN,J/@1"
RETURN []	"DISP/RETURN,J/@1"
RETURN0		"DISP/RETURN,J/0"
RETURN1		"DISP/RETURN,J/1"
RETURN10	"DISP/RETURN,J/10"
RETURN12	"DISP/RETURN,J/12"
RETURN15	"DISP/RETURN,J/15"			;[343]
RETURN16	"DISP/RETURN,J/16"			;[337]
RETURN17	"DISP/RETURN,J/17"			;[337]
RETURN2		"DISP/RETURN,J/2"
RETURN20	"DISP/RETURN,J/20"
RETURN3		"DISP/RETURN,J/3"
RETURN30	"DISP/RETURN,J/30"
RETURN37	"DISP/RETURN,J/37"
RETURN4		"DISP/RETURN,J/4"
RETURN5		"DISP/RETURN,J/5"
RETURN6		"DISP/RETURN,J/6"
RETURN7		"DISP/RETURN,J/7"
RSTR FLAGS_AR	"SPEC/FLAG CTL,FLAG CTL/RSTR FLAGS"
.IF/KLPAGE
RSTR VMA_ARX	"ADA/ARX,AD/A,VMA/LOAD,MEM/RESTORE VMA"
RSTR VMA_MQ	"ADA/MQ,AD/A,VMA/LOAD,MEM/RESTORE VMA"
RSTR VMA_SV.VMA	"SV.VMA,ADB/FM,AD/B,VMA/LOAD,MEM/RESTORE VMA"
.ENDIF/KLPAGE

.TOC	"CRAM Macros--S"

.IF/KLPAGE
SBR		"P3"
.ENDIF/KLPAGE
SBUS DIAG	"MEM/REG FUNC,MREG FNC/SBUS DIAG"

SC_#		"SCADA/#,SCAD/A,SC/SCAD"
SC_# AND AR0-8	"SCADA/#,SCADB/AR0-8,SCAD/AND,SC/SCAD"
SC_# AND S	"SCADA/#,SCADB/AR6-11,SCAD/AND,SC/SCAD"
SC_# OR SC	"SCADA/#,SCADB/SC,SCAD/OR,SC/SCAD"
SC_#+AR0-8	"SCADA/#,SCADB/AR0-8,SCAD/A+B,SC/SCAD"
SC_#+SC		"SCADA/#,SCADB/SC,SCAD/A+B,SC/SCAD"
SC_#-S		"SCADA/#,SCADB/AR6-11,SCAD/A-B,SC/SCAD"
SC_#-SC		"SCADA/#,SCADB/SC,SCAD/A-B,SC/SCAD"
SC_#-SC-1	"SCADA/#,SCADB/SC,SCAD/A-B-1,SC/SCAD"
SC_-S		"SCADA EN/0S,SCADB/AR6-11,SCAD/A-B,SC/SCAD";[343]
SC_-SC		"SCADA EN/0S,SCADB/SC,SCAD/A-B,SC/SCAD"
SC_-SC-1	"SCADA EN/0S,SCADB/SC,SCAD/A-B-1,SC/SCAD"
SC_0		"SCADA EN/0S,SCAD/A,SC/SCAD"
SC_1		"SCADA EN/0S,SCAD/A+1,SC/SCAD"
SC_1S		"SCADA EN/0S,SCAD/A-1,SC/SCAD"
SC_AR0-8	"SCADA EN/0S,SCADB/AR0-8,SCAD/A+B,SC/SCAD" ;[231]
SC_EA		"SPEC/SCM ALT,SC/AR SHIFT"
SC_EXP		"SCADA/AR EXP,SCAD/A,SC/SCAD"
SC_EXP+1	"SCADA/AR EXP,SCAD/A+1,SC/SCAD"
SC_EXP+SC	"SCADA/AR EXP,SCADB/SC,SCAD/A+B,SC/SCAD"
SC_EXP-#	"SCADA/AR EXP,SCADB/#,SCAD/A-B,SC/SCAD"
SC_EXP-1	"SCADA/AR EXP,SCAD/A-1,SC/SCAD"
SC_EXP-SC	"SCADA/AR EXP,SCADB/SC,SCAD/A-B,SC/SCAD"
SC_FE		"SPEC/SCM ALT,SC/FE"
SC_FE AND #	"SCADA/FE,SCADB/#,SCAD/AND,SC/SCAD"
SC_FE#		"SCADA/FE,SCAD/A,SC/SCAD"	  ;[337] If SPEC is in conflict
SC_FE+#		"SCADA/FE,SCADB/#,SCAD/A+B,SC/SCAD"
SC_FE+1		"SCADA/FE,SCAD/A+1,SC/SCAD"
SC_FE+S		"SCADA/FE,SCADB/AR6-11,SCAD/A+B,SC/SCAD"
SC_FE+SC	"SCADA/FE,SCADB/SC,SCAD/A+B,SC/SCAD"
SC_FE-#		"SCADA/FE,SCADB/#,SCAD/A-B,SC/SCAD"
SC_FE-1		"SCADA/FE,SCAD/A-1,SC/SCAD"
SC_FE-SC	"SCADA/FE,SCADB/SC,SCAD/A-B,SC/SCAD"
SC_FE-SC-1	"SCADA/FE,SCADB/SC,SCAD/A-B-1,SC/SCAD"
SC_P		"SCADA/AR0-5,SCAD/A,SC/SCAD"
SC_P AND #	"SCADA/AR0-5,SCADB/#,SCAD/AND,SC/SCAD"
SC_P AND SC	"SCADA/AR0-5,SCADB/SC,SCAD/AND,SC/SCAD"
SC_P+1		"SCADA/AR0-5,SCAD/A+1,SC/SCAD"		;[337]
SC_P+S		"SCADA/AR0-5,SCADB/AR6-11,SCAD/A+B,SC/SCAD";[343]
SC_P-#		"SCADA/AR0-5,SCADB/#,SCAD/A-B,SC/SCAD"
SC_S		"SCADB/AR6-11,SCADA EN/0S,SCAD/A+B,SC/SCAD"
SC_SC AND #	"SCADA/#,SCADB/SC,SCAD/AND,SC/SCAD"

.IF/MODEL.B
SEL AC4		"AC-OP/AC+#,AC#/4"
SEL DSTP	"AC-OP/AC+#,AC#/4"
SEL DSTP2	"AC-OP/AC+#,AC#/5"
.ENDIF/MODEL.B
SET ACC+CLR UCODE	"COND/EBOX STATE,#/005"
SET ACCOUNT EN	"COND/EBOX STATE,#/105"
SET AROV	"COND/PCF_#,PC FLAGS/AROV"
SET CONS XCT	"COND/SPEC INSTR,SPEC INSTR/CONS XCT"
SET DATAI	"COND/EBUS CTL,EBUS CTL/DATAI,AD/0S,AR/AD"
SET DATAO	"COND/EBUS CTL,EBUS CTL/DATAO"
SET EBUS DEMAND	"COND/EBUS CTL,EBUS CTL/EBUS DEMAND"
SET FL NO DIV	"COND/PCF_#,PC FLAGS/FDV CHK"
SET FLAGS_AR	"SPEC/FLAG CTL,FLAG CTL/SET FLAGS"
SET FLOV	"COND/PCF_#,PC FLAGS/FLOV"
SET FPD		"COND/PCF_#,PC FLAGS/FPD"
SET FXU		"COND/PCF_#,PC FLAGS/FXU"	;[224]
SET HALTED	"COND/SPEC INSTR,SPEC INSTR/HALTED"
SET IO PF	"COND/MBOX CTL,MBOX CTL/SET IO PF ERR"
SET MTR PA EN	"COND/EBOX STATE,#/225"
SET NO DIVIDE	"COND/PCF_#,PC FLAGS/DIV CHK"
SET PC+1 INH	"COND/SPEC INSTR,SPEC INSTR/INH PC+1"
SET PI CYCLE	"COND/SPEC INSTR,SPEC INSTR/SET PI CYCLE"
SET PXCT	"COND/SPEC INSTR,SPEC INSTR/PXCT"
SET SR1		"COND/SR_#,#/64"
SET SR2		"COND/SR_#,#/62"
SET SR3		"COND/SR_#,#/61"
SET SXCT	"COND/SPEC INSTR,SPEC INSTR/SXCT"
SET TRACKS EN	"COND/EBOX STATE,#/131"
SET TRK+PA EN	"COND/EBOX STATE,#/231"
SFLGS		"FMADR/AC0"
SFLGS_AR	"SFLGS,FM_AR"
SH DISP		"SH/SHIFT AR!ARX,DISP/SH0-3"
SIGNS DISP	"DISP/SIGNS"
SKIP FETCH	"ADA/AR,AD/A,VMA/PC+1,MEM/FETCH,FETCH/SKIP"

SKP -EBUS GRANT	"SKIP/-EBUS GRANT"
SKP -EBUS XFER	"SKIP/-EBUS XFER"
.IF/MODEL.B
SKP -LOCAL AC ADDR	"SKIP/-LOCAL AC ADDR"
.ENDIF/MODEL.B
SKP -START	"SKIP/-START"
.IF/MODEL.B
SKP -VMA SEC0	"SKIP/-VMA SEC0"
.ENDIF/MODEL.B
SKP AC EQ 0	"SKIP/AC#0"			;[343] More mnemonic than AC#0
SKP AC REF	"SKIP/AC REF"
SKP AC#0	"SKIP/AC#0"
SKP AC0+	"FMADR/AC0,ADB/FM,AD/SETCB,SKIP/AD0"
SKP AC0-	"FMADR/AC0,ADB/FM,AD/B,SKIP/AD0"
SKP AD NE	"SKIP/AD#0"
SKP AD NZ	"SKIP/AD#0"			;Mnemonic synonym
SKP AD0		"SKIP/AD0"
SKP ADX0	"SKIP/ADX0"
SKP AR EQ	"ADA EN/0S,ADB/AR*4,AD/ORCB+1,SKIP/AD CRY0"
SKP AR EQ -1	"ADA/AR,AD/CRY A EQ -1,SKIP/AD CRY0"
SKP AR GT BR	"ADA/AR,ADB/BR,AD/XOR,SKIP/AD CRY0"
SKP AR NE	"ADA/AR,AD/CRY A#0,SKIP/AD CRY0"
SKP AR NE BR	"ADA/AR,ADB/BR,AD/XOR,SKIP/AD#0"
SKP AR NZ	"ADA/AR,AD/A,SKIP/AD#0"			;[343]
SKP AR SIG	"ADA/AR,AD/A+XCRY,SPEC/XCRY AR0,SKIP/AD#0"
SKP AR0		"SKIP/AR0"
SKP AR1		"ADA/AR,AD/A*2,SKIP/AD0"
SKP AR18	"SKIP/AR18"
SKP AR2		"ADB/AR*4,AD/B,SKIP/AD0"
SKP AR6		"SCADB/AR6-11,SCADA/#,#/40,SCAD/AND,SKIP/SCAD#0"
SKP ARX LE BRX	"ADA EN/EN,ADB/BR,AD/A-B-1,SKIP/ADX0"
SKP ARX LT BRX	"ADA EN/EN,ADB/BR,AD/A-B,SKIP/ADX0"
SKP ARX NE	"ADA/ARX,AD/CRY A#0,SKIP/AD CRY0"
SKP ARX NZ	"ADA/ARX,AD/A,SKIP/AD#0"		;[343]
SKP ARX+MQ NE	"ADA/MQ,AD/CRY A#0,SPEC/AD LONG,SKIP/AD CRY0"
SKP ARX0	"SKIP/ARX0"
SKP ARX2	"ADB/AR*4,AD/B,SKIP/ADX0"

SKP BR EQ	"ADA EN/0S,ADB/BR,AD/CRY A GE B,SKIP/AD CRY0"
SKP BR EQ -1	"ADA EN/0S,ADB/BR,AD/A+B+1,SKIP/AD CRY0"
SKP BR0		"SKIP/BR0"
SKP CRY0	"SKIP/AD CRY0"
SKP EVEN PAR	"SKIP/EVEN PAR"
SKP EXP NE	"SCADA/AR EXP,SCAD/A,SKIP/SCAD#0"
SKP FE NZ	"SCADA/FE,SCAD/A,SKIP/SCAD#0"
SKP FE0		"SCADA/FE,SCAD/A,SKIP/SCAD0"
SKP FETCH	"SKIP/FETCH"
SKP INTRPT	"SKIP/INTRPT"
SKP IO LEGAL	"SKIP/IO LEGAL"
SKP KERNEL	"SKIP/KERNEL"
SKP MQ EQ -1	"ADA/MQ,AD/CRY A EQ -1,SKIP/AD CRY0"
SKP MQ NE	"ADA/MQ,AD/CRY A#0,SKIP/AD CRY0"
SKP P NE	"SCADA/AR0-5,SCAD/A,SKIP/SCAD#0"
SKP P!S XCT	"SKIP/P!S XCT"
.IF/MODEL.B
SKP PC SEC0	"SKIP/PC SEC0"
.ENDIF/MODEL.B
SKP PI CYCLE	"SKIP/PI CYCLE"
SKP RPW		"SKIP/RPW REF"
SKP RUN		"SKIP/RUN"
.IFNOT/MODEL.B
SKP SC LE 36	"SCADB/SC,SCADA/#,#/-36.,SCAD/A+B,SKIP/SCAD0"
.ENDIF/MODEL.B
SKP SC NE	"SCADB/SC,SCADA EN/0S,SCAD/A+B,SKIP/SCAD#0"
SKP SC NZ	"SCADA EN/0S,SCADB/SC,SCAD/A+B,SKIP/SCAD#0"
SKP SC0		"SKIP/SC0"
SKP SCAD NE	"SKIP/SCAD#0"
SKP SCAD NZ	"SKIP/SCAD#0"			;[347]
SKP SCAD0	"SKIP/SCAD0"
SKP USER	"SKIP/USER"

SLEN		"R10"		;MUST BE 170
SLEN_AR		"SLEN,FM_AR"
SR DISP		"DISP/SR"
SR_#		"COND/SR_#"		;USED FOR NON-PAGE-FAIL APPLICATIONS
SR_0		"COND/SR_#,#/0"
SR_1		"COND/SR_#,#/1"
SR_2		"COND/SR_#,#/2"		;[224]
.IF/MODEL.B
SR_BDD		"COND/SR_#,#/206"	;B2D AFTER UPDATING DST PTR
SR_BDF		"COND/SR_#,#/203"	;B2D STORING FILLERS
SR_BDT		"COND/SR_#,#/010"	;B2D IN TRANSLATION
SR_BLT(DST)	"COND/SR_#,#/507"
.IF/BLT.PXCT
SR_BLT(PXCT DST)"COND/SR_#,#/107"
SR_BLT(PXCT SRC)"COND/SR_#,#/307"	;SPECIAL FOR PXCT
.ENDIF/BLT.PXCT
SR_BLT(SRC)	"COND/SR_#,#/707"
SR_DB		"COND/SR_#,#/102"	;D2B ANYWHERE
SR_DST		"COND/SR_#,#/212"
SR_DSTF		"COND/SR_#,#/214"
SR_ED(+D)	"COND/SR_#,#/224"
SR_ED(PAT)	"COND/SR_#,#/0"	;PATTERN REF IS EXTENDED
SR_ED(S)	"COND/SR_#,#/101"
.IFNOT/MODEL.B
SR_BDD		"COND/SR_#,#/6"		;B2D AFTER UPDATING DST PTR
SR_BDF		"COND/SR_#,#/3"		;B2D STORING FILLERS
SR_BDT		"COND/SR_#,#/10"	;B2D IN TRANSLATION
SR_BLT(DST)	"COND/SR_#,#/107"	;  BY PXCT 10,4
SR_BLT(SRC)	"COND/SR_#,#/607"	;CONTEXT CONTROLLED BY PXCT 2,1
SR_DB		"COND/SR_#,#/2"		;D2B ANYWHERE
SR_DST		"COND/SR_#,#/12"
SR_DSTF		"COND/SR_#,#/14"
SR_ED(+D)	"COND/SR_#,#/24"
SR_ED(PAT)	"COND/SR_#,#/0"
SR_ED(S)	"COND/SR_#,#/1"
.ENDIF/MODEL.B
.IF/KLPAGE
SR_MAP		"COND/SR_#,#/15"	;CATCH MAP PAGE FAILURES
.ENDIF/KLPAGE
.IF/MODEL.B
SR_SRC		"COND/SR_#,#/111"
SR_SRC+DST	"COND/SR_#,#/213"
.IFNOT/MODEL.B
SR_SRC		"COND/SR_#,#/11"
SR_SRC+DST	"COND/SR_#,#/13"
.ENDIF/MODEL.B
SR_WORD		"COND/SR_#,#/17"	;WORD MOVES OF STRING INSTRS
.IF/MODEL.B
.IF/XADDR
SR_XBLT(DST)	"COND/SR_#,#/316"
SR_XBLT(SRC)	"COND/SR_#,#/216"
.ENDIF/XADDR
.ENDIF/MODEL.B
SRCP		"FMADR/AC1"
SRCP_AR		"SRCP,FM_AR"
SRCP2		"FMADR/AC2"
SRCP2_AR	"SRCP2,FM_AR"

.IF/MODEL.B
STACK UPDATE	"SPEC/STACK UPDATE"
.ENDIF/MODEL.B
STORE		"MEM/WRITE"
.IF/BLT.PXCT
STORE VMA(EA)_ARX	"VMA/LOAD,MEM/EA CALC,EA CALC/WRITE(E),ADA/ARX,AD/A"
.IFNOT/BLT.PXCT
STORE VMA(EA)_ARX		"ADA/ARX,AD/A,VMA/AD,STORE"
.ENDIF/BLT.PXCT
.IF/KLPAGE
SV.AR		"P16"		;156 REQUIRED FOR PF.PAR HACK
.IFNOT/KLPAGE
SV.AR		"R0"
.ENDIF/KLPAGE
SV.AR_AR	"SV.AR,COND/FM WRITE"
.IF/KLPAGE
SV.ARX		"P17"		;157 REQUIRED FOR PF.PAR HACK
.IFNOT/KLPAGE
SV.ARX		"R1"
.ENDIF/KLPAGE
SV.ARX_AR	"SV.ARX,COND/FM WRITE"
.IF/KLPAGE
SV.BR		"P10"
SV.BR_AR	"SV.BR,COND/FM WRITE"
.ENDIF/KLPAGE
SV.IOP		"R3"		;[233]
SV.IOPF		"R2"
SV.IOPF_AR	"SV.IOPF,COND/FM WRITE"	;IO PAGE FAIL WORD
.IF/KLPAGE
SV.PAR		"R0"		;Note not in PAGB block
SV.PAR_AR	"SV.PAR,COND/FM WRITE"
SV.PFW		"P12"
SV.PFW_AR	"SV.PFW,COND/FM WRITE"
SV.SC		"P11"
SV.SC_AR	"SV.SC,COND/FM WRITE"
SV.VMA		"P5"
SV.VMA_AR	"SV.VMA,COND/FM WRITE"
.ENDIF/KLPAGE
SWD		"R1"		;BUFFER FOR SOURCE BYTE WORD
SWD_AR		"SWD,FM_AR"
SWEEP CACHE	"MEM/REG FUNC,MREG FNC/LOAD CCA"

.TOC	"CRAM Macros--T, U, V, W, X"

T0		"R6"
T0_AR		"T0,FM_AR"
T1		"R11"
T1_AR		"T1,FM_AR"
T2		"R12"
T2_AR		"T2,FM_AR"
TAKE INTRPT	"SKIP/-MTR REQ,J/MTRINT"
TEST AR		"ADA/AR,AD/CRY A#0"
TEST AR.AC0	"FMADR/AC0,ADB/FM,ADA/AR,AD/CRY A.B#0"
TEST AR.BR	"ADB/BR,ADA/AR,AD/CRY A.B#0"
TEST AR.MSK	"MSK,ADB/FM,ADA/AR,AD/CRY A.B#0"
TEST ARX	"ADA/ARX,AD/CRY A#0"
TEST ARX.AR*4	"ADA/ARX,ADB/AR*4,AD/CRY A.B#0"
TEST BRL	"ADA EN/0S,ADB/BR,AD/ORCB+1,GEN CRY18"
.IF/KLPAGE
TEST CBR	"CBR,ADB/FM,AD/B,SKP AD NE"	;[247]
.ENDIF/KLPAGE
TEST FETCH	"VMA/PC+1,MEM/FETCH,FETCH/TEST"
TRAP1		"COND/PCF_#,PC FLAGS/TRAP1"
TRAP2		"COND/PCF_#,PC FLAGS/TRAP2"
TRAP3		"COND/PCF_#,PC FLAGS/TRAP3"
.IF/TRXDEF
TRB		"E0"		;same as E0.
TRB_AR		"TRB,FM_AR"
TRX		"R17"
TRX_AR		"TRX,FM_AR"
TRX1		"R2"
TRX1_AR		"TRX1,FM_AR"
TRX2		"R1"
TRX2_AR		"TRX2,FM_AR"
TRX3		"R14"
TRX3_AR		"TRX3,FM_AR"
.ENDIF/TRXDEF

UNCSH PHYS REF	"SPEC/SP MEM CYCLE,SP MEM/UNCSH+UNPAGE"
UPT FETCH	"MEM/LOAD ARX,SPEC/SP MEM CYCLE,SP MEM/UPT FETCH"
UPT REF		"SPEC/SP MEM CYCLE,SP MEM/UPT"
USER REF	"SPEC/SP MEM CYCLE,SP MEM/USER"

VMA_#		"VMA/LOAD,COND/VMA_#"
VMA_#+AR32-35	"VMA/LOAD,COND/VMA_#+AR32-35"
VMA_40		"VMA/LOAD,COND/VMA_#,#/40"
VMA_40+PI*2	"VMA/LOAD,COND/VMA_#+PI*2,#/40"
VMA_41		"VMA/LOAD,COND/VMA_#,#/41"
VMA_41+PI*2	"VMA/LOAD,COND/VMA_#+PI*2,#/41"
VMA_420+TRAP	"VMA/LOAD,COND/VMA_#+TRAP,#/420"
VMA_430+MODE	"VMA/LOAD,COND/VMA_#+MODE,#/430"
VMA_AC3		"FMADR/AC3,ADB/FM,AD/B,VMA/AD"
VMA_AR		"ADA/AR,AD/A,VMA/AD"
VMA_AR AND ADMSK "ADMSK,ADB/FM,ADA/AR,AD/AND,VMA/AD"
VMA_AR+1	"ADA/AR,AD/A+1,VMA/AD"
VMA_AR+BR	"ADA/AR,ADB/BR,AD/A+B,VMA/AD"
.IF/KLPAGE
VMA_AR+CBR	"CBR,ADB/FM,ADA/AR,AD/A+B,VMA/AD"
.ENDIF/KLPAGE
VMA_AR+E0	"E0,ADB/FM,ADA/AR,AD/A+B,VMA/AD"
VMA_AR+E0+1	"E0,ADB/FM,ADA/AR,AD/A+B+1,VMA/AD"
VMA_AR+E1	"E1,ADB/FM,ADA/AR,AD/A+B,VMA/AD"
.IF/KLPAGE
VMA_AR+SBR	"SBR,ADB/FM,ADA/AR,AD/A+B,VMA/AD"
.ENDIF/KLPAGE
.IF/TRXDEF
VMA_AR+TRB	"TRB,ADB/FM,ADA/AR,AD/A+B,VMA/AD"
.ENDIF/TRXDEF
VMA_AR+XR	"GEN AR+XR,VMA/AD"
VMA_AR-1	"ADA/AR,AD/A-1,VMA/AD"
VMA_ARX		"ADA/ARX,AD/A,VMA/AD"
VMA_ARX AND ADMSK "ADMSK,ADB/FM,ADA/ARX,AD/AND,VMA/AD"
VMA_ARX+1	"ADA/ARX,AD/A+1,VMA/AD"
VMA_ARX+BR	"ADA/ARX,ADB/BR,AD/A+B,VMA/AD"
.IF/KLPAGE
VMA_ARX+CBR	"CBR,ADB/FM,ADA/ARX,AD/A+B,VMA/AD"
.ENDIF/KLPAGE
VMA_ARX+XR	"GEN ARX+XR,VMA/AD"

VMA_BR		"ADB/BR,AD/B,VMA/AD"
VMA_E0+1	"E0,ADB/FM,ADA EN/0S,AD/A+B+1,VMA/AD"
VMA_FM[]	"ADA EN/0S,ADB/FM,@1,AD/B,VMA/AD";[344]
VMA_MQ		"ADA/MQ,AD/A,VMA/AD"
VMA_MQ+1	"ADA/MQ,AD/A+1,VMA/AD"		;[310]
VMA_PC		"VMA/PC"			;[252]
VMA_PC+1	"VMA/PC+1"
.IF/KLPAGE
VMA_SV.VMA	"SV.VMA,ADB/FM,AD/B,VMA/AD"
.ENDIF/KLPAGE
.IF/TRXDEF
VMA_TRB		"TRB,ADB/FM,AD/B,VMA/AD"
.ENDIF/TRXDEF
.IFNOT/MODEL.B
VMA_VMA HELD	"COND/SEL VMA,ADA/PC,AD/A,VMA/AD"
.IF/MODEL.B
.IFNOT/KLPAGE
VMA_VMA HELD	"COND/SEL VMA,ADA/PC,AD/A,VMA/AD"
.IF/KLPAGE
VMA_VMA HELD	"COND/SEL VMA,ADA/PC,AD/A,VMA/AD,MEM/RESTORE VMA"
.ENDIF/KLPAGE
.ENDIF/MODEL.B
VMA_VMA+1	"VMA/VMA,COND/VMA INC"
VMA_VMA-1	"VMA/VMA,COND/VMA DEC"

WR PT ENTRY	"COND/MBOX CTL,MBOX CTL/PT WR"
WR REFILL RAM	"MEM/REG FUNC,MREG FNC/WR REFILL RAM"
.IF/MODEL.B
WRITE (E)	"MEM/EA CALC,EA CALC/WRITE(E),VMA/LOAD"
.ENDIF/MODEL.B

XR		"FMADR/XR"

.TOC	"DRAM Macros"

	.DCODE
;
;	These macros have not been sorted alphabetically, as (1) there are
;	too few to bother, and (2) no one ever looks at the DRAM anyway!
;
;"A FIELD" MACROS
; DECODED TO TELL WHAT TO DO WITH EFFECTIVE ADDRESS
; AND WHETHER TO PREFETCH FROM PC+1

I	"A/IMMED"
I-PF	"A/IMMED-PF"
.IFNOT/XADDR
EA	"A/IMMED"
.IF/XADDR
EA	"A/ADDR"
.ENDIF/XADDR
W	"A/WR-TST"
R	"A/READ"
R-PF	"A/READ-PF"
RW	"A/RD-WR"
.IF/RPW
RPW	"A/RD-P-WR"
.IFNOT/RPW
RPW	"A/RD-WR"
.ENDIF/RPW
.IF/WRTST
IW	"A/WR-TST"
.IFNOT/WRTST
IW	"A/IMMED"
.ENDIF/WRTST

;"B FIELD" MACROS
; DECODED BY MOST INSTRUCTIONS TO TELL WHERE TO STORE RESULTS,
; BUT USED BY OTHERS TO HOLD VARIOUS "MODE" INFORMATION

AC	"B/AC"
M	"B/MEM"
S	"B/SELF"
B	"B/BOTH"
DBL AC	"B/DBL AC"
DBL B	"B/DBL BOTH"
FL-AC	"B1-2/AC"
FL-MEM	"B1-2/MEM"
FL-BOTH	"B1-2/BOTH"

TN-	"B0/CRY0(1),B1-2/0"
TNE	"B0/CRY0(0),B1-2/0"
TNA	"B0/CRY0(0),B1-2/0"
TNN	"B0/CRY0(1),B1-2/0"
TZ-	"B0/CRY0(1),B1-2/1"
TZE	"B0/CRY0(0),B1-2/1"
TZA	"B0/CRY0(0),B1-2/1"
TZN	"B0/CRY0(1),B1-2/1"
TC-	"B0/CRY0(1),B1-2/2"
TCE	"B0/CRY0(0),B1-2/2"
TCA	"B0/CRY0(0),B1-2/2"
TCN	"B0/CRY0(1),B1-2/2"
TO-	"B0/CRY0(1),B1-2/3"
TOE	"B0/CRY0(0),B1-2/3"
TOA	"B0/CRY0(0),B1-2/3"
TON	"B0/CRY0(1),B1-2/3"

SJC-	"B/SJC-"
SJCL	"B/SJCL"
SJCE	"B/SJCE"
SJCLE	"B/SJCLE"
SJCA	"B/SJCA"
SJCGE	"B/SJCGE"
SJCN	"B/SJCN"
SJCG	"B/SJCG"

BLKI	"B0/CRY0(0),B1-2/2"
BLKO	"B0/CRY0(0),B1-2/0"
DATAI	"B/6"
DATAO	"B/4"
CONI	"B/6"
CONO	"B/4"
CONSO	"B0/CRY0(1),B1-2/1"
CONSZ	"B0/CRY0(0),B1-2/1"

.BIN
	.UCODE