Trailing-Edge
-
PDP-10 Archives
-
BB-JF18A-BM
-
documentation/klx.bwr
There is 1 other file named klx.bwr in the archive. Click here to see a list.
-- KL MICROCODE BEWARE FILE --
July 1986
COPYRIGHT (c) DIGITAL EQUIPMENT CORPORATION 1977,1978,
1979,1980,1981,1982,1983,1984,1986. ALL RIGHTS RESERVED.
THIS SOFTWARE IS FURNISHED UNDER A LICENSE FOR USE ONLY ON A SINGLE
COMPUTER SYSTEM AND MAY BE COPIED ONLY WITH THE INCLUSION OF THE ABOVE
COPYRIGHT NOTICE. THIS SOFTWARE, OR ANY OTHER COPIES THEREOF, MAY NOT
BE PROVIDED OR OTHERWISE MADE AVAILABLE TO ANY OTHER PERSON EXCEPT FOR
USE ON SUCH SYSTEM AND TO ONE WHO AGREES TO THESE LICENSE TERMS.
TITLE TO AND OWNERSHIP OF THE SOFTWARE SHALL AT ALL TIMES REMAIN IN
DIGITAL.
THE INFORMATION IN THIS SOFTWARE IS SUBJECT TO CHANGE WITHOUT NOTICE
AND SHOULD NOT BE CONSTRUED AS A COMMITMENT BY DIGITAL EQUIPMENT
CORPORATION.
DIGITAL ASSUMES NO RESPONSIBILITY FOR THE USE OR RELIABILITY OF ITS
SOFTWARE ON EQUIPMENT WHICH IS NOT SUPPLIED BY DIGITAL.
KL MICROCODE BEWARE FILE -- V2.1(442) Page 2
KL-UCODE.BWR -- V2.1(442)
July 1986
1.0 KNOWN BUGS
No known bugs.
In testing this new microcode some poor programing concerning BLT
was found in current products. Following is an excerpt from the
DECsystem-10/DECSYSTEM-20 Processor Reference Manual:
Should an interrupt or page failure occur during its
execution, the BLT stores the source and destination
addresses for the next word in AC, so when the processor
restarts upon the return to the interrupted program, it
actually resumes at the correct point within the BLT.
Therefore A and X must NOT address the same register as this
would produce a different effective address calculation upon
resumption; and the instruction must NOT attempt to load an
accumulator addressed either by A or X unless it is the
final location being loaded.
[End of E442UC.RNM]