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klad.sources/dfkdat.mac
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;MAINDEC-10-DFKDA
DECVER==005
MCNVER==000
XLIST
DEFINE NAME (MCNVER,DECVER),<
TITLE DFKDA PDP-10 KL10 ARITHMETIC/RANDOM/INTERRUPT/MEMORY RELIABILITY TEST, VER MCNVER,DECVER >
LIST
LALL
NAME \MCNVER,\DECVER
XALL
;A COMPREHENSIVE RELIABILITY TEST OF THE PDP-10 KL10
;FIXED, FLOATING AND BYTE INSTRUCTIONS,
;RANDOM INSTRUCTION SEQUENCES,
;INTERRUPT FUNCTIONS,
;AND MEMORY.
;KL10 CENTRAL PROCESSOR
;COPYRIGHT 1975,1977,1979,1983,1984
;DIGITAL EQUIPMENT CORPORATION
;MARLBORO, MASS. 01752
;JOHN R. KIRCHOFF
LOC 137
MCNVER,,DECVER
NOSYM
;TEST CONTROL SWITCHES
;RIGHT HALF
RANBAS==400000 ;SPECIFY RANDOM NUMBER BASE
INHCLK==200000 ;INHIBIT CLOCK INTERRUPTS
INHMEM==100000 ;INHIBIT MEMORY TESTING
INHADB==40000 ;INHIBIT ADDRESS BREAK TESTING
INHII==20000 ;INHIBIT INSTRUCTION INTERRUPT TESTING
INHMI==10000 ;INHIBIT METER INTERRUPT TESTING
INHBLT==4000 ;INHIBIT BLT INTERRUPT TESTING
INHPAR==2000 ;INHIBIT PARITY INTERRUPT TESTING
INHNXM==1000 ;INHIBIT NON-EX-MEMORY INTERRUPT TESTING
INHNEW==400 ;INHIBIT DOUBLE PRECISION INSTRUCTIONS
INHDFP==200 ;INHIBIT DOUBLE FLOATING POINT TEST
INHFP==100 ;ENABLE FLOATING POINT TEST
INHBYT==40 ;INHIBIT BYTE TEST
INHFXD==20 ;INHIBIT FIXED POINT TEST
INHRAN==10 ;INHIBIT RANDOM INSTRUCTION
SNGFL==4 ;RUN SINGLE FAST LOOP
SLOW==2 ;RUN JUST SIMULATION COMPARISION
FAST==1 ;RUN JUST INSTRUCTION COMPARISION
;BEGIN ASSEMBLY PARAMETERS
SADR1==SFSRT1
SADR2==RESRT1
SADR3==RENTR1
SADR4==SRTDDT
SADR5==BEGIN
SADR6==SRTDDT
SADR7==JRST BEGIN
SADR8==JRST BEGIN
SADR9==JRST BEGIN
SADR10==JRST BEGIN
SADR11==JRST BEGIN
PAREA1==123457,,654321
PAREA2==0,,0
PAREA3==SIXBIT/DFKDA/
PAREA4==SIXBIT/LPT/
PAREA5==0
PAREA6==0
ITERAT==2
SUBTTL ASSEMBLY PARAMETERS
DDT=DDTSRT
PGMEND==1
EXCASB==1
USRASB==1
MEMMAP==1
KL10==1
KL10P0==1
KI10==1
DEBUG==40
ONEPRT==1 ;ASSEMBLE PROGRAM AS ONE PART
SIMASB==1
;ACCUMULATOR ASSIGNMENTS
AC==1 ;TEST AC'S
RA==5 ;RANDOM NUMBER AC'S
FLAGS==11 ;FLAGS (OV, DCK, ETC)
ACSP==12 ;POINTER FOR SIMULATED AC'S
CNTL==13 ;CONTROL REGISTER
CNTR==14 ;COUNTER FOR GROUP
IT==15 ;TEST INSTRUCTION POINTER
LOP==16 ;GROUP ITERATION COUNTER
Q==16 ;DFP ROUTINE POINTER
P==17 ;PUSHDOWN POINTER
;CONTROL WORDS
DFP==400000 ;DOUBLE FLOAT FLAG
BYT==200000 ;BYTE FLAG
FP==100000 ;FLOAT FLAG
FPL==40000 ;FLOATING POINT LONG
FPI==20000 ;FLOATING POINT IMMEDIATE
ER==10000 ;ERROR FLAG
;UUO DEFINITIONS
OPDEF SINST [001B8]
OPDEF SMT [002B8]
LUUO1=SIMNST
LUUO2=SIMMT
SUBTTL PROGRAM DEFINITIONS AND MACRO'S
OPDEF CLRAPR [CONO APR,<LAPRAL-20>!LAPRP1]
OPDEF CLRPI [CONO PI,LPICLR!LPION!LPICHA]
DEFINE CLRBTH<
CLRAPR
CLRPI
>
DEFINE LOPTST(A)<
SWITCH ;GET CONSOLE SWITCHES
TLNE RELIAB ;FAST CYCLE WANTED?
SOJGE 14,A ;LOOP TEST TILL 14 = 0
RTN ;EXIT TEST
>
DEFINE MOVMEM (FROM,TO)<
PUSH P,FROM
POP P,TO
>
DEFINE SUBTST<
MOVEI .
MOVEM TESTPC
>
;MEMORY RELIABILITY AC DEFINITIONS
MSG=0
PATRN=1 ;DATA PATTERN WORD
PATIX=2 ;PATTERN EXECUTE INDEX
SEGIX=3 ;ADDRESS SEGMENT INDEX
ADRCON=4 ;ADDRESS CONTROL WORD
TSTAC=5 ;FAST AC TEST ROUTINES
AC6=6
AC7=7
AC10=10
AC11=11
AC12=12
AC13=13
AC14=14
TAC=15 ;TEMPORARY AC
TAC1=16 ;TEMPORARY AC 1
MFIRST=PATIX ;BASE ADDRESS FOR FAST RATE ADDRESS
MLAST=SEGIX ;LAST ADDRESS FOR FAST RATE ADDRESS
CNT=TAC ;ACTUAL ADDRESS FOR FAST RATE ADDRESS
FRBIT=TAC1 ;FAST RATE ADDRESSING BIT
;MACROS
DEFINE SAVEM (A,B)<
MOVEM A,B(ACSP) ;MOVE TO MEMORY
MOVEM A+1,B+1(ACSP)
MOVEM A+2,B+2(ACSP)
MOVEM A+3,B+3(ACSP)
>
DEFINE RESTOR (A,B)<
MOVE A,B(ACSP) ;MOVE TO AC
MOVE A+1,B+1(ACSP)
MOVE A+2,B+2(ACSP)
MOVE A+3,B+3(ACSP)
>
DEFINE NORM (A,B)<
TLNE A,400000 ;NORMALIZE A NUMBER
TLZA A,400
TLO A,400
TDNN A,[377777777777]
AOS A,B
TDNN A,[000777777777]
TLO A,400
MOVEM A,B
>
;NEW OP CODE DEFINITIONS
OPDEF DFAD [110B8]
OPDEF DFSB [111B8]
OPDEF DFMP [112B8]
OPDEF DFDV [113B8]
OPDEF DMOVE [120B8]
OPDEF DMOVN [121B8]
OPDEF FIX [122B8]
OPDEF DMOVEM [124B8]
OPDEF DMOVNM [125B8]
OPDEF FIXR [126B8]
OPDEF FLTR [127B8]
;STATEMENT OPERATORS PASSED FROM/TO MAIN SIMULATOR PROGRAM
;AC ASSIGNMENTS
F==0
T==1
T1==2
T2==3
T3==4
S==5
AR==6
MQ==7
BR==10
AD==11
MB==12
PC==13
MA==14
SC==15
IR==16
;MISCELLANEOUS
SIMGO=GO
OFFSET=0 ;SIMULATION DONE FROM LOW SEGMENT
VM==SENTRY
INHIF==0
SEQPNT==0
ALINES==0
INHSCT==0
PNTMS==0
CKOUT==0
MGNTST==0
;INTERRUPT PARAMETERS
LOPCNT==^D10 ;SLOW CYCLE, LOOP EACH TEST 10 TIMES
BUFF=70000
BUFEND=BUFF+2001
BUFF1=BUFEND+100
INTBLK=BUFF
TIM==20 ;METER TIM DEVICE CODE
MTR==24 ;METER MTR DEVICE CODE
TIMCLR=400000 ;CLEAR TIMER
TIMON=040000 ;TIMER ON
TIMCDON=020000 ;CLEAR DONE
TIMDON=020000 ;TIMER DONE
;PROGRAM DESIGNED TO EXECUTE RANDOM INSTRUCTIONS (NON-PC CHANGE)
; IN CORE, IN THE FAST AC'S, AND THRU SOFTWARE SIMULATION.
;THE RESULTS OF THE THREE GROUPS OF INST ARE COMPARED FOR EQUALITY.
;UPON A DISCREPENCY THE PROGRAM PRINTS ALL PERTINENT INFORMATION
; AND GOES INTO A REPETITIVE FAILURE LOOP.
;THE PROGRAM OPERATES AS FOLLOWS:
;1. GENERATES EIGHT RANDOM NUMBERS AND STORES
; THEM IN AC 0-7.
;2. RESTORES THEM IN RAND-RAND+7
;3. TEST AC'S FOR VALID INST.
;A. OP CODES 0-17 CHANGED TO DFAD
;B. OP CODES 20-37 CHANGED TO DFSB
;C. OP CODES 40-57 CHANGED TO DFMP
;D. OP CODES 60-77 CHANGED TO DFDV
;E. OP CODES 100-107 CHANGED TO ROTC
;F. OP CODES 114-117,123 CHANGED TO DFDV
;G. OP CODES 133-137 CHANGED TO ASHC
;H. OP CODES 243+247 CHANGED TO IMUL
;I. OP CODES 260-267 CHANGED TO IMUL
;J. OP CODES 251-257 CHANGED TO IMUL
;K. OP CODES 300-377 CHANGED TO FSBR
;L. OP CODES 600-677 CHANGED TO FDVR IF
; IT IS THE LAST INST IN THE INST GROUP
;M. OP CODES OF 700-777 CHANGED TO FMPR
;N. THEN ALL VALID INST. ARE MASKED FOR
; INDEX REG, INDIRECT, AC'S ABOVE 7, AND
; ONLY AN "E" FIELD OF 0-7.
;4. STORES VALID INST IN INSBLK
;5. SETS UP SLOW CORE LOOP WITH SIMULATION TRANSFER
; BETWEEN EACH VALID INST.
;6. EXECUTES & SIMULATES SLOW LOOP.
;7. COMPARES RESULTS AFTER EACH INST/SIMULATION.
;8. STORES ANS. (AC'S 0-7) IN ANSBLK.
;9. LOADS FAST LOOP AND AC'S
;10. EXECUTES FAST LOOP.
;11. COMPARES FAST LOOP AND SLOW LOOP ANS.
;12. RE-EXECUTES FAST LOOP 7 TIMES WITH ANS CHECKING.
;13. UPON AN ERROR THE PROGRAM WILL OUTPUT ON LPT OR TTY,
; THE OPERANDS, INSTRUCTIONS, SLOW/FAST LOOP
; ANSWERS, AND THE SIM/SLOW LOOP ANSWERS.
;14. THE PROGRAM WILL THEN SIMULATE AND PRINT THE
; APPROPRIATE FAILING INSTRUCTION(S).
;15. IT THEN WILL GO INTO AN ERROR LOOP.
;NOTE:- BEWARE CORE LOOP AND/OR SIMULATION LOOP MAY
; HAVE FAILED AND NOT FAST LOOP.