Trailing-Edge
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PDP-10 Archives
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klad_sources
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klad.sources/switch.hlp
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DGKBD & DGKBE SINGLE-PULSE THRU MEMORY REFERENCES. SINCE
THE DMA20 PERMITS THIS OPERATION ONLY IN ONE-BUS MODE, THE MEMORY
MUST BE PROPERLY SET-UP FOR THIS MODE OF OPERATION. SWITCHES NEED
NOT BE CHANGED ON AN ME-10 OR MF-10. FOR AN MG-10 OR MH-10, THE
MEMORY RESPONDING TO THE LOWEST ADDRESSES MUST BE SET AS FOLLOWS:
1) ONLY ONE PORT SELECTION SWITCH SHOULD BE SET FOR THIS
PROCESSOR.
2) INLV/NORM 34 & 35 SWITCHES MUST BE DOWN.
CAREFULLY NOTE THE POSITION OF THE SWITCHES BEFORE ALTERING THEIR
SETTINGS, SINCE THEY MUST BE RESTORED TO THEIR PREVIOUS POSITIONS
FOR NORMAL OPERATION.